esp_common: other movements

components/esp_common/component.mk

@@ -4,6 +4,3 @@
 
 COMPONENT_ADD_INCLUDEDIRS := include
 COMPONENT_SRCDIRS := src
-ifndef CONFIG_IDF_ENV_FPGA
-COMPONENT_OBJEXCLUDE += src/fpga_overrides.o
-endif

components/esp_hw_support/CMakeLists.txt

@@ -10,8 +10,6 @@ if(NOT BOOTLOADER_BUILD)
     list(APPEND srcs "clk_ctrl_os.c" "mac_addr.c")
 endif()
 
-endif()
-
 idf_component_register(SRCS ${srcs}
                        INCLUDE_DIRS include
                        REQUIRES ${requires}

components/esp_hw_support/Kconfig

@@ -1,10 +1,5 @@
 menu "Hardware Settings"
     menu "MAC Config"
-        config ESP_UNIVERSAL_MAC_ADDRESSES
-            int
-            default 2 if ESP32_UNIVERSAL_MAC_ADDRESSES_TWO
-            default 4 if ESP32_UNIVERSAL_MAC_ADDRESSES_FOUR
-
         config ESP_MAC_ADDR_UNIVERSE_WIFI_STA
             bool
 

components/esp_hw_support/component.mk

@@ -6,5 +6,4 @@ port/$(IDF_TARGET)/rtc_clk.o: CFLAGS += -fno-jump-tables -fno-tree-switch-conver
 
 ifdef IS_BOOTLOADER_BUILD
 COMPONENT_OBJEXCLUDE += clk_ctrl_os.o mac_addr.o
-
 endif

components/esp_ipc/test/CMakeLists.txt

@@ -1,5 +1,5 @@
 if(IDF_TARGET STREQUAL "esp32")
     idf_component_register(SRC_DIRS "."
                     PRIV_INCLUDE_DIRS "."
-                    PRIV_REQUIRES cmock test_utils)
+                    PRIV_REQUIRES cmock test_utils esp_ipc)
 endif()

components/esp_system/CMakeLists.txt

@@ -6,30 +6,36 @@ endif()
 
 idf_build_get_property(target IDF_TARGET)
 
-set(srcs  "intr_alloc.c"
+# Remove when sleep is brought up on master for C3 TODO ESP32-C3 IDF-2571
+set(srcs "esp_err.c"
+        "freertos_hooks.c"
+        "intr_alloc.c"
+        "int_wdt.c"
         "esp_async_memcpy.c"
         "panic.c"
         "system_api.c"
         "startup.c"
         "system_time.c"
-          "sleep_modes.c"
-          "task_wdt.c"
-          "int_wdt.c"
         "stack_check.c"
-          "freertos_hooks.c"
+        "sleep_modes.c"
-          "esp_err.c")
+        "task_wdt.c")
 
 if(NOT (${target} STREQUAL "esp32c3") )
     list(APPEND srcs  "dbg_stubs.c")
 endif()
 
+if(CONFIG_IDF_ENV_FPGA)
+    list(APPEND srcs "fpga_overrides.c")
+endif()
+
 idf_component_register(SRCS "${srcs}"
                     INCLUDE_DIRS include
                     PRIV_REQUIRES spi_flash
                                   # [refactor-todo] requirements due to init code,
                                   # should be removable once using component init functions
                                   # link-time registration is used.
-                                  esp_pm app_update nvs_flash pthread app_trace esp_gdbstub
+                                  esp_pm app_update nvs_flash pthread app_trace esp_gdbstub esp_ipc
+                                  espcoredump
                     LDFRAGMENTS "linker.lf")
 add_subdirectory(port)
 
@@ -54,3 +60,8 @@ if(NOT CMAKE_BUILD_EARLY_EXPANSION)
     set_source_files_properties("${CMAKE_CURRENT_LIST_DIR}/sleep_modes.c" PROPERTIES
                                 COMPILE_FLAGS "-fno-jump-tables -fno-tree-switch-conversion")
 endif()
+
+if(CONFIG_IDF_ENV_FPGA)
+    # Forces the linker to include fpga stubs from this component
+    target_link_libraries(${COMPONENT_LIB} INTERFACE "-u esp_common_include_fpga_overrides")
+endif()

components/esp_system/component.mk

@@ -1,11 +1,15 @@
+ifdef IS_BOOTLOADER_BUILD
+COMPONENT_CONFIG_ONLY := 1
+else
 SOC_NAME := $(IDF_TARGET)
 
 COMPONENT_SRCDIRS := .
 COMPONENT_ADD_INCLUDEDIRS := include
-COMPONENT_PRIV_INCLUDEDIRS := private_include port/include
+COMPONENT_PRIV_INCLUDEDIRS := port/include port
 COMPONENT_ADD_LDFRAGMENTS += linker.lf
 
 include $(COMPONENT_PATH)/port/soc/$(SOC_NAME)/component.mk
 
 # disable stack protection in files which are involved in initialization of that feature
 startup.o stack_check.o: CFLAGS := $(filter-out -fstack-protector%, $(CFLAGS))
+endif

components/esp_system/fpga_overrides.c

@@ -0,0 +1,73 @@
+// Copyright 2010-2020 Espressif Systems (Shanghai) PTE LTD
+//
+// Licensed under the Apache License, Version 2.0 (the "License");
+// you may not use this file except in compliance with the License.
+// You may obtain a copy of the License at
+//
+//     http://www.apache.org/licenses/LICENSE-2.0
+//
+// Unless required by applicable law or agreed to in writing, software
+// distributed under the License is distributed on an "AS IS" BASIS,
+// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+// See the License for the specific language governing permissions and
+// limitations under the License.
+#include "sdkconfig.h"
+#include "soc/soc.h"
+#include "soc/rtc.h"
+#include "soc/rtc_cntl_reg.h"
+#include "esp_log.h"
+#include "esp_rom_sys.h"
+#include "esp_rom_uart.h"
+#include "esp_attr.h"
+
+static const char *TAG = "fpga";
+
+extern void ets_update_cpu_frequency(uint32_t ticks_per_us);
+
+static void s_warn(void)
+{
+    ESP_EARLY_LOGW(TAG, "Project configuration is for internal FPGA use, not all functions will work");
+}
+
+void bootloader_clock_configure(void)
+{
+    s_warn();
+    esp_rom_uart_tx_wait_idle(0);
+
+    uint32_t xtal_freq_mhz = 40;
+#ifdef CONFIG_IDF_TARGET_ESP32S2
+    uint32_t apb_freq_hz = 20000000;
+#else
+    uint32_t apb_freq_hz = 40000000;
+#endif // CONFIG_IDF_TARGET_ESP32S2
+    ets_update_cpu_frequency(apb_freq_hz / 1000000);
+    REG_WRITE(RTC_CNTL_STORE5_REG, (apb_freq_hz >> 12) | ((apb_freq_hz >> 12) << 16));
+    REG_WRITE(RTC_CNTL_STORE4_REG, (xtal_freq_mhz) | ((xtal_freq_mhz) << 16));
+}
+
+/* Placed in IRAM since test_apps expects it to be */
+void IRAM_ATTR bootloader_fill_random(void *buffer, size_t length)
+{
+    uint8_t *buffer_bytes = (uint8_t *)buffer;
+    for (int i = 0; i < length; i++) {
+        buffer_bytes[i] = 0x5A;
+    }
+}
+
+void esp_clk_init(void)
+{
+    s_warn();
+}
+
+void esp_perip_clk_init(void)
+{
+
+}
+
+/**
+ * @brief No-op function, used to force linking this file
+ *
+ */
+void esp_common_include_fpga_overrides(void)
+{
+}