kopia lustrzana https://github.com/espressif/esp-idf
Merge branch 'feature/support_esp32c3_master_cmake_efuse_to_mater' into 'master'
efuse: Merge C3 efuse changes to master Closes IDF-2548 See merge request espressif/esp-idf!11719pull/6365/head
Angus Gratton
commit
309d76e986
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@ -30,7 +30,7 @@ quiet = False
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max_blk_len = 256
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idf_target = "esp32"
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copyright = '''// Copyright 2017-2018 Espressif Systems (Shanghai) PTE LTD
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copyright = '''// Copyright 2017-2020 Espressif Systems (Shanghai) PTE LTD
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//
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// Licensed under the Apache License, Version 2.0 (the "License");
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// you may not use this file except in compliance with the License.
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@ -228,7 +228,7 @@ class FuseTable(list):
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"}",
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"#endif",
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""]
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return '\n'.join(rows) + "\n"
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return '\n'.join(rows)
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def to_c_file(self, file_name, debug):
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rows = [copyright]
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@ -300,7 +300,7 @@ class FuseTable(list):
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rows += [" NULL",
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"};\n"]
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return '\n'.join(rows) + "\n"
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return '\n'.join(rows)
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class FuseDefinition(object):
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@ -466,7 +466,7 @@ def main():
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global idf_target
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parser = argparse.ArgumentParser(description='ESP32 eFuse Manager')
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parser.add_argument('--idf_target', '-t', help='Target chip type', choices=['esp32', 'esp32s2', 'esp32s3'], default='esp32')
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parser.add_argument('--idf_target', '-t', help='Target chip type', choices=['esp32', 'esp32s2', 'esp32s3', 'esp32c3'], default='esp32')
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parser.add_argument('--quiet', '-q', help="Don't print non-critical status messages to stderr", action='store_true')
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parser.add_argument('--debug', help='Create header file with debug info', default=False, action="store_false")
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parser.add_argument('--info', help='Print info about range of used bits', default=False, action="store_true")
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@ -0,0 +1,938 @@
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// Copyright 2017-2020 Espressif Systems (Shanghai) PTE LTD
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//
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// Licensed under the Apache License, Version 2.0 (the "License");
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// you may not use this file except in compliance with the License.
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// You may obtain a copy of the License at",
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//
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// http://www.apache.org/licenses/LICENSE-2.0
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//
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// Unless required by applicable law or agreed to in writing, software
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// distributed under the License is distributed on an "AS IS" BASIS,
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// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
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// See the License for the specific language governing permissions and
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// limitations under the License
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#include "sdkconfig.h"
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#include "esp_efuse.h"
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#include <assert.h>
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#include "esp_efuse_table.h"
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// md5_digest_table 2c7ba2aa68a2748d3de9a5d1fed59b9f
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// This file was generated from the file esp_efuse_table.csv. DO NOT CHANGE THIS FILE MANUALLY.
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// If you want to change some fields, you need to change esp_efuse_table.csv file
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// then run `efuse_common_table` or `efuse_custom_table` command it will generate this file.
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// To show efuse_table run the command 'show_efuse_table'.
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static const esp_efuse_desc_t WR_DIS_RD_DIS[] = {
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{EFUSE_BLK0, 0, 1}, // Write protection for RD_DIS_KEY0 RD_DIS_KEY1 RD_DIS_KEY2 RD_DIS_KEY3 RD_DIS_KEY4 RD_DIS_KEY5 RD_DIS_SYS_DATA_PART2,
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};
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static const esp_efuse_desc_t WR_DIS_GROUP_1[] = {
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{EFUSE_BLK0, 2, 1}, // Write protection for DIS_ICACHE DIS_DOWNLOAD_ICACHE DIS_FORCE_DOWNLOAD DIS_USB DIS_CAN SOFT_DIS_JTAG DIS_DOWNLOAD_MANUAL_ENCRYPT,
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};
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static const esp_efuse_desc_t WR_DIS_GROUP_2[] = {
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{EFUSE_BLK0, 3, 1}, // Write protection for WDT_DELAY_SEL,
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};
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static const esp_efuse_desc_t WR_DIS_SPI_BOOT_CRYPT_CNT[] = {
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{EFUSE_BLK0, 4, 1}, // Write protection for SPI_BOOT_CRYPT_CNT,
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};
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static const esp_efuse_desc_t WR_DIS_SECURE_BOOT_KEY_REVOKE0[] = {
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{EFUSE_BLK0, 5, 1}, // Write protection for SECURE_BOOT_KEY_REVOKE0,
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};
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static const esp_efuse_desc_t WR_DIS_SECURE_BOOT_KEY_REVOKE1[] = {
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{EFUSE_BLK0, 6, 1}, // Write protection for SECURE_BOOT_KEY_REVOKE1,
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};
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static const esp_efuse_desc_t WR_DIS_SECURE_BOOT_KEY_REVOKE2[] = {
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{EFUSE_BLK0, 7, 1}, // Write protection for SECURE_BOOT_KEY_REVOKE2,
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};
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static const esp_efuse_desc_t WR_DIS_KEY0_PURPOSE[] = {
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{EFUSE_BLK0, 8, 1}, // Write protection for key_purpose. KEY0,
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};
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static const esp_efuse_desc_t WR_DIS_KEY1_PURPOSE[] = {
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{EFUSE_BLK0, 9, 1}, // Write protection for key_purpose. KEY1,
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};
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static const esp_efuse_desc_t WR_DIS_KEY2_PURPOSE[] = {
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{EFUSE_BLK0, 10, 1}, // Write protection for key_purpose. KEY2,
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};
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static const esp_efuse_desc_t WR_DIS_KEY3_PURPOSE[] = {
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{EFUSE_BLK0, 11, 1}, // Write protection for key_purpose. KEY3,
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};
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static const esp_efuse_desc_t WR_DIS_KEY4_PURPOSE[] = {
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{EFUSE_BLK0, 12, 1}, // Write protection for key_purpose. KEY4,
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};
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static const esp_efuse_desc_t WR_DIS_KEY5_PURPOSE[] = {
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{EFUSE_BLK0, 13, 1}, // Write protection for key_purpose. KEY5,
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};
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static const esp_efuse_desc_t WR_DIS_SECURE_BOOT_EN[] = {
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{EFUSE_BLK0, 15, 1}, // Write protection for SECURE_BOOT_EN,
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};
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static const esp_efuse_desc_t WR_DIS_SECURE_BOOT_AGGRESSIVE_REVOKE[] = {
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{EFUSE_BLK0, 16, 1}, // Write protection for SECURE_BOOT_AGGRESSIVE_REVOKE,
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};
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static const esp_efuse_desc_t WR_DIS_GROUP_3[] = {
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{EFUSE_BLK0, 18, 1}, // Write protection for FLASH_TPUW DIS_DOWNLOAD_MODE DIS_LEGACY_SPI_BOOT UART_PRINT_CHANNEL DIS_TINY_BASIC DIS_USB_DOWNLOAD_MODE ENABLE_SECURITY_DOWNLOAD UART_PRINT_CONTROL PIN_POWER_SELECTION FLASH_TYPE FORCE_SEND_RESUME SECURE_VERSION,
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};
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static const esp_efuse_desc_t WR_DIS_BLK1[] = {
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{EFUSE_BLK0, 20, 1}, // Write protection for EFUSE_BLK1. MAC_SPI_8M_SYS,
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};
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static const esp_efuse_desc_t WR_DIS_SYS_DATA_PART1[] = {
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{EFUSE_BLK0, 21, 1}, // Write protection for EFUSE_BLK2. SYS_DATA_PART1,
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};
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static const esp_efuse_desc_t WR_DIS_USER_DATA[] = {
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{EFUSE_BLK0, 22, 1}, // Write protection for EFUSE_BLK3. USER_DATA,
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};
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static const esp_efuse_desc_t WR_DIS_KEY0[] = {
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{EFUSE_BLK0, 23, 1}, // Write protection for EFUSE_BLK4. KEY0,
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};
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static const esp_efuse_desc_t WR_DIS_KEY1[] = {
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{EFUSE_BLK0, 24, 1}, // Write protection for EFUSE_BLK5. KEY1,
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};
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static const esp_efuse_desc_t WR_DIS_KEY2[] = {
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{EFUSE_BLK0, 25, 1}, // Write protection for EFUSE_BLK6. KEY2,
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};
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static const esp_efuse_desc_t WR_DIS_KEY3[] = {
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{EFUSE_BLK0, 26, 1}, // Write protection for EFUSE_BLK7. KEY3,
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};
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static const esp_efuse_desc_t WR_DIS_KEY4[] = {
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{EFUSE_BLK0, 27, 1}, // Write protection for EFUSE_BLK8. KEY4,
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};
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static const esp_efuse_desc_t WR_DIS_KEY5[] = {
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{EFUSE_BLK0, 28, 1}, // Write protection for EFUSE_BLK9. KEY5,
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};
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static const esp_efuse_desc_t WR_DIS_SYS_DATA_PART2[] = {
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{EFUSE_BLK0, 29, 1}, // Write protection for EFUSE_BLK10. SYS_DATA_PART2,
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};
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static const esp_efuse_desc_t RD_DIS_KEY0[] = {
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{EFUSE_BLK0, 32, 1}, // Read protection for EFUSE_BLK4. KEY0,
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};
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static const esp_efuse_desc_t RD_DIS_KEY1[] = {
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{EFUSE_BLK0, 33, 1}, // Read protection for EFUSE_BLK5. KEY1,
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};
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static const esp_efuse_desc_t RD_DIS_KEY2[] = {
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{EFUSE_BLK0, 34, 1}, // Read protection for EFUSE_BLK6. KEY2,
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};
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static const esp_efuse_desc_t RD_DIS_KEY3[] = {
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{EFUSE_BLK0, 35, 1}, // Read protection for EFUSE_BLK7. KEY3,
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};
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static const esp_efuse_desc_t RD_DIS_KEY4[] = {
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{EFUSE_BLK0, 36, 1}, // Read protection for EFUSE_BLK8. KEY4,
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};
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static const esp_efuse_desc_t RD_DIS_KEY5[] = {
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{EFUSE_BLK0, 37, 1}, // Read protection for EFUSE_BLK9. KEY5,
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};
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static const esp_efuse_desc_t RD_DIS_SYS_DATA_PART2[] = {
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{EFUSE_BLK0, 38, 1}, // Read protection for EFUSE_BLK10. SYS_DATA_PART2,
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};
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static const esp_efuse_desc_t DIS_RTC_RAM_BOOT[] = {
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{EFUSE_BLK0, 39, 1}, // Disable boot from RTC RAM,
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};
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static const esp_efuse_desc_t DIS_ICACHE[] = {
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{EFUSE_BLK0, 40, 1}, // Disable Icache,
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};
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static const esp_efuse_desc_t DIS_USB_JTAG[] = {
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{EFUSE_BLK0, 41, 1}, // Disable USB JTAG,
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};
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static const esp_efuse_desc_t DIS_DOWNLOAD_ICACHE[] = {
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{EFUSE_BLK0, 42, 1}, // Disable Icache in download mode,
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};
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static const esp_efuse_desc_t DIS_USB_DEVICE[] = {
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{EFUSE_BLK0, 43, 1}, // Disable USB_DEVICE,
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};
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static const esp_efuse_desc_t DIS_FORCE_DOWNLOAD[] = {
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{EFUSE_BLK0, 44, 1}, // Disable force chip go to download mode function,
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};
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static const esp_efuse_desc_t DIS_USB[] = {
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{EFUSE_BLK0, 45, 1}, // Disable USB function,
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};
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static const esp_efuse_desc_t DIS_CAN[] = {
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{EFUSE_BLK0, 46, 1}, // Disable CAN function,
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};
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static const esp_efuse_desc_t JTAG_SEL_ENABLE[] = {
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{EFUSE_BLK0, 47, 1}, // Set this bit to enable selection between usb_to_jtag and pad_to_jtag through strapping gpio10 when both reg_dis_usb_jtag and reg_dis_pad_jtag are equal to 0.,
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};
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static const esp_efuse_desc_t SOFT_DIS_JTAG[] = {
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{EFUSE_BLK0, 48, 2}, // Set these bits to disable JTAG in the soft way (odd number 1 means disable). JTAG can be enabled in HMAC module.,
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};
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static const esp_efuse_desc_t DIS_PAD_JTAG[] = {
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{EFUSE_BLK0, 51, 1}, // Disable JTAG in the hard way. JTAG is disabled permanently.,
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};
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static const esp_efuse_desc_t DIS_DOWNLOAD_MANUAL_ENCRYPT[] = {
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{EFUSE_BLK0, 52, 1}, // Disable flash encryption when in download boot modes.,
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};
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static const esp_efuse_desc_t USB_DREFH[] = {
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{EFUSE_BLK0, 53, 2}, // Controls single-end input threshold vrefh 1.76 V to 2 V with step of 80 mV stored in eFuse.,
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};
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static const esp_efuse_desc_t USB_DREFL[] = {
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{EFUSE_BLK0, 55, 2}, // Controls single-end input threshold vrefl 0.8 V to 1.04 V with step of 80 mV stored in eFuse.,
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};
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static const esp_efuse_desc_t USB_EXCHG_PINS[] = {
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{EFUSE_BLK0, 57, 1}, // Exchange D+ D- pins,
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};
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static const esp_efuse_desc_t VDD_SPI_AS_GPIO[] = {
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{EFUSE_BLK0, 58, 1}, // Set this bit to vdd spi pin function as gpio,
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};
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static const esp_efuse_desc_t BTLC_GPIO_ENABLE[] = {
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{EFUSE_BLK0, 59, 2}, // Enable btlc gpio,
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};
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static const esp_efuse_desc_t POWERGLITCH_EN[] = {
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{EFUSE_BLK0, 61, 1}, // Set this bit to enable power glitch function,
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};
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static const esp_efuse_desc_t POWER_GLITCH_DSENSE[] = {
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{EFUSE_BLK0, 62, 2}, // Sample delay configuration of power glitch,
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};
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static const esp_efuse_desc_t WDT_DELAY_SEL[] = {
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{EFUSE_BLK0, 80, 2}, // Select RTC WDT time out threshold,
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};
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static const esp_efuse_desc_t SPI_BOOT_CRYPT_CNT[] = {
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{EFUSE_BLK0, 82, 3}, // SPI boot encrypt decrypt enable. odd number 1 enable. even number 1 disable,
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};
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static const esp_efuse_desc_t SECURE_BOOT_KEY_REVOKE0[] = {
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{EFUSE_BLK0, 85, 1}, // Enable revoke first secure boot key,
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};
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static const esp_efuse_desc_t SECURE_BOOT_KEY_REVOKE1[] = {
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{EFUSE_BLK0, 86, 1}, // Enable revoke second secure boot key,
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};
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static const esp_efuse_desc_t SECURE_BOOT_KEY_REVOKE2[] = {
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{EFUSE_BLK0, 87, 1}, // Enable revoke third secure boot key,
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};
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static const esp_efuse_desc_t KEY_PURPOSE_0[] = {
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{EFUSE_BLK0, 88, 4}, // Key0 purpose,
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};
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static const esp_efuse_desc_t KEY_PURPOSE_1[] = {
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{EFUSE_BLK0, 92, 4}, // Key1 purpose,
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};
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static const esp_efuse_desc_t KEY_PURPOSE_2[] = {
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{EFUSE_BLK0, 96, 4}, // Key2 purpose,
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};
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static const esp_efuse_desc_t KEY_PURPOSE_3[] = {
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{EFUSE_BLK0, 100, 4}, // Key3 purpose,
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};
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static const esp_efuse_desc_t KEY_PURPOSE_4[] = {
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{EFUSE_BLK0, 104, 4}, // Key4 purpose,
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};
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static const esp_efuse_desc_t KEY_PURPOSE_5[] = {
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{EFUSE_BLK0, 108, 4}, // Key5 purpose,
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};
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static const esp_efuse_desc_t SECURE_BOOT_EN[] = {
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{EFUSE_BLK0, 116, 1}, // Secure boot enable,
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};
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static const esp_efuse_desc_t SECURE_BOOT_AGGRESSIVE_REVOKE[] = {
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{EFUSE_BLK0, 117, 1}, // Enable aggressive secure boot revoke,
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};
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static const esp_efuse_desc_t FLASH_TPUW[] = {
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{EFUSE_BLK0, 124, 4}, // Flash wait time after power up. (unit is ms). When value is 15. the time is 30 ms,
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};
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static const esp_efuse_desc_t DIS_DOWNLOAD_MODE[] = {
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{EFUSE_BLK0, 128, 1}, // Disble download mode include boot_mode[3:0] is 0 1 2 3 6 7,
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};
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static const esp_efuse_desc_t DIS_LEGACY_SPI_BOOT[] = {
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{EFUSE_BLK0, 129, 1}, // Disable_Legcy_SPI_boot mode include boot_mode[3:0] is 4,
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};
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static const esp_efuse_desc_t UART_PRINT_CHANNEL[] = {
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{EFUSE_BLK0, 130, 1}, // 0: UART0. 1: UART1,
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};
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static const esp_efuse_desc_t FLASH_ECC_MODE[] = {
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{EFUSE_BLK0, 131, 1}, // Set this bit to set flsah ecc mode. 0:flash ecc 16to18 byte mode. 1:flash ecc 16to17 byte mode,
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};
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static const esp_efuse_desc_t DIS_USB_DOWNLOAD_MODE[] = {
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{EFUSE_BLK0, 132, 1}, // Disable download through USB,
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};
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static const esp_efuse_desc_t ENABLE_SECURITY_DOWNLOAD[] = {
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{EFUSE_BLK0, 133, 1}, // Enable security download mode,
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};
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static const esp_efuse_desc_t UART_PRINT_CONTROL[] = {
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{EFUSE_BLK0, 134, 2}, // b00:force print. b01:control by GPIO46 - low level print. b10:control by GPIO46 - high level print. b11:force disable print.,
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};
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static const esp_efuse_desc_t PIN_POWER_SELECTION[] = {
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{EFUSE_BLK0, 136, 1}, // GPIO33-GPIO37 power supply selection in ROM code. 0:VDD3P3_CPU. 1:VDD_SPI.,
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};
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static const esp_efuse_desc_t FLASH_TYPE[] = {
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{EFUSE_BLK0, 137, 1}, // Connected Flash interface type. 0: 4 data line. 1: 8 data line,
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};
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static const esp_efuse_desc_t FLASH_PAGE_SIZE[] = {
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{EFUSE_BLK0, 138, 2}, // Flash page size,
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};
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static const esp_efuse_desc_t FLASH_ECC_EN[] = {
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{EFUSE_BLK0, 140, 1}, // Enable ECC for flash boot,
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};
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static const esp_efuse_desc_t FORCE_SEND_RESUME[] = {
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{EFUSE_BLK0, 141, 1}, // Force ROM code to send a resume command during SPI boot,
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};
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static const esp_efuse_desc_t SECURE_VERSION[] = {
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{EFUSE_BLK0, 142, 16}, // Secure version for anti-rollback,
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};
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static const esp_efuse_desc_t MAC_FACTORY[] = {
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{EFUSE_BLK1, 40, 8}, // Factory MAC addr [0],
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{EFUSE_BLK1, 32, 8}, // Factory MAC addr [1],
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{EFUSE_BLK1, 24, 8}, // Factory MAC addr [2],
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{EFUSE_BLK1, 16, 8}, // Factory MAC addr [3],
|
||||
{EFUSE_BLK1, 8, 8}, // Factory MAC addr [4],
|
||||
{EFUSE_BLK1, 0, 8}, // Factory MAC addr [5],
|
||||
};
|
||||
|
||||
static const esp_efuse_desc_t SPI_PAD_CONFIG_CLK[] = {
|
||||
{EFUSE_BLK1, 48, 6}, // SPI_PAD_configure CLK,
|
||||
};
|
||||
|
||||
static const esp_efuse_desc_t SPI_PAD_CONFIG_Q_D1[] = {
|
||||
{EFUSE_BLK1, 54, 6}, // SPI_PAD_configure Q(D1),
|
||||
};
|
||||
|
||||
static const esp_efuse_desc_t SPI_PAD_CONFIG_D_D0[] = {
|
||||
{EFUSE_BLK1, 60, 6}, // SPI_PAD_configure D(D0),
|
||||
};
|
||||
|
||||
static const esp_efuse_desc_t SPI_PAD_CONFIG_CS[] = {
|
||||
{EFUSE_BLK1, 66, 6}, // SPI_PAD_configure CS,
|
||||
};
|
||||
|
||||
static const esp_efuse_desc_t SPI_PAD_CONFIG_HD_D3[] = {
|
||||
{EFUSE_BLK1, 72, 6}, // SPI_PAD_configure HD(D3),
|
||||
};
|
||||
|
||||
static const esp_efuse_desc_t SPI_PAD_CONFIG_WP_D2[] = {
|
||||
{EFUSE_BLK1, 78, 6}, // SPI_PAD_configure WP(D2),
|
||||
};
|
||||
|
||||
static const esp_efuse_desc_t SPI_PAD_CONFIG_DQS[] = {
|
||||
{EFUSE_BLK1, 84, 6}, // SPI_PAD_configure DQS,
|
||||
};
|
||||
|
||||
static const esp_efuse_desc_t SPI_PAD_CONFIG_D4[] = {
|
||||
{EFUSE_BLK1, 90, 6}, // SPI_PAD_configure D4,
|
||||
};
|
||||
|
||||
static const esp_efuse_desc_t SPI_PAD_CONFIG_D5[] = {
|
||||
{EFUSE_BLK1, 96, 6}, // SPI_PAD_configure D5,
|
||||
};
|
||||
|
||||
static const esp_efuse_desc_t SPI_PAD_CONFIG_D6[] = {
|
||||
{EFUSE_BLK1, 102, 6}, // SPI_PAD_configure D6,
|
||||
};
|
||||
|
||||
static const esp_efuse_desc_t SPI_PAD_CONFIG_D7[] = {
|
||||
{EFUSE_BLK1, 108, 6}, // SPI_PAD_configure D7,
|
||||
};
|
||||
|
||||
static const esp_efuse_desc_t SYS_DATA_PART1[] = {
|
||||
{EFUSE_BLK2, 0, 256}, // System configuration,
|
||||
};
|
||||
|
||||
static const esp_efuse_desc_t USER_DATA[] = {
|
||||
{EFUSE_BLK3, 0, 256}, // User data,
|
||||
};
|
||||
|
||||
static const esp_efuse_desc_t KEY0[] = {
|
||||
{EFUSE_BLK4, 0, 256}, // Key0 or user data,
|
||||
};
|
||||
|
||||
static const esp_efuse_desc_t KEY1[] = {
|
||||
{EFUSE_BLK5, 0, 256}, // Key1 or user data,
|
||||
};
|
||||
|
||||
static const esp_efuse_desc_t KEY2[] = {
|
||||
{EFUSE_BLK6, 0, 256}, // Key2 or user data,
|
||||
};
|
||||
|
||||
static const esp_efuse_desc_t KEY3[] = {
|
||||
{EFUSE_BLK7, 0, 256}, // Key3 or user data,
|
||||
};
|
||||
|
||||
static const esp_efuse_desc_t KEY4[] = {
|
||||
{EFUSE_BLK8, 0, 256}, // Key4 or user data,
|
||||
};
|
||||
|
||||
static const esp_efuse_desc_t KEY5[] = {
|
||||
{EFUSE_BLK9, 0, 256}, // Key5 or user data,
|
||||
};
|
||||
|
||||
static const esp_efuse_desc_t SYS_DATA_PART2[] = {
|
||||
{EFUSE_BLK10, 0, 256}, // System configuration,
|
||||
};
|
||||
|
||||
|
||||
|
||||
|
||||
|
||||
const esp_efuse_desc_t* ESP_EFUSE_WR_DIS_RD_DIS[] = {
|
||||
&WR_DIS_RD_DIS[0], // Write protection for RD_DIS_KEY0 RD_DIS_KEY1 RD_DIS_KEY2 RD_DIS_KEY3 RD_DIS_KEY4 RD_DIS_KEY5 RD_DIS_SYS_DATA_PART2
|
||||
NULL
|
||||
};
|
||||
|
||||
const esp_efuse_desc_t* ESP_EFUSE_WR_DIS_GROUP_1[] = {
|
||||
&WR_DIS_GROUP_1[0], // Write protection for DIS_ICACHE DIS_DOWNLOAD_ICACHE DIS_FORCE_DOWNLOAD DIS_USB DIS_CAN SOFT_DIS_JTAG DIS_DOWNLOAD_MANUAL_ENCRYPT
|
||||
NULL
|
||||
};
|
||||
|
||||
const esp_efuse_desc_t* ESP_EFUSE_WR_DIS_GROUP_2[] = {
|
||||
&WR_DIS_GROUP_2[0], // Write protection for WDT_DELAY_SEL
|
||||
NULL
|
||||
};
|
||||
|
||||
const esp_efuse_desc_t* ESP_EFUSE_WR_DIS_SPI_BOOT_CRYPT_CNT[] = {
|
||||
&WR_DIS_SPI_BOOT_CRYPT_CNT[0], // Write protection for SPI_BOOT_CRYPT_CNT
|
||||
NULL
|
||||
};
|
||||
|
||||
const esp_efuse_desc_t* ESP_EFUSE_WR_DIS_SECURE_BOOT_KEY_REVOKE0[] = {
|
||||
&WR_DIS_SECURE_BOOT_KEY_REVOKE0[0], // Write protection for SECURE_BOOT_KEY_REVOKE0
|
||||
NULL
|
||||
};
|
||||
|
||||
const esp_efuse_desc_t* ESP_EFUSE_WR_DIS_SECURE_BOOT_KEY_REVOKE1[] = {
|
||||
&WR_DIS_SECURE_BOOT_KEY_REVOKE1[0], // Write protection for SECURE_BOOT_KEY_REVOKE1
|
||||
NULL
|
||||
};
|
||||
|
||||
const esp_efuse_desc_t* ESP_EFUSE_WR_DIS_SECURE_BOOT_KEY_REVOKE2[] = {
|
||||
&WR_DIS_SECURE_BOOT_KEY_REVOKE2[0], // Write protection for SECURE_BOOT_KEY_REVOKE2
|
||||
NULL
|
||||
};
|
||||
|
||||
const esp_efuse_desc_t* ESP_EFUSE_WR_DIS_KEY0_PURPOSE[] = {
|
||||
&WR_DIS_KEY0_PURPOSE[0], // Write protection for key_purpose. KEY0
|
||||
NULL
|
||||
};
|
||||
|
||||
const esp_efuse_desc_t* ESP_EFUSE_WR_DIS_KEY1_PURPOSE[] = {
|
||||
&WR_DIS_KEY1_PURPOSE[0], // Write protection for key_purpose. KEY1
|
||||
NULL
|
||||
};
|
||||
|
||||
const esp_efuse_desc_t* ESP_EFUSE_WR_DIS_KEY2_PURPOSE[] = {
|
||||
&WR_DIS_KEY2_PURPOSE[0], // Write protection for key_purpose. KEY2
|
||||
NULL
|
||||
};
|
||||
|
||||
const esp_efuse_desc_t* ESP_EFUSE_WR_DIS_KEY3_PURPOSE[] = {
|
||||
&WR_DIS_KEY3_PURPOSE[0], // Write protection for key_purpose. KEY3
|
||||
NULL
|
||||
};
|
||||
|
||||
const esp_efuse_desc_t* ESP_EFUSE_WR_DIS_KEY4_PURPOSE[] = {
|
||||
&WR_DIS_KEY4_PURPOSE[0], // Write protection for key_purpose. KEY4
|
||||
NULL
|
||||
};
|
||||
|
||||
const esp_efuse_desc_t* ESP_EFUSE_WR_DIS_KEY5_PURPOSE[] = {
|
||||
&WR_DIS_KEY5_PURPOSE[0], // Write protection for key_purpose. KEY5
|
||||
NULL
|
||||
};
|
||||
|
||||
const esp_efuse_desc_t* ESP_EFUSE_WR_DIS_SECURE_BOOT_EN[] = {
|
||||
&WR_DIS_SECURE_BOOT_EN[0], // Write protection for SECURE_BOOT_EN
|
||||
NULL
|
||||
};
|
||||
|
||||
const esp_efuse_desc_t* ESP_EFUSE_WR_DIS_SECURE_BOOT_AGGRESSIVE_REVOKE[] = {
|
||||
&WR_DIS_SECURE_BOOT_AGGRESSIVE_REVOKE[0], // Write protection for SECURE_BOOT_AGGRESSIVE_REVOKE
|
||||
NULL
|
||||
};
|
||||
|
||||
const esp_efuse_desc_t* ESP_EFUSE_WR_DIS_GROUP_3[] = {
|
||||
&WR_DIS_GROUP_3[0], // Write protection for FLASH_TPUW DIS_DOWNLOAD_MODE DIS_LEGACY_SPI_BOOT UART_PRINT_CHANNEL DIS_TINY_BASIC DIS_USB_DOWNLOAD_MODE ENABLE_SECURITY_DOWNLOAD UART_PRINT_CONTROL PIN_POWER_SELECTION FLASH_TYPE FORCE_SEND_RESUME SECURE_VERSION
|
||||
NULL
|
||||
};
|
||||
|
||||
const esp_efuse_desc_t* ESP_EFUSE_WR_DIS_BLK1[] = {
|
||||
&WR_DIS_BLK1[0], // Write protection for EFUSE_BLK1. MAC_SPI_8M_SYS
|
||||
NULL
|
||||
};
|
||||
|
||||
const esp_efuse_desc_t* ESP_EFUSE_WR_DIS_SYS_DATA_PART1[] = {
|
||||
&WR_DIS_SYS_DATA_PART1[0], // Write protection for EFUSE_BLK2. SYS_DATA_PART1
|
||||
NULL
|
||||
};
|
||||
|
||||
const esp_efuse_desc_t* ESP_EFUSE_WR_DIS_USER_DATA[] = {
|
||||
&WR_DIS_USER_DATA[0], // Write protection for EFUSE_BLK3. USER_DATA
|
||||
NULL
|
||||
};
|
||||
|
||||
const esp_efuse_desc_t* ESP_EFUSE_WR_DIS_KEY0[] = {
|
||||
&WR_DIS_KEY0[0], // Write protection for EFUSE_BLK4. KEY0
|
||||
NULL
|
||||
};
|
||||
|
||||
const esp_efuse_desc_t* ESP_EFUSE_WR_DIS_KEY1[] = {
|
||||
&WR_DIS_KEY1[0], // Write protection for EFUSE_BLK5. KEY1
|
||||
NULL
|
||||
};
|
||||
|
||||
const esp_efuse_desc_t* ESP_EFUSE_WR_DIS_KEY2[] = {
|
||||
&WR_DIS_KEY2[0], // Write protection for EFUSE_BLK6. KEY2
|
||||
NULL
|
||||
};
|
||||
|
||||
const esp_efuse_desc_t* ESP_EFUSE_WR_DIS_KEY3[] = {
|
||||
&WR_DIS_KEY3[0], // Write protection for EFUSE_BLK7. KEY3
|
||||
NULL
|
||||
};
|
||||
|
||||
const esp_efuse_desc_t* ESP_EFUSE_WR_DIS_KEY4[] = {
|
||||
&WR_DIS_KEY4[0], // Write protection for EFUSE_BLK8. KEY4
|
||||
NULL
|
||||
};
|
||||
|
||||
const esp_efuse_desc_t* ESP_EFUSE_WR_DIS_KEY5[] = {
|
||||
&WR_DIS_KEY5[0], // Write protection for EFUSE_BLK9. KEY5
|
||||
NULL
|
||||
};
|
||||
|
||||
const esp_efuse_desc_t* ESP_EFUSE_WR_DIS_SYS_DATA_PART2[] = {
|
||||
&WR_DIS_SYS_DATA_PART2[0], // Write protection for EFUSE_BLK10. SYS_DATA_PART2
|
||||
NULL
|
||||
};
|
||||
|
||||
const esp_efuse_desc_t* ESP_EFUSE_RD_DIS_KEY0[] = {
|
||||
&RD_DIS_KEY0[0], // Read protection for EFUSE_BLK4. KEY0
|
||||
NULL
|
||||
};
|
||||
|
||||
const esp_efuse_desc_t* ESP_EFUSE_RD_DIS_KEY1[] = {
|
||||
&RD_DIS_KEY1[0], // Read protection for EFUSE_BLK5. KEY1
|
||||
NULL
|
||||
};
|
||||
|
||||
const esp_efuse_desc_t* ESP_EFUSE_RD_DIS_KEY2[] = {
|
||||
&RD_DIS_KEY2[0], // Read protection for EFUSE_BLK6. KEY2
|
||||
NULL
|
||||
};
|
||||
|
||||
const esp_efuse_desc_t* ESP_EFUSE_RD_DIS_KEY3[] = {
|
||||
&RD_DIS_KEY3[0], // Read protection for EFUSE_BLK7. KEY3
|
||||
NULL
|
||||
};
|
||||
|
||||
const esp_efuse_desc_t* ESP_EFUSE_RD_DIS_KEY4[] = {
|
||||
&RD_DIS_KEY4[0], // Read protection for EFUSE_BLK8. KEY4
|
||||
NULL
|
||||
};
|
||||
|
||||
const esp_efuse_desc_t* ESP_EFUSE_RD_DIS_KEY5[] = {
|
||||
&RD_DIS_KEY5[0], // Read protection for EFUSE_BLK9. KEY5
|
||||
NULL
|
||||
};
|
||||
|
||||
const esp_efuse_desc_t* ESP_EFUSE_RD_DIS_SYS_DATA_PART2[] = {
|
||||
&RD_DIS_SYS_DATA_PART2[0], // Read protection for EFUSE_BLK10. SYS_DATA_PART2
|
||||
NULL
|
||||
};
|
||||
|
||||
const esp_efuse_desc_t* ESP_EFUSE_DIS_RTC_RAM_BOOT[] = {
|
||||
&DIS_RTC_RAM_BOOT[0], // Disable boot from RTC RAM
|
||||
NULL
|
||||
};
|
||||
|
||||
const esp_efuse_desc_t* ESP_EFUSE_DIS_ICACHE[] = {
|
||||
&DIS_ICACHE[0], // Disable Icache
|
||||
NULL
|
||||
};
|
||||
|
||||
const esp_efuse_desc_t* ESP_EFUSE_DIS_USB_JTAG[] = {
|
||||
&DIS_USB_JTAG[0], // Disable USB JTAG
|
||||
NULL
|
||||
};
|
||||
|
||||
const esp_efuse_desc_t* ESP_EFUSE_DIS_DOWNLOAD_ICACHE[] = {
|
||||
&DIS_DOWNLOAD_ICACHE[0], // Disable Icache in download mode
|
||||
NULL
|
||||
};
|
||||
|
||||
const esp_efuse_desc_t* ESP_EFUSE_DIS_USB_DEVICE[] = {
|
||||
&DIS_USB_DEVICE[0], // Disable USB_DEVICE
|
||||
NULL
|
||||
};
|
||||
|
||||
const esp_efuse_desc_t* ESP_EFUSE_DIS_FORCE_DOWNLOAD[] = {
|
||||
&DIS_FORCE_DOWNLOAD[0], // Disable force chip go to download mode function
|
||||
NULL
|
||||
};
|
||||
|
||||
const esp_efuse_desc_t* ESP_EFUSE_DIS_USB[] = {
|
||||
&DIS_USB[0], // Disable USB function
|
||||
NULL
|
||||
};
|
||||
|
||||
const esp_efuse_desc_t* ESP_EFUSE_DIS_CAN[] = {
|
||||
&DIS_CAN[0], // Disable CAN function
|
||||
NULL
|
||||
};
|
||||
|
||||
const esp_efuse_desc_t* ESP_EFUSE_JTAG_SEL_ENABLE[] = {
|
||||
&JTAG_SEL_ENABLE[0], // Set this bit to enable selection between usb_to_jtag and pad_to_jtag through strapping gpio10 when both reg_dis_usb_jtag and reg_dis_pad_jtag are equal to 0.
|
||||
NULL
|
||||
};
|
||||
|
||||
const esp_efuse_desc_t* ESP_EFUSE_SOFT_DIS_JTAG[] = {
|
||||
&SOFT_DIS_JTAG[0], // Set these bits to disable JTAG in the soft way (odd number 1 means disable). JTAG can be enabled in HMAC module.
|
||||
NULL
|
||||
};
|
||||
|
||||
const esp_efuse_desc_t* ESP_EFUSE_DIS_PAD_JTAG[] = {
|
||||
&DIS_PAD_JTAG[0], // Disable JTAG in the hard way. JTAG is disabled permanently.
|
||||
NULL
|
||||
};
|
||||
|
||||
const esp_efuse_desc_t* ESP_EFUSE_DIS_DOWNLOAD_MANUAL_ENCRYPT[] = {
|
||||
&DIS_DOWNLOAD_MANUAL_ENCRYPT[0], // Disable flash encryption when in download boot modes.
|
||||
NULL
|
||||
};
|
||||
|
||||
const esp_efuse_desc_t* ESP_EFUSE_USB_DREFH[] = {
|
||||
&USB_DREFH[0], // Controls single-end input threshold vrefh 1.76 V to 2 V with step of 80 mV stored in eFuse.
|
||||
NULL
|
||||
};
|
||||
|
||||
const esp_efuse_desc_t* ESP_EFUSE_USB_DREFL[] = {
|
||||
&USB_DREFL[0], // Controls single-end input threshold vrefl 0.8 V to 1.04 V with step of 80 mV stored in eFuse.
|
||||
NULL
|
||||
};
|
||||
|
||||
const esp_efuse_desc_t* ESP_EFUSE_USB_EXCHG_PINS[] = {
|
||||
&USB_EXCHG_PINS[0], // Exchange D+ D- pins
|
||||
NULL
|
||||
};
|
||||
|
||||
const esp_efuse_desc_t* ESP_EFUSE_VDD_SPI_AS_GPIO[] = {
|
||||
&VDD_SPI_AS_GPIO[0], // Set this bit to vdd spi pin function as gpio
|
||||
NULL
|
||||
};
|
||||
|
||||
const esp_efuse_desc_t* ESP_EFUSE_BTLC_GPIO_ENABLE[] = {
|
||||
&BTLC_GPIO_ENABLE[0], // Enable btlc gpio
|
||||
NULL
|
||||
};
|
||||
|
||||
const esp_efuse_desc_t* ESP_EFUSE_POWERGLITCH_EN[] = {
|
||||
&POWERGLITCH_EN[0], // Set this bit to enable power glitch function
|
||||
NULL
|
||||
};
|
||||
|
||||
const esp_efuse_desc_t* ESP_EFUSE_POWER_GLITCH_DSENSE[] = {
|
||||
&POWER_GLITCH_DSENSE[0], // Sample delay configuration of power glitch
|
||||
NULL
|
||||
};
|
||||
|
||||
const esp_efuse_desc_t* ESP_EFUSE_WDT_DELAY_SEL[] = {
|
||||
&WDT_DELAY_SEL[0], // Select RTC WDT time out threshold
|
||||
NULL
|
||||
};
|
||||
|
||||
const esp_efuse_desc_t* ESP_EFUSE_SPI_BOOT_CRYPT_CNT[] = {
|
||||
&SPI_BOOT_CRYPT_CNT[0], // SPI boot encrypt decrypt enable. odd number 1 enable. even number 1 disable
|
||||
NULL
|
||||
};
|
||||
|
||||
const esp_efuse_desc_t* ESP_EFUSE_SECURE_BOOT_KEY_REVOKE0[] = {
|
||||
&SECURE_BOOT_KEY_REVOKE0[0], // Enable revoke first secure boot key
|
||||
NULL
|
||||
};
|
||||
|
||||
const esp_efuse_desc_t* ESP_EFUSE_SECURE_BOOT_KEY_REVOKE1[] = {
|
||||
&SECURE_BOOT_KEY_REVOKE1[0], // Enable revoke second secure boot key
|
||||
NULL
|
||||
};
|
||||
|
||||
const esp_efuse_desc_t* ESP_EFUSE_SECURE_BOOT_KEY_REVOKE2[] = {
|
||||
&SECURE_BOOT_KEY_REVOKE2[0], // Enable revoke third secure boot key
|
||||
NULL
|
||||
};
|
||||
|
||||
const esp_efuse_desc_t* ESP_EFUSE_KEY_PURPOSE_0[] = {
|
||||
&KEY_PURPOSE_0[0], // Key0 purpose
|
||||
NULL
|
||||
};
|
||||
|
||||
const esp_efuse_desc_t* ESP_EFUSE_KEY_PURPOSE_1[] = {
|
||||
&KEY_PURPOSE_1[0], // Key1 purpose
|
||||
NULL
|
||||
};
|
||||
|
||||
const esp_efuse_desc_t* ESP_EFUSE_KEY_PURPOSE_2[] = {
|
||||
&KEY_PURPOSE_2[0], // Key2 purpose
|
||||
NULL
|
||||
};
|
||||
|
||||
const esp_efuse_desc_t* ESP_EFUSE_KEY_PURPOSE_3[] = {
|
||||
&KEY_PURPOSE_3[0], // Key3 purpose
|
||||
NULL
|
||||
};
|
||||
|
||||
const esp_efuse_desc_t* ESP_EFUSE_KEY_PURPOSE_4[] = {
|
||||
&KEY_PURPOSE_4[0], // Key4 purpose
|
||||
NULL
|
||||
};
|
||||
|
||||
const esp_efuse_desc_t* ESP_EFUSE_KEY_PURPOSE_5[] = {
|
||||
&KEY_PURPOSE_5[0], // Key5 purpose
|
||||
NULL
|
||||
};
|
||||
|
||||
const esp_efuse_desc_t* ESP_EFUSE_SECURE_BOOT_EN[] = {
|
||||
&SECURE_BOOT_EN[0], // Secure boot enable
|
||||
NULL
|
||||
};
|
||||
|
||||
const esp_efuse_desc_t* ESP_EFUSE_SECURE_BOOT_AGGRESSIVE_REVOKE[] = {
|
||||
&SECURE_BOOT_AGGRESSIVE_REVOKE[0], // Enable aggressive secure boot revoke
|
||||
NULL
|
||||
};
|
||||
|
||||
const esp_efuse_desc_t* ESP_EFUSE_FLASH_TPUW[] = {
|
||||
&FLASH_TPUW[0], // Flash wait time after power up. (unit is ms). When value is 15. the time is 30 ms
|
||||
NULL
|
||||
};
|
||||
|
||||
const esp_efuse_desc_t* ESP_EFUSE_DIS_DOWNLOAD_MODE[] = {
|
||||
&DIS_DOWNLOAD_MODE[0], // Disble download mode include boot_mode[3:0] is 0 1 2 3 6 7
|
||||
NULL
|
||||
};
|
||||
|
||||
const esp_efuse_desc_t* ESP_EFUSE_DIS_LEGACY_SPI_BOOT[] = {
|
||||
&DIS_LEGACY_SPI_BOOT[0], // Disable_Legcy_SPI_boot mode include boot_mode[3:0] is 4
|
||||
NULL
|
||||
};
|
||||
|
||||
const esp_efuse_desc_t* ESP_EFUSE_UART_PRINT_CHANNEL[] = {
|
||||
&UART_PRINT_CHANNEL[0], // 0: UART0. 1: UART1
|
||||
NULL
|
||||
};
|
||||
|
||||
const esp_efuse_desc_t* ESP_EFUSE_FLASH_ECC_MODE[] = {
|
||||
&FLASH_ECC_MODE[0], // Set this bit to set flsah ecc mode. 0:flash ecc 16to18 byte mode. 1:flash ecc 16to17 byte mode
|
||||
NULL
|
||||
};
|
||||
|
||||
const esp_efuse_desc_t* ESP_EFUSE_DIS_USB_DOWNLOAD_MODE[] = {
|
||||
&DIS_USB_DOWNLOAD_MODE[0], // Disable download through USB
|
||||
NULL
|
||||
};
|
||||
|
||||
const esp_efuse_desc_t* ESP_EFUSE_ENABLE_SECURITY_DOWNLOAD[] = {
|
||||
&ENABLE_SECURITY_DOWNLOAD[0], // Enable security download mode
|
||||
NULL
|
||||
};
|
||||
|
||||
const esp_efuse_desc_t* ESP_EFUSE_UART_PRINT_CONTROL[] = {
|
||||
&UART_PRINT_CONTROL[0], // b00:force print. b01:control by GPIO46 - low level print. b10:control by GPIO46 - high level print. b11:force disable print.
|
||||
NULL
|
||||
};
|
||||
|
||||
const esp_efuse_desc_t* ESP_EFUSE_PIN_POWER_SELECTION[] = {
|
||||
&PIN_POWER_SELECTION[0], // GPIO33-GPIO37 power supply selection in ROM code. 0:VDD3P3_CPU. 1:VDD_SPI.
|
||||
NULL
|
||||
};
|
||||
|
||||
const esp_efuse_desc_t* ESP_EFUSE_FLASH_TYPE[] = {
|
||||
&FLASH_TYPE[0], // Connected Flash interface type. 0: 4 data line. 1: 8 data line
|
||||
NULL
|
||||
};
|
||||
|
||||
const esp_efuse_desc_t* ESP_EFUSE_FLASH_PAGE_SIZE[] = {
|
||||
&FLASH_PAGE_SIZE[0], // Flash page size
|
||||
NULL
|
||||
};
|
||||
|
||||
const esp_efuse_desc_t* ESP_EFUSE_FLASH_ECC_EN[] = {
|
||||
&FLASH_ECC_EN[0], // Enable ECC for flash boot
|
||||
NULL
|
||||
};
|
||||
|
||||
const esp_efuse_desc_t* ESP_EFUSE_FORCE_SEND_RESUME[] = {
|
||||
&FORCE_SEND_RESUME[0], // Force ROM code to send a resume command during SPI boot
|
||||
NULL
|
||||
};
|
||||
|
||||
const esp_efuse_desc_t* ESP_EFUSE_SECURE_VERSION[] = {
|
||||
&SECURE_VERSION[0], // Secure version for anti-rollback
|
||||
NULL
|
||||
};
|
||||
|
||||
const esp_efuse_desc_t* ESP_EFUSE_MAC_FACTORY[] = {
|
||||
&MAC_FACTORY[0], // Factory MAC addr [0]
|
||||
&MAC_FACTORY[1], // Factory MAC addr [1]
|
||||
&MAC_FACTORY[2], // Factory MAC addr [2]
|
||||
&MAC_FACTORY[3], // Factory MAC addr [3]
|
||||
&MAC_FACTORY[4], // Factory MAC addr [4]
|
||||
&MAC_FACTORY[5], // Factory MAC addr [5]
|
||||
NULL
|
||||
};
|
||||
|
||||
const esp_efuse_desc_t* ESP_EFUSE_SPI_PAD_CONFIG_CLK[] = {
|
||||
&SPI_PAD_CONFIG_CLK[0], // SPI_PAD_configure CLK
|
||||
NULL
|
||||
};
|
||||
|
||||
const esp_efuse_desc_t* ESP_EFUSE_SPI_PAD_CONFIG_Q_D1[] = {
|
||||
&SPI_PAD_CONFIG_Q_D1[0], // SPI_PAD_configure Q(D1)
|
||||
NULL
|
||||
};
|
||||
|
||||
const esp_efuse_desc_t* ESP_EFUSE_SPI_PAD_CONFIG_D_D0[] = {
|
||||
&SPI_PAD_CONFIG_D_D0[0], // SPI_PAD_configure D(D0)
|
||||
NULL
|
||||
};
|
||||
|
||||
const esp_efuse_desc_t* ESP_EFUSE_SPI_PAD_CONFIG_CS[] = {
|
||||
&SPI_PAD_CONFIG_CS[0], // SPI_PAD_configure CS
|
||||
NULL
|
||||
};
|
||||
|
||||
const esp_efuse_desc_t* ESP_EFUSE_SPI_PAD_CONFIG_HD_D3[] = {
|
||||
&SPI_PAD_CONFIG_HD_D3[0], // SPI_PAD_configure HD(D3)
|
||||
NULL
|
||||
};
|
||||
|
||||
const esp_efuse_desc_t* ESP_EFUSE_SPI_PAD_CONFIG_WP_D2[] = {
|
||||
&SPI_PAD_CONFIG_WP_D2[0], // SPI_PAD_configure WP(D2)
|
||||
NULL
|
||||
};
|
||||
|
||||
const esp_efuse_desc_t* ESP_EFUSE_SPI_PAD_CONFIG_DQS[] = {
|
||||
&SPI_PAD_CONFIG_DQS[0], // SPI_PAD_configure DQS
|
||||
NULL
|
||||
};
|
||||
|
||||
const esp_efuse_desc_t* ESP_EFUSE_SPI_PAD_CONFIG_D4[] = {
|
||||
&SPI_PAD_CONFIG_D4[0], // SPI_PAD_configure D4
|
||||
NULL
|
||||
};
|
||||
|
||||
const esp_efuse_desc_t* ESP_EFUSE_SPI_PAD_CONFIG_D5[] = {
|
||||
&SPI_PAD_CONFIG_D5[0], // SPI_PAD_configure D5
|
||||
NULL
|
||||
};
|
||||
|
||||
const esp_efuse_desc_t* ESP_EFUSE_SPI_PAD_CONFIG_D6[] = {
|
||||
&SPI_PAD_CONFIG_D6[0], // SPI_PAD_configure D6
|
||||
NULL
|
||||
};
|
||||
|
||||
const esp_efuse_desc_t* ESP_EFUSE_SPI_PAD_CONFIG_D7[] = {
|
||||
&SPI_PAD_CONFIG_D7[0], // SPI_PAD_configure D7
|
||||
NULL
|
||||
};
|
||||
|
||||
const esp_efuse_desc_t* ESP_EFUSE_SYS_DATA_PART1[] = {
|
||||
&SYS_DATA_PART1[0], // System configuration
|
||||
NULL
|
||||
};
|
||||
|
||||
const esp_efuse_desc_t* ESP_EFUSE_USER_DATA[] = {
|
||||
&USER_DATA[0], // User data
|
||||
NULL
|
||||
};
|
||||
|
||||
const esp_efuse_desc_t* ESP_EFUSE_KEY0[] = {
|
||||
&KEY0[0], // Key0 or user data
|
||||
NULL
|
||||
};
|
||||
|
||||
const esp_efuse_desc_t* ESP_EFUSE_KEY1[] = {
|
||||
&KEY1[0], // Key1 or user data
|
||||
NULL
|
||||
};
|
||||
|
||||
const esp_efuse_desc_t* ESP_EFUSE_KEY2[] = {
|
||||
&KEY2[0], // Key2 or user data
|
||||
NULL
|
||||
};
|
||||
|
||||
const esp_efuse_desc_t* ESP_EFUSE_KEY3[] = {
|
||||
&KEY3[0], // Key3 or user data
|
||||
NULL
|
||||
};
|
||||
|
||||
const esp_efuse_desc_t* ESP_EFUSE_KEY4[] = {
|
||||
&KEY4[0], // Key4 or user data
|
||||
NULL
|
||||
};
|
||||
|
||||
const esp_efuse_desc_t* ESP_EFUSE_KEY5[] = {
|
||||
&KEY5[0], // Key5 or user data
|
||||
NULL
|
||||
};
|
||||
|
||||
const esp_efuse_desc_t* ESP_EFUSE_SYS_DATA_PART2[] = {
|
||||
&SYS_DATA_PART2[0], // System configuration
|
||||
NULL
|
||||
};
|
||||
|
|
@ -0,0 +1,138 @@
|
|||
# field_name, | efuse_block, | bit_start, | bit_count, |comment #
|
||||
# | (EFUSE_BLK0 | (0..255) | (1..-) | #
|
||||
# | EFUSE_BLK1 | |MAX_BLK_LEN*| #
|
||||
# | ... | | | #
|
||||
# | EFUSE_BLK10)| | | #
|
||||
##########################################################################
|
||||
# *) The value MAX_BLK_LEN depends on CONFIG_EFUSE_MAX_BLK_LEN, will be replaced with "None" - 256. "3/4" - 192. "REPEAT" - 128.
|
||||
# !!!!!!!!!!! #
|
||||
# After editing this file, run the command manually "make efuse_common_table" or "idf.py efuse_common_table"
|
||||
# this will generate new source files, next rebuild all the sources.
|
||||
# !!!!!!!!!!! #
|
||||
|
||||
# EFUSE_RD_REPEAT_DATA BLOCK #
|
||||
##############################
|
||||
# EFUSE_RD_WR_DIS_REG #
|
||||
# EFUSE_WR_DIS [WR_DIS 0 32] #
|
||||
WR_DIS_RD_DIS, EFUSE_BLK0, 0, 1, Write protection for RD_DIS_KEY0 RD_DIS_KEY1 RD_DIS_KEY2 RD_DIS_KEY3 RD_DIS_KEY4 RD_DIS_KEY5 RD_DIS_SYS_DATA_PART2
|
||||
WR_DIS_GROUP_1, EFUSE_BLK0, 2, 1, Write protection for DIS_ICACHE DIS_DOWNLOAD_ICACHE DIS_FORCE_DOWNLOAD DIS_USB DIS_CAN SOFT_DIS_JTAG DIS_DOWNLOAD_MANUAL_ENCRYPT
|
||||
WR_DIS_GROUP_2, EFUSE_BLK0, 3, 1, Write protection for WDT_DELAY_SEL
|
||||
WR_DIS_SPI_BOOT_CRYPT_CNT, EFUSE_BLK0, 4, 1, Write protection for SPI_BOOT_CRYPT_CNT
|
||||
WR_DIS_SECURE_BOOT_KEY_REVOKE0,EFUSE_BLK0, 5, 1, Write protection for SECURE_BOOT_KEY_REVOKE0
|
||||
WR_DIS_SECURE_BOOT_KEY_REVOKE1,EFUSE_BLK0, 6, 1, Write protection for SECURE_BOOT_KEY_REVOKE1
|
||||
WR_DIS_SECURE_BOOT_KEY_REVOKE2,EFUSE_BLK0, 7, 1, Write protection for SECURE_BOOT_KEY_REVOKE2
|
||||
WR_DIS_KEY0_PURPOSE, EFUSE_BLK0, 8, 1, Write protection for key_purpose. KEY0
|
||||
WR_DIS_KEY1_PURPOSE, EFUSE_BLK0, 9, 1, Write protection for key_purpose. KEY1
|
||||
WR_DIS_KEY2_PURPOSE, EFUSE_BLK0, 10, 1, Write protection for key_purpose. KEY2
|
||||
WR_DIS_KEY3_PURPOSE, EFUSE_BLK0, 11, 1, Write protection for key_purpose. KEY3
|
||||
WR_DIS_KEY4_PURPOSE, EFUSE_BLK0, 12, 1, Write protection for key_purpose. KEY4
|
||||
WR_DIS_KEY5_PURPOSE, EFUSE_BLK0, 13, 1, Write protection for key_purpose. KEY5
|
||||
WR_DIS_SECURE_BOOT_EN, EFUSE_BLK0, 15, 1, Write protection for SECURE_BOOT_EN
|
||||
WR_DIS_SECURE_BOOT_AGGRESSIVE_REVOKE,EFUSE_BLK0, 16, 1, Write protection for SECURE_BOOT_AGGRESSIVE_REVOKE
|
||||
WR_DIS_GROUP_3, EFUSE_BLK0, 18, 1, Write protection for FLASH_TPUW DIS_DOWNLOAD_MODE DIS_LEGACY_SPI_BOOT UART_PRINT_CHANNEL DIS_TINY_BASIC DIS_USB_DOWNLOAD_MODE ENABLE_SECURITY_DOWNLOAD UART_PRINT_CONTROL PIN_POWER_SELECTION FLASH_TYPE FORCE_SEND_RESUME SECURE_VERSION
|
||||
WR_DIS_BLK1, EFUSE_BLK0, 20, 1, Write protection for EFUSE_BLK1. MAC_SPI_8M_SYS
|
||||
WR_DIS_SYS_DATA_PART1, EFUSE_BLK0, 21, 1, Write protection for EFUSE_BLK2. SYS_DATA_PART1
|
||||
WR_DIS_USER_DATA, EFUSE_BLK0, 22, 1, Write protection for EFUSE_BLK3. USER_DATA
|
||||
WR_DIS_KEY0, EFUSE_BLK0, 23, 1, Write protection for EFUSE_BLK4. KEY0
|
||||
WR_DIS_KEY1, EFUSE_BLK0, 24, 1, Write protection for EFUSE_BLK5. KEY1
|
||||
WR_DIS_KEY2, EFUSE_BLK0, 25, 1, Write protection for EFUSE_BLK6. KEY2
|
||||
WR_DIS_KEY3, EFUSE_BLK0, 26, 1, Write protection for EFUSE_BLK7. KEY3
|
||||
WR_DIS_KEY4, EFUSE_BLK0, 27, 1, Write protection for EFUSE_BLK8. KEY4
|
||||
WR_DIS_KEY5, EFUSE_BLK0, 28, 1, Write protection for EFUSE_BLK9. KEY5
|
||||
WR_DIS_SYS_DATA_PART2, EFUSE_BLK0, 29, 1, Write protection for EFUSE_BLK10. SYS_DATA_PART2
|
||||
|
||||
# EFUSE_RD_REPEAT_DATA0_REG #
|
||||
# [RD_DIS 0 7] #
|
||||
RD_DIS_KEY0, EFUSE_BLK0, 32, 1, Read protection for EFUSE_BLK4. KEY0
|
||||
RD_DIS_KEY1, EFUSE_BLK0, 33, 1, Read protection for EFUSE_BLK5. KEY1
|
||||
RD_DIS_KEY2, EFUSE_BLK0, 34, 1, Read protection for EFUSE_BLK6. KEY2
|
||||
RD_DIS_KEY3, EFUSE_BLK0, 35, 1, Read protection for EFUSE_BLK7. KEY3
|
||||
RD_DIS_KEY4, EFUSE_BLK0, 36, 1, Read protection for EFUSE_BLK8. KEY4
|
||||
RD_DIS_KEY5, EFUSE_BLK0, 37, 1, Read protection for EFUSE_BLK9. KEY5
|
||||
RD_DIS_SYS_DATA_PART2, EFUSE_BLK0, 38, 1, Read protection for EFUSE_BLK10. SYS_DATA_PART2
|
||||
DIS_RTC_RAM_BOOT, EFUSE_BLK0, 39, 1, Disable boot from RTC RAM
|
||||
DIS_ICACHE, EFUSE_BLK0, 40, 1, Disable Icache
|
||||
DIS_USB_JTAG, EFUSE_BLK0, 41, 1, Disable USB JTAG
|
||||
DIS_DOWNLOAD_ICACHE, EFUSE_BLK0, 42, 1, Disable Icache in download mode
|
||||
DIS_USB_DEVICE, EFUSE_BLK0, 43, 1, Disable USB_DEVICE
|
||||
DIS_FORCE_DOWNLOAD, EFUSE_BLK0, 44, 1, Disable force chip go to download mode function
|
||||
DIS_USB, EFUSE_BLK0, 45, 1, Disable USB function
|
||||
DIS_CAN, EFUSE_BLK0, 46, 1, Disable CAN function
|
||||
JTAG_SEL_ENABLE, EFUSE_BLK0, 47, 1, Set this bit to enable selection between usb_to_jtag and pad_to_jtag through strapping gpio10 when both reg_dis_usb_jtag and reg_dis_pad_jtag are equal to 0.
|
||||
SOFT_DIS_JTAG, EFUSE_BLK0, 48, 2, Set these bits to disable JTAG in the soft way (odd number 1 means disable). JTAG can be enabled in HMAC module.
|
||||
DIS_PAD_JTAG, EFUSE_BLK0, 51, 1, Disable JTAG in the hard way. JTAG is disabled permanently.
|
||||
DIS_DOWNLOAD_MANUAL_ENCRYPT, EFUSE_BLK0, 52, 1, Disable flash encryption when in download boot modes.
|
||||
USB_DREFH, EFUSE_BLK0, 53, 2, Controls single-end input threshold vrefh 1.76 V to 2 V with step of 80 mV stored in eFuse.
|
||||
USB_DREFL, EFUSE_BLK0, 55, 2, Controls single-end input threshold vrefl 0.8 V to 1.04 V with step of 80 mV stored in eFuse.
|
||||
USB_EXCHG_PINS, EFUSE_BLK0, 57, 1, Exchange D+ D- pins
|
||||
VDD_SPI_AS_GPIO, EFUSE_BLK0, 58, 1, Set this bit to vdd spi pin function as gpio
|
||||
BTLC_GPIO_ENABLE, EFUSE_BLK0, 59, 2, Enable btlc gpio
|
||||
POWERGLITCH_EN, EFUSE_BLK0, 61, 1, Set this bit to enable power glitch function
|
||||
POWER_GLITCH_DSENSE, EFUSE_BLK0, 62, 2, Sample delay configuration of power glitch
|
||||
|
||||
# EFUSE_RD_REPEAT_DATA1_REG #
|
||||
WDT_DELAY_SEL, EFUSE_BLK0, 80, 2, Select RTC WDT time out threshold
|
||||
SPI_BOOT_CRYPT_CNT, EFUSE_BLK0, 82, 3, SPI boot encrypt decrypt enable. odd number 1 enable. even number 1 disable
|
||||
SECURE_BOOT_KEY_REVOKE0, EFUSE_BLK0, 85, 1, Enable revoke first secure boot key
|
||||
SECURE_BOOT_KEY_REVOKE1, EFUSE_BLK0, 86, 1, Enable revoke second secure boot key
|
||||
SECURE_BOOT_KEY_REVOKE2, EFUSE_BLK0, 87, 1, Enable revoke third secure boot key
|
||||
KEY_PURPOSE_0, EFUSE_BLK0, 88, 4, Key0 purpose
|
||||
KEY_PURPOSE_1, EFUSE_BLK0, 92, 4, Key1 purpose
|
||||
|
||||
# EFUSE_RD_REPEAT_DATA2_REG #
|
||||
KEY_PURPOSE_2, EFUSE_BLK0, 96, 4, Key2 purpose
|
||||
KEY_PURPOSE_3, EFUSE_BLK0, 100, 4, Key3 purpose
|
||||
KEY_PURPOSE_4, EFUSE_BLK0, 104, 4, Key4 purpose
|
||||
KEY_PURPOSE_5, EFUSE_BLK0, 108, 4, Key5 purpose
|
||||
SECURE_BOOT_EN, EFUSE_BLK0, 116, 1, Secure boot enable
|
||||
SECURE_BOOT_AGGRESSIVE_REVOKE, EFUSE_BLK0, 117, 1, Enable aggressive secure boot revoke
|
||||
FLASH_TPUW, EFUSE_BLK0, 124, 4, Flash wait time after power up. (unit is ms). When value is 15. the time is 30 ms
|
||||
|
||||
# EFUSE_RD_REPEAT_DATA3_REG #
|
||||
DIS_DOWNLOAD_MODE, EFUSE_BLK0, 128, 1, Disble download mode include boot_mode[3:0] is 0 1 2 3 6 7
|
||||
DIS_LEGACY_SPI_BOOT, EFUSE_BLK0, 129, 1, Disable_Legcy_SPI_boot mode include boot_mode[3:0] is 4
|
||||
UART_PRINT_CHANNEL, EFUSE_BLK0, 130, 1, 0: UART0. 1: UART1
|
||||
FLASH_ECC_MODE, EFUSE_BLK0, 131, 1, Set this bit to set flsah ecc mode. 0:flash ecc 16to18 byte mode. 1:flash ecc 16to17 byte mode
|
||||
DIS_USB_DOWNLOAD_MODE, EFUSE_BLK0, 132, 1, Disable download through USB
|
||||
ENABLE_SECURITY_DOWNLOAD, EFUSE_BLK0, 133, 1, Enable security download mode
|
||||
UART_PRINT_CONTROL, EFUSE_BLK0, 134, 2, b00:force print. b01:control by GPIO46 - low level print. b10:control by GPIO46 - high level print. b11:force disable print.
|
||||
PIN_POWER_SELECTION, EFUSE_BLK0, 136, 1, GPIO33-GPIO37 power supply selection in ROM code. 0:VDD3P3_CPU. 1:VDD_SPI.
|
||||
FLASH_TYPE, EFUSE_BLK0, 137, 1, Connected Flash interface type. 0: 4 data line. 1: 8 data line
|
||||
FLASH_PAGE_SIZE, EFUSE_BLK0, 138, 2, Flash page size
|
||||
FLASH_ECC_EN, EFUSE_BLK0, 140, 1, Enable ECC for flash boot
|
||||
FORCE_SEND_RESUME, EFUSE_BLK0, 141, 1, Force ROM code to send a resume command during SPI boot
|
||||
SECURE_VERSION, EFUSE_BLK0, 142, 16, Secure version for anti-rollback
|
||||
|
||||
# EFUSE_RD_REPEAT_DATA4_REG #
|
||||
|
||||
|
||||
# MAC_SPI_SYS BLOCK#
|
||||
#######################
|
||||
MAC_FACTORY, EFUSE_BLK1, 40, 8, Factory MAC addr [0]
|
||||
, EFUSE_BLK1, 32, 8, Factory MAC addr [1]
|
||||
, EFUSE_BLK1, 24, 8, Factory MAC addr [2]
|
||||
, EFUSE_BLK1, 16, 8, Factory MAC addr [3]
|
||||
, EFUSE_BLK1, 8, 8, Factory MAC addr [4]
|
||||
, EFUSE_BLK1, 0, 8, Factory MAC addr [5]
|
||||
SPI_PAD_CONFIG_CLK, EFUSE_BLK1, 48, 6, SPI_PAD_configure CLK
|
||||
SPI_PAD_CONFIG_Q_D1, EFUSE_BLK1, 54, 6, SPI_PAD_configure Q(D1)
|
||||
SPI_PAD_CONFIG_D_D0, EFUSE_BLK1, 60, 6, SPI_PAD_configure D(D0)
|
||||
SPI_PAD_CONFIG_CS, EFUSE_BLK1, 66, 6, SPI_PAD_configure CS
|
||||
SPI_PAD_CONFIG_HD_D3, EFUSE_BLK1, 72, 6, SPI_PAD_configure HD(D3)
|
||||
SPI_PAD_CONFIG_WP_D2, EFUSE_BLK1, 78, 6, SPI_PAD_configure WP(D2)
|
||||
SPI_PAD_CONFIG_DQS, EFUSE_BLK1, 84, 6, SPI_PAD_configure DQS
|
||||
SPI_PAD_CONFIG_D4, EFUSE_BLK1, 90, 6, SPI_PAD_configure D4
|
||||
SPI_PAD_CONFIG_D5, EFUSE_BLK1, 96, 6, SPI_PAD_configure D5
|
||||
SPI_PAD_CONFIG_D6, EFUSE_BLK1, 102, 6, SPI_PAD_configure D6
|
||||
SPI_PAD_CONFIG_D7, EFUSE_BLK1, 108, 6, SPI_PAD_configure D7
|
||||
|
||||
################
|
||||
SYS_DATA_PART1, EFUSE_BLK2, 0, 256, System configuration
|
||||
USER_DATA, EFUSE_BLK3, 0, 256, User data
|
||||
KEY0, EFUSE_BLK4, 0, 256, Key0 or user data
|
||||
KEY1, EFUSE_BLK5, 0, 256, Key1 or user data
|
||||
KEY2, EFUSE_BLK6, 0, 256, Key2 or user data
|
||||
KEY3, EFUSE_BLK7, 0, 256, Key3 or user data
|
||||
KEY4, EFUSE_BLK8, 0, 256, Key4 or user data
|
||||
KEY5, EFUSE_BLK9, 0, 256, Key5 or user data
|
||||
SYS_DATA_PART2, EFUSE_BLK10, 0, 256, System configuration
|
||||
|
Nie można renderować tego pliku, ponieważ zawiera nieoczekiwany znak w wierszu 7 i kolumnie 87.
|
|
|
@ -0,0 +1,130 @@
|
|||
// Copyright 2017-2020 Espressif Systems (Shanghai) PTE LTD
|
||||
//
|
||||
// Licensed under the Apache License, Version 2.0 (the "License");
|
||||
// you may not use this file except in compliance with the License.
|
||||
// You may obtain a copy of the License at",
|
||||
//
|
||||
// http://www.apache.org/licenses/LICENSE-2.0
|
||||
//
|
||||
// Unless required by applicable law or agreed to in writing, software
|
||||
// distributed under the License is distributed on an "AS IS" BASIS,
|
||||
// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
|
||||
// See the License for the specific language governing permissions and
|
||||
// limitations under the License
|
||||
|
||||
#ifdef __cplusplus
|
||||
extern "C" {
|
||||
#endif
|
||||
|
||||
|
||||
// md5_digest_table 2c7ba2aa68a2748d3de9a5d1fed59b9f
|
||||
// This file was generated from the file esp_efuse_table.csv. DO NOT CHANGE THIS FILE MANUALLY.
|
||||
// If you want to change some fields, you need to change esp_efuse_table.csv file
|
||||
// then run `efuse_common_table` or `efuse_custom_table` command it will generate this file.
|
||||
// To show efuse_table run the command 'show_efuse_table'.
|
||||
|
||||
|
||||
extern const esp_efuse_desc_t* ESP_EFUSE_WR_DIS_RD_DIS[];
|
||||
extern const esp_efuse_desc_t* ESP_EFUSE_WR_DIS_GROUP_1[];
|
||||
extern const esp_efuse_desc_t* ESP_EFUSE_WR_DIS_GROUP_2[];
|
||||
extern const esp_efuse_desc_t* ESP_EFUSE_WR_DIS_SPI_BOOT_CRYPT_CNT[];
|
||||
extern const esp_efuse_desc_t* ESP_EFUSE_WR_DIS_SECURE_BOOT_KEY_REVOKE0[];
|
||||
extern const esp_efuse_desc_t* ESP_EFUSE_WR_DIS_SECURE_BOOT_KEY_REVOKE1[];
|
||||
extern const esp_efuse_desc_t* ESP_EFUSE_WR_DIS_SECURE_BOOT_KEY_REVOKE2[];
|
||||
extern const esp_efuse_desc_t* ESP_EFUSE_WR_DIS_KEY0_PURPOSE[];
|
||||
extern const esp_efuse_desc_t* ESP_EFUSE_WR_DIS_KEY1_PURPOSE[];
|
||||
extern const esp_efuse_desc_t* ESP_EFUSE_WR_DIS_KEY2_PURPOSE[];
|
||||
extern const esp_efuse_desc_t* ESP_EFUSE_WR_DIS_KEY3_PURPOSE[];
|
||||
extern const esp_efuse_desc_t* ESP_EFUSE_WR_DIS_KEY4_PURPOSE[];
|
||||
extern const esp_efuse_desc_t* ESP_EFUSE_WR_DIS_KEY5_PURPOSE[];
|
||||
extern const esp_efuse_desc_t* ESP_EFUSE_WR_DIS_SECURE_BOOT_EN[];
|
||||
extern const esp_efuse_desc_t* ESP_EFUSE_WR_DIS_SECURE_BOOT_AGGRESSIVE_REVOKE[];
|
||||
extern const esp_efuse_desc_t* ESP_EFUSE_WR_DIS_GROUP_3[];
|
||||
extern const esp_efuse_desc_t* ESP_EFUSE_WR_DIS_BLK1[];
|
||||
extern const esp_efuse_desc_t* ESP_EFUSE_WR_DIS_SYS_DATA_PART1[];
|
||||
extern const esp_efuse_desc_t* ESP_EFUSE_WR_DIS_USER_DATA[];
|
||||
extern const esp_efuse_desc_t* ESP_EFUSE_WR_DIS_KEY0[];
|
||||
extern const esp_efuse_desc_t* ESP_EFUSE_WR_DIS_KEY1[];
|
||||
extern const esp_efuse_desc_t* ESP_EFUSE_WR_DIS_KEY2[];
|
||||
extern const esp_efuse_desc_t* ESP_EFUSE_WR_DIS_KEY3[];
|
||||
extern const esp_efuse_desc_t* ESP_EFUSE_WR_DIS_KEY4[];
|
||||
extern const esp_efuse_desc_t* ESP_EFUSE_WR_DIS_KEY5[];
|
||||
extern const esp_efuse_desc_t* ESP_EFUSE_WR_DIS_SYS_DATA_PART2[];
|
||||
extern const esp_efuse_desc_t* ESP_EFUSE_RD_DIS_KEY0[];
|
||||
extern const esp_efuse_desc_t* ESP_EFUSE_RD_DIS_KEY1[];
|
||||
extern const esp_efuse_desc_t* ESP_EFUSE_RD_DIS_KEY2[];
|
||||
extern const esp_efuse_desc_t* ESP_EFUSE_RD_DIS_KEY3[];
|
||||
extern const esp_efuse_desc_t* ESP_EFUSE_RD_DIS_KEY4[];
|
||||
extern const esp_efuse_desc_t* ESP_EFUSE_RD_DIS_KEY5[];
|
||||
extern const esp_efuse_desc_t* ESP_EFUSE_RD_DIS_SYS_DATA_PART2[];
|
||||
extern const esp_efuse_desc_t* ESP_EFUSE_DIS_RTC_RAM_BOOT[];
|
||||
extern const esp_efuse_desc_t* ESP_EFUSE_DIS_ICACHE[];
|
||||
extern const esp_efuse_desc_t* ESP_EFUSE_DIS_USB_JTAG[];
|
||||
extern const esp_efuse_desc_t* ESP_EFUSE_DIS_DOWNLOAD_ICACHE[];
|
||||
extern const esp_efuse_desc_t* ESP_EFUSE_DIS_USB_DEVICE[];
|
||||
extern const esp_efuse_desc_t* ESP_EFUSE_DIS_FORCE_DOWNLOAD[];
|
||||
extern const esp_efuse_desc_t* ESP_EFUSE_DIS_USB[];
|
||||
extern const esp_efuse_desc_t* ESP_EFUSE_DIS_CAN[];
|
||||
extern const esp_efuse_desc_t* ESP_EFUSE_JTAG_SEL_ENABLE[];
|
||||
extern const esp_efuse_desc_t* ESP_EFUSE_SOFT_DIS_JTAG[];
|
||||
extern const esp_efuse_desc_t* ESP_EFUSE_DIS_PAD_JTAG[];
|
||||
extern const esp_efuse_desc_t* ESP_EFUSE_DIS_DOWNLOAD_MANUAL_ENCRYPT[];
|
||||
extern const esp_efuse_desc_t* ESP_EFUSE_USB_DREFH[];
|
||||
extern const esp_efuse_desc_t* ESP_EFUSE_USB_DREFL[];
|
||||
extern const esp_efuse_desc_t* ESP_EFUSE_USB_EXCHG_PINS[];
|
||||
extern const esp_efuse_desc_t* ESP_EFUSE_VDD_SPI_AS_GPIO[];
|
||||
extern const esp_efuse_desc_t* ESP_EFUSE_BTLC_GPIO_ENABLE[];
|
||||
extern const esp_efuse_desc_t* ESP_EFUSE_POWERGLITCH_EN[];
|
||||
extern const esp_efuse_desc_t* ESP_EFUSE_POWER_GLITCH_DSENSE[];
|
||||
extern const esp_efuse_desc_t* ESP_EFUSE_WDT_DELAY_SEL[];
|
||||
extern const esp_efuse_desc_t* ESP_EFUSE_SPI_BOOT_CRYPT_CNT[];
|
||||
extern const esp_efuse_desc_t* ESP_EFUSE_SECURE_BOOT_KEY_REVOKE0[];
|
||||
extern const esp_efuse_desc_t* ESP_EFUSE_SECURE_BOOT_KEY_REVOKE1[];
|
||||
extern const esp_efuse_desc_t* ESP_EFUSE_SECURE_BOOT_KEY_REVOKE2[];
|
||||
extern const esp_efuse_desc_t* ESP_EFUSE_KEY_PURPOSE_0[];
|
||||
extern const esp_efuse_desc_t* ESP_EFUSE_KEY_PURPOSE_1[];
|
||||
extern const esp_efuse_desc_t* ESP_EFUSE_KEY_PURPOSE_2[];
|
||||
extern const esp_efuse_desc_t* ESP_EFUSE_KEY_PURPOSE_3[];
|
||||
extern const esp_efuse_desc_t* ESP_EFUSE_KEY_PURPOSE_4[];
|
||||
extern const esp_efuse_desc_t* ESP_EFUSE_KEY_PURPOSE_5[];
|
||||
extern const esp_efuse_desc_t* ESP_EFUSE_SECURE_BOOT_EN[];
|
||||
extern const esp_efuse_desc_t* ESP_EFUSE_SECURE_BOOT_AGGRESSIVE_REVOKE[];
|
||||
extern const esp_efuse_desc_t* ESP_EFUSE_FLASH_TPUW[];
|
||||
extern const esp_efuse_desc_t* ESP_EFUSE_DIS_DOWNLOAD_MODE[];
|
||||
extern const esp_efuse_desc_t* ESP_EFUSE_DIS_LEGACY_SPI_BOOT[];
|
||||
extern const esp_efuse_desc_t* ESP_EFUSE_UART_PRINT_CHANNEL[];
|
||||
extern const esp_efuse_desc_t* ESP_EFUSE_FLASH_ECC_MODE[];
|
||||
extern const esp_efuse_desc_t* ESP_EFUSE_DIS_USB_DOWNLOAD_MODE[];
|
||||
extern const esp_efuse_desc_t* ESP_EFUSE_ENABLE_SECURITY_DOWNLOAD[];
|
||||
extern const esp_efuse_desc_t* ESP_EFUSE_UART_PRINT_CONTROL[];
|
||||
extern const esp_efuse_desc_t* ESP_EFUSE_PIN_POWER_SELECTION[];
|
||||
extern const esp_efuse_desc_t* ESP_EFUSE_FLASH_TYPE[];
|
||||
extern const esp_efuse_desc_t* ESP_EFUSE_FLASH_PAGE_SIZE[];
|
||||
extern const esp_efuse_desc_t* ESP_EFUSE_FLASH_ECC_EN[];
|
||||
extern const esp_efuse_desc_t* ESP_EFUSE_FORCE_SEND_RESUME[];
|
||||
extern const esp_efuse_desc_t* ESP_EFUSE_SECURE_VERSION[];
|
||||
extern const esp_efuse_desc_t* ESP_EFUSE_MAC_FACTORY[];
|
||||
extern const esp_efuse_desc_t* ESP_EFUSE_SPI_PAD_CONFIG_CLK[];
|
||||
extern const esp_efuse_desc_t* ESP_EFUSE_SPI_PAD_CONFIG_Q_D1[];
|
||||
extern const esp_efuse_desc_t* ESP_EFUSE_SPI_PAD_CONFIG_D_D0[];
|
||||
extern const esp_efuse_desc_t* ESP_EFUSE_SPI_PAD_CONFIG_CS[];
|
||||
extern const esp_efuse_desc_t* ESP_EFUSE_SPI_PAD_CONFIG_HD_D3[];
|
||||
extern const esp_efuse_desc_t* ESP_EFUSE_SPI_PAD_CONFIG_WP_D2[];
|
||||
extern const esp_efuse_desc_t* ESP_EFUSE_SPI_PAD_CONFIG_DQS[];
|
||||
extern const esp_efuse_desc_t* ESP_EFUSE_SPI_PAD_CONFIG_D4[];
|
||||
extern const esp_efuse_desc_t* ESP_EFUSE_SPI_PAD_CONFIG_D5[];
|
||||
extern const esp_efuse_desc_t* ESP_EFUSE_SPI_PAD_CONFIG_D6[];
|
||||
extern const esp_efuse_desc_t* ESP_EFUSE_SPI_PAD_CONFIG_D7[];
|
||||
extern const esp_efuse_desc_t* ESP_EFUSE_SYS_DATA_PART1[];
|
||||
extern const esp_efuse_desc_t* ESP_EFUSE_USER_DATA[];
|
||||
extern const esp_efuse_desc_t* ESP_EFUSE_KEY0[];
|
||||
extern const esp_efuse_desc_t* ESP_EFUSE_KEY1[];
|
||||
extern const esp_efuse_desc_t* ESP_EFUSE_KEY2[];
|
||||
extern const esp_efuse_desc_t* ESP_EFUSE_KEY3[];
|
||||
extern const esp_efuse_desc_t* ESP_EFUSE_KEY4[];
|
||||
extern const esp_efuse_desc_t* ESP_EFUSE_KEY5[];
|
||||
extern const esp_efuse_desc_t* ESP_EFUSE_SYS_DATA_PART2[];
|
||||
|
||||
#ifdef __cplusplus
|
||||
}
|
||||
#endif
|
||||
|
|
@ -0,0 +1 @@
|
|||
set(EFUSE_SOC_SRCS "esp_efuse_table.c")
|
||||
|
|
@ -0,0 +1,70 @@
|
|||
// Copyright 2020 Espressif Systems (Shanghai) PTE LTD
|
||||
//
|
||||
// Licensed under the Apache License, Version 2.0 (the "License");
|
||||
// you may not use this file except in compliance with the License.
|
||||
// You may obtain a copy of the License at
|
||||
//
|
||||
// http://www.apache.org/licenses/LICENSE-2.0
|
||||
//
|
||||
// Unless required by applicable law or agreed to in writing, software
|
||||
// distributed under the License is distributed on an "AS IS" BASIS,
|
||||
// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
|
||||
// See the License for the specific language governing permissions and
|
||||
// limitations under the License.
|
||||
|
||||
#pragma once
|
||||
|
||||
#ifdef __cplusplus
|
||||
extern "C" {
|
||||
#endif
|
||||
|
||||
/**
|
||||
* @brief Type of eFuse blocks ESP32C3
|
||||
*/
|
||||
typedef enum {
|
||||
EFUSE_BLK0 = 0, /**< Number of eFuse BLOCK0. REPEAT_DATA */
|
||||
|
||||
EFUSE_BLK1 = 1, /**< Number of eFuse BLOCK1. MAC_SPI_8M_SYS */
|
||||
|
||||
EFUSE_BLK2 = 2, /**< Number of eFuse BLOCK2. SYS_DATA_PART1 */
|
||||
EFUSE_BLK_SYS_DATA_PART1 = 2, /**< Number of eFuse BLOCK2. SYS_DATA_PART1 */
|
||||
|
||||
EFUSE_BLK3 = 3, /**< Number of eFuse BLOCK3. USER_DATA*/
|
||||
EFUSE_BLK_USER_DATA = 3, /**< Number of eFuse BLOCK3. USER_DATA*/
|
||||
|
||||
EFUSE_BLK4 = 4, /**< Number of eFuse BLOCK4. KEY0 */
|
||||
EFUSE_BLK_KEY0 = 4, /**< Number of eFuse BLOCK4. KEY0 */
|
||||
|
||||
EFUSE_BLK5 = 5, /**< Number of eFuse BLOCK5. KEY1 */
|
||||
EFUSE_BLK_KEY1 = 5, /**< Number of eFuse BLOCK5. KEY1 */
|
||||
|
||||
EFUSE_BLK6 = 6, /**< Number of eFuse BLOCK6. KEY2 */
|
||||
EFUSE_BLK_KEY2 = 6, /**< Number of eFuse BLOCK6. KEY2 */
|
||||
|
||||
EFUSE_BLK7 = 7, /**< Number of eFuse BLOCK7. KEY3 */
|
||||
EFUSE_BLK_KEY3 = 7, /**< Number of eFuse BLOCK7. KEY3 */
|
||||
|
||||
EFUSE_BLK8 = 8, /**< Number of eFuse BLOCK8. KEY4 */
|
||||
EFUSE_BLK_KEY4 = 8, /**< Number of eFuse BLOCK8. KEY4 */
|
||||
|
||||
EFUSE_BLK9 = 9, /**< Number of eFuse BLOCK9. KEY5 */
|
||||
EFUSE_BLK_KEY5 = 9, /**< Number of eFuse BLOCK9. KEY5 */
|
||||
EFUSE_BLK_KEY_MAX = 10,
|
||||
|
||||
EFUSE_BLK10 = 10, /**< Number of eFuse BLOCK10. SYS_DATA_PART2 */
|
||||
EFUSE_BLK_SYS_DATA_PART2 = 10, /**< Number of eFuse BLOCK10. SYS_DATA_PART2 */
|
||||
|
||||
EFUSE_BLK_MAX
|
||||
} esp_efuse_block_t;
|
||||
|
||||
/**
|
||||
* @brief Type of coding scheme
|
||||
*/
|
||||
typedef enum {
|
||||
EFUSE_CODING_SCHEME_NONE = 0, /**< None */
|
||||
EFUSE_CODING_SCHEME_RS = 3, /**< Reed-Solomon coding */
|
||||
} esp_efuse_coding_scheme_t;
|
||||
|
||||
#ifdef __cplusplus
|
||||
}
|
||||
#endif
|
||||
|
|
@ -0,0 +1,29 @@
|
|||
// Copyright 2020 Espressif Systems (Shanghai) PTE LTD
|
||||
//
|
||||
// Licensed under the Apache License, Version 2.0 (the "License");
|
||||
// you may not use this file except in compliance with the License.
|
||||
// You may obtain a copy of the License at
|
||||
//
|
||||
// http://www.apache.org/licenses/LICENSE-2.0
|
||||
//
|
||||
// Unless required by applicable law or agreed to in writing, software
|
||||
// distributed under the License is distributed on an "AS IS" BASIS,
|
||||
// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
|
||||
// See the License for the specific language governing permissions and
|
||||
// limitations under the License.
|
||||
|
||||
#pragma once
|
||||
|
||||
#ifdef __cplusplus
|
||||
extern "C" {
|
||||
#endif
|
||||
|
||||
#define COUNT_EFUSE_REG_PER_BLOCK 8 /* The number of registers per block. */
|
||||
|
||||
#define ESP_EFUSE_SECURE_VERSION_NUM_BLOCK EFUSE_BLK0
|
||||
|
||||
#define ESP_EFUSE_FIELD_CORRESPONDS_CODING_SCHEME(scheme, max_num_bit)
|
||||
|
||||
#ifdef __cplusplus
|
||||
}
|
||||
#endif
|
||||
|
|
@ -0,0 +1,83 @@
|
|||
// Copyright 2020 Espressif Systems (Shanghai) PTE LTD
|
||||
//
|
||||
// Licensed under the Apache License, Version 2.0 (the "License");
|
||||
// you may not use this file except in compliance with the License.
|
||||
// You may obtain a copy of the License at
|
||||
//
|
||||
// http://www.apache.org/licenses/LICENSE-2.0
|
||||
//
|
||||
// Unless required by applicable law or agreed to in writing, software
|
||||
// distributed under the License is distributed on an "AS IS" BASIS,
|
||||
// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
|
||||
// See the License for the specific language governing permissions and
|
||||
// limitations under the License.
|
||||
|
||||
#include "esp_efuse.h"
|
||||
#include "esp_efuse_utility.h"
|
||||
#include "soc/efuse_periph.h"
|
||||
#include "assert.h"
|
||||
#include "sdkconfig.h"
|
||||
#include "esp_efuse_table.h"
|
||||
|
||||
const static char *TAG = "efuse";
|
||||
|
||||
// Sets a write protection for the whole block.
|
||||
esp_err_t esp_efuse_set_write_protect(esp_efuse_block_t blk)
|
||||
{
|
||||
if (blk == EFUSE_BLK1) {
|
||||
return esp_efuse_write_field_cnt(ESP_EFUSE_WR_DIS_BLK1, 1);
|
||||
} else if (blk == EFUSE_BLK2) {
|
||||
return esp_efuse_write_field_cnt(ESP_EFUSE_WR_DIS_SYS_DATA_PART1, 1);
|
||||
} else if (blk == EFUSE_BLK3) {
|
||||
return esp_efuse_write_field_cnt(ESP_EFUSE_WR_DIS_USER_DATA, 1);
|
||||
} else if (blk == EFUSE_BLK4) {
|
||||
return esp_efuse_write_field_cnt(ESP_EFUSE_WR_DIS_KEY0, 1);
|
||||
} else if (blk == EFUSE_BLK5) {
|
||||
return esp_efuse_write_field_cnt(ESP_EFUSE_WR_DIS_KEY1, 1);
|
||||
} else if (blk == EFUSE_BLK6) {
|
||||
return esp_efuse_write_field_cnt(ESP_EFUSE_WR_DIS_KEY2, 1);
|
||||
} else if (blk == EFUSE_BLK7) {
|
||||
return esp_efuse_write_field_cnt(ESP_EFUSE_WR_DIS_KEY3, 1);
|
||||
} else if (blk == EFUSE_BLK8) {
|
||||
return esp_efuse_write_field_cnt(ESP_EFUSE_WR_DIS_KEY4, 1);
|
||||
} else if (blk == EFUSE_BLK9) {
|
||||
return esp_efuse_write_field_cnt(ESP_EFUSE_WR_DIS_KEY5, 1);
|
||||
} else if (blk == EFUSE_BLK10) {
|
||||
return esp_efuse_write_field_cnt(ESP_EFUSE_WR_DIS_SYS_DATA_PART2, 1);
|
||||
}
|
||||
return ESP_ERR_NOT_SUPPORTED;
|
||||
}
|
||||
|
||||
// read protect for blk.
|
||||
esp_err_t esp_efuse_set_read_protect(esp_efuse_block_t blk)
|
||||
{
|
||||
if (blk == EFUSE_BLK4) {
|
||||
return esp_efuse_write_field_cnt(ESP_EFUSE_RD_DIS_KEY0, 1);
|
||||
} else if (blk == EFUSE_BLK5) {
|
||||
return esp_efuse_write_field_cnt(ESP_EFUSE_RD_DIS_KEY1, 1);
|
||||
} else if (blk == EFUSE_BLK6) {
|
||||
return esp_efuse_write_field_cnt(ESP_EFUSE_RD_DIS_KEY2, 1);
|
||||
} else if (blk == EFUSE_BLK7) {
|
||||
return esp_efuse_write_field_cnt(ESP_EFUSE_RD_DIS_KEY3, 1);
|
||||
} else if (blk == EFUSE_BLK8) {
|
||||
return esp_efuse_write_field_cnt(ESP_EFUSE_RD_DIS_KEY4, 1);
|
||||
} else if (blk == EFUSE_BLK9) {
|
||||
return esp_efuse_write_field_cnt(ESP_EFUSE_RD_DIS_KEY5, 1);
|
||||
} else if (blk == EFUSE_BLK10) {
|
||||
return esp_efuse_write_field_cnt(ESP_EFUSE_RD_DIS_SYS_DATA_PART2, 1);
|
||||
}
|
||||
return ESP_ERR_NOT_SUPPORTED;
|
||||
}
|
||||
|
||||
// get efuse coding_scheme.
|
||||
esp_efuse_coding_scheme_t esp_efuse_get_coding_scheme(esp_efuse_block_t blk)
|
||||
{
|
||||
esp_efuse_coding_scheme_t scheme;
|
||||
if (blk == EFUSE_BLK0) {
|
||||
scheme = EFUSE_CODING_SCHEME_NONE;
|
||||
} else {
|
||||
scheme = EFUSE_CODING_SCHEME_RS;
|
||||
}
|
||||
ESP_LOGD(TAG, "coding scheme %d", scheme);
|
||||
return scheme;
|
||||
}
|
||||
|
|
@ -0,0 +1,73 @@
|
|||
// Copyright 2017-2020 Espressif Systems (Shanghai) PTE LTD
|
||||
//
|
||||
// Licensed under the Apache License, Version 2.0 (the "License");
|
||||
// you may not use this file except in compliance with the License.
|
||||
// You may obtain a copy of the License at
|
||||
//
|
||||
// http://www.apache.org/licenses/LICENSE-2.0
|
||||
//
|
||||
// Unless required by applicable law or agreed to in writing, software
|
||||
// distributed under the License is distributed on an "AS IS" BASIS,
|
||||
// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
|
||||
// See the License for the specific language governing permissions and
|
||||
// limitations under the License.
|
||||
|
||||
#include "esp_efuse.h"
|
||||
#include "esp_efuse_utility.h"
|
||||
#include "esp_efuse_table.h"
|
||||
#include "stdlib.h"
|
||||
#include "esp_types.h"
|
||||
#include "esp32c3/rom/efuse.h"
|
||||
#include "assert.h"
|
||||
#include "esp_err.h"
|
||||
#include "esp_log.h"
|
||||
#include "soc/efuse_periph.h"
|
||||
#include "bootloader_random.h"
|
||||
#include "sys/param.h"
|
||||
|
||||
const static char *TAG = "efuse";
|
||||
|
||||
// Contains functions that provide access to efuse fields which are often used in IDF.
|
||||
|
||||
// Returns chip version from efuse
|
||||
uint8_t esp_efuse_get_chip_ver(void)
|
||||
{
|
||||
uint32_t chip_ver = 0;
|
||||
// ESP32C3 does not have this field
|
||||
return chip_ver;
|
||||
}
|
||||
|
||||
// Returns chip package from efuse
|
||||
uint32_t esp_efuse_get_pkg_ver(void)
|
||||
{
|
||||
uint32_t pkg_ver = 0;
|
||||
// ESP32C3 does not have this field
|
||||
return pkg_ver;
|
||||
}
|
||||
|
||||
// Disable BASIC ROM Console via efuse
|
||||
void esp_efuse_disable_basic_rom_console(void)
|
||||
{
|
||||
uint8_t dis_legacy_spi_boot = 0;
|
||||
esp_efuse_read_field_blob(ESP_EFUSE_DIS_LEGACY_SPI_BOOT, &dis_legacy_spi_boot, 1);
|
||||
if (dis_legacy_spi_boot == 0) {
|
||||
esp_efuse_write_field_cnt(ESP_EFUSE_DIS_LEGACY_SPI_BOOT, 1);
|
||||
ESP_EARLY_LOGI(TAG, "Disable Disable_Legcy_SPI_boot mode...");
|
||||
}
|
||||
}
|
||||
|
||||
void esp_efuse_write_random_key(uint32_t blk_wdata0_reg)
|
||||
{
|
||||
uint32_t buf[8];
|
||||
uint8_t raw[24];
|
||||
|
||||
bootloader_fill_random(buf, sizeof(buf));
|
||||
|
||||
ESP_LOGV(TAG, "Writing random values to address 0x%08x", blk_wdata0_reg);
|
||||
for (int i = 0; i < 8; i++) {
|
||||
ESP_LOGV(TAG, "EFUSE_BLKx_WDATA%d_REG = 0x%08x", i, buf[i]);
|
||||
REG_WRITE(blk_wdata0_reg + 4 * i, buf[i]);
|
||||
}
|
||||
bzero(buf, sizeof(buf));
|
||||
bzero(raw, sizeof(raw));
|
||||
}
|
||||
|
|
@ -0,0 +1,139 @@
|
|||
// Copyright 2017-2020 Espressif Systems (Shanghai) PTE LTD
|
||||
//
|
||||
// Licensed under the Apache License, Version 2.0 (the "License");
|
||||
// you may not use this file except in compliance with the License.
|
||||
// You may obtain a copy of the License at
|
||||
//
|
||||
// http://www.apache.org/licenses/LICENSE-2.0
|
||||
//
|
||||
// Unless required by applicable law or agreed to in writing, software
|
||||
// distributed under the License is distributed on an "AS IS" BASIS,
|
||||
// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
|
||||
// See the License for the specific language governing permissions and
|
||||
// limitations under the License.
|
||||
|
||||
#include <sys/param.h>
|
||||
#include "sdkconfig.h"
|
||||
#include "esp_log.h"
|
||||
#include "assert.h"
|
||||
#include "esp_efuse_utility.h"
|
||||
#include "soc/efuse_periph.h"
|
||||
#include "esp32c3/clk.h"
|
||||
#include "esp32c3/rom/efuse.h"
|
||||
|
||||
static const char *TAG = "efuse";
|
||||
|
||||
#ifdef CONFIG_EFUSE_VIRTUAL
|
||||
extern uint32_t virt_blocks[EFUSE_BLK_MAX][COUNT_EFUSE_REG_PER_BLOCK];
|
||||
#endif // CONFIG_EFUSE_VIRTUAL
|
||||
|
||||
/*Range addresses to read blocks*/
|
||||
const esp_efuse_range_addr_t range_read_addr_blocks[] = {
|
||||
{EFUSE_RD_WR_DIS_REG, EFUSE_RD_REPEAT_DATA4_REG}, // range address of EFUSE_BLK0 REPEAT
|
||||
{EFUSE_RD_MAC_SPI_SYS_0_REG, EFUSE_RD_MAC_SPI_SYS_5_REG}, // range address of EFUSE_BLK1 MAC_SPI_8M
|
||||
{EFUSE_RD_SYS_PART1_DATA0_REG, EFUSE_RD_SYS_PART1_DATA7_REG}, // range address of EFUSE_BLK2 SYS_DATA
|
||||
{EFUSE_RD_USR_DATA0_REG, EFUSE_RD_USR_DATA7_REG}, // range address of EFUSE_BLK3 USR_DATA
|
||||
{EFUSE_RD_KEY0_DATA0_REG, EFUSE_RD_KEY0_DATA7_REG}, // range address of EFUSE_BLK4 KEY0
|
||||
{EFUSE_RD_KEY1_DATA0_REG, EFUSE_RD_KEY1_DATA7_REG}, // range address of EFUSE_BLK5 KEY1
|
||||
{EFUSE_RD_KEY2_DATA0_REG, EFUSE_RD_KEY2_DATA7_REG}, // range address of EFUSE_BLK6 KEY2
|
||||
{EFUSE_RD_KEY3_DATA0_REG, EFUSE_RD_KEY3_DATA7_REG}, // range address of EFUSE_BLK7 KEY3
|
||||
{EFUSE_RD_KEY4_DATA0_REG, EFUSE_RD_KEY4_DATA7_REG}, // range address of EFUSE_BLK8 KEY4
|
||||
{EFUSE_RD_KEY5_DATA0_REG, EFUSE_RD_KEY5_DATA7_REG}, // range address of EFUSE_BLK9 KEY5
|
||||
{EFUSE_RD_SYS_PART2_DATA0_REG, EFUSE_RD_SYS_PART2_DATA7_REG} // range address of EFUSE_BLK10 KEY6
|
||||
};
|
||||
|
||||
static uint32_t write_mass_blocks[EFUSE_BLK_MAX][COUNT_EFUSE_REG_PER_BLOCK] = { 0 };
|
||||
|
||||
/*Range addresses to write blocks (it is not real regs, it is buffer) */
|
||||
const esp_efuse_range_addr_t range_write_addr_blocks[] = {
|
||||
{(uint32_t) &write_mass_blocks[EFUSE_BLK0][0], (uint32_t) &write_mass_blocks[EFUSE_BLK0][5]},
|
||||
{(uint32_t) &write_mass_blocks[EFUSE_BLK1][0], (uint32_t) &write_mass_blocks[EFUSE_BLK1][5]},
|
||||
{(uint32_t) &write_mass_blocks[EFUSE_BLK2][0], (uint32_t) &write_mass_blocks[EFUSE_BLK2][7]},
|
||||
{(uint32_t) &write_mass_blocks[EFUSE_BLK3][0], (uint32_t) &write_mass_blocks[EFUSE_BLK3][7]},
|
||||
{(uint32_t) &write_mass_blocks[EFUSE_BLK4][0], (uint32_t) &write_mass_blocks[EFUSE_BLK4][7]},
|
||||
{(uint32_t) &write_mass_blocks[EFUSE_BLK5][0], (uint32_t) &write_mass_blocks[EFUSE_BLK5][7]},
|
||||
{(uint32_t) &write_mass_blocks[EFUSE_BLK6][0], (uint32_t) &write_mass_blocks[EFUSE_BLK6][7]},
|
||||
{(uint32_t) &write_mass_blocks[EFUSE_BLK7][0], (uint32_t) &write_mass_blocks[EFUSE_BLK7][7]},
|
||||
{(uint32_t) &write_mass_blocks[EFUSE_BLK8][0], (uint32_t) &write_mass_blocks[EFUSE_BLK8][7]},
|
||||
{(uint32_t) &write_mass_blocks[EFUSE_BLK9][0], (uint32_t) &write_mass_blocks[EFUSE_BLK9][7]},
|
||||
{(uint32_t) &write_mass_blocks[EFUSE_BLK10][0], (uint32_t) &write_mass_blocks[EFUSE_BLK10][7]},
|
||||
};
|
||||
|
||||
#ifndef CONFIG_EFUSE_VIRTUAL
|
||||
// Update Efuse timing configuration
|
||||
static esp_err_t esp_efuse_set_timing(void)
|
||||
{
|
||||
uint32_t clock_hz = esp_clk_apb_freq();
|
||||
return ets_efuse_set_timing(clock_hz) ? ESP_FAIL : ESP_OK;
|
||||
}
|
||||
#endif // ifndef CONFIG_EFUSE_VIRTUAL
|
||||
|
||||
// Efuse read operation: copies data from physical efuses to efuse read registers.
|
||||
void esp_efuse_utility_clear_program_registers(void)
|
||||
{
|
||||
ets_efuse_read();
|
||||
ets_efuse_clear_program_registers();
|
||||
}
|
||||
|
||||
// Burn values written to the efuse write registers
|
||||
void esp_efuse_utility_burn_efuses(void)
|
||||
{
|
||||
#ifdef CONFIG_EFUSE_VIRTUAL
|
||||
ESP_LOGW(TAG, "Virtual efuses enabled: Not really burning eFuses");
|
||||
for (int num_block = EFUSE_BLK_MAX - 1; num_block >= EFUSE_BLK0; num_block--) {
|
||||
int subblock = 0;
|
||||
for (uint32_t addr_wr_block = range_write_addr_blocks[num_block].start; addr_wr_block <= range_write_addr_blocks[num_block].end; addr_wr_block += 4) {
|
||||
virt_blocks[num_block][subblock++] |= REG_READ(addr_wr_block);
|
||||
}
|
||||
}
|
||||
#else
|
||||
if (esp_efuse_set_timing() != ESP_OK) {
|
||||
ESP_LOGE(TAG, "Efuse fields are not burnt");
|
||||
} else {
|
||||
// Permanently update values written to the efuse write registers
|
||||
// It is necessary to process blocks in the order from MAX-> EFUSE_BLK0, because EFUSE_BLK0 has protection bits for other blocks.
|
||||
for (int num_block = EFUSE_BLK_MAX - 1; num_block >= EFUSE_BLK0; num_block--) {
|
||||
for (uint32_t addr_wr_block = range_write_addr_blocks[num_block].start; addr_wr_block <= range_write_addr_blocks[num_block].end; addr_wr_block += 4) {
|
||||
if (REG_READ(addr_wr_block) != 0) {
|
||||
if (esp_efuse_get_coding_scheme(num_block) == EFUSE_CODING_SCHEME_RS) {
|
||||
uint8_t block_rs[12];
|
||||
ets_efuse_rs_calculate((void *)range_write_addr_blocks[num_block].start, block_rs);
|
||||
memcpy((void *)EFUSE_PGM_CHECK_VALUE0_REG, block_rs, sizeof(block_rs));
|
||||
}
|
||||
int data_len = (range_write_addr_blocks[num_block].end - range_write_addr_blocks[num_block].start) + sizeof(uint32_t);
|
||||
memcpy((void *)EFUSE_PGM_DATA0_REG, (void *)range_write_addr_blocks[num_block].start, data_len);
|
||||
ets_efuse_program(num_block);
|
||||
break;
|
||||
}
|
||||
}
|
||||
}
|
||||
}
|
||||
#endif // CONFIG_EFUSE_VIRTUAL
|
||||
esp_efuse_utility_reset();
|
||||
}
|
||||
|
||||
// After esp_efuse_write.. functions EFUSE_BLKx_WDATAx_REG were filled is not coded values.
|
||||
// This function reads EFUSE_BLKx_WDATAx_REG registers, and checks possible to write these data with RS coding scheme.
|
||||
// The RS coding scheme does not require data changes for the encoded data. esp32s2 has special registers for this.
|
||||
// They will be filled during the burn operation.
|
||||
esp_err_t esp_efuse_utility_apply_new_coding_scheme()
|
||||
{
|
||||
// start with EFUSE_BLK1. EFUSE_BLK0 - always uses EFUSE_CODING_SCHEME_NONE.
|
||||
for (int num_block = EFUSE_BLK1; num_block < EFUSE_BLK_MAX; num_block++) {
|
||||
if (esp_efuse_get_coding_scheme(num_block) == EFUSE_CODING_SCHEME_RS) {
|
||||
for (uint32_t addr_wr_block = range_write_addr_blocks[num_block].start; addr_wr_block <= range_write_addr_blocks[num_block].end; addr_wr_block += 4) {
|
||||
if (REG_READ(addr_wr_block)) {
|
||||
int num_reg = 0;
|
||||
for (uint32_t addr_rd_block = range_read_addr_blocks[num_block].start; addr_rd_block <= range_read_addr_blocks[num_block].end; addr_rd_block += 4, ++num_reg) {
|
||||
if (esp_efuse_utility_read_reg(num_block, num_reg)) {
|
||||
ESP_LOGE(TAG, "Bits are not empty. Write operation is forbidden.");
|
||||
return ESP_ERR_CODING;
|
||||
}
|
||||
}
|
||||
break;
|
||||
}
|
||||
}
|
||||
}
|
||||
}
|
||||
return ESP_OK;
|
||||
}
|
||||
|
|
@ -236,6 +236,38 @@ test_esp32s2_efuse_table_on_host:
|
|||
- cd ${IDF_PATH}/components/efuse/test_efuse_host
|
||||
- ${IDF_PATH}/tools/ci/multirun_with_pyenv.sh ./efuse_tests.py
|
||||
|
||||
test_esp32s3_efuse_table_on_host:
|
||||
extends: .host_test_template
|
||||
artifacts:
|
||||
when: on_failure
|
||||
paths:
|
||||
- components/efuse/esp32s3/esp_efuse_table.c
|
||||
expire_in: 1 week
|
||||
script:
|
||||
- cd ${IDF_PATH}/components/efuse/
|
||||
- ${IDF_PATH}/tools/ci/multirun_with_pyenv.sh -p 2.7.15 ./efuse_table_gen.py -t "esp32s3" ${IDF_PATH}/components/efuse/esp32s3/esp_efuse_table.csv
|
||||
- git diff --exit-code -- esp32s3/esp_efuse_table.c || { echo 'Differences found for esp32s3 target. Please run make efuse_common_table or idf.py efuse_common_table and commit the changes.'; exit 1; }
|
||||
- ${IDF_PATH}/tools/ci/multirun_with_pyenv.sh -p 3.4.8 ./efuse_table_gen.py -t "esp32s3" ${IDF_PATH}/components/efuse/esp32s3/esp_efuse_table.csv
|
||||
- git diff --exit-code -- esp32s3/esp_efuse_table.c || { echo 'Differences found between running under Python 2 and 3.'; exit 1; }
|
||||
- cd ${IDF_PATH}/components/efuse/test_efuse_host
|
||||
- ${IDF_PATH}/tools/ci/multirun_with_pyenv.sh ./efuse_tests.py
|
||||
|
||||
test_esp32c3_efuse_table_on_host:
|
||||
extends: .host_test_template
|
||||
artifacts:
|
||||
when: on_failure
|
||||
paths:
|
||||
- components/efuse/esp32c3/esp_efuse_table.c
|
||||
expire_in: 1 week
|
||||
script:
|
||||
- cd ${IDF_PATH}/components/efuse/
|
||||
- ${IDF_PATH}/tools/ci/multirun_with_pyenv.sh -p 2.7.15 ./efuse_table_gen.py -t "esp32c3" ${IDF_PATH}/components/efuse/esp32c3/esp_efuse_table.csv
|
||||
- git diff --exit-code -- esp32c3/esp_efuse_table.c || { echo 'Differences found for esp32c3 target. Please run make efuse_common_table or idf.py efuse_common_table and commit the changes.'; exit 1; }
|
||||
- ${IDF_PATH}/tools/ci/multirun_with_pyenv.sh -p 3.4.8 ./efuse_table_gen.py -t "esp32c3" ${IDF_PATH}/components/efuse/esp32c3/esp_efuse_table.csv
|
||||
- git diff --exit-code -- esp32c3/esp_efuse_table.c || { echo 'Differences found between running under Python 2 and 3.'; exit 1; }
|
||||
- cd ${IDF_PATH}/components/efuse/test_efuse_host
|
||||
- ${IDF_PATH}/tools/ci/multirun_with_pyenv.sh ./efuse_tests.py
|
||||
|
||||
test_espcoredump:
|
||||
extends: .host_test_template
|
||||
artifacts:
|
||||
|
|
|
|||
Ładowanie…
Reference in New Issue