diff --git a/components/esp_hw_support/port/esp32c6/pmu_param.c b/components/esp_hw_support/port/esp32c6/pmu_param.c index 6d2d818419..6e0a8ea8cb 100644 --- a/components/esp_hw_support/port/esp32c6/pmu_param.c +++ b/components/esp_hw_support/port/esp32c6/pmu_param.c @@ -209,8 +209,8 @@ const pmu_hp_system_digital_param_t * pmu_hp_system_digital_param_default(pmu_hp .slp_mem_xpd = 0, \ .slp_logic_xpd = 0, \ .xpd = 1, \ - .slp_mem_dbias = 0xc, \ - .slp_logic_dbias = 0xc, \ + .slp_mem_dbias = 0, \ + .slp_logic_dbias = 0, \ .dbias = 0x19 \ }, \ .regulator1 = { \ @@ -229,8 +229,8 @@ const pmu_hp_system_digital_param_t * pmu_hp_system_digital_param_default(pmu_hp .slp_mem_xpd = 0, \ .slp_logic_xpd = 0, \ .xpd = 1, \ - .slp_mem_dbias = 0xc, \ - .slp_logic_dbias = 0xc, \ + .slp_mem_dbias = 0, \ + .slp_logic_dbias = 0, \ .dbias = 0x1a \ }, \ .regulator1 = { \ @@ -246,12 +246,12 @@ const pmu_hp_system_digital_param_t * pmu_hp_system_digital_param_default(pmu_hp .bias_sleep = 0 \ }, \ .regulator0 = { \ - .slp_mem_xpd = 1, \ - .slp_logic_xpd = 1, \ - .xpd = 0, \ - .slp_mem_dbias = 0x4, \ - .slp_logic_dbias = 0x4, \ - .dbias = 0x1a \ + .slp_mem_xpd = 0, \ + .slp_logic_xpd = 0, \ + .xpd = 1, \ + .slp_mem_dbias = 0, \ + .slp_logic_dbias = 0, \ + .dbias = 1 \ }, \ .regulator1 = { \ .drv_b = 0x0 \ @@ -404,8 +404,8 @@ const pmu_lp_system_power_param_t * pmu_lp_system_power_param_default(pmu_lp_mod .regulator0 = { \ .slp_xpd = 0, \ .xpd = 1, \ - .slp_dbias = 0x0, \ - .dbias = 0x1a \ + .slp_dbias = 0, \ + .dbias = LP_CALI_DBIAS \ }, \ .regulator1 = { \ .drv_b = 0x0 \ @@ -415,15 +415,15 @@ const pmu_lp_system_power_param_t * pmu_lp_system_power_param_default(pmu_lp_mod #define PMU_LP_SLEEP_ANALOG_CONFIG_DEFAULT() { \ .bias = { \ .xpd_bias = 0, \ - .dbg_atten = 0x0, \ + .dbg_atten = 0, \ .pd_cur = 1, \ .bias_sleep = 1, \ }, \ .regulator0 = { \ - .slp_xpd = 1, \ - .xpd = 0, \ - .slp_dbias = 0x0, \ - .dbias = 0x12 \ + .slp_xpd = 0, \ + .xpd = 1, \ + .slp_dbias = 0, \ + .dbias = 12 \ }, \ .regulator1 = { \ .drv_b = 0x0 \ diff --git a/components/esp_hw_support/port/esp32c6/pmu_sleep.c b/components/esp_hw_support/port/esp32c6/pmu_sleep.c index dfb63c9ff3..cdeeb43fa9 100644 --- a/components/esp_hw_support/port/esp32c6/pmu_sleep.c +++ b/components/esp_hw_support/port/esp32c6/pmu_sleep.c @@ -16,6 +16,7 @@ #include "soc/pmu_struct.h" #include "hal/lp_aon_hal.h" #include "esp_private/esp_pmu.h" +#include "pmu_param.h" #define HP(state) (PMU_MODE_HP_ ## state) #define LP(state) (PMU_MODE_LP_ ## state) @@ -155,6 +156,7 @@ const pmu_sleep_config_t* pmu_sleep_config_default( config->param = *pmu_sleep_param_config_default(¶m_default, &power_default, pd_flags, adjustment, slowclk_period, fastclk_period); if (dslp) { + config->param.lp_sys.analog_wait_target_cycle = rtc_time_us_to_slowclk(PMU_LP_ANALOG_WAIT_TARGET_TIME_DSLP_US, slowclk_period); pmu_sleep_analog_config_t analog_default = PMU_SLEEP_ANALOG_DSLP_CONFIG_DEFAULT(pd_flags); config->analog = analog_default; } else { @@ -162,21 +164,15 @@ const pmu_sleep_config_t* pmu_sleep_config_default( config->digital = digital_default; pmu_sleep_analog_config_t analog_default = PMU_SLEEP_ANALOG_LSLP_CONFIG_DEFAULT(pd_flags); - if (!(pd_flags & PMU_SLEEP_PD_TOP) || !(pd_flags & PMU_SLEEP_PD_MODEM)){ - analog_default.hp_sys.analog.xpd = 1; - analog_default.hp_sys.analog.dbias = 2; - } if (!(pd_flags & PMU_SLEEP_PD_XTAL)){ - analog_default.hp_sys.analog.xpd = 1; - analog_default.hp_sys.analog.pd_cur = 0; - analog_default.hp_sys.analog.bias_sleep = 0; - analog_default.hp_sys.analog.dbias = 25; + analog_default.hp_sys.analog.pd_cur = PMU_PD_CUR_SLEEP_ON; + analog_default.hp_sys.analog.bias_sleep = PMU_BIASSLP_SLEEP_ON; + analog_default.hp_sys.analog.dbias = HP_CALI_DBIAS; - analog_default.lp_sys[LP(SLEEP)].analog.xpd = 1; - analog_default.lp_sys[LP(SLEEP)].analog.pd_cur = 0; - analog_default.lp_sys[LP(SLEEP)].analog.bias_sleep = 0; - analog_default.lp_sys[LP(SLEEP)].analog.dbias = 26; + analog_default.lp_sys[LP(SLEEP)].analog.pd_cur = PMU_PD_CUR_SLEEP_ON; + analog_default.lp_sys[LP(SLEEP)].analog.bias_sleep = PMU_BIASSLP_SLEEP_ON; + analog_default.lp_sys[LP(SLEEP)].analog.dbias = LP_CALI_DBIAS; } config->analog = analog_default; @@ -206,25 +202,17 @@ static void pmu_sleep_digital_init(pmu_context_t *ctx, const pmu_sleep_digital_c static void pmu_sleep_analog_init(pmu_context_t *ctx, const pmu_sleep_analog_config_t *analog, bool dslp) { assert(ctx->hal); + pmu_ll_hp_set_dbg_atten (ctx->hal->dev, HP(SLEEP), analog->hp_sys.analog.dbg_atten); pmu_ll_hp_set_current_power_off (ctx->hal->dev, HP(SLEEP), analog->hp_sys.analog.pd_cur); pmu_ll_hp_set_bias_sleep_enable (ctx->hal->dev, HP(SLEEP), analog->hp_sys.analog.bias_sleep); - pmu_ll_hp_set_regulator_sleep_memory_xpd (ctx->hal->dev, HP(SLEEP), analog->hp_sys.analog.slp_mem_xpd); - pmu_ll_hp_set_regulator_sleep_logic_xpd (ctx->hal->dev, HP(SLEEP), analog->hp_sys.analog.slp_logic_xpd); pmu_ll_hp_set_regulator_xpd (ctx->hal->dev, HP(SLEEP), analog->hp_sys.analog.xpd); - pmu_ll_hp_set_regulator_sleep_memory_dbias(ctx->hal->dev, HP(SLEEP), analog->hp_sys.analog.slp_mem_dbias); - pmu_ll_hp_set_regulator_sleep_logic_dbias (ctx->hal->dev, HP(SLEEP), analog->hp_sys.analog.slp_logic_dbias); pmu_ll_hp_set_regulator_dbias (ctx->hal->dev, HP(SLEEP), analog->hp_sys.analog.dbias); pmu_ll_hp_set_regulator_driver_bar (ctx->hal->dev, HP(SLEEP), analog->hp_sys.analog.drv_b); - pmu_ll_lp_set_regulator_slp_xpd (ctx->hal->dev, LP(ACTIVE), analog->lp_sys[LP(ACTIVE)].analog.slp_xpd); - pmu_ll_lp_set_regulator_sleep_dbias(ctx->hal->dev, LP(ACTIVE), analog->lp_sys[LP(ACTIVE)].analog.slp_dbias); - pmu_ll_lp_set_regulator_xpd (ctx->hal->dev, LP(ACTIVE), analog->lp_sys[LP(ACTIVE)].analog.xpd); - pmu_ll_lp_set_regulator_dbias (ctx->hal->dev, LP(ACTIVE), analog->lp_sys[LP(ACTIVE)].analog.dbias); - pmu_ll_lp_set_regulator_driver_bar (ctx->hal->dev, LP(ACTIVE), analog->lp_sys[LP(ACTIVE)].analog.drv_b); - pmu_ll_lp_set_dbg_atten (ctx->hal->dev, LP(SLEEP), analog->lp_sys[LP(SLEEP)].analog.dbg_atten); pmu_ll_lp_set_current_power_off (ctx->hal->dev, LP(SLEEP), analog->lp_sys[LP(SLEEP)].analog.pd_cur); pmu_ll_lp_set_bias_sleep_enable (ctx->hal->dev, LP(SLEEP), analog->lp_sys[LP(SLEEP)].analog.bias_sleep); + pmu_ll_lp_set_regulator_slp_xpd (ctx->hal->dev, LP(SLEEP), analog->lp_sys[LP(SLEEP)].analog.slp_xpd); pmu_ll_lp_set_regulator_xpd (ctx->hal->dev, LP(SLEEP), analog->lp_sys[LP(SLEEP)].analog.xpd); pmu_ll_lp_set_regulator_sleep_dbias(ctx->hal->dev, LP(SLEEP), analog->lp_sys[LP(SLEEP)].analog.slp_dbias); pmu_ll_lp_set_regulator_dbias (ctx->hal->dev, LP(SLEEP), analog->lp_sys[LP(SLEEP)].analog.dbias); diff --git a/components/esp_hw_support/port/esp32c6/private_include/pmu_param.h b/components/esp_hw_support/port/esp32c6/private_include/pmu_param.h index 2608204a7a..f340c5ca05 100644 --- a/components/esp_hw_support/port/esp32c6/private_include/pmu_param.h +++ b/components/esp_hw_support/port/esp32c6/private_include/pmu_param.h @@ -16,6 +16,37 @@ extern "C" { #endif +#define HP_CALI_DBIAS 25 +#define LP_CALI_DBIAS 26 + +// FOR XTAL FORCE PU IN SLEEP +#define PMU_PD_CUR_SLEEP_ON 0 +#define PMU_BIASSLP_SLEEP_ON 0 + +// FOR BOTH LIGHTSLEEP & DEEPSLEEP +#define PMU_PD_CUR_SLEEP_DEFAULT 1 +#define PMU_BIASSLP_SLEEP_DEFAULT 1 +#define PMU_LP_XPD_SLEEP_DEFAULT 1 +#define PMU_LP_SLP_XPD_SLEEP_DEFAULT 0 +#define PMU_LP_SLP_DBIAS_SLEEP_DEFAULT 0 + +// FOR LIGHTSLEEP +#define PMU_HP_DRVB_LIGHTSLEEP 0 +#define PMU_LP_DRVB_LIGHTSLEEP 0 +#define PMU_HP_XPD_LIGHTSLEEP 1 + +#define PMU_DBG_ATTEN_LIGHTSLEEP_DEFAULT 0 +#define PMU_HP_DBIAS_LIGHTSLEEP_0V6 1 +#define PMU_LP_DBIAS_LIGHTSLEEP_0V7 12 + +// FOR DEEPSLEEP +#define PMU_DBG_HP_DEEPSLEEP 0 +#define PMU_HP_XPD_DEEPSLEEP 0 +#define PMU_LP_DRVB_DEEPSLEEP 0 + +#define PMU_DBG_ATTEN_DEEPSLEEP_DEFAULT 12 +#define PMU_LP_DBIAS_DEEPSLEEP_0V7 23 + typedef struct { pmu_hp_dig_power_reg_t dig_power; pmu_hp_clk_power_reg_t clk_power; @@ -211,6 +242,7 @@ typedef struct { #define PMU_LP_DIGITAL_POWER_SUPPLY_WAIT_CYCLES (32) /* Fast OSC as PMU work clock source is about 2 us */ #define PMU_LP_DIGITAL_POWER_UP_WAIT_CYCLES (32) /* Fast OSC as PMU work clock source is about 2 us */ +#define PMU_LP_ANALOG_WAIT_TARGET_TIME_DSLP_US (500) /* Slow OSC as PMU slow clock source in deepsleep is about 500 us */ typedef struct { struct { @@ -293,84 +325,52 @@ typedef struct { } lp_sys[PMU_MODE_LP_MAX]; } pmu_sleep_analog_config_t; -#define PMU_SLEEP_ANALOG_LSLP_CONFIG_DEFAULT(pd_flags) { \ - .hp_sys = { \ - .analog = { \ - .xpd_bias = 0, \ - .dbg_atten = 0, \ - .pd_cur = 1, \ - .bias_sleep = 1, \ - .slp_mem_xpd = 1, \ - .slp_logic_xpd = 1, \ - .slp_mem_dbias = 4, \ - .slp_logic_dbias = 4, \ - .xpd = 0, \ - .dbias = 0, \ - .drv_b = 0 \ - } \ - }, \ - .lp_sys[PMU_MODE_LP_ACTIVE] = { \ - .analog = { \ - .slp_xpd = 0, \ - .slp_dbias = 0, \ - .xpd = 1, \ - .dbias = 26, \ - .drv_b = 0 \ - } \ - }, \ - .lp_sys[PMU_MODE_LP_SLEEP] = { \ - .analog = { \ - .xpd_bias = 0, \ - .dbg_atten = 0, \ - .pd_cur = 1, \ - .bias_sleep = 1, \ - .xpd = 0, \ - .dbias = 28, \ - .slp_xpd = 1, \ - .slp_dbias = 3, \ - .drv_b = 0 \ - } \ - } \ +#define PMU_SLEEP_ANALOG_LSLP_CONFIG_DEFAULT(pd_flags) { \ + .hp_sys = { \ + .analog = { \ + .drv_b = PMU_HP_DRVB_LIGHTSLEEP, \ + .pd_cur = PMU_PD_CUR_SLEEP_DEFAULT, \ + .bias_sleep = PMU_BIASSLP_SLEEP_DEFAULT, \ + .xpd = PMU_HP_XPD_LIGHTSLEEP, \ + .dbg_atten = PMU_DBG_ATTEN_LIGHTSLEEP_DEFAULT, \ + .dbias = PMU_HP_DBIAS_LIGHTSLEEP_0V6 \ + } \ + }, \ + .lp_sys[PMU_MODE_LP_SLEEP] = { \ + .analog = { \ + .drv_b = PMU_LP_DRVB_DEEPSLEEP, \ + .pd_cur = PMU_PD_CUR_SLEEP_DEFAULT, \ + .bias_sleep = PMU_BIASSLP_SLEEP_DEFAULT, \ + .slp_xpd = PMU_LP_SLP_XPD_SLEEP_DEFAULT, \ + .slp_dbias = PMU_LP_SLP_DBIAS_SLEEP_DEFAULT, \ + .xpd = PMU_LP_XPD_SLEEP_DEFAULT, \ + .dbg_atten = PMU_DBG_ATTEN_LIGHTSLEEP_DEFAULT, \ + .dbias = PMU_LP_DBIAS_LIGHTSLEEP_0V7 \ + } \ + } \ } -#define PMU_SLEEP_ANALOG_DSLP_CONFIG_DEFAULT(pd_flags) { \ - .hp_sys = { \ - .analog = { \ - .xpd_bias = 0, \ - .dbg_atten = 0, \ - .pd_cur = 0, \ - .bias_sleep = 0, \ - .slp_mem_xpd = 0, \ - .slp_logic_xpd = 0, \ - .slp_mem_dbias = 0, \ - .slp_logic_dbias = 0, \ - .xpd = 0, \ - .dbias = 0, \ - .drv_b = 0 \ - } \ - }, \ - .lp_sys[PMU_MODE_LP_ACTIVE] = { \ - .analog = { \ - .slp_xpd = 0, \ - .slp_dbias = 0, \ - .xpd = 1, \ - .dbias = 26, \ - .drv_b = 0 \ - } \ - }, \ - .lp_sys[PMU_MODE_LP_SLEEP] = { \ - .analog = { \ - .xpd_bias = 0, \ - .dbg_atten = 14, \ - .pd_cur = 1, \ - .bias_sleep = 1, \ - .xpd = 0, \ - .dbias = 0, \ - .slp_xpd = 1, \ - .slp_dbias = 14, \ - .drv_b = 0 \ - } \ - } \ +#define PMU_SLEEP_ANALOG_DSLP_CONFIG_DEFAULT(pd_flags) { \ + .hp_sys = { \ + .analog = { \ + .pd_cur = PMU_PD_CUR_SLEEP_ON, \ + .bias_sleep = PMU_BIASSLP_SLEEP_ON, \ + .xpd = PMU_HP_XPD_DEEPSLEEP, \ + .dbg_atten = PMU_DBG_HP_DEEPSLEEP \ + } \ + }, \ + .lp_sys[PMU_MODE_LP_SLEEP] = { \ + .analog = { \ + .drv_b = PMU_LP_DRVB_DEEPSLEEP, \ + .pd_cur = PMU_PD_CUR_SLEEP_DEFAULT, \ + .bias_sleep = PMU_BIASSLP_SLEEP_DEFAULT, \ + .slp_xpd = PMU_LP_SLP_XPD_SLEEP_DEFAULT, \ + .slp_dbias = PMU_LP_SLP_DBIAS_SLEEP_DEFAULT, \ + .xpd = PMU_LP_XPD_SLEEP_DEFAULT, \ + .dbg_atten = PMU_DBG_ATTEN_DEEPSLEEP_DEFAULT, \ + .dbias = PMU_LP_DBIAS_DEEPSLEEP_0V7 \ + } \ + } \ } typedef struct { diff --git a/components/esp_hw_support/port/esp32h2/pmu_param.c b/components/esp_hw_support/port/esp32h2/pmu_param.c index 715c5552ca..83bf887aa3 100644 --- a/components/esp_hw_support/port/esp32h2/pmu_param.c +++ b/components/esp_hw_support/port/esp32h2/pmu_param.c @@ -210,9 +210,9 @@ const pmu_hp_system_digital_param_t * pmu_hp_system_digital_param_default(pmu_hp .slp_mem_xpd = 0, \ .slp_logic_xpd = 0, \ .xpd = 1, \ - .slp_mem_dbias = 0x5, \ - .slp_logic_dbias = 0xc, \ - .dbias = 0xf \ + .slp_mem_dbias = 0, \ + .slp_logic_dbias = 0, \ + .dbias = HP_CALI_DBIAS \ }, \ .regulator1 = { \ .drv_b = 0x1a \ @@ -230,9 +230,9 @@ const pmu_hp_system_digital_param_t * pmu_hp_system_digital_param_default(pmu_hp .slp_mem_xpd = 0, \ .slp_logic_xpd = 0, \ .xpd = 1, \ - .slp_mem_dbias = 0x5, \ - .slp_logic_dbias = 0xc, \ - .dbias = 0xd \ + .slp_mem_dbias = 0, \ + .slp_logic_dbias = 0, \ + .dbias = HP_CALI_DBIAS \ }, \ .regulator1 = { \ .drv_b = 0x1b \ @@ -247,11 +247,11 @@ const pmu_hp_system_digital_param_t * pmu_hp_system_digital_param_default(pmu_hp .bias_sleep = 1 \ }, \ .regulator0 = { \ - .slp_mem_xpd = 1, \ - .slp_logic_xpd = 1, \ - .xpd = 0, \ - .slp_mem_dbias = 0x1, \ - .slp_logic_dbias = 0x5, \ + .slp_mem_xpd = 0, \ + .slp_logic_xpd = 0, \ + .xpd = 1, \ + .slp_mem_dbias = 0, \ + .slp_logic_dbias = 0, \ .dbias = 0 \ }, \ .regulator1 = { \ @@ -403,10 +403,10 @@ const pmu_lp_system_power_param_t * pmu_lp_system_power_param_default(pmu_lp_mod .slp_xpd = 0, \ .xpd = 1, \ .slp_dbias = 0, \ - .dbias = 0xe \ + .dbias = LP_CALI_DBIAS \ }, \ .regulator1 = { \ - .drv_b = 3 \ + .drv_b = 0 \ } \ } @@ -417,10 +417,10 @@ const pmu_lp_system_power_param_t * pmu_lp_system_power_param_default(pmu_lp_mod .bias_sleep = 1, \ }, \ .regulator0 = { \ - .slp_xpd = 1, \ - .xpd = 0, \ - .slp_dbias = 0xf, \ - .dbias = 0 \ + .slp_xpd = 0, \ + .xpd = 1, \ + .slp_dbias = 0, \ + .dbias = 1 \ }, \ .regulator1 = { \ .drv_b = 9 \ diff --git a/components/esp_hw_support/port/esp32h2/pmu_sleep.c b/components/esp_hw_support/port/esp32h2/pmu_sleep.c index ffe456fa60..1f39dd0a7f 100644 --- a/components/esp_hw_support/port/esp32h2/pmu_sleep.c +++ b/components/esp_hw_support/port/esp32h2/pmu_sleep.c @@ -16,6 +16,7 @@ #include "soc/pmu_struct.h" #include "hal/lp_aon_hal.h" #include "esp_private/esp_pmu.h" +#include "pmu_param.h" #define HP(state) (PMU_MODE_HP_ ## state) #define LP(state) (PMU_MODE_LP_ ## state) @@ -120,21 +121,15 @@ const pmu_sleep_config_t* pmu_sleep_config_default( config->digital = digital_default; pmu_sleep_analog_config_t analog_default = PMU_SLEEP_ANALOG_LSLP_CONFIG_DEFAULT(pd_flags); - if (!(pd_flags & PMU_SLEEP_PD_TOP) || !(pd_flags & PMU_SLEEP_PD_MODEM)){ - analog_default.hp_sys.analog.xpd = 1; - analog_default.hp_sys.analog.dbias = 2; - } if (!(pd_flags & PMU_SLEEP_PD_XTAL)){ - analog_default.hp_sys.analog.xpd_trx = 1; - analog_default.hp_sys.analog.xpd = 1; - analog_default.hp_sys.analog.dbias = 25; - analog_default.hp_sys.analog.pd_cur = 0; - analog_default.hp_sys.analog.bias_sleep = 0; + analog_default.hp_sys.analog.xpd_trx = PMU_XPD_TRX_SLEEP_ON; + analog_default.hp_sys.analog.dbias = HP_CALI_DBIAS; + analog_default.hp_sys.analog.pd_cur = PMU_PD_CUR_SLEEP_ON; + analog_default.hp_sys.analog.bias_sleep = PMU_BIASSLP_SLEEP_ON; - analog_default.lp_sys[LP(SLEEP)].analog.xpd = 1; - analog_default.lp_sys[LP(SLEEP)].analog.pd_cur = 0; - analog_default.lp_sys[LP(SLEEP)].analog.bias_sleep = 0; - analog_default.lp_sys[LP(SLEEP)].analog.dbias = 26; + analog_default.lp_sys[LP(SLEEP)].analog.pd_cur = PMU_PD_CUR_SLEEP_ON; + analog_default.lp_sys[LP(SLEEP)].analog.bias_sleep = PMU_BIASSLP_SLEEP_ON; + analog_default.lp_sys[LP(SLEEP)].analog.dbias = LP_CALI_DBIAS; } config->analog = analog_default; } @@ -165,23 +160,13 @@ static void pmu_sleep_analog_init(pmu_context_t *ctx, const pmu_sleep_analog_con assert(ctx->hal); pmu_ll_hp_set_current_power_off (ctx->hal->dev, HP(SLEEP), analog->hp_sys.analog.pd_cur); pmu_ll_hp_set_bias_sleep_enable (ctx->hal->dev, HP(SLEEP), analog->hp_sys.analog.bias_sleep); - pmu_ll_hp_set_regulator_sleep_memory_xpd (ctx->hal->dev, HP(SLEEP), analog->hp_sys.analog.slp_mem_xpd); - pmu_ll_hp_set_regulator_sleep_logic_xpd (ctx->hal->dev, HP(SLEEP), analog->hp_sys.analog.slp_logic_xpd); pmu_ll_hp_set_regulator_xpd (ctx->hal->dev, HP(SLEEP), analog->hp_sys.analog.xpd); - pmu_ll_hp_set_regulator_sleep_memory_dbias(ctx->hal->dev, HP(SLEEP), analog->hp_sys.analog.slp_mem_dbias); - pmu_ll_hp_set_regulator_sleep_logic_dbias (ctx->hal->dev, HP(SLEEP), analog->hp_sys.analog.slp_logic_dbias); pmu_ll_hp_set_regulator_dbias (ctx->hal->dev, HP(SLEEP), analog->hp_sys.analog.dbias); pmu_ll_hp_set_regulator_driver_bar (ctx->hal->dev, HP(SLEEP), analog->hp_sys.analog.drv_b); pmu_ll_hp_set_trx_xpd (ctx->hal->dev, HP(SLEEP), analog->hp_sys.analog.xpd_trx); - - pmu_ll_lp_set_regulator_slp_xpd (ctx->hal->dev, LP(ACTIVE), analog->lp_sys[LP(ACTIVE)].analog.slp_xpd); - pmu_ll_lp_set_regulator_sleep_dbias(ctx->hal->dev, LP(ACTIVE), analog->lp_sys[LP(ACTIVE)].analog.slp_dbias); - pmu_ll_lp_set_regulator_xpd (ctx->hal->dev, LP(ACTIVE), analog->lp_sys[LP(ACTIVE)].analog.xpd); - pmu_ll_lp_set_regulator_dbias (ctx->hal->dev, LP(ACTIVE), analog->lp_sys[LP(ACTIVE)].analog.dbias); - pmu_ll_lp_set_regulator_driver_bar (ctx->hal->dev, LP(ACTIVE), analog->lp_sys[LP(ACTIVE)].analog.drv_b); - pmu_ll_lp_set_current_power_off (ctx->hal->dev, LP(SLEEP), analog->lp_sys[LP(SLEEP)].analog.pd_cur); pmu_ll_lp_set_bias_sleep_enable (ctx->hal->dev, LP(SLEEP), analog->lp_sys[LP(SLEEP)].analog.bias_sleep); + pmu_ll_lp_set_regulator_slp_xpd (ctx->hal->dev, LP(SLEEP), analog->lp_sys[LP(SLEEP)].analog.slp_xpd); pmu_ll_lp_set_regulator_xpd (ctx->hal->dev, LP(SLEEP), analog->lp_sys[LP(SLEEP)].analog.xpd); pmu_ll_lp_set_regulator_sleep_dbias(ctx->hal->dev, LP(SLEEP), analog->lp_sys[LP(SLEEP)].analog.slp_dbias); pmu_ll_lp_set_regulator_dbias (ctx->hal->dev, LP(SLEEP), analog->lp_sys[LP(SLEEP)].analog.dbias); diff --git a/components/esp_hw_support/port/esp32h2/private_include/pmu_param.h b/components/esp_hw_support/port/esp32h2/private_include/pmu_param.h index f52cdcf5ff..b6f183522e 100644 --- a/components/esp_hw_support/port/esp32h2/private_include/pmu_param.h +++ b/components/esp_hw_support/port/esp32h2/private_include/pmu_param.h @@ -16,6 +16,36 @@ extern "C" { #endif +#define HP_CALI_DBIAS 17 +#define LP_CALI_DBIAS 18 + +// FOR XTAL FORCE PU IN SLEEP +#define PMU_PD_CUR_SLEEP_ON 0 +#define PMU_BIASSLP_SLEEP_ON 0 +#define PMU_XPD_TRX_SLEEP_ON 1 + + +// FOR BOTH LIGHTSLEEP & DEEPSLEEP +#define PMU_PD_CUR_SLEEP_DEFAULT 1 +#define PMU_BIASSLP_SLEEP_DEFAULT 1 +#define PMU_LP_XPD_SLEEP_DEFAULT 1 +#define PMU_XPD_TRX_SLEEP_DEFAULT 0 +#define PMU_LP_SLP_XPD_SLEEP_DEFAULT 0 +#define PMU_LP_SLP_DBIAS_SLEEP_DEFAULT 0 + +// FOR LIGHTSLEEP +#define PMU_HP_XPD_LIGHTSLEEP 1 +#define PMU_HP_DRVB_LIGHTSLEEP 0xFFFFF8 +#define PMU_LP_DRVB_LIGHTSLEEP 0 + +#define PMU_HP_DBIAS_LIGHTSLEEP_0V6 1 +#define PMU_LP_DBIAS_LIGHTSLEEP_0V7 6 + +// FOR DEEPSLEEP +#define PMU_HP_XPD_DEEPSLEEP 0 +#define PMU_LP_DRVB_DEEPSLEEP 7 +#define PMU_LP_DBIAS_DEEPSLEEP_0V7 PMU_LP_DBIAS_LIGHTSLEEP_0V7 + typedef struct { pmu_hp_dig_power_reg_t dig_power; pmu_hp_clk_power_reg_t clk_power; @@ -291,79 +321,48 @@ typedef struct { } lp_sys[PMU_MODE_LP_MAX]; } pmu_sleep_analog_config_t; -#define PMU_SLEEP_ANALOG_LSLP_CONFIG_DEFAULT(pd_flags) { \ - .hp_sys = { \ - .analog = { \ - .xpd_trx = 0, \ - .xpd_bias = 0x0, \ - .pd_cur = 1, \ - .bias_sleep = 1, \ - .slp_mem_xpd = 0, \ - .slp_logic_xpd = 0, \ - .slp_mem_dbias = 0, \ - .slp_logic_dbias = 0, \ - .xpd = 1, \ - .dbias = 0, \ - .drv_b = 0xFFFFF8 \ - } \ - }, \ - .lp_sys[PMU_MODE_LP_ACTIVE] = { \ - .analog = { \ - .slp_xpd = 0, \ - .slp_dbias = 0x0, \ - .xpd = 1, \ - .dbias = 0xe, \ - .drv_b = 0x0 \ - } \ - }, \ - .lp_sys[PMU_MODE_LP_SLEEP] = { \ - .analog = { \ - .xpd_bias = 0, \ - .pd_cur = 1, \ - .bias_sleep = 1, \ - .xpd = 0, \ - .dbias = 0, \ - .slp_xpd = 1, \ - .slp_dbias = 0x5, \ - .drv_b = 0x7 \ - } \ - } \ +#define PMU_SLEEP_ANALOG_LSLP_CONFIG_DEFAULT(pd_flags) { \ + .hp_sys = { \ + .analog = { \ + .xpd_trx = PMU_XPD_TRX_SLEEP_DEFAULT, \ + .drv_b = PMU_HP_DRVB_LIGHTSLEEP, \ + .pd_cur = PMU_PD_CUR_SLEEP_DEFAULT, \ + .bias_sleep = PMU_BIASSLP_SLEEP_DEFAULT, \ + .xpd = PMU_HP_XPD_LIGHTSLEEP, \ + .dbias = PMU_HP_DBIAS_LIGHTSLEEP_0V6 \ + } \ + }, \ + .lp_sys[PMU_MODE_LP_SLEEP] = { \ + .analog = { \ + .drv_b = PMU_LP_DRVB_DEEPSLEEP, \ + .pd_cur = PMU_PD_CUR_SLEEP_DEFAULT, \ + .bias_sleep = PMU_BIASSLP_SLEEP_DEFAULT, \ + .slp_xpd = PMU_LP_SLP_XPD_SLEEP_DEFAULT, \ + .slp_dbias = PMU_LP_SLP_DBIAS_SLEEP_DEFAULT,\ + .xpd = PMU_LP_XPD_SLEEP_DEFAULT, \ + .dbias = PMU_LP_DBIAS_LIGHTSLEEP_0V7 \ + } \ + } \ } #define PMU_SLEEP_ANALOG_DSLP_CONFIG_DEFAULT(pd_flags) { \ .hp_sys = { \ .analog = { \ - .xpd_bias = 0, \ - .pd_cur = 1, \ - .bias_sleep = 1, \ - .xpd = 0, \ - .dbias = 0, \ - .slp_mem_xpd = 0, \ - .slp_mem_dbias = 0, \ - .slp_logic_xpd = 0, \ - .slp_logic_dbias = 0, \ - .drv_b = 0xFFFFFF \ - } \ - }, \ - .lp_sys[PMU_MODE_LP_ACTIVE] = { \ - .analog = { \ - .xpd = 1, \ - .dbias = 0xe, \ - .slp_xpd = 0, \ - .slp_dbias = 0, \ - .drv_b = 0 \ + .xpd_trx = PMU_XPD_TRX_SLEEP_DEFAULT, \ + .pd_cur = PMU_PD_CUR_SLEEP_ON, \ + .bias_sleep = PMU_BIASSLP_SLEEP_ON, \ + .xpd = PMU_HP_XPD_DEEPSLEEP \ } \ }, \ .lp_sys[PMU_MODE_LP_SLEEP] = { \ .analog = { \ - .xpd_bias = 0, \ - .pd_cur = 1, \ - .bias_sleep = 1, \ - .xpd = 0, \ - .dbias = 0, \ - .slp_xpd = 1, \ - .slp_dbias = 5, \ - .drv_b = 7 \ + .drv_b = PMU_LP_DRVB_DEEPSLEEP, \ + .pd_cur = PMU_PD_CUR_SLEEP_DEFAULT, \ + .bias_sleep = PMU_BIASSLP_SLEEP_DEFAULT, \ + .slp_xpd = PMU_LP_SLP_XPD_SLEEP_DEFAULT, \ + .slp_dbias = PMU_LP_SLP_DBIAS_SLEEP_DEFAULT,\ + .xpd = PMU_LP_XPD_SLEEP_DEFAULT, \ + .dbias = PMU_LP_DBIAS_DEEPSLEEP_0V7 \ } \ } \ }