diff --git a/.gitlab/ci/docs.yml b/.gitlab/ci/docs.yml index 5699a10d12..a7154a6306 100644 --- a/.gitlab/ci/docs.yml +++ b/.gitlab/ci/docs.yml @@ -102,7 +102,7 @@ check_docs_lang_sync: parallel: matrix: - DOCLANG: ["en", "zh_CN"] - DOCTGT: ["esp32", "esp32s2", "esp32s3", "esp32c3", "esp32c2", "esp32c6", "esp32c5","esp32h2", "esp32p4"] + DOCTGT: ["esp32", "esp32s2", "esp32s3", "esp32c3", "esp32c2", "esp32c6", "esp32c61", "esp32c5","esp32h2", "esp32p4"] check_docs_gh_links: image: $ESP_IDF_DOC_ENV_IMAGE diff --git a/components/esp_driver_i2c/include/driver/i2c_types.h b/components/esp_driver_i2c/include/driver/i2c_types.h index 9010309e8f..1dffb25cea 100644 --- a/components/esp_driver_i2c/include/driver/i2c_types.h +++ b/components/esp_driver_i2c/include/driver/i2c_types.h @@ -109,7 +109,7 @@ typedef struct { * * @param[in] i2c_slave Handle for I2C slave. * @param[out] evt_cause I2C capture event cause, fed by driver - * @param[in] user_ctx User data, set in `i2c_slave_register_event_callbacks()` + * @param[in] arg User data, set in `i2c_slave_register_event_callbacks()` * * @return Whether a high priority task has been waken up by this function */ diff --git a/components/esp_hw_support/port/esp32c61/Kconfig.mac b/components/esp_hw_support/port/esp32c61/Kconfig.mac new file mode 100644 index 0000000000..2308100a79 --- /dev/null +++ b/components/esp_hw_support/port/esp32c61/Kconfig.mac @@ -0,0 +1,46 @@ +choice ESP32C61_UNIVERSAL_MAC_ADDRESSES + bool "Number of universally administered (by IEEE) MAC address" + default ESP32C61_UNIVERSAL_MAC_ADDRESSES_FOUR + help + Configure the number of universally administered (by IEEE) MAC addresses. + + During initialization, MAC addresses for each network interface are generated or derived from a + single base MAC address. + + If the number of universal MAC addresses is four, all four interfaces (WiFi station, WiFi softap, + Bluetooth and Ethernet) receive a universally administered MAC address. These are generated + sequentially by adding 0, 1, 2 and 3 (respectively) to the final octet of the base MAC address. + + If the number of universal MAC addresses is two, only two interfaces (WiFi station and Bluetooth) + receive a universally administered MAC address. These are generated sequentially by adding 0 + and 1 (respectively) to the base MAC address. The remaining two interfaces (WiFi softap and Ethernet) + receive local MAC addresses. These are derived from the universal WiFi station and Bluetooth MAC + addresses, respectively. + + When using the default (Espressif-assigned) base MAC address, either setting can be used. When using + a custom universal MAC address range, the correct setting will depend on the allocation of MAC + addresses in this range (either 2 or 4 per device.) + + Note that ESP32-C6 has no integrated Ethernet MAC. Although it's possible to use the esp_read_mac() + API to return a MAC for Ethernet, this can only be used with an external MAC peripheral. + + config ESP32C61_UNIVERSAL_MAC_ADDRESSES_TWO + bool "Two" + select ESP_MAC_UNIVERSAL_MAC_ADDRESSES_TWO + select ESP_MAC_ADDR_UNIVERSE_WIFI_STA + select ESP_MAC_ADDR_UNIVERSE_BT + + config ESP32C61_UNIVERSAL_MAC_ADDRESSES_FOUR + bool "Four" + select ESP_MAC_UNIVERSAL_MAC_ADDRESSES_FOUR + select ESP_MAC_ADDR_UNIVERSE_IEEE802154 + select ESP_MAC_ADDR_UNIVERSE_WIFI_STA + select ESP_MAC_ADDR_UNIVERSE_WIFI_AP + select ESP_MAC_ADDR_UNIVERSE_BT + select ESP_MAC_ADDR_UNIVERSE_ETH +endchoice + +config ESP32C61_UNIVERSAL_MAC_ADDRESSES + int + default 2 if ESP32C61_UNIVERSAL_MAC_ADDRESSES_TWO + default 4 if ESP32C61_UNIVERSAL_MAC_ADDRESSES_FOUR diff --git a/components/espcoredump/CMakeLists.txt b/components/espcoredump/CMakeLists.txt index fb87a68e40..d4d0686c7f 100644 --- a/components/espcoredump/CMakeLists.txt +++ b/components/espcoredump/CMakeLists.txt @@ -4,10 +4,6 @@ if(${target} STREQUAL "linux") return() # This component is not supported by the POSIX/Linux simulator endif() -if(${target} STREQUAL "esp32c61") - return() # TODO: [ESP32C61] IDF-9268 -endif() - set(srcs "src/core_dump_init.c" "src/core_dump_common.c" "src/core_dump_flash.c" diff --git a/components/soc/esp32c61/include/soc/Kconfig.soc_caps.in b/components/soc/esp32c61/include/soc/Kconfig.soc_caps.in index b54ce38e95..10b4001d21 100644 --- a/components/soc/esp32c61/include/soc/Kconfig.soc_caps.in +++ b/components/soc/esp32c61/include/soc/Kconfig.soc_caps.in @@ -595,10 +595,6 @@ config SOC_SPI_SUPPORT_CONTINUOUS_TRANS bool default y -config SOC_SPI_SUPPORT_SLAVE_HD_VER2 - bool - default y - config SOC_SPI_SUPPORT_CLK_XTAL bool default y @@ -1007,10 +1003,6 @@ config SOC_WIFI_CSI_SUPPORT bool default y -config SOC_WIFI_MESH_SUPPORT - bool - default y - config SOC_WIFI_HE_SUPPORT bool default y diff --git a/components/soc/esp32c61/include/soc/soc_caps.h b/components/soc/esp32c61/include/soc/soc_caps.h index 95af05d828..f947825157 100644 --- a/components/soc/esp32c61/include/soc/soc_caps.h +++ b/components/soc/esp32c61/include/soc/soc_caps.h @@ -17,64 +17,64 @@ #pragma once /*-------------------------- COMMON CAPS ---------------------------------------*/ -// #define SOC_ADC_SUPPORTED 1 //TODO: [ESP32C61] IDF-9302, IDF-9303, IDF-9304 -// #define SOC_DEDICATED_GPIO_SUPPORTED 1 //TODO: [ESP32C61] IDF-9321 +// \#define SOC_ADC_SUPPORTED 1 //TODO: [ESP32C61] IDF-9302, IDF-9303, IDF-9304 +// \#define SOC_DEDICATED_GPIO_SUPPORTED 1 //TODO: [ESP32C61] IDF-9321 #define SOC_UART_SUPPORTED 1 //TODO: [ESP32C61] IDF-9320 -// #define SOC_GDMA_SUPPORTED 1 //TODO: [ESP32C61] IDF-9310, IDF-9311 -// #define SOC_AHB_GDMA_SUPPORTED 1 //TODO: [ESP32C61] IDF-9310, IDF-9311 -// #define SOC_GPTIMER_SUPPORTED 1 //TODO: [ESP32C61] IDF-9306 -// #define SOC_BT_SUPPORTED 1 -// #define SOC_IEEE802154_SUPPORTED 1 -// #define SOC_ASYNC_MEMCPY_SUPPORTED 1 //TODO: [ESP32C61] IDF-9315 -// #define SOC_USB_SERIAL_JTAG_SUPPORTED 1 //TODO: [ESP32C61] IDF-9319 -// #define SOC_TEMP_SENSOR_SUPPORTED 1 //TODO: [ESP32C61] IDF-9322 -// #define SOC_WIFI_SUPPORTED 1 +// \#define SOC_GDMA_SUPPORTED 1 //TODO: [ESP32C61] IDF-9310, IDF-9311 +// \#define SOC_AHB_GDMA_SUPPORTED 1 //TODO: [ESP32C61] IDF-9310, IDF-9311 +// \#define SOC_GPTIMER_SUPPORTED 1 //TODO: [ESP32C61] IDF-9306 +// \#define SOC_BT_SUPPORTED 1 +// \#define SOC_IEEE802154_SUPPORTED 1 +// \#define SOC_ASYNC_MEMCPY_SUPPORTED 1 //TODO: [ESP32C61] IDF-9315 +// \#define SOC_USB_SERIAL_JTAG_SUPPORTED 1 //TODO: [ESP32C61] IDF-9319 +// \#define SOC_TEMP_SENSOR_SUPPORTED 1 //TODO: [ESP32C61] IDF-9322 +// \#define SOC_WIFI_SUPPORTED 1 #define SOC_SUPPORTS_SECURE_DL_MODE 1 -// #define SOC_ULP_SUPPORTED 1 +// \#define SOC_ULP_SUPPORTED 1 #define SOC_EFUSE_KEY_PURPOSE_FIELD 1 #define SOC_EFUSE_SUPPORTED 1 #define SOC_RTC_FAST_MEM_SUPPORTED 1 #define SOC_RTC_MEM_SUPPORTED 1 //TODO: [ESP32C61] IDF-9274 -// #define SOC_I2S_SUPPORTED 1 //TODO: [ESP32C61] IDF-9312, IDF-9313 -// #define SOC_GPSPI_SUPPORTED 1 //TODO: [ESP32C61] IDF-9299, IDF-9300, IDF-9301 -// #define SOC_LEDC_SUPPORTED 1 //TODO: [ESP32C61] IDF-9291 -// #define SOC_I2C_SUPPORTED 1 //TODO: [ESP32C61] IDF-9296, IDF-9297 +// \#define SOC_I2S_SUPPORTED 1 //TODO: [ESP32C61] IDF-9312, IDF-9313 +// \#define SOC_GPSPI_SUPPORTED 1 //TODO: [ESP32C61] IDF-9299, IDF-9300, IDF-9301 +// \#define SOC_LEDC_SUPPORTED 1 //TODO: [ESP32C61] IDF-9291 +// \#define SOC_I2C_SUPPORTED 1 //TODO: [ESP32C61] IDF-9296, IDF-9297 #define SOC_SYSTIMER_SUPPORTED 1 //TODO: [ESP32C61] IDF-9307, IDF-9308 -// #define SOC_SUPPORT_COEXISTENCE 1 -// #define SOC_MPI_SUPPORTED 1 -// #define SOC_SHA_SUPPORTED 1 //TODO: [ESP32C61] IDF-9234 -// #define SOC_HMAC_SUPPORTED 1 //TODO: [ESP32C61] IDF-9323 -// #define SOC_DIG_SIGN_SUPPORTED 1 //TODO: [ESP32C61] IDF-9325 -// #define SOC_ECC_SUPPORTED 1 //TODO: [ESP32C61] IDF-9235 +// \#define SOC_SUPPORT_COEXISTENCE 1 +// \#define SOC_MPI_SUPPORTED 1 +// \#define SOC_SHA_SUPPORTED 1 //TODO: [ESP32C61] IDF-9234 +// \#define SOC_HMAC_SUPPORTED 1 //TODO: [ESP32C61] IDF-9323 +// \#define SOC_DIG_SIGN_SUPPORTED 1 //TODO: [ESP32C61] IDF-9325 +// \#define SOC_ECC_SUPPORTED 1 //TODO: [ESP32C61] IDF-9235 #define SOC_FLASH_ENC_SUPPORTED 1 //TODO: [ESP32C61] IDF-9232 -// #define SOC_SECURE_BOOT_SUPPORTED 1 //TODO: [ESP32C61] IDF-9233 -// #define SOC_BOD_SUPPORTED 1 //TODO: [ESP32C61] IDF-9254 -// #define SOC_APM_SUPPORTED 1 //TODO: [ESP32C61] IDF-9230 -// #define SOC_PMU_SUPPORTED 1 //TODO: [ESP32C61] IDf-9250 -// #define SOC_LP_TIMER_SUPPORTED 1 //TODO: [ESP32C61] IDF-9244 -// #define SOC_LP_AON_SUPPORTED 1 -// #define SOC_LP_PERIPHERALS_SUPPORTED 1 -// #define SOC_CLK_TREE_SUPPORTED 1 //TODO: [ESP32C61] IDF-9249 -// #define SOC_ASSIST_DEBUG_SUPPORTED 1 //TODO: [ESP32C61] IDF-9270 -// #define SOC_WDT_SUPPORTED 1 //TODO: [ESP32C61] IDF-9257 +// \#define SOC_SECURE_BOOT_SUPPORTED 1 //TODO: [ESP32C61] IDF-9233 +// \#define SOC_BOD_SUPPORTED 1 //TODO: [ESP32C61] IDF-9254 +// \#define SOC_APM_SUPPORTED 1 //TODO: [ESP32C61] IDF-9230 +// \#define SOC_PMU_SUPPORTED 1 //TODO: [ESP32C61] IDf-9250 +// \#define SOC_LP_TIMER_SUPPORTED 1 //TODO: [ESP32C61] IDF-9244 +// \#define SOC_LP_AON_SUPPORTED 1 +// \#define SOC_LP_PERIPHERALS_SUPPORTED 1 +// \#define SOC_CLK_TREE_SUPPORTED 1 //TODO: [ESP32C61] IDF-9249 +// \#define SOC_ASSIST_DEBUG_SUPPORTED 1 //TODO: [ESP32C61] IDF-9270 +// \#define SOC_WDT_SUPPORTED 1 //TODO: [ESP32C61] IDF-9257 #define SOC_SPI_FLASH_SUPPORTED 1 //TODO: [ESP32C61] IDF-9314 -// #define SOC_RNG_SUPPORTED 1 //TODO: [ESP32C61] IDF-9236 -// #define SOC_MODEM_CLOCK_SUPPORTED 1 -// #define SOC_REG_I2C_SUPPORTED 1 //TODO: [ESP32C61] IDF-9276 +// \#define SOC_RNG_SUPPORTED 1 //TODO: [ESP32C61] IDF-9236 +// \#define SOC_MODEM_CLOCK_SUPPORTED 1 +// \#define SOC_REG_I2C_SUPPORTED 1 //TODO: [ESP32C61] IDF-9276 -// #define SOC_PCNT_SUPPORTED 0 //TODO: [ESP32C61] IDF-9332 -// #define SOC_MCPWM_SUPPORTED 0 //TODO: [ESP32C61] IDF-9338 -// #define SOC_TWAI_SUPPORTED 0 //TODO: [ESP32C61] IDF-9336 -// #define SOC_ETM_SUPPORTED 0 -// #define SOC_PARLIO_SUPPORTED 0 //TODO: [ESP32C61] IDF-9333, 9334 -// #define SOC_LP_CORE_SUPPORTED 0 //TODO: [ESP32C61] IDF-9331 -// #define SOC_RMT_SUPPORTED 0 //TODO: [ESP32C61] IDF-9343 -// #define SOC_AES_SUPPORTED 0 //TODO: [ESP32C61] IDF-9328 -// #define SOC_SDIO_SLAVE_SUPPORTED 0 -// #define SOC_PAU_SUPPORTED 0 -// #define SOC_LP_I2C_SUPPORTED 0 //TODO: [ESP32C61] IDF-9330, IDF-9337 -// #define SOC_ULP_LP_UART_SUPPORTED 0 //TODO: [ESP32C61] IDF-9329, IDF-9341 -// #define SOC_PM_SUPPORTED 1 +// \#define SOC_PCNT_SUPPORTED 0 //TODO: [ESP32C61] IDF-9332 +// \#define SOC_MCPWM_SUPPORTED 0 //TODO: [ESP32C61] IDF-9338 +// \#define SOC_TWAI_SUPPORTED 0 //TODO: [ESP32C61] IDF-9336 +// \#define SOC_ETM_SUPPORTED 0 +// \#define SOC_PARLIO_SUPPORTED 0 //TODO: [ESP32C61] IDF-9333, 9334 +// \#define SOC_LP_CORE_SUPPORTED 0 //TODO: [ESP32C61] IDF-9331 +// \#define SOC_RMT_SUPPORTED 0 //TODO: [ESP32C61] IDF-9343 +// \#define SOC_AES_SUPPORTED 0 //TODO: [ESP32C61] IDF-9328 +// \#define SOC_SDIO_SLAVE_SUPPORTED 0 +// \#define SOC_PAU_SUPPORTED 0 +// \#define SOC_LP_I2C_SUPPORTED 0 //TODO: [ESP32C61] IDF-9330, IDF-9337 +// \#define SOC_ULP_LP_UART_SUPPORTED 0 //TODO: [ESP32C61] IDF-9329, IDF-9341 +// \#define SOC_PM_SUPPORTED 1 /*-------------------------- XTAL CAPS ---------------------------------------*/ #define SOC_XTAL_SUPPORT_40M 1 @@ -91,43 +91,43 @@ //TODO: [ESP32C61] IDF-9302, IDF-9303, IDF-9304 /*-------------------------- ADC CAPS -------------------------------*/ /*!< SAR ADC Module*/ -// #define SOC_ADC_DIG_CTRL_SUPPORTED 1 -// #define SOC_ADC_DIG_IIR_FILTER_SUPPORTED 1 -// #define SOC_ADC_MONITOR_SUPPORTED 1 -// #define SOC_ADC_DIG_SUPPORTED_UNIT(UNIT) 1 //Digital controller supported ADC unit -// #define SOC_ADC_DMA_SUPPORTED 1 +// \#define SOC_ADC_DIG_CTRL_SUPPORTED 1 +// \#define SOC_ADC_DIG_IIR_FILTER_SUPPORTED 1 +// \#define SOC_ADC_MONITOR_SUPPORTED 1 +// \#define SOC_ADC_DIG_SUPPORTED_UNIT(UNIT) 1 //Digital controller supported ADC unit +// \#define SOC_ADC_DMA_SUPPORTED 1 #define SOC_ADC_PERIPH_NUM (1U) #define SOC_ADC_MAX_CHANNEL_NUM (7) -// #define SOC_ADC_CHANNEL_NUM(PERIPH_NUM) (7) -// #define SOC_ADC_ATTEN_NUM (4) +// \#define SOC_ADC_CHANNEL_NUM(PERIPH_NUM) (7) +// \#define SOC_ADC_ATTEN_NUM (4) // /*!< Digital */ -// #define SOC_ADC_DIGI_CONTROLLER_NUM (1U) -// #define SOC_ADC_PATT_LEN_MAX (8) /*!< Two pattern tables, each contains 4 items. Each item takes 1 byte */ -// #define SOC_ADC_DIGI_MAX_BITWIDTH (12) -// #define SOC_ADC_DIGI_MIN_BITWIDTH (12) -// #define SOC_ADC_DIGI_IIR_FILTER_NUM (2) -// #define SOC_ADC_DIGI_MONITOR_NUM (2) -// #define SOC_ADC_DIGI_RESULT_BYTES (4) -// #define SOC_ADC_DIGI_DATA_BYTES_PER_CONV (4) +// \#define SOC_ADC_DIGI_CONTROLLER_NUM (1U) +// \#define SOC_ADC_PATT_LEN_MAX (8) /*!< Two pattern tables, each contains 4 items. Each item takes 1 byte */ +// \#define SOC_ADC_DIGI_MAX_BITWIDTH (12) +// \#define SOC_ADC_DIGI_MIN_BITWIDTH (12) +// \#define SOC_ADC_DIGI_IIR_FILTER_NUM (2) +// \#define SOC_ADC_DIGI_MONITOR_NUM (2) +// \#define SOC_ADC_DIGI_RESULT_BYTES (4) +// \#define SOC_ADC_DIGI_DATA_BYTES_PER_CONV (4) // /*!< F_sample = F_digi_con / 2 / interval. F_digi_con = 5M for now. 30 <= interval <= 4095 */ -// #define SOC_ADC_SAMPLE_FREQ_THRES_HIGH 83333 -// #define SOC_ADC_SAMPLE_FREQ_THRES_LOW 611 +// \#define SOC_ADC_SAMPLE_FREQ_THRES_HIGH 83333 +// \#define SOC_ADC_SAMPLE_FREQ_THRES_LOW 611 // /*!< RTC */ -// #define SOC_ADC_RTC_MIN_BITWIDTH (12) -// #define SOC_ADC_RTC_MAX_BITWIDTH (12) +// \#define SOC_ADC_RTC_MIN_BITWIDTH (12) +// \#define SOC_ADC_RTC_MAX_BITWIDTH (12) // /*!< Calibration */ // TODO: [ESP32C61] IDF-9303 -// #define SOC_ADC_CALIBRATION_V1_SUPPORTED (1) /*!< support HW offset calibration version 1*/ -// #define SOC_ADC_SELF_HW_CALI_SUPPORTED (1) /*!< support HW offset self calibration */ -// #define SOC_ADC_CALIB_CHAN_COMPENS_SUPPORTED (1) /*!< support channel compensation to the HW offset calibration */ +// \#define SOC_ADC_CALIBRATION_V1_SUPPORTED (1) /*!< support HW offset calibration version 1*/ +// \#define SOC_ADC_SELF_HW_CALI_SUPPORTED (1) /*!< support HW offset self calibration */ +// \#define SOC_ADC_CALIB_CHAN_COMPENS_SUPPORTED (1) /*!< support channel compensation to the HW offset calibration */ /*!< Interrupt */ #define SOC_ADC_TEMPERATURE_SHARE_INTR (1) /*!< ADC power control is shared by PWDET */ -// #define SOC_ADC_SHARED_POWER 1 +// \#define SOC_ADC_SHARED_POWER 1 /*-------------------------- APB BACKUP DMA CAPS -------------------------------*/ #define SOC_APB_BACKUP_DMA (0) @@ -169,10 +169,10 @@ //TODO: [ESP32C61] IDF-9310 /*-------------------------- GDMA CAPS -------------------------------------*/ -// #define SOC_AHB_GDMA_VERSION 1U -// #define SOC_GDMA_NUM_GROUPS_MAX 1U -// #define SOC_GDMA_PAIRS_PER_GROUP_MAX 3 -// #define SOC_GDMA_SUPPORT_ETM 1 // Support ETM submodule +// \#define SOC_AHB_GDMA_VERSION 1U +// \#define SOC_GDMA_NUM_GROUPS_MAX 1U +// \#define SOC_GDMA_PAIRS_PER_GROUP_MAX 3 +// \#define SOC_GDMA_SUPPORT_ETM 1 // Support ETM submodule /*-------------------------- ETM CAPS --------------------------------------*/ #define SOC_ETM_GROUPS 1U // Number of ETM groups @@ -182,16 +182,16 @@ // ESP32-C61 has 1 GPIO peripheral #define SOC_GPIO_PORT 1U #define SOC_GPIO_PIN_COUNT 22 -// #define SOC_GPIO_SUPPORT_PIN_GLITCH_FILTER 1 //TODO: [ESP32C61] IDF-9340 +// \#define SOC_GPIO_SUPPORT_PIN_GLITCH_FILTER 1 //TODO: [ESP32C61] IDF-9340 // GPIO peripheral has the ETM extension -// #define SOC_GPIO_SUPPORT_ETM 1 //TODO: [ESP32C61] IDF-9340 +// \#define SOC_GPIO_SUPPORT_ETM 1 //TODO: [ESP32C61] IDF-9340 // Target has the full LP IO subsystem // On ESP32-C61, Digital IOs have their own registers to control pullup/down capability, independent of LP registers. #define SOC_GPIO_SUPPORT_RTC_INDEPENDENT (1) // GPIO0~7 on ESP32C61 can support chip deep sleep wakeup -// #define SOC_GPIO_SUPPORT_DEEPSLEEP_WAKEUP (1) //TODO:reopen +// \#define SOC_GPIO_SUPPORT_DEEPSLEEP_WAKEUP (1) //TODO:reopen #define SOC_GPIO_VALID_GPIO_MASK ((1U<&1 | tee openocd.log + +--- + +.. run-gdb-remotelog + +:: + + riscv32-esp-elf-gdb -ex "set remotelogfile gdb_log.txt" + +--- + +.. devkit-defs + +.. |devkit-name| replace:: ESP32-C61 +.. |devkit-name-with-link| replace:: :doc:`ESP32-C61 <../../hw-reference/index>` + +--- + +.. devkit-hw-config + +* Out of the box, ESP32-C61 doesn't need any additional hardware configuration for JTAG debugging. + +--- diff --git a/docs/en/api-guides/partition-tables.rst b/docs/en/api-guides/partition-tables.rst index c452e82d47..e51659bc00 100644 --- a/docs/en/api-guides/partition-tables.rst +++ b/docs/en/api-guides/partition-tables.rst @@ -89,7 +89,7 @@ The ESP-IDF bootloader ignores any partition types other than ``app`` (0x00) and SubType ~~~~~~~ -{IDF_TARGET_ESP_PHY_REF:default = ":ref:`CONFIG_ESP_PHY_INIT_DATA_IN_PARTITION`", esp32p4, esp32c5="NOT UPDATED YET"} +{IDF_TARGET_ESP_PHY_REF:default = ":ref:`CONFIG_ESP_PHY_INIT_DATA_IN_PARTITION`", esp32p4, esp32c5, esp32c61="NOT UPDATED YET"} The 8-bit SubType field is specific to a given partition type. ESP-IDF currently only specifies the meaning of the subtype field for ``app`` and ``data`` partition types. diff --git a/docs/en/api-reference/system/inc/espefuse_summary_ESP32-C61.rst b/docs/en/api-reference/system/inc/espefuse_summary_ESP32-C61.rst new file mode 100644 index 0000000000..0de70dbde5 --- /dev/null +++ b/docs/en/api-reference/system/inc/espefuse_summary_ESP32-C61.rst @@ -0,0 +1,10 @@ +.. code-block:: none + + ... + + +To get a dump for all eFuse registers. + +.. code-block:: none + + ... diff --git a/docs/en/api-reference/system/inc/power_management_esp32c61.rst b/docs/en/api-reference/system/inc/power_management_esp32c61.rst new file mode 100644 index 0000000000..7172578e92 --- /dev/null +++ b/docs/en/api-reference/system/inc/power_management_esp32c61.rst @@ -0,0 +1,19 @@ ++---------------+---------------------------------------+-------------------------------------+ +| Max CPU | Lock Acquisition | CPU and APB Frequencies | +| Frequency Set | | | ++---------------+---------------------------------------+-------------------------------------+ +| 160 | ``ESP_PM_CPU_FREQ_MAX`` acquired | | CPU: 160 MHz | +| | | | APB: 80 MHz | ++ +---------------------------------------+-------------------------------------+ +| | ``ESP_PM_APB_FREQ_MAX`` acquired, | | CPU: 80 MHz | +| | ``ESP_PM_CPU_FREQ_MAX`` not acquired | | APB: 80 MHz | ++ +---------------------------------------+-------------------------------------+ +| | None | Min values for both frequencies set | +| | | with :cpp:func:`esp_pm_configure` | ++---------------+---------------------------------------+-------------------------------------+ +| 80 | | Any of ``ESP_PM_CPU_FREQ_MAX`` | | CPU: 80 MHz | +| | | or ``ESP_PM_APB_FREQ_MAX`` acquired | | APB: 80 MHz | ++ +---------------------------------------+-------------------------------------+ +| | None | Min values for both frequencies set | +| | | with :cpp:func:`esp_pm_configure` | ++---------------+---------------------------------------+-------------------------------------+ diff --git a/docs/en/api-reference/system/inc/show-efuse-table_ESP32-C61.rst b/docs/en/api-reference/system/inc/show-efuse-table_ESP32-C61.rst new file mode 100644 index 0000000000..c18ac8f9ea --- /dev/null +++ b/docs/en/api-reference/system/inc/show-efuse-table_ESP32-C61.rst @@ -0,0 +1,174 @@ + +.. code-block:: none + + $ ./efuse_table_gen.py -t IDF_TARGET_PATH_NAME {IDF_TARGET_PATH_NAME}/esp_efuse_table.csv --info + + Max number of bits in BLK 256 + Parsing efuse CSV input file esp32c61/esp_efuse_table.csv ... + Verifying efuse table... + Sorted efuse table: + # field_name efuse_block bit_start bit_count + 1 WR_DIS EFUSE_BLK0 0 32 + 2 WR_DIS.RD_DIS EFUSE_BLK0 0 1 + 3 WR_DIS.CRYPT_DPA_ENABLE EFUSE_BLK0 1 1 + 4 WR_DIS.SWAP_UART_SDIO_EN EFUSE_BLK0 2 1 + 5 WR_DIS.DIS_ICACHE EFUSE_BLK0 2 1 + 6 WR_DIS.DIS_USB_JTAG EFUSE_BLK0 2 1 + 7 WR_DIS.DIS_DOWNLOAD_ICACHE EFUSE_BLK0 2 1 + 8 WR_DIS.DIS_USB_SERIAL_JTAG EFUSE_BLK0 2 1 + 9 WR_DIS.DIS_FORCE_DOWNLOAD EFUSE_BLK0 2 1 + 10 WR_DIS.DIS_TWAI EFUSE_BLK0 2 1 + 11 WR_DIS.JTAG_SEL_ENABLE EFUSE_BLK0 2 1 + 12 WR_DIS.DIS_PAD_JTAG EFUSE_BLK0 2 1 + 13 WR_DIS.DIS_DOWNLOAD_MANUAL_ENCRYPT EFUSE_BLK0 2 1 + 14 WR_DIS.WDT_DELAY_SEL EFUSE_BLK0 3 1 + 15 WR_DIS.SPI_BOOT_CRYPT_CNT EFUSE_BLK0 4 1 + 16 WR_DIS.SECURE_BOOT_KEY_REVOKE0 EFUSE_BLK0 5 1 + 17 WR_DIS.SECURE_BOOT_KEY_REVOKE1 EFUSE_BLK0 6 1 + 18 WR_DIS.SECURE_BOOT_KEY_REVOKE2 EFUSE_BLK0 7 1 + 19 WR_DIS.KEY_PURPOSE_0 EFUSE_BLK0 8 1 + 20 WR_DIS.KEY_PURPOSE_1 EFUSE_BLK0 9 1 + 21 WR_DIS.KEY_PURPOSE_2 EFUSE_BLK0 10 1 + 22 WR_DIS.KEY_PURPOSE_3 EFUSE_BLK0 11 1 + 23 WR_DIS.KEY_PURPOSE_4 EFUSE_BLK0 12 1 + 24 WR_DIS.KEY_PURPOSE_5 EFUSE_BLK0 13 1 + 25 WR_DIS.SEC_DPA_LEVEL EFUSE_BLK0 14 1 + 26 WR_DIS.SECURE_BOOT_EN EFUSE_BLK0 15 1 + 27 WR_DIS.SECURE_BOOT_AGGRESSIVE_REVOKE EFUSE_BLK0 16 1 + 28 WR_DIS.SPI_DOWNLOAD_MSPI_DIS EFUSE_BLK0 17 1 + 29 WR_DIS.FLASH_TPUW EFUSE_BLK0 18 1 + 30 WR_DIS.DIS_DOWNLOAD_MODE EFUSE_BLK0 18 1 + 31 WR_DIS.DIS_DIRECT_BOOT EFUSE_BLK0 18 1 + 32 WR_DIS.DIS_USB_SERIAL_JTAG_ROM_PRINT EFUSE_BLK0 18 1 + 33 WR_DIS.DIS_USB_SERIAL_JTAG_DOWNLOAD_MODE EFUSE_BLK0 18 1 + 34 WR_DIS.ENABLE_SECURITY_DOWNLOAD EFUSE_BLK0 18 1 + 35 WR_DIS.UART_PRINT_CONTROL EFUSE_BLK0 18 1 + 36 WR_DIS.FORCE_SEND_RESUME EFUSE_BLK0 18 1 + 37 WR_DIS.SECURE_VERSION EFUSE_BLK0 18 1 + 38 WR_DIS.SECURE_BOOT_DISABLE_FAST_WAKE EFUSE_BLK0 19 1 + 39 WR_DIS.DISABLE_WAFER_VERSION_MAJOR EFUSE_BLK0 19 1 + 40 WR_DIS.DISABLE_BLK_VERSION_MAJOR EFUSE_BLK0 19 1 + 41 WR_DIS.BLK1 EFUSE_BLK0 20 1 + 42 WR_DIS.MAC EFUSE_BLK0 20 1 + 43 WR_DIS.MAC_EXT EFUSE_BLK0 20 1 + 44 WR_DIS.WAFER_VERSION_MINOR EFUSE_BLK0 20 1 + 45 WR_DIS.WAFER_VERSION_MAJOR EFUSE_BLK0 20 1 + 46 WR_DIS.PKG_VERSION EFUSE_BLK0 20 1 + 47 WR_DIS.BLK_VERSION_MINOR EFUSE_BLK0 20 1 + 48 WR_DIS.BLK_VERSION_MAJOR EFUSE_BLK0 20 1 + 49 WR_DIS.FLASH_CAP EFUSE_BLK0 20 1 + 50 WR_DIS.FLASH_TEMP EFUSE_BLK0 20 1 + 51 WR_DIS.FLASH_VENDOR EFUSE_BLK0 20 1 + 52 WR_DIS.SYS_DATA_PART1 EFUSE_BLK0 21 1 + 53 WR_DIS.OPTIONAL_UNIQUE_ID EFUSE_BLK0 21 1 + 54 WR_DIS.BLOCK_USR_DATA EFUSE_BLK0 22 1 + 55 WR_DIS.CUSTOM_MAC EFUSE_BLK0 22 1 + 56 WR_DIS.BLOCK_KEY0 EFUSE_BLK0 23 1 + 57 WR_DIS.BLOCK_KEY1 EFUSE_BLK0 24 1 + 58 WR_DIS.BLOCK_KEY2 EFUSE_BLK0 25 1 + 59 WR_DIS.BLOCK_KEY3 EFUSE_BLK0 26 1 + 60 WR_DIS.BLOCK_KEY4 EFUSE_BLK0 27 1 + 61 WR_DIS.BLOCK_KEY5 EFUSE_BLK0 28 1 + 62 WR_DIS.BLOCK_SYS_DATA2 EFUSE_BLK0 29 1 + 63 WR_DIS.USB_EXCHG_PINS EFUSE_BLK0 30 1 + 64 WR_DIS.VDD_SPI_AS_GPIO EFUSE_BLK0 30 1 + 65 WR_DIS.SOFT_DIS_JTAG EFUSE_BLK0 31 1 + 66 RD_DIS EFUSE_BLK0 32 7 + 67 RD_DIS.BLOCK_KEY0 EFUSE_BLK0 32 1 + 68 RD_DIS.BLOCK_KEY1 EFUSE_BLK0 33 1 + 69 RD_DIS.BLOCK_KEY2 EFUSE_BLK0 34 1 + 70 RD_DIS.BLOCK_KEY3 EFUSE_BLK0 35 1 + 71 RD_DIS.BLOCK_KEY4 EFUSE_BLK0 36 1 + 72 RD_DIS.BLOCK_KEY5 EFUSE_BLK0 37 1 + 73 RD_DIS.BLOCK_SYS_DATA2 EFUSE_BLK0 38 1 + 74 SWAP_UART_SDIO_EN EFUSE_BLK0 39 1 + 75 DIS_ICACHE EFUSE_BLK0 40 1 + 76 DIS_USB_JTAG EFUSE_BLK0 41 1 + 77 DIS_DOWNLOAD_ICACHE EFUSE_BLK0 42 1 + 78 DIS_USB_SERIAL_JTAG EFUSE_BLK0 43 1 + 79 DIS_FORCE_DOWNLOAD EFUSE_BLK0 44 1 + 80 SPI_DOWNLOAD_MSPI_DIS EFUSE_BLK0 45 1 + 81 DIS_TWAI EFUSE_BLK0 46 1 + 82 JTAG_SEL_ENABLE EFUSE_BLK0 47 1 + 83 SOFT_DIS_JTAG EFUSE_BLK0 48 3 + 84 DIS_PAD_JTAG EFUSE_BLK0 51 1 + 85 DIS_DOWNLOAD_MANUAL_ENCRYPT EFUSE_BLK0 52 1 + 86 USB_EXCHG_PINS EFUSE_BLK0 57 1 + 87 VDD_SPI_AS_GPIO EFUSE_BLK0 58 1 + 88 WDT_DELAY_SEL EFUSE_BLK0 80 2 + 89 SPI_BOOT_CRYPT_CNT EFUSE_BLK0 82 3 + 90 SECURE_BOOT_KEY_REVOKE0 EFUSE_BLK0 85 1 + 91 SECURE_BOOT_KEY_REVOKE1 EFUSE_BLK0 86 1 + 92 SECURE_BOOT_KEY_REVOKE2 EFUSE_BLK0 87 1 + 93 KEY_PURPOSE_0 EFUSE_BLK0 88 4 + 94 KEY_PURPOSE_1 EFUSE_BLK0 92 4 + 95 KEY_PURPOSE_2 EFUSE_BLK0 96 4 + 96 KEY_PURPOSE_3 EFUSE_BLK0 100 4 + 97 KEY_PURPOSE_4 EFUSE_BLK0 104 4 + 98 KEY_PURPOSE_5 EFUSE_BLK0 108 4 + 99 SEC_DPA_LEVEL EFUSE_BLK0 112 2 + 100 CRYPT_DPA_ENABLE EFUSE_BLK0 114 1 + 101 SECURE_BOOT_EN EFUSE_BLK0 116 1 + 102 SECURE_BOOT_AGGRESSIVE_REVOKE EFUSE_BLK0 117 1 + 103 FLASH_TPUW EFUSE_BLK0 124 4 + 104 DIS_DOWNLOAD_MODE EFUSE_BLK0 128 1 + 105 DIS_DIRECT_BOOT EFUSE_BLK0 129 1 + 106 DIS_USB_SERIAL_JTAG_ROM_PRINT EFUSE_BLK0 130 1 + 107 DIS_USB_SERIAL_JTAG_DOWNLOAD_MODE EFUSE_BLK0 132 1 + 108 ENABLE_SECURITY_DOWNLOAD EFUSE_BLK0 133 1 + 109 UART_PRINT_CONTROL EFUSE_BLK0 134 2 + 110 FORCE_SEND_RESUME EFUSE_BLK0 141 1 + 111 SECURE_VERSION EFUSE_BLK0 142 16 + 112 SECURE_BOOT_DISABLE_FAST_WAKE EFUSE_BLK0 158 1 + 113 DISABLE_WAFER_VERSION_MAJOR EFUSE_BLK0 160 1 + 114 DISABLE_BLK_VERSION_MAJOR EFUSE_BLK0 161 1 + 115 MAC EFUSE_BLK1 0 8 + 116 MAC EFUSE_BLK1 8 8 + 117 MAC EFUSE_BLK1 16 8 + 118 MAC EFUSE_BLK1 24 8 + 119 MAC EFUSE_BLK1 32 8 + 120 MAC EFUSE_BLK1 40 8 + 121 MAC_EXT EFUSE_BLK1 48 16 + 122 WAFER_VERSION_MINOR EFUSE_BLK1 114 4 + 123 WAFER_VERSION_MAJOR EFUSE_BLK1 118 2 + 124 PKG_VERSION EFUSE_BLK1 120 3 + 125 BLK_VERSION_MINOR EFUSE_BLK1 123 3 + 126 BLK_VERSION_MAJOR EFUSE_BLK1 126 2 + 127 FLASH_CAP EFUSE_BLK1 128 3 + 128 FLASH_TEMP EFUSE_BLK1 131 2 + 129 FLASH_VENDOR EFUSE_BLK1 133 3 + 130 SYS_DATA_PART2 EFUSE_BLK10 0 256 + 131 OPTIONAL_UNIQUE_ID EFUSE_BLK2 0 128 + 132 USER_DATA EFUSE_BLK3 0 256 + 133 USER_DATA.MAC_CUSTOM EFUSE_BLK3 200 48 + 134 KEY0 EFUSE_BLK4 0 256 + 135 KEY1 EFUSE_BLK5 0 256 + 136 KEY2 EFUSE_BLK6 0 256 + 137 KEY3 EFUSE_BLK7 0 256 + 138 KEY4 EFUSE_BLK8 0 256 + 139 KEY5 EFUSE_BLK9 0 256 + + Used bits in efuse table: + EFUSE_BLK0 + [0 31] [0 2] [2 2] ... [30 38] [32 52] [57 58] [80 114] [116 117] [124 130] [132 135] [141 158] [160 161] + EFUSE_BLK1 + [0 63] [114 135] + EFUSE_BLK10 + [0 255] + EFUSE_BLK2 + [0 127] + EFUSE_BLK3 + [0 255] [200 247] + EFUSE_BLK4 + [0 255] + EFUSE_BLK5 + [0 255] + EFUSE_BLK6 + [0 255] + EFUSE_BLK7 + [0 255] + EFUSE_BLK8 + [0 255] + EFUSE_BLK9 + [0 255] + Note: Not printed ranges are free for using. (bits in EFUSE_BLK0 are reserved for Espressif) diff --git a/docs/en/get-started/esp32c61_output_log.inc b/docs/en/get-started/esp32c61_output_log.inc new file mode 100644 index 0000000000..78b7e23f12 --- /dev/null +++ b/docs/en/get-started/esp32c61_output_log.inc @@ -0,0 +1,5 @@ +.. output_log + +.. code-block:: none + + ... diff --git a/docs/en/security/esp32c61_log.inc b/docs/en/security/esp32c61_log.inc new file mode 100644 index 0000000000..dbd7e68542 --- /dev/null +++ b/docs/en/security/esp32c61_log.inc @@ -0,0 +1,18 @@ + +.. first_boot_enc + +.. code-block:: none + + ... + + +------ + +.. already_en_enc + +.. code-block:: none + + ... + + +------ diff --git a/docs/zh_CN/api-guides/index.rst b/docs/zh_CN/api-guides/index.rst index 828316b502..61271e78c2 100644 --- a/docs/zh_CN/api-guides/index.rst +++ b/docs/zh_CN/api-guides/index.rst @@ -34,7 +34,7 @@ API 指南 partition-tables performance/index reproducible-builds - :(SOC_WIFI_SUPPORTED or SOC_BT_SUPPORTED or SOC_IEEE802154_SUPPORTED) and not esp32c5: RF_calibration + :(SOC_WIFI_SUPPORTED or SOC_BT_SUPPORTED or SOC_IEEE802154_SUPPORTED) and not esp32c5 and not esp32c61: RF_calibration thread-local-storage tools/index unit-tests diff --git a/docs/zh_CN/api-guides/jtag-debugging/esp32c61.inc b/docs/zh_CN/api-guides/jtag-debugging/esp32c61.inc new file mode 100644 index 0000000000..364cf58085 --- /dev/null +++ b/docs/zh_CN/api-guides/jtag-debugging/esp32c61.inc @@ -0,0 +1,173 @@ +.. This file gets included from other .rst files in this folder. +.. It contains target-specific snippets. +.. Comments and '---' lines act as delimiters. +.. +.. This is necessary mainly because RST doesn't support substitutions +.. (defined in RST, not in Python) inside code blocks. If that is ever implemented, +.. These code blocks can be moved back to the main .rst files, with target-specific +.. file names being replaced by substitutions. + +.. run-openocd + +:: + + openocd -f board/esp32c61-builtin.cfg + +.. |run-openocd-device-name| replace:: ESP32-C61 through built-in USB connection + +--- + +.. run-openocd-output + +:: + + user-name@computer-name:~/esp/esp-idf$ openocd -f board/esp32c61-builtin.cfg + Open On-Chip Debugger v0.11.0-esp32-20221026-85-g0718fffd (2023-01-12-07:28) + Licensed under GNU GPL v2 + For bug reports, read + http://openocd.org/doc/doxygen/bugs.html + Info : only one transport option; autoselect 'jtag' + Info : esp_usb_jtag: VID set to 0x303a and PID to 0x1001 + Info : esp_usb_jtag: capabilities descriptor set to 0x2000 + Warn : Transport "jtag" was already selected + WARNING: ESP flash support is disabled! + force hard breakpoints + Info : Listening on port 6666 for tcl connections + Info : Listening on port 4444 for telnet connections + Info : esp_usb_jtag: serial (60:55:F9:F6:03:3C) + Info : esp_usb_jtag: Device found. Base speed 24000KHz, div range 1 to 255 + Info : clock speed 24000 kHz + Info : JTAG tap: esp32c61.cpu tap/device found: 0x0000dc25 (mfg: 0x612 (Espressif Systems), part: 0x000d, ver: 0x0) + Info : datacount=2 progbufsize=16 + Info : Examined RISC-V core; found 2 harts + Info : hart 0: XLEN=32, misa=0x40903105 + Info : starting gdb server for esp32c61 on 3333 + Info : Listening on port 3333 for gdb connections + +.. |run-openocd-cfg-file-err| replace:: ``Can't find board/esp32c61-builtin.cfg`` + +--- + +.. run-openocd-upload + +:: + + openocd -f board/esp32c61-builtin.cfg -c "program_esp filename.bin 0x10000 verify exit" + +--- + +.. run-openocd-src-linux + +.. code-block:: bash + + src/openocd -f board/esp32c61-builtin.cfg + +--- + +.. run-openocd-src-win + +.. code-block:: batch + + src\openocd -f board/esp32c61-builtin.cfg + +--- + +.. idf-py-openocd-default-cfg + +.. |idf-py-def-cfg| replace:: ``-f board/esp32c61-builtin.cfg`` + +--- + +.. run-openocd-appimage-offset + +:: + + openocd -f board/esp32c61-builtin.cfg -c "init; halt; esp appimage_offset 0x210000" + +--- + +.. openocd-cfg-files + +.. list-table:: OpenOCD configuration files for ESP32-C61 + :widths: 25 75 + :header-rows: 1 + + * - Name + - Description + * - ``board/esp32c61-builtin.cfg`` + - Board configuration file for ESP32-C61 through built-in USB, includes target and adapter configuration. + * - ``board/esp32c61-ftdi.cfg`` + - Board configuration file for ESP32-C61 for via externally connected FTDI-based probe like ESP-Prog, includes target and adapter configuration. + * - ``target/esp32c61.cfg`` + - ESP32-C61 target configuration file. Can be used together with one of the ``interface/`` configuration files. + * - ``interface/esp_usb_jtag.cfg`` + - JTAG adapter configuration file for ESP32-C61. + * - ``interface/ftdi/esp32_devkitj_v1.cfg`` + - JTAG adapter configuration file for ESP-Prog boards. + +--- + +.. openocd-target-specific-config-vars + +--- + +--- + +.. jtag-pins + +.. list-table:: ESP32-C61 pins and JTAG signals + :widths: 25 75 + :header-rows: 1 + + * - ESP32-C61 Pin + - JTAG Signal + * - MTDO / GPIO7 + - TDO + * - MTDI / GPIO5 + - TDI + * - MTCK / GPIO6 + - TCK + * - MTMS / GPIO4 + - TMS + +.. |jtag-sel-gpio| replace:: GPIO15 +.. |jtag-gpio-list| replace:: GPIO4-GPIO7 + +--- + +.. run-openocd-d3 + +:: + + openocd -l openocd_log.txt -d3 -f board/esp32c61-builtin.cfg + +--- + +.. run-openocd-d3-tee + +:: + + openocd -d3 -f board/esp32c61-builtin.cfg 2>&1 | tee openocd.log + +--- + +.. run-gdb-remotelog + +:: + + riscv32-esp-elf-gdb -ex "set remotelogfile gdb_log.txt" + +--- + +.. devkit-defs + +.. |devkit-name| replace:: ESP32-C61 +.. |devkit-name-with-link| replace:: :doc:`ESP32-C61 <../../hw-reference/index>` + +--- + +.. devkit-hw-config + +* Out of the box, ESP32-C61 doesn't need any additional hardware configuration for JTAG debugging. + +--- diff --git a/docs/zh_CN/api-guides/partition-tables.rst b/docs/zh_CN/api-guides/partition-tables.rst index 8364ed0dc5..0c744b589c 100644 --- a/docs/zh_CN/api-guides/partition-tables.rst +++ b/docs/zh_CN/api-guides/partition-tables.rst @@ -89,7 +89,7 @@ Type 字段可以指定为 app (0x00) 或者 data (0x01)，也可以直接使用 SubType 字段 ~~~~~~~~~~~~ -{IDF_TARGET_ESP_PHY_REF:default = ":ref:`CONFIG_ESP_PHY_INIT_DATA_IN_PARTITION`", esp32p4, esp32c5 = "NOT UPDATED YET"} +{IDF_TARGET_ESP_PHY_REF:default = ":ref:`CONFIG_ESP_PHY_INIT_DATA_IN_PARTITION`", esp32p4, esp32c5, esp32c61 = "NOT UPDATED YET"} SubType 字段长度为 8 bit，内容与具体分区 Type 有关。目前，esp-idf 仅仅规定了 “app” 和 “data” 两种分区类型的子类型含义。 diff --git a/docs/zh_CN/api-reference/system/inc/espefuse_summary_ESP32-C61.rst b/docs/zh_CN/api-reference/system/inc/espefuse_summary_ESP32-C61.rst new file mode 100644 index 0000000000..5791296821 --- /dev/null +++ b/docs/zh_CN/api-reference/system/inc/espefuse_summary_ESP32-C61.rst @@ -0,0 +1 @@ +.. include:: ../../../en/api-reference/system/inc/espefuse_summary_ESP32-C61.rst diff --git a/docs/zh_CN/api-reference/system/inc/power_management_esp32c61.rst b/docs/zh_CN/api-reference/system/inc/power_management_esp32c61.rst new file mode 100644 index 0000000000..1083f8428a --- /dev/null +++ b/docs/zh_CN/api-reference/system/inc/power_management_esp32c61.rst @@ -0,0 +1,19 @@ ++---------------+---------------------------------------+-------------------------------------+ +| CPU 最高频率 | 电源管理锁获取情况 | APB 频率和 CPU 频率 | +| | | | ++---------------+---------------------------------------+-------------------------------------+ +| 160 | 获取 ``ESP_PM_CPU_FREQ_MAX`` | | CPU: 160 MHz | +| | | | APB: 80 Mhz | ++ +---------------------------------------+-------------------------------------+ +| | | 获取 ``ESP_PM_APB_FREQ_MAX``, | | CPU: 80 MHz | +| | | 未获得 ``ESP_PM_CPU_FREQ_MAX`` | | APB: 80 Mhz | ++ +---------------------------------------+-------------------------------------+ +| | 无 | 使用 :cpp:func:`esp_pm_configure` | +| | | 为二者设置最小值 | ++---------------+---------------------------------------+-------------------------------------+ +| 80 | | 获取 ``ESP_PM_CPU_FREQ_MAX`` | | CPU: 80 MHz | +| | | 或 ``ESP_PM_APB_FREQ_MAX`` | | APB: 80 Mhz | ++ +---------------------------------------+-------------------------------------+ +| | 无 | 使用 :cpp:func:`esp_pm_configure` | +| | | 为二者设置最小值 | ++---------------+---------------------------------------+-------------------------------------+ diff --git a/docs/zh_CN/api-reference/system/inc/show-efuse-table_ESP32-C61.rst b/docs/zh_CN/api-reference/system/inc/show-efuse-table_ESP32-C61.rst new file mode 100644 index 0000000000..a9fbf5ffbf --- /dev/null +++ b/docs/zh_CN/api-reference/system/inc/show-efuse-table_ESP32-C61.rst @@ -0,0 +1 @@ +.. include:: ../../../en/api-reference/system/inc/show-efuse-table_ESP32-C61.rst diff --git a/docs/zh_CN/get-started/esp32c61_output_log.inc b/docs/zh_CN/get-started/esp32c61_output_log.inc new file mode 100644 index 0000000000..78b7e23f12 --- /dev/null +++ b/docs/zh_CN/get-started/esp32c61_output_log.inc @@ -0,0 +1,5 @@ +.. output_log + +.. code-block:: none + + ... diff --git a/docs/zh_CN/security/esp32c61_log.inc b/docs/zh_CN/security/esp32c61_log.inc new file mode 100644 index 0000000000..dbd7e68542 --- /dev/null +++ b/docs/zh_CN/security/esp32c61_log.inc @@ -0,0 +1,18 @@ + +.. first_boot_enc + +.. code-block:: none + + ... + + +------ + +.. already_en_enc + +.. code-block:: none + + ... + + +------