From 3117659bed67cc41ac288b28a0066cabd94699c5 Mon Sep 17 00:00:00 2001 From: Jiang Guang Ming Date: Wed, 7 Feb 2024 15:47:24 +0800 Subject: [PATCH] fix(esp_rom): Update esp32p4 rom caps --- components/esp_rom/esp32p4/esp_rom_caps.h | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/components/esp_rom/esp32p4/esp_rom_caps.h b/components/esp_rom/esp32p4/esp_rom_caps.h index acc4ff8e38..960f990ed4 100644 --- a/components/esp_rom/esp32p4/esp_rom_caps.h +++ b/components/esp_rom/esp32p4/esp_rom_caps.h @@ -9,8 +9,8 @@ #define ESP_ROM_HAS_CRC_LE (1) // ROM CRC library supports Little Endian #define ESP_ROM_HAS_CRC_BE (1) // ROM CRC library supports Big Endian #define ESP_ROM_UART_CLK_IS_XTAL (1) // UART clock source is selected to XTAL in ROM -#define ESP_ROM_USB_SERIAL_DEVICE_NUM (6) // The serial port ID (UART, USB, ...) of USB_OTG CDC in the ROM. -#define ESP_ROM_USB_OTG_NUM (5) // The serial port ID (UART, USB, ...) of USB_SERIAL_JTAG in the ROM. +#define ESP_ROM_USB_SERIAL_DEVICE_NUM (6) // The serial port ID (UART, USB, ...) of USB_SERIAL_JTAG in the ROM. +#define ESP_ROM_USB_OTG_NUM (5) // The serial port ID (UART, USB, ...) of USB_OTG_CDC in the ROM. #define ESP_ROM_HAS_RETARGETABLE_LOCKING (1) // ROM was built with retargetable locking #define ESP_ROM_GET_CLK_FREQ (1) // Get clk frequency with rom function `ets_get_cpu_frequency` #define ESP_ROM_HAS_RVFPLIB (1) // ROM has the rvfplib