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Merge branch 'bugfix/esp32s3_usb_otg_console' into 'master' 

system: support USB_OTG CDC console on ESP32-S3

Closes IDF-2048, IDF-2987, IDFGH-7134, IDFGH-7291, and IDFGH-7835

See merge request espressif/esp-idf!19312
pull/11215/head
Ivan Grokhotkov 2023-04-18 16:28:49 +08:00
rodzic 4adef05163 79a9615022
commit 274fa56e71
45 zmienionych plików z 294 dodań i 892 usunięć
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2
components/bootloader_support/src/bootloader_console.c
Wyświetl plik

@ -95,7 +95,7 @@ void bootloader_console_init(void)
#endif
esp_rom_uart_usb_acm_init(s_usb_cdc_buf, sizeof(s_usb_cdc_buf));
esp_rom_uart_set_as_console(ESP_ROM_UART_USB);
esp_rom_uart_set_as_console(ESP_ROM_USB_OTG_NUM);
esp_rom_install_channel_putc(1, bootloader_console_write_char_usb);
}
#endif //CONFIG_ESP_CONSOLE_USB_CDC

7
components/console/esp_console_repl.c
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@ -76,7 +76,7 @@ esp_err_t esp_console_new_repl_usb_cdc(const esp_console_dev_usb_cdc_config_t *d
/* Move the caret to the beginning of the next line on '\n' */
esp_vfs_dev_cdcacm_set_tx_line_endings(ESP_LINE_ENDINGS_CRLF);
/* Enable non-blocking mode on stdin and stdout */
/* Enable blocking mode on stdin and stdout */
fcntl(fileno(stdout), F_SETFL, 0);
fcntl(fileno(stdin), F_SETFL, 0);
@ -136,15 +136,12 @@ esp_err_t esp_console_new_repl_usb_serial_jtag(const esp_console_dev_usb_serial_
goto _exit;
}
/* Disable buffering on stdin */
setvbuf(stdin, NULL, _IONBF, 0);
/* Minicom, screen, idf_monitor send CR when ENTER key is pressed */
esp_vfs_dev_usb_serial_jtag_set_rx_line_endings(ESP_LINE_ENDINGS_CR);
/* Move the caret to the beginning of the next line on '\n' */
esp_vfs_dev_usb_serial_jtag_set_tx_line_endings(ESP_LINE_ENDINGS_CRLF);
/* Enable non-blocking mode on stdin and stdout */
/* Enable blocking mode on stdin and stdout */
fcntl(fileno(stdout), F_SETFL, 0);
fcntl(fileno(stdin), F_SETFL, 0);

2
components/esp_rom/CMakeLists.txt
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@ -295,5 +295,5 @@ else() # Regular app build
endif()
if(target STREQUAL "esp32s2")
target_sources(${COMPONENT_LIB} PRIVATE "esp32s2/usb_descriptors.c")
target_sources(${COMPONENT_LIB} PRIVATE "esp32s2/usb_patches.c")
endif()

4
components/esp_rom/esp32s2/Kconfig.soc_caps.in
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@ -26,3 +26,7 @@ config ESP_ROM_HAS_REGI2C_BUG
config ESP_ROM_HAS_NEWLIB_NANO_FORMAT
bool
default y
config ESP_ROM_USB_OTG_NUM
int
default 3

1
components/esp_rom/esp32s2/esp_rom_caps.h
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@ -12,3 +12,4 @@
#define ESP_ROM_NEEDS_SWSETUP_WORKAROUND (1) // ROM uses 32-bit time_t. A workaround is required to prevent printf functions from crashing
#define ESP_ROM_HAS_REGI2C_BUG (1) // ROM has the regi2c bug
#define ESP_ROM_HAS_NEWLIB_NANO_FORMAT (1) // ROM has the newlib nano version of formatting functions
#define ESP_ROM_USB_OTG_NUM (3) // The serial port ID (UART, USB, ...) of USB_OTG CDC in the ROM.

16
components/esp_rom/esp32s2/usb_descriptors.c → components/esp_rom/esp32s2/usb_patches.c
Wyświetl plik

@ -65,3 +65,19 @@ void rom_usb_cdc_set_descriptor_patch(void)
/* Override the pointer to descriptors structure */
rom_usb_curr_desc = &s_acm_usb_descriptors_override;
}
/* On ESP32-S2, ROM doesn't provide interfaces to clear usb_dev and usb_dw_ctrl structures.
* Starting from ESP32-S3, usb_dev_deinit and usb_dw_ctrl_deinit ROM functions are available.
* Here we implement the missing functionality for the ESP32-S2.
*/
void usb_dev_deinit(void)
{
extern char rom_usb_dev, rom_usb_dev_end;
memset((void *) &rom_usb_dev, 0, &rom_usb_dev_end - &rom_usb_dev);
}
void usb_dw_ctrl_deinit(void)
{
extern char rom_usb_dw_ctrl, rom_usb_dw_ctrl_end;
memset((void *) &rom_usb_dw_ctrl, 0, &rom_usb_dw_ctrl_end - &rom_usb_dw_ctrl);
}

4
components/esp_rom/esp32s3/Kconfig.soc_caps.in
Wyświetl plik

@ -27,6 +27,10 @@ config ESP_ROM_HAS_RETARGETABLE_LOCKING
bool
default y
config ESP_ROM_USB_OTG_NUM
int
default 3
config ESP_ROM_USB_SERIAL_DEVICE_NUM
int
default 4

1
components/esp_rom/esp32s3/esp_rom_caps.h
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@ -12,6 +12,7 @@
#define ESP_ROM_HAS_JPEG_DECODE (1) // ROM has JPEG decode library
#define ESP_ROM_UART_CLK_IS_XTAL (1) // UART clock source is selected to XTAL in ROM
#define ESP_ROM_HAS_RETARGETABLE_LOCKING (1) // ROM was built with retargetable locking
#define ESP_ROM_USB_OTG_NUM (3) // The serial port ID (UART, USB, ...) of USB_OTG CDC in the ROM.
#define ESP_ROM_USB_SERIAL_DEVICE_NUM (4) // The serial port ID (UART, USB, ...) of USB_SERIAL_JTAG in the ROM.
#define ESP_ROM_HAS_ERASE_0_REGION_BUG (1) // ROM has esp_flash_erase_region(size=0) bug
#define ESP_ROM_GET_CLK_FREQ (1) // Get clk frequency with rom function `ets_get_cpu_frequency`

2
components/esp_rom/esp32s3/ld/esp32s3.rom.ld
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@ -792,7 +792,7 @@ usb_dfu_force_detach = 0x40002a54;
usb_dev_deinit = 0x40002a60;
usb_dw_ctrl_deinit = 0x40002a6c;
/* Data (.data, .bss, .rodata) */
s_usb_osglue = 0x3fceffac;
rom_usb_osglue = 0x3fceffac;
/***************************************

34
components/esp_rom/include/esp32s2/rom/usb/cdc_acm.h
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@ -1,34 +1,8 @@
/*******************************************************************************
/*
* SPDX-FileCopyrightText: 2015, 2016 Intel Corporation.
*
* Copyright(c) 2015,2016 Intel Corporation.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
*
* * Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* * Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in
* the documentation and/or other materials provided with the
* distribution.
* * Neither the name of Intel Corporation nor the names of its
* contributors may be used to endorse or promote products derived
* from this software without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
* A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
* OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
* SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
* LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*
******************************************************************************/
* SPDX-License-Identifier: BSD-3-Clause
*/
#pragma once
#include <stdint.h>

18
components/esp_rom/include/esp32s2/rom/usb/chip_usb_dw_wrapper.h
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@ -1,16 +1,8 @@
// Copyright 2019-2020 Espressif Systems (Shanghai) PTE LTD
//
// Licensed under the Apache License, Version 2.0 (the "License");
// you may not use this file except in compliance with the License.
// You may obtain a copy of the License at
//
// http://www.apache.org/licenses/LICENSE-2.0
//
// Unless required by applicable law or agreed to in writing, software
// distributed under the License is distributed on an "AS IS" BASIS,
// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
// See the License for the specific language governing permissions and
// limitations under the License.
/*
* SPDX-FileCopyrightText: 2019-2022 Espressif Systems (Shanghai) CO LTD
*
* SPDX-License-Identifier: Apache-2.0
*/
#pragma once
#include <stdint.h>

18
components/esp_rom/include/esp32s2/rom/usb/cpio.h
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@ -1,16 +1,8 @@
// Copyright 2015-2016 Espressif Systems (Shanghai) PTE LTD
//
// Licensed under the Apache License, Version 2.0 (the "License");
// you may not use this file except in compliance with the License.
// You may obtain a copy of the License at
//
// http://www.apache.org/licenses/LICENSE-2.0
//
// Unless required by applicable law or agreed to in writing, software
// distributed under the License is distributed on an "AS IS" BASIS,
// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
// See the License for the specific language governing permissions and
// limitations under the License.
/*
* SPDX-FileCopyrightText: 2019-2022 Espressif Systems (Shanghai) CO LTD
*
* SPDX-License-Identifier: Apache-2.0
*/
/**

4
components/esp_rom/include/esp32s2/rom/usb/usb_cdc.h
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@ -1,7 +1,5 @@
/* usb_cdc.h - USB CDC-ACM and CDC-ECM public header */
/*
* Copyright (c) 2017 PHYTEC Messtechnik GmbH
* SPDX-FileCopyrightText: 2017 PHYTEC Messtechnik GmbH
*
* SPDX-License-Identifier: Apache-2.0
*/

37
components/esp_rom/include/esp32s2/rom/usb/usb_common.h
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@ -1,36 +1,9 @@
/***************************************************************************
/*
* SPDX-FileCopyrightText: 2015,2016 Intel Corporation
* SPDX-FileContributor: 2017 PHYTEC Messtechnik GmbH
*
*
* Copyright(c) 2015,2016 Intel Corporation.
* Copyright(c) 2017 PHYTEC Messtechnik GmbH
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
*
* * Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* * Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in
* the documentation and/or other materials provided with the
* distribution.
* * Neither the name of Intel Corporation nor the names of its
* contributors may be used to endorse or promote products derived
* from this software without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
* A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
* OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
* SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
* LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*
***************************************************************************/
* SPDX-License-Identifier: BSD-3-Clause
*/
/**
* @file

38
components/esp_rom/include/esp32s2/rom/usb/usb_dc.h
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@ -1,7 +1,5 @@
/* usb_dc.h - USB device controller driver interface */
/*
* Copyright (c) 2016 Intel Corporation.
* SPDX-FileCopyrightText: 2016 Intel Corporation
*
* SPDX-License-Identifier: Apache-2.0
*/
@ -372,19 +370,43 @@ int usb_dc_ep_read_continue(uint8_t ep);
int usb_dc_ep_mps(uint8_t ep);
//Hack - fake interrupts by pollinfg
/**
* @brief Poll for interrupts that need to be handled
*
* When the USB interrupt is not hooked up to an actual CPU interrupt, you
* can call this periodically to handle the USB events that need handling.
*/
void usb_dc_check_poll_for_interrupts(void);
//Prepare for USB persist. You should reboot after this.
/*
* @brief Prepare for USB persist
*
* This takes the USB peripheral offline in such a way that it seems 'just busy' to the
* host. This way, the chip can reboot (e.g. into bootloader mode) and pick up the USB
* configuration again, without the conenction to the host being interrupted.
*
* @note Actual persistence is depending on USBDC_PERSIST_ENA being set in flags, as this
* is also used to e.g. reboot into DFU mode.
*
* @note Please reboot soon after calling this.
*/
int usb_dc_prepare_persist(void);
/*
* @brief USB interrupt handler
*
* This can be hooked up by the OS to the USB peripheral interrupt.
*/
void usb_dw_isr_handler(void);
/**
* @brief Provide IDF with an interface to clear the static variable usb_dw_ctrl
*
*
*/
void usb_dw_ctrl_deinit(void);
int usb_dc_ep_write_would_block(const uint8_t ep);
#ifdef __cplusplus

18
components/esp_rom/include/esp32s2/rom/usb/usb_descriptor.h
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@ -1,16 +1,8 @@
// Copyright 2019-2020 Espressif Systems (Shanghai) PTE LTD
//
// Licensed under the Apache License, Version 2.0 (the "License");
// you may not use this file except in compliance with the License.
// You may obtain a copy of the License at
//
// http://www.apache.org/licenses/LICENSE-2.0
//
// Unless required by applicable law or agreed to in writing, software
// distributed under the License is distributed on an "AS IS" BASIS,
// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
// See the License for the specific language governing permissions and
// limitations under the License.
/*
* SPDX-FileCopyrightText: 2019-2022 Espressif Systems (Shanghai) CO LTD
*
* SPDX-License-Identifier: Apache-2.0
*/
#pragma once

33
components/esp_rom/include/esp32s2/rom/usb/usb_device.h
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@ -1,29 +1,10 @@
/*
* LPCUSB, an USB device driver for LPC microcontrollers
* Copyright (C) 2006 Bertrik Sikken (bertrik@sikken.nl)
* Copyright (c) 2016 Intel Corporation
* SPDX-FileCopyrightText: 2006 Bertrik Sikken (bertrik@sikken.nl)
* SPDX-FileContributor: 2016 Intel Corporation
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions are met:
* SPDX-License-Identifier: BSD-3-Clause
*
* 1. Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution.
* 3. The name of the author may not be used to endorse or promote products
* derived from this software without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
* IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
* OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
* IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
* NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
* THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
* LPCUSB, an USB device driver for LPC microcontrollers
*/
/**
@ -392,6 +373,12 @@ int usb_transfer_sync(uint8_t ep, uint8_t *data, size_t dlen, unsigned int flags
*/
void usb_cancel_transfer(uint8_t ep);
/**
* @brief Provide IDF with an interface to clear the static variable usb_dev
*
*
*/
void usb_dev_deinit(void);
void usb_dev_resume(int configuration);
int usb_dev_get_configuration(void);

36
components/esp_rom/include/esp32s2/rom/usb/usb_dfu.h
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@ -1,35 +1,9 @@
/***************************************************************************
/*
* SPDX-FileCopyrightText: 2015,2016 Intel Corporation
* SPDX-FileContributor: 2017 PHYTEC Messtechnik GmbH
*
* Copyright(c) 2015,2016 Intel Corporation.
* Copyright(c) 2017 PHYTEC Messtechnik GmbH
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
*
* * Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* * Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in
* the documentation and/or other materials provided with the
* distribution.
* * Neither the name of Intel Corporation nor the names of its
* contributors may be used to endorse or promote products derived
* from this software without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
* A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
* OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
* SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
* LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*
***************************************************************************/
* SPDX-License-Identifier: BSD-3-Clause
*/
/**
* @file

18
components/esp_rom/include/esp32s2/rom/usb/usb_os_glue.h
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@ -1,16 +1,8 @@
// Copyright 2019-2020 Espressif Systems (Shanghai) PTE LTD
//
// Licensed under the Apache License, Version 2.0 (the "License");
// you may not use this file except in compliance with the License.
// You may obtain a copy of the License at
//
// http://www.apache.org/licenses/LICENSE-2.0
//
// Unless required by applicable law or agreed to in writing, software
// distributed under the License is distributed on an "AS IS" BASIS,
// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
// See the License for the specific language governing permissions and
// limitations under the License.
/*
* SPDX-FileCopyrightText: 2019-2022 Espressif Systems (Shanghai) CO LTD
*
* SPDX-License-Identifier: Apache-2.0
*/
#pragma once

18
components/esp_rom/include/esp32s2/rom/usb/usb_persist.h
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@ -1,16 +1,8 @@
// Copyright 2019-2020 Espressif Systems (Shanghai) PTE LTD
//
// Licensed under the Apache License, Version 2.0 (the "License");
// you may not use this file except in compliance with the License.
// You may obtain a copy of the License at
//
// http://www.apache.org/licenses/LICENSE-2.0
//
// Unless required by applicable law or agreed to in writing, software
// distributed under the License is distributed on an "AS IS" BASIS,
// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
// See the License for the specific language governing permissions and
// limitations under the License.
/*
* SPDX-FileCopyrightText: 2019-2022 Espressif Systems (Shanghai) CO LTD
*
* SPDX-License-Identifier: Apache-2.0
*/
#pragma once

34
components/esp_rom/include/esp32s3/rom/usb/cdc_acm.h
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@ -1,34 +1,8 @@
/*******************************************************************************
/*
* SPDX-FileCopyrightText: 2015, 2016 Intel Corporation.
*
* Copyright(c) 2015,2016 Intel Corporation.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
*
* * Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* * Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in
* the documentation and/or other materials provided with the
* distribution.
* * Neither the name of Intel Corporation nor the names of its
* contributors may be used to endorse or promote products derived
* from this software without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
* A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
* OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
* SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
* LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*
******************************************************************************/
* SPDX-License-Identifier: BSD-3-Clause
*/
#pragma once
#include <stdint.h>

18
components/esp_rom/include/esp32s3/rom/usb/chip_usb_dw_wrapper.h
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@ -1,16 +1,8 @@
// Copyright 2019-2020 Espressif Systems (Shanghai) PTE LTD
//
// Licensed under the Apache License, Version 2.0 (the "License");
// you may not use this file except in compliance with the License.
// You may obtain a copy of the License at
//
// http://www.apache.org/licenses/LICENSE-2.0
//
// Unless required by applicable law or agreed to in writing, software
// distributed under the License is distributed on an "AS IS" BASIS,
// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
// See the License for the specific language governing permissions and
// limitations under the License.
/*
* SPDX-FileCopyrightText: 2019-2022 Espressif Systems (Shanghai) CO LTD
*
* SPDX-License-Identifier: Apache-2.0
*/
#pragma once
#include <stdint.h>

18
components/esp_rom/include/esp32s3/rom/usb/cpio.h
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@ -1,16 +1,8 @@
// Copyright 2015-2016 Espressif Systems (Shanghai) PTE LTD
//
// Licensed under the Apache License, Version 2.0 (the "License");
// you may not use this file except in compliance with the License.
// You may obtain a copy of the License at
//
// http://www.apache.org/licenses/LICENSE-2.0
//
// Unless required by applicable law or agreed to in writing, software
// distributed under the License is distributed on an "AS IS" BASIS,
// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
// See the License for the specific language governing permissions and
// limitations under the License.
/*
* SPDX-FileCopyrightText: 2019-2022 Espressif Systems (Shanghai) CO LTD
*
* SPDX-License-Identifier: Apache-2.0
*/
/**

5
components/esp_rom/include/esp32s3/rom/usb/usb_cdc.h
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@ -1,12 +1,9 @@
/* usb_cdc.h - USB CDC-ACM and CDC-ECM public header */
/*
* Copyright (c) 2017 PHYTEC Messtechnik GmbH
* SPDX-FileCopyrightText: 2017 PHYTEC Messtechnik GmbH
*
* SPDX-License-Identifier: Apache-2.0
*/
/**
* @file
* @brief USB Communications Device Class (CDC) public header

57
components/esp_rom/include/esp32s3/rom/usb/usb_common.h
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@ -1,36 +1,9 @@
/***************************************************************************
/*
* SPDX-FileCopyrightText: 2015,2016 Intel Corporation
* SPDX-FileContributor: 2017 PHYTEC Messtechnik GmbH
*
*
* Copyright(c) 2015,2016 Intel Corporation.
* Copyright(c) 2017 PHYTEC Messtechnik GmbH
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
*
* * Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* * Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in
* the documentation and/or other materials provided with the
* distribution.
* * Neither the name of Intel Corporation nor the names of its
* contributors may be used to endorse or promote products derived
* from this software without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
* A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
* OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
* SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
* LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*
***************************************************************************/
* SPDX-License-Identifier: BSD-3-Clause
*/
/**
* @file
@ -217,26 +190,6 @@ struct string_descriptor {
uint16_t bString[];
} __packed;
#define ROM_MAX_CFG_DESC_CNT 1
struct rom_usb_descriptors {
const struct usb_device_descriptor *device_descr;
const void *config_descr[ROM_MAX_CFG_DESC_CNT];
int string_count; // including string_descriptor_zero
const struct string_descriptor_zero *string0_descr;
const struct string_descriptor *string_descrs[];
};
/* Descriptors defined in the ROM */
extern struct usb_device_descriptor general_device_descr;
extern const void* acm_config_descr;
extern const void* dfu_config_descr;
extern const struct string_descriptor str_manu_descr;
extern const struct string_descriptor str_prod_descr;
extern const struct string_descriptor_zero string0_descr;
extern const struct rom_usb_descriptors acm_usb_descriptors;
extern const struct rom_usb_descriptors dfu_usb_descriptors;
extern const struct rom_usb_descriptors *rom_usb_curr_desc;
#ifdef __cplusplus
}

39
components/esp_rom/include/esp32s3/rom/usb/usb_dc.h
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@ -1,7 +1,5 @@
/* usb_dc.h - USB device controller driver interface */
/*
* Copyright (c) 2016 Intel Corporation.
* SPDX-FileCopyrightText: 2016 Intel Corporation
*
* SPDX-License-Identifier: Apache-2.0
*/
@ -372,19 +370,42 @@ int usb_dc_ep_read_continue(uint8_t ep);
int usb_dc_ep_mps(uint8_t ep);
//Hack - fake interrupts by pollinfg
/**
* @brief Poll for interrupts that need to be handled
*
* When the USB interrupt is not hooked up to an actual CPU interrupt, you
* can call this periodically to handle the USB events that need handling.
*/
void usb_dc_check_poll_for_interrupts(void);
//Prepare for USB persist. You should reboot after this.
/*
* @brief Prepare for USB persist
*
* This takes the USB peripheral offline in such a way that it seems 'just busy' to the
* host. This way, the chip can reboot (e.g. into bootloader mode) and pick up the USB
* configuration again, without the conenction to the host being interrupted.
*
* @note Actual persistence is depending on USBDC_PERSIST_ENA being set in flags, as this
* is also used to e.g. reboot into DFU mode.
*
* @note Please reboot soon after calling this.
*/
int usb_dc_prepare_persist(void);
/*
* @brief USB interrupt handler
*
* This can be hooked up by the OS to the USB peripheral interrupt.
*/
void usb_dw_isr_handler(void);
int usb_dc_ep_write_would_block(const uint8_t ep);
/**
* @brief Provide IDF with an interface to clear the static variable usb_dw_ctrl
*
*
*/
void usb_dw_ctrl_deinit(void);
#ifdef __cplusplus

18
components/esp_rom/include/esp32s3/rom/usb/usb_descriptor.h
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@ -1,16 +1,8 @@
// Copyright 2019-2020 Espressif Systems (Shanghai) PTE LTD
//
// Licensed under the Apache License, Version 2.0 (the "License");
// you may not use this file except in compliance with the License.
// You may obtain a copy of the License at
//
// http://www.apache.org/licenses/LICENSE-2.0
//
// Unless required by applicable law or agreed to in writing, software
// distributed under the License is distributed on an "AS IS" BASIS,
// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
// See the License for the specific language governing permissions and
// limitations under the License.
/*
* SPDX-FileCopyrightText: 2019-2022 Espressif Systems (Shanghai) CO LTD
*
* SPDX-License-Identifier: Apache-2.0
*/
#pragma once

33
components/esp_rom/include/esp32s3/rom/usb/usb_device.h
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@ -1,29 +1,10 @@
/*
* LPCUSB, an USB device driver for LPC microcontrollers
* Copyright (C) 2006 Bertrik Sikken (bertrik@sikken.nl)
* Copyright (c) 2016 Intel Corporation
* SPDX-FileCopyrightText: 2006 Bertrik Sikken (bertrik@sikken.nl)
* SPDX-FileContributor: 2016 Intel Corporation
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions are met:
* SPDX-License-Identifier: BSD-3-Clause
*
* 1. Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution.
* 3. The name of the author may not be used to endorse or promote products
* derived from this software without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
* IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
* OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
* IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
* NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
* THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
* LPCUSB, an USB device driver for LPC microcontrollers
*/
/**
@ -392,6 +373,12 @@ int usb_transfer_sync(uint8_t ep, uint8_t *data, size_t dlen, unsigned int flags
*/
void usb_cancel_transfer(uint8_t ep);
/**
* @brief Provide IDF with an interface to clear the static variable usb_dev
*
*
*/
void usb_dev_deinit(void);
void usb_dev_resume(int configuration);
int usb_dev_get_configuration(void);

37
components/esp_rom/include/esp32s3/rom/usb/usb_dfu.h
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@ -1,35 +1,9 @@
/***************************************************************************
/*
* SPDX-FileCopyrightText: 2015,2016 Intel Corporation
* SPDX-FileContributor: 2017 PHYTEC Messtechnik GmbH
*
* Copyright(c) 2015,2016 Intel Corporation.
* Copyright(c) 2017 PHYTEC Messtechnik GmbH
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
*
* * Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* * Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in
* the documentation and/or other materials provided with the
* distribution.
* * Neither the name of Intel Corporation nor the names of its
* contributors may be used to endorse or promote products derived
* from this software without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
* A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
* OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
* SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
* LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*
***************************************************************************/
* SPDX-License-Identifier: BSD-3-Clause
*/
/**
* @file
@ -140,6 +114,7 @@ int dfu_custom_handle_req(struct usb_setup_packet *pSetup,
typedef void(*usb_dfu_detach_routine_t)(int delay);
void usb_dfu_set_detach_cb(usb_dfu_detach_routine_t cb);
void usb_dfu_force_detach(void);
#ifdef __cplusplus

20
components/esp_rom/include/esp32s3/rom/usb/usb_os_glue.h
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@ -1,16 +1,8 @@
// Copyright 2019-2020 Espressif Systems (Shanghai) PTE LTD
//
// Licensed under the Apache License, Version 2.0 (the "License");
// you may not use this file except in compliance with the License.
// You may obtain a copy of the License at
//
// http://www.apache.org/licenses/LICENSE-2.0
//
// Unless required by applicable law or agreed to in writing, software
// distributed under the License is distributed on an "AS IS" BASIS,
// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
// See the License for the specific language governing permissions and
// limitations under the License.
/*
* SPDX-FileCopyrightText: 2019-2022 Espressif Systems (Shanghai) CO LTD
*
* SPDX-License-Identifier: Apache-2.0
*/
#pragma once
@ -33,7 +25,7 @@ typedef struct {
usb_osglue_wait_routine_t wait_proc;
} usb_osglue_data_t;
extern usb_osglue_data_t s_usb_osglue;
extern usb_osglue_data_t rom_usb_osglue;
#ifdef __cplusplus
}

20
components/esp_rom/include/esp32s3/rom/usb/usb_persist.h
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@ -1,16 +1,8 @@
// Copyright 2019-2020 Espressif Systems (Shanghai) PTE LTD
//
// Licensed under the Apache License, Version 2.0 (the "License");
// you may not use this file except in compliance with the License.
// You may obtain a copy of the License at
//
// http://www.apache.org/licenses/LICENSE-2.0
//
// Unless required by applicable law or agreed to in writing, software
// distributed under the License is distributed on an "AS IS" BASIS,
// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
// See the License for the specific language governing permissions and
// limitations under the License.
/*
* SPDX-FileCopyrightText: 2019-2022 Espressif Systems (Shanghai) CO LTD
*
* SPDX-License-Identifier: Apache-2.0
*/
#pragma once
@ -34,7 +26,7 @@ extern "C" {
//This being non-0 indicates a memory location where a 'testament' is stored, aka a piece of text that should be output
//after a reboot. Can contain core dump info or something.
#define USBDC_TESTAMENT_LOC_MASK 0x7FFFF //bits 19-0; this is added to a base address of 0x3FF80000.
#define USBDC_TESTAMENT_LOC_MASK 0x7FFFF //bits 19-0; this is added to a base address of SOC_MEM_INTERNAL_LOW. (0x3FF9E000)
//The testament is a FIFO. The ROM will output all data between textstart and textend; if textend is lower than textstart it will
//output everything from textstart to memend, then memstart to textend.

32
components/esp_system/include/esp_private/usb_console.h
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@ -50,14 +50,46 @@ esp_err_t esp_usb_console_init(void);
*/
ssize_t esp_usb_console_write_buf(const char* buf, size_t size);
/**
* @brief Wait until all buffered USB CDC output is written
*
* @return ssize_t Number of bytes written, or -1 if the driver is not initialized
*/
ssize_t esp_usb_console_flush(void);
/**
* @brief Read data from USB CDC
*
* May read less data than requested.
*
* @param buf Buffer to read data into
* @param buf_size Size of the buffer
* @return ssize_t Number of bytes written into the buffer, or -1 if the driver is not initialized
*/
ssize_t esp_usb_console_read_buf(char* buf, size_t buf_size);
/**
* @brief Get the number of bytes available for reading from USB CDC
*
* @return ssize_t Number of bytes available, or -1 if the driver is not initialized
*/
ssize_t esp_usb_console_available_for_read(void);
/**
* @brief Check if data can be written into USB CDC
*
* @return true if data can be written now without blocking
*/
bool esp_usb_console_write_available(void);
/**
* @brief Set RX/TX callback functions to be called from ISR
*
* @param rx_cb RX callback function
* @param tx_cb TX callback function
* @param arg callback-specific context pointer
* @return ESP_OK if the callbacks were set, ESP_ERR_INVALID_STATE if the driver is not initialized
*/
esp_err_t esp_usb_console_set_cb(esp_usb_console_cb_t rx_cb, esp_usb_console_cb_t tx_cb, void* arg);
#ifdef __cplusplus

4
components/esp_system/port/CMakeLists.txt
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@ -12,6 +12,10 @@ if(CONFIG_SOC_BOD_SUPPORTED)
list(APPEND srcs "brownout.c")
endif()
if(CONFIG_ESP_CONSOLE_USB_CDC)
list(APPEND srcs "usb_console.c")
endif()
add_prefix(srcs "${CMAKE_CURRENT_LIST_DIR}/" ${srcs})
target_sources(${COMPONENT_LIB} PRIVATE ${srcs})

3
components/esp_system/port/soc/esp32s2/CMakeLists.txt
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@ -22,9 +22,6 @@ endif()
add_prefix(srcs "${CMAKE_CURRENT_LIST_DIR}/" ${srcs})
target_sources(${COMPONENT_LIB} PRIVATE ${srcs})
if(CONFIG_ESP_CONSOLE_USB_CDC)
target_sources(${COMPONENT_LIB} PRIVATE "${CMAKE_CURRENT_LIST_DIR}/usb_console.c")
endif()
#ld_include_highint_hdl is added as an undefined symbol because otherwise the
#linker will ignore highint_hdl.S as it has no other files depending on any

3
components/esp_system/port/soc/esp32s3/CMakeLists.txt
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@ -23,9 +23,6 @@ endif()
add_prefix(srcs "${CMAKE_CURRENT_LIST_DIR}/" ${srcs})
target_sources(${COMPONENT_LIB} PRIVATE ${srcs})
if(CONFIG_ESP_CONSOLE_USB_CDC)
target_sources(${COMPONENT_LIB} PRIVATE "${CMAKE_CURRENT_LIST_DIR}/usb_console.c")
endif()
#ld_include_highint_hdl is added as an undefined symbol because otherwise the
#linker will ignore panic_highint_hdl.S as it has no other files depending on any

418
components/esp_system/port/soc/esp32s3/usb_console.c
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@ -1,418 +0,0 @@
/*
* SPDX-FileCopyrightText: 2019-2022 Espressif Systems (Shanghai) CO LTD
*
* SPDX-License-Identifier: Apache-2.0
*/
#include <stdio.h>
#include <string.h>
#include <assert.h>
#include <sys/param.h>
#include "sdkconfig.h"
#include "freertos/FreeRTOS.h"
#include "freertos/task.h"
#include "freertos/semphr.h"
#include "esp_system.h"
#include "esp_intr_alloc.h"
#include "esp_private/usb_console.h"
#include "soc/periph_defs.h"
#include "soc/rtc_cntl_reg.h"
#include "soc/usb_struct.h"
#include "soc/usb_reg.h"
#include "spinlock.h"
#include "hal/soc_hal.h"
#include "esp_rom_uart.h"
#include "esp_rom_sys.h"
#include "esp32s3/rom/usb/usb_dc.h"
#include "esp32s3/rom/usb/cdc_acm.h"
#include "esp32s3/rom/usb/usb_dfu.h"
#include "esp32s3/rom/usb/usb_device.h"
#include "esp32s3/rom/usb/usb_os_glue.h"
#include "esp32s3/rom/usb/usb_persist.h"
#include "esp32s3/rom/usb/chip_usb_dw_wrapper.h"
#define CDC_WORK_BUF_SIZE (ESP_ROM_CDC_ACM_WORK_BUF_MIN + CONFIG_ESP_CONSOLE_USB_CDC_RX_BUF_SIZE)
typedef enum {
REBOOT_NONE,
REBOOT_NORMAL,
REBOOT_BOOTLOADER,
REBOOT_BOOTLOADER_DFU,
} reboot_type_t;
static reboot_type_t s_queue_reboot = REBOOT_NONE;
static int s_prev_rts_state;
static intr_handle_t s_usb_int_handle;
static cdc_acm_device *s_cdc_acm_device;
static char s_usb_tx_buf[ACM_BYTES_PER_TX];
static size_t s_usb_tx_buf_pos;
static uint8_t cdcmem[CDC_WORK_BUF_SIZE];
static esp_usb_console_cb_t s_rx_cb;
static esp_usb_console_cb_t s_tx_cb;
static void *s_cb_arg;
#ifdef CONFIG_ESP_CONSOLE_USB_CDC_SUPPORT_ETS_PRINTF
static portMUX_TYPE s_write_lock = portMUX_INITIALIZER_UNLOCKED;
void esp_usb_console_write_char(char c);
#define ISR_FLAG ESP_INTR_FLAG_IRAM
#else
#define ISR_FLAG 0
#endif // CONFIG_ESP_CONSOLE_USB_CDC_SUPPORT_ETS_PRINTF
/* Optional write lock routines; used only if esp_rom_printf output via CDC is enabled */
static inline void write_lock_acquire(void);
static inline void write_lock_release(void);
/* The two functions below need to be revisited in the multicore case TODO ESP32-S3 IDF-2048*/
_Static_assert(SOC_CPU_CORES_NUM == 1, "usb_osglue_*_int is not multicore capable");
/* Called by ROM to disable the interrupts
* Non-static to allow placement into IRAM by ldgen.
*/
void esp_usb_console_osglue_dis_int(void)
{
if (s_usb_int_handle) {
esp_intr_disable(s_usb_int_handle);
}
}
/* Called by ROM to enable the interrupts
* Non-static to allow placement into IRAM by ldgen.
*/
void esp_usb_console_osglue_ena_int(void)
{
if (s_usb_int_handle) {
esp_intr_enable(s_usb_int_handle);
}
}
/* Delay function called by ROM USB driver.
* Non-static to allow placement into IRAM by ldgen.
*/
int esp_usb_console_osglue_wait_proc(int delay_us)
{
if (xTaskGetSchedulerState() != taskSCHEDULER_RUNNING ||
!xPortCanYield()) {
esp_rom_delay_us(delay_us);
return delay_us;
}
if (delay_us == 0) {
/* We should effectively yield */
vPortYield();
return 1;
} else {
/* Just delay */
int ticks = MAX(delay_us / (portTICK_PERIOD_MS * 1000), 1);
vTaskDelay(ticks);
return ticks * portTICK_PERIOD_MS * 1000;
}
}
/* Called by ROM CDC ACM driver from interrupt context./
* Non-static to allow placement into IRAM by ldgen.
*/
void esp_usb_console_cdc_acm_cb(cdc_acm_device *dev, int status)
{
if (status == USB_DC_RESET || status == USB_DC_CONNECTED) {
s_prev_rts_state = 0;
} else if (status == ACM_STATUS_LINESTATE_CHANGED) {
uint32_t rts, dtr;
cdc_acm_line_ctrl_get(dev, LINE_CTRL_RTS, &rts);
cdc_acm_line_ctrl_get(dev, LINE_CTRL_DTR, &dtr);
if (!rts && s_prev_rts_state) {
if (dtr) {
s_queue_reboot = REBOOT_BOOTLOADER;
} else {
s_queue_reboot = REBOOT_NORMAL;
}
}
s_prev_rts_state = rts;
} else if (status == ACM_STATUS_RX && s_rx_cb) {
(*s_rx_cb)(s_cb_arg);
} else if (status == ACM_STATUS_TX && s_tx_cb) {
(*s_tx_cb)(s_cb_arg);
}
}
/* Non-static to allow placement into IRAM by ldgen. */
void esp_usb_console_dfu_detach_cb(int timeout)
{
s_queue_reboot = REBOOT_BOOTLOADER_DFU;
}
/* USB interrupt handler, forward the call to the ROM driver.
* Non-static to allow placement into IRAM by ldgen.
*/
void esp_usb_console_interrupt(void *arg)
{
usb_dc_check_poll_for_interrupts();
/* Restart can be requested from esp_usb_console_cdc_acm_cb or esp_usb_console_dfu_detach_cb */
if (s_queue_reboot != REBOOT_NONE) {
esp_restart();
}
}
/* Call the USB interrupt handler while any interrupts are pending,
* but not more than a few times.
* Non-static to allow placement into IRAM by ldgen.
*/
void esp_usb_console_poll_interrupts(void)
{
const int max_poll_count = 10;
for (int i = 0; (USB0.gintsts & USB0.gintmsk) != 0 && i < max_poll_count; i++) {
usb_dc_check_poll_for_interrupts();
}
}
/* This function gets registered as a restart handler.
* Prepares USB peripheral for restart and sets up persistence.
* Non-static to allow placement into IRAM by ldgen.
*/
void esp_usb_console_before_restart(void)
{
esp_usb_console_poll_interrupts();
usb_dc_prepare_persist();
if (s_queue_reboot == REBOOT_BOOTLOADER) {
chip_usb_set_persist_flags(USBDC_PERSIST_ENA);
REG_WRITE(RTC_CNTL_OPTION1_REG, RTC_CNTL_FORCE_DOWNLOAD_BOOT);
} else if (s_queue_reboot == REBOOT_BOOTLOADER_DFU) {
chip_usb_set_persist_flags(USBDC_BOOT_DFU);
REG_WRITE(RTC_CNTL_OPTION1_REG, RTC_CNTL_FORCE_DOWNLOAD_BOOT);
} else {
chip_usb_set_persist_flags(USBDC_PERSIST_ENA);
esp_usb_console_poll_interrupts();
}
}
/* Reset some static state in ROM, which survives when going from the
* 2nd stage bootloader into the app. This cleans some variables which
* indicates that the driver is already initialized, allowing us to
* initialize it again, in the app.
*/
static void esp_usb_console_rom_cleanup(void)
{
/* TODO ESP32-S3 IDF-2987 */
// extern char rom_usb_dev, rom_usb_dev_end;
// extern char rom_usb_dw_ctrl, rom_usb_dw_ctrl_end;
// uart_acm_dev = NULL;
// memset((void *) &rom_usb_dev, 0, &rom_usb_dev_end - &rom_usb_dev);
// memset((void *) &rom_usb_dw_ctrl, 0, &rom_usb_dw_ctrl_end - &rom_usb_dw_ctrl);
}
esp_err_t esp_usb_console_init(void)
{
esp_err_t err;
err = esp_register_shutdown_handler(esp_usb_console_before_restart);
if (err != ESP_OK) {
return err;
}
esp_usb_console_rom_cleanup();
/* Install OS hooks */
s_usb_osglue.int_dis_proc = esp_usb_console_osglue_dis_int;
s_usb_osglue.int_ena_proc = esp_usb_console_osglue_ena_int;
s_usb_osglue.wait_proc = esp_usb_console_osglue_wait_proc;
/* Install interrupt.
* In case of ESP_CONSOLE_USB_CDC_SUPPORT_ETS_PRINTF:
* Note that this the interrupt handler has to be placed into IRAM because
* the interrupt handler can also be called in polling mode, when
* interrupts are disabled, and a write to USB is performed with cache disabled.
* Since the handler function is in IRAM, we can register the interrupt as IRAM capable.
* It is not because we actually need the interrupt to work with cache disabled!
*/
err = esp_intr_alloc(ETS_USB_INTR_SOURCE, ISR_FLAG | ESP_INTR_FLAG_INTRDISABLED,
esp_usb_console_interrupt, NULL, &s_usb_int_handle);
if (err != ESP_OK) {
esp_unregister_shutdown_handler(esp_usb_console_before_restart);
return err;
}
/* Initialize USB / CDC */
s_cdc_acm_device = cdc_acm_init(cdcmem, CDC_WORK_BUF_SIZE);
usb_dc_check_poll_for_interrupts();
/* Set callback for handling DTR/RTS lines and TX/RX events */
cdc_acm_irq_callback_set(s_cdc_acm_device, esp_usb_console_cdc_acm_cb);
cdc_acm_irq_state_enable(s_cdc_acm_device);
/* Set callback for handling DFU detach */
usb_dfu_set_detach_cb(esp_usb_console_dfu_detach_cb);
/* Enable interrupts on USB peripheral side */
USB0.gahbcfg |= USB_GLBLLNTRMSK_M;
/* Enable the interrupt handler */
esp_intr_enable(s_usb_int_handle);
#ifdef CONFIG_ESP_CONSOLE_USB_CDC_SUPPORT_ETS_PRINTF
/* Install esp_rom_printf handler */
ets_install_putc1(&esp_usb_console_write_char);
#endif // CONFIG_ESP_CONSOLE_USB_CDC_SUPPORT_ETS_PRINTF
return ESP_OK;
}
/* Non-static to allow placement into IRAM by ldgen.
* Must be called with the write lock held.
*/
ssize_t esp_usb_console_flush_internal(size_t last_write_size)
{
if (s_usb_tx_buf_pos == 0) {
return 0;
}
assert(s_usb_tx_buf_pos >= last_write_size);
ssize_t ret;
size_t tx_buf_pos_before = s_usb_tx_buf_pos - last_write_size;
int sent = cdc_acm_fifo_fill(s_cdc_acm_device, (const uint8_t*) s_usb_tx_buf, s_usb_tx_buf_pos);
if (sent == last_write_size) {
/* everything was sent */
ret = last_write_size;
s_usb_tx_buf_pos = 0;
} else if (sent == 0) {
/* nothing was sent, roll back to the original state */
ret = 0;
s_usb_tx_buf_pos = tx_buf_pos_before;
} else {
/* Some data was sent, but not all of the buffer.
* We can still tell the caller that all the new data
* was "sent" since it is in the buffer now.
*/
ret = last_write_size;
memmove(s_usb_tx_buf, s_usb_tx_buf + sent, s_usb_tx_buf_pos - sent);
s_usb_tx_buf_pos = s_usb_tx_buf_pos - sent;
}
return ret;
}
ssize_t esp_usb_console_flush(void)
{
if (s_cdc_acm_device == NULL) {
return -1;
}
write_lock_acquire();
int ret = esp_usb_console_flush_internal(0);
write_lock_release();
return ret;
}
ssize_t esp_usb_console_write_buf(const char* buf, size_t size)
{
if (s_cdc_acm_device == NULL) {
return -1;
}
if (size == 0) {
return 0;
}
write_lock_acquire();
ssize_t tx_buf_available = ACM_BYTES_PER_TX - s_usb_tx_buf_pos;
ssize_t will_write = MIN(size, tx_buf_available);
memcpy(s_usb_tx_buf + s_usb_tx_buf_pos, buf, will_write);
s_usb_tx_buf_pos += will_write;
ssize_t ret;
if (s_usb_tx_buf_pos == ACM_BYTES_PER_TX || buf[size - 1] == '\n') {
/* Buffer is full, or a newline is found.
* For binary streams, we probably shouldn't do line buffering,
* but text streams are likely going to be the most common case.
*/
ret = esp_usb_console_flush_internal(will_write);
} else {
/* nothing sent out yet, but all the new data is in the buffer now */
ret = will_write;
}
write_lock_release();
return ret;
}
ssize_t esp_usb_console_read_buf(char *buf, size_t buf_size)
{
if (s_cdc_acm_device == NULL) {
return -1;
}
if (!esp_usb_console_read_available()) {
return 0;
}
int bytes_read = cdc_acm_fifo_read(s_cdc_acm_device, (uint8_t*) buf, buf_size);
return bytes_read;
}
esp_err_t esp_usb_console_set_cb(esp_usb_console_cb_t rx_cb, esp_usb_console_cb_t tx_cb, void *arg)
{
if (s_cdc_acm_device == NULL) {
return ESP_ERR_INVALID_STATE;
}
s_rx_cb = rx_cb;
if (s_rx_cb) {
cdc_acm_irq_rx_enable(s_cdc_acm_device);
} else {
cdc_acm_irq_rx_disable(s_cdc_acm_device);
}
s_tx_cb = tx_cb;
if (s_tx_cb) {
cdc_acm_irq_tx_enable(s_cdc_acm_device);
} else {
cdc_acm_irq_tx_disable(s_cdc_acm_device);
}
s_cb_arg = arg;
return ESP_OK;
}
bool esp_usb_console_read_available(void)
{
if (s_cdc_acm_device == NULL) {
return false;
}
return cdc_acm_rx_fifo_cnt(s_cdc_acm_device) > 0;
}
bool esp_usb_console_write_available(void)
{
if (s_cdc_acm_device == NULL) {
return false;
}
return cdc_acm_irq_tx_ready(s_cdc_acm_device) != 0;
}
#ifdef CONFIG_ESP_CONSOLE_USB_CDC_SUPPORT_ETS_PRINTF
/* Used as an output function by esp_rom_printf.
* The LF->CRLF replacement logic replicates the one in esp_rom_uart_putc.
* Not static to allow placement into IRAM by ldgen.
*/
void esp_usb_console_write_char(char c)
{
char cr = '\r';
char lf = '\n';
if (c == lf) {
esp_usb_console_write_buf(&cr, 1);
esp_usb_console_write_buf(&lf, 1);
} else if (c == '\r') {
} else {
esp_usb_console_write_buf(&c, 1);
}
}
static inline void write_lock_acquire(void)
{
portENTER_CRITICAL_SAFE(&s_write_lock);
}
static inline void write_lock_release(void)
{
portEXIT_CRITICAL_SAFE(&s_write_lock);
}
#else // CONFIG_ESP_CONSOLE_USB_CDC_SUPPORT_ETS_PRINTF
static inline void write_lock_acquire(void)
{
}
static inline void write_lock_release(void)
{
}
#endif // CONFIG_ESP_CONSOLE_USB_CDC_SUPPORT_ETS_PRINTF

47
components/esp_system/port/soc/esp32s2/usb_console.c → components/esp_system/port/usb_console.c
Wyświetl plik

@ -27,6 +27,8 @@
#include "hal/soc_hal.h"
#include "esp_rom_uart.h"
#include "esp_rom_sys.h"
#include "esp_rom_caps.h"
#ifdef CONFIG_IDF_TARGET_ESP32S2
#include "esp32s2/rom/usb/usb_dc.h"
#include "esp32s2/rom/usb/cdc_acm.h"
#include "esp32s2/rom/usb/usb_dfu.h"
@ -34,7 +36,15 @@
#include "esp32s2/rom/usb/usb_os_glue.h"
#include "esp32s2/rom/usb/usb_persist.h"
#include "esp32s2/rom/usb/chip_usb_dw_wrapper.h"
#elif CONFIG_IDF_TARGET_ESP32S3
#include "esp32s3/rom/usb/usb_dc.h"
#include "esp32s3/rom/usb/cdc_acm.h"
#include "esp32s3/rom/usb/usb_dfu.h"
#include "esp32s3/rom/usb/usb_device.h"
#include "esp32s3/rom/usb/usb_os_glue.h"
#include "esp32s3/rom/usb/usb_persist.h"
#include "esp32s3/rom/usb/chip_usb_dw_wrapper.h"
#endif
#define CDC_WORK_BUF_SIZE (ESP_ROM_CDC_ACM_WORK_BUF_MIN + CONFIG_ESP_CONSOLE_USB_CDC_RX_BUF_SIZE)
@ -60,8 +70,17 @@ static esp_timer_handle_t s_restart_timer;
static const char* TAG = "usb_console";
/* This lock is used for two purposes:
* - To protect functions which write something to USB, e.g. esp_usb_console_write_buf.
* This is necessary since these functions may be called by esp_rom_printf, so the calls
* may preempt each other or happen concurrently.
* (The calls coming from regular 'printf', i.e. via VFS layer, are already protected
* by a mutex in the VFS driver.)
* - To implement "osglue" functions of the USB stack. These normally require interrupts
* to be disabled. However on multi-core chips a critical section is necessary.
*/
static portMUX_TYPE s_lock = portMUX_INITIALIZER_UNLOCKED;
#ifdef CONFIG_ESP_CONSOLE_USB_CDC_SUPPORT_ETS_PRINTF
static portMUX_TYPE s_write_lock = portMUX_INITIALIZER_UNLOCKED;
void esp_usb_console_write_char(char c);
#define ISR_FLAG ESP_INTR_FLAG_IRAM
#else
@ -73,8 +92,6 @@ void esp_usb_console_write_char(char c);
static inline void write_lock_acquire(void);
static inline void write_lock_release(void);
/* The two functions below need to be revisited in the multicore case */
_Static_assert(SOC_CPU_CORES_NUM == 1, "usb_osglue_*_int is not multicore capable");
/* Other forward declarations */
void esp_usb_console_before_restart(void);
@ -84,9 +101,7 @@ void esp_usb_console_before_restart(void);
*/
void esp_usb_console_osglue_dis_int(void)
{
if (s_usb_int_handle) {
esp_intr_disable(s_usb_int_handle);
}
portENTER_CRITICAL_SAFE(&s_lock);
}
/* Called by ROM to enable the interrupts
@ -94,9 +109,7 @@ void esp_usb_console_osglue_dis_int(void)
*/
void esp_usb_console_osglue_ena_int(void)
{
if (s_usb_int_handle) {
esp_intr_enable(s_usb_int_handle);
}
portEXIT_CRITICAL_SAFE(&s_lock);
}
/* Delay function called by ROM USB driver.
@ -231,12 +244,9 @@ void esp_usb_console_before_restart(void)
*/
static void esp_usb_console_rom_cleanup(void)
{
extern char rom_usb_dev, rom_usb_dev_end;
extern char rom_usb_dw_ctrl, rom_usb_dw_ctrl_end;
usb_dev_deinit();
usb_dw_ctrl_deinit();
uart_acm_dev = NULL;
memset((void *) &rom_usb_dev, 0, &rom_usb_dev_end - &rom_usb_dev);
memset((void *) &rom_usb_dw_ctrl, 0, &rom_usb_dw_ctrl_end - &rom_usb_dw_ctrl);
}
esp_err_t esp_usb_console_init(void)
@ -288,7 +298,8 @@ esp_err_t esp_usb_console_init(void)
#ifdef CONFIG_ESP_CONSOLE_USB_CDC_SUPPORT_ETS_PRINTF
/* Install esp_rom_printf handler */
ets_install_putc1(&esp_usb_console_write_char);
esp_rom_uart_set_as_console(ESP_ROM_USB_OTG_NUM);
esp_rom_install_channel_putc(1, &esp_usb_console_write_char);
#endif // CONFIG_ESP_CONSOLE_USB_CDC_SUPPORT_ETS_PRINTF
return ESP_OK;
@ -451,11 +462,11 @@ void esp_usb_console_write_char(char c)
}
static inline void write_lock_acquire(void)
{
portENTER_CRITICAL_SAFE(&s_write_lock);
portENTER_CRITICAL_SAFE(&s_lock);
}
static inline void write_lock_release(void)
{
portEXIT_CRITICAL_SAFE(&s_write_lock);
portEXIT_CRITICAL_SAFE(&s_lock);
}
#else // CONFIG_ESP_CONSOLE_USB_CDC_SUPPORT_ETS_PRINTF

2
components/esp_system/system_init_fn.txt
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@ -31,7 +31,7 @@
# usb_console needs to create an esp_timer at startup.
# This can be done only after esp_timer initialization, which is now in init_components0.
220: esp_usb_console_init_restart_timer in components/esp_system/port/soc/esp32s2/usb_console.c on BIT(0)
220: esp_usb_console_init_restart_timer in components/esp_system/port/usb_console.c on BIT(0)
# usb_serial_jtag needs to create and acquire a PM clock at startup.
# This makes more sense to be done after esp_pm_impl_init, which is initialized in init_components0.

12
docs/en/COPYRIGHT.rst
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@ -87,6 +87,13 @@ ESP32, ESP32-S and ESP32-C Series SoCs mask ROM hardware includes binaries compi
* TJpgDec_ Copyright (C) 2011, ChaN, all right reserved. See below for license.
* Parts of Zephyr RTOS USB stack:
* `DesignWare USB device driver`_ Copyright (c) 2016 Intel Corporation and licensed under Apache 2.0 license.
* `Generic USB device driver`_ Copyright (c) 2006 Bertrik Sikken (bertrik@sikken.nl), 2016 Intel Corporation and licensed under BSD 3-clause license.
* `USB descriptors functionality`_ Copyright (c) 2017 PHYTEC Messtechnik GmbH, 2017-2018 Intel Corporation and licensed under Apache 2.0 license.
* `USB DFU class driver`_ Copyright(c) 2015-2016 Intel Corporation, 2017 PHYTEC Messtechnik GmbH and licensed under BSD 3-clause license.
* `USB CDC ACM class driver`_ Copyright(c) 2015-2016 Intel Corporation and licensed under Apache 2.0 license
Xtensa libhal MIT License
=========================
@ -162,3 +169,8 @@ Copyright (C) 2011, ChaN, all right reserved.
.. _sphinx_idf_theme: https://github.com/espressif/sphinx_idf_theme
.. _sphinx_rtd_theme: https://github.com/readthedocs/sphinx_rtd_theme
.. _SEGGER SystemView: https://www.segger.com/downloads/systemview/
.. _DesignWare USB device driver: https://github.com/zephyrproject-rtos/zephyr/blob/v1.12-branch/drivers/usb/device/usb_dc_dw.c
.. _Generic USB device driver: https://github.com/zephyrproject-rtos/zephyr/blob/v1.12-branch/subsys/usb/usb_device.c
.. _USB descriptors functionality: https://github.com/zephyrproject-rtos/zephyr/blob/v1.12-branch/subsys/usb/usb_descriptor.c
.. _USB DFU class driver: https://github.com/zephyrproject-rtos/zephyr/blob/v1.12-branch/subsys/usb/class/usb_dfu.c
.. _USB CDC ACM class driver: https://github.com/zephyrproject-rtos/zephyr/blob/v1.12-branch/subsys/usb/class/cdc_acm.c

6
examples/system/.build-test-rules.yml
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@ -18,10 +18,8 @@ examples/system/console/advanced:
reason: Sufficient to run this app on one chip with each architecture
examples/system/console/advanced_usb_cdc:
enable:
- if: IDF_TARGET == "esp32s2"
temporary: true
reason: the other targets are not tested yet
disable:
- if: SOC_USB_PERIPH_NUM == 0
examples/system/console/basic:
disable_test:

12
examples/system/console/advanced_usb_cdc/README.md
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@ -1,5 +1,5 @@
| Supported Targets | ESP32-S2 |
| ----------------- | -------- |
| Supported Targets | ESP32-S2 | ESP32-S3 |
| ----------------- | -------- | -------- |
# USB_OTG CDC Console Example
@ -14,7 +14,11 @@ The interactive shell implemented in this example contains a wide variety of com
### Hardware Required
This example can run on an ESP32-S2 development board, with a USB cable connected to GPIO19 and GPIO20.
This example can run on an ESP32-S2 or ESP32-S3 development board with USB port attached to the built-in USB_OTG controller.
For more details about connecting and configuring USB_OTG (including pin numbers), see the IDF Programming Guide:
* [ESP32-S2 USB_OTG](https://docs.espressif.com/projects/esp-idf/en/stable/esp32s2/api-guides/usb-otg-console.html)
* [ESP32-S3 USB_OTG](https://docs.espressif.com/projects/esp-idf/en/stable/esp32s3/api-guides/usb-otg-console.html)
### Build and Flash
@ -36,7 +40,7 @@ idf.py -p PORT flash
#### Flashing the project for the first time using USB
We can also use the ESP32-S2 built-in USB bootloader to flash the program for the first time.
We can also use the built-in USB bootloader in the ESP chip to flash the program for the first time.
1. Connect the development board using a USB breakout cable to the computer.
2. Put the chip into bootloader (download) mode, by holding "Boot" button (connected to GPIO0) and pressing "Reset" button.

3
examples/system/console/advanced_usb_cdc/sdkconfig.defaults
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@ -1,6 +1,3 @@
# Build for ESP32-S2 by default
CONFIG_IDF_TARGET="esp32s2"
# Enable USB console
CONFIG_ESP_CONSOLE_USB_CDC=y

9
tools/ci/check_copyright_config.yaml
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@ -157,6 +157,15 @@ tinyusb:
- Unlicense
- CC0-1.0
# Portions of the USB stack in ROM are derived from Zephyr project,
# with files licensed under a mix of Apache and BSD-3-Clause licenses.
esp_rom_usb:
include:
- 'components/esp_rom/include/*/rom/usb/'
allowed_licenses:
- Apache-2.0
- BSD-3-Clause
protocol_examples_common_component:
include:
- 'examples/common_components/protocol_examples_common/'

22
tools/ci/check_copyright_ignore.txt
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@ -500,17 +500,6 @@ components/esp_rom/include/esp32s2/rom/libc_stubs.h
components/esp_rom/include/esp32s2/rom/opi_flash.h
components/esp_rom/include/esp32s2/rom/rsa_pss.h
components/esp_rom/include/esp32s2/rom/sha.h
components/esp_rom/include/esp32s2/rom/usb/cdc_acm.h
components/esp_rom/include/esp32s2/rom/usb/chip_usb_dw_wrapper.h
components/esp_rom/include/esp32s2/rom/usb/cpio.h
components/esp_rom/include/esp32s2/rom/usb/usb_cdc.h
components/esp_rom/include/esp32s2/rom/usb/usb_common.h
components/esp_rom/include/esp32s2/rom/usb/usb_dc.h
components/esp_rom/include/esp32s2/rom/usb/usb_descriptor.h
components/esp_rom/include/esp32s2/rom/usb/usb_device.h
components/esp_rom/include/esp32s2/rom/usb/usb_dfu.h
components/esp_rom/include/esp32s2/rom/usb/usb_os_glue.h
components/esp_rom/include/esp32s2/rom/usb/usb_persist.h
components/esp_rom/include/esp32s3/rom/bigint.h
components/esp_rom/include/esp32s3/rom/crc.h
components/esp_rom/include/esp32s3/rom/digital_signature.h
@ -521,17 +510,6 @@ components/esp_rom/include/esp32s3/rom/rom_layout.h
components/esp_rom/include/esp32s3/rom/rsa_pss.h
components/esp_rom/include/esp32s3/rom/sha.h
components/esp_rom/include/esp32s3/rom/tjpgd.h
components/esp_rom/include/esp32s3/rom/usb/cdc_acm.h
components/esp_rom/include/esp32s3/rom/usb/chip_usb_dw_wrapper.h
components/esp_rom/include/esp32s3/rom/usb/cpio.h
components/esp_rom/include/esp32s3/rom/usb/usb_cdc.h
components/esp_rom/include/esp32s3/rom/usb/usb_common.h
components/esp_rom/include/esp32s3/rom/usb/usb_dc.h
components/esp_rom/include/esp32s3/rom/usb/usb_descriptor.h
components/esp_rom/include/esp32s3/rom/usb/usb_device.h
components/esp_rom/include/esp32s3/rom/usb/usb_dfu.h
components/esp_rom/include/esp32s3/rom/usb/usb_os_glue.h
components/esp_rom/include/esp32s3/rom/usb/usb_persist.h
components/esp_rom/include/esp_rom_crc.h
components/esp_rom/include/esp_rom_gpio.h
components/esp_rom/include/linux/soc/reset_reasons.h

3
tools/test_apps/system/build_test/sdkconfig.ci.usb_console_ets_printf 100644
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@ -0,0 +1,3 @@
CONFIG_IDF_TARGET="esp32s3"
CONFIG_ESP_CONSOLE_USB_CDC=y
CONFIG_ESP_CONSOLE_USB_CDC_SUPPORT_ETS_PRINTF=y