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uart: Provide support for esp32c2 and esp32h2 

UART examples, unit test, and programming guide are all updated.
pull/7148/merge
songruojing 2022-01-17 20:32:39 +08:00
rodzic 6e0308d352
commit 24a60c12c6
19 zmienionych plików z 219 dodań i 217 usunięć
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4
components/driver/test/test_rs485.c
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@ -34,7 +34,7 @@
// Wait timeout for uart driver
#define PACKET_READ_TICS (1000 / portTICK_PERIOD_MS)
#if !TEMPORARY_DISABLED_FOR_TARGETS(ESP32S2, ESP32S3, ESP32C3)
#if !TEMPORARY_DISABLED_FOR_TARGETS(ESP32S2, ESP32S3, ESP32C3, ESP32C2, ESP32H2)
//No runners
// The table for fast CRC16 calculation
@ -292,4 +292,4 @@ static void rs485_master(void)
*/
TEST_CASE_MULTIPLE_DEVICES("RS485 half duplex uart multiple devices test.", "[driver_RS485][test_env=UT_T2_RS485]", rs485_master, rs485_slave);
#endif //!TEMPORARY_DISABLED_FOR_TARGETS(ESP32S3, ESP32C3)
#endif //!TEMPORARY_DISABLED_FOR_TARGETS(..)

8
components/driver/test/test_uart.c
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@ -16,8 +16,8 @@
#define UART_TAG "Uart"
#define UART_NUM1 (UART_NUM_1)
#define BUF_SIZE (100)
#define UART1_RX_PIN (22)
#define UART1_TX_PIN (23)
#define UART1_RX_PIN (5)
#define UART1_TX_PIN (4)
#define UART_BAUD_11520 (11520)
#define UART_BAUD_115200 (115200)
#define TOLERANCE (0.02) //baud rate error tolerance 2%.
@ -378,8 +378,8 @@ TEST_CASE("uart int state restored after flush", "[uart]")
const uart_port_t uart_echo = UART_NUM_1;
const int uart_tx_signal = U1TXD_OUT_IDX;
const int uart_tx = 4;
const int uart_rx = 5;
const int uart_tx = UART1_TX_PIN;
const int uart_rx = UART1_RX_PIN;
const int buf_size = 256;
const int intr_alloc_flags = 0;

5
components/driver/uart.c
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@ -199,9 +199,8 @@ static void uart_module_enable(uart_port_t uart_num)
if (uart_context[uart_num].hw_enabled != true) {
periph_module_enable(uart_periph_signal[uart_num].module);
if (uart_num != CONFIG_ESP_CONSOLE_UART_NUM) {
// Workaround for ESP32C3: enable core reset
// before enabling uart module clock
// to prevent uart output garbage value.
// Workaround for ESP32C3/S3: enable core reset before enabling uart module clock to prevent uart output
// garbage value.
#if SOC_UART_REQUIRE_CORE_RESET
uart_hal_set_reset_core(&(uart_context[uart_num].hal), true);
periph_module_reset(uart_periph_signal[uart_num].module);

34
components/hal/esp32c2/include/hal/uart_ll.h
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@ -51,18 +51,42 @@ typedef enum {
UART_INTR_WAKEUP = (0x1 << 19),
} uart_intr_t;
static inline void uart_ll_reset_core(uart_dev_t *hw) {
hw->clk_conf.rst_core = 1;
hw->clk_conf.rst_core = 0;
/**
* @brief Configure the UART core reset.
*
* @param hw Beginning address of the peripheral registers.
* @param core_rst_en True to enable the core reset, otherwise set it false.
*
* @return None.
*/
static inline void uart_ll_set_reset_core(uart_dev_t *hw, bool core_rst_en)
{
hw->clk_conf.rst_core = core_rst_en;
}
static inline void uart_ll_sclk_enable(uart_dev_t *hw) {
/**
* @brief Enable the UART clock.
*
* @param hw Beginning address of the peripheral registers.
*
* @return None.
*/
static inline void uart_ll_sclk_enable(uart_dev_t *hw)
{
hw->clk_conf.sclk_en = 1;
hw->clk_conf.rx_sclk_en = 1;
hw->clk_conf.tx_sclk_en = 1;
}
static inline void uart_ll_sclk_disable(uart_dev_t *hw) {
/**
* @brief Disable the UART clock.
*
* @param hw Beginning address of the peripheral registers.
*
* @return None.
*/
static inline void uart_ll_sclk_disable(uart_dev_t *hw)
{
hw->clk_conf.sclk_en = 0;
hw->clk_conf.rx_sclk_en = 0;
hw->clk_conf.tx_sclk_en = 0;

31
components/hal/esp32c3/include/hal/uart_ll.h
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@ -54,17 +54,42 @@ typedef enum {
UART_INTR_WAKEUP = (0x1 << 19),
} uart_intr_t;
static inline void uart_ll_set_reset_core(uart_dev_t *hw, bool core_rst_en) {
/**
* @brief Configure the UART core reset.
*
* @param hw Beginning address of the peripheral registers.
* @param core_rst_en True to enable the core reset, otherwise set it false.
*
* @return None.
*/
static inline void uart_ll_set_reset_core(uart_dev_t *hw, bool core_rst_en)
{
hw->clk_conf.rst_core = core_rst_en;
}
static inline void uart_ll_sclk_enable(uart_dev_t *hw) {
/**
* @brief Enable the UART clock.
*
* @param hw Beginning address of the peripheral registers.
*
* @return None.
*/
static inline void uart_ll_sclk_enable(uart_dev_t *hw)
{
hw->clk_conf.sclk_en = 1;
hw->clk_conf.rx_sclk_en = 1;
hw->clk_conf.tx_sclk_en = 1;
}
static inline void uart_ll_sclk_disable(uart_dev_t *hw) {
/**
* @brief Disable the UART clock.
*
* @param hw Beginning address of the peripheral registers.
*
* @return None.
*/
static inline void uart_ll_sclk_disable(uart_dev_t *hw)
{
hw->clk_conf.sclk_en = 0;
hw->clk_conf.rx_sclk_en = 0;
hw->clk_conf.tx_sclk_en = 0;

31
components/hal/esp32h2/include/hal/uart_ll.h
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@ -54,17 +54,42 @@ typedef enum {
UART_INTR_WAKEUP = (0x1 << 19),
} uart_intr_t;
static inline void uart_ll_set_reset_core(uart_dev_t *hw, bool core_rst_en) {
/**
* @brief Configure the UART core reset.
*
* @param hw Beginning address of the peripheral registers.
* @param core_rst_en True to enable the core reset, otherwise set it false.
*
* @return None.
*/
static inline void uart_ll_set_reset_core(uart_dev_t *hw, bool core_rst_en)
{
hw->clk_conf.rst_core = core_rst_en;
}
static inline void uart_ll_sclk_enable(uart_dev_t *hw) {
/**
* @brief Enable the UART clock.
*
* @param hw Beginning address of the peripheral registers.
*
* @return None.
*/
static inline void uart_ll_sclk_enable(uart_dev_t *hw)
{
hw->clk_conf.sclk_en = 1;
hw->clk_conf.rx_sclk_en = 1;
hw->clk_conf.tx_sclk_en = 1;
}
static inline void uart_ll_sclk_disable(uart_dev_t *hw) {
/**
* @brief Disable the UART clock.
*
* @param hw Beginning address of the peripheral registers.
*
* @return None.
*/
static inline void uart_ll_sclk_disable(uart_dev_t *hw)
{
hw->clk_conf.sclk_en = 0;
hw->clk_conf.rx_sclk_en = 0;
hw->clk_conf.tx_sclk_en = 0;

20
components/hal/include/hal/uart_hal.h
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@ -1,16 +1,8 @@
// Copyright 2015-2019 Espressif Systems (Shanghai) PTE LTD
//
// Licensed under the Apache License, Version 2.0 (the "License");
// you may not use this file except in compliance with the License.
// You may obtain a copy of the License at
//
// http://www.apache.org/licenses/LICENSE-2.0
//
// Unless required by applicable law or agreed to in writing, software
// distributed under the License is distributed on an "AS IS" BASIS,
// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
// See the License for the specific language governing permissions and
// limitations under the License.
/*
* SPDX-FileCopyrightText: 2015-2022 Espressif Systems (Shanghai) CO LTD
*
* SPDX-License-Identifier: Apache-2.0
*/
/*******************************************************************************
* NOTICE
@ -128,7 +120,7 @@ typedef struct {
* @brief Configure the UART core reset
*
* @param hal Context of the HAL layer
* @param Set true to enable the core reset, otherwise set it false
* @param core_rst_en true to enable the core reset, otherwise set it false
*
* @return None
*/

46
components/soc/esp32c2/include/soc/uart_channel.h
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@ -4,50 +4,18 @@
* SPDX-License-Identifier: Apache-2.0
*/
// This file defines GPIO lookup macros for available UART IO_MUX pins on ESP32C2.
#ifndef _SOC_UART_CHANNEL_H
#define _SOC_UART_CHANNEL_H
//UART channels
#define UART_GPIO1_DIRECT_CHANNEL UART_NUM_0
#define UART_NUM_0_TXD_DIRECT_GPIO_NUM 1
#define UART_GPIO3_DIRECT_CHANNEL UART_NUM_0
#define UART_NUM_0_RXD_DIRECT_GPIO_NUM 3
#define UART_GPIO20_DIRECT_CHANNEL UART_NUM_0
#define UART_NUM_0_TXD_DIRECT_GPIO_NUM 20
#define UART_GPIO19_DIRECT_CHANNEL UART_NUM_0
#define UART_NUM_0_CTS_DIRECT_GPIO_NUM 19
#define UART_GPIO22_DIRECT_CHANNEL UART_NUM_0
#define UART_NUM_0_RTS_DIRECT_GPIO_NUM 22
#define UART_NUM_0_RXD_DIRECT_GPIO_NUM 19
#define UART_TXD_GPIO1_DIRECT_CHANNEL UART_GPIO1_DIRECT_CHANNEL
#define UART_RXD_GPIO3_DIRECT_CHANNEL UART_GPIO3_DIRECT_CHANNEL
#define UART_CTS_GPIO19_DIRECT_CHANNEL UART_GPIO19_DIRECT_CHANNEL
#define UART_RTS_GPIO22_DIRECT_CHANNEL UART_GPIO22_DIRECT_CHANNEL
#define UART_GPIO10_DIRECT_CHANNEL UART_NUM_1
#define UART_NUM_1_TXD_DIRECT_GPIO_NUM 10
#define UART_GPIO9_DIRECT_CHANNEL UART_NUM_1
#define UART_NUM_1_RXD_DIRECT_GPIO_NUM 9
#define UART_GPIO6_DIRECT_CHANNEL UART_NUM_1
#define UART_NUM_1_CTS_DIRECT_GPIO_NUM 6
#define UART_GPIO11_DIRECT_CHANNEL UART_NUM_1
#define UART_NUM_1_RTS_DIRECT_GPIO_NUM 11
#define UART_TXD_GPIO10_DIRECT_CHANNEL UART_GPIO10_DIRECT_CHANNEL
#define UART_RXD_GPIO9_DIRECT_CHANNEL UART_GPIO9_DIRECT_CHANNEL
#define UART_CTS_GPIO6_DIRECT_CHANNEL UART_GPIO6_DIRECT_CHANNEL
#define UART_RTS_GPIO11_DIRECT_CHANNEL UART_GPIO11_DIRECT_CHANNEL
#define UART_GPIO17_DIRECT_CHANNEL UART_NUM_2
#define UART_NUM_2_TXD_DIRECT_GPIO_NUM 17
#define UART_GPIO16_DIRECT_CHANNEL UART_NUM_2
#define UART_NUM_2_RXD_DIRECT_GPIO_NUM 16
#define UART_GPIO8_DIRECT_CHANNEL UART_NUM_2
#define UART_NUM_2_CTS_DIRECT_GPIO_NUM 8
#define UART_GPIO7_DIRECT_CHANNEL UART_NUM_2
#define UART_NUM_2_RTS_DIRECT_GPIO_NUM 7
#define UART_TXD_GPIO17_DIRECT_CHANNEL UART_GPIO17_DIRECT_CHANNEL
#define UART_RXD_GPIO16_DIRECT_CHANNEL UART_GPIO16_DIRECT_CHANNEL
#define UART_CTS_GPIO8_DIRECT_CHANNEL UART_GPIO8_DIRECT_CHANNEL
#define UART_RTS_GPIO7_DIRECT_CHANNEL UART_GPIO7_DIRECT_CHANNEL
#define UART_TXD_GPIO20_DIRECT_CHANNEL UART_GPIO20_DIRECT_CHANNEL
#define UART_RXD_GPIO19_DIRECT_CHANNEL UART_GPIO19_DIRECT_CHANNEL
#endif

75
components/soc/esp32h2/include/soc/uart_channel.h
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@ -1,61 +1,34 @@
// Copyright 2020 Espressif Systems (Shanghai) PTE LTD
//
// Licensed under the Apache License, Version 2.0 (the "License");
// you may not use this file except in compliance with the License.
// You may obtain a copy of the License at
/*
* SPDX-FileCopyrightText: 2020-2022 Espressif Systems (Shanghai) CO LTD
*
* SPDX-License-Identifier: Apache-2.0
*/
// http://www.apache.org/licenses/LICENSE-2.0
//
// Unless required by applicable law or agreed to in writing, software
// distributed under the License is distributed on an "AS IS" BASIS,
// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
// See the License for the specific language governing permissions and
// limitations under the License.
// This file defines GPIO lookup macros for available UART IO_MUX pins on ESP32H2.
#ifndef _SOC_UART_CHANNEL_H
#define _SOC_UART_CHANNEL_H
#include "sdkconfig.h"
//UART channels
#define UART_GPIO1_DIRECT_CHANNEL UART_NUM_0
#define UART_NUM_0_TXD_DIRECT_GPIO_NUM 1
#define UART_GPIO3_DIRECT_CHANNEL UART_NUM_0
#define UART_NUM_0_RXD_DIRECT_GPIO_NUM 3
#define UART_GPIO19_DIRECT_CHANNEL UART_NUM_0
#define UART_NUM_0_CTS_DIRECT_GPIO_NUM 19
#if CONFIG_IDF_TARGET_ESP32H2_BETA_VERSION_1
#define UART_GPIO21_DIRECT_CHANNEL UART_NUM_0
#define UART_NUM_0_TXD_DIRECT_GPIO_NUM 21
#define UART_GPIO20_DIRECT_CHANNEL UART_NUM_0
#define UART_NUM_0_RXD_DIRECT_GPIO_NUM 20
#define UART_TXD_GPIO21_DIRECT_CHANNEL UART_GPIO21_DIRECT_CHANNEL
#define UART_RXD_GPIO20_DIRECT_CHANNEL UART_GPIO20_DIRECT_CHANNEL
#elif CONFIG_IDF_TARGET_ESP32H2_BETA_VERSION_2
#define UART_GPIO22_DIRECT_CHANNEL UART_NUM_0
#define UART_NUM_0_RTS_DIRECT_GPIO_NUM 22
#define UART_NUM_0_TXD_DIRECT_GPIO_NUM 22
#define UART_GPIO21_DIRECT_CHANNEL UART_NUM_0
#define UART_NUM_0_RXD_DIRECT_GPIO_NUM 21
#define UART_TXD_GPIO1_DIRECT_CHANNEL UART_GPIO1_DIRECT_CHANNEL
#define UART_RXD_GPIO3_DIRECT_CHANNEL UART_GPIO3_DIRECT_CHANNEL
#define UART_CTS_GPIO19_DIRECT_CHANNEL UART_GPIO19_DIRECT_CHANNEL
#define UART_RTS_GPIO22_DIRECT_CHANNEL UART_GPIO22_DIRECT_CHANNEL
#define UART_GPIO10_DIRECT_CHANNEL UART_NUM_1
#define UART_NUM_1_TXD_DIRECT_GPIO_NUM 10
#define UART_GPIO9_DIRECT_CHANNEL UART_NUM_1
#define UART_NUM_1_RXD_DIRECT_GPIO_NUM 9
#define UART_GPIO6_DIRECT_CHANNEL UART_NUM_1
#define UART_NUM_1_CTS_DIRECT_GPIO_NUM 6
#define UART_GPIO11_DIRECT_CHANNEL UART_NUM_1
#define UART_NUM_1_RTS_DIRECT_GPIO_NUM 11
#define UART_TXD_GPIO10_DIRECT_CHANNEL UART_GPIO10_DIRECT_CHANNEL
#define UART_RXD_GPIO9_DIRECT_CHANNEL UART_GPIO9_DIRECT_CHANNEL
#define UART_CTS_GPIO6_DIRECT_CHANNEL UART_GPIO6_DIRECT_CHANNEL
#define UART_RTS_GPIO11_DIRECT_CHANNEL UART_GPIO11_DIRECT_CHANNEL
#define UART_GPIO17_DIRECT_CHANNEL UART_NUM_2
#define UART_NUM_2_TXD_DIRECT_GPIO_NUM 17
#define UART_GPIO16_DIRECT_CHANNEL UART_NUM_2
#define UART_NUM_2_RXD_DIRECT_GPIO_NUM 16
#define UART_GPIO8_DIRECT_CHANNEL UART_NUM_2
#define UART_NUM_2_CTS_DIRECT_GPIO_NUM 8
#define UART_GPIO7_DIRECT_CHANNEL UART_NUM_2
#define UART_NUM_2_RTS_DIRECT_GPIO_NUM 7
#define UART_TXD_GPIO17_DIRECT_CHANNEL UART_GPIO17_DIRECT_CHANNEL
#define UART_RXD_GPIO16_DIRECT_CHANNEL UART_GPIO16_DIRECT_CHANNEL
#define UART_CTS_GPIO8_DIRECT_CHANNEL UART_GPIO8_DIRECT_CHANNEL
#define UART_RTS_GPIO7_DIRECT_CHANNEL UART_GPIO7_DIRECT_CHANNEL
#define UART_TXD_GPIO22_DIRECT_CHANNEL UART_GPIO22_DIRECT_CHANNEL
#define UART_RXD_GPIO21_DIRECT_CHANNEL UART_GPIO21_DIRECT_CHANNEL
#endif
#endif

1
docs/docs_not_updated/esp32c2.txt
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@ -97,7 +97,6 @@ api-reference/peripherals/i2c
api-reference/peripherals/dedic_gpio
api-reference/peripherals/spi_master
api-reference/peripherals/index
api-reference/peripherals/uart
api-reference/kconfig
api-reference/network/esp_openthread
api-reference/network/esp_eth

22
docs/en/api-reference/peripherals/uart.rst
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@ -1,20 +1,16 @@
Universal Asynchronous Receiver/Transmitter (UART)
==================================================
{IDF_TARGET_UART_NUM:default = "UART_NUM_1", esp32 = "UART_NUM_2", esp32s3 = "UART_NUM_2"}
{IDF_TARGET_UART_NUM:default="two", esp32="three", esp32s3="three"}
{IDF_TARGET_UART_EXAMPLE_PORT:default = "UART_NUM_1", esp32 = "UART_NUM_2", esp32s3 = "UART_NUM_2"}
Overview
--------
A Universal Asynchronous Receiver/Transmitter (UART) is a hardware feature that handles communication (i.e., timing requirements and data framing) using widely-adopted asynchronous serial communication interfaces, such as RS232, RS422, RS485. A UART provides a widely adopted and cheap method to realize full-duplex or half-duplex data exchange among different devices.
.. only:: esp32 or esp32s3
The {IDF_TARGET_NAME} chip has three UART controllers (UART0, UART1, and UART2), each featuring an identical set of registers to simplify programming and for more flexibility.
.. only:: esp32s2 or esp32c3
The {IDF_TARGET_NAME} chip has two UART controllers (UART0 and UART1), each featuring an identical set of registers to simplify programming and for more flexibility.
The {IDF_TARGET_NAME} chip has {IDF_TARGET_UART_NUM} UART controllers (also referred to as port), each featuring an identical set of registers to simplify programming and for more flexibility.
Each UART controller is independently configurable with parameters such as baud rate, data bit length, bit ordering, number of stop bits, parity bit etc. All the controllers are compatible with UART-enabled devices from various manufacturers and can also support Infrared Data Association protocols (IrDA).
@ -50,7 +46,7 @@ Call the function :cpp:func:`uart_param_config` and pass to it a :cpp:type:`uart
.. code-block:: c
const uart_port_t uart_num = {IDF_TARGET_UART_NUM};
const uart_port_t uart_num = {IDF_TARGET_UART_EXAMPLE_PORT};
uart_config_t uart_config = {
.baud_rate = 115200,
.data_bits = UART_DATA_8_BITS,
@ -103,7 +99,7 @@ The same macro should be specified for pins that will not be used.
.. code-block:: c
// Set UART pins(TX: IO4, RX: IO5, RTS: IO18, CTS: IO19)
ESP_ERROR_CHECK(uart_set_pin({IDF_TARGET_UART_NUM}, 4, 5, 18, 19));
ESP_ERROR_CHECK(uart_set_pin({IDF_TARGET_UART_EXAMPLE_PORT}, 4, 5, 18, 19));
.. _uart-api-driver-installation:
@ -125,7 +121,7 @@ The function will allocate the required internal resources for the UART driver.
const int uart_buffer_size = (1024 * 2);
QueueHandle_t uart_queue;
// Install UART driver using an event queue here
ESP_ERROR_CHECK(uart_driver_install({IDF_TARGET_UART_NUM}, uart_buffer_size, \
ESP_ERROR_CHECK(uart_driver_install({IDF_TARGET_UART_EXAMPLE_PORT}, uart_buffer_size, \
uart_buffer_size, 10, &uart_queue, 0));
Once this step is complete, you can connect the external UART device and check the communication.
@ -178,7 +174,7 @@ There is a 'companion' function :cpp:func:`uart_wait_tx_done` that monitors the
.. code-block:: c
// Wait for packet to be sent
const uart_port_t uart_num = {IDF_TARGET_UART_NUM};
const uart_port_t uart_num = {IDF_TARGET_UART_EXAMPLE_PORT};
ESP_ERROR_CHECK(uart_wait_tx_done(uart_num, 100)); // wait timeout is 100 RTOS ticks (TickType_t)
@ -190,7 +186,7 @@ Once the data is received by the UART and saved in the Rx FIFO buffer, it needs
.. code-block:: c
// Read data from UART.
const uart_port_t uart_num = {IDF_TARGET_UART_NUM};
const uart_port_t uart_num = {IDF_TARGET_UART_EXAMPLE_PORT};
uint8_t data[128];
int length = 0;
ESP_ERROR_CHECK(uart_get_buffered_data_len(uart_num, (size_t*)&length));

2
examples/peripherals/uart/nmea0183_parser/README.md
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@ -25,7 +25,7 @@ To run this example, you need an ESP32, ESP32-S or ESP32-C series dev board (e.g
#### Pin Assignment:
**Note:** The following pin assignments are used by default which can be changed in `nmea_parser_config_t` structure.
**Note:** GPIO5 is used by default as the RX pin, you can change it by `idf.py menuconfig` > `Example Configuration` > `NMEA_PARSER_UART_RXD`.
| ESP | GPS |
| -------------------------- | --------------- |

4
examples/peripherals/uart/nmea0183_parser/main/Kconfig.projbuild
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@ -2,10 +2,12 @@ menu "Example Configuration"
config NMEA_PARSER_UART_RXD
int "UART RXD pin number"
range 0 34 if IDF_TARGET_ESP32
range 0 39 if IDF_TARGET_ESP32
range 0 46 if IDF_TARGET_ESP32S2
range 0 48 if IDF_TARGET_ESP32S3
range 0 19 if IDF_TARGET_ESP32C3
range 0 18 if IDF_TARGET_ESP32C2
range 0 25 if IDF_TARGET_ESP32H2
default 5
help
GPIO number for UART RX pin. See UART documentation for more information

40
examples/peripherals/uart/nmea0183_parser/main/nmea_parser.h
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@ -1,16 +1,8 @@
// Copyright 2015-2018 Espressif Systems (Shanghai) PTE LTD
//
// Licensed under the Apache License, Version 2.0 (the "License");
// you may not use this file except in compliance with the License.
// You may obtain a copy of the License at
//
// http://www.apache.org/licenses/LICENSE-2.0
//
// Unless required by applicable law or agreed to in writing, software
// distributed under the License is distributed on an "AS IS" BASIS,
// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
// See the License for the specific language governing permissions and
// limitations under the License.
/*
* SPDX-FileCopyrightText: 2015-2022 Espressif Systems (Shanghai) CO LTD
*
* SPDX-License-Identifier: Apache-2.0
*/
#pragma once
@ -149,17 +141,17 @@ typedef void *nmea_parser_handle_t;
* @brief Default configuration for NMEA Parser
*
*/
#define NMEA_PARSER_CONFIG_DEFAULT() \
{ \
.uart = { \
.uart_port = UART_NUM_1, \
.rx_pin = 2, \
.baud_rate = 9600, \
.data_bits = UART_DATA_8_BITS, \
.parity = UART_PARITY_DISABLE, \
.stop_bits = UART_STOP_BITS_1, \
.event_queue_size = 16 \
} \
#define NMEA_PARSER_CONFIG_DEFAULT() \
{ \
.uart = { \
.uart_port = UART_NUM_1, \
.rx_pin = CONFIG_NMEA_PARSER_UART_RXD,\
.baud_rate = 9600, \
.data_bits = UART_DATA_8_BITS, \
.parity = UART_PARITY_DISABLE, \
.stop_bits = UART_STOP_BITS_1, \
.event_queue_size = 16 \
} \
}
/**

34
examples/peripherals/uart/uart_echo/README.md
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@ -17,30 +17,30 @@ monitoring. The external interface should have 3.3V outputs. You may use e.g. 3.
Connect the external serial interface to the board as follows.
```
---------------------------------------------------------------------------------------
| Target chip Interface | #define | Default ESP Pin | External UART Pin |
| ----------------------|------------------|----------------------|--------------------
| Transmit Data (TxD) | EXAMPLE_UART_TXD | GPIO4 | RxD |
| Receive Data (RxD) | EXAMPLE_UART_RXD | GPIO5 | TxD |
| Ground | n/a | GND | GND |
---------------------------------------------------------------------------------------
-----------------------------------------------------------------------------------------
| Target chip Interface | Kconfig Option | Default ESP Pin | External UART Pin |
| ----------------------|--------------------|----------------------|--------------------
| Transmit Data (TxD) | EXAMPLE_UART_TXD | GPIO4 | RxD |
| Receive Data (RxD) | EXAMPLE_UART_RXD | GPIO5 | TxD |
| Ground | n/a | GND | GND |
-----------------------------------------------------------------------------------------
```
Note: Some GPIOs can not be used with certain chips because they are reserved for internal use. Please refer to UART documentation for selected target.
Optionally, you can set-up and use a serial interface that has RTS and CTS signals in order to verify that the
hardware control flow works. Connect the extra signals according to the following table, configure both extra pins in
the example code by replacing existing `UART_PIN_NO_CHANGE` macros with the appropriate pin numbers and configure
UART1 driver to use the hardware flow control by setting `.flow_ctrl = UART_HW_FLOWCTRL_CTS_RTS` and adding
`.rx_flow_ctrl_thresh = 122`.
the example code `uart_echo_example_main.c` by replacing existing `UART_PIN_NO_CHANGE` macros with the appropriate pin
numbers and configure UART1 driver to use the hardware flow control by setting `.flow_ctrl = UART_HW_FLOWCTRL_CTS_RTS`
and adding `.rx_flow_ctrl_thresh = 122` to the `uart_config` structure.
```
--------------------------------------------------------------------------------------
| Target chip Interface | #define | Default ESP Pin | External UART Pin |
| ----------------------|-----------------|----------------------|--------------------
| Transmit Data (TxD) | ECHO_TEST_RTS | GPIO18 | CTS |
| Receive Data (RxD) | ECHO_TEST_CTS | GPIO19 | RTS |
| Ground | n/a | GND | GND |
--------------------------------------------------------------------------------------
---------------------------------------------------------------
| Target chip Interface | Macro | External UART Pin |
| ----------------------|-----------------|--------------------
| Transmit Data (TxD) | ECHO_TEST_RTS | CTS |
| Receive Data (RxD) | ECHO_TEST_CTS | RTS |
| Ground | n/a | GND |
---------------------------------------------------------------
```
### Configure the project

20
examples/peripherals/uart/uart_echo/main/Kconfig.projbuild
Wyświetl plik

@ -4,8 +4,8 @@ menu "Echo Example Configuration"
int "UART port number"
range 0 2 if IDF_TARGET_ESP32 || IDF_TARGET_ESP32S3
default 2 if IDF_TARGET_ESP32 || IDF_TARGET_ESP32S3
range 0 1 if IDF_TARGET_ESP32S2 || IDF_TARGET_ESP32C3
default 1 if IDF_TARGET_ESP32S2 || IDF_TARGET_ESP32C3
range 0 1 if IDF_TARGET_ESP32S2 || IDF_TARGET_ESP32C3 || IDF_TARGET_ESP32C2 || IDF_TARGET_ESP32H2
default 1 if IDF_TARGET_ESP32S2 || IDF_TARGET_ESP32C3 || IDF_TARGET_ESP32C2 || IDF_TARGET_ESP32H2
help
UART communication port number for the example.
See UART documentation for available port numbers.
@ -19,10 +19,12 @@ menu "Echo Example Configuration"
config EXAMPLE_UART_RXD
int "UART RXD pin number"
range 0 34 if IDF_TARGET_ESP32
range 0 46 if IDF_TARGET_ESP32S2 || IDF_TARGET_ESP32S3
range 0 39 if IDF_TARGET_ESP32
range 0 46 if IDF_TARGET_ESP32S2
range 0 19 if IDF_TARGET_ESP32C3
range 0 47 if IDF_TARGET_ESP32S3
range 0 48 if IDF_TARGET_ESP32S3
range 0 18 if IDF_TARGET_ESP32C2
range 0 25 if IDF_TARGET_ESP32H2
default 5
help
GPIO number for UART RX pin. See UART documentation for more information
@ -30,10 +32,12 @@ menu "Echo Example Configuration"
config EXAMPLE_UART_TXD
int "UART TXD pin number"
range 0 34 if IDF_TARGET_ESP32
range 0 46 if IDF_TARGET_ESP32S2 || IDF_TARGET_ESP32S3
range 0 33 if IDF_TARGET_ESP32
range 0 45 if IDF_TARGET_ESP32S2
range 0 19 if IDF_TARGET_ESP32C3
range 0 47 if IDF_TARGET_ESP32S3
range 0 48 if IDF_TARGET_ESP32S3
range 0 18 if IDF_TARGET_ESP32C2
range 0 25 if IDF_TARGET_ESP32H2
default 4
help
GPIO number for UART TX pin. See UART documentation for more information

24
examples/peripherals/uart/uart_echo_rs485/README.md
Wyświetl plik

@ -1,11 +1,11 @@
| Supported Targets | ESP32 | ESP32-S2 | ESP32-S3 | ESP32-C3 |
| ----------------- | ----- | -------- | -------- | -------- |
| Supported Targets | ESP32 | ESP32-S2 | ESP32-S3 | ESP32-C3 | ESP32-C2 | ESP32-H2 |
| ----------------- | ----- | -------- | -------- | -------- | -------- | -------- |
# UART RS485 Echo Example
(See the README.md file in the upper level 'examples' directory for more information about examples.)
This is an example which echoes any data it receives on UART2 back to the sender in the RS485 network.
This is an example which echoes any data it receives on UART port back to the sender in the RS485 network.
It uses ESP-IDF UART software driver in RS485 half duplex transmission mode and requires external connection of bus drivers.
The approach demonstrated in this example can be used in user application to transmit/receive data in RS485 networks.
@ -35,15 +35,15 @@ ESP32 BOARD | | RS-485 side | | SERIAL AD
#### Connect an external RS485 serial interface to an ESP32 board
Connect a USB-to-RS485 adapter to a computer, then connect the adapter's A/B output lines with the corresponding A/B output lines of the RS485 line driver connected to the ESP32 chip (see figure above).
```
--------------------------------------------------------------------------------------------------------------------------
| UART Interface | #define | Default ESP32 Pin | Default pins for | External RS485 Driver Pin |
| | | | ESP32-S2(S3, C3) | |
| ----------------------|--------------------|-----------------------|-----------------------|---------------------------|
| Transmit Data (TxD) | CONFIG_MB_UART_TXD | GPIO23 | GPIO9 | DI |
| Receive Data (RxD) | CONFIG_MB_UART_RXD | GPIO22 | GPIO8 | RO |
| Request To Send (RTS) | CONFIG_MB_UART_RTS | GPIO18 | GPIO10 | ~RE/DE |
| Ground | n/a | GND | GND | GND |
--------------------------------------------------------------------------------------------------------------------------
------------------------------------------------------------------------------------------------------------------------------
| UART Interface | #define | Default ESP32 Pin | Default pins for | External RS485 Driver Pin |
| | | | ESP32-S2(S3, C3, C2, H2) | |
| ----------------------|--------------------|-----------------------|---------------------------|---------------------------|
| Transmit Data (TxD) | CONFIG_MB_UART_TXD | GPIO23 | GPIO9 | DI |
| Receive Data (RxD) | CONFIG_MB_UART_RXD | GPIO22 | GPIO8 | RO |
| Request To Send (RTS) | CONFIG_MB_UART_RTS | GPIO18 | GPIO10 | ~RE/DE |
| Ground | n/a | GND | GND | GND |
------------------------------------------------------------------------------------------------------------------------------
```
Note: Each target chip has different GPIO pins available for UART connection. Please refer to UART documentation for selected target for more information.

32
examples/peripherals/uart/uart_echo_rs485/main/Kconfig.projbuild
Wyświetl plik

@ -4,8 +4,8 @@ menu "Echo RS485 Example Configuration"
int "UART port number"
range 0 2 if IDF_TARGET_ESP32 || IDF_TARGET_ESP32S3
default 2 if IDF_TARGET_ESP32 || IDF_TARGET_ESP32S3
range 0 1 if IDF_TARGET_ESP32S2 || IDF_TARGET_ESP32C3
default 1 if IDF_TARGET_ESP32S2 || IDF_TARGET_ESP32C3
range 0 1 if IDF_TARGET_ESP32S2 || IDF_TARGET_ESP32C3 || IDF_TARGET_ESP32C2 || IDF_TARGET_ESP32H2
default 1 if IDF_TARGET_ESP32S2 || IDF_TARGET_ESP32C3 || IDF_TARGET_ESP32C2 || IDF_TARGET_ESP32H2
help
UART communication port number for the example.
See UART documentation for available port numbers.
@ -19,36 +19,42 @@ menu "Echo RS485 Example Configuration"
config ECHO_UART_RXD
int "UART RXD pin number"
range 0 34 if IDF_TARGET_ESP32
range 0 39 if IDF_TARGET_ESP32
default 22 if IDF_TARGET_ESP32
range 0 46 if IDF_TARGET_ESP32S2
range 0 47 if IDF_TARGET_ESP32S3
range 0 48 if IDF_TARGET_ESP32S3
range 0 19 if IDF_TARGET_ESP32C3
default 8 if IDF_TARGET_ESP32S2 || IDF_TARGET_ESP32S3 || IDF_TARGET_ESP32C3
range 0 18 if IDF_TARGET_ESP32C2
range 0 25 if IDF_TARGET_ESP32H2
default 8 if !IDF_TARGET_ESP32
help
GPIO number for UART RX pin. See UART documentation for more information
about available pin numbers for UART.
config ECHO_UART_TXD
int "UART TXD pin number"
range 0 34 if IDF_TARGET_ESP32
range 0 33 if IDF_TARGET_ESP32
default 23 if IDF_TARGET_ESP32
range 0 46 if IDF_TARGET_ESP32S2
range 0 47 if IDF_TARGET_ESP32S3
range 0 45 if IDF_TARGET_ESP32S2
range 0 48 if IDF_TARGET_ESP32S3
range 0 19 if IDF_TARGET_ESP32C3
default 9 if IDF_TARGET_ESP32S2 || IDF_TARGET_ESP32S3 || IDF_TARGET_ESP32C3
range 0 18 if IDF_TARGET_ESP32C2
range 0 25 if IDF_TARGET_ESP32H2
default 9 if !IDF_TARGET_ESP32
help
GPIO number for UART TX pin. See UART documentation for more information
about available pin numbers for UART.
config ECHO_UART_RTS
int "UART RTS pin number"
range 0 34 if IDF_TARGET_ESP32
range 0 33 if IDF_TARGET_ESP32
default 18 if IDF_TARGET_ESP32
range 0 46 if IDF_TARGET_ESP32S2
range 0 47 if IDF_TARGET_ESP32S3
range 0 45 if IDF_TARGET_ESP32S2
range 0 48 if IDF_TARGET_ESP32S3
range 0 19 if IDF_TARGET_ESP32C3
default 10 if IDF_TARGET_ESP32S2 || IDF_TARGET_ESP32S3 || IDF_TARGET_ESP32C3
range 0 18 if IDF_TARGET_ESP32C2
range 0 25 if IDF_TARGET_ESP32H2
default 10 if !IDF_TARGET_ESP32
help
GPIO number for UART RTS pin. This pin is connected to
~RE/DE pin of RS485 transceiver to switch direction.

3
tools/ci/check_copyright_ignore.txt
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@ -978,7 +978,6 @@ components/hal/include/hal/systimer_types.h
components/hal/include/hal/touch_sensor_hal.h
components/hal/include/hal/twai_hal.h
components/hal/include/hal/twai_types.h
components/hal/include/hal/uart_hal.h
components/hal/include/hal/uart_types.h
components/hal/include/hal/uhci_types.h
components/hal/include/hal/usb_hal.h
@ -1507,7 +1506,6 @@ components/soc/esp32h2/include/soc/syscon_struct.h
components/soc/esp32h2/include/soc/system_reg.h
components/soc/esp32h2/include/soc/system_struct.h
components/soc/esp32h2/include/soc/twai_struct.h
components/soc/esp32h2/include/soc/uart_channel.h
components/soc/esp32h2/include/soc/uart_pins.h
components/soc/esp32h2/include/soc/usb_serial_jtag_reg.h
components/soc/esp32h2/include/soc/usb_serial_jtag_struct.h
@ -2322,7 +2320,6 @@ examples/peripherals/twai/twai_network/twai_network_slave/main/twai_network_exam
examples/peripherals/twai/twai_self_test/example_test.py
examples/peripherals/twai/twai_self_test/main/twai_self_test_example_main.c
examples/peripherals/uart/nmea0183_parser/main/nmea_parser.c
examples/peripherals/uart/nmea0183_parser/main/nmea_parser.h
examples/peripherals/uart/nmea0183_parser/main/nmea_parser_example_main.c
examples/peripherals/uart/uart_async_rxtxtasks/main/uart_async_rxtxtasks_main.c
examples/peripherals/uart/uart_echo/main/uart_echo_example_main.c