kopia lustrzana https://github.com/espressif/esp-idf
components/esp32,spi_flash: update some comments
rodzic
1b6022bd07
commit
23d5c7579b
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@ -190,7 +190,6 @@ void IRAM_ATTR user_start_cpu1(void) {
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;
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}
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ets_printf("Starting scheduler on APP CPU.\n");
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// Start the scheduler on APP CPU
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xPortStartScheduler();
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}
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@ -25,6 +25,8 @@ typedef void (*esp_ipc_func_t)(void* arg);
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* FreeRTOS provides several APIs which can be used to communicate between
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* different tasks, including tasks running on different CPUs.
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* This module provides additional APIs to run some code on the other CPU.
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*
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* These APIs can only be used when FreeRTOS scheduler is running.
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*/
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@ -56,6 +58,7 @@ void esp_ipc_init();
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* @param arg arbitrary argument to be passed into function
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*
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* @return ESP_ERR_INVALID_ARG if cpu_id is invalid
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* ESP_ERR_INVALID_STATE if FreeRTOS scheduler is not running
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* ESP_OK otherwise
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*/
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esp_err_t esp_ipc_call(uint32_t cpu_id, esp_ipc_func_t func, void* arg);
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@ -75,6 +78,7 @@ esp_err_t esp_ipc_call(uint32_t cpu_id, esp_ipc_func_t func, void* arg);
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* @param arg arbitrary argument to be passed into function
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*
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* @return ESP_ERR_INVALID_ARG if cpu_id is invalid
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* ESP_ERR_INVALID_STATE if FreeRTOS scheduler is not running
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* ESP_OK otherwise
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*/
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esp_err_t esp_ipc_call_blocking(uint32_t cpu_id, esp_ipc_func_t func, void* arg);
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@ -36,15 +36,14 @@
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the flash operation. In the dual-core setup this is slightly more complicated.
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We need to make sure that the other CPU doesn't run any code from flash.
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SPI flash driver starts two tasks (spi_flash_op_block_task), one pinned to
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each CPU. Each task is associated with its own semaphore.
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When SPI flash API is called on CPU A (can be PRO or APP), we wake up the task
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on CPU B by "giving" the semaphore associated with it. Tasks resumes, disables
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cache on CPU B, and acknowledges that it has taken the semaphore by setting
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a flag (s_flash_op_can_start). Flash API function running on CPU A waits for
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this flag to be set. Once the flag is set, it disables cache on CPU A and
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starts flash operation.
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When SPI flash API is called on CPU A (can be PRO or APP), we start
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spi_flash_op_block_func function on CPU B using esp_ipc_call API. This API
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wakes up high priority task on CPU B and tells it to execute given function,
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in this case spi_flash_op_block_func. This function disables cache on CPU B and
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signals that cache is disabled by setting s_flash_op_can_start flag.
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Then the task on CPU A disables cache as well, and proceeds to execute flash
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operation.
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While flash operation is running, interrupts can still run on CPU B.
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We assume that all interrupt code is placed into RAM.
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@ -52,8 +51,7 @@
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Once flash operation is complete, function on CPU A sets another flag,
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s_flash_op_complete, to let the task on CPU B know that it can re-enable
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cache and release the CPU. Then the function on CPU A re-enables the cache on
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CPU A as well and returns control to the calling code. Task on CPU B returns
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to suspended state by "taking" the semaphore.
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CPU A as well and returns control to the calling code.
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Additionally, all API functions are protected with a mutex (s_flash_op_mutex).
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