kopia lustrzana https://github.com/espressif/esp-idf
feat(ulp-riscv): Added unit test for RTC I2C
This commit adds a unit-test for RTC I2C operation on the ULP RISC-V.pull/13294/head
Sudeep Mohanty
rodzic
993c8d4f0e
commit
1c015a3f0d
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@ -3,6 +3,10 @@ cmake_minimum_required(VERSION 3.16)
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list(PREPEND SDKCONFIG_DEFAULTS "$ENV{IDF_PATH}/tools/test_apps/configs/sdkconfig.debug_helpers" "sdkconfig.defaults")
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set(EXTRA_COMPONENT_DIRS
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"$ENV{IDF_PATH}/tools/unit-test-app/components"
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)
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# "Trim" the build. Include the minimal set of components, main, and anything it depends on.
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set(COMPONENTS main)
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@ -1,17 +1,20 @@
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set(app_sources "test_app_main.c" "test_ulp_riscv.c")
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set(app_sources "test_app_main.c" "test_ulp_riscv.c" "test_ulp_riscv_i2c.c")
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set(ulp_sources "ulp/test_main.c")
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set(ulp_sources2 "ulp/test_main_second_cocpu_firmware.c")
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set(ulp_sources3 "ulp/test_main_cocpu_crash.c")
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set(ulp_sources4 "ulp/test_main_i2c.c")
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idf_component_register(SRCS ${app_sources}
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INCLUDE_DIRS "ulp"
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REQUIRES ulp unity
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REQUIRES ulp unity test_utils
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WHOLE_ARCHIVE)
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set(ulp_app_name ulp_test_app)
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set(ulp_app_name2 ulp_test_app2)
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set(ulp_app_name3 ulp_test_app3)
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set(ulp_app_name4 ulp_test_app_i2c)
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set(ulp_exp_dep_srcs ${app_sources})
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ulp_embed_binary(${ulp_app_name} "${ulp_sources}" "${ulp_exp_dep_srcs}")
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ulp_embed_binary(${ulp_app_name2} "${ulp_sources2}" "${ulp_exp_dep_srcs}")
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ulp_embed_binary(${ulp_app_name3} "${ulp_sources3}" "${ulp_exp_dep_srcs}")
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ulp_embed_binary(${ulp_app_name4} "${ulp_sources4}" "${ulp_exp_dep_srcs}")
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@ -0,0 +1,166 @@
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/*
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* SPDX-FileCopyrightText: 2024 Espressif Systems (Shanghai) CO LTD
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*
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* SPDX-License-Identifier: Apache-2.0
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*/
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#include <string.h>
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#include "ulp_riscv.h"
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#include "ulp_riscv_i2c.h"
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#include "ulp_test_app_i2c.h"
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#include "ulp_test_shared.h"
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#include "unity.h"
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#include "test_utils.h"
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#include "esp_log.h"
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#include "driver/i2c.h"
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#define ULP_WAKEUP_PERIOD 1000000 // 1 second
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static const char* TAG = "ulp_riscv_i2c_test";
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// ULP RISC-V RTC I2C firmware
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extern const uint8_t ulp_test_app_i2c_bin_start[] asm("_binary_ulp_test_app_i2c_bin_start");
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extern const size_t ulp_test_app_i2c_bin_length asm("ulp_test_app_i2c_bin_length");
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static void load_and_start_ulp_riscv_firmware(const uint8_t* ulp_bin, size_t ulp_bin_len)
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{
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TEST_ASSERT(ulp_riscv_load_binary(ulp_bin, ulp_bin_len) == ESP_OK);
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TEST_ASSERT(ulp_set_wakeup_period(0, ULP_WAKEUP_PERIOD) == ESP_OK);
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TEST_ASSERT(ulp_riscv_run() == ESP_OK);
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}
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#define I2C_SLAVE_SCL_IO 7 /*!<I2C gpio number for SCL */
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#define I2C_SLAVE_SDA_IO 6 /*!<I2C gpio number for SDA */
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#define I2C_SLAVE_NUM I2C_NUM_0 /*!<I2C port number for slave dev */
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#define I2C_SLAVE_TX_BUF_LEN (2*DATA_LENGTH) /*!<I2C slave tx buffer size */
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#define I2C_SLAVE_RX_BUF_LEN (2*DATA_LENGTH) /*!<I2C slave rx buffer size */
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static uint8_t expected_master_write_data[DATA_LENGTH];
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static uint8_t expected_master_read_data[DATA_LENGTH];
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static void init_test_data(size_t len)
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{
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/* Set up test data with some predictable patterns */
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for (int i = 0; i < len; i++) {
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expected_master_write_data[i] = i % 3;
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}
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for (int i = 0; i < len; i++) {
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expected_master_read_data[i] = i / 2;
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}
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}
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static esp_err_t init_i2c(void)
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{
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/* Configure RTC I2C */
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printf("Initializing RTC I2C ...\n");
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ulp_riscv_i2c_cfg_t i2c_cfg = ULP_RISCV_I2C_DEFAULT_CONFIG();
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esp_err_t ret = ulp_riscv_i2c_master_init(&i2c_cfg);
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if (ret != ESP_OK) {
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printf("ERROR: Failed to initialize RTC I2C. Aborting...\n");
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}
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return ret;
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}
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/* This runs on the DUT */
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static void i2c_master_write_read_test(void)
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{
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/* Initialize the test data */
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init_test_data(DATA_LENGTH);
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/* Initialize RTC I2C */
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TEST_ASSERT(init_i2c() == ESP_OK);
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/* Wait for the I2C slave device to be ready */
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unity_wait_for_signal("i2c slave init finish");
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/* Load and Run the ULP RISC-V firmware */
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load_and_start_ulp_riscv_firmware(ulp_test_app_i2c_bin_start, ulp_test_app_i2c_bin_length);
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/* Wait for ULP RISC-V to finish reading */
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while (ulp_read_test_reply == RISCV_COMMAND_INVALID) {
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}
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/* Verify the test data read by the DUT */
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uint8_t *read_data = (uint8_t*)&ulp_data_rd;
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ESP_LOGI(TAG, "Master read data:");
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ESP_LOG_BUFFER_HEX(TAG, read_data, RW_TEST_LENGTH);
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TEST_ASSERT_EQUAL_HEX8_ARRAY(expected_master_read_data, read_data, RW_TEST_LENGTH);
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/* Prepare the test data to be written to the I2C slave device */
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uint8_t *wr_data = (uint8_t*)&ulp_data_wr;
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for (int i = 0; i < RW_TEST_LENGTH; i++) {
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wr_data[i] = expected_master_write_data[i];
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}
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/* Wait for the I2C slave device to be ready */
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unity_wait_for_signal("master write");
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/* Signal the ULR RISC-V to perform the write to the I2C slave device */
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volatile riscv_test_command_reply_t* write_test_cmd = (riscv_test_command_reply_t*)&ulp_write_test_cmd;
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*write_test_cmd = RISCV_COMMAND_OK;
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/* Wait for ULP to finish writing */
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while (*write_test_cmd != RISCV_COMMAND_NOK) {
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}
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/* Signal the I2C slave device to read the data */
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unity_send_signal("slave read");
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}
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static i2c_config_t i2c_slave_init(void)
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{
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i2c_config_t conf_slave = {
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.mode = I2C_MODE_SLAVE,
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.sda_io_num = I2C_SLAVE_SDA_IO,
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.scl_io_num = I2C_SLAVE_SCL_IO,
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.sda_pullup_en = GPIO_PULLUP_ENABLE,
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.scl_pullup_en = GPIO_PULLUP_ENABLE,
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.slave.addr_10bit_en = 0,
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.slave.slave_addr = I2C_SLAVE_ADDRESS,
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};
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return conf_slave;
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}
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/* This runs on the I2C slave device */
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static void i2c_slave_read_write_test(void)
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{
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/* Initialize test data */
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init_test_data(DATA_LENGTH);
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uint8_t *data_rd = (uint8_t *) malloc(DATA_LENGTH);
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memset(data_rd, 0, DATA_LENGTH);
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int size_rd;
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/* Initialize I2C slave device */
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i2c_config_t conf_slave = i2c_slave_init();
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TEST_ESP_OK(i2c_param_config(I2C_SLAVE_NUM, &conf_slave));
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TEST_ESP_OK(i2c_driver_install(I2C_SLAVE_NUM, I2C_MODE_SLAVE,
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I2C_SLAVE_RX_BUF_LEN,
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I2C_SLAVE_TX_BUF_LEN, 0));
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/* Signal the DUT that the I2C slave device is ready */
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unity_send_signal("i2c slave init finish");
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/* Prepare the test data to be read by the DUT */
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size_rd = i2c_slave_write_buffer(I2C_SLAVE_NUM, expected_master_read_data, RW_TEST_LENGTH, 2000 / portTICK_PERIOD_MS);
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ESP_LOG_BUFFER_HEX(TAG, expected_master_read_data, size_rd);
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/* Signal the DUT to write test data */
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unity_send_signal("master write");
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/* Wait for DUT to write test data before reading it */
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unity_wait_for_signal("slave read");
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/* Verify the test data written by the DUT */
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size_rd = i2c_slave_read_buffer(I2C_SLAVE_NUM, data_rd, RW_TEST_LENGTH, 10000 / portTICK_PERIOD_MS);
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ESP_LOGI(TAG, "Slave read data:");
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ESP_LOG_BUFFER_HEX(TAG, data_rd, size_rd);
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TEST_ASSERT_EQUAL_HEX8_ARRAY(expected_master_write_data, data_rd, RW_TEST_LENGTH);
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/* Clean up */
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free(data_rd);
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i2c_driver_delete(I2C_SLAVE_NUM);
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}
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TEST_CASE_MULTIPLE_DEVICES("ULP RISC-V RTC I2C read and write test", "[ulp][test_env=generic_multi_device][timeout=150]", i2c_master_write_read_test, i2c_slave_read_write_test);
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@ -0,0 +1,42 @@
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/*
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* SPDX-FileCopyrightText: 2023-2024 Espressif Systems (Shanghai) CO LTD
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*
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* SPDX-License-Identifier: Apache-2.0
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*/
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#include <stdint.h>
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#include "ulp_test_shared.h"
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// #include "ulp_riscv.h"
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#include "ulp_riscv_utils.h"
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#include "ulp_riscv_i2c_ulp_core.h"
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volatile riscv_test_command_reply_t read_test_reply = RISCV_COMMAND_INVALID;
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volatile riscv_test_command_reply_t write_test_cmd = RISCV_COMMAND_INVALID;
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uint8_t data_rd[DATA_LENGTH] = {};
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uint8_t data_wr[DATA_LENGTH] = {};
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int main(void)
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{
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/* Set I2C slave device address */
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ulp_riscv_i2c_master_set_slave_addr(I2C_SLAVE_ADDRESS);
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/* Read from the I2C slave device */
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ulp_riscv_i2c_master_read_from_device(data_rd, RW_TEST_LENGTH);
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/* Signal the main CPU once read is done */
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read_test_reply = RISCV_COMMAND_OK;
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/* Wait for write command from main CPU */
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while (write_test_cmd != RISCV_COMMAND_OK) {
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}
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/* Write to the I2C slave device */
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ulp_riscv_i2c_master_write_to_device(data_wr, RW_TEST_LENGTH);
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/* Signal the main CPU once write is done */
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write_test_cmd = RISCV_COMMAND_NOK;
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while (1) {
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}
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}
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@ -1,5 +1,5 @@
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/*
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* SPDX-FileCopyrightText: 2022-2023 Espressif Systems (Shanghai) CO LTD
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* SPDX-FileCopyrightText: 2022-2024 Espressif Systems (Shanghai) CO LTD
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*
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* SPDX-License-Identifier: Unlicense OR CC0-1.0
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*/
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@ -8,6 +8,12 @@
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#define MUTEX_TEST_ITERATIONS 100000
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#define XOR_MASK 0xDEADBEEF
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/* I2C test params */
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#define I2C_SLAVE_ADDRESS 0x28
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#define DATA_LENGTH 200
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// TODO: Updated the test to perform multi-byte read/write (IDFGH-11056)
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#define RW_TEST_LENGTH 1 /*!<Data length for r/w test, any value from 0-DATA_LENGTH*/
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typedef enum {
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RISCV_READ_WRITE_TEST = 1,
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RISCV_DEEP_SLEEP_WAKEUP_SHORT_DELAY_TEST,
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@ -1,11 +1,23 @@
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# SPDX-FileCopyrightText: 2022-2023 Espressif Systems (Shanghai) CO LTD
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# SPDX-FileCopyrightText: 2022-2024 Espressif Systems (Shanghai) CO LTD
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# SPDX-License-Identifier: CC0-1.0
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import pytest
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from pytest_embedded import Dut
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@pytest.mark.esp32s2
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@pytest.mark.esp32s3
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@pytest.mark.generic
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def test_ulp_riscv(case_tester) -> None: # type: ignore
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case_tester.run_all_cases()
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def test_ulp_riscv(dut: Dut) -> None: # type: ignore
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dut.run_all_single_board_cases()
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@pytest.mark.esp32s2
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@pytest.mark.esp32s3
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@pytest.mark.generic_multi_device
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@pytest.mark.parametrize(
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'count', [2], indirect=True
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)
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def test_ulp_riscv_multi_device(case_tester) -> None: # type: ignore
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for case in case_tester.test_menu:
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if case.attributes.get('test_env', 'generic_multi_device') == 'generic_multi_device':
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case_tester.run_multi_dev_case(case=case, reset=True)
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