kopia lustrzana https://github.com/espressif/esp-idf
spi: implement yield for spi2 and spi3
add: yield functions for spi2 and spi3 add: spi23 start and end functions change: function names with spi1 that were not specific to spi1 change: chip data for spi2 and spi3 increased for timestamps change: merge spi_app_func_arg_t into app_func_arg_t change: moved os_func_data allocation before host checkpull/10546/head
Matus Fabo
BOT
rodzic
c948a70895
commit
1b747867bd
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@ -32,10 +32,6 @@ static const char TAG[] = "spi_flash";
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* into the IRAM,and their data should be put into the DRAM.
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*/
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typedef struct {
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spi_bus_lock_dev_handle_t dev_lock;
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} app_func_arg_t;
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/*
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* Time yield algorithm:
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* Every time spi_flash_os_check_yield() is called:
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@ -48,16 +44,16 @@ typedef struct {
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* counter mentioned in #2, but still be counted into the time mentioned in #2.
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*/
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typedef struct {
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app_func_arg_t common_arg; //shared args, must be the first item
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spi_bus_lock_dev_handle_t dev_lock;
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bool no_protect; //to decide whether to check protected region (for the main chip) or not.
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uint32_t acquired_since_us; // Time since last explicit yield()
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uint32_t released_since_us; // Time since last end() (implicit yield)
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} spi1_app_func_arg_t;
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} app_func_arg_t;
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static inline void on_spi1_released(spi1_app_func_arg_t* ctx);
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static inline void on_spi1_acquired(spi1_app_func_arg_t* ctx);
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static inline void on_spi1_yielded(spi1_app_func_arg_t* ctx);
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static inline bool on_spi1_check_yield(spi1_app_func_arg_t* ctx);
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static inline void on_spi_released(app_func_arg_t* ctx);
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static inline void on_spi_acquired(app_func_arg_t* ctx);
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static inline void on_spi_yielded(app_func_arg_t* ctx);
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static inline bool on_spi_check_yield(app_func_arg_t* ctx);
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IRAM_ATTR static void cache_enable(void* arg)
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{
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@ -91,6 +87,18 @@ static IRAM_ATTR esp_err_t spi_end(void *arg)
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return spi_bus_lock_acquire_end(((app_func_arg_t *)arg)->dev_lock);
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}
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static IRAM_ATTR esp_err_t spi23_start(void *arg){
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esp_err_t ret = spi_start(arg);
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on_spi_acquired((app_func_arg_t*)arg);
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return ret;
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}
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static IRAM_ATTR esp_err_t spi23_end(void *arg){
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esp_err_t ret = spi_end(arg);
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on_spi_released((app_func_arg_t*)arg);
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return ret;
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}
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static IRAM_ATTR esp_err_t spi1_start(void *arg)
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{
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#if CONFIG_SPI_FLASH_SHARE_SPI1_BUS
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@ -99,7 +107,7 @@ static IRAM_ATTR esp_err_t spi1_start(void *arg)
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#else
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//directly disable the cache and interrupts when lock is not used
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cache_disable(NULL);
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on_spi1_acquired((spi1_app_func_arg_t*)arg);
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on_spi_acquired((app_func_arg_t*)arg);
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return ESP_OK;
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#endif
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}
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@ -112,17 +120,17 @@ static IRAM_ATTR esp_err_t spi1_end(void *arg)
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#else
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cache_enable(NULL);
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#endif
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on_spi1_released((spi1_app_func_arg_t*)arg);
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on_spi_released((app_func_arg_t*)arg);
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return ret;
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}
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static IRAM_ATTR esp_err_t spi1_flash_os_check_yield(void *arg, uint32_t chip_status, uint32_t* out_request)
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static IRAM_ATTR esp_err_t spi_flash_os_check_yield(void *arg, uint32_t chip_status, uint32_t* out_request)
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{
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assert (chip_status == 0); //TODO: support suspend
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esp_err_t ret = ESP_ERR_TIMEOUT; //Nothing happened
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uint32_t request = 0;
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if (on_spi1_check_yield((spi1_app_func_arg_t *)arg)) {
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if (on_spi_check_yield((app_func_arg_t *)arg)) {
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request = SPI_FLASH_YIELD_REQ_YIELD;
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ret = ESP_OK;
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}
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@ -132,7 +140,7 @@ static IRAM_ATTR esp_err_t spi1_flash_os_check_yield(void *arg, uint32_t chip_st
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return ret;
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}
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static IRAM_ATTR esp_err_t spi1_flash_os_yield(void *arg, uint32_t* out_status)
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static IRAM_ATTR esp_err_t spi_flash_os_yield(void *arg, uint32_t* out_status)
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{
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if (likely(xTaskGetSchedulerState() == taskSCHEDULER_RUNNING)) {
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#ifdef CONFIG_SPI_FLASH_ERASE_YIELD_TICKS
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@ -141,7 +149,7 @@ static IRAM_ATTR esp_err_t spi1_flash_os_yield(void *arg, uint32_t* out_status)
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vTaskDelay(1);
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#endif
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}
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on_spi1_yielded((spi1_app_func_arg_t*)arg);
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on_spi_yielded((app_func_arg_t*)arg);
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return ESP_OK;
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}
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@ -179,7 +187,7 @@ static IRAM_ATTR void release_buffer_malloc(void* arg, void *temp_buf)
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static IRAM_ATTR esp_err_t main_flash_region_protected(void* arg, size_t start_addr, size_t size)
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{
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if (((spi1_app_func_arg_t*)arg)->no_protect || esp_partition_main_flash_region_safe(start_addr, size)) {
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if (((app_func_arg_t*)arg)->no_protect || esp_partition_main_flash_region_safe(start_addr, size)) {
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//ESP_OK = 0, also means protected==0
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return ESP_OK;
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} else {
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@ -194,7 +202,7 @@ static IRAM_ATTR void main_flash_op_status(uint32_t op_status)
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spi_flash_set_erasing_flag(is_erasing);
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}
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static DRAM_ATTR spi1_app_func_arg_t main_flash_arg = {};
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static DRAM_ATTR app_func_arg_t main_flash_arg = {};
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//for SPI1, we have to disable the cache and interrupts before using the SPI bus
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static const DRAM_ATTR esp_flash_os_functions_t esp_flash_spi1_default_os_functions = {
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@ -204,8 +212,8 @@ static const DRAM_ATTR esp_flash_os_functions_t esp_flash_spi1_default_os_functi
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.delay_us = delay_us,
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.get_temp_buffer = get_buffer_malloc,
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.release_temp_buffer = release_buffer_malloc,
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.check_yield = spi1_flash_os_check_yield,
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.yield = spi1_flash_os_yield,
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.check_yield = spi_flash_os_check_yield,
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.yield = spi_flash_os_yield,
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#if CONFIG_SPI_FLASH_BROWNOUT_RESET
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.set_flash_op_status = main_flash_op_status,
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#else
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@ -214,14 +222,14 @@ static const DRAM_ATTR esp_flash_os_functions_t esp_flash_spi1_default_os_functi
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};
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static const esp_flash_os_functions_t esp_flash_spi23_default_os_functions = {
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.start = spi_start,
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.end = spi_end,
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.start = spi23_start,
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.end = spi23_end,
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.delay_us = delay_us,
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.get_temp_buffer = get_buffer_malloc,
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.release_temp_buffer = release_buffer_malloc,
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.region_protected = NULL,
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.check_yield = NULL,
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.yield = NULL,
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.check_yield = spi_flash_os_check_yield,
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.yield = spi_flash_os_yield,
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.set_flash_op_status = NULL,
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};
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@ -243,22 +251,16 @@ esp_err_t esp_flash_init_os_functions(esp_flash_t *chip, int host_id, spi_bus_lo
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return ESP_ERR_INVALID_ARG;
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}
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switch (host_id)
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{
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chip->os_func_data = heap_caps_malloc(sizeof(app_func_arg_t),
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MALLOC_CAP_INTERNAL | MALLOC_CAP_8BIT);
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if (chip->os_func_data == NULL) {
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return ESP_ERR_NO_MEM;
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}
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switch (host_id) {
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case SPI1_HOST:
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//SPI1
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chip->os_func = &esp_flash_spi1_default_os_functions;
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chip->os_func_data = heap_caps_malloc(sizeof(spi1_app_func_arg_t),
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MALLOC_CAP_INTERNAL | MALLOC_CAP_8BIT);
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if (chip->os_func_data == NULL) {
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return ESP_ERR_NO_MEM;
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}
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*(spi1_app_func_arg_t*) chip->os_func_data = (spi1_app_func_arg_t) {
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.common_arg = {
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.dev_lock = dev_handle,
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},
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.no_protect = true,
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};
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break;
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case SPI2_HOST:
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#if SOC_SPI_PERIPH_NUM > 2
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@ -266,18 +268,17 @@ esp_err_t esp_flash_init_os_functions(esp_flash_t *chip, int host_id, spi_bus_lo
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#endif
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//SPI2, SPI3
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chip->os_func = &esp_flash_spi23_default_os_functions;
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chip->os_func_data = heap_caps_malloc(sizeof(app_func_arg_t),
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MALLOC_CAP_INTERNAL | MALLOC_CAP_8BIT);
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if (chip->os_func_data == NULL) {
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return ESP_ERR_NO_MEM;
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}
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*(app_func_arg_t*) chip->os_func_data = (app_func_arg_t) {
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.dev_lock = dev_handle,
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};
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break;
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default: return ESP_ERR_INVALID_ARG;
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default:
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return ESP_ERR_INVALID_ARG;
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break;
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}
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*(app_func_arg_t*) chip->os_func_data = (app_func_arg_t) {
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.dev_lock = dev_handle,
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.no_protect = true, // This is OK because this code path isn't used for the main flash chip which requires `no_protect = false`
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};
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return ESP_OK;
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}
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@ -314,10 +315,8 @@ esp_err_t esp_flash_init_main_bus_lock(void)
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esp_err_t esp_flash_app_enable_os_functions(esp_flash_t* chip)
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{
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main_flash_arg = (spi1_app_func_arg_t) {
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.common_arg = {
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.dev_lock = g_spi_lock_main_flash_dev, //for SPI1,
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},
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main_flash_arg = (app_func_arg_t) {
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.dev_lock = g_spi_lock_main_flash_dev,
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.no_protect = false,
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};
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chip->os_func = &esp_flash_spi1_default_os_functions;
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@ -331,11 +330,11 @@ esp_err_t esp_flash_app_enable_os_functions(esp_flash_t* chip)
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// Valid task execution interval: continuous time with the cache enabled, which is longer than
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// CONFIG_SPI_FLASH_ERASE_YIELD_TICKS. Yield time shorter than CONFIG_SPI_FLASH_ERASE_YIELD_TICKS is
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// not treated as valid interval.
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static inline IRAM_ATTR bool on_spi1_check_yield(spi1_app_func_arg_t* ctx)
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static inline IRAM_ATTR bool on_spi_check_yield(app_func_arg_t* ctx)
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{
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#ifdef CONFIG_SPI_FLASH_YIELD_DURING_ERASE
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uint32_t time = esp_system_get_time();
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// We handle the reset here instead of in `on_spi1_acquired()`, when acquire() and release() is
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// We handle the reset here instead of in `on_spi_acquired()`, when acquire() and release() is
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// larger than CONFIG_SPI_FLASH_ERASE_YIELD_TICKS, to save one `esp_system_get_time()` call
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if ((time - ctx->released_since_us) >= CONFIG_SPI_FLASH_ERASE_YIELD_TICKS * portTICK_PERIOD_MS * 1000) {
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// Reset the acquired time as if the yield has just happened.
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@ -346,22 +345,22 @@ static inline IRAM_ATTR bool on_spi1_check_yield(spi1_app_func_arg_t* ctx)
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#endif
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return false;
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}
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static inline IRAM_ATTR void on_spi1_released(spi1_app_func_arg_t* ctx)
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static inline IRAM_ATTR void on_spi_released(app_func_arg_t* ctx)
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{
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#ifdef CONFIG_SPI_FLASH_YIELD_DURING_ERASE
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ctx->released_since_us = esp_system_get_time();
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#endif
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}
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static inline IRAM_ATTR void on_spi1_acquired(spi1_app_func_arg_t* ctx)
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static inline IRAM_ATTR void on_spi_acquired(app_func_arg_t* ctx)
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{
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// Ideally, when the time after `on_spi1_released()` before this function is called is larger
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// Ideally, when the time after `on_spi_released()` before this function is called is larger
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// than CONFIG_SPI_FLASH_ERASE_YIELD_TICKS, the acquired time should be reset. We assume the
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// time after `on_spi1_check_yield()` before this function is so short that we can do the reset
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// time after `on_spi_check_yield()` before this function is so short that we can do the reset
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// in that function instead.
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}
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static inline IRAM_ATTR void on_spi1_yielded(spi1_app_func_arg_t* ctx)
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static inline IRAM_ATTR void on_spi_yielded(app_func_arg_t* ctx)
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{
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uint32_t time = esp_system_get_time();
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ctx->acquired_since_us = time;
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