diff --git a/components/app_trace/app_trace.c b/components/app_trace/app_trace.c
index cf75dcfd8f..24c008692d 100644
--- a/components/app_trace/app_trace.c
+++ b/components/app_trace/app_trace.c
@@ -166,6 +166,7 @@
 #include "soc/timer_periph.h"
 #include "freertos/FreeRTOS.h"
 #include "esp_app_trace.h"
+#include "esp_rom_sys.h"
 
 #if CONFIG_APPTRACE_ENABLE
 #define ESP_APPTRACE_MAX_VPRINTF_ARGS           256
@@ -180,13 +181,13 @@ const static char *TAG = "esp_apptrace";
 #define ESP_APPTRACE_LOG( format, ... )   \
     do { \
         esp_apptrace_log_lock(); \
-        ets_printf(format, ##__VA_ARGS__); \
+        esp_rom_printf(format, ##__VA_ARGS__); \
         esp_apptrace_log_unlock(); \
     } while(0)
 #else
 #define ESP_APPTRACE_LOG( format, ... )   \
     do { \
-        ets_printf(format, ##__VA_ARGS__); \
+        esp_rom_printf(format, ##__VA_ARGS__); \
     } while(0)
 #endif
 
diff --git a/components/app_trace/sys_view/Sample/Config/SEGGER_SYSVIEW_Config_FreeRTOS.c b/components/app_trace/sys_view/Sample/Config/SEGGER_SYSVIEW_Config_FreeRTOS.c
index 93e299400f..9bbc4b2a66 100644
--- a/components/app_trace/sys_view/Sample/Config/SEGGER_SYSVIEW_Config_FreeRTOS.c
+++ b/components/app_trace/sys_view/Sample/Config/SEGGER_SYSVIEW_Config_FreeRTOS.c
@@ -61,25 +61,17 @@ File    : SEGGER_SYSVIEW_Config_FreeRTOS.c
 Purpose : Sample setup configuration of SystemView with FreeRTOS.
 Revision: $Rev: 3734 $
 */
+#include "sdkconfig.h"
 #include "freertos/FreeRTOS.h"
 #include "SEGGER_SYSVIEW.h"
-#if CONFIG_IDF_TARGET_ESP32
-#include "esp32/rom/ets_sys.h"
-#include "esp32/clk.h"
-#elif CONFIG_IDF_TARGET_ESP32S2
-#include "esp32s2/rom/ets_sys.h"
-#include "esp32s2/clk.h"
-#endif
 #include "esp_app_trace.h"
 #include "esp_app_trace_util.h"
 #include "esp_intr_alloc.h"
 #include "soc/soc.h"
 #include "soc/interrupts.h"
 #if CONFIG_IDF_TARGET_ESP32
-#include "esp32/rom/ets_sys.h"
 #include "esp32/clk.h"
 #elif CONFIG_IDF_TARGET_ESP32S2
-#include "esp32s2/rom/ets_sys.h"
 #include "esp32s2/clk.h"
 #endif
 
diff --git a/components/app_trace/sys_view/esp32/SEGGER_RTT_esp32.c b/components/app_trace/sys_view/esp32/SEGGER_RTT_esp32.c
index 744c06a776..c73e8876ac 100644
--- a/components/app_trace/sys_view/esp32/SEGGER_RTT_esp32.c
+++ b/components/app_trace/sys_view/esp32/SEGGER_RTT_esp32.c
@@ -18,14 +18,9 @@
 #include "SEGGER_SYSVIEW.h"
 #include "SEGGER_SYSVIEW_Conf.h"
 
-#if CONFIG_IDF_TARGET_ESP32
-#include "esp32/rom/ets_sys.h"
-#elif CONFIG_IDF_TARGET_ESP32S2
-#include "esp32s2/rom/ets_sys.h"
-#endif
 #include "esp_app_trace.h"
-
 #include "esp_log.h"
+
 const static char *TAG = "segger_rtt";
 
 #define SYSVIEW_EVENTS_BUF_SZ         255U
diff --git a/components/app_trace/test/test_trace.c b/components/app_trace/test/test_trace.c
index 5e800c8d06..04d4ee956e 100644
--- a/components/app_trace/test/test_trace.c
+++ b/components/app_trace/test/test_trace.c
@@ -5,6 +5,7 @@
 #include <stdarg.h>
 #include "unity.h"
 #include "driver/timer.h"
+#include "esp_rom_sys.h"
 #include "soc/cpu.h"
 #include "freertos/FreeRTOS.h"
 #include "freertos/semphr.h"
@@ -31,7 +32,7 @@ const static char *TAG = "esp_apptrace_test";
         else \
             ret = xSemaphoreTake(s_print_lock, portMAX_DELAY); \
         if (ret == pdTRUE) { \
-            ets_printf(format, ##__VA_ARGS__); \
+            esp_rom_printf(format, ##__VA_ARGS__); \
             if (xPortInIsrContext()) \
                 xSemaphoreGiveFromISR(s_print_lock, NULL); \
             else \
@@ -41,7 +42,7 @@ const static char *TAG = "esp_apptrace_test";
 #else
 #define ESP_APPTRACE_TEST_LOG( format, ... )   \
     do { \
-        ets_printf(format, ##__VA_ARGS__); \
+        esp_rom_printf(format, ##__VA_ARGS__); \
     } while(0)
 #endif
 
@@ -138,7 +139,7 @@ static void esp_apptrace_test_timer_isr(void *arg)
     if (res != ESP_OK) {
     } else {
         if (0) {
-            ets_printf("tim-%d-%d: Written chunk%d %d bytes, %x\n",
+            esp_rom_printf("tim-%d-%d: Written chunk%d %d bytes, %x\n",
                        tim_arg->group, tim_arg->id, tim_arg->data.wr_cnt, tim_arg->data.buf_sz, tim_arg->data.wr_cnt & tim_arg->data.mask);
         }
         tim_arg->data.wr_err = 0;
@@ -161,9 +162,9 @@ static void esp_apptrace_test_timer_isr_crash(void *arg)
         memset(tim_arg->data.buf + 2 * sizeof(uint32_t), tim_arg->data.wr_cnt & tim_arg->data.mask, tim_arg->data.buf_sz - 2 * sizeof(uint32_t));
         int res = ESP_APPTRACE_TEST_WRITE_FROM_ISR(tim_arg->data.buf, tim_arg->data.buf_sz);
         if (res != ESP_OK) {
-            ets_printf("tim-%d-%d: Failed to write trace %d %x!\n", tim_arg->group, tim_arg->id, res, tim_arg->data.wr_cnt & tim_arg->data.mask);
+            esp_rom_printf("tim-%d-%d: Failed to write trace %d %x!\n", tim_arg->group, tim_arg->id, res, tim_arg->data.wr_cnt & tim_arg->data.mask);
         } else {
-            ets_printf("tim-%d-%d: Written chunk%d %d bytes, %x\n",
+            esp_rom_printf("tim-%d-%d: Written chunk%d %d bytes, %x\n",
                        tim_arg->group, tim_arg->id, tim_arg->data.wr_cnt, tim_arg->data.buf_sz, tim_arg->data.wr_cnt & tim_arg->data.mask);
             tim_arg->data.wr_cnt++;
         }
@@ -404,7 +405,7 @@ static void esp_apptrace_test(esp_apptrace_test_cfg_t *test_cfg)
 #if ESP_APPTRACE_TEST_USE_PRINT_LOCK == 1
     s_print_lock = xSemaphoreCreateBinary();
     if (!s_print_lock) {
-        ets_printf("%s: Failed to create print lock!", TAG);
+        esp_rom_printf("%s: Failed to create print lock!", TAG);
         return;
     }
     xSemaphoreGive(s_print_lock);
diff --git a/components/bootloader_support/src/bootloader_common.c b/components/bootloader_support/src/bootloader_common.c
index d18ac11d71..78bad8dd12 100644
--- a/components/bootloader_support/src/bootloader_common.c
+++ b/components/bootloader_support/src/bootloader_common.c
@@ -21,10 +21,10 @@
 #include "esp32/rom/spi_flash.h"
 #elif CONFIG_IDF_TARGET_ESP32S2
 #include "esp32s2/rom/spi_flash.h"
-#include "esp32s2/rom/ets_sys.h"
 #endif
 #include "esp_rom_crc.h"
 #include "esp_rom_gpio.h"
+#include "esp_rom_sys.h"
 #include "esp_flash_partitions.h"
 #include "bootloader_flash.h"
 #include "bootloader_common.h"
@@ -259,7 +259,7 @@ void bootloader_common_vddsdio_configure(void)
         cfg.drefl = 3;
         cfg.force = 1;
         rtc_vddsdio_set_config(cfg);
-        ets_delay_us(10); // wait for regulator to become stable
+        esp_rom_delay_us(10); // wait for regulator to become stable
     }
 #endif // CONFIG_BOOTLOADER_VDDSDIO_BOOST
 }
diff --git a/components/bootloader_support/src/bootloader_console.c b/components/bootloader_support/src/bootloader_console.c
index bc974d8074..1609994a6b 100644
--- a/components/bootloader_support/src/bootloader_console.c
+++ b/components/bootloader_support/src/bootloader_console.c
@@ -21,21 +21,19 @@
 #include "soc/gpio_sig_map.h"
 #include "soc/rtc.h"
 #include "hal/clk_gate_ll.h"
-#ifdef CONFIG_IDF_TARGET_ESP32
-#include "esp32/rom/ets_sys.h"
-#elif CONFIG_IDF_TARGET_ESP32S2
-#include "esp32s2/rom/ets_sys.h"
+#if CONFIG_IDF_TARGET_ESP32S2
 #include "esp32s2/rom/usb/cdc_acm.h"
 #include "esp32s2/rom/usb/usb_common.h"
 #endif
 #include "esp_rom_gpio.h"
 #include "esp_rom_uart.h"
+#include "esp_rom_sys.h"
 
 #ifdef CONFIG_ESP_CONSOLE_UART_NONE
 void bootloader_console_init(void)
 {
-    ets_install_putc1(NULL);
-    ets_install_putc2(NULL);
+    esp_rom_install_channel_putc(1, NULL);
+    esp_rom_install_channel_putc(2, NULL);
 }
 #endif // CONFIG_ESP_CONSOLE_UART_NONE
 
@@ -44,7 +42,7 @@ void bootloader_console_init(void)
 {
     const int uart_num = CONFIG_ESP_CONSOLE_UART_NUM;
 
-    ets_install_uart_printf();
+    esp_rom_install_channel_putc(1, esp_rom_uart_putc);
 
     // Wait for UART FIFO to be empty.
     esp_rom_uart_tx_wait_idle(0);
@@ -53,8 +51,7 @@ void bootloader_console_init(void)
     // Some constants to make the following code less upper-case
     const int uart_tx_gpio = CONFIG_ESP_CONSOLE_UART_TX_GPIO;
     const int uart_rx_gpio = CONFIG_ESP_CONSOLE_UART_RX_GPIO;
-    // Switch to the new UART (this just changes UART number used for
-    // ets_printf in ROM code).
+    // Switch to the new UART (this just changes UART number used for esp_rom_printf in ROM code).
     esp_rom_uart_set_as_console(uart_num);
     // If console is attached to UART1 or if non-default pins are used,
     // need to reconfigure pins using GPIO matrix
@@ -96,6 +93,6 @@ void bootloader_console_init(void)
 
     esp_rom_uart_usb_acm_init(s_usb_cdc_buf, sizeof(s_usb_cdc_buf));
     esp_rom_uart_set_as_console(ESP_ROM_UART_USB);
-    ets_install_putc1(bootloader_console_write_char_usb);
+    esp_rom_install_channel_putc(1, bootloader_console_write_char_usb);
 }
 #endif //CONFIG_ESP_CONSOLE_USB_CDC
diff --git a/components/bootloader_support/src/bootloader_console_loader.c b/components/bootloader_support/src/bootloader_console_loader.c
index 6b23a41ab9..9e99ecd17b 100644
--- a/components/bootloader_support/src/bootloader_console_loader.c
+++ b/components/bootloader_support/src/bootloader_console_loader.c
@@ -13,7 +13,7 @@
 // limitations under the License.
 
 /**
- * This file is contains console-related functions which should be located in iram_loader_seg,
+ * This file contains console-related functions which should be located in iram_loader_seg,
  * to be available in the "loader" phase, when iram_seg may be overwritten.
  */
 #include <stdint.h>
@@ -21,10 +21,8 @@
 #include "sdkconfig.h"
 #include "bootloader_console.h"
 #include "esp_rom_uart.h"
-#ifdef CONFIG_IDF_TARGET_ESP32
-#include "esp32/rom/ets_sys.h"
-#elif CONFIG_IDF_TARGET_ESP32S2
-#include "esp32s2/rom/ets_sys.h"
+#include "esp_rom_sys.h"
+#if CONFIG_IDF_TARGET_ESP32S2
 #include "esp32s2/rom/usb/chip_usb_dw_wrapper.h"
 #include "esp32s2/rom/usb/usb_dc.h"
 #include "esp32s2/rom/usb/cdc_acm.h"
@@ -32,7 +30,7 @@
 #endif
 
 #ifdef CONFIG_ESP_CONSOLE_USB_CDC
-/* The following functions replace ets_write_char_uart, esp_rom_uart_tx_one_char,
+/* The following functions replace esp_rom_uart_putc, esp_rom_uart_tx_one_char,
  * and uart_tx_one_char_uart ROM functions. The main difference is that
  * uart_tx_one_char_uart calls cdc_acm_fifo_fill for each byte passed to it,
  * which results in very slow console output. The version here uses a TX buffer.
@@ -79,10 +77,10 @@ void bootloader_console_deinit(void)
     bootloader_console_flush_usb();
     usb_dc_prepare_persist();
     chip_usb_set_persist_flags(USBDC_PERSIST_ENA);
-    ets_delay_us(100);
+    esp_rom_delay_us(100);
     for (int i = 0; i < 10; i++) {
         usb_dc_check_poll_for_interrupts();
     }
-    ets_install_putc1(NULL);
+    esp_rom_install_channel_putc(1, NULL);
 #endif
 }
diff --git a/components/bootloader_support/src/bootloader_utility.c b/components/bootloader_support/src/bootloader_utility.c
index 9c2be3ab43..93a534aa43 100644
--- a/components/bootloader_support/src/bootloader_utility.c
+++ b/components/bootloader_support/src/bootloader_utility.c
@@ -19,15 +19,14 @@
 #include "esp_attr.h"
 #include "esp_log.h"
 
+#include "esp_rom_sys.h"
 #if CONFIG_IDF_TARGET_ESP32
 #include "esp32/rom/cache.h"
-#include "esp32/rom/ets_sys.h"
 #include "esp32/rom/spi_flash.h"
 #include "esp32/rom/rtc.h"
 #include "esp32/rom/secure_boot.h"
 #elif CONFIG_IDF_TARGET_ESP32S2
 #include "esp32s2/rom/cache.h"
-#include "esp32s2/rom/ets_sys.h"
 #include "esp32s2/rom/spi_flash.h"
 #include "esp32s2/rom/rtc.h"
 #include "esp32s2/rom/secure_boot.h"
@@ -766,7 +765,7 @@ void bootloader_reset(void)
 {
 #ifdef BOOTLOADER_BUILD
     bootloader_atexit();
-    ets_delay_us(1000); /* Allow last byte to leave FIFO */
+    esp_rom_delay_us(1000); /* Allow last byte to leave FIFO */
     REG_WRITE(RTC_CNTL_OPTIONS0_REG, RTC_CNTL_SW_SYS_RST);
     while (1) { }       /* This line will never be reached, used to keep gcc happy */
 #else
diff --git a/components/bootloader_support/src/esp32/bootloader_esp32.c b/components/bootloader_support/src/esp32/bootloader_esp32.c
index 2510ee0502..abf2b52956 100644
--- a/components/bootloader_support/src/esp32/bootloader_esp32.c
+++ b/components/bootloader_support/src/esp32/bootloader_esp32.c
@@ -35,9 +35,9 @@
 #include "soc/spi_periph.h"
 
 #include "esp32/rom/cache.h"
-#include "esp32/rom/ets_sys.h"
 #include "esp_rom_gpio.h"
 #include "esp_rom_efuse.h"
+#include "esp_rom_sys.h"
 #include "esp32/rom/spi_flash.h"
 #include "esp32/rom/rtc.h"
 
@@ -354,7 +354,7 @@ static void bootloader_check_wdt_reset(void)
 void abort(void)
 {
 #if !CONFIG_ESP_SYSTEM_PANIC_SILENT_REBOOT
-    ets_printf("abort() was called at PC 0x%08x\r\n", (intptr_t)__builtin_return_address(0) - 3);
+    esp_rom_printf("abort() was called at PC 0x%08x\r\n", (intptr_t)__builtin_return_address(0) - 3);
 #endif
     if (esp_cpu_in_ocd_debug_mode()) {
         __asm__("break 0,0");
diff --git a/components/bootloader_support/src/esp32/bootloader_sha.c b/components/bootloader_support/src/esp32/bootloader_sha.c
index 79862685cf..3f3c73e3e4 100644
--- a/components/bootloader_support/src/esp32/bootloader_sha.c
+++ b/components/bootloader_support/src/esp32/bootloader_sha.c
@@ -45,7 +45,6 @@ void bootloader_sha256_data(bootloader_sha256_handle_t handle, const void *data,
     size_t word_len = data_len / 4;
     uint32_t *sha_text_reg = (uint32_t *)(SHA_TEXT_BASE);
 
-    //ets_printf("word_len %d so far %d\n", word_len, words_hashed);
     while (word_len > 0) {
         size_t block_count = words_hashed % BLOCK_WORDS;
         size_t copy_words = (BLOCK_WORDS - block_count);
@@ -56,7 +55,6 @@ void bootloader_sha256_data(bootloader_sha256_handle_t handle, const void *data,
         while (REG_READ(SHA_256_BUSY_REG) != 0) { }
 
         // Copy to memory block
-        //ets_printf("block_count %d copy_words %d\n", block_count, copy_words);
         for (int i = 0; i < copy_words; i++) {
             sha_text_reg[block_count + i] = __builtin_bswap32(w[i]);
         }
@@ -70,7 +68,6 @@ void bootloader_sha256_data(bootloader_sha256_handle_t handle, const void *data,
 
         // If we loaded a full block, run the SHA engine
         if (block_count == BLOCK_WORDS) {
-            //ets_printf("running engine @ count %d\n", words_hashed);
             if (words_hashed == BLOCK_WORDS) {
                 REG_WRITE(SHA_256_START_REG, 1);
             } else {
diff --git a/components/bootloader_support/src/esp32/secure_boot.c b/components/bootloader_support/src/esp32/secure_boot.c
index 551f522cb5..2241578f05 100644
--- a/components/bootloader_support/src/esp32/secure_boot.c
+++ b/components/bootloader_support/src/esp32/secure_boot.c
@@ -19,7 +19,6 @@
 #include "esp_log.h"
 
 #include "esp32/rom/cache.h"
-#include "esp32/rom/ets_sys.h"
 #include "esp_rom_crc.h"
 
 #include "soc/efuse_periph.h"
diff --git a/components/bootloader_support/src/esp32s2/bootloader_esp32s2.c b/components/bootloader_support/src/esp32s2/bootloader_esp32s2.c
index e4d5e499d2..9b08921d41 100644
--- a/components/bootloader_support/src/esp32s2/bootloader_esp32s2.c
+++ b/components/bootloader_support/src/esp32s2/bootloader_esp32s2.c
@@ -28,8 +28,8 @@
 #include "bootloader_mem.h"
 #include "bootloader_console.h"
 
+#include "esp_rom_sys.h"
 #include "esp32s2/rom/cache.h"
-#include "esp32s2/rom/ets_sys.h"
 #include "esp32s2/rom/spi_flash.h"
 #include "esp32s2/rom/rtc.h"
 
@@ -279,7 +279,7 @@ static void bootloader_check_wdt_reset(void)
 void abort(void)
 {
 #if !CONFIG_ESP_SYSTEM_PANIC_SILENT_REBOOT
-    ets_printf("abort() was called at PC 0x%08x\r\n", (intptr_t)__builtin_return_address(0) - 3);
+    esp_rom_printf("abort() was called at PC 0x%08x\r\n", (intptr_t)__builtin_return_address(0) - 3);
 #endif
     if (esp_cpu_in_ocd_debug_mode()) {
         __asm__("break 0,0");
diff --git a/components/bt/controller/bt.c b/components/bt/controller/bt.c
index afe994fd3e..d3f3b3ecf5 100644
--- a/components/bt/controller/bt.c
+++ b/components/bt/controller/bt.c
@@ -46,6 +46,8 @@
 #include "esp_ipc.h"
 #endif
 
+#include "esp_rom_sys.h"
+
 #if CONFIG_BT_ENABLED
 
 /* Macro definition
@@ -1433,7 +1435,7 @@ esp_err_t esp_bt_controller_disable(void)
             btdm_wakeup_request(false);
         }
         while (!btdm_power_state_active()) {
-            ets_delay_us(1000);
+            esp_rom_delay_us(1000);
         }
     }
 
diff --git a/components/bt/esp_ble_mesh/mesh_common/include/mesh_trace.h b/components/bt/esp_ble_mesh/mesh_common/include/mesh_trace.h
index 924e60b8de..d4b96e109c 100644
--- a/components/bt/esp_ble_mesh/mesh_common/include/mesh_trace.h
+++ b/components/bt/esp_ble_mesh/mesh_common/include/mesh_trace.h
@@ -11,6 +11,7 @@
 
 #include "esp_log.h"
 #include "mesh_util.h"
+#include "esp_rom_sys.h"
 
 #ifdef __cplusplus
 extern "C" {
@@ -65,7 +66,7 @@ extern "C" {
 #define BLE_MESH_PRINT_D(tag, format, ...)   {esp_log_write(ESP_LOG_DEBUG,   tag, LOG_FORMAT(D, format), esp_log_timestamp(), tag, ##__VA_ARGS__); }
 #define BLE_MESH_PRINT_V(tag, format, ...)   {esp_log_write(ESP_LOG_VERBOSE, tag, LOG_FORMAT(V, format), esp_log_timestamp(), tag, ##__VA_ARGS__); }
 
-#define printk          ets_printf
+#define printk          esp_rom_printf
 
 #define _STRINGIFY(x)   #x
 #define STRINGIFY(s)    _STRINGIFY(s)
diff --git a/components/driver/esp32/adc.c b/components/driver/esp32/adc.c
index 6e124f4b1c..b95f23f894 100644
--- a/components/driver/esp32/adc.c
+++ b/components/driver/esp32/adc.c
@@ -12,9 +12,10 @@
 // See the License for the specific language governing permissions and
 // limitations under the License.
 
-#include <esp_types.h>
 #include <stdlib.h>
 #include <ctype.h>
+#include "sdkconfig.h"
+#include "esp_types.h"
 #include "esp_log.h"
 #include "sys/lock.h"
 #include "soc/rtc.h"
@@ -28,9 +29,6 @@
 #include "driver/rtc_cntl.h"
 #include "driver/gpio.h"
 #include "driver/adc.h"
-#include "sdkconfig.h"
-
-#include "esp32/rom/ets_sys.h"
 
 #ifndef NDEBUG
 // Enable built-in checks in queue.h in debug builds
diff --git a/components/driver/esp32/touch_sensor.c b/components/driver/esp32/touch_sensor.c
index ebf454df17..61aeee769e 100644
--- a/components/driver/esp32/touch_sensor.c
+++ b/components/driver/esp32/touch_sensor.c
@@ -12,9 +12,10 @@
 // See the License for the specific language governing permissions and
 // limitations under the License.
 
-#include <esp_types.h>
 #include <stdlib.h>
 #include <ctype.h>
+#include "sdkconfig.h"
+#include "esp_types.h"
 #include "esp_log.h"
 #include "sys/lock.h"
 #include "soc/rtc.h"
@@ -28,9 +29,6 @@
 #include "driver/touch_pad.h"
 #include "driver/rtc_cntl.h"
 #include "driver/gpio.h"
-#include "sdkconfig.h"
-
-#include "esp32/rom/ets_sys.h"
 
 #ifndef NDEBUG
 // Enable built-in checks in queue.h in debug builds
diff --git a/components/driver/esp32s2/adc.c b/components/driver/esp32s2/adc.c
index 35bbb84f09..db85300c1a 100644
--- a/components/driver/esp32s2/adc.c
+++ b/components/driver/esp32s2/adc.c
@@ -12,9 +12,10 @@
 // See the License for the specific language governing permissions and
 // limitations under the License.
 
-#include <esp_types.h>
 #include <stdlib.h>
 #include <ctype.h>
+#include "sdkconfig.h"
+#include "esp_types.h"
 #include "esp_log.h"
 #include "sys/lock.h"
 #include "freertos/FreeRTOS.h"
@@ -27,9 +28,7 @@
 #include "driver/rtc_cntl.h"
 #include "driver/gpio.h"
 #include "driver/adc.h"
-#include "sdkconfig.h"
 
-#include "esp32s2/rom/ets_sys.h"
 #include "hal/adc_types.h"
 #include "hal/adc_hal.h"
 
diff --git a/components/driver/esp32s2/rtc_tempsensor.c b/components/driver/esp32s2/rtc_tempsensor.c
index cb92253d9d..cdf15d12a0 100644
--- a/components/driver/esp32s2/rtc_tempsensor.c
+++ b/components/driver/esp32s2/rtc_tempsensor.c
@@ -12,9 +12,9 @@
 // See the License for the specific language governing permissions and
 // limitations under the License.
 
-#include <esp_types.h>
 #include <stdlib.h>
 #include <ctype.h>
+#include "esp_types.h"
 #include "freertos/FreeRTOS.h"
 #include "freertos/semphr.h"
 #include "esp_log.h"
@@ -24,7 +24,6 @@
 #include "soc/sens_reg.h"
 #include "soc/sens_struct.h"
 #include "driver/temp_sensor.h"
-#include "esp32s2/rom/ets_sys.h"
 
 static const char *TAG = "tsens";
 
diff --git a/components/driver/esp32s2/touch_sensor.c b/components/driver/esp32s2/touch_sensor.c
index 60f3b2d838..3c15817127 100644
--- a/components/driver/esp32s2/touch_sensor.c
+++ b/components/driver/esp32s2/touch_sensor.c
@@ -28,7 +28,6 @@
 #include "driver/gpio.h"
 #include "sdkconfig.h"
 
-#include "esp32s2/rom/ets_sys.h"
 #include "hal/touch_sensor_types.h"
 #include "hal/touch_sensor_hal.h"
 
diff --git a/components/driver/i2c.c b/components/driver/i2c.c
index a1d097e319..b14cf23104 100644
--- a/components/driver/i2c.c
+++ b/components/driver/i2c.c
@@ -31,6 +31,7 @@
 #include "driver/i2c.h"
 #include "driver/periph_ctrl.h"
 #include "esp_rom_gpio.h"
+#include "esp_rom_sys.h"
 
 static const char *I2C_TAG = "i2c";
 #define I2C_CHECK(a, str, ret)  if(!(a)) {                                             \
@@ -529,16 +530,16 @@ static esp_err_t i2c_master_clear_bus(i2c_port_t i2c_num)
     // a STOP condition.
     gpio_set_level(scl_io, 0);
     gpio_set_level(sda_io, 1);
-    ets_delay_us(scl_half_period);
+    esp_rom_delay_us(scl_half_period);
     while (!gpio_get_level(sda_io) && (i++ < I2C_CLR_BUS_SCL_NUM)) {
         gpio_set_level(scl_io, 1);
-        ets_delay_us(scl_half_period);
+        esp_rom_delay_us(scl_half_period);
         gpio_set_level(scl_io, 0);
-        ets_delay_us(scl_half_period);
+        esp_rom_delay_us(scl_half_period);
     }
     gpio_set_level(sda_io, 0); // setup for STOP
     gpio_set_level(scl_io, 1);
-    ets_delay_us(scl_half_period);
+    esp_rom_delay_us(scl_half_period);
     gpio_set_level(sda_io, 1); // STOP, SDA low -> high while SCL is HIGH
     i2c_set_pin(i2c_num, sda_io, scl_io, 1, 1, I2C_MODE_MASTER);
 #else
diff --git a/components/driver/ledc.c b/components/driver/ledc.c
index 35a2f07630..aab6324aa6 100644
--- a/components/driver/ledc.c
+++ b/components/driver/ledc.c
@@ -23,6 +23,7 @@
 #include "hal/ledc_hal.h"
 #include "driver/ledc.h"
 #include "esp_rom_gpio.h"
+#include "esp_rom_sys.h"
 
 static const char* LEDC_TAG = "ledc";
 
@@ -97,7 +98,7 @@ static bool ledc_slow_clk_calibrate(void)
     //Enable CLK8M for LEDC
     SET_PERI_REG_MASK(RTC_CNTL_CLK_CONF_REG, RTC_CNTL_DIG_CLK8M_EN_M);
     //Waiting for CLK8M to turn on
-    ets_delay_us(DELAY_CLK8M_CLK_SWITCH);
+    esp_rom_delay_us(DELAY_CLK8M_CLK_SWITCH);
     uint32_t cal_val = rtc_clk_cal(RTC_CAL_8MD256, SLOW_CLK_CYC_CALIBRATE);
     if(cal_val == 0) {
         ESP_LOGE(LEDC_TAG, "CLK8M_CLK calibration failed");
diff --git a/components/driver/rtc_module.c b/components/driver/rtc_module.c
index fa84713495..1bb405ca6d 100644
--- a/components/driver/rtc_module.c
+++ b/components/driver/rtc_module.c
@@ -12,9 +12,10 @@
 // See the License for the specific language governing permissions and
 // limitations under the License.
 
-#include <esp_types.h>
 #include <stdlib.h>
 #include <ctype.h>
+#include "sdkconfig.h"
+#include "esp_types.h"
 #include "esp_log.h"
 #include "soc/rtc_periph.h"
 #include "soc/sens_periph.h"
@@ -28,12 +29,6 @@
 #include "esp_intr_alloc.h"
 #include "sys/lock.h"
 #include "driver/rtc_cntl.h"
-#include "sdkconfig.h"
-#if CONFIG_IDF_TARGET_ESP32
-#include "esp32/rom/ets_sys.h"
-#elif CONFIG_IDF_TARGET_ESP32S2
-#include "esp32s2/rom/ets_sys.h"
-#endif
 
 #ifndef NDEBUG
 // Enable built-in checks in queue.h in debug builds
diff --git a/components/driver/sdmmc_host.c b/components/driver/sdmmc_host.c
index 8745f6d95f..4253a8797f 100644
--- a/components/driver/sdmmc_host.c
+++ b/components/driver/sdmmc_host.c
@@ -20,6 +20,7 @@
 #include "soc/gpio_periph.h"
 #include "soc/gpio_caps.h"
 #include "esp_rom_gpio.h"
+#include "esp_rom_sys.h"
 #include "driver/gpio.h"
 #include "driver/sdmmc_host.h"
 #include "driver/periph_ctrl.h"
@@ -96,7 +97,7 @@ static void sdmmc_host_set_clk_div(int div)
     SDMMC.clock.phase_din = 4;      // 180 degree phase on the input clock
     SDMMC.clock.phase_core = 0;
     // Wait for the clock to propagate
-    ets_delay_us(10);
+    esp_rom_delay_us(10);
 }
 
 static void sdmmc_host_input_clk_disable(void)
diff --git a/components/driver/spi_slave.c b/components/driver/spi_slave.c
index 9f764e3682..2cecf4275d 100644
--- a/components/driver/spi_slave.c
+++ b/components/driver/spi_slave.c
@@ -35,6 +35,7 @@
 #include "driver/gpio.h"
 #include "esp_heap_caps.h"
 #include "esp_rom_gpio.h"
+#include "esp_rom_sys.h"
 
 static const char *SPI_TAG = "spi_slave";
 #define SPI_CHECK(a, str, ret_val) \
@@ -302,24 +303,24 @@ esp_err_t SPI_SLAVE_ATTR spi_slave_transmit(spi_host_device_t host, spi_slave_tr
 #ifdef DEBUG_SLAVE
 static void dumpregs(spi_dev_t *hw)
 {
-    ets_printf("***REG DUMP ***\n");
-    ets_printf("mosi_dlen         : %08X\n", hw->mosi_dlen.val);
-    ets_printf("miso_dlen         : %08X\n", hw->miso_dlen.val);
-    ets_printf("slv_wrbuf_dlen    : %08X\n", hw->slv_wrbuf_dlen.val);
-    ets_printf("slv_rdbuf_dlen    : %08X\n", hw->slv_rdbuf_dlen.val);
-    ets_printf("slave             : %08X\n", hw->slave.val);
-    ets_printf("slv_rdata_bit     : %x\n", hw->slv_rd_bit.slv_rdata_bit);
-    ets_printf("dma_rx_status     : %08X\n", hw->dma_rx_status);
-    ets_printf("dma_tx_status     : %08X\n", hw->dma_tx_status);
+    esp_rom_printf("***REG DUMP ***\n");
+    esp_rom_printf("mosi_dlen         : %08X\n", hw->mosi_dlen.val);
+    esp_rom_printf("miso_dlen         : %08X\n", hw->miso_dlen.val);
+    esp_rom_printf("slv_wrbuf_dlen    : %08X\n", hw->slv_wrbuf_dlen.val);
+    esp_rom_printf("slv_rdbuf_dlen    : %08X\n", hw->slv_rdbuf_dlen.val);
+    esp_rom_printf("slave             : %08X\n", hw->slave.val);
+    esp_rom_printf("slv_rdata_bit     : %x\n", hw->slv_rd_bit.slv_rdata_bit);
+    esp_rom_printf("dma_rx_status     : %08X\n", hw->dma_rx_status);
+    esp_rom_printf("dma_tx_status     : %08X\n", hw->dma_tx_status);
 }
 
 
 static void dumpll(lldesc_t *ll)
 {
-    ets_printf("****LL DUMP****\n");
-    ets_printf("Size %d\n", ll->size);
-    ets_printf("Len: %d\n", ll->length);
-    ets_printf("Owner: %s\n", ll->owner ? "dma" : "cpu");
+    esp_rom_printf("****LL DUMP****\n");
+    esp_rom_printf("Size %d\n", ll->size);
+    esp_rom_printf("Len: %d\n", ll->length);
+    esp_rom_printf("Owner: %s\n", ll->owner ? "dma" : "cpu");
 }
 #endif
 
diff --git a/components/driver/test/adc_dma_test/test_esp32.c b/components/driver/test/adc_dma_test/test_esp32.c
index 557fc86e19..134bbe1785 100644
--- a/components/driver/test/adc_dma_test/test_esp32.c
+++ b/components/driver/test/adc_dma_test/test_esp32.c
@@ -27,6 +27,7 @@
 #include "esp_log.h"
 #include "nvs_flash.h"
 #include "test_utils.h"
+#include "esp_rom_sys.h"
 
 #if !DISABLED_FOR_TARGETS(ESP8266, ESP32S2) // This testcase for ESP32
 
@@ -118,7 +119,7 @@ TEST_CASE("ADC DMA read", "[adc dma]")
         example_disp_buf((uint8_t *) i2s_read_buff, 64);
         //save original data from I2S(ADC) into flash.
         flash_wr_size += i2s_read_len;
-        ets_printf("Sound recording %u%%\n", flash_wr_size * 100 / FLASH_RECORD_SIZE);
+        esp_rom_printf("Sound recording %u%%\n", flash_wr_size * 100 / FLASH_RECORD_SIZE);
     }
     TEST_ESP_OK( i2s_adc_disable(EXAMPLE_I2S_NUM) );
     if (i2s_read_buff) {
diff --git a/components/driver/test/adc_dma_test/test_esp32s2.c b/components/driver/test/adc_dma_test/test_esp32s2.c
index ed7985de3a..147c0fe24d 100644
--- a/components/driver/test/adc_dma_test/test_esp32s2.c
+++ b/components/driver/test/adc_dma_test/test_esp32s2.c
@@ -35,6 +35,7 @@
 #include "soc/spi_reg.h"
 #include "soc/adc_periph.h"
 #include "test/test_common_adc.h"
+#include "esp_rom_sys.h"
 
 #if !DISABLED_FOR_TARGETS(ESP8266, ESP32) // This testcase for ESP32S2
 
@@ -219,7 +220,7 @@ static esp_err_t adc_dma_data_check(adc_unit_t adc, int ideal_level)
     int unit_old = 1;
     int ch_cnt = 0;
     for (int cnt = 0; cnt < 2; cnt++) {
-        ets_printf("\n[%s] link_buf[%d]: \n", __func__, cnt % 2);
+        esp_rom_printf("\n[%s] link_buf[%d]: \n", __func__, cnt % 2);
         for (int i = 0; i < SAR_DMA_DATA_SIZE((adc > 2) ? 2 : 1, SAR_SIMPLE_NUM); i += 2) {
             uint8_t h = link_buf[cnt % 2][i + 1], l = link_buf[cnt % 2][i];
             uint16_t temp = (h << 8 | l);
@@ -228,9 +229,9 @@ static esp_err_t adc_dma_data_check(adc_unit_t adc, int ideal_level)
             if (adc > ADC_UNIT_2) {  //ADC_ENCODE_11BIT
 #if DEBUG_PRINT_ENABLE
                 if (i % 16 == 0) {
-                    ets_printf("\n");
+                    esp_rom_printf("\n");
                 }
-                ets_printf("[%d_%d_%04x] ", data->type2.unit, data->type2.channel, data->type2.data);
+                esp_rom_printf("[%d_%d_%04x] ", data->type2.unit, data->type2.channel, data->type2.data);
 #endif
 #if DEBUG_CHECK_ENABLE
                 if (ideal_level >= 0) {
@@ -256,9 +257,9 @@ static esp_err_t adc_dma_data_check(adc_unit_t adc, int ideal_level)
             } else {        //ADC_ENCODE_12BIT
 #if DEBUG_PRINT_ENABLE
                 if (i % 16 == 0) {
-                    ets_printf("\n");
+                    esp_rom_printf("\n");
                 }
-                ets_printf("[%d_%04x] ", data->type1.channel, data->type1.data);
+                esp_rom_printf("[%d_%04x] ", data->type1.channel, data->type1.data);
 #endif
 #if DEBUG_CHECK_ENABLE
                 if (ideal_level >= 0) {
@@ -279,7 +280,7 @@ static esp_err_t adc_dma_data_check(adc_unit_t adc, int ideal_level)
             link_buf[cnt % 2][i] = 0;
             link_buf[cnt % 2][i + 1] = 0;
         }
-        ets_printf("\n");
+        esp_rom_printf("\n");
     }
     return ESP_OK;
 }
@@ -580,9 +581,9 @@ static void scope_output(int adc_num, int channel, int data)
 #if SCOPE_OUTPUT_UART
     static int icnt = 0;
     if (icnt++ % 8 == 0) {
-        ets_printf("\n");
+        esp_rom_printf("\n");
     }
-    ets_printf("[%d_%d_%04x] ", adc_num, channel, data);
+    esp_rom_printf("[%d_%d_%04x] ", adc_num, channel, data);
     return;
 #endif
 #if SCOPE_DEBUG_TYPE == 0
@@ -632,7 +633,7 @@ TEST_CASE("test_adc_digi_slope_debug", "[adc_dma][ignore]")
             dma_linker_restart();
             adc_digi_reset();
             for (int cnt = 0; cnt < 2; cnt++) {
-                ets_printf("cnt%d\n", cnt);
+                esp_rom_printf("cnt%d\n", cnt);
                 for (int i = 0; i < SAR_DMA_DATA_SIZE((adc > 2) ? 2 : 1, SAR_SIMPLE_NUM); i += 2) {
                     uint8_t h = link_buf[cnt % 2][i + 1], l = link_buf[cnt % 2][i];
                     uint16_t temp = (h << 8 | l);
diff --git a/components/driver/test/test_gpio.c b/components/driver/test/test_gpio.c
index 9a9183cccc..e7cc42a67b 100644
--- a/components/driver/test/test_gpio.c
+++ b/components/driver/test/test_gpio.c
@@ -14,6 +14,7 @@
 #include "freertos/queue.h"
 #include "sdkconfig.h"
 #include "esp_rom_uart.h"
+#include "esp_rom_sys.h"
 
 #define WAKE_UP_IGNORE 1  // gpio_wakeup function development is not completed yet, set it deprecated.
 
@@ -65,7 +66,7 @@ static gpio_config_t init_io(gpio_num_t num)
 static void gpio_isr_edge_handler(void* arg)
 {
     uint32_t gpio_num = (uint32_t) arg;
-    ets_printf("GPIO[%d] intr, val: %d\n", gpio_num, gpio_get_level(gpio_num));
+    esp_rom_printf("GPIO[%d] intr, val: %d\n", gpio_num, gpio_get_level(gpio_num));
     edge_intr_times++;
 }
 
@@ -74,7 +75,7 @@ static void gpio_isr_level_handler(void* arg)
 {
     uint32_t gpio_num = (uint32_t) arg;
     disable_intr_times++;
-    ets_printf("GPIO[%d] intr, val: %d, disable_intr_times = %d\n", gpio_num, gpio_get_level(gpio_num), disable_intr_times);
+    esp_rom_printf("GPIO[%d] intr, val: %d, disable_intr_times = %d\n", gpio_num, gpio_get_level(gpio_num), disable_intr_times);
     gpio_intr_disable(gpio_num);
 }
 
@@ -83,14 +84,14 @@ static void gpio_isr_level_handler2(void* arg)
 {
     uint32_t gpio_num = (uint32_t) arg;
     level_intr_times++;
-    ets_printf("GPIO[%d] intr, val: %d\n", gpio_num, gpio_get_level(gpio_num));
+    esp_rom_printf("GPIO[%d] intr, val: %d\n", gpio_num, gpio_get_level(gpio_num));
     if(gpio_get_level(gpio_num)) {
         gpio_set_level(TEST_GPIO_EXT_OUT_IO, 0);
     }else{
         gpio_set_level(TEST_GPIO_EXT_OUT_IO, 1);
     }
-    ets_printf("GPIO[%d] intr, val: %d, level_intr_times = %d\n", TEST_GPIO_EXT_OUT_IO, gpio_get_level(TEST_GPIO_EXT_OUT_IO), level_intr_times);
-    ets_printf("GPIO[%d] intr, val: %d, level_intr_times = %d\n", gpio_num, gpio_get_level(gpio_num), level_intr_times);
+    esp_rom_printf("GPIO[%d] intr, val: %d, level_intr_times = %d\n", TEST_GPIO_EXT_OUT_IO, gpio_get_level(TEST_GPIO_EXT_OUT_IO), level_intr_times);
+    esp_rom_printf("GPIO[%d] intr, val: %d, level_intr_times = %d\n", gpio_num, gpio_get_level(gpio_num), level_intr_times);
 }
 #endif
 
@@ -705,7 +706,7 @@ typedef struct {
 static void gpio_isr_handler(void* arg)
 {
     gpio_isr_param_t *param = (gpio_isr_param_t *)arg;
-    ets_printf("GPIO[%d] intr, val: %d\n", param->gpio_num, gpio_get_level(param->gpio_num));
+    esp_rom_printf("GPIO[%d] intr, val: %d\n", param->gpio_num, gpio_get_level(param->gpio_num));
     param->isr_cnt++;
 }
 
diff --git a/components/driver/test/test_spi_sio.c b/components/driver/test/test_spi_sio.c
index 3ccccce38a..6a3196a044 100644
--- a/components/driver/test/test_spi_sio.c
+++ b/components/driver/test/test_spi_sio.c
@@ -8,11 +8,6 @@
 #include <malloc.h>
 #include <string.h>
 #include "sdkconfig.h"
-#ifdef CONFIG_IDF_TARGET_ESP32
-#include "esp32/rom/ets_sys.h"
-#elif CONFIG_IDF_TARGET_ESP32S2
-#include "esp32s2/rom/ets_sys.h"
-#endif
 #include "freertos/FreeRTOS.h"
 #include "freertos/task.h"
 #include "freertos/semphr.h"
diff --git a/components/driver/test/test_timer.c b/components/driver/test/test_timer.c
index 8001f7e253..1445314d38 100644
--- a/components/driver/test/test_timer.c
+++ b/components/driver/test/test_timer.c
@@ -7,6 +7,7 @@
 #include "nvs_flash.h"
 #include "driver/timer.h"
 #include "soc/rtc.h"
+#include "esp_rom_sys.h"
 
 #define TIMER_DIVIDER  16
 #define TIMER_SCALE    (TIMER_BASE_CLK / TIMER_DIVIDER)  /*!< used to calculate counter value */
@@ -51,13 +52,13 @@ static bool test_timer_group_isr_cb(void *arg)
     alarm_flag = true;
     if (timer_group_get_auto_reload_in_isr(timer_group, timer_idx)) { // For autoreload mode, the counter value has been cleared
         timer_group_clr_intr_status_in_isr(timer_group, timer_idx);
-        ets_printf("This is TG%d timer[%d] reload-timer alarm!\n", timer_group, timer_idx);
+        esp_rom_printf("This is TG%d timer[%d] reload-timer alarm!\n", timer_group, timer_idx);
         timer_get_counter_value(timer_group, timer_idx, &timer_val);
         timer_get_counter_time_sec(timer_group, timer_idx, &time);
         evt.type = TIMER_AUTORELOAD_EN;
     } else {
         timer_group_clr_intr_status_in_isr(timer_group, timer_idx);
-        ets_printf("This is TG%d timer[%d] count-up-timer alarm!\n", timer_group, timer_idx);
+        esp_rom_printf("This is TG%d timer[%d] count-up-timer alarm!\n", timer_group, timer_idx);
         timer_get_counter_value(timer_group, timer_idx, &timer_val);
         timer_get_counter_time_sec(timer_group, timer_idx, &time);
         timer_get_alarm_value(timer_group, timer_idx, &alarm_value);
diff --git a/components/driver/test/touch_sensor_test/test_esp32.c b/components/driver/test/touch_sensor_test/test_esp32.c
index fb6d4056e6..6ad6902119 100644
--- a/components/driver/test/touch_sensor_test/test_esp32.c
+++ b/components/driver/test/touch_sensor_test/test_esp32.c
@@ -32,6 +32,7 @@
 #include "soc/rtc_cntl_struct.h"
 #include "soc/rtc_io_reg.h"
 #include "soc/rtc_io_struct.h"
+#include "esp_rom_sys.h"
 
 #if !DISABLED_FOR_TARGETS(ESP8266, ESP32S2) // This testcase for ESP32
 
@@ -298,7 +299,7 @@ static bool s_pad_activated[TOUCH_PAD_MAX];
 static void test_touch_intr_cb(void *arg)
 {
     uint32_t pad_intr = touch_pad_get_status();
-    ets_printf("T%x ", pad_intr);
+    esp_rom_printf("T%x ", pad_intr);
     //clear interrupt
     touch_pad_clear_status();
     for (int i = 0; i < TEST_TOUCH_CHANNEL; i++) {
diff --git a/components/driver/test/touch_sensor_test/test_esp32s2.c b/components/driver/test/touch_sensor_test/test_esp32s2.c
index 8a6bd28eda..c0ce93209f 100644
--- a/components/driver/test/touch_sensor_test/test_esp32s2.c
+++ b/components/driver/test/touch_sensor_test/test_esp32s2.c
@@ -36,6 +36,7 @@
 #include "soc/rtc_io_struct.h"
 #include "soc/apb_ctrl_reg.h"
 #include "driver/rtc_io.h"
+#include "esp_rom_sys.h"
 
 #if !DISABLED_FOR_TARGETS(ESP8266, ESP32) // This testcase for ESP32S2
 
@@ -623,7 +624,7 @@ static esp_err_t test_touch_check_ch_touched_with_proximity(uint32_t test_ch_num
                     if (BIT(i) & ch_mask) {
                         if (evt.pad_num == i) {
                             if (count == evt.slp_proxi_cnt) {
-                                ets_printf("priximity base(%d) cnt(%d)\n", evt.slp_proxi_base, evt.slp_proxi_cnt);
+                                esp_rom_printf("priximity base(%d) cnt(%d)\n", evt.slp_proxi_base, evt.slp_proxi_cnt);
                             }
                         }
                     }
@@ -665,7 +666,7 @@ static esp_err_t test_touch_check_ch_released_with_proximity(uint32_t test_ch_nu
                     if (BIT(i) & ch_mask) {
                         if (evt.pad_num == i) {
                             if (count == evt.slp_proxi_cnt) {
-                                ets_printf("priximity base(%d) cnt(%d)\n", evt.slp_proxi_base, evt.slp_proxi_cnt);
+                                esp_rom_printf("priximity base(%d) cnt(%d)\n", evt.slp_proxi_base, evt.slp_proxi_cnt);
                             }
                         }
                     }
@@ -742,7 +743,7 @@ static esp_err_t test_touch_check_ch_intr_timeout(touch_pad_t pad_num)
                     touch_pad_timeout_resume();
                     break;
                 } else {
-                    ets_printf("-timeout %x T[%d] status %d, evt_msk %x -\n",
+                    esp_rom_printf("-timeout %x T[%d] status %d, evt_msk %x -\n",
                                s_touch_timeout_mask, evt.pad_num, evt.pad_status, evt.intr_mask);
                     touch_pad_timeout_resume();
                 }
@@ -768,7 +769,7 @@ static void test_touch_intr_cb(void *arg)
     evt.pad_num = touch_pad_get_current_meas_channel();
 
     if (!evt.intr_mask) {
-        ets_printf(".");
+        esp_rom_printf(".");
         return;
     }
     if (evt.intr_mask & TOUCH_PAD_INTR_MASK_SCAN_DONE) {
@@ -779,11 +780,10 @@ static void test_touch_intr_cb(void *arg)
         touch_pad_sleep_channel_read_proximity_cnt(slp_config.touch_num, &cnt);
         evt.slp_proxi_cnt = cnt;
         evt.slp_proxi_base = touch_value;
-        // ets_printf("[intr] base(%d) cnt(%d)\n", touch_value, cnt);
     }
     if (evt.intr_mask & TOUCH_PAD_INTR_MASK_TIMEOUT) {
         s_touch_timeout_mask |= (BIT(evt.pad_num));
-        ets_printf("-%dtout-", SENS.sar_touch_status0.touch_scan_curr);
+        esp_rom_printf("-%dtout-", SENS.sar_touch_status0.touch_scan_curr);
     }
 
     xQueueSendFromISR(que_touch, &evt, &task_awoken);
diff --git a/components/driver/touch_sensor_common.c b/components/driver/touch_sensor_common.c
index 5546c1b27b..f8464b0fcc 100644
--- a/components/driver/touch_sensor_common.c
+++ b/components/driver/touch_sensor_common.c
@@ -12,9 +12,10 @@
 // See the License for the specific language governing permissions and
 // limitations under the License.
 
-#include <esp_types.h>
 #include <stdlib.h>
 #include <ctype.h>
+#include "sdkconfig.h"
+#include "esp_types.h"
 #include "esp_log.h"
 #include "sys/lock.h"
 #include "freertos/FreeRTOS.h"
@@ -26,13 +27,7 @@
 #include "driver/touch_pad.h"
 #include "driver/rtc_cntl.h"
 #include "driver/gpio.h"
-#include "sdkconfig.h"
 
-#if CONFIG_IDF_TARGET_ESP32
-#include "esp32/rom/ets_sys.h"
-#elif CONFIG_IDF_TARGET_ESP32S2
-#include "esp32s2/rom/ets_sys.h"
-#endif
 #include "hal/touch_sensor_types.h"
 #include "hal/touch_sensor_hal.h"
 
diff --git a/components/esp32/cache_err_int.c b/components/esp32/cache_err_int.c
index f8deadbf9e..7f9ecdd26b 100644
--- a/components/esp32/cache_err_int.c
+++ b/components/esp32/cache_err_int.c
@@ -32,7 +32,7 @@
 #include "hal/cpu_hal.h"
 
 #include "esp32/dport_access.h"
-#include "esp32/rom/ets_sys.h"
+#include "esp32/rom/ets_sys.h" // for intr_matrix_set
 
 #include "sdkconfig.h"
 
diff --git a/components/esp32/clk.c b/components/esp32/clk.c
index 6f2d0b7627..b0c9caa530 100644
--- a/components/esp32/clk.c
+++ b/components/esp32/clk.c
@@ -44,7 +44,7 @@ int IRAM_ATTR esp_clk_xtal_freq(void)
 
 void IRAM_ATTR ets_update_cpu_frequency(uint32_t ticks_per_us)
 {
-    /* Update scale factors used by ets_delay_us */
+    /* Update scale factors used by esp_rom_delay_us */
     g_ticks_per_us_pro = ticks_per_us;
 #ifndef CONFIG_FREERTOS_UNICORE
     g_ticks_per_us_app = ticks_per_us;
diff --git a/components/esp32/crosscore_int.c b/components/esp32/crosscore_int.c
index 05ccb3a631..af13ad7e3f 100644
--- a/components/esp32/crosscore_int.c
+++ b/components/esp32/crosscore_int.c
@@ -19,8 +19,6 @@
 #include "esp_intr_alloc.h"
 #include "esp_debug_helpers.h"
 
-#include "esp32/rom/ets_sys.h"
-
 #include "soc/cpu.h"
 #include "soc/dport_reg.h"
 #include "soc/gpio_periph.h"
diff --git a/components/esp32/dport_access.c b/components/esp32/dport_access.c
index fed621cd9e..c2c1294a16 100644
--- a/components/esp32/dport_access.c
+++ b/components/esp32/dport_access.c
@@ -26,7 +26,6 @@
 #include "esp_attr.h"
 #include "esp_err.h"
 #include "esp_intr_alloc.h"
-#include "esp32/rom/ets_sys.h"
 
 #include "soc/cpu.h"
 #include "soc/dport_reg.h"
diff --git a/components/esp32/sleep_modes.c b/components/esp32/sleep_modes.c
index 695e90ac3e..090c9a7b83 100644
--- a/components/esp32/sleep_modes.c
+++ b/components/esp32/sleep_modes.c
@@ -22,6 +22,7 @@
 #include "esp32/clk.h"
 #include "esp_newlib.h"
 #include "esp_spi_flash.h"
+#include "esp_rom_sys.h"
 #include "esp32/rom/cache.h"
 #include "esp32/rom/rtc.h"
 #include "esp_rom_uart.h"
@@ -132,11 +133,11 @@ void RTC_IRAM_ATTR esp_default_wake_deep_sleep(void) {
             _DPORT_REG_READ(DPORT_PRO_CACHE_CTRL1_REG) & (~DPORT_PRO_CACHE_MMU_IA_CLR));
 #if CONFIG_ESP32_DEEP_SLEEP_WAKEUP_DELAY > 0
     // ROM code has not started yet, so we need to set delay factor
-    // used by ets_delay_us first.
+    // used by esp_rom_delay_us first.
     ets_update_cpu_frequency_rom(ets_get_detected_xtal_freq() / 1000000);
     // This delay is configured in menuconfig, it can be used to give
     // the flash chip some time to become ready.
-    ets_delay_us(CONFIG_ESP32_DEEP_SLEEP_WAKEUP_DELAY);
+    esp_rom_delay_us(CONFIG_ESP32_DEEP_SLEEP_WAKEUP_DELAY);
 #endif
 }
 
@@ -280,7 +281,7 @@ static esp_err_t esp_light_sleep_inner(uint32_t pd_flags,
     // If SPI flash was powered down, wait for it to become ready
     if (pd_flags & RTC_SLEEP_PD_VDDSDIO) {
         // Wait for the flash chip to start up
-        ets_delay_us(flash_enable_time_us);
+        esp_rom_delay_us(flash_enable_time_us);
     }
     return err;
 }
diff --git a/components/esp32/test/test_backtrace.c b/components/esp32/test/test_backtrace.c
index 1520a8dde0..f5ff7eb3d6 100644
--- a/components/esp32/test/test_backtrace.c
+++ b/components/esp32/test/test_backtrace.c
@@ -9,6 +9,8 @@
 #include "freertos/task.h"
 #include "freertos/xtensa_api.h"
 #include "esp_intr_alloc.h"
+#include "esp_rom_sys.h"
+#include "esp_rom_uart.h"
 
 #define SW_ISR_LEVEL_1          7
 #define SW_ISR_LEVEL_3          29
@@ -72,12 +74,12 @@ TEST_CASE("Test backtrace from interrupt watchdog timeout", "[reset_reason][rese
 
 static void write_char_crash(char c)
 {
-    ets_write_char_uart(c);
+    esp_rom_uart_putc(c);
     *(char*) 0x00000001 = 0;
 }
 
 TEST_CASE("Test backtrace with a ROM function", "[reset_reason][reset=StoreProhibited,SW_CPU_RESET]")
 {
     ets_install_putc1(&write_char_crash);
-    ets_printf("foo");
+    esp_rom_printf("foo");
 }
diff --git a/components/esp32/test/test_delay.c b/components/esp32/test/test_delay.c
index 30d2230243..a075d12b7f 100644
--- a/components/esp32/test/test_delay.c
+++ b/components/esp32/test/test_delay.c
@@ -3,7 +3,7 @@
 #include <time.h>
 #include <sys/time.h>
 #include "unity.h"
-#include "esp32/rom/ets_sys.h"
+#include "esp_rom_sys.h"
 #include "freertos/FreeRTOS.h"
 #include "freertos/task.h"
 #include "freertos/semphr.h"
@@ -23,7 +23,7 @@ static void test_delay_task(void* p)
     uint64_t start = ref_clock_get();
     switch (arg->method) {
         case 0:
-            ets_delay_us(arg->delay_us);
+            esp_rom_delay_us(arg->delay_us);
             break;
         case 1:
             vTaskDelay(arg->delay_us / portTICK_PERIOD_MS / 1000);
diff --git a/components/esp32/test/test_fastbus.c b/components/esp32/test/test_fastbus.c
index 626e925956..a33c69b9f4 100644
--- a/components/esp32/test/test_fastbus.c
+++ b/components/esp32/test/test_fastbus.c
@@ -1,8 +1,7 @@
 
-#include <esp_types.h>
 #include <stdio.h>
-#include "esp32/rom/ets_sys.h"
 
+#include "esp_types.h"
 #include "freertos/FreeRTOS.h"
 #include "freertos/task.h"
 #include "freertos/semphr.h"
diff --git a/components/esp32/test/test_intr_alloc.c b/components/esp32/test/test_intr_alloc.c
index 07442c33fc..12531fb7f0 100644
--- a/components/esp32/test/test_intr_alloc.c
+++ b/components/esp32/test/test_intr_alloc.c
@@ -4,7 +4,7 @@
 
 #include <esp_types.h>
 #include <stdio.h>
-#include "esp32/rom/ets_sys.h"
+#include "esp_rom_sys.h"
 #include "freertos/FreeRTOS.h"
 #include "freertos/task.h"
 #include "freertos/semphr.h"
@@ -69,7 +69,6 @@ static void timer_isr(void *arg)
         timer_group_clr_intr_status_in_isr(TIMER_GROUP_1, TIMER_1);
         timer_group_enable_alarm_in_isr(TIMER_GROUP_1, TIMER_1);
     }
-//  ets_printf("int %d\n", timer_idx);
 }
 
 
@@ -237,7 +236,7 @@ typedef struct {
 void IRAM_ATTR int_handler1(void* arg)
 {
     intr_alloc_test_ctx_t* ctx=(intr_alloc_test_ctx_t*)arg;
-    ets_printf("handler 1 called.\n");
+    esp_rom_printf("handler 1 called.\n");
     if ( ctx->flag1 ) {
         ctx->flag3 = true;
     } else {
@@ -249,7 +248,7 @@ void IRAM_ATTR int_handler1(void* arg)
 void IRAM_ATTR int_handler2(void* arg)
 {
     intr_alloc_test_ctx_t* ctx = (intr_alloc_test_ctx_t*)arg;
-    ets_printf("handler 2 called.\n");
+    esp_rom_printf("handler 2 called.\n");
     if ( ctx->flag2 ) {
         ctx->flag4 = true;
     } else {
diff --git a/components/esp32/test/test_pm.c b/components/esp32/test/test_pm.c
index 1f929185cc..d1044ed387 100644
--- a/components/esp32/test/test_pm.c
+++ b/components/esp32/test/test_pm.c
@@ -14,6 +14,7 @@
 #include "driver/rtc_io.h"
 #include "esp32/ulp.h"
 #include "soc/rtc_periph.h"
+#include "esp_rom_sys.h"
 
 #define MHZ     1000000
 
@@ -271,7 +272,7 @@ TEST_CASE("esp_timer produces correct delays with light sleep", "[pm]")
         p_args->intervals[p_args->cur_interval++] = ms_diff;
         // Deliberately make timer handler run longer.
         // We check that this doesn't affect the result.
-        ets_delay_us(10*1000);
+        esp_rom_delay_us(10*1000);
         if (p_args->cur_interval == NUM_INTERVALS) {
             printf("done\n");
             TEST_ESP_OK(esp_timer_stop(p_args->timer));
diff --git a/components/esp32/test/test_sleep.c b/components/esp32/test/test_sleep.c
index 68345c4448..6fdea61bf5 100644
--- a/components/esp32/test/test_sleep.c
+++ b/components/esp32/test/test_sleep.c
@@ -18,6 +18,7 @@
 #include "esp_newlib.h"
 #include "test_utils.h"
 #include "sdkconfig.h"
+#include "esp_rom_sys.h"
 
 
 #define ESP_EXT0_WAKEUP_LEVEL_LOW 0
@@ -101,7 +102,7 @@ TEST_CASE("light sleep stress test with periodic esp_timer", "[deepsleep]")
 {
     void timer_func(void* arg)
     {
-        ets_delay_us(50);
+        esp_rom_delay_us(50);
     }
 
     SemaphoreHandle_t done = xSemaphoreCreateCounting(2, 0);
diff --git a/components/esp32/test/test_spiram_cache_flush.c b/components/esp32/test/test_spiram_cache_flush.c
index e525d21770..8a4949bd2d 100644
--- a/components/esp32/test/test_spiram_cache_flush.c
+++ b/components/esp32/test/test_spiram_cache_flush.c
@@ -4,7 +4,6 @@ This code tests the interaction between PSRAM and SPI flash routines.
 
 #include <esp_types.h>
 #include <stdio.h>
-#include "esp32/rom/ets_sys.h"
 #include "freertos/FreeRTOS.h"
 #include "freertos/task.h"
 #include "freertos/semphr.h"
@@ -15,7 +14,6 @@ This code tests the interaction between PSRAM and SPI flash routines.
 #include <stdlib.h>
 #include <stdio.h>
 #include <string.h>
-#include "esp32/rom/ets_sys.h"
 #include "esp_heap_caps.h"
 #include "esp_spi_flash.h"
 #include "esp_partition.h"
diff --git a/components/esp32/test/test_tsens.c b/components/esp32/test/test_tsens.c
index 1e311c6bc1..4effdb5511 100644
--- a/components/esp32/test/test_tsens.c
+++ b/components/esp32/test/test_tsens.c
@@ -1,6 +1,6 @@
 #include <stdio.h>
 #include "unity.h"
-#include "esp32/rom/ets_sys.h"
+#include "esp_rom_sys.h"
 #include "soc/rtc_periph.h"
 #include "soc/sens_periph.h"
 
@@ -12,9 +12,9 @@ TEST_CASE("can control TSENS using registers", "[rtc][ignore]")
     CLEAR_PERI_REG_MASK(SENS_SAR_TSENS_CTRL_REG, SENS_TSENS_DUMP_OUT);
     SET_PERI_REG_MASK(SENS_SAR_TSENS_CTRL_REG, SENS_TSENS_POWER_UP_FORCE);
     SET_PERI_REG_MASK(SENS_SAR_TSENS_CTRL_REG, SENS_TSENS_POWER_UP);
-    ets_delay_us(100);
+    esp_rom_delay_us(100);
     SET_PERI_REG_MASK(SENS_SAR_TSENS_CTRL_REG, SENS_TSENS_DUMP_OUT);
-    ets_delay_us(5);
+    esp_rom_delay_us(5);
     int res = GET_PERI_REG_BITS2(SENS_SAR_SLAVE_ADDR3_REG, SENS_TSENS_OUT, SENS_TSENS_OUT_S);
     printf("res=%d\n", res);
 }
diff --git a/components/esp32s2/cache_err_int.c b/components/esp32s2/cache_err_int.c
index 1db8f2b080..b7a240a19b 100644
--- a/components/esp32s2/cache_err_int.c
+++ b/components/esp32s2/cache_err_int.c
@@ -35,7 +35,7 @@
 #include "hal/cpu_hal.h"
 
 #include "esp32s2/dport_access.h"
-#include "esp32s2/rom/ets_sys.h"
+#include "esp32s2/rom/ets_sys.h"  // for intr_matrix_set
 
 #include "sdkconfig.h"
 
diff --git a/components/esp32s2/clk.c b/components/esp32s2/clk.c
index 12a26d43fa..59a61ed585 100644
--- a/components/esp32s2/clk.c
+++ b/components/esp32s2/clk.c
@@ -41,6 +41,6 @@ int IRAM_ATTR esp_clk_xtal_freq(void)
 
 void IRAM_ATTR ets_update_cpu_frequency(uint32_t ticks_per_us)
 {
-    /* Update scale factors used by ets_delay_us */
+    /* Update scale factors used by esp_rom_delay_us */
     g_ticks_per_us_pro = ticks_per_us;
 }
diff --git a/components/esp32s2/crosscore_int.c b/components/esp32s2/crosscore_int.c
index 67e483a161..7695ec062f 100644
--- a/components/esp32s2/crosscore_int.c
+++ b/components/esp32s2/crosscore_int.c
@@ -19,8 +19,6 @@
 #include "esp_intr_alloc.h"
 #include "esp_debug_helpers.h"
 
-#include "esp32s2/rom/ets_sys.h"
-
 #include "soc/cpu.h"
 #include "soc/dport_reg.h"
 #include "soc/io_mux_reg.h"
diff --git a/components/esp32s2/esp_hmac.c b/components/esp32s2/esp_hmac.c
index 321e9193bc..ab5604dbe5 100644
--- a/components/esp32s2/esp_hmac.c
+++ b/components/esp32s2/esp_hmac.c
@@ -13,7 +13,6 @@
 // limitations under the License.
 
 #include "esp32s2/rom/hmac.h"
-#include "esp32s2/rom/ets_sys.h"
 #include "esp_hmac.h"
 #include "esp_crypto_lock.h"
 
@@ -38,7 +37,7 @@ esp_err_t esp_hmac_calculate(hmac_key_id_t key_id,
 
     esp_crypto_dma_lock_release();
 
-    if (hmac_ret != ETS_OK) {
+    if (hmac_ret != 0) {
         return ESP_FAIL;
     } else {
         return ESP_OK;
diff --git a/components/esp32s2/sleep_modes.c b/components/esp32s2/sleep_modes.c
index 925ad8867f..a30c0a5ae1 100644
--- a/components/esp32s2/sleep_modes.c
+++ b/components/esp32s2/sleep_modes.c
@@ -24,8 +24,8 @@
 #include "esp_spi_flash.h"
 #include "esp32s2/rom/cache.h"
 #include "esp32s2/rom/rtc.h"
-#include "esp32s2/rom/ets_sys.h"
 #include "esp_rom_uart.h"
+#include "esp_rom_sys.h"
 #include "soc/cpu.h"
 #include "soc/rtc.h"
 #include "soc/spi_periph.h"
@@ -286,7 +286,7 @@ static esp_err_t esp_light_sleep_inner(uint32_t pd_flags,
     // If SPI flash was powered down, wait for it to become ready
     if (pd_flags & RTC_SLEEP_PD_VDDSDIO) {
         // Wait for the flash chip to start up
-        ets_delay_us(flash_enable_time_us);
+        esp_rom_delay_us(flash_enable_time_us);
     }
     return err;
 }
diff --git a/components/esp32s2/spiram_psram.c b/components/esp32s2/spiram_psram.c
index 59baf217be..959f5335d3 100644
--- a/components/esp32s2/spiram_psram.c
+++ b/components/esp32s2/spiram_psram.c
@@ -24,7 +24,6 @@
 #include "esp_types.h"
 #include "esp_log.h"
 #include "spiram_psram.h"
-#include "esp32s2/rom/ets_sys.h"
 #include "esp32s2/rom/spi_flash.h"
 #include "esp32s2/rom/opi_flash.h"
 #include "esp32s2/rom/cache.h"
diff --git a/components/esp32s2/test/test_delay.c b/components/esp32s2/test/test_delay.c
index d04642c83b..c08a75092b 100644
--- a/components/esp32s2/test/test_delay.c
+++ b/components/esp32s2/test/test_delay.c
@@ -2,7 +2,7 @@
 #include <stdlib.h>
 #include <time.h>
 #include <sys/time.h>
-#include "esp32s2/rom/ets_sys.h"
+#include "esp_rom_sys.h"
 #include "freertos/FreeRTOS.h"
 #include "freertos/task.h"
 #include "freertos/semphr.h"
@@ -23,7 +23,7 @@ static void test_delay_task(void *p)
     uint64_t start = ref_clock_get();
     switch (arg->method) {
     case 0:
-        ets_delay_us(arg->delay_us);
+        esp_rom_delay_us(arg->delay_us);
         break;
     case 1:
         vTaskDelay(arg->delay_us / portTICK_PERIOD_MS / 1000);
diff --git a/components/esp32s2/test/test_intr_alloc.c b/components/esp32s2/test/test_intr_alloc.c
index b136a4720e..e80fb4762e 100644
--- a/components/esp32s2/test/test_intr_alloc.c
+++ b/components/esp32s2/test/test_intr_alloc.c
@@ -5,7 +5,7 @@
 #include <stdio.h>
 #include "unity.h"
 #include "esp_types.h"
-#include "esp32s2/rom/ets_sys.h"
+#include "esp_rom_sys.h"
 #include "freertos/FreeRTOS.h"
 #include "freertos/task.h"
 #include "freertos/semphr.h"
@@ -234,7 +234,7 @@ typedef struct {
 void IRAM_ATTR int_handler1(void *arg)
 {
     intr_alloc_test_ctx_t *ctx = (intr_alloc_test_ctx_t *)arg;
-    ets_printf("handler 1 called.\n");
+    esp_rom_printf("handler 1 called.\n");
     if (ctx->flag1) {
         ctx->flag3 = true;
     } else {
@@ -246,7 +246,7 @@ void IRAM_ATTR int_handler1(void *arg)
 void IRAM_ATTR int_handler2(void *arg)
 {
     intr_alloc_test_ctx_t *ctx = (intr_alloc_test_ctx_t *)arg;
-    ets_printf("handler 2 called.\n");
+    esp_rom_printf("handler 2 called.\n");
     if (ctx->flag2) {
         ctx->flag4 = true;
     } else {
diff --git a/components/esp_common/Kconfig b/components/esp_common/Kconfig
index 66d4c5bd4e..5a25f5fff7 100644
--- a/components/esp_common/Kconfig
+++ b/components/esp_common/Kconfig
@@ -105,7 +105,7 @@ menu "Common ESP-related"
             is reconfigured after the bootloader exits and the app starts.
 
             Due to an ESP32 ROM bug, UART2 is not supported for console output
-            via ets_printf.
+            via esp_rom_printf.
 
         config ESP_CONSOLE_UART_CUSTOM_NUM_0
             bool "UART0"
@@ -179,11 +179,11 @@ menu "Common ESP-related"
             is often receiving data over USB CDC.
 
     config ESP_CONSOLE_USB_CDC_SUPPORT_ETS_PRINTF
-        bool "Enable ets_printf / ESP_EARLY_LOG via USB CDC"
+        bool "Enable esp_rom_printf / ESP_EARLY_LOG via USB CDC"
         depends on ESP_CONSOLE_USB_CDC
         default n
         help
-            If enabled, ets_printf and ESP_EARLY_LOG output will also be sent over USB CDC.
+            If enabled, esp_rom_printf and ESP_EARLY_LOG output will also be sent over USB CDC.
             Disabling this option saves about 1kB or RAM.
 
     config ESP_INT_WDT
diff --git a/components/esp_common/include/esp_fault.h b/components/esp_common/include/esp_fault.h
index 0eb7ebb63a..4ccb259c57 100644
--- a/components/esp_common/include/esp_fault.h
+++ b/components/esp_common/include/esp_fault.h
@@ -13,6 +13,7 @@
 // limitations under the License.
 #include "sdkconfig.h"
 #include "soc/rtc_cntl_reg.h"
+#include "esp_rom_sys.h"
 
 #pragma once
 
@@ -81,9 +82,9 @@ extern "C" {
 
 #warning "Enabling ESP_FAULT_ASSERT_DEBUG makes ESP_FAULT_ASSERT() less effective"
 
-#define _ESP_FAULT_RESET()  do {                                    \
-        ets_printf("ESP_FAULT_ASSERT %s:%d\n", __FILE__, __LINE__); \
-        asm volatile("ill;");                                       \
+#define _ESP_FAULT_RESET()  do {                                        \
+        esp_rom_printf("ESP_FAULT_ASSERT %s:%d\n", __FILE__, __LINE__); \
+        asm volatile("ill;");                                           \
     } while(0)
 
 #endif // ESP_FAULT_ASSERT_DEBUG
diff --git a/components/esp_common/src/brownout.c b/components/esp_common/src/brownout.c
index 5408d10e57..4b004d16b8 100644
--- a/components/esp_common/src/brownout.c
+++ b/components/esp_common/src/brownout.c
@@ -25,6 +25,7 @@
 #include "esp_private/system_internal.h"
 #include "driver/rtc_cntl.h"
 #include "freertos/FreeRTOS.h"
+#include "esp_rom_sys.h"
 
 #if defined(CONFIG_ESP32_BROWNOUT_DET_LVL)
 #define BROWNOUT_DET_LVL CONFIG_ESP32_BROWNOUT_DET_LVL
@@ -49,11 +50,11 @@ static void rtc_brownout_isr_handler(void *arg)
      */
     brownout_hal_intr_clear();
     /* Stall the other CPU to make sure the code running there doesn't use UART
-     * at the same time as the following ets_printf.
+     * at the same time as the following esp_rom_printf.
      */
     esp_cpu_stall(!xPortGetCoreID());
     esp_reset_reason_set_hint(ESP_RST_BROWNOUT);
-    ets_printf("\r\nBrownout detector was triggered\r\n\r\n");
+    esp_rom_printf("\r\nBrownout detector was triggered\r\n\r\n");
     esp_restart_noos();
 }
 
diff --git a/components/esp_common/src/esp_err.c b/components/esp_common/src/esp_err.c
index 3286b0058e..ad23651574 100644
--- a/components/esp_common/src/esp_err.c
+++ b/components/esp_common/src/esp_err.c
@@ -17,21 +17,17 @@
 #include "esp_err.h"
 #include "esp_spi_flash.h"
 
-#if CONFIG_IDF_TARGET_ESP32
-#include "esp32/rom/ets_sys.h"
-#elif CONFIG_IDF_TARGET_ESP32S2
-#include "esp32s2/rom/ets_sys.h"
-#endif
+#include "esp_rom_sys.h"
 
 static void esp_error_check_failed_print(const char *msg, esp_err_t rc, const char *file, int line, const char *function, const char *expression)
 {
-    ets_printf("%s failed: esp_err_t 0x%x", msg, rc);
+    esp_rom_printf("%s failed: esp_err_t 0x%x", msg, rc);
 #ifdef CONFIG_ESP_ERR_TO_NAME_LOOKUP
-    ets_printf(" (%s)", esp_err_to_name(rc));
+    esp_rom_printf(" (%s)", esp_err_to_name(rc));
 #endif //CONFIG_ESP_ERR_TO_NAME_LOOKUP
-    ets_printf(" at 0x%08x\n", (intptr_t)__builtin_return_address(0) - 3);
+    esp_rom_printf(" at 0x%08x\n", (intptr_t)__builtin_return_address(0) - 3);
     if (spi_flash_cache_enabled()) { // strings may be in flash cache
-        ets_printf("file: \"%s\" line %d\nfunc: %s\nexpression: %s\n", file, line, function, expression);
+        esp_rom_printf("file: \"%s\" line %d\nfunc: %s\nexpression: %s\n", file, line, function, expression);
     }
 }
 
diff --git a/components/esp_common/src/stack_check.c b/components/esp_common/src/stack_check.c
index d22102a471..cffff6555a 100644
--- a/components/esp_common/src/stack_check.c
+++ b/components/esp_common/src/stack_check.c
@@ -14,6 +14,7 @@
 
 #include "sdkconfig.h"
 #include "esp_system.h"
+#include "esp_rom_sys.h"
 
 #if CONFIG_COMPILER_STACK_CHECK
 
@@ -32,7 +33,7 @@ __esp_stack_guard_setup (void)
 
 void __stack_chk_fail (void)
 {
-    ets_printf("\r\nStack smashing protect failure!\r\n\r\n");
+    esp_rom_printf("\r\nStack smashing protect failure!\r\n\r\n");
     abort();
 }
 
diff --git a/components/esp_eth/src/esp_eth_mac_dm9051.c b/components/esp_eth/src/esp_eth_mac_dm9051.c
index c9695d276b..2b374d9506 100644
--- a/components/esp_eth/src/esp_eth_mac_dm9051.c
+++ b/components/esp_eth/src/esp_eth_mac_dm9051.c
@@ -29,6 +29,7 @@
 #include "dm9051.h"
 #include "sdkconfig.h"
 #include "esp_rom_gpio.h"
+#include "esp_rom_sys.h"
 
 static const char *TAG = "emac_dm9051";
 #define MAC_CHECK(a, str, goto_tag, ret_value, ...)                               \
@@ -450,7 +451,7 @@ static esp_err_t emac_dm9051_write_phy_reg(esp_eth_mac_t *mac, uint32_t phy_addr
     /* polling the busy flag */
     uint32_t to = 0;
     do {
-        ets_delay_us(100);
+        esp_rom_delay_us(100);
         MAC_CHECK(dm9051_register_read(emac, DM9051_EPCR, &epcr) == ESP_OK, "read EPCR failed", err, ESP_FAIL);
         to += 100;
     } while ((epcr & EPCR_ERRE) && to < DM9051_PHY_OPERATION_TIMEOUT_US);
@@ -476,7 +477,7 @@ static esp_err_t emac_dm9051_read_phy_reg(esp_eth_mac_t *mac, uint32_t phy_addr,
     /* polling the busy flag */
     uint32_t to = 0;
     do {
-        ets_delay_us(100);
+        esp_rom_delay_us(100);
         MAC_CHECK(dm9051_register_read(emac, DM9051_EPCR, &epcr) == ESP_OK, "read EPCR failed", err, ESP_FAIL);
         to += 100;
     } while ((epcr & EPCR_ERRE) && to < DM9051_PHY_OPERATION_TIMEOUT_US);
@@ -641,7 +642,7 @@ static esp_err_t emac_dm9051_receive(esp_eth_mac_t *mac, uint8_t *buf, uint32_t
         /* reset rx fifo pointer */
         MAC_CHECK(dm9051_register_write(emac, DM9051_MPTRCR, MPTRCR_RST_RX) == ESP_OK,
                   "write MPTRCR failed", err, ESP_FAIL);
-        ets_delay_us(10);
+        esp_rom_delay_us(10);
         MAC_CHECK(mac->start(mac) == ESP_OK, "start dm9051 failed", err, ESP_FAIL);
         MAC_CHECK(false, "reset rx fifo pointer", err, ESP_FAIL);
     } else if (rxbyte) {
diff --git a/components/esp_eth/src/esp_eth_mac_esp32.c b/components/esp_eth/src/esp_eth_mac_esp32.c
index b32ea27ed7..9c978c787f 100644
--- a/components/esp_eth/src/esp_eth_mac_esp32.c
+++ b/components/esp_eth/src/esp_eth_mac_esp32.c
@@ -31,6 +31,7 @@
 #include "soc/soc.h"
 #include "sdkconfig.h"
 #include "esp_rom_gpio.h"
+#include "esp_rom_sys.h"
 
 static const char *TAG = "emac_esp32";
 #define MAC_CHECK(a, str, goto_tag, ret_value, ...)                               \
@@ -87,7 +88,7 @@ static esp_err_t emac_esp32_write_phy_reg(esp_eth_mac_t *mac, uint32_t phy_addr,
     uint32_t to = 0;
     bool busy = true;
     do {
-        ets_delay_us(100);
+        esp_rom_delay_us(100);
         busy = emac_hal_is_mii_busy(&emac->hal);
         to += 100;
     } while (busy && to < PHY_OPERATION_TIMEOUT_US);
@@ -108,7 +109,7 @@ static esp_err_t emac_esp32_read_phy_reg(esp_eth_mac_t *mac, uint32_t phy_addr,
     uint32_t to = 0;
     bool busy = true;
     do {
-        ets_delay_us(100);
+        esp_rom_delay_us(100);
         busy = emac_hal_is_mii_busy(&emac->hal);
         to += 100;
     } while (busy && to < PHY_OPERATION_TIMEOUT_US);
diff --git a/components/esp_eth/src/esp_eth_phy_dm9051.c b/components/esp_eth/src/esp_eth_phy_dm9051.c
index a19c1e69b3..3bd96e4b0b 100644
--- a/components/esp_eth/src/esp_eth_phy_dm9051.c
+++ b/components/esp_eth/src/esp_eth_phy_dm9051.c
@@ -21,6 +21,7 @@
 #include "freertos/task.h"
 #include "driver/gpio.h"
 #include "esp_rom_gpio.h"
+#include "esp_rom_sys.h"
 
 static const char *TAG = "dm9051";
 #define PHY_CHECK(a, str, goto_tag, ...)                                          \
@@ -193,7 +194,7 @@ static esp_err_t dm9051_reset_hw(esp_eth_phy_t *phy)
         esp_rom_gpio_pad_select_gpio(dm9051->reset_gpio_num);
         gpio_set_direction(dm9051->reset_gpio_num, GPIO_MODE_OUTPUT);
         gpio_set_level(dm9051->reset_gpio_num, 0);
-        ets_delay_us(100); // insert min input assert time
+        esp_rom_delay_us(100); // insert min input assert time
         gpio_set_level(dm9051->reset_gpio_num, 1);
     }
     return ESP_OK;
diff --git a/components/esp_eth/src/esp_eth_phy_dp83848.c b/components/esp_eth/src/esp_eth_phy_dp83848.c
index c83e50306a..12099bc394 100644
--- a/components/esp_eth/src/esp_eth_phy_dp83848.c
+++ b/components/esp_eth/src/esp_eth_phy_dp83848.c
@@ -21,6 +21,7 @@
 #include "freertos/task.h"
 #include "driver/gpio.h"
 #include "esp_rom_gpio.h"
+#include "esp_rom_sys.h"
 
 static const char *TAG = "dp83848";
 #define PHY_CHECK(a, str, goto_tag, ...)                                          \
@@ -182,7 +183,7 @@ static esp_err_t dp83848_reset_hw(esp_eth_phy_t *phy)
         esp_rom_gpio_pad_select_gpio(dp83848->reset_gpio_num);
         gpio_set_direction(dp83848->reset_gpio_num, GPIO_MODE_OUTPUT);
         gpio_set_level(dp83848->reset_gpio_num, 0);
-        ets_delay_us(100); // insert min input assert time
+        esp_rom_delay_us(100); // insert min input assert time
         gpio_set_level(dp83848->reset_gpio_num, 1);
     }
     return ESP_OK;
diff --git a/components/esp_eth/src/esp_eth_phy_ip101.c b/components/esp_eth/src/esp_eth_phy_ip101.c
index 0ab53b893b..d081f3bd11 100644
--- a/components/esp_eth/src/esp_eth_phy_ip101.c
+++ b/components/esp_eth/src/esp_eth_phy_ip101.c
@@ -21,6 +21,7 @@
 #include "freertos/task.h"
 #include "driver/gpio.h"
 #include "esp_rom_gpio.h"
+#include "esp_rom_sys.h"
 
 static const char *TAG = "ip101";
 #define PHY_CHECK(a, str, goto_tag, ...)                                          \
@@ -222,7 +223,7 @@ static esp_err_t ip101_reset_hw(esp_eth_phy_t *phy)
         esp_rom_gpio_pad_select_gpio(ip101->reset_gpio_num);
         gpio_set_direction(ip101->reset_gpio_num, GPIO_MODE_OUTPUT);
         gpio_set_level(ip101->reset_gpio_num, 0);
-        ets_delay_us(100); // insert min input assert time
+        esp_rom_delay_us(100); // insert min input assert time
         gpio_set_level(ip101->reset_gpio_num, 1);
     }
     return ESP_OK;
diff --git a/components/esp_eth/src/esp_eth_phy_ksz8041.c b/components/esp_eth/src/esp_eth_phy_ksz8041.c
index b9a43f09c3..9604985ad6 100644
--- a/components/esp_eth/src/esp_eth_phy_ksz8041.c
+++ b/components/esp_eth/src/esp_eth_phy_ksz8041.c
@@ -21,6 +21,7 @@
 #include "freertos/task.h"
 #include "driver/gpio.h"
 #include "esp_rom_gpio.h"
+#include "esp_rom_sys.h"
 
 static const char *TAG = "ksz8041";
 #define PHY_CHECK(a, str, goto_tag, ...)                                          \
@@ -170,7 +171,7 @@ static esp_err_t ksz8041_reset_hw(esp_eth_phy_t *phy)
         esp_rom_gpio_pad_select_gpio(ksz8041->reset_gpio_num);
         gpio_set_direction(ksz8041->reset_gpio_num, GPIO_MODE_OUTPUT);
         gpio_set_level(ksz8041->reset_gpio_num, 0);
-        ets_delay_us(100); // insert min input assert time
+        esp_rom_delay_us(100); // insert min input assert time
         gpio_set_level(ksz8041->reset_gpio_num, 1);
     }
     return ESP_OK;
diff --git a/components/esp_eth/src/esp_eth_phy_lan8720.c b/components/esp_eth/src/esp_eth_phy_lan8720.c
index 3b4b9d50d5..690c115aa5 100644
--- a/components/esp_eth/src/esp_eth_phy_lan8720.c
+++ b/components/esp_eth/src/esp_eth_phy_lan8720.c
@@ -21,6 +21,7 @@
 #include "freertos/task.h"
 #include "driver/gpio.h"
 #include "esp_rom_gpio.h"
+#include "esp_rom_sys.h"
 
 static const char *TAG = "lan8720";
 #define PHY_CHECK(a, str, goto_tag, ...)                                          \
@@ -267,7 +268,7 @@ static esp_err_t lan8720_reset_hw(esp_eth_phy_t *phy)
         esp_rom_gpio_pad_select_gpio(lan8720->reset_gpio_num);
         gpio_set_direction(lan8720->reset_gpio_num, GPIO_MODE_OUTPUT);
         gpio_set_level(lan8720->reset_gpio_num, 0);
-        ets_delay_us(100); // insert min input assert time
+        esp_rom_delay_us(100); // insert min input assert time
         gpio_set_level(lan8720->reset_gpio_num, 1);
     }
     return ESP_OK;
diff --git a/components/esp_eth/src/esp_eth_phy_rtl8201.c b/components/esp_eth/src/esp_eth_phy_rtl8201.c
index dd9239d67f..003be9c8bb 100644
--- a/components/esp_eth/src/esp_eth_phy_rtl8201.c
+++ b/components/esp_eth/src/esp_eth_phy_rtl8201.c
@@ -22,6 +22,7 @@
 #include "freertos/task.h"
 #include "driver/gpio.h"
 #include "esp_rom_gpio.h"
+#include "esp_rom_sys.h"
 
 static const char *TAG = "rtl8201";
 #define PHY_CHECK(a, str, goto_tag, ...)                                          \
@@ -176,7 +177,7 @@ static esp_err_t rtl8201_reset_hw(esp_eth_phy_t *phy)
         esp_rom_gpio_pad_select_gpio(rtl8201->reset_gpio_num);
         gpio_set_direction(rtl8201->reset_gpio_num, GPIO_MODE_OUTPUT);
         gpio_set_level(rtl8201->reset_gpio_num, 0);
-        ets_delay_us(100); // insert min input assert time
+        esp_rom_delay_us(100); // insert min input assert time
         gpio_set_level(rtl8201->reset_gpio_num, 1);
     }
     return ESP_OK;
diff --git a/components/esp_ipc/test/test_ipc.c b/components/esp_ipc/test/test_ipc.c
index c01acbaa42..9369b2524d 100644
--- a/components/esp_ipc/test/test_ipc.c
+++ b/components/esp_ipc/test/test_ipc.c
@@ -8,6 +8,7 @@
 #include "esp_ipc.h"
 #endif
 #include "esp_log.h"
+#include "esp_rom_sys.h"
 
 #if !CONFIG_FREERTOS_UNICORE
 static void test_func_ipc_cb(void *arg)
@@ -30,7 +31,7 @@ static volatile bool exit_flag;
 static void task1(void *sema)
 {
     ESP_LOGI("task1", "start");
-    ets_delay_us(3000000);
+    esp_rom_delay_us(3000000);
     vTaskDelay(1);
     while (exit_flag == false) {
 
@@ -43,10 +44,10 @@ static UBaseType_t func_ipc_priority;
 
 static void test_func_ipc(void *sema)
 {
-    ets_delay_us(1000000 + xPortGetCoreID() * 100);
+    esp_rom_delay_us(1000000 + xPortGetCoreID() * 100);
     func_ipc_priority = uxTaskPriorityGet(NULL);
     xSemaphoreGive(*(xSemaphoreHandle *)sema);
-    ets_printf("test_func_ipc: [%d, %d]\n", func_ipc_priority, xPortGetCoreID());
+    esp_rom_printf("test_func_ipc: [%d, %d]\n", func_ipc_priority, xPortGetCoreID());
 }
 
 TEST_CASE("Test ipc_task works with the priority of the caller's task", "[ipc]")
@@ -77,9 +78,9 @@ TEST_CASE("Test ipc_task works with the priority of the caller's task", "[ipc]")
 static void test_func2_ipc(void *arg)
 {
     int callers_priority = *(int *)arg;
-    ets_delay_us(1000000 + xPortGetCoreID() * 100);
+    esp_rom_delay_us(1000000 + xPortGetCoreID() * 100);
     UBaseType_t priority = uxTaskPriorityGet(NULL);
-    ets_printf("test_func2_ipc: [callers_priority = %d, priority = %d, cpu = %d]\n", callers_priority, priority, xPortGetCoreID());
+    esp_rom_printf("test_func2_ipc: [callers_priority = %d, priority = %d, cpu = %d]\n", callers_priority, priority, xPortGetCoreID());
 }
 
 static void task(void *sema)
diff --git a/components/esp_ringbuf/test/test_ringbuf.c b/components/esp_ringbuf/test/test_ringbuf.c
index 020afa2d13..c869c7d014 100644
--- a/components/esp_ringbuf/test/test_ringbuf.c
+++ b/components/esp_ringbuf/test/test_ringbuf.c
@@ -10,6 +10,7 @@
 #include "esp_spi_flash.h"
 #include "unity.h"
 #include "test_utils.h"
+#include "esp_rom_sys.h"
 
 //Definitions used in multiple test cases
 #define TIMEOUT_TICKS               10
@@ -572,7 +573,7 @@ static void rec_task(void *args)
 
 static void setup(void)
 {
-    ets_printf("Size of test data: %d\n", CONT_DATA_LEN);
+    esp_rom_printf("Size of test data: %d\n", CONT_DATA_LEN);
     tx_done = xSemaphoreCreateBinary();                 //Semaphore to indicate send is done for a particular iteration
     rx_done = xSemaphoreCreateBinary();                 //Semaphore to indicate receive is done for a particular iteration
     tasks_done = xSemaphoreCreateBinary();              //Semaphore used to to indicate send and receive tasks completed running
@@ -602,7 +603,7 @@ TEST_CASE("Test ring buffer SMP", "[esp_ringbuf]")
             //Test every permutation of core affinity
             for (int send_core = 0; send_core < portNUM_PROCESSORS; send_core++) {
                 for (int rec_core = 0; rec_core < portNUM_PROCESSORS; rec_core ++) {
-                    ets_printf("Type: %d, PM: %d, SC: %d, RC: %d\n", buf_type, prior_mod, send_core, rec_core);
+                    esp_rom_printf("Type: %d, PM: %d, SC: %d, RC: %d\n", buf_type, prior_mod, send_core, rec_core);
                     xTaskCreatePinnedToCore(send_task, "send tsk", 2048, (void *)&task_args, 10 + prior_mod, NULL, send_core);
                     xTaskCreatePinnedToCore(rec_task, "rec tsk", 2048, (void *)&task_args, 10, NULL, rec_core);
                     xSemaphoreTake(tasks_done, portMAX_DELAY);
@@ -646,7 +647,7 @@ TEST_CASE("Test static ring buffer SMP", "[esp_ringbuf]")
             //Test every permutation of core affinity
             for (int send_core = 0; send_core < portNUM_PROCESSORS; send_core++) {
                 for (int rec_core = 0; rec_core < portNUM_PROCESSORS; rec_core ++) {
-                    ets_printf("Type: %d, PM: %d, SC: %d, RC: %d\n", buf_type, prior_mod, send_core, rec_core);
+                    esp_rom_printf("Type: %d, PM: %d, SC: %d, RC: %d\n", buf_type, prior_mod, send_core, rec_core);
                     xTaskCreatePinnedToCore(send_task, "send tsk", 2048, (void *)&task_args, 10 + prior_mod, NULL, send_core);
                     xTaskCreatePinnedToCore(rec_task, "rec tsk", 2048, (void *)&task_args, 10, NULL, rec_core);
                     xSemaphoreTake(tasks_done, portMAX_DELAY);
diff --git a/components/esp_rom/CMakeLists.txt b/components/esp_rom/CMakeLists.txt
index 6d439ed3af..43c2578bb4 100644
--- a/components/esp_rom/CMakeLists.txt
+++ b/components/esp_rom/CMakeLists.txt
@@ -1,6 +1,6 @@
 idf_build_get_property(target IDF_TARGET)
 
-idf_component_register(SRCS "patches/esp_rom_crc.c" "patches/esp_rom_uart.c"
+idf_component_register(SRCS "patches/esp_rom_crc.c" "patches/esp_rom_sys.c" "patches/esp_rom_uart.c"
                        INCLUDE_DIRS include
                        PRIV_INCLUDE_DIRS "${target}"
                        PRIV_REQUIRES soc)
diff --git a/components/esp_rom/esp32/ld/esp32.rom.api.ld b/components/esp_rom/esp32/ld/esp32.rom.api.ld
index e06fd7c3a0..f3904f81d7 100644
--- a/components/esp_rom/esp32/ld/esp32.rom.api.ld
+++ b/components/esp_rom/esp32/ld/esp32.rom.api.ld
@@ -26,9 +26,13 @@ PROVIDE ( esp_rom_uart_tx_wait_idle   = uart_tx_wait_idle );
 PROVIDE ( esp_rom_uart_rx_one_char    = uart_rx_one_char );
 PROVIDE ( esp_rom_uart_rx_string      = UartRxString );
 PROVIDE ( esp_rom_uart_set_as_console = uart_tx_switch );
+PROVIDE ( esp_rom_uart_putc           = ets_write_char_uart );
 
 /* wpa_supplicant re-implements the MD5 functions: MD5Init, MD5Update, MD5Final */
 /* so here we directly assign the symbols with the ROM API address */
 PROVIDE ( esp_rom_md5_init   = 0x4005da7c );
 PROVIDE ( esp_rom_md5_update = 0x4005da9c );
 PROVIDE ( esp_rom_md5_final  = 0x4005db1c );
+
+PROVIDE ( esp_rom_printf   = ets_printf );
+PROVIDE ( esp_rom_delay_us = ets_delay_us );
diff --git a/components/esp_rom/esp32s2/ld/esp32s2.rom.api.ld b/components/esp_rom/esp32s2/ld/esp32s2.rom.api.ld
index 67d82796a0..c96a54feff 100644
--- a/components/esp_rom/esp32s2/ld/esp32s2.rom.api.ld
+++ b/components/esp_rom/esp32s2/ld/esp32s2.rom.api.ld
@@ -25,9 +25,13 @@ PROVIDE ( esp_rom_uart_rx_one_char    = uart_rx_one_char );
 PROVIDE ( esp_rom_uart_rx_string      = UartRxString );
 PROVIDE ( esp_rom_uart_set_as_console = uart_tx_switch );
 PROVIDE ( esp_rom_uart_usb_acm_init   = Uart_Init_USB );
+PROVIDE ( esp_rom_uart_putc           = ets_write_char_uart );
 
 /* wpa_supplicant re-implements the MD5 functions: MD5Init, MD5Update, MD5Final */
 /* so here we directly assign the symbols with the ROM API address */
 PROVIDE ( esp_rom_md5_init   = 0x4000526c );
 PROVIDE ( esp_rom_md5_update = 0x4000528c );
 PROVIDE ( esp_rom_md5_final  = 0x4000530c );
+
+PROVIDE ( esp_rom_printf   = ets_printf );
+PROVIDE ( esp_rom_delay_us = ets_delay_us );
diff --git a/components/esp_rom/esp32s3/ld/esp32s3.rom.api.ld b/components/esp_rom/esp32s3/ld/esp32s3.rom.api.ld
index 002d4ab277..592faa8fe9 100644
--- a/components/esp_rom/esp32s3/ld/esp32s3.rom.api.ld
+++ b/components/esp_rom/esp32s3/ld/esp32s3.rom.api.ld
@@ -28,9 +28,13 @@ PROVIDE ( esp_rom_uart_rx_one_char    = uart_rx_one_char );
 PROVIDE ( esp_rom_uart_rx_string      = UartRxString );
 PROVIDE ( esp_rom_uart_set_as_console = uart_tx_switch );
 PROVIDE ( esp_rom_uart_usb_acm_init   = Uart_Init_USB );
+PROVIDE ( esp_rom_uart_putc           = ets_write_char_uart );
 
 /* wpa_supplicant re-implements the MD5 functions: MD5Init, MD5Update, MD5Final */
 /* so here we directly assign the symbols with the ROM API address */
 PROVIDE ( esp_rom_md5_init   = 0x400376a0 );
 PROVIDE ( esp_rom_md5_update = 0x400376c0 );
 PROVIDE ( esp_rom_md5_final  = 0x40037740 );
+
+PROVIDE ( esp_rom_printf   = ets_printf );
+PROVIDE ( esp_rom_delay_us = ets_delay_us );
diff --git a/components/esp_rom/include/esp32s2/rom/cache.h b/components/esp_rom/include/esp32s2/rom/cache.h
index 76ede22baf..cc85512fbd 100644
--- a/components/esp_rom/include/esp32s2/rom/cache.h
+++ b/components/esp_rom/include/esp32s2/rom/cache.h
@@ -50,10 +50,10 @@ typedef enum {
 
 typedef enum {
     CACHE_MEMORY_INVALID = 0,
-    CACHE_MEMORY_ICACHE_LOW = BIT(0),
-    CACHE_MEMORY_ICACHE_HIGH = BIT(1),
-    CACHE_MEMORY_DCACHE_LOW = BIT(2),
-    CACHE_MEMORY_DCACHE_HIGH = BIT(3),
+    CACHE_MEMORY_ICACHE_LOW = 1<<0,
+    CACHE_MEMORY_ICACHE_HIGH = 1<<1,
+    CACHE_MEMORY_DCACHE_LOW = 1<<2,
+    CACHE_MEMORY_DCACHE_HIGH = 1<<3,
 } cache_layout_t;
 
 #define CACHE_SIZE_8KB  CACHE_SIZE_HALF
diff --git a/components/esp_rom/include/esp_rom_gpio.h b/components/esp_rom/include/esp_rom_gpio.h
index 11761847da..fc5f0d22ae 100644
--- a/components/esp_rom/include/esp_rom_gpio.h
+++ b/components/esp_rom/include/esp_rom_gpio.h
@@ -20,7 +20,6 @@ extern "C" {
 
 #include <stdint.h>
 #include <stdbool.h>
-#include "sdkconfig.h"
 
 /**
  * @brief Configure IO Pad as General Purpose IO,
diff --git a/components/esp_rom/include/esp_rom_sys.h b/components/esp_rom/include/esp_rom_sys.h
new file mode 100644
index 0000000000..a4df91b931
--- /dev/null
+++ b/components/esp_rom/include/esp_rom_sys.h
@@ -0,0 +1,51 @@
+// Copyright 2010-2020 Espressif Systems (Shanghai) PTE LTD
+//
+// Licensed under the Apache License, Version 2.0 (the "License");
+// you may not use this file except in compliance with the License.
+// You may obtain a copy of the License at
+//
+//     http://www.apache.org/licenses/LICENSE-2.0
+//
+// Unless required by applicable law or agreed to in writing, software
+// distributed under the License is distributed on an "AS IS" BASIS,
+// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+// See the License for the specific language governing permissions and
+// limitations under the License.
+
+#pragma once
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+#include <stdint.h>
+
+/**
+ * @brief Print formated string to console device
+ * @note float and long long data are not supported!
+ *
+ * @param fmt Format string
+ * @param ... Additional arguments, depending on the format string
+ * @return int: Total number of characters written on success; A negative number on failure.
+ */
+int esp_rom_printf(const char *fmt, ...);
+
+/**
+ * @brief Pauses execution for us microseconds
+ *
+ * @param us Number of microseconds to pause
+ */
+void esp_rom_delay_us(uint32_t us);
+
+/**
+ * @brief esp_rom_printf can print message to different channels simultaneously.
+ *        This function can help install the low level putc function for esp_rom_printf.
+ * 
+ * @param channel Channel number (startting from 1)
+ * @param putc Function pointer to the putc implementation. Set NULL can disconnect esp_rom_printf with putc.
+ */
+void esp_rom_install_channel_putc(int channel, void (*putc)(char c));
+
+#ifdef __cplusplus
+}
+#endif
diff --git a/components/esp_rom/include/esp_rom_uart.h b/components/esp_rom/include/esp_rom_uart.h
index 6fc21d14dc..a944fc6b1f 100644
--- a/components/esp_rom/include/esp_rom_uart.h
+++ b/components/esp_rom/include/esp_rom_uart.h
@@ -61,6 +61,14 @@ void esp_rom_uart_flush_tx(uint8_t uart_no);
  */
 int esp_rom_uart_tx_one_char(uint8_t c);
 
+/**
+ * @brief Transmit one character to the console channel.
+ * @note This function is a wrapper over esp_rom_uart_tx_one_char, it can help handle line ending issue by replacing '\n' with '\r\n'.
+ * 
+ * @param c Character to send
+ */
+void esp_rom_uart_putc(char c);
+
 /**
  * @brief Get one character from the console channel.
  *
diff --git a/components/esp_rom/patches/esp_rom_sys.c b/components/esp_rom/patches/esp_rom_sys.c
new file mode 100644
index 0000000000..b0c47057b7
--- /dev/null
+++ b/components/esp_rom/patches/esp_rom_sys.c
@@ -0,0 +1,32 @@
+// Copyright 2010-2020 Espressif Systems (Shanghai) PTE LTD
+//
+// Licensed under the Apache License, Version 2.0 (the "License");
+// you may not use this file except in compliance with the License.
+// You may obtain a copy of the License at
+//
+//     http://www.apache.org/licenses/LICENSE-2.0
+//
+// Unless required by applicable law or agreed to in writing, software
+// distributed under the License is distributed on an "AS IS" BASIS,
+// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+// See the License for the specific language governing permissions and
+// limitations under the License.
+
+#include <stdint.h>
+#include "esp_attr.h"
+
+IRAM_ATTR void esp_rom_install_channel_putc(int channel, void (*putc)(char c))
+{
+    extern void ets_install_putc1(void (*p)(char c));
+    extern void ets_install_putc2(void (*p)(char c));
+    switch (channel) {
+    case 1:
+        ets_install_putc1(putc);
+        break;
+    case 2:
+        ets_install_putc2(putc);
+        break;
+    default:
+        break;
+    }
+}
diff --git a/components/esp_system/port/cpu_start.c b/components/esp_system/port/cpu_start.c
index ddae175b9d..4d694bf923 100644
--- a/components/esp_system/port/cpu_start.c
+++ b/components/esp_system/port/cpu_start.c
@@ -26,6 +26,7 @@
 
 #include "esp_clk_internal.h"
 #include "esp_rom_efuse.h"
+#include "esp_rom_sys.h"
 #include "sdkconfig.h"
 
 #if CONFIG_IDF_TARGET_ESP32
@@ -33,12 +34,10 @@
 #include "esp32/rom/cache.h"
 #include "esp32/rom/rtc.h"
 #include "esp32/spiram.h"
-#include "esp32/rom/ets_sys.h"
 #elif CONFIG_IDF_TARGET_ESP32S2
 #include "esp32s2/brownout.h"
 #include "esp32s2/cache_err_int.h"
 #include "esp32s2/rom/cache.h"
-#include "esp32s2/rom/ets_sys.h"
 #include "esp32s2/rom/rtc.h"
 #include "esp32s2/spiram.h"
 #include "soc/periph_defs.h"
@@ -139,7 +138,7 @@ void IRAM_ATTR call_start_cpu1(void)
     s_cpu_inited[1] = true;
 
     while (!s_resume_cores) {
-        ets_delay_us(100);
+        esp_rom_delay_us(100);
     }
 
     SYS_STARTUP_FN();
@@ -175,7 +174,7 @@ static void start_other_core(void)
             for (int i = 0; i < SOC_CPU_CORES_NUM; i++) {
                 cpus_up &= s_cpu_up[i];
             }
-            ets_delay_us(100);
+            esp_rom_delay_us(100);
         }
     }
 }
@@ -408,7 +407,7 @@ void IRAM_ATTR call_start_cpu0(void)
         for (int i = 0; i < SOC_CPU_CORES_NUM; i++) {
             cpus_inited &= s_cpu_inited[i];
         }
-        ets_delay_us(100);
+        esp_rom_delay_us(100);
     }
 #endif
 
diff --git a/components/esp_system/port/esp32s2/clk.c b/components/esp_system/port/esp32s2/clk.c
index 2114dc710a..852d143292 100644
--- a/components/esp_system/port/esp32s2/clk.c
+++ b/components/esp_system/port/esp32s2/clk.c
@@ -22,7 +22,6 @@
 #include "esp_log.h"
 #include "esp32s2/clk.h"
 #include "esp_clk_internal.h"
-#include "esp32s2/rom/ets_sys.h"
 #include "esp32s2/rom/rtc.h"
 #include "esp_rom_uart.h"
 #include "soc/system_reg.h"
diff --git a/components/esp_system/port/esp32s2/usb_console.c b/components/esp_system/port/esp32s2/usb_console.c
index 2ce17fc6f9..d840e1f0af 100644
--- a/components/esp_system/port/esp32s2/usb_console.c
+++ b/components/esp_system/port/esp32s2/usb_console.c
@@ -30,6 +30,7 @@
 #include "soc/spinlock.h"
 #include "hal/soc_hal.h"
 #include "esp_rom_uart.h"
+#include "esp_rom_sys.h"
 #include "esp32s2/rom/usb/usb_dc.h"
 #include "esp32s2/rom/usb/cdc_acm.h"
 #include "esp32s2/rom/usb/usb_dfu.h"
@@ -69,7 +70,7 @@ void esp_usb_console_write_char(char c);
 #endif // CONFIG_ESP_CONSOLE_USB_CDC_SUPPORT_ETS_PRINTF
 
 
-/* Optional write lock routines; used only if ets_printf output via CDC is enabled */
+/* Optional write lock routines; used only if esp_rom_printf output via CDC is enabled */
 static inline void write_lock_acquire(void);
 static inline void write_lock_release(void);
 
@@ -103,7 +104,7 @@ int esp_usb_console_osglue_wait_proc(int delay_us)
 {
     if (xTaskGetSchedulerState() != taskSCHEDULER_RUNNING ||
             !xPortCanYield()) {
-        ets_delay_us(delay_us);
+        esp_rom_delay_us(delay_us);
         return delay_us;
     }
     if (delay_us == 0) {
@@ -257,7 +258,7 @@ esp_err_t esp_usb_console_init(void)
     esp_intr_enable(s_usb_int_handle);
 
 #ifdef CONFIG_ESP_CONSOLE_USB_CDC_SUPPORT_ETS_PRINTF
-    /* Install ets_printf handler */
+    /* Install esp_rom_printf handler */
     ets_install_putc1(&esp_usb_console_write_char);
 #endif // CONFIG_ESP_CONSOLE_USB_CDC_SUPPORT_ETS_PRINTF
 
@@ -387,8 +388,8 @@ bool esp_usb_console_write_available(void)
 
 
 #ifdef CONFIG_ESP_CONSOLE_USB_CDC_SUPPORT_ETS_PRINTF
-/* Used as an output function by ets_printf.
- * The LF->CRLF replacement logic replicates the one in ets_write_char_uart.
+/* Used as an output function by esp_rom_printf.
+ * The LF->CRLF replacement logic replicates the one in esp_rom_uart_putc.
  * Not static to allow placement into IRAM by ldgen.
  */
 void esp_usb_console_write_char(char c)
diff --git a/components/esp_system/port/panic_handler.c b/components/esp_system/port/panic_handler.c
index 460c00885f..2dc0d17b95 100644
--- a/components/esp_system/port/panic_handler.c
+++ b/components/esp_system/port/panic_handler.c
@@ -35,6 +35,7 @@
 
 
 #include "sdkconfig.h"
+#include "esp_rom_sys.h"
 #if CONFIG_IDF_TARGET_ESP32
 #include "esp32/cache_err_int.h"
 #include "esp32/dport_access.h"
@@ -494,7 +495,7 @@ static void panic_handler(XtExcFrame *frame, bool pseudo_excause)
         }
     }
 
-    ets_delay_us(1);
+    esp_rom_delay_us(1);
     SOC_HAL_STALL_OTHER_CORES();
 #endif
 
diff --git a/components/esp_system/startup.c b/components/esp_system/startup.c
index fc4dde4ad8..2fbe46804a 100644
--- a/components/esp_system/startup.c
+++ b/components/esp_system/startup.c
@@ -55,14 +55,13 @@
 #include "esp_private/usb_console.h"
 #include "esp_vfs_cdcacm.h"
 
+#include "esp_rom_sys.h"
 
 // [refactor-todo] make this file completely target-independent
 #if CONFIG_IDF_TARGET_ESP32
-#include "esp32/rom/ets_sys.h"
 #include "esp32/spiram.h"
 #include "esp32/brownout.h"
 #elif CONFIG_IDF_TARGET_ESP32S2
-#include "esp32s2/rom/ets_sys.h"
 #include "esp32s2/spiram.h"
 #include "esp32s2/brownout.h"
 #endif
@@ -156,7 +155,7 @@ static void IRAM_ATTR do_system_init_fn(void)
 static void IRAM_ATTR start_app_other_cores_default(void)
 {
     while (1) {
-        ets_delay_us(UINT32_MAX);
+        esp_rom_delay_us(UINT32_MAX);
     }
 }
 
@@ -165,7 +164,7 @@ static void IRAM_ATTR start_cpu_other_cores_default(void)
     do_system_init_fn();
 
     while (!s_system_full_inited) {
-        ets_delay_us(100);
+        esp_rom_delay_us(100);
     }
 
     start_app_other_cores();
@@ -295,7 +294,7 @@ static void IRAM_ATTR do_secondary_init(void)
         for (int i = 0; i < SOC_CPU_CORES_NUM; i++) {
             system_inited &= s_system_inited[i];
         }
-        ets_delay_us(100);
+        esp_rom_delay_us(100);
     }
 #endif
 }
diff --git a/components/esp_timer/src/ets_timer_legacy.c b/components/esp_timer/src/ets_timer_legacy.c
index 3f35107e92..dc5586a240 100644
--- a/components/esp_timer/src/ets_timer_legacy.c
+++ b/components/esp_timer/src/ets_timer_legacy.c
@@ -32,7 +32,7 @@
 #include "sdkconfig.h"
 #include "esp_timer.h"
 #if CONFIG_IDF_TARGET_ESP32
-#include "esp32/rom/ets_sys.h"
+#include "esp32/rom/ets_sys.h"  // for ETSTimer type
 #elif CONFIG_IDF_TARGET_ESP32S2
 #include "esp32s2/rom/ets_sys.h"
 #endif
diff --git a/components/esp_timer/test/test_esp_timer.c b/components/esp_timer/test/test_esp_timer.c
index c8972ed60a..44113e59ee 100644
--- a/components/esp_timer/test/test_esp_timer.c
+++ b/components/esp_timer/test/test_esp_timer.c
@@ -14,6 +14,7 @@
 #include "freertos/semphr.h"
 #include "test_utils.h"
 #include "esp_freertos_hooks.h"
+#include "esp_rom_sys.h"
 
 #ifdef CONFIG_ESP_TIMER_PROFILING
 #define WITH_PROFILING 1
@@ -207,7 +208,7 @@ TEST_CASE("periodic esp_timer produces correct delays", "[esp_timer]")
         p_args->intervals[p_args->cur_interval++] = ms_diff;
         // Deliberately make timer handler run longer.
         // We check that this doesn't affect the result.
-        ets_delay_us(10*1000);
+        esp_rom_delay_us(10*1000);
         if (p_args->cur_interval == NUM_INTERVALS) {
             printf("done\n");
             TEST_ESP_OK(esp_timer_stop(p_args->timer));
@@ -734,7 +735,7 @@ static void dport_task(void *pvParameters)
 {
     while (task_stop == false) {
         DPORT_STALL_OTHER_CPU_START();
-        ets_delay_us(3);
+        esp_rom_delay_us(3);
         DPORT_STALL_OTHER_CPU_END();
     }
     vTaskDelete(NULL);
@@ -836,7 +837,7 @@ TEST_CASE("Test case when esp_timer_impl_set_alarm needs set timer < now_time",
 #endif
     esp_timer_impl_advance(50331648); // 0xefffffff/80 = 50331647
 
-    ets_delay_us(2);
+    esp_rom_delay_us(2);
 
     portDISABLE_INTERRUPTS();
     esp_timer_impl_set_alarm(50331647);
diff --git a/components/esp_timer/test/test_ets_timer.c b/components/esp_timer/test/test_ets_timer.c
index 0c490d0675..5d7bf34d57 100644
--- a/components/esp_timer/test/test_ets_timer.c
+++ b/components/esp_timer/test/test_ets_timer.c
@@ -8,7 +8,7 @@
 #include "freertos/semphr.h"
 #include "esp_spi_flash.h"
 #if CONFIG_IDF_TARGET_ESP32
-#include "esp32/rom/ets_sys.h"
+#include "esp32/rom/ets_sys.h"  // for ETSTimer type
 #elif CONFIG_IDF_TARGET_ESP32S2
 #include "esp32s2/rom/ets_sys.h"
 #endif
@@ -69,7 +69,7 @@ TEST_CASE("periodic ets_timer produces correct delays", "[ets_timer]")
         p_args->intervals[p_args->cur_interval++] = ms_diff;
         // Deliberately make timer handler run longer.
         // We check that this doesn't affect the result.
-        ets_delay_us(10*1000);
+        esp_rom_delay_us(10*1000);
         if (p_args->cur_interval == NUM_INTERVALS) {
             printf("done\n");
             ets_timer_disarm(p_args->timer);
diff --git a/components/esp_wifi/src/phy_init.c b/components/esp_wifi/src/phy_init.c
index faefd6d51c..7a5a6b3e06 100644
--- a/components/esp_wifi/src/phy_init.c
+++ b/components/esp_wifi/src/phy_init.c
@@ -37,10 +37,8 @@
 #include "esp_rom_crc.h"
 
 #if CONFIG_IDF_TARGET_ESP32
-#include "esp32/rom/ets_sys.h"
 #include "esp32/rom/rtc.h"
 #elif CONFIG_IDF_TARGET_ESP32S2
-#include "esp32s2/rom/ets_sys.h"
 #include "esp32s2/rom/rtc.h"
 #endif
 
diff --git a/components/espcoredump/include_core_dump/esp_core_dump_priv.h b/components/espcoredump/include_core_dump/esp_core_dump_priv.h
index d991b05302..07caade513 100644
--- a/components/espcoredump/include_core_dump/esp_core_dump_priv.h
+++ b/components/espcoredump/include_core_dump/esp_core_dump_priv.h
@@ -21,13 +21,14 @@ extern "C" {
 #include "esp_err.h"
 #include "esp_attr.h"
 #include "esp_log.h"
+#include "esp_rom_sys.h"
 #include "sdkconfig.h"
 #if CONFIG_ESP32_COREDUMP_CHECKSUM_SHA256
 // TODO: move this to portable part of the code
 #include "mbedtls/sha256.h"
 #endif
 
-#define ESP_COREDUMP_LOG( level, format, ... )  if (LOG_LOCAL_LEVEL >= level)   { ets_printf(DRAM_STR(format), esp_log_early_timestamp(), (const char *)TAG, ##__VA_ARGS__); }
+#define ESP_COREDUMP_LOG( level, format, ... )  if (LOG_LOCAL_LEVEL >= level)   { esp_rom_printf(DRAM_STR(format), esp_log_early_timestamp(), (const char *)TAG, ##__VA_ARGS__); }
 #define ESP_COREDUMP_LOGE( format, ... )  ESP_COREDUMP_LOG(ESP_LOG_ERROR, LOG_FORMAT(E, format), ##__VA_ARGS__)
 #define ESP_COREDUMP_LOGW( format, ... )  ESP_COREDUMP_LOG(ESP_LOG_WARN, LOG_FORMAT(W, format), ##__VA_ARGS__)
 #define ESP_COREDUMP_LOGI( format, ... )  ESP_COREDUMP_LOG(ESP_LOG_INFO, LOG_FORMAT(I, format), ##__VA_ARGS__)
diff --git a/components/espcoredump/src/core_dump_port.c b/components/espcoredump/src/core_dump_port.c
index 3dd62dd27e..a2f3945212 100644
--- a/components/espcoredump/src/core_dump_port.c
+++ b/components/espcoredump/src/core_dump_port.c
@@ -18,6 +18,7 @@
 #include "freertos/task.h"
 #include "freertos/xtensa_context.h" // for exception register stack structure
 #include "esp_core_dump_priv.h"
+#include "esp_rom_sys.h"
 
 const static DRAM_ATTR char TAG[] __attribute__((unused)) = "esp_core_dump_port";
 
@@ -192,11 +193,11 @@ exit:
 
 void esp_core_dump_print_sha256(const char* msg, const uint8_t* sha_output)
 {
-    ets_printf(DRAM_STR("%s='"), msg);
+    esp_rom_printf(DRAM_STR("%s='"), msg);
     for (int i = 0; i < COREDUMP_SHA256_LEN; i++) {
-        ets_printf(DRAM_STR("%02x"), sha_output[i]);
+        esp_rom_printf(DRAM_STR("%02x"), sha_output[i]);
     }
-    ets_printf(DRAM_STR("'\r\n"));
+    esp_rom_printf(DRAM_STR("'\r\n"));
 }
 #endif
 
diff --git a/components/espcoredump/src/core_dump_uart.c b/components/espcoredump/src/core_dump_uart.c
index 5fa4e7e53f..1a2fa3e856 100644
--- a/components/espcoredump/src/core_dump_uart.c
+++ b/components/espcoredump/src/core_dump_uart.c
@@ -16,6 +16,7 @@
 #include "soc/gpio_periph.h"
 #include "driver/gpio.h"
 #include "esp_core_dump_priv.h"
+#include "esp_rom_sys.h"
 // TODO: move chip dependent part to portable code
 #if CONFIG_IDF_TARGET_ESP32
 #include "esp32/clk.h"
@@ -57,7 +58,7 @@ static esp_err_t esp_core_dump_uart_write_start(void *priv)
     esp_err_t err = ESP_OK;
     core_dump_write_data_t *wr_data = (core_dump_write_data_t *)priv;
     esp_core_dump_checksum_init(wr_data);
-    ets_printf(DRAM_STR("================= CORE DUMP START =================\r\n"));
+    esp_rom_printf(DRAM_STR("================= CORE DUMP START =================\r\n"));
     return err;
 }
 
@@ -80,9 +81,9 @@ static esp_err_t esp_core_dump_uart_write_end(void *priv)
         size_t cs_len = esp_core_dump_checksum_finish(wr_data, &cs_addr);
         wr_data->off += cs_len;
         esp_core_dump_b64_encode((const uint8_t *)cs_addr, cs_len, (uint8_t*)&buf[0]);
-        ets_printf(DRAM_STR("%s\r\n"), buf);
+        esp_rom_printf(DRAM_STR("%s\r\n"), buf);
     }
-    ets_printf(DRAM_STR("================= CORE DUMP END =================\r\n"));
+    esp_rom_printf(DRAM_STR("================= CORE DUMP END =================\r\n"));
 #if CONFIG_ESP32_COREDUMP_CHECKSUM_SHA256
     if (cs_addr) {
         esp_core_dump_print_sha256(DRAM_STR("Coredump SHA256"), (uint8_t*)(cs_addr));
@@ -107,7 +108,7 @@ static esp_err_t esp_core_dump_uart_write_data(void *priv, void * data, uint32_t
         memcpy(tmp, addr, len);
         esp_core_dump_b64_encode((const uint8_t *)tmp, len, (uint8_t *)buf);
         addr += len;
-        ets_printf(DRAM_STR("%s\r\n"), buf);
+        esp_rom_printf(DRAM_STR("%s\r\n"), buf);
     }
 
     if (wr_data) {
diff --git a/components/fatfs/test/test_fatfs_common.c b/components/fatfs/test/test_fatfs_common.c
index 09e2938268..c1dd3f1319 100644
--- a/components/fatfs/test/test_fatfs_common.c
+++ b/components/fatfs/test/test_fatfs_common.c
@@ -31,6 +31,7 @@
 #include "freertos/task.h"
 #include "ff.h"
 #include "test_fatfs_common.h"
+#include "esp_rom_sys.h"
 
 const char* fatfs_test_hello_str = "Hello, World!\n";
 const char* fatfs_test_hello_str_utf = "世界，你好！\n";
@@ -698,7 +699,7 @@ static void read_write_task(void* param)
         if (args->write) {
             int cnt = fwrite(&val, sizeof(val), 1, f);
             if (cnt != 1) {
-                ets_printf("E(w): i=%d, cnt=%d val=%d\n\n", i, cnt, val);
+                esp_rom_printf("E(w): i=%d, cnt=%d val=%d\n\n", i, cnt, val);
                 args->result = ESP_FAIL;
                 goto close;
             }
@@ -706,7 +707,7 @@ static void read_write_task(void* param)
             uint32_t rval;
             int cnt = fread(&rval, sizeof(rval), 1, f);
             if (cnt != 1 || rval != val) {
-                ets_printf("E(r): i=%d, cnt=%d rval=%d val=%d\n\n", i, cnt, rval, val);
+                esp_rom_printf("E(r): i=%d, cnt=%d rval=%d val=%d\n\n", i, cnt, rval, val);
                 args->result = ESP_FAIL;
                 goto close;
             }
diff --git a/components/fatfs/test/test_fatfs_rawflash.c b/components/fatfs/test/test_fatfs_rawflash.c
index ca949e1ab5..882c4f8312 100644
--- a/components/fatfs/test/test_fatfs_rawflash.c
+++ b/components/fatfs/test/test_fatfs_rawflash.c
@@ -29,6 +29,7 @@
 #include "test_fatfs_common.h"
 #include "esp_partition.h"
 #include "ff.h"
+#include "esp_rom_sys.h"
 
 
 static void test_setup(size_t max_files)
@@ -267,7 +268,7 @@ static void read_task(void* param)
         uint32_t rval;
         int cnt = fread(&rval, sizeof(rval), 1, f);
         if (cnt != 1 || rval != args->val) {
-            ets_printf("E(r): i=%d, cnt=%d rval=%d val=%d\n\n", i, cnt, rval, args->val);
+            esp_rom_printf("E(r): i=%d, cnt=%d rval=%d val=%d\n\n", i, cnt, rval, args->val);
             args->result = ESP_FAIL;
             goto close;
         }
diff --git a/components/freertos/test/test_freertos_isinisrcontext.c b/components/freertos/test/test_freertos_isinisrcontext.c
index a34e154635..9993067817 100644
--- a/components/freertos/test/test_freertos_isinisrcontext.c
+++ b/components/freertos/test/test_freertos_isinisrcontext.c
@@ -13,13 +13,14 @@
 #include "unity.h"
 #include "esp_intr_alloc.h"
 #include "xtensa/hal.h"
+#include "esp_rom_sys.h"
 
 static volatile int in_int_context, int_handled;
 
 
 static void testint(void *arg) {
     xthal_set_ccompare(1, xthal_get_ccount()+8000000000);
-    ets_printf("INT!\n");
+    esp_rom_printf("INT!\n");
     if (xPortInIsrContext()) in_int_context++;
     int_handled++;
 }
diff --git a/components/freertos/test/test_freertos_task_delete.c b/components/freertos/test/test_freertos_task_delete.c
index f82d8f15a7..a064cf71fa 100644
--- a/components/freertos/test/test_freertos_task_delete.c
+++ b/components/freertos/test/test_freertos_task_delete.c
@@ -21,6 +21,8 @@
 #include "unity.h"
 #include "test_utils.h"
 
+#include "esp_rom_sys.h"
+
 #define NO_OF_TSKS  3
 #define DELAY_TICKS 2
 /* Caps of all memory which is allocated from when a task is created */
@@ -42,7 +44,7 @@ static void tsk_extern_del(void *param)
 static void tsk_self_del_us_delay(void *param)
 {
     uint32_t delay = (uint32_t)param;
-    ets_delay_us(delay);
+    esp_rom_delay_us(delay);
     vTaskDelete(NULL);
 }
 
@@ -78,7 +80,7 @@ TEST_CASE("FreeRTOS Delete Tasks", "[freertos]")
     for(int i = 0; i < DELAY_US_ITERATIONS; i+= 10){
         vTaskDelay(1);                          //Sync to next tick interrupt
         xTaskCreatePinnedToCore(tsk_self_del_us_delay, "delay", 1024, (void *)i, UNITY_FREERTOS_PRIORITY - 1, NULL, tskNO_AFFINITY);
-        ets_delay_us(10);                       //Busy wait to ensure no affinity task runs on opposite core
+        esp_rom_delay_us(10);                       //Busy wait to ensure no affinity task runs on opposite core
     }
 
 }
diff --git a/components/freertos/test/test_suspend_scheduler.c b/components/freertos/test/test_suspend_scheduler.c
index a2114ef5d7..2440c8d40c 100644
--- a/components/freertos/test/test_suspend_scheduler.c
+++ b/components/freertos/test/test_suspend_scheduler.c
@@ -13,6 +13,8 @@
 #include "driver/timer.h"
 #include "sdkconfig.h"
 
+#include "esp_rom_sys.h"
+
 #ifdef CONFIG_IDF_TARGET_ESP32S2
 #define int_clr_timers int_clr
 #define update update.update
@@ -102,7 +104,7 @@ TEST_CASE("Scheduler disabled can handle a pending context switch on resume", "[
         unsigned no_sched_task = count_config.counter;
 
         // scheduler off on this CPU...
-        ets_delay_us(20 * 1000);
+        esp_rom_delay_us(20 * 1000);
 
         //TEST_ASSERT_NOT_EQUAL(no_sched_isr, isr_count);
         TEST_ASSERT_EQUAL(count_config.counter, no_sched_task);
@@ -171,12 +173,12 @@ TEST_CASE("Scheduler disabled can wake multiple tasks on resume", "[freertos]")
         }
    }
 
-    ets_delay_us(200); /* Let the other CPU do some things */
+    esp_rom_delay_us(200); /* Let the other CPU do some things */
 
     for (int p = 0; p < portNUM_PROCESSORS; p++) {
         for (int t = 0; t < TASKS_PER_PROC; t++) {
             int expected = (p == UNITY_FREERTOS_CPU) ? 0 : 1; // Has run if it was on the other CPU
-            ets_printf("Checking CPU %d task %d (expected %d actual %d)\n", p, t, expected, counters[p][t].counter);
+            esp_rom_printf("Checking CPU %d task %d (expected %d actual %d)\n", p, t, expected, counters[p][t].counter);
             TEST_ASSERT_EQUAL(expected, counters[p][t].counter);
         }
     }
@@ -187,7 +189,7 @@ TEST_CASE("Scheduler disabled can wake multiple tasks on resume", "[freertos]")
     /* Now the tasks on both CPUs should have been woken once and counted once. */
     for (int p = 0; p < portNUM_PROCESSORS; p++) {
         for (int t = 0; t < TASKS_PER_PROC; t++) {
-            ets_printf("Checking CPU %d task %d (expected 1 actual %d)\n", p, t, counters[p][t].counter);
+            esp_rom_printf("Checking CPU %d task %d (expected 1 actual %d)\n", p, t, counters[p][t].counter);
             TEST_ASSERT_EQUAL(1, counters[p][t].counter);
         }
     }
@@ -208,7 +210,7 @@ static void suspend_scheduler_5ms_task_fn(void *ignore)
     vTaskSuspendAll();
     sched_suspended = true;
     for (int i = 0; i <5; i++) {
-        ets_delay_us(1000);
+        esp_rom_delay_us(1000);
     }
     xTaskResumeAll();
     sched_suspended = false;
@@ -240,7 +242,7 @@ TEST_CASE("Scheduler disabled on CPU B, tasks on A can wake", "[freertos]")
     while(!sched_suspended) { }
 
     xSemaphoreGive(wake_sem);
-    ets_delay_us(1000);
+    esp_rom_delay_us(1000);
     // Bit of a race here if the other CPU resumes its scheduler, but 5ms is a long time... */
     TEST_ASSERT(sched_suspended);
     TEST_ASSERT_EQUAL(0, count_config.counter); // the other task hasn't woken yet, because scheduler is off
@@ -249,7 +251,7 @@ TEST_CASE("Scheduler disabled on CPU B, tasks on A can wake", "[freertos]")
     /* wait for the rest of the 5ms... */
     while(sched_suspended) { }
 
-    ets_delay_us(100);
+    esp_rom_delay_us(100);
     TEST_ASSERT_EQUAL(1, count_config.counter); // when scheduler resumes, counter task should immediately count
 
     vTaskDelete(counter_task);
diff --git a/components/freertos/test/test_task_suspend_resume.c b/components/freertos/test/test_task_suspend_resume.c
index adbeb19133..6be85061a4 100644
--- a/components/freertos/test/test_task_suspend_resume.c
+++ b/components/freertos/test/test_task_suspend_resume.c
@@ -19,6 +19,7 @@
 #endif
 #include "esp_freertos_hooks.h"
 
+#include "esp_rom_sys.h"
 
 #ifdef CONFIG_IDF_TARGET_ESP32S2
 #define int_clr_timers int_clr
@@ -195,7 +196,7 @@ static void IRAM_ATTR suspend_scheduler_while_block_set(void* arg)
     vTaskSuspendAll();
 
     while (block) { };
-    ets_delay_us(1);
+    esp_rom_delay_us(1);
     xTaskResumeAll();
 }
 
@@ -236,12 +237,12 @@ static void waiting_task(void *pvParameters)
 static void control_task(void *pvParameters)
 {
     int cpu_id = xPortGetCoreID();
-    ets_delay_us(2000); // let to start the waiting_task first
+    esp_rom_delay_us(2000); // let to start the waiting_task first
     printf("Start control_task cpu=%d\n", cpu_id);
     int64_t start_time = esp_timer_get_time();
 
     suspend_scheduler_on_both_cpus();
-    ets_delay_us(waiting_ms * 1000 + delta_ms * 1000);
+    esp_rom_delay_us(waiting_ms * 1000 + delta_ms * 1000);
     resume_scheduler_on_both_cpus();
 
     duration_ctrl_task_ms = (esp_timer_get_time() - start_time) / 1000;
diff --git a/components/freertos/xtensa/include/freertos/FreeRTOSConfig.h b/components/freertos/xtensa/include/freertos/FreeRTOSConfig.h
index 128d62190b..80b5e5e090 100644
--- a/components/freertos/xtensa/include/freertos/FreeRTOSConfig.h
+++ b/components/freertos/xtensa/include/freertos/FreeRTOSConfig.h
@@ -120,8 +120,9 @@ int xt_clock_freq(void) __attribute__((deprecated));
 /* configASSERT behaviour */
 #ifndef __ASSEMBLER__
 #include <stdlib.h> /* for abort() */
+#include "esp_rom_sys.h"
 #if CONFIG_IDF_TARGET_ESP32
-#include "esp32/rom/ets_sys.h"
+#include "esp32/rom/ets_sys.h"  // will be removed in idf v5.0
 #elif CONFIG_IDF_TARGET_ESP32S2
 #include "esp32s2/rom/ets_sys.h"
 #endif
@@ -129,20 +130,20 @@ int xt_clock_freq(void) __attribute__((deprecated));
 #if defined(CONFIG_FREERTOS_ASSERT_DISABLE)
 #define configASSERT(a) /* assertions disabled */
 #elif defined(CONFIG_FREERTOS_ASSERT_FAIL_PRINT_CONTINUE)
-#define configASSERT(a) if (unlikely(!(a))) {                                     \
-        ets_printf("%s:%d (%s)- assert failed!\n", __FILE__, __LINE__,  \
-                   __FUNCTION__);                                       \
+#define configASSERT(a) if (unlikely(!(a))) {                               \
+        esp_rom_printf("%s:%d (%s)- assert failed!\n", __FILE__, __LINE__,  \
+                   __FUNCTION__);                                           \
     }
 #else /* CONFIG_FREERTOS_ASSERT_FAIL_ABORT */
-#define configASSERT(a) if (unlikely(!(a))) {                                     \
-        ets_printf("%s:%d (%s)- assert failed!\n", __FILE__, __LINE__,  \
-                   __FUNCTION__);                                       \
-        abort();                                                        \
+#define configASSERT(a) if (unlikely(!(a))) {                               \
+        esp_rom_printf("%s:%d (%s)- assert failed!\n", __FILE__, __LINE__,  \
+                   __FUNCTION__);                                           \
+        abort();                                                            \
         }
 #endif
 
 #if CONFIG_FREERTOS_ASSERT_ON_UNTESTED_FUNCTION
-#define UNTESTED_FUNCTION() { ets_printf("Untested FreeRTOS function %s\r\n", __FUNCTION__); configASSERT(false); } while(0)
+#define UNTESTED_FUNCTION() { esp_rom_printf("Untested FreeRTOS function %s\r\n", __FUNCTION__); configASSERT(false); } while(0)
 #else
 #define UNTESTED_FUNCTION()
 #endif
diff --git a/components/freertos/xtensa/include/freertos/portmacro.h b/components/freertos/xtensa/include/freertos/portmacro.h
index 979ffecab9..9c00fa16d9 100644
--- a/components/freertos/xtensa/include/freertos/portmacro.h
+++ b/components/freertos/xtensa/include/freertos/portmacro.h
@@ -84,7 +84,7 @@ extern "C" {
 #include "esp_timer.h"              /* required for FreeRTOS run time stats */
 #include "soc/spinlock.h"
 #include <esp_heap_caps.h>
-
+#include "esp_rom_sys.h"
 #include "sdkconfig.h"
 
 #ifdef CONFIG_LEGACY_INCLUDE_COMMON_HEADERS
@@ -225,22 +225,22 @@ static inline void __attribute__((always_inline)) vPortEnterCriticalCompliance(p
 {
     if(!xPortInIsrContext()) {                                                                  
         vPortEnterCritical(mux);                                                                
-    } else {                                                                                    
-        ets_printf("%s:%d (%s)- port*_CRITICAL called from ISR context!\n", __FILE__, __LINE__, 
-                    __FUNCTION__);                                                              
-        abort();                                                                                
-    }                                                                                           
+    } else {
+        esp_rom_printf("%s:%d (%s)- port*_CRITICAL called from ISR context!\n",
+                       __FILE__, __LINE__, __FUNCTION__);
+        abort();
+    }
 }
 
 static inline void __attribute__((always_inline)) vPortExitCriticalCompliance(portMUX_TYPE *mux)
 {
     if(!xPortInIsrContext()) {                                                                  
         vPortExitCritical(mux);                                                                 
-    } else {                                                                                    
-        ets_printf("%s:%d (%s)- port*_CRITICAL called from ISR context!\n", __FILE__, __LINE__, 
-                    __FUNCTION__);                                                               
-        abort();                                                                                
-    }                                                                                               
+    } else {
+        esp_rom_printf("%s:%d (%s)- port*_CRITICAL called from ISR context!\n",
+                       __FILE__, __LINE__, __FUNCTION__);
+        abort();
+    }
 }
 
 #ifdef CONFIG_FREERTOS_CHECK_PORT_CRITICAL_COMPLIANCE
diff --git a/components/freertos/xtensa/xtensa_intr.c b/components/freertos/xtensa/xtensa_intr.c
index 4a8724044a..dd6d0744e0 100644
--- a/components/freertos/xtensa/xtensa_intr.c
+++ b/components/freertos/xtensa/xtensa_intr.c
@@ -34,6 +34,7 @@ SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
 #include "freertos/xtensa_api.h"
 #include "freertos/portable.h"
 #include "sdkconfig.h"
+#include "esp_rom_sys.h"
 
 #if XCHAL_HAVE_EXCEPTIONS
 
@@ -99,7 +100,7 @@ extern xt_handler_table_entry _xt_interrupt_table[XCHAL_NUM_INTERRUPTS*portNUM_P
 */
 void xt_unhandled_interrupt(void * arg)
 {
-	ets_printf("Unhandled interrupt %d on cpu %d!\n", (int)arg, xPortGetCoreID());
+	esp_rom_printf("Unhandled interrupt %d on cpu %d!\n", (int)arg, xPortGetCoreID());
 }
 
 
diff --git a/components/heap/multi_heap_platform.h b/components/heap/multi_heap_platform.h
index 5a05d81f9d..2d3ed00314 100644
--- a/components/heap/multi_heap_platform.h
+++ b/components/heap/multi_heap_platform.h
@@ -17,8 +17,9 @@
 
 #include <freertos/FreeRTOS.h>
 #include "sdkconfig.h"
+#include "esp_rom_sys.h"
 #if CONFIG_IDF_TARGET_ESP32
-#include "esp32/rom/ets_sys.h"
+#include "esp32/rom/ets_sys.h" // will be removed in idf v5.0
 #elif CONFIG_IDF_TARGET_ESP32S2
 #include "esp32s2/rom/ets_sys.h"
 #endif
@@ -50,8 +51,8 @@ typedef portMUX_TYPE multi_heap_lock_t;
 /* Not safe to use std i/o while in a portmux critical section,
    can deadlock, so we use the ROM equivalent functions. */
 
-#define MULTI_HEAP_PRINTF ets_printf
-#define MULTI_HEAP_STDERR_PRINTF(MSG, ...) ets_printf(MSG, __VA_ARGS__)
+#define MULTI_HEAP_PRINTF esp_rom_printf
+#define MULTI_HEAP_STDERR_PRINTF(MSG, ...) esp_rom_printf(MSG, __VA_ARGS__)
 
 inline static void multi_heap_assert(bool condition, const char *format, int line, intptr_t address)
 {
@@ -62,7 +63,7 @@ inline static void multi_heap_assert(bool condition, const char *format, int lin
 #ifndef NDEBUG
     if(!condition) {
 #ifndef CONFIG_COMPILER_OPTIMIZATION_ASSERTIONS_SILENT
-        ets_printf(format, line, address);
+        esp_rom_printf(format, line, address);
 #endif  // CONFIG_COMPILER_OPTIMIZATION_ASSERTIONS_SILENT
         abort();
     }
diff --git a/components/log/include/esp_log.h b/components/log/include/esp_log.h
index cdbe74f697..1abc70c13b 100644
--- a/components/log/include/esp_log.h
+++ b/components/log/include/esp_log.h
@@ -17,9 +17,10 @@
 
 #include <stdint.h>
 #include <stdarg.h>
+#include "esp_rom_sys.h"
 #include "sdkconfig.h"
 #if CONFIG_IDF_TARGET_ESP32
-#include "esp32/rom/ets_sys.h"
+#include "esp32/rom/ets_sys.h" // will be removed in idf v5.0
 #elif CONFIG_IDF_TARGET_ESP32S2
 #include "esp32s2/rom/ets_sys.h"
 #endif
@@ -285,9 +286,9 @@ void esp_log_writev(esp_log_level_t level, const char* tag, const char* format,
 /// macro to output logs in startup code at ``ESP_LOG_VERBOSE`` level.  @see ``ESP_EARLY_LOGE``,``ESP_LOGE``, ``printf``
 #define ESP_EARLY_LOGV( tag, format, ... ) ESP_LOG_EARLY_IMPL(tag, format, ESP_LOG_VERBOSE, V, ##__VA_ARGS__)
 
-#define ESP_LOG_EARLY_IMPL(tag, format, log_level, log_tag_letter, ...) do {                         \
-        if (LOG_LOCAL_LEVEL >= log_level) {                                                          \
-            ets_printf(LOG_FORMAT(log_tag_letter, format), esp_log_timestamp(), tag, ##__VA_ARGS__); \
+#define ESP_LOG_EARLY_IMPL(tag, format, log_level, log_tag_letter, ...) do {                             \
+        if (LOG_LOCAL_LEVEL >= log_level) {                                                              \
+            esp_rom_printf(LOG_FORMAT(log_tag_letter, format), esp_log_timestamp(), tag, ##__VA_ARGS__); \
         }} while(0)
 
 #ifndef BOOTLOADER_BUILD
@@ -361,24 +362,24 @@ void esp_log_writev(esp_log_level_t level, const char* tag, const char* format,
  *
  * @note Placing log strings in DRAM reduces available DRAM, so only use when absolutely essential.
  *
- * @see ``ets_printf``,``ESP_LOGE``
+ * @see ``esp_rom_printf``,``ESP_LOGE``
  */
 #define ESP_DRAM_LOGE( tag, format, ... ) ESP_DRAM_LOG_IMPL(tag, format, ESP_LOG_ERROR,   E, ##__VA_ARGS__)
-/// macro to output logs when the cache is disabled at ``ESP_LOG_WARN`` level.  @see ``ESP_DRAM_LOGW``,``ESP_LOGW``, ``ets_printf``
+/// macro to output logs when the cache is disabled at ``ESP_LOG_WARN`` level.  @see ``ESP_DRAM_LOGW``,``ESP_LOGW``, ``esp_rom_printf``
 #define ESP_DRAM_LOGW( tag, format, ... ) ESP_DRAM_LOG_IMPL(tag, format, ESP_LOG_WARN,    W, ##__VA_ARGS__)
-/// macro to output logs when the cache is disabled at ``ESP_LOG_INFO`` level.  @see ``ESP_DRAM_LOGI``,``ESP_LOGI``, ``ets_printf``
+/// macro to output logs when the cache is disabled at ``ESP_LOG_INFO`` level.  @see ``ESP_DRAM_LOGI``,``ESP_LOGI``, ``esp_rom_printf``
 #define ESP_DRAM_LOGI( tag, format, ... ) ESP_DRAM_LOG_IMPL(tag, format, ESP_LOG_INFO,    I, ##__VA_ARGS__)
-/// macro to output logs when the cache is disabled at ``ESP_LOG_DEBUG`` level.  @see ``ESP_DRAM_LOGD``,``ESP_LOGD``, ``ets_printf``
+/// macro to output logs when the cache is disabled at ``ESP_LOG_DEBUG`` level.  @see ``ESP_DRAM_LOGD``,``ESP_LOGD``, ``esp_rom_printf``
 #define ESP_DRAM_LOGD( tag, format, ... ) ESP_DRAM_LOG_IMPL(tag, format, ESP_LOG_DEBUG,   D, ##__VA_ARGS__)
-/// macro to output logs when the cache is disabled at ``ESP_LOG_VERBOSE`` level.  @see ``ESP_DRAM_LOGV``,``ESP_LOGV``, ``ets_printf``
+/// macro to output logs when the cache is disabled at ``ESP_LOG_VERBOSE`` level.  @see ``ESP_DRAM_LOGV``,``ESP_LOGV``, ``esp_rom_printf``
 #define ESP_DRAM_LOGV( tag, format, ... ) ESP_DRAM_LOG_IMPL(tag, format, ESP_LOG_VERBOSE, V, ##__VA_ARGS__)
 
 /** @cond */
 #define _ESP_LOG_DRAM_LOG_FORMAT(letter, format)  DRAM_STR(#letter " %s: " format "\n")
 
-#define ESP_DRAM_LOG_IMPL(tag, format, log_level, log_tag_letter, ...) do {                         \
-        if (LOG_LOCAL_LEVEL >= log_level) {                                                          \
-            ets_printf(_ESP_LOG_DRAM_LOG_FORMAT(log_tag_letter, format), tag, ##__VA_ARGS__); \
+#define ESP_DRAM_LOG_IMPL(tag, format, log_level, log_tag_letter, ...) do {                       \
+        if (LOG_LOCAL_LEVEL >= log_level) {                                                       \
+            esp_rom_printf(_ESP_LOG_DRAM_LOG_FORMAT(log_tag_letter, format), tag, ##__VA_ARGS__); \
         }} while(0)
 /** @endcond */
 
diff --git a/components/mbedtls/port/esp32/sha.c b/components/mbedtls/port/esp32/sha.c
index 15c87945fa..ddb2eee5ca 100644
--- a/components/mbedtls/port/esp32/sha.c
+++ b/components/mbedtls/port/esp32/sha.c
@@ -34,7 +34,6 @@
 #include "freertos/semphr.h"
 
 #include "esp32/sha.h"
-#include "esp32/rom/ets_sys.h"
 #include "soc/hwcrypto_periph.h"
 #include "driver/periph_ctrl.h"
 
diff --git a/components/mbedtls/port/esp32s2/sha.c b/components/mbedtls/port/esp32s2/sha.c
index c9f1852e53..6b0723967f 100644
--- a/components/mbedtls/port/esp32s2/sha.c
+++ b/components/mbedtls/port/esp32s2/sha.c
@@ -33,7 +33,6 @@
 #include "esp_crypto_lock.h"
 #include "esp32s2/rom/cache.h"
 #include "esp32s2/rom/lldesc.h"
-#include "esp32s2/rom/ets_sys.h"
 #include "soc/crypto_dma_reg.h"
 #include "soc/dport_reg.h"
 #include "soc/hwcrypto_reg.h"
diff --git a/components/newlib/test/test_time.c b/components/newlib/test/test_time.c
index 29d5bc11bd..8a761f9f4b 100644
--- a/components/newlib/test/test_time.c
+++ b/components/newlib/test/test_time.c
@@ -12,6 +12,7 @@
 #include "esp_system.h"
 #include "test_utils.h"
 #include "esp_log.h"
+#include "esp_rom_sys.h"
 
 #if portNUM_PROCESSORS == 2
 
@@ -270,7 +271,7 @@ static void measure_time_task(void *pvParameters)
         int64_t sys_time_us[2] = { main_sys_time_us[0], 0};
         // although exit flag is set in another task, checking (exit_flag == false) is safe
         while (exit_flag == false) {
-            ets_delay_us(2 * 1000000); // 2 sec
+            esp_rom_delay_us(2 * 1000000); // 2 sec
 
             start_measure(&sys_time_us[1], &real_time_us[1]);
             result_adjtime_correction_us[1] += calc_correction("measure", sys_time_us, real_time_us);
diff --git a/components/newlib/time.c b/components/newlib/time.c
index 618d383d69..8a7429cea9 100644
--- a/components/newlib/time.c
+++ b/components/newlib/time.c
@@ -33,14 +33,13 @@
 #include "freertos/task.h"
 #include "limits.h"
 #include "sdkconfig.h"
+#include "esp_rom_sys.h"
 #if CONFIG_IDF_TARGET_ESP32
-#include "esp32/rom/ets_sys.h"
 #include "esp32/clk.h"
 #include "esp32/rom/rtc.h"
 #elif CONFIG_IDF_TARGET_ESP32S2
 #include "esp32s2/clk.h"
 #include "esp32s2/rom/rtc.h"
-#include "esp32s2/rom/ets_sys.h"
 #endif
 
 #ifdef CONFIG_SDK_TOOLCHAIN_SUPPORTS_TIME_WIDE_64_BITS
@@ -338,7 +337,7 @@ int usleep(useconds_t us)
 {
     const int us_per_tick = portTICK_PERIOD_MS * 1000;
     if (us < us_per_tick) {
-        ets_delay_us((uint32_t) us);
+        esp_rom_delay_us((uint32_t) us);
     } else {
         /* since vTaskDelay(1) blocks for anywhere between 0 and portTICK_PERIOD_MS,
          * round up to compensate.
diff --git a/components/soc/include/soc_log.h b/components/soc/include/soc_log.h
index a3f955d8cb..25742365f5 100644
--- a/components/soc/include/soc_log.h
+++ b/components/soc/include/soc_log.h
@@ -13,7 +13,7 @@
 // limitations under the License.
 
 #pragma once
-
+#include "esp_rom_sys.h"
 /**
  * @file soc_log.h
  * @brief SOC library logging functions
@@ -33,14 +33,14 @@
 #else
 #include "sdkconfig.h"
 #ifdef CONFIG_IDF_TARGET_ESP32
-#include "esp32/rom/ets_sys.h"
+#include "esp32/rom/ets_sys.h"  // will be removed in idf v5.0
 #elif CONFIG_IDF_TARGET_ESP32S2
 #include "esp32s2/rom/ets_sys.h"
 #endif
 
-#define SOC_LOGE(tag, fmt, ...) ets_printf("%s(err): " fmt, tag, ##__VA_ARGS__)
-#define SOC_LOGW(tag, fmt, ...) ets_printf("%s(warn): " fmt, tag, ##__VA_ARGS__)
-#define SOC_LOGI(tag, fmt, ...) ets_printf("%s(info): " fmt, tag, ##__VA_ARGS__)
-#define SOC_LOGD(tag, fmt, ...) ets_printf("%s(dbg): " fmt, tag, ##__VA_ARGS__)
-#define SOC_LOGV(tag, fmt, ...) ets_printf("%s: " fmt, tag, ##__VA_ARGS__)
+#define SOC_LOGE(tag, fmt, ...) esp_rom_printf("%s(err): " fmt, tag, ##__VA_ARGS__)
+#define SOC_LOGW(tag, fmt, ...) esp_rom_printf("%s(warn): " fmt, tag, ##__VA_ARGS__)
+#define SOC_LOGI(tag, fmt, ...) esp_rom_printf("%s(info): " fmt, tag, ##__VA_ARGS__)
+#define SOC_LOGD(tag, fmt, ...) esp_rom_printf("%s(dbg): " fmt, tag, ##__VA_ARGS__)
+#define SOC_LOGV(tag, fmt, ...) esp_rom_printf("%s: " fmt, tag, ##__VA_ARGS__)
 #endif //ESP_PLATFORM
diff --git a/components/soc/src/esp32/rtc_clk.c b/components/soc/src/esp32/rtc_clk.c
index bb991a43c6..357431544f 100644
--- a/components/soc/src/esp32/rtc_clk.c
+++ b/components/soc/src/esp32/rtc_clk.c
@@ -16,7 +16,7 @@
 #include <stdint.h>
 #include <stddef.h>
 #include <stdlib.h>
-#include "esp32/rom/ets_sys.h"
+#include "esp32/rom/ets_sys.h" // for ets_update_cpu_frequency
 #include "esp32/rom/rtc.h"
 #include "esp_rom_gpio.h"
 #include "soc/rtc.h"
@@ -187,10 +187,10 @@ void rtc_clk_32k_bootstrap(uint32_t cycle)
         while(cycle){
             gpio_ll_set_level(&GPIO, pin_32, 1);
             gpio_ll_set_level(&GPIO, pin_33, 0);
-            ets_delay_us(delay_us);
+            esp_rom_delay_us(delay_us);
             gpio_ll_set_level(&GPIO, pin_33, 1);
             gpio_ll_set_level(&GPIO, pin_32, 0);
-            ets_delay_us(delay_us);
+            esp_rom_delay_us(delay_us);
             cycle--;
         }
         // disable pins
@@ -200,7 +200,7 @@ void rtc_clk_32k_bootstrap(uint32_t cycle)
 
     CLEAR_PERI_REG_MASK(RTC_IO_XTAL_32K_PAD_REG, RTC_IO_XPD_XTAL_32K);
     SET_PERI_REG_MASK(RTC_IO_XTAL_32K_PAD_REG, RTC_IO_X32P_RUE | RTC_IO_X32N_RDE);
-    ets_delay_us(XTAL_32K_BOOTSTRAP_TIME_US);
+    esp_rom_delay_us(XTAL_32K_BOOTSTRAP_TIME_US);
 
     rtc_clk_32k_enable_common(XTAL_32K_BOOTSTRAP_DAC_VAL,
             XTAL_32K_BOOTSTRAP_DRES_VAL, XTAL_32K_BOOTSTRAP_DBIAS_VAL);
@@ -222,7 +222,7 @@ void rtc_clk_8m_enable(bool clk_8m_en, bool d256_en)
         } else {
             SET_PERI_REG_MASK(RTC_CNTL_CLK_CONF_REG, RTC_CNTL_ENB_CK8M_DIV);
         }
-        ets_delay_us(DELAY_8M_ENABLE);
+        esp_rom_delay_us(DELAY_8M_ENABLE);
     } else {
         SET_PERI_REG_MASK(RTC_CNTL_CLK_CONF_REG, RTC_CNTL_ENB_CK8M);
         REG_SET_FIELD(RTC_CNTL_TIMER1_REG, RTC_CNTL_CK8M_WAIT, RTC_CNTL_CK8M_WAIT_DEFAULT);
@@ -273,8 +273,8 @@ void rtc_clk_apll_enable(bool enable, uint32_t sdm0, uint32_t sdm1, uint32_t sdm
 
         /* wait for calibration end */
         while (!(I2C_READREG_MASK_RTC(I2C_APLL, I2C_APLL_OR_CAL_END))) {
-            /* use ets_delay_us so the RTC bus doesn't get flooded */
-            ets_delay_us(1);
+            /* use esp_rom_delay_us so the RTC bus doesn't get flooded */
+            esp_rom_delay_us(1);
         }
     }
 }
@@ -286,7 +286,7 @@ void rtc_clk_slow_freq_set(rtc_slow_freq_t slow_freq)
     REG_SET_FIELD(RTC_CNTL_CLK_CONF_REG, RTC_CNTL_DIG_XTAL32K_EN,
             (slow_freq == RTC_SLOW_FREQ_32K_XTAL) ? 1 : 0);
 
-    ets_delay_us(DELAY_SLOW_CLK_SWITCH);
+    esp_rom_delay_us(DELAY_SLOW_CLK_SWITCH);
 }
 
 rtc_slow_freq_t rtc_clk_slow_freq_get(void)
@@ -307,7 +307,7 @@ uint32_t rtc_clk_slow_freq_get_hz(void)
 void rtc_clk_fast_freq_set(rtc_fast_freq_t fast_freq)
 {
     REG_SET_FIELD(RTC_CNTL_CLK_CONF_REG, RTC_CNTL_FAST_CLK_RTC_SEL, fast_freq);
-    ets_delay_us(DELAY_FAST_CLK_SWITCH);
+    esp_rom_delay_us(DELAY_FAST_CLK_SWITCH);
 }
 
 rtc_fast_freq_t rtc_clk_fast_freq_get(void)
@@ -367,7 +367,7 @@ void rtc_clk_bbpll_configure(rtc_xtal_freq_t xtal_freq, int pll_freq)
     } else {
         /* Raise the voltage */
         REG_SET_FIELD(RTC_CNTL_REG, RTC_CNTL_DIG_DBIAS_WAK, DIG_DBIAS_240M);
-        ets_delay_us(DELAY_PLL_DBIAS_RAISE);
+        esp_rom_delay_us(DELAY_PLL_DBIAS_RAISE);
         /* Configure 480M PLL */
         switch (xtal_freq) {
             case RTC_XTAL_FREQ_40M:
@@ -415,7 +415,7 @@ void rtc_clk_bbpll_configure(rtc_xtal_freq_t xtal_freq, int pll_freq)
     I2C_WRITEREG_RTC(I2C_BBPLL, I2C_BBPLL_OC_DCUR, i2c_bbpll_dcur);
     uint32_t delay_pll_en = (rtc_clk_slow_freq_get() == RTC_SLOW_FREQ_RTC) ?
             DELAY_PLL_ENABLE_WITH_150K : DELAY_PLL_ENABLE_WITH_32K;
-    ets_delay_us(delay_pll_en);
+    esp_rom_delay_us(delay_pll_en);
     s_cur_pll_freq = pll_freq;
 }
 
diff --git a/components/soc/src/esp32/rtc_clk_init.c b/components/soc/src/esp32/rtc_clk_init.c
index 1301b32c61..a9f71c9978 100644
--- a/components/soc/src/esp32/rtc_clk_init.c
+++ b/components/soc/src/esp32/rtc_clk_init.c
@@ -16,7 +16,6 @@
 #include <stdint.h>
 #include <stddef.h>
 #include <stdlib.h>
-#include "esp32/rom/ets_sys.h"
 #include "esp32/rom/rtc.h"
 #include "esp_rom_uart.h"
 #include "soc/rtc.h"
diff --git a/components/soc/src/esp32/rtc_sleep.c b/components/soc/src/esp32/rtc_sleep.c
index 9264c5d5e0..86ec8e7423 100644
--- a/components/soc/src/esp32/rtc_sleep.c
+++ b/components/soc/src/esp32/rtc_sleep.c
@@ -23,7 +23,6 @@
 #include "soc/nrx_reg.h"
 #include "soc/fe_reg.h"
 #include "soc/rtc.h"
-#include "esp32/rom/ets_sys.h"
 
 #define MHZ (1000000)
 
diff --git a/components/soc/src/esp32/rtc_time.c b/components/soc/src/esp32/rtc_time.c
index a7dfdb2485..2b4e02b1fd 100644
--- a/components/soc/src/esp32/rtc_time.c
+++ b/components/soc/src/esp32/rtc_time.c
@@ -13,7 +13,7 @@
 // limitations under the License.
 
 #include <stdint.h>
-#include "esp32/rom/ets_sys.h"
+#include "esp_rom_sys.h"
 #include "soc/rtc.h"
 #include "soc/timer_periph.h"
 #include "soc_log.h"
@@ -87,13 +87,13 @@ static uint32_t rtc_clk_cal_internal(rtc_cal_sel_t cal_clk, uint32_t slowclk_cyc
      * TODO: if running under RTOS, and us_time_estimate > RTOS tick, use the
      * RTOS delay function.
      */
-    ets_delay_us(us_time_estimate);
+    esp_rom_delay_us(us_time_estimate);
     /* Wait for calibration to finish up to another us_time_estimate */
     int timeout_us = us_time_estimate;
     while (!GET_PERI_REG_MASK(TIMG_RTCCALICFG_REG(0), TIMG_RTC_CALI_RDY) &&
             timeout_us > 0) {
         timeout_us--;
-        ets_delay_us(1);
+        esp_rom_delay_us(1);
     }
 
     REG_SET_FIELD(RTC_CNTL_CLK_CONF_REG, RTC_CNTL_DIG_XTAL32K_EN, dig_32k_xtal_state);
@@ -144,7 +144,7 @@ uint64_t rtc_time_get(void)
 {
     SET_PERI_REG_MASK(RTC_CNTL_TIME_UPDATE_REG, RTC_CNTL_TIME_UPDATE);
     while (GET_PERI_REG_MASK(RTC_CNTL_TIME_UPDATE_REG, RTC_CNTL_TIME_VALID) == 0) {
-        ets_delay_us(1); // might take 1 RTC slowclk period, don't flood RTC bus
+        esp_rom_delay_us(1); // might take 1 RTC slowclk period, don't flood RTC bus
     }
     SET_PERI_REG_MASK(RTC_CNTL_INT_CLR_REG, RTC_CNTL_TIME_VALID_INT_CLR);
     uint64_t t = READ_PERI_REG(RTC_CNTL_TIME0_REG);
@@ -162,9 +162,9 @@ void rtc_clk_wait_for_slow_cycle(void)
      */
     REG_SET_FIELD(TIMG_RTCCALICFG_REG(0), TIMG_RTC_CALI_MAX, 0);
     REG_SET_BIT(TIMG_RTCCALICFG_REG(0), TIMG_RTC_CALI_START);
-    ets_delay_us(1); /* RDY needs some time to go low */
+    esp_rom_delay_us(1); /* RDY needs some time to go low */
     while (!GET_PERI_REG_MASK(TIMG_RTCCALICFG_REG(0), TIMG_RTC_CALI_RDY)) {
-        ets_delay_us(1);
+        esp_rom_delay_us(1);
     }
 }
 
diff --git a/components/soc/src/esp32s2/rtc_clk.c b/components/soc/src/esp32s2/rtc_clk.c
index 6c782ea980..0ebffa7a54 100644
--- a/components/soc/src/esp32s2/rtc_clk.c
+++ b/components/soc/src/esp32s2/rtc_clk.c
@@ -18,7 +18,7 @@
 #include <assert.h>
 #include <stdlib.h>
 #include "sdkconfig.h"
-#include "esp32s2/rom/ets_sys.h"
+#include "esp32s2/rom/ets_sys.h" // for ets_update_cpu_frequency
 #include "esp32s2/rom/rtc.h"
 #include "soc/rtc.h"
 #include "soc/rtc_cntl_reg.h"
@@ -101,7 +101,7 @@ void rtc_clk_8m_enable(bool clk_8m_en, bool d256_en)
         CLEAR_PERI_REG_MASK(RTC_CNTL_CLK_CONF_REG, RTC_CNTL_ENB_CK8M);
         /* no need to wait once enabled by software */
         REG_SET_FIELD(RTC_CNTL_TIMER1_REG, RTC_CNTL_CK8M_WAIT, RTC_CK8M_ENABLE_WAIT_DEFAULT);
-        ets_delay_us(DELAY_8M_ENABLE);
+        esp_rom_delay_us(DELAY_8M_ENABLE);
     } else {
         SET_PERI_REG_MASK(RTC_CNTL_CLK_CONF_REG, RTC_CNTL_ENB_CK8M);
         REG_SET_FIELD(RTC_CNTL_TIMER1_REG, RTC_CNTL_CK8M_WAIT, RTC_CNTL_CK8M_WAIT_DEFAULT);
@@ -146,8 +146,8 @@ void rtc_clk_apll_enable(bool enable, uint32_t sdm0, uint32_t sdm1, uint32_t sdm
 
         /* wait for calibration end */
         while (!(I2C_READREG_MASK_RTC(I2C_APLL, I2C_APLL_OR_CAL_END))) {
-            /* use ets_delay_us so the RTC bus doesn't get flooded */
-            ets_delay_us(1);
+            /* use esp_rom_delay_us so the RTC bus doesn't get flooded */
+            esp_rom_delay_us(1);
         }
     }
 }
@@ -190,7 +190,7 @@ void rtc_clk_slow_freq_set(rtc_slow_freq_t slow_freq)
     */
     REG_SET_FIELD(RTC_CNTL_CLK_CONF_REG, RTC_CNTL_CK8M_FORCE_PU, (slow_freq == RTC_SLOW_FREQ_8MD256) ? 1 : 0);
     rtc_clk_set_xtal_wait();
-    ets_delay_us(DELAY_SLOW_CLK_SWITCH);
+    esp_rom_delay_us(DELAY_SLOW_CLK_SWITCH);
 }
 
 rtc_slow_freq_t rtc_clk_slow_freq_get(void)
@@ -211,7 +211,7 @@ uint32_t rtc_clk_slow_freq_get_hz(void)
 void rtc_clk_fast_freq_set(rtc_fast_freq_t fast_freq)
 {
     REG_SET_FIELD(RTC_CNTL_CLK_CONF_REG, RTC_CNTL_FAST_CLK_RTC_SEL, fast_freq);
-    ets_delay_us(DELAY_FAST_CLK_SWITCH);
+    esp_rom_delay_us(DELAY_FAST_CLK_SWITCH);
 }
 
 rtc_fast_freq_t rtc_clk_fast_freq_get(void)
diff --git a/components/soc/src/esp32s2/rtc_sleep.c b/components/soc/src/esp32s2/rtc_sleep.c
index 5ca94baa7b..9ed548eaf5 100644
--- a/components/soc/src/esp32s2/rtc_sleep.c
+++ b/components/soc/src/esp32s2/rtc_sleep.c
@@ -25,7 +25,6 @@
 #include "soc/nrx_reg.h"
 #include "soc/fe_reg.h"
 #include "soc/rtc.h"
-#include "esp32s2/rom/ets_sys.h"
 
 /**
  * Configure whether certain peripherals are powered down in deep sleep
diff --git a/components/soc/src/esp32s2/rtc_time.c b/components/soc/src/esp32s2/rtc_time.c
index fa3e8fa116..19aa1ade64 100644
--- a/components/soc/src/esp32s2/rtc_time.c
+++ b/components/soc/src/esp32s2/rtc_time.c
@@ -13,7 +13,7 @@
 // limitations under the License.
 
 #include <stdint.h>
-#include "esp32s2/rom/ets_sys.h"
+#include "esp_rom_sys.h"
 #include "soc/rtc.h"
 #include "soc/rtc_cntl_reg.h"
 #include "soc/timer_group_reg.h"
@@ -92,7 +92,7 @@ uint32_t rtc_clk_cal_internal(rtc_cal_sel_t cal_clk, uint32_t slowclk_cycles)
     SET_PERI_REG_MASK(TIMG_RTCCALICFG_REG(0), TIMG_RTC_CALI_START);
 
     /* Wait for calibration to finish up to another us_time_estimate */
-    ets_delay_us(us_time_estimate);
+    esp_rom_delay_us(us_time_estimate);
     uint32_t cal_val;
     while (true) {
         if (GET_PERI_REG_MASK(TIMG_RTCCALICFG_REG(0), TIMG_RTC_CALI_RDY)) {
@@ -151,7 +151,7 @@ uint64_t rtc_time_get(void)
     SET_PERI_REG_MASK(RTC_CNTL_TIME_UPDATE_REG, RTC_CNTL_TIME_UPDATE);
 #if 0 // ToDo: Re-enable it in the future
     while (GET_PERI_REG_MASK(RTC_CNTL_TIME_UPDATE_REG, RTC_CNTL_TIME_VALID) == 0) {
-        ets_delay_us(1); // might take 1 RTC slowclk period, don't flood RTC bus
+        esp_rom_delay_us(1); // might take 1 RTC slowclk period, don't flood RTC bus
     }
     SET_PERI_REG_MASK(RTC_CNTL_INT_CLR_REG, RTC_CNTL_TIME_VALID_INT_CLR);
 #endif
@@ -181,7 +181,7 @@ void rtc_clk_wait_for_slow_cycle(void) //This function may not by useful any mor
 {
     SET_PERI_REG_MASK(RTC_CNTL_SLOW_CLK_CONF_REG, RTC_CNTL_SLOW_CLK_NEXT_EDGE);
     while (GET_PERI_REG_MASK(RTC_CNTL_SLOW_CLK_CONF_REG, RTC_CNTL_SLOW_CLK_NEXT_EDGE)) {
-        ets_delay_us(1);
+        esp_rom_delay_us(1);
     }
 }
 
diff --git a/components/soc/src/hal/cpu_hal.c b/components/soc/src/hal/cpu_hal.c
index 02898e6bf9..8873d1271d 100644
--- a/components/soc/src/hal/cpu_hal.c
+++ b/components/soc/src/hal/cpu_hal.c
@@ -15,6 +15,7 @@
 #include <stdint.h>
 #include <stdlib.h>
 
+#include "sdkconfig.h"
 #include "esp_err.h"
 
 #include "hal/cpu_hal.h"
@@ -22,13 +23,6 @@
 
 #include "soc/cpu_caps.h"
 
-#include "sdkconfig.h"
-
-#if CONFIG_IDF_TARGET_ESP32
-#include "esp32/rom/ets_sys.h"
-#elif CONFIG_IDF_TARGET_ESP32S2
-#include "esp32s2/rom/ets_sys.h"
-#endif
 
 #if SOC_CPU_BREAKPOINTS_NUM > 0
 void cpu_hal_set_breakpoint(int id, const void* addr)
diff --git a/components/soc/test/test_rtc_clk.c b/components/soc/test/test_rtc_clk.c
index 1e164e34db..0b45c1a9de 100644
--- a/components/soc/test/test_rtc_clk.c
+++ b/components/soc/test/test_rtc_clk.c
@@ -12,13 +12,14 @@
 #include "freertos/task.h"
 #include "freertos/semphr.h"
 #include "esp_rom_gpio.h"
-extern void rtc_clk_select_rtc_slow_clk(void); 
+#include "esp_rom_sys.h"
 #include "esp_rom_uart.h"
 
+extern void rtc_clk_select_rtc_slow_clk(void);
+
 #if !TEMPORARY_DISABLED_FOR_TARGETS(ESP32S2)
 
 #include "esp32/clk.h"
-#include "esp32/rom/ets_sys.h"
 
 #define CALIBRATE_ONE(cali_clk) calibrate_one(cali_clk, #cali_clk)
 
@@ -157,7 +158,7 @@ void stop_rtc_external_quartz(void){
     gpio_ll_output_enable(&GPIO, pin_33);
     gpio_ll_set_level(&GPIO, pin_32, 0);
     gpio_ll_set_level(&GPIO, pin_33, 0);
-    ets_delay_us(500000);
+    esp_rom_delay_us(500000);
     gpio_ll_output_disable(&GPIO, pin_32);
     gpio_ll_output_disable(&GPIO, pin_33);
 }
@@ -189,7 +190,7 @@ static void start_freq(rtc_slow_freq_t required_src_freq, uint32_t start_delay_m
         i++;
         printf("attempt #%d/%d...", i, COUNT_TEST);
         rtc_clk_32k_bootstrap(bootstrap_cycles);
-        ets_delay_us(start_delay_ms * 1000);
+        esp_rom_delay_us(start_delay_ms * 1000);
         rtc_clk_select_rtc_slow_clk();
         selected_src_freq = rtc_clk_slow_freq_get();
         end_time = xTaskGetTickCount() * (1000 / configTICK_RATE_HZ);
@@ -204,7 +205,7 @@ static void start_freq(rtc_slow_freq_t required_src_freq, uint32_t start_delay_m
         uint32_t fail_measure = 0;
         for (int j = 0; j < 3; ++j) {
             clk_rtc_time = esp_clk_rtc_time();
-            ets_delay_us(1000000);
+            esp_rom_delay_us(1000000);
             uint64_t delta = esp_clk_rtc_time() - clk_rtc_time;
             if (delta < 900000LL || delta > 1100000){
                 printf("FAIL");
@@ -218,7 +219,7 @@ static void start_freq(rtc_slow_freq_t required_src_freq, uint32_t start_delay_m
         }
         printf(" [calibration val = %d] \n", esp_clk_slowclk_cal_get());
         stop_rtc_external_quartz();
-        ets_delay_us(500000);
+        esp_rom_delay_us(500000);
     }
     TEST_ASSERT_MESSAGE(fail == 0, "Test failed");
     printf("Test passed successfully\n");
@@ -259,7 +260,7 @@ TEST_CASE("Test starting external RTC quartz", "[rtc_clk][test_env=UT_T1_32kXTAL
             printf("PASS\n");
         }
         stop_rtc_external_quartz();
-        ets_delay_us(100000);
+        esp_rom_delay_us(100000);
     }
     TEST_ASSERT_MESSAGE(fail == 0, "Test failed");
     printf("Test passed successfully\n");
diff --git a/components/spi_flash/esp32/spi_flash_rom_patch.c b/components/spi_flash/esp32/spi_flash_rom_patch.c
index c28510926f..0c9be8db3c 100644
--- a/components/spi_flash/esp32/spi_flash_rom_patch.c
+++ b/components/spi_flash/esp32/spi_flash_rom_patch.c
@@ -12,7 +12,6 @@
 // See the License for the specific language governing permissions and
 // limitations under the License.
 #include "sdkconfig.h"
-#include "esp32/rom/ets_sys.h"
 #include "esp32/rom/spi_flash.h"
 #include "soc/spi_periph.h"
 
diff --git a/components/spi_flash/spi_flash_os_func_app.c b/components/spi_flash/spi_flash_os_func_app.c
index 8fd4d72e25..8cd343731d 100644
--- a/components/spi_flash/spi_flash_os_func_app.c
+++ b/components/spi_flash/spi_flash_os_func_app.c
@@ -24,11 +24,7 @@
 #include "sdkconfig.h"
 #include "esp_log.h"
 
-#if CONFIG_IDF_TARGET_ESP32
-#include "esp32/rom/ets_sys.h"
-#elif CONFIG_IDF_TARGET_ESP32S2
-#include "esp32s2/rom/ets_sys.h"
-#endif
+#include "esp_rom_sys.h"
 
 #include "driver/spi_common_internal.h"
 
@@ -102,7 +98,7 @@ static IRAM_ATTR esp_err_t spi1_end(void *arg)
 
 static IRAM_ATTR esp_err_t delay_us(void *arg, unsigned us)
 {
-    ets_delay_us(us);
+    esp_rom_delay_us(us);
     return ESP_OK;
 }
 static IRAM_ATTR esp_err_t spi_flash_os_yield(void *arg)
diff --git a/components/spi_flash/spi_flash_os_func_noos.c b/components/spi_flash/spi_flash_os_func_noos.c
index 27e87f3c42..a71e5289d7 100644
--- a/components/spi_flash/spi_flash_os_func_noos.c
+++ b/components/spi_flash/spi_flash_os_func_noos.c
@@ -17,11 +17,10 @@
 #include "esp_flash.h"
 #include "esp_attr.h"
 
+#include "esp_rom_sys.h"
 #if CONFIG_IDF_TARGET_ESP32
-#include "esp32/rom/ets_sys.h"
 #include "esp32/rom/cache.h"
 #elif CONFIG_IDF_TARGET_ESP32S2
-#include "esp32s2/rom/ets_sys.h"
 #include "esp32s2/rom/cache.h"
 #endif
 
@@ -67,7 +66,7 @@ static IRAM_ATTR esp_err_t end(void *arg)
 
 static IRAM_ATTR esp_err_t delay_us(void *arg, unsigned us)
 {
-    ets_delay_us(us);
+    esp_rom_delay_us(us);
     return ESP_OK;
 }
 
diff --git a/components/spi_flash/test/test_esp_flash.c b/components/spi_flash/test/test_esp_flash.c
index 0c7e2d44fb..bcf800ebb5 100644
--- a/components/spi_flash/test/test_esp_flash.c
+++ b/components/spi_flash/test/test_esp_flash.c
@@ -21,6 +21,7 @@
 
 #include "ccomp_timer.h"
 #include "esp_rom_gpio.h"
+#include "esp_rom_sys.h"
 
 #define FUNC_SPI    1
 
@@ -444,7 +445,7 @@ void test_three_byte_read_write(esp_flash_t *chip)
     const int seed = 700;
     ESP_LOGI(TAG, "Testing chip %p...", chip);
     uint32_t offs = erase_test_region(chip, 2);
-    ets_printf("offs:%X\n", offs);
+    esp_rom_printf("offs:%X\n", offs);
 
     srand(seed);
     for (uint32_t v = 0; v < 86; v++) {
diff --git a/components/spi_flash/test/test_spi_flash.c b/components/spi_flash/test/test_spi_flash.c
index c1275f91c7..fcbf5c1bd6 100644
--- a/components/spi_flash/test/test_spi_flash.c
+++ b/components/spi_flash/test/test_spi_flash.c
@@ -12,6 +12,7 @@
 #include "test_utils.h"
 #include "ccomp_timer.h"
 #include "esp_log.h"
+#include "esp_rom_sys.h"
 
 struct flash_test_ctx {
     uint32_t offset;
@@ -133,7 +134,7 @@ static void IRAM_ATTR timer_isr(void* varg) {
     block_task_arg_t* arg = (block_task_arg_t*) varg;
     timer_group_clr_intr_status_in_isr(TIMER_GROUP_0, TIMER_0);
     timer_group_enable_alarm_in_isr(TIMER_GROUP_0, TIMER_0);
-    ets_delay_us(arg->delay_time_us);
+    esp_rom_delay_us(arg->delay_time_us);
     arg->repeat_count++;
 }
 
diff --git a/components/spiffs/test/test_spiffs.c b/components/spiffs/test/test_spiffs.c
index 34a2de8745..2166774292 100644
--- a/components/spiffs/test/test_spiffs.c
+++ b/components/spiffs/test/test_spiffs.c
@@ -29,6 +29,7 @@
 #include "freertos/queue.h"
 #include "freertos/semphr.h"
 #include "esp_partition.h"
+#include "esp_rom_sys.h"
 
 const char* spiffs_test_hello_str = "Hello, World!\n";
 const char* spiffs_test_partition_label = "flash_test";
@@ -367,7 +368,7 @@ static void read_write_task(void* param)
         if (args->write) {
             int cnt = fwrite(&val, sizeof(val), 1, f);
             if (cnt != 1) {
-                ets_printf("E(w): i=%d, cnt=%d val=%d\n\n", i, cnt, val);
+                esp_rom_printf("E(w): i=%d, cnt=%d val=%d\n\n", i, cnt, val);
                 args->result = ESP_FAIL;
                 goto close;
             }
@@ -375,7 +376,7 @@ static void read_write_task(void* param)
             uint32_t rval;
             int cnt = fread(&rval, sizeof(rval), 1, f);
             if (cnt != 1) {
-                ets_printf("E(r): i=%d, cnt=%d rval=%d\n\n", i, cnt, rval);
+                esp_rom_printf("E(r): i=%d, cnt=%d rval=%d\n\n", i, cnt, rval);
                 args->result = ESP_FAIL;
                 goto close;
             }
diff --git a/components/tinyusb/port/esp32s2/src/device_controller_driver.c b/components/tinyusb/port/esp32s2/src/device_controller_driver.c
index a3fa5f7622..fe943250e4 100644
--- a/components/tinyusb/port/esp32s2/src/device_controller_driver.c
+++ b/components/tinyusb/port/esp32s2/src/device_controller_driver.c
@@ -27,6 +27,7 @@
  */
 
 #include "device_controller_driver.h"
+#include "esp_rom_sys.h"
 
 static const char *TAG = "TUSB:DCD";
 static intr_handle_t usb_ih;
@@ -155,9 +156,9 @@ void dcd_init(uint8_t rhport)
     //C. chip 7.2.2 hack
     ESP_LOGV(TAG, "DCD init - chip ESP32-S2 beta hack");
     USB0.gotgctl = (0 << USB_BVALIDOVVAL_S); //B override value
-    ets_delay_us(20);
+    esp_rom_delay_us(20);
     USB0.gotgctl = (0 << USB_BVALIDOVVAL_S) | (1 << USB_BVALIDOVEN_S); //B override value & enable
-    ets_delay_us(20);
+    esp_rom_delay_us(20);
 #endif
 
     // C. Setting SNAKs, then connect
@@ -180,7 +181,7 @@ void dcd_init(uint8_t rhport)
                    USB_ENUMDONEMSK_M |
                    USB_RESETDETMSK_M |
                    USB_DISCONNINTMSK_M;
-    ets_delay_us(100);
+    esp_rom_delay_us(100);
 }
 
 void dcd_set_address(uint8_t rhport, uint8_t dev_addr)
diff --git a/components/ulp/test/esp32/test_ulp.c b/components/ulp/test/esp32/test_ulp.c
index 9d7377df88..2d22deed1f 100644
--- a/components/ulp/test/esp32/test_ulp.c
+++ b/components/ulp/test/esp32/test_ulp.c
@@ -33,6 +33,7 @@
 #include "driver/rtc_io.h"
 
 #include "sdkconfig.h"
+#include "esp_rom_sys.h"
 
 static void hexdump(const uint32_t* src, size_t count) {
     for (size_t i = 0; i < count; ++i) {
@@ -60,7 +61,7 @@ TEST_CASE("ulp add test", "[ulp]")
     size_t size = sizeof(program)/sizeof(ulp_insn_t);
     TEST_ASSERT_EQUAL(ESP_OK, ulp_process_macros_and_load(0, program, &size));
     TEST_ASSERT_EQUAL(ESP_OK, ulp_run(0));
-    ets_delay_us(1000);
+    esp_rom_delay_us(1000);
     hexdump(RTC_SLOW_MEM, CONFIG_ESP32_ULP_COPROC_RESERVE_MEM / 4);
     TEST_ASSERT_EQUAL(10 + 11, RTC_SLOW_MEM[18] & 0xffff);
 }
diff --git a/components/ulp/ulp.c b/components/ulp/ulp.c
index 61f5702520..f01e5b9826 100644
--- a/components/ulp/ulp.c
+++ b/components/ulp/ulp.c
@@ -33,6 +33,7 @@
 #include "soc/sens_reg.h"
 
 #include "ulp_private.h"
+#include "esp_rom_sys.h"
 
 typedef struct {
     uint32_t magic;
@@ -52,7 +53,7 @@ esp_err_t ulp_run(uint32_t entry_point)
     // disable ULP timer
     CLEAR_PERI_REG_MASK(RTC_CNTL_STATE0_REG, RTC_CNTL_ULP_CP_SLP_TIMER_EN);
     // wait for at least 1 RTC_SLOW_CLK cycle
-    ets_delay_us(10);
+    esp_rom_delay_us(10);
     // set entry point
     REG_SET_FIELD(SENS_SAR_START_FORCE_REG, SENS_PC_INIT, entry_point);
     // disable force start
@@ -69,7 +70,7 @@ esp_err_t ulp_run(uint32_t entry_point)
     // disable ULP timer
     CLEAR_PERI_REG_MASK(RTC_CNTL_ULP_CP_TIMER_REG, RTC_CNTL_ULP_CP_SLP_TIMER_EN);
     // wait for at least 1 RTC_SLOW_CLK cycle
-    ets_delay_us(10);
+    esp_rom_delay_us(10);
     // set entry point  
     REG_SET_FIELD(RTC_CNTL_ULP_CP_TIMER_REG, RTC_CNTL_ULP_CP_PC_INIT, entry_point);
     SET_PERI_REG_MASK(RTC_CNTL_COCPU_CTRL_REG, RTC_CNTL_COCPU_SEL);         // Select ULP_TIMER trigger target for ULP.
diff --git a/components/ulp/ulp_riscv.c b/components/ulp/ulp_riscv.c
index 69e6325ae4..880688d845 100644
--- a/components/ulp/ulp_riscv.c
+++ b/components/ulp/ulp_riscv.c
@@ -27,20 +27,21 @@
 #include "soc/rtc_cntl_reg.h"
 #include "soc/sens_reg.h"
 #include "ulp_private.h"
+#include "esp_rom_sys.h"
 
 esp_err_t ulp_riscv_run(void)
 {
     /* Reset COCPU when power on. */
     SET_PERI_REG_MASK(RTC_CNTL_COCPU_CTRL_REG, RTC_CNTL_COCPU_CLK_FO);
     SET_PERI_REG_MASK(RTC_CNTL_COCPU_CTRL_REG, RTC_CNTL_COCPU_SHUT_RESET_EN);
-    ets_delay_us(20);
+    esp_rom_delay_us(20);
     CLEAR_PERI_REG_MASK(RTC_CNTL_COCPU_CTRL_REG, RTC_CNTL_COCPU_CLK_FO);
     CLEAR_PERI_REG_MASK(RTC_CNTL_COCPU_CTRL_REG, RTC_CNTL_COCPU_SHUT_RESET_EN);
 
     /* Disable ULP timer */
     CLEAR_PERI_REG_MASK(RTC_CNTL_ULP_CP_TIMER_REG, RTC_CNTL_ULP_CP_SLP_TIMER_EN);
     /* wait for at least 1 RTC_SLOW_CLK cycle */
-    ets_delay_us(20);
+    esp_rom_delay_us(20);
     /* Select RISC-V as the ULP_TIMER trigger target. */
     CLEAR_PERI_REG_MASK(RTC_CNTL_COCPU_CTRL_REG, RTC_CNTL_COCPU_SEL);
     /* Select ULP_TIMER sleep trigger source. 1: REG_COCPU_DONE; 0: ULP END.*/
diff --git a/components/wear_levelling/test/test_wl.c b/components/wear_levelling/test/test_wl.c
index bc3699c811..93a45083d4 100644
--- a/components/wear_levelling/test/test_wl.c
+++ b/components/wear_levelling/test/test_wl.c
@@ -13,6 +13,7 @@
 #include "esp32s2/clk.h"
 #endif
 #include "soc/cpu.h"
+#include "esp_rom_sys.h"
 
 TEST_CASE("wl_unmount doesn't leak memory", "[wear_levelling]")
 {
@@ -112,7 +113,7 @@ static void read_write_task(void* param)
             uint32_t rval;
             err = wl_read(args->handle, args->offset + i * sizeof(rval), &rval, sizeof(rval));
             if (err != ESP_OK || rval != val) {
-                ets_printf("E: i=%d, cnt=%d rval=%d val=%d\n\n", i, args->word_count, rval, val);
+                esp_rom_printf("E: i=%d, cnt=%d rval=%d val=%d\n\n", i, args->word_count, rval, val);
                 args->result = ESP_FAIL;
                 goto done;
             }
diff --git a/components/wpa_supplicant/port/include/os.h b/components/wpa_supplicant/port/include/os.h
index 39fda21c47..f39fc59984 100644
--- a/components/wpa_supplicant/port/include/os.h
+++ b/components/wpa_supplicant/port/include/os.h
@@ -19,7 +19,6 @@
 #include <stdio.h>
 #include <stdlib.h>
 #include "esp_err.h"
-// #include "esp32/rom/ets_sys.h"
 
 typedef time_t os_time_t;
 
diff --git a/components/wpa_supplicant/src/rsn_supp/wpa.c b/components/wpa_supplicant/src/rsn_supp/wpa.c
index 3455326b7a..064bd59a6f 100644
--- a/components/wpa_supplicant/src/rsn_supp/wpa.c
+++ b/components/wpa_supplicant/src/rsn_supp/wpa.c
@@ -28,6 +28,7 @@
 #include "crypto/sha1.h"
 #include "crypto/aes_wrap.h"
 #include "crypto/ccmp.h"
+#include "esp_rom_sys.h"
 
 /**
  * eapol_sm_notify_eap_success - Notification of external EAP success trigger
@@ -2292,7 +2293,7 @@ int wpa_michael_mic_failure(u16 isunicast)
          * Need to wait for completion of request frame. We do not get
          * any callback for the message completion, so just wait a
          * short while and hope for the best. */
-         ets_delay_us(10000);
+         esp_rom_delay_us(10000);
 
         /*deauthenticate AP*/ 
         
diff --git a/components/wpa_supplicant/src/rsn_supp/wpa.h b/components/wpa_supplicant/src/rsn_supp/wpa.h
index 57905052a2..e6356be62b 100644
--- a/components/wpa_supplicant/src/rsn_supp/wpa.h
+++ b/components/wpa_supplicant/src/rsn_supp/wpa.h
@@ -18,7 +18,7 @@
 #include "sdkconfig.h"
 
 #ifdef CONFIG_IDF_TARGET_ESP32
-#include "esp32/rom/ets_sys.h"
+#include "esp32/rom/ets_sys.h" // will be removed in idf v5.0
 #elif CONFIG_IDF_TARGET_ESP32S2
 #include "esp32s2/rom/ets_sys.h"
 #endif
diff --git a/components/wpa_supplicant/src/utils/includes.h b/components/wpa_supplicant/src/utils/includes.h
index 3b03326f62..2d84d57333 100644
--- a/components/wpa_supplicant/src/utils/includes.h
+++ b/components/wpa_supplicant/src/utils/includes.h
@@ -55,7 +55,7 @@
 
 #else
 #if CONFIG_IDF_TARGET_ESP32
-#include "esp32/rom/ets_sys.h"
+#include "esp32/rom/ets_sys.h" // will be removed in idf v5.0
 #elif CONFIG_IDF_TARGET_ESP32S2
 #include "esp32s2/rom/ets_sys.h"
 #endif
diff --git a/components/wpa_supplicant/src/wps/wps.h b/components/wpa_supplicant/src/wps/wps.h
index 9f31a8e637..d66b42218a 100644
--- a/components/wpa_supplicant/src/wps/wps.h
+++ b/components/wpa_supplicant/src/wps/wps.h
@@ -10,7 +10,7 @@
 #define WPS_H
 
 #if CONFIG_IDF_TARGET_ESP32
-#include "esp32/rom/ets_sys.h"
+#include "esp32/rom/ets_sys.h" // will be removed in idf v5.0
 #elif CONFIG_IDF_TARGET_ESP32S2
 #include "esp32s2/rom/ets_sys.h"
 #endif
diff --git a/components/wpa_supplicant/src/wps/wps_enrollee.c b/components/wpa_supplicant/src/wps/wps_enrollee.c
index daaadd6400..a124713e45 100644
--- a/components/wpa_supplicant/src/wps/wps_enrollee.c
+++ b/components/wpa_supplicant/src/wps/wps_enrollee.c
@@ -6,7 +6,7 @@
  * See README for more details.
  */
 #if CONFIG_IDF_TARGET_ESP32
-#include "esp32/rom/ets_sys.h"
+#include "esp32/rom/ets_sys.h" // for ets_timer_disarm
 #endif
 #include "utils/includes.h"
 
diff --git a/components/xtensa/debug_helpers.c b/components/xtensa/debug_helpers.c
index 788f2b8c14..786c1bbfac 100644
--- a/components/xtensa/debug_helpers.c
+++ b/components/xtensa/debug_helpers.c
@@ -22,11 +22,7 @@
 
 #include "sdkconfig.h"
 
-#if CONFIG_IDF_TARGET_ESP32
-#include "esp32/rom/ets_sys.h"
-#elif CONFIG_IDF_TARGET_ESP32S2
-#include "esp32s2/rom/ets_sys.h"
-#endif
+#include "esp_rom_sys.h"
 
 bool IRAM_ATTR esp_backtrace_get_next_frame(esp_backtrace_frame_t *frame)
 {
@@ -51,8 +47,8 @@ esp_err_t IRAM_ATTR esp_backtrace_print(int depth)
     esp_backtrace_frame_t stk_frame;
     esp_backtrace_get_start(&(stk_frame.pc), &(stk_frame.sp), &(stk_frame.next_pc));
     //esp_cpu_get_backtrace_start(&stk_frame);
-    ets_printf("\r\n\r\nBacktrace:");
-    ets_printf("0x%08X:0x%08X ", esp_cpu_process_stack_pc(stk_frame.pc), stk_frame.sp);
+    esp_rom_printf("\r\n\r\nBacktrace:");
+    esp_rom_printf("0x%08X:0x%08X ", esp_cpu_process_stack_pc(stk_frame.pc), stk_frame.sp);
 
     //Check if first frame is valid
     bool corrupted = (esp_stack_ptr_is_sane(stk_frame.sp) &&
@@ -64,17 +60,17 @@ esp_err_t IRAM_ATTR esp_backtrace_print(int depth)
         if (!esp_backtrace_get_next_frame(&stk_frame)) {    //Get previous stack frame
             corrupted = true;
         }
-        ets_printf("0x%08X:0x%08X ", esp_cpu_process_stack_pc(stk_frame.pc), stk_frame.sp);
+        esp_rom_printf("0x%08X:0x%08X ", esp_cpu_process_stack_pc(stk_frame.pc), stk_frame.sp);
     }
 
     //Print backtrace termination marker
     esp_err_t ret = ESP_OK;
     if (corrupted) {
-        ets_printf(" |<-CORRUPTED");
+        esp_rom_printf(" |<-CORRUPTED");
         ret =  ESP_FAIL;
     } else if (stk_frame.next_pc != 0) {    //Backtrace continues
-        ets_printf(" |<-CONTINUES");
+        esp_rom_printf(" |<-CONTINUES");
     }
-    ets_printf("\r\n\r\n");
+    esp_rom_printf("\r\n\r\n");
     return ret;
 }
diff --git a/components/xtensa/include/esp_attr.h b/components/xtensa/include/esp_attr.h
index 1c3c766eeb..2b59f16e95 100644
--- a/components/xtensa/include/esp_attr.h
+++ b/components/xtensa/include/esp_attr.h
@@ -54,7 +54,7 @@
 #define FORCE_INLINE_ATTR static inline __attribute__((always_inline))
 
 // Forces a string into DRAM instead of flash
-// Use as ets_printf(DRAM_STR("Hello world!\n"));
+// Use as esp_rom_printf(DRAM_STR("Hello world!\n"));
 #define DRAM_STR(str) (__extension__({static const DRAM_ATTR char __c[] = (str); (const char *)&__c;}))
 
 // Forces code into RTC fast memory. See "docs/deep-sleep-stub.rst"
diff --git a/docs/en/api-guides/deep-sleep-stub.rst b/docs/en/api-guides/deep-sleep-stub.rst
index 28732497e3..3c6cf862d1 100644
--- a/docs/en/api-guides/deep-sleep-stub.rst
+++ b/docs/en/api-guides/deep-sleep-stub.rst
@@ -66,7 +66,7 @@ The first way is to use the ``RTC_DATA_ATTR`` and ``RTC_RODATA_ATTR`` to specify
     void RTC_IRAM_ATTR esp_wake_deep_sleep(void) {
         esp_default_wake_deep_sleep();
         static RTC_RODATA_ATTR const char fmt_str[] = "Wake count %d\n";
-        ets_printf(fmt_str, wake_count++);
+        esp_rom_printf(fmt_str, wake_count++);
     }
 
 .. only:: esp32
@@ -85,7 +85,7 @@ For example, the equivalent example in ``rtc_wake_stub_counter.c``::
 
     void RTC_IRAM_ATTR esp_wake_deep_sleep(void) {
         esp_default_wake_deep_sleep();
-        ets_printf("Wake count %d\n", wake_count++);
+        esp_rom_printf("Wake count %d\n", wake_count++);
     }
 
 The second way is a better option if you need to use strings, or write other more complex code.
diff --git a/docs/en/api-guides/usb-console.rst b/docs/en/api-guides/usb-console.rst
index 7c557fae13..fdc8f64b11 100644
--- a/docs/en/api-guides/usb-console.rst
+++ b/docs/en/api-guides/usb-console.rst
@@ -93,7 +93,7 @@ There are several limitations to the USB console feature. These may or may not b
 
 4. USB CDC driver reserves some amount of RAM and increases application code size. Keep this in mind if trying to optimize application memory usage.
 
-5. By default, the low-level ``ets_printf`` feature and ``ESP_EARLY_LOG`` are disabled when USB CDC is used. These can be enabled using :ref:`CONFIG_ESP_CONSOLE_USB_CDC_SUPPORT_ETS_PRINTF` option. With this option enabled, ``ets_printf`` can be used, at the expense of increased IRAM usage. Keep in mind that the cost of ``ets_printf`` and ``ESP_EARLY_LOG`` over USB CDC is significantly higher than over UART. This makes these logging mechanisms much less suitable for "printf debugging", especially in the interrupt handlers.
+5. By default, the low-level ``esp_rom_printf`` feature and ``ESP_EARLY_LOG`` are disabled when USB CDC is used. These can be enabled using :ref:`CONFIG_ESP_CONSOLE_USB_CDC_SUPPORT_ETS_PRINTF` option. With this option enabled, ``esp_rom_printf`` can be used, at the expense of increased IRAM usage. Keep in mind that the cost of ``esp_rom_printf`` and ``ESP_EARLY_LOG`` over USB CDC is significantly higher than over UART. This makes these logging mechanisms much less suitable for "printf debugging", especially in the interrupt handlers.
 
 6. If you are developing an application which uses the USB peripheral with the TinyUSB stack, this USB Console feature can not be used. This is mainly due to the following reasons:
 
diff --git a/examples/bluetooth/esp_ble_mesh/common_components/button/button.c b/examples/bluetooth/esp_ble_mesh/common_components/button/button.c
index ac391a5c3f..144ec057b3 100644
--- a/examples/bluetooth/esp_ble_mesh/common_components/button/button.c
+++ b/examples/bluetooth/esp_ble_mesh/common_components/button/button.c
@@ -20,6 +20,7 @@
 #include "driver/gpio.h"
 #include "iot_button.h"
 #include "esp_timer.h"
+#include "esp_rom_sys.h"
 
 #define USE_ESP_TIMER   CONFIG_BUTTON_USE_ESP_TIMER
 #if USE_ESP_TIMER
@@ -275,7 +276,7 @@ esp_err_t iot_button_delete(button_handle_t btn_handle)
 button_handle_t iot_button_create(gpio_num_t gpio_num, button_active_t active_level)
 {
     #if USE_ESP_TIMER
-    ets_printf("use esp timer !!!\n");
+    esp_rom_printf("use esp timer !!!\n");
     esp_timer_init();
     #endif
 
diff --git a/examples/ethernet/enc28j60/main/esp_eth_mac_enc28j60.c b/examples/ethernet/enc28j60/main/esp_eth_mac_enc28j60.c
index 2a01e4d7aa..339df3df3b 100644
--- a/examples/ethernet/enc28j60/main/esp_eth_mac_enc28j60.c
+++ b/examples/ethernet/enc28j60/main/esp_eth_mac_enc28j60.c
@@ -21,6 +21,7 @@
 #include "esp_system.h"
 #include "esp_intr_alloc.h"
 #include "esp_heap_caps.h"
+#include "esp_rom_sys.h"
 #include "freertos/FreeRTOS.h"
 #include "freertos/task.h"
 #include "freertos/semphr.h"
@@ -300,7 +301,7 @@ static esp_err_t enc28j60_do_reset(emac_enc28j60_t *emac)
     }
 
     // After reset, wait at least 1ms for the device to be ready
-    ets_delay_us(ENC28J60_SYSTEM_RESET_ADDITION_TIME_US);
+    esp_rom_delay_us(ENC28J60_SYSTEM_RESET_ADDITION_TIME_US);
 
     return ret;
 }
@@ -392,7 +393,7 @@ static esp_err_t emac_enc28j60_write_phy_reg(esp_eth_mac_t *mac, uint32_t phy_ad
     /* polling the busy flag */
     uint32_t to = 0;
     do {
-        ets_delay_us(100);
+        esp_rom_delay_us(100);
         MAC_CHECK(enc28j60_register_read(emac, ENC28J60_MISTAT, &mii_status) == ESP_OK,
                   "read MISTAT failed", out, ESP_FAIL);
         to += 100;
@@ -431,7 +432,7 @@ static esp_err_t emac_enc28j60_read_phy_reg(esp_eth_mac_t *mac, uint32_t phy_add
     /* polling the busy flag */
     uint32_t to = 0;
     do {
-        ets_delay_us(100);
+        esp_rom_delay_us(100);
         MAC_CHECK(enc28j60_register_read(emac, ENC28J60_MISTAT, &mii_status) == ESP_OK,
                   "read MISTAT failed", out, ESP_FAIL);
         to += 100;
diff --git a/examples/peripherals/i2s_adc_dac/main/app_main.c b/examples/peripherals/i2s_adc_dac/main/app_main.c
index e5ebcd8eba..8d5f20db86 100644
--- a/examples/peripherals/i2s_adc_dac/main/app_main.c
+++ b/examples/peripherals/i2s_adc_dac/main/app_main.c
@@ -10,6 +10,7 @@
 #include "driver/adc.h"
 #include "audio_example_file.h"
 #include "esp_adc_cal.h"
+#include "esp_rom_sys.h"
 
 #if CONFIG_IDF_TARGET_ESP32
 
@@ -222,7 +223,7 @@ void example_i2s_adc_dac(void*arg)
         //save original data from I2S(ADC) into flash.
         esp_partition_write(data_partition, flash_wr_size, i2s_read_buff, i2s_read_len);
         flash_wr_size += i2s_read_len;
-        ets_printf("Sound recording %u%%\n", flash_wr_size * 100 / FLASH_RECORD_SIZE);
+        esp_rom_printf("Sound recording %u%%\n", flash_wr_size * 100 / FLASH_RECORD_SIZE);
     }
     i2s_adc_disable(EXAMPLE_I2S_NUM);
     free(i2s_read_buff);
diff --git a/examples/peripherals/twai/twai_alert_and_recovery/main/twai_alert_and_recovery_example_main.c b/examples/peripherals/twai/twai_alert_and_recovery/main/twai_alert_and_recovery_example_main.c
index 23c48509ff..1fb5e5fd22 100644
--- a/examples/peripherals/twai/twai_alert_and_recovery/main/twai_alert_and_recovery_example_main.c
+++ b/examples/peripherals/twai/twai_alert_and_recovery/main/twai_alert_and_recovery_example_main.c
@@ -28,6 +28,7 @@
 #include "driver/gpio.h"
 #include "driver/twai.h"
 #include "esp_rom_gpio.h"
+#include "esp_rom_sys.h"
 
 /* --------------------- Definitions and static variables ------------------ */
 //Example Configuration
@@ -70,9 +71,9 @@ static void tx_task(void *arg)
         }
         if (trigger_tx_error) {
             //Trigger a bit error in transmission by inverting GPIO
-            ets_delay_us(ERR_DELAY_US);     //Wait until arbitration phase is over
+            esp_rom_delay_us(ERR_DELAY_US);     //Wait until arbitration phase is over
             invert_tx_bits(true);           //Trigger bit error for a few bits
-            ets_delay_us(ERR_PERIOD_US);
+            esp_rom_delay_us(ERR_PERIOD_US);
             invert_tx_bits(false);
         }
         vTaskDelay(pdMS_TO_TICKS(50));
diff --git a/tools/unit-test-app/components/test_utils/ref_clock.c b/tools/unit-test-app/components/test_utils/ref_clock.c
index 232a47b4ea..c03751de35 100644
--- a/tools/unit-test-app/components/test_utils/ref_clock.c
+++ b/tools/unit-test-app/components/test_utils/ref_clock.c
@@ -42,6 +42,7 @@
 #include "freertos/FreeRTOS.h"
 #include "driver/periph_ctrl.h"
 #include "esp_rom_gpio.h"
+#include "esp_rom_sys.h"
 #include "sdkconfig.h"
 
 /* Select which RMT and PCNT channels, and GPIO to use */
@@ -127,7 +128,7 @@ void ref_clock_init()
     pcnt_ll_counter_resume(s_pcnt.dev, REF_CLOCK_PCNT_UNIT);
     pcnt_ll_counter_clear(s_pcnt.dev, REF_CLOCK_PCNT_UNIT);
 
-    ets_delay_us(10000);
+    esp_rom_delay_us(10000);
 
     // Enable interrupt
     s_milliseconds = 0;