kopia lustrzana https://github.com/espressif/esp-idf
System: fix RTCFAST section alignment
This bugfix contains 3 fixes: 1. .rtc_dummy section is removed (not needed for C3) 2. .rtc_text section is padded with 16B for possible CPU prefetch 3. .rtc_text section is aligned to 4B boundary to comply with PMS Memprot requirementspull/8142/head
rodzic
384df18770
commit
16891e7a6c
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@ -16,26 +16,20 @@ SECTIONS
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.rtc.text :
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{
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. = ALIGN(4);
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_rtc_fast_start = ABSOLUTE(.);
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mapping[rtc_text]
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*rtc_wake_stub*.*(.literal .text .literal.* .text.*)
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*(.rtc_text_end_test)
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/* 16B padding for possible CPU prefetch and 4B alignment for PMS split lines */
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. += _esp_memprot_prefetch_pad_size;
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. = ALIGN(4);
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_rtc_text_end = ABSOLUTE(.);
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} > rtc_iram_seg
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/**
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* This section is required to skip rtc.text area because rtc_iram_seg and
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* rtc_data_seg are reflect the same address space on different buses.
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*/
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.rtc.dummy :
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{
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_rtc_dummy_start = ABSOLUTE(.);
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_rtc_fast_start = ABSOLUTE(.);
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. = SIZEOF(.rtc.text);
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_rtc_dummy_end = ABSOLUTE(.);
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} > rtc_data_seg
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/**
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* This section located in RTC FAST Memory area.
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* It holds data marked with RTC_FAST_ATTR attribute.
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@ -375,11 +369,11 @@ SECTIONS
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/* Marks the end of IRAM code segment */
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.iram0.text_end (NOLOAD) :
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{
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/* iram_end_test section exists for use by Memprot unit tests only */
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*(.iram_end_test)
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/* ESP32-C3 memprot requires 16B padding for possible CPU prefetch and 512B alignment for PMS split lines */
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. += _esp_memprot_prefetch_pad_size;
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. = ALIGN(_esp_memprot_align_size);
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/* iram_end_test section exists for use by Memprot unit tests only */
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*(.iram_end_test)
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_iram_text_end = ABSOLUTE(.);
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} > iram0_0_seg
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