soc/rtc: wait for frequency switch to complete

The fast path of CPU frequency switch function, used in DFS, was not
waiting for the frequency switch to complete when switching from XTAL
to PLL. This resulted in incorrect reads from peripherals on APB,
where two consecutive reads could return the same value. For example,
in esp_timer, read of FRC_COUNT_REG would return same value as the
preceding read of FRC_ALARM_REG, causing time to jump by the value of
FRC_ALARM_REG / apb_freq_mhz.

components/soc/esp32/rtc_clk.c

@@ -402,6 +402,7 @@ void rtc_clk_cpu_freq_set_fast(rtc_cpu_freq_t cpu_freq)
         rtc_clk_cpu_freq_to_xtal();
     } else if (cpu_freq > RTC_CPU_FREQ_XTAL) {
         rtc_clk_cpu_freq_to_pll(cpu_freq);
+        rtc_clk_wait_for_slow_cycle();
     }
 }