Merge branch 'feature/get_chip_ver' into 'master'

add API to get chip info

This change adds an API to get chip info, such as chip model, enabled capabilities, size of embedded flash, silicon revision.

Hello_world example is modified to print out the information about the chip. The example is also simplified by moving all code into the main task.

Ref TW12031.

See merge request !549
pull/594/head
Ivan Grokhotkov 2017-05-11 12:05:55 +08:00
commit 15a6145961
4 zmienionych plików z 112 dodań i 14 usunięć

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@ -221,6 +221,38 @@ const char* system_get_sdk_version(void) __attribute__ ((deprecated));
*/
const char* esp_get_idf_version(void);
/**
* @brief Chip models
*/
typedef enum {
CHIP_ESP32 = 1, //!< ESP32
} esp_chip_model_t;
/**
* Chip feature flags, used in esp_chip_info_t
*/
#define CHIP_FEATURE_EMB_FLASH BIT(0)
#define CHIP_FEATURE_WIFI_BGN BIT(1)
#define CHIP_FEATURE_BLE BIT(4)
#define CHIP_FEATURE_BT BIT(5)
/**
* @brief The structure represents information about the chip
*/
typedef struct {
esp_chip_model_t model; //!< chip model, one of esp_chip_model_t
uint32_t features; //!< bit mask of CHIP_FEATURE_x feature flags
uint8_t cores; //!< number of CPU cores
uint8_t revision; //!< chip revision number
} esp_chip_info_t;
/**
* @brief Fill an esp_chip_info_t structure with information about the chip
* @param[out] out_info structure to be filled
*/
void esp_chip_info(esp_chip_info_t* out_info);
#ifdef __cplusplus
}
#endif

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@ -337,3 +337,31 @@ const char* esp_get_idf_version(void)
return IDF_VER;
}
static void get_chip_info_esp32(esp_chip_info_t* out_info)
{
uint32_t reg = REG_READ(EFUSE_BLK0_RDATA3_REG);
memset(out_info, 0, sizeof(*out_info));
if ((reg & EFUSE_RD_CHIP_VER_REV1_M) != 0) {
out_info->revision = 1;
}
if ((reg & EFUSE_RD_CHIP_VER_DIS_APP_CPU_M) == 0) {
out_info->cores = 2;
} else {
out_info->cores = 1;
}
out_info->features = CHIP_FEATURE_WIFI_BGN;
if ((reg & EFUSE_RD_CHIP_VER_DIS_BT_M) == 0) {
out_info->features |= CHIP_FEATURE_BT | CHIP_FEATURE_BLE;
}
if (((reg & EFUSE_RD_CHIP_VER_PKG_M) >> EFUSE_RD_CHIP_VER_PKG_S) ==
EFUSE_RD_CHIP_VER_PKG_ESP32D2WDQ5) {
out_info->features |= CHIP_FEATURE_EMB_FLASH;
}
}
void esp_chip_info(esp_chip_info_t* out_info)
{
// Only ESP32 is supported now, in the future call one of the
// chip-specific functions based on sdkconfig choice
return get_chip_info_esp32(out_info);
}

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@ -79,12 +79,27 @@
#define EFUSE_RD_WIFI_MAC_CRC_HIGH_S 0
#define EFUSE_BLK0_RDATA3_REG (DR_REG_EFUSE_BASE + 0x00c)
/* EFUSE_RD_CHIP_VER_RESERVE : RO ;bitpos:[16:9] ;default: 8'b0 ; */
/* EFUSE_RD_CHIP_VER_REV1 : R/W ;bitpos:[16] ;default: 1'b0 ; */
/*description: bit is set to 1 for rev1 silicon*/
#define EFUSE_RD_CHIP_VER_REV1 (BIT(15))
#define EFUSE_RD_CHIP_VER_REV1_M ((EFUSE_RD_CHIP_VER_REV1_V)<<(EFUSE_RD_CHIP_VER_REV1_S))
#define EFUSE_RD_CHIP_VER_REV1_V 0x1
#define EFUSE_RD_CHIP_VER_REV1_S 15
/* EFUSE_RD_CHIP_VER_RESERVE : R/W ;bitpos:[15:12] ;default: 3'b0 ; */
/*description: */
#define EFUSE_RD_CHIP_VER_RESERVE 0x000000FF
#define EFUSE_RD_CHIP_VER_RESERVE 0x00000007
#define EFUSE_RD_CHIP_VER_RESERVE_M ((EFUSE_RD_CHIP_VER_RESERVE_V)<<(EFUSE_RD_CHIP_VER_RESERVE_S))
#define EFUSE_RD_CHIP_VER_RESERVE_V 0xFF
#define EFUSE_RD_CHIP_VER_RESERVE_S 9
#define EFUSE_RD_CHIP_VER_RESERVE_V 0x7
#define EFUSE_RD_CHIP_VER_RESERVE_S 12
/* EFUSE_RD_CHIP_VER : R/W ;bitpos:[11:9] ;default: 3'b0 ; */
/*description: chip package */
#define EFUSE_RD_CHIP_VER 0x00000007
#define EFUSE_RD_CHIP_VER_PKG_M ((EFUSE_RD_CHIP_VER_PKG_V)<<(EFUSE_RD_CHIP_VER_PKG_S))
#define EFUSE_RD_CHIP_VER_PKG_V 0x7
#define EFUSE_RD_CHIP_VER_PKG_S 9
#define EFUSE_RD_CHIP_VER_PKG_ESP32D0WDQ6 0
#define EFUSE_RD_CHIP_VER_PKG_ESP32D0WDQ5 1
#define EFUSE_RD_CHIP_VER_PKG_ESP32D2WDQ5 2
/* EFUSE_RD_SPI_PAD_CONFIG_HD : RO ;bitpos:[8:4] ;default: 5'b0 ; */
/*description: read for SPI_pad_config_hd*/
#define EFUSE_RD_SPI_PAD_CONFIG_HD 0x0000001F
@ -297,12 +312,24 @@
#define EFUSE_WIFI_MAC_CRC_HIGH_S 0
#define EFUSE_BLK0_WDATA3_REG (DR_REG_EFUSE_BASE + 0x028)
/* EFUSE_CHIP_VER_RESERVE : R/W ;bitpos:[16:9] ;default: 8'b0 ; */
/* EFUSE_CHIP_VER_REV1 : R/W ;bitpos:[16] ;default: 1'b0 ; */
/*description: */
#define EFUSE_CHIP_VER_RESERVE 0x000000FF
#define EFUSE_CHIP_VER_REV1 (BIT(15))
#define EFUSE_CHIP_VER_REV1_M ((EFUSE_CHIP_VER_REV1_V)<<(EFUSE_CHIP_VER_REV1_S))
#define EFUSE_CHIP_VER_REV1_V 0x1
#define EFUSE_CHIP_VER_REV1_S 15
/* EFUSE_CHIP_VER_RESERVE : R/W ;bitpos:[15:12] ;default: 3'b0 ; */
/*description: */
#define EFUSE_CHIP_VER_RESERVE 0x00000007
#define EFUSE_CHIP_VER_RESERVE_M ((EFUSE_CHIP_VER_RESERVE_V)<<(EFUSE_CHIP_VER_RESERVE_S))
#define EFUSE_CHIP_VER_RESERVE_V 0xFF
#define EFUSE_CHIP_VER_RESERVE_S 9
#define EFUSE_CHIP_VER_RESERVE_V 0x7
#define EFUSE_CHIP_VER_RESERVE_S 12
/* EFUSE_CHIP_VER : R/W ;bitpos:[11:9] ;default: 3'b0 ; */
/*description: */
#define EFUSE_CHIP_VER_PKG 0x00000007
#define EFUSE_CHIP_VER_PKG_M ((EFUSE_CHIP_VER_PKG_V)<<(EFUSE_CHIP_VER_PKG_S))
#define EFUSE_CHIP_VER_PKG_V 0x7
#define EFUSE_CHIP_VER_PKG_S 9
/* EFUSE_SPI_PAD_CONFIG_HD : R/W ;bitpos:[8:4] ;default: 5'b0 ; */
/*description: program for SPI_pad_config_hd*/
#define EFUSE_SPI_PAD_CONFIG_HD 0x0000001F

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@ -10,10 +10,26 @@
#include "freertos/FreeRTOS.h"
#include "freertos/task.h"
#include "esp_system.h"
#include "esp_spi_flash.h"
void hello_task(void *pvParameter)
void app_main()
{
printf("Hello world!\n");
/* Print chip information */
esp_chip_info_t chip_info;
esp_chip_info(&chip_info);
printf("This is ESP32 chip with %d CPU cores, WiFi%s%s, ",
chip_info.cores,
(chip_info.features & CHIP_FEATURE_BT) ? "/BT" : "",
(chip_info.features & CHIP_FEATURE_BLE) ? "/BLE" : "");
printf("silicon revision %d, ", chip_info.revision);
printf("%dMB %s flash\n", spi_flash_get_chip_size() / (1024 * 1024),
(chip_info.features & CHIP_FEATURE_EMB_FLASH) ? "embedded" : "external");
for (int i = 10; i >= 0; i--) {
printf("Restarting in %d seconds...\n", i);
vTaskDelay(1000 / portTICK_PERIOD_MS);
@ -22,8 +38,3 @@ void hello_task(void *pvParameter)
fflush(stdout);
esp_restart();
}
void app_main()
{
xTaskCreate(&hello_task, "hello_task", 2048, NULL, 5, NULL);
}