kopia lustrzana https://github.com/espressif/esp-idf
mbedtls: Remove "unsafe" warning, enable AES by default & make SHA/MPI optional
rodzic
afb6119504
commit
0ea4cd67dd
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@ -31,26 +31,18 @@ config MBEDTLS_DEBUG
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at runtime in order to enable mbedTLS debug output via the ESP
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log mechanism.
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config MBEDTLS_UNSAFE_ACCELERATION
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bool "Allow buggy hardware acceleration features"
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depends on !FREERTOS_UNICORE
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default n
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help
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A bug currently prevents dual cores & crypto hardware acceleration from being used together.
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Enable this option to allow hardware acceleration anyhow (note that invalid results or crashes may occur.)
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config MBEDTLS_HARDWARE_AES
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bool "Enable hardware AES acceleration"
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depends on MBEDTLS_UNSAFE_ACCELERATION || FREERTOS_UNICORE
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default y
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help
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Enable hardware accelerated AES encryption & decryption.
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Note that if the ESP32 CPU is running at 240MHz, hardware AES does not
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offer any speed boost over software AES.
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config MBEDTLS_HARDWARE_MPI
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bool "Enable hardware MPI (bignum) acceleration"
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depends on MBEDTLS_UNSAFE_ACCELERATION || FREERTOS_UNICORE
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default y
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default n
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help
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Enable hardware accelerated multiple precision integer operations.
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@ -62,7 +54,7 @@ config MBEDTLS_HARDWARE_MPI
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config MBEDTLS_MPI_USE_INTERRUPT
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bool "Use interrupt for MPI operations"
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depends on MBEDTLS_HARDWARE_MPI
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default y
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default n
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help
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Use an interrupt to coordinate MPI operations.
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@ -71,16 +63,18 @@ config MBEDTLS_MPI_USE_INTERRUPT
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config MBEDTLS_HARDWARE_SHA
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bool "Enable hardware SHA acceleration"
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depends on MBEDTLS_UNSAFE_ACCELERATION || FREERTOS_UNICORE
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default y
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default n
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help
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Enable hardware accelerated SHA1, SHA256, SHA384 & SHA512 in mbedTLS.
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Due to a hardware limitation, hardware acceleration is only
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guaranteed if SHA digests are calculated one at a time. If more
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than one SHA digest is calculated at the same time, only will
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than one SHA digest is calculated at the same time, one will
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be calculated fully in hardware and the rest will be calculated
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(at least partially calculated) in software.
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(at least partially calculated) in software. This happens automatically.
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SHA hardware acceleration is faster than software in some situations but
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slower in others. You should benchmark to find the best setting for you.
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config MBEDTLS_HAVE_TIME
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bool "Enable mbedtls time"
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@ -119,13 +119,15 @@ static void tskRunSHA256Test(void *pvParameters)
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vTaskDelete(NULL);
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}
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TEST_CASE("mbedtls SHA multithreading", "[mbedtls][ignore]")
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#define SHA_TASK_STACK_SIZE (10*1024)
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TEST_CASE("mbedtls SHA multithreading", "[mbedtls]")
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{
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done_sem = xSemaphoreCreateCounting(4, 0);
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xTaskCreate(tskRunSHA1Test, "SHA1Task1", 8192, NULL, 3, NULL);
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xTaskCreate(tskRunSHA1Test, "SHA1Task2", 8192, NULL, 3, NULL);
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xTaskCreate(tskRunSHA256Test, "SHA256Task1", 8192, NULL, 3, NULL);
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xTaskCreate(tskRunSHA256Test, "SHA256Task2", 8192, NULL, 3, NULL);
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xTaskCreate(tskRunSHA1Test, "SHA1Task1", SHA_TASK_STACK_SIZE, NULL, 3, NULL);
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xTaskCreate(tskRunSHA1Test, "SHA1Task2", SHA_TASK_STACK_SIZE, NULL, 3, NULL);
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xTaskCreate(tskRunSHA256Test, "SHA256Task1", SHA_TASK_STACK_SIZE, NULL, 3, NULL);
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xTaskCreate(tskRunSHA256Test, "SHA256Task2", SHA_TASK_STACK_SIZE, NULL, 3, NULL);
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for(int i = 0; i < 4; i++) {
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if(!xSemaphoreTake(done_sem, 10000/portTICK_PERIOD_MS)) {
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@ -165,14 +167,10 @@ void tskRunSHASelftests(void *param)
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TEST_CASE("mbedtls SHA self-tests multithreaded", "[mbedtls]")
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{
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done_sem = xSemaphoreCreateCounting(2, 0);
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xTaskCreate(tskRunSHASelftests, "SHASelftests1", 8192, NULL, 3, NULL);
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xTaskCreate(tskRunSHASelftests, "SHASelftests2", 8192, NULL, 3, NULL);
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xTaskCreate(tskRunSHASelftests, "SHASelftests1", SHA_TASK_STACK_SIZE, NULL, 3, NULL);
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xTaskCreate(tskRunSHASelftests, "SHASelftests2", SHA_TASK_STACK_SIZE, NULL, 3, NULL);
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#ifdef CONFIG_MBEDTLS_HARDWARE_SHA
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const int TIMEOUT_MS = 12000;
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#else
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const int TIMEOUT_MS = 20000; // Soft-only SHA may need a little longer
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#endif
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const int TIMEOUT_MS = 20000;
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for(int i = 0; i < 2; i++) {
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if(!xSemaphoreTake(done_sem, TIMEOUT_MS/portTICK_PERIOD_MS)) {
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@ -19,7 +19,6 @@ CONFIG_LOG_BOOTLOADER_LEVEL_WARN=y
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# CONFIG_LOG_BOOTLOADER_LEVEL_DEBUG is not set
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# CONFIG_LOG_BOOTLOADER_LEVEL_VERBOSE is not set
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CONFIG_LOG_BOOTLOADER_LEVEL=2
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# CONFIG_BOOTLOADER_LTO is not set
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#
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# Security features
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@ -174,6 +173,11 @@ CONFIG_ESP32_DEEP_SLEEP_WAKEUP_DELAY=0
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# CONFIG_ESP32_XTAL_FREQ_26 is not set
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CONFIG_ESP32_XTAL_FREQ_AUTO=y
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CONFIG_ESP32_XTAL_FREQ=0
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# CONFIG_NO_BLOBS is not set
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#
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# Wi-Fi
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#
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CONFIG_ESP32_WIFI_STATIC_RX_BUFFER_NUM=10
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CONFIG_ESP32_WIFI_DYNAMIC_RX_BUFFER_NUM=0
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# CONFIG_ESP32_WIFI_STATIC_TX_BUFFER is not set
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@ -181,8 +185,9 @@ CONFIG_ESP32_WIFI_DYNAMIC_TX_BUFFER=y
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CONFIG_ESP32_WIFI_TX_BUFFER_TYPE=1
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CONFIG_ESP32_WIFI_DYNAMIC_TX_BUFFER_NUM=32
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CONFIG_ESP32_WIFI_AMPDU_ENABLED=y
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CONFIG_ESP32_WIFI_TX_BA_WIN=6
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CONFIG_ESP32_WIFI_RX_BA_WIN=6
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CONFIG_ESP32_WIFI_NVS_ENABLED=y
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CONFIG_PHY_ENABLED=y
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#
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# PHY
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@ -280,10 +285,16 @@ CONFIG_TCP_SYNMAXRTX=6
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CONFIG_TCP_MSS=1436
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CONFIG_TCP_SND_BUF_DEFAULT=5744
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CONFIG_TCP_WND_DEFAULT=5744
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CONFIG_TCP_RECVMBOX_SIZE=6
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CONFIG_TCP_QUEUE_OOSEQ=y
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CONFIG_TCP_OVERSIZE_MSS=y
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# CONFIG_TCP_OVERSIZE_QUARTER_MSS is not set
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# CONFIG_TCP_OVERSIZE_DISABLE is not set
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#
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# UDP
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#
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CONFIG_UDP_RECVMBOX_SIZE=6
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# CONFIG_LWIP_DHCP_DOES_ARP_CHECK is not set
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CONFIG_TCPIP_TASK_STACK_SIZE=2048
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# CONFIG_PPP_SUPPORT is not set
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@ -299,7 +310,10 @@ CONFIG_TCPIP_TASK_STACK_SIZE=2048
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#
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CONFIG_MBEDTLS_SSL_MAX_CONTENT_LEN=16384
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# CONFIG_MBEDTLS_DEBUG is not set
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# CONFIG_MBEDTLS_UNSAFE_ACCELERATION is not set
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CONFIG_MBEDTLS_HARDWARE_AES=y
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CONFIG_MBEDTLS_HARDWARE_MPI=y
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CONFIG_MBEDTLS_MPI_USE_INTERRUPT=y
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CONFIG_MBEDTLS_HARDWARE_SHA=y
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CONFIG_MBEDTLS_HAVE_TIME=y
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# CONFIG_MBEDTLS_HAVE_TIME_DATE is not set
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@ -315,3 +329,10 @@ CONFIG_OPENSSL_ASSERT_DO_NOTHING=y
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#
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# CONFIG_SPI_FLASH_ENABLE_COUNTERS is not set
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CONFIG_SPI_FLASH_ROM_DRIVER_PATCH=y
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#
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# Wear Levelling
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#
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# CONFIG_WL_SECTOR_SIZE_512 is not set
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CONFIG_WL_SECTOR_SIZE_4096=y
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CONFIG_WL_SECTOR_SIZE=4096
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