Merge branch 'bugfix/fix_systimer_stall_issue_in_lightsleep_v4.4' into 'release/v4.4'

esp_wifi: allow connectionless ps with mesh, fix failed to sleep after scan;...

See merge request espressif/esp-idf!23200

components/esp_hw_support/Kconfig

@@ -93,6 +93,18 @@ menu "Hardware Settings"
                 all pins. It depends on the SPI Flash/RAM chip used.
     endmenu
 
+    menu "ESP_SLEEP_WORKAROUND"
+        # No visible menu/configs for workaround
+        visible if 0
+        config ESP_SLEEP_SYSTIMER_STALL_WORKAROUND
+            bool "ESP32C3 SYSTIMER Stall Issue Workaround"
+            depends on IDF_TARGET_ESP32C3
+            help
+                Its not able to stall ESP32C3 systimer in sleep.
+                To fix related RTOS TICK issue, select it to disable related systimer during sleep.
+                TODO: IDF-7036
+    endmenu
+
     menu "RTC Clock Config"
         # This is used for configure the RTC clock.
         config RTC_CLOCK_BBPLL_POWER_ON_WITH_USB

components/esp_hw_support/port/esp32c3/rtc_sleep.c

@@ -24,6 +24,9 @@
 #include "regi2c_ctrl.h"
 #include "esp_efuse.h"
 #include "hal/efuse_hal.h"
+#if CONFIG_ESP_SLEEP_SYSTIMER_STALL_WORKAROUND
+#include "soc/systimer_reg.h"
+#endif
 
 /**
  * Configure whether certain peripherals are powered down in deep sleep
@@ -196,6 +199,17 @@ void rtc_sleep_set_wakeup_time(uint64_t t)
     WRITE_PERI_REG(RTC_CNTL_SLP_TIMER1_REG, t >> 32);
 }
 
+#if CONFIG_ESP_SLEEP_SYSTIMER_STALL_WORKAROUND
+void rtc_sleep_systimer_enable(bool en)
+{
+    if (en) {
+        REG_SET_BIT(SYSTIMER_CONF_REG, SYSTIMER_TIMER_UNIT1_WORK_EN);
+    } else {
+        REG_CLR_BIT(SYSTIMER_CONF_REG, SYSTIMER_TIMER_UNIT1_WORK_EN);
+    }
+}
+#endif
+
 static uint32_t rtc_sleep_finish(uint32_t lslp_mem_inf_fpu);
 
 uint32_t rtc_sleep_start(uint32_t wakeup_opt, uint32_t reject_opt, uint32_t lslp_mem_inf_fpu)

components/esp_hw_support/sleep_modes.c

@@ -497,6 +497,12 @@ static uint32_t IRAM_ATTR esp_sleep_start(uint32_t pd_flags)
         timer_wakeup_prepare();
     }
 
+#if CONFIG_ESP_SLEEP_SYSTIMER_STALL_WORKAROUND
+    if (!(pd_flags & RTC_SLEEP_PD_XTAL)) {
+        rtc_sleep_systimer_enable(false);
+    }
+#endif
+
     uint32_t result;
     if (deep_sleep) {
 #if !CONFIG_IDF_TARGET_ESP32H2 // IDF does not officially support esp32h2 in v4.4
@@ -528,6 +534,12 @@ static uint32_t IRAM_ATTR esp_sleep_start(uint32_t pd_flags)
         result = call_rtc_sleep_start(reject_triggers, config.lslp_mem_inf_fpu);
     }
 
+#if CONFIG_ESP_SLEEP_SYSTIMER_STALL_WORKAROUND
+    if (!(pd_flags & RTC_SLEEP_PD_XTAL)) {
+        rtc_sleep_systimer_enable(true);
+    }
+#endif
+
     // Restore CPU frequency
     rtc_clk_cpu_freq_set_config(&cpu_freq_config);
 

components/esp_wifi/lib

@@ -1 +1 @@
-Subproject commit 98098934bae93dcfa04e9627e6fc4e319b29a9cc
+Subproject commit f3f7d4ffdc29813e8fe3c5ef55e30ad37ee9cbfa

components/freertos/Kconfig

@@ -70,6 +70,7 @@ menu "FreeRTOS"
     config FREERTOS_SYSTICK_USES_SYSTIMER
         bool
         default y if FREERTOS_CORETIMER_SYSTIMER_LVL1 || FREERTOS_CORETIMER_SYSTIMER_LVL3
+        select ESP_SLEEP_SYSTIMER_STALL_WORKAROUND if IDF_TARGET_ESP32C3
 
     config FREERTOS_SYSTICK_USES_CCOUNT
         bool

components/soc/esp32c3/include/soc/rtc.h

@@ -730,6 +730,18 @@ void rtc_sleep_low_init(uint32_t slowclk_period);
  */
 void rtc_sleep_set_wakeup_time(uint64_t t);
 
+#if CONFIG_ESP_SLEEP_SYSTIMER_STALL_WORKAROUND
+/**
+ * @brief Configure systimer for esp32c3 systimer stall issue workaround
+ *
+ * This function configures related systimer for esp32c3 systimer stall issue.
+ * Only apply workaround when xtal powered up.
+ *
+ * @param en enable systimer or not
+ */
+void rtc_sleep_systimer_enable(bool en);
+#endif
+
 #define RTC_GPIO_TRIG_EN            BIT(2)  //!< GPIO wakeup
 #define RTC_TIMER_TRIG_EN           BIT(3)  //!< Timer wakeup
 #define RTC_WIFI_TRIG_EN            BIT(5)  //!< WIFI wakeup (light sleep only)