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Merge branch 'bugfix/fix_qio_mode' into 'master' 

bootloader(flash): fix flash QIO mode configuration error.

See merge request idf/esp-idf!2403
pull/1880/merge
Jiang Jiang Jian 2018-05-17 16:21:46 +08:00
rodzic c584f624b5 f6927ccde9
commit 0749e50927
1 zmienionych plików z 11 dodań i 19 usunięć
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30
components/bootloader_support/src/flash_qio_mode.c
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@ -116,21 +116,13 @@ static uint32_t execute_flash_command(uint8_t command, uint32_t mosi_data, uint8
extern uint8_t g_rom_spiflash_dummy_len_plus[]; extern uint8_t g_rom_spiflash_dummy_len_plus[];
uint32_t bootloader_read_flash_id() uint32_t bootloader_read_flash_id()
{ {
uint32_t old_ctrl_reg = SPIFLASH.ctrl.val;
SPIFLASH.ctrl.val = SPI_WP_REG; // keep WP high while idle, otherwise leave DIO mode
SPIFLASH.user.usr_dummy = 0;
SPIFLASH.user.usr_addr = 0;
SPIFLASH.user.usr_command = 1;
SPIFLASH.user2.usr_command_bitlen = 7;
uint32_t id = execute_flash_command(CMD_RDID, 0, 0, 24); uint32_t id = execute_flash_command(CMD_RDID, 0, 0, 24);
SPIFLASH.ctrl.val = old_ctrl_reg;
id = ((id & 0xff) << 16) | ((id >> 16) & 0xff) | (id & 0xff00); id = ((id & 0xff) << 16) | ((id >> 16) & 0xff) | (id & 0xff00);
return id; return id;
} }
void bootloader_enable_qio_mode(void) void bootloader_enable_qio_mode(void)
{ {
uint32_t old_ctrl_reg;
uint32_t raw_flash_id; uint32_t raw_flash_id;
uint8_t mfg_id; uint8_t mfg_id;
uint16_t flash_id; uint16_t flash_id;
@ -139,10 +131,6 @@ void bootloader_enable_qio_mode(void)
ESP_LOGD(TAG, "Probing for QIO mode enable..."); ESP_LOGD(TAG, "Probing for QIO mode enable...");
esp_rom_spiflash_wait_idle(&g_rom_flashchip); esp_rom_spiflash_wait_idle(&g_rom_flashchip);
/* Set up some of the SPIFLASH user/ctrl variables which don't change
while we're probing using execute_flash_command() */
old_ctrl_reg = SPIFLASH.ctrl.val;
raw_flash_id = g_rom_flashchip.device_id; raw_flash_id = g_rom_flashchip.device_id;
ESP_LOGD(TAG, "Raw SPI flash chip id 0x%x", raw_flash_id); ESP_LOGD(TAG, "Raw SPI flash chip id 0x%x", raw_flash_id);
@ -162,13 +150,9 @@ void bootloader_enable_qio_mode(void)
ESP_LOGI(TAG, "Enabling default flash chip QIO"); ESP_LOGI(TAG, "Enabling default flash chip QIO");
} }
esp_err_t res = enable_qio_mode(chip_data[i].read_status_fn, enable_qio_mode(chip_data[i].read_status_fn,
chip_data[i].write_status_fn, chip_data[i].write_status_fn,
chip_data[i].status_qio_bit); chip_data[i].status_qio_bit);
if (res != ESP_OK) {
// Restore SPI flash CTRL setting, to keep us in DIO/DOUT mode
SPIFLASH.ctrl.val = old_ctrl_reg;
}
} }
static esp_err_t enable_qio_mode(read_status_fn_t read_status_fn, static esp_err_t enable_qio_mode(read_status_fn_t read_status_fn,
@ -264,6 +248,13 @@ static void write_status_16b_wrsr(unsigned new_status)
static uint32_t execute_flash_command(uint8_t command, uint32_t mosi_data, uint8_t mosi_len, uint8_t miso_len) static uint32_t execute_flash_command(uint8_t command, uint32_t mosi_data, uint8_t mosi_len, uint8_t miso_len)
{ {
uint32_t old_ctrl_reg = SPIFLASH.ctrl.val;
SPIFLASH.ctrl.val = SPI_WP_REG_M; // keep WP high while idle, otherwise leave DIO mode
SPIFLASH.user.usr_dummy = 0;
SPIFLASH.user.usr_addr = 0;
SPIFLASH.user.usr_command = 1;
SPIFLASH.user2.usr_command_bitlen = 7;
SPIFLASH.user2.usr_command_value = command; SPIFLASH.user2.usr_command_value = command;
SPIFLASH.user.usr_miso = miso_len > 0; SPIFLASH.user.usr_miso = miso_len > 0;
SPIFLASH.miso_dlen.usr_miso_dbitlen = miso_len ? (miso_len - 1) : 0; SPIFLASH.miso_dlen.usr_miso_dbitlen = miso_len ? (miso_len - 1) : 0;
@ -286,5 +277,6 @@ static uint32_t execute_flash_command(uint8_t command, uint32_t mosi_data, uint8
while(SPIFLASH.cmd.usr != 0) while(SPIFLASH.cmd.usr != 0)
{ } { }
SPIFLASH.ctrl.val = old_ctrl_reg;
return SPIFLASH.data_buf[0]; return SPIFLASH.data_buf[0];
} }