Merge branch 'feature/ulp_fix_ignore_tests' into 'master'

ulp: add all ignored ulp unit tests to the pytest framework

See merge request espressif/esp-idf!20465

components/ulp/test_apps/ulp_fsm/main/test_ulp.c

@@ -205,7 +205,7 @@ TEST_CASE("ULP FSM light-sleep wakeup test", "[ulp]")
     TEST_ASSERT(esp_sleep_get_wakeup_cause() == ESP_SLEEP_WAKEUP_ULP);
 }
 
-TEST_CASE("ULP FSM deep-sleep wakeup test", "[ulp][reset=SW_CPU_RESET][ignore]")
+TEST_CASE("ULP FSM deep-sleep wakeup test", "[ulp][ulp_deep_sleep_wakeup]")
 {
     assert(CONFIG_ULP_COPROC_RESERVE_MEM >= 260 && "this test needs ULP_COPROC_RESERVE_MEM option set in menuconfig");
 
@@ -389,7 +389,7 @@ TEST_CASE("ULP FSM I_WR_REG instruction test", "[ulp]")
 }
 
 
-TEST_CASE("ULP FSM controls RTC_IO", "[ulp][ignore]")
+TEST_CASE("ULP FSM controls RTC_IO", "[ulp][ulp_deep_sleep_wakeup]")
 {
     assert(CONFIG_ULP_COPROC_RESERVE_MEM >= 260 && "this test needs ULP_COPROC_RESERVE_MEM option set in menuconfig");
 
@@ -455,7 +455,7 @@ TEST_CASE("ULP FSM controls RTC_IO", "[ulp][ignore]")
     UNITY_TEST_FAIL(__LINE__, "Should not get here!");
 }
 
-TEST_CASE("ULP FSM power consumption in deep sleep", "[ulp][ignore]")
+TEST_CASE("ULP FSM power consumption in deep sleep", "[ulp][ulp_deep_sleep_wakeup]")
 {
     assert(CONFIG_ULP_COPROC_RESERVE_MEM >= 4 && "this test needs ULP_COPROC_RESERVE_MEM option set in menuconfig");
 
@@ -555,7 +555,7 @@ TEST_CASE("ULP FSM timer setting", "[ulp]")
 }
 
 #if !DISABLED_FOR_TARGETS(ESP32)
-TEST_CASE("ULP FSM can use temperature sensor (TSENS) in deep sleep", "[ulp][ignore]")
+TEST_CASE("ULP FSM can use temperature sensor (TSENS) in deep sleep", "[ulp][ulp_deep_sleep_wakeup]")
 {
     assert(CONFIG_ULP_COPROC_RESERVE_MEM >= 260 && "this test needs ULP_COPROC_RESERVE_MEM option set in menuconfig");
 
@@ -622,7 +622,7 @@ TEST_CASE("ULP FSM can use temperature sensor (TSENS) in deep sleep", "[ulp][ign
 }
 #endif //#if !DISABLED_FOR_TARGETS(ESP32)
 
-TEST_CASE("ULP FSM can use ADC in deep sleep", "[ulp][ignore]")
+TEST_CASE("ULP FSM can use ADC in deep sleep", "[ulp][ulp_deep_sleep_wakeup]")
 {
     assert(CONFIG_ULP_COPROC_RESERVE_MEM >= 260 && "this test needs ULP_COPROC_RESERVE_MEM option set in menuconfig");
 

components/ulp/test_apps/ulp_fsm/pytest_ulp_fsm_app.py

@@ -11,5 +11,56 @@ from pytest_embedded import Dut
 @pytest.mark.generic
 def test_ulp_fsm(dut: Dut) -> None:
     dut.expect('Press ENTER to see the list of tests')
-    dut.write('![ignore]')
+    dut.write('![ulp_deep_sleep_wakeup]')
     dut.expect_unity_test_output()
+
+
+# Run all deepsleep wakeup tests one after the other instead of running them all with the `ulp_deep_sleep_wakeup` tag.
+# This makes sure that all tests are run even after one test causes a system reset.
+@pytest.mark.esp32
+@pytest.mark.esp32s2
+@pytest.mark.esp32s3
+@pytest.mark.generic
+def test_ulp_fsm_deep_sleep_wakeup(dut: Dut) -> None:
+    dut.expect('Press ENTER to see the list of tests')
+    dut.write('"ULP FSM deep-sleep wakeup test"')
+    dut.expect('rst:0x5')
+
+
+@pytest.mark.esp32
+@pytest.mark.esp32s2
+@pytest.mark.esp32s3
+@pytest.mark.generic
+def test_ulp_fsm_rtc_io(dut: Dut) -> None:
+    dut.expect('Press ENTER to see the list of tests')
+    dut.write('"ULP FSM controls RTC_IO"')
+    dut.expect('rst:0x5')
+
+
+@pytest.mark.esp32
+@pytest.mark.esp32s2
+@pytest.mark.esp32s3
+@pytest.mark.generic
+def test_ulp_fsm_deep_sleep_power_consumption(dut: Dut) -> None:
+    dut.expect('Press ENTER to see the list of tests')
+    dut.write('"ULP FSM power consumption in deep sleep"')
+    dut.expect('rst:0x5')
+
+
+@pytest.mark.esp32s2
+@pytest.mark.esp32s3
+@pytest.mark.generic
+def test_ulp_fsm_tsens(dut: Dut) -> None:
+    dut.expect('Press ENTER to see the list of tests')
+    dut.write('"ULP FSM can use temperature sensor (TSENS) in deep sleep"')
+    dut.expect('rst:0x5')
+
+
+@pytest.mark.esp32
+@pytest.mark.esp32s2
+@pytest.mark.esp32s3
+@pytest.mark.generic
+def test_ulp_fsm_adc(dut: Dut) -> None:
+    dut.expect('Press ENTER to see the list of tests')
+    dut.write('"ULP FSM can use ADC in deep sleep"')
+    dut.expect('rst:0x5')

components/ulp/test_apps/ulp_riscv/main/test_ulp_riscv.c

@@ -184,7 +184,7 @@ TEST_CASE("ULP-RISC-V can stop itself and be resumed from the main CPU", "[ulp]"
 * Keep this test case as the last test case in this suite as a CPU reset occurs.
 * Add new test cases above in order to ensure they run when all test cases are run together.
 */
-TEST_CASE("ULP-RISC-V is able to wakeup main CPU from deep sleep", "[ulp][reset=SW_CPU_RESET][ignore]")
+TEST_CASE("ULP-RISC-V is able to wakeup main CPU from deep sleep", "[ulp][ulp_deep_sleep_wakeup]")
 {
     /* Load ULP RISC-V firmware and start the ULP RISC-V Coprocessor */
     load_and_start_ulp_firmware();

components/ulp/test_apps/ulp_riscv/pytest_ulp_riscv.py

@@ -10,5 +10,16 @@ from pytest_embedded import Dut
 @pytest.mark.generic
 def test_ulp_riscv(dut: Dut) -> None:
     dut.expect('Press ENTER to see the list of tests')
-    dut.write('![ignore]')
+    dut.write('![ulp_deep_sleep_wakeup]')
     dut.expect_unity_test_output()
+
+
+# Run all deepsleep wakeup tests one after the other instead of running them all with the `ulp_deep_sleep_wakeup` tag.
+# This makes sure that all tests are run even after one test causes a system reset.
+@pytest.mark.esp32s2
+@pytest.mark.esp32s3
+@pytest.mark.generic
+def test_ulp_deep_sleep_wakeup(dut: Dut) -> None:
+    dut.expect('Press ENTER to see the list of tests')
+    dut.write('"ULP-RISC-V is able to wakeup main CPU from deep sleep"')
+    dut.expect('rst:0x5')