2022-04-01 08:53:40 +00:00
|
|
|
/*
|
|
|
|
* SPDX-FileCopyrightText: 2015-2022 Espressif Systems (Shanghai) CO LTD
|
|
|
|
*
|
|
|
|
* SPDX-License-Identifier: Apache-2.0
|
|
|
|
*/
|
2019-01-08 10:29:25 +00:00
|
|
|
|
2020-12-16 06:21:06 +00:00
|
|
|
#include "soc/soc_caps.h"
|
2019-01-08 10:29:25 +00:00
|
|
|
#include "spi_flash_defs.h"
|
|
|
|
#include "memspi_host_driver.h"
|
|
|
|
#include "string.h"
|
|
|
|
#include "esp_log.h"
|
2022-06-27 07:24:07 +00:00
|
|
|
#include "esp_private/cache_utils.h"
|
2019-01-08 10:29:25 +00:00
|
|
|
#include "esp_flash_partitions.h"
|
2022-04-01 08:53:40 +00:00
|
|
|
#include "esp_memory_utils.h"
|
2019-01-08 10:29:25 +00:00
|
|
|
|
2020-12-16 06:21:06 +00:00
|
|
|
|
2020-04-30 02:37:35 +00:00
|
|
|
#define SPI_FLASH_HAL_MAX_WRITE_BYTES 64
|
|
|
|
#define SPI_FLASH_HAL_MAX_READ_BYTES 64
|
|
|
|
|
2020-05-07 06:46:41 +00:00
|
|
|
DRAM_ATTR static const spi_flash_host_driver_t esp_flash_default_host = ESP_FLASH_DEFAULT_HOST_DRIVER();
|
2019-01-08 10:29:25 +00:00
|
|
|
|
2020-12-16 06:21:06 +00:00
|
|
|
#if SOC_MEMSPI_IS_INDEPENDENT
|
2020-05-07 06:46:41 +00:00
|
|
|
extern void spi_flash_hal_gpspi_poll_cmd_done(spi_flash_host_inst_t *host);
|
|
|
|
extern esp_err_t spi_flash_hal_gpspi_device_config(spi_flash_host_inst_t *host);
|
2019-11-28 01:20:00 +00:00
|
|
|
esp_err_t spi_flash_hal_gpspi_configure_host_io_mode(
|
2020-05-07 06:46:41 +00:00
|
|
|
spi_flash_host_inst_t *host,
|
2019-11-28 01:20:00 +00:00
|
|
|
uint32_t command,
|
|
|
|
uint32_t addr_bitlen,
|
|
|
|
int dummy_cyclelen_base,
|
|
|
|
esp_flash_io_mode_t io_mode);
|
2020-05-07 06:46:41 +00:00
|
|
|
extern esp_err_t spi_flash_hal_gpspi_common_command(spi_flash_host_inst_t *host, spi_flash_trans_t *trans);
|
|
|
|
extern esp_err_t spi_flash_hal_gpspi_read(spi_flash_host_inst_t *host, void *buffer, uint32_t address, uint32_t read_len);
|
2021-01-23 16:48:07 +00:00
|
|
|
extern uint32_t spi_flash_hal_gpspi_check_status(spi_flash_host_inst_t *host);
|
2020-05-07 06:46:41 +00:00
|
|
|
extern bool spi_flash_hal_gpspi_supports_direct_write(spi_flash_host_inst_t *host, const void *p);
|
|
|
|
extern bool spi_flash_hal_gpspi_supports_direct_read(spi_flash_host_inst_t *host, const void *p);
|
2019-11-28 01:20:00 +00:00
|
|
|
|
|
|
|
/** Default configuration for GPSPI */
|
2020-04-30 02:37:35 +00:00
|
|
|
static const spi_flash_host_driver_t esp_flash_gpspi_host = {
|
|
|
|
.dev_config = spi_flash_hal_gpspi_device_config,
|
|
|
|
.common_command = spi_flash_hal_gpspi_common_command,
|
|
|
|
.read_id = memspi_host_read_id_hs,
|
|
|
|
.erase_chip = memspi_host_erase_chip,
|
|
|
|
.erase_sector = memspi_host_erase_sector,
|
|
|
|
.erase_block = memspi_host_erase_block,
|
|
|
|
.read_status = memspi_host_read_status_hs,
|
|
|
|
.set_write_protect = memspi_host_set_write_protect,
|
|
|
|
.supports_direct_write = spi_flash_hal_gpspi_supports_direct_write,
|
|
|
|
.supports_direct_read = spi_flash_hal_gpspi_supports_direct_read,
|
|
|
|
.program_page = memspi_host_program_page,
|
|
|
|
.write_data_slicer = memspi_host_write_data_slicer,
|
|
|
|
.read = spi_flash_hal_gpspi_read,
|
|
|
|
.read_data_slicer = memspi_host_read_data_slicer,
|
2021-01-23 16:48:07 +00:00
|
|
|
.host_status = spi_flash_hal_gpspi_check_status,
|
2020-04-30 02:37:35 +00:00
|
|
|
.configure_host_io_mode = spi_flash_hal_gpspi_configure_host_io_mode,
|
|
|
|
.poll_cmd_done = spi_flash_hal_gpspi_poll_cmd_done,
|
|
|
|
.flush_cache = NULL,
|
2021-03-11 11:39:27 +00:00
|
|
|
.check_suspend = NULL,
|
2020-12-18 04:57:55 +00:00
|
|
|
.resume = spi_flash_hal_resume,
|
|
|
|
.suspend = spi_flash_hal_suspend,
|
2019-11-28 01:20:00 +00:00
|
|
|
};
|
|
|
|
#endif
|
|
|
|
|
2020-05-07 06:46:41 +00:00
|
|
|
esp_err_t memspi_host_init_pointers(memspi_host_inst_t *host, const memspi_host_config_t *cfg)
|
2019-01-08 10:29:25 +00:00
|
|
|
{
|
2022-04-01 08:53:40 +00:00
|
|
|
if (!esp_ptr_internal(host) && cfg->host_id == SPI1_HOST) {
|
|
|
|
return ESP_ERR_INVALID_ARG;
|
|
|
|
}
|
|
|
|
|
2020-12-16 06:21:06 +00:00
|
|
|
#if SOC_MEMSPI_IS_INDEPENDENT
|
2021-03-05 08:20:33 +00:00
|
|
|
if (cfg->host_id == SPI1_HOST)
|
2020-05-07 06:46:41 +00:00
|
|
|
host->inst.driver = &esp_flash_default_host;
|
2019-11-28 01:20:00 +00:00
|
|
|
else {
|
2020-05-07 06:46:41 +00:00
|
|
|
host->inst.driver = &esp_flash_gpspi_host;
|
2019-11-28 01:20:00 +00:00
|
|
|
}
|
2020-12-16 06:21:06 +00:00
|
|
|
#else
|
|
|
|
host->inst.driver = &esp_flash_default_host;
|
2019-11-28 01:20:00 +00:00
|
|
|
#endif
|
|
|
|
|
2020-05-07 06:46:41 +00:00
|
|
|
esp_err_t err = spi_flash_hal_init(host, cfg);
|
|
|
|
return err;
|
2019-01-08 10:29:25 +00:00
|
|
|
}
|
|
|
|
|
2020-12-16 03:50:13 +00:00
|
|
|
#ifndef CONFIG_SPI_FLASH_ROM_IMPL
|
|
|
|
|
|
|
|
static const char TAG[] = "memspi";
|
|
|
|
|
2020-05-07 06:46:41 +00:00
|
|
|
esp_err_t memspi_host_read_id_hs(spi_flash_host_inst_t *host, uint32_t *id)
|
2019-01-08 10:29:25 +00:00
|
|
|
{
|
2019-11-28 01:20:00 +00:00
|
|
|
uint32_t id_buf = 0;
|
2019-01-08 10:29:25 +00:00
|
|
|
spi_flash_trans_t t = {
|
|
|
|
.command = CMD_RDID,
|
2019-11-28 01:20:00 +00:00
|
|
|
.miso_len = 3,
|
|
|
|
.miso_data = ((uint8_t*) &id_buf),
|
2019-01-08 10:29:25 +00:00
|
|
|
};
|
2020-05-07 06:46:41 +00:00
|
|
|
host->driver->common_command(host, &t);
|
2019-11-28 01:20:00 +00:00
|
|
|
|
|
|
|
uint32_t raw_flash_id = id_buf;
|
2019-01-08 10:29:25 +00:00
|
|
|
ESP_EARLY_LOGV(TAG, "raw_chip_id: %X\n", raw_flash_id);
|
|
|
|
if (raw_flash_id == 0xFFFFFF || raw_flash_id == 0) {
|
|
|
|
ESP_EARLY_LOGE(TAG, "no response\n");
|
|
|
|
return ESP_ERR_FLASH_NO_RESPONSE;
|
|
|
|
}
|
|
|
|
// Byte swap the flash id as it's usually written the other way around
|
|
|
|
uint8_t mfg_id = raw_flash_id & 0xFF;
|
|
|
|
uint16_t flash_id = (raw_flash_id >> 16) | (raw_flash_id & 0xFF00);
|
|
|
|
*id = ((uint32_t)mfg_id << 16) | flash_id;
|
|
|
|
ESP_EARLY_LOGV(TAG, "chip_id: %X\n", *id);
|
|
|
|
return ESP_OK;
|
|
|
|
}
|
|
|
|
|
2020-05-07 06:46:41 +00:00
|
|
|
esp_err_t memspi_host_read_status_hs(spi_flash_host_inst_t *host, uint8_t *out_sr)
|
2019-01-08 10:29:25 +00:00
|
|
|
{
|
|
|
|
//NOTE: we do have a read id function, however it doesn't work in high freq
|
2019-11-28 01:20:00 +00:00
|
|
|
uint32_t stat_buf = 0;
|
2019-01-08 10:29:25 +00:00
|
|
|
spi_flash_trans_t t = {
|
|
|
|
.command = CMD_RDSR,
|
2019-11-28 01:20:00 +00:00
|
|
|
.miso_data = ((uint8_t*) &stat_buf),
|
|
|
|
.miso_len = 1
|
2019-01-08 10:29:25 +00:00
|
|
|
};
|
2020-05-07 06:46:41 +00:00
|
|
|
esp_err_t err = host->driver->common_command(host, &t);
|
2019-01-08 10:29:25 +00:00
|
|
|
if (err != ESP_OK) {
|
|
|
|
return err;
|
|
|
|
}
|
2019-11-28 01:20:00 +00:00
|
|
|
*out_sr = stat_buf;
|
2019-01-08 10:29:25 +00:00
|
|
|
return ESP_OK;
|
|
|
|
}
|
|
|
|
|
2020-05-07 06:46:41 +00:00
|
|
|
esp_err_t memspi_host_flush_cache(spi_flash_host_inst_t *host, uint32_t addr, uint32_t size)
|
2019-01-08 10:29:25 +00:00
|
|
|
{
|
2021-03-05 08:20:33 +00:00
|
|
|
if ((void*)((memspi_host_inst_t*)host)->spi == (void*) spi_flash_ll_get_hw(SPI1_HOST)) {
|
2019-01-08 10:29:25 +00:00
|
|
|
spi_flash_check_and_flush_cache(addr, size);
|
|
|
|
}
|
|
|
|
return ESP_OK;
|
2019-11-28 01:20:00 +00:00
|
|
|
}
|
|
|
|
|
2020-05-07 06:46:41 +00:00
|
|
|
void memspi_host_erase_chip(spi_flash_host_inst_t *host)
|
2019-11-28 01:20:00 +00:00
|
|
|
{
|
|
|
|
spi_flash_trans_t t = { 0 };
|
|
|
|
t.command = CMD_CHIP_ERASE;
|
2020-05-07 06:46:41 +00:00
|
|
|
host->driver->common_command(host, &t);
|
2019-11-28 01:20:00 +00:00
|
|
|
}
|
|
|
|
|
2020-07-26 19:13:07 +00:00
|
|
|
// Only support 24bit address
|
2020-05-07 06:46:41 +00:00
|
|
|
void memspi_host_erase_sector(spi_flash_host_inst_t *host, uint32_t start_address)
|
2019-11-28 01:20:00 +00:00
|
|
|
{
|
2020-07-26 19:13:07 +00:00
|
|
|
assert(start_address < 0x1000000);
|
2020-04-30 02:37:35 +00:00
|
|
|
spi_flash_trans_t t = {
|
2019-11-28 01:20:00 +00:00
|
|
|
.command = CMD_SECTOR_ERASE,
|
|
|
|
.address_bitlen = 24,
|
|
|
|
.address = start_address
|
|
|
|
};
|
2020-05-07 06:46:41 +00:00
|
|
|
host->driver->common_command(host, &t);
|
2019-11-28 01:20:00 +00:00
|
|
|
}
|
|
|
|
|
2020-07-26 19:13:07 +00:00
|
|
|
// Only support 24bit address
|
2020-05-07 06:46:41 +00:00
|
|
|
void memspi_host_erase_block(spi_flash_host_inst_t *host, uint32_t start_address)
|
2019-11-28 01:20:00 +00:00
|
|
|
{
|
2020-07-26 19:13:07 +00:00
|
|
|
assert(start_address < 0x1000000);
|
2020-04-30 02:37:35 +00:00
|
|
|
spi_flash_trans_t t = {
|
2019-11-28 01:20:00 +00:00
|
|
|
.command = CMD_LARGE_BLOCK_ERASE,
|
|
|
|
.address_bitlen = 24,
|
|
|
|
.address = start_address,
|
|
|
|
};
|
2020-05-07 06:46:41 +00:00
|
|
|
host->driver->common_command(host, &t);
|
2019-11-28 01:20:00 +00:00
|
|
|
}
|
|
|
|
|
2020-07-26 19:13:07 +00:00
|
|
|
// Only support 24bit address
|
2020-05-07 06:46:41 +00:00
|
|
|
void memspi_host_program_page(spi_flash_host_inst_t *host, const void *buffer, uint32_t address, uint32_t length)
|
2019-11-28 01:20:00 +00:00
|
|
|
{
|
2020-07-26 19:13:07 +00:00
|
|
|
assert(address + length <= 0x1000000);
|
2020-04-30 02:37:35 +00:00
|
|
|
spi_flash_trans_t t = {
|
2019-11-28 01:20:00 +00:00
|
|
|
.command = CMD_PROGRAM_PAGE,
|
|
|
|
.address_bitlen = 24,
|
|
|
|
.address = address,
|
|
|
|
.mosi_len = length,
|
|
|
|
.mosi_data = buffer
|
|
|
|
};
|
2020-05-07 06:46:41 +00:00
|
|
|
host->driver->common_command(host, &t);
|
2019-11-28 01:20:00 +00:00
|
|
|
}
|
|
|
|
|
2020-05-07 06:46:41 +00:00
|
|
|
esp_err_t memspi_host_read(spi_flash_host_inst_t *host, void *buffer, uint32_t address, uint32_t read_len)
|
2019-11-28 01:20:00 +00:00
|
|
|
{
|
|
|
|
spi_flash_trans_t t = {
|
2020-04-30 02:37:35 +00:00
|
|
|
.command = CMD_READ,
|
2019-11-28 01:20:00 +00:00
|
|
|
.address_bitlen = 24,
|
|
|
|
.address = address,
|
|
|
|
.miso_len = read_len,
|
|
|
|
.miso_data = buffer
|
|
|
|
};
|
2020-05-07 06:46:41 +00:00
|
|
|
host->driver->common_command(host, &t);
|
2019-11-28 01:20:00 +00:00
|
|
|
return ESP_OK;
|
|
|
|
}
|
|
|
|
|
2020-05-07 06:46:41 +00:00
|
|
|
esp_err_t memspi_host_set_write_protect(spi_flash_host_inst_t *host, bool wp)
|
2019-11-28 01:20:00 +00:00
|
|
|
{
|
|
|
|
spi_flash_trans_t t = {
|
|
|
|
.command = wp ? CMD_WRDI : CMD_WREN
|
|
|
|
};
|
2020-05-07 06:46:41 +00:00
|
|
|
host->driver->common_command(host, &t);
|
2019-11-28 01:20:00 +00:00
|
|
|
return ESP_OK;
|
|
|
|
}
|
2020-04-30 02:37:35 +00:00
|
|
|
|
|
|
|
// When encryption is enabled, etc. the data slicer may be complicated
|
|
|
|
// This is the simple case where the hardware has no other requirements than the size and page boundary
|
2020-05-07 06:46:41 +00:00
|
|
|
int memspi_host_write_data_slicer(spi_flash_host_inst_t *host, uint32_t address, uint32_t len, uint32_t *align_address, uint32_t page_size)
|
2020-04-30 02:37:35 +00:00
|
|
|
{
|
2021-09-01 07:58:15 +00:00
|
|
|
uint32_t slicer_flag = ((spi_flash_hal_context_t*)host)->slicer_flags;
|
2020-04-30 02:37:35 +00:00
|
|
|
uint32_t align_addr = address;
|
2021-09-01 07:58:15 +00:00
|
|
|
|
|
|
|
if (slicer_flag & SPI_FLASH_HOST_CONTEXT_SLICER_FLAG_DTR) {
|
|
|
|
if (((align_addr % 2) != 0) && ((len % 2) != 0)) {
|
|
|
|
align_addr -= 1;
|
|
|
|
len += 1;
|
|
|
|
} else if (((align_addr % 2) != 0) && ((len % 2) == 0)) {
|
|
|
|
align_addr -= 1;
|
|
|
|
len += 2;
|
|
|
|
} else if (((align_addr % 2) == 0) && ((len % 2) != 0)) {
|
|
|
|
len += 1;
|
|
|
|
}
|
|
|
|
}
|
|
|
|
|
2020-04-30 02:37:35 +00:00
|
|
|
uint32_t end_bound = (align_addr/page_size + 1) * page_size;
|
|
|
|
// Shouldn't program cross the page, or longer than SPI_FLASH_HAL_MAX_WRITE_BYTES
|
|
|
|
uint32_t max_len = MIN(end_bound - align_addr, SPI_FLASH_HAL_MAX_WRITE_BYTES);
|
2021-09-01 07:58:15 +00:00
|
|
|
*align_address = align_addr;
|
2020-04-30 02:37:35 +00:00
|
|
|
return MIN(max_len, len);
|
|
|
|
}
|
|
|
|
|
2020-05-07 06:46:41 +00:00
|
|
|
int memspi_host_read_data_slicer(spi_flash_host_inst_t *host, uint32_t address, uint32_t len, uint32_t *align_address, uint32_t page_size)
|
2020-04-30 02:37:35 +00:00
|
|
|
{
|
|
|
|
// Shouldn't read longer than SPI_FLASH_HAL_MAX_READ_BYTES
|
2021-09-01 07:58:15 +00:00
|
|
|
uint32_t slicer_flag = ((spi_flash_hal_context_t*)host)->slicer_flags;
|
|
|
|
uint32_t align_addr = address;
|
|
|
|
|
|
|
|
if (slicer_flag & SPI_FLASH_HOST_CONTEXT_SLICER_FLAG_DTR) {
|
|
|
|
if (((align_addr % 2) != 0) && ((len % 2) != 0)) {
|
|
|
|
align_addr -= 1;
|
|
|
|
len += 1;
|
|
|
|
} else if (((align_addr % 2) != 0) && ((len % 2) == 0)) {
|
|
|
|
align_addr -= 1;
|
|
|
|
len += 2;
|
|
|
|
} else if (((align_addr % 2) == 0) && ((len % 2) != 0)) {
|
|
|
|
len += 1;
|
|
|
|
}
|
|
|
|
}
|
2020-04-30 02:37:35 +00:00
|
|
|
uint32_t max_len = SPI_FLASH_HAL_MAX_READ_BYTES;
|
2021-09-01 07:58:15 +00:00
|
|
|
*align_address = align_addr;
|
2020-04-30 02:37:35 +00:00
|
|
|
return MIN(max_len, len);
|
|
|
|
}
|
2020-12-16 03:50:13 +00:00
|
|
|
|
|
|
|
#endif // CONFIG_SPI_FLASH_ROM_IMPL
|