2019-05-10 03:34:06 +00:00
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|
|
menu "ESP32S2-specific"
|
2019-06-19 07:31:47 +00:00
|
|
|
# TODO: this component simply shouldn't be included
|
|
|
|
# in the build at the CMake level, but this is currently
|
|
|
|
# not working so we just hide all items here
|
2020-01-17 03:47:08 +00:00
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|
|
visible if IDF_TARGET_ESP32S2
|
2019-05-10 03:34:06 +00:00
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|
2019-06-04 07:02:01 +00:00
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|
choice ESP32S2_DEFAULT_CPU_FREQ_MHZ
|
2019-05-10 03:34:06 +00:00
|
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|
prompt "CPU frequency"
|
2019-12-26 07:25:24 +00:00
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|
|
default ESP32S2_DEFAULT_CPU_FREQ_160 if !IDF_ENV_FPGA
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|
default ESP32S2_DEFAULT_CPU_FREQ_FPGA if IDF_ENV_FPGA
|
2019-05-10 03:34:06 +00:00
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|
|
help
|
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|
|
CPU frequency to be set on application startup.
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|
2019-12-26 07:25:24 +00:00
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|
|
config ESP32S2_DEFAULT_CPU_FREQ_FPGA
|
2020-02-17 16:21:21 +00:00
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|
|
depends on IDF_ENV_FPGA
|
2019-12-26 07:25:24 +00:00
|
|
|
bool "FPGA"
|
2019-06-04 07:02:01 +00:00
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|
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config ESP32S2_DEFAULT_CPU_FREQ_80
|
2019-05-10 03:34:06 +00:00
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bool "80 MHz"
|
2019-06-04 07:02:01 +00:00
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|
|
config ESP32S2_DEFAULT_CPU_FREQ_160
|
2019-05-10 03:34:06 +00:00
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bool "160 MHz"
|
2019-06-04 07:02:01 +00:00
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config ESP32S2_DEFAULT_CPU_FREQ_240
|
2019-05-10 03:34:06 +00:00
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|
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bool "240 MHz"
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endchoice
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2019-06-04 07:02:01 +00:00
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|
|
config ESP32S2_DEFAULT_CPU_FREQ_MHZ
|
2019-05-10 03:34:06 +00:00
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int
|
2019-12-26 07:25:24 +00:00
|
|
|
default 40 if IDF_ENV_FPGA
|
2019-06-04 07:02:01 +00:00
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|
default 80 if ESP32S2_DEFAULT_CPU_FREQ_80
|
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default 160 if ESP32S2_DEFAULT_CPU_FREQ_160
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default 240 if ESP32S2_DEFAULT_CPU_FREQ_240
|
2019-05-10 03:34:06 +00:00
|
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|
menu "Cache config"
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|
2019-06-04 07:02:01 +00:00
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|
choice ESP32S2_INSTRUCTION_CACHE_SIZE
|
2019-05-10 03:34:06 +00:00
|
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|
prompt "Instruction cache size"
|
2019-06-04 07:02:01 +00:00
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|
default ESP32S2_INSTRUCTION_CACHE_8KB
|
2019-05-10 03:34:06 +00:00
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|
help
|
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|
|
Instruction cache size to be set on application startup.
|
2019-06-19 07:31:47 +00:00
|
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|
If you use 8KB instruction cache rather than 16KB instruction cache,
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then the other 8KB will be added to the heap.
|
2019-05-10 03:34:06 +00:00
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2019-06-04 07:02:01 +00:00
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|
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config ESP32S2_INSTRUCTION_CACHE_8KB
|
2019-05-10 03:34:06 +00:00
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bool "8KB"
|
2019-06-04 07:02:01 +00:00
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config ESP32S2_INSTRUCTION_CACHE_16KB
|
2019-05-10 03:34:06 +00:00
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bool "16KB"
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endchoice
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|
2019-06-04 07:02:01 +00:00
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choice ESP32S2_INSTRUCTION_CACHE_LINE_SIZE
|
2019-05-10 03:34:06 +00:00
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|
|
prompt "Instruction cache line size"
|
2019-06-04 07:02:01 +00:00
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|
default ESP32S2_INSTRUCTION_CACHE_LINE_32B
|
2019-05-10 03:34:06 +00:00
|
|
|
help
|
|
|
|
Instruction cache line size to be set on application startup.
|
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|
2019-06-04 07:02:01 +00:00
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|
|
config ESP32S2_INSTRUCTION_CACHE_LINE_16B
|
2019-05-10 03:34:06 +00:00
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|
|
bool "16 Bytes"
|
2019-06-04 07:02:01 +00:00
|
|
|
config ESP32S2_INSTRUCTION_CACHE_LINE_32B
|
2019-05-10 03:34:06 +00:00
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|
|
bool "32 Bytes"
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endchoice
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|
2019-06-04 07:02:01 +00:00
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|
|
choice ESP32S2_DATA_CACHE_SIZE
|
2019-05-10 03:34:06 +00:00
|
|
|
prompt "Data cache size"
|
2020-07-12 13:33:55 +00:00
|
|
|
default ESP32S2_DATA_CACHE_0KB if !ESP32S2_SPIRAM_SUPPORT
|
|
|
|
default ESP32S2_DATA_CACHE_8KB if ESP32S2_SPIRAM_SUPPORT
|
2019-05-10 03:34:06 +00:00
|
|
|
help
|
|
|
|
Data cache size to be set on application startup.
|
2020-07-12 13:33:55 +00:00
|
|
|
If you use 0KB data cache, the other 16KB will be added to the heap
|
|
|
|
If you use 8KB data cache rather than 16KB data cache, the other 8KB will be added to the heap
|
2019-05-10 03:34:06 +00:00
|
|
|
|
2019-06-04 07:02:01 +00:00
|
|
|
config ESP32S2_DATA_CACHE_0KB
|
|
|
|
depends on !ESP32S2_SPIRAM_SUPPORT
|
2019-05-10 03:34:06 +00:00
|
|
|
bool "0KB"
|
2019-06-04 07:02:01 +00:00
|
|
|
config ESP32S2_DATA_CACHE_8KB
|
2019-05-10 03:34:06 +00:00
|
|
|
bool "8KB"
|
2019-06-04 07:02:01 +00:00
|
|
|
config ESP32S2_DATA_CACHE_16KB
|
2019-05-10 03:34:06 +00:00
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|
|
bool "16KB"
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|
endchoice
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|
2019-06-04 07:02:01 +00:00
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|
|
choice ESP32S2_DATA_CACHE_LINE_SIZE
|
2019-05-10 03:34:06 +00:00
|
|
|
prompt "Data cache line size"
|
2019-06-04 07:02:01 +00:00
|
|
|
default ESP32S2_DATA_CACHE_LINE_32B
|
2019-05-10 03:34:06 +00:00
|
|
|
help
|
|
|
|
Data cache line size to be set on application startup.
|
|
|
|
|
2019-06-04 07:02:01 +00:00
|
|
|
config ESP32S2_DATA_CACHE_LINE_16B
|
2019-05-10 03:34:06 +00:00
|
|
|
bool "16 Bytes"
|
2019-06-04 07:02:01 +00:00
|
|
|
config ESP32S2_DATA_CACHE_LINE_32B
|
2019-05-10 03:34:06 +00:00
|
|
|
bool "32 Bytes"
|
|
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|
endchoice
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|
|
|
|
2019-06-04 07:02:01 +00:00
|
|
|
config ESP32S2_INSTRUCTION_CACHE_WRAP
|
2019-05-10 03:34:06 +00:00
|
|
|
bool "Enable instruction cache wrap"
|
|
|
|
default "n"
|
|
|
|
help
|
|
|
|
If enabled, instruction cache will use wrap mode to read spi flash (maybe spiram).
|
|
|
|
The wrap length equals to INSTRUCTION_CACHE_LINE_SIZE.
|
|
|
|
However, it depends on complex conditions.
|
|
|
|
|
2019-06-04 07:02:01 +00:00
|
|
|
config ESP32S2_DATA_CACHE_WRAP
|
2019-05-10 03:34:06 +00:00
|
|
|
bool "Enable data cache wrap"
|
|
|
|
default "n"
|
|
|
|
help
|
|
|
|
If enabled, data cache will use wrap mode to read spiram (maybe spi flash).
|
|
|
|
The wrap length equals to DATA_CACHE_LINE_SIZE.
|
|
|
|
However, it depends on complex conditions.
|
|
|
|
|
2019-06-04 07:02:01 +00:00
|
|
|
endmenu # Cache config
|
2019-05-10 03:34:06 +00:00
|
|
|
|
2019-06-05 04:34:19 +00:00
|
|
|
# Note: to support SPIRAM across multiple chips, check CONFIG_SPIRAM
|
|
|
|
# instead
|
2019-06-04 07:02:01 +00:00
|
|
|
config ESP32S2_SPIRAM_SUPPORT
|
2019-05-10 03:34:06 +00:00
|
|
|
bool "Support for external, SPI-connected RAM"
|
|
|
|
default "n"
|
2019-06-05 04:34:19 +00:00
|
|
|
select SPIRAM
|
2019-05-10 03:34:06 +00:00
|
|
|
help
|
|
|
|
This enables support for an external SPI RAM chip, connected in parallel with the
|
|
|
|
main SPI flash chip.
|
|
|
|
|
|
|
|
menu "SPI RAM config"
|
2019-06-04 07:02:01 +00:00
|
|
|
depends on ESP32S2_SPIRAM_SUPPORT
|
2019-05-10 03:34:06 +00:00
|
|
|
|
|
|
|
choice SPIRAM_TYPE
|
|
|
|
prompt "Type of SPI RAM chip in use"
|
2020-03-18 09:49:34 +00:00
|
|
|
default SPIRAM_TYPE_AUTO
|
|
|
|
|
|
|
|
config SPIRAM_TYPE_AUTO
|
|
|
|
bool "Auto-detect"
|
2020-03-17 13:59:11 +00:00
|
|
|
|
|
|
|
config SPIRAM_TYPE_ESPPSRAM16
|
|
|
|
bool "ESP-PSRAM16 or APS1604"
|
2019-05-10 03:34:06 +00:00
|
|
|
|
|
|
|
config SPIRAM_TYPE_ESPPSRAM32
|
|
|
|
bool "ESP-PSRAM32 or IS25WP032"
|
|
|
|
|
|
|
|
config SPIRAM_TYPE_ESPPSRAM64
|
|
|
|
bool "ESP-PSRAM64 or LY68L6400"
|
|
|
|
endchoice
|
|
|
|
|
|
|
|
config SPIRAM_SIZE
|
|
|
|
int
|
2020-03-18 09:49:34 +00:00
|
|
|
default -1 if SPIRAM_TYPE_AUTO
|
2020-03-17 13:59:11 +00:00
|
|
|
default 2097152 if SPIRAM_TYPE_ESPPSRAM16
|
2019-05-10 03:34:06 +00:00
|
|
|
default 4194304 if SPIRAM_TYPE_ESPPSRAM32
|
|
|
|
default 8388608 if SPIRAM_TYPE_ESPPSRAM64
|
|
|
|
default 0
|
2020-03-18 09:49:34 +00:00
|
|
|
|
2020-01-10 11:31:30 +00:00
|
|
|
menu "PSRAM clock and cs IO for ESP32S2"
|
|
|
|
depends on ESP32S2_SPIRAM_SUPPORT
|
|
|
|
config DEFAULT_PSRAM_CLK_IO
|
|
|
|
int "PSRAM CLK IO number"
|
|
|
|
range 0 33
|
|
|
|
default 30
|
|
|
|
help
|
|
|
|
The PSRAM CLOCK IO can be any unused GPIO, user can config it based on hardware design.
|
|
|
|
|
|
|
|
config DEFAULT_PSRAM_CS_IO
|
|
|
|
int "PSRAM CS IO number"
|
|
|
|
range 0 33
|
|
|
|
default 26
|
|
|
|
help
|
|
|
|
The PSRAM CS IO can be any unused GPIO, user can config it based on hardware design.
|
|
|
|
endmenu
|
2019-06-04 07:02:01 +00:00
|
|
|
config SPIRAM_FETCH_INSTRUCTIONS
|
2019-05-10 03:34:06 +00:00
|
|
|
bool "Cache fetch instructions from SPI RAM"
|
|
|
|
default n
|
|
|
|
help
|
|
|
|
If enabled, instruction in flash will be copied into SPIRAM.
|
2019-06-19 07:31:47 +00:00
|
|
|
If SPIRAM_RODATA also enabled,
|
|
|
|
you can run the instruction when erasing or programming the flash.
|
2019-05-10 03:34:06 +00:00
|
|
|
|
2019-06-04 07:02:01 +00:00
|
|
|
config SPIRAM_RODATA
|
2019-05-10 03:34:06 +00:00
|
|
|
bool "Cache load read only data from SPI RAM"
|
|
|
|
default n
|
|
|
|
help
|
|
|
|
If enabled, radata in flash will be copied into SPIRAM.
|
2019-06-19 07:31:47 +00:00
|
|
|
If SPIRAM_FETCH_INSTRUCTIONS also enabled,
|
|
|
|
you can run the instruction when erasing or programming the flash.
|
2019-05-10 03:34:06 +00:00
|
|
|
|
|
|
|
choice SPIRAM_SPEED
|
|
|
|
prompt "Set RAM clock speed"
|
2019-09-10 07:58:52 +00:00
|
|
|
default SPIRAM_SPEED_40M
|
2019-05-10 03:34:06 +00:00
|
|
|
help
|
|
|
|
Select the speed for the SPI RAM chip.
|
|
|
|
|
|
|
|
config SPIRAM_SPEED_80M
|
|
|
|
bool "80MHz clock speed"
|
2019-08-22 06:17:46 +00:00
|
|
|
config SPIRAM_SPEED_40M
|
|
|
|
bool "40Mhz clock speed"
|
|
|
|
config SPIRAM_SPEED_26M
|
|
|
|
bool "26Mhz clock speed"
|
|
|
|
config SPIRAM_SPEED_20M
|
|
|
|
bool "20Mhz clock speed"
|
2019-05-10 03:34:06 +00:00
|
|
|
endchoice
|
|
|
|
|
2019-06-19 07:31:47 +00:00
|
|
|
# insert non-chip-specific items here
|
2021-02-18 13:09:27 +00:00
|
|
|
source "$IDF_PATH/components/esp_hw_support/Kconfig.spiram.common"
|
2019-06-19 07:31:47 +00:00
|
|
|
|
2019-05-10 03:34:06 +00:00
|
|
|
endmenu
|
|
|
|
|
2019-06-04 07:02:01 +00:00
|
|
|
config ESP32S2_MEMMAP_TRACEMEM
|
2019-05-10 03:34:06 +00:00
|
|
|
bool
|
|
|
|
default "n"
|
|
|
|
|
2020-01-22 12:56:17 +00:00
|
|
|
config ESP32S2_MEMMAP_TRACEMEM_TWOBANKS
|
|
|
|
bool
|
|
|
|
default "n"
|
|
|
|
|
2019-06-04 07:02:01 +00:00
|
|
|
config ESP32S2_TRAX
|
2019-05-10 03:34:06 +00:00
|
|
|
bool "Use TRAX tracing feature"
|
|
|
|
default "n"
|
2019-06-04 07:02:01 +00:00
|
|
|
select ESP32S2_MEMMAP_TRACEMEM
|
2019-05-10 03:34:06 +00:00
|
|
|
help
|
2019-06-04 07:02:01 +00:00
|
|
|
The ESP32S2 contains a feature which allows you to trace the execution path the processor
|
2019-05-10 03:34:06 +00:00
|
|
|
has taken through the program. This is stored in a chunk of 32K (16K for single-processor)
|
|
|
|
of memory that can't be used for general purposes anymore. Disable this if you do not know
|
|
|
|
what this is.
|
|
|
|
|
2019-06-04 07:02:01 +00:00
|
|
|
config ESP32S2_TRACEMEM_RESERVE_DRAM
|
2019-05-10 03:34:06 +00:00
|
|
|
hex
|
2019-07-24 17:20:11 +00:00
|
|
|
default 0x8000 if ESP32S2_MEMMAP_TRACEMEM && ESP32S2_MEMMAP_TRACEMEM_TWOBANKS
|
|
|
|
default 0x4000 if ESP32S2_MEMMAP_TRACEMEM && !ESP32S2_MEMMAP_TRACEMEM_TWOBANKS
|
2019-05-10 03:34:06 +00:00
|
|
|
default 0x0
|
|
|
|
|
|
|
|
|
2019-06-04 07:02:01 +00:00
|
|
|
choice ESP32S2_UNIVERSAL_MAC_ADDRESSES
|
2019-05-10 03:34:06 +00:00
|
|
|
bool "Number of universally administered (by IEEE) MAC address"
|
2020-01-10 09:46:46 +00:00
|
|
|
default ESP32S2_UNIVERSAL_MAC_ADDRESSES_TWO
|
2019-05-10 03:34:06 +00:00
|
|
|
help
|
|
|
|
Configure the number of universally administered (by IEEE) MAC addresses.
|
2020-01-10 09:46:46 +00:00
|
|
|
During initialization, MAC addresses for each network interface are generated or derived from a
|
2019-05-10 03:34:06 +00:00
|
|
|
single base MAC address.
|
2020-01-10 09:46:46 +00:00
|
|
|
If the number of universal MAC addresses is Two, all interfaces (WiFi station, WiFi softap) receive a
|
|
|
|
universally administered MAC address. They are generated sequentially by adding 0, and 1 (respectively)
|
|
|
|
to the final octet of the base MAC address. If the number of universal MAC addresses is one,
|
|
|
|
only WiFi station receives a universally administered MAC address.
|
|
|
|
It's generated by adding 0 to the base MAC address.
|
|
|
|
The WiFi softap receives local MAC addresses. It's derived from the universal WiFi station MAC addresses.
|
2019-05-10 03:34:06 +00:00
|
|
|
When using the default (Espressif-assigned) base MAC address, either setting can be used. When using
|
|
|
|
a custom universal MAC address range, the correct setting will depend on the allocation of MAC
|
2020-01-10 09:46:46 +00:00
|
|
|
addresses in this range (either 1 or 2 per device.)
|
2019-05-10 03:34:06 +00:00
|
|
|
|
2020-01-10 09:46:46 +00:00
|
|
|
config ESP32S2_UNIVERSAL_MAC_ADDRESSES_ONE
|
|
|
|
bool "One"
|
|
|
|
select ESP_MAC_ADDR_UNIVERSE_WIFI_STA
|
2019-06-04 07:02:01 +00:00
|
|
|
config ESP32S2_UNIVERSAL_MAC_ADDRESSES_TWO
|
2019-05-10 03:34:06 +00:00
|
|
|
bool "Two"
|
2020-01-10 09:46:46 +00:00
|
|
|
select ESP_MAC_ADDR_UNIVERSE_WIFI_STA
|
|
|
|
select ESP_MAC_ADDR_UNIVERSE_WIFI_AP
|
2019-05-10 03:34:06 +00:00
|
|
|
endchoice
|
|
|
|
|
2019-06-04 07:02:01 +00:00
|
|
|
config ESP32S2_UNIVERSAL_MAC_ADDRESSES
|
2019-05-10 03:34:06 +00:00
|
|
|
int
|
2020-01-10 09:46:46 +00:00
|
|
|
default 1 if ESP32S2_UNIVERSAL_MAC_ADDRESSES_ONE
|
2019-06-04 07:02:01 +00:00
|
|
|
default 2 if ESP32S2_UNIVERSAL_MAC_ADDRESSES_TWO
|
2019-05-10 03:34:06 +00:00
|
|
|
|
2019-06-10 07:07:12 +00:00
|
|
|
config ESP32S2_ULP_COPROC_ENABLED
|
|
|
|
bool "Enable Ultra Low Power (ULP) Coprocessor"
|
|
|
|
default "n"
|
|
|
|
help
|
|
|
|
Set to 'y' if you plan to load a firmware for the coprocessor.
|
|
|
|
|
|
|
|
If this option is enabled, further coprocessor configuration will appear in the Components menu.
|
|
|
|
|
|
|
|
config ESP32S2_ULP_COPROC_RESERVE_MEM
|
|
|
|
int
|
|
|
|
prompt "RTC slow memory reserved for coprocessor" if ESP32S2_ULP_COPROC_ENABLED
|
2020-04-17 19:34:56 +00:00
|
|
|
default 2048 if ESP32S2_ULP_COPROC_ENABLED
|
2019-06-10 07:07:12 +00:00
|
|
|
range 32 8192 if ESP32S2_ULP_COPROC_ENABLED
|
|
|
|
default 0 if !ESP32S2_ULP_COPROC_ENABLED
|
|
|
|
range 0 0 if !ESP32S2_ULP_COPROC_ENABLED
|
|
|
|
help
|
|
|
|
Bytes of memory to reserve for ULP coprocessor firmware & data.
|
|
|
|
|
|
|
|
Data is reserved at the beginning of RTC slow memory.
|
|
|
|
|
2020-04-17 19:34:56 +00:00
|
|
|
config ESP32S2_ULP_COPROC_RISCV
|
|
|
|
bool "Enable RISC-V as ULP coprocessor"
|
|
|
|
depends on ESP32S2_ULP_COPROC_ENABLED
|
|
|
|
default n
|
|
|
|
help
|
|
|
|
Set this to y to use the RISC-V coprocessor instead of the FSM-ULP.
|
|
|
|
|
2019-06-04 07:02:01 +00:00
|
|
|
config ESP32S2_DEBUG_OCDAWARE
|
2019-05-10 03:34:06 +00:00
|
|
|
bool "Make exception and panic handlers JTAG/OCD aware"
|
|
|
|
default y
|
2019-10-16 12:23:05 +00:00
|
|
|
select FREERTOS_DEBUG_OCDAWARE
|
2019-05-10 03:34:06 +00:00
|
|
|
help
|
|
|
|
The FreeRTOS panic and unhandled exception handers can detect a JTAG OCD debugger and
|
|
|
|
instead of panicking, have the debugger stop on the offending instruction.
|
|
|
|
|
2019-06-04 07:02:01 +00:00
|
|
|
config ESP32S2_DEBUG_STUBS_ENABLE
|
2019-05-10 03:34:06 +00:00
|
|
|
bool "OpenOCD debug stubs"
|
2019-06-05 04:09:09 +00:00
|
|
|
default COMPILER_OPTIMIZATION_LEVEL_DEBUG
|
2019-06-04 07:02:01 +00:00
|
|
|
depends on !ESP32S2_TRAX
|
2019-05-10 03:34:06 +00:00
|
|
|
help
|
|
|
|
Debug stubs are used by OpenOCD to execute pre-compiled onboard code which does some useful debugging,
|
|
|
|
e.g. GCOV data dump.
|
|
|
|
|
2019-06-04 07:02:01 +00:00
|
|
|
config ESP32S2_BROWNOUT_DET
|
2019-05-10 03:34:06 +00:00
|
|
|
bool "Hardware brownout detect & reset"
|
|
|
|
default y
|
|
|
|
help
|
2020-01-21 15:32:28 +00:00
|
|
|
The ESP32-S2 has a built-in brownout detector which can detect if the voltage is lower than
|
2019-05-10 03:34:06 +00:00
|
|
|
a specific value. If this happens, it will reset the chip in order to prevent unintended
|
|
|
|
behaviour.
|
|
|
|
|
2019-06-05 04:09:09 +00:00
|
|
|
choice ESP32S2_BROWNOUT_DET_LVL_SEL
|
2019-05-10 03:34:06 +00:00
|
|
|
prompt "Brownout voltage level"
|
2019-06-05 04:09:09 +00:00
|
|
|
depends on ESP32S2_BROWNOUT_DET
|
2020-01-21 15:32:28 +00:00
|
|
|
default ESP32S2_BROWNOUT_DET_LVL_SEL_7
|
2019-05-10 03:34:06 +00:00
|
|
|
help
|
|
|
|
The brownout detector will reset the chip when the supply voltage is approximately
|
|
|
|
below this level. Note that there may be some variation of brownout voltage level
|
2020-01-21 15:32:28 +00:00
|
|
|
between each ESP3-S2 chip.
|
2019-05-10 03:34:06 +00:00
|
|
|
|
|
|
|
#The voltage levels here are estimates, more work needs to be done to figure out the exact voltages
|
|
|
|
#of the brownout threshold levels.
|
2019-06-04 07:02:01 +00:00
|
|
|
config ESP32S2_BROWNOUT_DET_LVL_SEL_7
|
2020-01-21 15:32:28 +00:00
|
|
|
bool "2.44V"
|
|
|
|
config ESP32S2_BROWNOUT_DET_LVL_SEL_6
|
|
|
|
bool "2.56V"
|
|
|
|
config ESP32S2_BROWNOUT_DET_LVL_SEL_5
|
|
|
|
bool "2.67V"
|
|
|
|
config ESP32S2_BROWNOUT_DET_LVL_SEL_4
|
|
|
|
bool "2.84V"
|
|
|
|
config ESP32S2_BROWNOUT_DET_LVL_SEL_3
|
|
|
|
bool "2.98V"
|
|
|
|
config ESP32S2_BROWNOUT_DET_LVL_SEL_2
|
|
|
|
bool "3.19V"
|
|
|
|
config ESP32S2_BROWNOUT_DET_LVL_SEL_1
|
|
|
|
bool "3.30V"
|
2019-05-10 03:34:06 +00:00
|
|
|
endchoice
|
|
|
|
|
2019-06-04 07:02:01 +00:00
|
|
|
config ESP32S2_BROWNOUT_DET_LVL
|
2019-05-10 03:34:06 +00:00
|
|
|
int
|
2019-06-04 07:02:01 +00:00
|
|
|
default 1 if ESP32S2_BROWNOUT_DET_LVL_SEL_1
|
|
|
|
default 2 if ESP32S2_BROWNOUT_DET_LVL_SEL_2
|
|
|
|
default 3 if ESP32S2_BROWNOUT_DET_LVL_SEL_3
|
|
|
|
default 4 if ESP32S2_BROWNOUT_DET_LVL_SEL_4
|
|
|
|
default 5 if ESP32S2_BROWNOUT_DET_LVL_SEL_5
|
|
|
|
default 6 if ESP32S2_BROWNOUT_DET_LVL_SEL_6
|
|
|
|
default 7 if ESP32S2_BROWNOUT_DET_LVL_SEL_7
|
2019-05-10 03:34:06 +00:00
|
|
|
|
|
|
|
|
|
|
|
# Note about the use of "FRC1" name: currently FRC1 timer is not used for
|
|
|
|
# high resolution timekeeping anymore. Instead the esp_timer API, implemented
|
|
|
|
# using FRC2 timer, is used.
|
|
|
|
# FRC1 name in the option name is kept for compatibility.
|
2019-06-10 07:07:12 +00:00
|
|
|
choice ESP32S2_TIME_SYSCALL
|
2019-05-10 03:34:06 +00:00
|
|
|
prompt "Timers used for gettimeofday function"
|
2019-06-04 07:02:01 +00:00
|
|
|
default ESP32S2_TIME_SYSCALL_USE_RTC_FRC1
|
2019-05-10 03:34:06 +00:00
|
|
|
help
|
|
|
|
This setting defines which hardware timers are used to
|
|
|
|
implement 'gettimeofday' and 'time' functions in C library.
|
|
|
|
|
|
|
|
- If both high-resolution and RTC timers are used, timekeeping will
|
|
|
|
continue in deep sleep. Time will be reported at 1 microsecond
|
|
|
|
resolution. This is the default, and the recommended option.
|
|
|
|
- If only high-resolution timer is used, gettimeofday will
|
|
|
|
provide time at microsecond resolution.
|
|
|
|
Time will not be preserved when going into deep sleep mode.
|
|
|
|
- If only RTC timer is used, timekeeping will continue in
|
|
|
|
deep sleep, but time will be measured at 6.(6) microsecond
|
|
|
|
resolution. Also the gettimeofday function itself may take
|
|
|
|
longer to run.
|
|
|
|
- If no timers are used, gettimeofday and time functions
|
|
|
|
return -1 and set errno to ENOSYS.
|
|
|
|
- When RTC is used for timekeeping, two RTC_STORE registers are
|
|
|
|
used to keep time in deep sleep mode.
|
|
|
|
|
2019-06-04 07:02:01 +00:00
|
|
|
config ESP32S2_TIME_SYSCALL_USE_RTC_FRC1
|
2019-05-10 03:34:06 +00:00
|
|
|
bool "RTC and high-resolution timer"
|
2020-10-20 06:09:32 +00:00
|
|
|
select ESP_TIME_FUNCS_USE_RTC_TIMER
|
|
|
|
select ESP_TIME_FUNCS_USE_ESP_TIMER
|
2019-06-04 07:02:01 +00:00
|
|
|
config ESP32S2_TIME_SYSCALL_USE_RTC
|
2019-05-10 03:34:06 +00:00
|
|
|
bool "RTC"
|
2020-10-20 06:09:32 +00:00
|
|
|
select ESP_TIME_FUNCS_USE_RTC_TIMER
|
2019-06-04 07:02:01 +00:00
|
|
|
config ESP32S2_TIME_SYSCALL_USE_FRC1
|
2019-05-10 03:34:06 +00:00
|
|
|
bool "High-resolution timer"
|
2020-10-20 06:09:32 +00:00
|
|
|
select ESP_TIME_FUNCS_USE_ESP_TIMER
|
2019-06-04 07:02:01 +00:00
|
|
|
config ESP32S2_TIME_SYSCALL_USE_NONE
|
2019-05-10 03:34:06 +00:00
|
|
|
bool "None"
|
2020-10-20 06:09:32 +00:00
|
|
|
select ESP_TIME_FUNCS_USE_NONE
|
2019-05-10 03:34:06 +00:00
|
|
|
endchoice
|
|
|
|
|
2019-06-04 07:02:01 +00:00
|
|
|
choice ESP32S2_RTC_CLK_SRC
|
2019-05-10 03:34:06 +00:00
|
|
|
prompt "RTC clock source"
|
2019-06-04 07:02:01 +00:00
|
|
|
default ESP32S2_RTC_CLK_SRC_INT_RC
|
2019-05-10 03:34:06 +00:00
|
|
|
help
|
|
|
|
Choose which clock is used as RTC clock source.
|
|
|
|
|
2020-02-12 17:09:17 +00:00
|
|
|
- "Internal 90kHz oscillator" option provides lowest deep sleep current
|
|
|
|
consumption, and does not require extra external components. However
|
|
|
|
frequency stability with respect to temperature is poor, so time may
|
|
|
|
drift in deep/light sleep modes.
|
|
|
|
- "External 32kHz crystal" provides better frequency stability, at the
|
|
|
|
expense of slightly higher (1uA) deep sleep current consumption.
|
|
|
|
- "External 32kHz oscillator" allows using 32kHz clock generated by an
|
|
|
|
external circuit. In this case, external clock signal must be connected
|
2020-09-23 09:13:19 +00:00
|
|
|
to 32K_XN pin. Amplitude should be <1.2V in case of sine wave signal,
|
2020-02-12 17:09:17 +00:00
|
|
|
and <1V in case of square wave signal. Common mode voltage should be
|
|
|
|
0.1 < Vcm < 0.5Vamp, where Vamp is the signal amplitude.
|
2020-09-23 09:13:19 +00:00
|
|
|
Additionally, 1nF capacitor must be connected between 32K_XP pin and
|
|
|
|
ground. 32K_XP pin can not be used as a GPIO in this case.
|
2020-02-12 17:09:17 +00:00
|
|
|
- "Internal 8MHz oscillator divided by 256" option results in higher
|
|
|
|
deep sleep current (by 5uA) but has better frequency stability than
|
|
|
|
the internal 90kHz oscillator. It does not require external components.
|
|
|
|
|
2019-06-04 07:02:01 +00:00
|
|
|
config ESP32S2_RTC_CLK_SRC_INT_RC
|
2020-02-12 17:09:17 +00:00
|
|
|
bool "Internal 90kHz RC oscillator"
|
2019-06-04 07:02:01 +00:00
|
|
|
config ESP32S2_RTC_CLK_SRC_EXT_CRYS
|
2019-05-10 03:34:06 +00:00
|
|
|
bool "External 32kHz crystal"
|
2020-07-14 12:39:30 +00:00
|
|
|
select ESP_SYSTEM_RTC_EXT_XTAL
|
2020-02-12 17:09:17 +00:00
|
|
|
config ESP32S2_RTC_CLK_SRC_EXT_OSC
|
2020-09-23 09:13:19 +00:00
|
|
|
bool "External 32kHz oscillator at 32K_XN pin"
|
2020-02-12 17:09:17 +00:00
|
|
|
config ESP32S2_RTC_CLK_SRC_INT_8MD256
|
|
|
|
bool "Internal 8MHz oscillator, divided by 256 (~32kHz)"
|
2019-05-10 03:34:06 +00:00
|
|
|
endchoice
|
|
|
|
|
2019-06-10 07:07:12 +00:00
|
|
|
config ESP32S2_RTC_CLK_CAL_CYCLES
|
2019-05-10 03:34:06 +00:00
|
|
|
int "Number of cycles for RTC_SLOW_CLK calibration"
|
2020-10-28 07:58:28 +00:00
|
|
|
default 3000 if ESP32S2_RTC_CLK_SRC_EXT_CRYS || ESP32S2_RTC_CLK_SRC_EXT_OSC || ESP32S2_RTC_CLK_SRC_INT_8MD256
|
2020-02-17 16:21:15 +00:00
|
|
|
default 576 if ESP32S2_RTC_CLK_SRC_INT_RC
|
2019-05-10 03:34:06 +00:00
|
|
|
range 0 125000
|
|
|
|
help
|
|
|
|
When the startup code initializes RTC_SLOW_CLK, it can perform
|
|
|
|
calibration by comparing the RTC_SLOW_CLK frequency with main XTAL
|
|
|
|
frequency. This option sets the number of RTC_SLOW_CLK cycles measured
|
|
|
|
by the calibration routine. Higher numbers increase calibration
|
|
|
|
precision, which may be important for applications which spend a lot of
|
|
|
|
time in deep sleep. Lower numbers reduce startup time.
|
|
|
|
|
|
|
|
When this option is set to 0, clock calibration will not be performed at
|
|
|
|
startup, and approximate clock frequencies will be assumed:
|
|
|
|
|
2020-09-23 09:13:19 +00:00
|
|
|
- 90000 Hz if internal RC oscillator is used as clock source. For this use value 1024.
|
2019-05-10 03:34:06 +00:00
|
|
|
- 32768 Hz if the 32k crystal oscillator is used. For this use value 3000 or more.
|
|
|
|
In case more value will help improve the definition of the launch of the crystal.
|
|
|
|
If the crystal could not start, it will be switched to internal RC.
|
|
|
|
|
2020-03-10 11:24:28 +00:00
|
|
|
config ESP32S2_RTC_XTAL_CAL_RETRY
|
|
|
|
int "Number of attempts to repeat 32k XTAL calibration"
|
|
|
|
default 3
|
|
|
|
depends on ESP32S2_RTC_CLK_SRC_EXT_CRYS
|
|
|
|
help
|
|
|
|
Number of attempts to repeat 32k XTAL calibration
|
|
|
|
before giving up and switching to the internal RC.
|
|
|
|
Increase this option if the 32k crystal oscillator
|
|
|
|
does not start and switches to internal RC.
|
|
|
|
|
2019-06-04 07:02:01 +00:00
|
|
|
config ESP32S2_NO_BLOBS
|
2019-05-10 03:34:06 +00:00
|
|
|
bool "No Binary Blobs"
|
|
|
|
depends on !BT_ENABLED
|
|
|
|
default n
|
|
|
|
help
|
|
|
|
If enabled, this disables the linking of binary libraries in the application build. Note
|
|
|
|
that after enabling this Wi-Fi/Bluetooth will not work.
|
|
|
|
|
2020-04-30 14:48:49 +00:00
|
|
|
config ESP32S2_KEEP_USB_ALIVE
|
|
|
|
bool "Keep USB peripheral enabled at start up" if !ESP_CONSOLE_USB_CDC
|
|
|
|
default y if ESP_CONSOLE_USB_CDC
|
|
|
|
help
|
|
|
|
During the application initialization process, all the peripherals except UARTs and timers
|
|
|
|
are reset. Enable this option to keep USB peripheral enabled.
|
|
|
|
This option is automatically enabled if "USB CDC" console is selected.
|
|
|
|
|
2020-04-19 06:19:44 +00:00
|
|
|
config ESP32S2_RTCDATA_IN_FAST_MEM
|
|
|
|
bool "Place RTC_DATA_ATTR and RTC_RODATA_ATTR variables into RTC fast memory segment"
|
|
|
|
default n
|
|
|
|
help
|
|
|
|
This option allows to place .rtc_data and .rtc_rodata sections into
|
|
|
|
RTC fast memory segment to free the slow memory region for ULP programs.
|
|
|
|
|
2020-06-02 18:17:28 +00:00
|
|
|
config ESP32S2_USE_FIXED_STATIC_RAM_SIZE
|
|
|
|
bool "Use fixed static RAM size"
|
|
|
|
default n
|
|
|
|
help
|
|
|
|
If this option is disabled, the DRAM part of the heap starts right after the .bss section,
|
|
|
|
within the dram0_0 region. As a result, adding or removing some static variables
|
|
|
|
will change the available heap size.
|
|
|
|
|
|
|
|
If this option is enabled, the DRAM part of the heap starts right after the dram0_0 region,
|
|
|
|
where its length is set with ESP32S2_FIXED_STATIC_RAM_SIZE
|
|
|
|
|
|
|
|
config ESP32S2_FIXED_STATIC_RAM_SIZE
|
|
|
|
hex "Fixed Static RAM size"
|
|
|
|
default 0x10000
|
|
|
|
range 0 0x34000
|
|
|
|
depends on ESP32S2_USE_FIXED_STATIC_RAM_SIZE
|
|
|
|
help
|
|
|
|
RAM size dedicated for static variables (.data & .bss sections).
|
|
|
|
|
2019-05-10 03:34:06 +00:00
|
|
|
endmenu # ESP32S2-Specific
|