2022-02-11 07:30:54 +00:00
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/*
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* SPDX-FileCopyrightText: 2021-2022 Espressif Systems (Shanghai) CO LTD
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*
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* SPDX-License-Identifier: Apache-2.0
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*/
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#include <sys/param.h>
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#include <stdint.h>
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#include <stdbool.h>
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#include "sdkconfig.h"
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#include "esp_err.h"
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#include "esp_attr.h"
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#include "hal/assert.h"
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#include "hal/mmu_hal.h"
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#include "hal/mmu_ll.h"
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#if CONFIG_IDF_TARGET_ESP32
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#include "esp32/rom/cache.h"
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#include "soc/dport_reg.h"
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#elif CONFIG_IDF_TARGET_ESP32S2
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#include "esp32s2/rom/cache.h"
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#elif CONFIG_IDF_TARGET_ESP32S3
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#include "esp32s3/rom/cache.h"
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#elif CONFIG_IDF_TARGET_ESP32C3
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#include "esp32c3/rom/cache.h"
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#elif CONFIG_IDF_TARGET_ESP32C2
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#include "esp32c2/rom/cache.h"
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2022-10-19 07:57:24 +00:00
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#elif CONFIG_IDF_TARGET_ESP32H4
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#include "esp32h4/rom/cache.h"
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2022-07-12 13:02:47 +00:00
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#elif CONFIG_IDF_TARGET_ESP32C6
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#include "esp32c6/rom/cache.h"
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2022-02-11 07:30:54 +00:00
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#endif
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void mmu_hal_init(void)
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{
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2022-04-21 13:55:44 +00:00
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mmu_ll_unmap_all(0);
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2022-02-11 07:30:54 +00:00
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#if !CONFIG_FREERTOS_UNICORE
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2022-04-21 13:55:44 +00:00
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mmu_ll_unmap_all(1);
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2022-02-11 07:30:54 +00:00
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#endif
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}
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#if !CONFIG_IDF_TARGET_ESP32
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//If decided, add a jira ticket for implementing these APIs on ESP32
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uint32_t mmu_hal_pages_to_bytes(uint32_t mmu_id, uint32_t page_num)
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{
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mmu_page_size_t page_size = mmu_ll_get_page_size(mmu_id);
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uint32_t shift_code = 0;
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switch (page_size) {
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case MMU_PAGE_64KB:
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shift_code = 16;
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break;
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case MMU_PAGE_32KB:
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shift_code = 15;
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break;
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case MMU_PAGE_16KB:
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shift_code = 14;
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break;
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default:
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HAL_ASSERT(shift_code);
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}
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return page_num << shift_code;
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}
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uint32_t mmu_hal_bytes_to_pages(uint32_t mmu_id, uint32_t bytes)
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{
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mmu_page_size_t page_size = mmu_ll_get_page_size(mmu_id);
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uint32_t shift_code = 0;
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switch (page_size) {
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case MMU_PAGE_64KB:
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shift_code = 16;
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break;
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case MMU_PAGE_32KB:
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shift_code = 15;
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break;
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case MMU_PAGE_16KB:
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shift_code = 14;
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break;
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default:
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HAL_ASSERT(shift_code);
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}
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return bytes >> shift_code;
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}
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void mmu_hal_map_region(uint32_t mmu_id, mmu_target_t mem_type, uint32_t vaddr, uint32_t paddr, uint32_t len, uint32_t *out_len)
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{
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uint32_t page_size_in_bytes = mmu_hal_pages_to_bytes(mmu_id, 1);
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HAL_ASSERT(vaddr % page_size_in_bytes == 0);
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HAL_ASSERT(paddr % page_size_in_bytes == 0);
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2022-07-27 02:57:49 +00:00
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HAL_ASSERT((paddr + len - 1) < mmu_hal_pages_to_bytes(mmu_id, MMU_MAX_PADDR_PAGE_NUM));
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2022-02-11 07:30:54 +00:00
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HAL_ASSERT(mmu_ll_check_valid_ext_vaddr_region(mmu_id, vaddr, len));
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uint32_t page_num = (len + page_size_in_bytes - 1) / page_size_in_bytes;
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uint32_t entry_id = 0;
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uint32_t mmu_val; //This is the physical address in the format that MMU supported
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*out_len = mmu_hal_pages_to_bytes(mmu_id, page_num);
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mmu_val = mmu_ll_format_paddr(mmu_id, paddr);
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while (page_num) {
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2022-06-27 10:50:19 +00:00
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entry_id = mmu_ll_get_entry_id(mmu_id, vaddr);
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2022-02-11 07:30:54 +00:00
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mmu_ll_write_entry(mmu_id, entry_id, mmu_val, mem_type);
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2022-06-27 10:50:19 +00:00
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vaddr += page_size_in_bytes;
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2022-02-11 07:30:54 +00:00
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mmu_val++;
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page_num--;
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}
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}
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#endif //#if !CONFIG_IDF_TARGET_ESP32
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