2021-05-31 04:43:23 +00:00
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/*
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* SPDX-FileCopyrightText: 2017-2021 Espressif Systems (Shanghai) CO LTD
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*
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* SPDX-License-Identifier: Apache-2.0
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*/
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2019-06-18 11:34:05 +00:00
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#include "esp_efuse.h"
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#include "esp_efuse_utility.h"
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#include "esp_efuse_table.h"
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#include "stdlib.h"
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#include "esp_types.h"
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#include "assert.h"
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#include "esp_err.h"
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#include "esp_log.h"
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#include "soc/efuse_periph.h"
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#include "bootloader_random.h"
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#include "sys/param.h"
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2021-09-16 12:57:57 +00:00
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#include "soc/syscon_reg.h"
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2019-06-18 11:34:05 +00:00
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const static char *TAG = "efuse";
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// Contains functions that provide access to efuse fields which are often used in IDF.
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// Returns chip version from efuse
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uint8_t esp_efuse_get_chip_ver(void)
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{
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uint8_t eco_bit0, eco_bit1, eco_bit2;
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esp_efuse_read_field_blob(ESP_EFUSE_CHIP_VER_REV1, &eco_bit0, 1);
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esp_efuse_read_field_blob(ESP_EFUSE_CHIP_VER_REV2, &eco_bit1, 1);
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2021-09-16 12:57:57 +00:00
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eco_bit2 = (REG_READ(SYSCON_DATE_REG) & 0x80000000) >> 31;
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2019-06-18 11:34:05 +00:00
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uint32_t combine_value = (eco_bit2 << 2) | (eco_bit1 << 1) | eco_bit0;
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uint8_t chip_ver = 0;
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switch (combine_value) {
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case 0:
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chip_ver = 0;
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break;
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case 1:
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chip_ver = 1;
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break;
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case 3:
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chip_ver = 2;
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break;
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case 7:
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chip_ver = 3;
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break;
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default:
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chip_ver = 0;
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break;
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}
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return chip_ver;
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}
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// Returns chip package from efuse
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uint32_t esp_efuse_get_pkg_ver(void)
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{
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uint32_t pkg_ver = 0;
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2020-08-05 06:56:01 +00:00
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esp_efuse_read_field_blob(ESP_EFUSE_CHIP_VER_PKG, &pkg_ver, 4);
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2019-06-18 11:34:05 +00:00
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return pkg_ver;
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}
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// Disable BASIC ROM Console via efuse
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void esp_efuse_disable_basic_rom_console(void)
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{
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2020-04-25 06:36:53 +00:00
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if (!esp_efuse_read_field_bit(ESP_EFUSE_CONSOLE_DEBUG_DISABLE)) {
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2019-06-18 11:34:05 +00:00
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esp_efuse_write_field_cnt(ESP_EFUSE_CONSOLE_DEBUG_DISABLE, 1);
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2020-06-01 12:33:23 +00:00
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ESP_LOGI(TAG, "Disable BASIC ROM Console fallback via efuse...");
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2019-06-18 11:34:05 +00:00
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}
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}
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2020-04-25 06:36:53 +00:00
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esp_err_t esp_efuse_disable_rom_download_mode(void)
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{
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#ifndef CONFIG_ESP32_REV_MIN_3
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/* Check if we support this revision at all */
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if(esp_efuse_get_chip_ver() < 3) {
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return ESP_ERR_NOT_SUPPORTED;
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}
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#endif
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if (esp_efuse_read_field_bit(ESP_EFUSE_UART_DOWNLOAD_DIS)) {
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return ESP_OK;
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}
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/* WR_DIS_FLASH_CRYPT_CNT also covers UART_DOWNLOAD_DIS on ESP32 */
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if(esp_efuse_read_field_bit(ESP_EFUSE_WR_DIS_FLASH_CRYPT_CNT)) {
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return ESP_ERR_INVALID_STATE;
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}
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return esp_efuse_write_field_bit(ESP_EFUSE_UART_DOWNLOAD_DIS);
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}
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2021-01-26 13:07:22 +00:00
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esp_err_t esp_efuse_set_rom_log_scheme(esp_efuse_rom_log_scheme_t log_scheme)
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{
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return ESP_ERR_NOT_SUPPORTED;
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}
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2019-06-18 11:34:05 +00:00
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void esp_efuse_write_random_key(uint32_t blk_wdata0_reg)
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{
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uint32_t buf[8];
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uint8_t raw[24];
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if (esp_efuse_get_coding_scheme(EFUSE_BLK2) == EFUSE_CODING_SCHEME_NONE) {
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bootloader_fill_random(buf, sizeof(buf));
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} else { // 3/4 Coding Scheme
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bootloader_fill_random(raw, sizeof(raw));
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esp_err_t r = esp_efuse_utility_apply_34_encoding(raw, buf, sizeof(raw));
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(void) r;
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assert(r == ESP_OK);
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}
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ESP_LOGV(TAG, "Writing random values to address 0x%08x", blk_wdata0_reg);
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for (int i = 0; i < 8; i++) {
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ESP_LOGV(TAG, "EFUSE_BLKx_WDATA%d_REG = 0x%08x", i, buf[i]);
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REG_WRITE(blk_wdata0_reg + 4*i, buf[i]);
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}
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bzero(buf, sizeof(buf));
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bzero(raw, sizeof(raw));
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}
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2021-06-16 23:21:36 +00:00
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// Permanently update values written to the efuse write registers
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void esp_efuse_burn_new_values(void)
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{
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esp_efuse_utility_burn_efuses();
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}
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