2022-05-25 19:16:15 +00:00
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/*
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* SPDX-FileCopyrightText: 2021-2022 Espressif Systems (Shanghai) CO LTD
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*
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* SPDX-License-Identifier: Apache-2.0
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*/
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#include "sdkconfig.h"
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#include <sys/param.h>
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#include "soc/soc_caps.h"
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#include "hal/assert.h"
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#include "hal/efuse_hal.h"
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#include "hal/efuse_ll.h"
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2022-03-17 13:58:15 +00:00
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#include "esp_attr.h"
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2022-05-25 19:16:15 +00:00
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2022-11-30 17:05:09 +00:00
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#define ESP_EFUSE_BLOCK_ERROR_BITS(error_reg, block) ((error_reg) & (0x0F << (4 * (block))))
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//The wafer_major and MSB of wafer_minor fields was allocated to other purposes when block version is v1.1.
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//Luckily only chip v0.0 have this kind of block version and efuse usage.
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//This workaround fixes the issue.
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static inline bool is_eco0(uint32_t minor_raw)
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{
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return ((minor_raw & 0x7) == 0 &&
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efuse_ll_get_blk_version_major() == 1 && efuse_ll_get_blk_version_minor() == 1);
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}
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2022-03-17 13:58:15 +00:00
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IRAM_ATTR uint32_t efuse_hal_get_major_chip_version(void)
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2022-05-25 19:16:15 +00:00
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{
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2022-11-30 17:05:09 +00:00
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uint32_t minor_raw = efuse_ll_get_chip_wafer_version_minor();
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if (is_eco0(minor_raw)) {
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return 0;
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2022-11-05 18:37:10 +00:00
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}
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2022-11-30 17:05:09 +00:00
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return efuse_ll_get_chip_wafer_version_major();
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2022-05-25 19:16:15 +00:00
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}
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2022-03-17 13:58:15 +00:00
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IRAM_ATTR uint32_t efuse_hal_get_minor_chip_version(void)
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2022-05-25 19:16:15 +00:00
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{
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2022-11-30 17:05:09 +00:00
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uint32_t minor_raw = efuse_ll_get_chip_wafer_version_minor();
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if (is_eco0(minor_raw)) {
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return 0;
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}
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return minor_raw;
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2022-05-25 19:16:15 +00:00
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}
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2023-05-01 08:05:31 +00:00
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/******************* eFuse control functions *************************/
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void efuse_hal_set_timing(uint32_t apb_freq_hz)
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{
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(void) apb_freq_hz;
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efuse_ll_set_dac_num(0xFF);
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efuse_ll_set_dac_clk_div(0x28);
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efuse_ll_set_pwr_on_num(0x3000);
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efuse_ll_set_pwr_off_num(0x190);
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}
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