kopia lustrzana https://github.com/espressif/esp-idf
171 wiersze
10 KiB
C
171 wiersze
10 KiB
C
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// Copyright 2015-2016 Espressif Systems (Shanghai) PTE LTD
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//
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// Licensed under the Apache License, Version 2.0 (the "License");
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// you may not use this file except in compliance with the License.
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// You may obtain a copy of the License at
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//
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// http://www.apache.org/licenses/LICENSE-2.0
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//
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// Unless required by applicable law or agreed to in writing, software
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// distributed under the License is distributed on an "AS IS" BASIS,
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// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
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// See the License for the specific language governing permissions and
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// limitations under the License.
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#pragma once
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#include <stdint.h>
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#include "esp_err.h"
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#ifdef __cplusplus
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extern "C" {
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#endif
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typedef struct {
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uint8_t param_ver_id; /*!< init_data structure version */
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uint8_t crystal_select; /*!< 0: 40MHz, 1: 26 MHz, 2: 24 MHz, 3: auto */
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uint8_t wifi_rx_gain_swp_step_1; /*!< do not change */
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uint8_t wifi_rx_gain_swp_step_2; /*!< do not change */
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uint8_t wifi_rx_gain_swp_step_3; /*!< do not change */
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uint8_t wifi_rx_gain_swp_step_4; /*!< do not change */
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uint8_t wifi_rx_gain_swp_step_5; /*!< do not change */
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uint8_t wifi_rx_gain_swp_step_6; /*!< do not change */
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uint8_t wifi_rx_gain_swp_step_7; /*!< do not change */
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uint8_t wifi_rx_gain_swp_step_8; /*!< do not change */
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uint8_t wifi_rx_gain_swp_step_9; /*!< do not change */
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uint8_t wifi_rx_gain_swp_step_10; /*!< do not change */
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uint8_t wifi_rx_gain_swp_step_11; /*!< do not change */
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uint8_t wifi_rx_gain_swp_step_12; /*!< do not change */
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uint8_t wifi_rx_gain_swp_step_13; /*!< do not change */
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uint8_t wifi_rx_gain_swp_step_14; /*!< do not change */
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uint8_t wifi_rx_gain_swp_step_15; /*!< do not change */
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uint8_t bt_rx_gain_swp_step_1; /*!< do not change */
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uint8_t bt_rx_gain_swp_step_2; /*!< do not change */
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uint8_t bt_rx_gain_swp_step_3; /*!< do not change */
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uint8_t bt_rx_gain_swp_step_4; /*!< do not change */
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uint8_t bt_rx_gain_swp_step_5; /*!< do not change */
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uint8_t bt_rx_gain_swp_step_6; /*!< do not change */
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uint8_t bt_rx_gain_swp_step_7; /*!< do not change */
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uint8_t bt_rx_gain_swp_step_8; /*!< do not change */
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uint8_t bt_rx_gain_swp_step_9; /*!< do not change */
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uint8_t bt_rx_gain_swp_step_10; /*!< do not change */
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uint8_t bt_rx_gain_swp_step_11; /*!< do not change */
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uint8_t bt_rx_gain_swp_step_12; /*!< do not change */
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uint8_t bt_rx_gain_swp_step_13; /*!< do not change */
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uint8_t bt_rx_gain_swp_step_14; /*!< do not change */
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uint8_t bt_rx_gain_swp_step_15; /*!< do not change */
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uint8_t gain_cmp_1; /*!< do not change */
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uint8_t gain_cmp_6; /*!< do not change */
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uint8_t gain_cmp_11; /*!< do not change */
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uint8_t gain_cmp_ext2_1; /*!< do not change */
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uint8_t gain_cmp_ext2_6; /*!< do not change */
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uint8_t gain_cmp_ext2_11; /*!< do not change */
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uint8_t gain_cmp_ext3_1; /*!< do not change */
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uint8_t gain_cmp_ext3_6; /*!< do not change */
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uint8_t gain_cmp_ext3_11; /*!< do not change */
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uint8_t gain_cmp_bt_ofs_1; /*!< do not change */
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uint8_t gain_cmp_bt_ofs_6; /*!< do not change */
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uint8_t gain_cmp_bt_ofs_11; /*!< do not change */
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uint8_t target_power_qdb_0; /*!< 78 means target power is 78/4=19.5dbm */
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uint8_t target_power_qdb_1; /*!< 76 means target power is 76/4=19dbm */
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uint8_t target_power_qdb_2; /*!< 74 means target power is 74/4=18.5dbm */
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uint8_t target_power_qdb_3; /*!< 68 means target power is 68/4=17dbm */
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uint8_t target_power_qdb_4; /*!< 64 means target power is 64/4=16dbm */
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uint8_t target_power_qdb_5; /*!< 52 means target power is 52/4=13dbm */
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uint8_t target_power_index_mcs0; /*!< target power index is 0, means target power is target_power_qdb_0 19.5dbm; (1m,2m,5.5m,11m,6m,9m) */
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uint8_t target_power_index_mcs1; /*!< target power index is 0, means target power is target_power_qdb_0 19.5dbm; (12m) */
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uint8_t target_power_index_mcs2; /*!< target power index is 1, means target power is target_power_qdb_1 19dbm; (18m) */
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uint8_t target_power_index_mcs3; /*!< target power index is 1, means target power is target_power_qdb_1 19dbm; (24m) */
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uint8_t target_power_index_mcs4; /*!< target power index is 2, means target power is target_power_qdb_2 18.5dbm; (36m) */
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uint8_t target_power_index_mcs5; /*!< target power index is 3, means target power is target_power_qdb_3 17dbm; (48m) */
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uint8_t target_power_index_mcs6; /*!< target power index is 4, means target power is target_power_qdb_4 16dbm; (54m) */
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uint8_t target_power_index_mcs7; /*!< target power index is 5, means target power is target_power_qdb_5 13dbm */
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uint8_t pwr_ind_11b_en; /*!< 0: 11b power is same as mcs0 and 6m, 1: 11b power different with OFDM */
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uint8_t pwr_ind_11b_0; /*!< 1m, 2m power index [0~5] */
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uint8_t pwr_ind_11b_1; /*!< 5.5m, 11m power index [0~5] */
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uint8_t chan_backoff_en; /*!< 0: channel backoff disable, 1:channel backoff enable */
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uint8_t chan1_power_backoff_qdb; /*!< 4 means backoff is 1db */
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uint8_t chan2_power_backoff_qdb; /*!< see chan1_power_backoff_qdb */
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uint8_t chan3_power_backoff_qdb; /*!< chan1_power_backoff_qdb */
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uint8_t chan4_power_backoff_qdb; /*!< chan1_power_backoff_qdb */
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uint8_t chan5_power_backoff_qdb; /*!< chan1_power_backoff_qdb */
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uint8_t chan6_power_backoff_qdb; /*!< chan1_power_backoff_qdb */
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uint8_t chan7_power_backoff_qdb; /*!< chan1_power_backoff_qdb */
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uint8_t chan8_power_backoff_qdb; /*!< chan1_power_backoff_qdb */
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uint8_t chan9_power_backoff_qdb; /*!< chan1_power_backoff_qdb */
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uint8_t chan10_power_backoff_qdb; /*!< chan1_power_backoff_qdb */
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uint8_t chan11_power_backoff_qdb; /*!< chan1_power_backoff_qdb */
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uint8_t chan12_power_backoff_qdb; /*!< chan1_power_backoff_qdb */
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uint8_t chan13_power_backoff_qdb; /*!< chan1_power_backoff_qdb */
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uint8_t chan14_power_backoff_qdb; /*!< chan1_power_backoff_qdb */
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uint8_t chan1_rate_backoff_index; /*!< if bit i is set, backoff data rate is target_power_qdb_i */
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uint8_t chan2_rate_backoff_index; /*!< see chan1_rate_backoff_index */
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uint8_t chan3_rate_backoff_index; /*!< see chan1_rate_backoff_index */
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uint8_t chan4_rate_backoff_index; /*!< see chan1_rate_backoff_index */
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uint8_t chan5_rate_backoff_index; /*!< see chan1_rate_backoff_index */
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uint8_t chan6_rate_backoff_index; /*!< see chan1_rate_backoff_index */
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uint8_t chan7_rate_backoff_index; /*!< see chan1_rate_backoff_index */
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uint8_t chan8_rate_backoff_index; /*!< see chan1_rate_backoff_index */
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uint8_t chan9_rate_backoff_index; /*!< see chan1_rate_backoff_index */
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uint8_t chan10_rate_backoff_index; /*!< see chan1_rate_backoff_index */
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uint8_t chan11_rate_backoff_index; /*!< see chan1_rate_backoff_index */
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uint8_t chan12_rate_backoff_index; /*!< see chan1_rate_backoff_index */
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uint8_t chan13_rate_backoff_index; /*!< see chan1_rate_backoff_index */
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uint8_t chan14_rate_backoff_index; /*!< see chan1_rate_backoff_index */
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uint8_t spur_freq_cfg_msb_1; /*!< first spur: */
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uint8_t spur_freq_cfg_1; /*!< spur_freq_cfg = (spur_freq_cfg_msb_1 <<8) | spur_freq_cfg_1 */
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uint8_t spur_freq_cfg_div_1; /*!< spur_freq=spur_freq_cfg/spur_freq_cfg_div_1 */
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uint8_t spur_freq_en_h_1; /*!< the seventh bit for total enable */
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uint8_t spur_freq_en_l_1; /*!< each bit for 1 channel, and use [spur_freq_en_h, spur_freq_en_l] to select the spur's channel priority */
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uint8_t spur_freq_cfg_msb_2; /*!< second spur: */
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uint8_t spur_freq_cfg_2; /*!< spur_freq_cfg = (spur_freq_cfg_msb_2 <<8) | spur_freq_cfg_2 */
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uint8_t spur_freq_cfg_div_2; /*!< spur_freq=spur_freq_cfg/spur_freq_cfg_div_2 */
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uint8_t spur_freq_en_h_2; /*!< the seventh bit for total enable */
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uint8_t spur_freq_en_l_2; /*!< each bit for 1 channel, and use [spur_freq_en_h, spur_freq_en_l] to select the spur's channel priority */
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uint8_t spur_freq_cfg_msb_3; /*!< third spur: */
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uint8_t spur_freq_cfg_3; /*!< spur_freq_cfg = (spur_freq_cfg_msb_3 <<8) | spur_freq_cfg_3 */
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uint8_t spur_freq_cfg_div_3; /*!< spur_freq=spur_freq_cfg/spur_freq_cfg_div_3 */
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uint8_t spur_freq_en_h_3; /*!< the seventh bit for total enable */
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uint8_t spur_freq_en_l_3; /*!< each bit for 1 channel, and use [spur_freq_en_h, spur_freq_en_l] to select the spur's channel priority, */
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uint8_t reserved[23]; /*!< reserved for future expansion */
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} esp_phy_init_data_t;
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typedef struct {
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uint8_t opaque[1904]; /*!< opaque calibration data */
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} esp_phy_calibration_data_t;
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typedef enum {
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PHY_RF_CAL_PARTIAL = 0x00000000, /*!< Do part of RF calibration. This should be used after power-on reset. */
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PHY_RF_CAL_NONE = 0x00000001, /*!< Don't do any RF calibration. This mode is only suggested to be used after deep sleep reset. */
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PHY_RF_CAL_FULL = 0x00000002 /*!< Do full RF calibration. Produces best results, but also consumes a lot of time and current. Suggested to be used once. */
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} esp_phy_calibration_mode_t;
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/**
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*
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* @param mode
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* @return
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*/
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esp_err_t esp_phy_init(esp_phy_calibration_mode_t mode);
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#ifndef CONFIG_ESP32_STORE_PHY_CALIBRATION_DATA_IN_NVS
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/**
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*
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* @param cal_data
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* @return
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*/
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esp_err_t esp_phy_store_cal_data(const esp_phy_calibration_data_t* cal_data);
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/**
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*
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* @param out_cal_data
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* @return
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*/
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esp_err_t esp_phy_load_cal_data(esp_phy_calibration_data_t* out_cal_data);
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#endif // CONFIG_ESP32_STORE_PHY_CALIBRATION_DATA_IN_NVS
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#ifdef __cplusplus
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}
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#endif
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