2019-01-08 10:29:25 +00:00
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// Copyright 2015-2019 Espressif Systems (Shanghai) PTE LTD
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//
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// Licensed under the Apache License, Version 2.0 (the "License");
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// you may not use this file except in compliance with the License.
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// You may obtain a copy of the License at
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//
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// http://www.apache.org/licenses/LICENSE-2.0
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//
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// Unless required by applicable law or agreed to in writing, software
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// distributed under the License is distributed on an "AS IS" BASIS,
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// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
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// See the License for the specific language governing permissions and
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// limitations under the License.
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2020-12-16 06:21:06 +00:00
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#include "soc/soc_caps.h"
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2019-01-08 10:29:25 +00:00
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#include "spi_flash_defs.h"
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#include "memspi_host_driver.h"
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#include "string.h"
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#include "esp_log.h"
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#include "cache_utils.h"
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#include "esp_flash_partitions.h"
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2020-12-16 06:21:06 +00:00
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2020-04-30 02:37:35 +00:00
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#define SPI_FLASH_HAL_MAX_WRITE_BYTES 64
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#define SPI_FLASH_HAL_MAX_READ_BYTES 64
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2020-05-07 06:46:41 +00:00
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DRAM_ATTR static const spi_flash_host_driver_t esp_flash_default_host = ESP_FLASH_DEFAULT_HOST_DRIVER();
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2019-01-08 10:29:25 +00:00
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2020-12-16 06:21:06 +00:00
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#if SOC_MEMSPI_IS_INDEPENDENT
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2020-05-07 06:46:41 +00:00
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extern void spi_flash_hal_gpspi_poll_cmd_done(spi_flash_host_inst_t *host);
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extern esp_err_t spi_flash_hal_gpspi_device_config(spi_flash_host_inst_t *host);
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2019-11-28 01:20:00 +00:00
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esp_err_t spi_flash_hal_gpspi_configure_host_io_mode(
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2020-05-07 06:46:41 +00:00
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spi_flash_host_inst_t *host,
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2019-11-28 01:20:00 +00:00
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uint32_t command,
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uint32_t addr_bitlen,
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int dummy_cyclelen_base,
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esp_flash_io_mode_t io_mode);
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2020-05-07 06:46:41 +00:00
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extern esp_err_t spi_flash_hal_gpspi_common_command(spi_flash_host_inst_t *host, spi_flash_trans_t *trans);
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extern esp_err_t spi_flash_hal_gpspi_read(spi_flash_host_inst_t *host, void *buffer, uint32_t address, uint32_t read_len);
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2021-01-23 16:48:07 +00:00
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extern uint32_t spi_flash_hal_gpspi_check_status(spi_flash_host_inst_t *host);
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2020-05-07 06:46:41 +00:00
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extern bool spi_flash_hal_gpspi_supports_direct_write(spi_flash_host_inst_t *host, const void *p);
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extern bool spi_flash_hal_gpspi_supports_direct_read(spi_flash_host_inst_t *host, const void *p);
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2019-11-28 01:20:00 +00:00
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/** Default configuration for GPSPI */
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2020-04-30 02:37:35 +00:00
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static const spi_flash_host_driver_t esp_flash_gpspi_host = {
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.dev_config = spi_flash_hal_gpspi_device_config,
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.common_command = spi_flash_hal_gpspi_common_command,
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.read_id = memspi_host_read_id_hs,
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.erase_chip = memspi_host_erase_chip,
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.erase_sector = memspi_host_erase_sector,
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.erase_block = memspi_host_erase_block,
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.read_status = memspi_host_read_status_hs,
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.set_write_protect = memspi_host_set_write_protect,
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.supports_direct_write = spi_flash_hal_gpspi_supports_direct_write,
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.supports_direct_read = spi_flash_hal_gpspi_supports_direct_read,
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.program_page = memspi_host_program_page,
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.write_data_slicer = memspi_host_write_data_slicer,
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.read = spi_flash_hal_gpspi_read,
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.read_data_slicer = memspi_host_read_data_slicer,
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2021-01-23 16:48:07 +00:00
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.host_status = spi_flash_hal_gpspi_check_status,
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2020-04-30 02:37:35 +00:00
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.configure_host_io_mode = spi_flash_hal_gpspi_configure_host_io_mode,
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.poll_cmd_done = spi_flash_hal_gpspi_poll_cmd_done,
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.flush_cache = NULL,
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2021-03-11 11:39:27 +00:00
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.check_suspend = NULL,
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2020-12-18 04:57:55 +00:00
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.resume = spi_flash_hal_resume,
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.suspend = spi_flash_hal_suspend,
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2019-11-28 01:20:00 +00:00
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};
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#endif
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2020-05-07 06:46:41 +00:00
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esp_err_t memspi_host_init_pointers(memspi_host_inst_t *host, const memspi_host_config_t *cfg)
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2019-01-08 10:29:25 +00:00
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{
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2020-12-16 06:21:06 +00:00
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#if SOC_MEMSPI_IS_INDEPENDENT
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2021-03-05 08:20:33 +00:00
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if (cfg->host_id == SPI1_HOST)
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2020-05-07 06:46:41 +00:00
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host->inst.driver = &esp_flash_default_host;
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2019-11-28 01:20:00 +00:00
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else {
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2020-05-07 06:46:41 +00:00
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host->inst.driver = &esp_flash_gpspi_host;
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2019-11-28 01:20:00 +00:00
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}
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2020-12-16 06:21:06 +00:00
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#else
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host->inst.driver = &esp_flash_default_host;
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2019-11-28 01:20:00 +00:00
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#endif
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2020-05-07 06:46:41 +00:00
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esp_err_t err = spi_flash_hal_init(host, cfg);
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return err;
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2019-01-08 10:29:25 +00:00
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}
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2020-12-16 03:50:13 +00:00
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#ifndef CONFIG_SPI_FLASH_ROM_IMPL
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static const char TAG[] = "memspi";
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2020-05-07 06:46:41 +00:00
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esp_err_t memspi_host_read_id_hs(spi_flash_host_inst_t *host, uint32_t *id)
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2019-01-08 10:29:25 +00:00
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{
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2019-11-28 01:20:00 +00:00
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uint32_t id_buf = 0;
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2019-01-08 10:29:25 +00:00
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spi_flash_trans_t t = {
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.command = CMD_RDID,
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2019-11-28 01:20:00 +00:00
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.miso_len = 3,
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.miso_data = ((uint8_t*) &id_buf),
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2019-01-08 10:29:25 +00:00
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};
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2020-05-07 06:46:41 +00:00
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host->driver->common_command(host, &t);
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2019-11-28 01:20:00 +00:00
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uint32_t raw_flash_id = id_buf;
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2019-01-08 10:29:25 +00:00
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ESP_EARLY_LOGV(TAG, "raw_chip_id: %X\n", raw_flash_id);
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if (raw_flash_id == 0xFFFFFF || raw_flash_id == 0) {
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ESP_EARLY_LOGE(TAG, "no response\n");
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return ESP_ERR_FLASH_NO_RESPONSE;
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}
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// Byte swap the flash id as it's usually written the other way around
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uint8_t mfg_id = raw_flash_id & 0xFF;
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uint16_t flash_id = (raw_flash_id >> 16) | (raw_flash_id & 0xFF00);
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*id = ((uint32_t)mfg_id << 16) | flash_id;
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ESP_EARLY_LOGV(TAG, "chip_id: %X\n", *id);
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return ESP_OK;
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}
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2020-05-07 06:46:41 +00:00
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esp_err_t memspi_host_read_status_hs(spi_flash_host_inst_t *host, uint8_t *out_sr)
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2019-01-08 10:29:25 +00:00
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{
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//NOTE: we do have a read id function, however it doesn't work in high freq
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2019-11-28 01:20:00 +00:00
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uint32_t stat_buf = 0;
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2019-01-08 10:29:25 +00:00
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spi_flash_trans_t t = {
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.command = CMD_RDSR,
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2019-11-28 01:20:00 +00:00
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.miso_data = ((uint8_t*) &stat_buf),
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.miso_len = 1
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2019-01-08 10:29:25 +00:00
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};
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2020-05-07 06:46:41 +00:00
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esp_err_t err = host->driver->common_command(host, &t);
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2019-01-08 10:29:25 +00:00
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if (err != ESP_OK) {
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return err;
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}
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2019-11-28 01:20:00 +00:00
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*out_sr = stat_buf;
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2019-01-08 10:29:25 +00:00
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return ESP_OK;
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}
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2020-05-07 06:46:41 +00:00
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esp_err_t memspi_host_flush_cache(spi_flash_host_inst_t *host, uint32_t addr, uint32_t size)
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2019-01-08 10:29:25 +00:00
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{
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2021-03-05 08:20:33 +00:00
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if ((void*)((memspi_host_inst_t*)host)->spi == (void*) spi_flash_ll_get_hw(SPI1_HOST)) {
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2019-01-08 10:29:25 +00:00
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spi_flash_check_and_flush_cache(addr, size);
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}
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return ESP_OK;
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2019-11-28 01:20:00 +00:00
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}
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2020-05-07 06:46:41 +00:00
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void memspi_host_erase_chip(spi_flash_host_inst_t *host)
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2019-11-28 01:20:00 +00:00
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{
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spi_flash_trans_t t = { 0 };
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t.command = CMD_CHIP_ERASE;
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2020-05-07 06:46:41 +00:00
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host->driver->common_command(host, &t);
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2019-11-28 01:20:00 +00:00
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}
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2020-07-26 19:13:07 +00:00
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// Only support 24bit address
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2020-05-07 06:46:41 +00:00
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void memspi_host_erase_sector(spi_flash_host_inst_t *host, uint32_t start_address)
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2019-11-28 01:20:00 +00:00
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{
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2020-07-26 19:13:07 +00:00
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assert(start_address < 0x1000000);
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2020-04-30 02:37:35 +00:00
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spi_flash_trans_t t = {
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2019-11-28 01:20:00 +00:00
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.command = CMD_SECTOR_ERASE,
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.address_bitlen = 24,
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.address = start_address
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};
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2020-05-07 06:46:41 +00:00
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host->driver->common_command(host, &t);
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2019-11-28 01:20:00 +00:00
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}
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2020-07-26 19:13:07 +00:00
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// Only support 24bit address
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2020-05-07 06:46:41 +00:00
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void memspi_host_erase_block(spi_flash_host_inst_t *host, uint32_t start_address)
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2019-11-28 01:20:00 +00:00
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{
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2020-07-26 19:13:07 +00:00
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assert(start_address < 0x1000000);
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2020-04-30 02:37:35 +00:00
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spi_flash_trans_t t = {
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2019-11-28 01:20:00 +00:00
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.command = CMD_LARGE_BLOCK_ERASE,
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.address_bitlen = 24,
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.address = start_address,
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};
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2020-05-07 06:46:41 +00:00
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host->driver->common_command(host, &t);
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2019-11-28 01:20:00 +00:00
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}
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2020-07-26 19:13:07 +00:00
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// Only support 24bit address
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2020-05-07 06:46:41 +00:00
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void memspi_host_program_page(spi_flash_host_inst_t *host, const void *buffer, uint32_t address, uint32_t length)
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2019-11-28 01:20:00 +00:00
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{
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2020-07-26 19:13:07 +00:00
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assert(address + length <= 0x1000000);
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2020-04-30 02:37:35 +00:00
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spi_flash_trans_t t = {
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2019-11-28 01:20:00 +00:00
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.command = CMD_PROGRAM_PAGE,
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.address_bitlen = 24,
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.address = address,
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.mosi_len = length,
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.mosi_data = buffer
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};
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2020-05-07 06:46:41 +00:00
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host->driver->common_command(host, &t);
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2019-11-28 01:20:00 +00:00
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}
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2020-05-07 06:46:41 +00:00
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esp_err_t memspi_host_read(spi_flash_host_inst_t *host, void *buffer, uint32_t address, uint32_t read_len)
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2019-11-28 01:20:00 +00:00
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{
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spi_flash_trans_t t = {
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2020-04-30 02:37:35 +00:00
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.command = CMD_READ,
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2019-11-28 01:20:00 +00:00
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.address_bitlen = 24,
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.address = address,
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.miso_len = read_len,
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.miso_data = buffer
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};
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2020-05-07 06:46:41 +00:00
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host->driver->common_command(host, &t);
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2019-11-28 01:20:00 +00:00
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return ESP_OK;
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}
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2020-05-07 06:46:41 +00:00
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esp_err_t memspi_host_set_write_protect(spi_flash_host_inst_t *host, bool wp)
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2019-11-28 01:20:00 +00:00
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{
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spi_flash_trans_t t = {
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.command = wp ? CMD_WRDI : CMD_WREN
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};
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2020-05-07 06:46:41 +00:00
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host->driver->common_command(host, &t);
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2019-11-28 01:20:00 +00:00
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return ESP_OK;
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}
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2020-04-30 02:37:35 +00:00
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// When encryption is enabled, etc. the data slicer may be complicated
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// This is the simple case where the hardware has no other requirements than the size and page boundary
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2020-05-07 06:46:41 +00:00
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int memspi_host_write_data_slicer(spi_flash_host_inst_t *host, uint32_t address, uint32_t len, uint32_t *align_address, uint32_t page_size)
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2020-04-30 02:37:35 +00:00
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{
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2021-09-01 07:58:15 +00:00
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uint32_t slicer_flag = ((spi_flash_hal_context_t*)host)->slicer_flags;
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2020-04-30 02:37:35 +00:00
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uint32_t align_addr = address;
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2021-09-01 07:58:15 +00:00
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if (slicer_flag & SPI_FLASH_HOST_CONTEXT_SLICER_FLAG_DTR) {
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if (((align_addr % 2) != 0) && ((len % 2) != 0)) {
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align_addr -= 1;
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len += 1;
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} else if (((align_addr % 2) != 0) && ((len % 2) == 0)) {
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align_addr -= 1;
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len += 2;
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} else if (((align_addr % 2) == 0) && ((len % 2) != 0)) {
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len += 1;
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}
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}
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2020-04-30 02:37:35 +00:00
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uint32_t end_bound = (align_addr/page_size + 1) * page_size;
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// Shouldn't program cross the page, or longer than SPI_FLASH_HAL_MAX_WRITE_BYTES
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uint32_t max_len = MIN(end_bound - align_addr, SPI_FLASH_HAL_MAX_WRITE_BYTES);
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2021-09-01 07:58:15 +00:00
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*align_address = align_addr;
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2020-04-30 02:37:35 +00:00
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return MIN(max_len, len);
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}
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2020-05-07 06:46:41 +00:00
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int memspi_host_read_data_slicer(spi_flash_host_inst_t *host, uint32_t address, uint32_t len, uint32_t *align_address, uint32_t page_size)
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2020-04-30 02:37:35 +00:00
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{
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// Shouldn't read longer than SPI_FLASH_HAL_MAX_READ_BYTES
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2021-09-01 07:58:15 +00:00
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uint32_t slicer_flag = ((spi_flash_hal_context_t*)host)->slicer_flags;
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uint32_t align_addr = address;
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if (slicer_flag & SPI_FLASH_HOST_CONTEXT_SLICER_FLAG_DTR) {
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if (((align_addr % 2) != 0) && ((len % 2) != 0)) {
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align_addr -= 1;
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len += 1;
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} else if (((align_addr % 2) != 0) && ((len % 2) == 0)) {
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align_addr -= 1;
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len += 2;
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} else if (((align_addr % 2) == 0) && ((len % 2) != 0)) {
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len += 1;
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}
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}
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2020-04-30 02:37:35 +00:00
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uint32_t max_len = SPI_FLASH_HAL_MAX_READ_BYTES;
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2021-09-01 07:58:15 +00:00
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*align_address = align_addr;
|
2020-04-30 02:37:35 +00:00
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return MIN(max_len, len);
|
|
|
|
}
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2020-12-16 03:50:13 +00:00
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#endif // CONFIG_SPI_FLASH_ROM_IMPL
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