2019-05-10 03:34:06 +00:00
|
|
|
// Copyright 2015-2017 Espressif Systems (Shanghai) PTE LTD
|
|
|
|
//
|
|
|
|
// Licensed under the Apache License, Version 2.0 (the "License");
|
|
|
|
// you may not use this file except in compliance with the License.
|
|
|
|
// You may obtain a copy of the License at
|
|
|
|
//
|
|
|
|
// http://www.apache.org/licenses/LICENSE-2.0
|
|
|
|
//
|
|
|
|
// Unless required by applicable law or agreed to in writing, software
|
|
|
|
// distributed under the License is distributed on an "AS IS" BASIS,
|
|
|
|
// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
|
|
|
|
// See the License for the specific language governing permissions and
|
|
|
|
// limitations under the License.
|
|
|
|
|
|
|
|
#include <stdint.h>
|
|
|
|
#include <stdio.h>
|
|
|
|
#include <stdlib.h>
|
|
|
|
#include <stdbool.h>
|
2020-09-03 10:17:24 +00:00
|
|
|
|
|
|
|
#include "esp_private/system_internal.h"
|
|
|
|
#include "driver/rtc_cntl.h"
|
|
|
|
|
|
|
|
#include "esp_rom_sys.h"
|
|
|
|
|
2019-05-10 03:34:06 +00:00
|
|
|
#include "soc/soc.h"
|
|
|
|
#include "soc/cpu.h"
|
2020-01-21 15:32:28 +00:00
|
|
|
#include "soc/rtc_periph.h"
|
2020-09-03 10:17:24 +00:00
|
|
|
#include "hal/cpu_hal.h"
|
|
|
|
|
2020-01-21 15:32:28 +00:00
|
|
|
#include "hal/brownout_hal.h"
|
2020-09-03 10:17:24 +00:00
|
|
|
|
|
|
|
#include "sdkconfig.h"
|
2019-05-10 03:34:06 +00:00
|
|
|
|
2020-01-21 15:41:39 +00:00
|
|
|
#if defined(CONFIG_ESP32_BROWNOUT_DET_LVL)
|
|
|
|
#define BROWNOUT_DET_LVL CONFIG_ESP32_BROWNOUT_DET_LVL
|
|
|
|
#elif defined(CONFIG_ESP32S2_BROWNOUT_DET_LVL)
|
2019-06-04 07:02:01 +00:00
|
|
|
#define BROWNOUT_DET_LVL CONFIG_ESP32S2_BROWNOUT_DET_LVL
|
2021-01-07 14:44:33 +00:00
|
|
|
#elif defined(CONFIG_ESP32S3_BROWNOUT_DET_LVL)
|
|
|
|
#define BROWNOUT_DET_LVL CONFIG_ESP32S3_BROWNOUT_DET_LVL
|
|
|
|
#elif defined(CONFIG_ESP32C3_BROWNOUT_DET_LVL)
|
|
|
|
#define BROWNOUT_DET_LVL CONFIG_ESP32C3_BROWNOUT_DET_LVL
|
2019-05-10 03:34:06 +00:00
|
|
|
#else
|
|
|
|
#define BROWNOUT_DET_LVL 0
|
2020-01-21 15:41:39 +00:00
|
|
|
#endif
|
|
|
|
|
2020-09-12 09:58:30 +00:00
|
|
|
#if SOC_BROWNOUT_RESET_SUPPORTED
|
2020-01-21 15:41:39 +00:00
|
|
|
#define BROWNOUT_RESET_EN true
|
|
|
|
#else
|
|
|
|
#define BROWNOUT_RESET_EN false
|
|
|
|
#endif // SOC_BROWNOUT_RESET_SUPPORTED
|
|
|
|
|
2021-01-07 14:44:33 +00:00
|
|
|
#ifndef SOC_BROWNOUT_RESET_SUPPORTED
|
2019-08-12 02:06:07 +00:00
|
|
|
static void rtc_brownout_isr_handler(void *arg)
|
2019-05-10 03:34:06 +00:00
|
|
|
{
|
|
|
|
/* Normally RTC ISR clears the interrupt flag after the application-supplied
|
|
|
|
* handler returns. Since restart is called here, the flag needs to be
|
|
|
|
* cleared manually.
|
|
|
|
*/
|
2020-01-21 15:41:39 +00:00
|
|
|
brownout_hal_intr_clear();
|
2019-05-10 03:34:06 +00:00
|
|
|
/* Stall the other CPU to make sure the code running there doesn't use UART
|
2020-07-21 05:07:34 +00:00
|
|
|
* at the same time as the following esp_rom_printf.
|
2019-05-10 03:34:06 +00:00
|
|
|
*/
|
2020-09-03 10:17:24 +00:00
|
|
|
esp_cpu_stall(!cpu_hal_get_core_id());
|
2020-01-21 15:32:28 +00:00
|
|
|
esp_reset_reason_set_hint(ESP_RST_BROWNOUT);
|
2020-07-21 05:07:34 +00:00
|
|
|
esp_rom_printf("\r\nBrownout detector was triggered\r\n\r\n");
|
2019-05-10 03:34:06 +00:00
|
|
|
esp_restart_noos();
|
|
|
|
}
|
2021-01-07 14:44:33 +00:00
|
|
|
#endif // not SOC_BROWNOUT_RESET_SUPPORTED
|
2019-05-10 03:34:06 +00:00
|
|
|
|
2019-08-12 02:06:07 +00:00
|
|
|
void esp_brownout_init(void)
|
2019-05-10 03:34:06 +00:00
|
|
|
{
|
2020-01-21 15:32:28 +00:00
|
|
|
brownout_hal_config_t cfg = {
|
|
|
|
.threshold = BROWNOUT_DET_LVL,
|
|
|
|
.enabled = true,
|
2020-01-21 15:41:39 +00:00
|
|
|
.reset_enabled = BROWNOUT_RESET_EN,
|
2020-01-21 15:32:28 +00:00
|
|
|
.flash_power_down = true,
|
|
|
|
.rf_power_down = true,
|
|
|
|
};
|
|
|
|
|
|
|
|
brownout_hal_config(&cfg);
|
2019-05-10 03:34:06 +00:00
|
|
|
|
2021-03-24 11:58:12 +00:00
|
|
|
|
2021-01-07 14:44:33 +00:00
|
|
|
#ifndef SOC_BROWNOUT_RESET_SUPPORTED
|
2020-03-03 04:22:41 +00:00
|
|
|
rtc_isr_register(rtc_brownout_isr_handler, NULL, RTC_CNTL_BROWN_OUT_INT_ENA_M);
|
2019-05-10 03:34:06 +00:00
|
|
|
|
2020-01-21 15:32:28 +00:00
|
|
|
brownout_hal_intr_enable(true);
|
2021-01-07 14:44:33 +00:00
|
|
|
#endif // not SOC_BROWNOUT_RESET_SUPPORTED
|
2019-05-10 03:34:06 +00:00
|
|
|
}
|
2021-02-09 11:30:43 +00:00
|
|
|
|
|
|
|
void esp_brownout_disable(void)
|
|
|
|
{
|
|
|
|
brownout_hal_config_t cfg = {
|
|
|
|
.enabled = false,
|
|
|
|
};
|
|
|
|
|
|
|
|
brownout_hal_config(&cfg);
|
|
|
|
|
|
|
|
#ifndef SOC_BROWNOUT_RESET_SUPPORTED
|
|
|
|
brownout_hal_intr_enable(false);
|
|
|
|
|
|
|
|
rtc_isr_deregister(rtc_brownout_isr_handler, NULL);
|
|
|
|
#endif // not SOC_BROWNOUT_RESET_SUPPORTED
|
|
|
|
}
|