2021-08-05 15:35:07 +00:00
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/*
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2022-09-21 14:30:20 +00:00
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* SPDX-FileCopyrightText: 2021-2022 Espressif Systems (Shanghai) CO LTD
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2021-08-05 15:35:07 +00:00
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*
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* SPDX-License-Identifier: Apache-2.0
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*/
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2020-07-28 12:15:13 +00:00
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#include <stdio.h>
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#include <stdlib.h>
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#include <string.h>
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2022-09-21 14:30:20 +00:00
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#include <inttypes.h>
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2020-07-28 12:15:13 +00:00
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#include <sys/param.h>
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#include "esp_heap_caps.h"
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#include "esp_rom_sys.h"
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#include "freertos/FreeRTOS.h"
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#include "freertos/task.h"
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#include "freertos/semphr.h"
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#include "unity.h"
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#include "ccomp_timer.h"
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2020-09-08 12:17:18 +00:00
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#include "esp_async_memcpy.h"
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#include "soc/soc_caps.h"
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2021-06-23 06:10:07 +00:00
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#include "hal/dma_types.h"
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2020-09-08 12:17:18 +00:00
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2023-04-28 09:18:06 +00:00
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#define IDF_LOG_PERFORMANCE(item, value_fmt, value, ...) \
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printf("[Performance][%s]: " value_fmt "\n", item, value, ##__VA_ARGS__)
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2020-07-28 12:15:13 +00:00
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#define ALIGN_UP(addr, align) (((addr) + (align)-1) & ~((align)-1))
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2021-06-23 06:10:07 +00:00
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#define ALIGN_DOWN(size, align) ((size) & ~((align) - 1))
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2020-07-28 12:15:13 +00:00
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2021-06-23 06:10:07 +00:00
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typedef struct {
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uint32_t seed;
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2022-09-21 14:30:20 +00:00
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size_t buffer_size;
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2021-06-23 06:10:07 +00:00
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uint8_t *src_buf;
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uint8_t *dst_buf;
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uint8_t *from_addr;
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uint8_t *to_addr;
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uint32_t align;
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uint32_t offset;
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bool src_in_psram;
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bool dst_in_psram;
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} memcpy_testbench_context_t;
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static void async_memcpy_setup_testbench(memcpy_testbench_context_t *test_context)
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2020-07-28 12:15:13 +00:00
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{
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2021-06-23 06:10:07 +00:00
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srand(test_context->seed);
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2020-07-28 12:15:13 +00:00
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printf("allocating memory buffer...\r\n");
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2022-09-21 14:30:20 +00:00
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size_t buffer_size = test_context->buffer_size;
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2021-06-23 06:10:07 +00:00
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uint8_t *src_buf = NULL;
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uint8_t *dst_buf = NULL;
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uint8_t *from_addr = NULL;
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uint8_t *to_addr = NULL;
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#if CONFIG_SPIRAM && SOC_GDMA_SUPPORT_PSRAM
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if (test_context->src_in_psram) {
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src_buf = heap_caps_malloc(buffer_size, MALLOC_CAP_SPIRAM);
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} else {
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src_buf = heap_caps_malloc(buffer_size, MALLOC_CAP_8BIT | MALLOC_CAP_DMA | MALLOC_CAP_INTERNAL);
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}
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if (test_context->dst_in_psram) {
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dst_buf = heap_caps_calloc(1, buffer_size, MALLOC_CAP_SPIRAM);
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} else {
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dst_buf = heap_caps_calloc(1, buffer_size, MALLOC_CAP_8BIT | MALLOC_CAP_DMA | MALLOC_CAP_INTERNAL);
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}
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#else
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src_buf = heap_caps_malloc(buffer_size, MALLOC_CAP_8BIT | MALLOC_CAP_DMA | MALLOC_CAP_INTERNAL);
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dst_buf = heap_caps_calloc(1, buffer_size, MALLOC_CAP_8BIT | MALLOC_CAP_DMA | MALLOC_CAP_INTERNAL);
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#endif
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TEST_ASSERT_NOT_NULL_MESSAGE(src_buf, "allocate source buffer failed");
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TEST_ASSERT_NOT_NULL_MESSAGE(dst_buf, "allocate destination buffer failed");
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// address alignment
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from_addr = (uint8_t *)ALIGN_UP((uint32_t)(src_buf), test_context->align);
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to_addr = (uint8_t *)ALIGN_UP((uint32_t)(dst_buf), test_context->align);
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uint8_t gap = MAX(from_addr - src_buf, to_addr - dst_buf);
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buffer_size -= gap;
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// size alignment
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buffer_size = ALIGN_DOWN(buffer_size, test_context->align);
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// adding extra offset
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from_addr += test_context->offset;
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to_addr += test_context->offset;
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buffer_size -= test_context->offset;
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2020-07-28 12:15:13 +00:00
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2022-09-21 14:30:20 +00:00
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printf("...size %zu Bytes, src@%p, dst@%p\r\n", buffer_size, from_addr, to_addr);
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2020-07-28 12:15:13 +00:00
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printf("fill src buffer with random data\r\n");
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2021-06-23 06:10:07 +00:00
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for (int i = 0; i < buffer_size; i++) {
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from_addr[i] = rand() % 256;
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2020-07-28 12:15:13 +00:00
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}
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2021-06-23 06:10:07 +00:00
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// return value
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test_context->buffer_size = buffer_size;
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test_context->src_buf = src_buf;
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test_context->dst_buf = dst_buf;
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test_context->from_addr = from_addr;
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test_context->to_addr = to_addr;
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2020-07-28 12:15:13 +00:00
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}
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2020-09-08 12:17:18 +00:00
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static void async_memcpy_verify_and_clear_testbench(uint32_t seed, uint32_t buffer_size, uint8_t *src_buf, uint8_t *dst_buf, uint8_t *from_addr, uint8_t *to_addr)
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2020-07-28 12:15:13 +00:00
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{
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srand(seed);
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for (int i = 0; i < buffer_size; i++) {
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// check if source date has been copied to destination and source data not broken
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TEST_ASSERT_EQUAL_MESSAGE(rand() % 256, to_addr[i], "destination data doesn't match generator data");
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}
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srand(seed);
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for (int i = 0; i < buffer_size; i++) {
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// check if source data has been copied to destination
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TEST_ASSERT_EQUAL_MESSAGE(rand() % 256, to_addr[i], "destination data doesn't match source data");
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}
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free(src_buf);
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free(dst_buf);
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}
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2021-03-18 02:42:10 +00:00
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TEST_CASE("memory copy the same buffer with different content", "[async mcp]")
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{
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async_memcpy_config_t config = ASYNC_MEMCPY_DEFAULT_CONFIG();
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config.backlog = 1;
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async_memcpy_t driver = NULL;
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TEST_ESP_OK(esp_async_memcpy_install(&config, &driver));
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uint8_t sbuf[256] = {0};
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uint8_t dbuf[256] = {0};
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for (int j = 0; j < 20; j++) {
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TEST_ESP_OK(esp_async_memcpy(driver, dbuf, sbuf, 256, NULL, NULL));
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for (int i = 0; i < 256; i++) {
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if (sbuf[i] != dbuf[i]) {
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printf("location[%d]:s=%d,d=%d\r\n", i, sbuf[i], dbuf[i]);
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TEST_FAIL_MESSAGE("destination data doesn't match source data");
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} else {
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sbuf[i] += 1;
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}
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}
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}
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TEST_ESP_OK(esp_async_memcpy_uninstall(driver));
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}
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2020-09-08 12:17:18 +00:00
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TEST_CASE("memory copy by DMA one by one", "[async mcp]")
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2020-07-28 12:15:13 +00:00
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{
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2020-09-08 12:17:18 +00:00
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async_memcpy_config_t config = ASYNC_MEMCPY_DEFAULT_CONFIG();
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config.backlog = 4;
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async_memcpy_t driver = NULL;
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TEST_ESP_OK(esp_async_memcpy_install(&config, &driver));
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2020-07-28 12:15:13 +00:00
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uint32_t test_buffer_len[] = {256, 512, 1024, 2048, 4096, 5011};
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2021-06-23 06:10:07 +00:00
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memcpy_testbench_context_t test_context = {
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.align = 4,
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};
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2020-07-28 12:15:13 +00:00
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for (int i = 0; i < sizeof(test_buffer_len) / sizeof(test_buffer_len[0]); i++) {
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// Test different align edge
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2021-06-23 06:10:07 +00:00
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for (int off = 0; off < 4; off++) {
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test_context.buffer_size = test_buffer_len[i];
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test_context.seed = i;
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async_memcpy_setup_testbench(&test_context);
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TEST_ESP_OK(esp_async_memcpy(driver, test_context.to_addr, test_context.from_addr, test_context.buffer_size, NULL, NULL));
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async_memcpy_verify_and_clear_testbench(test_context.seed, test_context.buffer_size, test_context.src_buf, test_context.dst_buf, test_context.from_addr, test_context.to_addr);
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2020-07-28 12:15:13 +00:00
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vTaskDelay(pdMS_TO_TICKS(100));
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}
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}
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2020-09-08 12:17:18 +00:00
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TEST_ESP_OK(esp_async_memcpy_uninstall(driver));
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2020-07-28 12:15:13 +00:00
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}
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2020-09-08 12:17:18 +00:00
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TEST_CASE("memory copy by DMA on the fly", "[async mcp]")
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2020-07-28 12:15:13 +00:00
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{
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2020-09-08 12:17:18 +00:00
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async_memcpy_config_t config = ASYNC_MEMCPY_DEFAULT_CONFIG();
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async_memcpy_t driver = NULL;
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TEST_ESP_OK(esp_async_memcpy_install(&config, &driver));
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2020-07-28 12:15:13 +00:00
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uint32_t test_buffer_len[] = {512, 1024, 2048, 4096, 5011};
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2021-06-23 06:10:07 +00:00
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memcpy_testbench_context_t test_context[] = {
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{.align = 4}, {.align = 4}, {.align = 4}, {.align = 4}, {.align = 4},
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};
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2020-07-28 12:15:13 +00:00
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// Aligned case
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2021-06-23 06:10:07 +00:00
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for (int i = 0; i < sizeof(test_buffer_len) / sizeof(test_buffer_len[0]); i++) {
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test_context[i].seed = i;
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test_context[i].buffer_size = test_buffer_len[i];
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async_memcpy_setup_testbench(&test_context[i]);
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2020-07-28 12:15:13 +00:00
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}
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for (int i = 0; i < sizeof(test_buffer_len) / sizeof(test_buffer_len[0]); i++) {
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2021-06-23 06:10:07 +00:00
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TEST_ESP_OK(esp_async_memcpy(driver, test_context[i].to_addr, test_context[i].from_addr, test_context[i].buffer_size, NULL, NULL));
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2020-07-28 12:15:13 +00:00
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}
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2021-06-23 06:10:07 +00:00
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for (int i = 0; i < sizeof(test_buffer_len) / sizeof(test_buffer_len[0]); i++) {
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async_memcpy_verify_and_clear_testbench(i, test_context[i].buffer_size, test_context[i].src_buf, test_context[i].dst_buf, test_context[i].from_addr, test_context[i].to_addr);
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2020-07-28 12:15:13 +00:00
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}
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// Non-aligned case
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2021-06-23 06:10:07 +00:00
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for (int i = 0; i < sizeof(test_buffer_len) / sizeof(test_buffer_len[0]); i++) {
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test_context[i].seed = i;
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test_context[i].buffer_size = test_buffer_len[i];
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test_context[i].offset = 3;
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async_memcpy_setup_testbench(&test_context[i]);
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2020-07-28 12:15:13 +00:00
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}
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for (int i = 0; i < sizeof(test_buffer_len) / sizeof(test_buffer_len[0]); i++) {
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2021-06-23 06:10:07 +00:00
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TEST_ESP_OK(esp_async_memcpy(driver, test_context[i].to_addr, test_context[i].from_addr, test_context[i].buffer_size, NULL, NULL));
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2020-07-28 12:15:13 +00:00
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}
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2021-06-23 06:10:07 +00:00
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for (int i = 0; i < sizeof(test_buffer_len) / sizeof(test_buffer_len[0]); i++) {
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async_memcpy_verify_and_clear_testbench(i, test_context[i].buffer_size, test_context[i].src_buf, test_context[i].dst_buf, test_context[i].from_addr, test_context[i].to_addr);
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2020-07-28 12:15:13 +00:00
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}
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2020-09-08 12:17:18 +00:00
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TEST_ESP_OK(esp_async_memcpy_uninstall(driver));
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2020-07-28 12:15:13 +00:00
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}
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2021-06-23 06:10:07 +00:00
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#define TEST_ASYNC_MEMCPY_BENCH_COUNTS (16)
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static int s_count = 0;
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2020-07-28 12:15:13 +00:00
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2020-09-08 12:17:18 +00:00
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static IRAM_ATTR bool test_async_memcpy_isr_cb(async_memcpy_t mcp_hdl, async_memcpy_event_t *event, void *cb_args)
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2020-07-28 12:15:13 +00:00
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{
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SemaphoreHandle_t sem = (SemaphoreHandle_t)cb_args;
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BaseType_t high_task_wakeup = pdFALSE;
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2021-06-23 06:10:07 +00:00
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s_count++;
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if (s_count == TEST_ASYNC_MEMCPY_BENCH_COUNTS) {
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2020-09-08 12:17:18 +00:00
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xSemaphoreGiveFromISR(sem, &high_task_wakeup);
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2020-07-28 12:15:13 +00:00
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}
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return high_task_wakeup == pdTRUE;
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}
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2021-06-23 06:10:07 +00:00
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static void memcpy_performance_test(uint32_t buffer_size)
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2020-07-28 12:15:13 +00:00
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{
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SemaphoreHandle_t sem = xSemaphoreCreateBinary();
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2020-09-08 12:17:18 +00:00
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async_memcpy_config_t config = ASYNC_MEMCPY_DEFAULT_CONFIG();
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2021-06-23 06:10:07 +00:00
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config.backlog = (buffer_size / DMA_DESCRIPTOR_BUFFER_MAX_SIZE + 1) * TEST_ASYNC_MEMCPY_BENCH_COUNTS;
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config.sram_trans_align = 4; // at least 4 bytes aligned for SRAM transfer
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config.psram_trans_align = 64; // at least 64 bytes aligned for PSRAM transfer
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2020-09-08 12:17:18 +00:00
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async_memcpy_t driver = NULL;
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2021-06-23 06:10:07 +00:00
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int64_t elapse_us = 0;
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float throughput = 0.0;
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2020-09-08 12:17:18 +00:00
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TEST_ESP_OK(esp_async_memcpy_install(&config, &driver));
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2020-07-28 12:15:13 +00:00
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2021-06-23 06:10:07 +00:00
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// 1. SRAM->SRAM
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memcpy_testbench_context_t test_context = {
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.align = config.psram_trans_align,
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.buffer_size = buffer_size,
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.src_in_psram = false,
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.dst_in_psram = false,
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};
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async_memcpy_setup_testbench(&test_context);
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s_count = 0;
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2020-07-28 12:15:13 +00:00
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ccomp_timer_start();
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2020-09-08 12:17:18 +00:00
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for (int i = 0; i < TEST_ASYNC_MEMCPY_BENCH_COUNTS; i++) {
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2021-06-23 06:10:07 +00:00
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TEST_ESP_OK(esp_async_memcpy(driver, test_context.to_addr, test_context.from_addr, test_context.buffer_size, test_async_memcpy_isr_cb, sem));
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2020-07-28 12:15:13 +00:00
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}
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2021-06-23 06:10:07 +00:00
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// wait for done semaphore
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TEST_ASSERT_EQUAL(pdTRUE, xSemaphoreTake(sem, pdMS_TO_TICKS(1000)));
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elapse_us = ccomp_timer_stop();
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throughput = (float)test_context.buffer_size * 1e6 * TEST_ASYNC_MEMCPY_BENCH_COUNTS / 1024 / 1024 / elapse_us;
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IDF_LOG_PERFORMANCE("DMA_COPY", "%.2f MB/s, dir: SRAM->SRAM, size: %zu Bytes", throughput, test_context.buffer_size);
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ccomp_timer_start();
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for (int i = 0; i < TEST_ASYNC_MEMCPY_BENCH_COUNTS; i++) {
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memcpy(test_context.to_addr, test_context.from_addr, test_context.buffer_size);
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}
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elapse_us = ccomp_timer_stop();
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throughput = (float)test_context.buffer_size * 1e6 * TEST_ASYNC_MEMCPY_BENCH_COUNTS / 1024 / 1024 / elapse_us;
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IDF_LOG_PERFORMANCE("CPU_COPY", "%.2f MB/s, dir: SRAM->SRAM, size: %zu Bytes", throughput, test_context.buffer_size);
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async_memcpy_verify_and_clear_testbench(test_context.seed, test_context.buffer_size, test_context.src_buf, test_context.dst_buf, test_context.from_addr, test_context.to_addr);
|
2020-07-28 12:15:13 +00:00
|
|
|
|
2021-06-23 06:10:07 +00:00
|
|
|
#if CONFIG_SPIRAM && SOC_GDMA_SUPPORT_PSRAM
|
|
|
|
// 2. PSRAM->PSRAM
|
|
|
|
test_context.src_in_psram = true;
|
|
|
|
test_context.dst_in_psram = true;
|
|
|
|
async_memcpy_setup_testbench(&test_context);
|
|
|
|
s_count = 0;
|
|
|
|
ccomp_timer_start();
|
|
|
|
for (int i = 0; i < TEST_ASYNC_MEMCPY_BENCH_COUNTS; i++) {
|
|
|
|
TEST_ESP_OK(esp_async_memcpy(driver, test_context.to_addr, test_context.from_addr, test_context.buffer_size, test_async_memcpy_isr_cb, sem));
|
|
|
|
}
|
2020-07-28 12:15:13 +00:00
|
|
|
// wait for done semaphore
|
|
|
|
TEST_ASSERT_EQUAL(pdTRUE, xSemaphoreTake(sem, pdMS_TO_TICKS(1000)));
|
2021-06-23 06:10:07 +00:00
|
|
|
elapse_us = ccomp_timer_stop();
|
|
|
|
throughput = (float)test_context.buffer_size * 1e6 * TEST_ASYNC_MEMCPY_BENCH_COUNTS / 1024 / 1024 / elapse_us;
|
|
|
|
IDF_LOG_PERFORMANCE("DMA_COPY", "%.2f MB/s, dir: PSRAM->PSRAM, size: %zu Bytes", throughput, test_context.buffer_size);
|
|
|
|
ccomp_timer_start();
|
|
|
|
for (int i = 0; i < TEST_ASYNC_MEMCPY_BENCH_COUNTS; i++) {
|
|
|
|
memcpy(test_context.to_addr, test_context.from_addr, test_context.buffer_size);
|
|
|
|
}
|
|
|
|
elapse_us = ccomp_timer_stop();
|
|
|
|
throughput = (float)test_context.buffer_size * 1e6 * TEST_ASYNC_MEMCPY_BENCH_COUNTS / 1024 / 1024 / elapse_us;
|
|
|
|
IDF_LOG_PERFORMANCE("CPU_COPY", "%.2f MB/s, dir: PSRAM->PSRAM, size: %zu Bytes", throughput, test_context.buffer_size);
|
|
|
|
async_memcpy_verify_and_clear_testbench(test_context.seed, test_context.buffer_size, test_context.src_buf, test_context.dst_buf, test_context.from_addr, test_context.to_addr);
|
2020-07-28 12:15:13 +00:00
|
|
|
|
2021-06-23 06:10:07 +00:00
|
|
|
// 3. PSRAM->SRAM
|
|
|
|
test_context.src_in_psram = true;
|
|
|
|
test_context.dst_in_psram = false;
|
|
|
|
async_memcpy_setup_testbench(&test_context);
|
|
|
|
s_count = 0;
|
2020-07-28 12:15:13 +00:00
|
|
|
ccomp_timer_start();
|
2020-09-08 12:17:18 +00:00
|
|
|
for (int i = 0; i < TEST_ASYNC_MEMCPY_BENCH_COUNTS; i++) {
|
2021-06-23 06:10:07 +00:00
|
|
|
TEST_ESP_OK(esp_async_memcpy(driver, test_context.to_addr, test_context.from_addr, test_context.buffer_size, test_async_memcpy_isr_cb, sem));
|
2020-07-28 12:15:13 +00:00
|
|
|
}
|
2021-06-23 06:10:07 +00:00
|
|
|
// wait for done semaphore
|
|
|
|
TEST_ASSERT_EQUAL(pdTRUE, xSemaphoreTake(sem, pdMS_TO_TICKS(1000)));
|
|
|
|
elapse_us = ccomp_timer_stop();
|
|
|
|
throughput = (float)test_context.buffer_size * 1e6 * TEST_ASYNC_MEMCPY_BENCH_COUNTS / 1024 / 1024 / elapse_us;
|
|
|
|
IDF_LOG_PERFORMANCE("DMA_COPY", "%.2f MB/s, dir: PSRAM->SRAM, size: %zu Bytes", throughput, test_context.buffer_size);
|
|
|
|
ccomp_timer_start();
|
|
|
|
for (int i = 0; i < TEST_ASYNC_MEMCPY_BENCH_COUNTS; i++) {
|
|
|
|
memcpy(test_context.to_addr, test_context.from_addr, test_context.buffer_size);
|
|
|
|
}
|
|
|
|
elapse_us = ccomp_timer_stop();
|
|
|
|
throughput = (float)test_context.buffer_size * 1e6 * TEST_ASYNC_MEMCPY_BENCH_COUNTS / 1024 / 1024 / elapse_us;
|
|
|
|
IDF_LOG_PERFORMANCE("CPU_COPY", "%.2f MB/s, dir: PSRAM->SRAM, size: %zu Bytes", throughput, test_context.buffer_size);
|
|
|
|
async_memcpy_verify_and_clear_testbench(test_context.seed, test_context.buffer_size, test_context.src_buf, test_context.dst_buf, test_context.from_addr, test_context.to_addr);
|
2020-07-28 12:15:13 +00:00
|
|
|
|
2021-06-23 06:10:07 +00:00
|
|
|
// 4. SRAM->PSRAM
|
|
|
|
test_context.src_in_psram = false;
|
|
|
|
test_context.dst_in_psram = true;
|
|
|
|
async_memcpy_setup_testbench(&test_context);
|
|
|
|
s_count = 0;
|
|
|
|
ccomp_timer_start();
|
|
|
|
for (int i = 0; i < TEST_ASYNC_MEMCPY_BENCH_COUNTS; i++) {
|
|
|
|
TEST_ESP_OK(esp_async_memcpy(driver, test_context.to_addr, test_context.from_addr, test_context.buffer_size, test_async_memcpy_isr_cb, sem));
|
|
|
|
}
|
|
|
|
// wait for done semaphore
|
|
|
|
TEST_ASSERT_EQUAL(pdTRUE, xSemaphoreTake(sem, pdMS_TO_TICKS(1000)));
|
|
|
|
elapse_us = ccomp_timer_stop();
|
|
|
|
throughput = (float)test_context.buffer_size * 1e6 * TEST_ASYNC_MEMCPY_BENCH_COUNTS / 1024 / 1024 / elapse_us;
|
|
|
|
IDF_LOG_PERFORMANCE("DMA_COPY", "%.2f MB/s, dir: SRAM->PSRAM, size: %zu Bytes", throughput, test_context.buffer_size);
|
|
|
|
ccomp_timer_start();
|
|
|
|
for (int i = 0; i < TEST_ASYNC_MEMCPY_BENCH_COUNTS; i++) {
|
|
|
|
memcpy(test_context.to_addr, test_context.from_addr, test_context.buffer_size);
|
|
|
|
}
|
|
|
|
elapse_us = ccomp_timer_stop();
|
|
|
|
throughput = (float)test_context.buffer_size * 1e6 * TEST_ASYNC_MEMCPY_BENCH_COUNTS / 1024 / 1024 / elapse_us;
|
|
|
|
IDF_LOG_PERFORMANCE("CPU_COPY", "%.2f MB/s, dir: SRAM->PSRAM, size: %zu Bytes", throughput, test_context.buffer_size);
|
|
|
|
async_memcpy_verify_and_clear_testbench(test_context.seed, test_context.buffer_size, test_context.src_buf, test_context.dst_buf, test_context.from_addr, test_context.to_addr);
|
|
|
|
#endif
|
2020-07-28 12:15:13 +00:00
|
|
|
|
2020-09-08 12:17:18 +00:00
|
|
|
TEST_ESP_OK(esp_async_memcpy_uninstall(driver));
|
2020-07-28 12:15:13 +00:00
|
|
|
vSemaphoreDelete(sem);
|
|
|
|
}
|
2020-09-08 12:17:18 +00:00
|
|
|
|
2021-06-23 06:10:07 +00:00
|
|
|
TEST_CASE("memory copy performance test 40KB", "[async mcp]")
|
|
|
|
{
|
|
|
|
memcpy_performance_test(40 * 1024);
|
|
|
|
}
|
|
|
|
|
|
|
|
TEST_CASE("memory copy performance test 4KB", "[async mcp]")
|
|
|
|
{
|
|
|
|
memcpy_performance_test(4 * 1024);
|
|
|
|
}
|