2021-05-12 03:26:07 +00:00
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/*
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2021-12-21 09:38:56 +00:00
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* SPDX-FileCopyrightText: 2021-2022 Espressif Systems (Shanghai) CO LTD
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2021-05-12 03:26:07 +00:00
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*
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* SPDX-License-Identifier: Apache-2.0
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*/
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#pragma once
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2022-07-06 09:01:06 +00:00
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#include <stdint.h>
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2021-05-12 03:26:07 +00:00
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#include <stdbool.h>
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#include "esp_err.h"
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#include "esp_lcd_types.h"
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#include "soc/soc_caps.h"
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2021-08-20 03:48:33 +00:00
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#include "hal/lcd_types.h"
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2021-05-12 03:26:07 +00:00
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#ifdef __cplusplus
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extern "C" {
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#endif
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#if SOC_LCD_RGB_SUPPORTED
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/**
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* @brief LCD RGB timing structure
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2021-11-30 02:54:35 +00:00
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* @verbatim
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* Total Width
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* <--------------------------------------------------->
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* HSYNC width HBP Active Width HFP
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* <---><--><--------------------------------------><--->
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* ____ ____|_______________________________________|____|
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* |___| | | |
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* | | |
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* __| | | |
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* /|\ /|\ | | | |
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* | VSYNC| | | | |
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* |Width\|/ |__ | | |
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* | /|\ | | | |
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* | VBP | | | | |
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* | \|/_____|_________|_______________________________________| |
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* | /|\ | | / / / / / / / / / / / / / / / / / / / | |
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* | | | |/ / / / / / / / / / / / / / / / / / / /| |
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* Total | | | |/ / / / / / / / / / / / / / / / / / / /| |
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* Height | | | |/ / / / / / / / / / / / / / / / / / / /| |
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* |Active| | |/ / / / / / / / / / / / / / / / / / / /| |
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* |Heigh | | |/ / / / / / Active Display Area / / / /| |
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* | | | |/ / / / / / / / / / / / / / / / / / / /| |
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* | | | |/ / / / / / / / / / / / / / / / / / / /| |
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* | | | |/ / / / / / / / / / / / / / / / / / / /| |
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* | | | |/ / / / / / / / / / / / / / / / / / / /| |
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* | | | |/ / / / / / / / / / / / / / / / / / / /| |
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* | \|/_____|_________|_______________________________________| |
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* | /|\ | |
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* | VFP | | |
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* \|/ \|/_____|______________________________________________________|
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2021-11-30 02:54:35 +00:00
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* @endverbatim
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*/
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typedef struct {
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2022-07-06 09:01:06 +00:00
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uint32_t pclk_hz; /*!< Frequency of pixel clock */
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uint32_t h_res; /*!< Horizontal resolution, i.e. the number of pixels in a line */
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uint32_t v_res; /*!< Vertical resolution, i.e. the number of lines in the frame */
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uint32_t hsync_pulse_width; /*!< Horizontal sync width, unit: PCLK period */
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uint32_t hsync_back_porch; /*!< Horizontal back porch, number of PCLK between hsync and start of line active data */
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uint32_t hsync_front_porch; /*!< Horizontal front porch, number of PCLK between the end of active data and the next hsync */
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uint32_t vsync_pulse_width; /*!< Vertical sync width, unit: number of lines */
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uint32_t vsync_back_porch; /*!< Vertical back porch, number of invalid lines between vsync and start of frame */
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uint32_t vsync_front_porch; /*!< Vertical front porch, number of invalid lines between the end of frame and the next vsync */
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struct {
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uint32_t hsync_idle_low: 1; /*!< The hsync signal is low in IDLE state */
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uint32_t vsync_idle_low: 1; /*!< The vsync signal is low in IDLE state */
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uint32_t de_idle_high: 1; /*!< The de signal is high in IDLE state */
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uint32_t pclk_active_neg: 1; /*!< Whether the display data is clocked out on the falling edge of PCLK */
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uint32_t pclk_idle_high: 1; /*!< The PCLK stays at high level in IDLE phase */
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} flags; /*!< LCD RGB timing flags */
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} esp_lcd_rgb_timing_t;
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2021-09-27 03:32:29 +00:00
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/**
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* @brief Type of RGB LCD panel event data
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*/
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typedef struct {
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} esp_lcd_rgb_panel_event_data_t;
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/**
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2022-07-06 08:34:14 +00:00
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* @brief RGB LCD VSYNC event callback prototype
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2021-09-27 03:32:29 +00:00
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*
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* @param[in] panel LCD panel handle, returned from `esp_lcd_new_rgb_panel()`
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* @param[in] edata Panel event data, fed by driver
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* @param[in] user_ctx User data, passed from `esp_lcd_rgb_panel_register_event_callbacks()`
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* @return Whether a high priority task has been waken up by this function
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*/
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2022-07-06 08:34:14 +00:00
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typedef bool (*esp_lcd_rgb_panel_vsync_cb_t)(esp_lcd_panel_handle_t panel, const esp_lcd_rgb_panel_event_data_t *edata, void *user_ctx);
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2022-06-28 03:56:22 +00:00
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/**
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2022-07-06 08:34:14 +00:00
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* @brief Prototype for function to re-fill a bounce buffer, rather than copying from the frame buffer
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2022-06-28 03:56:22 +00:00
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*
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* @param[in] bounce_buf Bounce buffer to write data into
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* @param[in] pos_px How many pixels already were sent to the display in this frame, in other words,
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* at what pixel the routine should start putting data into bounce_buf
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* @param[in] len_bytes Length, in bytes, of the bounce buffer. Routine should fill this length fully.
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* @param[in] user_ctx Opaque pointer that was passed from `esp_lcd_rgb_panel_register_event_callbacks()`
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* @return Whether a high priority task has been waken up by this function
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2022-06-28 03:56:22 +00:00
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*/
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2022-07-06 08:34:14 +00:00
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typedef bool (*esp_lcd_rgb_panel_bounce_buf_fill_cb_t)(esp_lcd_panel_handle_t panel, void *bounce_buf, int pos_px, int len_bytes, void *user_ctx);
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/**
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* @brief Group of supported RGB LCD panel callbacks
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* @note The callbacks are all running under ISR environment
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* @note When CONFIG_LCD_RGB_ISR_IRAM_SAFE is enabled, the callback itself and functions called by it should be placed in IRAM.
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2022-06-28 03:56:22 +00:00
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*/
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typedef struct {
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esp_lcd_rgb_panel_vsync_cb_t on_vsync; /*!< VSYNC event callback */
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esp_lcd_rgb_panel_bounce_buf_fill_cb_t on_bounce_empty; /*!< Bounce buffer empty callback. */
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} esp_lcd_rgb_panel_event_callbacks_t;
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2022-06-28 03:56:22 +00:00
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2021-05-12 03:26:07 +00:00
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/**
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* @brief LCD RGB panel configuration structure
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*/
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typedef struct {
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2021-08-20 03:48:33 +00:00
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lcd_clock_source_t clk_src; /*!< Clock source for the RGB LCD peripheral */
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2022-07-06 09:01:06 +00:00
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esp_lcd_rgb_timing_t timings; /*!< RGB timing parameters, including the screen resolution */
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size_t data_width; /*!< Number of data lines */
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2022-07-06 08:59:37 +00:00
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size_t bits_per_pixel; /*!< Color depth, in bpp, specially, if set to zero, it will default to `data_width`.
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When using a Serial RGB interface, this value could be different from `data_width` */
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size_t bounce_buffer_size_px; /*!< If it's non-zero, the driver allocates two DRAM bounce buffers for DMA use.
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DMA fetching from DRAM bounce buffer is much faster than PSRAM frame buffer. */
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size_t sram_trans_align; /*!< Alignment of buffers (frame buffer or bounce buffer) that allocated in SRAM */
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size_t psram_trans_align; /*!< Alignment of buffers (frame buffer) that allocated in PSRAM */
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int hsync_gpio_num; /*!< GPIO used for HSYNC signal */
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int vsync_gpio_num; /*!< GPIO used for VSYNC signal */
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int de_gpio_num; /*!< GPIO used for DE signal, set to -1 if it's not used */
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int pclk_gpio_num; /*!< GPIO used for PCLK signal */
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int disp_gpio_num; /*!< GPIO used for display control signal, set to -1 if it's not used */
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int data_gpio_nums[SOC_LCD_RGB_DATA_WIDTH]; /*!< GPIOs used for data lines */
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struct {
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2022-07-06 09:01:06 +00:00
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uint32_t disp_active_low: 1; /*!< If this flag is enabled, a low level of display control signal can turn the screen on; vice versa */
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2022-07-06 08:54:30 +00:00
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uint32_t refresh_on_demand: 1; /*!< If this flag is enabled, the host only refresh the frame buffer when `esp_lcd_panel_draw_bitmap` is called.
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2022-07-06 09:01:06 +00:00
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This is useful when the LCD screen has a GRAM and can refresh the LCD by itself. */
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uint32_t fb_in_psram: 1; /*!< If this flag is enabled, the frame buffer will be allocated from PSRAM, preferentially */
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uint32_t double_fb: 1; /*!< If this flag is enabled, the driver will allocate two screen sized frame buffer */
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uint32_t no_fb: 1; /*!< If this flag is enabled, the driver won't allocate frame buffer.
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Instead, user should fill in the bounce buffer manually in the `on_bounce_empty` callback */
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uint32_t bb_invalidate_cache: 1; /*!< If this flag is enabled, in bounce back mode we'll do a cache invalidate on the read data, freeing the cache.
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Can be dangerous if data is written from other core(s). */
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2022-05-11 07:52:09 +00:00
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} flags; /*!< LCD RGB panel configuration flags */
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2021-05-12 03:26:07 +00:00
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} esp_lcd_rgb_panel_config_t;
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/**
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* @brief Create RGB LCD panel
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*
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2022-07-06 09:01:06 +00:00
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* @param[in] rgb_panel_config RGB panel configuration
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* @param[out] ret_panel Returned LCD panel handle
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* @return
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* - ESP_ERR_INVALID_ARG: Create RGB LCD panel failed because of invalid argument
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* - ESP_ERR_NO_MEM: Create RGB LCD panel failed because of out of memory
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* - ESP_ERR_NOT_FOUND: Create RGB LCD panel failed because some mandatory hardware resources are not found
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* - ESP_OK: Create RGB LCD panel successfully
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2021-05-12 03:26:07 +00:00
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*/
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esp_err_t esp_lcd_new_rgb_panel(const esp_lcd_rgb_panel_config_t *rgb_panel_config, esp_lcd_panel_handle_t *ret_panel);
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2022-07-06 08:34:14 +00:00
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/**
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* @brief Register LCD RGB panel event callbacks
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*
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* @param[in] panel LCD panel handle, returned from `esp_lcd_new_rgb_panel()`
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* @param[in] callbacks Group of callback functions
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* @param[in] user_ctx User data, which will be passed to the callback functions directly
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* @return
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* - ESP_OK: Set event callbacks successfully
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* - ESP_ERR_INVALID_ARG: Set event callbacks failed because of invalid argument
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* - ESP_FAIL: Set event callbacks failed because of other error
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*/
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esp_err_t esp_lcd_rgb_panel_register_event_callbacks(esp_lcd_panel_handle_t panel, const esp_lcd_rgb_panel_event_callbacks_t *callbacks, void *user_ctx);
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2022-06-01 03:00:00 +00:00
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/**
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* @brief Set frequency of PCLK for RGB LCD panel
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*
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* @note The PCLK frequency is set in the `esp_lcd_rgb_timing_t` and gets configured during LCD panel initialization.
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2022-07-06 09:01:06 +00:00
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* Usually you don't need to call this function to set the PCLK again, but in some cases, you might want to change the PCLK frequency.
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* e.g. slow down the PCLK frequency to reduce power consumption or to reduce the memory throughput during OTA.
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2022-06-01 03:00:00 +00:00
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* @note This function doesn't cause the hardware to update the PCLK immediately but to record the new frequency and set a flag internally.
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2022-07-06 09:01:06 +00:00
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* Only in the next VSYNC event handler, will the driver attempt to update the PCLK frequency.
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2022-06-01 03:00:00 +00:00
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*
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2022-07-06 09:01:06 +00:00
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* @param[in] panel LCD panel handle, returned from `esp_lcd_new_rgb_panel()`
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* @param[in] freq_hz Frequency of pixel clock, in Hz
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* @return
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* - ESP_ERR_INVALID_ARG: Set PCLK frequency failed because of invalid argument
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* - ESP_OK: Set PCLK frequency successfully
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*/
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esp_err_t esp_lcd_rgb_panel_set_pclk(esp_lcd_panel_handle_t panel, uint32_t freq_hz);
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2022-07-06 08:43:08 +00:00
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/**
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* @brief Get the address of the frame buffer(s) that allocated by the driver
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*
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* @param[in] panel LCD panel handle, returned from `esp_lcd_new_rgb_panel()`
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* @param[in] fb_num Number of frame buffer(s) to get. This value must be the same as the number of the following parameters.
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* @param[out] fb0 Returned address of the frame buffer 0
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* @param[out] ... List of other frame buffer addresses
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* @return
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* - ESP_ERR_INVALID_ARG: Get frame buffer address failed because of invalid argument
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* - ESP_OK: Get frame buffer address successfully
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*/
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esp_err_t esp_lcd_rgb_panel_get_frame_buffer(esp_lcd_panel_handle_t panel, uint32_t fb_num, void **fb0, ...);
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2022-07-06 08:48:22 +00:00
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/**
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* @brief Manually trigger once transmission of the frame buffer to the LCD panel
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*
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* @note This function should only be called when the RGB panel is working under the `refresh_on_demand` mode.
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*
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* @param[in] panel LCD panel handle, returned from `esp_lcd_new_rgb_panel()`
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2022-06-01 03:00:00 +00:00
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* @return
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2022-07-06 08:48:22 +00:00
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* - ESP_ERR_INVALID_ARG: Start a refresh failed because of invalid argument
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* - ESP_ERR_INVALID_STATE: Start a refresh failed because the LCD panel is not created with the `refresh_on_demand` flag enabled.
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* - ESP_OK: Start a refresh successfully
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2022-06-01 03:00:00 +00:00
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*/
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2022-07-06 08:48:22 +00:00
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esp_err_t esp_lcd_rgb_panel_refresh(esp_lcd_panel_handle_t panel);
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2022-06-01 03:00:00 +00:00
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2021-05-12 03:26:07 +00:00
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#endif // SOC_LCD_RGB_SUPPORTED
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#ifdef __cplusplus
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}
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#endif
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