2021-12-23 06:12:47 +00:00
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/*
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* SPDX-FileCopyrightText: 2016-2022 Espressif Systems (Shanghai) CO LTD
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*
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* SPDX-License-Identifier: Apache-2.0
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*/
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2019-09-16 04:14:54 +00:00
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#pragma once
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2021-12-23 06:12:47 +00:00
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/* This file contains definitions that are common between esp32/ulp.h,
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esp32s2/ulp.h and esp32s3/ulp.h
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2019-09-16 04:14:54 +00:00
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*/
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#ifdef __cplusplus
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extern "C" {
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#endif
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/**@{*/
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#define ESP_ERR_ULP_BASE 0x1200 /*!< Offset for ULP-related error codes */
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#define ESP_ERR_ULP_SIZE_TOO_BIG (ESP_ERR_ULP_BASE + 1) /*!< Program doesn't fit into RTC memory reserved for the ULP */
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#define ESP_ERR_ULP_INVALID_LOAD_ADDR (ESP_ERR_ULP_BASE + 2) /*!< Load address is outside of RTC memory reserved for the ULP */
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#define ESP_ERR_ULP_DUPLICATE_LABEL (ESP_ERR_ULP_BASE + 3) /*!< More than one label with the same number was defined */
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#define ESP_ERR_ULP_UNDEFINED_LABEL (ESP_ERR_ULP_BASE + 4) /*!< Branch instructions references an undefined label */
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#define ESP_ERR_ULP_BRANCH_OUT_OF_RANGE (ESP_ERR_ULP_BASE + 5) /*!< Branch target is out of range of B instruction (try replacing with BX) */
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/**@}*/
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union ulp_insn; // Declared in the chip-specific ulp.h header
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typedef union ulp_insn ulp_insn_t;
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/**
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* @brief Resolve all macro references in a program and load it into RTC memory
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* @param load_addr address where the program should be loaded, expressed in 32-bit words
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* @param program ulp_insn_t array with the program
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* @param psize size of the program, expressed in 32-bit words
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* @return
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* - ESP_OK on success
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* - ESP_ERR_NO_MEM if auxiliary temporary structure can not be allocated
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* - one of ESP_ERR_ULP_xxx if program is not valid or can not be loaded
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*/
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esp_err_t ulp_process_macros_and_load(uint32_t load_addr, const ulp_insn_t* program, size_t* psize);
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/**
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* @brief Load ULP program binary into RTC memory
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*
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* ULP program binary should have the following format (all values little-endian):
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*
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* 1. MAGIC, (value 0x00706c75, 4 bytes)
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* 2. TEXT_OFFSET, offset of .text section from binary start (2 bytes)
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* 3. TEXT_SIZE, size of .text section (2 bytes)
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* 4. DATA_SIZE, size of .data section (2 bytes)
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* 5. BSS_SIZE, size of .bss section (2 bytes)
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* 6. (TEXT_OFFSET - 12) bytes of arbitrary data (will not be loaded into RTC memory)
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* 7. .text section
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* 8. .data section
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*
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* Linker script in components/ulp/ld/esp32.ulp.ld produces ELF files which
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* correspond to this format. This linker script produces binaries with load_addr == 0.
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*
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* @param load_addr address where the program should be loaded, expressed in 32-bit words
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* @param program_binary pointer to program binary
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* @param program_size size of the program binary
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* @return
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* - ESP_OK on success
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* - ESP_ERR_INVALID_ARG if load_addr is out of range
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* - ESP_ERR_INVALID_SIZE if program_size doesn't match (TEXT_OFFSET + TEXT_SIZE + DATA_SIZE)
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* - ESP_ERR_NOT_SUPPORTED if the magic number is incorrect
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*/
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esp_err_t ulp_load_binary(uint32_t load_addr, const uint8_t* program_binary, size_t program_size);
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/**
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* @brief Run the program loaded into RTC memory
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* @param entry_point entry point, expressed in 32-bit words
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* @return ESP_OK on success
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*/
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esp_err_t ulp_run(uint32_t entry_point);
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/**
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* @brief Set one of ULP wakeup period values
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*
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* ULP coprocessor starts running the program when the wakeup timer counts up
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* to a given value (called period). There are 5 period values which can be
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2020-11-10 07:40:01 +00:00
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* programmed into SENS_ULP_CP_SLEEP_CYCx_REG registers, x = 0..4 for ESP32, and
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2020-10-16 18:44:47 +00:00
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* one period value which can be programmed into RTC_CNTL_ULP_CP_TIMER_1_REG register for ESP32-S2.
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* By default, for ESP32, wakeup timer will use the period set into SENS_ULP_CP_SLEEP_CYC0_REG,
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2019-09-16 04:14:54 +00:00
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* i.e. period number 0. ULP program code can use SLEEP instruction to select
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* which of the SENS_ULP_CP_SLEEP_CYCx_REG should be used for subsequent wakeups.
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*
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* However, please note that SLEEP instruction issued (from ULP program) while the system
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* is in deep sleep mode does not have effect, and sleep cycle count 0 is used.
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2020-11-10 07:40:01 +00:00
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*
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2020-10-16 18:44:47 +00:00
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* For ESP32-s2 the SLEEP instruction not exist. Instead a WAKE instruction will be used.
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2019-09-16 04:14:54 +00:00
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*
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* @param period_index wakeup period setting number (0 - 4)
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* @param period_us wakeup period, us
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* @note The ULP FSM requires two clock cycles to wakeup before being able to run the program.
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* Then additional 16 cycles are reserved after wakeup waiting until the 8M clock is stable.
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* The FSM also requires two more clock cycles to go to sleep after the program execution is halted.
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* The minimum wakeup period that may be set up for the ULP
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* is equal to the total number of cycles spent on the above internal tasks.
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* For a default configuration of the ULP running at 150kHz it makes about 133us.
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* @return
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* - ESP_OK on success
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* - ESP_ERR_INVALID_ARG if period_index is out of range
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*/
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esp_err_t ulp_set_wakeup_period(size_t period_index, uint32_t period_us);
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#ifdef __cplusplus
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}
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#endif
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