kopia lustrzana https://github.com/softcomplex/digirig
Merge branch 'USB2412' into main
Denis G
commit
ea084f381c
|
|
@ -1,8 +1,9 @@
|
|||
electric/datasheets/*
|
||||
electric/gerbers/*
|
||||
electric/exports/*
|
||||
*.old
|
||||
*.bak
|
||||
*-bak
|
||||
*.bck
|
||||
*-cache.*
|
||||
*-cache
|
||||
|
||||
|
|
|
|||
Plik diff jest za duży
Load Diff
|
|
@ -89,6 +89,18 @@ X XO 9 -50 -2200 100 U 50 50 0 0 O
|
|||
ENDDRAW
|
||||
ENDDEF
|
||||
#
|
||||
# LOGO
|
||||
#
|
||||
DEF LOGO L 0 40 Y Y 1 F N
|
||||
F0 "L" 0 -50 50 H I C CNN
|
||||
F1 "LOGO" 0 0 50 H V C CNN
|
||||
F2 "footprints:digirig-logo-6mm" 50 -150 50 H I C CNN
|
||||
F3 "" 0 0 50 H I C CNN
|
||||
DRAW
|
||||
C 0 0 112 0 1 0 N
|
||||
ENDDRAW
|
||||
ENDDEF
|
||||
#
|
||||
# TUSB2046
|
||||
#
|
||||
DEF TUSB2046 U 0 40 Y Y 32 F N
|
||||
|
|
@ -133,4 +145,45 @@ X PWRON1 9 950 400 100 L 50 50 0 0 O V
|
|||
ENDDRAW
|
||||
ENDDEF
|
||||
#
|
||||
# USB2412-DZK-TR
|
||||
#
|
||||
DEF USB2412-DZK-TR U 0 40 Y Y 1 F N
|
||||
F0 "U" -1000 1500 50 H V C CNN
|
||||
F1 "USB2412-DZK-TR" 100 1500 50 H V C CNN
|
||||
F2 "" 0 0 50 H I C CNN
|
||||
F3 "" 0 0 50 H I C CNN
|
||||
DRAW
|
||||
P 5 0 1 0 -1000 1450 0 1450 0 -600 -1000 -600 -1000 1450 N
|
||||
X USBDN1_DP 1 100 900 100 L 50 50 1 1 B
|
||||
X VDD3V4 10 -600 1550 100 D 50 50 1 1 W
|
||||
X PRTPWR2 11 100 250 100 L 50 50 1 1 O
|
||||
X ~OSC2 12 100 150 100 L 50 50 1 1 I
|
||||
X NON_REM1 13 -1100 0 100 R 50 50 1 1 I
|
||||
X VDD3V3 14 -500 1550 100 D 50 50 1 1 W
|
||||
X TEST1 15 -100 -700 100 U 50 50 1 1 I
|
||||
X HS_IND 16 -1100 100 100 R 50 50 1 1 I
|
||||
X ~RST 17 -1100 600 100 R 50 50 1 1 I
|
||||
X VBUS_DET 18 -1100 1000 100 R 50 50 1 1 I
|
||||
X SUSP_IND 19 -1100 -100 100 R 50 50 1 1 I
|
||||
X USBDN2_DM 2 100 450 100 L 50 50 1 1 B I
|
||||
X VDD3V3 20 -400 1550 100 D 50 50 1 1 W
|
||||
X USBUP_DM 21 -1100 800 100 R 50 50 1 1 B I
|
||||
X USBUP_DP 22 -1100 900 100 R 50 50 1 1 B
|
||||
X XTAL_OUT 23 -850 -700 100 U 50 50 1 1 O
|
||||
X XTAL_IN 24 -750 -700 100 U 50 50 1 1 I
|
||||
X PLLFILT 25 100 -250 100 L 50 50 1 1 O
|
||||
X RBIAS 26 100 -50 100 L 50 50 1 1 I
|
||||
X VDD3V3 27 -300 1550 100 D 50 50 1 1 W
|
||||
X USBDN1_DM 28 100 1000 100 L 50 50 1 1 B I
|
||||
X GND 29 -500 -700 100 U 50 50 1 1 W
|
||||
X USBDN2_DP 3 100 350 100 L 50 50 1 1 B
|
||||
X VDD3V3 4 -700 1550 100 D 50 50 1 1 W
|
||||
X NC 5 -300 -700 100 U 50 50 1 1 N
|
||||
X TEST 6 -200 -700 100 U 50 50 1 1 I
|
||||
X PRTPWR1 7 100 800 100 L 50 50 1 1 O
|
||||
X ~OSC1 8 100 700 100 L 50 50 1 1 I
|
||||
X CFILT 9 100 -150 100 L 50 50 1 1 O
|
||||
ENDDRAW
|
||||
ENDDEF
|
||||
#
|
||||
#End Library
|
||||
|
|
|
|||
|
|
@ -0,0 +1,283 @@
|
|||
(kicad_pcb (version 20171130) (host pcbnew "(5.1.8)-1")
|
||||
|
||||
(general
|
||||
(thickness 1.6)
|
||||
(drawings 78)
|
||||
(tracks 0)
|
||||
(zones 0)
|
||||
(modules 4)
|
||||
(nets 1)
|
||||
)
|
||||
|
||||
(page A4)
|
||||
(layers
|
||||
(0 F.Cu signal)
|
||||
(31 B.Cu signal)
|
||||
(32 B.Adhes user)
|
||||
(33 F.Adhes user)
|
||||
(34 B.Paste user)
|
||||
(35 F.Paste user)
|
||||
(36 B.SilkS user)
|
||||
(37 F.SilkS user)
|
||||
(38 B.Mask user)
|
||||
(39 F.Mask user)
|
||||
(40 Dwgs.User user)
|
||||
(41 Cmts.User user)
|
||||
(42 Eco1.User user)
|
||||
(43 Eco2.User user)
|
||||
(44 Edge.Cuts user)
|
||||
(45 Margin user)
|
||||
(46 B.CrtYd user hide)
|
||||
(47 F.CrtYd user)
|
||||
(48 B.Fab user hide)
|
||||
(49 F.Fab user hide)
|
||||
)
|
||||
|
||||
(setup
|
||||
(last_trace_width 0.15)
|
||||
(user_trace_width 0.127)
|
||||
(user_trace_width 0.25)
|
||||
(trace_clearance 0.15)
|
||||
(zone_clearance 0.508)
|
||||
(zone_45_only no)
|
||||
(trace_min 0.127)
|
||||
(via_size 0.4)
|
||||
(via_drill 0.3)
|
||||
(via_min_size 0.2)
|
||||
(via_min_drill 0.3)
|
||||
(uvia_size 0.2)
|
||||
(uvia_drill 0.1)
|
||||
(uvias_allowed no)
|
||||
(uvia_min_size 0.2)
|
||||
(uvia_min_drill 0.1)
|
||||
(edge_width 0.1)
|
||||
(segment_width 0.2)
|
||||
(pcb_text_width 0.3)
|
||||
(pcb_text_size 1.5 1.5)
|
||||
(mod_edge_width 0.15)
|
||||
(mod_text_size 1 1)
|
||||
(mod_text_width 0.15)
|
||||
(pad_size 2 1)
|
||||
(pad_drill 1)
|
||||
(pad_to_mask_clearance 0)
|
||||
(aux_axis_origin 0 0)
|
||||
(visible_elements 7EFDFFFF)
|
||||
(pcbplotparams
|
||||
(layerselection 0x010f8_ffffffff)
|
||||
(usegerberextensions false)
|
||||
(usegerberattributes true)
|
||||
(usegerberadvancedattributes true)
|
||||
(creategerberjobfile true)
|
||||
(excludeedgelayer true)
|
||||
(linewidth 0.100000)
|
||||
(plotframeref false)
|
||||
(viasonmask false)
|
||||
(mode 1)
|
||||
(useauxorigin false)
|
||||
(hpglpennumber 1)
|
||||
(hpglpenspeed 20)
|
||||
(hpglpendiameter 15.000000)
|
||||
(psnegative false)
|
||||
(psa4output false)
|
||||
(plotreference true)
|
||||
(plotvalue true)
|
||||
(plotinvisibletext false)
|
||||
(padsonsilk false)
|
||||
(subtractmaskfromsilk false)
|
||||
(outputformat 1)
|
||||
(mirror false)
|
||||
(drillshape 0)
|
||||
(scaleselection 1)
|
||||
(outputdirectory "gerbers/"))
|
||||
)
|
||||
|
||||
(net 0 "")
|
||||
|
||||
(net_class Default "This is the default net class."
|
||||
(clearance 0.15)
|
||||
(trace_width 0.15)
|
||||
(via_dia 0.4)
|
||||
(via_drill 0.3)
|
||||
(uvia_dia 0.2)
|
||||
(uvia_drill 0.1)
|
||||
)
|
||||
|
||||
(net_class Power ""
|
||||
(clearance 0.15)
|
||||
(trace_width 0.25)
|
||||
(via_dia 0.8)
|
||||
(via_drill 0.4)
|
||||
(uvia_dia 0.3)
|
||||
(uvia_drill 0.1)
|
||||
)
|
||||
|
||||
(module Fiducial:Fiducial_1mm_Mask2mm (layer F.Cu) (tedit 5C18CB26) (tstamp 602180F3)
|
||||
(at 5 251)
|
||||
(descr "Circular Fiducial, 1mm bare copper, 2mm soldermask opening (Level A)")
|
||||
(tags fiducial)
|
||||
(attr smd)
|
||||
(fp_text reference REF** (at 0 -2) (layer F.SilkS)
|
||||
(effects (font (size 1 1) (thickness 0.15)))
|
||||
)
|
||||
(fp_text value Fiducial_1mm_Mask2mm (at 0 2) (layer F.Fab)
|
||||
(effects (font (size 1 1) (thickness 0.15)))
|
||||
)
|
||||
(fp_circle (center 0 0) (end 1.25 0) (layer F.CrtYd) (width 0.05))
|
||||
(fp_circle (center 0 0) (end 1 0) (layer F.Fab) (width 0.1))
|
||||
(fp_text user %R (at 0 0) (layer F.Fab)
|
||||
(effects (font (size 0.4 0.4) (thickness 0.06)))
|
||||
)
|
||||
(pad "" smd circle (at 0 0) (size 1 1) (layers F.Cu F.Mask)
|
||||
(solder_mask_margin 0.5) (clearance 0.5))
|
||||
)
|
||||
|
||||
(module Fiducial:Fiducial_1mm_Mask2mm (layer F.Cu) (tedit 5C18CB26) (tstamp 60218108)
|
||||
(at 199 251)
|
||||
(descr "Circular Fiducial, 1mm bare copper, 2mm soldermask opening (Level A)")
|
||||
(tags fiducial)
|
||||
(attr smd)
|
||||
(fp_text reference REF** (at 0 -2) (layer F.SilkS)
|
||||
(effects (font (size 1 1) (thickness 0.15)))
|
||||
)
|
||||
(fp_text value Fiducial_1mm_Mask2mm (at 0 2) (layer F.Fab)
|
||||
(effects (font (size 1 1) (thickness 0.15)))
|
||||
)
|
||||
(fp_circle (center 0 0) (end 1.25 0) (layer F.CrtYd) (width 0.05))
|
||||
(fp_circle (center 0 0) (end 1 0) (layer F.Fab) (width 0.1))
|
||||
(fp_text user %R (at 0 0) (layer F.Fab)
|
||||
(effects (font (size 0.4 0.4) (thickness 0.06)))
|
||||
)
|
||||
(pad "" smd circle (at 0 0) (size 1 1) (layers F.Cu F.Mask)
|
||||
(solder_mask_margin 0.5) (clearance 0.5))
|
||||
)
|
||||
|
||||
(module Fiducial:Fiducial_1mm_Mask2mm (layer F.Cu) (tedit 5C18CB26) (tstamp 6012A57A)
|
||||
(at 199 15)
|
||||
(descr "Circular Fiducial, 1mm bare copper, 2mm soldermask opening (Level A)")
|
||||
(tags fiducial)
|
||||
(attr smd)
|
||||
(fp_text reference REF** (at 0 -2) (layer F.SilkS)
|
||||
(effects (font (size 1 1) (thickness 0.15)))
|
||||
)
|
||||
(fp_text value Fiducial_1mm_Mask2mm (at 0 2) (layer F.Fab)
|
||||
(effects (font (size 1 1) (thickness 0.15)))
|
||||
)
|
||||
(fp_circle (center 0 0) (end 1.25 0) (layer F.CrtYd) (width 0.05))
|
||||
(fp_circle (center 0 0) (end 1 0) (layer F.Fab) (width 0.1))
|
||||
(fp_text user %R (at 0 0) (layer F.Fab)
|
||||
(effects (font (size 0.4 0.4) (thickness 0.06)))
|
||||
)
|
||||
(pad "" smd circle (at 0 0) (size 1 1) (layers F.Cu F.Mask)
|
||||
(solder_mask_margin 0.5) (clearance 0.5))
|
||||
)
|
||||
|
||||
(module Fiducial:Fiducial_1mm_Mask2mm (layer F.Cu) (tedit 5C18CB26) (tstamp 6012A54F)
|
||||
(at 5 15)
|
||||
(descr "Circular Fiducial, 1mm bare copper, 2mm soldermask opening (Level A)")
|
||||
(tags fiducial)
|
||||
(attr smd)
|
||||
(fp_text reference REF** (at 0 -2) (layer F.SilkS)
|
||||
(effects (font (size 1 1) (thickness 0.15)))
|
||||
)
|
||||
(fp_text value Fiducial_1mm_Mask2mm (at 0 2) (layer F.Fab)
|
||||
(effects (font (size 1 1) (thickness 0.15)))
|
||||
)
|
||||
(fp_circle (center 0 0) (end 1.25 0) (layer F.CrtYd) (width 0.05))
|
||||
(fp_circle (center 0 0) (end 1 0) (layer F.Fab) (width 0.1))
|
||||
(fp_text user %R (at 0 0) (layer F.Fab)
|
||||
(effects (font (size 0.4 0.4) (thickness 0.06)))
|
||||
)
|
||||
(pad "" smd circle (at 0 0) (size 1 1) (layers F.Cu F.Mask)
|
||||
(solder_mask_margin 0.5) (clearance 0.5))
|
||||
)
|
||||
|
||||
(gr_line (start 10 176) (end 194 173) (layer Cmts.User) (width 0.15) (tstamp 602182D9))
|
||||
(gr_line (start 194 176) (end 10 173) (layer Cmts.User) (width 0.15) (tstamp 602182D8))
|
||||
(gr_line (start 194 88) (end 10 85) (layer Cmts.User) (width 0.15) (tstamp 602182B9))
|
||||
(gr_line (start 10 88) (end 194 85) (layer Cmts.User) (width 0.15) (tstamp 602182B8))
|
||||
(gr_line (start 194 45) (end 10 40) (layer Cmts.User) (width 0.15) (tstamp 60218275))
|
||||
(gr_line (start 10 45) (end 194 40) (layer Cmts.User) (width 0.15) (tstamp 60218274))
|
||||
(gr_line (start 10 133) (end 194 128) (layer Cmts.User) (width 0.15) (tstamp 60218259))
|
||||
(gr_line (start 194 133) (end 10 128) (layer Cmts.User) (width 0.15) (tstamp 60218258))
|
||||
(gr_line (start 10 221) (end 194 216) (layer Cmts.User) (width 0.15))
|
||||
(gr_line (start 194 221) (end 10 216) (layer Cmts.User) (width 0.15))
|
||||
(gr_text "route out" (at 102 217) (layer Cmts.User) (tstamp 6021824E)
|
||||
(effects (font (size 1 1) (thickness 0.15)))
|
||||
)
|
||||
(gr_text "route out" (at 102 129) (layer Cmts.User) (tstamp 60218248)
|
||||
(effects (font (size 1 1) (thickness 0.15)))
|
||||
)
|
||||
(gr_line (start 148 221) (end 148 261) (layer Edge.Cuts) (width 0.1) (tstamp 6021823F))
|
||||
(gr_line (start 79 221) (end 79 261) (layer Edge.Cuts) (width 0.1) (tstamp 6021823E))
|
||||
(gr_line (start 171 221) (end 171 261) (layer Edge.Cuts) (width 0.1) (tstamp 6021823D))
|
||||
(gr_line (start 33 221) (end 33 261) (layer Edge.Cuts) (width 0.1) (tstamp 6021823C))
|
||||
(gr_line (start 102 221) (end 102 261) (layer Edge.Cuts) (width 0.1) (tstamp 6021823B))
|
||||
(gr_line (start 56 221) (end 56 261) (layer Edge.Cuts) (width 0.1) (tstamp 6021823A))
|
||||
(gr_line (start 125 221) (end 125 261) (layer Edge.Cuts) (width 0.1) (tstamp 60218239))
|
||||
(gr_line (start 102 176) (end 102 216) (layer Edge.Cuts) (width 0.1) (tstamp 60218231))
|
||||
(gr_line (start 171 176) (end 171 216) (layer Edge.Cuts) (width 0.1) (tstamp 60218230))
|
||||
(gr_line (start 56 176) (end 56 216) (layer Edge.Cuts) (width 0.1) (tstamp 6021822F))
|
||||
(gr_line (start 125 176) (end 125 216) (layer Edge.Cuts) (width 0.1) (tstamp 6021822E))
|
||||
(gr_line (start 79 176) (end 79 216) (layer Edge.Cuts) (width 0.1) (tstamp 6021822D))
|
||||
(gr_line (start 148 176) (end 148 216) (layer Edge.Cuts) (width 0.1) (tstamp 6021822C))
|
||||
(gr_line (start 33 176) (end 33 216) (layer Edge.Cuts) (width 0.1) (tstamp 6021822B))
|
||||
(gr_line (start 0 216) (end 204 216) (layer Edge.Cuts) (width 0.1) (tstamp 60218229))
|
||||
(gr_line (start 171 133) (end 171 173) (layer Edge.Cuts) (width 0.1) (tstamp 602181DD))
|
||||
(gr_line (start 79 133) (end 79 173) (layer Edge.Cuts) (width 0.1) (tstamp 602181DC))
|
||||
(gr_line (start 33 133) (end 33 173) (layer Edge.Cuts) (width 0.1) (tstamp 602181DB))
|
||||
(gr_line (start 102 133) (end 102 173) (layer Edge.Cuts) (width 0.1) (tstamp 602181DA))
|
||||
(gr_line (start 56 133) (end 56 173) (layer Edge.Cuts) (width 0.1) (tstamp 602181D9))
|
||||
(gr_line (start 148 133) (end 148 173) (layer Edge.Cuts) (width 0.1) (tstamp 602181D8))
|
||||
(gr_line (start 125 133) (end 125 173) (layer Edge.Cuts) (width 0.1) (tstamp 602181D7))
|
||||
(gr_line (start 0 133) (end 204 133) (layer Edge.Cuts) (width 0.1) (tstamp 602181A9))
|
||||
(gr_line (start 0 88) (end 204 88) (layer Edge.Cuts) (width 0.1) (tstamp 602180B1))
|
||||
(gr_line (start 0 128) (end 204 128) (layer Edge.Cuts) (width 0.1) (tstamp 602180A8))
|
||||
(gr_text "route out" (at 102 86) (layer Cmts.User) (tstamp 602180A2)
|
||||
(effects (font (size 1 1) (thickness 0.15)))
|
||||
)
|
||||
(gr_line (start 79 88) (end 79 128) (layer Edge.Cuts) (width 0.1) (tstamp 60218183))
|
||||
(gr_line (start 33 88) (end 33 128) (layer Edge.Cuts) (width 0.1) (tstamp 60218182))
|
||||
(gr_line (start 102 88) (end 102 128) (layer Edge.Cuts) (width 0.1) (tstamp 60218181))
|
||||
(gr_line (start 56 88) (end 56 128) (layer Edge.Cuts) (width 0.1) (tstamp 60218180))
|
||||
(gr_line (start 148 88) (end 148 128) (layer Edge.Cuts) (width 0.1) (tstamp 6021817F))
|
||||
(gr_line (start 125 88) (end 125 128) (layer Edge.Cuts) (width 0.1) (tstamp 6021817E))
|
||||
(gr_line (start 171 88) (end 171 128) (layer Edge.Cuts) (width 0.1) (tstamp 6021817D))
|
||||
(gr_line (start 79 45) (end 79 85) (layer Edge.Cuts) (width 0.1) (tstamp 60218175))
|
||||
(gr_line (start 125 45) (end 125 85) (layer Edge.Cuts) (width 0.1) (tstamp 60218174))
|
||||
(gr_line (start 56 45) (end 56 85) (layer Edge.Cuts) (width 0.1) (tstamp 60218173))
|
||||
(gr_line (start 33 45) (end 33 85) (layer Edge.Cuts) (width 0.1) (tstamp 60218172))
|
||||
(gr_line (start 102 45) (end 102 85) (layer Edge.Cuts) (width 0.1) (tstamp 60218171))
|
||||
(gr_line (start 148 45) (end 148 85) (layer Edge.Cuts) (width 0.1) (tstamp 60218170))
|
||||
(gr_line (start 171 45) (end 171 85) (layer Edge.Cuts) (width 0.1) (tstamp 6021816F))
|
||||
(gr_text "route out" (at 102 41) (layer Cmts.User) (tstamp 60218159)
|
||||
(effects (font (size 1 1) (thickness 0.15)))
|
||||
)
|
||||
(gr_line (start 0 45) (end 204 45) (layer Edge.Cuts) (width 0.1) (tstamp 60218142))
|
||||
(gr_text "route out" (at 102 174) (layer Cmts.User) (tstamp 6021809F)
|
||||
(effects (font (size 1 1) (thickness 0.15)))
|
||||
)
|
||||
(gr_line (start 171 0) (end 171 40) (layer Edge.Cuts) (width 0.1) (tstamp 6012A602))
|
||||
(gr_line (start 148 0) (end 148 40) (layer Edge.Cuts) (width 0.1) (tstamp 6012A5FC))
|
||||
(gr_line (start 125 0) (end 125 40) (layer Edge.Cuts) (width 0.1) (tstamp 6012A5F7))
|
||||
(gr_line (start 102 0) (end 102 40) (layer Edge.Cuts) (width 0.1) (tstamp 6012A5EF))
|
||||
(gr_line (start 79 0) (end 79 40) (layer Edge.Cuts) (width 0.1) (tstamp 6012A5EA))
|
||||
(gr_line (start 56 0) (end 56 40) (layer Edge.Cuts) (width 0.1) (tstamp 6012A5E1))
|
||||
(gr_line (start 33 0) (end 33 40) (layer Edge.Cuts) (width 0.1) (tstamp 6012A5D9))
|
||||
(gr_circle (center 199 10) (end 200 10) (layer Edge.Cuts) (width 0.1))
|
||||
(gr_circle (center 199 256) (end 200 256) (layer Edge.Cuts) (width 0.1) (tstamp 602180CC))
|
||||
(gr_circle (center 5 256) (end 6 256) (layer Edge.Cuts) (width 0.1) (tstamp 602180C6))
|
||||
(gr_circle (center 5 10) (end 6 10) (layer Edge.Cuts) (width 0.1))
|
||||
(gr_circle (center 5 10) (end 5 9) (layer F.Fab) (width 0.15))
|
||||
(gr_line (start 0 221) (end 204 221) (layer Edge.Cuts) (width 0.1) (tstamp 602180C0))
|
||||
(gr_line (start 0 176) (end 204 176) (layer Edge.Cuts) (width 0.1) (tstamp 602180BA))
|
||||
(gr_line (start 0 173) (end 204 173) (layer Edge.Cuts) (width 0.1) (tstamp 602180B7))
|
||||
(gr_line (start 0 85) (end 204 85) (layer Edge.Cuts) (width 0.1) (tstamp 602180AE))
|
||||
(gr_line (start 0 40) (end 204 40) (layer Edge.Cuts) (width 0.1) (tstamp 602180AB))
|
||||
(gr_line (start 194 0) (end 194 261) (layer Edge.Cuts) (width 0.1) (tstamp 60124669))
|
||||
(gr_line (start 10 0) (end 10 261) (layer Edge.Cuts) (width 0.1) (tstamp 6012465D))
|
||||
(gr_line (start 0 0) (end 0 261) (layer Edge.Cuts) (width 0.1) (tstamp 601245FC))
|
||||
(gr_line (start 0 261) (end 204 261) (layer Edge.Cuts) (width 0.1) (tstamp 602180A5))
|
||||
(gr_line (start 204 0) (end 204 261) (layer Edge.Cuts) (width 0.1))
|
||||
(gr_line (start 0 0) (end 204 0) (layer Edge.Cuts) (width 0.1) (tstamp 60124684))
|
||||
|
||||
)
|
||||
|
|
@ -0,0 +1,33 @@
|
|||
update=22/05/2015 07:44:53
|
||||
version=1
|
||||
last_client=kicad
|
||||
[general]
|
||||
version=1
|
||||
RootSch=
|
||||
BoardNm=
|
||||
[pcbnew]
|
||||
version=1
|
||||
LastNetListRead=
|
||||
UseCmpFile=1
|
||||
PadDrill=0.600000000000
|
||||
PadDrillOvalY=0.600000000000
|
||||
PadSizeH=1.500000000000
|
||||
PadSizeV=1.500000000000
|
||||
PcbTextSizeV=1.500000000000
|
||||
PcbTextSizeH=1.500000000000
|
||||
PcbTextThickness=0.300000000000
|
||||
ModuleTextSizeV=1.000000000000
|
||||
ModuleTextSizeH=1.000000000000
|
||||
ModuleTextSizeThickness=0.150000000000
|
||||
SolderMaskClearance=0.000000000000
|
||||
SolderMaskMinWidth=0.000000000000
|
||||
DrawSegmentWidth=0.200000000000
|
||||
BoardOutlineThickness=0.100000000000
|
||||
ModuleOutlineThickness=0.150000000000
|
||||
[cvpcb]
|
||||
version=1
|
||||
NetIExt=net
|
||||
[eeschema]
|
||||
version=1
|
||||
LibDir=
|
||||
[eeschema/libraries]
|
||||
Plik diff jest za duży
Load Diff
|
|
@ -1,29 +1,10 @@
|
|||
update=22/05/2015 07:44:53
|
||||
update=2/8/2021 10:02:21 AM
|
||||
version=1
|
||||
last_client=kicad
|
||||
[general]
|
||||
version=1
|
||||
RootSch=
|
||||
BoardNm=
|
||||
[pcbnew]
|
||||
version=1
|
||||
LastNetListRead=
|
||||
UseCmpFile=1
|
||||
PadDrill=0.600000000000
|
||||
PadDrillOvalY=0.600000000000
|
||||
PadSizeH=1.500000000000
|
||||
PadSizeV=1.500000000000
|
||||
PcbTextSizeV=1.500000000000
|
||||
PcbTextSizeH=1.500000000000
|
||||
PcbTextThickness=0.300000000000
|
||||
ModuleTextSizeV=1.000000000000
|
||||
ModuleTextSizeH=1.000000000000
|
||||
ModuleTextSizeThickness=0.150000000000
|
||||
SolderMaskClearance=0.000000000000
|
||||
SolderMaskMinWidth=0.000000000000
|
||||
DrawSegmentWidth=0.200000000000
|
||||
BoardOutlineThickness=0.100000000000
|
||||
ModuleOutlineThickness=0.150000000000
|
||||
[cvpcb]
|
||||
version=1
|
||||
NetIExt=net
|
||||
|
|
@ -31,3 +12,239 @@ NetIExt=net
|
|||
version=1
|
||||
LibDir=
|
||||
[eeschema/libraries]
|
||||
[pcbnew]
|
||||
version=1
|
||||
PageLayoutDescrFile=
|
||||
LastNetListRead=
|
||||
CopperLayerCount=2
|
||||
BoardThickness=1.6
|
||||
AllowMicroVias=0
|
||||
AllowBlindVias=0
|
||||
RequireCourtyardDefinitions=0
|
||||
ProhibitOverlappingCourtyards=1
|
||||
MinTrackWidth=0.127
|
||||
MinViaDiameter=0.2
|
||||
MinViaDrill=0.3
|
||||
MinMicroViaDiameter=0.2
|
||||
MinMicroViaDrill=0.09999999999999999
|
||||
MinHoleToHole=0.25
|
||||
TrackWidth1=0.15
|
||||
TrackWidth2=0.25
|
||||
ViaDiameter1=0.5
|
||||
ViaDrill1=0.3
|
||||
dPairWidth1=0.2
|
||||
dPairGap1=0.25
|
||||
dPairViaGap1=0.25
|
||||
SilkLineWidth=0.15
|
||||
SilkTextSizeV=1
|
||||
SilkTextSizeH=1
|
||||
SilkTextSizeThickness=0.15
|
||||
SilkTextItalic=0
|
||||
SilkTextUpright=1
|
||||
CopperLineWidth=0.2
|
||||
CopperTextSizeV=1.5
|
||||
CopperTextSizeH=1.5
|
||||
CopperTextThickness=0.3
|
||||
CopperTextItalic=0
|
||||
CopperTextUpright=1
|
||||
EdgeCutLineWidth=0.09999999999999999
|
||||
CourtyardLineWidth=0.05
|
||||
OthersLineWidth=0.15
|
||||
OthersTextSizeV=1
|
||||
OthersTextSizeH=1
|
||||
OthersTextSizeThickness=0.15
|
||||
OthersTextItalic=0
|
||||
OthersTextUpright=1
|
||||
SolderMaskClearance=0
|
||||
SolderMaskMinWidth=0
|
||||
SolderPasteClearance=0
|
||||
SolderPasteRatio=-0
|
||||
[pcbnew/Layer.F.Cu]
|
||||
Name=F.Cu
|
||||
Type=0
|
||||
Enabled=1
|
||||
[pcbnew/Layer.In1.Cu]
|
||||
Name=In1.Cu
|
||||
Type=0
|
||||
Enabled=0
|
||||
[pcbnew/Layer.In2.Cu]
|
||||
Name=In2.Cu
|
||||
Type=0
|
||||
Enabled=0
|
||||
[pcbnew/Layer.In3.Cu]
|
||||
Name=In3.Cu
|
||||
Type=0
|
||||
Enabled=0
|
||||
[pcbnew/Layer.In4.Cu]
|
||||
Name=In4.Cu
|
||||
Type=0
|
||||
Enabled=0
|
||||
[pcbnew/Layer.In5.Cu]
|
||||
Name=In5.Cu
|
||||
Type=0
|
||||
Enabled=0
|
||||
[pcbnew/Layer.In6.Cu]
|
||||
Name=In6.Cu
|
||||
Type=0
|
||||
Enabled=0
|
||||
[pcbnew/Layer.In7.Cu]
|
||||
Name=In7.Cu
|
||||
Type=0
|
||||
Enabled=0
|
||||
[pcbnew/Layer.In8.Cu]
|
||||
Name=In8.Cu
|
||||
Type=0
|
||||
Enabled=0
|
||||
[pcbnew/Layer.In9.Cu]
|
||||
Name=In9.Cu
|
||||
Type=0
|
||||
Enabled=0
|
||||
[pcbnew/Layer.In10.Cu]
|
||||
Name=In10.Cu
|
||||
Type=0
|
||||
Enabled=0
|
||||
[pcbnew/Layer.In11.Cu]
|
||||
Name=In11.Cu
|
||||
Type=0
|
||||
Enabled=0
|
||||
[pcbnew/Layer.In12.Cu]
|
||||
Name=In12.Cu
|
||||
Type=0
|
||||
Enabled=0
|
||||
[pcbnew/Layer.In13.Cu]
|
||||
Name=In13.Cu
|
||||
Type=0
|
||||
Enabled=0
|
||||
[pcbnew/Layer.In14.Cu]
|
||||
Name=In14.Cu
|
||||
Type=0
|
||||
Enabled=0
|
||||
[pcbnew/Layer.In15.Cu]
|
||||
Name=In15.Cu
|
||||
Type=0
|
||||
Enabled=0
|
||||
[pcbnew/Layer.In16.Cu]
|
||||
Name=In16.Cu
|
||||
Type=0
|
||||
Enabled=0
|
||||
[pcbnew/Layer.In17.Cu]
|
||||
Name=In17.Cu
|
||||
Type=0
|
||||
Enabled=0
|
||||
[pcbnew/Layer.In18.Cu]
|
||||
Name=In18.Cu
|
||||
Type=0
|
||||
Enabled=0
|
||||
[pcbnew/Layer.In19.Cu]
|
||||
Name=In19.Cu
|
||||
Type=0
|
||||
Enabled=0
|
||||
[pcbnew/Layer.In20.Cu]
|
||||
Name=In20.Cu
|
||||
Type=0
|
||||
Enabled=0
|
||||
[pcbnew/Layer.In21.Cu]
|
||||
Name=In21.Cu
|
||||
Type=0
|
||||
Enabled=0
|
||||
[pcbnew/Layer.In22.Cu]
|
||||
Name=In22.Cu
|
||||
Type=0
|
||||
Enabled=0
|
||||
[pcbnew/Layer.In23.Cu]
|
||||
Name=In23.Cu
|
||||
Type=0
|
||||
Enabled=0
|
||||
[pcbnew/Layer.In24.Cu]
|
||||
Name=In24.Cu
|
||||
Type=0
|
||||
Enabled=0
|
||||
[pcbnew/Layer.In25.Cu]
|
||||
Name=In25.Cu
|
||||
Type=0
|
||||
Enabled=0
|
||||
[pcbnew/Layer.In26.Cu]
|
||||
Name=In26.Cu
|
||||
Type=0
|
||||
Enabled=0
|
||||
[pcbnew/Layer.In27.Cu]
|
||||
Name=In27.Cu
|
||||
Type=0
|
||||
Enabled=0
|
||||
[pcbnew/Layer.In28.Cu]
|
||||
Name=In28.Cu
|
||||
Type=0
|
||||
Enabled=0
|
||||
[pcbnew/Layer.In29.Cu]
|
||||
Name=In29.Cu
|
||||
Type=0
|
||||
Enabled=0
|
||||
[pcbnew/Layer.In30.Cu]
|
||||
Name=In30.Cu
|
||||
Type=0
|
||||
Enabled=0
|
||||
[pcbnew/Layer.B.Cu]
|
||||
Name=B.Cu
|
||||
Type=0
|
||||
Enabled=1
|
||||
[pcbnew/Layer.B.Adhes]
|
||||
Enabled=1
|
||||
[pcbnew/Layer.F.Adhes]
|
||||
Enabled=1
|
||||
[pcbnew/Layer.B.Paste]
|
||||
Enabled=1
|
||||
[pcbnew/Layer.F.Paste]
|
||||
Enabled=1
|
||||
[pcbnew/Layer.B.SilkS]
|
||||
Enabled=1
|
||||
[pcbnew/Layer.F.SilkS]
|
||||
Enabled=1
|
||||
[pcbnew/Layer.B.Mask]
|
||||
Enabled=1
|
||||
[pcbnew/Layer.F.Mask]
|
||||
Enabled=1
|
||||
[pcbnew/Layer.Dwgs.User]
|
||||
Enabled=1
|
||||
[pcbnew/Layer.Cmts.User]
|
||||
Enabled=1
|
||||
[pcbnew/Layer.Eco1.User]
|
||||
Enabled=1
|
||||
[pcbnew/Layer.Eco2.User]
|
||||
Enabled=1
|
||||
[pcbnew/Layer.Edge.Cuts]
|
||||
Enabled=1
|
||||
[pcbnew/Layer.Margin]
|
||||
Enabled=1
|
||||
[pcbnew/Layer.B.CrtYd]
|
||||
Enabled=1
|
||||
[pcbnew/Layer.F.CrtYd]
|
||||
Enabled=1
|
||||
[pcbnew/Layer.B.Fab]
|
||||
Enabled=1
|
||||
[pcbnew/Layer.F.Fab]
|
||||
Enabled=1
|
||||
[pcbnew/Layer.Rescue]
|
||||
Enabled=0
|
||||
[pcbnew/Netclasses]
|
||||
[pcbnew/Netclasses/Default]
|
||||
Name=Default
|
||||
Clearance=0.15
|
||||
TrackWidth=0.15
|
||||
ViaDiameter=0.5
|
||||
ViaDrill=0.3
|
||||
uViaDiameter=0.2
|
||||
uViaDrill=0.1
|
||||
dPairWidth=0.2
|
||||
dPairGap=0.25
|
||||
dPairViaGap=0.25
|
||||
[pcbnew/Netclasses/1]
|
||||
Name=Power
|
||||
Clearance=0.15
|
||||
TrackWidth=0.25
|
||||
ViaDiameter=0.8
|
||||
ViaDrill=0.4
|
||||
uViaDiameter=0.3
|
||||
uViaDrill=0.1
|
||||
dPairWidth=0.2
|
||||
dPairGap=0.25
|
||||
dPairViaGap=0.25
|
||||
|
|
|
|||
Plik diff jest za duży
Load Diff
|
|
@ -5,6 +5,30 @@
|
|||
(fp_text value Val** (at 0 0) (layer F.SilkS) hide
|
||||
(effects (font (size 1.27 1.27) (thickness 0.15)))
|
||||
)
|
||||
(fp_circle (center 0 0) (end 2.4 -2) (layer B.SilkS) (width 0.12))
|
||||
(fp_poly (pts (xy 0.613833 -1.42875) (xy 0.740833 -1.303076) (xy 0.740833 -0.347925) (xy 0.618511 -0.22688)
|
||||
(xy 0.560645 -0.170822) (xy 0.514683 -0.12854) (xy 0.488415 -0.107128) (xy 0.485556 -0.105834)
|
||||
(xy 0.466782 -0.119831) (xy 0.426244 -0.157043) (xy 0.371659 -0.210303) (xy 0.353879 -0.228156)
|
||||
(xy 0.232833 -0.350478) (xy 0.232833 -1.303076) (xy 0.359833 -1.42875) (xy 0.486833 -1.554425)
|
||||
(xy 0.613833 -1.42875)) (layer B.Mask) (width 0.01))
|
||||
(fp_poly (pts (xy 1.936719 -0.105864) (xy 2.062364 0.021105) (xy 1.947363 0.137552) (xy 1.832362 0.254)
|
||||
(xy 0.834758 0.254) (xy 0.713688 0.131653) (xy 0.592617 0.009306) (xy 0.714964 -0.111764)
|
||||
(xy 0.83731 -0.232834) (xy 1.811075 -0.232834) (xy 1.936719 -0.105864)) (layer B.Mask) (width 0.01))
|
||||
(fp_poly (pts (xy -0.571452 0.01186) (xy -0.693798 0.13293) (xy -0.816145 0.254) (xy -1.811197 0.254)
|
||||
(xy -1.921599 0.142209) (xy -1.975127 0.085328) (xy -2.014356 0.038535) (xy -2.031739 0.010923)
|
||||
(xy -2.032 0.009194) (xy -2.017892 -0.015028) (xy -1.98066 -0.059339) (xy -1.927942 -0.114745)
|
||||
(xy -1.92021 -0.122432) (xy -1.808419 -0.232834) (xy -0.813592 -0.232834) (xy -0.571452 0.01186)) (layer B.Mask) (width 0.01))
|
||||
(fp_poly (pts (xy 2.413 0.369091) (xy 2.413 1.345408) (xy 2.290679 1.466453) (xy 2.168358 1.587497)
|
||||
(xy 1.905 1.321777) (xy 1.905 0.369091) (xy 2.159 0.117741) (xy 2.413 0.369091)) (layer B.Mask) (width 0.01))
|
||||
(fp_poly (pts (xy 0.740833 0.369091) (xy 0.740833 1.345408) (xy 0.618511 1.466454) (xy 0.560645 1.522511)
|
||||
(xy 0.514683 1.564793) (xy 0.488415 1.586206) (xy 0.485556 1.5875) (xy 0.466782 1.573503)
|
||||
(xy 0.426244 1.536291) (xy 0.371659 1.483031) (xy 0.353879 1.465177) (xy 0.232833 1.342855)
|
||||
(xy 0.232833 0.369091) (xy 0.486833 0.117741) (xy 0.740833 0.369091)) (layer B.Mask) (width 0.01))
|
||||
(fp_poly (pts (xy -0.211667 0.369091) (xy -0.211667 1.324139) (xy -0.477483 1.587593) (xy -0.719667 1.342855)
|
||||
(xy -0.719667 0.369091) (xy -0.465667 0.117741) (xy -0.211667 0.369091)) (layer B.Mask) (width 0.01))
|
||||
(fp_poly (pts (xy 1.93675 1.566333) (xy 2.062424 1.693333) (xy 1.93675 1.820333) (xy 1.811075 1.947333)
|
||||
(xy 0.834758 1.947333) (xy 0.583408 1.693333) (xy 0.834758 1.439333) (xy 1.811075 1.439333)
|
||||
(xy 1.93675 1.566333)) (layer B.Mask) (width 0.01))
|
||||
(fp_poly (pts (xy 0.201786 -2.978045) (xy 0.47019 -2.956382) (xy 0.721251 -2.911151) (xy 0.965101 -2.840288)
|
||||
(xy 1.21187 -2.741731) (xy 1.322916 -2.689583) (xy 1.595655 -2.540767) (xy 1.838481 -2.373973)
|
||||
(xy 2.062615 -2.181244) (xy 2.122822 -2.122282) (xy 2.303094 -1.92864) (xy 2.45404 -1.737104)
|
||||
|
|
@ -47,28 +71,4 @@
|
|||
(xy -2.054022 -2.166714) (xy -1.832133 -2.35592) (xy -1.597422 -2.524612) (xy -1.359657 -2.664568)
|
||||
(xy -1.322917 -2.68328) (xy -1.084664 -2.790575) (xy -0.850585 -2.871143) (xy -0.609587 -2.927647)
|
||||
(xy -0.350576 -2.962748) (xy -0.094093 -2.978204) (xy 0.201786 -2.978045)) (layer B.Cu) (width 0.01))
|
||||
(fp_poly (pts (xy 1.93675 1.566333) (xy 2.062424 1.693333) (xy 1.93675 1.820333) (xy 1.811075 1.947333)
|
||||
(xy 0.834758 1.947333) (xy 0.583408 1.693333) (xy 0.834758 1.439333) (xy 1.811075 1.439333)
|
||||
(xy 1.93675 1.566333)) (layer B.Mask) (width 0.01))
|
||||
(fp_poly (pts (xy -0.211667 0.369091) (xy -0.211667 1.324139) (xy -0.477483 1.587593) (xy -0.719667 1.342855)
|
||||
(xy -0.719667 0.369091) (xy -0.465667 0.117741) (xy -0.211667 0.369091)) (layer B.Mask) (width 0.01))
|
||||
(fp_poly (pts (xy 0.740833 0.369091) (xy 0.740833 1.345408) (xy 0.618511 1.466454) (xy 0.560645 1.522511)
|
||||
(xy 0.514683 1.564793) (xy 0.488415 1.586206) (xy 0.485556 1.5875) (xy 0.466782 1.573503)
|
||||
(xy 0.426244 1.536291) (xy 0.371659 1.483031) (xy 0.353879 1.465177) (xy 0.232833 1.342855)
|
||||
(xy 0.232833 0.369091) (xy 0.486833 0.117741) (xy 0.740833 0.369091)) (layer B.Mask) (width 0.01))
|
||||
(fp_poly (pts (xy 2.413 0.369091) (xy 2.413 1.345408) (xy 2.290679 1.466453) (xy 2.168358 1.587497)
|
||||
(xy 1.905 1.321777) (xy 1.905 0.369091) (xy 2.159 0.117741) (xy 2.413 0.369091)) (layer B.Mask) (width 0.01))
|
||||
(fp_poly (pts (xy -0.571452 0.01186) (xy -0.693798 0.13293) (xy -0.816145 0.254) (xy -1.811197 0.254)
|
||||
(xy -1.921599 0.142209) (xy -1.975127 0.085328) (xy -2.014356 0.038535) (xy -2.031739 0.010923)
|
||||
(xy -2.032 0.009194) (xy -2.017892 -0.015028) (xy -1.98066 -0.059339) (xy -1.927942 -0.114745)
|
||||
(xy -1.92021 -0.122432) (xy -1.808419 -0.232834) (xy -0.813592 -0.232834) (xy -0.571452 0.01186)) (layer B.Mask) (width 0.01))
|
||||
(fp_poly (pts (xy 1.936719 -0.105864) (xy 2.062364 0.021105) (xy 1.947363 0.137552) (xy 1.832362 0.254)
|
||||
(xy 0.834758 0.254) (xy 0.713688 0.131653) (xy 0.592617 0.009306) (xy 0.714964 -0.111764)
|
||||
(xy 0.83731 -0.232834) (xy 1.811075 -0.232834) (xy 1.936719 -0.105864)) (layer B.Mask) (width 0.01))
|
||||
(fp_poly (pts (xy 0.613833 -1.42875) (xy 0.740833 -1.303076) (xy 0.740833 -0.347925) (xy 0.618511 -0.22688)
|
||||
(xy 0.560645 -0.170822) (xy 0.514683 -0.12854) (xy 0.488415 -0.107128) (xy 0.485556 -0.105834)
|
||||
(xy 0.466782 -0.119831) (xy 0.426244 -0.157043) (xy 0.371659 -0.210303) (xy 0.353879 -0.228156)
|
||||
(xy 0.232833 -0.350478) (xy 0.232833 -1.303076) (xy 0.359833 -1.42875) (xy 0.486833 -1.554425)
|
||||
(xy 0.613833 -1.42875)) (layer B.Mask) (width 0.01))
|
||||
(fp_circle (center 0 0) (end 2.4 -2) (layer B.SilkS) (width 0.12))
|
||||
)
|
||||
|
|
|
|||
|
|
@ -1,4 +1,4 @@
|
|||
(module jack_3.5_pj313d-smt (layer F.Cu) (tedit 5FF1430C)
|
||||
(module jack_3.5_pj313d-smt (layer F.Cu) (tedit 6019CF8F)
|
||||
(descr "3.5mm jack, HK RTL PJ313D")
|
||||
(fp_text reference JP*** (at 0.1 -6.7) (layer F.SilkS)
|
||||
(effects (font (size 0.99822 0.99822) (thickness 0.19812)))
|
||||
|
|
@ -6,21 +6,21 @@
|
|||
(fp_text value jack_3.5_pj313d-smt (at 0 9.5) (layer F.SilkS)
|
||||
(effects (font (size 0.99822 0.99822) (thickness 0.19812)))
|
||||
)
|
||||
(fp_line (start -2.5 5.8) (end -2.5 8.3) (layer F.SilkS) (width 0.3048))
|
||||
(fp_line (start -2.5 8.3) (end 2.5 8.3) (layer F.SilkS) (width 0.3048))
|
||||
(fp_line (start 2.5 5.8) (end 2.5 8.3) (layer F.SilkS) (width 0.3048))
|
||||
(fp_line (start -3 -5.8) (end -3 5.8) (layer F.SilkS) (width 0.3048))
|
||||
(fp_line (start -3 -5.8) (end 3 -5.8) (layer F.SilkS) (width 0.3048))
|
||||
(fp_line (start 3 -5.8) (end 3 5.8) (layer F.SilkS) (width 0.3048))
|
||||
(fp_line (start -3 5.8) (end 3 5.8) (layer F.SilkS) (width 0.3048))
|
||||
(fp_line (start -3 -5.8) (end 3 -5.8) (layer F.CrtYd) (width 0.12))
|
||||
(fp_line (start 3 -5.8) (end 3 5.8) (layer F.CrtYd) (width 0.12))
|
||||
(fp_line (start 3 5.8) (end 2.5 5.8) (layer F.CrtYd) (width 0.12))
|
||||
(fp_line (start 2.5 5.8) (end 2.5 8.3) (layer F.CrtYd) (width 0.12))
|
||||
(fp_line (start 2.5 8.3) (end -2.5 8.3) (layer F.CrtYd) (width 0.12))
|
||||
(fp_line (start -2.5 8.3) (end -2.5 5.8) (layer F.CrtYd) (width 0.12))
|
||||
(fp_line (start -2.5 5.8) (end -3 5.8) (layer F.CrtYd) (width 0.12))
|
||||
(fp_line (start -3 5.8) (end -3 -5.8) (layer F.CrtYd) (width 0.12))
|
||||
(fp_line (start -2.5 5.8) (end -3 5.8) (layer F.CrtYd) (width 0.12))
|
||||
(fp_line (start -2.5 8.3) (end -2.5 5.8) (layer F.CrtYd) (width 0.12))
|
||||
(fp_line (start 2.5 8.3) (end -2.5 8.3) (layer F.CrtYd) (width 0.12))
|
||||
(fp_line (start 2.5 5.8) (end 2.5 8.3) (layer F.CrtYd) (width 0.12))
|
||||
(fp_line (start 3 5.8) (end 2.5 5.8) (layer F.CrtYd) (width 0.12))
|
||||
(fp_line (start 3 -5.8) (end 3 5.8) (layer F.CrtYd) (width 0.12))
|
||||
(fp_line (start -3 -5.8) (end 3 -5.8) (layer F.CrtYd) (width 0.12))
|
||||
(fp_line (start -3 5.8) (end 3 5.8) (layer F.SilkS) (width 0.3048))
|
||||
(fp_line (start 3 -5.8) (end 3 5.8) (layer F.SilkS) (width 0.3048))
|
||||
(fp_line (start -3 -5.8) (end 3 -5.8) (layer F.SilkS) (width 0.3048))
|
||||
(fp_line (start -3 -5.8) (end -3 5.8) (layer F.SilkS) (width 0.3048))
|
||||
(fp_line (start 2.5 5.8) (end 2.5 8.3) (layer F.SilkS) (width 0.3048))
|
||||
(fp_line (start -2.5 8.3) (end 2.5 8.3) (layer F.SilkS) (width 0.3048))
|
||||
(fp_line (start -2.5 5.8) (end -2.5 8.3) (layer F.SilkS) (width 0.3048))
|
||||
(pad T smd rect (at 3.3 -2.75) (size 1.5 1.5) (layers F.Cu F.Paste F.Mask))
|
||||
(pad R smd rect (at 3.3 0.75) (size 1.5 1.5) (layers F.Cu F.Paste F.Mask))
|
||||
(pad S smd rect (at 3.3 3.95) (size 1.5 1.5) (layers F.Cu F.Paste F.Mask))
|
||||
|
|
@ -29,7 +29,7 @@
|
|||
(pad S smd rect (at -3.3 3.95) (size 1.5 1.5) (layers F.Cu F.Paste F.Mask))
|
||||
(pad "" np_thru_hole circle (at 0 -2.75) (size 1.5 1.5) (drill 1.5) (layers *.Cu *.Mask F.SilkS))
|
||||
(pad "" np_thru_hole circle (at 0 3.25) (size 1.5 1.5) (drill 1.5) (layers *.Cu *.Mask F.SilkS))
|
||||
(model walter/conn_av/jack_3.5_pj313d-smt.wrl
|
||||
(model ${KIPRJMOD}/3d-models/jack_3.5_pj313d-smt.wrl
|
||||
(at (xyz 0 0 0))
|
||||
(scale (xyz 1 1 1))
|
||||
(rotate (xyz 0 0 0))
|
||||
|
|
|
|||
Plik diff jest za duży
Load Diff
Ładowanie…
Reference in New Issue