kopia lustrzana https://github.com/softcomplex/digirig
Digirig Mobile 1.9
- additional solder jumper options to better accommodate CI-V - rearranged solder jumpers using custom footprint - RF shunting caps on audiomain
rodzic
2b3f2409dd
commit
4bb4024752
|
@ -1,33 +0,0 @@
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update=22/05/2015 07:44:53
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version=1
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last_client=kicad
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[general]
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version=1
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||||
RootSch=
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BoardNm=
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[pcbnew]
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version=1
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||||
LastNetListRead=
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||||
UseCmpFile=1
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||||
PadDrill=0.600000000000
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PadDrillOvalY=0.600000000000
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||||
PadSizeH=1.500000000000
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PadSizeV=1.500000000000
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||||
PcbTextSizeV=1.500000000000
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PcbTextSizeH=1.500000000000
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PcbTextThickness=0.300000000000
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ModuleTextSizeV=1.000000000000
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ModuleTextSizeH=1.000000000000
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||||
ModuleTextSizeThickness=0.150000000000
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||||
SolderMaskClearance=0.000000000000
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SolderMaskMinWidth=0.000000000000
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DrawSegmentWidth=0.200000000000
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BoardOutlineThickness=0.100000000000
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ModuleOutlineThickness=0.150000000000
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[cvpcb]
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version=1
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NetIExt=net
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[eeschema]
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version=1
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LibDir=
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[eeschema/libraries]
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@ -1,307 +0,0 @@
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(gr_circle (center 197.4 10) (end 198.4 10) (layer Edge.Cuts) (width 0.1))
|
||||
(gr_circle (center 197.4 256) (end 198.4 256) (layer Edge.Cuts) (width 0.1) (tstamp 602180CC))
|
||||
(gr_circle (center 5 256) (end 6 256) (layer Edge.Cuts) (width 0.1) (tstamp 602180C6))
|
||||
(gr_circle (center 5 10) (end 6 10) (layer Edge.Cuts) (width 0.1))
|
||||
(gr_circle (center 5 10) (end 5 9) (layer F.Fab) (width 0.15))
|
||||
(gr_line (start 0 221) (end 202.4 221) (layer Edge.Cuts) (width 0.1) (tstamp 602180C0))
|
||||
(gr_line (start 0 176) (end 202.4 176) (layer Edge.Cuts) (width 0.1) (tstamp 602180BA))
|
||||
(gr_line (start 0 173) (end 202.4 173) (layer Edge.Cuts) (width 0.1) (tstamp 602180B7))
|
||||
(gr_line (start 0 85) (end 202.4 85) (layer Edge.Cuts) (width 0.1) (tstamp 602180AE))
|
||||
(gr_line (start 0 40) (end 202.4 40) (layer Edge.Cuts) (width 0.1) (tstamp 602180AB))
|
||||
(gr_line (start 192.4 0) (end 192.4 261) (layer Edge.Cuts) (width 0.1) (tstamp 60124669))
|
||||
(gr_line (start 10 0) (end 10 261) (layer Edge.Cuts) (width 0.1) (tstamp 6012465D))
|
||||
(gr_line (start 0 0) (end 0 261) (layer Edge.Cuts) (width 0.1) (tstamp 601245FC))
|
||||
(gr_line (start 0 261) (end 202.4 261) (layer Edge.Cuts) (width 0.1) (tstamp 602180A5))
|
||||
(gr_line (start 202.4 0) (end 202.4 261) (layer Edge.Cuts) (width 0.1))
|
||||
(gr_line (start 0 0) (end 202.4 0) (layer Edge.Cuts) (width 0.1) (tstamp 60124684))
|
||||
|
||||
)
|
|
@ -1,33 +0,0 @@
|
|||
update=22/05/2015 07:44:53
|
||||
version=1
|
||||
last_client=kicad
|
||||
[general]
|
||||
version=1
|
||||
RootSch=
|
||||
BoardNm=
|
||||
[pcbnew]
|
||||
version=1
|
||||
LastNetListRead=
|
||||
UseCmpFile=1
|
||||
PadDrill=0.600000000000
|
||||
PadDrillOvalY=0.600000000000
|
||||
PadSizeH=1.500000000000
|
||||
PadSizeV=1.500000000000
|
||||
PcbTextSizeV=1.500000000000
|
||||
PcbTextSizeH=1.500000000000
|
||||
PcbTextThickness=0.300000000000
|
||||
ModuleTextSizeV=1.000000000000
|
||||
ModuleTextSizeH=1.000000000000
|
||||
ModuleTextSizeThickness=0.150000000000
|
||||
SolderMaskClearance=0.000000000000
|
||||
SolderMaskMinWidth=0.000000000000
|
||||
DrawSegmentWidth=0.200000000000
|
||||
BoardOutlineThickness=0.100000000000
|
||||
ModuleOutlineThickness=0.150000000000
|
||||
[cvpcb]
|
||||
version=1
|
||||
NetIExt=net
|
||||
[eeschema]
|
||||
version=1
|
||||
LibDir=
|
||||
[eeschema/libraries]
|
Plik diff jest za duży
Load Diff
Plik binarny nie jest wyświetlany.
|
@ -1,249 +0,0 @@
|
|||
update=6/16/2021 10:43:44 AM
|
||||
version=1
|
||||
last_client=kicad
|
||||
[general]
|
||||
version=1
|
||||
RootSch=
|
||||
BoardNm=
|
||||
[cvpcb]
|
||||
version=1
|
||||
NetIExt=net
|
||||
[eeschema]
|
||||
version=1
|
||||
LibDir=
|
||||
[eeschema/libraries]
|
||||
[pcbnew]
|
||||
version=1
|
||||
PageLayoutDescrFile=
|
||||
LastNetListRead=
|
||||
CopperLayerCount=2
|
||||
BoardThickness=1.6
|
||||
AllowMicroVias=0
|
||||
AllowBlindVias=0
|
||||
RequireCourtyardDefinitions=0
|
||||
ProhibitOverlappingCourtyards=1
|
||||
MinTrackWidth=0.127
|
||||
MinViaDiameter=0.2
|
||||
MinViaDrill=0.2
|
||||
MinMicroViaDiameter=0.2
|
||||
MinMicroViaDrill=0.09999999999999999
|
||||
MinHoleToHole=0.25
|
||||
TrackWidth1=0.127
|
||||
ViaDiameter1=0.4
|
||||
ViaDrill1=0.2
|
||||
dPairWidth1=0.2
|
||||
dPairGap1=0.25
|
||||
dPairViaGap1=0.25
|
||||
SilkLineWidth=0.15
|
||||
SilkTextSizeV=1
|
||||
SilkTextSizeH=1
|
||||
SilkTextSizeThickness=0.15
|
||||
SilkTextItalic=0
|
||||
SilkTextUpright=1
|
||||
CopperLineWidth=0.2
|
||||
CopperTextSizeV=1.5
|
||||
CopperTextSizeH=1.5
|
||||
CopperTextThickness=0.3
|
||||
CopperTextItalic=0
|
||||
CopperTextUpright=1
|
||||
EdgeCutLineWidth=0.09999999999999999
|
||||
CourtyardLineWidth=0.05
|
||||
OthersLineWidth=0.15
|
||||
OthersTextSizeV=1
|
||||
OthersTextSizeH=1
|
||||
OthersTextSizeThickness=0.15
|
||||
OthersTextItalic=0
|
||||
OthersTextUpright=1
|
||||
SolderMaskClearance=0
|
||||
SolderMaskMinWidth=0
|
||||
SolderPasteClearance=0
|
||||
SolderPasteRatio=-0
|
||||
[pcbnew/Layer.F.Cu]
|
||||
Name=F.Cu
|
||||
Type=0
|
||||
Enabled=1
|
||||
[pcbnew/Layer.In1.Cu]
|
||||
Name=In1.Cu
|
||||
Type=0
|
||||
Enabled=0
|
||||
[pcbnew/Layer.In2.Cu]
|
||||
Name=In2.Cu
|
||||
Type=0
|
||||
Enabled=0
|
||||
[pcbnew/Layer.In3.Cu]
|
||||
Name=In3.Cu
|
||||
Type=0
|
||||
Enabled=0
|
||||
[pcbnew/Layer.In4.Cu]
|
||||
Name=In4.Cu
|
||||
Type=0
|
||||
Enabled=0
|
||||
[pcbnew/Layer.In5.Cu]
|
||||
Name=In5.Cu
|
||||
Type=0
|
||||
Enabled=0
|
||||
[pcbnew/Layer.In6.Cu]
|
||||
Name=In6.Cu
|
||||
Type=0
|
||||
Enabled=0
|
||||
[pcbnew/Layer.In7.Cu]
|
||||
Name=In7.Cu
|
||||
Type=0
|
||||
Enabled=0
|
||||
[pcbnew/Layer.In8.Cu]
|
||||
Name=In8.Cu
|
||||
Type=0
|
||||
Enabled=0
|
||||
[pcbnew/Layer.In9.Cu]
|
||||
Name=In9.Cu
|
||||
Type=0
|
||||
Enabled=0
|
||||
[pcbnew/Layer.In10.Cu]
|
||||
Name=In10.Cu
|
||||
Type=0
|
||||
Enabled=0
|
||||
[pcbnew/Layer.In11.Cu]
|
||||
Name=In11.Cu
|
||||
Type=0
|
||||
Enabled=0
|
||||
[pcbnew/Layer.In12.Cu]
|
||||
Name=In12.Cu
|
||||
Type=0
|
||||
Enabled=0
|
||||
[pcbnew/Layer.In13.Cu]
|
||||
Name=In13.Cu
|
||||
Type=0
|
||||
Enabled=0
|
||||
[pcbnew/Layer.In14.Cu]
|
||||
Name=In14.Cu
|
||||
Type=0
|
||||
Enabled=0
|
||||
[pcbnew/Layer.In15.Cu]
|
||||
Name=In15.Cu
|
||||
Type=0
|
||||
Enabled=0
|
||||
[pcbnew/Layer.In16.Cu]
|
||||
Name=In16.Cu
|
||||
Type=0
|
||||
Enabled=0
|
||||
[pcbnew/Layer.In17.Cu]
|
||||
Name=In17.Cu
|
||||
Type=0
|
||||
Enabled=0
|
||||
[pcbnew/Layer.In18.Cu]
|
||||
Name=In18.Cu
|
||||
Type=0
|
||||
Enabled=0
|
||||
[pcbnew/Layer.In19.Cu]
|
||||
Name=In19.Cu
|
||||
Type=0
|
||||
Enabled=0
|
||||
[pcbnew/Layer.In20.Cu]
|
||||
Name=In20.Cu
|
||||
Type=0
|
||||
Enabled=0
|
||||
[pcbnew/Layer.In21.Cu]
|
||||
Name=In21.Cu
|
||||
Type=0
|
||||
Enabled=0
|
||||
[pcbnew/Layer.In22.Cu]
|
||||
Name=In22.Cu
|
||||
Type=0
|
||||
Enabled=0
|
||||
[pcbnew/Layer.In23.Cu]
|
||||
Name=In23.Cu
|
||||
Type=0
|
||||
Enabled=0
|
||||
[pcbnew/Layer.In24.Cu]
|
||||
Name=In24.Cu
|
||||
Type=0
|
||||
Enabled=0
|
||||
[pcbnew/Layer.In25.Cu]
|
||||
Name=In25.Cu
|
||||
Type=0
|
||||
Enabled=0
|
||||
[pcbnew/Layer.In26.Cu]
|
||||
Name=In26.Cu
|
||||
Type=0
|
||||
Enabled=0
|
||||
[pcbnew/Layer.In27.Cu]
|
||||
Name=In27.Cu
|
||||
Type=0
|
||||
Enabled=0
|
||||
[pcbnew/Layer.In28.Cu]
|
||||
Name=In28.Cu
|
||||
Type=0
|
||||
Enabled=0
|
||||
[pcbnew/Layer.In29.Cu]
|
||||
Name=In29.Cu
|
||||
Type=0
|
||||
Enabled=0
|
||||
[pcbnew/Layer.In30.Cu]
|
||||
Name=In30.Cu
|
||||
Type=0
|
||||
Enabled=0
|
||||
[pcbnew/Layer.B.Cu]
|
||||
Name=B.Cu
|
||||
Type=0
|
||||
Enabled=1
|
||||
[pcbnew/Layer.B.Adhes]
|
||||
Enabled=1
|
||||
[pcbnew/Layer.F.Adhes]
|
||||
Enabled=1
|
||||
[pcbnew/Layer.B.Paste]
|
||||
Enabled=1
|
||||
[pcbnew/Layer.F.Paste]
|
||||
Enabled=1
|
||||
[pcbnew/Layer.B.SilkS]
|
||||
Enabled=1
|
||||
[pcbnew/Layer.F.SilkS]
|
||||
Enabled=1
|
||||
[pcbnew/Layer.B.Mask]
|
||||
Enabled=1
|
||||
[pcbnew/Layer.F.Mask]
|
||||
Enabled=1
|
||||
[pcbnew/Layer.Dwgs.User]
|
||||
Enabled=1
|
||||
[pcbnew/Layer.Cmts.User]
|
||||
Enabled=1
|
||||
[pcbnew/Layer.Eco1.User]
|
||||
Enabled=1
|
||||
[pcbnew/Layer.Eco2.User]
|
||||
Enabled=1
|
||||
[pcbnew/Layer.Edge.Cuts]
|
||||
Enabled=1
|
||||
[pcbnew/Layer.Margin]
|
||||
Enabled=1
|
||||
[pcbnew/Layer.B.CrtYd]
|
||||
Enabled=1
|
||||
[pcbnew/Layer.F.CrtYd]
|
||||
Enabled=1
|
||||
[pcbnew/Layer.B.Fab]
|
||||
Enabled=1
|
||||
[pcbnew/Layer.F.Fab]
|
||||
Enabled=1
|
||||
[pcbnew/Layer.Rescue]
|
||||
Enabled=0
|
||||
[pcbnew/Netclasses]
|
||||
[pcbnew/Netclasses/Default]
|
||||
Name=Default
|
||||
Clearance=0.127
|
||||
TrackWidth=0.127
|
||||
ViaDiameter=0.4
|
||||
ViaDrill=0.2
|
||||
uViaDiameter=0.2
|
||||
uViaDrill=0.1
|
||||
dPairWidth=0.2
|
||||
dPairGap=0.25
|
||||
dPairViaGap=0.25
|
||||
[pcbnew/Netclasses/1]
|
||||
Name=Power
|
||||
Clearance=0.127
|
||||
TrackWidth=0.25
|
||||
ViaDiameter=0.6
|
||||
ViaDrill=0.4
|
||||
uViaDiameter=0.3
|
||||
uViaDrill=0.1
|
||||
dPairWidth=0.2
|
||||
dPairGap=0.25
|
||||
dPairViaGap=0.25
|
Plik diff jest za duży
Load Diff
Plik diff jest za duży
Load Diff
|
@ -0,0 +1,422 @@
|
|||
(kicad_pcb (version 20211014) (generator pcbnew)
|
||||
|
||||
(general
|
||||
(thickness 1.6)
|
||||
)
|
||||
|
||||
(paper "A4")
|
||||
(layers
|
||||
(0 "F.Cu" signal)
|
||||
(31 "B.Cu" signal)
|
||||
(32 "B.Adhes" user "B.Adhesive")
|
||||
(33 "F.Adhes" user "F.Adhesive")
|
||||
(34 "B.Paste" user)
|
||||
(35 "F.Paste" user)
|
||||
(36 "B.SilkS" user "B.Silkscreen")
|
||||
(37 "F.SilkS" user "F.Silkscreen")
|
||||
(38 "B.Mask" user)
|
||||
(39 "F.Mask" user)
|
||||
(40 "Dwgs.User" user "User.Drawings")
|
||||
(41 "Cmts.User" user "User.Comments")
|
||||
(42 "Eco1.User" user "User.Eco1")
|
||||
(43 "Eco2.User" user "User.Eco2")
|
||||
(44 "Edge.Cuts" user)
|
||||
(45 "Margin" user)
|
||||
(46 "B.CrtYd" user "B.Courtyard")
|
||||
(47 "F.CrtYd" user "F.Courtyard")
|
||||
(48 "B.Fab" user)
|
||||
(49 "F.Fab" user)
|
||||
)
|
||||
|
||||
(setup
|
||||
(pad_to_mask_clearance 0)
|
||||
(pcbplotparams
|
||||
(layerselection 0x0001080_7fffffff)
|
||||
(disableapertmacros false)
|
||||
(usegerberextensions false)
|
||||
(usegerberattributes true)
|
||||
(usegerberadvancedattributes true)
|
||||
(creategerberjobfile true)
|
||||
(svguseinch false)
|
||||
(svgprecision 6)
|
||||
(excludeedgelayer true)
|
||||
(plotframeref false)
|
||||
(viasonmask false)
|
||||
(mode 1)
|
||||
(useauxorigin false)
|
||||
(hpglpennumber 1)
|
||||
(hpglpenspeed 20)
|
||||
(hpglpendiameter 15.000000)
|
||||
(dxfpolygonmode true)
|
||||
(dxfimperialunits true)
|
||||
(dxfusepcbnewfont true)
|
||||
(psnegative false)
|
||||
(psa4output false)
|
||||
(plotreference true)
|
||||
(plotvalue true)
|
||||
(plotinvisibletext false)
|
||||
(sketchpadsonfab false)
|
||||
(subtractmaskfromsilk false)
|
||||
(outputformat 1)
|
||||
(mirror false)
|
||||
(drillshape 0)
|
||||
(scaleselection 1)
|
||||
(outputdirectory "gerbers/")
|
||||
)
|
||||
)
|
||||
|
||||
(net 0 "")
|
||||
|
||||
(footprint "Fiducial:Fiducial_1mm_Mask2mm" (layer "F.Cu")
|
||||
(tedit 5C18CB26) (tstamp 00000000-0000-0000-0000-00006012a54f)
|
||||
(at 5 10)
|
||||
(descr "Circular Fiducial, 1mm bare copper, 2mm soldermask opening (Level A)")
|
||||
(tags "fiducial")
|
||||
(attr smd)
|
||||
(fp_text reference "REF**" (at 0 -2) (layer "F.SilkS")
|
||||
(effects (font (size 1 1) (thickness 0.15)))
|
||||
(tstamp 70b8744a-7f56-4a6d-a71a-1de076f49081)
|
||||
)
|
||||
(fp_text value "Fiducial_1mm_Mask2mm" (at 0 2) (layer "F.Fab")
|
||||
(effects (font (size 1 1) (thickness 0.15)))
|
||||
(tstamp ae713629-1dd9-47a6-be0e-0ab9885d9013)
|
||||
)
|
||||
(fp_text user "${REFERENCE}" (at 0 0) (layer "F.Fab")
|
||||
(effects (font (size 0.4 0.4) (thickness 0.06)))
|
||||
(tstamp 0d4445c7-8a0d-46b0-93c7-7c5dd998756e)
|
||||
)
|
||||
(fp_circle (center 0 0) (end 1.25 0) (layer "F.CrtYd") (width 0.05) (fill none) (tstamp 348b39ce-20d2-4f01-b3b8-e8bd5a2fc26e))
|
||||
(fp_circle (center 0 0) (end 1 0) (layer "F.Fab") (width 0.1) (fill none) (tstamp c21bc6ca-6ffd-4335-af6c-a4b2da7ed6e9))
|
||||
(pad "" smd circle locked (at 0 0) (size 1 1) (layers "F.Cu" "F.Mask")
|
||||
(solder_mask_margin 0.5) (clearance 0.5) (tstamp b54ae0e8-7728-465f-8eb5-9b8da2acf335))
|
||||
)
|
||||
|
||||
(footprint "Fiducial:Fiducial_1mm_Mask2mm" (layer "F.Cu")
|
||||
(tedit 5C18CB26) (tstamp 00000000-0000-0000-0000-00006012a57a)
|
||||
(at 213 10)
|
||||
(descr "Circular Fiducial, 1mm bare copper, 2mm soldermask opening (Level A)")
|
||||
(tags "fiducial")
|
||||
(attr smd)
|
||||
(fp_text reference "REF**" (at 0 -2) (layer "F.SilkS")
|
||||
(effects (font (size 1 1) (thickness 0.15)))
|
||||
(tstamp d80c6f3c-2d1f-40d3-bf71-8046ae8efa09)
|
||||
)
|
||||
(fp_text value "Fiducial_1mm_Mask2mm" (at 0 2) (layer "F.Fab")
|
||||
(effects (font (size 1 1) (thickness 0.15)))
|
||||
(tstamp 13c15b23-49c6-473a-a640-272df9fa9b60)
|
||||
)
|
||||
(fp_text user "${REFERENCE}" (at 0 0) (layer "F.Fab")
|
||||
(effects (font (size 0.4 0.4) (thickness 0.06)))
|
||||
(tstamp 2b78fb96-b83a-454d-9c4c-243d3fcbdc74)
|
||||
)
|
||||
(fp_circle (center 0 0) (end 1.25 0) (layer "F.CrtYd") (width 0.05) (fill none) (tstamp 4155505f-3687-467b-8149-9afc3d422f5e))
|
||||
(fp_circle (center 0 0) (end 1 0) (layer "F.Fab") (width 0.1) (fill none) (tstamp fda9dddb-894c-4a9c-afd9-e6bb2b3fb708))
|
||||
(pad "" smd circle locked (at 0 0) (size 1 1) (layers "F.Cu" "F.Mask")
|
||||
(solder_mask_margin 0.5) (clearance 0.5) (tstamp 7bdf0f3e-3a1c-4abb-9c33-d80432067514))
|
||||
)
|
||||
|
||||
(footprint "Fiducial:Fiducial_1mm_Mask2mm" (layer "F.Cu")
|
||||
(tedit 5C18CB26) (tstamp 00000000-0000-0000-0000-0000602180f3)
|
||||
(at 5 265)
|
||||
(descr "Circular Fiducial, 1mm bare copper, 2mm soldermask opening (Level A)")
|
||||
(tags "fiducial")
|
||||
(attr smd)
|
||||
(fp_text reference "REF**" (at 0 -2) (layer "F.SilkS")
|
||||
(effects (font (size 1 1) (thickness 0.15)))
|
||||
(tstamp f4e3ae44-ee6a-42c9-9480-36f259d3a69a)
|
||||
)
|
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|
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|
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|
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|
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|
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|
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||||
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|
||||
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|
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
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|
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|
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|
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|
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|
||||
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|
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|
||||
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|
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|
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|
||||
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|
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||||
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|
||||
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|
||||
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||||
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|
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|
||||
{
|
||||
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|
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|
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|
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|
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
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|
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|
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|
||||
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|
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|
||||
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|
||||
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|
||||
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|
||||
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|
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|
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|
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
},
|
||||
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|
||||
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|
||||
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|
||||
"idf": "",
|
||||
"netlist": "",
|
||||
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|
||||
"step": "",
|
||||
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|
||||
},
|
||||
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|
||||
},
|
||||
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|
||||
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|
||||
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|
||||
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|
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},
|
||||
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|
||||
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|
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|
||||
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|
||||
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|
||||
}
|
|
@ -0,0 +1,28 @@
|
|||
"Source:","C:\Users\denis\Dropbox\Projects\digirig.net\electric\digirig-mobile\digirig-mobile.kicad_sch"
|
||||
"Date:","2/21/2022 20:11:28"
|
||||
"Tool:","Eeschema (6.0.0)"
|
||||
"Generator:","C:\Program Files\KiCad\6.0\bin\scripting\plugins/bom_csv_grouped_by_value_with_fp.py"
|
||||
"Component Count:","56"
|
||||
"Ref","Qnty","Value","Cmp name","Footprint","Description","Vendor"
|
||||
"C1, C3, C9, C15, C18, C20, C21, C22, ","8","10uF","C_Small","Capacitor_SMD:C_0402_1005Metric","Unpolarized capacitor, small symbol",""
|
||||
"C2, C4, C5, C8, C10, C11, C12, C13, C14, C19, ","10","100nF","C_Small","Capacitor_SMD:C_0402_1005Metric","Unpolarized capacitor, small symbol",""
|
||||
"C6, C7, C16, C17, C23, C24, ","6","27pF","C_Small","Capacitor_SMD:C_0402_1005Metric","Unpolarized capacitor, small symbol",""
|
||||
"D1, ","1","GS2005ELD","D","Diode_SMD:D_SOD-923","Diode",""
|
||||
"J1, ","1","USB","USB_C_Receptacle_USB2.0","footprints:USB_C_Receptacle_HRO_TYPE-C-31-M-12","USB 2.0-only Type-C Receptacle connector",""
|
||||
"J2, ","1","Serial, 3V3","AudioJack4","footprints:TRRS-PJ-320A","Audio Jack, 4 Poles (TRRS)",""
|
||||
"J3, ","1","Audio, PTT","AudioJack4","footprints:TRRS-PJ-320A","Audio Jack, 4 Poles (TRRS)",""
|
||||
"Q1, Q2, ","2","MMBT5551L","MMBT5551L","Package_TO_SOT_SMD:SOT-23","0.6A Ic, 160V Vce, NPN Transistor, SOT-23",""
|
||||
"R1, R10, R15, R17, R18, ","5","12K","R_Small_US","Resistor_SMD:R_0402_1005Metric","Resistor, small US symbol",""
|
||||
"R2, ","1","27K","R_Small_US","Resistor_SMD:R_0402_1005Metric","Resistor, small US symbol",""
|
||||
"R3, R5, ","2","5K1","R_Small_US","Resistor_SMD:R_0402_1005Metric","Resistor, small US symbol",""
|
||||
"R4, R6, R7, R8, R16, R19, ","6","100K","R_Small_US","Resistor_SMD:R_0402_1005Metric","Resistor, small US symbol",""
|
||||
"R9, R14, ","2","1M","R_Small_US","Resistor_SMD:R_0402_1005Metric","Resistor, small US symbol",""
|
||||
"R11, R12, ","2","33","R_Small_US","Resistor_SMD:R_0402_1005Metric","Resistor, small US symbol",""
|
||||
"R13, ","1","1K5","R_Small_US","Resistor_SMD:R_0402_1005Metric","Resistor, small US symbol",""
|
||||
"TH1, ","1","0.02A","Thermistor_PTC","Resistor_SMD:R_0603_1608Metric","Temperature dependent resistor, positive temperature coefficient",""
|
||||
"U1, ","1","CP2102N-A02-GQFN24","CP2102N-A01-GQFN24","Package_DFN_QFN:QFN-24-1EP_4x4mm_P0.5mm_EP2.6x2.6mm","",""
|
||||
"U2, ","1","USB2412-DZK-TR","USB2412-DZK-TR","Package_DFN_QFN:QFN-28-1EP_5x5mm_P0.5mm_EP3.35x3.35mm","",""
|
||||
"U3, ","1","ADM3101E","ADM3101E","Package_DFN_QFN:QFN-12-1EP_3x3mm_P0.51mm_EP1.45x1.45mm","",""
|
||||
"U4, ","1","CM108","CM108","Package_QFP:LQFP-48_7x7mm_P0.5mm","",""
|
||||
"Y1, ","1","24MHz","Crystal_GND24","Crystal:Crystal_SMD_3225-4Pin_3.2x2.5mm","Four pin crystal, GND on pins 2 and 4",""
|
||||
"Y2, ","1","12MHz","Crystal_GND24","Crystal:Crystal_SMD_3225-4Pin_3.2x2.5mm","Four pin crystal, GND on pins 2 and 4",""
|
Nie można renderować tego pliku, ponieważ zawiera nieoczekiwany znak w wierszu 1 i kolumnie 104.
|
Plik diff jest za duży
Load Diff
|
@ -0,0 +1,75 @@
|
|||
{
|
||||
"board": {
|
||||
"active_layer": 31,
|
||||
"active_layer_preset": "",
|
||||
"auto_track_width": true,
|
||||
"hidden_nets": [],
|
||||
"high_contrast_mode": 1,
|
||||
"net_color_mode": 1,
|
||||
"opacity": {
|
||||
"pads": 0.6000000238418579,
|
||||
"tracks": 1.0,
|
||||
"vias": 0.5899999737739563,
|
||||
"zones": 0.6
|
||||
},
|
||||
"ratsnest_display_mode": 0,
|
||||
"selection_filter": {
|
||||
"dimensions": true,
|
||||
"footprints": true,
|
||||
"graphics": true,
|
||||
"keepouts": true,
|
||||
"lockedItems": true,
|
||||
"otherItems": true,
|
||||
"pads": true,
|
||||
"text": true,
|
||||
"tracks": true,
|
||||
"vias": true,
|
||||
"zones": true
|
||||
},
|
||||
"visible_items": [
|
||||
0,
|
||||
1,
|
||||
2,
|
||||
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|
||||
4,
|
||||
5,
|
||||
6,
|
||||
8,
|
||||
9,
|
||||
10,
|
||||
11,
|
||||
12,
|
||||
13,
|
||||
14,
|
||||
15,
|
||||
16,
|
||||
17,
|
||||
19,
|
||||
20,
|
||||
21,
|
||||
22,
|
||||
23,
|
||||
24,
|
||||
25,
|
||||
26,
|
||||
27,
|
||||
28,
|
||||
29,
|
||||
30,
|
||||
32,
|
||||
33,
|
||||
34,
|
||||
35,
|
||||
36
|
||||
],
|
||||
"visible_layers": "ffff3fc_ffffffff",
|
||||
"zone_display_mode": 0
|
||||
},
|
||||
"meta": {
|
||||
"filename": "digirig-mobile.kicad_prl",
|
||||
"version": 3
|
||||
},
|
||||
"project": {
|
||||
"files": []
|
||||
}
|
||||
}
|
|
@ -0,0 +1,499 @@
|
|||
{
|
||||
"board": {
|
||||
"design_settings": {
|
||||
"defaults": {
|
||||
"board_outline_line_width": 0.09999999999999999,
|
||||
"copper_line_width": 0.19999999999999998,
|
||||
"copper_text_italic": false,
|
||||
"copper_text_size_h": 1.5,
|
||||
"copper_text_size_v": 1.5,
|
||||
"copper_text_thickness": 0.3,
|
||||
"copper_text_upright": false,
|
||||
"courtyard_line_width": 0.049999999999999996,
|
||||
"dimension_precision": 4,
|
||||
"dimension_units": 3,
|
||||
"dimensions": {
|
||||
"arrow_length": 1270000,
|
||||
"extension_offset": 500000,
|
||||
"keep_text_aligned": true,
|
||||
"suppress_zeroes": false,
|
||||
"text_position": 0,
|
||||
"units_format": 1
|
||||
},
|
||||
"fab_line_width": 0.09999999999999999,
|
||||
"fab_text_italic": false,
|
||||
"fab_text_size_h": 1.0,
|
||||
"fab_text_size_v": 1.0,
|
||||
"fab_text_thickness": 0.15,
|
||||
"fab_text_upright": false,
|
||||
"other_line_width": 0.09999999999999999,
|
||||
"other_text_italic": false,
|
||||
"other_text_size_h": 1.0,
|
||||
"other_text_size_v": 1.0,
|
||||
"other_text_thickness": 0.15,
|
||||
"other_text_upright": false,
|
||||
"pads": {
|
||||
"drill": 0.7,
|
||||
"height": 1.0,
|
||||
"width": 1.0
|
||||
},
|
||||
"silk_line_width": 0.15,
|
||||
"silk_text_italic": false,
|
||||
"silk_text_size_h": 1.0,
|
||||
"silk_text_size_v": 1.0,
|
||||
"silk_text_thickness": 0.15,
|
||||
"silk_text_upright": false,
|
||||
"zones": {
|
||||
"45_degree_only": false,
|
||||
"min_clearance": 0.25
|
||||
}
|
||||
},
|
||||
"diff_pair_dimensions": [
|
||||
{
|
||||
"gap": 0.0,
|
||||
"via_gap": 0.0,
|
||||
"width": 0.0
|
||||
}
|
||||
],
|
||||
"drc_exclusions": [
|
||||
"clearance|134750011|108950000|87ea4f0e-d72e-4b86-8009-8a368762ec71|2416b761-64cf-46de-a335-39e84b411ea4",
|
||||
"clearance|134750011|109250000|d9da7f95-e676-4353-952f-7de0c327ddc8|2416b761-64cf-46de-a335-39e84b411ea4",
|
||||
"clearance|135250011|108950000|2a97cbc6-fb8b-4756-bd26-62b27062d964|2416b761-64cf-46de-a335-39e84b411ea4",
|
||||
"clearance|135250011|109100000|9f4ae264-0292-42e0-98ed-da617c026c5d|2416b761-64cf-46de-a335-39e84b411ea4",
|
||||
"clearance|135400000|108950000|76878dec-dcf7-4d14-a04c-15a1eed38b0e|22177639-3590-4662-b175-d86287ee3770",
|
||||
"clearance|135400000|110700000|da2db6e5-0896-44ed-b182-35c3d04dc14e|d568f602-479a-4e78-8948-dd7211d4a226",
|
||||
"clearance|135900000|108950000|ca712b9c-8511-4abb-8570-c3f176bb5b73|22177639-3590-4662-b175-d86287ee3770",
|
||||
"clearance|135900000|109100000|9f4ae264-0292-42e0-98ed-da617c026c5d|22177639-3590-4662-b175-d86287ee3770",
|
||||
"clearance|135900000|110700000|d202d00b-fce2-4af0-836e-67316c12b1ca|d568f602-479a-4e78-8948-dd7211d4a226",
|
||||
"clearance|136000011|110700000|d012688b-7a14-45be-8853-ccc0dc10dc71|6e71b84d-ba93-46db-b655-09de6e7c8c28",
|
||||
"clearance|136500011|110700000|880d94e0-447e-413a-a558-cee4b897ff70|6e71b84d-ba93-46db-b655-09de6e7c8c28",
|
||||
"clearance|138150000|109399989|87ea4f0e-d72e-4b86-8009-8a368762ec71|2416b761-64cf-46de-a335-39e84b411ea4",
|
||||
"clearance|138650000|109399989|2a97cbc6-fb8b-4756-bd26-62b27062d964|2416b761-64cf-46de-a335-39e84b411ea4",
|
||||
"clearance|138650000|109549989|9f4ae264-0292-42e0-98ed-da617c026c5d|2416b761-64cf-46de-a335-39e84b411ea4",
|
||||
"clearance|139400000|111149989|d012688b-7a14-45be-8853-ccc0dc10dc71|6e71b84d-ba93-46db-b655-09de6e7c8c28",
|
||||
"clearance|139900000|111149989|880d94e0-447e-413a-a558-cee4b897ff70|6e71b84d-ba93-46db-b655-09de6e7c8c28",
|
||||
"clearance|145650011|107550000|9762c9ed-64d8-4f3e-baf6-f6ba6effc919|c264c438-a475-4ad4-9915-0f1e6ecf3053",
|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
],
|
||||
"meta": {
|
||||
"filename": "board_design_settings.json",
|
||||
"version": 2
|
||||
},
|
||||
"rule_severities": {
|
||||
"annular_width": "error",
|
||||
"clearance": "error",
|
||||
"copper_edge_clearance": "error",
|
||||
"courtyards_overlap": "error",
|
||||
"diff_pair_gap_out_of_range": "error",
|
||||
"diff_pair_uncoupled_length_too_long": "error",
|
||||
"drill_out_of_range": "error",
|
||||
"duplicate_footprints": "warning",
|
||||
"extra_footprint": "warning",
|
||||
"footprint_type_mismatch": "error",
|
||||
"hole_clearance": "error",
|
||||
"hole_near_hole": "error",
|
||||
"invalid_outline": "error",
|
||||
"item_on_disabled_layer": "error",
|
||||
"items_not_allowed": "error",
|
||||
"length_out_of_range": "error",
|
||||
"malformed_courtyard": "error",
|
||||
"microvia_drill_out_of_range": "error",
|
||||
"missing_courtyard": "ignore",
|
||||
"missing_footprint": "warning",
|
||||
"net_conflict": "warning",
|
||||
"npth_inside_courtyard": "ignore",
|
||||
"padstack": "error",
|
||||
"pth_inside_courtyard": "ignore",
|
||||
"shorting_items": "error",
|
||||
"silk_over_copper": "ignore",
|
||||
"silk_overlap": "warning",
|
||||
"skew_out_of_range": "error",
|
||||
"through_hole_pad_without_hole": "error",
|
||||
"too_many_vias": "error",
|
||||
"track_dangling": "warning",
|
||||
"track_width": "error",
|
||||
"tracks_crossing": "error",
|
||||
"unconnected_items": "error",
|
||||
"unresolved_variable": "error",
|
||||
"via_dangling": "warning",
|
||||
"zone_has_empty_net": "error",
|
||||
"zones_intersect": "error"
|
||||
},
|
||||
"rule_severitieslegacy_courtyards_overlap": true,
|
||||
"rule_severitieslegacy_no_courtyard_defined": false,
|
||||
"rules": {
|
||||
"allow_blind_buried_vias": false,
|
||||
"allow_microvias": false,
|
||||
"max_error": 0.005,
|
||||
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|
||||
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|
||||
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|
||||
"min_hole_to_hole": 0.5,
|
||||
"min_microvia_diameter": 0.19999999999999998,
|
||||
"min_microvia_drill": 0.09999999999999999,
|
||||
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|
||||
"min_through_hole_diameter": 0.19999999999999998,
|
||||
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|
||||
"min_via_annular_width": 0.13,
|
||||
"min_via_diameter": 0.39999999999999997,
|
||||
"use_height_for_length_calcs": true
|
||||
},
|
||||
"track_widths": [
|
||||
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|
||||
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|
||||
],
|
||||
"via_dimensions": [
|
||||
{
|
||||
"diameter": 0.0,
|
||||
"drill": 0.0
|
||||
},
|
||||
{
|
||||
"diameter": 0.66,
|
||||
"drill": 0.3
|
||||
}
|
||||
],
|
||||
"zones_allow_external_fillets": false,
|
||||
"zones_use_no_outline": true
|
||||
},
|
||||
"layer_presets": []
|
||||
},
|
||||
"boards": [],
|
||||
"cvpcb": {
|
||||
"equivalence_files": []
|
||||
},
|
||||
"erc": {
|
||||
"erc_exclusions": [],
|
||||
"meta": {
|
||||
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|
||||
},
|
||||
"pin_map": [
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|
||||
0,
|
||||
0,
|
||||
2
|
||||
],
|
||||
[
|
||||
2,
|
||||
2,
|
||||
2,
|
||||
2,
|
||||
2,
|
||||
2,
|
||||
2,
|
||||
2,
|
||||
2,
|
||||
2,
|
||||
2,
|
||||
2
|
||||
]
|
||||
],
|
||||
"rule_severities": {
|
||||
"bus_definition_conflict": "error",
|
||||
"bus_entry_needed": "error",
|
||||
"bus_label_syntax": "error",
|
||||
"bus_to_bus_conflict": "error",
|
||||
"bus_to_net_conflict": "error",
|
||||
"different_unit_footprint": "error",
|
||||
"different_unit_net": "error",
|
||||
"duplicate_reference": "error",
|
||||
"duplicate_sheet_names": "error",
|
||||
"extra_units": "error",
|
||||
"global_label_dangling": "warning",
|
||||
"hier_label_mismatch": "error",
|
||||
"label_dangling": "error",
|
||||
"lib_symbol_issues": "warning",
|
||||
"multiple_net_names": "warning",
|
||||
"net_not_bus_member": "warning",
|
||||
"no_connect_connected": "warning",
|
||||
"no_connect_dangling": "warning",
|
||||
"pin_not_connected": "error",
|
||||
"pin_not_driven": "error",
|
||||
"pin_to_pin": "warning",
|
||||
"power_pin_not_driven": "error",
|
||||
"similar_labels": "warning",
|
||||
"unannotated": "error",
|
||||
"unit_value_mismatch": "error",
|
||||
"unresolved_variable": "error",
|
||||
"wire_dangling": "error"
|
||||
}
|
||||
},
|
||||
"libraries": {
|
||||
"pinned_footprint_libs": [],
|
||||
"pinned_symbol_libs": []
|
||||
},
|
||||
"meta": {
|
||||
"filename": "digirig-mobile.kicad_pro",
|
||||
"version": 1
|
||||
},
|
||||
"net_settings": {
|
||||
"classes": [
|
||||
{
|
||||
"bus_width": 12.0,
|
||||
"clearance": 0.127,
|
||||
"diff_pair_gap": 0.25,
|
||||
"diff_pair_via_gap": 0.25,
|
||||
"diff_pair_width": 0.2,
|
||||
"line_style": 0,
|
||||
"microvia_diameter": 0.66,
|
||||
"microvia_drill": 0.3,
|
||||
"name": "Default",
|
||||
"pcb_color": "rgba(0, 0, 0, 0.000)",
|
||||
"schematic_color": "rgba(0, 0, 0, 0.000)",
|
||||
"track_width": 0.127,
|
||||
"via_diameter": 0.66,
|
||||
"via_drill": 0.3,
|
||||
"wire_width": 6.0
|
||||
},
|
||||
{
|
||||
"bus_width": 12.0,
|
||||
"clearance": 0.127,
|
||||
"diff_pair_gap": 0.25,
|
||||
"diff_pair_via_gap": 0.25,
|
||||
"diff_pair_width": 0.2,
|
||||
"line_style": 0,
|
||||
"microvia_diameter": 0.66,
|
||||
"microvia_drill": 0.3,
|
||||
"name": "Power",
|
||||
"nets": [
|
||||
"+3V3",
|
||||
"+5V",
|
||||
"GND"
|
||||
],
|
||||
"pcb_color": "rgba(0, 0, 0, 0.000)",
|
||||
"schematic_color": "rgba(0, 0, 0, 0.000)",
|
||||
"track_width": 0.25,
|
||||
"via_diameter": 0.66,
|
||||
"via_drill": 0.3,
|
||||
"wire_width": 6.0
|
||||
}
|
||||
],
|
||||
"meta": {
|
||||
"version": 2
|
||||
},
|
||||
"net_colors": null
|
||||
},
|
||||
"pcbnew": {
|
||||
"last_paths": {
|
||||
"gencad": "",
|
||||
"idf": "",
|
||||
"netlist": "",
|
||||
"specctra_dsn": "",
|
||||
"step": "",
|
||||
"vrml": ""
|
||||
},
|
||||
"page_layout_descr_file": ""
|
||||
},
|
||||
"schematic": {
|
||||
"annotate_start_num": 0,
|
||||
"drawing": {
|
||||
"default_line_thickness": 6.0,
|
||||
"default_text_size": 50.0,
|
||||
"field_names": [],
|
||||
"intersheets_ref_own_page": false,
|
||||
"intersheets_ref_prefix": "",
|
||||
"intersheets_ref_short": false,
|
||||
"intersheets_ref_show": false,
|
||||
"intersheets_ref_suffix": "",
|
||||
"junction_size_choice": 3,
|
||||
"label_size_ratio": 0.25,
|
||||
"pin_symbol_size": 25.0,
|
||||
"text_offset_ratio": 0.08
|
||||
},
|
||||
"legacy_lib_dir": "",
|
||||
"legacy_lib_list": [],
|
||||
"meta": {
|
||||
"version": 1
|
||||
},
|
||||
"net_format_name": "",
|
||||
"ngspice": {
|
||||
"fix_include_paths": true,
|
||||
"fix_passive_vals": false,
|
||||
"meta": {
|
||||
"version": 0
|
||||
},
|
||||
"model_mode": 0,
|
||||
"workbook_filename": ""
|
||||
},
|
||||
"page_layout_descr_file": "",
|
||||
"plot_directory": "../../local/docs/",
|
||||
"spice_adjust_passive_values": false,
|
||||
"spice_external_command": "spice \"%I\"",
|
||||
"subpart_first_id": 65,
|
||||
"subpart_id_separator": 0
|
||||
},
|
||||
"sheets": [
|
||||
[
|
||||
"7f52d787-caa3-4a92-b1b2-19d554dc29a4",
|
||||
""
|
||||
]
|
||||
],
|
||||
"text_variables": {}
|
||||
}
|
Plik diff jest za duży
Load Diff
Plik diff jest za duży
Load Diff
|
@ -0,0 +1,3 @@
|
|||
(fp_lib_table
|
||||
(lib (name "footprints")(type "KiCad")(uri "C:/Users/denis/Dropbox/Projects/digirig.net/electric/footprints.pretty")(options "")(descr ""))
|
||||
)
|
|
@ -0,0 +1,3 @@
|
|||
(sym_lib_table
|
||||
(lib (name "digirig")(type "KiCad")(uri "${KIPRJMOD}/../symbols/digirig.kicad_sym")(options "")(descr ""))
|
||||
)
|
Ładowanie…
Reference in New Issue