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Smaller PCB size to better fit enclosure

Rev-1.6
Denis G 2021-09-24 21:56:14 -06:00
rodzic c2a2430157
commit 38f88a1a20
3 zmienionych plików z 84625 dodań i 1431 usunięć
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2843
electric/digirig-mobile.kicad_pcb
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Plik diff jest za duży Load Diff

14
electric/footprints.pretty/TRRS-PJ-320A.kicad_mod
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@ -1,17 +1,17 @@
(module TRRS-PJ-320A (layer F.Cu) (tedit 61005A5C)
(module TRRS-PJ-320A (layer F.Cu) (tedit 614E9BAD)
(fp_text reference REF** (at 0 14.2) (layer Dwgs.User)
(effects (font (size 1 1) (thickness 0.15)))
)
(fp_text value TRRS-PJ-320A (at 0 -5.6) (layer F.Fab)
(effects (font (size 1 1) (thickness 0.15)))
)
(fp_line (start 2.8 -2) (end -2.8 -2) (layer F.SilkS) (width 0.15))
(fp_line (start -2.8 0) (end -2.8 -2) (layer F.SilkS) (width 0.15))
(fp_line (start 2.8 0) (end 2.8 -2) (layer F.SilkS) (width 0.15))
(fp_line (start -3.05 0) (end -3.05 12.1) (layer F.SilkS) (width 0.15))
(fp_line (start 3.05 0) (end 3.05 12.1) (layer F.SilkS) (width 0.15))
(fp_line (start 3.05 12.1) (end -3.05 12.1) (layer F.SilkS) (width 0.15))
(fp_line (start 3.05 0) (end -3.05 0) (layer F.SilkS) (width 0.15))
(fp_line (start 3.05 12.1) (end -3.05 12.1) (layer F.SilkS) (width 0.15))
(fp_line (start 3.05 0) (end 3.05 12.1) (layer F.SilkS) (width 0.15))
(fp_line (start -3.05 0) (end -3.05 12.1) (layer F.SilkS) (width 0.15))
(fp_line (start 2.8 0) (end 2.8 -2) (layer F.Fab) (width 0.15))
(fp_line (start -2.8 0) (end -2.8 -2) (layer F.Fab) (width 0.15))
(fp_line (start 2.8 -2) (end -2.8 -2) (layer F.Fab) (width 0.15))
(fp_text user Ring2 (at 0 3.25) (layer F.Fab)
(effects (font (size 0.7 0.7) (thickness 0.1)))
)

83199
electric/fp-info-cache
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Plik diff jest za duży Load Diff