kopia lustrzana https://github.com/cariboulabs/cariboulite
14509 wiersze
620 KiB
Plaintext
14509 wiersze
620 KiB
Plaintext
.comment from next-pnr
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.sym 1 smi_ctrl_ins.tx_reg_state_SB_LUT4_I3_O_$glb_sr
|
|
.sym 2 w_lvds_tx_d1_SB_DFF_Q_D_SB_LUT4_O_1_I0_SB_LUT4_O_I0_SB_LUT4_I1_O_$glb_ce
|
|
.sym 3 r_counter_$glb_clk
|
|
.sym 4 o_iq_tx_clk_p$SB_IO_OUT_$glb_clk
|
|
.sym 5 o_led0$SB_IO_OUT_$glb_sr
|
|
.sym 6 smi_ctrl_ins.soe_and_reset_$glb_clk
|
|
.sym 7 i_rst_b_SB_LUT4_I3_O_$glb_sr
|
|
.sym 8 smi_ctrl_ins.swe_and_reset_$glb_clk
|
|
.sym 40 w_lvds_rx_09_d1_SB_LUT4_I0_O_SB_LUT4_O_I0[1]
|
|
.sym 41 w_lvds_rx_09_d1_SB_LUT4_I0_O_SB_LUT4_O_I0[2]
|
|
.sym 42 lvds_rx_09_inst.r_phase_count_SB_LUT4_O_I3[0]
|
|
.sym 43 lvds_rx_09_inst.r_state_if_SB_DFFESR_Q_R
|
|
.sym 44 lvds_rx_09_inst.r_phase_count[1]
|
|
.sym 45 w_lvds_rx_09_d1_SB_LUT4_I0_O_SB_LUT4_O_I0[0]
|
|
.sym 47 w_lvds_rx_24_d0_SB_LUT4_I1_O_SB_LUT4_O_I0[0]
|
|
.sym 48 w_rx_09_fifo_data[0]
|
|
.sym 50 w_rx_09_fifo_data[1]
|
|
.sym 53 lvds_rx_09_inst.o_fifo_push_SB_DFFESR_Q_R_SB_LUT4_O_I1[0]
|
|
.sym 54 lvds_rx_09_inst.o_fifo_push_SB_DFFESR_Q_E
|
|
.sym 84 o_led0$SB_IO_OUT
|
|
.sym 101 $PACKER_VCC_NET
|
|
.sym 135 o_led0$SB_IO_OUT
|
|
.sym 145 o_led0$SB_IO_OUT
|
|
.sym 179 lvds_rx_09_inst.r_state_if_SB_DFFESR_Q_D[2]
|
|
.sym 182 lvds_rx_09_inst.o_fifo_push_SB_DFFESR_Q_R
|
|
.sym 211 w_lvds_rx_24_d0_SB_LUT4_I1_O_SB_LUT4_O_I0[1]
|
|
.sym 291 w_lvds_rx_09_d1_SB_LUT4_I0_O[2]
|
|
.sym 294 lvds_rx_09_inst.r_state_if_SB_DFFESR_Q_E
|
|
.sym 297 w_lvds_rx_09_d1_SB_LUT4_I0_O[0]
|
|
.sym 317 rx_fifo.wr_addr[4]
|
|
.sym 341 w_lvds_rx_09_d0
|
|
.sym 348 w_lvds_rx_09_d1
|
|
.sym 369 w_rx_24_fifo_data[0]
|
|
.sym 370 lvds_rx_09_inst.o_fifo_push_SB_DFFESR_Q_D
|
|
.sym 371 w_lvds_rx_09_d0
|
|
.sym 372 w_lvds_rx_09_d1
|
|
.sym 405 smi_ctrl_ins.r_fifo_pushed_data[19]
|
|
.sym 408 o_iq_tx_clk_n$SB_IO_OUT
|
|
.sym 410 smi_ctrl_ins.r_fifo_pushed_data[24]
|
|
.sym 464 lvds_rx_24_inst.o_fifo_push_SB_DFFESR_Q_E
|
|
.sym 480 w_rx_24_fifo_data[1]
|
|
.sym 485 o_iq_tx_clk_p$SB_IO_OUT
|
|
.sym 492 o_iq_tx_clk_n$SB_IO_OUT
|
|
.sym 497 o_iq_tx_clk_p$SB_IO_OUT
|
|
.sym 514 o_iq_tx_clk_n$SB_IO_OUT
|
|
.sym 515 o_iq_tx_clk_p$SB_IO_OUT
|
|
.sym 519 w_lvds_rx_09_d1_SB_LUT4_I0_O[3]
|
|
.sym 520 smi_ctrl_ins.r_fifo_pushed_data[25]
|
|
.sym 521 smi_ctrl_ins.r_fifo_pushed_data[31]
|
|
.sym 526 smi_ctrl_ins.r_fifo_pushed_data[26]
|
|
.sym 530 i_rst_b$SB_IO_IN
|
|
.sym 535 w_smi_data_input[6]
|
|
.sym 548 w_smi_data_input[4]
|
|
.sym 550 smi_ctrl_ins.r_fifo_pushed_data_SB_DFFNESR_Q_21_E
|
|
.sym 554 rx_fifo.rd_addr[7]
|
|
.sym 601 o_led0$SB_IO_OUT
|
|
.sym 633 w_tx_fifo_data[25]
|
|
.sym 637 w_tx_fifo_data[26]
|
|
.sym 653 w_lvds_rx_24_d0_SB_LUT4_I1_O[0]
|
|
.sym 661 rx_fifo.rd_addr[9]
|
|
.sym 746 i_rst_b_SB_LUT4_I3_O
|
|
.sym 748 w_tx_fifo_data[24]
|
|
.sym 749 smi_ctrl_ins.r_fifo_pushed_data_SB_DFFNESR_Q_E_SB_LUT4_I2_O
|
|
.sym 752 w_tx_fifo_data[10]
|
|
.sym 753 w_tx_fifo_data[1]
|
|
.sym 792 w_tx_fifo_data[25]
|
|
.sym 796 w_lvds_rx_09_d0
|
|
.sym 803 w_lvds_rx_09_d1
|
|
.sym 824 w_tx_fifo_data[16]
|
|
.sym 826 w_lvds_rx_09_d0
|
|
.sym 827 w_lvds_rx_09_d1
|
|
.sym 830 i_rst_b_SB_LUT4_I3_O
|
|
.sym 852 i_rst_b_SB_LUT4_I3_O
|
|
.sym 860 lvds_tx_inst.r_fifo_data[27]
|
|
.sym 861 iq_tx_p_D_OUT_1
|
|
.sym 862 lvds_tx_inst.r_fifo_data[12]
|
|
.sym 863 lvds_tx_inst.r_fifo_data[23]
|
|
.sym 864 w_lvds_tx_d1_SB_DFF_Q_D_SB_LUT4_O_1_I0_SB_LUT4_O_I2_SB_LUT4_O_1_I2[2]
|
|
.sym 865 lvds_tx_inst.r_fifo_data[21]
|
|
.sym 866 w_lvds_tx_d1_SB_DFF_Q_D_SB_LUT4_O_1_I0_SB_LUT4_O_I2_SB_LUT4_O_I2[3]
|
|
.sym 867 lvds_tx_inst.r_fifo_data[14]
|
|
.sym 887 w_tx_fifo_data[1]
|
|
.sym 893 w_tx_fifo_data[10]
|
|
.sym 901 $PACKER_VCC_NET
|
|
.sym 903 $PACKER_VCC_NET
|
|
.sym 904 w_tx_fifo_data[17]
|
|
.sym 910 o_iq_tx_clk_p$SB_IO_OUT
|
|
.sym 937 tx_fifo.empty_o_SB_LUT4_I3_O_SB_LUT4_O_I0[1]
|
|
.sym 940 o_iq_tx_clk_p$SB_IO_OUT
|
|
.sym 944 o_iq_tx_clk_p$SB_IO_OUT
|
|
.sym 970 o_iq_tx_clk_p$SB_IO_OUT
|
|
.sym 974 iq_tx_p_D_OUT_0
|
|
.sym 975 lvds_tx_inst.o_fifo_pull_SB_DFFSR_Q_R_SB_LUT4_O_I1[2]
|
|
.sym 976 lvds_tx_inst.r_phase_count_SB_CARRY_CI_CO_SB_LUT4_I3_O_SB_DFF_D_Q[0]
|
|
.sym 977 w_lvds_tx_d1_SB_DFF_Q_D_SB_LUT4_O_1_I0_SB_LUT4_O_I2[2]
|
|
.sym 978 lvds_tx_inst.r_fifo_data[4]
|
|
.sym 979 $PACKER_VCC_NET
|
|
.sym 981 w_lvds_tx_d1_SB_DFF_Q_D_SB_LUT4_O_1_I0_SB_LUT4_O_1_I2[1]
|
|
.sym 989 w_smi_data_input[2]
|
|
.sym 990 w_smi_data_input[6]
|
|
.sym 1009 w_tx_fifo_pulled_data[12]
|
|
.sym 1016 w_tx_fifo_pulled_data[14]
|
|
.sym 1024 i_rst_b$SB_IO_IN
|
|
.sym 1051 w_lvds_rx_24_d1
|
|
.sym 1054 i_rst_b$SB_IO_IN
|
|
.sym 1055 w_lvds_rx_24_d1
|
|
.sym 1056 o_led0$SB_IO_OUT
|
|
.sym 1061 w_lvds_tx_d1
|
|
.sym 1062 w_lvds_tx_d0
|
|
.sym 1066 iq_tx_p_D_OUT_0
|
|
.sym 1067 iq_tx_p_D_OUT_1
|
|
.sym 1069 $PACKER_VCC_NET
|
|
.sym 1071 o_iq_tx_clk_p$SB_IO_OUT_$glb_clk
|
|
.sym 1074 $PACKER_VCC_NET
|
|
.sym 1076 w_lvds_tx_d1
|
|
.sym 1080 iq_tx_p_D_OUT_0
|
|
.sym 1081 iq_tx_p_D_OUT_1
|
|
.sym 1086 w_lvds_tx_d0
|
|
.sym 1088 w_lvds_tx_d1_SB_DFF_Q_D_SB_LUT4_O_I1_SB_LUT4_O_1_I0[2]
|
|
.sym 1089 lvds_tx_inst.r_fifo_data[7]
|
|
.sym 1090 w_lvds_tx_d1_SB_DFF_Q_D_SB_LUT4_O_I1[2]
|
|
.sym 1091 w_lvds_tx_d1_SB_DFF_Q_D_SB_LUT4_O_I1_SB_LUT4_O_1_I0[0]
|
|
.sym 1093 lvds_tx_inst.r_fifo_data[6]
|
|
.sym 1094 w_lvds_tx_d1_SB_DFF_Q_D_SB_LUT4_O_1_I0_SB_LUT4_O_I2_SB_LUT4_O_1_I2[0]
|
|
.sym 1116 tx_fifo.wr_addr_gray_rd[5]
|
|
.sym 1121 lvds_tx_inst.r_fifo_data[5]
|
|
.sym 1124 w_lvds_tx_d1
|
|
.sym 1126 w_lvds_tx_d0
|
|
.sym 1130 w_tx_fifo_pulled_data[4]
|
|
.sym 1157 $PACKER_VCC_NET
|
|
.sym 1173 w_lvds_rx_09_d0
|
|
.sym 1174 w_lvds_rx_09_d1
|
|
.sym 1183 $PACKER_VCC_NET
|
|
.sym 1184 o_iq_tx_clk_p$SB_IO_OUT_$glb_clk
|
|
.sym 1191 $PACKER_VCC_NET
|
|
.sym 1202 tx_fifo.empty_o_SB_LUT4_I3_O_SB_LUT4_O_I0[3]
|
|
.sym 1203 tx_fifo.empty_o_SB_DFF_Q_D_SB_LUT4_O_I1_SB_LUT4_O_I0[0]
|
|
.sym 1204 tx_fifo.empty_o_SB_DFF_Q_D_SB_LUT4_O_I1_SB_LUT4_O_1_I3[1]
|
|
.sym 1205 tx_fifo.rd_addr_gray[5]
|
|
.sym 1206 tx_fifo.empty_o_SB_DFF_Q_D_SB_LUT4_O_I1_SB_LUT4_O_1_I3_SB_LUT4_O_I3[1]
|
|
.sym 1207 tx_fifo.rd_addr_gray[7]
|
|
.sym 1208 tx_fifo.empty_o_SB_LUT4_I3_O_SB_LUT4_O_I0[1]
|
|
.sym 1209 tx_fifo.empty_o_SB_DFF_Q_D_SB_LUT4_O_I1_SB_LUT4_O_1_I3[2]
|
|
.sym 1257 w_tx_fifo_pulled_data[6]
|
|
.sym 1278 w_tx_fifo_pulled_data[19]
|
|
.sym 1280 w_lvds_tx_d1_SB_DFF_Q_D_SB_LUT4_O_I1_SB_LUT4_O_1_I0[1]
|
|
.sym 1287 o_iq_tx_clk_p$SB_IO_OUT
|
|
.sym 1297 $PACKER_VCC_NET
|
|
.sym 1310 $PACKER_VCC_NET
|
|
.sym 1317 tx_fifo.rd_addr_gray_SB_LUT4_I2_O[1]
|
|
.sym 1318 tx_fifo.rd_addr_gray_SB_LUT4_I2_O[2]
|
|
.sym 1319 tx_fifo.rd_addr_gray_SB_LUT4_I2_O[3]
|
|
.sym 1320 tx_fifo.empty_o_SB_DFF_Q_D_SB_LUT4_O_I1_SB_LUT4_O_I0_SB_LUT4_O_2_I3[1]
|
|
.sym 1321 tx_fifo.empty_o_SB_DFF_Q_D_SB_LUT4_O_I1_SB_LUT4_O_I0_SB_LUT4_O_2_I3[2]
|
|
.sym 1322 tx_fifo.rd_addr_gray_SB_LUT4_I2_O[6]
|
|
.sym 1323 tx_fifo.rd_addr_gray_SB_LUT4_I2_O[7]
|
|
.sym 1341 tx_fifo.empty_o_SB_LUT4_I3_O_SB_LUT4_O_I0[1]
|
|
.sym 1343 tx_fifo.empty_o_SB_DFF_Q_D_SB_LUT4_O_I1_SB_LUT4_O_1_I3[2]
|
|
.sym 1349 tx_fifo.empty_o_SB_LUT4_I3_O_SB_LUT4_O_I0[1]
|
|
.sym 1351 tx_fifo.rd_addr_gray[5]
|
|
.sym 1357 tx_fifo.empty_o_SB_LUT4_I3_O_SB_LUT4_O_I0[1]
|
|
.sym 1358 $PACKER_VCC_NET
|
|
.sym 1362 tx_fifo.empty_o_SB_LUT4_I3_O_SB_LUT4_O_I0[3]
|
|
.sym 1363 w_tx_fifo_pull
|
|
.sym 1371 tx_fifo.empty_o_SB_DFF_Q_D_SB_LUT4_O_I1_SB_LUT4_O_1_I3[2]
|
|
.sym 1377 tx_fifo.empty_o_SB_DFF_Q_D_SB_LUT4_O_I1_SB_LUT4_O_1_I3[2]
|
|
.sym 1395 tx_fifo.empty_o_SB_DFF_Q_D_SB_LUT4_O_I1_SB_LUT4_O_1_I3[1]
|
|
.sym 1401 w_lvds_rx_24_d0
|
|
.sym 1402 w_lvds_rx_24_d1
|
|
.sym 1411 $PACKER_VCC_NET
|
|
.sym 1412 o_iq_tx_clk_p$SB_IO_OUT_$glb_clk
|
|
.sym 1419 $PACKER_VCC_NET
|
|
.sym 1430 tx_fifo.rd_addr_gray_SB_LUT4_I2_O[8]
|
|
.sym 1431 tx_fifo.rd_addr_gray_SB_LUT4_I2_O[9]
|
|
.sym 1432 w_lvds_tx_d1_SB_DFF_Q_D_SB_LUT4_O_1_I0_SB_LUT4_O_I2_SB_LUT4_O_I2[0]
|
|
.sym 1433 tx_fifo.empty_o_SB_DFF_Q_D_SB_LUT4_O_I1_SB_LUT4_O_I0_SB_LUT4_O_I0[0]
|
|
.sym 1434 tx_fifo.empty_o_SB_DFF_Q_D_SB_LUT4_O_I1_SB_LUT4_O_I0_SB_LUT4_O_I0[2]
|
|
.sym 1435 w_lvds_tx_d1_SB_DFF_Q_D_SB_LUT4_O_1_I0_SB_LUT4_O_1_I2[0]
|
|
.sym 1436 lvds_tx_inst.r_fifo_data[29]
|
|
.sym 1446 w_smi_data_input[6]
|
|
.sym 1462 w_lvds_rx_24_d0
|
|
.sym 1464 w_lvds_rx_24_d1
|
|
.sym 1493 $PACKER_VCC_NET
|
|
.sym 1510 i_rst_b$SB_IO_IN
|
|
.sym 1512 o_led0$SB_IO_OUT
|
|
.sym 1544 tx_fifo.empty_o_SB_DFF_Q_D_SB_LUT4_O_I1_SB_LUT4_O_I0[3]
|
|
.sym 1545 tx_fifo.empty_o_SB_DFF_Q_D_SB_LUT4_O_I1_SB_LUT4_O_I0_SB_LUT4_O_I0[3]
|
|
.sym 1546 tx_fifo.empty_o_SB_DFF_Q_D_SB_LUT4_O_I1_SB_LUT4_O_1_I3_SB_LUT4_O_I3[2]
|
|
.sym 1548 tx_fifo.rd_addr_gray[6]
|
|
.sym 1549 tx_fifo.rd_addr_gray[1]
|
|
.sym 1550 tx_fifo.rd_addr[9]
|
|
.sym 1551 lvds_tx_inst.r_phase_count_SB_CARRY_CI_CO_SB_LUT4_I3_O_SB_DFF_D_Q[2]
|
|
.sym 1590 w_tx_fifo_pulled_data[11]
|
|
.sym 1610 w_tx_fifo_pulled_data[25]
|
|
.sym 1659 lvds_tx_inst.r_phase_count_SB_LUT4_I1_1_O_SB_DFF_D_Q[2]
|
|
.sym 1660 w_lvds_tx_d1_SB_DFF_Q_D_SB_LUT4_O_1_I0_SB_LUT4_O_I0[2]
|
|
.sym 1661 w_lvds_tx_d1_SB_DFF_Q_D_SB_LUT4_O_1_I0[3]
|
|
.sym 1662 lvds_tx_inst.r_phase_count[2]
|
|
.sym 1663 lvds_tx_inst.r_phase_count[3]
|
|
.sym 1664 lvds_tx_inst.r_phase_count_SB_DFF_D_Q[0]
|
|
.sym 1683 tx_fifo.rd_addr[9]
|
|
.sym 1691 tx_fifo.rd_addr[9]
|
|
.sym 1699 tx_fifo.rd_addr[9]
|
|
.sym 1706 w_tx_fifo_pull
|
|
.sym 1797 lvds_tx_inst.r_phase_count_SB_DFF_D_Q[0]
|
|
.sym 1799 w_lvds_tx_d1_SB_DFF_Q_D_SB_LUT4_O_1_I0[3]
|
|
.sym 1808 tx_fifo.full_o_SB_DFF_Q_D_SB_LUT4_O_I0_SB_LUT4_O_I0_SB_LUT4_O_1_I3[0]
|
|
.sym 1898 lvds_tx_inst.r_phase_count_SB_DFF_D_Q[0]
|
|
.sym 1902 w_tx_fifo_pulled_data[23]
|
|
.sym 1912 $PACKER_VCC_NET
|
|
.sym 1921 w_lvds_rx_09_d1_SB_LUT4_I0_O[3]
|
|
.sym 1928 $PACKER_VCC_NET
|
|
.sym 1935 lvds_rx_09_inst.o_fifo_push_SB_DFFESR_Q_E
|
|
.sym 1946 w_lvds_rx_09_d1_SB_LUT4_I0_O[2]
|
|
.sym 1950 lvds_rx_09_inst.r_state_if_SB_DFFESR_Q_R
|
|
.sym 1973 $PACKER_VCC_NET
|
|
.sym 1974 lvds_rx_09_inst.r_phase_count[1]
|
|
.sym 1975 w_lvds_rx_09_d1_SB_LUT4_I0_O[0]
|
|
.sym 1978 w_lvds_rx_09_d1_SB_LUT4_I0_O_SB_LUT4_O_I0[1]
|
|
.sym 1979 w_lvds_rx_09_d1_SB_LUT4_I0_O_SB_LUT4_O_I0[2]
|
|
.sym 1980 lvds_rx_09_inst.r_phase_count_SB_LUT4_O_I3[0]
|
|
.sym 1985 $PACKER_VCC_NET
|
|
.sym 1989 lvds_rx_09_inst.r_state_if_SB_DFFESR_Q_R
|
|
.sym 1991 w_lvds_rx_09_d1_SB_LUT4_I0_O_SB_LUT4_O_I0[0]
|
|
.sym 1996 lvds_rx_09_inst.o_fifo_push_SB_DFFESR_Q_E
|
|
.sym 1999 w_lvds_rx_09_d1_SB_LUT4_I0_O_SB_LUT4_O_I0[0]
|
|
.sym 2001 $nextpnr_ICESTORM_LC_7$O
|
|
.sym 2003 w_lvds_rx_09_d1_SB_LUT4_I0_O_SB_LUT4_O_I0[0]
|
|
.sym 2007 lvds_rx_09_inst.r_phase_count_SB_CARRY_CI_CO[2]
|
|
.sym 2009 $PACKER_VCC_NET
|
|
.sym 2010 lvds_rx_09_inst.r_phase_count[1]
|
|
.sym 2011 w_lvds_rx_09_d1_SB_LUT4_I0_O_SB_LUT4_O_I0[0]
|
|
.sym 2014 $PACKER_VCC_NET
|
|
.sym 2015 w_lvds_rx_09_d1_SB_LUT4_I0_O_SB_LUT4_O_I0[2]
|
|
.sym 2017 lvds_rx_09_inst.r_phase_count_SB_CARRY_CI_CO[2]
|
|
.sym 2022 w_lvds_rx_09_d1_SB_LUT4_I0_O_SB_LUT4_O_I0[0]
|
|
.sym 2028 w_lvds_rx_09_d1_SB_LUT4_I0_O[0]
|
|
.sym 2035 w_lvds_rx_09_d1_SB_LUT4_I0_O_SB_LUT4_O_I0[1]
|
|
.sym 2040 lvds_rx_09_inst.r_phase_count_SB_LUT4_O_I3[0]
|
|
.sym 2048 lvds_rx_09_inst.o_fifo_push_SB_DFFESR_Q_E
|
|
.sym 2049 o_iq_tx_clk_p$SB_IO_OUT_$glb_clk
|
|
.sym 2050 lvds_rx_09_inst.r_state_if_SB_DFFESR_Q_R
|
|
.sym 2064 w_lvds_rx_24_d0_SB_LUT4_I1_O_SB_LUT4_O_I0[1]
|
|
.sym 2065 w_lvds_rx_24_d0_SB_LUT4_I1_O_SB_LUT4_O_I0[2]
|
|
.sym 2066 lvds_rx_24_inst.o_fifo_push_SB_DFFESR_Q_R_SB_LUT4_O_I1[0]
|
|
.sym 2068 lvds_rx_24_inst.r_phase_count_SB_LUT4_O_I3[0]
|
|
.sym 2069 w_lvds_rx_09_d1_SB_LUT4_I0_O[1]
|
|
.sym 2070 lvds_rx_24_inst.r_phase_count[1]
|
|
.sym 2080 w_rx_fifo_push
|
|
.sym 2083 w_lvds_rx_09_d1_SB_LUT4_I0_O[0]
|
|
.sym 2091 w_lvds_rx_24_d0_SB_LUT4_I1_O_SB_LUT4_O_I0[0]
|
|
.sym 2092 w_smi_data_input[1]
|
|
.sym 2105 w_smi_data_input[6]
|
|
.sym 2106 lvds_rx_09_inst.o_fifo_push_SB_DFFESR_Q_E
|
|
.sym 2108 w_lvds_rx_09_d0
|
|
.sym 2112 w_lvds_rx_09_d1
|
|
.sym 2117 w_lvds_rx_09_d1_SB_LUT4_I0_O[2]
|
|
.sym 2118 smi_ctrl_ins.r_fifo_pushed_data[22]
|
|
.sym 2119 lvds_rx_24_inst.o_fifo_push_SB_DFFESR_Q_E
|
|
.sym 2135 w_lvds_rx_09_d1_SB_LUT4_I0_O[0]
|
|
.sym 2155 lvds_rx_09_inst.r_phase_count_SB_LUT4_O_I3[0]
|
|
.sym 2156 lvds_rx_09_inst.r_state_if_SB_DFFESR_Q_R
|
|
.sym 2161 w_lvds_rx_09_d1_SB_LUT4_I0_O_SB_LUT4_O_I0[1]
|
|
.sym 2162 w_lvds_rx_09_d1_SB_LUT4_I0_O_SB_LUT4_O_I0[2]
|
|
.sym 2163 w_lvds_rx_09_d1_SB_LUT4_I0_O[3]
|
|
.sym 2168 w_lvds_rx_09_d1_SB_LUT4_I0_O[2]
|
|
.sym 2177 w_lvds_rx_09_d0
|
|
.sym 2178 w_lvds_rx_09_d1
|
|
.sym 2180 w_lvds_rx_09_d1_SB_LUT4_I0_O[0]
|
|
.sym 2181 lvds_rx_24_inst.r_phase_count_SB_LUT4_O_I3[0]
|
|
.sym 2187 lvds_rx_24_inst.r_phase_count_SB_LUT4_O_I3[0]
|
|
.sym 2191 w_lvds_rx_09_d1
|
|
.sym 2206 w_lvds_rx_09_d0
|
|
.sym 2221 w_lvds_rx_09_d1_SB_LUT4_I0_O_SB_LUT4_O_I0[1]
|
|
.sym 2222 w_lvds_rx_09_d1_SB_LUT4_I0_O_SB_LUT4_O_I0[2]
|
|
.sym 2224 lvds_rx_09_inst.r_phase_count_SB_LUT4_O_I3[0]
|
|
.sym 2229 w_lvds_rx_09_d1_SB_LUT4_I0_O[0]
|
|
.sym 2230 w_lvds_rx_09_d1_SB_LUT4_I0_O[2]
|
|
.sym 2231 w_lvds_rx_09_d1_SB_LUT4_I0_O[3]
|
|
.sym 2232 o_iq_tx_clk_p$SB_IO_OUT_$glb_clk
|
|
.sym 2233 lvds_rx_09_inst.r_state_if_SB_DFFESR_Q_R
|
|
.sym 2236 w_rx_09_fifo_push
|
|
.sym 2240 w_rx_fifo_data[0]
|
|
.sym 2243 lvds_rx_24_inst.r_state_if_SB_DFFESR_Q_R
|
|
.sym 2244 w_tx_fifo_pulled_data[27]
|
|
.sym 2246 lvds_rx_24_inst.r_state_if_SB_DFFESR_Q_R
|
|
.sym 2247 $PACKER_VCC_NET
|
|
.sym 2250 w_rx_09_fifo_data[0]
|
|
.sym 2252 $PACKER_VCC_NET
|
|
.sym 2254 w_rx_09_fifo_data[1]
|
|
.sym 2258 w_lvds_rx_24_d0_SB_LUT4_I1_O_SB_LUT4_O_I0[2]
|
|
.sym 2259 w_lvds_rx_09_d1_SB_LUT4_I0_O[0]
|
|
.sym 2261 w_rx_09_fifo_data[1]
|
|
.sym 2263 w_smi_data_input[7]
|
|
.sym 2266 w_lvds_rx_09_d1_SB_LUT4_I0_O[1]
|
|
.sym 2271 w_lvds_rx_09_d1_SB_LUT4_I0_O[3]
|
|
.sym 2293 lvds_rx_09_inst.o_fifo_push_SB_DFFESR_Q_R_SB_LUT4_O_I1[0]
|
|
.sym 2295 w_lvds_rx_09_d1_SB_LUT4_I0_O[2]
|
|
.sym 2301 w_lvds_rx_09_d1_SB_LUT4_I0_O[0]
|
|
.sym 2305 w_lvds_rx_09_d1
|
|
.sym 2307 w_lvds_rx_09_d0
|
|
.sym 2332 w_lvds_rx_09_d0
|
|
.sym 2333 w_lvds_rx_09_d1_SB_LUT4_I0_O[2]
|
|
.sym 2334 w_lvds_rx_09_d1
|
|
.sym 2335 w_lvds_rx_09_d1_SB_LUT4_I0_O[0]
|
|
.sym 2350 w_lvds_rx_09_d1_SB_LUT4_I0_O[0]
|
|
.sym 2351 lvds_rx_09_inst.o_fifo_push_SB_DFFESR_Q_R_SB_LUT4_O_I1[0]
|
|
.sym 2352 w_lvds_rx_09_d1_SB_LUT4_I0_O[2]
|
|
.sym 2369 smi_ctrl_ins.r_fifo_pushed_data[22]
|
|
.sym 2370 w_rx_fifo_data[1]
|
|
.sym 2371 smi_ctrl_ins.r_fifo_pushed_data[18]
|
|
.sym 2372 smi_ctrl_ins.r_fifo_pushed_data[20]
|
|
.sym 2375 smi_ctrl_ins.r_fifo_pushed_data[23]
|
|
.sym 2376 smi_ctrl_ins.r_fifo_pushed_data[21]
|
|
.sym 2384 rx_fifo.wr_addr[5]
|
|
.sym 2390 w_rx_fifo_data[2]
|
|
.sym 2392 w_rx_09_fifo_push
|
|
.sym 2394 smi_ctrl_ins.r_fifo_pushed_data[12]
|
|
.sym 2397 w_lvds_rx_09_d1_SB_LUT4_I0_O[0]
|
|
.sym 2401 w_lvds_rx_09_d1_SB_LUT4_I0_O[2]
|
|
.sym 2402 w_smi_data_input[1]
|
|
.sym 2432 lvds_rx_09_inst.r_state_if_SB_DFFESR_Q_D[2]
|
|
.sym 2435 lvds_rx_09_inst.r_state_if_SB_DFFESR_Q_R
|
|
.sym 2446 lvds_rx_09_inst.r_state_if_SB_DFFESR_Q_E
|
|
.sym 2449 lvds_rx_09_inst.r_state_if_SB_DFFESR_Q_E
|
|
.sym 2458 lvds_rx_09_inst.r_state_if_SB_DFFESR_Q_D[2]
|
|
.sym 2475 lvds_rx_09_inst.r_state_if_SB_DFFESR_Q_E
|
|
.sym 2492 lvds_rx_09_inst.r_state_if_SB_DFFESR_Q_D[2]
|
|
.sym 2501 lvds_rx_09_inst.r_state_if_SB_DFFESR_Q_E
|
|
.sym 2502 o_iq_tx_clk_p$SB_IO_OUT_$glb_clk
|
|
.sym 2503 lvds_rx_09_inst.r_state_if_SB_DFFESR_Q_R
|
|
.sym 2504 lvds_rx_09_inst.r_state_if_SB_DFFESR_Q_E
|
|
.sym 2505 smi_ctrl_ins.modem_tx_ctrl_SB_DFFNESR_Q_E
|
|
.sym 2506 smi_ctrl_ins.r_fifo_pushed_data_SB_DFFNESR_Q_E[1]
|
|
.sym 2508 smi_ctrl_ins.r_fifo_pushed_data[29]
|
|
.sym 2509 smi_ctrl_ins.r_fifo_pushed_data[27]
|
|
.sym 2510 smi_ctrl_ins.r_fifo_pushed_data[28]
|
|
.sym 2518 w_smi_data_input[2]
|
|
.sym 2519 rx_fifo.empty_o_SB_LUT4_I2_O[0]
|
|
.sym 2520 w_rx_fifo_pulled_data[3]
|
|
.sym 2523 w_smi_data_input[4]
|
|
.sym 2528 w_lvds_rx_09_d0
|
|
.sym 2530 w_smi_data_input[5]
|
|
.sym 2532 w_smi_data_input[0]
|
|
.sym 2533 w_smi_data_input[6]
|
|
.sym 2534 w_lvds_rx_09_d1
|
|
.sym 2535 w_smi_data_input[4]
|
|
.sym 2536 smi_ctrl_ins.r_fifo_pushed_data[19]
|
|
.sym 2537 w_lvds_rx_09_d1_SB_LUT4_I0_O[0]
|
|
.sym 2538 smi_ctrl_ins.r_fifo_pushed_data[21]
|
|
.sym 2559 smi_ctrl_ins.r_fifo_pushed_data_SB_DFFNESR_Q_21_E
|
|
.sym 2560 w_smi_data_input[6]
|
|
.sym 2583 o_iq_tx_clk_p$SB_IO_OUT
|
|
.sym 2586 w_smi_data_input[1]
|
|
.sym 2592 w_smi_data_input[1]
|
|
.sym 2610 o_iq_tx_clk_p$SB_IO_OUT
|
|
.sym 2622 w_smi_data_input[6]
|
|
.sym 2636 smi_ctrl_ins.r_fifo_pushed_data_SB_DFFNESR_Q_21_E
|
|
.sym 2637 smi_ctrl_ins.swe_and_reset_$glb_clk
|
|
.sym 2638 i_rst_b_SB_LUT4_I3_O_$glb_sr
|
|
.sym 2639 smi_ctrl_ins.r_fifo_pushed_data[12]
|
|
.sym 2640 smi_ctrl_ins.r_fifo_pushed_data[17]
|
|
.sym 2641 smi_ctrl_ins.r_fifo_pushed_data[10]
|
|
.sym 2642 smi_ctrl_ins.r_fifo_pushed_data[13]
|
|
.sym 2643 smi_ctrl_ins.r_fifo_pushed_data[9]
|
|
.sym 2644 smi_ctrl_ins.r_fifo_pushed_data[16]
|
|
.sym 2645 smi_ctrl_ins.r_fifo_pushed_data[11]
|
|
.sym 2646 smi_ctrl_ins.r_fifo_pushed_data[14]
|
|
.sym 2649 lvds_tx_inst.r_phase_count_SB_LUT4_I1_1_O_SB_DFF_D_Q[2]
|
|
.sym 2654 rx_fifo.wr_addr[3]
|
|
.sym 2655 rx_fifo.wr_addr[7]
|
|
.sym 2657 w_smi_data_input[2]
|
|
.sym 2659 smi_ctrl_ins.tx_reg_state[0]
|
|
.sym 2662 smi_ctrl_ins.r_fifo_pushed_data_SB_DFFNESR_Q_E[0]
|
|
.sym 2663 smi_ctrl_ins.r_fifo_pushed_data_SB_DFFNESR_Q_E[1]
|
|
.sym 2665 smi_ctrl_ins.r_fifo_pushed_data[22]
|
|
.sym 2669 o_iq_tx_clk_p$SB_IO_OUT
|
|
.sym 2670 smi_ctrl_ins.r_fifo_pushed_data[24]
|
|
.sym 2671 w_tx_fifo_data[21]
|
|
.sym 2673 w_smi_data_input[0]
|
|
.sym 2674 smi_ctrl_ins.r_fifo_pushed_data[17]
|
|
.sym 2683 smi_ctrl_ins.r_fifo_pushed_data_SB_DFFNESR_Q_E[0]
|
|
.sym 2694 smi_ctrl_ins.r_fifo_pushed_data_SB_DFFNESR_Q_E[1]
|
|
.sym 2702 $PACKER_VCC_NET
|
|
.sym 2706 w_smi_data_input[1]
|
|
.sym 2709 w_lvds_rx_09_d1_SB_LUT4_I0_O[2]
|
|
.sym 2712 w_lvds_rx_09_d0
|
|
.sym 2716 w_smi_data_input[0]
|
|
.sym 2718 w_lvds_rx_09_d1
|
|
.sym 2721 w_lvds_rx_09_d1_SB_LUT4_I0_O[0]
|
|
.sym 2725 w_lvds_rx_09_d0
|
|
.sym 2726 w_lvds_rx_09_d1_SB_LUT4_I0_O[2]
|
|
.sym 2727 w_lvds_rx_09_d1_SB_LUT4_I0_O[0]
|
|
.sym 2728 w_lvds_rx_09_d1
|
|
.sym 2731 w_smi_data_input[0]
|
|
.sym 2740 $PACKER_VCC_NET
|
|
.sym 2769 w_smi_data_input[1]
|
|
.sym 2771 smi_ctrl_ins.r_fifo_pushed_data_SB_DFFNESR_Q_E[1]
|
|
.sym 2772 smi_ctrl_ins.swe_and_reset_$glb_clk
|
|
.sym 2773 i_rst_b_SB_LUT4_I3_O_$glb_sr
|
|
.sym 2774 w_tx_fifo_data[16]
|
|
.sym 2775 w_tx_fifo_data[22]
|
|
.sym 2776 w_tx_fifo_data[21]
|
|
.sym 2777 w_tx_fifo_data[19]
|
|
.sym 2778 w_tx_fifo_data[29]
|
|
.sym 2779 w_tx_fifo_data[31]
|
|
.sym 2780 w_tx_fifo_data[13]
|
|
.sym 2781 w_tx_fifo_data[20]
|
|
.sym 2785 w_lvds_tx_d1_SB_DFF_Q_D_SB_LUT4_O_1_I0_SB_LUT4_O_I0[2]
|
|
.sym 2788 $PACKER_VCC_NET
|
|
.sym 2792 $PACKER_VCC_NET
|
|
.sym 2794 w_smi_data_input[1]
|
|
.sym 2798 smi_ctrl_ins.r_fifo_pushed_data[10]
|
|
.sym 2803 w_smi_data_input[7]
|
|
.sym 2804 i_rst_b$SB_IO_IN
|
|
.sym 2805 w_tx_fifo_pulled_data[21]
|
|
.sym 2806 smi_ctrl_ins.r_fifo_pushed_data[11]
|
|
.sym 2808 smi_ctrl_ins.r_fifo_pushed_data[14]
|
|
.sym 2810 w_lvds_tx_d1_SB_DFF_Q_D_SB_LUT4_O_1_I0_SB_LUT4_O_I2_SB_LUT4_O_I2[3]
|
|
.sym 2834 smi_ctrl_ins.r_fifo_pushed_data[26]
|
|
.sym 2836 smi_ctrl_ins.r_fifo_pushed_data[25]
|
|
.sym 2838 smi_ctrl_ins.r_fifo_pushed_data_SB_DFFNESR_Q_E_SB_LUT4_I2_O
|
|
.sym 2862 smi_ctrl_ins.r_fifo_pushed_data[25]
|
|
.sym 2885 smi_ctrl_ins.r_fifo_pushed_data[26]
|
|
.sym 2906 smi_ctrl_ins.r_fifo_pushed_data_SB_DFFNESR_Q_E_SB_LUT4_I2_O
|
|
.sym 2907 smi_ctrl_ins.swe_and_reset_$glb_clk
|
|
.sym 2908 smi_ctrl_ins.tx_reg_state_SB_LUT4_I3_O_$glb_sr
|
|
.sym 2909 w_tx_fifo_data[4]
|
|
.sym 2910 w_tx_fifo_data[5]
|
|
.sym 2911 w_tx_fifo_data[9]
|
|
.sym 2912 w_tx_fifo_data[11]
|
|
.sym 2913 w_tx_fifo_data[8]
|
|
.sym 2914 w_tx_fifo_data[17]
|
|
.sym 2915 w_tx_fifo_data[6]
|
|
.sym 2916 w_tx_fifo_data[14]
|
|
.sym 2917 o_led0$SB_IO_OUT
|
|
.sym 2920 o_led0$SB_IO_OUT
|
|
.sym 2923 tx_fifo.full_o_SB_DFF_Q_D_SB_LUT4_O_I0_SB_LUT4_O_1_I0_SB_LUT4_O_I3[1]
|
|
.sym 2926 w_tx_fifo_data[20]
|
|
.sym 2931 tx_fifo.wr_addr[5]
|
|
.sym 2935 smi_ctrl_ins.r_fifo_pushed_data[12]
|
|
.sym 2938 w_tx_fifo_data[26]
|
|
.sym 2942 w_smi_data_input[1]
|
|
.sym 2966 smi_ctrl_ins.r_fifo_pushed_data_SB_DFFNESR_Q_E[0]
|
|
.sym 2971 smi_ctrl_ins.r_fifo_pushed_data_SB_DFFNESR_Q_E[1]
|
|
.sym 2973 smi_ctrl_ins.r_fifo_pushed_data_SB_DFFNESR_Q_E_SB_LUT4_I2_O
|
|
.sym 2976 smi_ctrl_ins.r_fifo_pushed_data[24]
|
|
.sym 2981 w_smi_data_input[0]
|
|
.sym 2982 smi_ctrl_ins.r_fifo_pushed_data[10]
|
|
.sym 2988 i_rst_b$SB_IO_IN
|
|
.sym 2996 i_rst_b$SB_IO_IN
|
|
.sym 3008 smi_ctrl_ins.r_fifo_pushed_data[24]
|
|
.sym 3014 smi_ctrl_ins.r_fifo_pushed_data_SB_DFFNESR_Q_E[1]
|
|
.sym 3016 smi_ctrl_ins.r_fifo_pushed_data_SB_DFFNESR_Q_E[0]
|
|
.sym 3031 smi_ctrl_ins.r_fifo_pushed_data[10]
|
|
.sym 3039 w_smi_data_input[0]
|
|
.sym 3041 smi_ctrl_ins.r_fifo_pushed_data_SB_DFFNESR_Q_E_SB_LUT4_I2_O
|
|
.sym 3042 smi_ctrl_ins.swe_and_reset_$glb_clk
|
|
.sym 3043 smi_ctrl_ins.tx_reg_state_SB_LUT4_I3_O_$glb_sr
|
|
.sym 3044 w_tx_fifo_data[23]
|
|
.sym 3045 w_tx_fifo_data[3]
|
|
.sym 3046 w_tx_fifo_data[12]
|
|
.sym 3047 w_tx_fifo_data[2]
|
|
.sym 3048 w_tx_fifo_data[28]
|
|
.sym 3049 w_tx_fifo_data[7]
|
|
.sym 3050 w_tx_fifo_data[27]
|
|
.sym 3051 w_tx_fifo_data[18]
|
|
.sym 3058 w_smi_data_input[4]
|
|
.sym 3064 tx_fifo.rd_addr[9]
|
|
.sym 3069 w_tx_fifo_data[24]
|
|
.sym 3071 w_lvds_tx_d1_SB_DFF_Q_D_SB_LUT4_O_1_I0_SB_LUT4_O_1_I2[1]
|
|
.sym 3080 tx_fifo.rd_addr[9]
|
|
.sym 3081 w_lvds_tx_d1_SB_DFF_Q_D_SB_LUT4_O_1_I0_SB_LUT4_O_I0[2]
|
|
.sym 3083 lvds_tx_inst.r_phase_count_SB_LUT4_I1_1_O_SB_DFF_D_Q[2]
|
|
.sym 3087 lvds_tx_inst.r_phase_count_SB_CARRY_CI_CO_SB_LUT4_I3_O_SB_DFF_D_Q[2]
|
|
.sym 3088 w_lvds_tx_d1_SB_DFF_Q_D_SB_LUT4_O_1_I0[3]
|
|
.sym 3100 lvds_tx_inst.r_fifo_data[23]
|
|
.sym 3103 w_tx_fifo_pulled_data[12]
|
|
.sym 3107 lvds_tx_inst.r_phase_count_SB_DFF_D_Q[0]
|
|
.sym 3111 w_tx_fifo_pulled_data[21]
|
|
.sym 3113 lvds_tx_inst.r_fifo_data[27]
|
|
.sym 3116 w_lvds_tx_d1_SB_DFF_Q_D_SB_LUT4_O_1_I0_SB_LUT4_O_I0[2]
|
|
.sym 3119 w_tx_fifo_pulled_data[23]
|
|
.sym 3120 w_tx_fifo_pulled_data[14]
|
|
.sym 3122 lvds_tx_inst.r_phase_count_SB_LUT4_I1_1_O_SB_DFF_D_Q[2]
|
|
.sym 3123 w_tx_fifo_pulled_data[27]
|
|
.sym 3124 w_lvds_tx_d0
|
|
.sym 3126 lvds_tx_inst.r_fifo_data[21]
|
|
.sym 3133 w_tx_fifo_pulled_data[27]
|
|
.sym 3139 w_lvds_tx_d0
|
|
.sym 3144 w_tx_fifo_pulled_data[12]
|
|
.sym 3151 w_tx_fifo_pulled_data[23]
|
|
.sym 3154 lvds_tx_inst.r_phase_count_SB_LUT4_I1_1_O_SB_DFF_D_Q[2]
|
|
.sym 3155 lvds_tx_inst.r_phase_count_SB_DFF_D_Q[0]
|
|
.sym 3156 lvds_tx_inst.r_fifo_data[21]
|
|
.sym 3157 lvds_tx_inst.r_fifo_data[23]
|
|
.sym 3162 w_tx_fifo_pulled_data[21]
|
|
.sym 3166 lvds_tx_inst.r_phase_count_SB_LUT4_I1_1_O_SB_DFF_D_Q[2]
|
|
.sym 3167 lvds_tx_inst.r_phase_count_SB_DFF_D_Q[0]
|
|
.sym 3168 lvds_tx_inst.r_fifo_data[27]
|
|
.sym 3169 w_lvds_tx_d1_SB_DFF_Q_D_SB_LUT4_O_1_I0_SB_LUT4_O_I0[2]
|
|
.sym 3172 w_tx_fifo_pulled_data[14]
|
|
.sym 3176 w_lvds_tx_d1_SB_DFF_Q_D_SB_LUT4_O_1_I0_SB_LUT4_O_I0_SB_LUT4_I1_O_$glb_ce
|
|
.sym 3177 o_iq_tx_clk_p$SB_IO_OUT_$glb_clk
|
|
.sym 3178 o_led0$SB_IO_OUT_$glb_sr
|
|
.sym 3179 tx_fifo.empty_o_SB_DFF_Q_D_SB_LUT4_O_I1_SB_LUT4_O_1_I3[0]
|
|
.sym 3180 w_lvds_tx_d1_SB_DFF_Q_D_SB_LUT4_O_1_I0[2]
|
|
.sym 3181 w_lvds_tx_d1
|
|
.sym 3182 w_lvds_tx_d0
|
|
.sym 3183 w_lvds_tx_d1_SB_DFF_Q_D_SB_LUT4_O_1_I0_SB_LUT4_O_1_I2[3]
|
|
.sym 3184 w_lvds_tx_d1_SB_DFF_Q_D_SB_LUT4_O_1_I0[1]
|
|
.sym 3186 w_lvds_tx_d1_SB_DFF_Q_D_SB_LUT4_O_1_I0[0]
|
|
.sym 3191 $PACKER_VCC_NET
|
|
.sym 3192 tx_fifo.wr_addr[3]
|
|
.sym 3193 lvds_tx_inst.r_phase_count_SB_LUT4_I1_1_O_SB_DFF_D_Q[2]
|
|
.sym 3194 tx_fifo.rd_addr_gray_SB_LUT4_I2_O[3]
|
|
.sym 3195 lvds_tx_inst.r_phase_count_SB_DFF_D_Q[0]
|
|
.sym 3196 tx_fifo.wr_addr[5]
|
|
.sym 3200 tx_fifo.wr_addr[2]
|
|
.sym 3201 tx_fifo.empty_o_SB_DFF_Q_D_SB_LUT4_O_I1_SB_LUT4_O_I0_SB_LUT4_O_2_I3[1]
|
|
.sym 3203 tx_fifo.empty_o_SB_LUT4_I3_O_SB_LUT4_O_I0[3]
|
|
.sym 3205 tx_fifo.empty_o_SB_DFF_Q_D_SB_LUT4_O_I1_SB_LUT4_O_I0[0]
|
|
.sym 3207 tx_fifo.empty_o_SB_DFF_Q_D_SB_LUT4_O_I1_SB_LUT4_O_1_I3[1]
|
|
.sym 3208 tx_fifo.empty_o_SB_DFF_Q_D_SB_LUT4_O_I1_SB_LUT4_O_1_I3_SB_LUT4_O_I3[2]
|
|
.sym 3209 w_tx_fifo_pulled_data[13]
|
|
.sym 3211 tx_fifo.empty_o_SB_DFF_Q_D_SB_LUT4_O_I1_SB_LUT4_O_1_I3_SB_LUT4_O_I3[1]
|
|
.sym 3212 tx_fifo.empty_o_SB_DFF_Q_D_SB_LUT4_O_I1_SB_LUT4_O_1_I3[0]
|
|
.sym 3213 tx_fifo.empty_o_SB_DFF_Q_D_SB_LUT4_O_I1_SB_LUT4_O_1_I3[2]
|
|
.sym 3214 lvds_tx_inst.r_fifo_data[9]
|
|
.sym 3216 $PACKER_VCC_NET
|
|
.sym 3222 tx_fifo.rd_addr_gray_SB_LUT4_I2_O[3]
|
|
.sym 3223 lvds_tx_inst.r_phase_count_SB_DFF_D_Q[0]
|
|
.sym 3224 tx_fifo.empty_o_SB_DFF_Q_D_SB_LUT4_O_I1_SB_LUT4_O_I0_SB_LUT4_O_2_I3[1]
|
|
.sym 3226 lvds_tx_inst.r_phase_count_SB_LUT4_I1_1_O_SB_DFF_D_Q[2]
|
|
.sym 3234 lvds_tx_inst.r_fifo_data[12]
|
|
.sym 3235 $PACKER_VCC_NET
|
|
.sym 3236 w_lvds_tx_d1_SB_DFF_Q_D_SB_LUT4_O_1_I0_SB_LUT4_O_I2_SB_LUT4_O_1_I2[2]
|
|
.sym 3239 lvds_tx_inst.r_fifo_data[14]
|
|
.sym 3241 lvds_tx_inst.r_fifo_data[7]
|
|
.sym 3244 lvds_tx_inst.r_fifo_data[5]
|
|
.sym 3246 w_lvds_tx_d1_SB_DFF_Q_D_SB_LUT4_O_1_I0_SB_LUT4_O_I2_SB_LUT4_O_1_I2[0]
|
|
.sym 3247 w_lvds_tx_d1_SB_DFF_Q_D_SB_LUT4_O_1_I0_SB_LUT4_O_1_I2[1]
|
|
.sym 3248 lvds_tx_inst.r_phase_count_SB_DFF_D_Q[0]
|
|
.sym 3250 w_lvds_tx_d1
|
|
.sym 3256 w_lvds_tx_d1_SB_DFF_Q_D_SB_LUT4_O_1_I0_SB_LUT4_O_I0[2]
|
|
.sym 3262 lvds_tx_inst.r_phase_count_SB_LUT4_I1_1_O_SB_DFF_D_Q[2]
|
|
.sym 3263 w_tx_fifo_pulled_data[4]
|
|
.sym 3265 w_lvds_tx_d1
|
|
.sym 3271 lvds_tx_inst.r_phase_count_SB_LUT4_I1_1_O_SB_DFF_D_Q[2]
|
|
.sym 3272 lvds_tx_inst.r_fifo_data[7]
|
|
.sym 3273 lvds_tx_inst.r_fifo_data[5]
|
|
.sym 3274 lvds_tx_inst.r_phase_count_SB_DFF_D_Q[0]
|
|
.sym 3277 lvds_tx_inst.r_fifo_data[12]
|
|
.sym 3278 lvds_tx_inst.r_phase_count_SB_LUT4_I1_1_O_SB_DFF_D_Q[2]
|
|
.sym 3279 lvds_tx_inst.r_phase_count_SB_DFF_D_Q[0]
|
|
.sym 3280 lvds_tx_inst.r_fifo_data[14]
|
|
.sym 3283 w_lvds_tx_d1_SB_DFF_Q_D_SB_LUT4_O_1_I0_SB_LUT4_O_I2_SB_LUT4_O_1_I2[0]
|
|
.sym 3284 w_lvds_tx_d1_SB_DFF_Q_D_SB_LUT4_O_1_I0_SB_LUT4_O_I2_SB_LUT4_O_1_I2[2]
|
|
.sym 3285 w_lvds_tx_d1_SB_DFF_Q_D_SB_LUT4_O_1_I0_SB_LUT4_O_I0[2]
|
|
.sym 3286 w_lvds_tx_d1_SB_DFF_Q_D_SB_LUT4_O_1_I0_SB_LUT4_O_1_I2[1]
|
|
.sym 3291 w_tx_fifo_pulled_data[4]
|
|
.sym 3297 $PACKER_VCC_NET
|
|
.sym 3307 lvds_tx_inst.r_phase_count_SB_LUT4_I1_1_O_SB_DFF_D_Q[2]
|
|
.sym 3310 lvds_tx_inst.r_phase_count_SB_DFF_D_Q[0]
|
|
.sym 3311 w_lvds_tx_d1_SB_DFF_Q_D_SB_LUT4_O_1_I0_SB_LUT4_O_I0_SB_LUT4_I1_O_$glb_ce
|
|
.sym 3312 o_iq_tx_clk_p$SB_IO_OUT_$glb_clk
|
|
.sym 3313 o_led0$SB_IO_OUT_$glb_sr
|
|
.sym 3314 lvds_tx_inst.r_fifo_data[18]
|
|
.sym 3315 w_lvds_tx_d1_SB_DFF_Q_D_SB_LUT4_O_1_I0_SB_LUT4_O_I2[1]
|
|
.sym 3316 lvds_tx_inst.r_fifo_data[15]
|
|
.sym 3317 tx_fifo.empty_o_SB_DFF_Q_D_SB_LUT4_O_I1_SB_LUT4_O_1_I3_SB_LUT4_O_I3[1]
|
|
.sym 3318 lvds_tx_inst.r_fifo_data[16]
|
|
.sym 3319 w_lvds_tx_d1_SB_DFF_Q_D_SB_LUT4_O_1_I0_SB_LUT4_O_1_I2[2]
|
|
.sym 3320 lvds_tx_inst.r_fifo_data[13]
|
|
.sym 3321 lvds_tx_inst.r_phase_count_SB_LUT4_I1_O_SB_DFF_D_Q[1]
|
|
.sym 3325 lvds_tx_inst.r_phase_count_SB_DFF_D_Q[0]
|
|
.sym 3326 tx_fifo.empty_o_SB_LUT4_I3_O_SB_LUT4_O_1_I0[2]
|
|
.sym 3327 lvds_tx_inst.o_fifo_pull_SB_DFFSR_Q_R_SB_LUT4_O_I1[3]
|
|
.sym 3329 $PACKER_VCC_NET
|
|
.sym 3330 w_tx_fifo_pulled_data[7]
|
|
.sym 3331 w_lvds_tx_d1_SB_DFF_Q_D_SB_LUT4_O_1_I0_SB_LUT4_O_1_I2[0]
|
|
.sym 3332 w_lvds_tx_d1_SB_DFF_Q_D_SB_LUT4_O_1_I0_SB_LUT4_O_I2_SB_LUT4_O_I2[0]
|
|
.sym 3335 w_lvds_tx_d1_SB_DFF_Q_D_SB_LUT4_O_1_I0_SB_LUT4_O_I2_SB_LUT4_O_I2[3]
|
|
.sym 3336 lvds_tx_inst.o_fifo_pull_SB_DFFSR_Q_R_SB_LUT4_O_I1[0]
|
|
.sym 3338 w_lvds_tx_d1_SB_DFF_Q_D_SB_LUT4_O_1_I0[3]
|
|
.sym 3339 lvds_tx_inst.r_phase_count_SB_DFF_D_Q[0]
|
|
.sym 3340 tx_fifo.rd_addr_gray_SB_LUT4_I2_O[1]
|
|
.sym 3343 w_lvds_tx_d1_SB_DFF_Q_D_SB_LUT4_O_1_I0_SB_LUT4_O_I0[2]
|
|
.sym 3344 w_smi_data_input[7]
|
|
.sym 3345 w_lvds_tx_d1_SB_DFF_Q_D_SB_LUT4_O_1_I0_SB_LUT4_O_I0[1]
|
|
.sym 3351 tx_fifo.rd_addr_gray_SB_LUT4_I2_O[8]
|
|
.sym 3355 w_lvds_tx_d1_SB_DFF_Q_D_SB_LUT4_O_1_I0_SB_LUT4_O_I2_SB_LUT4_O_I2[0]
|
|
.sym 3357 tx_fifo.empty_o_SB_LUT4_I3_O_SB_LUT4_O_1_I0[2]
|
|
.sym 3359 w_tx_fifo_pulled_data[7]
|
|
.sym 3361 w_lvds_tx_d1_SB_DFF_Q_D_SB_LUT4_O_1_I0_SB_LUT4_O_1_I2[0]
|
|
.sym 3369 lvds_tx_inst.r_phase_count_SB_CARRY_CI_CO_SB_LUT4_I3_O_SB_DFF_D_Q[0]
|
|
.sym 3370 w_tx_fifo_pulled_data[19]
|
|
.sym 3371 lvds_tx_inst.r_fifo_data[4]
|
|
.sym 3372 w_lvds_tx_d1_SB_DFF_Q_D_SB_LUT4_O_I1_SB_LUT4_O_1_I0[1]
|
|
.sym 3374 lvds_tx_inst.r_phase_count_SB_LUT4_I1_1_O_SB_DFF_D_Q[2]
|
|
.sym 3378 lvds_tx_inst.r_phase_count_SB_CARRY_CI_CO_SB_LUT4_I3_O_SB_DFF_D_Q[2]
|
|
.sym 3379 w_lvds_tx_d1_SB_DFF_Q_D_SB_LUT4_O_1_I0[3]
|
|
.sym 3380 w_lvds_tx_d1_SB_DFF_Q_D_SB_LUT4_O_1_I0_SB_LUT4_O_I0[2]
|
|
.sym 3381 w_tx_fifo_pulled_data[6]
|
|
.sym 3388 lvds_tx_inst.r_fifo_data[6]
|
|
.sym 3391 w_lvds_tx_d1_SB_DFF_Q_D_SB_LUT4_O_I1_SB_LUT4_O_1_I0[2]
|
|
.sym 3394 w_lvds_tx_d1_SB_DFF_Q_D_SB_LUT4_O_I1_SB_LUT4_O_1_I0[0]
|
|
.sym 3396 w_tx_fifo_pulled_data[7]
|
|
.sym 3397 lvds_tx_inst.r_phase_count_SB_CARRY_CI_CO_SB_LUT4_I3_O_SB_DFF_D_Q[1]
|
|
.sym 3398 lvds_tx_inst.r_phase_count_SB_DFF_D_Q[0]
|
|
.sym 3400 lvds_tx_inst.r_phase_count_SB_CARRY_CI_CO_SB_LUT4_I3_O_SB_DFF_D_Q[0]
|
|
.sym 3401 lvds_tx_inst.r_phase_count_SB_CARRY_CI_CO_SB_LUT4_I3_O_SB_DFF_D_Q[1]
|
|
.sym 3402 lvds_tx_inst.r_phase_count_SB_CARRY_CI_CO_SB_LUT4_I3_O_SB_DFF_D_Q[2]
|
|
.sym 3403 w_lvds_tx_d1_SB_DFF_Q_D_SB_LUT4_O_1_I0[3]
|
|
.sym 3409 w_tx_fifo_pulled_data[7]
|
|
.sym 3412 w_lvds_tx_d1_SB_DFF_Q_D_SB_LUT4_O_1_I0_SB_LUT4_O_I0[2]
|
|
.sym 3413 w_lvds_tx_d1_SB_DFF_Q_D_SB_LUT4_O_I1_SB_LUT4_O_1_I0[1]
|
|
.sym 3414 w_lvds_tx_d1_SB_DFF_Q_D_SB_LUT4_O_I1_SB_LUT4_O_1_I0[0]
|
|
.sym 3415 w_lvds_tx_d1_SB_DFF_Q_D_SB_LUT4_O_I1_SB_LUT4_O_1_I0[2]
|
|
.sym 3418 lvds_tx_inst.r_phase_count_SB_LUT4_I1_1_O_SB_DFF_D_Q[2]
|
|
.sym 3419 lvds_tx_inst.r_fifo_data[4]
|
|
.sym 3420 lvds_tx_inst.r_fifo_data[6]
|
|
.sym 3421 lvds_tx_inst.r_phase_count_SB_DFF_D_Q[0]
|
|
.sym 3430 w_tx_fifo_pulled_data[6]
|
|
.sym 3437 w_tx_fifo_pulled_data[19]
|
|
.sym 3446 w_lvds_tx_d1_SB_DFF_Q_D_SB_LUT4_O_1_I0_SB_LUT4_O_I0_SB_LUT4_I1_O_$glb_ce
|
|
.sym 3447 o_iq_tx_clk_p$SB_IO_OUT_$glb_clk
|
|
.sym 3448 o_led0$SB_IO_OUT_$glb_sr
|
|
.sym 3449 lvds_tx_inst.r_fifo_data[8]
|
|
.sym 3450 lvds_tx_inst.r_fifo_data[28]
|
|
.sym 3451 tx_fifo.empty_o_SB_DFF_Q_D_SB_LUT4_O_I1_SB_LUT4_O_I0_SB_LUT4_O_2_I3[3]
|
|
.sym 3452 lvds_tx_inst.r_fifo_data[31]
|
|
.sym 3453 w_lvds_tx_d1_SB_DFF_Q_D_SB_LUT4_O_1_I0_SB_LUT4_O_I2_SB_LUT4_O_I2[2]
|
|
.sym 3454 lvds_tx_inst.r_fifo_data[9]
|
|
.sym 3455 lvds_tx_inst.r_phase_count_SB_CARRY_CI_CO_SB_LUT4_I3_O_SB_DFF_D_Q[1]
|
|
.sym 3456 tx_fifo.empty_o_SB_DFF_Q_D_SB_LUT4_O_I1_SB_LUT4_O_1_I3_SB_LUT4_O_I3[3]
|
|
.sym 3461 tx_fifo.empty_o_SB_DFF_Q_D_SB_LUT4_O_I1_SB_LUT4_O_I0_SB_LUT4_O_2_I3[1]
|
|
.sym 3466 lvds_tx_inst.r_phase_count_SB_LUT4_I1_O_SB_DFF_D_Q[1]
|
|
.sym 3468 tx_fifo.rd_addr_gray_SB_DFFE_Q_8_D[2]
|
|
.sym 3473 tx_fifo.rd_addr[0]
|
|
.sym 3474 tx_fifo.empty_o_SB_DFF_Q_D_SB_LUT4_O_I1_SB_LUT4_O_1_I3_SB_LUT4_O_I3[2]
|
|
.sym 3475 tx_fifo.rd_addr_gray[7]
|
|
.sym 3476 lvds_tx_inst.r_phase_count_SB_LUT4_I1_1_O_SB_DFF_D_Q[2]
|
|
.sym 3477 tx_fifo.empty_o_SB_LUT4_I3_O_SB_LUT4_O_I0[1]
|
|
.sym 3479 tx_fifo.empty_o_SB_DFF_Q_D_SB_LUT4_O_I1_SB_LUT4_O_1_I3[2]
|
|
.sym 3481 tx_fifo.empty_o_SB_LUT4_I3_O_SB_LUT4_O_I0[3]
|
|
.sym 3483 tx_fifo.empty_o_SB_LUT4_I3_O_SB_LUT4_O_1_I0[3]
|
|
.sym 3486 tx_fifo.empty_o_SB_DFF_Q_D_SB_LUT4_O_I1_SB_LUT4_O_I0_SB_LUT4_O_2_I3[1]
|
|
.sym 3490 tx_fifo.rd_addr_gray_SB_LUT4_I2_O[6]
|
|
.sym 3493 tx_fifo.empty_o_SB_LUT4_I3_O_SB_LUT4_O_I0[1]
|
|
.sym 3495 tx_fifo.rd_addr_gray_SB_DFFE_Q_8_D[2]
|
|
.sym 3504 tx_fifo.rd_addr_gray_SB_LUT4_I2_O[2]
|
|
.sym 3507 tx_fifo.empty_o_SB_DFF_Q_D_SB_LUT4_O_I1_SB_LUT4_O_I0_SB_LUT4_O_2_I3[2]
|
|
.sym 3511 tx_fifo.rd_addr_gray_SB_LUT4_I2_O[1]
|
|
.sym 3516 tx_fifo.rd_addr_gray_SB_LUT4_I2_O[6]
|
|
.sym 3517 tx_fifo.rd_addr_gray_SB_LUT4_I2_O[7]
|
|
.sym 3526 tx_fifo.rd_addr_gray_SB_LUT4_I2_O[8]
|
|
.sym 3529 w_tx_fifo_pull
|
|
.sym 3532 tx_fifo.wr_addr_gray_rd_r[6]
|
|
.sym 3537 tx_fifo.rd_addr_gray_SB_LUT4_I2_O[2]
|
|
.sym 3541 tx_fifo.rd_addr_gray_SB_LUT4_I2_O[6]
|
|
.sym 3542 w_tx_fifo_pull
|
|
.sym 3543 tx_fifo.wr_addr_gray_rd_r[6]
|
|
.sym 3544 tx_fifo.rd_addr_gray_SB_LUT4_I2_O[7]
|
|
.sym 3550 tx_fifo.empty_o_SB_DFF_Q_D_SB_LUT4_O_I1_SB_LUT4_O_I0_SB_LUT4_O_2_I3[2]
|
|
.sym 3553 tx_fifo.empty_o_SB_DFF_Q_D_SB_LUT4_O_I1_SB_LUT4_O_I0_SB_LUT4_O_2_I3[2]
|
|
.sym 3555 tx_fifo.rd_addr_gray_SB_LUT4_I2_O[6]
|
|
.sym 3559 tx_fifo.rd_addr_gray_SB_LUT4_I2_O[7]
|
|
.sym 3566 tx_fifo.rd_addr_gray_SB_LUT4_I2_O[7]
|
|
.sym 3567 tx_fifo.rd_addr_gray_SB_LUT4_I2_O[8]
|
|
.sym 3571 tx_fifo.rd_addr_gray_SB_LUT4_I2_O[1]
|
|
.sym 3579 tx_fifo.rd_addr_gray_SB_LUT4_I2_O[6]
|
|
.sym 3581 w_tx_fifo_pull
|
|
.sym 3582 o_iq_tx_clk_p$SB_IO_OUT_$glb_clk
|
|
.sym 3584 tx_fifo.rd_addr_gray_SB_DFFE_Q_8_D[1]
|
|
.sym 3586 tx_fifo.empty_o_SB_DFF_Q_D_SB_LUT4_O_I1_SB_LUT4_O_1_I3_SB_LUT4_O_I3[1]
|
|
.sym 3587 tx_fifo.empty_o_SB_LUT4_I3_O_SB_LUT4_O_1_I0[0]
|
|
.sym 3588 smi_ctrl_ins.modem_tx_ctrl
|
|
.sym 3589 tx_fifo.empty_o_SB_LUT4_I3_O_SB_LUT4_O_I0[0]
|
|
.sym 3591 tx_fifo.empty_o_SB_DFF_Q_D_SB_LUT4_O_I1_SB_LUT4_O_I0_SB_LUT4_O_I0[1]
|
|
.sym 3592 tx_fifo.empty_o_SB_DFF_Q_D_SB_LUT4_O_I1_SB_LUT4_O_1_I3_SB_LUT4_O_I3[1]
|
|
.sym 3593 w_tx_fifo_pulled_data[23]
|
|
.sym 3596 tx_fifo.empty_o_SB_LUT4_I3_O_SB_LUT4_O_I0[3]
|
|
.sym 3597 tx_fifo.wr_addr_gray_rd_r[8]
|
|
.sym 3598 lvds_tx_inst.r_fifo_data[10]
|
|
.sym 3600 lvds_tx_inst.r_phase_count_SB_LUT4_I1_1_O_SB_DFF_D_Q[2]
|
|
.sym 3602 tx_fifo.empty_o_SB_DFF_Q_D_SB_LUT4_O_I1_SB_LUT4_O_1_I3[1]
|
|
.sym 3604 tx_fifo.rd_addr[9]
|
|
.sym 3605 lvds_tx_inst.r_fifo_data[28]
|
|
.sym 3606 tx_fifo.empty_o_SB_DFF_Q_D_SB_LUT4_O_I1_SB_LUT4_O_1_I3_SB_LUT4_O_I3[1]
|
|
.sym 3607 w_lvds_tx_d1_SB_DFF_Q_D_SB_LUT4_O_1_I0_SB_LUT4_O_I0[2]
|
|
.sym 3608 tx_fifo.wr_addr_gray_rd_r[9]
|
|
.sym 3609 tx_fifo.empty_o_SB_DFF_Q_D_SB_LUT4_O_I1_SB_LUT4_O_1_I3[1]
|
|
.sym 3610 tx_fifo.empty_o_SB_DFF_Q_D_SB_LUT4_O_I1_SB_LUT4_O_I0_SB_LUT4_O_2_I3[2]
|
|
.sym 3611 tx_fifo.empty_o_SB_LUT4_I3_O_SB_LUT4_O_I0[0]
|
|
.sym 3612 tx_fifo.empty_o_SB_DFF_Q_D_SB_LUT4_O_I1_SB_LUT4_O_1_I3_SB_LUT4_O_I3[2]
|
|
.sym 3613 tx_fifo.empty_o_SB_LUT4_I3_O_SB_LUT4_O_1_I0[1]
|
|
.sym 3616 tx_fifo.empty_o_SB_LUT4_I3_O[0]
|
|
.sym 3617 tx_fifo.rd_addr_gray_SB_DFFE_Q_8_D[1]
|
|
.sym 3618 tx_fifo.wr_addr_gray_rd_r[6]
|
|
.sym 3619 tx_fifo.empty_o_SB_DFF_Q_D_SB_LUT4_O_I1_SB_LUT4_O_I0_SB_LUT4_O_2_I3[0]
|
|
.sym 3620 tx_fifo.rd_addr[9]
|
|
.sym 3622 lvds_tx_inst.r_phase_count_SB_CARRY_CI_CO_SB_LUT4_I3_O_SB_DFF_D_Q[2]
|
|
.sym 3623 lvds_tx_inst.r_phase_count_SB_LUT4_I1_1_O_SB_DFF_D_Q[2]
|
|
.sym 3625 w_lvds_tx_d1_SB_DFF_Q_D_SB_LUT4_O_1_I0_SB_LUT4_O_I0[2]
|
|
.sym 3626 lvds_tx_inst.r_fifo_data[28]
|
|
.sym 3627 w_lvds_tx_d1_SB_DFF_Q_D_SB_LUT4_O_1_I0[3]
|
|
.sym 3639 tx_fifo.empty_o_SB_DFF_Q_D_SB_LUT4_O_I1_SB_LUT4_O_1_I3[1]
|
|
.sym 3640 tx_fifo.empty_o_SB_LUT4_I3_O_SB_LUT4_O_1_I0[2]
|
|
.sym 3643 tx_fifo.empty_o_SB_LUT4_I3_O_SB_LUT4_O_I0[1]
|
|
.sym 3645 tx_fifo.empty_o_SB_LUT4_I3_O_SB_LUT4_O_I0[3]
|
|
.sym 3649 tx_fifo.empty_o_SB_DFF_Q_D_SB_LUT4_O_I1_SB_LUT4_O_1_I3_SB_LUT4_O_I3[1]
|
|
.sym 3652 tx_fifo.empty_o_SB_DFF_Q_D_SB_LUT4_O_I1_SB_LUT4_O_1_I3[2]
|
|
.sym 3657 tx_fifo.rd_addr[0]
|
|
.sym 3667 tx_fifo.empty_o_SB_LUT4_I3_O_SB_LUT4_O_1_I0[3]
|
|
.sym 3669 $nextpnr_ICESTORM_LC_8$O
|
|
.sym 3672 tx_fifo.rd_addr[0]
|
|
.sym 3675 tx_fifo.rd_addr_gray_SB_LUT4_I2_I3[2]
|
|
.sym 3677 tx_fifo.empty_o_SB_LUT4_I3_O_SB_LUT4_O_I0[1]
|
|
.sym 3679 tx_fifo.rd_addr[0]
|
|
.sym 3681 tx_fifo.rd_addr_gray_SB_LUT4_I2_I3[3]
|
|
.sym 3683 tx_fifo.empty_o_SB_LUT4_I3_O_SB_LUT4_O_I0[3]
|
|
.sym 3685 tx_fifo.rd_addr_gray_SB_LUT4_I2_I3[2]
|
|
.sym 3687 tx_fifo.rd_addr_gray_SB_LUT4_I2_I3[4]
|
|
.sym 3690 tx_fifo.empty_o_SB_LUT4_I3_O_SB_LUT4_O_1_I0[2]
|
|
.sym 3691 tx_fifo.rd_addr_gray_SB_LUT4_I2_I3[3]
|
|
.sym 3693 tx_fifo.rd_addr_gray_SB_LUT4_I2_I3[5]
|
|
.sym 3695 tx_fifo.empty_o_SB_LUT4_I3_O_SB_LUT4_O_1_I0[3]
|
|
.sym 3697 tx_fifo.rd_addr_gray_SB_LUT4_I2_I3[4]
|
|
.sym 3699 tx_fifo.rd_addr_gray_SB_LUT4_I2_I3[6]
|
|
.sym 3701 tx_fifo.empty_o_SB_DFF_Q_D_SB_LUT4_O_I1_SB_LUT4_O_1_I3[1]
|
|
.sym 3703 tx_fifo.rd_addr_gray_SB_LUT4_I2_I3[5]
|
|
.sym 3705 tx_fifo.rd_addr_gray_SB_LUT4_I2_I3[7]
|
|
.sym 3708 tx_fifo.empty_o_SB_DFF_Q_D_SB_LUT4_O_I1_SB_LUT4_O_1_I3[2]
|
|
.sym 3709 tx_fifo.rd_addr_gray_SB_LUT4_I2_I3[6]
|
|
.sym 3711 tx_fifo.rd_addr_gray_SB_LUT4_I2_I3[8]
|
|
.sym 3714 tx_fifo.empty_o_SB_DFF_Q_D_SB_LUT4_O_I1_SB_LUT4_O_1_I3_SB_LUT4_O_I3[1]
|
|
.sym 3715 tx_fifo.rd_addr_gray_SB_LUT4_I2_I3[7]
|
|
.sym 3719 tx_fifo.wr_addr_gray_rd_r[0]
|
|
.sym 3720 tx_fifo.empty_o_SB_DFF_Q_D_SB_LUT4_O_I1[1]
|
|
.sym 3721 tx_fifo.empty_o_SB_DFF_Q_D_SB_LUT4_O_I1_SB_LUT4_O_1_I3_SB_LUT4_O_I3[0]
|
|
.sym 3722 tx_fifo.wr_addr_gray_rd_r[6]
|
|
.sym 3723 tx_fifo.empty_o_SB_LUT4_I3_O_SB_LUT4_O_I0[2]
|
|
.sym 3724 tx_fifo.empty_o_SB_DFF_Q_D_SB_LUT4_O_I1[0]
|
|
.sym 3725 tx_fifo.wr_addr_gray_rd_r[9]
|
|
.sym 3726 w_tx_fifo_empty
|
|
.sym 3732 tx_fifo.wr_addr[3]
|
|
.sym 3733 tx_fifo.empty_o_SB_DFF_Q_D_SB_LUT4_O_I1_SB_LUT4_O_I0_SB_LUT4_O_2_I3[2]
|
|
.sym 3736 tx_fifo.wr_addr[5]
|
|
.sym 3737 tx_fifo.wr_addr[4]
|
|
.sym 3739 tx_fifo.rd_addr_gray_SB_LUT4_I2_O[3]
|
|
.sym 3743 tx_fifo.wr_addr_gray_rd_r[8]
|
|
.sym 3744 tx_fifo.rd_addr_gray_SB_LUT4_I2_O[2]
|
|
.sym 3745 tx_fifo.empty_o_SB_LUT4_I3_O_SB_LUT4_O_1_I0[0]
|
|
.sym 3746 tx_fifo.rd_addr_gray_SB_LUT4_I2_O[3]
|
|
.sym 3747 lvds_tx_inst.r_fifo_data[29]
|
|
.sym 3748 tx_fifo.empty_o_SB_DFF_Q_D_SB_LUT4_O_I1_SB_LUT4_O_I0_SB_LUT4_O_2_I3[1]
|
|
.sym 3750 tx_fifo.empty_o_SB_DFF_Q_D_SB_LUT4_O_I1_SB_LUT4_O_I0[0]
|
|
.sym 3751 tx_fifo.empty_o_SB_DFF_Q_D_SB_LUT4_O_I1_SB_LUT4_O_1_I3_SB_LUT4_O_I3[1]
|
|
.sym 3752 tx_fifo.empty_o_SB_DFF_Q_D_SB_LUT4_O_I1_SB_LUT4_O_1_I3_SB_LUT4_O_I3[2]
|
|
.sym 3753 tx_fifo.empty_o_SB_DFF_Q_D_SB_LUT4_O_I1_SB_LUT4_O_I0_SB_LUT4_O_I0[1]
|
|
.sym 3754 tx_fifo.rd_addr_gray_SB_LUT4_I2_O[7]
|
|
.sym 3755 lvds_tx_inst.r_phase_count_SB_DFF_D_Q[0]
|
|
.sym 3761 lvds_tx_inst.r_phase_count_SB_LUT4_I1_1_O_SB_DFF_D_Q[2]
|
|
.sym 3767 tx_fifo.rd_addr_gray_SB_LUT4_I2_I3[8]
|
|
.sym 3772 tx_fifo.rd_addr_gray_SB_LUT4_I2_O[8]
|
|
.sym 3774 tx_fifo.empty_o_SB_DFF_Q_D_SB_LUT4_O_I1_SB_LUT4_O_1_I3_SB_LUT4_O_I3[2]
|
|
.sym 3775 tx_fifo.rd_addr_gray_SB_LUT4_I2_O[3]
|
|
.sym 3778 tx_fifo.rd_addr[9]
|
|
.sym 3781 w_tx_fifo_pulled_data[25]
|
|
.sym 3782 w_tx_fifo_pulled_data[29]
|
|
.sym 3784 tx_fifo.empty_o_SB_DFF_Q_D_SB_LUT4_O_I1_SB_LUT4_O_I0_SB_LUT4_O_2_I3[1]
|
|
.sym 3787 tx_fifo.rd_addr_gray_SB_LUT4_I2_O[7]
|
|
.sym 3796 w_tx_fifo_pulled_data[11]
|
|
.sym 3797 tx_fifo.empty_o_SB_LUT4_I3_O_SB_LUT4_O_1_I0[1]
|
|
.sym 3798 tx_fifo.empty_o_SB_DFF_Q_D_SB_LUT4_O_I1_SB_LUT4_O_1_I3_SB_LUT4_O_I3[0]
|
|
.sym 3804 tx_fifo.rd_addr_gray_SB_LUT4_I2_I3[9]
|
|
.sym 3807 tx_fifo.empty_o_SB_DFF_Q_D_SB_LUT4_O_I1_SB_LUT4_O_1_I3_SB_LUT4_O_I3[2]
|
|
.sym 3808 tx_fifo.rd_addr_gray_SB_LUT4_I2_I3[8]
|
|
.sym 3812 tx_fifo.rd_addr[9]
|
|
.sym 3814 tx_fifo.rd_addr_gray_SB_LUT4_I2_I3[9]
|
|
.sym 3817 w_tx_fifo_pulled_data[25]
|
|
.sym 3823 tx_fifo.empty_o_SB_DFF_Q_D_SB_LUT4_O_I1_SB_LUT4_O_I0_SB_LUT4_O_2_I3[1]
|
|
.sym 3824 tx_fifo.empty_o_SB_LUT4_I3_O_SB_LUT4_O_1_I0[1]
|
|
.sym 3825 tx_fifo.rd_addr_gray_SB_LUT4_I2_O[3]
|
|
.sym 3829 tx_fifo.rd_addr_gray_SB_LUT4_I2_O[8]
|
|
.sym 3830 tx_fifo.empty_o_SB_DFF_Q_D_SB_LUT4_O_I1_SB_LUT4_O_1_I3_SB_LUT4_O_I3[0]
|
|
.sym 3831 tx_fifo.rd_addr_gray_SB_LUT4_I2_O[7]
|
|
.sym 3835 w_tx_fifo_pulled_data[11]
|
|
.sym 3842 w_tx_fifo_pulled_data[29]
|
|
.sym 3851 w_lvds_tx_d1_SB_DFF_Q_D_SB_LUT4_O_1_I0_SB_LUT4_O_I0_SB_LUT4_I1_O_$glb_ce
|
|
.sym 3852 o_iq_tx_clk_p$SB_IO_OUT_$glb_clk
|
|
.sym 3853 o_led0$SB_IO_OUT_$glb_sr
|
|
.sym 3854 tx_fifo.rd_addr_gray_SB_DFFE_Q_8_D[3]
|
|
.sym 3855 tx_fifo.empty_o_SB_DFF_Q_D_SB_LUT4_O_I1[2]
|
|
.sym 3856 tx_fifo.rd_addr_gray[8]
|
|
.sym 3858 tx_fifo.empty_o_SB_DFF_Q_D_SB_LUT4_O_I1_SB_LUT4_O_I0[1]
|
|
.sym 3859 tx_fifo.empty_o_SB_LUT4_I3_O[1]
|
|
.sym 3860 tx_fifo.empty_o_SB_DFF_Q_D_SB_LUT4_O_I1_SB_LUT4_O_I0[2]
|
|
.sym 3861 w_lvds_tx_d1_SB_DFF_Q_D_SB_LUT4_O_1_I0_SB_LUT4_O_I0[1]
|
|
.sym 3863 w_tx_fifo_pulled_data[27]
|
|
.sym 3868 w_tx_fifo_pulled_data[29]
|
|
.sym 3869 tx_fifo.wr_addr_gray_rd[1]
|
|
.sym 3870 $PACKER_VCC_NET
|
|
.sym 3871 w_tx_fifo_pull
|
|
.sym 3874 tx_fifo.wr_addr_gray_rd[6]
|
|
.sym 3878 tx_fifo.empty_o_SB_DFF_Q_D_SB_LUT4_O_I1_SB_LUT4_O_1_I3_SB_LUT4_O_I3[0]
|
|
.sym 3879 lvds_tx_inst.r_phase_count_SB_DFF_D_Q[0]
|
|
.sym 3880 tx_fifo.empty_o_SB_LUT4_I3_O_SB_LUT4_O_1_I0[3]
|
|
.sym 3882 tx_fifo.rd_addr[9]
|
|
.sym 3885 w_lvds_tx_d1_SB_DFF_Q_D_SB_LUT4_O_1_I0_SB_LUT4_O_I0[1]
|
|
.sym 3886 tx_fifo.empty_o_SB_DFF_Q_D_SB_LUT4_O_I1_SB_LUT4_O_1_I3[3]
|
|
.sym 3887 w_lvds_tx_d1_SB_DFF_Q_D_SB_LUT4_O_1_I0_SB_LUT4_O_I0[2]
|
|
.sym 3889 w_lvds_tx_d1_SB_DFF_Q_D_SB_LUT4_O_1_I0[3]
|
|
.sym 3893 $PACKER_VCC_NET
|
|
.sym 3908 tx_fifo.rd_addr_gray_SB_LUT4_I2_O[9]
|
|
.sym 3909 lvds_tx_inst.r_fifo_data[28]
|
|
.sym 3910 lvds_tx_inst.r_fifo_data[30]
|
|
.sym 3911 tx_fifo.rd_addr_gray_SB_LUT4_I2_O[6]
|
|
.sym 3913 tx_fifo.wr_addr_gray_rd_r[9]
|
|
.sym 3915 tx_fifo.rd_addr_gray_SB_LUT4_I2_O[8]
|
|
.sym 3916 lvds_tx_inst.r_phase_count_SB_LUT4_I1_1_O_SB_DFF_D_Q[2]
|
|
.sym 3918 tx_fifo.rd_addr_gray_SB_DFFE_Q_8_D[2]
|
|
.sym 3919 tx_fifo.empty_o_SB_LUT4_I3_O_SB_LUT4_O_I0[2]
|
|
.sym 3921 lvds_tx_inst.r_phase_count_SB_DFF_D_Q[0]
|
|
.sym 3923 tx_fifo.rd_addr_gray_SB_DFFE_Q_8_D[1]
|
|
.sym 3925 w_tx_fifo_pull
|
|
.sym 3927 tx_fifo.wr_addr_gray_rd_r[8]
|
|
.sym 3931 tx_fifo.rd_addr_gray_SB_DFFE_Q_8_D[3]
|
|
.sym 3938 tx_fifo.rd_addr_gray_SB_LUT4_I2_O[7]
|
|
.sym 3940 tx_fifo.rd_addr_gray_SB_DFFE_Q_8_D[2]
|
|
.sym 3941 tx_fifo.empty_o_SB_LUT4_I3_O_SB_LUT4_O_I0[2]
|
|
.sym 3942 tx_fifo.rd_addr_gray_SB_DFFE_Q_8_D[1]
|
|
.sym 3943 tx_fifo.rd_addr_gray_SB_DFFE_Q_8_D[3]
|
|
.sym 3946 tx_fifo.rd_addr_gray_SB_LUT4_I2_O[9]
|
|
.sym 3947 tx_fifo.wr_addr_gray_rd_r[8]
|
|
.sym 3948 tx_fifo.rd_addr_gray_SB_LUT4_I2_O[8]
|
|
.sym 3949 tx_fifo.wr_addr_gray_rd_r[9]
|
|
.sym 3955 tx_fifo.rd_addr_gray_SB_LUT4_I2_O[8]
|
|
.sym 3964 tx_fifo.rd_addr_gray_SB_LUT4_I2_O[7]
|
|
.sym 3966 tx_fifo.rd_addr_gray_SB_LUT4_I2_O[6]
|
|
.sym 3971 tx_fifo.rd_addr_gray_SB_DFFE_Q_8_D[1]
|
|
.sym 3977 tx_fifo.rd_addr_gray_SB_LUT4_I2_O[9]
|
|
.sym 3982 lvds_tx_inst.r_phase_count_SB_DFF_D_Q[0]
|
|
.sym 3983 lvds_tx_inst.r_fifo_data[28]
|
|
.sym 3984 lvds_tx_inst.r_fifo_data[30]
|
|
.sym 3985 lvds_tx_inst.r_phase_count_SB_LUT4_I1_1_O_SB_DFF_D_Q[2]
|
|
.sym 3986 w_tx_fifo_pull
|
|
.sym 3987 o_iq_tx_clk_p$SB_IO_OUT_$glb_clk
|
|
.sym 3990 lvds_tx_inst.r_phase_count[1]
|
|
.sym 3991 tx_fifo.empty_o_SB_DFF_Q_D_SB_LUT4_O_I1_SB_LUT4_O_1_I3[3]
|
|
.sym 3992 tx_fifo.rd_addr_gray_wr[1]
|
|
.sym 3993 tx_fifo.rd_addr_gray_wr[6]
|
|
.sym 3994 tx_fifo.full_o_SB_DFF_Q_D_SB_LUT4_O_I0_SB_LUT4_O_I0_SB_LUT4_O_1_I3[0]
|
|
.sym 3995 tx_fifo.empty_o_SB_LUT4_I3_O[2]
|
|
.sym 3996 tx_fifo.rd_addr_gray_wr_r[1]
|
|
.sym 4004 lvds_tx_inst.r_fifo_data[30]
|
|
.sym 4006 w_lvds_tx_d1_SB_DFF_Q_D_SB_LUT4_O_1_I0_SB_LUT4_O_I0[1]
|
|
.sym 4008 tx_fifo.rd_addr_gray_SB_DFFE_Q_8_D[3]
|
|
.sym 4012 tx_fifo.empty_o_SB_LUT4_I3_O_SB_LUT4_O_I0[1]
|
|
.sym 4014 tx_fifo.empty_o_SB_DFF_Q_D_SB_LUT4_O_I1_SB_LUT4_O_1_I3_SB_LUT4_O_I3[2]
|
|
.sym 4022 tx_fifo.rd_addr[9]
|
|
.sym 4023 lvds_tx_inst.r_phase_count_SB_LUT4_I1_1_O_SB_DFF_D_Q[2]
|
|
.sym 4043 lvds_tx_inst.r_phase_count_SB_LUT4_I1_1_O_SB_DFF_D_Q[2]
|
|
.sym 4047 lvds_tx_inst.r_phase_count[3]
|
|
.sym 4054 lvds_tx_inst.r_phase_count[2]
|
|
.sym 4059 lvds_tx_inst.r_phase_count[1]
|
|
.sym 4060 $PACKER_VCC_NET
|
|
.sym 4061 w_lvds_tx_d1_SB_DFF_Q_D_SB_LUT4_O_1_I0[3]
|
|
.sym 4067 lvds_tx_inst.r_phase_count[1]
|
|
.sym 4068 w_lvds_tx_d1_SB_DFF_Q_D_SB_LUT4_O_1_I0_SB_LUT4_O_I0[2]
|
|
.sym 4074 $nextpnr_ICESTORM_LC_5$O
|
|
.sym 4076 lvds_tx_inst.r_phase_count[1]
|
|
.sym 4080 lvds_tx_inst.r_phase_count_SB_CARRY_CI_CO[2]
|
|
.sym 4082 $PACKER_VCC_NET
|
|
.sym 4083 lvds_tx_inst.r_phase_count[2]
|
|
.sym 4084 lvds_tx_inst.r_phase_count[1]
|
|
.sym 4086 lvds_tx_inst.r_phase_count_SB_CARRY_CI_CO[3]
|
|
.sym 4088 lvds_tx_inst.r_phase_count[3]
|
|
.sym 4089 $PACKER_VCC_NET
|
|
.sym 4090 lvds_tx_inst.r_phase_count_SB_CARRY_CI_CO[2]
|
|
.sym 4093 w_lvds_tx_d1_SB_DFF_Q_D_SB_LUT4_O_1_I0[3]
|
|
.sym 4094 $PACKER_VCC_NET
|
|
.sym 4096 lvds_tx_inst.r_phase_count_SB_CARRY_CI_CO[3]
|
|
.sym 4100 lvds_tx_inst.r_phase_count_SB_LUT4_I1_1_O_SB_DFF_D_Q[2]
|
|
.sym 4105 w_lvds_tx_d1_SB_DFF_Q_D_SB_LUT4_O_1_I0_SB_LUT4_O_I0[2]
|
|
.sym 4112 lvds_tx_inst.r_phase_count[1]
|
|
.sym 4122 o_iq_tx_clk_p$SB_IO_OUT_$glb_clk
|
|
.sym 4138 o_led0$SB_IO_OUT
|
|
.sym 4148 lvds_tx_inst.r_phase_count_SB_LUT4_I1_1_O_SB_DFF_D_Q[2]
|
|
.sym 4150 w_lvds_tx_d1_SB_DFF_Q_D_SB_LUT4_O_1_I0_SB_LUT4_O_I0[2]
|
|
.sym 4152 w_lvds_tx_d1_SB_DFF_Q_D_SB_LUT4_O_1_I0[3]
|
|
.sym 4157 tx_fifo.empty_o_SB_LUT4_I3_O_SB_LUT4_O_1_I0[1]
|
|
.sym 4208 o_shdn_rx_lna$SB_IO_OUT
|
|
.sym 4209 o_shdn_tx_lna$SB_IO_OUT
|
|
.sym 4238 w_rx_fifo_pulled_data[8]
|
|
.sym 4242 w_rx_fifo_pulled_data[10]
|
|
.sym 4255 smi_ctrl_ins.r_fifo_pushed_data[27]
|
|
.sym 4256 smi_ctrl_ins.r_fifo_pushed_data[23]
|
|
.sym 4258 smi_ctrl_ins.r_fifo_pushed_data[28]
|
|
.sym 4269 w_smi_data_input[6]
|
|
.sym 4271 w_smi_data_input[1]
|
|
.sym 4366 w_rx_fifo_pulled_data[9]
|
|
.sym 4370 w_rx_fifo_pulled_data[11]
|
|
.sym 4377 $PACKER_VCC_NET
|
|
.sym 4379 rx_fifo.full_o_SB_DFF_Q_D_SB_LUT4_O_I0_SB_LUT4_O_1_I0[2]
|
|
.sym 4381 rx_fifo.full_o_SB_DFF_Q_D_SB_LUT4_O_I0_SB_LUT4_O_1_I0[1]
|
|
.sym 4383 w_smi_data_input[7]
|
|
.sym 4384 w_rx_fifo_data[8]
|
|
.sym 4388 $PACKER_VCC_NET
|
|
.sym 4407 w_smi_data_input[2]
|
|
.sym 4413 o_led1$SB_IO_OUT
|
|
.sym 4420 w_smi_data_input[5]
|
|
.sym 4424 w_smi_data_input[3]
|
|
.sym 4428 $PACKER_VCC_NET
|
|
.sym 4429 rx_fifo.empty_o_SB_DFF_Q_D_SB_LUT4_O_I0_SB_LUT4_O_1_I1_SB_LUT4_O_I3[2]
|
|
.sym 4430 rx_fifo.empty_o_SB_LUT4_I2_O[0]
|
|
.sym 4431 smi_ctrl_ins.r_fifo_pushed_data_SB_DFFNESR_Q_21_E
|
|
.sym 4443 w_lvds_rx_24_d0_SB_LUT4_I1_O_SB_LUT4_O_I0[1]
|
|
.sym 4446 $PACKER_VCC_NET
|
|
.sym 4450 w_lvds_rx_24_d0_SB_LUT4_I1_O_SB_LUT4_O_I0[0]
|
|
.sym 4451 w_lvds_rx_24_d0_SB_LUT4_I1_O_SB_LUT4_O_I0[0]
|
|
.sym 4454 $PACKER_VCC_NET
|
|
.sym 4455 lvds_rx_24_inst.r_state_if_SB_DFFESR_Q_R
|
|
.sym 4457 lvds_rx_24_inst.r_phase_count[1]
|
|
.sym 4459 w_lvds_rx_09_d1_SB_LUT4_I0_O_SB_LUT4_O_I0[1]
|
|
.sym 4460 w_lvds_rx_09_d1_SB_LUT4_I0_O_SB_LUT4_O_I0[2]
|
|
.sym 4461 lvds_rx_09_inst.r_phase_count_SB_LUT4_O_I3[0]
|
|
.sym 4467 w_lvds_rx_09_d1_SB_LUT4_I0_O[2]
|
|
.sym 4468 w_lvds_rx_24_d0_SB_LUT4_I1_O_SB_LUT4_O_I0[2]
|
|
.sym 4469 lvds_rx_24_inst.o_fifo_push_SB_DFFESR_Q_E
|
|
.sym 4471 lvds_rx_24_inst.r_phase_count_SB_LUT4_O_I3[0]
|
|
.sym 4474 $nextpnr_ICESTORM_LC_6$O
|
|
.sym 4476 w_lvds_rx_24_d0_SB_LUT4_I1_O_SB_LUT4_O_I0[0]
|
|
.sym 4480 lvds_rx_24_inst.r_phase_count_SB_CARRY_CI_CO[2]
|
|
.sym 4482 lvds_rx_24_inst.r_phase_count[1]
|
|
.sym 4483 $PACKER_VCC_NET
|
|
.sym 4484 w_lvds_rx_24_d0_SB_LUT4_I1_O_SB_LUT4_O_I0[0]
|
|
.sym 4487 $PACKER_VCC_NET
|
|
.sym 4488 w_lvds_rx_24_d0_SB_LUT4_I1_O_SB_LUT4_O_I0[2]
|
|
.sym 4490 lvds_rx_24_inst.r_phase_count_SB_CARRY_CI_CO[2]
|
|
.sym 4493 w_lvds_rx_24_d0_SB_LUT4_I1_O_SB_LUT4_O_I0[2]
|
|
.sym 4495 w_lvds_rx_24_d0_SB_LUT4_I1_O_SB_LUT4_O_I0[1]
|
|
.sym 4496 lvds_rx_24_inst.r_phase_count_SB_LUT4_O_I3[0]
|
|
.sym 4505 w_lvds_rx_24_d0_SB_LUT4_I1_O_SB_LUT4_O_I0[0]
|
|
.sym 4511 w_lvds_rx_09_d1_SB_LUT4_I0_O_SB_LUT4_O_I0[2]
|
|
.sym 4512 w_lvds_rx_09_d1_SB_LUT4_I0_O_SB_LUT4_O_I0[1]
|
|
.sym 4513 w_lvds_rx_09_d1_SB_LUT4_I0_O[2]
|
|
.sym 4514 lvds_rx_09_inst.r_phase_count_SB_LUT4_O_I3[0]
|
|
.sym 4517 w_lvds_rx_24_d0_SB_LUT4_I1_O_SB_LUT4_O_I0[1]
|
|
.sym 4521 lvds_rx_24_inst.o_fifo_push_SB_DFFESR_Q_E
|
|
.sym 4522 o_iq_tx_clk_p$SB_IO_OUT_$glb_clk
|
|
.sym 4523 lvds_rx_24_inst.r_state_if_SB_DFFESR_Q_R
|
|
.sym 4525 w_rx_fifo_pulled_data[0]
|
|
.sym 4529 w_rx_fifo_pulled_data[2]
|
|
.sym 4533 w_rx_fifo_pulled_data[11]
|
|
.sym 4534 smi_ctrl_ins.modem_tx_ctrl_SB_DFFNESR_Q_E
|
|
.sym 4537 rx_fifo.empty_o_SB_DFF_Q_D_SB_LUT4_O_I0_SB_LUT4_O_1_I1_SB_LUT4_O_I3[1]
|
|
.sym 4538 w_lvds_rx_09_d1_SB_LUT4_I0_O[0]
|
|
.sym 4540 w_rx_fifo_data[9]
|
|
.sym 4542 rx_fifo.rd_addr[9]
|
|
.sym 4543 rx_fifo.rd_addr[7]
|
|
.sym 4544 lvds_rx_24_inst.o_fifo_push_SB_DFFESR_Q_R_SB_LUT4_O_I1[0]
|
|
.sym 4546 rx_fifo.empty_o_SB_DFF_Q_D_SB_LUT4_O_I0_SB_LUT4_O_1_I1_SB_LUT4_O_1_I0[3]
|
|
.sym 4547 rx_fifo.rd_addr[8]
|
|
.sym 4548 rx_fifo.rd_addr[8]
|
|
.sym 4549 w_rx_fifo_data[4]
|
|
.sym 4550 rx_fifo.empty_o_SB_DFF_Q_D_SB_LUT4_O_I0_SB_LUT4_O_1_I1_SB_LUT4_O_I3[1]
|
|
.sym 4552 rx_fifo.rd_addr[0]
|
|
.sym 4554 w_rx_fifo_data[6]
|
|
.sym 4555 lvds_rx_24_inst.r_phase_count_SB_LUT4_O_I3[0]
|
|
.sym 4557 smi_ctrl_ins.r_fifo_pushed_data[18]
|
|
.sym 4558 rx_fifo.empty_o_SB_DFF_Q_D_SB_LUT4_O_I0_SB_LUT4_O_1_I1_SB_LUT4_O_1_I0[1]
|
|
.sym 4559 rx_fifo.rd_addr[0]
|
|
.sym 4567 lvds_rx_09_inst.o_fifo_push_SB_DFFESR_Q_E
|
|
.sym 4578 lvds_rx_09_inst.o_fifo_push_SB_DFFESR_Q_R
|
|
.sym 4579 o_led1$SB_IO_OUT
|
|
.sym 4581 w_rx_24_fifo_data[0]
|
|
.sym 4582 w_rx_09_fifo_data[0]
|
|
.sym 4590 lvds_rx_09_inst.o_fifo_push_SB_DFFESR_Q_D
|
|
.sym 4610 lvds_rx_09_inst.o_fifo_push_SB_DFFESR_Q_D
|
|
.sym 4634 w_rx_24_fifo_data[0]
|
|
.sym 4635 o_led1$SB_IO_OUT
|
|
.sym 4637 w_rx_09_fifo_data[0]
|
|
.sym 4644 lvds_rx_09_inst.o_fifo_push_SB_DFFESR_Q_E
|
|
.sym 4645 o_iq_tx_clk_p$SB_IO_OUT_$glb_clk
|
|
.sym 4646 lvds_rx_09_inst.o_fifo_push_SB_DFFESR_Q_R
|
|
.sym 4648 w_rx_fifo_pulled_data[1]
|
|
.sym 4652 w_rx_fifo_pulled_data[3]
|
|
.sym 4655 rx_fifo.full_o_SB_DFF_Q_D_SB_LUT4_O_I0_SB_LUT4_O_1_I0[1]
|
|
.sym 4659 rx_fifo.wr_addr[2]
|
|
.sym 4663 rx_fifo.wr_addr[8]
|
|
.sym 4665 rx_fifo.full_o_SB_LUT4_I3_1_O[3]
|
|
.sym 4666 w_smi_data_input[0]
|
|
.sym 4667 w_smi_data_input[4]
|
|
.sym 4669 rx_fifo.wr_addr[7]
|
|
.sym 4670 w_smi_data_input[5]
|
|
.sym 4674 w_rx_fifo_pulled_data[5]
|
|
.sym 4676 o_led1$SB_IO_OUT
|
|
.sym 4681 w_smi_data_input[3]
|
|
.sym 4682 smi_ctrl_ins.r_fifo_pushed_data_SB_DFFNESR_Q_9_E
|
|
.sym 4688 w_smi_data_input[4]
|
|
.sym 4693 w_smi_data_input[0]
|
|
.sym 4695 w_rx_09_fifo_data[1]
|
|
.sym 4696 w_smi_data_input[5]
|
|
.sym 4701 w_smi_data_input[3]
|
|
.sym 4703 w_smi_data_input[2]
|
|
.sym 4706 smi_ctrl_ins.r_fifo_pushed_data_SB_DFFNESR_Q_21_E
|
|
.sym 4717 w_rx_24_fifo_data[1]
|
|
.sym 4719 o_led1$SB_IO_OUT
|
|
.sym 4723 w_smi_data_input[4]
|
|
.sym 4728 o_led1$SB_IO_OUT
|
|
.sym 4729 w_rx_09_fifo_data[1]
|
|
.sym 4730 w_rx_24_fifo_data[1]
|
|
.sym 4736 w_smi_data_input[0]
|
|
.sym 4742 w_smi_data_input[2]
|
|
.sym 4758 w_smi_data_input[5]
|
|
.sym 4766 w_smi_data_input[3]
|
|
.sym 4767 smi_ctrl_ins.r_fifo_pushed_data_SB_DFFNESR_Q_21_E
|
|
.sym 4768 smi_ctrl_ins.swe_and_reset_$glb_clk
|
|
.sym 4769 i_rst_b_SB_LUT4_I3_O_$glb_sr
|
|
.sym 4771 w_rx_fifo_pulled_data[4]
|
|
.sym 4775 w_rx_fifo_pulled_data[6]
|
|
.sym 4782 $PACKER_VCC_NET
|
|
.sym 4783 lvds_rx_24_inst.o_fifo_push_SB_DFFESR_Q_E
|
|
.sym 4789 w_smi_data_input[0]
|
|
.sym 4791 w_rx_fifo_pull
|
|
.sym 4792 rx_fifo.rd_addr[9]
|
|
.sym 4794 smi_ctrl_ins.r_fifo_pushed_data[29]
|
|
.sym 4797 smi_ctrl_ins.r_fifo_pushed_data[20]
|
|
.sym 4798 w_rx_fifo_data[5]
|
|
.sym 4802 w_smi_data_input[2]
|
|
.sym 4805 o_led1$SB_IO_OUT
|
|
.sym 4812 w_lvds_rx_09_d1_SB_LUT4_I0_O[1]
|
|
.sym 4814 w_smi_data_input[4]
|
|
.sym 4815 w_smi_data_input[7]
|
|
.sym 4818 i_rst_b$SB_IO_IN
|
|
.sym 4820 w_smi_data_input[2]
|
|
.sym 4822 smi_ctrl_ins.tx_reg_state[0]
|
|
.sym 4827 w_lvds_rx_09_d1_SB_LUT4_I0_O[3]
|
|
.sym 4829 smi_ctrl_ins.r_fifo_pushed_data_SB_DFFNESR_Q_E[1]
|
|
.sym 4833 w_lvds_rx_09_d1_SB_LUT4_I0_O[0]
|
|
.sym 4835 w_lvds_rx_09_d1_SB_LUT4_I0_O[2]
|
|
.sym 4841 w_smi_data_input[3]
|
|
.sym 4844 w_lvds_rx_09_d1_SB_LUT4_I0_O[0]
|
|
.sym 4845 w_lvds_rx_09_d1_SB_LUT4_I0_O[1]
|
|
.sym 4846 w_lvds_rx_09_d1_SB_LUT4_I0_O[3]
|
|
.sym 4847 w_lvds_rx_09_d1_SB_LUT4_I0_O[2]
|
|
.sym 4850 i_rst_b$SB_IO_IN
|
|
.sym 4851 smi_ctrl_ins.tx_reg_state[0]
|
|
.sym 4856 smi_ctrl_ins.tx_reg_state[0]
|
|
.sym 4857 i_rst_b$SB_IO_IN
|
|
.sym 4858 w_smi_data_input[7]
|
|
.sym 4869 w_smi_data_input[4]
|
|
.sym 4877 w_smi_data_input[2]
|
|
.sym 4883 w_smi_data_input[3]
|
|
.sym 4890 smi_ctrl_ins.r_fifo_pushed_data_SB_DFFNESR_Q_E[1]
|
|
.sym 4891 smi_ctrl_ins.swe_and_reset_$glb_clk
|
|
.sym 4892 i_rst_b_SB_LUT4_I3_O_$glb_sr
|
|
.sym 4894 w_rx_fifo_pulled_data[5]
|
|
.sym 4898 w_rx_fifo_pulled_data[7]
|
|
.sym 4905 w_lvds_rx_09_d1_SB_LUT4_I0_O[0]
|
|
.sym 4906 w_lvds_rx_24_d0_SB_LUT4_I1_O_SB_LUT4_O_I0[2]
|
|
.sym 4909 rx_fifo.full_o_SB_DFF_Q_D_SB_LUT4_O_I0_SB_LUT4_O_I0_SB_LUT4_O_1_I3[3]
|
|
.sym 4910 rx_fifo.full_o_SB_DFF_Q_D_SB_LUT4_O_I0_SB_LUT4_O_1_I0[2]
|
|
.sym 4915 rx_fifo.full_o_SB_DFF_Q_D_SB_LUT4_O_I0_SB_LUT4_O_1_I0[1]
|
|
.sym 4916 $PACKER_VCC_NET
|
|
.sym 4917 smi_ctrl_ins.r_fifo_pushed_data[9]
|
|
.sym 4918 $PACKER_VCC_NET
|
|
.sym 4921 w_smi_data_input[3]
|
|
.sym 4924 $PACKER_VCC_NET
|
|
.sym 4925 rx_fifo.empty_o_SB_DFF_Q_D_SB_LUT4_O_I0_SB_LUT4_O_1_I1_SB_LUT4_O_I3[2]
|
|
.sym 4926 w_smi_data_input[5]
|
|
.sym 4927 rx_fifo.empty_o_SB_LUT4_I2_O[0]
|
|
.sym 4928 w_tx_fifo_data[19]
|
|
.sym 4935 w_smi_data_input[6]
|
|
.sym 4937 w_smi_data_input[1]
|
|
.sym 4941 $PACKER_VCC_NET
|
|
.sym 4945 w_smi_data_input[4]
|
|
.sym 4948 w_smi_data_input[5]
|
|
.sym 4952 smi_ctrl_ins.r_fifo_pushed_data_SB_DFFNESR_Q_9_E
|
|
.sym 4953 w_smi_data_input[3]
|
|
.sym 4955 smi_ctrl_ins.modem_tx_ctrl
|
|
.sym 4962 w_smi_data_input[2]
|
|
.sym 4967 w_smi_data_input[4]
|
|
.sym 4975 w_smi_data_input[6]
|
|
.sym 4980 w_smi_data_input[2]
|
|
.sym 4985 w_smi_data_input[5]
|
|
.sym 4992 w_smi_data_input[1]
|
|
.sym 4999 smi_ctrl_ins.modem_tx_ctrl
|
|
.sym 5006 w_smi_data_input[3]
|
|
.sym 5009 $PACKER_VCC_NET
|
|
.sym 5013 smi_ctrl_ins.r_fifo_pushed_data_SB_DFFNESR_Q_9_E
|
|
.sym 5014 smi_ctrl_ins.swe_and_reset_$glb_clk
|
|
.sym 5015 i_rst_b_SB_LUT4_I3_O_$glb_sr
|
|
.sym 5017 w_tx_fifo_pulled_data[12]
|
|
.sym 5021 w_tx_fifo_pulled_data[14]
|
|
.sym 5027 tx_fifo.empty_o_SB_DFF_Q_D_SB_LUT4_O_I1_SB_LUT4_O_1_I3[0]
|
|
.sym 5028 w_rx_fifo_data[7]
|
|
.sym 5029 rx_fifo.empty_o_SB_DFF_Q_D_SB_LUT4_O_I0_SB_LUT4_O_1_I1_SB_LUT4_O_2_I0[3]
|
|
.sym 5030 lvds_rx_24_inst.r_state_if_SB_DFFESR_Q_E
|
|
.sym 5031 w_lvds_rx_09_d1_SB_LUT4_I0_O[0]
|
|
.sym 5035 rx_fifo.rd_addr[7]
|
|
.sym 5037 rx_fifo.empty_o_SB_DFF_Q_D_SB_LUT4_O_I0_SB_LUT4_O_1_I1_SB_LUT4_O_1_I0[3]
|
|
.sym 5041 smi_ctrl_ins.modem_tx_ctrl
|
|
.sym 5043 w_tx_fifo_pulled_data[14]
|
|
.sym 5044 w_tx_fifo_data[12]
|
|
.sym 5045 smi_ctrl_ins.r_fifo_pushed_data[8]
|
|
.sym 5048 w_tx_fifo_data[28]
|
|
.sym 5049 smi_ctrl_ins.r_fifo_pushed_data[18]
|
|
.sym 5050 rx_fifo.rd_addr[0]
|
|
.sym 5051 w_tx_fifo_data[11]
|
|
.sym 5058 smi_ctrl_ins.r_fifo_pushed_data[19]
|
|
.sym 5060 smi_ctrl_ins.r_fifo_pushed_data[13]
|
|
.sym 5063 smi_ctrl_ins.r_fifo_pushed_data[22]
|
|
.sym 5066 smi_ctrl_ins.r_fifo_pushed_data[29]
|
|
.sym 5067 smi_ctrl_ins.r_fifo_pushed_data[20]
|
|
.sym 5068 smi_ctrl_ins.r_fifo_pushed_data[21]
|
|
.sym 5070 smi_ctrl_ins.r_fifo_pushed_data[16]
|
|
.sym 5083 smi_ctrl_ins.r_fifo_pushed_data[31]
|
|
.sym 5084 smi_ctrl_ins.r_fifo_pushed_data_SB_DFFNESR_Q_E_SB_LUT4_I2_O
|
|
.sym 5090 smi_ctrl_ins.r_fifo_pushed_data[16]
|
|
.sym 5099 smi_ctrl_ins.r_fifo_pushed_data[22]
|
|
.sym 5102 smi_ctrl_ins.r_fifo_pushed_data[21]
|
|
.sym 5108 smi_ctrl_ins.r_fifo_pushed_data[19]
|
|
.sym 5114 smi_ctrl_ins.r_fifo_pushed_data[29]
|
|
.sym 5120 smi_ctrl_ins.r_fifo_pushed_data[31]
|
|
.sym 5129 smi_ctrl_ins.r_fifo_pushed_data[13]
|
|
.sym 5132 smi_ctrl_ins.r_fifo_pushed_data[20]
|
|
.sym 5136 smi_ctrl_ins.r_fifo_pushed_data_SB_DFFNESR_Q_E_SB_LUT4_I2_O
|
|
.sym 5137 smi_ctrl_ins.swe_and_reset_$glb_clk
|
|
.sym 5138 smi_ctrl_ins.tx_reg_state_SB_LUT4_I3_O_$glb_sr
|
|
.sym 5140 w_tx_fifo_pulled_data[13]
|
|
.sym 5144 w_tx_fifo_pulled_data[15]
|
|
.sym 5149 tx_fifo.empty_o_SB_DFF_Q_D_SB_LUT4_O_I1_SB_LUT4_O_1_I3_SB_LUT4_O_I3[3]
|
|
.sym 5155 w_tx_fifo_data[22]
|
|
.sym 5156 tx_fifo.wr_addr[9]
|
|
.sym 5159 tx_fifo.full_o_SB_DFF_Q_D_SB_LUT4_O_I0_SB_LUT4_O_1_I2_SB_LUT4_O_I3[0]
|
|
.sym 5161 tx_fifo.wr_addr[3]
|
|
.sym 5164 w_tx_fifo_data[27]
|
|
.sym 5168 w_tx_fifo_data[29]
|
|
.sym 5169 w_tx_fifo_pulled_data[4]
|
|
.sym 5170 w_tx_fifo_data[31]
|
|
.sym 5172 o_led1$SB_IO_OUT
|
|
.sym 5173 w_tx_fifo_data[5]
|
|
.sym 5184 smi_ctrl_ins.r_fifo_pushed_data[11]
|
|
.sym 5186 smi_ctrl_ins.r_fifo_pushed_data[14]
|
|
.sym 5187 w_smi_data_input[4]
|
|
.sym 5189 smi_ctrl_ins.r_fifo_pushed_data[9]
|
|
.sym 5190 smi_ctrl_ins.r_fifo_pushed_data[17]
|
|
.sym 5191 smi_ctrl_ins.r_fifo_pushed_data_SB_DFFNESR_Q_E_SB_LUT4_I2_O
|
|
.sym 5193 w_smi_data_input[3]
|
|
.sym 5196 w_smi_data_input[5]
|
|
.sym 5205 smi_ctrl_ins.r_fifo_pushed_data[8]
|
|
.sym 5213 w_smi_data_input[3]
|
|
.sym 5219 w_smi_data_input[4]
|
|
.sym 5227 smi_ctrl_ins.r_fifo_pushed_data[9]
|
|
.sym 5232 smi_ctrl_ins.r_fifo_pushed_data[11]
|
|
.sym 5237 smi_ctrl_ins.r_fifo_pushed_data[8]
|
|
.sym 5243 smi_ctrl_ins.r_fifo_pushed_data[17]
|
|
.sym 5249 w_smi_data_input[5]
|
|
.sym 5258 smi_ctrl_ins.r_fifo_pushed_data[14]
|
|
.sym 5259 smi_ctrl_ins.r_fifo_pushed_data_SB_DFFNESR_Q_E_SB_LUT4_I2_O
|
|
.sym 5260 smi_ctrl_ins.swe_and_reset_$glb_clk
|
|
.sym 5261 smi_ctrl_ins.tx_reg_state_SB_LUT4_I3_O_$glb_sr
|
|
.sym 5263 w_tx_fifo_pulled_data[4]
|
|
.sym 5267 w_tx_fifo_pulled_data[6]
|
|
.sym 5275 tx_fifo.empty_o_SB_LUT4_I3_O_SB_LUT4_O_1_I0[3]
|
|
.sym 5277 tx_fifo.empty_o_SB_DFF_Q_D_SB_LUT4_O_I1_SB_LUT4_O_1_I3[2]
|
|
.sym 5278 tx_fifo.empty_o_SB_DFF_Q_D_SB_LUT4_O_I1_SB_LUT4_O_1_I3_SB_LUT4_O_I3[1]
|
|
.sym 5280 tx_fifo.empty_o_SB_DFF_Q_D_SB_LUT4_O_I1_SB_LUT4_O_1_I3_SB_LUT4_O_I3[2]
|
|
.sym 5281 tx_fifo.empty_o_SB_DFF_Q_D_SB_LUT4_O_I1_SB_LUT4_O_1_I3[1]
|
|
.sym 5282 tx_fifo.empty_o_SB_LUT4_I3_O_SB_LUT4_O_I0[3]
|
|
.sym 5283 w_tx_fifo_pulled_data[13]
|
|
.sym 5284 $PACKER_VCC_NET
|
|
.sym 5285 w_tx_fifo_data[21]
|
|
.sym 5287 w_tx_fifo_data[9]
|
|
.sym 5289 tx_fifo.wr_addr[8]
|
|
.sym 5290 tx_fifo.wr_addr[9]
|
|
.sym 5291 w_tx_fifo_data[8]
|
|
.sym 5292 w_tx_fifo_pulled_data[15]
|
|
.sym 5295 w_tx_fifo_data[25]
|
|
.sym 5296 tx_fifo.wr_addr[8]
|
|
.sym 5308 w_smi_data_input[1]
|
|
.sym 5309 smi_ctrl_ins.r_fifo_pushed_data[12]
|
|
.sym 5314 w_smi_data_input[2]
|
|
.sym 5315 w_smi_data_input[6]
|
|
.sym 5319 smi_ctrl_ins.r_fifo_pushed_data[18]
|
|
.sym 5322 smi_ctrl_ins.r_fifo_pushed_data[23]
|
|
.sym 5323 smi_ctrl_ins.r_fifo_pushed_data[28]
|
|
.sym 5329 smi_ctrl_ins.r_fifo_pushed_data[27]
|
|
.sym 5330 smi_ctrl_ins.r_fifo_pushed_data_SB_DFFNESR_Q_E_SB_LUT4_I2_O
|
|
.sym 5339 smi_ctrl_ins.r_fifo_pushed_data[23]
|
|
.sym 5345 w_smi_data_input[2]
|
|
.sym 5348 smi_ctrl_ins.r_fifo_pushed_data[12]
|
|
.sym 5354 w_smi_data_input[1]
|
|
.sym 5360 smi_ctrl_ins.r_fifo_pushed_data[28]
|
|
.sym 5366 w_smi_data_input[6]
|
|
.sym 5373 smi_ctrl_ins.r_fifo_pushed_data[27]
|
|
.sym 5381 smi_ctrl_ins.r_fifo_pushed_data[18]
|
|
.sym 5382 smi_ctrl_ins.r_fifo_pushed_data_SB_DFFNESR_Q_E_SB_LUT4_I2_O
|
|
.sym 5383 smi_ctrl_ins.swe_and_reset_$glb_clk
|
|
.sym 5384 smi_ctrl_ins.tx_reg_state_SB_LUT4_I3_O_$glb_sr
|
|
.sym 5386 w_tx_fifo_pulled_data[5]
|
|
.sym 5390 w_tx_fifo_pulled_data[7]
|
|
.sym 5397 w_tx_fifo_data[23]
|
|
.sym 5398 w_tx_fifo_pulled_data[21]
|
|
.sym 5399 w_tx_fifo_pulled_data[22]
|
|
.sym 5401 w_tx_fifo_data[3]
|
|
.sym 5402 tx_fifo.rd_addr_gray_SB_LUT4_I2_O[1]
|
|
.sym 5403 tx_fifo.wr_addr[6]
|
|
.sym 5404 lvds_tx_inst.r_phase_count_SB_DFF_D_Q[0]
|
|
.sym 5407 tx_fifo.wr_addr[7]
|
|
.sym 5408 $PACKER_VCC_NET
|
|
.sym 5409 $PACKER_VCC_NET
|
|
.sym 5410 tx_fifo.full_o_SB_DFF_Q_D_SB_LUT4_O_I0_SB_LUT4_O_1_I2_SB_LUT4_O_I3[0]
|
|
.sym 5411 tx_fifo.wr_addr[2]
|
|
.sym 5412 w_tx_fifo_data[2]
|
|
.sym 5413 tx_fifo.full_o_SB_DFF_Q_D_SB_LUT4_O_I0_SB_LUT4_O_1_I2_SB_LUT4_O_I3[0]
|
|
.sym 5414 $PACKER_VCC_NET
|
|
.sym 5415 tx_fifo.full_o_SB_DFF_Q_D_SB_LUT4_O_I0_SB_LUT4_O_1_I0_SB_LUT4_O_I3[1]
|
|
.sym 5416 w_tx_fifo_data[19]
|
|
.sym 5418 tx_fifo.empty_o_SB_LUT4_I3_O_SB_LUT4_O_I0[3]
|
|
.sym 5419 tx_fifo.wr_addr[5]
|
|
.sym 5420 w_tx_fifo_data[18]
|
|
.sym 5427 lvds_tx_inst.o_fifo_pull_SB_DFFSR_Q_R_SB_LUT4_O_I1[2]
|
|
.sym 5428 tx_fifo.wr_addr_gray_rd[5]
|
|
.sym 5429 w_lvds_tx_d1_SB_DFF_Q_D_SB_LUT4_O_1_I0_SB_LUT4_O_I2[2]
|
|
.sym 5430 lvds_tx_inst.o_fifo_pull_SB_DFFSR_Q_R_SB_LUT4_O_I1[3]
|
|
.sym 5431 w_lvds_tx_d1_SB_DFF_Q_D_SB_LUT4_O_1_I0_SB_LUT4_O_1_I2[2]
|
|
.sym 5433 w_lvds_tx_d1_SB_DFF_Q_D_SB_LUT4_O_1_I0_SB_LUT4_O_1_I2[1]
|
|
.sym 5435 w_lvds_tx_d1_SB_DFF_Q_D_SB_LUT4_O_1_I0_SB_LUT4_O_I2[1]
|
|
.sym 5436 w_lvds_tx_d1_SB_DFF_Q_D_SB_LUT4_O_1_I0_SB_LUT4_O_I2[3]
|
|
.sym 5437 w_lvds_tx_d1_SB_DFF_Q_D_SB_LUT4_O_I1[1]
|
|
.sym 5439 lvds_tx_inst.o_fifo_pull_SB_DFFSR_Q_R_SB_LUT4_O_I1[0]
|
|
.sym 5440 w_lvds_tx_d1_SB_DFF_Q_D_SB_LUT4_O_1_I0_SB_LUT4_O_1_I2[0]
|
|
.sym 5441 w_lvds_tx_d1_SB_DFF_Q_D_SB_LUT4_O_1_I0_SB_LUT4_O_1_I2[1]
|
|
.sym 5443 w_lvds_tx_d1_SB_DFF_Q_D_SB_LUT4_O_1_I0_SB_LUT4_O_I0[2]
|
|
.sym 5444 w_lvds_tx_d1_SB_DFF_Q_D_SB_LUT4_O_I1[2]
|
|
.sym 5446 w_lvds_tx_d1_SB_DFF_Q_D_SB_LUT4_O_1_I0_SB_LUT4_O_1_I2[3]
|
|
.sym 5447 w_lvds_tx_d1_SB_DFF_Q_D_SB_LUT4_O_1_I0[1]
|
|
.sym 5451 w_lvds_tx_d1_SB_DFF_Q_D_SB_LUT4_O_1_I0[2]
|
|
.sym 5452 lvds_tx_inst.r_fifo_data[9]
|
|
.sym 5453 w_lvds_tx_d1_SB_DFF_Q_D_SB_LUT4_O_1_I0_SB_LUT4_O_I0[1]
|
|
.sym 5454 w_lvds_tx_d1_SB_DFF_Q_D_SB_LUT4_O_1_I0[3]
|
|
.sym 5457 w_lvds_tx_d1_SB_DFF_Q_D_SB_LUT4_O_1_I0[0]
|
|
.sym 5459 tx_fifo.wr_addr_gray_rd[5]
|
|
.sym 5465 w_lvds_tx_d1_SB_DFF_Q_D_SB_LUT4_O_1_I0_SB_LUT4_O_I2[3]
|
|
.sym 5466 w_lvds_tx_d1_SB_DFF_Q_D_SB_LUT4_O_1_I0_SB_LUT4_O_I2[1]
|
|
.sym 5467 w_lvds_tx_d1_SB_DFF_Q_D_SB_LUT4_O_1_I0_SB_LUT4_O_I2[2]
|
|
.sym 5468 w_lvds_tx_d1_SB_DFF_Q_D_SB_LUT4_O_1_I0_SB_LUT4_O_I0[1]
|
|
.sym 5471 w_lvds_tx_d1_SB_DFF_Q_D_SB_LUT4_O_I1[2]
|
|
.sym 5472 w_lvds_tx_d1_SB_DFF_Q_D_SB_LUT4_O_1_I0_SB_LUT4_O_I0[2]
|
|
.sym 5473 w_lvds_tx_d1_SB_DFF_Q_D_SB_LUT4_O_I1[1]
|
|
.sym 5474 w_lvds_tx_d1_SB_DFF_Q_D_SB_LUT4_O_1_I0[3]
|
|
.sym 5477 w_lvds_tx_d1_SB_DFF_Q_D_SB_LUT4_O_1_I0[3]
|
|
.sym 5478 w_lvds_tx_d1_SB_DFF_Q_D_SB_LUT4_O_1_I0[0]
|
|
.sym 5479 w_lvds_tx_d1_SB_DFF_Q_D_SB_LUT4_O_1_I0[1]
|
|
.sym 5480 w_lvds_tx_d1_SB_DFF_Q_D_SB_LUT4_O_1_I0[2]
|
|
.sym 5484 lvds_tx_inst.r_fifo_data[9]
|
|
.sym 5485 w_lvds_tx_d1_SB_DFF_Q_D_SB_LUT4_O_1_I0_SB_LUT4_O_I0[1]
|
|
.sym 5486 w_lvds_tx_d1_SB_DFF_Q_D_SB_LUT4_O_1_I0_SB_LUT4_O_I0[2]
|
|
.sym 5489 w_lvds_tx_d1_SB_DFF_Q_D_SB_LUT4_O_1_I0_SB_LUT4_O_1_I2[1]
|
|
.sym 5490 lvds_tx_inst.o_fifo_pull_SB_DFFSR_Q_R_SB_LUT4_O_I1[0]
|
|
.sym 5491 lvds_tx_inst.o_fifo_pull_SB_DFFSR_Q_R_SB_LUT4_O_I1[2]
|
|
.sym 5492 lvds_tx_inst.o_fifo_pull_SB_DFFSR_Q_R_SB_LUT4_O_I1[3]
|
|
.sym 5501 w_lvds_tx_d1_SB_DFF_Q_D_SB_LUT4_O_1_I0_SB_LUT4_O_1_I2[2]
|
|
.sym 5502 w_lvds_tx_d1_SB_DFF_Q_D_SB_LUT4_O_1_I0_SB_LUT4_O_1_I2[3]
|
|
.sym 5503 w_lvds_tx_d1_SB_DFF_Q_D_SB_LUT4_O_1_I0_SB_LUT4_O_1_I2[0]
|
|
.sym 5504 w_lvds_tx_d1_SB_DFF_Q_D_SB_LUT4_O_1_I0_SB_LUT4_O_1_I2[1]
|
|
.sym 5506 o_iq_tx_clk_p$SB_IO_OUT_$glb_clk
|
|
.sym 5509 w_tx_fifo_pulled_data[16]
|
|
.sym 5513 w_tx_fifo_pulled_data[18]
|
|
.sym 5517 w_tx_fifo_pull
|
|
.sym 5519 tx_fifo.empty_o_SB_LUT4_I3_O[2]
|
|
.sym 5520 tx_fifo.empty_o_SB_DFF_Q_D_SB_LUT4_O_I1_SB_LUT4_O_1_I3[2]
|
|
.sym 5521 tx_fifo.rd_addr[0]
|
|
.sym 5522 w_tx_fifo_data[26]
|
|
.sym 5523 tx_fifo.empty_o_SB_LUT4_I3_O_SB_LUT4_O_1_I0[3]
|
|
.sym 5524 w_lvds_tx_d1_SB_DFF_Q_D_SB_LUT4_O_1_I0_SB_LUT4_O_I2[3]
|
|
.sym 5525 w_lvds_tx_d1_SB_DFF_Q_D_SB_LUT4_O_I1[1]
|
|
.sym 5526 tx_fifo.rd_addr_gray_wr_r[5]
|
|
.sym 5527 tx_fifo.empty_o_SB_DFF_Q_D_SB_LUT4_O_I1_SB_LUT4_O_1_I3_SB_LUT4_O_I3[2]
|
|
.sym 5530 tx_fifo.rd_addr_gray[7]
|
|
.sym 5532 w_tx_fifo_empty
|
|
.sym 5535 w_tx_fifo_push
|
|
.sym 5536 w_tx_fifo_data[28]
|
|
.sym 5539 w_tx_fifo_data[11]
|
|
.sym 5540 smi_ctrl_ins.modem_tx_ctrl
|
|
.sym 5543 w_tx_fifo_pulled_data[9]
|
|
.sym 5557 lvds_tx_inst.r_fifo_data[18]
|
|
.sym 5559 w_tx_fifo_pulled_data[13]
|
|
.sym 5564 w_tx_fifo_pulled_data[15]
|
|
.sym 5565 lvds_tx_inst.r_phase_count_SB_DFF_D_Q[0]
|
|
.sym 5566 w_tx_fifo_pulled_data[17]
|
|
.sym 5569 tx_fifo.empty_o_SB_DFF_Q_D_SB_LUT4_O_I1_SB_LUT4_O_1_I3_SB_LUT4_O_I3[1]
|
|
.sym 5570 w_tx_fifo_pulled_data[18]
|
|
.sym 5574 w_tx_fifo_pulled_data[16]
|
|
.sym 5575 lvds_tx_inst.r_fifo_data[15]
|
|
.sym 5577 lvds_tx_inst.r_fifo_data[16]
|
|
.sym 5579 lvds_tx_inst.r_fifo_data[13]
|
|
.sym 5580 lvds_tx_inst.r_phase_count_SB_LUT4_I1_1_O_SB_DFF_D_Q[2]
|
|
.sym 5583 w_tx_fifo_pulled_data[18]
|
|
.sym 5590 w_tx_fifo_pulled_data[17]
|
|
.sym 5594 w_tx_fifo_pulled_data[15]
|
|
.sym 5603 tx_fifo.empty_o_SB_DFF_Q_D_SB_LUT4_O_I1_SB_LUT4_O_1_I3_SB_LUT4_O_I3[1]
|
|
.sym 5608 w_tx_fifo_pulled_data[16]
|
|
.sym 5612 lvds_tx_inst.r_fifo_data[15]
|
|
.sym 5613 lvds_tx_inst.r_phase_count_SB_DFF_D_Q[0]
|
|
.sym 5614 lvds_tx_inst.r_fifo_data[13]
|
|
.sym 5615 lvds_tx_inst.r_phase_count_SB_LUT4_I1_1_O_SB_DFF_D_Q[2]
|
|
.sym 5621 w_tx_fifo_pulled_data[13]
|
|
.sym 5624 lvds_tx_inst.r_fifo_data[18]
|
|
.sym 5625 lvds_tx_inst.r_phase_count_SB_LUT4_I1_1_O_SB_DFF_D_Q[2]
|
|
.sym 5626 lvds_tx_inst.r_fifo_data[16]
|
|
.sym 5627 lvds_tx_inst.r_phase_count_SB_DFF_D_Q[0]
|
|
.sym 5628 w_lvds_tx_d1_SB_DFF_Q_D_SB_LUT4_O_1_I0_SB_LUT4_O_I0_SB_LUT4_I1_O_$glb_ce
|
|
.sym 5629 o_iq_tx_clk_p$SB_IO_OUT_$glb_clk
|
|
.sym 5630 o_led0$SB_IO_OUT_$glb_sr
|
|
.sym 5632 w_tx_fifo_pulled_data[17]
|
|
.sym 5636 w_tx_fifo_pulled_data[19]
|
|
.sym 5643 tx_fifo.full_o_SB_DFF_Q_D_SB_LUT4_O_I0_SB_LUT4_O_1_I0_SB_LUT4_O_I3[1]
|
|
.sym 5645 tx_fifo.empty_o_SB_LUT4_I3_O_SB_LUT4_O_1_I0[1]
|
|
.sym 5646 tx_fifo.wr_addr_gray_rd[3]
|
|
.sym 5647 tx_fifo.wr_addr[3]
|
|
.sym 5649 tx_fifo.empty_o_SB_DFF_Q_D_SB_LUT4_O_I1_SB_LUT4_O_I0_SB_LUT4_O_2_I3[0]
|
|
.sym 5650 tx_fifo.wr_addr_gray_rd[4]
|
|
.sym 5651 w_tx_fifo_data[24]
|
|
.sym 5653 w_lvds_tx_d1_SB_DFF_Q_D_SB_LUT4_O_1_I0_SB_LUT4_O_1_I2[1]
|
|
.sym 5654 tx_fifo.empty_o_SB_LUT4_I3_O[0]
|
|
.sym 5655 w_lvds_tx_d1_SB_DFF_Q_D_SB_LUT4_O_1_I0_SB_LUT4_O_I2_SB_LUT4_O_I2[2]
|
|
.sym 5656 tx_fifo.rd_addr_gray[8]
|
|
.sym 5659 o_led1$SB_IO_OUT
|
|
.sym 5661 w_tx_fifo_data[29]
|
|
.sym 5662 w_tx_fifo_data[31]
|
|
.sym 5663 tx_fifo.wr_addr_gray_rd[9]
|
|
.sym 5666 w_tx_fifo_pulled_data[31]
|
|
.sym 5672 lvds_tx_inst.r_fifo_data[8]
|
|
.sym 5675 tx_fifo.rd_addr[9]
|
|
.sym 5677 lvds_tx_inst.r_phase_count_SB_DFF_D_Q[0]
|
|
.sym 5679 lvds_tx_inst.r_fifo_data[10]
|
|
.sym 5680 tx_fifo.empty_o_SB_DFF_Q_D_SB_LUT4_O_I1_SB_LUT4_O_1_I3[0]
|
|
.sym 5682 lvds_tx_inst.r_fifo_data[29]
|
|
.sym 5684 tx_fifo.wr_addr_gray_rd_r[8]
|
|
.sym 5687 lvds_tx_inst.r_phase_count_SB_LUT4_I1_1_O_SB_DFF_D_Q[2]
|
|
.sym 5688 tx_fifo.empty_o_SB_DFF_Q_D_SB_LUT4_O_I1_SB_LUT4_O_1_I3_SB_LUT4_O_I3[2]
|
|
.sym 5689 w_tx_fifo_pulled_data[28]
|
|
.sym 5690 w_tx_fifo_pulled_data[31]
|
|
.sym 5692 tx_fifo.wr_addr_gray_rd_r[9]
|
|
.sym 5693 tx_fifo.empty_o_SB_DFF_Q_D_SB_LUT4_O_I1_SB_LUT4_O_I0_SB_LUT4_O_2_I3[2]
|
|
.sym 5694 tx_fifo.rd_addr_gray_SB_LUT4_I2_O[6]
|
|
.sym 5695 w_tx_fifo_pulled_data[8]
|
|
.sym 5699 lvds_tx_inst.r_fifo_data[31]
|
|
.sym 5703 w_tx_fifo_pulled_data[9]
|
|
.sym 5708 w_tx_fifo_pulled_data[8]
|
|
.sym 5713 w_tx_fifo_pulled_data[28]
|
|
.sym 5717 tx_fifo.rd_addr_gray_SB_LUT4_I2_O[6]
|
|
.sym 5718 tx_fifo.empty_o_SB_DFF_Q_D_SB_LUT4_O_I1_SB_LUT4_O_1_I3[0]
|
|
.sym 5720 tx_fifo.empty_o_SB_DFF_Q_D_SB_LUT4_O_I1_SB_LUT4_O_I0_SB_LUT4_O_2_I3[2]
|
|
.sym 5724 w_tx_fifo_pulled_data[31]
|
|
.sym 5729 lvds_tx_inst.r_phase_count_SB_LUT4_I1_1_O_SB_DFF_D_Q[2]
|
|
.sym 5730 lvds_tx_inst.r_fifo_data[29]
|
|
.sym 5731 lvds_tx_inst.r_fifo_data[31]
|
|
.sym 5732 lvds_tx_inst.r_phase_count_SB_DFF_D_Q[0]
|
|
.sym 5736 w_tx_fifo_pulled_data[9]
|
|
.sym 5741 lvds_tx_inst.r_fifo_data[8]
|
|
.sym 5742 lvds_tx_inst.r_fifo_data[10]
|
|
.sym 5743 lvds_tx_inst.r_phase_count_SB_LUT4_I1_1_O_SB_DFF_D_Q[2]
|
|
.sym 5744 lvds_tx_inst.r_phase_count_SB_DFF_D_Q[0]
|
|
.sym 5747 tx_fifo.wr_addr_gray_rd_r[8]
|
|
.sym 5748 tx_fifo.empty_o_SB_DFF_Q_D_SB_LUT4_O_I1_SB_LUT4_O_1_I3_SB_LUT4_O_I3[2]
|
|
.sym 5749 tx_fifo.rd_addr[9]
|
|
.sym 5750 tx_fifo.wr_addr_gray_rd_r[9]
|
|
.sym 5751 w_lvds_tx_d1_SB_DFF_Q_D_SB_LUT4_O_1_I0_SB_LUT4_O_I0_SB_LUT4_I1_O_$glb_ce
|
|
.sym 5752 o_iq_tx_clk_p$SB_IO_OUT_$glb_clk
|
|
.sym 5753 o_led0$SB_IO_OUT_$glb_sr
|
|
.sym 5755 w_tx_fifo_pulled_data[28]
|
|
.sym 5759 w_tx_fifo_pulled_data[30]
|
|
.sym 5768 lvds_tx_inst.r_fifo_data[29]
|
|
.sym 5770 tx_fifo.empty_o_SB_LUT4_I3_O_SB_LUT4_O_1_I0[2]
|
|
.sym 5771 tx_fifo.wr_addr[4]
|
|
.sym 5775 tx_fifo.empty_o_SB_LUT4_I3_O_SB_LUT4_O_1_I0[3]
|
|
.sym 5776 tx_fifo.empty_o_SB_DFF_Q_D_SB_LUT4_O_I1_SB_LUT4_O_1_I3_SB_LUT4_O_I3[2]
|
|
.sym 5779 tx_fifo.empty_o_SB_DFF_Q_D_SB_LUT4_O_I1_SB_LUT4_O_I0_SB_LUT4_O_2_I3[3]
|
|
.sym 5780 tx_fifo.wr_addr_gray_rd[7]
|
|
.sym 5781 w_tx_fifo_pulled_data[8]
|
|
.sym 5784 w_tx_fifo_data[8]
|
|
.sym 5785 tx_fifo.wr_addr[9]
|
|
.sym 5786 tx_fifo.wr_addr_gray_rd[0]
|
|
.sym 5787 w_tx_fifo_data[9]
|
|
.sym 5788 tx_fifo.wr_addr[8]
|
|
.sym 5789 w_tx_fifo_pull
|
|
.sym 5795 tx_fifo.wr_addr_gray_rd_r[0]
|
|
.sym 5799 w_smi_data_input[6]
|
|
.sym 5802 w_smi_data_input[7]
|
|
.sym 5804 tx_fifo.rd_addr_gray_SB_LUT4_I2_O[1]
|
|
.sym 5805 tx_fifo.rd_addr_gray_SB_LUT4_I2_O[2]
|
|
.sym 5806 tx_fifo.wr_addr_gray_rd_r[6]
|
|
.sym 5807 tx_fifo.rd_addr[0]
|
|
.sym 5813 smi_ctrl_ins.modem_tx_ctrl_SB_DFFNESR_Q_E
|
|
.sym 5823 tx_fifo.empty_o_SB_DFF_Q_D_SB_LUT4_O_I1_SB_LUT4_O_1_I3_SB_LUT4_O_I3[1]
|
|
.sym 5826 tx_fifo.empty_o_SB_DFF_Q_D_SB_LUT4_O_I1_SB_LUT4_O_1_I3[2]
|
|
.sym 5829 tx_fifo.rd_addr_gray_SB_LUT4_I2_O[2]
|
|
.sym 5830 tx_fifo.rd_addr_gray_SB_LUT4_I2_O[1]
|
|
.sym 5841 tx_fifo.empty_o_SB_DFF_Q_D_SB_LUT4_O_I1_SB_LUT4_O_1_I3_SB_LUT4_O_I3[1]
|
|
.sym 5846 tx_fifo.empty_o_SB_DFF_Q_D_SB_LUT4_O_I1_SB_LUT4_O_1_I3_SB_LUT4_O_I3[1]
|
|
.sym 5847 tx_fifo.empty_o_SB_DFF_Q_D_SB_LUT4_O_I1_SB_LUT4_O_1_I3[2]
|
|
.sym 5849 tx_fifo.wr_addr_gray_rd_r[6]
|
|
.sym 5854 w_smi_data_input[6]
|
|
.sym 5855 w_smi_data_input[7]
|
|
.sym 5858 tx_fifo.rd_addr[0]
|
|
.sym 5859 tx_fifo.wr_addr_gray_rd_r[0]
|
|
.sym 5871 tx_fifo.wr_addr_gray_rd_r[0]
|
|
.sym 5872 tx_fifo.rd_addr[0]
|
|
.sym 5873 tx_fifo.rd_addr_gray_SB_LUT4_I2_O[1]
|
|
.sym 5874 smi_ctrl_ins.modem_tx_ctrl_SB_DFFNESR_Q_E
|
|
.sym 5875 smi_ctrl_ins.swe_and_reset_$glb_clk
|
|
.sym 5876 i_rst_b_SB_LUT4_I3_O_$glb_sr
|
|
.sym 5878 w_tx_fifo_pulled_data[29]
|
|
.sym 5882 w_tx_fifo_pulled_data[31]
|
|
.sym 5891 tx_fifo.rd_addr[9]
|
|
.sym 5892 tx_fifo.wr_addr[2]
|
|
.sym 5894 tx_fifo.empty_o_SB_LUT4_I3_O_SB_LUT4_O_1_I0[3]
|
|
.sym 5895 tx_fifo.wr_addr[6]
|
|
.sym 5899 tx_fifo.wr_addr[7]
|
|
.sym 5900 $PACKER_VCC_NET
|
|
.sym 5901 $PACKER_VCC_NET
|
|
.sym 5902 tx_fifo.full_o_SB_DFF_Q_D_SB_LUT4_O_I0_SB_LUT4_O_1_I2_SB_LUT4_O_I3[0]
|
|
.sym 5904 w_lvds_tx_d1_SB_DFF_Q_D_SB_LUT4_O_1_I0_SB_LUT4_O_I0[1]
|
|
.sym 5905 $PACKER_VCC_NET
|
|
.sym 5906 $PACKER_VCC_NET
|
|
.sym 5907 w_tx_fifo_empty
|
|
.sym 5908 tx_fifo.wr_addr[5]
|
|
.sym 5909 tx_fifo.empty_o_SB_LUT4_I3_O_SB_LUT4_O_I0[1]
|
|
.sym 5910 tx_fifo.empty_o_SB_LUT4_I3_O_SB_LUT4_O_I0[3]
|
|
.sym 5919 tx_fifo.empty_o_SB_DFF_Q_D_SB_LUT4_O_I1[2]
|
|
.sym 5921 tx_fifo.wr_addr_gray_rd[6]
|
|
.sym 5923 tx_fifo.empty_o_SB_DFF_Q_D_SB_LUT4_O_I1_SB_LUT4_O_1_I3[1]
|
|
.sym 5925 tx_fifo.empty_o_SB_DFF_Q_D_SB_LUT4_O_I1_SB_LUT4_O_1_I3[2]
|
|
.sym 5930 tx_fifo.empty_o_SB_LUT4_I3_O[0]
|
|
.sym 5931 tx_fifo.empty_o_SB_LUT4_I3_O[1]
|
|
.sym 5932 tx_fifo.wr_addr_gray_rd[1]
|
|
.sym 5934 tx_fifo.empty_o_SB_DFF_Q_D_SB_LUT4_O_I1_SB_LUT4_O_1_I3[0]
|
|
.sym 5935 tx_fifo.wr_addr_gray_rd[9]
|
|
.sym 5938 tx_fifo.empty_o_SB_DFF_Q_D_SB_LUT4_O_I1_SB_LUT4_O_1_I3[3]
|
|
.sym 5939 tx_fifo.empty_o_SB_DFF_Q_D_SB_LUT4_O_I1[0]
|
|
.sym 5940 tx_fifo.wr_addr_gray_rd[7]
|
|
.sym 5942 tx_fifo.empty_o_SB_LUT4_I3_O[2]
|
|
.sym 5943 tx_fifo.empty_o_SB_DFF_Q_D_SB_LUT4_O_I1[1]
|
|
.sym 5946 tx_fifo.wr_addr_gray_rd[0]
|
|
.sym 5952 tx_fifo.wr_addr_gray_rd[0]
|
|
.sym 5957 tx_fifo.empty_o_SB_LUT4_I3_O[2]
|
|
.sym 5959 tx_fifo.empty_o_SB_LUT4_I3_O[0]
|
|
.sym 5960 tx_fifo.empty_o_SB_LUT4_I3_O[1]
|
|
.sym 5963 tx_fifo.wr_addr_gray_rd[7]
|
|
.sym 5971 tx_fifo.wr_addr_gray_rd[6]
|
|
.sym 5976 tx_fifo.wr_addr_gray_rd[1]
|
|
.sym 5981 tx_fifo.empty_o_SB_DFF_Q_D_SB_LUT4_O_I1_SB_LUT4_O_1_I3[1]
|
|
.sym 5982 tx_fifo.empty_o_SB_DFF_Q_D_SB_LUT4_O_I1_SB_LUT4_O_1_I3[3]
|
|
.sym 5983 tx_fifo.empty_o_SB_DFF_Q_D_SB_LUT4_O_I1_SB_LUT4_O_1_I3[2]
|
|
.sym 5984 tx_fifo.empty_o_SB_DFF_Q_D_SB_LUT4_O_I1_SB_LUT4_O_1_I3[0]
|
|
.sym 5988 tx_fifo.wr_addr_gray_rd[9]
|
|
.sym 5993 tx_fifo.empty_o_SB_DFF_Q_D_SB_LUT4_O_I1[0]
|
|
.sym 5994 tx_fifo.empty_o_SB_DFF_Q_D_SB_LUT4_O_I1[1]
|
|
.sym 5995 tx_fifo.empty_o_SB_DFF_Q_D_SB_LUT4_O_I1[2]
|
|
.sym 5998 o_iq_tx_clk_p$SB_IO_OUT_$glb_clk
|
|
.sym 6001 w_tx_fifo_pulled_data[8]
|
|
.sym 6005 w_tx_fifo_pulled_data[10]
|
|
.sym 6012 tx_fifo.empty_o_SB_DFF_Q_D_SB_LUT4_O_I1_SB_LUT4_O_1_I3_SB_LUT4_O_I3[2]
|
|
.sym 6013 tx_fifo.rd_addr[9]
|
|
.sym 6019 tx_fifo.empty_o_SB_LUT4_I3_O_SB_LUT4_O_I0[1]
|
|
.sym 6021 tx_fifo.empty_o_SB_DFF_Q_D_SB_LUT4_O_I1_SB_LUT4_O_1_I3[2]
|
|
.sym 6023 tx_fifo.empty_o_SB_LUT4_I3_O_SB_LUT4_O_I0[3]
|
|
.sym 6027 tx_fifo.rd_addr_gray_wr_r[1]
|
|
.sym 6030 w_tx_fifo_pulled_data[9]
|
|
.sym 6032 w_tx_fifo_data[11]
|
|
.sym 6035 w_tx_fifo_empty
|
|
.sym 6041 tx_fifo.empty_o_SB_DFF_Q_D_SB_LUT4_O_I1_SB_LUT4_O_I0[3]
|
|
.sym 6042 tx_fifo.empty_o_SB_DFF_Q_D_SB_LUT4_O_I1_SB_LUT4_O_I0_SB_LUT4_O_2_I3[1]
|
|
.sym 6043 tx_fifo.empty_o_SB_DFF_Q_D_SB_LUT4_O_I1_SB_LUT4_O_I0_SB_LUT4_O_2_I3[0]
|
|
.sym 6044 tx_fifo.empty_o_SB_DFF_Q_D_SB_LUT4_O_I1_SB_LUT4_O_I0[0]
|
|
.sym 6045 tx_fifo.empty_o_SB_LUT4_I3_O_SB_LUT4_O_I0[1]
|
|
.sym 6046 tx_fifo.rd_addr_gray_SB_LUT4_I2_O[2]
|
|
.sym 6047 tx_fifo.empty_o_SB_DFF_Q_D_SB_LUT4_O_I1_SB_LUT4_O_I0_SB_LUT4_O_I0[1]
|
|
.sym 6049 tx_fifo.empty_o_SB_DFF_Q_D_SB_LUT4_O_I1_SB_LUT4_O_I0_SB_LUT4_O_2_I3[3]
|
|
.sym 6050 tx_fifo.empty_o_SB_DFF_Q_D_SB_LUT4_O_I1_SB_LUT4_O_I0_SB_LUT4_O_I0[3]
|
|
.sym 6051 tx_fifo.empty_o_SB_LUT4_I3_O_SB_LUT4_O_I0[0]
|
|
.sym 6052 tx_fifo.empty_o_SB_DFF_Q_D_SB_LUT4_O_I1_SB_LUT4_O_I0_SB_LUT4_O_2_I3[2]
|
|
.sym 6053 tx_fifo.empty_o_SB_LUT4_I3_O_SB_LUT4_O_I0[2]
|
|
.sym 6055 tx_fifo.empty_o_SB_DFF_Q_D_SB_LUT4_O_I1_SB_LUT4_O_I0[2]
|
|
.sym 6056 tx_fifo.rd_addr_gray_SB_LUT4_I2_O[3]
|
|
.sym 6058 lvds_tx_inst.r_phase_count_SB_LUT4_I1_1_O_SB_DFF_D_Q[2]
|
|
.sym 6059 w_tx_fifo_pull
|
|
.sym 6060 tx_fifo.empty_o_SB_DFF_Q_D_SB_LUT4_O_I1_SB_LUT4_O_I0_SB_LUT4_O_I0[0]
|
|
.sym 6061 tx_fifo.empty_o_SB_DFF_Q_D_SB_LUT4_O_I1_SB_LUT4_O_I0[1]
|
|
.sym 6065 tx_fifo.rd_addr_gray_SB_LUT4_I2_O[8]
|
|
.sym 6066 tx_fifo.rd_addr_gray_SB_LUT4_I2_O[9]
|
|
.sym 6069 tx_fifo.empty_o_SB_DFF_Q_D_SB_LUT4_O_I1_SB_LUT4_O_I0_SB_LUT4_O_I0[2]
|
|
.sym 6070 tx_fifo.empty_o_SB_LUT4_I3_O_SB_LUT4_O_I0[3]
|
|
.sym 6071 lvds_tx_inst.r_phase_count_SB_DFF_D_Q[0]
|
|
.sym 6075 tx_fifo.rd_addr_gray_SB_LUT4_I2_O[2]
|
|
.sym 6076 tx_fifo.rd_addr_gray_SB_LUT4_I2_O[3]
|
|
.sym 6080 tx_fifo.empty_o_SB_DFF_Q_D_SB_LUT4_O_I1_SB_LUT4_O_I0[2]
|
|
.sym 6081 tx_fifo.empty_o_SB_DFF_Q_D_SB_LUT4_O_I1_SB_LUT4_O_I0[3]
|
|
.sym 6082 tx_fifo.empty_o_SB_DFF_Q_D_SB_LUT4_O_I1_SB_LUT4_O_I0[0]
|
|
.sym 6083 tx_fifo.empty_o_SB_DFF_Q_D_SB_LUT4_O_I1_SB_LUT4_O_I0[1]
|
|
.sym 6086 tx_fifo.rd_addr_gray_SB_LUT4_I2_O[9]
|
|
.sym 6089 tx_fifo.rd_addr_gray_SB_LUT4_I2_O[8]
|
|
.sym 6098 tx_fifo.empty_o_SB_DFF_Q_D_SB_LUT4_O_I1_SB_LUT4_O_I0_SB_LUT4_O_I0[1]
|
|
.sym 6099 tx_fifo.empty_o_SB_DFF_Q_D_SB_LUT4_O_I1_SB_LUT4_O_I0_SB_LUT4_O_I0[2]
|
|
.sym 6100 tx_fifo.empty_o_SB_DFF_Q_D_SB_LUT4_O_I1_SB_LUT4_O_I0_SB_LUT4_O_I0[3]
|
|
.sym 6101 tx_fifo.empty_o_SB_DFF_Q_D_SB_LUT4_O_I1_SB_LUT4_O_I0_SB_LUT4_O_I0[0]
|
|
.sym 6104 tx_fifo.empty_o_SB_LUT4_I3_O_SB_LUT4_O_I0[2]
|
|
.sym 6105 tx_fifo.empty_o_SB_LUT4_I3_O_SB_LUT4_O_I0[1]
|
|
.sym 6106 tx_fifo.empty_o_SB_LUT4_I3_O_SB_LUT4_O_I0[0]
|
|
.sym 6107 tx_fifo.empty_o_SB_LUT4_I3_O_SB_LUT4_O_I0[3]
|
|
.sym 6110 tx_fifo.empty_o_SB_DFF_Q_D_SB_LUT4_O_I1_SB_LUT4_O_I0_SB_LUT4_O_2_I3[0]
|
|
.sym 6111 tx_fifo.empty_o_SB_DFF_Q_D_SB_LUT4_O_I1_SB_LUT4_O_I0_SB_LUT4_O_2_I3[1]
|
|
.sym 6112 tx_fifo.empty_o_SB_DFF_Q_D_SB_LUT4_O_I1_SB_LUT4_O_I0_SB_LUT4_O_2_I3[2]
|
|
.sym 6113 tx_fifo.empty_o_SB_DFF_Q_D_SB_LUT4_O_I1_SB_LUT4_O_I0_SB_LUT4_O_2_I3[3]
|
|
.sym 6116 lvds_tx_inst.r_phase_count_SB_LUT4_I1_1_O_SB_DFF_D_Q[2]
|
|
.sym 6118 lvds_tx_inst.r_phase_count_SB_DFF_D_Q[0]
|
|
.sym 6120 w_tx_fifo_pull
|
|
.sym 6121 o_iq_tx_clk_p$SB_IO_OUT_$glb_clk
|
|
.sym 6124 w_tx_fifo_pulled_data[9]
|
|
.sym 6128 w_tx_fifo_pulled_data[11]
|
|
.sym 6135 tx_fifo.empty_o_SB_DFF_Q_D_SB_LUT4_O_I1_SB_LUT4_O_1_I3[1]
|
|
.sym 6142 tx_fifo.wr_addr[7]
|
|
.sym 6143 tx_fifo.full_o_SB_DFF_Q_D_SB_LUT4_O_I0_SB_LUT4_O_1_I0_SB_LUT4_O_I3[1]
|
|
.sym 6144 tx_fifo.wr_addr[4]
|
|
.sym 6145 tx_fifo.wr_addr[3]
|
|
.sym 6146 tx_fifo.full_o_SB_DFF_Q_D_SB_LUT4_O_I0_SB_LUT4_O_1_I2_SB_LUT4_O_I3[0]
|
|
.sym 6148 tx_fifo.rd_addr_gray[8]
|
|
.sym 6150 w_tx_fifo_pulled_data[11]
|
|
.sym 6151 o_led1$SB_IO_OUT
|
|
.sym 6153 tx_fifo.rd_addr_gray_wr_r[1]
|
|
.sym 6167 tx_fifo.empty_o_SB_LUT4_I3_O_SB_LUT4_O_1_I0[0]
|
|
.sym 6168 tx_fifo.rd_addr_gray_wr[6]
|
|
.sym 6170 tx_fifo.empty_o_SB_LUT4_I3_O_SB_LUT4_O_1_I0[3]
|
|
.sym 6172 tx_fifo.empty_o_SB_LUT4_I3_O_SB_LUT4_O_1_I0[2]
|
|
.sym 6173 tx_fifo.empty_o_SB_DFF_Q_D_SB_LUT4_O_I1_SB_LUT4_O_1_I3_SB_LUT4_O_I3[1]
|
|
.sym 6176 tx_fifo.empty_o_SB_DFF_Q_D_SB_LUT4_O_I1_SB_LUT4_O_1_I3_SB_LUT4_O_I3[0]
|
|
.sym 6178 lvds_tx_inst.r_phase_count_SB_DFF_D_Q[0]
|
|
.sym 6184 tx_fifo.rd_addr_gray[6]
|
|
.sym 6185 tx_fifo.rd_addr_gray[1]
|
|
.sym 6186 tx_fifo.empty_o_SB_DFF_Q_D_SB_LUT4_O_I1_SB_LUT4_O_1_I3_SB_LUT4_O_I3[3]
|
|
.sym 6190 tx_fifo.empty_o_SB_DFF_Q_D_SB_LUT4_O_I1_SB_LUT4_O_1_I3_SB_LUT4_O_I3[2]
|
|
.sym 6191 tx_fifo.rd_addr_gray_wr[1]
|
|
.sym 6193 tx_fifo.empty_o_SB_LUT4_I3_O_SB_LUT4_O_1_I0[1]
|
|
.sym 6203 lvds_tx_inst.r_phase_count_SB_DFF_D_Q[0]
|
|
.sym 6209 tx_fifo.empty_o_SB_DFF_Q_D_SB_LUT4_O_I1_SB_LUT4_O_1_I3_SB_LUT4_O_I3[3]
|
|
.sym 6210 tx_fifo.empty_o_SB_DFF_Q_D_SB_LUT4_O_I1_SB_LUT4_O_1_I3_SB_LUT4_O_I3[2]
|
|
.sym 6211 tx_fifo.empty_o_SB_DFF_Q_D_SB_LUT4_O_I1_SB_LUT4_O_1_I3_SB_LUT4_O_I3[1]
|
|
.sym 6212 tx_fifo.empty_o_SB_DFF_Q_D_SB_LUT4_O_I1_SB_LUT4_O_1_I3_SB_LUT4_O_I3[0]
|
|
.sym 6215 tx_fifo.rd_addr_gray[1]
|
|
.sym 6221 tx_fifo.rd_addr_gray[6]
|
|
.sym 6230 tx_fifo.rd_addr_gray_wr[6]
|
|
.sym 6233 tx_fifo.empty_o_SB_LUT4_I3_O_SB_LUT4_O_1_I0[3]
|
|
.sym 6234 tx_fifo.empty_o_SB_LUT4_I3_O_SB_LUT4_O_1_I0[0]
|
|
.sym 6235 tx_fifo.empty_o_SB_LUT4_I3_O_SB_LUT4_O_1_I0[1]
|
|
.sym 6236 tx_fifo.empty_o_SB_LUT4_I3_O_SB_LUT4_O_1_I0[2]
|
|
.sym 6242 tx_fifo.rd_addr_gray_wr[1]
|
|
.sym 6244 r_counter_$glb_clk
|
|
.sym 6246 o_led1$SB_IO_OUT
|
|
.sym 6254 tx_fifo.empty_o_SB_LUT4_I3_O_SB_LUT4_O_1_I0[2]
|
|
.sym 6256 tx_fifo.full_o_SB_DFF_Q_D_SB_LUT4_O_I0_SB_LUT4_O_I0_SB_LUT4_O_1_I3[0]
|
|
.sym 6258 tx_fifo.empty_o_SB_DFF_Q_D_SB_LUT4_O_I1_SB_LUT4_O_1_I3_SB_LUT4_O_I3[2]
|
|
.sym 6264 tx_fifo.wr_addr_gray_rd_r[8]
|
|
.sym 6265 tx_fifo.empty_o_SB_DFF_Q_D_SB_LUT4_O_I1_SB_LUT4_O_1_I3_SB_LUT4_O_I3[1]
|
|
.sym 6271 w_tx_fifo_data[9]
|
|
.sym 6274 tx_fifo.rd_addr[9]
|
|
.sym 6294 o_shdn_tx_lna$SB_IO_OUT
|
|
.sym 6314 o_shdn_tx_lna$SB_IO_OUT
|
|
.sym 6318 tx_fifo.empty_o_SB_DFF_Q_D_SB_LUT4_O_I1_SB_LUT4_O_1_I3_SB_LUT4_O_I3[2]
|
|
.sym 6346 w_rx_09_fifo_data[4]
|
|
.sym 6347 w_rx_09_fifo_data[2]
|
|
.sym 6348 w_rx_09_fifo_data[3]
|
|
.sym 6349 w_rx_09_fifo_data[9]
|
|
.sym 6350 rx_fifo.full_o_SB_DFF_Q_D_SB_LUT4_O_I0[3]
|
|
.sym 6351 w_rx_fifo_data[3]
|
|
.sym 6352 w_rx_09_fifo_data[7]
|
|
.sym 6353 w_rx_09_fifo_data[5]
|
|
.sym 6378 w_smi_data_input[2]
|
|
.sym 6380 w_smi_data_input[5]
|
|
.sym 6386 w_rx_fifo_data[8]
|
|
.sym 6390 rx_fifo.wr_addr[4]
|
|
.sym 6392 rx_fifo.wr_addr[6]
|
|
.sym 6393 rx_fifo.full_o_SB_DFF_Q_D_SB_LUT4_O_I0_SB_LUT4_O_1_I0[1]
|
|
.sym 6394 rx_fifo.wr_addr[7]
|
|
.sym 6395 w_rx_fifo_data[10]
|
|
.sym 6396 rx_fifo.wr_addr[3]
|
|
.sym 6399 $PACKER_VCC_NET
|
|
.sym 6400 rx_fifo.wr_addr[5]
|
|
.sym 6401 rx_fifo.full_o_SB_DFF_Q_D_SB_LUT4_O_I0_SB_LUT4_O_1_I0[2]
|
|
.sym 6402 rx_fifo.wr_addr[2]
|
|
.sym 6403 rx_fifo.wr_addr[9]
|
|
.sym 6413 w_rx_fifo_push
|
|
.sym 6415 rx_fifo.wr_addr[8]
|
|
.sym 6418 w_smi_data_input[6]
|
|
.sym 6422 rx_fifo.full_o_SB_LUT4_I3_1_O_SB_LUT4_I0_O[2]
|
|
.sym 6423 smi_ctrl_ins.r_fifo_pulled_data[8]
|
|
.sym 6424 smi_ctrl_ins.o_smi_data_out_SB_DFFNE_Q_D_SB_LUT4_O_2_I3[0]
|
|
.sym 6425 smi_ctrl_ins.r_fifo_pulled_data[9]
|
|
.sym 6427 smi_ctrl_ins.r_fifo_pulled_data[10]
|
|
.sym 6428 smi_ctrl_ins.o_smi_data_out_SB_DFFNE_Q_D_SB_LUT4_O_7_I3[0]
|
|
.sym 6429 lvds_rx_24_inst.r_state_if_SB_DFFESR_Q_R
|
|
.sym 6438 rx_fifo.wr_addr[2]
|
|
.sym 6439 rx_fifo.wr_addr[3]
|
|
.sym 6441 rx_fifo.wr_addr[4]
|
|
.sym 6442 rx_fifo.wr_addr[5]
|
|
.sym 6443 rx_fifo.wr_addr[6]
|
|
.sym 6444 rx_fifo.wr_addr[7]
|
|
.sym 6445 rx_fifo.wr_addr[8]
|
|
.sym 6446 rx_fifo.wr_addr[9]
|
|
.sym 6447 rx_fifo.full_o_SB_DFF_Q_D_SB_LUT4_O_I0_SB_LUT4_O_1_I0[2]
|
|
.sym 6448 rx_fifo.full_o_SB_DFF_Q_D_SB_LUT4_O_I0_SB_LUT4_O_1_I0[1]
|
|
.sym 6449 o_iq_tx_clk_p$SB_IO_OUT_$glb_clk
|
|
.sym 6450 w_rx_fifo_push
|
|
.sym 6452 w_rx_fifo_data[8]
|
|
.sym 6456 w_rx_fifo_data[10]
|
|
.sym 6459 $PACKER_VCC_NET
|
|
.sym 6460 o_led1$SB_IO_OUT
|
|
.sym 6463 o_led1$SB_IO_OUT
|
|
.sym 6464 w_rx_fifo_data[4]
|
|
.sym 6473 w_rx_fifo_data[6]
|
|
.sym 6474 o_led0$SB_IO_OUT
|
|
.sym 6475 w_rx_fifo_data[10]
|
|
.sym 6490 rx_fifo.wr_addr[8]
|
|
.sym 6492 w_smi_data_output[6]
|
|
.sym 6493 rx_fifo.wr_addr[7]
|
|
.sym 6495 rx_fifo.wr_addr[3]
|
|
.sym 6496 rx_fifo.full_o_SB_DFF_Q_D_SB_LUT4_O_I0_SB_LUT4_O_1_I0[2]
|
|
.sym 6497 rx_fifo.wr_addr[4]
|
|
.sym 6500 rx_fifo.wr_addr[6]
|
|
.sym 6502 rx_fifo.wr_addr[2]
|
|
.sym 6513 w_rx_fifo_data[3]
|
|
.sym 6520 rx_fifo.wr_addr[5]
|
|
.sym 6523 rx_fifo.wr_addr[9]
|
|
.sym 6528 w_rx_fifo_data[11]
|
|
.sym 6529 rx_fifo.rd_addr[9]
|
|
.sym 6530 w_rx_fifo_pull
|
|
.sym 6532 rx_fifo.rd_addr[8]
|
|
.sym 6533 rx_fifo.empty_o_SB_DFF_Q_D_SB_LUT4_O_I0_SB_LUT4_O_1_I1_SB_LUT4_O_1_I0[3]
|
|
.sym 6534 rx_fifo.empty_o_SB_DFF_Q_D_SB_LUT4_O_I0_SB_LUT4_O_1_I1_SB_LUT4_O_2_I0[3]
|
|
.sym 6536 rx_fifo.rd_addr[7]
|
|
.sym 6540 rx_fifo.empty_o_SB_DFF_Q_D_SB_LUT4_O_I0_SB_LUT4_O_1_I1_SB_LUT4_O_I3[1]
|
|
.sym 6543 w_rx_fifo_data[9]
|
|
.sym 6544 rx_fifo.empty_o_SB_DFF_Q_D_SB_LUT4_O_I0_SB_LUT4_O_1_I1_SB_LUT4_O_I3[2]
|
|
.sym 6548 $PACKER_VCC_NET
|
|
.sym 6550 rx_fifo.empty_o_SB_DFF_Q_D_SB_LUT4_O_I0_SB_LUT4_O_1_I1_SB_LUT4_O_1_I0[1]
|
|
.sym 6551 rx_fifo.rd_addr[0]
|
|
.sym 6555 rx_fifo.empty_o_SB_LUT4_I2_O[0]
|
|
.sym 6560 rx_fifo.wr_addr[7]
|
|
.sym 6561 rx_fifo.wr_addr[3]
|
|
.sym 6562 rx_fifo.wr_addr[4]
|
|
.sym 6563 rx_fifo.wr_addr[6]
|
|
.sym 6564 rx_fifo.wr_addr[2]
|
|
.sym 6566 rx_fifo.full_o_SB_LUT4_I3_1_O[3]
|
|
.sym 6567 rx_fifo.wr_addr[5]
|
|
.sym 6576 rx_fifo.empty_o_SB_DFF_Q_D_SB_LUT4_O_I0_SB_LUT4_O_1_I1_SB_LUT4_O_1_I0[1]
|
|
.sym 6577 rx_fifo.empty_o_SB_DFF_Q_D_SB_LUT4_O_I0_SB_LUT4_O_1_I1_SB_LUT4_O_1_I0[3]
|
|
.sym 6579 rx_fifo.empty_o_SB_DFF_Q_D_SB_LUT4_O_I0_SB_LUT4_O_1_I1_SB_LUT4_O_2_I0[3]
|
|
.sym 6580 rx_fifo.empty_o_SB_DFF_Q_D_SB_LUT4_O_I0_SB_LUT4_O_1_I1_SB_LUT4_O_I3[1]
|
|
.sym 6581 rx_fifo.empty_o_SB_DFF_Q_D_SB_LUT4_O_I0_SB_LUT4_O_1_I1_SB_LUT4_O_I3[2]
|
|
.sym 6582 rx_fifo.rd_addr[7]
|
|
.sym 6583 rx_fifo.rd_addr[8]
|
|
.sym 6584 rx_fifo.rd_addr[9]
|
|
.sym 6585 rx_fifo.empty_o_SB_LUT4_I2_O[0]
|
|
.sym 6586 rx_fifo.rd_addr[0]
|
|
.sym 6587 r_counter_$glb_clk
|
|
.sym 6588 w_rx_fifo_pull
|
|
.sym 6589 $PACKER_VCC_NET
|
|
.sym 6593 w_rx_fifo_data[11]
|
|
.sym 6597 w_rx_fifo_data[9]
|
|
.sym 6602 w_rx_fifo_data[11]
|
|
.sym 6603 smi_ctrl_ins.o_smi_data_out_SB_DFFNE_Q_D_SB_LUT4_O_7_I3[0]
|
|
.sym 6604 w_rx_fifo_pull
|
|
.sym 6606 w_rx_fifo_pulled_data[5]
|
|
.sym 6608 o_led1$SB_IO_OUT
|
|
.sym 6609 w_smi_data_input[3]
|
|
.sym 6610 rx_fifo.empty_o_SB_DFF_Q_D_SB_LUT4_O_I0_SB_LUT4_O_1_I1_SB_LUT4_O_2_I0[3]
|
|
.sym 6614 rx_fifo.wr_addr[9]
|
|
.sym 6615 rx_fifo.wr_addr[2]
|
|
.sym 6617 w_rx_fifo_push
|
|
.sym 6619 rx_fifo.empty_o_SB_DFF_Q_D_SB_LUT4_O_I0_SB_LUT4_O_1_I1_SB_LUT4_O_2_I0[3]
|
|
.sym 6620 rx_fifo.full_o_SB_DFF_Q_D_SB_LUT4_O_I0_SB_LUT4_O_I0_SB_LUT4_O_I0[0]
|
|
.sym 6621 rx_fifo.wr_addr[5]
|
|
.sym 6622 rx_fifo.wr_addr[9]
|
|
.sym 6623 rx_fifo.rd_addr_gray_wr_r[1]
|
|
.sym 6624 rx_fifo.rd_addr[7]
|
|
.sym 6631 rx_fifo.wr_addr[9]
|
|
.sym 6632 w_rx_fifo_push
|
|
.sym 6633 rx_fifo.full_o_SB_DFF_Q_D_SB_LUT4_O_I0_SB_LUT4_O_1_I0[1]
|
|
.sym 6634 $PACKER_VCC_NET
|
|
.sym 6636 w_rx_fifo_data[0]
|
|
.sym 6641 rx_fifo.full_o_SB_DFF_Q_D_SB_LUT4_O_I0_SB_LUT4_O_1_I0[2]
|
|
.sym 6645 rx_fifo.wr_addr[8]
|
|
.sym 6647 rx_fifo.wr_addr[3]
|
|
.sym 6648 rx_fifo.wr_addr[4]
|
|
.sym 6650 rx_fifo.wr_addr[2]
|
|
.sym 6653 rx_fifo.wr_addr[5]
|
|
.sym 6654 rx_fifo.wr_addr[7]
|
|
.sym 6657 rx_fifo.wr_addr[6]
|
|
.sym 6661 w_rx_fifo_data[2]
|
|
.sym 6663 rx_fifo.full_o_SB_DFF_Q_D_SB_LUT4_O_I0_SB_LUT4_O_2_I0[2]
|
|
.sym 6664 rx_fifo.full_o_SB_DFF_Q_D_SB_LUT4_O_I0_SB_LUT4_O_2_I0[3]
|
|
.sym 6665 rx_fifo.full_o_SB_DFF_Q_D_SB_LUT4_O_I0_SB_LUT4_O_2_I2[3]
|
|
.sym 6666 rx_fifo.full_o_SB_DFF_Q_D_SB_LUT4_O_I0_SB_LUT4_O_2_I2[4]
|
|
.sym 6667 rx_fifo.full_o_SB_DFF_Q_D_SB_LUT4_O_I0_SB_LUT4_O_2_I2[5]
|
|
.sym 6668 rx_fifo.full_o_SB_DFF_Q_D_SB_LUT4_O_I0_SB_LUT4_O_2_I2[6]
|
|
.sym 6669 rx_fifo.full_o_SB_DFF_Q_D_SB_LUT4_O_I0_SB_LUT4_O_I0[2]
|
|
.sym 6678 rx_fifo.wr_addr[2]
|
|
.sym 6679 rx_fifo.wr_addr[3]
|
|
.sym 6681 rx_fifo.wr_addr[4]
|
|
.sym 6682 rx_fifo.wr_addr[5]
|
|
.sym 6683 rx_fifo.wr_addr[6]
|
|
.sym 6684 rx_fifo.wr_addr[7]
|
|
.sym 6685 rx_fifo.wr_addr[8]
|
|
.sym 6686 rx_fifo.wr_addr[9]
|
|
.sym 6687 rx_fifo.full_o_SB_DFF_Q_D_SB_LUT4_O_I0_SB_LUT4_O_1_I0[2]
|
|
.sym 6688 rx_fifo.full_o_SB_DFF_Q_D_SB_LUT4_O_I0_SB_LUT4_O_1_I0[1]
|
|
.sym 6689 o_iq_tx_clk_p$SB_IO_OUT_$glb_clk
|
|
.sym 6690 w_rx_fifo_push
|
|
.sym 6692 w_rx_fifo_data[0]
|
|
.sym 6696 w_rx_fifo_data[2]
|
|
.sym 6699 $PACKER_VCC_NET
|
|
.sym 6706 w_rx_fifo_pulled_data[2]
|
|
.sym 6707 rx_fifo.wr_addr[6]
|
|
.sym 6709 o_led1$SB_IO_OUT
|
|
.sym 6711 w_rx_fifo_data[5]
|
|
.sym 6713 rx_fifo.wr_addr[3]
|
|
.sym 6715 rx_fifo.wr_addr[4]
|
|
.sym 6716 rx_fifo.wr_addr[4]
|
|
.sym 6718 rx_fifo.wr_addr[6]
|
|
.sym 6719 w_lvds_rx_24_d0_SB_LUT4_I1_O[0]
|
|
.sym 6720 lvds_rx_24_inst.r_state_if_SB_DFFESR_Q_R
|
|
.sym 6722 rx_fifo.rd_addr[9]
|
|
.sym 6725 rx_fifo.wr_addr[8]
|
|
.sym 6726 rx_fifo.wr_addr[5]
|
|
.sym 6727 w_lvds_rx_24_d0_SB_LUT4_I1_O_SB_LUT4_O_I0[1]
|
|
.sym 6734 w_rx_fifo_pull
|
|
.sym 6736 rx_fifo.rd_addr[8]
|
|
.sym 6737 rx_fifo.rd_addr[9]
|
|
.sym 6738 rx_fifo.empty_o_SB_DFF_Q_D_SB_LUT4_O_I0_SB_LUT4_O_1_I1_SB_LUT4_O_1_I0[1]
|
|
.sym 6739 rx_fifo.empty_o_SB_DFF_Q_D_SB_LUT4_O_I0_SB_LUT4_O_1_I1_SB_LUT4_O_1_I0[3]
|
|
.sym 6740 rx_fifo.rd_addr[0]
|
|
.sym 6741 w_rx_fifo_data[1]
|
|
.sym 6743 rx_fifo.empty_o_SB_DFF_Q_D_SB_LUT4_O_I0_SB_LUT4_O_1_I1_SB_LUT4_O_I3[2]
|
|
.sym 6745 $PACKER_VCC_NET
|
|
.sym 6746 rx_fifo.empty_o_SB_DFF_Q_D_SB_LUT4_O_I0_SB_LUT4_O_1_I1_SB_LUT4_O_I3[1]
|
|
.sym 6747 w_rx_fifo_data[3]
|
|
.sym 6757 rx_fifo.empty_o_SB_DFF_Q_D_SB_LUT4_O_I0_SB_LUT4_O_1_I1_SB_LUT4_O_2_I0[3]
|
|
.sym 6759 rx_fifo.empty_o_SB_LUT4_I2_O[0]
|
|
.sym 6762 rx_fifo.rd_addr[7]
|
|
.sym 6764 rx_fifo.full_o_SB_DFF_Q_D_SB_LUT4_O_I0_SB_LUT4_O_2_I2[8]
|
|
.sym 6765 w_rx_fifo_push
|
|
.sym 6766 rx_fifo.rd_addr_gray_wr[9]
|
|
.sym 6767 rx_fifo.rd_addr_gray_wr_r[7]
|
|
.sym 6768 rx_fifo.rd_addr_gray_wr_r[1]
|
|
.sym 6769 rx_fifo.full_o_SB_DFF_Q_D_SB_LUT4_O_I0_SB_LUT4_O_I0_SB_LUT4_O_1_I3[3]
|
|
.sym 6771 w_lvds_rx_24_d0_SB_LUT4_I1_O[1]
|
|
.sym 6780 rx_fifo.empty_o_SB_DFF_Q_D_SB_LUT4_O_I0_SB_LUT4_O_1_I1_SB_LUT4_O_1_I0[1]
|
|
.sym 6781 rx_fifo.empty_o_SB_DFF_Q_D_SB_LUT4_O_I0_SB_LUT4_O_1_I1_SB_LUT4_O_1_I0[3]
|
|
.sym 6783 rx_fifo.empty_o_SB_DFF_Q_D_SB_LUT4_O_I0_SB_LUT4_O_1_I1_SB_LUT4_O_2_I0[3]
|
|
.sym 6784 rx_fifo.empty_o_SB_DFF_Q_D_SB_LUT4_O_I0_SB_LUT4_O_1_I1_SB_LUT4_O_I3[1]
|
|
.sym 6785 rx_fifo.empty_o_SB_DFF_Q_D_SB_LUT4_O_I0_SB_LUT4_O_1_I1_SB_LUT4_O_I3[2]
|
|
.sym 6786 rx_fifo.rd_addr[7]
|
|
.sym 6787 rx_fifo.rd_addr[8]
|
|
.sym 6788 rx_fifo.rd_addr[9]
|
|
.sym 6789 rx_fifo.empty_o_SB_LUT4_I2_O[0]
|
|
.sym 6790 rx_fifo.rd_addr[0]
|
|
.sym 6791 r_counter_$glb_clk
|
|
.sym 6792 w_rx_fifo_pull
|
|
.sym 6793 $PACKER_VCC_NET
|
|
.sym 6797 w_rx_fifo_data[3]
|
|
.sym 6801 w_rx_fifo_data[1]
|
|
.sym 6808 smi_ctrl_ins.r_fifo_pushed_data_SB_DFFNESR_Q_21_E
|
|
.sym 6809 rx_fifo.empty_o_SB_LUT4_I2_O[0]
|
|
.sym 6810 w_rx_fifo_pulled_data[1]
|
|
.sym 6811 rx_fifo.empty_o_SB_DFF_Q_D_SB_LUT4_O_I0_SB_LUT4_O_1_I1_SB_LUT4_O_I3[2]
|
|
.sym 6813 w_smi_data_input[3]
|
|
.sym 6814 rx_fifo.full_o_SB_DFF_Q_D_SB_LUT4_O_I0_SB_LUT4_O_1_I0[2]
|
|
.sym 6815 rx_fifo.empty_o_SB_DFF_Q_D_SB_LUT4_O_I0_SB_LUT4_O_1_I1_SB_LUT4_O_1_I0[3]
|
|
.sym 6818 rx_fifo.full_o_SB_DFF_Q_D_SB_LUT4_O_I0_SB_LUT4_O_2_I0[3]
|
|
.sym 6819 rx_fifo.rd_addr_gray_wr_r[1]
|
|
.sym 6821 w_rx_24_fifo_data[0]
|
|
.sym 6826 lvds_rx_09_inst.o_fifo_push_SB_DFFESR_Q_D
|
|
.sym 6827 rx_fifo.wr_addr[2]
|
|
.sym 6829 w_rx_fifo_push
|
|
.sym 6834 w_rx_fifo_data[4]
|
|
.sym 6838 $PACKER_VCC_NET
|
|
.sym 6839 rx_fifo.full_o_SB_DFF_Q_D_SB_LUT4_O_I0_SB_LUT4_O_1_I0[1]
|
|
.sym 6840 rx_fifo.full_o_SB_DFF_Q_D_SB_LUT4_O_I0_SB_LUT4_O_1_I0[2]
|
|
.sym 6849 w_rx_fifo_data[6]
|
|
.sym 6850 rx_fifo.wr_addr[2]
|
|
.sym 6851 rx_fifo.wr_addr[9]
|
|
.sym 6852 w_rx_fifo_push
|
|
.sym 6853 rx_fifo.wr_addr[3]
|
|
.sym 6854 rx_fifo.wr_addr[4]
|
|
.sym 6856 rx_fifo.wr_addr[6]
|
|
.sym 6860 rx_fifo.wr_addr[7]
|
|
.sym 6863 rx_fifo.wr_addr[8]
|
|
.sym 6864 rx_fifo.wr_addr[5]
|
|
.sym 6866 smi_ctrl_ins.r_fifo_pushed_data_SB_DFFNESR_Q_9_E
|
|
.sym 6867 w_lvds_rx_24_d0_SB_LUT4_I1_O[0]
|
|
.sym 6868 lvds_rx_09_inst.o_fifo_push_SB_DFFESR_Q_D
|
|
.sym 6871 w_lvds_rx_24_d0_SB_LUT4_I1_O[2]
|
|
.sym 6873 lvds_rx_24_inst.r_state_if_SB_DFFESR_Q_D[2]
|
|
.sym 6882 rx_fifo.wr_addr[2]
|
|
.sym 6883 rx_fifo.wr_addr[3]
|
|
.sym 6885 rx_fifo.wr_addr[4]
|
|
.sym 6886 rx_fifo.wr_addr[5]
|
|
.sym 6887 rx_fifo.wr_addr[6]
|
|
.sym 6888 rx_fifo.wr_addr[7]
|
|
.sym 6889 rx_fifo.wr_addr[8]
|
|
.sym 6890 rx_fifo.wr_addr[9]
|
|
.sym 6891 rx_fifo.full_o_SB_DFF_Q_D_SB_LUT4_O_I0_SB_LUT4_O_1_I0[2]
|
|
.sym 6892 rx_fifo.full_o_SB_DFF_Q_D_SB_LUT4_O_I0_SB_LUT4_O_1_I0[1]
|
|
.sym 6893 o_iq_tx_clk_p$SB_IO_OUT_$glb_clk
|
|
.sym 6894 w_rx_fifo_push
|
|
.sym 6896 w_rx_fifo_data[4]
|
|
.sym 6900 w_rx_fifo_data[6]
|
|
.sym 6903 $PACKER_VCC_NET
|
|
.sym 6904 o_led1$SB_IO_OUT
|
|
.sym 6907 o_led1$SB_IO_OUT
|
|
.sym 6908 lvds_rx_24_inst.r_phase_count_SB_LUT4_O_I3[0]
|
|
.sym 6910 w_rx_fifo_pulled_data[6]
|
|
.sym 6911 rx_fifo.empty_o_SB_DFF_Q_D_SB_LUT4_O_I0_SB_LUT4_O_1_I1_SB_LUT4_O_1_I0[1]
|
|
.sym 6912 w_rx_fifo_pulled_data[4]
|
|
.sym 6913 rx_fifo.empty_o_SB_DFF_Q_D_SB_LUT4_O_I0_SB_LUT4_O_1_I1_SB_LUT4_O_I3[1]
|
|
.sym 6915 rx_fifo.rd_addr[0]
|
|
.sym 6917 w_rx_fifo_push
|
|
.sym 6918 rx_fifo.rd_addr[8]
|
|
.sym 6921 tx_fifo.wr_addr[7]
|
|
.sym 6922 tx_fifo.wr_addr[2]
|
|
.sym 6924 rx_fifo.wr_addr_gray_SB_DFFE_Q_2_D[2]
|
|
.sym 6925 tx_fifo.wr_addr[4]
|
|
.sym 6927 tx_fifo.wr_addr[6]
|
|
.sym 6930 w_rx_24_fifo_data[1]
|
|
.sym 6931 w_lvds_rx_24_d0_SB_LUT4_I1_O[0]
|
|
.sym 6936 w_rx_fifo_data[5]
|
|
.sym 6938 rx_fifo.empty_o_SB_DFF_Q_D_SB_LUT4_O_I0_SB_LUT4_O_1_I1_SB_LUT4_O_1_I0[1]
|
|
.sym 6940 rx_fifo.empty_o_SB_DFF_Q_D_SB_LUT4_O_I0_SB_LUT4_O_1_I1_SB_LUT4_O_2_I0[3]
|
|
.sym 6941 rx_fifo.rd_addr[9]
|
|
.sym 6944 rx_fifo.rd_addr[7]
|
|
.sym 6945 rx_fifo.rd_addr[8]
|
|
.sym 6946 rx_fifo.empty_o_SB_DFF_Q_D_SB_LUT4_O_I0_SB_LUT4_O_1_I1_SB_LUT4_O_1_I0[3]
|
|
.sym 6947 w_rx_fifo_pull
|
|
.sym 6949 w_rx_fifo_data[7]
|
|
.sym 6950 rx_fifo.empty_o_SB_DFF_Q_D_SB_LUT4_O_I0_SB_LUT4_O_1_I1_SB_LUT4_O_I3[1]
|
|
.sym 6956 $PACKER_VCC_NET
|
|
.sym 6961 rx_fifo.empty_o_SB_DFF_Q_D_SB_LUT4_O_I0_SB_LUT4_O_1_I1_SB_LUT4_O_I3[2]
|
|
.sym 6963 rx_fifo.empty_o_SB_LUT4_I2_O[0]
|
|
.sym 6966 rx_fifo.rd_addr[0]
|
|
.sym 6969 w_rx_24_fifo_data[0]
|
|
.sym 6971 w_rx_24_fifo_data[1]
|
|
.sym 6984 rx_fifo.empty_o_SB_DFF_Q_D_SB_LUT4_O_I0_SB_LUT4_O_1_I1_SB_LUT4_O_1_I0[1]
|
|
.sym 6985 rx_fifo.empty_o_SB_DFF_Q_D_SB_LUT4_O_I0_SB_LUT4_O_1_I1_SB_LUT4_O_1_I0[3]
|
|
.sym 6987 rx_fifo.empty_o_SB_DFF_Q_D_SB_LUT4_O_I0_SB_LUT4_O_1_I1_SB_LUT4_O_2_I0[3]
|
|
.sym 6988 rx_fifo.empty_o_SB_DFF_Q_D_SB_LUT4_O_I0_SB_LUT4_O_1_I1_SB_LUT4_O_I3[1]
|
|
.sym 6989 rx_fifo.empty_o_SB_DFF_Q_D_SB_LUT4_O_I0_SB_LUT4_O_1_I1_SB_LUT4_O_I3[2]
|
|
.sym 6990 rx_fifo.rd_addr[7]
|
|
.sym 6991 rx_fifo.rd_addr[8]
|
|
.sym 6992 rx_fifo.rd_addr[9]
|
|
.sym 6993 rx_fifo.empty_o_SB_LUT4_I2_O[0]
|
|
.sym 6994 rx_fifo.rd_addr[0]
|
|
.sym 6995 r_counter_$glb_clk
|
|
.sym 6996 w_rx_fifo_pull
|
|
.sym 6997 $PACKER_VCC_NET
|
|
.sym 7001 w_rx_fifo_data[7]
|
|
.sym 7005 w_rx_fifo_data[5]
|
|
.sym 7011 rx_fifo.rd_addr[8]
|
|
.sym 7012 w_rx_fifo_pulled_data[7]
|
|
.sym 7014 rx_fifo.empty_o_SB_DFF_Q_D_SB_LUT4_O_I0_SB_LUT4_O_1_I1_SB_LUT4_O_1_I0[1]
|
|
.sym 7015 w_rx_fifo_pull
|
|
.sym 7016 i_rst_b$SB_IO_IN
|
|
.sym 7017 smi_ctrl_ins.r_fifo_pushed_data_SB_DFFNESR_Q_9_E
|
|
.sym 7018 rx_fifo.empty_o_SB_DFF_Q_D_SB_LUT4_O_I0_SB_LUT4_O_1_I1_SB_LUT4_O_I3[1]
|
|
.sym 7019 w_lvds_rx_24_d0_SB_LUT4_I1_O[0]
|
|
.sym 7020 o_led1$SB_IO_OUT
|
|
.sym 7022 rx_fifo.wr_addr[9]
|
|
.sym 7024 w_lvds_rx_24_d0
|
|
.sym 7028 w_lvds_rx_24_d1
|
|
.sym 7029 w_lvds_rx_24_d1
|
|
.sym 7031 rx_fifo.wr_addr[2]
|
|
.sym 7032 w_tx_fifo_pulled_data[12]
|
|
.sym 7041 tx_fifo.full_o_SB_DFF_Q_D_SB_LUT4_O_I0_SB_LUT4_O_1_I2_SB_LUT4_O_I3[0]
|
|
.sym 7042 tx_fifo.wr_addr[8]
|
|
.sym 7043 tx_fifo.wr_addr[3]
|
|
.sym 7049 w_tx_fifo_push
|
|
.sym 7051 $PACKER_VCC_NET
|
|
.sym 7052 tx_fifo.wr_addr[9]
|
|
.sym 7056 tx_fifo.full_o_SB_DFF_Q_D_SB_LUT4_O_I0_SB_LUT4_O_1_I0_SB_LUT4_O_I3[1]
|
|
.sym 7059 tx_fifo.wr_addr[7]
|
|
.sym 7060 tx_fifo.wr_addr[2]
|
|
.sym 7062 tx_fifo.wr_addr[5]
|
|
.sym 7063 tx_fifo.wr_addr[4]
|
|
.sym 7065 tx_fifo.wr_addr[6]
|
|
.sym 7067 w_tx_fifo_data[12]
|
|
.sym 7069 w_tx_fifo_data[14]
|
|
.sym 7070 rx_fifo.wr_addr_gray[8]
|
|
.sym 7072 rx_fifo.wr_addr_gray[1]
|
|
.sym 7073 rx_fifo.wr_addr_gray[6]
|
|
.sym 7074 w_lvds_rx_24_d0_SB_LUT4_I1_O[3]
|
|
.sym 7075 rx_fifo.wr_addr_gray[5]
|
|
.sym 7076 rx_fifo.wr_addr[9]
|
|
.sym 7086 tx_fifo.wr_addr[2]
|
|
.sym 7087 tx_fifo.wr_addr[3]
|
|
.sym 7089 tx_fifo.wr_addr[4]
|
|
.sym 7090 tx_fifo.wr_addr[5]
|
|
.sym 7091 tx_fifo.wr_addr[6]
|
|
.sym 7092 tx_fifo.wr_addr[7]
|
|
.sym 7093 tx_fifo.wr_addr[8]
|
|
.sym 7094 tx_fifo.wr_addr[9]
|
|
.sym 7095 tx_fifo.full_o_SB_DFF_Q_D_SB_LUT4_O_I0_SB_LUT4_O_1_I0_SB_LUT4_O_I3[1]
|
|
.sym 7096 tx_fifo.full_o_SB_DFF_Q_D_SB_LUT4_O_I0_SB_LUT4_O_1_I2_SB_LUT4_O_I3[0]
|
|
.sym 7097 r_counter_$glb_clk
|
|
.sym 7098 w_tx_fifo_push
|
|
.sym 7100 w_tx_fifo_data[12]
|
|
.sym 7104 w_tx_fifo_data[14]
|
|
.sym 7107 $PACKER_VCC_NET
|
|
.sym 7115 w_tx_fifo_push
|
|
.sym 7118 tx_fifo.wr_addr[8]
|
|
.sym 7124 lvds_tx_inst.r_fifo_data[5]
|
|
.sym 7125 tx_fifo.rd_addr_gray_wr[0]
|
|
.sym 7127 tx_fifo.rd_addr[0]
|
|
.sym 7142 w_tx_fifo_pull
|
|
.sym 7144 tx_fifo.empty_o_SB_LUT4_I3_O_SB_LUT4_O_1_I0[3]
|
|
.sym 7146 tx_fifo.empty_o_SB_DFF_Q_D_SB_LUT4_O_I1_SB_LUT4_O_1_I3[2]
|
|
.sym 7147 tx_fifo.empty_o_SB_DFF_Q_D_SB_LUT4_O_I1_SB_LUT4_O_1_I3_SB_LUT4_O_I3[1]
|
|
.sym 7148 tx_fifo.empty_o_SB_DFF_Q_D_SB_LUT4_O_I1_SB_LUT4_O_1_I3[1]
|
|
.sym 7149 tx_fifo.empty_o_SB_DFF_Q_D_SB_LUT4_O_I1_SB_LUT4_O_1_I3_SB_LUT4_O_I3[2]
|
|
.sym 7150 tx_fifo.rd_addr[0]
|
|
.sym 7151 tx_fifo.empty_o_SB_LUT4_I3_O_SB_LUT4_O_I0[3]
|
|
.sym 7153 $PACKER_VCC_NET
|
|
.sym 7158 tx_fifo.empty_o_SB_LUT4_I3_O_SB_LUT4_O_I0[1]
|
|
.sym 7162 w_tx_fifo_data[13]
|
|
.sym 7164 tx_fifo.empty_o_SB_LUT4_I3_O_SB_LUT4_O_1_I0[2]
|
|
.sym 7170 tx_fifo.rd_addr[9]
|
|
.sym 7172 tx_fifo.empty_o_SB_LUT4_I3_O_SB_LUT4_O_1_I0[2]
|
|
.sym 7173 lvds_tx_inst.r_fifo_data[22]
|
|
.sym 7174 lvds_tx_inst.r_fifo_data[24]
|
|
.sym 7175 lvds_tx_inst.r_fifo_data[20]
|
|
.sym 7176 lvds_tx_inst.r_phase_count_SB_LUT4_I1_O_SB_DFF_D_Q[2]
|
|
.sym 7177 lvds_tx_inst.r_phase_count_SB_LUT4_I1_O_SB_DFF_D_Q[0]
|
|
.sym 7178 lvds_tx_inst.r_fifo_data[5]
|
|
.sym 7179 lvds_tx_inst.r_fifo_data[26]
|
|
.sym 7188 tx_fifo.empty_o_SB_LUT4_I3_O_SB_LUT4_O_I0[3]
|
|
.sym 7189 tx_fifo.empty_o_SB_LUT4_I3_O_SB_LUT4_O_1_I0[2]
|
|
.sym 7191 tx_fifo.empty_o_SB_LUT4_I3_O_SB_LUT4_O_1_I0[3]
|
|
.sym 7192 tx_fifo.empty_o_SB_DFF_Q_D_SB_LUT4_O_I1_SB_LUT4_O_1_I3[1]
|
|
.sym 7193 tx_fifo.empty_o_SB_DFF_Q_D_SB_LUT4_O_I1_SB_LUT4_O_1_I3[2]
|
|
.sym 7194 tx_fifo.empty_o_SB_DFF_Q_D_SB_LUT4_O_I1_SB_LUT4_O_1_I3_SB_LUT4_O_I3[1]
|
|
.sym 7195 tx_fifo.empty_o_SB_DFF_Q_D_SB_LUT4_O_I1_SB_LUT4_O_1_I3_SB_LUT4_O_I3[2]
|
|
.sym 7196 tx_fifo.rd_addr[9]
|
|
.sym 7197 tx_fifo.empty_o_SB_LUT4_I3_O_SB_LUT4_O_I0[1]
|
|
.sym 7198 tx_fifo.rd_addr[0]
|
|
.sym 7199 o_iq_tx_clk_p$SB_IO_OUT_$glb_clk
|
|
.sym 7200 w_tx_fifo_pull
|
|
.sym 7201 $PACKER_VCC_NET
|
|
.sym 7209 w_tx_fifo_data[13]
|
|
.sym 7215 $PACKER_VCC_NET
|
|
.sym 7216 w_tx_fifo_pull
|
|
.sym 7217 rx_fifo.wr_addr_gray[6]
|
|
.sym 7221 rx_fifo.wr_addr_gray[8]
|
|
.sym 7222 $PACKER_VCC_NET
|
|
.sym 7228 w_tx_fifo_pulled_data[6]
|
|
.sym 7234 tx_fifo.rd_addr[9]
|
|
.sym 7235 w_tx_fifo_data[16]
|
|
.sym 7237 lvds_tx_inst.o_fifo_pull_SB_DFFSR_Q_R
|
|
.sym 7246 $PACKER_VCC_NET
|
|
.sym 7247 tx_fifo.wr_addr[7]
|
|
.sym 7251 tx_fifo.wr_addr[6]
|
|
.sym 7253 w_tx_fifo_push
|
|
.sym 7258 w_tx_fifo_data[4]
|
|
.sym 7259 tx_fifo.wr_addr[3]
|
|
.sym 7260 tx_fifo.full_o_SB_DFF_Q_D_SB_LUT4_O_I0_SB_LUT4_O_1_I0_SB_LUT4_O_I3[1]
|
|
.sym 7261 tx_fifo.wr_addr[5]
|
|
.sym 7263 tx_fifo.wr_addr[9]
|
|
.sym 7264 w_tx_fifo_data[6]
|
|
.sym 7266 tx_fifo.full_o_SB_DFF_Q_D_SB_LUT4_O_I0_SB_LUT4_O_1_I2_SB_LUT4_O_I3[0]
|
|
.sym 7267 tx_fifo.wr_addr[4]
|
|
.sym 7269 tx_fifo.wr_addr[8]
|
|
.sym 7273 tx_fifo.wr_addr[2]
|
|
.sym 7274 tx_fifo.rd_addr_gray_wr[0]
|
|
.sym 7275 tx_fifo.rd_addr_gray_wr[7]
|
|
.sym 7276 tx_fifo.rd_addr_gray_wr[8]
|
|
.sym 7277 tx_fifo.rd_addr_gray_wr[5]
|
|
.sym 7278 tx_fifo.rd_addr_gray_wr[2]
|
|
.sym 7279 w_lvds_tx_d1_SB_DFF_Q_D_SB_LUT4_O_1_I0_SB_LUT4_O_I2[3]
|
|
.sym 7280 tx_fifo.rd_addr_gray_wr_r[5]
|
|
.sym 7281 tx_fifo.rd_addr_gray_wr_r[7]
|
|
.sym 7290 tx_fifo.wr_addr[2]
|
|
.sym 7291 tx_fifo.wr_addr[3]
|
|
.sym 7293 tx_fifo.wr_addr[4]
|
|
.sym 7294 tx_fifo.wr_addr[5]
|
|
.sym 7295 tx_fifo.wr_addr[6]
|
|
.sym 7296 tx_fifo.wr_addr[7]
|
|
.sym 7297 tx_fifo.wr_addr[8]
|
|
.sym 7298 tx_fifo.wr_addr[9]
|
|
.sym 7299 tx_fifo.full_o_SB_DFF_Q_D_SB_LUT4_O_I0_SB_LUT4_O_1_I0_SB_LUT4_O_I3[1]
|
|
.sym 7300 tx_fifo.full_o_SB_DFF_Q_D_SB_LUT4_O_I0_SB_LUT4_O_1_I2_SB_LUT4_O_I3[0]
|
|
.sym 7301 r_counter_$glb_clk
|
|
.sym 7302 w_tx_fifo_push
|
|
.sym 7304 w_tx_fifo_data[4]
|
|
.sym 7308 w_tx_fifo_data[6]
|
|
.sym 7311 $PACKER_VCC_NET
|
|
.sym 7316 rx_fifo.wr_addr_gray_rd[5]
|
|
.sym 7317 w_tx_fifo_empty
|
|
.sym 7319 smi_ctrl_ins.r_fifo_pushed_data[8]
|
|
.sym 7320 w_tx_fifo_pulled_data[26]
|
|
.sym 7321 w_tx_fifo_push
|
|
.sym 7326 w_tx_fifo_push
|
|
.sym 7328 tx_fifo.empty_o_SB_LUT4_I3_O_SB_LUT4_O_I0[1]
|
|
.sym 7329 tx_fifo.wr_addr[2]
|
|
.sym 7330 tx_fifo.empty_o_SB_DFF_Q_D_SB_LUT4_O_I1_SB_LUT4_O_1_I3[1]
|
|
.sym 7331 w_lvds_tx_d1_SB_DFF_Q_D_SB_LUT4_O_1_I0[3]
|
|
.sym 7332 tx_fifo.wr_addr[6]
|
|
.sym 7333 tx_fifo.wr_addr[4]
|
|
.sym 7334 w_tx_fifo_data[17]
|
|
.sym 7335 w_tx_fifo_data[10]
|
|
.sym 7336 tx_fifo.wr_addr[7]
|
|
.sym 7338 tx_fifo.rd_addr_gray[5]
|
|
.sym 7339 tx_fifo.wr_addr[6]
|
|
.sym 7344 tx_fifo.empty_o_SB_DFF_Q_D_SB_LUT4_O_I1_SB_LUT4_O_1_I3_SB_LUT4_O_I3[2]
|
|
.sym 7346 w_tx_fifo_pull
|
|
.sym 7347 tx_fifo.empty_o_SB_DFF_Q_D_SB_LUT4_O_I1_SB_LUT4_O_1_I3[1]
|
|
.sym 7350 tx_fifo.empty_o_SB_LUT4_I3_O_SB_LUT4_O_1_I0[3]
|
|
.sym 7352 tx_fifo.empty_o_SB_LUT4_I3_O_SB_LUT4_O_1_I0[2]
|
|
.sym 7353 tx_fifo.empty_o_SB_LUT4_I3_O_SB_LUT4_O_I0[1]
|
|
.sym 7355 w_tx_fifo_data[5]
|
|
.sym 7356 tx_fifo.rd_addr[0]
|
|
.sym 7357 tx_fifo.empty_o_SB_DFF_Q_D_SB_LUT4_O_I1_SB_LUT4_O_1_I3[2]
|
|
.sym 7360 tx_fifo.empty_o_SB_LUT4_I3_O_SB_LUT4_O_I0[3]
|
|
.sym 7363 tx_fifo.empty_o_SB_DFF_Q_D_SB_LUT4_O_I1_SB_LUT4_O_1_I3_SB_LUT4_O_I3[1]
|
|
.sym 7364 $PACKER_VCC_NET
|
|
.sym 7372 tx_fifo.rd_addr[9]
|
|
.sym 7373 w_tx_fifo_data[7]
|
|
.sym 7377 tx_fifo.empty_o_SB_LUT4_I3_O_SB_LUT4_O_1_I0[1]
|
|
.sym 7378 tx_fifo.wr_addr_gray_rd[7]
|
|
.sym 7380 tx_fifo.rd_addr_gray_SB_DFFE_Q_8_D[2]
|
|
.sym 7381 lvds_tx_inst.o_fifo_pull_SB_DFFSR_Q_R
|
|
.sym 7382 tx_fifo.empty_o_SB_DFF_Q_D_SB_LUT4_O_I1_SB_LUT4_O_I0_SB_LUT4_O_2_I3[0]
|
|
.sym 7383 tx_fifo.wr_addr_gray_rd[0]
|
|
.sym 7392 tx_fifo.empty_o_SB_LUT4_I3_O_SB_LUT4_O_I0[3]
|
|
.sym 7393 tx_fifo.empty_o_SB_LUT4_I3_O_SB_LUT4_O_1_I0[2]
|
|
.sym 7395 tx_fifo.empty_o_SB_LUT4_I3_O_SB_LUT4_O_1_I0[3]
|
|
.sym 7396 tx_fifo.empty_o_SB_DFF_Q_D_SB_LUT4_O_I1_SB_LUT4_O_1_I3[1]
|
|
.sym 7397 tx_fifo.empty_o_SB_DFF_Q_D_SB_LUT4_O_I1_SB_LUT4_O_1_I3[2]
|
|
.sym 7398 tx_fifo.empty_o_SB_DFF_Q_D_SB_LUT4_O_I1_SB_LUT4_O_1_I3_SB_LUT4_O_I3[1]
|
|
.sym 7399 tx_fifo.empty_o_SB_DFF_Q_D_SB_LUT4_O_I1_SB_LUT4_O_1_I3_SB_LUT4_O_I3[2]
|
|
.sym 7400 tx_fifo.rd_addr[9]
|
|
.sym 7401 tx_fifo.empty_o_SB_LUT4_I3_O_SB_LUT4_O_I0[1]
|
|
.sym 7402 tx_fifo.rd_addr[0]
|
|
.sym 7403 o_iq_tx_clk_p$SB_IO_OUT_$glb_clk
|
|
.sym 7404 w_tx_fifo_pull
|
|
.sym 7405 $PACKER_VCC_NET
|
|
.sym 7409 w_tx_fifo_data[7]
|
|
.sym 7413 w_tx_fifo_data[5]
|
|
.sym 7418 w_tx_fifo_data[27]
|
|
.sym 7419 tx_fifo.rd_addr_gray[0]
|
|
.sym 7425 tx_fifo.rd_addr_gray[8]
|
|
.sym 7426 w_lvds_tx_d1_SB_DFF_Q_D_SB_LUT4_O_1_I0_SB_LUT4_O_I2_SB_LUT4_O_I2[2]
|
|
.sym 7428 tx_fifo.empty_o_SB_LUT4_I3_O_SB_LUT4_O_1_I0[2]
|
|
.sym 7429 tx_fifo.wr_addr_gray_rd[9]
|
|
.sym 7430 tx_fifo.rd_addr_gray_wr[8]
|
|
.sym 7431 w_lvds_rx_24_d0
|
|
.sym 7433 w_tx_fifo_full
|
|
.sym 7434 tx_fifo.rd_addr_gray_wr[2]
|
|
.sym 7441 w_lvds_rx_24_d1
|
|
.sym 7448 tx_fifo.wr_addr[8]
|
|
.sym 7450 $PACKER_VCC_NET
|
|
.sym 7451 tx_fifo.full_o_SB_DFF_Q_D_SB_LUT4_O_I0_SB_LUT4_O_1_I2_SB_LUT4_O_I3[0]
|
|
.sym 7452 tx_fifo.wr_addr[2]
|
|
.sym 7453 tx_fifo.wr_addr[3]
|
|
.sym 7454 tx_fifo.wr_addr[9]
|
|
.sym 7457 w_tx_fifo_push
|
|
.sym 7459 tx_fifo.full_o_SB_DFF_Q_D_SB_LUT4_O_I0_SB_LUT4_O_1_I0_SB_LUT4_O_I3[1]
|
|
.sym 7460 tx_fifo.wr_addr[5]
|
|
.sym 7461 w_tx_fifo_data[18]
|
|
.sym 7462 w_tx_fifo_data[16]
|
|
.sym 7471 tx_fifo.wr_addr[4]
|
|
.sym 7474 tx_fifo.wr_addr[7]
|
|
.sym 7477 tx_fifo.wr_addr[6]
|
|
.sym 7479 tx_fifo.full_o_SB_DFF_Q_D_SB_LUT4_O_I0_SB_LUT4_O_1_I0[1]
|
|
.sym 7480 tx_fifo.full_o_SB_DFF_Q_D_SB_LUT4_O_I0_SB_LUT4_O_1_I0[2]
|
|
.sym 7481 tx_fifo.full_o_SB_DFF_Q_D_SB_LUT4_O_I0_SB_LUT4_O_1_I0[3]
|
|
.sym 7482 tx_fifo.full_o_SB_DFF_Q_D_SB_LUT4_O_I0_SB_LUT4_O_1_I0[4]
|
|
.sym 7483 tx_fifo.full_o_SB_DFF_Q_D_SB_LUT4_O_I0_SB_LUT4_O_1_I0[5]
|
|
.sym 7484 tx_fifo.full_o_SB_DFF_Q_D_SB_LUT4_O_I0_SB_LUT4_O_1_I0[6]
|
|
.sym 7485 tx_fifo.full_o_SB_DFF_Q_D_SB_LUT4_O_I0_SB_LUT4_O_1_I0[7]
|
|
.sym 7494 tx_fifo.wr_addr[2]
|
|
.sym 7495 tx_fifo.wr_addr[3]
|
|
.sym 7497 tx_fifo.wr_addr[4]
|
|
.sym 7498 tx_fifo.wr_addr[5]
|
|
.sym 7499 tx_fifo.wr_addr[6]
|
|
.sym 7500 tx_fifo.wr_addr[7]
|
|
.sym 7501 tx_fifo.wr_addr[8]
|
|
.sym 7502 tx_fifo.wr_addr[9]
|
|
.sym 7503 tx_fifo.full_o_SB_DFF_Q_D_SB_LUT4_O_I0_SB_LUT4_O_1_I0_SB_LUT4_O_I3[1]
|
|
.sym 7504 tx_fifo.full_o_SB_DFF_Q_D_SB_LUT4_O_I0_SB_LUT4_O_1_I2_SB_LUT4_O_I3[0]
|
|
.sym 7505 r_counter_$glb_clk
|
|
.sym 7506 w_tx_fifo_push
|
|
.sym 7508 w_tx_fifo_data[16]
|
|
.sym 7512 w_tx_fifo_data[18]
|
|
.sym 7515 $PACKER_VCC_NET
|
|
.sym 7520 tx_fifo.wr_addr[9]
|
|
.sym 7522 w_tx_fifo_pull
|
|
.sym 7523 w_tx_fifo_push
|
|
.sym 7525 tx_fifo.wr_addr_gray_rd[0]
|
|
.sym 7530 w_tx_fifo_data[25]
|
|
.sym 7531 tx_fifo.wr_addr_gray_rd[7]
|
|
.sym 7533 tx_fifo.rd_addr_gray_wr[0]
|
|
.sym 7534 tx_fifo.empty_o_SB_LUT4_I3_O_SB_LUT4_O_1_I0[3]
|
|
.sym 7536 tx_fifo.empty_o_SB_LUT4_I3_O_SB_LUT4_O_1_I0[2]
|
|
.sym 7539 tx_fifo.wr_addr_gray_rd[2]
|
|
.sym 7540 tx_fifo.rd_addr[0]
|
|
.sym 7542 tx_fifo.empty_o_SB_LUT4_I3_O_SB_LUT4_O_1_I0[2]
|
|
.sym 7543 tx_fifo.full_o_SB_DFF_Q_D_SB_LUT4_O_I0_SB_LUT4_O_1_I0[1]
|
|
.sym 7550 tx_fifo.empty_o_SB_LUT4_I3_O_SB_LUT4_O_1_I0[3]
|
|
.sym 7552 $PACKER_VCC_NET
|
|
.sym 7554 w_tx_fifo_data[19]
|
|
.sym 7555 tx_fifo.empty_o_SB_LUT4_I3_O_SB_LUT4_O_1_I0[2]
|
|
.sym 7559 w_tx_fifo_pull
|
|
.sym 7561 tx_fifo.empty_o_SB_DFF_Q_D_SB_LUT4_O_I1_SB_LUT4_O_1_I3_SB_LUT4_O_I3[2]
|
|
.sym 7563 w_tx_fifo_data[17]
|
|
.sym 7564 tx_fifo.empty_o_SB_LUT4_I3_O_SB_LUT4_O_I0[3]
|
|
.sym 7565 tx_fifo.rd_addr[0]
|
|
.sym 7568 tx_fifo.empty_o_SB_LUT4_I3_O_SB_LUT4_O_I0[1]
|
|
.sym 7570 tx_fifo.empty_o_SB_DFF_Q_D_SB_LUT4_O_I1_SB_LUT4_O_1_I3[2]
|
|
.sym 7572 tx_fifo.empty_o_SB_DFF_Q_D_SB_LUT4_O_I1_SB_LUT4_O_1_I3_SB_LUT4_O_I3[1]
|
|
.sym 7576 tx_fifo.empty_o_SB_DFF_Q_D_SB_LUT4_O_I1_SB_LUT4_O_1_I3[1]
|
|
.sym 7578 tx_fifo.rd_addr[9]
|
|
.sym 7580 tx_fifo.full_o_SB_DFF_Q_D_SB_LUT4_O_I0_SB_LUT4_O_1_I0[8]
|
|
.sym 7581 w_tx_fifo_full
|
|
.sym 7582 tx_fifo.full_o_SB_DFF_Q_D_SB_LUT4_O_I0_SB_LUT4_O_I0[3]
|
|
.sym 7583 tx_fifo.full_o_SB_DFF_Q_D_SB_LUT4_O_I0_SB_LUT4_O_I0[1]
|
|
.sym 7584 rx_fifo.empty_o_SB_DFF_Q_D_SB_LUT4_O_I0_SB_LUT4_O_1_I1_SB_LUT4_O_2_I0[1]
|
|
.sym 7585 tx_fifo.full_o_SB_DFF_Q_D_SB_LUT4_O_I0_SB_LUT4_O_1_I0_SB_LUT4_O_I3[1]
|
|
.sym 7586 tx_fifo.full_o_SB_DFF_Q_D_SB_LUT4_O_I0_SB_LUT4_O_1_I2_SB_LUT4_O_I3[2]
|
|
.sym 7596 tx_fifo.empty_o_SB_LUT4_I3_O_SB_LUT4_O_I0[3]
|
|
.sym 7597 tx_fifo.empty_o_SB_LUT4_I3_O_SB_LUT4_O_1_I0[2]
|
|
.sym 7599 tx_fifo.empty_o_SB_LUT4_I3_O_SB_LUT4_O_1_I0[3]
|
|
.sym 7600 tx_fifo.empty_o_SB_DFF_Q_D_SB_LUT4_O_I1_SB_LUT4_O_1_I3[1]
|
|
.sym 7601 tx_fifo.empty_o_SB_DFF_Q_D_SB_LUT4_O_I1_SB_LUT4_O_1_I3[2]
|
|
.sym 7602 tx_fifo.empty_o_SB_DFF_Q_D_SB_LUT4_O_I1_SB_LUT4_O_1_I3_SB_LUT4_O_I3[1]
|
|
.sym 7603 tx_fifo.empty_o_SB_DFF_Q_D_SB_LUT4_O_I1_SB_LUT4_O_1_I3_SB_LUT4_O_I3[2]
|
|
.sym 7604 tx_fifo.rd_addr[9]
|
|
.sym 7605 tx_fifo.empty_o_SB_LUT4_I3_O_SB_LUT4_O_I0[1]
|
|
.sym 7606 tx_fifo.rd_addr[0]
|
|
.sym 7607 o_iq_tx_clk_p$SB_IO_OUT_$glb_clk
|
|
.sym 7608 w_tx_fifo_pull
|
|
.sym 7609 $PACKER_VCC_NET
|
|
.sym 7613 w_tx_fifo_data[19]
|
|
.sym 7617 w_tx_fifo_data[17]
|
|
.sym 7622 tx_fifo.full_o_SB_DFF_Q_D_SB_LUT4_O_I0_SB_LUT4_O_1_I2_SB_LUT4_O_I3[0]
|
|
.sym 7624 tx_fifo.wr_addr[2]
|
|
.sym 7625 $PACKER_VCC_NET
|
|
.sym 7626 tx_fifo.full_o_SB_DFF_Q_D_SB_LUT4_O_I0_SB_LUT4_O_1_I0_SB_LUT4_O_I3[1]
|
|
.sym 7627 w_tx_fifo_pull
|
|
.sym 7628 $PACKER_VCC_NET
|
|
.sym 7630 tx_fifo.wr_addr[5]
|
|
.sym 7631 w_tx_fifo_empty
|
|
.sym 7632 w_tx_fifo_data[2]
|
|
.sym 7634 tx_fifo.rd_addr[9]
|
|
.sym 7636 w_tx_fifo_pulled_data[30]
|
|
.sym 7641 w_tx_fifo_pulled_data[19]
|
|
.sym 7643 w_lvds_tx_d1_SB_DFF_Q_D_SB_LUT4_O_I1_SB_LUT4_O_1_I0[1]
|
|
.sym 7645 w_tx_fifo_push
|
|
.sym 7652 w_tx_fifo_push
|
|
.sym 7654 $PACKER_VCC_NET
|
|
.sym 7655 tx_fifo.wr_addr[7]
|
|
.sym 7656 tx_fifo.wr_addr[2]
|
|
.sym 7659 tx_fifo.wr_addr[6]
|
|
.sym 7663 w_tx_fifo_data[28]
|
|
.sym 7667 tx_fifo.wr_addr[3]
|
|
.sym 7669 tx_fifo.wr_addr[5]
|
|
.sym 7670 tx_fifo.wr_addr[4]
|
|
.sym 7671 tx_fifo.full_o_SB_DFF_Q_D_SB_LUT4_O_I0_SB_LUT4_O_1_I2_SB_LUT4_O_I3[0]
|
|
.sym 7677 tx_fifo.wr_addr[8]
|
|
.sym 7679 tx_fifo.full_o_SB_DFF_Q_D_SB_LUT4_O_I0_SB_LUT4_O_1_I0_SB_LUT4_O_I3[1]
|
|
.sym 7680 tx_fifo.wr_addr[9]
|
|
.sym 7683 tx_fifo.full_o_SB_DFF_Q_D_SB_LUT4_O_I0_SB_LUT4_O_1_I2_SB_LUT4_O_I3[3]
|
|
.sym 7684 tx_fifo.full_o_SB_DFF_Q_D_SB_LUT4_O_I0_SB_LUT4_O_1_I2[2]
|
|
.sym 7685 lvds_tx_inst.o_fifo_pull_SB_DFFSR_Q_R_SB_LUT4_O_I1[3]
|
|
.sym 7686 tx_fifo.full_o_SB_DFF_Q_D_SB_LUT4_O_I0_SB_LUT4_O_1_I2[1]
|
|
.sym 7688 tx_fifo.rd_addr_gray_wr[9]
|
|
.sym 7698 tx_fifo.wr_addr[2]
|
|
.sym 7699 tx_fifo.wr_addr[3]
|
|
.sym 7701 tx_fifo.wr_addr[4]
|
|
.sym 7702 tx_fifo.wr_addr[5]
|
|
.sym 7703 tx_fifo.wr_addr[6]
|
|
.sym 7704 tx_fifo.wr_addr[7]
|
|
.sym 7705 tx_fifo.wr_addr[8]
|
|
.sym 7706 tx_fifo.wr_addr[9]
|
|
.sym 7707 tx_fifo.full_o_SB_DFF_Q_D_SB_LUT4_O_I0_SB_LUT4_O_1_I0_SB_LUT4_O_I3[1]
|
|
.sym 7708 tx_fifo.full_o_SB_DFF_Q_D_SB_LUT4_O_I0_SB_LUT4_O_1_I2_SB_LUT4_O_I3[0]
|
|
.sym 7709 r_counter_$glb_clk
|
|
.sym 7710 w_tx_fifo_push
|
|
.sym 7712 w_tx_fifo_data[28]
|
|
.sym 7719 $PACKER_VCC_NET
|
|
.sym 7723 o_led1$SB_IO_OUT
|
|
.sym 7733 tx_fifo.rd_addr_gray_wr_r[1]
|
|
.sym 7735 tx_fifo.full_o_SB_DFF_Q_D_SB_LUT4_O_I0_SB_LUT4_O_I0_SB_LUT4_O_2_I3[0]
|
|
.sym 7736 tx_fifo.wr_addr[2]
|
|
.sym 7738 tx_fifo.empty_o_SB_DFF_Q_D_SB_LUT4_O_I1_SB_LUT4_O_1_I3[2]
|
|
.sym 7739 tx_fifo.empty_o_SB_DFF_Q_D_SB_LUT4_O_I1_SB_LUT4_O_1_I3[1]
|
|
.sym 7740 w_tx_fifo_pulled_data[3]
|
|
.sym 7742 lvds_tx_inst.r_phase_count_SB_DFF_D_Q[0]
|
|
.sym 7743 w_tx_fifo_data[10]
|
|
.sym 7745 tx_fifo.wr_addr[6]
|
|
.sym 7746 w_lvds_tx_d1_SB_DFF_Q_D_SB_LUT4_O_1_I0[3]
|
|
.sym 7747 w_tx_fifo_pull
|
|
.sym 7752 tx_fifo.empty_o_SB_LUT4_I3_O_SB_LUT4_O_I0[1]
|
|
.sym 7754 tx_fifo.empty_o_SB_DFF_Q_D_SB_LUT4_O_I1_SB_LUT4_O_1_I3[2]
|
|
.sym 7756 tx_fifo.empty_o_SB_LUT4_I3_O_SB_LUT4_O_I0[3]
|
|
.sym 7758 w_tx_fifo_data[31]
|
|
.sym 7762 tx_fifo.empty_o_SB_DFF_Q_D_SB_LUT4_O_I1_SB_LUT4_O_1_I3[1]
|
|
.sym 7763 tx_fifo.empty_o_SB_LUT4_I3_O_SB_LUT4_O_1_I0[3]
|
|
.sym 7764 tx_fifo.rd_addr[9]
|
|
.sym 7765 tx_fifo.empty_o_SB_DFF_Q_D_SB_LUT4_O_I1_SB_LUT4_O_1_I3_SB_LUT4_O_I3[2]
|
|
.sym 7767 w_tx_fifo_data[29]
|
|
.sym 7769 tx_fifo.rd_addr[0]
|
|
.sym 7771 tx_fifo.empty_o_SB_LUT4_I3_O_SB_LUT4_O_1_I0[2]
|
|
.sym 7772 $PACKER_VCC_NET
|
|
.sym 7778 tx_fifo.empty_o_SB_DFF_Q_D_SB_LUT4_O_I1_SB_LUT4_O_1_I3_SB_LUT4_O_I3[1]
|
|
.sym 7779 w_tx_fifo_pull
|
|
.sym 7784 lvds_tx_inst.r_fifo_data[10]
|
|
.sym 7785 w_lvds_tx_d1_SB_DFF_Q_D_SB_LUT4_O_1_I0_SB_LUT4_O_I0[0]
|
|
.sym 7786 lvds_tx_inst.r_fifo_data[2]
|
|
.sym 7787 lvds_tx_inst.o_fifo_pull_SB_DFFSR_Q_R_SB_LUT4_O_I1[0]
|
|
.sym 7788 w_lvds_tx_d1_SB_DFF_Q_D_SB_LUT4_O_I1_SB_LUT4_O_1_I0[1]
|
|
.sym 7790 lvds_tx_inst.r_fifo_data[0]
|
|
.sym 7791 lvds_tx_inst.r_fifo_data[30]
|
|
.sym 7800 tx_fifo.empty_o_SB_LUT4_I3_O_SB_LUT4_O_I0[3]
|
|
.sym 7801 tx_fifo.empty_o_SB_LUT4_I3_O_SB_LUT4_O_1_I0[2]
|
|
.sym 7803 tx_fifo.empty_o_SB_LUT4_I3_O_SB_LUT4_O_1_I0[3]
|
|
.sym 7804 tx_fifo.empty_o_SB_DFF_Q_D_SB_LUT4_O_I1_SB_LUT4_O_1_I3[1]
|
|
.sym 7805 tx_fifo.empty_o_SB_DFF_Q_D_SB_LUT4_O_I1_SB_LUT4_O_1_I3[2]
|
|
.sym 7806 tx_fifo.empty_o_SB_DFF_Q_D_SB_LUT4_O_I1_SB_LUT4_O_1_I3_SB_LUT4_O_I3[1]
|
|
.sym 7807 tx_fifo.empty_o_SB_DFF_Q_D_SB_LUT4_O_I1_SB_LUT4_O_1_I3_SB_LUT4_O_I3[2]
|
|
.sym 7808 tx_fifo.rd_addr[9]
|
|
.sym 7809 tx_fifo.empty_o_SB_LUT4_I3_O_SB_LUT4_O_I0[1]
|
|
.sym 7810 tx_fifo.rd_addr[0]
|
|
.sym 7811 o_iq_tx_clk_p$SB_IO_OUT_$glb_clk
|
|
.sym 7812 w_tx_fifo_pull
|
|
.sym 7813 $PACKER_VCC_NET
|
|
.sym 7817 w_tx_fifo_data[31]
|
|
.sym 7821 w_tx_fifo_data[29]
|
|
.sym 7835 tx_fifo.rd_addr_gray_wr_r[1]
|
|
.sym 7856 tx_fifo.wr_addr[4]
|
|
.sym 7857 tx_fifo.wr_addr[5]
|
|
.sym 7858 $PACKER_VCC_NET
|
|
.sym 7859 tx_fifo.wr_addr[3]
|
|
.sym 7860 tx_fifo.wr_addr[8]
|
|
.sym 7862 tx_fifo.wr_addr[7]
|
|
.sym 7865 tx_fifo.full_o_SB_DFF_Q_D_SB_LUT4_O_I0_SB_LUT4_O_1_I0_SB_LUT4_O_I3[1]
|
|
.sym 7866 tx_fifo.full_o_SB_DFF_Q_D_SB_LUT4_O_I0_SB_LUT4_O_1_I2_SB_LUT4_O_I3[0]
|
|
.sym 7868 tx_fifo.wr_addr[9]
|
|
.sym 7869 w_tx_fifo_data[8]
|
|
.sym 7872 w_tx_fifo_push
|
|
.sym 7874 tx_fifo.wr_addr[2]
|
|
.sym 7881 w_tx_fifo_data[10]
|
|
.sym 7883 tx_fifo.wr_addr[6]
|
|
.sym 7886 tx_fifo.wr_addr_gray_rd_r[8]
|
|
.sym 7887 tx_fifo.wr_addr_gray_rd[1]
|
|
.sym 7890 tx_fifo.wr_addr_gray_rd[8]
|
|
.sym 7902 tx_fifo.wr_addr[2]
|
|
.sym 7903 tx_fifo.wr_addr[3]
|
|
.sym 7905 tx_fifo.wr_addr[4]
|
|
.sym 7906 tx_fifo.wr_addr[5]
|
|
.sym 7907 tx_fifo.wr_addr[6]
|
|
.sym 7908 tx_fifo.wr_addr[7]
|
|
.sym 7909 tx_fifo.wr_addr[8]
|
|
.sym 7910 tx_fifo.wr_addr[9]
|
|
.sym 7911 tx_fifo.full_o_SB_DFF_Q_D_SB_LUT4_O_I0_SB_LUT4_O_1_I0_SB_LUT4_O_I3[1]
|
|
.sym 7912 tx_fifo.full_o_SB_DFF_Q_D_SB_LUT4_O_I0_SB_LUT4_O_1_I2_SB_LUT4_O_I3[0]
|
|
.sym 7913 r_counter_$glb_clk
|
|
.sym 7914 w_tx_fifo_push
|
|
.sym 7916 w_tx_fifo_data[8]
|
|
.sym 7920 w_tx_fifo_data[10]
|
|
.sym 7923 $PACKER_VCC_NET
|
|
.sym 7933 w_tx_fifo_pulled_data[2]
|
|
.sym 7936 tx_fifo.wr_addr[8]
|
|
.sym 7937 w_tx_fifo_pull
|
|
.sym 7939 io_ctrl_ins.rf_mode[1]
|
|
.sym 7941 tx_fifo.rd_addr[0]
|
|
.sym 7944 tx_fifo.empty_o_SB_LUT4_I3_O_SB_LUT4_O_1_I0[2]
|
|
.sym 7947 tx_fifo.empty_o_SB_LUT4_I3_O_SB_LUT4_O_1_I0[3]
|
|
.sym 7956 tx_fifo.empty_o_SB_LUT4_I3_O_SB_LUT4_O_I0[3]
|
|
.sym 7960 w_tx_fifo_data[11]
|
|
.sym 7961 tx_fifo.empty_o_SB_LUT4_I3_O_SB_LUT4_O_1_I0[2]
|
|
.sym 7962 tx_fifo.empty_o_SB_LUT4_I3_O_SB_LUT4_O_1_I0[3]
|
|
.sym 7964 tx_fifo.rd_addr[0]
|
|
.sym 7965 tx_fifo.empty_o_SB_LUT4_I3_O_SB_LUT4_O_I0[1]
|
|
.sym 7966 tx_fifo.empty_o_SB_DFF_Q_D_SB_LUT4_O_I1_SB_LUT4_O_1_I3[1]
|
|
.sym 7967 tx_fifo.empty_o_SB_DFF_Q_D_SB_LUT4_O_I1_SB_LUT4_O_1_I3[2]
|
|
.sym 7968 tx_fifo.empty_o_SB_DFF_Q_D_SB_LUT4_O_I1_SB_LUT4_O_1_I3_SB_LUT4_O_I3[1]
|
|
.sym 7969 $PACKER_VCC_NET
|
|
.sym 7971 tx_fifo.empty_o_SB_DFF_Q_D_SB_LUT4_O_I1_SB_LUT4_O_1_I3_SB_LUT4_O_I3[2]
|
|
.sym 7974 w_tx_fifo_pull
|
|
.sym 7981 w_tx_fifo_data[9]
|
|
.sym 7984 tx_fifo.rd_addr[9]
|
|
.sym 8000 tx_fifo.empty_o_SB_LUT4_I3_O_SB_LUT4_O_I0[3]
|
|
.sym 8001 tx_fifo.empty_o_SB_LUT4_I3_O_SB_LUT4_O_1_I0[2]
|
|
.sym 8003 tx_fifo.empty_o_SB_LUT4_I3_O_SB_LUT4_O_1_I0[3]
|
|
.sym 8004 tx_fifo.empty_o_SB_DFF_Q_D_SB_LUT4_O_I1_SB_LUT4_O_1_I3[1]
|
|
.sym 8005 tx_fifo.empty_o_SB_DFF_Q_D_SB_LUT4_O_I1_SB_LUT4_O_1_I3[2]
|
|
.sym 8006 tx_fifo.empty_o_SB_DFF_Q_D_SB_LUT4_O_I1_SB_LUT4_O_1_I3_SB_LUT4_O_I3[1]
|
|
.sym 8007 tx_fifo.empty_o_SB_DFF_Q_D_SB_LUT4_O_I1_SB_LUT4_O_1_I3_SB_LUT4_O_I3[2]
|
|
.sym 8008 tx_fifo.rd_addr[9]
|
|
.sym 8009 tx_fifo.empty_o_SB_LUT4_I3_O_SB_LUT4_O_I0[1]
|
|
.sym 8010 tx_fifo.rd_addr[0]
|
|
.sym 8011 o_iq_tx_clk_p$SB_IO_OUT_$glb_clk
|
|
.sym 8012 w_tx_fifo_pull
|
|
.sym 8013 $PACKER_VCC_NET
|
|
.sym 8017 w_tx_fifo_data[11]
|
|
.sym 8021 w_tx_fifo_data[9]
|
|
.sym 8026 smi_ctrl_ins.o_channel
|
|
.sym 8031 io_ctrl_ins.led0_state
|
|
.sym 8033 io_ctrl_ins.led1_state
|
|
.sym 8036 w_lvds_tx_d1_SB_DFF_Q_D_SB_LUT4_O_1_I0_SB_LUT4_O_I0[1]
|
|
.sym 8088 o_led1$SB_IO_OUT
|
|
.sym 8093 w_smi_data_output[6]
|
|
.sym 8095 o_led0$SB_IO_OUT
|
|
.sym 8099 $PACKER_VCC_NET
|
|
.sym 8107 $PACKER_VCC_NET
|
|
.sym 8112 o_led0$SB_IO_OUT
|
|
.sym 8117 w_smi_data_output[6]
|
|
.sym 8118 w_rx_24_fifo_data[5]
|
|
.sym 8119 w_rx_24_fifo_data[4]
|
|
.sym 8120 w_rx_24_fifo_data[2]
|
|
.sym 8121 w_rx_24_fifo_data[7]
|
|
.sym 8122 w_rx_fifo_data[4]
|
|
.sym 8123 w_rx_fifo_data[2]
|
|
.sym 8124 w_rx_fifo_data[7]
|
|
.sym 8125 w_rx_fifo_data[9]
|
|
.sym 8126 w_smi_data_input[6]
|
|
.sym 8134 w_smi_data_input[6]
|
|
.sym 8135 lvds_rx_24_inst.r_state_if_SB_DFFESR_Q_R
|
|
.sym 8142 w_lvds_rx_24_d0_SB_LUT4_I1_O[3]
|
|
.sym 8148 w_smi_data_input[6]
|
|
.sym 8152 o_led0$SB_IO_OUT
|
|
.sym 8160 rx_fifo.full_o_SB_LUT4_I3_1_O_SB_LUT4_I0_O[2]
|
|
.sym 8166 w_rx_09_fifo_data[7]
|
|
.sym 8167 w_rx_09_fifo_data[5]
|
|
.sym 8171 o_led1$SB_IO_OUT
|
|
.sym 8172 rx_fifo.full_o_SB_LUT4_I3_1_O_SB_LUT4_I0_O[1]
|
|
.sym 8176 rx_fifo.full_o_SB_LUT4_I3_1_O_SB_LUT4_I0_O[0]
|
|
.sym 8177 w_rx_09_fifo_data[2]
|
|
.sym 8181 w_rx_09_fifo_data[1]
|
|
.sym 8184 rx_fifo.full_o_SB_LUT4_I3_1_O_SB_LUT4_I0_O[3]
|
|
.sym 8186 w_rx_09_fifo_data[3]
|
|
.sym 8187 w_lvds_rx_09_d1_SB_LUT4_I0_O[0]
|
|
.sym 8189 w_rx_09_fifo_data[0]
|
|
.sym 8191 w_rx_24_fifo_data[3]
|
|
.sym 8194 w_rx_09_fifo_data[2]
|
|
.sym 8202 w_rx_09_fifo_data[0]
|
|
.sym 8208 w_rx_09_fifo_data[1]
|
|
.sym 8214 w_rx_09_fifo_data[7]
|
|
.sym 8217 rx_fifo.full_o_SB_LUT4_I3_1_O_SB_LUT4_I0_O[0]
|
|
.sym 8218 rx_fifo.full_o_SB_LUT4_I3_1_O_SB_LUT4_I0_O[3]
|
|
.sym 8219 rx_fifo.full_o_SB_LUT4_I3_1_O_SB_LUT4_I0_O[2]
|
|
.sym 8220 rx_fifo.full_o_SB_LUT4_I3_1_O_SB_LUT4_I0_O[1]
|
|
.sym 8224 w_rx_24_fifo_data[3]
|
|
.sym 8225 w_rx_09_fifo_data[3]
|
|
.sym 8226 o_led1$SB_IO_OUT
|
|
.sym 8230 w_rx_09_fifo_data[5]
|
|
.sym 8235 w_rx_09_fifo_data[3]
|
|
.sym 8239 w_lvds_rx_09_d1_SB_LUT4_I0_O[0]
|
|
.sym 8240 o_iq_tx_clk_p$SB_IO_OUT_$glb_clk
|
|
.sym 8242 w_smi_data_input[2]
|
|
.sym 8244 w_smi_data_input[1]
|
|
.sym 8247 rx_fifo.wr_addr_gray_SB_LUT4_I2_O[1]
|
|
.sym 8248 rx_fifo.wr_addr_gray_SB_LUT4_I2_O[2]
|
|
.sym 8249 rx_fifo.wr_addr_gray_SB_LUT4_I2_O[3]
|
|
.sym 8250 rx_fifo.wr_addr_gray_SB_LUT4_I2_O[4]
|
|
.sym 8251 rx_fifo.wr_addr_gray_SB_LUT4_I2_O[5]
|
|
.sym 8252 rx_fifo.wr_addr_gray_SB_LUT4_I2_O[6]
|
|
.sym 8253 rx_fifo.wr_addr_gray_SB_LUT4_I2_O[7]
|
|
.sym 8254 w_smi_data_output[3]
|
|
.sym 8257 w_smi_data_input[6]
|
|
.sym 8258 w_rx_09_fifo_data[4]
|
|
.sym 8265 rx_fifo.wr_addr[2]
|
|
.sym 8266 w_rx_09_fifo_data[9]
|
|
.sym 8274 w_smi_data_input[1]
|
|
.sym 8275 w_rx_09_fifo_data[1]
|
|
.sym 8277 rx_fifo.rd_addr_gray_wr_r[6]
|
|
.sym 8278 rx_fifo.full_o_SB_LUT4_I3_1_O_SB_LUT4_I0_O[3]
|
|
.sym 8281 w_lvds_rx_24_d0_SB_LUT4_I1_O[0]
|
|
.sym 8282 $PACKER_VCC_NET
|
|
.sym 8283 w_smi_data_output[2]
|
|
.sym 8284 w_rx_09_fifo_data[0]
|
|
.sym 8286 w_smi_data_output[1]
|
|
.sym 8289 w_rx_fifo_data[2]
|
|
.sym 8294 smi_ctrl_ins.r_fifo_pulled_data_SB_DFFNESR_Q_E
|
|
.sym 8295 w_rx_09_fifo_data[5]
|
|
.sym 8296 rx_fifo.full_o_SB_LUT4_I3_1_O_SB_LUT4_I0_O[0]
|
|
.sym 8297 rx_fifo.wr_addr_gray_SB_LUT4_I2_O[2]
|
|
.sym 8301 w_smi_data_input[7]
|
|
.sym 8302 rx_fifo.full_o_SB_DFF_Q_D_SB_LUT4_O_I0_SB_LUT4_O_2_I0[2]
|
|
.sym 8303 rx_fifo.wr_addr_gray_SB_LUT4_I2_O[5]
|
|
.sym 8304 rx_fifo.full_o_SB_LUT4_I3_1_O_SB_LUT4_I0_O[1]
|
|
.sym 8305 w_smi_data_input[2]
|
|
.sym 8306 rx_fifo.wr_addr_gray_SB_LUT4_I2_O[6]
|
|
.sym 8307 rx_fifo.full_o_SB_LUT4_I3_1_O[1]
|
|
.sym 8308 w_lvds_rx_24_d0_SB_LUT4_I1_O[2]
|
|
.sym 8309 rx_fifo.wr_addr_gray_SB_DFFE_Q_8_D[0]
|
|
.sym 8311 rx_fifo.wr_addr_gray_SB_DFFE_Q_8_D[2]
|
|
.sym 8312 w_rx_24_fifo_data[3]
|
|
.sym 8316 w_smi_data_input[2]
|
|
.sym 8317 rx_fifo.full_o_SB_DFF_Q_D_SB_LUT4_O_I0[3]
|
|
.sym 8330 w_rx_fifo_pulled_data[5]
|
|
.sym 8332 w_rx_fifo_pulled_data[9]
|
|
.sym 8333 rx_fifo.rd_addr_gray_wr_r[6]
|
|
.sym 8337 w_lvds_rx_24_d0_SB_LUT4_I1_O[0]
|
|
.sym 8340 w_rx_fifo_pulled_data[0]
|
|
.sym 8341 rx_fifo.wr_addr_gray_SB_DFFE_Q_8_D[0]
|
|
.sym 8342 rx_fifo.wr_addr_gray_SB_DFFE_Q_8_D[2]
|
|
.sym 8344 w_rx_fifo_pulled_data[10]
|
|
.sym 8348 w_rx_fifo_pulled_data[8]
|
|
.sym 8350 smi_ctrl_ins.r_fifo_pulled_data_SB_DFFNESR_Q_E
|
|
.sym 8352 rx_fifo.rd_addr_gray_wr_r[1]
|
|
.sym 8356 rx_fifo.rd_addr_gray_wr_r[1]
|
|
.sym 8357 rx_fifo.rd_addr_gray_wr_r[6]
|
|
.sym 8358 rx_fifo.wr_addr_gray_SB_DFFE_Q_8_D[0]
|
|
.sym 8359 rx_fifo.wr_addr_gray_SB_DFFE_Q_8_D[2]
|
|
.sym 8363 w_rx_fifo_pulled_data[8]
|
|
.sym 8371 w_rx_fifo_pulled_data[5]
|
|
.sym 8375 w_rx_fifo_pulled_data[9]
|
|
.sym 8386 w_rx_fifo_pulled_data[10]
|
|
.sym 8395 w_rx_fifo_pulled_data[0]
|
|
.sym 8398 w_lvds_rx_24_d0_SB_LUT4_I1_O[0]
|
|
.sym 8402 smi_ctrl_ins.r_fifo_pulled_data_SB_DFFNESR_Q_E
|
|
.sym 8403 smi_ctrl_ins.soe_and_reset_$glb_clk
|
|
.sym 8404 i_rst_b_SB_LUT4_I3_O_$glb_sr
|
|
.sym 8405 rx_fifo.wr_addr_gray_SB_LUT4_I2_O[8]
|
|
.sym 8406 rx_fifo.full_o_SB_LUT4_I3_1_O[1]
|
|
.sym 8407 rx_fifo.wr_addr_gray_SB_DFFE_Q_8_D[0]
|
|
.sym 8408 rx_fifo.wr_addr_gray_SB_DFFE_Q_8_D[2]
|
|
.sym 8409 rx_fifo.full_o_SB_LUT4_I3_1_O_SB_LUT4_I0_O[0]
|
|
.sym 8411 rx_fifo.full_o_SB_DFF_Q_D_SB_LUT4_O_I0_SB_LUT4_O_I0[0]
|
|
.sym 8412 w_rx_24_fifo_push
|
|
.sym 8419 smi_ctrl_ins.r_fifo_pulled_data[10]
|
|
.sym 8421 smi_ctrl_ins.r_fifo_pulled_data[8]
|
|
.sym 8423 smi_ctrl_ins.o_smi_data_out_SB_DFFNE_Q_D_SB_LUT4_O_2_I3[0]
|
|
.sym 8424 w_smi_data_output[6]
|
|
.sym 8425 smi_ctrl_ins.r_fifo_pulled_data[9]
|
|
.sym 8426 w_lvds_rx_24_d0_SB_LUT4_I1_O[0]
|
|
.sym 8429 rx_fifo.full_o_SB_LUT4_I3_1_O_SB_LUT4_I0_O[1]
|
|
.sym 8430 rx_fifo.full_o_SB_DFF_Q_D_SB_LUT4_O_I0_SB_LUT4_O_2_I2[6]
|
|
.sym 8431 w_rx_fifo_push
|
|
.sym 8432 w_rx_24_fifo_data[0]
|
|
.sym 8433 rx_fifo.full_o_SB_DFF_Q_D_SB_LUT4_O_I0[3]
|
|
.sym 8434 w_smi_data_input[2]
|
|
.sym 8435 rx_fifo.wr_addr[5]
|
|
.sym 8436 w_rx_24_fifo_push
|
|
.sym 8437 rx_fifo.wr_addr[7]
|
|
.sym 8438 rx_fifo.wr_addr[9]
|
|
.sym 8439 rx_fifo.wr_addr[3]
|
|
.sym 8440 w_rx_fifo_full
|
|
.sym 8448 rx_fifo.wr_addr_gray_SB_LUT4_I2_O[2]
|
|
.sym 8449 rx_fifo.wr_addr_gray_SB_LUT4_I2_O[3]
|
|
.sym 8450 rx_fifo.wr_addr_gray_SB_LUT4_I2_O[4]
|
|
.sym 8451 rx_fifo.wr_addr_gray_SB_LUT4_I2_O[5]
|
|
.sym 8452 rx_fifo.wr_addr_gray_SB_LUT4_I2_O[6]
|
|
.sym 8457 w_rx_fifo_push
|
|
.sym 8460 o_led1$SB_IO_OUT
|
|
.sym 8461 rx_fifo.wr_addr_gray_SB_LUT4_I2_O[7]
|
|
.sym 8464 w_rx_fifo_full
|
|
.sym 8474 w_rx_09_fifo_push
|
|
.sym 8477 w_rx_24_fifo_push
|
|
.sym 8479 rx_fifo.wr_addr_gray_SB_LUT4_I2_O[7]
|
|
.sym 8487 rx_fifo.wr_addr_gray_SB_LUT4_I2_O[3]
|
|
.sym 8491 rx_fifo.wr_addr_gray_SB_LUT4_I2_O[4]
|
|
.sym 8500 rx_fifo.wr_addr_gray_SB_LUT4_I2_O[6]
|
|
.sym 8503 rx_fifo.wr_addr_gray_SB_LUT4_I2_O[2]
|
|
.sym 8515 w_rx_24_fifo_push
|
|
.sym 8516 o_led1$SB_IO_OUT
|
|
.sym 8517 w_rx_fifo_full
|
|
.sym 8518 w_rx_09_fifo_push
|
|
.sym 8523 rx_fifo.wr_addr_gray_SB_LUT4_I2_O[5]
|
|
.sym 8525 w_rx_fifo_push
|
|
.sym 8526 o_iq_tx_clk_p$SB_IO_OUT_$glb_clk
|
|
.sym 8530 lvds_rx_24_inst.o_fifo_push_SB_DFFESR_Q_E
|
|
.sym 8531 rx_fifo.wr_addr_gray_SB_DFFE_Q_2_D[2]
|
|
.sym 8532 rx_fifo.full_o_SB_LUT4_I3_1_O_SB_LUT4_I0_O_SB_LUT4_O_2_I0[2]
|
|
.sym 8533 w_rx_24_fifo_data[3]
|
|
.sym 8534 rx_fifo.full_o_SB_LUT4_I3_1_O_SB_LUT4_I0_O[1]
|
|
.sym 8535 lvds_rx_24_inst.o_fifo_push_SB_DFFESR_Q_R
|
|
.sym 8536 smi_ctrl_ins.r_fifo_pulled_data_SB_DFFNESR_Q_E
|
|
.sym 8542 rx_fifo.full_o_SB_DFF_Q_D_SB_LUT4_O_I0_SB_LUT4_O_1_I0[2]
|
|
.sym 8545 w_rx_fifo_push
|
|
.sym 8546 rx_fifo.wr_addr[4]
|
|
.sym 8547 rx_fifo.rd_addr_gray_wr_r[1]
|
|
.sym 8550 rx_fifo.wr_addr[2]
|
|
.sym 8552 w_smi_data_input[1]
|
|
.sym 8553 rx_fifo.wr_addr_gray_SB_LUT4_I2_O[3]
|
|
.sym 8554 w_lvds_rx_24_d0_SB_LUT4_I1_O[0]
|
|
.sym 8555 rx_fifo.rd_addr_gray_wr_r[6]
|
|
.sym 8556 lvds_rx_09_inst.o_fifo_push_SB_DFFESR_Q_D
|
|
.sym 8558 rx_fifo.full_o_SB_DFF_Q_D_SB_LUT4_O_I0_SB_LUT4_O_I0[2]
|
|
.sym 8569 rx_fifo.wr_addr[7]
|
|
.sym 8571 rx_fifo.wr_addr[4]
|
|
.sym 8572 rx_fifo.wr_addr[6]
|
|
.sym 8573 rx_fifo.wr_addr[2]
|
|
.sym 8578 rx_fifo.wr_addr[3]
|
|
.sym 8579 rx_fifo.full_o_SB_DFF_Q_D_SB_LUT4_O_I0_SB_LUT4_O_I0_SB_LUT4_O_I0[0]
|
|
.sym 8580 rx_fifo.full_o_SB_DFF_Q_D_SB_LUT4_O_I0_SB_LUT4_O_1_I0[2]
|
|
.sym 8584 rx_fifo.wr_addr[5]
|
|
.sym 8591 rx_fifo.wr_addr[8]
|
|
.sym 8601 $nextpnr_ICESTORM_LC_4$O
|
|
.sym 8604 rx_fifo.full_o_SB_DFF_Q_D_SB_LUT4_O_I0_SB_LUT4_O_1_I0[2]
|
|
.sym 8607 rx_fifo.full_o_SB_DFF_Q_D_SB_LUT4_O_I0_SB_LUT4_O_I0_SB_LUT4_O_I3[2]
|
|
.sym 8609 rx_fifo.wr_addr[2]
|
|
.sym 8611 rx_fifo.full_o_SB_DFF_Q_D_SB_LUT4_O_I0_SB_LUT4_O_1_I0[2]
|
|
.sym 8613 rx_fifo.full_o_SB_DFF_Q_D_SB_LUT4_O_I0_SB_LUT4_O_I0_SB_LUT4_O_I3[3]
|
|
.sym 8616 rx_fifo.wr_addr[3]
|
|
.sym 8617 rx_fifo.full_o_SB_DFF_Q_D_SB_LUT4_O_I0_SB_LUT4_O_I0_SB_LUT4_O_I3[2]
|
|
.sym 8619 rx_fifo.full_o_SB_DFF_Q_D_SB_LUT4_O_I0_SB_LUT4_O_I0_SB_LUT4_O_I3[4]
|
|
.sym 8621 rx_fifo.wr_addr[4]
|
|
.sym 8623 rx_fifo.full_o_SB_DFF_Q_D_SB_LUT4_O_I0_SB_LUT4_O_I0_SB_LUT4_O_I3[3]
|
|
.sym 8625 rx_fifo.full_o_SB_DFF_Q_D_SB_LUT4_O_I0_SB_LUT4_O_I0_SB_LUT4_O_I3[5]
|
|
.sym 8628 rx_fifo.wr_addr[5]
|
|
.sym 8629 rx_fifo.full_o_SB_DFF_Q_D_SB_LUT4_O_I0_SB_LUT4_O_I0_SB_LUT4_O_I3[4]
|
|
.sym 8631 rx_fifo.full_o_SB_DFF_Q_D_SB_LUT4_O_I0_SB_LUT4_O_I0_SB_LUT4_O_I3[6]
|
|
.sym 8634 rx_fifo.wr_addr[6]
|
|
.sym 8635 rx_fifo.full_o_SB_DFF_Q_D_SB_LUT4_O_I0_SB_LUT4_O_I0_SB_LUT4_O_I3[5]
|
|
.sym 8637 rx_fifo.full_o_SB_DFF_Q_D_SB_LUT4_O_I0_SB_LUT4_O_I0_SB_LUT4_O_I3[7]
|
|
.sym 8640 rx_fifo.wr_addr[7]
|
|
.sym 8641 rx_fifo.full_o_SB_DFF_Q_D_SB_LUT4_O_I0_SB_LUT4_O_I0_SB_LUT4_O_I3[6]
|
|
.sym 8643 rx_fifo.full_o_SB_DFF_Q_D_SB_LUT4_O_I0_SB_LUT4_O_I0_SB_LUT4_O_I3[8]
|
|
.sym 8644 rx_fifo.full_o_SB_DFF_Q_D_SB_LUT4_O_I0_SB_LUT4_O_I0_SB_LUT4_O_I0[0]
|
|
.sym 8645 rx_fifo.wr_addr[8]
|
|
.sym 8647 rx_fifo.full_o_SB_DFF_Q_D_SB_LUT4_O_I0_SB_LUT4_O_I0_SB_LUT4_O_I3[7]
|
|
.sym 8651 rx_fifo.rd_addr_gray_wr[5]
|
|
.sym 8652 rx_fifo.rd_addr_gray_wr[0]
|
|
.sym 8653 rx_fifo.rd_addr_gray_wr[1]
|
|
.sym 8654 rx_fifo.rd_addr_gray_wr[6]
|
|
.sym 8655 rx_fifo.rd_addr_gray_wr[7]
|
|
.sym 8656 w_rx_fifo_full
|
|
.sym 8657 rx_fifo.rd_addr_gray_wr[8]
|
|
.sym 8658 rx_fifo.rd_addr_gray_wr[2]
|
|
.sym 8665 rx_fifo.full_o_SB_DFF_Q_D_SB_LUT4_O_I0_SB_LUT4_O_2_I2[5]
|
|
.sym 8666 rx_fifo.wr_addr_gray_SB_DFFE_Q_2_D[2]
|
|
.sym 8667 rx_fifo.empty_o_SB_DFF_Q_D_SB_LUT4_O_I0_SB_LUT4_O_1_I1_SB_LUT4_O_1_I0[3]
|
|
.sym 8668 w_lvds_rx_24_d0_SB_LUT4_I1_O[0]
|
|
.sym 8669 w_rx_24_fifo_data[1]
|
|
.sym 8671 rx_fifo.empty_o_SB_LUT4_I2_O[0]
|
|
.sym 8673 rx_fifo.full_o_SB_DFF_Q_D_SB_LUT4_O_I0_SB_LUT4_O_2_I2[4]
|
|
.sym 8675 rx_fifo.full_o_SB_DFF_Q_D_SB_LUT4_O_I0_SB_LUT4_O_1_I0[2]
|
|
.sym 8676 rx_fifo.wr_addr_gray_SB_LUT4_I2_O[2]
|
|
.sym 8677 rx_fifo.wr_addr[8]
|
|
.sym 8678 rx_fifo.full_o_SB_DFF_Q_D_SB_LUT4_O_I0_SB_LUT4_O_2_I2[3]
|
|
.sym 8679 rx_fifo.full_o_SB_DFF_Q_D_SB_LUT4_O_I0_SB_LUT4_O_1_I0[1]
|
|
.sym 8680 rx_fifo.full_o_SB_DFF_Q_D_SB_LUT4_O_I0_SB_LUT4_O_2_I2[4]
|
|
.sym 8681 w_lvds_rx_24_d0_SB_LUT4_I1_O[1]
|
|
.sym 8682 rx_fifo.full_o_SB_DFF_Q_D_SB_LUT4_O_I0_SB_LUT4_O_2_I2[5]
|
|
.sym 8683 w_rx_09_fifo_push
|
|
.sym 8684 rx_fifo.full_o_SB_DFF_Q_D_SB_LUT4_O_I0_SB_LUT4_O_2_I2[6]
|
|
.sym 8685 lvds_rx_24_inst.o_fifo_push_SB_DFFESR_Q_R
|
|
.sym 8687 rx_fifo.full_o_SB_DFF_Q_D_SB_LUT4_O_I0_SB_LUT4_O_I0_SB_LUT4_O_I3[8]
|
|
.sym 8694 rx_fifo.full_o_SB_DFF_Q_D_SB_LUT4_O_I0_SB_LUT4_O_2_I0[3]
|
|
.sym 8695 rx_fifo.full_o_SB_DFF_Q_D_SB_LUT4_O_I0_SB_LUT4_O_2_I2[3]
|
|
.sym 8697 w_lvds_rx_24_d0_SB_LUT4_I1_O[2]
|
|
.sym 8699 w_lvds_rx_24_d0_SB_LUT4_I1_O_SB_LUT4_O_I0[1]
|
|
.sym 8701 rx_fifo.wr_addr[9]
|
|
.sym 8702 rx_fifo.rd_addr[9]
|
|
.sym 8703 o_led1$SB_IO_OUT
|
|
.sym 8705 lvds_rx_24_inst.r_phase_count_SB_LUT4_O_I3[0]
|
|
.sym 8706 w_rx_24_fifo_push
|
|
.sym 8709 w_rx_09_fifo_push
|
|
.sym 8710 rx_fifo.rd_addr_gray_wr[1]
|
|
.sym 8712 rx_fifo.rd_addr_gray_wr[7]
|
|
.sym 8717 w_lvds_rx_24_d0_SB_LUT4_I1_O_SB_LUT4_O_I0[2]
|
|
.sym 8722 rx_fifo.rd_addr_gray_wr_r[3]
|
|
.sym 8727 rx_fifo.wr_addr[9]
|
|
.sym 8728 rx_fifo.full_o_SB_DFF_Q_D_SB_LUT4_O_I0_SB_LUT4_O_I0_SB_LUT4_O_I3[8]
|
|
.sym 8731 w_rx_09_fifo_push
|
|
.sym 8733 w_rx_24_fifo_push
|
|
.sym 8734 o_led1$SB_IO_OUT
|
|
.sym 8738 rx_fifo.rd_addr[9]
|
|
.sym 8746 rx_fifo.rd_addr_gray_wr[7]
|
|
.sym 8751 rx_fifo.rd_addr_gray_wr[1]
|
|
.sym 8755 rx_fifo.full_o_SB_DFF_Q_D_SB_LUT4_O_I0_SB_LUT4_O_2_I2[3]
|
|
.sym 8757 rx_fifo.rd_addr_gray_wr_r[3]
|
|
.sym 8758 rx_fifo.full_o_SB_DFF_Q_D_SB_LUT4_O_I0_SB_LUT4_O_2_I0[3]
|
|
.sym 8767 w_lvds_rx_24_d0_SB_LUT4_I1_O[2]
|
|
.sym 8768 lvds_rx_24_inst.r_phase_count_SB_LUT4_O_I3[0]
|
|
.sym 8769 w_lvds_rx_24_d0_SB_LUT4_I1_O_SB_LUT4_O_I0[1]
|
|
.sym 8770 w_lvds_rx_24_d0_SB_LUT4_I1_O_SB_LUT4_O_I0[2]
|
|
.sym 8772 o_iq_tx_clk_p$SB_IO_OUT_$glb_clk
|
|
.sym 8774 rx_fifo.wr_addr_gray[2]
|
|
.sym 8775 rx_fifo.wr_addr_gray[4]
|
|
.sym 8776 rx_fifo.wr_addr_gray[3]
|
|
.sym 8777 rx_fifo.wr_addr_gray[7]
|
|
.sym 8779 rx_fifo.full_o_SB_DFF_Q_D_SB_LUT4_O_I0[0]
|
|
.sym 8780 rx_fifo.full_o_SB_DFF_Q_D_SB_LUT4_O_I0[1]
|
|
.sym 8781 rx_fifo.wr_addr[8]
|
|
.sym 8786 rx_fifo.full_o_SB_DFF_Q_D_SB_LUT4_O_I0_SB_LUT4_O_2_I2[8]
|
|
.sym 8787 rx_fifo.wr_addr[9]
|
|
.sym 8790 rx_fifo.full_o_SB_DFF_Q_D_SB_LUT4_O_I0_SB_LUT4_O_I0_SB_LUT4_O_I0[0]
|
|
.sym 8792 rx_fifo.empty_o_SB_DFF_Q_D_SB_LUT4_O_I0_SB_LUT4_O_1_I1_SB_LUT4_O_2_I0[3]
|
|
.sym 8794 rx_fifo.rd_addr_gray_wr_r[7]
|
|
.sym 8796 rx_fifo.rd_addr[7]
|
|
.sym 8799 rx_fifo.rd_addr_gray_wr[9]
|
|
.sym 8800 w_lvds_rx_24_d0_SB_LUT4_I1_O[2]
|
|
.sym 8801 rx_fifo.wr_addr_gray_SB_LUT4_I2_O[5]
|
|
.sym 8802 rx_fifo.wr_addr_gray_SB_DFFE_Q_8_D[0]
|
|
.sym 8803 rx_fifo.wr_addr_gray_SB_LUT4_I2_O[6]
|
|
.sym 8804 rx_fifo.wr_addr_gray_SB_DFFE_Q_8_D[2]
|
|
.sym 8805 rx_fifo.full_o_SB_DFF_Q_D_SB_LUT4_O_I0_SB_LUT4_O_2_I0[2]
|
|
.sym 8807 w_smi_data_input[7]
|
|
.sym 8808 rx_fifo.rd_addr_gray_wr_r[3]
|
|
.sym 8809 rx_fifo.full_o_SB_LUT4_I3_1_O[1]
|
|
.sym 8820 w_rx_fifo_full
|
|
.sym 8824 i_rst_b$SB_IO_IN
|
|
.sym 8828 lvds_rx_24_inst.r_state_if_SB_DFFESR_Q_R
|
|
.sym 8829 smi_ctrl_ins.tx_reg_state[1]
|
|
.sym 8831 w_smi_data_input[7]
|
|
.sym 8832 w_lvds_rx_24_d0_SB_LUT4_I1_O[0]
|
|
.sym 8833 lvds_rx_24_inst.r_state_if_SB_DFFESR_Q_E
|
|
.sym 8837 w_lvds_rx_24_d0
|
|
.sym 8838 lvds_rx_24_inst.r_state_if_SB_DFFESR_Q_D[2]
|
|
.sym 8841 w_lvds_rx_24_d1
|
|
.sym 8844 w_lvds_rx_24_d0_SB_LUT4_I1_O[2]
|
|
.sym 8848 i_rst_b$SB_IO_IN
|
|
.sym 8849 smi_ctrl_ins.tx_reg_state[1]
|
|
.sym 8850 w_smi_data_input[7]
|
|
.sym 8856 lvds_rx_24_inst.r_state_if_SB_DFFESR_Q_D[2]
|
|
.sym 8863 w_rx_fifo_full
|
|
.sym 8880 lvds_rx_24_inst.r_state_if_SB_DFFESR_Q_D[2]
|
|
.sym 8890 w_lvds_rx_24_d0_SB_LUT4_I1_O[0]
|
|
.sym 8891 w_lvds_rx_24_d0_SB_LUT4_I1_O[2]
|
|
.sym 8892 w_lvds_rx_24_d1
|
|
.sym 8893 w_lvds_rx_24_d0
|
|
.sym 8894 lvds_rx_24_inst.r_state_if_SB_DFFESR_Q_E
|
|
.sym 8895 o_iq_tx_clk_p$SB_IO_OUT_$glb_clk
|
|
.sym 8896 lvds_rx_24_inst.r_state_if_SB_DFFESR_Q_R
|
|
.sym 8897 rx_fifo.full_o_SB_DFF_Q_D_SB_LUT4_O_I0_SB_LUT4_O_2_I0[0]
|
|
.sym 8898 rx_fifo.full_o_SB_DFF_Q_D_SB_LUT4_O_I0[2]
|
|
.sym 8899 rx_fifo.full_o_SB_DFF_Q_D_SB_LUT4_O_I0_SB_LUT4_O_I0_SB_LUT4_O_1_I3[0]
|
|
.sym 8900 rx_fifo.rd_addr_gray_wr_r[3]
|
|
.sym 8901 lvds_rx_24_inst.r_state_if_SB_DFFESR_Q_E
|
|
.sym 8902 rx_fifo.rd_addr_gray_wr[3]
|
|
.sym 8903 rx_fifo.full_o_SB_DFF_Q_D_SB_LUT4_O_I0_SB_LUT4_O_1_I0[0]
|
|
.sym 8904 rx_fifo.rd_addr_gray_wr[4]
|
|
.sym 8909 smi_ctrl_ins.r_fifo_pushed_data_SB_DFFNESR_Q_9_E
|
|
.sym 8912 rx_fifo.wr_addr_gray[7]
|
|
.sym 8913 rx_fifo.rd_addr[9]
|
|
.sym 8914 rx_fifo.wr_addr[8]
|
|
.sym 8916 rx_fifo.rd_addr_gray_SB_DFFE_Q_5_D[2]
|
|
.sym 8917 smi_ctrl_ins.tx_reg_state[1]
|
|
.sym 8922 rx_fifo.wr_addr[9]
|
|
.sym 8924 rx_fifo.rd_addr_gray_wr[0]
|
|
.sym 8928 w_rx_fifo_push
|
|
.sym 8931 w_rx_24_fifo_data[0]
|
|
.sym 8957 w_lvds_rx_24_d0
|
|
.sym 8961 w_lvds_rx_24_d1
|
|
.sym 8965 w_lvds_rx_24_d0_SB_LUT4_I1_O[3]
|
|
.sym 8967 lvds_rx_24_inst.r_state_if_SB_DFFESR_Q_R
|
|
.sym 8977 w_lvds_rx_24_d1
|
|
.sym 8991 w_lvds_rx_24_d0
|
|
.sym 9017 w_lvds_rx_24_d0_SB_LUT4_I1_O[3]
|
|
.sym 9018 o_iq_tx_clk_p$SB_IO_OUT_$glb_clk
|
|
.sym 9019 lvds_rx_24_inst.r_state_if_SB_DFFESR_Q_R
|
|
.sym 9020 rx_fifo.full_o_SB_DFF_Q_D_SB_LUT4_O_I0_SB_LUT4_O_I0_SB_LUT4_O_I0[1]
|
|
.sym 9021 rx_fifo.full_o_SB_DFF_Q_D_SB_LUT4_O_I0_SB_LUT4_O_2_I0[1]
|
|
.sym 9022 rx_fifo.rd_addr_gray_wr_r[4]
|
|
.sym 9024 rx_fifo.full_o_SB_DFF_Q_D_SB_LUT4_O_I0_SB_LUT4_O_1_I0[3]
|
|
.sym 9025 rx_fifo.full_o_SB_DFF_Q_D_SB_LUT4_O_I0_SB_LUT4_O_I0_SB_LUT4_O_I0[2]
|
|
.sym 9027 rx_fifo.rd_addr_gray_wr_r[6]
|
|
.sym 9033 rx_fifo.full_o_SB_DFF_Q_D_SB_LUT4_O_I0_SB_LUT4_O_2_I0[3]
|
|
.sym 9034 w_rx_fifo_push
|
|
.sym 9037 lvds_tx_inst.o_fifo_pull_SB_DFFSR_Q_R
|
|
.sym 9051 rx_fifo.rd_addr_gray_wr_r[6]
|
|
.sym 9063 w_lvds_rx_24_d0_SB_LUT4_I1_O[0]
|
|
.sym 9064 w_lvds_rx_24_d1
|
|
.sym 9066 rx_fifo.wr_addr_gray_SB_DFFE_Q_2_D[2]
|
|
.sym 9071 rx_fifo.wr_addr_gray_SB_LUT4_I2_O[5]
|
|
.sym 9072 w_lvds_rx_24_d0_SB_LUT4_I1_O[2]
|
|
.sym 9073 rx_fifo.wr_addr_gray_SB_LUT4_I2_O[6]
|
|
.sym 9074 rx_fifo.wr_addr_gray_SB_DFFE_Q_8_D[0]
|
|
.sym 9075 w_lvds_rx_24_d0
|
|
.sym 9076 rx_fifo.wr_addr_gray_SB_DFFE_Q_8_D[2]
|
|
.sym 9079 rx_fifo.full_o_SB_LUT4_I3_1_O[1]
|
|
.sym 9088 w_rx_fifo_push
|
|
.sym 9095 rx_fifo.wr_addr_gray_SB_DFFE_Q_2_D[2]
|
|
.sym 9106 rx_fifo.wr_addr_gray_SB_DFFE_Q_8_D[0]
|
|
.sym 9113 rx_fifo.wr_addr_gray_SB_DFFE_Q_8_D[2]
|
|
.sym 9118 w_lvds_rx_24_d0_SB_LUT4_I1_O[2]
|
|
.sym 9119 w_lvds_rx_24_d0
|
|
.sym 9120 w_lvds_rx_24_d0_SB_LUT4_I1_O[0]
|
|
.sym 9121 w_lvds_rx_24_d1
|
|
.sym 9124 rx_fifo.wr_addr_gray_SB_LUT4_I2_O[6]
|
|
.sym 9126 rx_fifo.wr_addr_gray_SB_LUT4_I2_O[5]
|
|
.sym 9130 rx_fifo.full_o_SB_LUT4_I3_1_O[1]
|
|
.sym 9140 w_rx_fifo_push
|
|
.sym 9141 o_iq_tx_clk_p$SB_IO_OUT_$glb_clk
|
|
.sym 9143 rx_fifo.wr_addr_gray_rd[9]
|
|
.sym 9144 rx_fifo.wr_addr_gray_rd[1]
|
|
.sym 9147 rx_fifo.wr_addr_gray_rd[5]
|
|
.sym 9148 rx_fifo.rd_addr_gray_SB_DFFE_Q_7_D[1]
|
|
.sym 9149 tx_fifo.rd_addr_gray_wr[4]
|
|
.sym 9150 tx_fifo.rd_addr_gray_wr[3]
|
|
.sym 9168 tx_fifo.empty_o_SB_DFF_Q_D_SB_LUT4_O_I1_SB_LUT4_O_I0_SB_LUT4_O_2_I3[1]
|
|
.sym 9169 rx_fifo.wr_addr_gray_rd[3]
|
|
.sym 9170 tx_fifo.wr_addr[5]
|
|
.sym 9171 tx_fifo.rd_addr_gray_SB_DFFE_Q_8_D[3]
|
|
.sym 9173 w_tx_fifo_pulled_data[20]
|
|
.sym 9175 lvds_tx_inst.r_phase_count_SB_LUT4_I1_O_SB_DFF_D_Q[1]
|
|
.sym 9176 rx_fifo.wr_addr[9]
|
|
.sym 9177 w_lvds_tx_d1_SB_DFF_Q_D_SB_LUT4_O_1_I0_SB_LUT4_O_I0[1]
|
|
.sym 9178 tx_fifo.full_o_SB_DFF_Q_D_SB_LUT4_O_I0_SB_LUT4_O_1_I0_SB_LUT4_O_I3[1]
|
|
.sym 9185 w_tx_fifo_pulled_data[24]
|
|
.sym 9187 lvds_tx_inst.r_fifo_data[20]
|
|
.sym 9191 w_tx_fifo_pulled_data[20]
|
|
.sym 9193 lvds_tx_inst.r_fifo_data[22]
|
|
.sym 9199 w_tx_fifo_pulled_data[26]
|
|
.sym 9200 tx_fifo.empty_o_SB_LUT4_I3_O_SB_LUT4_O_1_I0[2]
|
|
.sym 9202 lvds_tx_inst.r_fifo_data[24]
|
|
.sym 9205 lvds_tx_inst.r_phase_count_SB_DFF_D_Q[0]
|
|
.sym 9207 lvds_tx_inst.r_fifo_data[26]
|
|
.sym 9209 w_tx_fifo_pulled_data[5]
|
|
.sym 9210 w_tx_fifo_pulled_data[22]
|
|
.sym 9215 lvds_tx_inst.r_phase_count_SB_LUT4_I1_1_O_SB_DFF_D_Q[2]
|
|
.sym 9219 tx_fifo.empty_o_SB_LUT4_I3_O_SB_LUT4_O_1_I0[2]
|
|
.sym 9223 w_tx_fifo_pulled_data[22]
|
|
.sym 9230 w_tx_fifo_pulled_data[24]
|
|
.sym 9235 w_tx_fifo_pulled_data[20]
|
|
.sym 9241 lvds_tx_inst.r_fifo_data[24]
|
|
.sym 9242 lvds_tx_inst.r_phase_count_SB_DFF_D_Q[0]
|
|
.sym 9243 lvds_tx_inst.r_phase_count_SB_LUT4_I1_1_O_SB_DFF_D_Q[2]
|
|
.sym 9244 lvds_tx_inst.r_fifo_data[26]
|
|
.sym 9247 lvds_tx_inst.r_phase_count_SB_DFF_D_Q[0]
|
|
.sym 9248 lvds_tx_inst.r_fifo_data[22]
|
|
.sym 9249 lvds_tx_inst.r_fifo_data[20]
|
|
.sym 9250 lvds_tx_inst.r_phase_count_SB_LUT4_I1_1_O_SB_DFF_D_Q[2]
|
|
.sym 9253 w_tx_fifo_pulled_data[5]
|
|
.sym 9262 w_tx_fifo_pulled_data[26]
|
|
.sym 9263 w_lvds_tx_d1_SB_DFF_Q_D_SB_LUT4_O_1_I0_SB_LUT4_O_I0_SB_LUT4_I1_O_$glb_ce
|
|
.sym 9264 o_iq_tx_clk_p$SB_IO_OUT_$glb_clk
|
|
.sym 9265 o_led0$SB_IO_OUT_$glb_sr
|
|
.sym 9266 tx_fifo.empty_o_SB_LUT4_I3_O_SB_LUT4_O_1_I0[2]
|
|
.sym 9267 tx_fifo.rd_addr_gray[2]
|
|
.sym 9268 tx_fifo.rd_addr[0]
|
|
.sym 9269 w_lvds_tx_d1_SB_DFF_Q_D_SB_LUT4_O_I1[1]
|
|
.sym 9270 tx_fifo.wr_addr_gray_SB_DFFE_Q_3_D[1]
|
|
.sym 9271 tx_fifo.rd_addr_gray[4]
|
|
.sym 9272 tx_fifo.full_o_SB_LUT4_I3_O[1]
|
|
.sym 9273 tx_fifo.empty_o_SB_LUT4_I3_O_SB_LUT4_O_1_I0[3]
|
|
.sym 9287 w_tx_fifo_full
|
|
.sym 9288 rx_fifo.wr_addr[2]
|
|
.sym 9289 w_tx_fifo_pulled_data[24]
|
|
.sym 9291 tx_fifo.empty_o_SB_DFF_Q_D_SB_LUT4_O_I1_SB_LUT4_O_I0_SB_LUT4_O_2_I3[0]
|
|
.sym 9292 w_lvds_tx_d1_SB_DFF_Q_D_SB_LUT4_O_1_I0_SB_LUT4_O_I0[2]
|
|
.sym 9297 w_tx_fifo_push
|
|
.sym 9298 w_lvds_tx_d1_SB_DFF_Q_D_SB_LUT4_O_1_I0_SB_LUT4_O_I0[2]
|
|
.sym 9299 tx_fifo.full_o_SB_DFF_Q_D_SB_LUT4_O_I0_SB_LUT4_O_1_I2_SB_LUT4_O_I3[0]
|
|
.sym 9300 tx_fifo.wr_addr_gray_SB_DFFE_Q_6_D[0]
|
|
.sym 9301 tx_fifo.wr_addr_gray_SB_DFFE_Q_6_D[3]
|
|
.sym 9308 tx_fifo.rd_addr_gray_wr[7]
|
|
.sym 9310 tx_fifo.rd_addr_gray_wr[5]
|
|
.sym 9315 tx_fifo.rd_addr_gray[8]
|
|
.sym 9318 w_lvds_tx_d1_SB_DFF_Q_D_SB_LUT4_O_1_I0_SB_LUT4_O_I2_SB_LUT4_O_I2[2]
|
|
.sym 9319 tx_fifo.rd_addr_gray[0]
|
|
.sym 9323 tx_fifo.rd_addr_gray[7]
|
|
.sym 9324 tx_fifo.rd_addr_gray[2]
|
|
.sym 9332 w_lvds_tx_d1_SB_DFF_Q_D_SB_LUT4_O_1_I0_SB_LUT4_O_I2_SB_LUT4_O_I2[0]
|
|
.sym 9333 w_lvds_tx_d1_SB_DFF_Q_D_SB_LUT4_O_1_I0_SB_LUT4_O_I2_SB_LUT4_O_I2[3]
|
|
.sym 9334 tx_fifo.rd_addr_gray[5]
|
|
.sym 9337 w_lvds_tx_d1_SB_DFF_Q_D_SB_LUT4_O_1_I0_SB_LUT4_O_I0[1]
|
|
.sym 9341 tx_fifo.rd_addr_gray[0]
|
|
.sym 9347 tx_fifo.rd_addr_gray[7]
|
|
.sym 9355 tx_fifo.rd_addr_gray[8]
|
|
.sym 9359 tx_fifo.rd_addr_gray[5]
|
|
.sym 9365 tx_fifo.rd_addr_gray[2]
|
|
.sym 9370 w_lvds_tx_d1_SB_DFF_Q_D_SB_LUT4_O_1_I0_SB_LUT4_O_I2_SB_LUT4_O_I2[3]
|
|
.sym 9371 w_lvds_tx_d1_SB_DFF_Q_D_SB_LUT4_O_1_I0_SB_LUT4_O_I2_SB_LUT4_O_I2[0]
|
|
.sym 9372 w_lvds_tx_d1_SB_DFF_Q_D_SB_LUT4_O_1_I0_SB_LUT4_O_I0[1]
|
|
.sym 9373 w_lvds_tx_d1_SB_DFF_Q_D_SB_LUT4_O_1_I0_SB_LUT4_O_I2_SB_LUT4_O_I2[2]
|
|
.sym 9377 tx_fifo.rd_addr_gray_wr[5]
|
|
.sym 9384 tx_fifo.rd_addr_gray_wr[7]
|
|
.sym 9387 r_counter_$glb_clk
|
|
.sym 9389 tx_fifo.wr_addr_gray[7]
|
|
.sym 9390 tx_fifo.wr_addr_gray[3]
|
|
.sym 9391 tx_fifo.wr_addr_gray[0]
|
|
.sym 9392 tx_fifo.wr_addr_gray[2]
|
|
.sym 9393 tx_fifo.wr_addr[9]
|
|
.sym 9394 tx_fifo.wr_addr_gray[4]
|
|
.sym 9395 tx_fifo.wr_addr_gray[5]
|
|
.sym 9396 tx_fifo.wr_addr_gray[6]
|
|
.sym 9401 tx_fifo.wr_addr_gray_rd[2]
|
|
.sym 9406 tx_fifo.empty_o_SB_LUT4_I3_O_SB_LUT4_O_1_I0[3]
|
|
.sym 9408 tx_fifo.empty_o_SB_LUT4_I3_O_SB_LUT4_O_1_I0[2]
|
|
.sym 9412 tx_fifo.rd_addr[0]
|
|
.sym 9413 tx_fifo.wr_addr[3]
|
|
.sym 9414 tx_fifo.wr_addr[9]
|
|
.sym 9415 tx_fifo.wr_addr[5]
|
|
.sym 9416 tx_fifo.wr_addr[8]
|
|
.sym 9418 tx_fifo.empty_o_SB_DFF_Q_D_SB_LUT4_O_I1_SB_LUT4_O_I0_SB_LUT4_O_2_I3[2]
|
|
.sym 9419 tx_fifo.wr_addr[2]
|
|
.sym 9420 tx_fifo.rd_addr_gray_SB_LUT4_I2_O[3]
|
|
.sym 9421 rx_fifo.empty_o_SB_DFF_Q_D_SB_LUT4_O_I0_SB_LUT4_O_1_I1_SB_LUT4_O_2_I0[1]
|
|
.sym 9422 tx_fifo.rd_addr_gray_wr_r[5]
|
|
.sym 9423 tx_fifo.wr_addr[4]
|
|
.sym 9424 tx_fifo.rd_addr_gray_wr_r[7]
|
|
.sym 9445 w_lvds_tx_d1_SB_DFF_Q_D_SB_LUT4_O_1_I0[3]
|
|
.sym 9446 tx_fifo.wr_addr_gray[7]
|
|
.sym 9448 tx_fifo.wr_addr_gray[0]
|
|
.sym 9449 tx_fifo.wr_addr_gray_rd[3]
|
|
.sym 9451 tx_fifo.wr_addr_gray_rd[4]
|
|
.sym 9454 w_lvds_tx_d1_SB_DFF_Q_D_SB_LUT4_O_1_I0_SB_LUT4_O_1_I2[1]
|
|
.sym 9457 tx_fifo.wr_addr_gray_rd[2]
|
|
.sym 9458 w_lvds_tx_d1_SB_DFF_Q_D_SB_LUT4_O_1_I0_SB_LUT4_O_I0[2]
|
|
.sym 9469 tx_fifo.wr_addr_gray_rd[3]
|
|
.sym 9475 tx_fifo.wr_addr_gray[7]
|
|
.sym 9489 tx_fifo.wr_addr_gray_rd[2]
|
|
.sym 9493 w_lvds_tx_d1_SB_DFF_Q_D_SB_LUT4_O_1_I0_SB_LUT4_O_I0[2]
|
|
.sym 9495 w_lvds_tx_d1_SB_DFF_Q_D_SB_LUT4_O_1_I0_SB_LUT4_O_1_I2[1]
|
|
.sym 9496 w_lvds_tx_d1_SB_DFF_Q_D_SB_LUT4_O_1_I0[3]
|
|
.sym 9502 tx_fifo.wr_addr_gray_rd[4]
|
|
.sym 9506 tx_fifo.wr_addr_gray[0]
|
|
.sym 9510 o_iq_tx_clk_p$SB_IO_OUT_$glb_clk
|
|
.sym 9512 tx_fifo.wr_addr[6]
|
|
.sym 9513 tx_fifo.wr_addr[2]
|
|
.sym 9514 tx_fifo.wr_addr[7]
|
|
.sym 9515 tx_fifo.wr_addr[4]
|
|
.sym 9516 tx_fifo.full_o_SB_DFF_Q_D_SB_LUT4_O_I0_SB_LUT4_O_1_I2_SB_LUT4_O_I3[0]
|
|
.sym 9517 tx_fifo.full_o_SB_DFF_Q_D_SB_LUT4_O_I0_SB_LUT4_O_1_I0_SB_LUT4_O_I3[1]
|
|
.sym 9518 tx_fifo.wr_addr[3]
|
|
.sym 9519 tx_fifo.wr_addr[5]
|
|
.sym 9526 w_tx_fifo_push
|
|
.sym 9534 tx_fifo.rd_addr_gray_SB_DFFE_Q_8_D[2]
|
|
.sym 9536 tx_fifo.wr_addr_gray_rd[6]
|
|
.sym 9537 tx_fifo.full_o_SB_DFF_Q_D_SB_LUT4_O_I0_SB_LUT4_O_1_I2_SB_LUT4_O_I3[0]
|
|
.sym 9538 tx_fifo.full_o_SB_DFF_Q_D_SB_LUT4_O_I0_SB_LUT4_O_1_I0[5]
|
|
.sym 9539 lvds_tx_inst.o_fifo_pull_SB_DFFSR_Q_R_SB_LUT4_O_I1[0]
|
|
.sym 9540 tx_fifo.full_o_SB_DFF_Q_D_SB_LUT4_O_I0_SB_LUT4_O_1_I0[6]
|
|
.sym 9542 lvds_tx_inst.o_fifo_pull_SB_DFFSR_Q_R_SB_LUT4_O_I1[3]
|
|
.sym 9544 $PACKER_VCC_NET
|
|
.sym 9547 w_tx_fifo_pull
|
|
.sym 9569 tx_fifo.wr_addr[6]
|
|
.sym 9570 tx_fifo.wr_addr[2]
|
|
.sym 9571 tx_fifo.wr_addr[7]
|
|
.sym 9572 tx_fifo.wr_addr[4]
|
|
.sym 9574 tx_fifo.full_o_SB_DFF_Q_D_SB_LUT4_O_I0_SB_LUT4_O_1_I0_SB_LUT4_O_I3[1]
|
|
.sym 9575 tx_fifo.wr_addr[3]
|
|
.sym 9576 tx_fifo.wr_addr[8]
|
|
.sym 9582 tx_fifo.full_o_SB_DFF_Q_D_SB_LUT4_O_I0_SB_LUT4_O_1_I0_SB_LUT4_O_I3[1]
|
|
.sym 9584 tx_fifo.wr_addr[5]
|
|
.sym 9585 $nextpnr_ICESTORM_LC_3$O
|
|
.sym 9587 tx_fifo.full_o_SB_DFF_Q_D_SB_LUT4_O_I0_SB_LUT4_O_1_I0_SB_LUT4_O_I3[1]
|
|
.sym 9591 tx_fifo.full_o_SB_DFF_Q_D_SB_LUT4_O_I0_SB_LUT4_O_1_I0_SB_LUT4_O_I3[2]
|
|
.sym 9594 tx_fifo.wr_addr[2]
|
|
.sym 9595 tx_fifo.full_o_SB_DFF_Q_D_SB_LUT4_O_I0_SB_LUT4_O_1_I0_SB_LUT4_O_I3[1]
|
|
.sym 9597 tx_fifo.full_o_SB_DFF_Q_D_SB_LUT4_O_I0_SB_LUT4_O_1_I0_SB_LUT4_O_I3[3]
|
|
.sym 9600 tx_fifo.wr_addr[3]
|
|
.sym 9601 tx_fifo.full_o_SB_DFF_Q_D_SB_LUT4_O_I0_SB_LUT4_O_1_I0_SB_LUT4_O_I3[2]
|
|
.sym 9603 tx_fifo.full_o_SB_DFF_Q_D_SB_LUT4_O_I0_SB_LUT4_O_1_I0_SB_LUT4_O_I3[4]
|
|
.sym 9606 tx_fifo.wr_addr[4]
|
|
.sym 9607 tx_fifo.full_o_SB_DFF_Q_D_SB_LUT4_O_I0_SB_LUT4_O_1_I0_SB_LUT4_O_I3[3]
|
|
.sym 9609 tx_fifo.full_o_SB_DFF_Q_D_SB_LUT4_O_I0_SB_LUT4_O_1_I0_SB_LUT4_O_I3[5]
|
|
.sym 9612 tx_fifo.wr_addr[5]
|
|
.sym 9613 tx_fifo.full_o_SB_DFF_Q_D_SB_LUT4_O_I0_SB_LUT4_O_1_I0_SB_LUT4_O_I3[4]
|
|
.sym 9615 tx_fifo.full_o_SB_DFF_Q_D_SB_LUT4_O_I0_SB_LUT4_O_1_I0_SB_LUT4_O_I3[6]
|
|
.sym 9617 tx_fifo.wr_addr[6]
|
|
.sym 9619 tx_fifo.full_o_SB_DFF_Q_D_SB_LUT4_O_I0_SB_LUT4_O_1_I0_SB_LUT4_O_I3[5]
|
|
.sym 9621 tx_fifo.full_o_SB_DFF_Q_D_SB_LUT4_O_I0_SB_LUT4_O_1_I0_SB_LUT4_O_I3[7]
|
|
.sym 9624 tx_fifo.wr_addr[7]
|
|
.sym 9625 tx_fifo.full_o_SB_DFF_Q_D_SB_LUT4_O_I0_SB_LUT4_O_1_I0_SB_LUT4_O_I3[6]
|
|
.sym 9627 tx_fifo.full_o_SB_DFF_Q_D_SB_LUT4_O_I0_SB_LUT4_O_1_I0_SB_LUT4_O_I3[8]
|
|
.sym 9630 tx_fifo.wr_addr[8]
|
|
.sym 9631 tx_fifo.full_o_SB_DFF_Q_D_SB_LUT4_O_I0_SB_LUT4_O_1_I0_SB_LUT4_O_I3[7]
|
|
.sym 9635 tx_fifo.full_o_SB_DFF_Q_D_SB_LUT4_O_I0_SB_LUT4_O_I0_SB_LUT4_O_2_I3[3]
|
|
.sym 9636 tx_fifo.full_o_SB_DFF_Q_D_SB_LUT4_O_I0_SB_LUT4_O_I0_SB_LUT4_O_1_I3[3]
|
|
.sym 9637 tx_fifo.full_o_SB_DFF_Q_D_SB_LUT4_O_I0_SB_LUT4_O_I0_SB_LUT4_O_3_I0[0]
|
|
.sym 9638 tx_fifo.full_o_SB_LUT4_I3_O[2]
|
|
.sym 9639 w_tx_data_sys[0]
|
|
.sym 9640 tx_fifo.full_o_SB_DFF_Q_D_SB_LUT4_O_I0_SB_LUT4_O_1_I0[2]
|
|
.sym 9642 tx_fifo.full_o_SB_DFF_Q_D_SB_LUT4_O_I0_SB_LUT4_O_I0_SB_LUT4_O_I2[2]
|
|
.sym 9648 spi_if_ins.o_load_cmd_SB_DFFESR_Q_R
|
|
.sym 9649 spi_if_ins.state_if_SB_DFFESR_Q_E
|
|
.sym 9650 tx_fifo.wr_addr[4]
|
|
.sym 9653 w_tx_fifo_pull
|
|
.sym 9654 tx_fifo.wr_addr[6]
|
|
.sym 9656 tx_fifo.wr_addr[2]
|
|
.sym 9658 tx_fifo.wr_addr[7]
|
|
.sym 9661 w_lvds_tx_d1_SB_DFF_Q_D_SB_LUT4_O_1_I0_SB_LUT4_O_I0[1]
|
|
.sym 9663 tx_fifo.rd_addr_gray_SB_DFFE_Q_8_D[3]
|
|
.sym 9665 tx_fifo.full_o_SB_DFF_Q_D_SB_LUT4_O_I0_SB_LUT4_O_1_I0_SB_LUT4_O_I3[1]
|
|
.sym 9666 rx_fifo.wr_addr_gray_rd[3]
|
|
.sym 9669 tx_fifo.wr_addr[5]
|
|
.sym 9671 tx_fifo.full_o_SB_DFF_Q_D_SB_LUT4_O_I0_SB_LUT4_O_1_I0_SB_LUT4_O_I3[8]
|
|
.sym 9680 tx_fifo.full_o_SB_DFF_Q_D_SB_LUT4_O_I0_SB_LUT4_O_1_I0[4]
|
|
.sym 9681 tx_fifo.rd_addr_gray_wr[0]
|
|
.sym 9684 tx_fifo.wr_addr[9]
|
|
.sym 9687 tx_fifo.full_o_SB_DFF_Q_D_SB_LUT4_O_I0_SB_LUT4_O_1_I0[3]
|
|
.sym 9688 tx_fifo.full_o_SB_DFF_Q_D_SB_LUT4_O_I0_SB_LUT4_O_I0_SB_LUT4_O_2_I3[0]
|
|
.sym 9689 tx_fifo.full_o_SB_DFF_Q_D_SB_LUT4_O_I0_SB_LUT4_O_1_I0_SB_LUT4_O_I3[1]
|
|
.sym 9690 rx_fifo.wr_addr_gray_rd[3]
|
|
.sym 9692 tx_fifo.full_o_SB_DFF_Q_D_SB_LUT4_O_I0[2]
|
|
.sym 9699 tx_fifo.full_o_SB_DFF_Q_D_SB_LUT4_O_I0_SB_LUT4_O_I0_SB_LUT4_O_I2[2]
|
|
.sym 9700 tx_fifo.full_o_SB_DFF_Q_D_SB_LUT4_O_I0_SB_LUT4_O_I0_SB_LUT4_O_2_I3[3]
|
|
.sym 9701 tx_fifo.full_o_SB_DFF_Q_D_SB_LUT4_O_I0[3]
|
|
.sym 9702 tx_fifo.full_o_SB_DFF_Q_D_SB_LUT4_O_I0[1]
|
|
.sym 9706 tx_fifo.full_o_SB_DFF_Q_D_SB_LUT4_O_I0[0]
|
|
.sym 9710 tx_fifo.wr_addr[9]
|
|
.sym 9712 tx_fifo.full_o_SB_DFF_Q_D_SB_LUT4_O_I0_SB_LUT4_O_1_I0_SB_LUT4_O_I3[8]
|
|
.sym 9715 tx_fifo.full_o_SB_DFF_Q_D_SB_LUT4_O_I0[1]
|
|
.sym 9716 tx_fifo.full_o_SB_DFF_Q_D_SB_LUT4_O_I0[2]
|
|
.sym 9717 tx_fifo.full_o_SB_DFF_Q_D_SB_LUT4_O_I0[0]
|
|
.sym 9718 tx_fifo.full_o_SB_DFF_Q_D_SB_LUT4_O_I0[3]
|
|
.sym 9721 tx_fifo.full_o_SB_DFF_Q_D_SB_LUT4_O_I0_SB_LUT4_O_1_I0[3]
|
|
.sym 9722 tx_fifo.full_o_SB_DFF_Q_D_SB_LUT4_O_I0_SB_LUT4_O_I0_SB_LUT4_O_I2[2]
|
|
.sym 9723 tx_fifo.full_o_SB_DFF_Q_D_SB_LUT4_O_I0_SB_LUT4_O_1_I0[4]
|
|
.sym 9724 tx_fifo.full_o_SB_DFF_Q_D_SB_LUT4_O_I0_SB_LUT4_O_I0_SB_LUT4_O_2_I3[0]
|
|
.sym 9727 tx_fifo.full_o_SB_DFF_Q_D_SB_LUT4_O_I0_SB_LUT4_O_I0_SB_LUT4_O_2_I3[3]
|
|
.sym 9728 tx_fifo.full_o_SB_DFF_Q_D_SB_LUT4_O_I0_SB_LUT4_O_1_I0[4]
|
|
.sym 9729 tx_fifo.full_o_SB_DFF_Q_D_SB_LUT4_O_I0_SB_LUT4_O_I0_SB_LUT4_O_2_I3[0]
|
|
.sym 9730 tx_fifo.full_o_SB_DFF_Q_D_SB_LUT4_O_I0_SB_LUT4_O_1_I0[3]
|
|
.sym 9736 rx_fifo.wr_addr_gray_rd[3]
|
|
.sym 9740 tx_fifo.full_o_SB_DFF_Q_D_SB_LUT4_O_I0_SB_LUT4_O_1_I0_SB_LUT4_O_I3[1]
|
|
.sym 9746 tx_fifo.rd_addr_gray_wr[0]
|
|
.sym 9756 r_counter_$glb_clk
|
|
.sym 9758 tx_fifo.full_o_SB_DFF_Q_D_SB_LUT4_O_I0[2]
|
|
.sym 9759 tx_fifo.full_o_SB_DFF_Q_D_SB_LUT4_O_I0[3]
|
|
.sym 9760 tx_fifo.full_o_SB_DFF_Q_D_SB_LUT4_O_I0[1]
|
|
.sym 9761 tx_fifo.rd_addr_gray_wr_r[3]
|
|
.sym 9764 tx_fifo.full_o_SB_DFF_Q_D_SB_LUT4_O_I0[0]
|
|
.sym 9774 w_tx_fifo_full
|
|
.sym 9777 tx_fifo.rd_addr_gray_wr[2]
|
|
.sym 9779 tx_fifo.rd_addr_gray_wr[8]
|
|
.sym 9780 rx_fifo.empty_o_SB_DFF_Q_D_SB_LUT4_O_I0_SB_LUT4_O_1_I1_SB_LUT4_O_2_I0[1]
|
|
.sym 9782 tx_fifo.wr_addr_gray_rd_r[8]
|
|
.sym 9784 w_tx_fifo_pulled_data[1]
|
|
.sym 9786 tx_fifo.wr_addr_gray_SB_LUT4_I2_O[8]
|
|
.sym 9787 lvds_tx_inst.r_fifo_data[10]
|
|
.sym 9788 tx_fifo.wr_addr_gray_SB_LUT4_I2_O[9]
|
|
.sym 9789 w_tx_fifo_push
|
|
.sym 9791 lvds_tx_inst.r_phase_count_SB_LUT4_I1_1_O_SB_DFF_D_Q[2]
|
|
.sym 9793 w_lvds_tx_d1_SB_DFF_Q_D_SB_LUT4_O_1_I0_SB_LUT4_O_I0[2]
|
|
.sym 9800 w_lvds_tx_d1_SB_DFF_Q_D_SB_LUT4_O_1_I0_SB_LUT4_O_I0[0]
|
|
.sym 9801 tx_fifo.full_o_SB_DFF_Q_D_SB_LUT4_O_I0_SB_LUT4_O_1_I0[1]
|
|
.sym 9805 tx_fifo.full_o_SB_DFF_Q_D_SB_LUT4_O_I0_SB_LUT4_O_1_I2_SB_LUT4_O_I3[2]
|
|
.sym 9807 tx_fifo.full_o_SB_DFF_Q_D_SB_LUT4_O_I0_SB_LUT4_O_1_I2_SB_LUT4_O_I3[0]
|
|
.sym 9808 tx_fifo.full_o_SB_DFF_Q_D_SB_LUT4_O_I0_SB_LUT4_O_1_I2_SB_LUT4_O_I3[3]
|
|
.sym 9809 tx_fifo.rd_addr_gray_wr_r[1]
|
|
.sym 9811 tx_fifo.rd_addr[9]
|
|
.sym 9817 w_lvds_tx_d1_SB_DFF_Q_D_SB_LUT4_O_1_I0_SB_LUT4_O_I0[2]
|
|
.sym 9821 w_lvds_tx_d1_SB_DFF_Q_D_SB_LUT4_O_1_I0_SB_LUT4_O_I0[1]
|
|
.sym 9825 tx_fifo.full_o_SB_DFF_Q_D_SB_LUT4_O_I0_SB_LUT4_O_1_I0_SB_LUT4_O_I3[1]
|
|
.sym 9829 tx_fifo.rd_addr_gray_wr[9]
|
|
.sym 9840 tx_fifo.rd_addr_gray_wr_r[1]
|
|
.sym 9841 tx_fifo.full_o_SB_DFF_Q_D_SB_LUT4_O_I0_SB_LUT4_O_1_I0[1]
|
|
.sym 9844 tx_fifo.full_o_SB_DFF_Q_D_SB_LUT4_O_I0_SB_LUT4_O_1_I2_SB_LUT4_O_I3[3]
|
|
.sym 9845 tx_fifo.full_o_SB_DFF_Q_D_SB_LUT4_O_I0_SB_LUT4_O_1_I0_SB_LUT4_O_I3[1]
|
|
.sym 9846 tx_fifo.full_o_SB_DFF_Q_D_SB_LUT4_O_I0_SB_LUT4_O_1_I2_SB_LUT4_O_I3[2]
|
|
.sym 9847 tx_fifo.full_o_SB_DFF_Q_D_SB_LUT4_O_I0_SB_LUT4_O_1_I2_SB_LUT4_O_I3[0]
|
|
.sym 9851 w_lvds_tx_d1_SB_DFF_Q_D_SB_LUT4_O_1_I0_SB_LUT4_O_I0[1]
|
|
.sym 9852 w_lvds_tx_d1_SB_DFF_Q_D_SB_LUT4_O_1_I0_SB_LUT4_O_I0[0]
|
|
.sym 9853 w_lvds_tx_d1_SB_DFF_Q_D_SB_LUT4_O_1_I0_SB_LUT4_O_I0[2]
|
|
.sym 9857 tx_fifo.rd_addr_gray_wr[9]
|
|
.sym 9869 tx_fifo.rd_addr[9]
|
|
.sym 9879 r_counter_$glb_clk
|
|
.sym 9882 tx_fifo.wr_addr_gray[8]
|
|
.sym 9885 tx_fifo.wr_addr_gray[1]
|
|
.sym 9888 tx_fifo.wr_addr[8]
|
|
.sym 9894 w_tx_fifo_pulled_data[25]
|
|
.sym 9895 tx_fifo.full_o_SB_DFF_Q_D_SB_LUT4_O_I0_SB_LUT4_O_1_I0[1]
|
|
.sym 9898 w_tx_fifo_push
|
|
.sym 9901 spi_if_ins.o_load_cmd_SB_LUT4_I3_O_SB_LUT4_I3_1_O
|
|
.sym 9902 spi_if_ins.state_if[1]
|
|
.sym 9909 tx_fifo.wr_addr_gray_SB_DFFE_Q_4_D_SB_LUT4_I2_O[3]
|
|
.sym 9912 tx_fifo.wr_addr[8]
|
|
.sym 9922 w_tx_fifo_pulled_data[3]
|
|
.sym 9924 lvds_tx_inst.r_phase_count_SB_DFF_D_Q[0]
|
|
.sym 9925 w_tx_fifo_pulled_data[30]
|
|
.sym 9927 w_tx_fifo_pulled_data[10]
|
|
.sym 9928 w_tx_fifo_pulled_data[2]
|
|
.sym 9932 lvds_tx_inst.r_fifo_data[2]
|
|
.sym 9936 w_tx_fifo_pulled_data[0]
|
|
.sym 9944 w_tx_fifo_pulled_data[1]
|
|
.sym 9951 lvds_tx_inst.r_phase_count_SB_LUT4_I1_1_O_SB_DFF_D_Q[2]
|
|
.sym 9952 lvds_tx_inst.r_fifo_data[0]
|
|
.sym 9956 w_tx_fifo_pulled_data[10]
|
|
.sym 9964 w_tx_fifo_pulled_data[1]
|
|
.sym 9969 w_tx_fifo_pulled_data[2]
|
|
.sym 9974 w_tx_fifo_pulled_data[3]
|
|
.sym 9979 lvds_tx_inst.r_phase_count_SB_DFF_D_Q[0]
|
|
.sym 9980 lvds_tx_inst.r_fifo_data[0]
|
|
.sym 9981 lvds_tx_inst.r_phase_count_SB_LUT4_I1_1_O_SB_DFF_D_Q[2]
|
|
.sym 9982 lvds_tx_inst.r_fifo_data[2]
|
|
.sym 9992 w_tx_fifo_pulled_data[0]
|
|
.sym 9999 w_tx_fifo_pulled_data[30]
|
|
.sym 10001 w_lvds_tx_d1_SB_DFF_Q_D_SB_LUT4_O_1_I0_SB_LUT4_O_I0_SB_LUT4_I1_O_$glb_ce
|
|
.sym 10002 o_iq_tx_clk_p$SB_IO_OUT_$glb_clk
|
|
.sym 10003 o_led0$SB_IO_OUT_$glb_sr
|
|
.sym 10008 smi_ctrl_ins.o_channel
|
|
.sym 10013 io_ctrl_ins.tr_vc_2_state_SB_LUT4_I0_O[2]
|
|
.sym 10018 io_ctrl_ins.rf_mode[2]
|
|
.sym 10021 tx_fifo.wr_addr[8]
|
|
.sym 10022 io_ctrl_ins.rf_mode[1]
|
|
.sym 10024 w_tx_fifo_pulled_data[0]
|
|
.sym 10031 lvds_tx_inst.o_fifo_pull_SB_DFFSR_Q_R_SB_LUT4_O_I1[0]
|
|
.sym 10038 tx_fifo.wr_addr_gray_rd[1]
|
|
.sym 10046 tx_fifo.wr_addr_gray[8]
|
|
.sym 10049 tx_fifo.wr_addr_gray_rd[8]
|
|
.sym 10057 tx_fifo.wr_addr_gray[1]
|
|
.sym 10080 tx_fifo.wr_addr_gray_rd[8]
|
|
.sym 10084 tx_fifo.wr_addr_gray[1]
|
|
.sym 10103 tx_fifo.wr_addr_gray[8]
|
|
.sym 10125 o_iq_tx_clk_p$SB_IO_OUT_$glb_clk
|
|
.sym 10139 tx_fifo.full_o_SB_DFF_Q_D_SB_LUT4_O_I0_SB_LUT4_O_I0_SB_LUT4_O_1_I3[0]
|
|
.sym 10142 w_tx_fifo_pulled_data[3]
|
|
.sym 10172 o_shdn_rx_lna$SB_IO_OUT
|
|
.sym 10194 o_shdn_rx_lna$SB_IO_OUT
|
|
.sym 10197 i_rst_b$SB_IO_IN
|
|
.sym 10199 o_led0$SB_IO_OUT
|
|
.sym 10201 w_smi_data_output[2]
|
|
.sym 10203 o_led0$SB_IO_OUT
|
|
.sym 10204 w_smi_data_output[1]
|
|
.sym 10206 o_led0$SB_IO_OUT
|
|
.sym 10207 $PACKER_VCC_NET
|
|
.sym 10212 $PACKER_VCC_NET
|
|
.sym 10214 w_smi_data_output[2]
|
|
.sym 10216 o_led0$SB_IO_OUT
|
|
.sym 10217 w_smi_data_output[1]
|
|
.sym 10224 o_led0$SB_IO_OUT
|
|
.sym 10226 w_rx_24_fifo_data[9]
|
|
.sym 10228 w_rx_24_fifo_data[8]
|
|
.sym 10229 w_rx_24_fifo_data[6]
|
|
.sym 10230 w_smi_data_output[7]
|
|
.sym 10231 w_rx_fifo_data[6]
|
|
.sym 10232 w_rx_24_fifo_data[11]
|
|
.sym 10237 rx_fifo.wr_addr_gray_SB_LUT4_I2_O[4]
|
|
.sym 10239 rx_fifo.wr_addr_gray_SB_LUT4_I2_O[5]
|
|
.sym 10240 rx_fifo.rd_addr_gray_wr[6]
|
|
.sym 10241 rx_fifo.full_o_SB_DFF_Q_D_SB_LUT4_O_I0_SB_LUT4_O_I0_SB_LUT4_O_I0[1]
|
|
.sym 10242 w_smi_data_input[2]
|
|
.sym 10247 rx_fifo.wr_addr_gray_SB_LUT4_I2_O[8]
|
|
.sym 10249 rx_fifo.rd_addr_gray_wr[2]
|
|
.sym 10259 $PACKER_VCC_NET
|
|
.sym 10260 w_smi_data_input[7]
|
|
.sym 10268 w_rx_09_fifo_data[4]
|
|
.sym 10271 w_rx_09_fifo_data[9]
|
|
.sym 10275 w_rx_24_fifo_data[0]
|
|
.sym 10277 w_rx_09_fifo_data[2]
|
|
.sym 10278 w_rx_24_fifo_data[2]
|
|
.sym 10279 w_lvds_rx_24_d0_SB_LUT4_I1_O[0]
|
|
.sym 10280 o_led1$SB_IO_OUT
|
|
.sym 10282 w_rx_09_fifo_data[7]
|
|
.sym 10284 w_rx_24_fifo_data[9]
|
|
.sym 10291 w_rx_24_fifo_data[3]
|
|
.sym 10292 w_rx_24_fifo_data[5]
|
|
.sym 10293 w_rx_24_fifo_data[4]
|
|
.sym 10295 w_rx_24_fifo_data[7]
|
|
.sym 10304 w_rx_24_fifo_data[3]
|
|
.sym 10309 w_rx_24_fifo_data[2]
|
|
.sym 10316 w_rx_24_fifo_data[0]
|
|
.sym 10321 w_rx_24_fifo_data[5]
|
|
.sym 10325 w_rx_24_fifo_data[4]
|
|
.sym 10327 w_rx_09_fifo_data[4]
|
|
.sym 10328 o_led1$SB_IO_OUT
|
|
.sym 10331 o_led1$SB_IO_OUT
|
|
.sym 10333 w_rx_24_fifo_data[2]
|
|
.sym 10334 w_rx_09_fifo_data[2]
|
|
.sym 10338 w_rx_09_fifo_data[7]
|
|
.sym 10339 w_rx_24_fifo_data[7]
|
|
.sym 10340 o_led1$SB_IO_OUT
|
|
.sym 10343 w_rx_09_fifo_data[9]
|
|
.sym 10345 o_led1$SB_IO_OUT
|
|
.sym 10346 w_rx_24_fifo_data[9]
|
|
.sym 10347 w_lvds_rx_24_d0_SB_LUT4_I1_O[0]
|
|
.sym 10348 o_iq_tx_clk_p$SB_IO_OUT_$glb_clk
|
|
.sym 10350 w_smi_data_input[0]
|
|
.sym 10352 w_smi_data_input[7]
|
|
.sym 10354 rx_fifo.full_o_SB_LUT4_I3_1_O_SB_LUT4_I0_O[3]
|
|
.sym 10356 smi_ctrl_ins.soe_and_reset
|
|
.sym 10357 smi_ctrl_ins.o_smi_data_out_SB_DFFNE_Q_D_SB_LUT4_O_6_I3[3]
|
|
.sym 10358 smi_ctrl_ins.o_smi_data_out_SB_DFFNE_Q_D_SB_LUT4_O_5_I3[3]
|
|
.sym 10359 smi_ctrl_ins.o_smi_data_out_SB_DFFNE_Q_D_SB_LUT4_O_7_I3[3]
|
|
.sym 10360 rx_fifo.wr_addr_gray_rd[0]
|
|
.sym 10361 rx_fifo.wr_addr_gray_rd_r[0]
|
|
.sym 10366 rx_fifo.wr_addr[5]
|
|
.sym 10367 rx_fifo.wr_addr[9]
|
|
.sym 10370 w_lvds_rx_09_d1_SB_LUT4_I0_O[0]
|
|
.sym 10371 w_rx_fifo_push
|
|
.sym 10372 rx_fifo.wr_addr[3]
|
|
.sym 10374 w_lvds_rx_09_d1_SB_LUT4_I0_O[0]
|
|
.sym 10375 w_rx_24_fifo_data[0]
|
|
.sym 10377 $PACKER_VCC_NET
|
|
.sym 10383 w_rx_fifo_data[7]
|
|
.sym 10385 w_rx_fifo_data[9]
|
|
.sym 10387 smi_ctrl_ins.soe_and_reset
|
|
.sym 10395 w_smi_data_input[0]
|
|
.sym 10396 w_smi_data_input[4]
|
|
.sym 10399 w_smi_data_input[7]
|
|
.sym 10404 w_smi_data_input[0]
|
|
.sym 10405 w_rx_24_fifo_data[5]
|
|
.sym 10406 rx_fifo.full_o_SB_LUT4_I3_1_O[3]
|
|
.sym 10408 rx_fifo.wr_addr_gray_SB_LUT4_I2_O[4]
|
|
.sym 10412 w_smi_data_input[7]
|
|
.sym 10413 w_smi_data_input[0]
|
|
.sym 10415 rx_fifo.full_o_SB_DFF_Q_D_SB_LUT4_O_I0_SB_LUT4_O_1_I0[2]
|
|
.sym 10417 rx_fifo.full_o_SB_DFF_Q_D_SB_LUT4_O_I0_SB_LUT4_O_1_I0[3]
|
|
.sym 10418 smi_ctrl_ins.r_fifo_pulled_data[26]
|
|
.sym 10419 rx_fifo.full_o_SB_DFF_Q_D_SB_LUT4_O_I0_SB_LUT4_O_I0_SB_LUT4_O_I0[2]
|
|
.sym 10447 rx_fifo.full_o_SB_DFF_Q_D_SB_LUT4_O_I0_SB_LUT4_O_1_I0[1]
|
|
.sym 10448 rx_fifo.wr_addr[3]
|
|
.sym 10450 rx_fifo.wr_addr[6]
|
|
.sym 10451 rx_fifo.wr_addr[2]
|
|
.sym 10455 rx_fifo.wr_addr[7]
|
|
.sym 10456 rx_fifo.full_o_SB_DFF_Q_D_SB_LUT4_O_I0_SB_LUT4_O_1_I0[2]
|
|
.sym 10457 rx_fifo.wr_addr[4]
|
|
.sym 10462 rx_fifo.wr_addr[5]
|
|
.sym 10463 $nextpnr_ICESTORM_LC_1$O
|
|
.sym 10466 rx_fifo.full_o_SB_DFF_Q_D_SB_LUT4_O_I0_SB_LUT4_O_1_I0[1]
|
|
.sym 10469 rx_fifo.wr_addr_gray_SB_LUT4_I2_I3[2]
|
|
.sym 10471 rx_fifo.full_o_SB_DFF_Q_D_SB_LUT4_O_I0_SB_LUT4_O_1_I0[2]
|
|
.sym 10473 rx_fifo.full_o_SB_DFF_Q_D_SB_LUT4_O_I0_SB_LUT4_O_1_I0[1]
|
|
.sym 10475 rx_fifo.wr_addr_gray_SB_LUT4_I2_I3[3]
|
|
.sym 10478 rx_fifo.wr_addr[2]
|
|
.sym 10479 rx_fifo.wr_addr_gray_SB_LUT4_I2_I3[2]
|
|
.sym 10481 rx_fifo.wr_addr_gray_SB_LUT4_I2_I3[4]
|
|
.sym 10484 rx_fifo.wr_addr[3]
|
|
.sym 10485 rx_fifo.wr_addr_gray_SB_LUT4_I2_I3[3]
|
|
.sym 10487 rx_fifo.wr_addr_gray_SB_LUT4_I2_I3[5]
|
|
.sym 10489 rx_fifo.wr_addr[4]
|
|
.sym 10491 rx_fifo.wr_addr_gray_SB_LUT4_I2_I3[4]
|
|
.sym 10493 rx_fifo.wr_addr_gray_SB_LUT4_I2_I3[6]
|
|
.sym 10495 rx_fifo.wr_addr[5]
|
|
.sym 10497 rx_fifo.wr_addr_gray_SB_LUT4_I2_I3[5]
|
|
.sym 10499 rx_fifo.wr_addr_gray_SB_LUT4_I2_I3[7]
|
|
.sym 10501 rx_fifo.wr_addr[6]
|
|
.sym 10503 rx_fifo.wr_addr_gray_SB_LUT4_I2_I3[6]
|
|
.sym 10505 rx_fifo.wr_addr_gray_SB_LUT4_I2_I3[8]
|
|
.sym 10508 rx_fifo.wr_addr[7]
|
|
.sym 10509 rx_fifo.wr_addr_gray_SB_LUT4_I2_I3[7]
|
|
.sym 10513 rx_fifo.full_o_SB_DFF_Q_D_SB_LUT4_O_I0_SB_LUT4_O_1_I0[1]
|
|
.sym 10514 rx_fifo.full_o_SB_DFF_Q_D_SB_LUT4_O_I0_SB_LUT4_O_1_I0[2]
|
|
.sym 10515 rx_fifo.wr_addr_gray[0]
|
|
.sym 10516 rx_fifo.wr_addr_gray_SB_DFFE_Q_2_D[0]
|
|
.sym 10517 w_rx_fifo_data[5]
|
|
.sym 10518 rx_fifo.full_o_SB_LUT4_I3_1_O_SB_LUT4_I0_O_SB_LUT4_O_2_I0[1]
|
|
.sym 10519 rx_fifo.full_o_SB_LUT4_I3_1_O[0]
|
|
.sym 10520 rx_fifo.full_o_SB_LUT4_I3_1_O_SB_LUT4_I0_O_SB_LUT4_O_2_I0[3]
|
|
.sym 10525 smi_ctrl_ins.r_fifo_pulled_data[24]
|
|
.sym 10526 $PACKER_VCC_NET
|
|
.sym 10527 w_smi_data_output[1]
|
|
.sym 10531 w_smi_data_output[2]
|
|
.sym 10532 rx_fifo.full_o_SB_LUT4_I3_1_O_SB_LUT4_I0_O[3]
|
|
.sym 10533 rx_fifo.wr_addr_gray_SB_LUT4_I2_O[3]
|
|
.sym 10535 smi_ctrl_ins.o_smi_data_out_SB_DFFNE_Q_D_SB_LUT4_O_I3[1]
|
|
.sym 10536 smi_ctrl_ins.int_cnt_rx[3]
|
|
.sym 10538 rx_fifo.rd_addr[7]
|
|
.sym 10540 rx_fifo.full_o_SB_DFF_Q_D_SB_LUT4_O_I0_SB_LUT4_O_I0_SB_LUT4_O_1_I3[3]
|
|
.sym 10544 rx_fifo.wr_addr_gray_SB_LUT4_I2_O[5]
|
|
.sym 10545 rx_fifo.full_o_SB_DFF_Q_D_SB_LUT4_O_I0_SB_LUT4_O_2_I0[1]
|
|
.sym 10546 rx_fifo.full_o_SB_DFF_Q_D_SB_LUT4_O_I0_SB_LUT4_O_1_I0[1]
|
|
.sym 10547 rx_fifo.empty_o_SB_DFF_Q_D_SB_LUT4_O_I0_SB_LUT4_O_1_I1_SB_LUT4_O_I3[2]
|
|
.sym 10548 rx_fifo.full_o_SB_DFF_Q_D_SB_LUT4_O_I0_SB_LUT4_O_1_I0[2]
|
|
.sym 10549 rx_fifo.wr_addr_gray_SB_LUT4_I2_I3[8]
|
|
.sym 10554 rx_fifo.rd_addr_gray_wr_r[1]
|
|
.sym 10556 lvds_rx_24_inst.o_fifo_push_SB_DFFESR_Q_E
|
|
.sym 10558 lvds_rx_24_inst.o_fifo_push_SB_DFFESR_Q_R
|
|
.sym 10560 rx_fifo.wr_addr_gray_SB_LUT4_I2_O[6]
|
|
.sym 10561 rx_fifo.wr_addr_gray_SB_LUT4_I2_O[7]
|
|
.sym 10562 rx_fifo.wr_addr[8]
|
|
.sym 10563 rx_fifo.wr_addr_gray_SB_LUT4_I2_O[1]
|
|
.sym 10564 rx_fifo.wr_addr_gray_SB_LUT4_I2_O[2]
|
|
.sym 10566 rx_fifo.full_o_SB_LUT4_I3_1_O_SB_LUT4_I0_O_SB_LUT4_O_2_I0[2]
|
|
.sym 10570 rx_fifo.wr_addr[9]
|
|
.sym 10571 rx_fifo.full_o_SB_LUT4_I3_1_O_SB_LUT4_I0_O_SB_LUT4_O_2_I0[0]
|
|
.sym 10573 w_rx_fifo_push
|
|
.sym 10578 lvds_rx_09_inst.o_fifo_push_SB_DFFESR_Q_D
|
|
.sym 10579 rx_fifo.full_o_SB_DFF_Q_D_SB_LUT4_O_I0_SB_LUT4_O_2_I0[2]
|
|
.sym 10580 rx_fifo.full_o_SB_DFF_Q_D_SB_LUT4_O_I0_SB_LUT4_O_1_I0[2]
|
|
.sym 10583 rx_fifo.full_o_SB_LUT4_I3_1_O_SB_LUT4_I0_O_SB_LUT4_O_2_I0[1]
|
|
.sym 10585 rx_fifo.full_o_SB_LUT4_I3_1_O_SB_LUT4_I0_O_SB_LUT4_O_2_I0[3]
|
|
.sym 10586 rx_fifo.wr_addr_gray_SB_LUT4_I2_I3[9]
|
|
.sym 10588 rx_fifo.wr_addr[8]
|
|
.sym 10590 rx_fifo.wr_addr_gray_SB_LUT4_I2_I3[8]
|
|
.sym 10594 rx_fifo.wr_addr[9]
|
|
.sym 10596 rx_fifo.wr_addr_gray_SB_LUT4_I2_I3[9]
|
|
.sym 10599 rx_fifo.wr_addr_gray_SB_LUT4_I2_O[1]
|
|
.sym 10602 rx_fifo.wr_addr_gray_SB_LUT4_I2_O[2]
|
|
.sym 10607 rx_fifo.wr_addr_gray_SB_LUT4_I2_O[7]
|
|
.sym 10608 rx_fifo.wr_addr_gray_SB_LUT4_I2_O[6]
|
|
.sym 10611 rx_fifo.full_o_SB_LUT4_I3_1_O_SB_LUT4_I0_O_SB_LUT4_O_2_I0[3]
|
|
.sym 10612 rx_fifo.full_o_SB_LUT4_I3_1_O_SB_LUT4_I0_O_SB_LUT4_O_2_I0[2]
|
|
.sym 10613 rx_fifo.full_o_SB_LUT4_I3_1_O_SB_LUT4_I0_O_SB_LUT4_O_2_I0[1]
|
|
.sym 10614 rx_fifo.full_o_SB_LUT4_I3_1_O_SB_LUT4_I0_O_SB_LUT4_O_2_I0[0]
|
|
.sym 10623 rx_fifo.full_o_SB_DFF_Q_D_SB_LUT4_O_I0_SB_LUT4_O_2_I0[2]
|
|
.sym 10624 w_rx_fifo_push
|
|
.sym 10625 rx_fifo.rd_addr_gray_wr_r[1]
|
|
.sym 10626 rx_fifo.full_o_SB_DFF_Q_D_SB_LUT4_O_I0_SB_LUT4_O_1_I0[2]
|
|
.sym 10629 lvds_rx_09_inst.o_fifo_push_SB_DFFESR_Q_D
|
|
.sym 10633 lvds_rx_24_inst.o_fifo_push_SB_DFFESR_Q_E
|
|
.sym 10634 o_iq_tx_clk_p$SB_IO_OUT_$glb_clk
|
|
.sym 10635 lvds_rx_24_inst.o_fifo_push_SB_DFFESR_Q_R
|
|
.sym 10637 rx_fifo.full_o_SB_LUT4_I3_1_O_SB_LUT4_I0_O_SB_LUT4_O_2_I0[0]
|
|
.sym 10638 rx_fifo.rd_addr_gray_SB_DFFE_Q_5_D_SB_LUT4_I0_O[2]
|
|
.sym 10639 rx_fifo.empty_o_SB_DFF_Q_D_SB_LUT4_O_I0_SB_LUT4_O_1_I1_SB_LUT4_O_I3[2]
|
|
.sym 10641 rx_fifo.empty_o_SB_DFF_Q_D_SB_LUT4_O_I0_SB_LUT4_O_1_I1_SB_LUT4_O_1_I0[3]
|
|
.sym 10642 rx_fifo.full_o_SB_DFF_Q_D_SB_LUT4_O_I0_SB_LUT4_O_I0[1]
|
|
.sym 10643 rx_fifo.empty_o_SB_LUT4_I2_O[0]
|
|
.sym 10649 w_rx_09_fifo_data[5]
|
|
.sym 10652 rx_fifo.wr_addr[5]
|
|
.sym 10654 lvds_rx_24_inst.o_fifo_push_SB_DFFESR_Q_R
|
|
.sym 10655 rx_fifo.full_o_SB_DFF_Q_D_SB_LUT4_O_I0_SB_LUT4_O_1_I0[1]
|
|
.sym 10656 smi_ctrl_ins.r_fifo_pulled_data_SB_DFFNESR_Q_E
|
|
.sym 10657 rx_fifo.full_o_SB_DFF_Q_D_SB_LUT4_O_I0_SB_LUT4_O_1_I0[2]
|
|
.sym 10658 rx_fifo.wr_addr[8]
|
|
.sym 10660 rx_fifo.empty_o_SB_DFF_Q_D_SB_LUT4_O_I0_SB_LUT4_O_1_I1_SB_LUT4_O_2_I0[3]
|
|
.sym 10661 w_rx_fifo_data[7]
|
|
.sym 10662 rx_fifo.wr_addr_gray_SB_DFFE_Q_2_D[0]
|
|
.sym 10663 rx_fifo.empty_o_SB_DFF_Q_D_SB_LUT4_O_I0_SB_LUT4_O_1_I1_SB_LUT4_O_1_I0[3]
|
|
.sym 10664 rx_fifo.rd_addr[7]
|
|
.sym 10665 rx_fifo.full_o_SB_DFF_Q_D_SB_LUT4_O_I0_SB_LUT4_O_I0[1]
|
|
.sym 10666 rx_fifo.empty_o_SB_DFF_Q_D_SB_LUT4_O_I0_SB_LUT4_O_1_I1_SB_LUT4_O_I3[1]
|
|
.sym 10668 rx_fifo.rd_addr[8]
|
|
.sym 10669 rx_fifo.full_o_SB_DFF_Q_D_SB_LUT4_O_I0_SB_LUT4_O_I0[0]
|
|
.sym 10670 lvds_rx_24_inst.o_fifo_push_SB_DFFESR_Q_R_SB_LUT4_O_I1[0]
|
|
.sym 10671 rx_fifo.rd_addr[9]
|
|
.sym 10677 lvds_rx_24_inst.o_fifo_push_SB_DFFESR_Q_R_SB_LUT4_O_I1[0]
|
|
.sym 10678 rx_fifo.full_o_SB_LUT4_I3_1_O[1]
|
|
.sym 10679 rx_fifo.wr_addr_gray_SB_LUT4_I2_O[5]
|
|
.sym 10680 rx_fifo.wr_addr_gray_SB_DFFE_Q_2_D[0]
|
|
.sym 10681 rx_fifo.wr_addr_gray_SB_LUT4_I2_O[6]
|
|
.sym 10683 w_lvds_rx_24_d0_SB_LUT4_I1_O[2]
|
|
.sym 10685 rx_fifo.wr_addr_gray_SB_LUT4_I2_O[8]
|
|
.sym 10686 w_rx_24_fifo_data[1]
|
|
.sym 10688 rx_fifo.wr_addr_gray_SB_DFFE_Q_2_D[2]
|
|
.sym 10691 w_lvds_rx_24_d0_SB_LUT4_I1_O[2]
|
|
.sym 10693 rx_fifo.full_o_SB_DFF_Q_D_SB_LUT4_O_I0_SB_LUT4_O_I0_SB_LUT4_O_I0[1]
|
|
.sym 10696 rx_fifo.rd_addr_gray_wr_r[7]
|
|
.sym 10701 rx_fifo.full_o_SB_DFF_Q_D_SB_LUT4_O_I0_SB_LUT4_O_I0_SB_LUT4_O_1_I3[0]
|
|
.sym 10704 w_lvds_rx_24_d0_SB_LUT4_I1_O[0]
|
|
.sym 10722 w_lvds_rx_24_d0_SB_LUT4_I1_O[0]
|
|
.sym 10724 w_lvds_rx_24_d0_SB_LUT4_I1_O[2]
|
|
.sym 10728 rx_fifo.wr_addr_gray_SB_LUT4_I2_O[8]
|
|
.sym 10730 rx_fifo.full_o_SB_LUT4_I3_1_O[1]
|
|
.sym 10734 rx_fifo.wr_addr_gray_SB_LUT4_I2_O[6]
|
|
.sym 10736 rx_fifo.wr_addr_gray_SB_LUT4_I2_O[5]
|
|
.sym 10737 rx_fifo.full_o_SB_DFF_Q_D_SB_LUT4_O_I0_SB_LUT4_O_I0_SB_LUT4_O_1_I3[0]
|
|
.sym 10741 w_rx_24_fifo_data[1]
|
|
.sym 10746 rx_fifo.full_o_SB_DFF_Q_D_SB_LUT4_O_I0_SB_LUT4_O_I0_SB_LUT4_O_I0[1]
|
|
.sym 10747 rx_fifo.rd_addr_gray_wr_r[7]
|
|
.sym 10748 rx_fifo.wr_addr_gray_SB_DFFE_Q_2_D[2]
|
|
.sym 10749 rx_fifo.wr_addr_gray_SB_DFFE_Q_2_D[0]
|
|
.sym 10752 w_lvds_rx_24_d0_SB_LUT4_I1_O[2]
|
|
.sym 10753 lvds_rx_24_inst.o_fifo_push_SB_DFFESR_Q_R_SB_LUT4_O_I1[0]
|
|
.sym 10755 w_lvds_rx_24_d0_SB_LUT4_I1_O[0]
|
|
.sym 10756 w_lvds_rx_24_d0_SB_LUT4_I1_O[0]
|
|
.sym 10757 o_iq_tx_clk_p$SB_IO_OUT_$glb_clk
|
|
.sym 10759 rx_fifo.rd_addr[7]
|
|
.sym 10760 rx_fifo.empty_o_SB_DFF_Q_D_SB_LUT4_O_I0_SB_LUT4_O_1_I1_SB_LUT4_O_I3[1]
|
|
.sym 10761 rx_fifo.rd_addr_gray_SB_DFFE_Q_5_D[0]
|
|
.sym 10762 rx_fifo.rd_addr_gray[3]
|
|
.sym 10763 rx_fifo.rd_addr[0]
|
|
.sym 10764 rx_fifo.full_o_SB_DFF_Q_D_SB_LUT4_O_I0_SB_LUT4_O_I0_SB_LUT4_O_I0[0]
|
|
.sym 10765 rx_fifo.empty_o_SB_DFF_Q_D_SB_LUT4_O_I0_SB_LUT4_O_1_I1_SB_LUT4_O_2_I0[3]
|
|
.sym 10766 rx_fifo.empty_o_SB_DFF_Q_D_SB_LUT4_O_I0_SB_LUT4_O_1_I1_SB_LUT4_O_1_I0[1]
|
|
.sym 10769 tx_fifo.rd_addr_gray_wr[3]
|
|
.sym 10770 tx_fifo.full_o_SB_LUT4_I3_O[1]
|
|
.sym 10773 rx_fifo.rd_addr_gray_SB_DFFE_Q_5_D_SB_LUT4_I0_O[1]
|
|
.sym 10775 w_rx_fifo_pulled_data[3]
|
|
.sym 10776 rx_fifo.empty_o_SB_LUT4_I2_O[0]
|
|
.sym 10778 w_smi_data_input[4]
|
|
.sym 10782 rx_fifo.rd_addr_gray_SB_DFFE_Q_5_D_SB_LUT4_I0_O[2]
|
|
.sym 10784 rx_fifo.rd_addr[0]
|
|
.sym 10785 rx_fifo.full_o_SB_DFF_Q_D_SB_LUT4_O_I0[2]
|
|
.sym 10786 rx_fifo.wr_addr[8]
|
|
.sym 10787 rx_fifo.full_o_SB_DFF_Q_D_SB_LUT4_O_I0_SB_LUT4_O_I0_SB_LUT4_O_1_I3[0]
|
|
.sym 10788 rx_fifo.empty_o_SB_DFF_Q_D_SB_LUT4_O_I0_SB_LUT4_O_1_I1_SB_LUT4_O_2_I0[3]
|
|
.sym 10789 rx_fifo.rd_addr_gray_wr_r[3]
|
|
.sym 10790 rx_fifo.rd_addr_gray_SB_DFFE_Q_5_D_SB_LUT4_I0_O_SB_LUT4_O_I0[1]
|
|
.sym 10791 rx_fifo.rd_addr_gray_wr[5]
|
|
.sym 10792 rx_fifo.rd_addr[7]
|
|
.sym 10793 w_smi_data_input[0]
|
|
.sym 10794 rx_fifo.empty_o_SB_DFF_Q_D_SB_LUT4_O_I0_SB_LUT4_O_1_I1_SB_LUT4_O_I3[1]
|
|
.sym 10805 rx_fifo.full_o_SB_DFF_Q_D_SB_LUT4_O_I0[0]
|
|
.sym 10811 rx_fifo.full_o_SB_DFF_Q_D_SB_LUT4_O_I0[2]
|
|
.sym 10813 rx_fifo.full_o_SB_DFF_Q_D_SB_LUT4_O_I0[3]
|
|
.sym 10814 rx_fifo.full_o_SB_DFF_Q_D_SB_LUT4_O_I0[1]
|
|
.sym 10817 rx_fifo.rd_addr_gray[7]
|
|
.sym 10822 rx_fifo.rd_addr_gray[2]
|
|
.sym 10823 rx_fifo.rd_addr_gray[0]
|
|
.sym 10826 rx_fifo.rd_addr_gray[1]
|
|
.sym 10827 rx_fifo.rd_addr_gray[8]
|
|
.sym 10828 rx_fifo.rd_addr_gray[6]
|
|
.sym 10831 rx_fifo.rd_addr_gray[5]
|
|
.sym 10833 rx_fifo.rd_addr_gray[5]
|
|
.sym 10839 rx_fifo.rd_addr_gray[0]
|
|
.sym 10846 rx_fifo.rd_addr_gray[1]
|
|
.sym 10853 rx_fifo.rd_addr_gray[6]
|
|
.sym 10860 rx_fifo.rd_addr_gray[7]
|
|
.sym 10863 rx_fifo.full_o_SB_DFF_Q_D_SB_LUT4_O_I0[0]
|
|
.sym 10864 rx_fifo.full_o_SB_DFF_Q_D_SB_LUT4_O_I0[3]
|
|
.sym 10865 rx_fifo.full_o_SB_DFF_Q_D_SB_LUT4_O_I0[1]
|
|
.sym 10866 rx_fifo.full_o_SB_DFF_Q_D_SB_LUT4_O_I0[2]
|
|
.sym 10869 rx_fifo.rd_addr_gray[8]
|
|
.sym 10878 rx_fifo.rd_addr_gray[2]
|
|
.sym 10880 o_iq_tx_clk_p$SB_IO_OUT_$glb_clk
|
|
.sym 10882 rx_fifo.rd_addr_gray[4]
|
|
.sym 10883 rx_fifo.rd_addr_gray[7]
|
|
.sym 10884 rx_fifo.rd_addr_gray[1]
|
|
.sym 10885 rx_fifo.rd_addr_gray[8]
|
|
.sym 10886 rx_fifo.rd_addr_gray[6]
|
|
.sym 10887 rx_fifo.rd_addr[9]
|
|
.sym 10888 rx_fifo.rd_addr_gray[2]
|
|
.sym 10889 rx_fifo.rd_addr_gray[0]
|
|
.sym 10894 rx_fifo.wr_addr[9]
|
|
.sym 10895 rx_fifo.empty_o_SB_DFF_Q_D_SB_LUT4_O_I0_SB_LUT4_O_1_I1_SB_LUT4_O_2_I0[3]
|
|
.sym 10898 rx_fifo.rd_addr_gray_wr[0]
|
|
.sym 10899 smi_ctrl_ins.tx_reg_state[0]
|
|
.sym 10901 rx_fifo.wr_addr[3]
|
|
.sym 10902 rx_fifo.full_o_SB_DFF_Q_D_SB_LUT4_O_I0_SB_LUT4_O_2_I2[6]
|
|
.sym 10903 rx_fifo.wr_addr[5]
|
|
.sym 10905 smi_ctrl_ins.r_fifo_pushed_data_SB_DFFNESR_Q_E[0]
|
|
.sym 10906 rx_fifo.rd_addr_gray_SB_LUT4_I2_O[6]
|
|
.sym 10908 rx_fifo.rd_addr_gray[3]
|
|
.sym 10909 rx_fifo.rd_addr[9]
|
|
.sym 10910 rx_fifo.rd_addr_gray_wr_r[4]
|
|
.sym 10912 w_rx_fifo_pull
|
|
.sym 10914 rx_fifo.full_o_SB_DFF_Q_D_SB_LUT4_O_I0_SB_LUT4_O_1_I0[3]
|
|
.sym 10915 rx_fifo.rd_addr_gray_wr[8]
|
|
.sym 10916 rx_fifo.full_o_SB_DFF_Q_D_SB_LUT4_O_I0_SB_LUT4_O_I0_SB_LUT4_O_I0[2]
|
|
.sym 10917 rx_fifo.rd_addr_gray[5]
|
|
.sym 10923 rx_fifo.full_o_SB_DFF_Q_D_SB_LUT4_O_I0_SB_LUT4_O_1_I0[1]
|
|
.sym 10927 rx_fifo.full_o_SB_DFF_Q_D_SB_LUT4_O_I0_SB_LUT4_O_1_I0[2]
|
|
.sym 10928 rx_fifo.wr_addr_gray_SB_LUT4_I2_O[2]
|
|
.sym 10929 rx_fifo.full_o_SB_DFF_Q_D_SB_LUT4_O_I0_SB_LUT4_O_I0[3]
|
|
.sym 10930 rx_fifo.full_o_SB_DFF_Q_D_SB_LUT4_O_I0_SB_LUT4_O_I0[2]
|
|
.sym 10931 rx_fifo.wr_addr_gray_SB_LUT4_I2_O[3]
|
|
.sym 10934 rx_fifo.wr_addr_gray_SB_DFFE_Q_2_D[0]
|
|
.sym 10935 rx_fifo.full_o_SB_DFF_Q_D_SB_LUT4_O_I0_SB_LUT4_O_I0[1]
|
|
.sym 10937 rx_fifo.full_o_SB_DFF_Q_D_SB_LUT4_O_I0_SB_LUT4_O_1_I0[0]
|
|
.sym 10939 rx_fifo.full_o_SB_DFF_Q_D_SB_LUT4_O_I0_SB_LUT4_O_I0[0]
|
|
.sym 10940 rx_fifo.full_o_SB_DFF_Q_D_SB_LUT4_O_I0_SB_LUT4_O_1_I0[3]
|
|
.sym 10941 rx_fifo.wr_addr_gray_SB_LUT4_I2_O[5]
|
|
.sym 10942 rx_fifo.wr_addr_gray_SB_LUT4_I2_O[8]
|
|
.sym 10947 rx_fifo.wr_addr_gray_SB_LUT4_I2_O[4]
|
|
.sym 10950 w_rx_fifo_push
|
|
.sym 10957 rx_fifo.wr_addr_gray_SB_LUT4_I2_O[2]
|
|
.sym 10959 rx_fifo.wr_addr_gray_SB_LUT4_I2_O[3]
|
|
.sym 10964 rx_fifo.wr_addr_gray_SB_LUT4_I2_O[4]
|
|
.sym 10965 rx_fifo.wr_addr_gray_SB_LUT4_I2_O[5]
|
|
.sym 10969 rx_fifo.wr_addr_gray_SB_LUT4_I2_O[4]
|
|
.sym 10971 rx_fifo.wr_addr_gray_SB_LUT4_I2_O[3]
|
|
.sym 10977 rx_fifo.wr_addr_gray_SB_DFFE_Q_2_D[0]
|
|
.sym 10986 rx_fifo.full_o_SB_DFF_Q_D_SB_LUT4_O_I0_SB_LUT4_O_1_I0[0]
|
|
.sym 10987 rx_fifo.full_o_SB_DFF_Q_D_SB_LUT4_O_I0_SB_LUT4_O_1_I0[1]
|
|
.sym 10988 rx_fifo.full_o_SB_DFF_Q_D_SB_LUT4_O_I0_SB_LUT4_O_1_I0[3]
|
|
.sym 10989 rx_fifo.full_o_SB_DFF_Q_D_SB_LUT4_O_I0_SB_LUT4_O_1_I0[2]
|
|
.sym 10992 rx_fifo.full_o_SB_DFF_Q_D_SB_LUT4_O_I0_SB_LUT4_O_I0[0]
|
|
.sym 10993 rx_fifo.full_o_SB_DFF_Q_D_SB_LUT4_O_I0_SB_LUT4_O_I0[1]
|
|
.sym 10994 rx_fifo.full_o_SB_DFF_Q_D_SB_LUT4_O_I0_SB_LUT4_O_I0[3]
|
|
.sym 10995 rx_fifo.full_o_SB_DFF_Q_D_SB_LUT4_O_I0_SB_LUT4_O_I0[2]
|
|
.sym 10998 rx_fifo.wr_addr_gray_SB_LUT4_I2_O[8]
|
|
.sym 11002 w_rx_fifo_push
|
|
.sym 11003 o_iq_tx_clk_p$SB_IO_OUT_$glb_clk
|
|
.sym 11005 rx_fifo.wr_addr_gray_rd[6]
|
|
.sym 11006 rx_fifo.wr_addr_gray_rd[8]
|
|
.sym 11007 rx_fifo.wr_addr_gray_rd[3]
|
|
.sym 11008 rx_fifo.rd_addr_gray_SB_DFFE_Q_5_D_SB_LUT4_I0_O_SB_LUT4_O_I0[1]
|
|
.sym 11009 rx_fifo.rd_addr_gray_SB_DFFE_Q_6_D_SB_LUT4_I0_O_SB_LUT4_O_I3[0]
|
|
.sym 11010 rx_fifo.wr_addr_gray_rd[2]
|
|
.sym 11011 rx_fifo.rd_addr_gray_SB_DFFE_Q_6_D[1]
|
|
.sym 11012 rx_fifo.empty_o_SB_DFF_Q_D_SB_LUT4_O_I0_SB_LUT4_O_1_I1_SB_LUT4_O_1_I0[2]
|
|
.sym 11019 $PACKER_VCC_NET
|
|
.sym 11020 rx_fifo.rd_addr_gray_SB_DFFE_Q_6_D[0]
|
|
.sym 11021 rx_fifo.wr_addr_gray[4]
|
|
.sym 11022 smi_ctrl_ins.swe_and_reset
|
|
.sym 11023 $PACKER_VCC_NET
|
|
.sym 11025 rx_fifo.full_o_SB_DFF_Q_D_SB_LUT4_O_I0_SB_LUT4_O_I0[3]
|
|
.sym 11028 rx_fifo.empty_o_SB_DFF_Q_D_SB_LUT4_O_I0[1]
|
|
.sym 11029 rx_fifo.wr_addr_gray_rd[9]
|
|
.sym 11030 rx_fifo.rd_addr[7]
|
|
.sym 11031 rx_fifo.wr_addr_gray_rd[1]
|
|
.sym 11033 rx_fifo.rd_addr_gray_SB_LUT4_I2_O[8]
|
|
.sym 11035 rx_fifo.empty_o_SB_DFF_Q_D_SB_LUT4_O_I0_SB_LUT4_O_1_I1_SB_LUT4_O_I3[2]
|
|
.sym 11036 rx_fifo.full_o_SB_DFF_Q_D_SB_LUT4_O_I0_SB_LUT4_O_2_I0[1]
|
|
.sym 11038 rx_fifo.wr_addr_gray_rd[6]
|
|
.sym 11039 rx_fifo.rd_addr_gray_SB_DFFE_Q_7_D[1]
|
|
.sym 11040 rx_fifo.wr_addr[8]
|
|
.sym 11046 rx_fifo.full_o_SB_DFF_Q_D_SB_LUT4_O_I0_SB_LUT4_O_2_I2[6]
|
|
.sym 11047 rx_fifo.full_o_SB_DFF_Q_D_SB_LUT4_O_I0_SB_LUT4_O_2_I0[1]
|
|
.sym 11048 rx_fifo.full_o_SB_DFF_Q_D_SB_LUT4_O_I0_SB_LUT4_O_2_I2[3]
|
|
.sym 11049 rx_fifo.full_o_SB_DFF_Q_D_SB_LUT4_O_I0_SB_LUT4_O_2_I0[2]
|
|
.sym 11050 rx_fifo.full_o_SB_DFF_Q_D_SB_LUT4_O_I0_SB_LUT4_O_2_I0[3]
|
|
.sym 11051 rx_fifo.rd_addr_gray_wr[3]
|
|
.sym 11052 rx_fifo.full_o_SB_DFF_Q_D_SB_LUT4_O_I0_SB_LUT4_O_2_I2[5]
|
|
.sym 11053 rx_fifo.rd_addr_gray_wr_r[6]
|
|
.sym 11054 rx_fifo.rd_addr_gray[4]
|
|
.sym 11056 rx_fifo.rd_addr_gray_wr_r[4]
|
|
.sym 11058 rx_fifo.full_o_SB_DFF_Q_D_SB_LUT4_O_I0_SB_LUT4_O_2_I2[4]
|
|
.sym 11061 w_lvds_rx_24_d0_SB_LUT4_I1_O[1]
|
|
.sym 11062 rx_fifo.full_o_SB_DFF_Q_D_SB_LUT4_O_I0_SB_LUT4_O_2_I0[0]
|
|
.sym 11063 rx_fifo.rd_addr_gray_wr[5]
|
|
.sym 11067 w_lvds_rx_24_d0_SB_LUT4_I1_O[2]
|
|
.sym 11068 rx_fifo.rd_addr_gray[3]
|
|
.sym 11071 w_lvds_rx_24_d0_SB_LUT4_I1_O[0]
|
|
.sym 11074 w_lvds_rx_24_d0_SB_LUT4_I1_O[3]
|
|
.sym 11079 rx_fifo.full_o_SB_DFF_Q_D_SB_LUT4_O_I0_SB_LUT4_O_2_I2[3]
|
|
.sym 11080 rx_fifo.full_o_SB_DFF_Q_D_SB_LUT4_O_I0_SB_LUT4_O_2_I2[4]
|
|
.sym 11082 rx_fifo.rd_addr_gray_wr_r[4]
|
|
.sym 11085 rx_fifo.full_o_SB_DFF_Q_D_SB_LUT4_O_I0_SB_LUT4_O_2_I0[1]
|
|
.sym 11086 rx_fifo.full_o_SB_DFF_Q_D_SB_LUT4_O_I0_SB_LUT4_O_2_I0[3]
|
|
.sym 11087 rx_fifo.full_o_SB_DFF_Q_D_SB_LUT4_O_I0_SB_LUT4_O_2_I0[2]
|
|
.sym 11088 rx_fifo.full_o_SB_DFF_Q_D_SB_LUT4_O_I0_SB_LUT4_O_2_I0[0]
|
|
.sym 11092 rx_fifo.rd_addr_gray_wr[5]
|
|
.sym 11099 rx_fifo.rd_addr_gray_wr[3]
|
|
.sym 11103 w_lvds_rx_24_d0_SB_LUT4_I1_O[0]
|
|
.sym 11104 w_lvds_rx_24_d0_SB_LUT4_I1_O[3]
|
|
.sym 11105 w_lvds_rx_24_d0_SB_LUT4_I1_O[1]
|
|
.sym 11106 w_lvds_rx_24_d0_SB_LUT4_I1_O[2]
|
|
.sym 11112 rx_fifo.rd_addr_gray[3]
|
|
.sym 11115 rx_fifo.full_o_SB_DFF_Q_D_SB_LUT4_O_I0_SB_LUT4_O_2_I2[6]
|
|
.sym 11117 rx_fifo.full_o_SB_DFF_Q_D_SB_LUT4_O_I0_SB_LUT4_O_2_I2[5]
|
|
.sym 11118 rx_fifo.rd_addr_gray_wr_r[6]
|
|
.sym 11121 rx_fifo.rd_addr_gray[4]
|
|
.sym 11126 o_iq_tx_clk_p$SB_IO_OUT_$glb_clk
|
|
.sym 11130 rx_fifo.empty_o_SB_LUT4_I2_I0[1]
|
|
.sym 11133 rx_fifo.rd_addr_gray[5]
|
|
.sym 11135 rx_fifo.rd_addr[8]
|
|
.sym 11141 rx_fifo.rd_addr_gray_SB_DFFE_Q_6_D[1]
|
|
.sym 11143 w_tx_fifo_data[20]
|
|
.sym 11145 rx_fifo.empty_o_SB_DFF_Q_D_SB_LUT4_O_I0_SB_LUT4_O_1_I1_SB_LUT4_O_1_I0[2]
|
|
.sym 11150 rx_fifo.wr_addr[9]
|
|
.sym 11151 rx_fifo.wr_addr_gray_rd[3]
|
|
.sym 11153 tx_fifo.rd_addr_gray_wr[4]
|
|
.sym 11154 rx_fifo.full_o_SB_DFF_Q_D_SB_LUT4_O_I0_SB_LUT4_O_I0_SB_LUT4_O_I0[2]
|
|
.sym 11157 lvds_rx_24_inst.r_state_if_SB_DFFESR_Q_E
|
|
.sym 11159 rx_fifo.rd_addr[8]
|
|
.sym 11160 rx_fifo.full_o_SB_DFF_Q_D_SB_LUT4_O_I0_SB_LUT4_O_I0_SB_LUT4_O_I0[1]
|
|
.sym 11176 rx_fifo.rd_addr_gray_wr[0]
|
|
.sym 11177 rx_fifo.rd_addr_gray_wr[9]
|
|
.sym 11184 rx_fifo.rd_addr_gray_wr[4]
|
|
.sym 11185 rx_fifo.rd_addr_gray_wr[8]
|
|
.sym 11186 rx_fifo.rd_addr_gray_wr[2]
|
|
.sym 11194 rx_fifo.rd_addr_gray_wr[6]
|
|
.sym 11204 rx_fifo.rd_addr_gray_wr[8]
|
|
.sym 11208 rx_fifo.rd_addr_gray_wr[2]
|
|
.sym 11216 rx_fifo.rd_addr_gray_wr[4]
|
|
.sym 11229 rx_fifo.rd_addr_gray_wr[0]
|
|
.sym 11234 rx_fifo.rd_addr_gray_wr[9]
|
|
.sym 11247 rx_fifo.rd_addr_gray_wr[6]
|
|
.sym 11249 o_iq_tx_clk_p$SB_IO_OUT_$glb_clk
|
|
.sym 11253 tx_fifo.rd_addr_gray[0]
|
|
.sym 11254 tx_fifo.rd_addr_gray[3]
|
|
.sym 11257 tx_fifo.empty_o_SB_LUT4_I3_O[0]
|
|
.sym 11264 sys_ctrl_ins.i_cs_SB_DFFE_Q_D[0]
|
|
.sym 11265 w_smi_data_input[4]
|
|
.sym 11268 rx_fifo.rd_addr[8]
|
|
.sym 11271 w_tx_fifo_push
|
|
.sym 11276 tx_fifo.full_o_SB_DFF_Q_D_SB_LUT4_O_I0_SB_LUT4_O_1_I2_SB_LUT4_O_I3[0]
|
|
.sym 11277 tx_fifo.wr_addr_gray_SB_DFFE_Q_4_D[0]
|
|
.sym 11279 tx_fifo.wr_addr_gray_rd[4]
|
|
.sym 11280 tx_fifo.empty_o_SB_LUT4_I3_O[0]
|
|
.sym 11283 tx_fifo.wr_addr[9]
|
|
.sym 11284 tx_fifo.wr_addr[3]
|
|
.sym 11285 tx_fifo.wr_addr_gray_rd[3]
|
|
.sym 11297 tx_fifo.rd_addr_gray[4]
|
|
.sym 11308 rx_fifo.wr_addr_gray_rd[6]
|
|
.sym 11311 tx_fifo.rd_addr_gray[3]
|
|
.sym 11313 rx_fifo.wr_addr_gray[5]
|
|
.sym 11318 rx_fifo.wr_addr_gray[1]
|
|
.sym 11322 rx_fifo.wr_addr[9]
|
|
.sym 11328 rx_fifo.wr_addr[9]
|
|
.sym 11331 rx_fifo.wr_addr_gray[1]
|
|
.sym 11350 rx_fifo.wr_addr_gray[5]
|
|
.sym 11356 rx_fifo.wr_addr_gray_rd[6]
|
|
.sym 11364 tx_fifo.rd_addr_gray[4]
|
|
.sym 11367 tx_fifo.rd_addr_gray[3]
|
|
.sym 11372 r_counter_$glb_clk
|
|
.sym 11374 tx_fifo.wr_addr_gray_rd[4]
|
|
.sym 11375 tx_fifo.wr_addr_gray_rd[6]
|
|
.sym 11376 spi_if_ins.spi.o_rx_data_valid_SB_LUT4_I3_O_SB_LUT4_I3_O[2]
|
|
.sym 11377 tx_fifo.wr_addr_gray_rd[3]
|
|
.sym 11378 tx_fifo.wr_addr_gray_rd[2]
|
|
.sym 11379 tx_fifo.wr_addr_gray_rd[5]
|
|
.sym 11380 tx_fifo.wr_addr_gray_rd[9]
|
|
.sym 11381 tx_fifo.wr_addr_gray_SB_DFFE_Q_4_D[0]
|
|
.sym 11386 $PACKER_VCC_NET
|
|
.sym 11388 rx_fifo.rd_addr_gray_SB_DFFE_Q_7_D[1]
|
|
.sym 11390 spi_if_ins.o_fetch_cmd_SB_DFFESR_Q_E_SB_LUT4_O_I1[2]
|
|
.sym 11394 rx_fifo.wr_addr[9]
|
|
.sym 11395 tx_fifo.rd_addr_gray_SB_LUT4_I2_O[3]
|
|
.sym 11396 tx_fifo.empty_o_SB_DFF_Q_D_SB_LUT4_O_I1_SB_LUT4_O_I0_SB_LUT4_O_2_I3[1]
|
|
.sym 11397 rx_fifo.empty_o_SB_DFF_Q_D_SB_LUT4_O_I0_SB_LUT4_O_1_I1_SB_LUT4_O_2_I0[1]
|
|
.sym 11398 tx_fifo.wr_addr[6]
|
|
.sym 11400 w_tx_fifo_push
|
|
.sym 11401 tx_fifo.wr_addr_gray_SB_DFFE_Q_8_D[2]
|
|
.sym 11404 tx_fifo.empty_o_SB_LUT4_I3_O_SB_LUT4_O_1_I0[3]
|
|
.sym 11405 tx_fifo.empty_o_SB_LUT4_I3_I1[2]
|
|
.sym 11406 tx_fifo.empty_o_SB_LUT4_I3_O_SB_LUT4_O_1_I0[2]
|
|
.sym 11417 w_tx_fifo_pull
|
|
.sym 11420 tx_fifo.empty_o_SB_DFF_Q_D_SB_LUT4_O_I1_SB_LUT4_O_I0_SB_LUT4_O_2_I3[1]
|
|
.sym 11423 tx_fifo.rd_addr_gray_SB_DFFE_Q_8_D[3]
|
|
.sym 11427 lvds_tx_inst.r_phase_count_SB_LUT4_I1_O_SB_DFF_D_Q[1]
|
|
.sym 11431 tx_fifo.full_o_SB_DFF_Q_D_SB_LUT4_O_I0_SB_LUT4_O_1_I2_SB_LUT4_O_I3[0]
|
|
.sym 11432 tx_fifo.empty_o_SB_DFF_Q_D_SB_LUT4_O_I1_SB_LUT4_O_I0_SB_LUT4_O_2_I3[2]
|
|
.sym 11434 w_lvds_tx_d1_SB_DFF_Q_D_SB_LUT4_O_1_I0_SB_LUT4_O_I0[2]
|
|
.sym 11435 lvds_tx_inst.r_phase_count_SB_LUT4_I1_O_SB_DFF_D_Q[2]
|
|
.sym 11440 tx_fifo.wr_addr_gray_SB_LUT4_I2_O[1]
|
|
.sym 11441 tx_fifo.rd_addr[0]
|
|
.sym 11442 tx_fifo.rd_addr_gray_SB_LUT4_I2_O[3]
|
|
.sym 11444 lvds_tx_inst.r_phase_count_SB_LUT4_I1_O_SB_DFF_D_Q[0]
|
|
.sym 11445 tx_fifo.wr_addr_gray_SB_LUT4_I2_O[6]
|
|
.sym 11446 tx_fifo.wr_addr_gray_SB_LUT4_I2_O[7]
|
|
.sym 11450 tx_fifo.rd_addr_gray_SB_LUT4_I2_O[3]
|
|
.sym 11456 tx_fifo.rd_addr_gray_SB_DFFE_Q_8_D[3]
|
|
.sym 11461 tx_fifo.rd_addr[0]
|
|
.sym 11466 lvds_tx_inst.r_phase_count_SB_LUT4_I1_O_SB_DFF_D_Q[1]
|
|
.sym 11467 lvds_tx_inst.r_phase_count_SB_LUT4_I1_O_SB_DFF_D_Q[0]
|
|
.sym 11468 w_lvds_tx_d1_SB_DFF_Q_D_SB_LUT4_O_1_I0_SB_LUT4_O_I0[2]
|
|
.sym 11469 lvds_tx_inst.r_phase_count_SB_LUT4_I1_O_SB_DFF_D_Q[2]
|
|
.sym 11472 tx_fifo.wr_addr_gray_SB_LUT4_I2_O[7]
|
|
.sym 11475 tx_fifo.wr_addr_gray_SB_LUT4_I2_O[6]
|
|
.sym 11478 tx_fifo.empty_o_SB_DFF_Q_D_SB_LUT4_O_I1_SB_LUT4_O_I0_SB_LUT4_O_2_I3[2]
|
|
.sym 11480 tx_fifo.empty_o_SB_DFF_Q_D_SB_LUT4_O_I1_SB_LUT4_O_I0_SB_LUT4_O_2_I3[1]
|
|
.sym 11484 tx_fifo.wr_addr_gray_SB_LUT4_I2_O[1]
|
|
.sym 11486 tx_fifo.full_o_SB_DFF_Q_D_SB_LUT4_O_I0_SB_LUT4_O_1_I2_SB_LUT4_O_I3[0]
|
|
.sym 11490 tx_fifo.empty_o_SB_DFF_Q_D_SB_LUT4_O_I1_SB_LUT4_O_I0_SB_LUT4_O_2_I3[1]
|
|
.sym 11494 w_tx_fifo_pull
|
|
.sym 11495 o_iq_tx_clk_p$SB_IO_OUT_$glb_clk
|
|
.sym 11498 tx_fifo.wr_addr_gray_SB_LUT4_I2_O[1]
|
|
.sym 11499 tx_fifo.wr_addr_gray_SB_LUT4_I2_O[2]
|
|
.sym 11500 tx_fifo.wr_addr_gray_SB_LUT4_I2_O[3]
|
|
.sym 11501 tx_fifo.wr_addr_gray_SB_DFFE_Q_4_D_SB_LUT4_I2_O_SB_LUT4_O_I3[1]
|
|
.sym 11502 tx_fifo.wr_addr_gray_SB_DFFE_Q_4_D_SB_LUT4_I2_O_SB_LUT4_O_I3[2]
|
|
.sym 11503 tx_fifo.wr_addr_gray_SB_LUT4_I2_O[6]
|
|
.sym 11504 tx_fifo.wr_addr_gray_SB_LUT4_I2_O[7]
|
|
.sym 11509 tx_fifo.empty_o_SB_LUT4_I3_O_SB_LUT4_O_1_I0[2]
|
|
.sym 11511 w_tx_fifo_pull
|
|
.sym 11514 $PACKER_VCC_NET
|
|
.sym 11515 tx_fifo.rd_addr[0]
|
|
.sym 11518 tx_fifo.wr_addr_gray_rd[6]
|
|
.sym 11519 tx_fifo.wr_addr_gray_SB_DFFE_Q_3_D[1]
|
|
.sym 11520 spi_if_ins.spi.o_rx_data_valid_SB_LUT4_I3_O_SB_LUT4_I3_O[2]
|
|
.sym 11521 spi_if_ins.state_if[2]
|
|
.sym 11522 tx_fifo.wr_addr_gray_SB_DFFE_Q_4_D_SB_LUT4_I2_O_SB_LUT4_O_I3[1]
|
|
.sym 11524 tx_fifo.wr_addr_gray_SB_DFFE_Q_4_D_SB_LUT4_I2_O_SB_LUT4_O_I3[2]
|
|
.sym 11526 tx_fifo.wr_addr[6]
|
|
.sym 11528 tx_fifo.wr_addr[2]
|
|
.sym 11530 tx_fifo.wr_addr[7]
|
|
.sym 11532 tx_fifo.empty_o_SB_LUT4_I3_O_SB_LUT4_O_1_I0[3]
|
|
.sym 11542 tx_fifo.wr_addr_gray_SB_DFFE_Q_3_D[1]
|
|
.sym 11544 tx_fifo.full_o_SB_LUT4_I3_O[1]
|
|
.sym 11545 tx_fifo.wr_addr_gray_SB_DFFE_Q_4_D[0]
|
|
.sym 11549 w_tx_fifo_push
|
|
.sym 11552 tx_fifo.wr_addr_gray_SB_DFFE_Q_6_D[0]
|
|
.sym 11553 tx_fifo.wr_addr_gray_SB_DFFE_Q_6_D[3]
|
|
.sym 11561 tx_fifo.wr_addr_gray_SB_DFFE_Q_8_D[2]
|
|
.sym 11563 tx_fifo.wr_addr_gray_SB_LUT4_I2_O[9]
|
|
.sym 11566 tx_fifo.wr_addr_gray_SB_DFFE_Q_4_D_SB_LUT4_I2_O_SB_LUT4_O_I3[1]
|
|
.sym 11567 tx_fifo.wr_addr_gray_SB_DFFE_Q_4_D_SB_LUT4_I2_O_SB_LUT4_O_I3[2]
|
|
.sym 11574 tx_fifo.wr_addr_gray_SB_DFFE_Q_6_D[0]
|
|
.sym 11578 tx_fifo.wr_addr_gray_SB_DFFE_Q_6_D[3]
|
|
.sym 11585 tx_fifo.full_o_SB_LUT4_I3_O[1]
|
|
.sym 11591 tx_fifo.wr_addr_gray_SB_DFFE_Q_8_D[2]
|
|
.sym 11595 tx_fifo.wr_addr_gray_SB_LUT4_I2_O[9]
|
|
.sym 11601 tx_fifo.wr_addr_gray_SB_DFFE_Q_4_D_SB_LUT4_I2_O_SB_LUT4_O_I3[1]
|
|
.sym 11602 tx_fifo.wr_addr_gray_SB_DFFE_Q_4_D_SB_LUT4_I2_O_SB_LUT4_O_I3[2]
|
|
.sym 11608 tx_fifo.wr_addr_gray_SB_DFFE_Q_4_D[0]
|
|
.sym 11616 tx_fifo.wr_addr_gray_SB_DFFE_Q_3_D[1]
|
|
.sym 11617 w_tx_fifo_push
|
|
.sym 11618 r_counter_$glb_clk
|
|
.sym 11620 tx_fifo.wr_addr_gray_SB_LUT4_I2_O[8]
|
|
.sym 11621 tx_fifo.wr_addr_gray_SB_LUT4_I2_O[9]
|
|
.sym 11622 spi_if_ins.state_if[0]
|
|
.sym 11623 tx_fifo.empty_o_SB_LUT4_I3_I1[2]
|
|
.sym 11626 spi_if_ins.state_if[2]
|
|
.sym 11627 spi_if_ins.r_tx_data_valid_SB_DFFESR_Q_D[1]
|
|
.sym 11628 tx_fifo.wr_addr[9]
|
|
.sym 11634 spi_if_ins.o_load_cmd_SB_DFFESR_Q_E
|
|
.sym 11641 w_tx_fifo_pulled_data[20]
|
|
.sym 11642 tx_fifo.wr_addr[9]
|
|
.sym 11646 tx_fifo.rd_addr_gray_wr[4]
|
|
.sym 11648 spi_if_ins.w_rx_data[3]
|
|
.sym 11650 spi_if_ins.w_rx_data[2]
|
|
.sym 11651 spi_if_ins.r_tx_data_valid_SB_DFFESR_Q_D[1]
|
|
.sym 11652 tx_fifo.rd_addr_gray_wr_r[5]
|
|
.sym 11654 spi_if_ins.w_rx_data[0]
|
|
.sym 11662 tx_fifo.wr_addr_gray_SB_LUT4_I2_O[1]
|
|
.sym 11664 tx_fifo.wr_addr_gray_SB_LUT4_I2_O[3]
|
|
.sym 11665 tx_fifo.wr_addr_gray_SB_DFFE_Q_4_D_SB_LUT4_I2_O_SB_LUT4_O_I3[1]
|
|
.sym 11666 tx_fifo.wr_addr_gray_SB_DFFE_Q_4_D_SB_LUT4_I2_O_SB_LUT4_O_I3[2]
|
|
.sym 11668 tx_fifo.wr_addr_gray_SB_LUT4_I2_O[7]
|
|
.sym 11671 tx_fifo.wr_addr_gray_SB_LUT4_I2_O[2]
|
|
.sym 11672 w_tx_fifo_push
|
|
.sym 11675 tx_fifo.wr_addr_gray_SB_LUT4_I2_O[6]
|
|
.sym 11689 tx_fifo.full_o_SB_DFF_Q_D_SB_LUT4_O_I0_SB_LUT4_O_1_I2_SB_LUT4_O_I3[0]
|
|
.sym 11695 tx_fifo.wr_addr_gray_SB_LUT4_I2_O[6]
|
|
.sym 11700 tx_fifo.wr_addr_gray_SB_LUT4_I2_O[2]
|
|
.sym 11707 tx_fifo.wr_addr_gray_SB_LUT4_I2_O[7]
|
|
.sym 11713 tx_fifo.wr_addr_gray_SB_DFFE_Q_4_D_SB_LUT4_I2_O_SB_LUT4_O_I3[1]
|
|
.sym 11719 tx_fifo.full_o_SB_DFF_Q_D_SB_LUT4_O_I0_SB_LUT4_O_1_I2_SB_LUT4_O_I3[0]
|
|
.sym 11724 tx_fifo.wr_addr_gray_SB_LUT4_I2_O[1]
|
|
.sym 11733 tx_fifo.wr_addr_gray_SB_LUT4_I2_O[3]
|
|
.sym 11738 tx_fifo.wr_addr_gray_SB_DFFE_Q_4_D_SB_LUT4_I2_O_SB_LUT4_O_I3[2]
|
|
.sym 11740 w_tx_fifo_push
|
|
.sym 11741 r_counter_$glb_clk
|
|
.sym 11743 tx_fifo.full_o_SB_LUT4_I3_O[3]
|
|
.sym 11744 tx_fifo.full_o_SB_DFF_Q_D_SB_LUT4_O_I0_SB_LUT4_O_I0_SB_LUT4_O_3_I0[1]
|
|
.sym 11745 tx_fifo.wr_addr_gray_SB_DFFE_Q_4_D_SB_LUT4_I2_O[2]
|
|
.sym 11746 sys_ctrl_ins.o_data_out_SB_DFFER_Q_E
|
|
.sym 11747 tx_fifo.rd_addr_gray_wr_r[8]
|
|
.sym 11748 tx_fifo.wr_addr_gray_SB_DFFE_Q_4_D_SB_LUT4_I2_O[0]
|
|
.sym 11749 tx_fifo.full_o_SB_DFF_Q_D_SB_LUT4_O_I0_SB_LUT4_O_I0_SB_LUT4_O_2_I3[0]
|
|
.sym 11750 io_ctrl_ins.o_data_out_SB_DFFESR_Q_6_D_SB_LUT4_O_I2[0]
|
|
.sym 11755 tx_fifo.empty_o_SB_DFF_Q_D_SB_LUT4_O_I1_SB_LUT4_O_I0_SB_LUT4_O_2_I3[0]
|
|
.sym 11757 tx_fifo.wr_addr_gray_SB_DFFE_Q_6_D[3]
|
|
.sym 11758 tx_fifo.empty_o_SB_DFF_Q_D_SB_LUT4_O_I1_SB_LUT4_O_1_I3_SB_LUT4_O_I3[1]
|
|
.sym 11761 tx_fifo.empty_o_SB_DFF_Q_D_SB_LUT4_O_I1_SB_LUT4_O_1_I3[1]
|
|
.sym 11762 tx_fifo.wr_addr_gray_SB_LUT4_I2_O[8]
|
|
.sym 11763 tx_fifo.wr_addr_gray_SB_DFFE_Q_6_D[0]
|
|
.sym 11764 tx_fifo.wr_addr_gray_SB_LUT4_I2_O[9]
|
|
.sym 11765 tx_fifo.empty_o_SB_LUT4_I3_O_SB_LUT4_O_I0[3]
|
|
.sym 11766 spi_if_ins.state_if[0]
|
|
.sym 11767 spi_if_ins.state_if[0]
|
|
.sym 11768 tx_fifo.wr_addr[7]
|
|
.sym 11770 tx_fifo.wr_addr[4]
|
|
.sym 11772 tx_fifo.full_o_SB_DFF_Q_D_SB_LUT4_O_I0_SB_LUT4_O_1_I2_SB_LUT4_O_I3[0]
|
|
.sym 11774 tx_fifo.full_o_SB_DFF_Q_D_SB_LUT4_O_I0_SB_LUT4_O_1_I0_SB_LUT4_O_I3[1]
|
|
.sym 11776 tx_fifo.wr_addr[3]
|
|
.sym 11777 tx_fifo.wr_addr_gray_SB_DFFE_Q_4_D[0]
|
|
.sym 11778 tx_fifo.wr_addr[5]
|
|
.sym 11784 tx_fifo.full_o_SB_DFF_Q_D_SB_LUT4_O_I0_SB_LUT4_O_1_I0[8]
|
|
.sym 11785 w_tx_fifo_full
|
|
.sym 11786 tx_fifo.rd_addr_gray_wr_r[7]
|
|
.sym 11788 $PACKER_VCC_NET
|
|
.sym 11792 tx_fifo.rd_addr_gray_wr_r[5]
|
|
.sym 11793 tx_fifo.wr_addr_gray_SB_LUT4_I2_O[9]
|
|
.sym 11795 tx_fifo.rd_addr_gray_wr_r[3]
|
|
.sym 11804 tx_fifo.full_o_SB_DFF_Q_D_SB_LUT4_O_I0_SB_LUT4_O_1_I2[1]
|
|
.sym 11807 tx_fifo.full_o_SB_DFF_Q_D_SB_LUT4_O_I0_SB_LUT4_O_1_I0[7]
|
|
.sym 11810 tx_fifo.full_o_SB_DFF_Q_D_SB_LUT4_O_I0_SB_LUT4_O_1_I0[2]
|
|
.sym 11811 sys_ctrl_ins.o_data_out_SB_DFFER_Q_E
|
|
.sym 11812 tx_fifo.rd_addr_gray_wr_r[8]
|
|
.sym 11813 tx_fifo.full_o_SB_DFF_Q_D_SB_LUT4_O_I0_SB_LUT4_O_1_I0[5]
|
|
.sym 11814 tx_fifo.full_o_SB_DFF_Q_D_SB_LUT4_O_I0_SB_LUT4_O_1_I0[6]
|
|
.sym 11815 tx_fifo.full_o_SB_DFF_Q_D_SB_LUT4_O_I0_SB_LUT4_O_1_I0[7]
|
|
.sym 11817 tx_fifo.rd_addr_gray_wr_r[3]
|
|
.sym 11818 tx_fifo.full_o_SB_DFF_Q_D_SB_LUT4_O_I0_SB_LUT4_O_1_I0[2]
|
|
.sym 11823 tx_fifo.rd_addr_gray_wr_r[8]
|
|
.sym 11824 tx_fifo.full_o_SB_DFF_Q_D_SB_LUT4_O_I0_SB_LUT4_O_1_I0[8]
|
|
.sym 11825 tx_fifo.full_o_SB_DFF_Q_D_SB_LUT4_O_I0_SB_LUT4_O_1_I0[7]
|
|
.sym 11826 tx_fifo.full_o_SB_DFF_Q_D_SB_LUT4_O_I0_SB_LUT4_O_1_I2[1]
|
|
.sym 11829 tx_fifo.rd_addr_gray_wr_r[7]
|
|
.sym 11831 tx_fifo.full_o_SB_DFF_Q_D_SB_LUT4_O_I0_SB_LUT4_O_1_I0[7]
|
|
.sym 11832 tx_fifo.full_o_SB_DFF_Q_D_SB_LUT4_O_I0_SB_LUT4_O_1_I0[6]
|
|
.sym 11835 w_tx_fifo_full
|
|
.sym 11836 tx_fifo.wr_addr_gray_SB_LUT4_I2_O[9]
|
|
.sym 11838 tx_fifo.full_o_SB_DFF_Q_D_SB_LUT4_O_I0_SB_LUT4_O_1_I2[1]
|
|
.sym 11843 $PACKER_VCC_NET
|
|
.sym 11849 tx_fifo.full_o_SB_DFF_Q_D_SB_LUT4_O_I0_SB_LUT4_O_1_I0[2]
|
|
.sym 11860 tx_fifo.full_o_SB_DFF_Q_D_SB_LUT4_O_I0_SB_LUT4_O_1_I0[5]
|
|
.sym 11861 tx_fifo.rd_addr_gray_wr_r[5]
|
|
.sym 11863 sys_ctrl_ins.o_data_out_SB_DFFER_Q_E
|
|
.sym 11864 r_counter_$glb_clk
|
|
.sym 11865 i_rst_b_SB_LUT4_I3_O_$glb_sr
|
|
.sym 11866 w_rx_data[2]
|
|
.sym 11867 tx_fifo.wr_addr_gray_SB_DFFE_Q_4_D_SB_LUT4_I2_O[1]
|
|
.sym 11868 spi_if_ins.state_if_SB_DFFESR_Q_2_D[1]
|
|
.sym 11869 w_rx_data[0]
|
|
.sym 11870 tx_fifo.full_o_SB_DFF_Q_D_SB_LUT4_O_I0_SB_LUT4_O_I0[2]
|
|
.sym 11872 tx_fifo.full_o_SB_DFF_Q_D_SB_LUT4_O_I0_SB_LUT4_O_I0[0]
|
|
.sym 11873 w_rx_data[3]
|
|
.sym 11874 w_tx_data_sys[0]
|
|
.sym 11878 tx_fifo.wr_addr[9]
|
|
.sym 11879 tx_fifo.wr_addr[2]
|
|
.sym 11880 tx_fifo.rd_addr_gray_wr_r[7]
|
|
.sym 11883 w_cs[0]
|
|
.sym 11885 tx_fifo.wr_addr_gray_SB_DFFE_Q_4_D_SB_LUT4_I2_O[3]
|
|
.sym 11886 tx_fifo.wr_addr[8]
|
|
.sym 11887 tx_fifo.wr_addr[3]
|
|
.sym 11889 tx_fifo.wr_addr[5]
|
|
.sym 11891 tx_fifo.empty_o_SB_LUT4_I3_O_SB_LUT4_O_1_I0[2]
|
|
.sym 11893 tx_fifo.wr_addr[8]
|
|
.sym 11894 tx_fifo.wr_addr_gray_SB_DFFE_Q_8_D[1]
|
|
.sym 11895 tx_fifo.full_o_SB_DFF_Q_D_SB_LUT4_O_I0_SB_LUT4_O_I0_SB_LUT4_O_1_I3[0]
|
|
.sym 11900 spi_if_ins.o_data_in_SB_DFFE_Q_E
|
|
.sym 11907 tx_fifo.full_o_SB_LUT4_I3_O[3]
|
|
.sym 11909 tx_fifo.wr_addr_gray_SB_DFFE_Q_4_D_SB_LUT4_I2_O[2]
|
|
.sym 11910 tx_fifo.full_o_SB_LUT4_I3_O[2]
|
|
.sym 11911 tx_fifo.full_o_SB_DFF_Q_D_SB_LUT4_O_I0_SB_LUT4_O_1_I2[1]
|
|
.sym 11912 tx_fifo.wr_addr_gray_SB_DFFE_Q_4_D_SB_LUT4_I2_O[0]
|
|
.sym 11917 tx_fifo.full_o_SB_DFF_Q_D_SB_LUT4_O_I0_SB_LUT4_O_1_I2[2]
|
|
.sym 11921 w_tx_fifo_push
|
|
.sym 11923 tx_fifo.full_o_SB_DFF_Q_D_SB_LUT4_O_I0_SB_LUT4_O_1_I0[8]
|
|
.sym 11927 tx_fifo.full_o_SB_LUT4_I3_O[1]
|
|
.sym 11929 tx_fifo.full_o_SB_DFF_Q_D_SB_LUT4_O_I0_SB_LUT4_O_I0[0]
|
|
.sym 11931 tx_fifo.wr_addr_gray_SB_DFFE_Q_4_D_SB_LUT4_I2_O[3]
|
|
.sym 11932 tx_fifo.wr_addr_gray_SB_DFFE_Q_4_D_SB_LUT4_I2_O[1]
|
|
.sym 11933 tx_fifo.full_o_SB_DFF_Q_D_SB_LUT4_O_I0_SB_LUT4_O_I0[3]
|
|
.sym 11934 tx_fifo.full_o_SB_DFF_Q_D_SB_LUT4_O_I0_SB_LUT4_O_I0[1]
|
|
.sym 11935 tx_fifo.full_o_SB_DFF_Q_D_SB_LUT4_O_I0_SB_LUT4_O_I0[2]
|
|
.sym 11936 tx_fifo.rd_addr_gray_wr[3]
|
|
.sym 11937 tx_fifo.full_o_SB_DFF_Q_D_SB_LUT4_O_I0_SB_LUT4_O_1_I2_SB_LUT4_O_I3[2]
|
|
.sym 11940 tx_fifo.full_o_SB_LUT4_I3_O[1]
|
|
.sym 11941 tx_fifo.full_o_SB_DFF_Q_D_SB_LUT4_O_I0_SB_LUT4_O_1_I2_SB_LUT4_O_I3[2]
|
|
.sym 11942 tx_fifo.full_o_SB_LUT4_I3_O[3]
|
|
.sym 11943 tx_fifo.full_o_SB_LUT4_I3_O[2]
|
|
.sym 11946 tx_fifo.wr_addr_gray_SB_DFFE_Q_4_D_SB_LUT4_I2_O[3]
|
|
.sym 11947 tx_fifo.wr_addr_gray_SB_DFFE_Q_4_D_SB_LUT4_I2_O[1]
|
|
.sym 11948 tx_fifo.wr_addr_gray_SB_DFFE_Q_4_D_SB_LUT4_I2_O[0]
|
|
.sym 11949 tx_fifo.wr_addr_gray_SB_DFFE_Q_4_D_SB_LUT4_I2_O[2]
|
|
.sym 11952 tx_fifo.full_o_SB_DFF_Q_D_SB_LUT4_O_I0_SB_LUT4_O_I0[1]
|
|
.sym 11953 tx_fifo.full_o_SB_DFF_Q_D_SB_LUT4_O_I0_SB_LUT4_O_I0[2]
|
|
.sym 11954 tx_fifo.full_o_SB_DFF_Q_D_SB_LUT4_O_I0_SB_LUT4_O_I0[0]
|
|
.sym 11955 tx_fifo.full_o_SB_DFF_Q_D_SB_LUT4_O_I0_SB_LUT4_O_I0[3]
|
|
.sym 11959 tx_fifo.rd_addr_gray_wr[3]
|
|
.sym 11976 tx_fifo.full_o_SB_DFF_Q_D_SB_LUT4_O_I0_SB_LUT4_O_1_I2[1]
|
|
.sym 11977 w_tx_fifo_push
|
|
.sym 11978 tx_fifo.full_o_SB_DFF_Q_D_SB_LUT4_O_I0_SB_LUT4_O_1_I0[8]
|
|
.sym 11979 tx_fifo.full_o_SB_DFF_Q_D_SB_LUT4_O_I0_SB_LUT4_O_1_I2[2]
|
|
.sym 11987 r_counter_$glb_clk
|
|
.sym 11990 io_ctrl_ins.rf_mode[2]
|
|
.sym 11991 io_ctrl_ins.led1_state_SB_DFFER_Q_E
|
|
.sym 11992 io_ctrl_ins.rf_mode[0]
|
|
.sym 11994 io_ctrl_ins.debug_mode[1]
|
|
.sym 11995 io_ctrl_ins.rf_mode[1]
|
|
.sym 11996 io_ctrl_ins.debug_mode[0]
|
|
.sym 12004 w_rx_data[0]
|
|
.sym 12006 tx_fifo.full_o_SB_DFF_Q_D_SB_LUT4_O_I0_SB_LUT4_O_1_I0[5]
|
|
.sym 12008 tx_fifo.full_o_SB_DFF_Q_D_SB_LUT4_O_I0_SB_LUT4_O_1_I0[6]
|
|
.sym 12012 spi_if_ins.state_if_SB_DFFESR_Q_2_D[1]
|
|
.sym 12015 w_rx_data[0]
|
|
.sym 12016 io_ctrl_ins.rf_mode_SB_DFFER_Q_E
|
|
.sym 12032 tx_fifo.wr_addr_gray_SB_LUT4_I2_O[9]
|
|
.sym 12038 tx_fifo.wr_addr_gray_SB_LUT4_I2_O[8]
|
|
.sym 12041 w_tx_fifo_push
|
|
.sym 12054 tx_fifo.wr_addr_gray_SB_DFFE_Q_8_D[1]
|
|
.sym 12069 tx_fifo.wr_addr_gray_SB_LUT4_I2_O[8]
|
|
.sym 12072 tx_fifo.wr_addr_gray_SB_LUT4_I2_O[9]
|
|
.sym 12090 tx_fifo.wr_addr_gray_SB_DFFE_Q_8_D[1]
|
|
.sym 12107 tx_fifo.wr_addr_gray_SB_LUT4_I2_O[8]
|
|
.sym 12109 w_tx_fifo_push
|
|
.sym 12110 r_counter_$glb_clk
|
|
.sym 12114 io_ctrl_ins.rx_h_state_SB_DFFE_Q_E
|
|
.sym 12115 io_ctrl_ins.led0_state
|
|
.sym 12116 io_ctrl_ins.led1_state
|
|
.sym 12117 io_ctrl_ins.debug_mode_SB_LUT4_I0_O[1]
|
|
.sym 12118 w_lvds_tx_d1_SB_DFF_Q_D_SB_LUT4_O_1_I0_SB_LUT4_O_I0_SB_LUT4_I1_O
|
|
.sym 12125 io_ctrl_ins.rf_mode[1]
|
|
.sym 12131 tx_fifo.wr_addr[5]
|
|
.sym 12132 w_rx_data[4]
|
|
.sym 12133 tx_fifo.full_o_SB_DFF_Q_D_SB_LUT4_O_I0_SB_LUT4_O_1_I0_SB_LUT4_O_I3[1]
|
|
.sym 12155 smi_ctrl_ins.r_channel_SB_DFFE_Q_E
|
|
.sym 12175 w_rx_data[0]
|
|
.sym 12212 w_rx_data[0]
|
|
.sym 12232 smi_ctrl_ins.r_channel_SB_DFFE_Q_E
|
|
.sym 12233 r_counter_$glb_clk
|
|
.sym 12245 smi_ctrl_ins.r_channel_SB_DFFE_Q_E
|
|
.sym 12247 w_lvds_tx_d1_SB_DFF_Q_D_SB_LUT4_O_1_I0[3]
|
|
.sym 12248 w_tx_fifo_pulled_data[1]
|
|
.sym 12252 w_lvds_tx_d1_SB_DFF_Q_D_SB_LUT4_O_1_I0_SB_LUT4_O_I0[2]
|
|
.sym 12254 io_ctrl_ins.rx_h_state_SB_DFFE_Q_E
|
|
.sym 12306 o_shdn_rx_lna$SB_IO_OUT
|
|
.sym 12307 o_shdn_tx_lna$SB_IO_OUT
|
|
.sym 12309 smi_ctrl_ins.soe_and_reset
|
|
.sym 12310 w_smi_data_output[0]
|
|
.sym 12312 o_led0$SB_IO_OUT
|
|
.sym 12313 w_smi_data_output[7]
|
|
.sym 12315 o_led0$SB_IO_OUT
|
|
.sym 12316 $PACKER_VCC_NET
|
|
.sym 12320 smi_ctrl_ins.soe_and_reset
|
|
.sym 12321 o_led0$SB_IO_OUT
|
|
.sym 12323 w_smi_data_output[0]
|
|
.sym 12329 o_led0$SB_IO_OUT
|
|
.sym 12331 w_smi_data_output[7]
|
|
.sym 12332 $PACKER_VCC_NET
|
|
.sym 12335 w_rx_fifo_data[8]
|
|
.sym 12336 w_rx_fifo_data[11]
|
|
.sym 12337 w_rx_09_fifo_data[8]
|
|
.sym 12338 w_rx_09_fifo_data[13]
|
|
.sym 12339 w_smi_data_output[0]
|
|
.sym 12340 w_rx_09_fifo_data[6]
|
|
.sym 12341 w_rx_09_fifo_data[11]
|
|
.sym 12342 w_rx_09_fifo_data[10]
|
|
.sym 12352 rx_fifo.empty_o_SB_DFF_Q_D_SB_LUT4_O_I0_SB_LUT4_O_1_I1_SB_LUT4_O_1_I0[3]
|
|
.sym 12367 w_smi_data_input[4]
|
|
.sym 12380 w_rx_24_fifo_data[7]
|
|
.sym 12384 o_led1$SB_IO_OUT
|
|
.sym 12386 w_rx_24_fifo_data[4]
|
|
.sym 12388 w_rx_24_fifo_data[6]
|
|
.sym 12393 w_rx_24_fifo_data[9]
|
|
.sym 12396 w_smi_data_output[7]
|
|
.sym 12404 w_lvds_rx_24_d0_SB_LUT4_I1_O[0]
|
|
.sym 12406 w_rx_09_fifo_data[6]
|
|
.sym 12413 w_rx_24_fifo_data[7]
|
|
.sym 12422 w_rx_24_fifo_data[6]
|
|
.sym 12431 w_rx_24_fifo_data[4]
|
|
.sym 12437 w_smi_data_output[7]
|
|
.sym 12441 w_rx_09_fifo_data[6]
|
|
.sym 12442 o_led1$SB_IO_OUT
|
|
.sym 12443 w_rx_24_fifo_data[6]
|
|
.sym 12448 w_rx_24_fifo_data[9]
|
|
.sym 12456 w_lvds_rx_24_d0_SB_LUT4_I1_O[0]
|
|
.sym 12457 o_iq_tx_clk_p$SB_IO_OUT_$glb_clk
|
|
.sym 12459 w_smi_data_input[3]
|
|
.sym 12463 w_smi_data_output[4]
|
|
.sym 12464 w_smi_data_output[1]
|
|
.sym 12466 w_smi_data_output[7]
|
|
.sym 12467 w_smi_data_output[6]
|
|
.sym 12468 w_smi_data_output[0]
|
|
.sym 12469 w_smi_data_output[2]
|
|
.sym 12470 w_smi_data_output[5]
|
|
.sym 12478 w_rx_09_fifo_data[13]
|
|
.sym 12480 w_rx_09_fifo_data[10]
|
|
.sym 12481 w_rx_24_fifo_data[8]
|
|
.sym 12482 w_rx_fifo_data[8]
|
|
.sym 12486 $PACKER_VCC_NET
|
|
.sym 12489 w_smi_data_output[3]
|
|
.sym 12492 w_rx_24_fifo_data[11]
|
|
.sym 12495 w_smi_data_input[3]
|
|
.sym 12497 w_rx_fifo_data[11]
|
|
.sym 12498 w_lvds_rx_24_d0_SB_LUT4_I1_O[0]
|
|
.sym 12499 o_led0$SB_IO_OUT
|
|
.sym 12505 i_smi_soe_se$SB_IO_IN
|
|
.sym 12506 i_rst_b$SB_IO_IN
|
|
.sym 12507 o_led1$SB_IO_OUT
|
|
.sym 12511 i_rst_b$SB_IO_IN
|
|
.sym 12515 smi_ctrl_ins.r_fifo_pulled_data_SB_DFFNESR_Q_E
|
|
.sym 12518 $PACKER_VCC_NET
|
|
.sym 12519 smi_ctrl_ins.tx_reg_state_SB_LUT4_I3_O
|
|
.sym 12522 w_smi_data_input[3]
|
|
.sym 12525 rx_fifo.full_o_SB_DFF_Q_D_SB_LUT4_O_I0_SB_LUT4_O_1_I0[2]
|
|
.sym 12527 w_rx_fifo_pulled_data[1]
|
|
.sym 12528 rx_fifo.empty_o_SB_DFF_Q_D_SB_LUT4_O_I0_SB_LUT4_O_1_I1_SB_LUT4_O_1_I0[3]
|
|
.sym 12544 smi_ctrl_ins.int_cnt_rx[3]
|
|
.sym 12545 smi_ctrl_ins.r_fifo_pulled_data[25]
|
|
.sym 12546 rx_fifo.full_o_SB_LUT4_I3_1_O[0]
|
|
.sym 12548 smi_ctrl_ins.int_cnt_rx[4]
|
|
.sym 12550 rx_fifo.wr_addr_gray[0]
|
|
.sym 12552 smi_ctrl_ins.int_cnt_rx[3]
|
|
.sym 12553 smi_ctrl_ins.r_fifo_pulled_data[24]
|
|
.sym 12554 rx_fifo.wr_addr_gray_rd[0]
|
|
.sym 12555 rx_fifo.full_o_SB_LUT4_I3_1_O[3]
|
|
.sym 12556 smi_ctrl_ins.r_fifo_pulled_data[26]
|
|
.sym 12557 rx_fifo.full_o_SB_LUT4_I3_1_O[1]
|
|
.sym 12558 smi_ctrl_ins.r_fifo_pulled_data[10]
|
|
.sym 12559 rx_fifo.full_o_SB_DFF_Q_D_SB_LUT4_O_I0_SB_LUT4_O_I0_SB_LUT4_O_I0[2]
|
|
.sym 12560 i_smi_soe_se$SB_IO_IN
|
|
.sym 12562 smi_ctrl_ins.r_fifo_pulled_data[9]
|
|
.sym 12563 i_rst_b$SB_IO_IN
|
|
.sym 12566 smi_ctrl_ins.r_fifo_pulled_data[8]
|
|
.sym 12573 rx_fifo.full_o_SB_LUT4_I3_1_O[0]
|
|
.sym 12574 rx_fifo.full_o_SB_LUT4_I3_1_O[1]
|
|
.sym 12575 rx_fifo.full_o_SB_LUT4_I3_1_O[3]
|
|
.sym 12576 rx_fifo.full_o_SB_DFF_Q_D_SB_LUT4_O_I0_SB_LUT4_O_I0_SB_LUT4_O_I0[2]
|
|
.sym 12587 i_smi_soe_se$SB_IO_IN
|
|
.sym 12588 i_rst_b$SB_IO_IN
|
|
.sym 12591 smi_ctrl_ins.int_cnt_rx[4]
|
|
.sym 12592 smi_ctrl_ins.r_fifo_pulled_data[9]
|
|
.sym 12593 smi_ctrl_ins.r_fifo_pulled_data[25]
|
|
.sym 12594 smi_ctrl_ins.int_cnt_rx[3]
|
|
.sym 12597 smi_ctrl_ins.r_fifo_pulled_data[26]
|
|
.sym 12598 smi_ctrl_ins.int_cnt_rx[3]
|
|
.sym 12599 smi_ctrl_ins.r_fifo_pulled_data[10]
|
|
.sym 12600 smi_ctrl_ins.int_cnt_rx[4]
|
|
.sym 12603 smi_ctrl_ins.r_fifo_pulled_data[8]
|
|
.sym 12604 smi_ctrl_ins.r_fifo_pulled_data[24]
|
|
.sym 12605 smi_ctrl_ins.int_cnt_rx[4]
|
|
.sym 12606 smi_ctrl_ins.int_cnt_rx[3]
|
|
.sym 12610 rx_fifo.wr_addr_gray[0]
|
|
.sym 12617 rx_fifo.wr_addr_gray_rd[0]
|
|
.sym 12620 r_counter_$glb_clk
|
|
.sym 12622 smi_ctrl_ins.o_smi_data_out_SB_DFFNE_Q_D_SB_LUT4_O_3_I3[0]
|
|
.sym 12625 rx_fifo.empty_o_SB_LUT4_I2_O[1]
|
|
.sym 12626 smi_ctrl_ins.o_smi_data_out_SB_DFFNE_Q_D_SB_LUT4_O_1_I3[0]
|
|
.sym 12627 smi_ctrl_ins.o_smi_data_out_SB_DFFNE_Q_D_SB_LUT4_O_6_I3[0]
|
|
.sym 12628 smi_ctrl_ins.o_smi_data_out_SB_DFFNE_Q_D_SB_LUT4_O_I3[0]
|
|
.sym 12629 smi_ctrl_ins.tx_reg_state_SB_LUT4_I3_O
|
|
.sym 12630 smi_ctrl_ins.int_cnt_rx[3]
|
|
.sym 12634 smi_ctrl_ins.int_cnt_rx[4]
|
|
.sym 12636 rx_fifo.rd_addr[9]
|
|
.sym 12637 smi_ctrl_ins.o_smi_data_out_SB_DFFNE_Q_D_SB_LUT4_O_2_I3[1]
|
|
.sym 12638 rx_fifo.empty_o_SB_DFF_Q_D_SB_LUT4_O_I0_SB_LUT4_O_1_I1_SB_LUT4_O_1_I0[3]
|
|
.sym 12639 w_smi_data_output[5]
|
|
.sym 12641 smi_ctrl_ins.r_fifo_pulled_data[25]
|
|
.sym 12642 w_lvds_rx_09_d1_SB_LUT4_I0_O[0]
|
|
.sym 12643 smi_ctrl_ins.o_smi_data_out_SB_DFFNE_Q_D_SB_LUT4_O_6_I3[1]
|
|
.sym 12648 rx_fifo.empty_o_SB_DFF_Q_D_SB_LUT4_O_I0_SB_LUT4_O_1_I1_SB_LUT4_O_I3[1]
|
|
.sym 12654 rx_fifo.rd_addr[0]
|
|
.sym 12655 w_rx_fifo_pulled_data[4]
|
|
.sym 12656 rx_fifo.full_o_SB_DFF_Q_D_SB_LUT4_O_I0_SB_LUT4_O_1_I0[2]
|
|
.sym 12657 w_rx_fifo_pulled_data[6]
|
|
.sym 12663 rx_fifo.wr_addr_gray_SB_LUT4_I2_O[8]
|
|
.sym 12667 w_rx_09_fifo_data[5]
|
|
.sym 12672 w_rx_24_fifo_data[5]
|
|
.sym 12675 rx_fifo.full_o_SB_DFF_Q_D_SB_LUT4_O_I0_SB_LUT4_O_1_I0[3]
|
|
.sym 12678 rx_fifo.rd_addr_gray_wr_r[3]
|
|
.sym 12680 rx_fifo.full_o_SB_DFF_Q_D_SB_LUT4_O_I0_SB_LUT4_O_2_I0[1]
|
|
.sym 12681 rx_fifo.wr_addr_gray_SB_LUT4_I2_O[2]
|
|
.sym 12682 rx_fifo.wr_addr_gray_SB_LUT4_I2_O[3]
|
|
.sym 12683 rx_fifo.wr_addr_gray_SB_LUT4_I2_O[4]
|
|
.sym 12686 rx_fifo.wr_addr_gray_SB_LUT4_I2_O[7]
|
|
.sym 12687 rx_fifo.full_o_SB_DFF_Q_D_SB_LUT4_O_I0_SB_LUT4_O_1_I0[1]
|
|
.sym 12688 rx_fifo.wr_addr_gray_SB_LUT4_I2_O[1]
|
|
.sym 12690 w_rx_fifo_push
|
|
.sym 12693 o_led1$SB_IO_OUT
|
|
.sym 12697 rx_fifo.full_o_SB_DFF_Q_D_SB_LUT4_O_I0_SB_LUT4_O_1_I0[1]
|
|
.sym 12703 rx_fifo.wr_addr_gray_SB_LUT4_I2_O[1]
|
|
.sym 12708 rx_fifo.wr_addr_gray_SB_LUT4_I2_O[1]
|
|
.sym 12711 rx_fifo.full_o_SB_DFF_Q_D_SB_LUT4_O_I0_SB_LUT4_O_1_I0[1]
|
|
.sym 12715 rx_fifo.wr_addr_gray_SB_LUT4_I2_O[8]
|
|
.sym 12716 rx_fifo.wr_addr_gray_SB_LUT4_I2_O[7]
|
|
.sym 12720 w_rx_24_fifo_data[5]
|
|
.sym 12721 o_led1$SB_IO_OUT
|
|
.sym 12722 w_rx_09_fifo_data[5]
|
|
.sym 12726 rx_fifo.full_o_SB_DFF_Q_D_SB_LUT4_O_I0_SB_LUT4_O_1_I0[3]
|
|
.sym 12727 rx_fifo.wr_addr_gray_SB_LUT4_I2_O[1]
|
|
.sym 12728 rx_fifo.full_o_SB_DFF_Q_D_SB_LUT4_O_I0_SB_LUT4_O_1_I0[1]
|
|
.sym 12732 rx_fifo.wr_addr_gray_SB_LUT4_I2_O[2]
|
|
.sym 12733 rx_fifo.full_o_SB_DFF_Q_D_SB_LUT4_O_I0_SB_LUT4_O_2_I0[1]
|
|
.sym 12735 rx_fifo.wr_addr_gray_SB_LUT4_I2_O[3]
|
|
.sym 12739 rx_fifo.wr_addr_gray_SB_LUT4_I2_O[4]
|
|
.sym 12740 rx_fifo.wr_addr_gray_SB_LUT4_I2_O[3]
|
|
.sym 12741 rx_fifo.rd_addr_gray_wr_r[3]
|
|
.sym 12742 w_rx_fifo_push
|
|
.sym 12743 o_iq_tx_clk_p$SB_IO_OUT_$glb_clk
|
|
.sym 12746 rx_fifo.rd_addr_gray_SB_DFFE_Q_5_D_SB_LUT4_I0_O[1]
|
|
.sym 12747 rx_fifo.rd_addr_gray_SB_DFFE_Q_6_D_SB_LUT4_I0_O_SB_LUT4_O_I3[2]
|
|
.sym 12748 rx_fifo.rd_addr_gray_SB_LUT4_I2_O[3]
|
|
.sym 12749 rx_fifo.rd_addr_gray_SB_LUT4_I2_O[4]
|
|
.sym 12750 rx_fifo.rd_addr_gray_SB_LUT4_I2_O[5]
|
|
.sym 12751 rx_fifo.rd_addr_gray_SB_LUT4_I2_O[6]
|
|
.sym 12752 rx_fifo.rd_addr_gray_SB_LUT4_I2_O[7]
|
|
.sym 12757 rx_fifo.full_o_SB_DFF_Q_D_SB_LUT4_O_I0_SB_LUT4_O_1_I0[1]
|
|
.sym 12758 rx_fifo.rd_addr[7]
|
|
.sym 12760 rx_fifo.wr_addr[7]
|
|
.sym 12761 rx_fifo.wr_addr[8]
|
|
.sym 12763 w_smi_data_input[7]
|
|
.sym 12764 rx_fifo.rd_addr[0]
|
|
.sym 12766 rx_fifo.rd_addr_gray_wr_r[3]
|
|
.sym 12767 rx_fifo.wr_addr[2]
|
|
.sym 12768 w_smi_data_input[5]
|
|
.sym 12769 w_lvds_rx_24_d0_SB_LUT4_I1_O[0]
|
|
.sym 12770 rx_fifo.empty_o_SB_DFF_Q_D_SB_LUT4_O_I0_SB_LUT4_O_1_I1_SB_LUT4_O_2_I0[3]
|
|
.sym 12771 w_rx_fifo_pull
|
|
.sym 12772 rx_fifo.empty_o_SB_DFF_Q_D_SB_LUT4_O_I0_SB_LUT4_O_1_I1_SB_LUT4_O_1_I0[1]
|
|
.sym 12774 w_rx_fifo_pulled_data[7]
|
|
.sym 12775 w_lvds_rx_24_d0_SB_LUT4_I1_O[0]
|
|
.sym 12776 rx_fifo.empty_o_SB_DFF_Q_D_SB_LUT4_O_I0_SB_LUT4_O_1_I1_SB_LUT4_O_I3[1]
|
|
.sym 12777 smi_ctrl_ins.o_smi_data_out_SB_DFFNE_Q_D_SB_LUT4_O_3_I3[1]
|
|
.sym 12778 w_rx_24_fifo_data[11]
|
|
.sym 12780 rx_fifo.rd_addr_gray_SB_DFFE_Q_5_D_SB_LUT4_I0_O[1]
|
|
.sym 12787 rx_fifo.wr_addr_gray_SB_LUT4_I2_O[4]
|
|
.sym 12788 w_rx_fifo_pull
|
|
.sym 12789 rx_fifo.wr_addr_gray_SB_LUT4_I2_O[5]
|
|
.sym 12795 w_rx_fifo_pull
|
|
.sym 12799 rx_fifo.rd_addr_gray_wr_r[4]
|
|
.sym 12801 rx_fifo.full_o_SB_DFF_Q_D_SB_LUT4_O_I0_SB_LUT4_O_I0_SB_LUT4_O_1_I3[3]
|
|
.sym 12802 rx_fifo.full_o_SB_DFF_Q_D_SB_LUT4_O_I0_SB_LUT4_O_I0_SB_LUT4_O_1_I3[0]
|
|
.sym 12803 rx_fifo.rd_addr_gray_SB_DFFE_Q_5_D_SB_LUT4_I0_O_SB_LUT4_O_I0[2]
|
|
.sym 12805 rx_fifo.rd_addr_gray_SB_LUT4_I2_O[3]
|
|
.sym 12808 rx_fifo.rd_addr_gray_SB_LUT4_I2_O[6]
|
|
.sym 12810 rx_fifo.full_o_SB_DFF_Q_D_SB_LUT4_O_I0_SB_LUT4_O_2_I2[4]
|
|
.sym 12811 rx_fifo.rd_addr_gray_SB_DFFE_Q_5_D_SB_LUT4_I0_O[1]
|
|
.sym 12812 rx_fifo.full_o_SB_DFF_Q_D_SB_LUT4_O_I0_SB_LUT4_O_2_I2[5]
|
|
.sym 12813 rx_fifo.rd_addr_gray_SB_DFFE_Q_5_D_SB_LUT4_I0_O_SB_LUT4_O_I0[1]
|
|
.sym 12816 rx_fifo.rd_addr_gray_SB_DFFE_Q_5_D_SB_LUT4_I0_O_SB_LUT4_O_I0[0]
|
|
.sym 12825 rx_fifo.wr_addr_gray_SB_LUT4_I2_O[4]
|
|
.sym 12826 rx_fifo.rd_addr_gray_wr_r[4]
|
|
.sym 12827 rx_fifo.wr_addr_gray_SB_LUT4_I2_O[5]
|
|
.sym 12831 w_rx_fifo_pull
|
|
.sym 12832 rx_fifo.rd_addr_gray_SB_DFFE_Q_5_D_SB_LUT4_I0_O_SB_LUT4_O_I0[0]
|
|
.sym 12833 rx_fifo.rd_addr_gray_SB_DFFE_Q_5_D_SB_LUT4_I0_O_SB_LUT4_O_I0[1]
|
|
.sym 12834 rx_fifo.rd_addr_gray_SB_DFFE_Q_5_D_SB_LUT4_I0_O_SB_LUT4_O_I0[2]
|
|
.sym 12838 rx_fifo.rd_addr_gray_SB_LUT4_I2_O[6]
|
|
.sym 12851 rx_fifo.rd_addr_gray_SB_LUT4_I2_O[3]
|
|
.sym 12855 rx_fifo.full_o_SB_DFF_Q_D_SB_LUT4_O_I0_SB_LUT4_O_I0_SB_LUT4_O_1_I3[3]
|
|
.sym 12856 rx_fifo.full_o_SB_DFF_Q_D_SB_LUT4_O_I0_SB_LUT4_O_2_I2[5]
|
|
.sym 12857 rx_fifo.full_o_SB_DFF_Q_D_SB_LUT4_O_I0_SB_LUT4_O_I0_SB_LUT4_O_1_I3[0]
|
|
.sym 12858 rx_fifo.full_o_SB_DFF_Q_D_SB_LUT4_O_I0_SB_LUT4_O_2_I2[4]
|
|
.sym 12864 rx_fifo.rd_addr_gray_SB_DFFE_Q_5_D_SB_LUT4_I0_O[1]
|
|
.sym 12865 w_rx_fifo_pull
|
|
.sym 12866 r_counter_$glb_clk
|
|
.sym 12868 rx_fifo.rd_addr_gray_SB_LUT4_I2_O[8]
|
|
.sym 12869 rx_fifo.rd_addr_gray_SB_DFFE_Q_5_D_SB_LUT4_I0_O_SB_LUT4_O_I0[2]
|
|
.sym 12870 rx_fifo.rd_addr_gray_SB_DFFE_Q_6_D[3]
|
|
.sym 12872 rx_fifo.rd_addr_gray_SB_DFFE_Q_7_D[0]
|
|
.sym 12873 w_rx_24_fifo_data[17]
|
|
.sym 12874 rx_fifo.rd_addr_gray_SB_DFFE_Q_5_D_SB_LUT4_I0_O_SB_LUT4_O_I0[0]
|
|
.sym 12875 w_rx_24_fifo_data[13]
|
|
.sym 12877 w_rx_fifo_pull
|
|
.sym 12881 rx_fifo.rd_addr_gray_SB_LUT4_I2_O[6]
|
|
.sym 12882 w_rx_fifo_pull
|
|
.sym 12885 smi_ctrl_ins.r_fifo_pulled_data[26]
|
|
.sym 12887 rx_fifo.rd_addr_gray_wr_r[4]
|
|
.sym 12888 rx_fifo.empty_o_SB_DFF_Q_D_SB_LUT4_O_I0_SB_LUT4_O_1_I1_SB_LUT4_O_I3[2]
|
|
.sym 12889 w_rx_fifo_pull
|
|
.sym 12891 $PACKER_VCC_NET
|
|
.sym 12892 rx_fifo.rd_addr_gray_SB_DFFE_Q_6_D_SB_LUT4_I0_O_SB_LUT4_O_I3[2]
|
|
.sym 12893 rx_fifo.rd_addr_gray_SB_DFFE_Q_5_D[1]
|
|
.sym 12895 rx_fifo.empty_o_SB_DFF_Q_D_SB_LUT4_O_I0_SB_LUT4_O_1_I1_SB_LUT4_O_I3[2]
|
|
.sym 12896 rx_fifo.empty_o_SB_DFF_Q_D_SB_LUT4_O_I0_SB_LUT4_O_1_I1_SB_LUT4_O_2_I0[3]
|
|
.sym 12898 rx_fifo.empty_o_SB_DFF_Q_D_SB_LUT4_O_I0_SB_LUT4_O_1_I1_SB_LUT4_O_1_I0[1]
|
|
.sym 12899 i_rst_b$SB_IO_IN
|
|
.sym 12900 rx_fifo.rd_addr[7]
|
|
.sym 12902 rx_fifo.empty_o_SB_DFF_Q_D_SB_LUT4_O_I0_SB_LUT4_O_1_I1_SB_LUT4_O_I3[1]
|
|
.sym 12903 rx_fifo.empty_o_SB_LUT4_I2_O[0]
|
|
.sym 12911 rx_fifo.rd_addr_gray_SB_DFFE_Q_6_D_SB_LUT4_I0_O_SB_LUT4_O_I3[2]
|
|
.sym 12912 rx_fifo.full_o_SB_DFF_Q_D_SB_LUT4_O_I0_SB_LUT4_O_2_I2[6]
|
|
.sym 12921 rx_fifo.rd_addr_gray_SB_LUT4_I2_O[4]
|
|
.sym 12922 rx_fifo.rd_addr_gray_SB_LUT4_I2_O[5]
|
|
.sym 12924 rx_fifo.rd_addr_gray_SB_LUT4_I2_O[7]
|
|
.sym 12927 w_rx_fifo_pull
|
|
.sym 12929 rx_fifo.rd_addr[0]
|
|
.sym 12931 rx_fifo.rd_addr_gray_wr_r[7]
|
|
.sym 12935 rx_fifo.rd_addr_gray_SB_DFFE_Q_6_D[3]
|
|
.sym 12942 rx_fifo.rd_addr_gray_SB_LUT4_I2_O[7]
|
|
.sym 12949 rx_fifo.rd_addr_gray_SB_LUT4_I2_O[5]
|
|
.sym 12954 rx_fifo.rd_addr_gray_SB_LUT4_I2_O[5]
|
|
.sym 12955 rx_fifo.rd_addr_gray_SB_LUT4_I2_O[4]
|
|
.sym 12960 rx_fifo.rd_addr_gray_SB_DFFE_Q_6_D[3]
|
|
.sym 12966 rx_fifo.rd_addr[0]
|
|
.sym 12973 rx_fifo.rd_addr_gray_wr_r[7]
|
|
.sym 12974 rx_fifo.full_o_SB_DFF_Q_D_SB_LUT4_O_I0_SB_LUT4_O_2_I2[6]
|
|
.sym 12979 rx_fifo.rd_addr_gray_SB_LUT4_I2_O[4]
|
|
.sym 12985 rx_fifo.rd_addr_gray_SB_DFFE_Q_6_D_SB_LUT4_I0_O_SB_LUT4_O_I3[2]
|
|
.sym 12988 w_rx_fifo_pull
|
|
.sym 12989 r_counter_$glb_clk
|
|
.sym 12991 rx_fifo.rd_addr_gray_SB_DFFE_Q_5_D[3]
|
|
.sym 12992 rx_fifo.empty_o_SB_DFF_Q_D_SB_LUT4_O_I0_SB_LUT4_O_1_I1_SB_LUT4_O_I3[0]
|
|
.sym 12993 rx_fifo.rd_addr_gray_SB_DFFE_Q_5_D_SB_LUT4_I0_O[3]
|
|
.sym 12994 rx_fifo.wr_addr_gray_rd[7]
|
|
.sym 12995 w_rx_fifo_empty
|
|
.sym 12996 rx_fifo.empty_o_SB_DFF_Q_D_SB_LUT4_O_I0_SB_LUT4_O_1_I1[1]
|
|
.sym 12997 rx_fifo.empty_o_SB_DFF_Q_D_SB_LUT4_O_I0_SB_LUT4_O_1_I1_SB_LUT4_O_2_I0[0]
|
|
.sym 12998 rx_fifo.full_o_SB_DFF_Q_D_SB_LUT4_O_I0_SB_LUT4_O_I0[3]
|
|
.sym 13003 rx_fifo.rd_addr[7]
|
|
.sym 13005 rx_fifo.wr_addr[8]
|
|
.sym 13006 rx_fifo.rd_addr_gray_SB_DFFE_Q_7_D[1]
|
|
.sym 13007 rx_fifo.empty_o_SB_DFF_Q_D_SB_LUT4_O_I0_SB_LUT4_O_1_I1_SB_LUT4_O_I3[1]
|
|
.sym 13008 w_lvds_rx_09_d1_SB_LUT4_I0_O[0]
|
|
.sym 13010 rx_fifo.rd_addr_gray_SB_LUT4_I2_O[8]
|
|
.sym 13011 $PACKER_VCC_NET
|
|
.sym 13013 rx_fifo.rd_addr[0]
|
|
.sym 13016 $PACKER_VCC_NET
|
|
.sym 13019 rx_fifo.wr_addr_gray[8]
|
|
.sym 13020 rx_fifo.rd_addr_gray_SB_LUT4_I2_O[5]
|
|
.sym 13021 rx_fifo.empty_o_SB_DFF_Q_D_SB_LUT4_O_I0_SB_LUT4_O_1_I1_SB_LUT4_O_1_I0[3]
|
|
.sym 13024 rx_fifo.empty_o_SB_DFF_Q_D_SB_LUT4_O_I0_SB_LUT4_O_1_I1_SB_LUT4_O_2_I0[3]
|
|
.sym 13025 rx_fifo.wr_addr_gray[6]
|
|
.sym 13026 rx_fifo.empty_o_SB_DFF_Q_D_SB_LUT4_O_I0_SB_LUT4_O_1_I1_SB_LUT4_O_1_I0[1]
|
|
.sym 13032 rx_fifo.rd_addr_gray_SB_DFFE_Q_7_D[3]
|
|
.sym 13033 rx_fifo.rd_addr_gray_SB_DFFE_Q_5_D_SB_LUT4_I0_O_SB_LUT4_O_I0[2]
|
|
.sym 13034 rx_fifo.rd_addr_gray_SB_DFFE_Q_5_D[0]
|
|
.sym 13036 rx_fifo.rd_addr_gray_SB_DFFE_Q_7_D[0]
|
|
.sym 13038 rx_fifo.rd_addr_gray_SB_DFFE_Q_6_D[0]
|
|
.sym 13043 w_rx_fifo_pull
|
|
.sym 13044 rx_fifo.rd_addr[0]
|
|
.sym 13050 rx_fifo.rd_addr_gray_SB_DFFE_Q_5_D_SB_LUT4_I0_O[1]
|
|
.sym 13052 rx_fifo.rd_addr_gray_SB_DFFE_Q_6_D_SB_LUT4_I0_O_SB_LUT4_O_I3[2]
|
|
.sym 13061 rx_fifo.rd_addr_gray_SB_DFFE_Q_5_D[2]
|
|
.sym 13067 rx_fifo.rd_addr_gray_SB_DFFE_Q_5_D[0]
|
|
.sym 13074 rx_fifo.rd_addr_gray_SB_DFFE_Q_5_D[2]
|
|
.sym 13077 rx_fifo.rd_addr_gray_SB_DFFE_Q_6_D_SB_LUT4_I0_O_SB_LUT4_O_I3[2]
|
|
.sym 13079 rx_fifo.rd_addr_gray_SB_DFFE_Q_5_D_SB_LUT4_I0_O[1]
|
|
.sym 13086 rx_fifo.rd_addr_gray_SB_DFFE_Q_6_D[0]
|
|
.sym 13089 rx_fifo.rd_addr_gray_SB_DFFE_Q_7_D[0]
|
|
.sym 13095 rx_fifo.rd_addr_gray_SB_DFFE_Q_5_D_SB_LUT4_I0_O_SB_LUT4_O_I0[2]
|
|
.sym 13103 rx_fifo.rd_addr_gray_SB_DFFE_Q_7_D[3]
|
|
.sym 13107 rx_fifo.rd_addr[0]
|
|
.sym 13108 rx_fifo.rd_addr_gray_SB_DFFE_Q_5_D_SB_LUT4_I0_O[1]
|
|
.sym 13111 w_rx_fifo_pull
|
|
.sym 13112 r_counter_$glb_clk
|
|
.sym 13114 rx_fifo.empty_o_SB_LUT4_I2_O[2]
|
|
.sym 13115 rx_fifo.empty_o_SB_LUT4_I2_I0[3]
|
|
.sym 13116 rx_fifo.empty_o_SB_DFF_Q_D_SB_LUT4_O_I0_SB_LUT4_O_1_I1_SB_LUT4_O_1_I0[0]
|
|
.sym 13117 rx_fifo.empty_o_SB_DFF_Q_D_SB_LUT4_O_I0[0]
|
|
.sym 13118 rx_fifo.empty_o_SB_DFF_Q_D_SB_LUT4_O_I0_SB_LUT4_O_1_I1_SB_LUT4_O_I3[3]
|
|
.sym 13120 spi_if_ins.spi.r_tx_bit_count_SB_DFFESR_Q_R
|
|
.sym 13121 smi_ctrl_ins.r_fifo_pushed_data[8]
|
|
.sym 13126 w_rx_fifo_data[13]
|
|
.sym 13128 rx_fifo.rd_addr[9]
|
|
.sym 13130 rx_fifo.empty_o_SB_DFF_Q_D_SB_LUT4_O_I0_SB_LUT4_O_1_I1_SB_LUT4_O_1_I0[3]
|
|
.sym 13131 rx_fifo.full_o_SB_DFF_Q_D_SB_LUT4_O_I0_SB_LUT4_O_I0_SB_LUT4_O_I0[2]
|
|
.sym 13134 rx_fifo.rd_addr[8]
|
|
.sym 13135 w_lvds_rx_09_d1_SB_LUT4_I0_O[0]
|
|
.sym 13136 rx_fifo.rd_addr_gray_SB_DFFE_Q_7_D[3]
|
|
.sym 13137 rx_fifo.full_o_SB_DFF_Q_D_SB_LUT4_O_I0_SB_LUT4_O_I0_SB_LUT4_O_I0[1]
|
|
.sym 13139 rx_fifo.wr_addr_gray_rd[5]
|
|
.sym 13140 w_tx_fifo_push
|
|
.sym 13141 rx_fifo.rd_addr[8]
|
|
.sym 13144 w_rx_fifo_push
|
|
.sym 13145 smi_ctrl_ins.r_fifo_pushed_data[8]
|
|
.sym 13164 rx_fifo.wr_addr_gray_rd[8]
|
|
.sym 13168 rx_fifo.wr_addr_gray_rd[2]
|
|
.sym 13171 rx_fifo.wr_addr_gray[2]
|
|
.sym 13172 rx_fifo.wr_addr_gray_rd[9]
|
|
.sym 13179 rx_fifo.wr_addr_gray[8]
|
|
.sym 13181 rx_fifo.wr_addr_gray[3]
|
|
.sym 13182 rx_fifo.wr_addr_gray_rd[1]
|
|
.sym 13185 rx_fifo.wr_addr_gray[6]
|
|
.sym 13191 rx_fifo.wr_addr_gray[6]
|
|
.sym 13194 rx_fifo.wr_addr_gray[8]
|
|
.sym 13203 rx_fifo.wr_addr_gray[3]
|
|
.sym 13206 rx_fifo.wr_addr_gray_rd[9]
|
|
.sym 13212 rx_fifo.wr_addr_gray_rd[1]
|
|
.sym 13221 rx_fifo.wr_addr_gray[2]
|
|
.sym 13224 rx_fifo.wr_addr_gray_rd[8]
|
|
.sym 13231 rx_fifo.wr_addr_gray_rd[2]
|
|
.sym 13235 r_counter_$glb_clk
|
|
.sym 13240 smi_ctrl_ins.r_fifo_push_1
|
|
.sym 13241 rx_fifo.empty_o_SB_DFF_Q_D_SB_LUT4_O_I0_SB_LUT4_O_1_I1[0]
|
|
.sym 13242 smi_ctrl_ins.r_fifo_push
|
|
.sym 13244 w_tx_fifo_push
|
|
.sym 13249 rx_fifo.rd_addr[0]
|
|
.sym 13251 rx_fifo.empty_o_SB_DFF_Q_D_SB_LUT4_O_I0_SB_LUT4_O_1_I1_SB_LUT4_O_I3[1]
|
|
.sym 13252 w_smi_data_input[0]
|
|
.sym 13253 rx_fifo.rd_addr[7]
|
|
.sym 13255 rx_fifo.empty_o_SB_DFF_Q_D_SB_LUT4_O_I0_SB_LUT4_O_1_I1_SB_LUT4_O_2_I0[3]
|
|
.sym 13256 w_tx_fifo_data[22]
|
|
.sym 13259 rx_fifo.rd_addr_gray_SB_DFFE_Q_6_D_SB_LUT4_I0_O_SB_LUT4_O_I3[0]
|
|
.sym 13263 spi_if_ins.spi.r3_rx_done_SB_LUT4_I2_O
|
|
.sym 13266 i_rst_b$SB_IO_IN
|
|
.sym 13267 rx_fifo.rd_addr[8]
|
|
.sym 13268 spi_if_ins.state_if_SB_DFFESR_Q_2_D[0]
|
|
.sym 13270 tx_fifo.rd_addr_gray[0]
|
|
.sym 13272 w_rx_fifo_pull
|
|
.sym 13278 rx_fifo.rd_addr_gray_SB_LUT4_I2_O[8]
|
|
.sym 13279 rx_fifo.rd_addr_gray_SB_LUT4_I2_O[6]
|
|
.sym 13280 rx_fifo.empty_o_SB_DFF_Q_D_SB_LUT4_O_I0_SB_LUT4_O_1_I1_SB_LUT4_O_I3[2]
|
|
.sym 13290 rx_fifo.rd_addr_gray_SB_LUT4_I2_O[5]
|
|
.sym 13291 rx_fifo.rd_addr[7]
|
|
.sym 13296 w_rx_fifo_pull
|
|
.sym 13299 rx_fifo.rd_addr_gray_SB_DFFE_Q_7_D[1]
|
|
.sym 13323 rx_fifo.empty_o_SB_DFF_Q_D_SB_LUT4_O_I0_SB_LUT4_O_1_I1_SB_LUT4_O_I3[2]
|
|
.sym 13325 rx_fifo.rd_addr[7]
|
|
.sym 13326 rx_fifo.rd_addr_gray_SB_DFFE_Q_7_D[1]
|
|
.sym 13341 rx_fifo.rd_addr_gray_SB_LUT4_I2_O[5]
|
|
.sym 13343 rx_fifo.rd_addr_gray_SB_LUT4_I2_O[6]
|
|
.sym 13354 rx_fifo.rd_addr_gray_SB_LUT4_I2_O[8]
|
|
.sym 13357 w_rx_fifo_pull
|
|
.sym 13358 r_counter_$glb_clk
|
|
.sym 13362 w_tx_fifo_pull
|
|
.sym 13363 spi_if_ins.spi.o_rx_data_valid_SB_LUT4_I3_O_SB_LUT4_I3_O[2]
|
|
.sym 13364 spi_if_ins.spi.r3_rx_done
|
|
.sym 13365 spi_if_ins.o_fetch_cmd_SB_DFFESR_Q_E_SB_LUT4_O_I1[2]
|
|
.sym 13367 spi_if_ins.spi.r3_rx_done_SB_LUT4_I2_O
|
|
.sym 13377 w_tx_fifo_push
|
|
.sym 13379 w_tx_fifo_data[21]
|
|
.sym 13382 $PACKER_VCC_NET
|
|
.sym 13387 spi_if_ins.o_fetch_cmd_SB_DFFESR_Q_E_SB_LUT4_O_I1[2]
|
|
.sym 13390 w_tx_fifo_pull
|
|
.sym 13391 i_rst_b$SB_IO_IN
|
|
.sym 13394 w_tx_fifo_push
|
|
.sym 13406 tx_fifo.empty_o_SB_DFF_Q_D_SB_LUT4_O_I1_SB_LUT4_O_I0_SB_LUT4_O_2_I3[1]
|
|
.sym 13411 tx_fifo.rd_addr_gray_SB_LUT4_I2_O[3]
|
|
.sym 13412 tx_fifo.rd_addr_gray_SB_LUT4_I2_O[1]
|
|
.sym 13418 w_tx_fifo_pull
|
|
.sym 13419 w_tx_fifo_pull
|
|
.sym 13427 tx_fifo.rd_addr[0]
|
|
.sym 13428 tx_fifo.empty_o_SB_LUT4_I3_I1[2]
|
|
.sym 13429 w_tx_fifo_empty
|
|
.sym 13430 tx_fifo.empty_o_SB_LUT4_I3_I1[1]
|
|
.sym 13448 tx_fifo.rd_addr_gray_SB_LUT4_I2_O[1]
|
|
.sym 13449 tx_fifo.rd_addr[0]
|
|
.sym 13452 tx_fifo.rd_addr_gray_SB_LUT4_I2_O[3]
|
|
.sym 13454 tx_fifo.empty_o_SB_DFF_Q_D_SB_LUT4_O_I1_SB_LUT4_O_I0_SB_LUT4_O_2_I3[1]
|
|
.sym 13470 tx_fifo.empty_o_SB_LUT4_I3_I1[2]
|
|
.sym 13471 w_tx_fifo_empty
|
|
.sym 13472 tx_fifo.empty_o_SB_LUT4_I3_I1[1]
|
|
.sym 13473 w_tx_fifo_pull
|
|
.sym 13480 w_tx_fifo_pull
|
|
.sym 13481 o_iq_tx_clk_p$SB_IO_OUT_$glb_clk
|
|
.sym 13484 w_tx_fifo_pull
|
|
.sym 13492 rx_fifo.empty_o_SB_DFF_Q_D_SB_LUT4_O_I0_SB_LUT4_O_1_I1_SB_LUT4_O_1_I0[3]
|
|
.sym 13496 w_tx_fifo_pulled_data[21]
|
|
.sym 13497 rx_fifo.wr_addr[8]
|
|
.sym 13498 tx_fifo.rd_addr_gray_SB_LUT4_I2_O[1]
|
|
.sym 13499 w_tx_fifo_pulled_data[22]
|
|
.sym 13500 w_tx_fifo_data[23]
|
|
.sym 13502 w_tx_fifo_data[3]
|
|
.sym 13503 $PACKER_VCC_NET
|
|
.sym 13511 w_cs[1]
|
|
.sym 13512 $PACKER_VCC_NET
|
|
.sym 13513 w_tx_fifo_empty
|
|
.sym 13516 tx_fifo.empty_o_SB_LUT4_I3_I1[1]
|
|
.sym 13517 $PACKER_VCC_NET
|
|
.sym 13518 w_tx_fifo_pull
|
|
.sym 13530 tx_fifo.wr_addr_gray_SB_LUT4_I2_O[6]
|
|
.sym 13537 tx_fifo.wr_addr_gray_SB_DFFE_Q_4_D_SB_LUT4_I2_O_SB_LUT4_O_I3[2]
|
|
.sym 13538 spi_if_ins.state_if_SB_DFFESR_Q_2_D[0]
|
|
.sym 13541 tx_fifo.wr_addr_gray[3]
|
|
.sym 13544 spi_if_ins.state_if[2]
|
|
.sym 13545 tx_fifo.wr_addr_gray[4]
|
|
.sym 13547 tx_fifo.wr_addr_gray[6]
|
|
.sym 13551 tx_fifo.wr_addr_gray[2]
|
|
.sym 13552 tx_fifo.wr_addr[9]
|
|
.sym 13553 spi_if_ins.spi.o_rx_data_valid_SB_LUT4_I3_O[1]
|
|
.sym 13554 tx_fifo.wr_addr_gray[5]
|
|
.sym 13558 tx_fifo.wr_addr_gray[4]
|
|
.sym 13563 tx_fifo.wr_addr_gray[6]
|
|
.sym 13569 spi_if_ins.spi.o_rx_data_valid_SB_LUT4_I3_O[1]
|
|
.sym 13571 spi_if_ins.state_if[2]
|
|
.sym 13572 spi_if_ins.state_if_SB_DFFESR_Q_2_D[0]
|
|
.sym 13575 tx_fifo.wr_addr_gray[3]
|
|
.sym 13581 tx_fifo.wr_addr_gray[2]
|
|
.sym 13589 tx_fifo.wr_addr_gray[5]
|
|
.sym 13596 tx_fifo.wr_addr[9]
|
|
.sym 13600 tx_fifo.wr_addr_gray_SB_LUT4_I2_O[6]
|
|
.sym 13602 tx_fifo.wr_addr_gray_SB_DFFE_Q_4_D_SB_LUT4_I2_O_SB_LUT4_O_I3[2]
|
|
.sym 13604 o_iq_tx_clk_p$SB_IO_OUT_$glb_clk
|
|
.sym 13606 w_load
|
|
.sym 13608 spi_if_ins.o_load_cmd_SB_DFFESR_Q_R
|
|
.sym 13609 spi_if_ins.state_if_SB_DFFESR_Q_D[1]
|
|
.sym 13611 spi_if_ins.spi.o_rx_data_valid_SB_LUT4_I3_O[1]
|
|
.sym 13612 spi_if_ins.state_if_SB_DFFESR_Q_D[2]
|
|
.sym 13618 rx_fifo.rd_addr[8]
|
|
.sym 13619 w_tx_fifo_data[26]
|
|
.sym 13621 spi_if_ins.w_rx_data[0]
|
|
.sym 13622 tx_fifo.empty_o_SB_LUT4_I3_O_SB_LUT4_O_1_I0[3]
|
|
.sym 13624 spi_if_ins.spi.o_rx_data_valid_SB_LUT4_I3_O_SB_LUT4_I3_O[2]
|
|
.sym 13625 spi_if_ins.w_rx_data[3]
|
|
.sym 13626 spi_if_ins.r_tx_data_valid_SB_DFFESR_Q_D[1]
|
|
.sym 13627 spi_if_ins.w_rx_data[2]
|
|
.sym 13629 tx_fifo.rd_addr[0]
|
|
.sym 13631 spi_if_ins.state_if[1]
|
|
.sym 13633 spi_if_ins.r_tx_data_valid_SB_DFFESR_Q_D[1]
|
|
.sym 13634 spi_if_ins.o_data_in_SB_DFFE_Q_E
|
|
.sym 13640 i_rst_b$SB_IO_IN
|
|
.sym 13663 tx_fifo.wr_addr[6]
|
|
.sym 13664 tx_fifo.wr_addr[2]
|
|
.sym 13665 tx_fifo.wr_addr[7]
|
|
.sym 13666 tx_fifo.wr_addr[4]
|
|
.sym 13667 tx_fifo.full_o_SB_DFF_Q_D_SB_LUT4_O_I0_SB_LUT4_O_1_I2_SB_LUT4_O_I3[0]
|
|
.sym 13668 tx_fifo.full_o_SB_DFF_Q_D_SB_LUT4_O_I0_SB_LUT4_O_1_I0_SB_LUT4_O_I3[1]
|
|
.sym 13670 tx_fifo.wr_addr[5]
|
|
.sym 13675 tx_fifo.full_o_SB_DFF_Q_D_SB_LUT4_O_I0_SB_LUT4_O_1_I2_SB_LUT4_O_I3[0]
|
|
.sym 13677 tx_fifo.wr_addr[3]
|
|
.sym 13679 $nextpnr_ICESTORM_LC_0$O
|
|
.sym 13681 tx_fifo.full_o_SB_DFF_Q_D_SB_LUT4_O_I0_SB_LUT4_O_1_I2_SB_LUT4_O_I3[0]
|
|
.sym 13685 tx_fifo.wr_addr_gray_SB_LUT4_I2_I3[2]
|
|
.sym 13688 tx_fifo.full_o_SB_DFF_Q_D_SB_LUT4_O_I0_SB_LUT4_O_1_I0_SB_LUT4_O_I3[1]
|
|
.sym 13689 tx_fifo.full_o_SB_DFF_Q_D_SB_LUT4_O_I0_SB_LUT4_O_1_I2_SB_LUT4_O_I3[0]
|
|
.sym 13691 tx_fifo.wr_addr_gray_SB_LUT4_I2_I3[3]
|
|
.sym 13693 tx_fifo.wr_addr[2]
|
|
.sym 13695 tx_fifo.wr_addr_gray_SB_LUT4_I2_I3[2]
|
|
.sym 13697 tx_fifo.wr_addr_gray_SB_LUT4_I2_I3[4]
|
|
.sym 13700 tx_fifo.wr_addr[3]
|
|
.sym 13701 tx_fifo.wr_addr_gray_SB_LUT4_I2_I3[3]
|
|
.sym 13703 tx_fifo.wr_addr_gray_SB_LUT4_I2_I3[5]
|
|
.sym 13705 tx_fifo.wr_addr[4]
|
|
.sym 13707 tx_fifo.wr_addr_gray_SB_LUT4_I2_I3[4]
|
|
.sym 13709 tx_fifo.wr_addr_gray_SB_LUT4_I2_I3[6]
|
|
.sym 13712 tx_fifo.wr_addr[5]
|
|
.sym 13713 tx_fifo.wr_addr_gray_SB_LUT4_I2_I3[5]
|
|
.sym 13715 tx_fifo.wr_addr_gray_SB_LUT4_I2_I3[7]
|
|
.sym 13718 tx_fifo.wr_addr[6]
|
|
.sym 13719 tx_fifo.wr_addr_gray_SB_LUT4_I2_I3[6]
|
|
.sym 13721 tx_fifo.wr_addr_gray_SB_LUT4_I2_I3[8]
|
|
.sym 13723 tx_fifo.wr_addr[7]
|
|
.sym 13725 tx_fifo.wr_addr_gray_SB_LUT4_I2_I3[7]
|
|
.sym 13729 spi_if_ins.o_data_in_SB_DFFE_Q_E
|
|
.sym 13730 tx_fifo.wr_addr_gray_SB_DFFE_Q_6_D[3]
|
|
.sym 13731 tx_fifo.wr_addr_gray_SB_DFFE_Q_8_D[2]
|
|
.sym 13732 tx_fifo.wr_addr_gray_SB_DFFE_Q_8_D[1]
|
|
.sym 13733 tx_fifo.empty_o_SB_LUT4_I3_I1[1]
|
|
.sym 13734 io_ctrl_ins.o_data_out_SB_DFFESR_Q_6_R[2]
|
|
.sym 13735 w_fetch
|
|
.sym 13736 tx_fifo.wr_addr_gray_SB_DFFE_Q_6_D[0]
|
|
.sym 13741 tx_fifo.wr_addr[7]
|
|
.sym 13742 tx_fifo.wr_addr[3]
|
|
.sym 13745 w_tx_fifo_data[24]
|
|
.sym 13746 tx_fifo.wr_addr[5]
|
|
.sym 13747 spi_if_ins.o_fetch_cmd_SB_DFFESR_Q_E_SB_LUT4_O_I1[0]
|
|
.sym 13752 tx_fifo.full_o_SB_DFF_Q_D_SB_LUT4_O_I0_SB_LUT4_O_1_I2_SB_LUT4_O_I3[0]
|
|
.sym 13753 io_ctrl_ins.o_data_out_SB_DFFESR_Q_6_R_SB_LUT4_O_I0_SB_LUT4_I2_O[2]
|
|
.sym 13755 spi_if_ins.state_if_SB_DFFESR_Q_2_D[0]
|
|
.sym 13756 io_ctrl_ins.o_data_out_SB_DFFESR_Q_6_D_SB_LUT4_O_I2[0]
|
|
.sym 13757 spi_if_ins.state_if[2]
|
|
.sym 13759 io_ctrl_ins.o_data_out_SB_DFFESR_Q_6_R[0]
|
|
.sym 13762 i_rst_b$SB_IO_IN
|
|
.sym 13765 tx_fifo.wr_addr_gray_SB_LUT4_I2_I3[8]
|
|
.sym 13772 spi_if_ins.state_if[0]
|
|
.sym 13775 tx_fifo.empty_o_SB_DFF_Q_D_SB_LUT4_O_I1_SB_LUT4_O_I0_SB_LUT4_O_2_I3[0]
|
|
.sym 13777 tx_fifo.empty_o_SB_LUT4_I3_O_SB_LUT4_O_1_I0[3]
|
|
.sym 13779 tx_fifo.empty_o_SB_DFF_Q_D_SB_LUT4_O_I1_SB_LUT4_O_1_I3[1]
|
|
.sym 13781 spi_if_ins.state_if_SB_DFFESR_Q_D[1]
|
|
.sym 13785 tx_fifo.wr_addr[8]
|
|
.sym 13788 spi_if_ins.state_if_SB_DFFESR_Q_E
|
|
.sym 13790 tx_fifo.wr_addr[9]
|
|
.sym 13791 spi_if_ins.state_if[1]
|
|
.sym 13792 spi_if_ins.state_if[2]
|
|
.sym 13799 spi_if_ins.state_if_SB_DFFESR_Q_2_D[1]
|
|
.sym 13802 tx_fifo.wr_addr_gray_SB_LUT4_I2_I3[9]
|
|
.sym 13805 tx_fifo.wr_addr[8]
|
|
.sym 13806 tx_fifo.wr_addr_gray_SB_LUT4_I2_I3[8]
|
|
.sym 13810 tx_fifo.wr_addr[9]
|
|
.sym 13812 tx_fifo.wr_addr_gray_SB_LUT4_I2_I3[9]
|
|
.sym 13817 spi_if_ins.state_if_SB_DFFESR_Q_2_D[1]
|
|
.sym 13821 tx_fifo.empty_o_SB_LUT4_I3_O_SB_LUT4_O_1_I0[3]
|
|
.sym 13822 tx_fifo.empty_o_SB_DFF_Q_D_SB_LUT4_O_I1_SB_LUT4_O_1_I3[1]
|
|
.sym 13823 tx_fifo.empty_o_SB_DFF_Q_D_SB_LUT4_O_I1_SB_LUT4_O_I0_SB_LUT4_O_2_I3[0]
|
|
.sym 13841 spi_if_ins.state_if_SB_DFFESR_Q_D[1]
|
|
.sym 13845 spi_if_ins.state_if[1]
|
|
.sym 13846 spi_if_ins.state_if[0]
|
|
.sym 13848 spi_if_ins.state_if[2]
|
|
.sym 13849 spi_if_ins.state_if_SB_DFFESR_Q_E
|
|
.sym 13850 r_counter_$glb_clk
|
|
.sym 13851 i_rst_b_SB_LUT4_I3_O_$glb_sr
|
|
.sym 13853 spi_if_ins.o_load_cmd_SB_LUT4_I3_O_SB_LUT4_I3_1_O
|
|
.sym 13854 sys_ctrl_ins.o_data_out_SB_DFFER_Q_E
|
|
.sym 13855 tx_fifo.wr_addr_gray_SB_DFFE_Q_4_D_SB_LUT4_I2_O_SB_LUT4_O_I3[3]
|
|
.sym 13856 spi_if_ins.state_if_SB_DFFESR_Q_E
|
|
.sym 13858 w_tx_data_smi[2]
|
|
.sym 13859 spi_if_ins.state_if_SB_DFFESR_Q_2_D[0]
|
|
.sym 13865 tx_fifo.wr_addr[6]
|
|
.sym 13867 tx_fifo.wr_addr_gray_SB_DFFE_Q_8_D[1]
|
|
.sym 13868 tx_fifo.wr_addr[8]
|
|
.sym 13869 tx_fifo.empty_o_SB_LUT4_I3_O_SB_LUT4_O_1_I0[2]
|
|
.sym 13871 spi_if_ins.o_data_in_SB_DFFE_Q_E
|
|
.sym 13872 tx_fifo.wr_addr[4]
|
|
.sym 13873 tx_fifo.wr_addr[8]
|
|
.sym 13874 tx_fifo.empty_o_SB_DFF_Q_D_SB_LUT4_O_I1_SB_LUT4_O_1_I3_SB_LUT4_O_I3[2]
|
|
.sym 13875 tx_fifo.wr_addr_gray_SB_DFFE_Q_8_D[2]
|
|
.sym 13878 i_rst_b$SB_IO_IN
|
|
.sym 13880 spi_if_ins.o_fetch_cmd_SB_DFFESR_Q_E_SB_LUT4_O_I1[2]
|
|
.sym 13882 w_tx_fifo_pull
|
|
.sym 13883 w_load
|
|
.sym 13884 w_fetch
|
|
.sym 13885 spi_if_ins.state_if_SB_DFFESR_Q_2_D[1]
|
|
.sym 13887 io_ctrl_ins.pmod_dir_state[2]
|
|
.sym 13894 io_ctrl_ins.pmod_dir_state[2]
|
|
.sym 13895 tx_fifo.wr_addr_gray_SB_DFFE_Q_4_D_SB_LUT4_I2_O_SB_LUT4_O_I3[2]
|
|
.sym 13899 tx_fifo.rd_addr_gray_wr[4]
|
|
.sym 13900 tx_fifo.wr_addr_gray_SB_DFFE_Q_6_D[0]
|
|
.sym 13901 tx_fifo.wr_addr_gray_SB_DFFE_Q_4_D_SB_LUT4_I2_O_SB_LUT4_O_I3[1]
|
|
.sym 13902 tx_fifo.wr_addr_gray_SB_DFFE_Q_6_D[3]
|
|
.sym 13903 tx_fifo.wr_addr_gray_SB_DFFE_Q_8_D[2]
|
|
.sym 13904 tx_fifo.wr_addr_gray_SB_DFFE_Q_8_D[1]
|
|
.sym 13907 tx_fifo.full_o_SB_DFF_Q_D_SB_LUT4_O_I0_SB_LUT4_O_I0_SB_LUT4_O_2_I3[0]
|
|
.sym 13908 tx_fifo.rd_addr_gray_wr_r[7]
|
|
.sym 13911 sys_ctrl_ins.o_data_out_SB_DFFER_Q_E
|
|
.sym 13912 tx_fifo.rd_addr_gray_wr_r[3]
|
|
.sym 13913 io_ctrl_ins.o_data_out_SB_DFFESR_Q_6_R_SB_LUT4_O_I0_SB_LUT4_I2_O[2]
|
|
.sym 13914 tx_fifo.rd_addr_gray_wr[2]
|
|
.sym 13916 io_ctrl_ins.o_pmod[2]
|
|
.sym 13918 tx_fifo.full_o_SB_DFF_Q_D_SB_LUT4_O_I0_SB_LUT4_O_I0_SB_LUT4_O_3_I0[1]
|
|
.sym 13919 tx_fifo.rd_addr_gray_wr_r[1]
|
|
.sym 13920 tx_fifo.wr_addr_gray_SB_DFFE_Q_4_D_SB_LUT4_I2_O_SB_LUT4_O_I3[3]
|
|
.sym 13922 io_ctrl_ins.o_data_out_SB_DFFESR_Q_6_R_SB_LUT4_O_I1_SB_LUT4_I2_O[1]
|
|
.sym 13924 tx_fifo.rd_addr_gray_wr[8]
|
|
.sym 13926 tx_fifo.full_o_SB_DFF_Q_D_SB_LUT4_O_I0_SB_LUT4_O_I0_SB_LUT4_O_3_I0[1]
|
|
.sym 13927 tx_fifo.rd_addr_gray_wr_r[1]
|
|
.sym 13928 tx_fifo.wr_addr_gray_SB_DFFE_Q_8_D[1]
|
|
.sym 13929 tx_fifo.wr_addr_gray_SB_DFFE_Q_8_D[2]
|
|
.sym 13934 tx_fifo.rd_addr_gray_wr[2]
|
|
.sym 13938 tx_fifo.wr_addr_gray_SB_DFFE_Q_4_D_SB_LUT4_I2_O_SB_LUT4_O_I3[2]
|
|
.sym 13939 tx_fifo.full_o_SB_DFF_Q_D_SB_LUT4_O_I0_SB_LUT4_O_I0_SB_LUT4_O_2_I3[0]
|
|
.sym 13940 tx_fifo.wr_addr_gray_SB_DFFE_Q_4_D_SB_LUT4_I2_O_SB_LUT4_O_I3[3]
|
|
.sym 13941 tx_fifo.wr_addr_gray_SB_DFFE_Q_4_D_SB_LUT4_I2_O_SB_LUT4_O_I3[1]
|
|
.sym 13947 sys_ctrl_ins.o_data_out_SB_DFFER_Q_E
|
|
.sym 13950 tx_fifo.rd_addr_gray_wr[8]
|
|
.sym 13956 tx_fifo.wr_addr_gray_SB_DFFE_Q_6_D[0]
|
|
.sym 13957 tx_fifo.wr_addr_gray_SB_DFFE_Q_6_D[3]
|
|
.sym 13958 tx_fifo.rd_addr_gray_wr_r[3]
|
|
.sym 13959 tx_fifo.rd_addr_gray_wr_r[7]
|
|
.sym 13962 tx_fifo.rd_addr_gray_wr[4]
|
|
.sym 13968 io_ctrl_ins.o_pmod[2]
|
|
.sym 13969 io_ctrl_ins.o_data_out_SB_DFFESR_Q_6_R_SB_LUT4_O_I0_SB_LUT4_I2_O[2]
|
|
.sym 13970 io_ctrl_ins.pmod_dir_state[2]
|
|
.sym 13971 io_ctrl_ins.o_data_out_SB_DFFESR_Q_6_R_SB_LUT4_O_I1_SB_LUT4_I2_O[1]
|
|
.sym 13973 r_counter_$glb_clk
|
|
.sym 13975 io_ctrl_ins.o_pmod[1]
|
|
.sym 13976 io_ctrl_ins.o_data_out_SB_DFFESR_Q_6_R_SB_LUT4_O_I0_SB_LUT4_I2_O[3]
|
|
.sym 13977 io_ctrl_ins.o_pmod[3]
|
|
.sym 13978 io_ctrl_ins.o_pmod[0]
|
|
.sym 13980 io_ctrl_ins.o_data_out_SB_DFFESR_Q_6_R_SB_LUT4_O_I1_SB_LUT4_I2_O[1]
|
|
.sym 13981 smi_ctrl_ins.r_channel_SB_DFFE_Q_E_SB_LUT4_O_I3[1]
|
|
.sym 13982 io_ctrl_ins.o_pmod[2]
|
|
.sym 13983 smi_ctrl_ins.o_data_out_SB_DFFESS_Q_E
|
|
.sym 13989 tx_fifo.empty_o_SB_LUT4_I3_O_SB_LUT4_O_1_I0[3]
|
|
.sym 13991 tx_fifo.wr_addr[7]
|
|
.sym 13993 tx_fifo.wr_addr[6]
|
|
.sym 13995 tx_fifo.rd_addr[9]
|
|
.sym 13996 spi_if_ins.o_load_cmd_SB_LUT4_I3_O_SB_LUT4_I3_1_O
|
|
.sym 13997 io_ctrl_ins.rf_mode_SB_DFFER_Q_E
|
|
.sym 13998 $PACKER_VCC_NET
|
|
.sym 13999 spi_if_ins.o_load_cmd_SB_LUT4_I3_O[1]
|
|
.sym 14000 smi_ctrl_ins.o_channel
|
|
.sym 14003 o_shdn_tx_lna$SB_IO_OUT
|
|
.sym 14004 smi_ctrl_ins.r_channel_SB_DFFE_Q_E_SB_LUT4_O_I3[1]
|
|
.sym 14005 w_rx_data[3]
|
|
.sym 14007 w_rx_data[2]
|
|
.sym 14010 io_ctrl_ins.rf_mode[0]
|
|
.sym 14017 tx_fifo.full_o_SB_DFF_Q_D_SB_LUT4_O_I0_SB_LUT4_O_I0_SB_LUT4_O_3_I0[1]
|
|
.sym 14020 spi_if_ins.state_if[0]
|
|
.sym 14021 spi_if_ins.w_rx_data[3]
|
|
.sym 14022 tx_fifo.full_o_SB_DFF_Q_D_SB_LUT4_O_I0_SB_LUT4_O_1_I0[5]
|
|
.sym 14023 spi_if_ins.w_rx_data[2]
|
|
.sym 14024 tx_fifo.full_o_SB_DFF_Q_D_SB_LUT4_O_I0_SB_LUT4_O_1_I0[6]
|
|
.sym 14025 tx_fifo.rd_addr_gray_wr_r[5]
|
|
.sym 14027 spi_if_ins.w_rx_data[0]
|
|
.sym 14029 spi_if_ins.state_if[2]
|
|
.sym 14030 tx_fifo.wr_addr_gray_SB_DFFE_Q_4_D[0]
|
|
.sym 14034 tx_fifo.full_o_SB_DFF_Q_D_SB_LUT4_O_I0_SB_LUT4_O_I0_SB_LUT4_O_3_I0[0]
|
|
.sym 14039 spi_if_ins.state_if[1]
|
|
.sym 14040 spi_if_ins.o_fetch_cmd_SB_DFFESR_Q_E_SB_LUT4_O_I1[2]
|
|
.sym 14041 tx_fifo.full_o_SB_DFF_Q_D_SB_LUT4_O_I0_SB_LUT4_O_I0_SB_LUT4_O_1_I3[3]
|
|
.sym 14042 tx_fifo.full_o_SB_DFF_Q_D_SB_LUT4_O_I0_SB_LUT4_O_1_I0[1]
|
|
.sym 14043 spi_if_ins.o_data_in_SB_DFFE_Q_E
|
|
.sym 14044 tx_fifo.full_o_SB_DFF_Q_D_SB_LUT4_O_I0_SB_LUT4_O_I0_SB_LUT4_O_1_I3[0]
|
|
.sym 14045 tx_fifo.full_o_SB_DFF_Q_D_SB_LUT4_O_I0_SB_LUT4_O_1_I0[2]
|
|
.sym 14052 spi_if_ins.w_rx_data[2]
|
|
.sym 14057 tx_fifo.wr_addr_gray_SB_DFFE_Q_4_D[0]
|
|
.sym 14058 tx_fifo.rd_addr_gray_wr_r[5]
|
|
.sym 14061 spi_if_ins.state_if[0]
|
|
.sym 14062 spi_if_ins.o_fetch_cmd_SB_DFFESR_Q_E_SB_LUT4_O_I1[2]
|
|
.sym 14063 spi_if_ins.state_if[2]
|
|
.sym 14064 spi_if_ins.state_if[1]
|
|
.sym 14070 spi_if_ins.w_rx_data[0]
|
|
.sym 14073 tx_fifo.full_o_SB_DFF_Q_D_SB_LUT4_O_I0_SB_LUT4_O_I0_SB_LUT4_O_1_I3[3]
|
|
.sym 14074 tx_fifo.full_o_SB_DFF_Q_D_SB_LUT4_O_I0_SB_LUT4_O_1_I0[6]
|
|
.sym 14075 tx_fifo.full_o_SB_DFF_Q_D_SB_LUT4_O_I0_SB_LUT4_O_1_I0[5]
|
|
.sym 14076 tx_fifo.full_o_SB_DFF_Q_D_SB_LUT4_O_I0_SB_LUT4_O_I0_SB_LUT4_O_1_I3[0]
|
|
.sym 14085 tx_fifo.full_o_SB_DFF_Q_D_SB_LUT4_O_I0_SB_LUT4_O_1_I0[2]
|
|
.sym 14086 tx_fifo.full_o_SB_DFF_Q_D_SB_LUT4_O_I0_SB_LUT4_O_I0_SB_LUT4_O_3_I0[1]
|
|
.sym 14087 tx_fifo.full_o_SB_DFF_Q_D_SB_LUT4_O_I0_SB_LUT4_O_I0_SB_LUT4_O_3_I0[0]
|
|
.sym 14088 tx_fifo.full_o_SB_DFF_Q_D_SB_LUT4_O_I0_SB_LUT4_O_1_I0[1]
|
|
.sym 14091 spi_if_ins.w_rx_data[3]
|
|
.sym 14095 spi_if_ins.o_data_in_SB_DFFE_Q_E
|
|
.sym 14096 r_counter_$glb_clk
|
|
.sym 14098 io_ctrl_ins.led1_state_SB_LUT4_I0_I2[2]
|
|
.sym 14099 io_ctrl_ins.pmod_dir_state[4]
|
|
.sym 14100 io_ctrl_ins.mixer_en_state_SB_LUT4_I0_O[2]
|
|
.sym 14101 io_ctrl_ins.o_data_out_SB_DFFESR_Q_6_D_SB_LUT4_O_I2[1]
|
|
.sym 14102 io_ctrl_ins.led1_state_SB_DFFER_Q_E
|
|
.sym 14103 io_ctrl_ins.pmod_dir_state[2]
|
|
.sym 14104 spi_if_ins.o_load_cmd_SB_LUT4_I3_O[1]
|
|
.sym 14105 io_ctrl_ins.tr_vc_2_state_SB_LUT4_I0_O[2]
|
|
.sym 14110 w_rx_data[1]
|
|
.sym 14111 tx_fifo.empty_o_SB_LUT4_I3_O_SB_LUT4_O_I0[1]
|
|
.sym 14116 tx_fifo.rd_addr[9]
|
|
.sym 14119 io_ctrl_ins.o_data_out_SB_DFFESR_Q_6_R_SB_LUT4_O_I0_SB_LUT4_I2_O[3]
|
|
.sym 14120 tx_fifo.empty_o_SB_DFF_Q_D_SB_LUT4_O_I1_SB_LUT4_O_1_I3_SB_LUT4_O_I3[2]
|
|
.sym 14121 tx_fifo.empty_o_SB_LUT4_I3_O_SB_LUT4_O_I0[3]
|
|
.sym 14123 i_rst_b$SB_IO_IN
|
|
.sym 14125 w_rx_data[0]
|
|
.sym 14131 i_rst_b$SB_IO_IN
|
|
.sym 14142 w_rx_data[0]
|
|
.sym 14147 w_rx_data[2]
|
|
.sym 14150 w_rx_data[4]
|
|
.sym 14152 w_rx_data[1]
|
|
.sym 14154 w_rx_data[3]
|
|
.sym 14157 io_ctrl_ins.rf_mode_SB_DFFER_Q_E
|
|
.sym 14159 io_ctrl_ins.led1_state_SB_DFFER_Q_E
|
|
.sym 14181 w_rx_data[4]
|
|
.sym 14186 io_ctrl_ins.led1_state_SB_DFFER_Q_E
|
|
.sym 14190 w_rx_data[2]
|
|
.sym 14205 w_rx_data[1]
|
|
.sym 14210 w_rx_data[3]
|
|
.sym 14214 w_rx_data[0]
|
|
.sym 14218 io_ctrl_ins.rf_mode_SB_DFFER_Q_E
|
|
.sym 14219 r_counter_$glb_clk
|
|
.sym 14220 i_rst_b_SB_LUT4_I3_O_$glb_sr
|
|
.sym 14221 spi_if_ins.o_load_cmd_SB_LUT4_I3_O_SB_LUT4_I3_O
|
|
.sym 14222 smi_ctrl_ins.r_channel_SB_DFFE_Q_E
|
|
.sym 14223 io_ctrl_ins.rf_pin_state[2]
|
|
.sym 14224 io_ctrl_ins.rf_pin_state[1]
|
|
.sym 14225 io_ctrl_ins.rx_h_state_SB_DFFE_Q_D_SB_LUT4_O_I2[2]
|
|
.sym 14226 io_ctrl_ins.rf_pin_state[3]
|
|
.sym 14227 io_ctrl_ins.rf_pin_state[0]
|
|
.sym 14233 tx_fifo.empty_o_SB_DFF_Q_D_SB_LUT4_O_I1_SB_LUT4_O_1_I3[1]
|
|
.sym 14237 io_ctrl_ins.rf_mode[2]
|
|
.sym 14239 tx_fifo.full_o_SB_DFF_Q_D_SB_LUT4_O_I0_SB_LUT4_O_1_I2_SB_LUT4_O_I3[0]
|
|
.sym 14240 w_rx_data[1]
|
|
.sym 14241 tx_fifo.wr_addr[7]
|
|
.sym 14242 w_rx_data[4]
|
|
.sym 14243 tx_fifo.wr_addr[3]
|
|
.sym 14244 tx_fifo.rd_addr[9]
|
|
.sym 14249 i_rst_b$SB_IO_IN
|
|
.sym 14264 io_ctrl_ins.led1_state_SB_DFFER_Q_E
|
|
.sym 14267 io_ctrl_ins.debug_mode_SB_LUT4_I0_O[1]
|
|
.sym 14268 io_ctrl_ins.rf_mode[1]
|
|
.sym 14269 io_ctrl_ins.debug_mode[0]
|
|
.sym 14270 w_rx_data[1]
|
|
.sym 14271 io_ctrl_ins.rf_mode[2]
|
|
.sym 14272 w_lvds_tx_d1_SB_DFF_Q_D_SB_LUT4_O_1_I0_SB_LUT4_O_I0[2]
|
|
.sym 14275 io_ctrl_ins.debug_mode[1]
|
|
.sym 14277 w_lvds_tx_d1_SB_DFF_Q_D_SB_LUT4_O_1_I0[3]
|
|
.sym 14283 w_lvds_tx_d1_SB_DFF_Q_D_SB_LUT4_O_1_I0_SB_LUT4_O_I0[1]
|
|
.sym 14285 w_rx_data[0]
|
|
.sym 14286 i_rst_b$SB_IO_IN
|
|
.sym 14309 io_ctrl_ins.debug_mode[1]
|
|
.sym 14310 io_ctrl_ins.debug_mode_SB_LUT4_I0_O[1]
|
|
.sym 14313 w_rx_data[0]
|
|
.sym 14320 w_rx_data[1]
|
|
.sym 14325 i_rst_b$SB_IO_IN
|
|
.sym 14326 io_ctrl_ins.rf_mode[2]
|
|
.sym 14327 io_ctrl_ins.debug_mode[0]
|
|
.sym 14328 io_ctrl_ins.rf_mode[1]
|
|
.sym 14331 w_lvds_tx_d1_SB_DFF_Q_D_SB_LUT4_O_1_I0[3]
|
|
.sym 14332 w_lvds_tx_d1_SB_DFF_Q_D_SB_LUT4_O_1_I0_SB_LUT4_O_I0[2]
|
|
.sym 14334 w_lvds_tx_d1_SB_DFF_Q_D_SB_LUT4_O_1_I0_SB_LUT4_O_I0[1]
|
|
.sym 14341 io_ctrl_ins.led1_state_SB_DFFER_Q_E
|
|
.sym 14342 r_counter_$glb_clk
|
|
.sym 14343 i_rst_b_SB_LUT4_I3_O_$glb_sr
|
|
.sym 14344 i_rst_b$SB_IO_IN
|
|
.sym 14353 io_ctrl_ins.rf_pin_state[0]
|
|
.sym 14358 io_ctrl_ins.rx_h_state_SB_DFFE_Q_E
|
|
.sym 14359 spi_if_ins.o_load_cmd_SB_LUT4_I3_O_SB_LUT4_I3_O
|
|
.sym 14362 w_rx_data[1]
|
|
.sym 14363 io_ctrl_ins.rf_pin_state[2]
|
|
.sym 14365 i_rst_b$SB_IO_IN
|
|
.sym 14388 o_led0$SB_IO_OUT
|
|
.sym 14408 o_led0$SB_IO_OUT
|
|
.sym 14416 tx_fifo.empty_o_SB_DFF_Q_D_SB_LUT4_O_I1_SB_LUT4_O_1_I3_SB_LUT4_O_I3[2]
|
|
.sym 14418 smi_ctrl_ins.tx_reg_state_SB_LUT4_I3_O
|
|
.sym 14419 w_smi_data_output[3]
|
|
.sym 14421 o_led0$SB_IO_OUT
|
|
.sym 14425 $PACKER_VCC_NET
|
|
.sym 14430 w_smi_data_output[3]
|
|
.sym 14438 o_led0$SB_IO_OUT
|
|
.sym 14441 $PACKER_VCC_NET
|
|
.sym 14442 smi_ctrl_ins.tx_reg_state_SB_LUT4_I3_O
|
|
.sym 14444 w_rx_24_fifo_data[30]
|
|
.sym 14445 w_rx_24_fifo_data[10]
|
|
.sym 14447 w_rx_24_fifo_data[31]
|
|
.sym 14450 w_rx_fifo_data[10]
|
|
.sym 14451 w_smi_data_output[4]
|
|
.sym 14460 i_rst_b$SB_IO_IN
|
|
.sym 14474 i_rst_b$SB_IO_IN
|
|
.sym 14476 i_smi_soe_se$SB_IO_IN
|
|
.sym 14478 w_smi_data_input[5]
|
|
.sym 14486 o_led1$SB_IO_OUT
|
|
.sym 14491 w_smi_data_output[0]
|
|
.sym 14492 w_rx_24_fifo_data[11]
|
|
.sym 14496 w_rx_24_fifo_data[8]
|
|
.sym 14500 w_rx_09_fifo_data[11]
|
|
.sym 14504 w_lvds_rx_09_d1_SB_LUT4_I0_O[0]
|
|
.sym 14505 o_led1$SB_IO_OUT
|
|
.sym 14507 w_rx_09_fifo_data[6]
|
|
.sym 14512 w_rx_09_fifo_data[8]
|
|
.sym 14513 w_rx_09_fifo_data[9]
|
|
.sym 14515 w_rx_09_fifo_data[4]
|
|
.sym 14519 o_led1$SB_IO_OUT
|
|
.sym 14520 w_rx_09_fifo_data[8]
|
|
.sym 14522 w_rx_24_fifo_data[8]
|
|
.sym 14525 o_led1$SB_IO_OUT
|
|
.sym 14526 w_rx_24_fifo_data[11]
|
|
.sym 14527 w_rx_09_fifo_data[11]
|
|
.sym 14532 w_rx_09_fifo_data[6]
|
|
.sym 14539 w_rx_09_fifo_data[11]
|
|
.sym 14546 w_smi_data_output[0]
|
|
.sym 14550 w_rx_09_fifo_data[4]
|
|
.sym 14555 w_rx_09_fifo_data[9]
|
|
.sym 14561 w_rx_09_fifo_data[8]
|
|
.sym 14565 w_lvds_rx_09_d1_SB_LUT4_I0_O[0]
|
|
.sym 14566 o_iq_tx_clk_p$SB_IO_OUT_$glb_clk
|
|
.sym 14568 i_smi_swe_srw$SB_IO_IN
|
|
.sym 14574 smi_ctrl_ins.o_smi_data_out_SB_DFFNE_Q_D_SB_LUT4_O_2_I3[3]
|
|
.sym 14576 smi_ctrl_ins.int_cnt_rx[4]
|
|
.sym 14578 smi_ctrl_ins.int_cnt_rx[3]
|
|
.sym 14580 i_rst_b$SB_IO_IN
|
|
.sym 14583 i_rst_b$SB_IO_IN
|
|
.sym 14585 w_rx_fifo_data[10]
|
|
.sym 14587 rx_fifo.full_o_SB_DFF_Q_D_SB_LUT4_O_I0_SB_LUT4_O_1_I0[2]
|
|
.sym 14591 w_smi_data_output[3]
|
|
.sym 14606 w_lvds_rx_24_d0_SB_LUT4_I1_O[0]
|
|
.sym 14611 smi_ctrl_ins.o_smi_data_out_SB_DFFNE_Q_D_SB_LUT4_O_1_I3[1]
|
|
.sym 14612 w_rx_09_fifo_data[13]
|
|
.sym 14615 smi_ctrl_ins.o_smi_data_out_SB_DFFNE_Q_D_SB_LUT4_O_5_I3[0]
|
|
.sym 14622 i_smi_swe_srw$SB_IO_IN
|
|
.sym 14628 rx_fifo.rd_addr_gray_SB_DFFE_Q_5_D_SB_LUT4_I0_O[1]
|
|
.sym 14632 i_glob_clock$SB_IO_IN
|
|
.sym 14638 rx_fifo.empty_o_SB_LUT4_I2_O[1]
|
|
.sym 14649 smi_ctrl_ins.o_smi_data_out_SB_DFFNE_Q_D_SB_LUT4_O_3_I3[0]
|
|
.sym 14650 smi_ctrl_ins.o_smi_data_out_SB_DFFNE_Q_D_SB_LUT4_O_3_I3[1]
|
|
.sym 14652 smi_ctrl_ins.o_smi_data_out_SB_DFFNE_Q_D_SB_LUT4_O_6_I3[3]
|
|
.sym 14653 smi_ctrl_ins.o_smi_data_out_SB_DFFNE_Q_D_SB_LUT4_O_1_I3[0]
|
|
.sym 14654 smi_ctrl_ins.o_smi_data_out_SB_DFFNE_Q_D_SB_LUT4_O_7_I3[3]
|
|
.sym 14655 smi_ctrl_ins.o_smi_data_out_SB_DFFNE_Q_D_SB_LUT4_O_2_I3[1]
|
|
.sym 14658 smi_ctrl_ins.o_smi_data_out_SB_DFFNE_Q_D_SB_LUT4_O_7_I3[0]
|
|
.sym 14659 smi_ctrl_ins.o_smi_data_out_SB_DFFNE_Q_D_SB_LUT4_O_6_I3[1]
|
|
.sym 14660 i_rst_b$SB_IO_IN
|
|
.sym 14661 smi_ctrl_ins.o_smi_data_out_SB_DFFNE_Q_D_SB_LUT4_O_5_I3[3]
|
|
.sym 14662 smi_ctrl_ins.o_smi_data_out_SB_DFFNE_Q_D_SB_LUT4_O_6_I3[0]
|
|
.sym 14663 smi_ctrl_ins.o_smi_data_out_SB_DFFNE_Q_D_SB_LUT4_O_I3[0]
|
|
.sym 14666 smi_ctrl_ins.o_smi_data_out_SB_DFFNE_Q_D_SB_LUT4_O_2_I3[0]
|
|
.sym 14667 smi_ctrl_ins.o_smi_data_out_SB_DFFNE_Q_D_SB_LUT4_O_I3[3]
|
|
.sym 14668 smi_ctrl_ins.o_smi_data_out_SB_DFFNE_Q_D_SB_LUT4_O_1_I3[1]
|
|
.sym 14670 smi_ctrl_ins.o_smi_data_out_SB_DFFNE_Q_D_SB_LUT4_O_7_I3[1]
|
|
.sym 14671 smi_ctrl_ins.int_cnt_rx[3]
|
|
.sym 14672 smi_ctrl_ins.o_smi_data_out_SB_DFFNE_Q_D_SB_LUT4_O_5_I3[0]
|
|
.sym 14673 smi_ctrl_ins.o_smi_data_out_SB_DFFNE_Q_D_SB_LUT4_O_I3[1]
|
|
.sym 14675 smi_ctrl_ins.o_smi_data_out_SB_DFFNE_Q_D_SB_LUT4_O_2_I3[3]
|
|
.sym 14676 smi_ctrl_ins.o_smi_data_out_SB_DFFNE_Q_D_SB_LUT4_O_5_I3[1]
|
|
.sym 14677 smi_ctrl_ins.o_smi_data_out_SB_DFFNE_Q_D_SB_LUT4_O_3_I3[3]
|
|
.sym 14679 smi_ctrl_ins.o_smi_data_out_SB_DFFNE_Q_D_SB_LUT4_O_1_I3[3]
|
|
.sym 14682 smi_ctrl_ins.o_smi_data_out_SB_DFFNE_Q_D_SB_LUT4_O_3_I3[0]
|
|
.sym 14683 smi_ctrl_ins.o_smi_data_out_SB_DFFNE_Q_D_SB_LUT4_O_3_I3[1]
|
|
.sym 14684 smi_ctrl_ins.int_cnt_rx[3]
|
|
.sym 14685 smi_ctrl_ins.o_smi_data_out_SB_DFFNE_Q_D_SB_LUT4_O_3_I3[3]
|
|
.sym 14688 smi_ctrl_ins.o_smi_data_out_SB_DFFNE_Q_D_SB_LUT4_O_6_I3[3]
|
|
.sym 14689 smi_ctrl_ins.o_smi_data_out_SB_DFFNE_Q_D_SB_LUT4_O_6_I3[0]
|
|
.sym 14690 smi_ctrl_ins.o_smi_data_out_SB_DFFNE_Q_D_SB_LUT4_O_6_I3[1]
|
|
.sym 14691 smi_ctrl_ins.int_cnt_rx[3]
|
|
.sym 14700 smi_ctrl_ins.o_smi_data_out_SB_DFFNE_Q_D_SB_LUT4_O_I3[0]
|
|
.sym 14701 smi_ctrl_ins.o_smi_data_out_SB_DFFNE_Q_D_SB_LUT4_O_I3[3]
|
|
.sym 14702 smi_ctrl_ins.o_smi_data_out_SB_DFFNE_Q_D_SB_LUT4_O_I3[1]
|
|
.sym 14703 smi_ctrl_ins.int_cnt_rx[3]
|
|
.sym 14706 smi_ctrl_ins.o_smi_data_out_SB_DFFNE_Q_D_SB_LUT4_O_1_I3[0]
|
|
.sym 14707 smi_ctrl_ins.o_smi_data_out_SB_DFFNE_Q_D_SB_LUT4_O_1_I3[1]
|
|
.sym 14708 smi_ctrl_ins.int_cnt_rx[3]
|
|
.sym 14709 smi_ctrl_ins.o_smi_data_out_SB_DFFNE_Q_D_SB_LUT4_O_1_I3[3]
|
|
.sym 14712 smi_ctrl_ins.o_smi_data_out_SB_DFFNE_Q_D_SB_LUT4_O_7_I3[3]
|
|
.sym 14713 smi_ctrl_ins.o_smi_data_out_SB_DFFNE_Q_D_SB_LUT4_O_7_I3[0]
|
|
.sym 14714 smi_ctrl_ins.o_smi_data_out_SB_DFFNE_Q_D_SB_LUT4_O_7_I3[1]
|
|
.sym 14715 smi_ctrl_ins.int_cnt_rx[3]
|
|
.sym 14718 smi_ctrl_ins.o_smi_data_out_SB_DFFNE_Q_D_SB_LUT4_O_5_I3[1]
|
|
.sym 14719 smi_ctrl_ins.o_smi_data_out_SB_DFFNE_Q_D_SB_LUT4_O_5_I3[0]
|
|
.sym 14720 smi_ctrl_ins.int_cnt_rx[3]
|
|
.sym 14721 smi_ctrl_ins.o_smi_data_out_SB_DFFNE_Q_D_SB_LUT4_O_5_I3[3]
|
|
.sym 14724 smi_ctrl_ins.o_smi_data_out_SB_DFFNE_Q_D_SB_LUT4_O_2_I3[0]
|
|
.sym 14725 smi_ctrl_ins.o_smi_data_out_SB_DFFNE_Q_D_SB_LUT4_O_2_I3[1]
|
|
.sym 14726 smi_ctrl_ins.o_smi_data_out_SB_DFFNE_Q_D_SB_LUT4_O_2_I3[3]
|
|
.sym 14727 smi_ctrl_ins.int_cnt_rx[3]
|
|
.sym 14728 i_rst_b$SB_IO_IN
|
|
.sym 14729 smi_ctrl_ins.soe_and_reset_$glb_clk
|
|
.sym 14731 smi_ctrl_ins.r_fifo_pulled_data_SB_DFFNESR_Q_E
|
|
.sym 14732 r_counter
|
|
.sym 14733 smi_ctrl_ins.o_smi_data_out_SB_DFFNE_Q_D_SB_LUT4_O_I3[3]
|
|
.sym 14734 smi_ctrl_ins.o_smi_data_out_SB_DFFNE_Q_D_SB_LUT4_O_5_I3[1]
|
|
.sym 14735 smi_ctrl_ins.o_smi_data_out_SB_DFFNE_Q_D_SB_LUT4_O_3_I3[3]
|
|
.sym 14736 smi_ctrl_ins.o_smi_data_out_SB_DFFNE_Q_D_SB_LUT4_O_7_I3[1]
|
|
.sym 14737 smi_ctrl_ins.o_smi_data_out_SB_DFFNE_Q_D_SB_LUT4_O_1_I3[3]
|
|
.sym 14744 smi_ctrl_ins.o_smi_data_out_SB_DFFNE_Q_D_SB_LUT4_O_7_I3[0]
|
|
.sym 14745 w_rx_fifo_pull
|
|
.sym 14747 rx_fifo.empty_o_SB_DFF_Q_D_SB_LUT4_O_I0_SB_LUT4_O_1_I1_SB_LUT4_O_1_I0[1]
|
|
.sym 14750 rx_fifo.empty_o_SB_DFF_Q_D_SB_LUT4_O_I0_SB_LUT4_O_1_I1_SB_LUT4_O_2_I0[3]
|
|
.sym 14751 w_lvds_rx_24_d0_SB_LUT4_I1_O[0]
|
|
.sym 14752 o_led1$SB_IO_OUT
|
|
.sym 14754 smi_ctrl_ins.o_smi_data_out_SB_DFFNE_Q_D_SB_LUT4_O_3_I3[1]
|
|
.sym 14757 i_rst_b$SB_IO_IN
|
|
.sym 14764 w_rx_24_fifo_data[10]
|
|
.sym 14766 r_counter
|
|
.sym 14773 w_smi_data_input[7]
|
|
.sym 14774 smi_ctrl_ins.r_fifo_pulled_data_SB_DFFNESR_Q_E
|
|
.sym 14785 w_rx_fifo_pulled_data[1]
|
|
.sym 14789 rx_fifo.rd_addr[0]
|
|
.sym 14790 w_rx_fifo_pulled_data[6]
|
|
.sym 14792 smi_ctrl_ins.tx_reg_state[3]
|
|
.sym 14796 w_rx_fifo_pulled_data[4]
|
|
.sym 14797 w_rx_fifo_pulled_data[7]
|
|
.sym 14803 rx_fifo.wr_addr_gray_rd_r[0]
|
|
.sym 14808 w_rx_fifo_pulled_data[4]
|
|
.sym 14823 rx_fifo.rd_addr[0]
|
|
.sym 14824 rx_fifo.wr_addr_gray_rd_r[0]
|
|
.sym 14831 w_rx_fifo_pulled_data[6]
|
|
.sym 14838 w_rx_fifo_pulled_data[1]
|
|
.sym 14841 w_rx_fifo_pulled_data[7]
|
|
.sym 14848 smi_ctrl_ins.tx_reg_state[3]
|
|
.sym 14849 w_smi_data_input[7]
|
|
.sym 14851 smi_ctrl_ins.r_fifo_pulled_data_SB_DFFNESR_Q_E
|
|
.sym 14852 smi_ctrl_ins.soe_and_reset_$glb_clk
|
|
.sym 14853 i_rst_b_SB_LUT4_I3_O_$glb_sr
|
|
.sym 14855 smi_ctrl_ins.r_fifo_pushed_data_SB_DFFNESR_Q_21_E
|
|
.sym 14856 smi_ctrl_ins.tx_reg_state[2]
|
|
.sym 14857 smi_ctrl_ins.tx_reg_state[0]
|
|
.sym 14858 smi_ctrl_ins.tx_reg_state[3]
|
|
.sym 14860 smi_ctrl_ins.tx_reg_state_SB_DFFN_Q_3_D_SB_LUT4_O_I0[0]
|
|
.sym 14861 smi_ctrl_ins.tx_reg_state[1]
|
|
.sym 14866 rx_fifo.wr_addr[4]
|
|
.sym 14867 w_rx_fifo_pulled_data[2]
|
|
.sym 14868 rx_fifo.empty_o_SB_LUT4_I2_O[0]
|
|
.sym 14869 i_rst_b$SB_IO_IN
|
|
.sym 14870 rx_fifo.wr_addr[6]
|
|
.sym 14873 smi_ctrl_ins.r_fifo_pulled_data_SB_DFFNESR_Q_E
|
|
.sym 14874 o_led1$SB_IO_OUT
|
|
.sym 14875 rx_fifo.wr_addr[3]
|
|
.sym 14877 rx_fifo.wr_addr[4]
|
|
.sym 14878 w_rx_09_fifo_data[13]
|
|
.sym 14880 smi_ctrl_ins.o_smi_data_out_SB_DFFNE_Q_D_SB_LUT4_O_1_I3[1]
|
|
.sym 14882 rx_fifo.rd_addr_gray_SB_DFFE_Q_5_D[2]
|
|
.sym 14884 w_lvds_rx_24_d0_SB_LUT4_I1_O[0]
|
|
.sym 14885 smi_ctrl_ins.tx_reg_state[1]
|
|
.sym 14886 i_ss$SB_IO_IN
|
|
.sym 14900 rx_fifo.empty_o_SB_DFF_Q_D_SB_LUT4_O_I0_SB_LUT4_O_1_I1_SB_LUT4_O_1_I0[3]
|
|
.sym 14902 rx_fifo.empty_o_SB_LUT4_I2_O[0]
|
|
.sym 14906 rx_fifo.empty_o_SB_DFF_Q_D_SB_LUT4_O_I0_SB_LUT4_O_1_I1_SB_LUT4_O_I3[2]
|
|
.sym 14911 rx_fifo.rd_addr[7]
|
|
.sym 14912 rx_fifo.empty_o_SB_DFF_Q_D_SB_LUT4_O_I0_SB_LUT4_O_1_I1_SB_LUT4_O_I3[1]
|
|
.sym 14915 rx_fifo.rd_addr[0]
|
|
.sym 14917 rx_fifo.empty_o_SB_DFF_Q_D_SB_LUT4_O_I0_SB_LUT4_O_1_I1_SB_LUT4_O_2_I0[3]
|
|
.sym 14923 rx_fifo.rd_addr[0]
|
|
.sym 14926 rx_fifo.empty_o_SB_DFF_Q_D_SB_LUT4_O_I0_SB_LUT4_O_1_I1_SB_LUT4_O_1_I0[1]
|
|
.sym 14927 $nextpnr_ICESTORM_LC_2$O
|
|
.sym 14929 rx_fifo.rd_addr[0]
|
|
.sym 14933 rx_fifo.rd_addr_gray_SB_LUT4_I2_I3[2]
|
|
.sym 14936 rx_fifo.empty_o_SB_LUT4_I2_O[0]
|
|
.sym 14937 rx_fifo.rd_addr[0]
|
|
.sym 14939 rx_fifo.rd_addr_gray_SB_LUT4_I2_I3[3]
|
|
.sym 14942 rx_fifo.empty_o_SB_DFF_Q_D_SB_LUT4_O_I0_SB_LUT4_O_1_I1_SB_LUT4_O_1_I0[1]
|
|
.sym 14943 rx_fifo.rd_addr_gray_SB_LUT4_I2_I3[2]
|
|
.sym 14945 rx_fifo.rd_addr_gray_SB_LUT4_I2_I3[4]
|
|
.sym 14948 rx_fifo.empty_o_SB_DFF_Q_D_SB_LUT4_O_I0_SB_LUT4_O_1_I1_SB_LUT4_O_1_I0[3]
|
|
.sym 14949 rx_fifo.rd_addr_gray_SB_LUT4_I2_I3[3]
|
|
.sym 14951 rx_fifo.rd_addr_gray_SB_LUT4_I2_I3[5]
|
|
.sym 14954 rx_fifo.empty_o_SB_DFF_Q_D_SB_LUT4_O_I0_SB_LUT4_O_1_I1_SB_LUT4_O_2_I0[3]
|
|
.sym 14955 rx_fifo.rd_addr_gray_SB_LUT4_I2_I3[4]
|
|
.sym 14957 rx_fifo.rd_addr_gray_SB_LUT4_I2_I3[6]
|
|
.sym 14960 rx_fifo.empty_o_SB_DFF_Q_D_SB_LUT4_O_I0_SB_LUT4_O_1_I1_SB_LUT4_O_I3[1]
|
|
.sym 14961 rx_fifo.rd_addr_gray_SB_LUT4_I2_I3[5]
|
|
.sym 14963 rx_fifo.rd_addr_gray_SB_LUT4_I2_I3[7]
|
|
.sym 14966 rx_fifo.empty_o_SB_DFF_Q_D_SB_LUT4_O_I0_SB_LUT4_O_1_I1_SB_LUT4_O_I3[2]
|
|
.sym 14967 rx_fifo.rd_addr_gray_SB_LUT4_I2_I3[6]
|
|
.sym 14969 rx_fifo.rd_addr_gray_SB_LUT4_I2_I3[8]
|
|
.sym 14971 rx_fifo.rd_addr[7]
|
|
.sym 14973 rx_fifo.rd_addr_gray_SB_LUT4_I2_I3[7]
|
|
.sym 14977 rx_fifo.rd_addr_gray_SB_DFFE_Q_5_D[2]
|
|
.sym 14978 w_rx_24_fifo_data[12]
|
|
.sym 14979 w_rx_24_fifo_data[21]
|
|
.sym 14980 rx_fifo.rd_addr_gray_SB_DFFE_Q_6_D_SB_LUT4_I0_O_SB_LUT4_O_I3[3]
|
|
.sym 14981 w_rx_24_fifo_data[19]
|
|
.sym 14982 w_rx_24_fifo_data[23]
|
|
.sym 14983 smi_ctrl_ins.r_fifo_pushed_data_SB_DFFNESR_Q_E[0]
|
|
.sym 14984 w_rx_24_fifo_data[16]
|
|
.sym 14991 rx_fifo.rd_addr_gray_SB_LUT4_I2_O[5]
|
|
.sym 14994 rx_fifo.empty_o_SB_DFF_Q_D_SB_LUT4_O_I0_SB_LUT4_O_1_I1_SB_LUT4_O_1_I0[1]
|
|
.sym 14998 smi_ctrl_ins.r_fifo_pushed_data_SB_DFFNESR_Q_21_E
|
|
.sym 14999 rx_fifo.empty_o_SB_DFF_Q_D_SB_LUT4_O_I0_SB_LUT4_O_1_I1_SB_LUT4_O_2_I0[3]
|
|
.sym 15002 rx_fifo.rd_addr_gray_SB_DFFE_Q_6_D_SB_LUT4_I0_O_SB_LUT4_O_I3[2]
|
|
.sym 15004 rx_fifo.rd_addr_gray_SB_LUT4_I2_O[3]
|
|
.sym 15006 rx_fifo.wr_addr[4]
|
|
.sym 15011 i_smi_swe_srw$SB_IO_IN
|
|
.sym 15013 rx_fifo.rd_addr_gray_SB_LUT4_I2_I3[8]
|
|
.sym 15020 w_lvds_rx_24_d0_SB_LUT4_I1_O[0]
|
|
.sym 15021 rx_fifo.rd_addr_gray_SB_LUT4_I2_O[3]
|
|
.sym 15022 rx_fifo.rd_addr_gray_SB_LUT4_I2_O[4]
|
|
.sym 15023 w_rx_24_fifo_data[11]
|
|
.sym 15024 rx_fifo.rd_addr_gray_SB_DFFE_Q_7_D[1]
|
|
.sym 15025 rx_fifo.rd_addr_gray_SB_LUT4_I2_O[7]
|
|
.sym 15028 rx_fifo.rd_addr[8]
|
|
.sym 15032 rx_fifo.rd_addr_gray_SB_LUT4_I2_O[6]
|
|
.sym 15035 w_rx_24_fifo_data[15]
|
|
.sym 15039 rx_fifo.rd_addr[9]
|
|
.sym 15050 rx_fifo.rd_addr_gray_SB_LUT4_I2_I3[9]
|
|
.sym 15052 rx_fifo.rd_addr[8]
|
|
.sym 15054 rx_fifo.rd_addr_gray_SB_LUT4_I2_I3[8]
|
|
.sym 15057 rx_fifo.rd_addr[9]
|
|
.sym 15060 rx_fifo.rd_addr_gray_SB_LUT4_I2_I3[9]
|
|
.sym 15063 rx_fifo.rd_addr_gray_SB_LUT4_I2_O[4]
|
|
.sym 15064 rx_fifo.rd_addr_gray_SB_LUT4_I2_O[3]
|
|
.sym 15076 rx_fifo.rd_addr_gray_SB_LUT4_I2_O[7]
|
|
.sym 15078 rx_fifo.rd_addr_gray_SB_LUT4_I2_O[6]
|
|
.sym 15083 w_rx_24_fifo_data[15]
|
|
.sym 15088 rx_fifo.rd_addr_gray_SB_LUT4_I2_O[6]
|
|
.sym 15089 rx_fifo.rd_addr_gray_SB_DFFE_Q_7_D[1]
|
|
.sym 15090 rx_fifo.rd_addr_gray_SB_LUT4_I2_O[7]
|
|
.sym 15095 w_rx_24_fifo_data[11]
|
|
.sym 15097 w_lvds_rx_24_d0_SB_LUT4_I1_O[0]
|
|
.sym 15098 o_iq_tx_clk_p$SB_IO_OUT_$glb_clk
|
|
.sym 15100 rx_fifo.rd_addr_gray_SB_DFFE_Q_7_D[3]
|
|
.sym 15101 w_rx_24_fifo_data[15]
|
|
.sym 15102 w_rx_24_fifo_data[14]
|
|
.sym 15103 smi_ctrl_ins.swe_and_reset
|
|
.sym 15104 w_rx_fifo_data[13]
|
|
.sym 15105 rx_fifo.rd_addr_gray_SB_DFFE_Q_6_D[3]
|
|
.sym 15106 rx_fifo.rd_addr_gray_SB_DFFE_Q_6_D_SB_LUT4_I0_O[0]
|
|
.sym 15107 rx_fifo.rd_addr_gray_SB_DFFE_Q_6_D[0]
|
|
.sym 15111 i_rst_b$SB_IO_IN
|
|
.sym 15114 w_rx_24_fifo_data[17]
|
|
.sym 15115 rx_fifo.full_o_SB_DFF_Q_D_SB_LUT4_O_I0_SB_LUT4_O_1_I0[2]
|
|
.sym 15116 rx_fifo.rd_addr[8]
|
|
.sym 15117 w_rx_24_fifo_data[16]
|
|
.sym 15119 rx_fifo.full_o_SB_DFF_Q_D_SB_LUT4_O_I0_SB_LUT4_O_1_I0[2]
|
|
.sym 15121 w_rx_fifo_push
|
|
.sym 15124 rx_fifo.empty_o_SB_LUT4_I2_O[1]
|
|
.sym 15125 spi_if_ins.spi.r_tx_bit_count_SB_DFFESR_Q_R
|
|
.sym 15127 rx_fifo.empty_o_SB_DFF_Q_D_SB_LUT4_O_I0_SB_LUT4_O_1_I1_SB_LUT4_O_1_I0[3]
|
|
.sym 15130 spi_if_ins.r_tx_data_valid_SB_LUT4_I3_O
|
|
.sym 15131 rx_fifo.rd_addr_gray_SB_DFFE_Q_5_D_SB_LUT4_I0_O[1]
|
|
.sym 15135 rx_fifo.empty_o_SB_LUT4_I2_O[1]
|
|
.sym 15141 rx_fifo.rd_addr_gray_SB_DFFE_Q_5_D[3]
|
|
.sym 15144 rx_fifo.wr_addr_gray_rd[7]
|
|
.sym 15145 rx_fifo.empty_o_SB_DFF_Q_D_SB_LUT4_O_I0_SB_LUT4_O_1_I1_SB_LUT4_O_I3[3]
|
|
.sym 15146 rx_fifo.rd_addr_gray_SB_DFFE_Q_5_D[1]
|
|
.sym 15147 rx_fifo.full_o_SB_DFF_Q_D_SB_LUT4_O_I0_SB_LUT4_O_I0_SB_LUT4_O_I0[2]
|
|
.sym 15148 rx_fifo.empty_o_SB_DFF_Q_D_SB_LUT4_O_I0_SB_LUT4_O_1_I1_SB_LUT4_O_I3[2]
|
|
.sym 15149 rx_fifo.rd_addr_gray_SB_DFFE_Q_5_D[2]
|
|
.sym 15150 rx_fifo.empty_o_SB_DFF_Q_D_SB_LUT4_O_I0_SB_LUT4_O_1_I1_SB_LUT4_O_I3[0]
|
|
.sym 15152 rx_fifo.empty_o_SB_DFF_Q_D_SB_LUT4_O_I0[0]
|
|
.sym 15153 rx_fifo.full_o_SB_DFF_Q_D_SB_LUT4_O_I0_SB_LUT4_O_I0_SB_LUT4_O_I0[1]
|
|
.sym 15158 rx_fifo.empty_o_SB_DFF_Q_D_SB_LUT4_O_I0_SB_LUT4_O_1_I1_SB_LUT4_O_I3[1]
|
|
.sym 15159 rx_fifo.rd_addr_gray_SB_DFFE_Q_5_D[0]
|
|
.sym 15162 rx_fifo.wr_addr_gray_rd[5]
|
|
.sym 15163 rx_fifo.empty_o_SB_DFF_Q_D_SB_LUT4_O_I0_SB_LUT4_O_1_I1_SB_LUT4_O_2_I0[3]
|
|
.sym 15164 rx_fifo.empty_o_SB_DFF_Q_D_SB_LUT4_O_I0[2]
|
|
.sym 15165 rx_fifo.full_o_SB_DFF_Q_D_SB_LUT4_O_I0_SB_LUT4_O_2_I2[8]
|
|
.sym 15166 rx_fifo.empty_o_SB_DFF_Q_D_SB_LUT4_O_I0[1]
|
|
.sym 15167 rx_fifo.empty_o_SB_DFF_Q_D_SB_LUT4_O_I0[3]
|
|
.sym 15170 rx_fifo.full_o_SB_DFF_Q_D_SB_LUT4_O_I0_SB_LUT4_O_I0_SB_LUT4_O_I0[0]
|
|
.sym 15171 rx_fifo.wr_addr_gray[7]
|
|
.sym 15177 rx_fifo.wr_addr_gray_rd[7]
|
|
.sym 15182 rx_fifo.wr_addr_gray_rd[5]
|
|
.sym 15186 rx_fifo.rd_addr_gray_SB_DFFE_Q_5_D[0]
|
|
.sym 15187 rx_fifo.rd_addr_gray_SB_DFFE_Q_5_D[1]
|
|
.sym 15188 rx_fifo.rd_addr_gray_SB_DFFE_Q_5_D[3]
|
|
.sym 15189 rx_fifo.rd_addr_gray_SB_DFFE_Q_5_D[2]
|
|
.sym 15192 rx_fifo.wr_addr_gray[7]
|
|
.sym 15198 rx_fifo.empty_o_SB_DFF_Q_D_SB_LUT4_O_I0[1]
|
|
.sym 15199 rx_fifo.empty_o_SB_DFF_Q_D_SB_LUT4_O_I0[3]
|
|
.sym 15200 rx_fifo.empty_o_SB_DFF_Q_D_SB_LUT4_O_I0[0]
|
|
.sym 15201 rx_fifo.empty_o_SB_DFF_Q_D_SB_LUT4_O_I0[2]
|
|
.sym 15204 rx_fifo.empty_o_SB_DFF_Q_D_SB_LUT4_O_I0_SB_LUT4_O_1_I1_SB_LUT4_O_I3[2]
|
|
.sym 15205 rx_fifo.empty_o_SB_DFF_Q_D_SB_LUT4_O_I0_SB_LUT4_O_1_I1_SB_LUT4_O_I3[0]
|
|
.sym 15206 rx_fifo.empty_o_SB_DFF_Q_D_SB_LUT4_O_I0_SB_LUT4_O_1_I1_SB_LUT4_O_I3[1]
|
|
.sym 15207 rx_fifo.empty_o_SB_DFF_Q_D_SB_LUT4_O_I0_SB_LUT4_O_1_I1_SB_LUT4_O_I3[3]
|
|
.sym 15210 rx_fifo.empty_o_SB_DFF_Q_D_SB_LUT4_O_I0_SB_LUT4_O_1_I1_SB_LUT4_O_2_I0[3]
|
|
.sym 15211 rx_fifo.rd_addr_gray_SB_DFFE_Q_5_D[1]
|
|
.sym 15213 rx_fifo.empty_o_SB_DFF_Q_D_SB_LUT4_O_I0_SB_LUT4_O_1_I1_SB_LUT4_O_I3[1]
|
|
.sym 15216 rx_fifo.full_o_SB_DFF_Q_D_SB_LUT4_O_I0_SB_LUT4_O_I0_SB_LUT4_O_I0[1]
|
|
.sym 15217 rx_fifo.full_o_SB_DFF_Q_D_SB_LUT4_O_I0_SB_LUT4_O_I0_SB_LUT4_O_I0[0]
|
|
.sym 15218 rx_fifo.full_o_SB_DFF_Q_D_SB_LUT4_O_I0_SB_LUT4_O_2_I2[8]
|
|
.sym 15219 rx_fifo.full_o_SB_DFF_Q_D_SB_LUT4_O_I0_SB_LUT4_O_I0_SB_LUT4_O_I0[2]
|
|
.sym 15221 r_counter_$glb_clk
|
|
.sym 15224 smi_ctrl_ins.w_fifo_push_trigger
|
|
.sym 15225 rx_fifo.empty_o_SB_DFF_Q_D_SB_LUT4_O_I0[3]
|
|
.sym 15227 smi_ctrl_ins.w_fifo_push_trigger_SB_DFFNSR_Q_R
|
|
.sym 15229 rx_fifo.empty_o_SB_LUT4_I2_I0[0]
|
|
.sym 15230 rx_fifo.empty_o_SB_DFF_Q_D_SB_LUT4_O_I0[2]
|
|
.sym 15235 rx_fifo.rd_addr[8]
|
|
.sym 15237 w_rx_fifo_pull
|
|
.sym 15238 o_led1$SB_IO_OUT
|
|
.sym 15239 rx_fifo.empty_o_SB_DFF_Q_D_SB_LUT4_O_I0_SB_LUT4_O_1_I1_SB_LUT4_O_1_I0[1]
|
|
.sym 15240 w_rx_fifo_pull
|
|
.sym 15241 smi_ctrl_ins.o_smi_data_out_SB_DFFNE_Q_D_SB_LUT4_O_3_I3[1]
|
|
.sym 15243 rx_fifo.empty_o_SB_DFF_Q_D_SB_LUT4_O_I0_SB_LUT4_O_1_I1_SB_LUT4_O_2_I0[3]
|
|
.sym 15245 w_rx_fifo_empty
|
|
.sym 15246 i_rst_b$SB_IO_IN
|
|
.sym 15247 w_tx_fifo_full
|
|
.sym 15248 i_rst_b$SB_IO_IN
|
|
.sym 15250 w_tx_fifo_push
|
|
.sym 15251 rx_fifo.full_o_SB_DFF_Q_D_SB_LUT4_O_I0_SB_LUT4_O_2_I2[8]
|
|
.sym 15252 w_rx_fifo_empty
|
|
.sym 15254 rx_fifo.empty_o_SB_DFF_Q_D_SB_LUT4_O_I0_SB_LUT4_O_1_I1[1]
|
|
.sym 15255 w_cs[2]
|
|
.sym 15256 rx_fifo.empty_o_SB_DFF_Q_D_SB_LUT4_O_I0_SB_LUT4_O_1_I1_SB_LUT4_O_2_I0[0]
|
|
.sym 15257 spi_if_ins.o_fetch_cmd_SB_DFFESR_Q_E_SB_LUT4_O_I1[2]
|
|
.sym 15268 rx_fifo.rd_addr_gray_SB_DFFE_Q_6_D_SB_LUT4_I0_O_SB_LUT4_O_I3[0]
|
|
.sym 15270 rx_fifo.rd_addr_gray_SB_DFFE_Q_6_D[1]
|
|
.sym 15272 rx_fifo.rd_addr_gray_SB_DFFE_Q_5_D[3]
|
|
.sym 15273 rx_fifo.rd_addr[7]
|
|
.sym 15274 rx_fifo.empty_o_SB_LUT4_I2_O[0]
|
|
.sym 15275 rx_fifo.rd_addr_gray_SB_DFFE_Q_5_D_SB_LUT4_I0_O_SB_LUT4_O_I0[1]
|
|
.sym 15276 w_rx_fifo_empty
|
|
.sym 15278 w_smi_data_input[0]
|
|
.sym 15281 rx_fifo.empty_o_SB_LUT4_I2_I0[3]
|
|
.sym 15282 rx_fifo.empty_o_SB_LUT4_I2_I0[1]
|
|
.sym 15284 rx_fifo.empty_o_SB_LUT4_I2_O[1]
|
|
.sym 15285 rx_fifo.rd_addr[9]
|
|
.sym 15286 rx_fifo.empty_o_SB_LUT4_I2_I0[0]
|
|
.sym 15287 rx_fifo.rd_addr[8]
|
|
.sym 15288 rx_fifo.empty_o_SB_LUT4_I2_O[2]
|
|
.sym 15290 spi_if_ins.r_tx_data_valid_SB_LUT4_I3_O
|
|
.sym 15291 smi_ctrl_ins.r_fifo_pushed_data_SB_DFFNESR_Q_9_E
|
|
.sym 15297 rx_fifo.empty_o_SB_LUT4_I2_I0[0]
|
|
.sym 15298 rx_fifo.empty_o_SB_LUT4_I2_I0[3]
|
|
.sym 15299 rx_fifo.empty_o_SB_LUT4_I2_I0[1]
|
|
.sym 15300 w_rx_fifo_empty
|
|
.sym 15303 rx_fifo.rd_addr[9]
|
|
.sym 15304 rx_fifo.rd_addr_gray_SB_DFFE_Q_6_D[1]
|
|
.sym 15305 rx_fifo.rd_addr[8]
|
|
.sym 15306 rx_fifo.rd_addr_gray_SB_DFFE_Q_5_D_SB_LUT4_I0_O_SB_LUT4_O_I0[1]
|
|
.sym 15309 rx_fifo.rd_addr_gray_SB_DFFE_Q_6_D_SB_LUT4_I0_O_SB_LUT4_O_I3[0]
|
|
.sym 15310 rx_fifo.empty_o_SB_LUT4_I2_O[0]
|
|
.sym 15315 rx_fifo.empty_o_SB_LUT4_I2_O[2]
|
|
.sym 15317 rx_fifo.empty_o_SB_LUT4_I2_O[0]
|
|
.sym 15318 rx_fifo.empty_o_SB_LUT4_I2_O[1]
|
|
.sym 15321 rx_fifo.rd_addr[7]
|
|
.sym 15322 rx_fifo.rd_addr_gray_SB_DFFE_Q_5_D[3]
|
|
.sym 15324 rx_fifo.rd_addr[8]
|
|
.sym 15336 spi_if_ins.r_tx_data_valid_SB_LUT4_I3_O
|
|
.sym 15339 w_smi_data_input[0]
|
|
.sym 15343 smi_ctrl_ins.r_fifo_pushed_data_SB_DFFNESR_Q_9_E
|
|
.sym 15344 smi_ctrl_ins.swe_and_reset_$glb_clk
|
|
.sym 15345 i_rst_b_SB_LUT4_I3_O_$glb_sr
|
|
.sym 15346 w_cs[3]
|
|
.sym 15348 w_cs[2]
|
|
.sym 15349 w_cs[1]
|
|
.sym 15357 w_load
|
|
.sym 15358 rx_fifo.rd_addr_gray_SB_DFFE_Q_5_D[1]
|
|
.sym 15359 rx_fifo.empty_o_SB_DFF_Q_D_SB_LUT4_O_I0_SB_LUT4_O_1_I1_SB_LUT4_O_1_I0[1]
|
|
.sym 15361 rx_fifo.empty_o_SB_DFF_Q_D_SB_LUT4_O_I0_SB_LUT4_O_1_I1_SB_LUT4_O_2_I0[3]
|
|
.sym 15364 rx_fifo.empty_o_SB_LUT4_I2_O[0]
|
|
.sym 15365 rx_fifo.empty_o_SB_DFF_Q_D_SB_LUT4_O_I0_SB_LUT4_O_1_I1_SB_LUT4_O_I3[1]
|
|
.sym 15366 i_rst_b$SB_IO_IN
|
|
.sym 15368 rx_fifo.empty_o_SB_DFF_Q_D_SB_LUT4_O_I0_SB_LUT4_O_1_I1_SB_LUT4_O_I3[2]
|
|
.sym 15371 i_ss$SB_IO_IN
|
|
.sym 15376 w_tx_fifo_push
|
|
.sym 15377 smi_ctrl_ins.r_fifo_pushed_data_SB_DFFNESR_Q_9_E
|
|
.sym 15379 spi_if_ins.spi.r2_rx_done
|
|
.sym 15389 rx_fifo.empty_o_SB_DFF_Q_D_SB_LUT4_O_I0_SB_LUT4_O_1_I1_SB_LUT4_O_1_I0[0]
|
|
.sym 15392 smi_ctrl_ins.r_fifo_push
|
|
.sym 15396 smi_ctrl_ins.w_fifo_push_trigger
|
|
.sym 15397 rx_fifo.empty_o_SB_DFF_Q_D_SB_LUT4_O_I0_SB_LUT4_O_1_I1_SB_LUT4_O_1_I0[1]
|
|
.sym 15398 smi_ctrl_ins.r_fifo_push_1
|
|
.sym 15402 rx_fifo.empty_o_SB_DFF_Q_D_SB_LUT4_O_I0_SB_LUT4_O_1_I1_SB_LUT4_O_1_I0[3]
|
|
.sym 15407 w_tx_fifo_full
|
|
.sym 15410 rx_fifo.empty_o_SB_DFF_Q_D_SB_LUT4_O_I0_SB_LUT4_O_1_I1_SB_LUT4_O_1_I0[2]
|
|
.sym 15440 smi_ctrl_ins.r_fifo_push
|
|
.sym 15444 rx_fifo.empty_o_SB_DFF_Q_D_SB_LUT4_O_I0_SB_LUT4_O_1_I1_SB_LUT4_O_1_I0[3]
|
|
.sym 15445 rx_fifo.empty_o_SB_DFF_Q_D_SB_LUT4_O_I0_SB_LUT4_O_1_I1_SB_LUT4_O_1_I0[1]
|
|
.sym 15446 rx_fifo.empty_o_SB_DFF_Q_D_SB_LUT4_O_I0_SB_LUT4_O_1_I1_SB_LUT4_O_1_I0[0]
|
|
.sym 15447 rx_fifo.empty_o_SB_DFF_Q_D_SB_LUT4_O_I0_SB_LUT4_O_1_I1_SB_LUT4_O_1_I0[2]
|
|
.sym 15453 smi_ctrl_ins.w_fifo_push_trigger
|
|
.sym 15462 smi_ctrl_ins.r_fifo_push
|
|
.sym 15463 w_tx_fifo_full
|
|
.sym 15465 smi_ctrl_ins.r_fifo_push_1
|
|
.sym 15467 r_counter_$glb_clk
|
|
.sym 15468 i_rst_b_SB_LUT4_I3_O_$glb_sr
|
|
.sym 15471 spi_if_ins.spi.r_rx_bit_count[2]
|
|
.sym 15473 spi_if_ins.spi.r_rx_bit_count[0]
|
|
.sym 15475 rx_fifo.empty_o_SB_DFF_Q_D_SB_LUT4_O_I0_SB_LUT4_O_1_I1[0]
|
|
.sym 15476 spi_if_ins.spi.r_rx_bit_count[1]
|
|
.sym 15483 $PACKER_VCC_NET
|
|
.sym 15484 w_cs[1]
|
|
.sym 15485 rx_fifo.empty_o_SB_DFF_Q_D_SB_LUT4_O_I0_SB_LUT4_O_1_I1_SB_LUT4_O_2_I0[3]
|
|
.sym 15487 rx_fifo.empty_o_SB_DFF_Q_D_SB_LUT4_O_I0_SB_LUT4_O_1_I1_SB_LUT4_O_1_I0[1]
|
|
.sym 15488 w_cs[3]
|
|
.sym 15493 w_cs[2]
|
|
.sym 15495 w_cs[1]
|
|
.sym 15502 lvds_tx_inst.o_fifo_pull_SB_DFFSR_Q_R
|
|
.sym 15504 w_tx_fifo_push
|
|
.sym 15519 w_tx_fifo_pull
|
|
.sym 15522 spi_if_ins.spi.r3_rx_done
|
|
.sym 15525 spi_if_ins.spi.r3_rx_done_SB_LUT4_I2_O
|
|
.sym 15536 spi_if_ins.spi.o_rx_data_valid_SB_LUT4_I3_O_SB_LUT4_I3_O[2]
|
|
.sym 15539 spi_if_ins.spi.r2_rx_done
|
|
.sym 15557 w_tx_fifo_pull
|
|
.sym 15561 spi_if_ins.spi.o_rx_data_valid_SB_LUT4_I3_O_SB_LUT4_I3_O[2]
|
|
.sym 15569 spi_if_ins.spi.r2_rx_done
|
|
.sym 15574 spi_if_ins.spi.r3_rx_done_SB_LUT4_I2_O
|
|
.sym 15585 spi_if_ins.spi.r3_rx_done
|
|
.sym 15588 spi_if_ins.spi.r2_rx_done
|
|
.sym 15590 r_counter_$glb_clk
|
|
.sym 15592 spi_if_ins.spi.r_tx_byte[5]
|
|
.sym 15594 spi_if_ins.spi.r_tx_byte_SB_DFFESR_Q_E
|
|
.sym 15595 spi_if_ins.spi.r_tx_byte[1]
|
|
.sym 15596 spi_if_ins.spi.r_tx_byte[3]
|
|
.sym 15597 spi_if_ins.spi.r_tx_byte[4]
|
|
.sym 15598 spi_if_ins.r_tx_data_valid_SB_DFFESR_Q_E
|
|
.sym 15599 spi_if_ins.spi.r_tx_byte_SB_DFFESR_Q_E
|
|
.sym 15603 i_rst_b$SB_IO_IN
|
|
.sym 15606 spi_if_ins.o_fetch_cmd_SB_DFFESR_Q_E_SB_LUT4_O_I1[2]
|
|
.sym 15607 w_tx_fifo_pulled_data[26]
|
|
.sym 15608 spi_if_ins.r_tx_data_valid_SB_DFFESR_Q_D[1]
|
|
.sym 15613 w_rx_fifo_push
|
|
.sym 15616 spi_if_ins.r_tx_byte[1]
|
|
.sym 15618 spi_if_ins.o_fetch_cmd_SB_DFFESR_Q_E
|
|
.sym 15620 i_sck$SB_IO_IN
|
|
.sym 15624 spi_if_ins.r_tx_byte[4]
|
|
.sym 15625 spi_if_ins.o_load_cmd_SB_DFFESR_Q_R
|
|
.sym 15626 w_tx_fifo_pull
|
|
.sym 15627 spi_if_ins.spi.r3_rx_done_SB_LUT4_I2_O
|
|
.sym 15662 lvds_tx_inst.o_fifo_pull_SB_DFFSR_Q_R
|
|
.sym 15664 w_tx_fifo_empty
|
|
.sym 15673 w_tx_fifo_empty
|
|
.sym 15713 o_iq_tx_clk_p$SB_IO_OUT_$glb_clk
|
|
.sym 15714 lvds_tx_inst.o_fifo_pull_SB_DFFSR_Q_R
|
|
.sym 15715 spi_if_ins.spi.r_rx_byte[4]
|
|
.sym 15716 spi_if_ins.spi.o_spi_miso_SB_DFFE_Q_D_SB_LUT4_O_I2_SB_LUT4_O_I0[3]
|
|
.sym 15719 spi_if_ins.spi.o_spi_miso_SB_DFFE_Q_D_SB_LUT4_O_I2_SB_LUT4_O_I0_SB_LUT4_O_2_I0[0]
|
|
.sym 15728 spi_if_ins.r_tx_data_valid_SB_DFFESR_Q_E
|
|
.sym 15731 w_tx_fifo_pull
|
|
.sym 15732 spi_if_ins.spi.r3_rx_done_SB_LUT4_I2_O
|
|
.sym 15734 spi_if_ins.r_tx_byte[3]
|
|
.sym 15737 w_tx_fifo_data[27]
|
|
.sym 15739 i_rst_b$SB_IO_IN
|
|
.sym 15740 w_cs[2]
|
|
.sym 15741 w_tx_fifo_pulled_data[24]
|
|
.sym 15742 rx_fifo.empty_o_SB_DFF_Q_D_SB_LUT4_O_I0_SB_LUT4_O_1_I1_SB_LUT4_O_2_I0[1]
|
|
.sym 15743 w_tx_fifo_push
|
|
.sym 15744 i_rst_b$SB_IO_IN
|
|
.sym 15745 spi_if_ins.o_fetch_cmd_SB_DFFESR_Q_E_SB_LUT4_O_I1[2]
|
|
.sym 15747 w_load
|
|
.sym 15757 spi_if_ins.state_if_SB_DFFESR_Q_2_D[1]
|
|
.sym 15758 spi_if_ins.o_fetch_cmd_SB_DFFESR_Q_E_SB_LUT4_O_I1[2]
|
|
.sym 15760 spi_if_ins.o_load_cmd_SB_DFFESR_Q_R
|
|
.sym 15765 spi_if_ins.o_fetch_cmd_SB_DFFESR_Q_E_SB_LUT4_O_I1[0]
|
|
.sym 15774 spi_if_ins.o_load_cmd_SB_DFFESR_Q_E
|
|
.sym 15775 i_rst_b$SB_IO_IN
|
|
.sym 15786 spi_if_ins.state_if_SB_DFFESR_Q_2_D[0]
|
|
.sym 15792 spi_if_ins.state_if_SB_DFFESR_Q_2_D[0]
|
|
.sym 15801 spi_if_ins.o_fetch_cmd_SB_DFFESR_Q_E_SB_LUT4_O_I1[2]
|
|
.sym 15808 spi_if_ins.o_fetch_cmd_SB_DFFESR_Q_E_SB_LUT4_O_I1[0]
|
|
.sym 15810 spi_if_ins.o_fetch_cmd_SB_DFFESR_Q_E_SB_LUT4_O_I1[2]
|
|
.sym 15819 i_rst_b$SB_IO_IN
|
|
.sym 15820 spi_if_ins.o_fetch_cmd_SB_DFFESR_Q_E_SB_LUT4_O_I1[2]
|
|
.sym 15826 spi_if_ins.state_if_SB_DFFESR_Q_2_D[1]
|
|
.sym 15828 spi_if_ins.state_if_SB_DFFESR_Q_2_D[0]
|
|
.sym 15835 spi_if_ins.o_load_cmd_SB_DFFESR_Q_E
|
|
.sym 15836 r_counter_$glb_clk
|
|
.sym 15837 spi_if_ins.o_load_cmd_SB_DFFESR_Q_R
|
|
.sym 15839 spi_if_ins.spi.o_spi_miso_SB_DFFE_Q_D_SB_LUT4_O_I2_SB_LUT4_O_I0_SB_LUT4_O_2_I0[1]
|
|
.sym 15840 spi_if_ins.w_rx_data[4]
|
|
.sym 15841 sys_ctrl_ins.i_cs_SB_DFFE_Q_D[0]
|
|
.sym 15842 spi_if_ins.o_load_cmd_SB_DFFESR_Q_E
|
|
.sym 15850 w_load
|
|
.sym 15851 spi_if_ins.state_if_SB_DFFESR_Q_2_D[1]
|
|
.sym 15853 w_tx_fifo_data[25]
|
|
.sym 15856 spi_if_ins.o_load_cmd_SB_DFFESR_Q_R
|
|
.sym 15857 w_tx_fifo_push
|
|
.sym 15859 w_tx_fifo_pull
|
|
.sym 15860 i_rst_b$SB_IO_IN
|
|
.sym 15862 spi_if_ins.w_rx_data[7]
|
|
.sym 15863 w_tx_data_smi[2]
|
|
.sym 15864 w_tx_fifo_push
|
|
.sym 15865 spi_if_ins.state_if_SB_DFFESR_Q_D[1]
|
|
.sym 15867 w_tx_data_io[2]
|
|
.sym 15868 spi_if_ins.state_if[1]
|
|
.sym 15869 spi_if_ins.o_load_cmd_SB_LUT4_I3_O_SB_LUT4_I3_1_O
|
|
.sym 15871 spi_if_ins.state_if_SB_DFFESR_Q_D[2]
|
|
.sym 15873 tx_fifo.empty_o_SB_LUT4_I3_O_SB_LUT4_O_1_I0[2]
|
|
.sym 15880 tx_fifo.empty_o_SB_LUT4_I3_O_SB_LUT4_O_1_I0[2]
|
|
.sym 15884 spi_if_ins.spi.o_rx_data_valid_SB_LUT4_I3_O[1]
|
|
.sym 15885 spi_if_ins.state_if[2]
|
|
.sym 15886 spi_if_ins.state_if_SB_DFFESR_Q_2_D[0]
|
|
.sym 15887 tx_fifo.wr_addr_gray_SB_LUT4_I2_O[8]
|
|
.sym 15889 spi_if_ins.state_if[0]
|
|
.sym 15890 spi_if_ins.o_fetch_cmd_SB_DFFESR_Q_E
|
|
.sym 15892 w_cs[1]
|
|
.sym 15893 i_rst_b$SB_IO_IN
|
|
.sym 15895 tx_fifo.empty_o_SB_LUT4_I3_O_SB_LUT4_O_I0[3]
|
|
.sym 15896 tx_fifo.wr_addr_gray_SB_LUT4_I2_O[1]
|
|
.sym 15897 tx_fifo.wr_addr_gray_SB_LUT4_I2_O[2]
|
|
.sym 15899 spi_if_ins.o_load_cmd_SB_DFFESR_Q_R
|
|
.sym 15901 w_fetch
|
|
.sym 15904 spi_if_ins.state_if[1]
|
|
.sym 15906 tx_fifo.wr_addr_gray_SB_LUT4_I2_O[3]
|
|
.sym 15907 tx_fifo.wr_addr_gray_SB_DFFE_Q_4_D_SB_LUT4_I2_O_SB_LUT4_O_I3[1]
|
|
.sym 15908 tx_fifo.rd_addr_gray_SB_DFFE_Q_8_D[2]
|
|
.sym 15910 tx_fifo.wr_addr_gray_SB_LUT4_I2_O[7]
|
|
.sym 15912 spi_if_ins.state_if[1]
|
|
.sym 15913 spi_if_ins.spi.o_rx_data_valid_SB_LUT4_I3_O[1]
|
|
.sym 15914 spi_if_ins.state_if[2]
|
|
.sym 15915 spi_if_ins.state_if[0]
|
|
.sym 15920 tx_fifo.wr_addr_gray_SB_DFFE_Q_4_D_SB_LUT4_I2_O_SB_LUT4_O_I3[1]
|
|
.sym 15921 tx_fifo.wr_addr_gray_SB_LUT4_I2_O[3]
|
|
.sym 15924 tx_fifo.wr_addr_gray_SB_LUT4_I2_O[2]
|
|
.sym 15926 tx_fifo.wr_addr_gray_SB_LUT4_I2_O[3]
|
|
.sym 15932 tx_fifo.wr_addr_gray_SB_LUT4_I2_O[1]
|
|
.sym 15933 tx_fifo.wr_addr_gray_SB_LUT4_I2_O[2]
|
|
.sym 15936 tx_fifo.rd_addr_gray_SB_DFFE_Q_8_D[2]
|
|
.sym 15937 tx_fifo.empty_o_SB_LUT4_I3_O_SB_LUT4_O_1_I0[2]
|
|
.sym 15938 tx_fifo.empty_o_SB_LUT4_I3_O_SB_LUT4_O_I0[3]
|
|
.sym 15943 w_fetch
|
|
.sym 15944 i_rst_b$SB_IO_IN
|
|
.sym 15945 w_cs[1]
|
|
.sym 15949 spi_if_ins.state_if_SB_DFFESR_Q_2_D[0]
|
|
.sym 15950 spi_if_ins.state_if[2]
|
|
.sym 15956 tx_fifo.wr_addr_gray_SB_LUT4_I2_O[8]
|
|
.sym 15957 tx_fifo.wr_addr_gray_SB_LUT4_I2_O[7]
|
|
.sym 15958 spi_if_ins.o_fetch_cmd_SB_DFFESR_Q_E
|
|
.sym 15959 r_counter_$glb_clk
|
|
.sym 15960 spi_if_ins.o_load_cmd_SB_DFFESR_Q_R
|
|
.sym 15961 io_ctrl_ins.rf_mode_SB_DFFER_Q_E
|
|
.sym 15962 spi_if_ins.state_if[1]
|
|
.sym 15963 io_ctrl_ins.o_data_out_SB_DFFESR_Q_6_E
|
|
.sym 15964 spi_if_ins.state_if_SB_DFFESR_Q_E_SB_LUT4_O_I2[1]
|
|
.sym 15965 tx_fifo.wr_addr_gray_SB_DFFE_Q_4_D_SB_LUT4_I2_O[3]
|
|
.sym 15966 spi_if_ins.o_fetch_cmd_SB_DFFESR_Q_E
|
|
.sym 15967 smi_ctrl_ins.o_data_out_SB_DFFESS_Q_E
|
|
.sym 15968 spi_if_ins.spi.o_spi_miso_SB_DFFE_Q_D_SB_LUT4_O_I2_SB_LUT4_O_I0[1]
|
|
.sym 15975 tx_fifo.full_o_SB_DFF_Q_D_SB_LUT4_O_I0_SB_LUT4_O_1_I0_SB_LUT4_O_I3[1]
|
|
.sym 15976 w_tx_fifo_data[2]
|
|
.sym 15977 spi_if_ins.spi.r_tx_byte[0]
|
|
.sym 15980 tx_fifo.full_o_SB_DFF_Q_D_SB_LUT4_O_I0_SB_LUT4_O_1_I0_SB_LUT4_O_I3[1]
|
|
.sym 15981 tx_fifo.wr_addr[2]
|
|
.sym 15985 w_cs[2]
|
|
.sym 15987 w_cs[1]
|
|
.sym 15988 io_ctrl_ins.led1_state_SB_LUT4_I0_I2[1]
|
|
.sym 15990 spi_if_ins.o_load_cmd_SB_LUT4_I3_1_I0[2]
|
|
.sym 15992 io_ctrl_ins.o_data_out_SB_DFFESR_Q_6_R[2]
|
|
.sym 15993 spi_if_ins.spi.r_tx_byte[6]
|
|
.sym 15994 tx_fifo.rd_addr_gray_SB_DFFE_Q_8_D[2]
|
|
.sym 15995 spi_if_ins.o_load_cmd_SB_LUT4_I3_O_SB_LUT4_I3_1_O
|
|
.sym 15996 spi_if_ins.o_load_cmd_SB_LUT4_I3_O_SB_LUT4_I3_2_O
|
|
.sym 16004 io_ctrl_ins.o_data_out_SB_DFFESR_Q_6_R[0]
|
|
.sym 16005 i_rst_b$SB_IO_IN
|
|
.sym 16006 spi_if_ins.o_load_cmd_SB_LUT4_I3_1_I0[2]
|
|
.sym 16012 io_ctrl_ins.led1_state_SB_LUT4_I0_I2[1]
|
|
.sym 16013 smi_ctrl_ins.o_data_out_SB_DFFESS_Q_E
|
|
.sym 16014 tx_fifo.rd_addr_gray_wr_r[8]
|
|
.sym 16016 w_fetch
|
|
.sym 16019 spi_if_ins.state_if[1]
|
|
.sym 16020 spi_if_ins.state_if[0]
|
|
.sym 16022 spi_if_ins.o_load_cmd_SB_LUT4_I3_O[1]
|
|
.sym 16023 smi_ctrl_ins.o_channel
|
|
.sym 16024 io_ctrl_ins.o_data_out_SB_DFFESR_Q_6_R_SB_LUT4_O_I0_SB_LUT4_I2_O[2]
|
|
.sym 16025 spi_if_ins.state_if_SB_DFFESR_Q_D[1]
|
|
.sym 16026 tx_fifo.wr_addr_gray_SB_LUT4_I2_O[8]
|
|
.sym 16027 tx_fifo.wr_addr_gray_SB_LUT4_I2_O[9]
|
|
.sym 16029 w_cs[0]
|
|
.sym 16031 spi_if_ins.state_if_SB_DFFESR_Q_D[2]
|
|
.sym 16033 spi_if_ins.r_tx_data_valid_SB_DFFESR_Q_D[1]
|
|
.sym 16042 io_ctrl_ins.o_data_out_SB_DFFESR_Q_6_R_SB_LUT4_O_I0_SB_LUT4_I2_O[2]
|
|
.sym 16044 spi_if_ins.o_load_cmd_SB_LUT4_I3_O[1]
|
|
.sym 16047 w_cs[0]
|
|
.sym 16048 io_ctrl_ins.led1_state_SB_LUT4_I0_I2[1]
|
|
.sym 16049 io_ctrl_ins.o_data_out_SB_DFFESR_Q_6_R[0]
|
|
.sym 16050 w_fetch
|
|
.sym 16053 tx_fifo.wr_addr_gray_SB_LUT4_I2_O[8]
|
|
.sym 16054 tx_fifo.wr_addr_gray_SB_LUT4_I2_O[9]
|
|
.sym 16055 tx_fifo.rd_addr_gray_wr_r[8]
|
|
.sym 16059 spi_if_ins.state_if_SB_DFFESR_Q_D[2]
|
|
.sym 16060 spi_if_ins.state_if_SB_DFFESR_Q_D[1]
|
|
.sym 16061 spi_if_ins.r_tx_data_valid_SB_DFFESR_Q_D[1]
|
|
.sym 16062 i_rst_b$SB_IO_IN
|
|
.sym 16072 smi_ctrl_ins.o_channel
|
|
.sym 16077 spi_if_ins.state_if[1]
|
|
.sym 16080 spi_if_ins.state_if[0]
|
|
.sym 16081 smi_ctrl_ins.o_data_out_SB_DFFESS_Q_E
|
|
.sym 16082 r_counter_$glb_clk
|
|
.sym 16083 spi_if_ins.o_load_cmd_SB_LUT4_I3_1_I0[2]
|
|
.sym 16084 w_rx_data[5]
|
|
.sym 16085 io_ctrl_ins.o_data_out_SB_DFFESR_Q_5_E
|
|
.sym 16086 w_tx_data_io[2]
|
|
.sym 16087 spi_if_ins.o_fetch_cmd_SB_DFFESR_Q_E_SB_LUT4_O_I1[1]
|
|
.sym 16088 io_ctrl_ins.o_data_out_SB_DFFESR_Q_6_R[1]
|
|
.sym 16089 io_ctrl_ins.o_data_out_SB_DFFESR_Q_6_R_SB_LUT4_O_I1[1]
|
|
.sym 16090 io_ctrl_ins.o_data_out_SB_DFFESR_Q_6_R_SB_LUT4_O_I0_SB_LUT4_I2_O[2]
|
|
.sym 16091 io_ctrl_ins.o_data_out_SB_DFFESR_Q_6_R_SB_LUT4_O_I0[2]
|
|
.sym 16092 spi_if_ins.state_if_SB_DFFESR_Q_E
|
|
.sym 16095 i_rst_b$SB_IO_IN
|
|
.sym 16097 smi_ctrl_ins.o_data_out_SB_DFFESS_Q_E
|
|
.sym 16099 spi_if_ins.o_data_in_SB_DFFE_Q_E
|
|
.sym 16100 spi_if_ins.r_tx_data_valid_SB_DFFESR_Q_D[1]
|
|
.sym 16102 spi_if_ins.spi.r_tx_byte[2]
|
|
.sym 16103 i_rst_b$SB_IO_IN
|
|
.sym 16105 spi_if_ins.state_if[1]
|
|
.sym 16111 tx_fifo.full_o_SB_DFF_Q_D_SB_LUT4_O_I0_SB_LUT4_O_I0_SB_LUT4_O_1_I3[0]
|
|
.sym 16113 spi_if_ins.state_if_SB_DFFESR_Q_E
|
|
.sym 16114 spi_if_ins.o_fetch_cmd_SB_DFFESR_Q_E
|
|
.sym 16116 spi_if_ins.o_load_cmd_SB_LUT4_I3_1_I0[2]
|
|
.sym 16119 spi_if_ins.o_load_cmd_SB_LUT4_I3_O_SB_LUT4_I3_2_O
|
|
.sym 16125 w_rx_data[2]
|
|
.sym 16128 w_load
|
|
.sym 16129 w_fetch
|
|
.sym 16132 w_rx_data[3]
|
|
.sym 16136 w_rx_data[0]
|
|
.sym 16138 w_rx_data[1]
|
|
.sym 16145 w_cs[2]
|
|
.sym 16146 i_rst_b$SB_IO_IN
|
|
.sym 16148 io_ctrl_ins.o_data_out_SB_DFFESR_Q_6_R_SB_LUT4_O_I1_SB_LUT4_I2_O[1]
|
|
.sym 16149 w_rx_data[5]
|
|
.sym 16152 spi_if_ins.o_load_cmd_SB_LUT4_I3_O_SB_LUT4_I3_1_O
|
|
.sym 16160 w_rx_data[1]
|
|
.sym 16166 w_rx_data[5]
|
|
.sym 16173 w_rx_data[3]
|
|
.sym 16179 w_rx_data[0]
|
|
.sym 16190 io_ctrl_ins.o_data_out_SB_DFFESR_Q_6_R_SB_LUT4_O_I1_SB_LUT4_I2_O[1]
|
|
.sym 16194 w_fetch
|
|
.sym 16195 i_rst_b$SB_IO_IN
|
|
.sym 16196 w_cs[2]
|
|
.sym 16197 w_load
|
|
.sym 16201 w_rx_data[2]
|
|
.sym 16204 spi_if_ins.o_load_cmd_SB_LUT4_I3_O_SB_LUT4_I3_1_O
|
|
.sym 16205 r_counter_$glb_clk
|
|
.sym 16207 io_ctrl_ins.o_data_out_SB_DFFESR_Q_6_R_SB_LUT4_O_I0_SB_LUT4_I2_O[1]
|
|
.sym 16208 io_ctrl_ins.led1_state_SB_LUT4_I0_I2[1]
|
|
.sym 16209 spi_if_ins.o_load_cmd_SB_LUT4_I3_1_I0[2]
|
|
.sym 16210 io_ctrl_ins.o_pmod[6]
|
|
.sym 16211 io_ctrl_ins.o_pmod[4]
|
|
.sym 16212 io_ctrl_ins.o_data_out_SB_DFFESR_Q_E
|
|
.sym 16213 spi_if_ins.o_fetch_cmd_SB_LUT4_I3_O[2]
|
|
.sym 16214 io_ctrl_ins.o_data_out_SB_DFFESR_Q_6_R_SB_LUT4_O_I1_SB_LUT4_I2_O[1]
|
|
.sym 16220 io_ctrl_ins.o_data_out_SB_DFFESR_Q_6_R_SB_LUT4_O_I0_SB_LUT4_I2_O[2]
|
|
.sym 16222 spi_if_ins.state_if[2]
|
|
.sym 16223 io_ctrl_ins.o_data_out_SB_DFFESR_Q_6_R[0]
|
|
.sym 16228 io_ctrl_ins.o_data_out_SB_DFFESR_Q_5_E
|
|
.sym 16229 io_ctrl_ins.o_data_out_SB_DFFESR_Q_6_D_SB_LUT4_O_I2[0]
|
|
.sym 16231 i_rst_b$SB_IO_IN
|
|
.sym 16248 o_shdn_tx_lna$SB_IO_OUT
|
|
.sym 16250 io_ctrl_ins.o_pmod[3]
|
|
.sym 16251 io_ctrl_ins.o_pmod[0]
|
|
.sym 16252 w_rx_data[2]
|
|
.sym 16254 io_ctrl_ins.o_data_out_SB_DFFESR_Q_6_R_SB_LUT4_O_I0_SB_LUT4_I2_O[2]
|
|
.sym 16255 io_ctrl_ins.rf_mode[0]
|
|
.sym 16256 io_ctrl_ins.o_pmod[1]
|
|
.sym 16257 w_fetch
|
|
.sym 16258 w_rx_data[4]
|
|
.sym 16259 w_cs[1]
|
|
.sym 16261 io_ctrl_ins.debug_mode[1]
|
|
.sym 16262 io_ctrl_ins.rf_mode[1]
|
|
.sym 16263 io_ctrl_ins.debug_mode[0]
|
|
.sym 16264 io_ctrl_ins.o_data_out_SB_DFFESR_Q_6_R_SB_LUT4_O_I0_SB_LUT4_I2_O[1]
|
|
.sym 16265 io_ctrl_ins.led1_state_SB_LUT4_I0_I2[1]
|
|
.sym 16266 spi_if_ins.o_load_cmd_SB_LUT4_I3_O_SB_LUT4_I3_2_O
|
|
.sym 16272 w_load
|
|
.sym 16274 spi_if_ins.o_load_cmd_SB_LUT4_I3_1_I0[2]
|
|
.sym 16276 i_rst_b$SB_IO_IN
|
|
.sym 16281 io_ctrl_ins.o_data_out_SB_DFFESR_Q_6_R_SB_LUT4_O_I0_SB_LUT4_I2_O[2]
|
|
.sym 16282 spi_if_ins.o_load_cmd_SB_LUT4_I3_1_I0[2]
|
|
.sym 16283 io_ctrl_ins.debug_mode[1]
|
|
.sym 16284 io_ctrl_ins.o_pmod[1]
|
|
.sym 16287 w_rx_data[4]
|
|
.sym 16293 io_ctrl_ins.o_data_out_SB_DFFESR_Q_6_R_SB_LUT4_O_I0_SB_LUT4_I2_O[2]
|
|
.sym 16294 spi_if_ins.o_load_cmd_SB_LUT4_I3_1_I0[2]
|
|
.sym 16295 io_ctrl_ins.debug_mode[0]
|
|
.sym 16296 io_ctrl_ins.o_pmod[0]
|
|
.sym 16299 io_ctrl_ins.rf_mode[0]
|
|
.sym 16300 o_shdn_tx_lna$SB_IO_OUT
|
|
.sym 16301 spi_if_ins.o_load_cmd_SB_LUT4_I3_1_I0[2]
|
|
.sym 16302 io_ctrl_ins.o_data_out_SB_DFFESR_Q_6_R_SB_LUT4_O_I0_SB_LUT4_I2_O[1]
|
|
.sym 16305 w_cs[1]
|
|
.sym 16306 io_ctrl_ins.led1_state_SB_LUT4_I0_I2[1]
|
|
.sym 16307 w_fetch
|
|
.sym 16308 w_load
|
|
.sym 16314 w_rx_data[2]
|
|
.sym 16317 w_fetch
|
|
.sym 16318 i_rst_b$SB_IO_IN
|
|
.sym 16319 w_cs[1]
|
|
.sym 16320 w_load
|
|
.sym 16323 spi_if_ins.o_load_cmd_SB_LUT4_I3_1_I0[2]
|
|
.sym 16324 io_ctrl_ins.o_data_out_SB_DFFESR_Q_6_R_SB_LUT4_O_I0_SB_LUT4_I2_O[2]
|
|
.sym 16325 io_ctrl_ins.rf_mode[1]
|
|
.sym 16326 io_ctrl_ins.o_pmod[3]
|
|
.sym 16327 spi_if_ins.o_load_cmd_SB_LUT4_I3_O_SB_LUT4_I3_2_O
|
|
.sym 16328 r_counter_$glb_clk
|
|
.sym 16331 io_ctrl_ins.pmod_dir_state[3]
|
|
.sym 16332 io_ctrl_ins.mixer_en_state_SB_LUT4_I0_O[3]
|
|
.sym 16333 io_ctrl_ins.o_data_out_SB_DFFESR_Q_6_R_SB_LUT4_O_I1_SB_LUT4_I2_O[0]
|
|
.sym 16334 io_ctrl_ins.tr_vc_1_state_SB_DFFE_Q_D_SB_LUT4_O_I0[0]
|
|
.sym 16335 spi_if_ins.o_load_cmd_SB_LUT4_I3_O_SB_LUT4_I3_2_O
|
|
.sym 16336 io_ctrl_ins.pmod_dir_state[0]
|
|
.sym 16337 io_ctrl_ins.rx_h_state_SB_DFFE_Q_D_SB_LUT4_O_I3[2]
|
|
.sym 16342 io_ctrl_ins.led1_state_SB_LUT4_I0_I2[2]
|
|
.sym 16343 spi_if_ins.o_fetch_cmd_SB_LUT4_I3_O[2]
|
|
.sym 16346 io_ctrl_ins.pmod_dir_state[4]
|
|
.sym 16347 io_ctrl_ins.o_data_out_SB_DFFESR_Q_6_R_SB_LUT4_O_I1_SB_LUT4_I2_O[1]
|
|
.sym 16348 io_ctrl_ins.mixer_en_state_SB_LUT4_I0_O[2]
|
|
.sym 16351 w_tx_fifo_pulled_data[2]
|
|
.sym 16353 io_ctrl_ins.rf_mode[1]
|
|
.sym 16354 i_button$SB_IO_IN
|
|
.sym 16362 spi_if_ins.o_load_cmd_SB_LUT4_I3_O_SB_LUT4_I3_O
|
|
.sym 16371 io_ctrl_ins.o_data_out_SB_DFFESR_Q_6_R_SB_LUT4_O_I0_SB_LUT4_I2_O[1]
|
|
.sym 16372 w_rx_data[2]
|
|
.sym 16373 spi_if_ins.o_load_cmd_SB_LUT4_I3_O_SB_LUT4_I3_O
|
|
.sym 16378 w_rx_data[3]
|
|
.sym 16380 io_ctrl_ins.led1_state_SB_LUT4_I0_I2[1]
|
|
.sym 16383 smi_ctrl_ins.r_channel_SB_DFFE_Q_E_SB_LUT4_O_I3[1]
|
|
.sym 16384 w_rx_data[1]
|
|
.sym 16385 spi_if_ins.o_load_cmd_SB_LUT4_I3_O[1]
|
|
.sym 16386 w_rx_data[0]
|
|
.sym 16392 io_ctrl_ins.debug_mode[1]
|
|
.sym 16402 io_ctrl_ins.debug_mode[0]
|
|
.sym 16405 spi_if_ins.o_load_cmd_SB_LUT4_I3_O[1]
|
|
.sym 16406 io_ctrl_ins.o_data_out_SB_DFFESR_Q_6_R_SB_LUT4_O_I0_SB_LUT4_I2_O[1]
|
|
.sym 16410 smi_ctrl_ins.r_channel_SB_DFFE_Q_E_SB_LUT4_O_I3[1]
|
|
.sym 16411 io_ctrl_ins.led1_state_SB_LUT4_I0_I2[1]
|
|
.sym 16417 w_rx_data[2]
|
|
.sym 16423 w_rx_data[1]
|
|
.sym 16428 io_ctrl_ins.debug_mode[0]
|
|
.sym 16431 io_ctrl_ins.debug_mode[1]
|
|
.sym 16436 w_rx_data[3]
|
|
.sym 16442 w_rx_data[0]
|
|
.sym 16450 spi_if_ins.o_load_cmd_SB_LUT4_I3_O_SB_LUT4_I3_O
|
|
.sym 16451 r_counter_$glb_clk
|
|
.sym 16453 i_config[3]$SB_IO_IN
|
|
.sym 16455 i_button$SB_IO_IN
|
|
.sym 16461 o_shdn_tx_lna$SB_IO_OUT
|
|
.sym 16462 io_ctrl_ins.led1_state
|
|
.sym 16463 io_ctrl_ins.rf_pin_state[3]
|
|
.sym 16465 o_shdn_rx_lna$SB_IO_OUT
|
|
.sym 16466 io_ctrl_ins.led0_state
|
|
.sym 16467 io_ctrl_ins.rf_mode[0]
|
|
.sym 16469 io_ctrl_ins.rf_pin_state[1]
|
|
.sym 16470 w_rx_data[3]
|
|
.sym 16471 io_ctrl_ins.rx_h_state_SB_DFFE_Q_D_SB_LUT4_O_I2[2]
|
|
.sym 16474 i_config[3]$SB_IO_IN
|
|
.sym 16478 io_ctrl_ins.rf_mode[1]
|
|
.sym 16479 spi_if_ins.o_load_cmd_SB_LUT4_I3_O_SB_LUT4_I3_2_O
|
|
.sym 16484 io_ctrl_ins.rf_mode[2]
|
|
.sym 16497 w_lvds_tx_d1_SB_DFF_Q_D_SB_LUT4_O_1_I0_SB_LUT4_O_I0_SB_LUT4_I1_O
|
|
.sym 16521 w_lvds_tx_d1_SB_DFF_Q_D_SB_LUT4_O_1_I0_SB_LUT4_O_I0_SB_LUT4_I1_O
|
|
.sym 16523 o_led1$SB_IO_OUT
|
|
.sym 16553 w_rx_09_fifo_data[28]
|
|
.sym 16555 w_rx_09_fifo_data[30]
|
|
.sym 16556 w_rx_fifo_data[28]
|
|
.sym 16558 w_rx_fifo_data[30]
|
|
.sym 16560 w_rx_09_fifo_data[12]
|
|
.sym 16584 smi_ctrl_ins.r_fifo_pushed_data_SB_DFFNESR_Q_21_E
|
|
.sym 16587 o_led0$SB_IO_OUT
|
|
.sym 16597 w_lvds_rx_24_d0_SB_LUT4_I1_O[0]
|
|
.sym 16602 w_rx_24_fifo_data[29]
|
|
.sym 16604 w_rx_24_fifo_data[28]
|
|
.sym 16606 o_led1$SB_IO_OUT
|
|
.sym 16610 w_rx_09_fifo_data[10]
|
|
.sym 16612 w_rx_24_fifo_data[10]
|
|
.sym 16615 w_rx_24_fifo_data[8]
|
|
.sym 16619 w_smi_data_output[4]
|
|
.sym 16628 w_rx_24_fifo_data[28]
|
|
.sym 16637 w_rx_24_fifo_data[8]
|
|
.sym 16648 w_rx_24_fifo_data[29]
|
|
.sym 16664 w_rx_09_fifo_data[10]
|
|
.sym 16665 w_rx_24_fifo_data[10]
|
|
.sym 16666 o_led1$SB_IO_OUT
|
|
.sym 16670 w_smi_data_output[4]
|
|
.sym 16674 w_lvds_rx_24_d0_SB_LUT4_I1_O[0]
|
|
.sym 16675 o_iq_tx_clk_p$SB_IO_OUT_$glb_clk
|
|
.sym 16677 w_smi_data_input[4]
|
|
.sym 16681 smi_ctrl_ins.r_fifo_pulled_data[15]
|
|
.sym 16683 smi_ctrl_ins.r_fifo_pulled_data_SB_DFFNESR_Q_E
|
|
.sym 16684 w_rx_fifo_data[19]
|
|
.sym 16685 smi_ctrl_ins.r_fifo_pulled_data[25]
|
|
.sym 16686 smi_ctrl_ins.o_smi_data_out_SB_DFFNE_Q_D_SB_LUT4_O_6_I3[1]
|
|
.sym 16687 smi_ctrl_ins.r_fifo_pulled_data[29]
|
|
.sym 16688 smi_ctrl_ins.r_fifo_pulled_data[11]
|
|
.sym 16697 w_rx_24_fifo_data[10]
|
|
.sym 16700 rx_fifo.wr_addr[2]
|
|
.sym 16702 w_rx_24_fifo_data[29]
|
|
.sym 16704 w_rx_24_fifo_data[28]
|
|
.sym 16707 $PACKER_VCC_NET
|
|
.sym 16711 w_rx_09_fifo_data[12]
|
|
.sym 16721 w_rx_24_fifo_data[31]
|
|
.sym 16722 smi_ctrl_ins.int_cnt_rx[3]
|
|
.sym 16723 smi_ctrl_ins.r_fifo_pulled_data_SB_DFFNESR_Q_E
|
|
.sym 16736 w_smi_data_input[7]
|
|
.sym 16740 w_smi_data_input[4]
|
|
.sym 16741 smi_ctrl_ins.r_fifo_pulled_data_SB_DFFNESR_Q_E
|
|
.sym 16745 w_rx_fifo_pulled_data[3]
|
|
.sym 16750 $PACKER_VCC_NET
|
|
.sym 16770 smi_ctrl_ins.int_cnt_rx[4]
|
|
.sym 16772 smi_ctrl_ins.int_cnt_rx[3]
|
|
.sym 16778 smi_ctrl_ins.r_fifo_pulled_data[13]
|
|
.sym 16780 smi_ctrl_ins.r_fifo_pulled_data[29]
|
|
.sym 16803 smi_ctrl_ins.r_fifo_pulled_data[13]
|
|
.sym 16804 smi_ctrl_ins.int_cnt_rx[4]
|
|
.sym 16805 smi_ctrl_ins.r_fifo_pulled_data[29]
|
|
.sym 16806 smi_ctrl_ins.int_cnt_rx[3]
|
|
.sym 16816 smi_ctrl_ins.int_cnt_rx[3]
|
|
.sym 16818 smi_ctrl_ins.int_cnt_rx[4]
|
|
.sym 16828 smi_ctrl_ins.int_cnt_rx[3]
|
|
.sym 16838 smi_ctrl_ins.soe_and_reset_$glb_clk
|
|
.sym 16839 i_rst_b_SB_LUT4_I3_O_$glb_sr
|
|
.sym 16840 smi_ctrl_ins.r_fifo_pulled_data[30]
|
|
.sym 16842 smi_ctrl_ins.o_smi_data_out_SB_DFFNE_Q_D_SB_LUT4_O_5_I3[0]
|
|
.sym 16843 smi_ctrl_ins.o_smi_data_out_SB_DFFNE_Q_D_SB_LUT4_O_4_I3[0]
|
|
.sym 16844 smi_ctrl_ins.r_fifo_pulled_data[13]
|
|
.sym 16845 smi_ctrl_ins.r_fifo_pulled_data[14]
|
|
.sym 16846 smi_ctrl_ins.r_fifo_pulled_data[28]
|
|
.sym 16856 w_rx_fifo_pulled_data[27]
|
|
.sym 16857 smi_ctrl_ins.r_fifo_pulled_data[11]
|
|
.sym 16862 smi_ctrl_ins.int_cnt_rx[4]
|
|
.sym 16863 i_ss$SB_IO_IN
|
|
.sym 16864 w_rx_fifo_pulled_data[24]
|
|
.sym 16866 $PACKER_VCC_NET
|
|
.sym 16867 w_rx_09_fifo_data[19]
|
|
.sym 16870 $PACKER_VCC_NET
|
|
.sym 16872 w_rx_24_fifo_data[19]
|
|
.sym 16873 smi_ctrl_ins.int_cnt_rx[3]
|
|
.sym 16875 smi_ctrl_ins.tx_reg_state[0]
|
|
.sym 16882 r_counter
|
|
.sym 16887 smi_ctrl_ins.int_cnt_rx[3]
|
|
.sym 16889 smi_ctrl_ins.r_fifo_pulled_data[15]
|
|
.sym 16890 i_glob_clock$SB_IO_IN
|
|
.sym 16893 smi_ctrl_ins.int_cnt_rx[4]
|
|
.sym 16895 i_rst_b$SB_IO_IN
|
|
.sym 16897 smi_ctrl_ins.r_fifo_pulled_data[30]
|
|
.sym 16901 smi_ctrl_ins.o_smi_data_out_SB_DFFNE_Q_D_SB_LUT4_O_5_I3[1]
|
|
.sym 16902 smi_ctrl_ins.r_fifo_pulled_data[14]
|
|
.sym 16903 smi_ctrl_ins.r_fifo_pulled_data[28]
|
|
.sym 16907 smi_ctrl_ins.r_fifo_pulled_data[12]
|
|
.sym 16910 smi_ctrl_ins.r_fifo_pulled_data[31]
|
|
.sym 16911 smi_ctrl_ins.o_smi_data_out_SB_DFFNE_Q_D_SB_LUT4_O_7_I3[1]
|
|
.sym 16915 i_rst_b$SB_IO_IN
|
|
.sym 16916 smi_ctrl_ins.int_cnt_rx[3]
|
|
.sym 16917 smi_ctrl_ins.int_cnt_rx[4]
|
|
.sym 16922 r_counter
|
|
.sym 16926 smi_ctrl_ins.int_cnt_rx[3]
|
|
.sym 16927 smi_ctrl_ins.int_cnt_rx[4]
|
|
.sym 16928 smi_ctrl_ins.r_fifo_pulled_data[31]
|
|
.sym 16929 smi_ctrl_ins.r_fifo_pulled_data[15]
|
|
.sym 16933 smi_ctrl_ins.o_smi_data_out_SB_DFFNE_Q_D_SB_LUT4_O_5_I3[1]
|
|
.sym 16938 smi_ctrl_ins.r_fifo_pulled_data[28]
|
|
.sym 16939 smi_ctrl_ins.int_cnt_rx[4]
|
|
.sym 16940 smi_ctrl_ins.int_cnt_rx[3]
|
|
.sym 16941 smi_ctrl_ins.r_fifo_pulled_data[12]
|
|
.sym 16946 smi_ctrl_ins.o_smi_data_out_SB_DFFNE_Q_D_SB_LUT4_O_7_I3[1]
|
|
.sym 16950 smi_ctrl_ins.int_cnt_rx[3]
|
|
.sym 16951 smi_ctrl_ins.r_fifo_pulled_data[14]
|
|
.sym 16952 smi_ctrl_ins.r_fifo_pulled_data[30]
|
|
.sym 16953 smi_ctrl_ins.int_cnt_rx[4]
|
|
.sym 16961 i_glob_clock$SB_IO_IN
|
|
.sym 16962 i_rst_b_SB_LUT4_I3_O_$glb_sr
|
|
.sym 16963 smi_ctrl_ins.o_smi_data_out_SB_DFFNE_Q_D_SB_LUT4_O_4_I3[1]
|
|
.sym 16965 smi_ctrl_ins.r_fifo_pulled_data[12]
|
|
.sym 16966 smi_ctrl_ins.r_fifo_pulled_data[26]
|
|
.sym 16967 smi_ctrl_ins.o_smi_data_out_SB_DFFNE_Q_D_SB_LUT4_O_5_I3[1]
|
|
.sym 16968 smi_ctrl_ins.r_fifo_pulled_data[31]
|
|
.sym 16969 smi_ctrl_ins.o_smi_data_out_SB_DFFNE_Q_D_SB_LUT4_O_7_I3[1]
|
|
.sym 16970 smi_ctrl_ins.r_fifo_pulled_data[24]
|
|
.sym 16975 smi_ctrl_ins.r_fifo_pulled_data_SB_DFFNESR_Q_E
|
|
.sym 16978 smi_ctrl_ins.o_smi_data_out_SB_DFFNE_Q_D_SB_LUT4_O_4_I3[0]
|
|
.sym 16980 w_rx_fifo_push
|
|
.sym 16985 rx_fifo.wr_addr[2]
|
|
.sym 16986 smi_ctrl_ins.o_smi_data_out_SB_DFFNE_Q_D_SB_LUT4_O_5_I3[0]
|
|
.sym 16987 $PACKER_VCC_NET
|
|
.sym 16989 w_rx_09_fifo_data[16]
|
|
.sym 16990 smi_ctrl_ins.o_smi_data_out_SB_DFFNE_Q_D_SB_LUT4_O_I3[1]
|
|
.sym 16994 smi_ctrl_ins.r_fifo_pulled_data[24]
|
|
.sym 16997 w_rx_09_fifo_data[12]
|
|
.sym 17008 smi_ctrl_ins.tx_reg_state[3]
|
|
.sym 17010 i_rst_b$SB_IO_IN
|
|
.sym 17011 smi_ctrl_ins.tx_reg_state[1]
|
|
.sym 17012 w_smi_data_input[7]
|
|
.sym 17018 smi_ctrl_ins.r_fifo_pushed_data_SB_DFFNESR_Q_E[0]
|
|
.sym 17022 smi_ctrl_ins.tx_reg_state[2]
|
|
.sym 17023 smi_ctrl_ins.tx_reg_state[0]
|
|
.sym 17026 smi_ctrl_ins.tx_reg_state_SB_DFFN_Q_3_D_SB_LUT4_O_I0[0]
|
|
.sym 17043 w_smi_data_input[7]
|
|
.sym 17044 i_rst_b$SB_IO_IN
|
|
.sym 17046 smi_ctrl_ins.tx_reg_state[2]
|
|
.sym 17050 w_smi_data_input[7]
|
|
.sym 17051 i_rst_b$SB_IO_IN
|
|
.sym 17052 smi_ctrl_ins.tx_reg_state[0]
|
|
.sym 17055 w_smi_data_input[7]
|
|
.sym 17056 smi_ctrl_ins.tx_reg_state_SB_DFFN_Q_3_D_SB_LUT4_O_I0[0]
|
|
.sym 17057 smi_ctrl_ins.r_fifo_pushed_data_SB_DFFNESR_Q_E[0]
|
|
.sym 17058 i_rst_b$SB_IO_IN
|
|
.sym 17061 i_rst_b$SB_IO_IN
|
|
.sym 17062 smi_ctrl_ins.tx_reg_state[1]
|
|
.sym 17064 w_smi_data_input[7]
|
|
.sym 17073 smi_ctrl_ins.tx_reg_state[3]
|
|
.sym 17075 smi_ctrl_ins.tx_reg_state[2]
|
|
.sym 17076 smi_ctrl_ins.tx_reg_state[1]
|
|
.sym 17080 smi_ctrl_ins.tx_reg_state[2]
|
|
.sym 17081 w_smi_data_input[7]
|
|
.sym 17082 i_rst_b$SB_IO_IN
|
|
.sym 17084 smi_ctrl_ins.swe_and_reset_$glb_clk
|
|
.sym 17086 w_rx_fifo_data[17]
|
|
.sym 17087 w_rx_09_fifo_data[19]
|
|
.sym 17088 w_rx_09_fifo_data[17]
|
|
.sym 17089 w_rx_fifo_data[12]
|
|
.sym 17090 w_rx_09_fifo_data[14]
|
|
.sym 17091 w_rx_09_fifo_data[21]
|
|
.sym 17092 w_rx_09_fifo_data[15]
|
|
.sym 17093 w_rx_09_fifo_data[16]
|
|
.sym 17104 i_glob_clock$SB_IO_IN
|
|
.sym 17105 rx_fifo.empty_o_SB_DFF_Q_D_SB_LUT4_O_I0_SB_LUT4_O_1_I1_SB_LUT4_O_1_I0[3]
|
|
.sym 17106 w_lvds_rx_24_d0_SB_LUT4_I1_O[0]
|
|
.sym 17109 rx_fifo.empty_o_SB_LUT4_I2_O[0]
|
|
.sym 17111 rx_fifo.full_o_SB_DFF_Q_D_SB_LUT4_O_I0_SB_LUT4_O_1_I0[2]
|
|
.sym 17113 rx_fifo.wr_addr[5]
|
|
.sym 17114 smi_ctrl_ins.r_fifo_pushed_data_SB_DFFNESR_Q_E[0]
|
|
.sym 17116 smi_ctrl_ins.r_fifo_pulled_data_SB_DFFNESR_Q_E
|
|
.sym 17118 rx_fifo.empty_o_SB_DFF_Q_D_SB_LUT4_O_I0_SB_LUT4_O_1_I1_SB_LUT4_O_1_I0[2]
|
|
.sym 17119 rx_fifo.wr_addr[9]
|
|
.sym 17127 w_rx_24_fifo_data[10]
|
|
.sym 17129 w_lvds_rx_24_d0_SB_LUT4_I1_O[0]
|
|
.sym 17130 smi_ctrl_ins.tx_reg_state[0]
|
|
.sym 17132 w_rx_24_fifo_data[17]
|
|
.sym 17135 rx_fifo.rd_addr_gray_SB_LUT4_I2_O[8]
|
|
.sym 17137 w_rx_24_fifo_data[14]
|
|
.sym 17139 smi_ctrl_ins.tx_reg_state[3]
|
|
.sym 17145 w_rx_24_fifo_data[21]
|
|
.sym 17152 rx_fifo.empty_o_SB_DFF_Q_D_SB_LUT4_O_I0_SB_LUT4_O_1_I1_SB_LUT4_O_I3[0]
|
|
.sym 17155 w_rx_24_fifo_data[19]
|
|
.sym 17156 rx_fifo.rd_addr_gray_SB_LUT4_I2_O[5]
|
|
.sym 17157 rx_fifo.rd_addr_gray_SB_LUT4_I2_O[6]
|
|
.sym 17158 rx_fifo.rd_addr_gray_SB_LUT4_I2_O[7]
|
|
.sym 17161 rx_fifo.rd_addr_gray_SB_LUT4_I2_O[8]
|
|
.sym 17162 rx_fifo.rd_addr_gray_SB_LUT4_I2_O[7]
|
|
.sym 17167 w_rx_24_fifo_data[10]
|
|
.sym 17173 w_rx_24_fifo_data[19]
|
|
.sym 17179 rx_fifo.rd_addr_gray_SB_LUT4_I2_O[5]
|
|
.sym 17180 rx_fifo.rd_addr_gray_SB_LUT4_I2_O[6]
|
|
.sym 17181 rx_fifo.empty_o_SB_DFF_Q_D_SB_LUT4_O_I0_SB_LUT4_O_1_I1_SB_LUT4_O_I3[0]
|
|
.sym 17187 w_rx_24_fifo_data[17]
|
|
.sym 17191 w_rx_24_fifo_data[21]
|
|
.sym 17197 smi_ctrl_ins.tx_reg_state[3]
|
|
.sym 17199 smi_ctrl_ins.tx_reg_state[0]
|
|
.sym 17202 w_rx_24_fifo_data[14]
|
|
.sym 17206 w_lvds_rx_24_d0_SB_LUT4_I1_O[0]
|
|
.sym 17207 o_iq_tx_clk_p$SB_IO_OUT_$glb_clk
|
|
.sym 17209 w_rx_fifo_data[21]
|
|
.sym 17210 smi_ctrl_ins.o_smi_data_out_SB_DFFNE_Q_D_SB_LUT4_O_I3[1]
|
|
.sym 17211 smi_ctrl_ins.o_smi_data_out_SB_DFFNE_Q_D_SB_LUT4_O_2_I3[1]
|
|
.sym 17212 w_rx_fifo_data[14]
|
|
.sym 17214 w_rx_fifo_data[15]
|
|
.sym 17215 smi_ctrl_ins.o_smi_data_out_SB_DFFNE_Q_D_SB_LUT4_O_3_I3[1]
|
|
.sym 17216 smi_ctrl_ins.o_smi_data_out_SB_DFFNE_Q_D_SB_LUT4_O_1_I3[1]
|
|
.sym 17223 w_rx_24_fifo_data[23]
|
|
.sym 17226 w_rx_09_fifo_data[16]
|
|
.sym 17227 r_counter
|
|
.sym 17230 o_led1$SB_IO_OUT
|
|
.sym 17234 w_smi_data_input[7]
|
|
.sym 17235 rx_fifo.empty_o_SB_LUT4_I2_O[0]
|
|
.sym 17236 rx_fifo.rd_addr_gray_SB_DFFE_Q_6_D_SB_LUT4_I0_O_SB_LUT4_O_I3[3]
|
|
.sym 17237 w_smi_data_input[4]
|
|
.sym 17241 rx_fifo.rd_addr_gray_SB_DFFE_Q_5_D_SB_LUT4_I0_O[2]
|
|
.sym 17242 w_rx_fifo_data[21]
|
|
.sym 17244 rx_fifo.rd_addr_gray_SB_DFFE_Q_5_D_SB_LUT4_I0_O[1]
|
|
.sym 17251 w_rx_09_fifo_data[13]
|
|
.sym 17252 w_lvds_rx_24_d0_SB_LUT4_I1_O[0]
|
|
.sym 17254 i_rst_b$SB_IO_IN
|
|
.sym 17256 o_led1$SB_IO_OUT
|
|
.sym 17258 rx_fifo.rd_addr_gray_SB_DFFE_Q_7_D[3]
|
|
.sym 17259 w_rx_24_fifo_data[12]
|
|
.sym 17263 rx_fifo.rd_addr_gray_SB_DFFE_Q_6_D_SB_LUT4_I0_O_SB_LUT4_O_I3[2]
|
|
.sym 17264 i_smi_swe_srw$SB_IO_IN
|
|
.sym 17265 rx_fifo.rd_addr_gray_SB_LUT4_I2_O[3]
|
|
.sym 17266 rx_fifo.rd_addr_gray_SB_LUT4_I2_O[8]
|
|
.sym 17268 rx_fifo.rd_addr_gray_SB_DFFE_Q_6_D[3]
|
|
.sym 17270 rx_fifo.rd_addr_gray_SB_DFFE_Q_7_D[0]
|
|
.sym 17273 w_rx_24_fifo_data[13]
|
|
.sym 17275 rx_fifo.rd_addr_gray_SB_DFFE_Q_5_D_SB_LUT4_I0_O_SB_LUT4_O_I0[2]
|
|
.sym 17278 rx_fifo.empty_o_SB_DFF_Q_D_SB_LUT4_O_I0_SB_LUT4_O_1_I1_SB_LUT4_O_1_I0[2]
|
|
.sym 17281 rx_fifo.rd_addr_gray_SB_DFFE_Q_7_D[1]
|
|
.sym 17283 rx_fifo.rd_addr_gray_SB_LUT4_I2_O[3]
|
|
.sym 17285 rx_fifo.rd_addr_gray_SB_DFFE_Q_6_D_SB_LUT4_I0_O_SB_LUT4_O_I3[2]
|
|
.sym 17289 w_rx_24_fifo_data[13]
|
|
.sym 17297 w_rx_24_fifo_data[12]
|
|
.sym 17303 i_smi_swe_srw$SB_IO_IN
|
|
.sym 17304 i_rst_b$SB_IO_IN
|
|
.sym 17307 o_led1$SB_IO_OUT
|
|
.sym 17308 w_rx_09_fifo_data[13]
|
|
.sym 17310 w_rx_24_fifo_data[13]
|
|
.sym 17314 rx_fifo.rd_addr_gray_SB_DFFE_Q_6_D[3]
|
|
.sym 17319 rx_fifo.rd_addr_gray_SB_DFFE_Q_7_D[0]
|
|
.sym 17320 rx_fifo.rd_addr_gray_SB_DFFE_Q_7_D[3]
|
|
.sym 17321 rx_fifo.rd_addr_gray_SB_DFFE_Q_7_D[1]
|
|
.sym 17322 rx_fifo.empty_o_SB_DFF_Q_D_SB_LUT4_O_I0_SB_LUT4_O_1_I1_SB_LUT4_O_1_I0[2]
|
|
.sym 17326 rx_fifo.rd_addr_gray_SB_LUT4_I2_O[8]
|
|
.sym 17328 rx_fifo.rd_addr_gray_SB_DFFE_Q_5_D_SB_LUT4_I0_O_SB_LUT4_O_I0[2]
|
|
.sym 17329 w_lvds_rx_24_d0_SB_LUT4_I1_O[0]
|
|
.sym 17330 o_iq_tx_clk_p$SB_IO_OUT_$glb_clk
|
|
.sym 17333 rx_fifo.wr_addr_gray_rd[4]
|
|
.sym 17335 rx_fifo.rd_addr_gray_SB_DFFE_Q_6_D_SB_LUT4_I0_O[1]
|
|
.sym 17336 rx_fifo.rd_addr_gray_SB_DFFE_Q_5_D[1]
|
|
.sym 17337 $PACKER_VCC_NET
|
|
.sym 17339 rx_fifo.rd_addr_gray_SB_DFFE_Q_6_D_SB_LUT4_I0_O[2]
|
|
.sym 17344 smi_ctrl_ins.r_fifo_pushed_data_SB_DFFNESR_Q_9_E
|
|
.sym 17349 smi_ctrl_ins.o_smi_data_out_SB_DFFNE_Q_D_SB_LUT4_O_1_I3[1]
|
|
.sym 17350 w_rx_24_fifo_data[14]
|
|
.sym 17354 spi_if_ins.spi.r2_rx_done
|
|
.sym 17356 rx_fifo.empty_o_SB_DFF_Q_D_SB_LUT4_O_I0_SB_LUT4_O_1_I1_SB_LUT4_O_2_I0[3]
|
|
.sym 17357 rx_fifo.wr_addr[5]
|
|
.sym 17358 rx_fifo.empty_o_SB_DFF_Q_D_SB_LUT4_O_I0_SB_LUT4_O_1_I1_SB_LUT4_O_2_I0[1]
|
|
.sym 17360 rx_fifo.wr_addr[3]
|
|
.sym 17361 w_cs[3]
|
|
.sym 17362 $PACKER_VCC_NET
|
|
.sym 17364 spi_if_ins.spi.r_tx_bit_count[2]
|
|
.sym 17365 w_cs[2]
|
|
.sym 17366 spi_if_ins.spi.o_spi_miso_SB_DFFE_Q_D_SB_LUT4_O_I2_SB_LUT4_O_I0_SB_LUT4_O_2_I0[3]
|
|
.sym 17367 rx_fifo.rd_addr_gray_SB_DFFE_Q_7_D[1]
|
|
.sym 17373 rx_fifo.empty_o_SB_DFF_Q_D_SB_LUT4_O_I0_SB_LUT4_O_1_I1_SB_LUT4_O_I3[1]
|
|
.sym 17376 i_rst_b$SB_IO_IN
|
|
.sym 17377 smi_ctrl_ins.w_fifo_push_trigger_SB_DFFNSR_Q_R
|
|
.sym 17379 rx_fifo.rd_addr_gray_SB_DFFE_Q_6_D_SB_LUT4_I0_O[0]
|
|
.sym 17384 rx_fifo.rd_addr_gray_SB_DFFE_Q_5_D_SB_LUT4_I0_O[1]
|
|
.sym 17386 smi_ctrl_ins.r_fifo_pushed_data_SB_DFFNESR_Q_E[0]
|
|
.sym 17387 rx_fifo.empty_o_SB_DFF_Q_D_SB_LUT4_O_I0_SB_LUT4_O_1_I1_SB_LUT4_O_2_I0[3]
|
|
.sym 17388 rx_fifo.empty_o_SB_LUT4_I2_O[1]
|
|
.sym 17392 rx_fifo.rd_addr_gray_SB_DFFE_Q_6_D_SB_LUT4_I0_O[1]
|
|
.sym 17393 rx_fifo.rd_addr_gray_SB_DFFE_Q_5_D[1]
|
|
.sym 17394 w_smi_data_input[7]
|
|
.sym 17399 rx_fifo.rd_addr_gray_SB_DFFE_Q_5_D_SB_LUT4_I0_O[3]
|
|
.sym 17401 rx_fifo.rd_addr_gray_SB_DFFE_Q_5_D_SB_LUT4_I0_O[2]
|
|
.sym 17404 rx_fifo.rd_addr_gray_SB_DFFE_Q_6_D_SB_LUT4_I0_O[2]
|
|
.sym 17414 w_smi_data_input[7]
|
|
.sym 17418 rx_fifo.rd_addr_gray_SB_DFFE_Q_5_D_SB_LUT4_I0_O[1]
|
|
.sym 17419 rx_fifo.rd_addr_gray_SB_DFFE_Q_5_D_SB_LUT4_I0_O[2]
|
|
.sym 17420 rx_fifo.empty_o_SB_LUT4_I2_O[1]
|
|
.sym 17421 rx_fifo.rd_addr_gray_SB_DFFE_Q_5_D_SB_LUT4_I0_O[3]
|
|
.sym 17432 smi_ctrl_ins.r_fifo_pushed_data_SB_DFFNESR_Q_E[0]
|
|
.sym 17433 i_rst_b$SB_IO_IN
|
|
.sym 17442 rx_fifo.empty_o_SB_DFF_Q_D_SB_LUT4_O_I0_SB_LUT4_O_1_I1_SB_LUT4_O_I3[1]
|
|
.sym 17443 rx_fifo.empty_o_SB_DFF_Q_D_SB_LUT4_O_I0_SB_LUT4_O_1_I1_SB_LUT4_O_2_I0[3]
|
|
.sym 17444 rx_fifo.rd_addr_gray_SB_DFFE_Q_5_D[1]
|
|
.sym 17449 rx_fifo.rd_addr_gray_SB_DFFE_Q_6_D_SB_LUT4_I0_O[0]
|
|
.sym 17450 rx_fifo.rd_addr_gray_SB_DFFE_Q_6_D_SB_LUT4_I0_O[1]
|
|
.sym 17451 rx_fifo.rd_addr_gray_SB_DFFE_Q_6_D_SB_LUT4_I0_O[2]
|
|
.sym 17453 smi_ctrl_ins.swe_and_reset_$glb_clk
|
|
.sym 17454 smi_ctrl_ins.w_fifo_push_trigger_SB_DFFNSR_Q_R
|
|
.sym 17456 $PACKER_VCC_NET
|
|
.sym 17457 spi_if_ins.spi.r_tx_bit_count[2]
|
|
.sym 17458 spi_if_ins.spi.o_spi_miso_SB_DFFE_Q_D_SB_LUT4_O_I2_SB_LUT4_O_I0_SB_LUT4_O_2_I0[3]
|
|
.sym 17459 spi_if_ins.spi.r_rx_done_SB_DFFESR_Q_E
|
|
.sym 17460 spi_if_ins.spi.o_spi_miso_SB_DFFE_Q_E
|
|
.sym 17461 spi_if_ins.spi.r_rx_done_SB_DFFESR_Q_D[1]
|
|
.sym 17462 spi_if_ins.spi.SCKr_SB_LUT4_I0_O[0]
|
|
.sym 17469 w_rx_fifo_push
|
|
.sym 17473 rx_fifo.wr_addr[4]
|
|
.sym 17475 rx_fifo.rd_addr_gray_SB_DFFE_Q_6_D_SB_LUT4_I0_O_SB_LUT4_O_I3[2]
|
|
.sym 17478 o_led0$SB_IO_OUT
|
|
.sym 17482 spi_if_ins.w_rx_data[5]
|
|
.sym 17484 spi_if_ins.w_rx_data[6]
|
|
.sym 17485 rx_fifo.wr_addr_gray[4]
|
|
.sym 17487 rx_fifo.empty_o_SB_DFF_Q_D_SB_LUT4_O_I0[1]
|
|
.sym 17490 $PACKER_VCC_NET
|
|
.sym 17498 spi_if_ins.w_rx_data[5]
|
|
.sym 17500 spi_if_ins.w_rx_data[6]
|
|
.sym 17516 sys_ctrl_ins.i_cs_SB_DFFE_Q_D[0]
|
|
.sym 17523 spi_if_ins.spi.o_rx_data_valid_SB_LUT4_I3_O_SB_LUT4_I3_O[2]
|
|
.sym 17529 spi_if_ins.w_rx_data[6]
|
|
.sym 17531 spi_if_ins.w_rx_data[5]
|
|
.sym 17541 spi_if_ins.w_rx_data[6]
|
|
.sym 17543 spi_if_ins.w_rx_data[5]
|
|
.sym 17548 spi_if_ins.w_rx_data[6]
|
|
.sym 17550 spi_if_ins.w_rx_data[5]
|
|
.sym 17575 spi_if_ins.spi.o_rx_data_valid_SB_LUT4_I3_O_SB_LUT4_I3_O[2]
|
|
.sym 17576 r_counter_$glb_clk
|
|
.sym 17577 sys_ctrl_ins.i_cs_SB_DFFE_Q_D[0]
|
|
.sym 17578 spi_if_ins.spi.SCKr[0]
|
|
.sym 17579 spi_if_ins.o_cs_SB_LUT4_I0_O[1]
|
|
.sym 17580 rx_fifo.empty_o_SB_DFF_Q_D_SB_LUT4_O_I0[1]
|
|
.sym 17581 rx_fifo.empty_o_SB_DFF_Q_D_SB_LUT4_O_I0_SB_LUT4_O_1_I1[2]
|
|
.sym 17582 spi_if_ins.spi.o_spi_miso_SB_DFFE_Q_D_SB_LUT4_O_I2_SB_LUT4_O_I0[0]
|
|
.sym 17583 spi_if_ins.spi.SCKr_SB_LUT4_I0_O[1]
|
|
.sym 17584 spi_if_ins.spi.SCKr[1]
|
|
.sym 17585 spi_if_ins.spi.SCKr[2]
|
|
.sym 17590 spi_if_ins.spi.r_tx_bit_count_SB_DFFESR_Q_R
|
|
.sym 17591 spi_if_ins.r_tx_byte[1]
|
|
.sym 17595 spi_if_ins.r_tx_byte[4]
|
|
.sym 17596 w_cs[2]
|
|
.sym 17597 i_sck$SB_IO_IN
|
|
.sym 17598 w_cs[1]
|
|
.sym 17599 spi_if_ins.r_tx_data_valid_SB_LUT4_I3_O
|
|
.sym 17600 rx_fifo.empty_o_SB_DFF_Q_D_SB_LUT4_O_I0_SB_LUT4_O_1_I1_SB_LUT4_O_1_I0[3]
|
|
.sym 17602 spi_if_ins.spi.r_tx_bit_count[2]
|
|
.sym 17604 spi_if_ins.spi.o_spi_miso_SB_DFFE_Q_D_SB_LUT4_O_I2_SB_LUT4_O_I0_SB_LUT4_O_2_I0[3]
|
|
.sym 17605 spi_if_ins.spi.r_tx_byte_SB_DFFESR_Q_E
|
|
.sym 17607 w_tx_fifo_data[20]
|
|
.sym 17610 spi_if_ins.spi.r_rx_done_SB_DFFESR_Q_D[1]
|
|
.sym 17612 spi_if_ins.spi.SCKr_SB_LUT4_I0_O[0]
|
|
.sym 17619 i_sck$SB_IO_IN
|
|
.sym 17621 spi_if_ins.spi.r_rx_bit_count[2]
|
|
.sym 17631 spi_if_ins.spi.r_rx_bit_count[0]
|
|
.sym 17632 i_ss$SB_IO_IN
|
|
.sym 17639 rx_fifo.empty_o_SB_DFF_Q_D_SB_LUT4_O_I0_SB_LUT4_O_1_I1[0]
|
|
.sym 17650 spi_if_ins.spi.r_rx_bit_count[1]
|
|
.sym 17651 $nextpnr_ICESTORM_LC_10$O
|
|
.sym 17653 spi_if_ins.spi.r_rx_bit_count[0]
|
|
.sym 17657 spi_if_ins.spi.r_rx_bit_count_SB_DFFSR_Q_D_SB_LUT4_O_I3[2]
|
|
.sym 17659 spi_if_ins.spi.r_rx_bit_count[1]
|
|
.sym 17666 spi_if_ins.spi.r_rx_bit_count[2]
|
|
.sym 17667 spi_if_ins.spi.r_rx_bit_count_SB_DFFSR_Q_D_SB_LUT4_O_I3[2]
|
|
.sym 17677 spi_if_ins.spi.r_rx_bit_count[0]
|
|
.sym 17690 rx_fifo.empty_o_SB_DFF_Q_D_SB_LUT4_O_I0_SB_LUT4_O_1_I1[0]
|
|
.sym 17694 spi_if_ins.spi.r_rx_bit_count[0]
|
|
.sym 17697 spi_if_ins.spi.r_rx_bit_count[1]
|
|
.sym 17699 i_sck$SB_IO_IN
|
|
.sym 17700 i_ss$SB_IO_IN
|
|
.sym 17702 spi_if_ins.w_rx_data[5]
|
|
.sym 17703 spi_if_ins.w_rx_data[6]
|
|
.sym 17704 spi_if_ins.w_rx_data[1]
|
|
.sym 17705 spi_if_ins.w_rx_data[3]
|
|
.sym 17706 spi_if_ins.w_rx_data[2]
|
|
.sym 17707 spi_if_ins.w_rx_data[7]
|
|
.sym 17708 spi_if_ins.w_rx_data[0]
|
|
.sym 17713 i_sck$SB_IO_IN
|
|
.sym 17715 w_rx_fifo_empty
|
|
.sym 17717 rx_fifo.empty_o_SB_DFF_Q_D_SB_LUT4_O_I0_SB_LUT4_O_1_I1_SB_LUT4_O_2_I0[0]
|
|
.sym 17720 i_sck$SB_IO_IN
|
|
.sym 17721 rx_fifo.empty_o_SB_DFF_Q_D_SB_LUT4_O_I0_SB_LUT4_O_1_I1[1]
|
|
.sym 17722 rx_fifo.empty_o_SB_DFF_Q_D_SB_LUT4_O_I0_SB_LUT4_O_1_I1_SB_LUT4_O_2_I0[1]
|
|
.sym 17723 rx_fifo.wr_addr[2]
|
|
.sym 17724 spi_if_ins.spi.r_tx_byte[7]
|
|
.sym 17726 i_mosi$SB_IO_IN
|
|
.sym 17730 spi_if_ins.spi.r_tx_bit_count[2]
|
|
.sym 17731 sys_ctrl_ins.i_cs_SB_DFFE_Q_D[0]
|
|
.sym 17736 spi_if_ins.w_rx_data[5]
|
|
.sym 17746 spi_if_ins.r_tx_byte[5]
|
|
.sym 17747 spi_if_ins.spi.SCKr_SB_LUT4_I0_O[1]
|
|
.sym 17750 spi_if_ins.r_tx_byte[3]
|
|
.sym 17753 spi_if_ins.r_tx_data_valid_SB_LUT4_I3_O
|
|
.sym 17755 spi_if_ins.r_tx_data_valid_SB_LUT4_I3_O
|
|
.sym 17757 spi_if_ins.spi.r_tx_byte_SB_DFFESR_Q_E
|
|
.sym 17759 spi_if_ins.r_tx_byte[1]
|
|
.sym 17760 spi_if_ins.spi.r_tx_byte_SB_DFFESR_Q_E
|
|
.sym 17762 spi_if_ins.spi.o_rx_data_valid_SB_LUT4_I3_O_SB_LUT4_I3_O[2]
|
|
.sym 17767 spi_if_ins.r_tx_byte[4]
|
|
.sym 17769 spi_if_ins.state_if_SB_DFFESR_Q_D[1]
|
|
.sym 17770 i_rst_b$SB_IO_IN
|
|
.sym 17772 spi_if_ins.spi.SCKr_SB_LUT4_I0_O[0]
|
|
.sym 17775 spi_if_ins.r_tx_byte[5]
|
|
.sym 17789 spi_if_ins.spi.r_tx_byte_SB_DFFESR_Q_E
|
|
.sym 17795 spi_if_ins.r_tx_byte[1]
|
|
.sym 17800 spi_if_ins.r_tx_byte[3]
|
|
.sym 17808 spi_if_ins.r_tx_byte[4]
|
|
.sym 17811 spi_if_ins.spi.o_rx_data_valid_SB_LUT4_I3_O_SB_LUT4_I3_O[2]
|
|
.sym 17813 spi_if_ins.state_if_SB_DFFESR_Q_D[1]
|
|
.sym 17814 i_rst_b$SB_IO_IN
|
|
.sym 17817 spi_if_ins.spi.SCKr_SB_LUT4_I0_O[0]
|
|
.sym 17819 spi_if_ins.spi.SCKr_SB_LUT4_I0_O[1]
|
|
.sym 17820 spi_if_ins.r_tx_data_valid_SB_LUT4_I3_O
|
|
.sym 17821 spi_if_ins.spi.r_tx_byte_SB_DFFESR_Q_E
|
|
.sym 17822 r_counter_$glb_clk
|
|
.sym 17823 spi_if_ins.r_tx_data_valid_SB_LUT4_I3_O
|
|
.sym 17824 spi_if_ins.spi.r_rx_byte[1]
|
|
.sym 17825 spi_if_ins.spi.r_rx_done_SB_DFFESR_Q_D_SB_LUT4_I3_O
|
|
.sym 17826 spi_if_ins.spi.r_rx_byte[5]
|
|
.sym 17827 spi_if_ins.spi.r_rx_byte[0]
|
|
.sym 17828 spi_if_ins.spi.r_rx_byte[7]
|
|
.sym 17829 spi_if_ins.spi.r_rx_byte[3]
|
|
.sym 17830 spi_if_ins.spi.r_rx_byte[6]
|
|
.sym 17831 spi_if_ins.spi.r_rx_byte[2]
|
|
.sym 17836 w_tx_data_smi[2]
|
|
.sym 17837 spi_if_ins.w_rx_data[7]
|
|
.sym 17841 spi_if_ins.r_tx_data_valid_SB_LUT4_I3_O
|
|
.sym 17842 spi_if_ins.r_tx_byte[5]
|
|
.sym 17843 spi_if_ins.r_tx_data_valid_SB_LUT4_I3_O
|
|
.sym 17847 w_tx_data_io[2]
|
|
.sym 17848 spi_if_ins.w_rx_data[6]
|
|
.sym 17850 spi_if_ins.w_rx_data[1]
|
|
.sym 17851 spi_if_ins.spi.o_spi_miso_SB_DFFE_Q_D_SB_LUT4_O_I2_SB_LUT4_O_I0_SB_LUT4_O_2_I0[3]
|
|
.sym 17852 spi_if_ins.spi.r_tx_bit_count[2]
|
|
.sym 17854 $PACKER_VCC_NET
|
|
.sym 17855 spi_if_ins.spi.r_tx_byte[4]
|
|
.sym 17856 spi_if_ins.w_rx_data[7]
|
|
.sym 17859 spi_if_ins.spi.r_rx_done_SB_DFFESR_Q_D_SB_LUT4_I3_O
|
|
.sym 17865 i_sck$SB_IO_IN
|
|
.sym 17866 spi_if_ins.spi.o_spi_miso_SB_DFFE_Q_D_SB_LUT4_O_I2_SB_LUT4_O_I0_SB_LUT4_O_2_I0[1]
|
|
.sym 17868 spi_if_ins.spi.r_tx_byte[1]
|
|
.sym 17869 spi_if_ins.spi.o_spi_miso_SB_DFFE_Q_D_SB_LUT4_O_I2_SB_LUT4_O_I0_SB_LUT4_O_2_I0[0]
|
|
.sym 17873 spi_if_ins.spi.r_tx_byte[5]
|
|
.sym 17874 spi_if_ins.spi.r_tx_bit_count[2]
|
|
.sym 17876 spi_if_ins.spi.o_spi_miso_SB_DFFE_Q_D_SB_LUT4_O_I2_SB_LUT4_O_I0_SB_LUT4_O_2_I0[3]
|
|
.sym 17883 spi_if_ins.spi.r_rx_done_SB_DFFESR_Q_D_SB_LUT4_I3_O
|
|
.sym 17884 spi_if_ins.spi.SCKr_SB_LUT4_I0_O[0]
|
|
.sym 17889 spi_if_ins.spi.r_temp_rx_byte[3]
|
|
.sym 17899 spi_if_ins.spi.r_temp_rx_byte[3]
|
|
.sym 17904 spi_if_ins.spi.SCKr_SB_LUT4_I0_O[0]
|
|
.sym 17905 spi_if_ins.spi.o_spi_miso_SB_DFFE_Q_D_SB_LUT4_O_I2_SB_LUT4_O_I0_SB_LUT4_O_2_I0[3]
|
|
.sym 17906 spi_if_ins.spi.o_spi_miso_SB_DFFE_Q_D_SB_LUT4_O_I2_SB_LUT4_O_I0_SB_LUT4_O_2_I0[1]
|
|
.sym 17907 spi_if_ins.spi.o_spi_miso_SB_DFFE_Q_D_SB_LUT4_O_I2_SB_LUT4_O_I0_SB_LUT4_O_2_I0[0]
|
|
.sym 17923 spi_if_ins.spi.r_tx_byte[1]
|
|
.sym 17924 spi_if_ins.spi.r_tx_bit_count[2]
|
|
.sym 17925 spi_if_ins.spi.r_tx_byte[5]
|
|
.sym 17944 spi_if_ins.spi.r_rx_done_SB_DFFESR_Q_D_SB_LUT4_I3_O
|
|
.sym 17945 i_sck$SB_IO_IN
|
|
.sym 17947 spi_if_ins.spi.r_temp_rx_byte[3]
|
|
.sym 17948 spi_if_ins.spi.r_temp_rx_byte[2]
|
|
.sym 17949 spi_if_ins.spi.r_temp_rx_byte[5]
|
|
.sym 17950 spi_if_ins.spi.r_temp_rx_byte[1]
|
|
.sym 17951 spi_if_ins.spi.r_temp_rx_byte[4]
|
|
.sym 17952 spi_if_ins.spi.r_temp_rx_byte[6]
|
|
.sym 17953 spi_if_ins.spi.r_temp_rx_byte[0]
|
|
.sym 17961 w_tx_fifo_push
|
|
.sym 17963 spi_if_ins.spi.o_spi_miso_SB_DFFE_Q_D_SB_LUT4_O_I2_SB_LUT4_O_I0[3]
|
|
.sym 17964 spi_if_ins.spi.r_tx_byte[6]
|
|
.sym 17966 i_ss$SB_IO_IN
|
|
.sym 17968 spi_if_ins.spi.r_rx_done_SB_DFFESR_Q_D_SB_LUT4_I3_O
|
|
.sym 17971 tx_fifo.wr_addr_gray_SB_DFFE_Q_3_D[1]
|
|
.sym 17972 spi_if_ins.w_rx_data[1]
|
|
.sym 17974 spi_if_ins.spi.o_rx_data_valid_SB_LUT4_I3_O_SB_LUT4_I3_O[2]
|
|
.sym 17975 tx_fifo.empty_o_SB_LUT4_I3_O_SB_LUT4_O_1_I0[2]
|
|
.sym 17976 tx_fifo.rd_addr[0]
|
|
.sym 17978 $PACKER_VCC_NET
|
|
.sym 17979 spi_if_ins.state_if_SB_DFFESR_Q_2_D[1]
|
|
.sym 17980 spi_if_ins.w_rx_data[5]
|
|
.sym 17990 spi_if_ins.spi.r3_rx_done_SB_LUT4_I2_O
|
|
.sym 17991 spi_if_ins.state_if_SB_DFFESR_Q_E_SB_LUT4_O_I2[1]
|
|
.sym 17995 spi_if_ins.spi.r_tx_byte[0]
|
|
.sym 17996 spi_if_ins.spi.r_rx_byte[4]
|
|
.sym 18000 spi_if_ins.spi.r_tx_bit_count[2]
|
|
.sym 18006 spi_if_ins.w_rx_data[5]
|
|
.sym 18008 spi_if_ins.w_rx_data[6]
|
|
.sym 18010 spi_if_ins.state_if_SB_DFFESR_Q_D[2]
|
|
.sym 18015 spi_if_ins.spi.r_tx_byte[4]
|
|
.sym 18027 spi_if_ins.spi.r_tx_byte[0]
|
|
.sym 18028 spi_if_ins.spi.r_tx_byte[4]
|
|
.sym 18029 spi_if_ins.spi.r_tx_bit_count[2]
|
|
.sym 18034 spi_if_ins.spi.r_rx_byte[4]
|
|
.sym 18040 spi_if_ins.w_rx_data[6]
|
|
.sym 18042 spi_if_ins.w_rx_data[5]
|
|
.sym 18047 spi_if_ins.state_if_SB_DFFESR_Q_D[2]
|
|
.sym 18048 spi_if_ins.state_if_SB_DFFESR_Q_E_SB_LUT4_O_I2[1]
|
|
.sym 18067 spi_if_ins.spi.r3_rx_done_SB_LUT4_I2_O
|
|
.sym 18068 r_counter_$glb_clk
|
|
.sym 18070 w_rx_data[7]
|
|
.sym 18072 w_rx_data[6]
|
|
.sym 18075 w_rx_data[5]
|
|
.sym 18076 w_rx_data[1]
|
|
.sym 18077 w_rx_data[4]
|
|
.sym 18085 w_tx_fifo_pull
|
|
.sym 18087 spi_if_ins.o_load_cmd_SB_LUT4_I3_O_SB_LUT4_I3_2_O
|
|
.sym 18093 spi_if_ins.o_load_cmd_SB_LUT4_I3_1_I0[2]
|
|
.sym 18095 spi_if_ins.w_rx_data[4]
|
|
.sym 18097 sys_ctrl_ins.i_cs_SB_DFFE_Q_D[0]
|
|
.sym 18098 spi_if_ins.o_load_cmd_SB_LUT4_I3_1_I0[2]
|
|
.sym 18099 spi_if_ins.o_load_cmd_SB_DFFESR_Q_E
|
|
.sym 18100 spi_if_ins.spi.o_spi_miso_SB_DFFE_Q_D_SB_LUT4_O_I2_SB_LUT4_O_I0[1]
|
|
.sym 18101 w_rx_data[4]
|
|
.sym 18103 tx_fifo.wr_addr[9]
|
|
.sym 18104 io_ctrl_ins.o_data_out_SB_DFFESR_Q_E
|
|
.sym 18111 w_cs[2]
|
|
.sym 18112 spi_if_ins.spi.r_tx_byte[2]
|
|
.sym 18114 spi_if_ins.o_fetch_cmd_SB_DFFESR_Q_E_SB_LUT4_O_I1[1]
|
|
.sym 18116 spi_if_ins.o_load_cmd_SB_LUT4_I3_1_I0[2]
|
|
.sym 18118 spi_if_ins.r_tx_data_valid_SB_DFFESR_Q_D[1]
|
|
.sym 18119 i_rst_b$SB_IO_IN
|
|
.sym 18120 w_load
|
|
.sym 18121 spi_if_ins.spi.o_spi_miso_SB_DFFE_Q_D_SB_LUT4_O_I2_SB_LUT4_O_I0_SB_LUT4_O_2_I0[3]
|
|
.sym 18122 spi_if_ins.state_if_SB_DFFESR_Q_E
|
|
.sym 18123 io_ctrl_ins.o_data_out_SB_DFFESR_Q_6_R[1]
|
|
.sym 18124 spi_if_ins.spi.r_tx_bit_count[2]
|
|
.sym 18126 spi_if_ins.o_fetch_cmd_SB_DFFESR_Q_E_SB_LUT4_O_I1[2]
|
|
.sym 18127 spi_if_ins.o_fetch_cmd_SB_DFFESR_Q_E_SB_LUT4_O_I1[0]
|
|
.sym 18128 spi_if_ins.w_rx_data[7]
|
|
.sym 18131 tx_fifo.wr_addr_gray_SB_DFFE_Q_3_D[1]
|
|
.sym 18132 io_ctrl_ins.o_data_out_SB_DFFESR_Q_6_R[0]
|
|
.sym 18133 w_fetch
|
|
.sym 18134 tx_fifo.full_o_SB_DFF_Q_D_SB_LUT4_O_I0_SB_LUT4_O_I0_SB_LUT4_O_1_I3[0]
|
|
.sym 18136 spi_if_ins.spi.r_tx_byte[6]
|
|
.sym 18138 w_cs[1]
|
|
.sym 18139 spi_if_ins.state_if_SB_DFFESR_Q_2_D[1]
|
|
.sym 18140 io_ctrl_ins.o_data_out_SB_DFFESR_Q_6_R[2]
|
|
.sym 18141 w_fetch
|
|
.sym 18144 w_load
|
|
.sym 18145 w_fetch
|
|
.sym 18146 w_cs[1]
|
|
.sym 18147 spi_if_ins.o_load_cmd_SB_LUT4_I3_1_I0[2]
|
|
.sym 18150 spi_if_ins.state_if_SB_DFFESR_Q_2_D[1]
|
|
.sym 18151 spi_if_ins.o_fetch_cmd_SB_DFFESR_Q_E_SB_LUT4_O_I1[0]
|
|
.sym 18152 spi_if_ins.w_rx_data[7]
|
|
.sym 18156 io_ctrl_ins.o_data_out_SB_DFFESR_Q_6_R[2]
|
|
.sym 18157 io_ctrl_ins.o_data_out_SB_DFFESR_Q_6_R[0]
|
|
.sym 18159 io_ctrl_ins.o_data_out_SB_DFFESR_Q_6_R[1]
|
|
.sym 18162 i_rst_b$SB_IO_IN
|
|
.sym 18164 spi_if_ins.r_tx_data_valid_SB_DFFESR_Q_D[1]
|
|
.sym 18165 spi_if_ins.o_fetch_cmd_SB_DFFESR_Q_E_SB_LUT4_O_I1[0]
|
|
.sym 18170 tx_fifo.wr_addr_gray_SB_DFFE_Q_3_D[1]
|
|
.sym 18171 tx_fifo.full_o_SB_DFF_Q_D_SB_LUT4_O_I0_SB_LUT4_O_I0_SB_LUT4_O_1_I3[0]
|
|
.sym 18174 i_rst_b$SB_IO_IN
|
|
.sym 18175 spi_if_ins.o_fetch_cmd_SB_DFFESR_Q_E_SB_LUT4_O_I1[0]
|
|
.sym 18176 spi_if_ins.o_fetch_cmd_SB_DFFESR_Q_E_SB_LUT4_O_I1[1]
|
|
.sym 18177 spi_if_ins.o_fetch_cmd_SB_DFFESR_Q_E_SB_LUT4_O_I1[2]
|
|
.sym 18180 w_cs[2]
|
|
.sym 18181 io_ctrl_ins.o_data_out_SB_DFFESR_Q_6_R[0]
|
|
.sym 18182 w_fetch
|
|
.sym 18183 i_rst_b$SB_IO_IN
|
|
.sym 18186 spi_if_ins.spi.r_tx_byte[2]
|
|
.sym 18187 spi_if_ins.spi.r_tx_byte[6]
|
|
.sym 18188 spi_if_ins.spi.o_spi_miso_SB_DFFE_Q_D_SB_LUT4_O_I2_SB_LUT4_O_I0_SB_LUT4_O_2_I0[3]
|
|
.sym 18189 spi_if_ins.spi.r_tx_bit_count[2]
|
|
.sym 18190 spi_if_ins.state_if_SB_DFFESR_Q_E
|
|
.sym 18191 r_counter_$glb_clk
|
|
.sym 18192 i_rst_b_SB_LUT4_I3_O_$glb_sr
|
|
.sym 18193 spi_if_ins.o_fetch_cmd_SB_DFFESR_Q_E_SB_LUT4_O_I1[0]
|
|
.sym 18194 w_ioc[4]
|
|
.sym 18195 w_ioc[3]
|
|
.sym 18196 w_ioc[0]
|
|
.sym 18197 w_ioc[2]
|
|
.sym 18198 io_ctrl_ins.o_data_out_SB_DFFESR_Q_6_R[0]
|
|
.sym 18199 w_cs[0]
|
|
.sym 18200 w_ioc[1]
|
|
.sym 18207 w_tx_fifo_pulled_data[24]
|
|
.sym 18208 w_tx_fifo_push
|
|
.sym 18209 w_tx_fifo_full
|
|
.sym 18212 w_tx_data_sys[0]
|
|
.sym 18216 w_rx_data[6]
|
|
.sym 18217 w_rx_data[6]
|
|
.sym 18219 io_ctrl_ins.rx_h_state_SB_DFFE_Q_E
|
|
.sym 18220 spi_if_ins.state_if[0]
|
|
.sym 18222 tx_fifo.empty_o_SB_DFF_Q_D_SB_LUT4_O_I1_SB_LUT4_O_1_I3[1]
|
|
.sym 18223 w_rx_data[5]
|
|
.sym 18227 tx_fifo.empty_o_SB_DFF_Q_D_SB_LUT4_O_I1_SB_LUT4_O_1_I3_SB_LUT4_O_I3[1]
|
|
.sym 18236 io_ctrl_ins.o_data_out_SB_DFFESR_Q_6_E
|
|
.sym 18237 io_ctrl_ins.o_data_out_SB_DFFESR_Q_6_R[2]
|
|
.sym 18238 io_ctrl_ins.o_data_out_SB_DFFESR_Q_6_R[1]
|
|
.sym 18239 io_ctrl_ins.o_data_out_SB_DFFESR_Q_6_D_SB_LUT4_O_I2[0]
|
|
.sym 18240 spi_if_ins.o_fetch_cmd_SB_LUT4_I3_O[2]
|
|
.sym 18243 spi_if_ins.w_rx_data[7]
|
|
.sym 18247 w_rx_data[5]
|
|
.sym 18248 spi_if_ins.state_if[2]
|
|
.sym 18249 io_ctrl_ins.o_data_out_SB_DFFESR_Q_6_R_SB_LUT4_O_I0[2]
|
|
.sym 18251 w_ioc[4]
|
|
.sym 18253 io_ctrl_ins.o_data_out_SB_DFFESR_Q_6_D_SB_LUT4_O_I2[1]
|
|
.sym 18255 io_ctrl_ins.o_data_out_SB_DFFESR_Q_6_R[0]
|
|
.sym 18257 spi_if_ins.state_if_SB_DFFESR_Q_2_D[0]
|
|
.sym 18260 w_ioc[3]
|
|
.sym 18261 w_ioc[0]
|
|
.sym 18262 w_ioc[2]
|
|
.sym 18263 io_ctrl_ins.o_data_out_SB_DFFESR_Q_6_R_SB_LUT4_O_I1[1]
|
|
.sym 18265 w_ioc[1]
|
|
.sym 18269 w_rx_data[5]
|
|
.sym 18273 io_ctrl_ins.o_data_out_SB_DFFESR_Q_6_R[0]
|
|
.sym 18274 w_ioc[0]
|
|
.sym 18275 io_ctrl_ins.o_data_out_SB_DFFESR_Q_6_R[2]
|
|
.sym 18276 spi_if_ins.o_fetch_cmd_SB_LUT4_I3_O[2]
|
|
.sym 18280 io_ctrl_ins.o_data_out_SB_DFFESR_Q_6_D_SB_LUT4_O_I2[1]
|
|
.sym 18282 io_ctrl_ins.o_data_out_SB_DFFESR_Q_6_D_SB_LUT4_O_I2[0]
|
|
.sym 18285 spi_if_ins.state_if_SB_DFFESR_Q_2_D[0]
|
|
.sym 18287 spi_if_ins.state_if[2]
|
|
.sym 18288 spi_if_ins.w_rx_data[7]
|
|
.sym 18291 io_ctrl_ins.o_data_out_SB_DFFESR_Q_6_R_SB_LUT4_O_I0[2]
|
|
.sym 18292 w_ioc[2]
|
|
.sym 18293 io_ctrl_ins.o_data_out_SB_DFFESR_Q_6_R_SB_LUT4_O_I1[1]
|
|
.sym 18294 w_ioc[3]
|
|
.sym 18298 w_ioc[0]
|
|
.sym 18299 w_ioc[4]
|
|
.sym 18303 w_ioc[0]
|
|
.sym 18304 w_ioc[2]
|
|
.sym 18305 io_ctrl_ins.o_data_out_SB_DFFESR_Q_6_R_SB_LUT4_O_I0[2]
|
|
.sym 18306 w_ioc[3]
|
|
.sym 18311 w_ioc[4]
|
|
.sym 18312 w_ioc[1]
|
|
.sym 18313 io_ctrl_ins.o_data_out_SB_DFFESR_Q_6_E
|
|
.sym 18314 r_counter_$glb_clk
|
|
.sym 18315 io_ctrl_ins.o_data_out_SB_DFFESR_Q_6_R[1]
|
|
.sym 18316 io_ctrl_ins.rf_pin_state[4]
|
|
.sym 18317 io_ctrl_ins.rf_pin_state[6]
|
|
.sym 18318 io_ctrl_ins.rx_h_b_state_SB_LUT4_I0_O[1]
|
|
.sym 18319 io_ctrl_ins.tr_vc_1_b_state_SB_LUT4_I0_I2[2]
|
|
.sym 18320 io_ctrl_ins.rf_pin_state[7]
|
|
.sym 18321 io_ctrl_ins.o_data_out_SB_DFFESR_Q_6_R_SB_LUT4_O_I1[0]
|
|
.sym 18322 io_ctrl_ins.tr_vc_1_b_state_SB_LUT4_I0_I2[3]
|
|
.sym 18323 io_ctrl_ins.rf_pin_state[5]
|
|
.sym 18329 w_cs[0]
|
|
.sym 18330 w_tx_fifo_pulled_data[25]
|
|
.sym 18336 i_button$SB_IO_IN
|
|
.sym 18341 i_config[1]$SB_IO_IN
|
|
.sym 18348 w_cs[0]
|
|
.sym 18359 w_ioc[3]
|
|
.sym 18360 w_ioc[0]
|
|
.sym 18362 io_ctrl_ins.o_data_out_SB_DFFESR_Q_6_R_SB_LUT4_O_I1[1]
|
|
.sym 18363 io_ctrl_ins.o_data_out_SB_DFFESR_Q_6_R[2]
|
|
.sym 18364 w_ioc[1]
|
|
.sym 18366 w_ioc[4]
|
|
.sym 18368 spi_if_ins.o_load_cmd_SB_LUT4_I3_O_SB_LUT4_I3_1_O
|
|
.sym 18369 w_ioc[2]
|
|
.sym 18370 io_ctrl_ins.o_data_out_SB_DFFESR_Q_6_R[0]
|
|
.sym 18371 w_rx_data[4]
|
|
.sym 18372 io_ctrl_ins.o_data_out_SB_DFFESR_Q_6_R_SB_LUT4_O_I0[2]
|
|
.sym 18377 w_rx_data[6]
|
|
.sym 18386 io_ctrl_ins.o_data_out_SB_DFFESR_Q_6_R_SB_LUT4_O_I1[0]
|
|
.sym 18387 spi_if_ins.o_fetch_cmd_SB_LUT4_I3_O[2]
|
|
.sym 18390 io_ctrl_ins.o_data_out_SB_DFFESR_Q_6_R_SB_LUT4_O_I0[2]
|
|
.sym 18391 w_ioc[0]
|
|
.sym 18392 w_ioc[3]
|
|
.sym 18393 w_ioc[2]
|
|
.sym 18396 w_ioc[1]
|
|
.sym 18397 w_ioc[4]
|
|
.sym 18398 w_ioc[0]
|
|
.sym 18399 io_ctrl_ins.o_data_out_SB_DFFESR_Q_6_R_SB_LUT4_O_I1[0]
|
|
.sym 18403 w_ioc[0]
|
|
.sym 18404 io_ctrl_ins.o_data_out_SB_DFFESR_Q_6_R[0]
|
|
.sym 18409 w_rx_data[6]
|
|
.sym 18415 w_rx_data[4]
|
|
.sym 18420 spi_if_ins.o_fetch_cmd_SB_LUT4_I3_O[2]
|
|
.sym 18421 io_ctrl_ins.o_data_out_SB_DFFESR_Q_6_R[0]
|
|
.sym 18423 io_ctrl_ins.o_data_out_SB_DFFESR_Q_6_R[2]
|
|
.sym 18426 w_ioc[3]
|
|
.sym 18427 w_ioc[2]
|
|
.sym 18428 w_ioc[4]
|
|
.sym 18429 w_ioc[1]
|
|
.sym 18432 w_ioc[1]
|
|
.sym 18434 io_ctrl_ins.o_data_out_SB_DFFESR_Q_6_R_SB_LUT4_O_I1[1]
|
|
.sym 18435 io_ctrl_ins.o_data_out_SB_DFFESR_Q_6_R_SB_LUT4_O_I1[0]
|
|
.sym 18436 spi_if_ins.o_load_cmd_SB_LUT4_I3_O_SB_LUT4_I3_1_O
|
|
.sym 18437 r_counter_$glb_clk
|
|
.sym 18439 io_ctrl_ins.mixer_en_state
|
|
.sym 18440 o_rx_h_tx_l$SB_IO_OUT
|
|
.sym 18441 io_ctrl_ins.tr_vc_1_state_SB_LUT4_I0_O[0]
|
|
.sym 18442 o_rx_h_tx_l_b$SB_IO_OUT
|
|
.sym 18443 o_shdn_tx_lna$SB_IO_OUT
|
|
.sym 18444 o_shdn_rx_lna$SB_IO_OUT
|
|
.sym 18445 io_ctrl_ins.tr_vc_2_state_SB_LUT4_I0_O[3]
|
|
.sym 18446 o_tr_vc2$SB_IO_OUT
|
|
.sym 18451 io_ctrl_ins.o_data_out_SB_DFFESR_Q_6_R_SB_LUT4_O_I0_SB_LUT4_I2_O[1]
|
|
.sym 18452 io_ctrl_ins.tr_vc_1_b_state_SB_LUT4_I0_I2[3]
|
|
.sym 18453 w_tx_fifo_pulled_data[0]
|
|
.sym 18454 io_ctrl_ins.o_data_out_SB_DFFESR_Q_R
|
|
.sym 18455 io_ctrl_ins.led1_state_SB_LUT4_I0_I2[1]
|
|
.sym 18457 spi_if_ins.o_load_cmd_SB_LUT4_I3_1_I0[2]
|
|
.sym 18458 i_config[3]$SB_IO_IN
|
|
.sym 18459 tx_fifo.wr_addr[8]
|
|
.sym 18460 spi_if_ins.o_load_cmd_SB_LUT4_I3_O_SB_LUT4_I3_2_O
|
|
.sym 18462 io_ctrl_ins.rx_h_b_state_SB_LUT4_I0_O[1]
|
|
.sym 18464 o_shdn_tx_lna$SB_IO_OUT
|
|
.sym 18473 w_rx_data[0]
|
|
.sym 18480 io_ctrl_ins.o_data_out_SB_DFFESR_Q_6_R_SB_LUT4_O_I0_SB_LUT4_I2_O[1]
|
|
.sym 18481 io_ctrl_ins.rf_mode[0]
|
|
.sym 18482 w_rx_data[3]
|
|
.sym 18484 io_ctrl_ins.rx_h_state_SB_DFFE_Q_D_SB_LUT4_O_I2[2]
|
|
.sym 18487 io_ctrl_ins.o_data_out_SB_DFFESR_Q_6_R_SB_LUT4_O_I1_SB_LUT4_I2_O[1]
|
|
.sym 18494 io_ctrl_ins.pmod_dir_state[0]
|
|
.sym 18495 w_rx_data[5]
|
|
.sym 18496 io_ctrl_ins.mixer_en_state
|
|
.sym 18498 spi_if_ins.o_load_cmd_SB_LUT4_I3_O_SB_LUT4_I3_2_O
|
|
.sym 18499 w_rx_data[0]
|
|
.sym 18503 io_ctrl_ins.rf_mode[2]
|
|
.sym 18505 io_ctrl_ins.rf_mode[1]
|
|
.sym 18510 spi_if_ins.o_load_cmd_SB_LUT4_I3_O[1]
|
|
.sym 18511 io_ctrl_ins.rf_mode[2]
|
|
.sym 18520 w_rx_data[3]
|
|
.sym 18525 io_ctrl_ins.mixer_en_state
|
|
.sym 18526 io_ctrl_ins.pmod_dir_state[0]
|
|
.sym 18527 io_ctrl_ins.o_data_out_SB_DFFESR_Q_6_R_SB_LUT4_O_I0_SB_LUT4_I2_O[1]
|
|
.sym 18528 io_ctrl_ins.o_data_out_SB_DFFESR_Q_6_R_SB_LUT4_O_I1_SB_LUT4_I2_O[1]
|
|
.sym 18532 w_rx_data[5]
|
|
.sym 18538 io_ctrl_ins.rf_mode[0]
|
|
.sym 18539 io_ctrl_ins.rf_mode[2]
|
|
.sym 18543 spi_if_ins.o_load_cmd_SB_LUT4_I3_O[1]
|
|
.sym 18545 io_ctrl_ins.o_data_out_SB_DFFESR_Q_6_R_SB_LUT4_O_I1_SB_LUT4_I2_O[1]
|
|
.sym 18552 w_rx_data[0]
|
|
.sym 18555 io_ctrl_ins.rf_mode[2]
|
|
.sym 18556 io_ctrl_ins.rx_h_state_SB_DFFE_Q_D_SB_LUT4_O_I2[2]
|
|
.sym 18557 io_ctrl_ins.rf_mode[0]
|
|
.sym 18558 io_ctrl_ins.rf_mode[1]
|
|
.sym 18559 spi_if_ins.o_load_cmd_SB_LUT4_I3_O_SB_LUT4_I3_2_O
|
|
.sym 18560 r_counter_$glb_clk
|
|
.sym 18562 i_config[1]$SB_IO_IN
|
|
.sym 18564 i_config[2]$SB_IO_IN
|
|
.sym 18574 w_tx_fifo_pulled_data[3]
|
|
.sym 18576 io_ctrl_ins.mixer_en_state_SB_LUT4_I0_O[3]
|
|
.sym 18580 io_ctrl_ins.tr_vc_1_state_SB_DFFE_Q_D_SB_LUT4_O_I0[0]
|
|
.sym 18581 io_ctrl_ins.tr_vc_1_state_SB_LUT4_I0_O[0]
|
|
.sym 18588 o_shdn_rx_lna$SB_IO_OUT
|
|
.sym 18589 io_ctrl_ins.rf_mode[1]
|
|
.sym 18633 o_led0$SB_IO_OUT
|
|
.sym 18636 w_smi_data_output[4]
|
|
.sym 18638 o_led0$SB_IO_OUT
|
|
.sym 18642 $PACKER_VCC_NET
|
|
.sym 18647 $PACKER_VCC_NET
|
|
.sym 18659 o_led0$SB_IO_OUT
|
|
.sym 18660 w_smi_data_output[4]
|
|
.sym 18662 w_rx_fifo_pulled_data[24]
|
|
.sym 18666 w_rx_fifo_pulled_data[26]
|
|
.sym 18691 w_smi_data_input[4]
|
|
.sym 18693 i_sck$SB_IO_IN
|
|
.sym 18695 i_mosi$SB_IO_IN
|
|
.sym 18703 w_rx_24_fifo_data[30]
|
|
.sym 18705 w_lvds_rx_09_d1_SB_LUT4_I0_O[0]
|
|
.sym 18707 w_rx_24_fifo_data[28]
|
|
.sym 18711 w_rx_09_fifo_data[28]
|
|
.sym 18713 w_rx_09_fifo_data[30]
|
|
.sym 18715 o_led1$SB_IO_OUT
|
|
.sym 18724 w_rx_09_fifo_data[26]
|
|
.sym 18725 w_rx_09_fifo_data[10]
|
|
.sym 18739 w_rx_09_fifo_data[26]
|
|
.sym 18751 w_rx_09_fifo_data[28]
|
|
.sym 18754 o_led1$SB_IO_OUT
|
|
.sym 18755 w_rx_24_fifo_data[28]
|
|
.sym 18756 w_rx_09_fifo_data[28]
|
|
.sym 18766 o_led1$SB_IO_OUT
|
|
.sym 18767 w_rx_24_fifo_data[30]
|
|
.sym 18768 w_rx_09_fifo_data[30]
|
|
.sym 18779 w_rx_09_fifo_data[10]
|
|
.sym 18782 w_lvds_rx_09_d1_SB_LUT4_I0_O[0]
|
|
.sym 18783 o_iq_tx_clk_p$SB_IO_OUT_$glb_clk
|
|
.sym 18785 i_smi_soe_se$SB_IO_IN
|
|
.sym 18787 w_smi_data_input[5]
|
|
.sym 18790 w_rx_fifo_pulled_data[25]
|
|
.sym 18794 w_rx_fifo_pulled_data[27]
|
|
.sym 18801 rx_fifo.wr_addr[3]
|
|
.sym 18802 smi_ctrl_ins.int_cnt_rx[3]
|
|
.sym 18805 w_lvds_rx_09_d1_SB_LUT4_I0_O[0]
|
|
.sym 18806 rx_fifo.wr_addr[5]
|
|
.sym 18807 rx_fifo.wr_addr[9]
|
|
.sym 18809 w_rx_fifo_push
|
|
.sym 18810 w_rx_fifo_pulled_data[24]
|
|
.sym 18817 w_rx_fifo_pulled_data[15]
|
|
.sym 18818 w_rx_09_fifo_data[26]
|
|
.sym 18821 w_rx_fifo_pulled_data[17]
|
|
.sym 18826 w_smi_data_output[5]
|
|
.sym 18830 rx_fifo.full_o_SB_DFF_Q_D_SB_LUT4_O_I0_SB_LUT4_O_1_I0[1]
|
|
.sym 18831 rx_fifo.rd_addr[7]
|
|
.sym 18832 rx_fifo.wr_addr[8]
|
|
.sym 18833 w_rx_fifo_data[30]
|
|
.sym 18834 w_smi_data_input[5]
|
|
.sym 18835 rx_fifo.rd_addr[0]
|
|
.sym 18838 w_rx_fifo_data[28]
|
|
.sym 18841 w_rx_fifo_data[19]
|
|
.sym 18842 rx_fifo.wr_addr[7]
|
|
.sym 18843 $PACKER_VCC_NET
|
|
.sym 18844 i_ss$SB_IO_IN
|
|
.sym 18846 w_rx_fifo_pulled_data[29]
|
|
.sym 18850 w_rx_fifo_pulled_data[26]
|
|
.sym 18851 rx_fifo.empty_o_SB_DFF_Q_D_SB_LUT4_O_I0_SB_LUT4_O_1_I1_SB_LUT4_O_I3[2]
|
|
.sym 18852 w_rx_fifo_pulled_data[13]
|
|
.sym 18856 $PACKER_VCC_NET
|
|
.sym 18858 w_rx_fifo_data[28]
|
|
.sym 18872 w_rx_fifo_pulled_data[11]
|
|
.sym 18875 w_rx_fifo_pulled_data[15]
|
|
.sym 18876 w_rx_fifo_pulled_data[29]
|
|
.sym 18879 w_rx_fifo_pulled_data[17]
|
|
.sym 18883 w_rx_fifo_pulled_data[25]
|
|
.sym 18884 smi_ctrl_ins.r_fifo_pulled_data_SB_DFFNESR_Q_E
|
|
.sym 18889 o_led1$SB_IO_OUT
|
|
.sym 18890 smi_ctrl_ins.r_fifo_pulled_data_SB_DFFNESR_Q_E
|
|
.sym 18894 w_rx_24_fifo_data[19]
|
|
.sym 18897 w_rx_09_fifo_data[19]
|
|
.sym 18901 w_rx_fifo_pulled_data[15]
|
|
.sym 18914 smi_ctrl_ins.r_fifo_pulled_data_SB_DFFNESR_Q_E
|
|
.sym 18917 w_rx_24_fifo_data[19]
|
|
.sym 18918 w_rx_09_fifo_data[19]
|
|
.sym 18919 o_led1$SB_IO_OUT
|
|
.sym 18924 w_rx_fifo_pulled_data[25]
|
|
.sym 18930 w_rx_fifo_pulled_data[17]
|
|
.sym 18936 w_rx_fifo_pulled_data[29]
|
|
.sym 18942 w_rx_fifo_pulled_data[11]
|
|
.sym 18945 smi_ctrl_ins.r_fifo_pulled_data_SB_DFFNESR_Q_E
|
|
.sym 18946 smi_ctrl_ins.soe_and_reset_$glb_clk
|
|
.sym 18947 i_rst_b_SB_LUT4_I3_O_$glb_sr
|
|
.sym 18949 w_rx_fifo_pulled_data[28]
|
|
.sym 18953 w_rx_fifo_pulled_data[30]
|
|
.sym 18959 spi_if_ins.w_rx_data[3]
|
|
.sym 18962 w_rx_24_fifo_data[31]
|
|
.sym 18972 w_rx_fifo_pulled_data[14]
|
|
.sym 18974 w_lvds_rx_09_d1_SB_LUT4_I0_O[0]
|
|
.sym 18975 rx_fifo.rd_addr[0]
|
|
.sym 18976 w_rx_fifo_pulled_data[12]
|
|
.sym 18977 smi_ctrl_ins.o_smi_data_out_SB_DFFNE_Q_D_SB_LUT4_O_4_I3[1]
|
|
.sym 18978 w_rx_fifo_data[12]
|
|
.sym 18979 rx_fifo.rd_addr[7]
|
|
.sym 18980 $PACKER_VCC_NET
|
|
.sym 18981 rx_fifo.empty_o_SB_DFF_Q_D_SB_LUT4_O_I0_SB_LUT4_O_1_I1_SB_LUT4_O_I3[1]
|
|
.sym 18982 w_rx_09_fifo_data[13]
|
|
.sym 18990 w_rx_fifo_pulled_data[14]
|
|
.sym 19000 smi_ctrl_ins.r_fifo_pulled_data_SB_DFFNESR_Q_E
|
|
.sym 19002 w_rx_fifo_pulled_data[3]
|
|
.sym 19006 w_rx_fifo_pulled_data[2]
|
|
.sym 19010 w_rx_fifo_pulled_data[30]
|
|
.sym 19014 w_rx_fifo_pulled_data[28]
|
|
.sym 19017 w_rx_fifo_pulled_data[13]
|
|
.sym 19025 w_rx_fifo_pulled_data[30]
|
|
.sym 19035 w_rx_fifo_pulled_data[2]
|
|
.sym 19043 w_rx_fifo_pulled_data[3]
|
|
.sym 19049 w_rx_fifo_pulled_data[13]
|
|
.sym 19054 w_rx_fifo_pulled_data[14]
|
|
.sym 19060 w_rx_fifo_pulled_data[28]
|
|
.sym 19068 smi_ctrl_ins.r_fifo_pulled_data_SB_DFFNESR_Q_E
|
|
.sym 19069 smi_ctrl_ins.soe_and_reset_$glb_clk
|
|
.sym 19070 i_rst_b_SB_LUT4_I3_O_$glb_sr
|
|
.sym 19072 w_rx_fifo_pulled_data[29]
|
|
.sym 19076 w_rx_fifo_pulled_data[31]
|
|
.sym 19081 spi_if_ins.w_rx_data[2]
|
|
.sym 19083 smi_ctrl_ins.int_cnt_rx[3]
|
|
.sym 19084 rx_fifo.wr_addr[9]
|
|
.sym 19085 rx_fifo.wr_addr[5]
|
|
.sym 19088 rx_fifo.full_o_SB_DFF_Q_D_SB_LUT4_O_I0_SB_LUT4_O_1_I0[2]
|
|
.sym 19092 smi_ctrl_ins.r_fifo_pulled_data_SB_DFFNESR_Q_E
|
|
.sym 19095 w_rx_fifo_pulled_data[15]
|
|
.sym 19096 rx_fifo.rd_addr[8]
|
|
.sym 19098 w_rx_fifo_pulled_data[17]
|
|
.sym 19099 smi_ctrl_ins.o_smi_data_out_SB_DFFNE_Q_D_SB_LUT4_O_2_I3[1]
|
|
.sym 19100 rx_fifo.rd_addr[9]
|
|
.sym 19101 w_rx_fifo_data[14]
|
|
.sym 19105 w_rx_fifo_data[15]
|
|
.sym 19106 w_rx_fifo_pulled_data[19]
|
|
.sym 19113 w_rx_fifo_pulled_data[19]
|
|
.sym 19114 smi_ctrl_ins.r_fifo_pulled_data_SB_DFFNESR_Q_E
|
|
.sym 19116 w_rx_fifo_pulled_data[24]
|
|
.sym 19127 w_rx_fifo_pulled_data[26]
|
|
.sym 19133 w_rx_fifo_pulled_data[31]
|
|
.sym 19136 w_rx_fifo_pulled_data[12]
|
|
.sym 19137 w_rx_fifo_pulled_data[16]
|
|
.sym 19141 w_rx_fifo_pulled_data[18]
|
|
.sym 19146 w_rx_fifo_pulled_data[19]
|
|
.sym 19160 w_rx_fifo_pulled_data[12]
|
|
.sym 19164 w_rx_fifo_pulled_data[26]
|
|
.sym 19169 w_rx_fifo_pulled_data[18]
|
|
.sym 19177 w_rx_fifo_pulled_data[31]
|
|
.sym 19183 w_rx_fifo_pulled_data[16]
|
|
.sym 19190 w_rx_fifo_pulled_data[24]
|
|
.sym 19191 smi_ctrl_ins.r_fifo_pulled_data_SB_DFFNESR_Q_E
|
|
.sym 19192 smi_ctrl_ins.soe_and_reset_$glb_clk
|
|
.sym 19193 i_rst_b_SB_LUT4_I3_O_$glb_sr
|
|
.sym 19195 w_rx_fifo_pulled_data[16]
|
|
.sym 19199 w_rx_fifo_pulled_data[18]
|
|
.sym 19208 smi_ctrl_ins.r_fifo_pulled_data_SB_DFFNESR_Q_E
|
|
.sym 19218 rx_fifo.wr_addr[2]
|
|
.sym 19219 rx_fifo.full_o_SB_DFF_Q_D_SB_LUT4_O_I0_SB_LUT4_O_1_I0[1]
|
|
.sym 19221 rx_fifo.wr_addr[8]
|
|
.sym 19222 rx_fifo.full_o_SB_DFF_Q_D_SB_LUT4_O_I0_SB_LUT4_O_1_I0[1]
|
|
.sym 19225 w_rx_fifo_data[19]
|
|
.sym 19228 rx_fifo.wr_addr[7]
|
|
.sym 19237 w_rx_09_fifo_data[17]
|
|
.sym 19239 w_rx_09_fifo_data[14]
|
|
.sym 19241 w_rx_09_fifo_data[12]
|
|
.sym 19244 w_rx_24_fifo_data[12]
|
|
.sym 19246 w_lvds_rx_09_d1_SB_LUT4_I0_O[0]
|
|
.sym 19247 o_led1$SB_IO_OUT
|
|
.sym 19252 w_rx_09_fifo_data[19]
|
|
.sym 19253 w_rx_24_fifo_data[17]
|
|
.sym 19254 w_rx_09_fifo_data[13]
|
|
.sym 19257 w_rx_09_fifo_data[15]
|
|
.sym 19268 w_rx_09_fifo_data[17]
|
|
.sym 19270 w_rx_24_fifo_data[17]
|
|
.sym 19271 o_led1$SB_IO_OUT
|
|
.sym 19275 w_rx_09_fifo_data[17]
|
|
.sym 19280 w_rx_09_fifo_data[15]
|
|
.sym 19287 w_rx_09_fifo_data[12]
|
|
.sym 19288 o_led1$SB_IO_OUT
|
|
.sym 19289 w_rx_24_fifo_data[12]
|
|
.sym 19294 w_rx_09_fifo_data[12]
|
|
.sym 19298 w_rx_09_fifo_data[19]
|
|
.sym 19305 w_rx_09_fifo_data[13]
|
|
.sym 19313 w_rx_09_fifo_data[14]
|
|
.sym 19314 w_lvds_rx_09_d1_SB_LUT4_I0_O[0]
|
|
.sym 19315 o_iq_tx_clk_p$SB_IO_OUT_$glb_clk
|
|
.sym 19318 w_rx_fifo_pulled_data[17]
|
|
.sym 19322 w_rx_fifo_pulled_data[19]
|
|
.sym 19327 spi_if_ins.w_rx_data[0]
|
|
.sym 19329 $PACKER_VCC_NET
|
|
.sym 19330 rx_fifo.wr_addr[3]
|
|
.sym 19331 w_rx_09_fifo_data[21]
|
|
.sym 19334 rx_fifo.wr_addr[9]
|
|
.sym 19338 rx_fifo.wr_addr[5]
|
|
.sym 19341 i_sck$SB_IO_IN
|
|
.sym 19343 $PACKER_VCC_NET
|
|
.sym 19344 w_rx_fifo_pulled_data[21]
|
|
.sym 19348 rx_fifo.empty_o_SB_DFF_Q_D_SB_LUT4_O_I0_SB_LUT4_O_1_I1_SB_LUT4_O_I3[2]
|
|
.sym 19350 i_ss$SB_IO_IN
|
|
.sym 19352 w_rx_fifo_pulled_data[23]
|
|
.sym 19359 w_rx_24_fifo_data[14]
|
|
.sym 19360 smi_ctrl_ins.r_fifo_pulled_data_SB_DFFNESR_Q_E
|
|
.sym 19363 w_rx_09_fifo_data[21]
|
|
.sym 19367 w_rx_24_fifo_data[15]
|
|
.sym 19368 w_rx_fifo_pulled_data[21]
|
|
.sym 19370 w_rx_09_fifo_data[14]
|
|
.sym 19372 w_rx_09_fifo_data[15]
|
|
.sym 19375 w_rx_fifo_pulled_data[20]
|
|
.sym 19376 w_rx_fifo_pulled_data[23]
|
|
.sym 19384 w_rx_24_fifo_data[21]
|
|
.sym 19385 o_led1$SB_IO_OUT
|
|
.sym 19387 w_rx_fifo_pulled_data[22]
|
|
.sym 19392 w_rx_24_fifo_data[21]
|
|
.sym 19393 o_led1$SB_IO_OUT
|
|
.sym 19394 w_rx_09_fifo_data[21]
|
|
.sym 19400 w_rx_fifo_pulled_data[23]
|
|
.sym 19406 w_rx_fifo_pulled_data[21]
|
|
.sym 19409 w_rx_09_fifo_data[14]
|
|
.sym 19410 o_led1$SB_IO_OUT
|
|
.sym 19411 w_rx_24_fifo_data[14]
|
|
.sym 19421 w_rx_09_fifo_data[15]
|
|
.sym 19422 o_led1$SB_IO_OUT
|
|
.sym 19424 w_rx_24_fifo_data[15]
|
|
.sym 19430 w_rx_fifo_pulled_data[20]
|
|
.sym 19436 w_rx_fifo_pulled_data[22]
|
|
.sym 19437 smi_ctrl_ins.r_fifo_pulled_data_SB_DFFNESR_Q_E
|
|
.sym 19438 smi_ctrl_ins.soe_and_reset_$glb_clk
|
|
.sym 19439 i_rst_b_SB_LUT4_I3_O_$glb_sr
|
|
.sym 19441 w_rx_fifo_pulled_data[20]
|
|
.sym 19445 w_rx_fifo_pulled_data[22]
|
|
.sym 19450 w_rx_data[5]
|
|
.sym 19457 w_rx_09_fifo_data[16]
|
|
.sym 19460 smi_ctrl_ins.swe_and_reset
|
|
.sym 19464 rx_fifo.rd_addr[0]
|
|
.sym 19465 spi_if_ins.spi.r_rx_done_SB_DFFESR_Q_D[1]
|
|
.sym 19466 w_rx_fifo_data[12]
|
|
.sym 19467 w_rx_fifo_pulled_data[12]
|
|
.sym 19468 rx_fifo.rd_addr[7]
|
|
.sym 19470 rx_fifo.empty_o_SB_DFF_Q_D_SB_LUT4_O_I0_SB_LUT4_O_1_I1_SB_LUT4_O_I3[1]
|
|
.sym 19471 $PACKER_VCC_NET
|
|
.sym 19475 w_rx_fifo_pulled_data[14]
|
|
.sym 19482 $PACKER_VCC_NET
|
|
.sym 19484 rx_fifo.rd_addr_gray_SB_DFFE_Q_6_D_SB_LUT4_I0_O_SB_LUT4_O_I3[2]
|
|
.sym 19485 rx_fifo.rd_addr_gray_SB_DFFE_Q_6_D[1]
|
|
.sym 19488 rx_fifo.rd_addr_gray_SB_DFFE_Q_6_D_SB_LUT4_I0_O_SB_LUT4_O_I3[3]
|
|
.sym 19490 rx_fifo.wr_addr_gray_rd[4]
|
|
.sym 19496 rx_fifo.rd_addr_gray_SB_DFFE_Q_5_D_SB_LUT4_I0_O[1]
|
|
.sym 19499 rx_fifo.wr_addr_gray[4]
|
|
.sym 19500 rx_fifo.empty_o_SB_DFF_Q_D_SB_LUT4_O_I0_SB_LUT4_O_1_I1_SB_LUT4_O_2_I0[1]
|
|
.sym 19502 rx_fifo.rd_addr_gray_SB_DFFE_Q_6_D[3]
|
|
.sym 19510 rx_fifo.rd_addr_gray_SB_DFFE_Q_6_D_SB_LUT4_I0_O_SB_LUT4_O_I3[0]
|
|
.sym 19512 rx_fifo.rd_addr_gray_SB_DFFE_Q_6_D[0]
|
|
.sym 19523 rx_fifo.wr_addr_gray[4]
|
|
.sym 19532 rx_fifo.rd_addr_gray_SB_DFFE_Q_6_D[3]
|
|
.sym 19533 rx_fifo.rd_addr_gray_SB_DFFE_Q_6_D[0]
|
|
.sym 19534 rx_fifo.empty_o_SB_DFF_Q_D_SB_LUT4_O_I0_SB_LUT4_O_1_I1_SB_LUT4_O_2_I0[1]
|
|
.sym 19535 rx_fifo.rd_addr_gray_SB_DFFE_Q_6_D[1]
|
|
.sym 19540 rx_fifo.wr_addr_gray_rd[4]
|
|
.sym 19544 $PACKER_VCC_NET
|
|
.sym 19556 rx_fifo.rd_addr_gray_SB_DFFE_Q_6_D_SB_LUT4_I0_O_SB_LUT4_O_I3[2]
|
|
.sym 19557 rx_fifo.rd_addr_gray_SB_DFFE_Q_6_D_SB_LUT4_I0_O_SB_LUT4_O_I3[0]
|
|
.sym 19558 rx_fifo.rd_addr_gray_SB_DFFE_Q_6_D_SB_LUT4_I0_O_SB_LUT4_O_I3[3]
|
|
.sym 19559 rx_fifo.rd_addr_gray_SB_DFFE_Q_5_D_SB_LUT4_I0_O[1]
|
|
.sym 19561 r_counter_$glb_clk
|
|
.sym 19564 w_rx_fifo_pulled_data[21]
|
|
.sym 19568 w_rx_fifo_pulled_data[23]
|
|
.sym 19578 rx_fifo.wr_addr[9]
|
|
.sym 19579 rx_fifo.wr_addr[5]
|
|
.sym 19581 rx_fifo.rd_addr_gray_SB_DFFE_Q_6_D[1]
|
|
.sym 19583 rx_fifo.full_o_SB_DFF_Q_D_SB_LUT4_O_I0_SB_LUT4_O_1_I0[2]
|
|
.sym 19587 spi_if_ins.spi.r_rx_done_SB_DFFESR_Q_E
|
|
.sym 19589 rx_fifo.rd_addr[9]
|
|
.sym 19590 rx_fifo.empty_o_SB_DFF_Q_D_SB_LUT4_O_I0_SB_LUT4_O_1_I1_SB_LUT4_O_1_I0[3]
|
|
.sym 19591 w_rx_fifo_data[13]
|
|
.sym 19593 w_rx_fifo_data[14]
|
|
.sym 19594 spi_if_ins.o_cs_SB_LUT4_I0_O[1]
|
|
.sym 19597 w_rx_fifo_data[15]
|
|
.sym 19598 w_rx_fifo_pulled_data[15]
|
|
.sym 19605 $PACKER_VCC_NET
|
|
.sym 19606 spi_if_ins.spi.o_spi_miso_SB_DFFE_Q_E
|
|
.sym 19610 spi_if_ins.spi.SCKr[1]
|
|
.sym 19611 spi_if_ins.spi.SCKr[2]
|
|
.sym 19614 spi_if_ins.r_tx_data_valid_SB_LUT4_I3_O
|
|
.sym 19617 spi_if_ins.spi.r_tx_bit_count_SB_DFFESR_Q_R
|
|
.sym 19619 spi_if_ins.spi.SCKr_SB_LUT4_I0_O[0]
|
|
.sym 19620 i_ss$SB_IO_IN
|
|
.sym 19622 spi_if_ins.spi.r_tx_bit_count[2]
|
|
.sym 19623 spi_if_ins.spi.o_spi_miso_SB_DFFE_Q_D_SB_LUT4_O_I2_SB_LUT4_O_I0_SB_LUT4_O_2_I0[3]
|
|
.sym 19630 spi_if_ins.spi.r_rx_bit_count[2]
|
|
.sym 19632 spi_if_ins.spi.r_rx_bit_count[0]
|
|
.sym 19635 spi_if_ins.spi.r_rx_bit_count[1]
|
|
.sym 19636 $nextpnr_ICESTORM_LC_9$O
|
|
.sym 19638 spi_if_ins.spi.o_spi_miso_SB_DFFE_Q_D_SB_LUT4_O_I2_SB_LUT4_O_I0_SB_LUT4_O_2_I0[3]
|
|
.sym 19642 spi_if_ins.spi.r_tx_bit_count_SB_DFFESR_Q_D_SB_LUT4_O_I3[2]
|
|
.sym 19644 spi_if_ins.spi.SCKr_SB_LUT4_I0_O[0]
|
|
.sym 19645 $PACKER_VCC_NET
|
|
.sym 19649 spi_if_ins.spi.r_tx_bit_count[2]
|
|
.sym 19650 $PACKER_VCC_NET
|
|
.sym 19652 spi_if_ins.spi.r_tx_bit_count_SB_DFFESR_Q_D_SB_LUT4_O_I3[2]
|
|
.sym 19655 spi_if_ins.spi.o_spi_miso_SB_DFFE_Q_D_SB_LUT4_O_I2_SB_LUT4_O_I0_SB_LUT4_O_2_I0[3]
|
|
.sym 19661 i_ss$SB_IO_IN
|
|
.sym 19662 spi_if_ins.spi.r_rx_bit_count[2]
|
|
.sym 19663 spi_if_ins.spi.r_rx_bit_count[1]
|
|
.sym 19664 spi_if_ins.spi.r_rx_bit_count[0]
|
|
.sym 19667 spi_if_ins.r_tx_data_valid_SB_LUT4_I3_O
|
|
.sym 19668 spi_if_ins.spi.SCKr[1]
|
|
.sym 19669 spi_if_ins.spi.SCKr[2]
|
|
.sym 19674 spi_if_ins.spi.r_rx_bit_count[0]
|
|
.sym 19675 spi_if_ins.spi.r_rx_bit_count[1]
|
|
.sym 19676 spi_if_ins.spi.r_rx_bit_count[2]
|
|
.sym 19679 $PACKER_VCC_NET
|
|
.sym 19680 spi_if_ins.spi.SCKr_SB_LUT4_I0_O[0]
|
|
.sym 19681 spi_if_ins.spi.o_spi_miso_SB_DFFE_Q_D_SB_LUT4_O_I2_SB_LUT4_O_I0_SB_LUT4_O_2_I0[3]
|
|
.sym 19683 spi_if_ins.spi.o_spi_miso_SB_DFFE_Q_E
|
|
.sym 19684 r_counter_$glb_clk
|
|
.sym 19685 spi_if_ins.spi.r_tx_bit_count_SB_DFFESR_Q_R
|
|
.sym 19687 w_rx_fifo_pulled_data[12]
|
|
.sym 19691 w_rx_fifo_pulled_data[14]
|
|
.sym 19697 w_cs[0]
|
|
.sym 19698 i_mosi$SB_IO_IN
|
|
.sym 19700 spi_if_ins.spi.o_spi_miso_SB_DFFE_Q_E
|
|
.sym 19704 spi_if_ins.spi.r_tx_bit_count[2]
|
|
.sym 19706 rx_fifo.rd_addr[8]
|
|
.sym 19708 w_rx_fifo_data[21]
|
|
.sym 19709 rx_fifo.empty_o_SB_LUT4_I2_O[0]
|
|
.sym 19710 spi_if_ins.spi.o_spi_miso_SB_DFFE_Q_D_SB_LUT4_O_I2_SB_LUT4_O_I0[0]
|
|
.sym 19711 rx_fifo.rd_addr[0]
|
|
.sym 19712 rx_fifo.empty_o_SB_DFF_Q_D_SB_LUT4_O_I0_SB_LUT4_O_1_I1_SB_LUT4_O_I3[1]
|
|
.sym 19713 rx_fifo.rd_addr[7]
|
|
.sym 19714 w_tx_fifo_data[22]
|
|
.sym 19715 rx_fifo.empty_o_SB_DFF_Q_D_SB_LUT4_O_I0_SB_LUT4_O_1_I1_SB_LUT4_O_2_I0[3]
|
|
.sym 19716 rx_fifo.wr_addr[7]
|
|
.sym 19717 spi_if_ins.spi.o_spi_miso_SB_DFFE_Q_E
|
|
.sym 19718 w_rx_data[7]
|
|
.sym 19719 rx_fifo.full_o_SB_DFF_Q_D_SB_LUT4_O_I0_SB_LUT4_O_1_I0[1]
|
|
.sym 19721 spi_if_ins.spi.SCKr_SB_LUT4_I0_O[0]
|
|
.sym 19727 spi_if_ins.spi.SCKr[0]
|
|
.sym 19729 rx_fifo.empty_o_SB_DFF_Q_D_SB_LUT4_O_I0_SB_LUT4_O_1_I1_SB_LUT4_O_2_I0[1]
|
|
.sym 19730 rx_fifo.empty_o_SB_DFF_Q_D_SB_LUT4_O_I0_SB_LUT4_O_1_I1[1]
|
|
.sym 19731 spi_if_ins.spi.r_tx_byte[7]
|
|
.sym 19733 rx_fifo.empty_o_SB_DFF_Q_D_SB_LUT4_O_I0_SB_LUT4_O_1_I1[0]
|
|
.sym 19734 rx_fifo.empty_o_SB_DFF_Q_D_SB_LUT4_O_I0_SB_LUT4_O_1_I1_SB_LUT4_O_2_I0[0]
|
|
.sym 19735 i_sck$SB_IO_IN
|
|
.sym 19736 rx_fifo.empty_o_SB_DFF_Q_D_SB_LUT4_O_I0_SB_LUT4_O_1_I1_SB_LUT4_O_2_I0[3]
|
|
.sym 19737 spi_if_ins.spi.r_tx_bit_count[2]
|
|
.sym 19738 spi_if_ins.spi.o_spi_miso_SB_DFFE_Q_D_SB_LUT4_O_I2_SB_LUT4_O_I0_SB_LUT4_O_2_I0[3]
|
|
.sym 19741 rx_fifo.empty_o_SB_DFF_Q_D_SB_LUT4_O_I0_SB_LUT4_O_1_I1_SB_LUT4_O_1_I0[3]
|
|
.sym 19743 w_cs[3]
|
|
.sym 19745 w_cs[2]
|
|
.sym 19746 w_cs[1]
|
|
.sym 19750 w_cs[0]
|
|
.sym 19754 rx_fifo.empty_o_SB_DFF_Q_D_SB_LUT4_O_I0_SB_LUT4_O_1_I1[2]
|
|
.sym 19755 spi_if_ins.spi.r_tx_byte[3]
|
|
.sym 19757 spi_if_ins.spi.SCKr[1]
|
|
.sym 19758 spi_if_ins.spi.SCKr[2]
|
|
.sym 19763 i_sck$SB_IO_IN
|
|
.sym 19766 w_cs[1]
|
|
.sym 19767 w_cs[2]
|
|
.sym 19768 w_cs[0]
|
|
.sym 19769 w_cs[3]
|
|
.sym 19772 rx_fifo.empty_o_SB_DFF_Q_D_SB_LUT4_O_I0_SB_LUT4_O_1_I1[0]
|
|
.sym 19774 rx_fifo.empty_o_SB_DFF_Q_D_SB_LUT4_O_I0_SB_LUT4_O_1_I1[2]
|
|
.sym 19775 rx_fifo.empty_o_SB_DFF_Q_D_SB_LUT4_O_I0_SB_LUT4_O_1_I1[1]
|
|
.sym 19778 rx_fifo.empty_o_SB_DFF_Q_D_SB_LUT4_O_I0_SB_LUT4_O_1_I1_SB_LUT4_O_1_I0[3]
|
|
.sym 19779 rx_fifo.empty_o_SB_DFF_Q_D_SB_LUT4_O_I0_SB_LUT4_O_1_I1_SB_LUT4_O_2_I0[1]
|
|
.sym 19780 rx_fifo.empty_o_SB_DFF_Q_D_SB_LUT4_O_I0_SB_LUT4_O_1_I1_SB_LUT4_O_2_I0[0]
|
|
.sym 19781 rx_fifo.empty_o_SB_DFF_Q_D_SB_LUT4_O_I0_SB_LUT4_O_1_I1_SB_LUT4_O_2_I0[3]
|
|
.sym 19784 spi_if_ins.spi.r_tx_byte[7]
|
|
.sym 19785 spi_if_ins.spi.r_tx_byte[3]
|
|
.sym 19786 spi_if_ins.spi.o_spi_miso_SB_DFFE_Q_D_SB_LUT4_O_I2_SB_LUT4_O_I0_SB_LUT4_O_2_I0[3]
|
|
.sym 19787 spi_if_ins.spi.r_tx_bit_count[2]
|
|
.sym 19790 spi_if_ins.spi.r_tx_bit_count[2]
|
|
.sym 19791 spi_if_ins.spi.o_spi_miso_SB_DFFE_Q_D_SB_LUT4_O_I2_SB_LUT4_O_I0_SB_LUT4_O_2_I0[3]
|
|
.sym 19792 spi_if_ins.spi.SCKr[1]
|
|
.sym 19793 spi_if_ins.spi.SCKr[2]
|
|
.sym 19798 spi_if_ins.spi.SCKr[0]
|
|
.sym 19804 spi_if_ins.spi.SCKr[1]
|
|
.sym 19807 r_counter_$glb_clk
|
|
.sym 19810 w_rx_fifo_pulled_data[13]
|
|
.sym 19814 w_rx_fifo_pulled_data[15]
|
|
.sym 19821 rx_fifo.wr_addr[5]
|
|
.sym 19822 $PACKER_VCC_NET
|
|
.sym 19824 rx_fifo.wr_addr[3]
|
|
.sym 19825 spi_if_ins.o_cs_SB_LUT4_I0_O[1]
|
|
.sym 19827 w_cs[3]
|
|
.sym 19828 spi_if_ins.o_fetch_cmd_SB_DFFESR_Q_E_SB_LUT4_O_I1[2]
|
|
.sym 19829 rx_fifo.wr_addr[9]
|
|
.sym 19831 w_cs[2]
|
|
.sym 19833 i_sck$SB_IO_IN
|
|
.sym 19836 tx_fifo.wr_addr[8]
|
|
.sym 19838 i_sck$SB_IO_IN
|
|
.sym 19839 tx_fifo.wr_addr[6]
|
|
.sym 19840 tx_fifo.wr_addr[4]
|
|
.sym 19844 w_tx_fifo_data[21]
|
|
.sym 19850 spi_if_ins.spi.r_rx_byte[1]
|
|
.sym 19852 spi_if_ins.spi.r_rx_byte[5]
|
|
.sym 19854 spi_if_ins.spi.r_rx_byte[7]
|
|
.sym 19855 spi_if_ins.spi.r_rx_byte[3]
|
|
.sym 19857 spi_if_ins.spi.r_rx_byte[2]
|
|
.sym 19861 spi_if_ins.spi.r_rx_byte[0]
|
|
.sym 19864 spi_if_ins.spi.r_rx_byte[6]
|
|
.sym 19877 spi_if_ins.spi.r3_rx_done_SB_LUT4_I2_O
|
|
.sym 19890 spi_if_ins.spi.r_rx_byte[5]
|
|
.sym 19896 spi_if_ins.spi.r_rx_byte[6]
|
|
.sym 19902 spi_if_ins.spi.r_rx_byte[1]
|
|
.sym 19910 spi_if_ins.spi.r_rx_byte[3]
|
|
.sym 19913 spi_if_ins.spi.r_rx_byte[2]
|
|
.sym 19921 spi_if_ins.spi.r_rx_byte[7]
|
|
.sym 19928 spi_if_ins.spi.r_rx_byte[0]
|
|
.sym 19929 spi_if_ins.spi.r3_rx_done_SB_LUT4_I2_O
|
|
.sym 19930 r_counter_$glb_clk
|
|
.sym 19933 w_tx_fifo_pulled_data[20]
|
|
.sym 19937 w_tx_fifo_pulled_data[22]
|
|
.sym 19948 spi_if_ins.w_rx_data[5]
|
|
.sym 19952 spi_if_ins.w_rx_data[1]
|
|
.sym 19958 w_tx_fifo_data[23]
|
|
.sym 19959 w_tx_fifo_pulled_data[22]
|
|
.sym 19961 tx_fifo.empty_o_SB_LUT4_I3_O_SB_LUT4_O_1_I0[3]
|
|
.sym 19962 w_tx_fifo_pulled_data[21]
|
|
.sym 19963 tx_fifo.rd_addr[9]
|
|
.sym 19964 $PACKER_VCC_NET
|
|
.sym 19965 w_cs[0]
|
|
.sym 19967 w_tx_fifo_data[3]
|
|
.sym 19974 spi_if_ins.spi.r_rx_done_SB_DFFESR_Q_D[1]
|
|
.sym 19975 spi_if_ins.spi.r_rx_done_SB_DFFESR_Q_D_SB_LUT4_I3_O
|
|
.sym 19978 spi_if_ins.spi.r_temp_rx_byte[6]
|
|
.sym 19979 spi_if_ins.spi.r_temp_rx_byte[0]
|
|
.sym 19981 i_ss$SB_IO_IN
|
|
.sym 19982 spi_if_ins.spi.r_temp_rx_byte[2]
|
|
.sym 19983 spi_if_ins.spi.r_temp_rx_byte[5]
|
|
.sym 19984 spi_if_ins.spi.r_temp_rx_byte[1]
|
|
.sym 19985 spi_if_ins.spi.r_temp_rx_byte[4]
|
|
.sym 19986 i_mosi$SB_IO_IN
|
|
.sym 19998 i_sck$SB_IO_IN
|
|
.sym 20008 spi_if_ins.spi.r_temp_rx_byte[0]
|
|
.sym 20012 i_ss$SB_IO_IN
|
|
.sym 20014 spi_if_ins.spi.r_rx_done_SB_DFFESR_Q_D[1]
|
|
.sym 20019 spi_if_ins.spi.r_temp_rx_byte[4]
|
|
.sym 20027 i_mosi$SB_IO_IN
|
|
.sym 20033 spi_if_ins.spi.r_temp_rx_byte[6]
|
|
.sym 20037 spi_if_ins.spi.r_temp_rx_byte[2]
|
|
.sym 20045 spi_if_ins.spi.r_temp_rx_byte[5]
|
|
.sym 20051 spi_if_ins.spi.r_temp_rx_byte[1]
|
|
.sym 20052 spi_if_ins.spi.r_rx_done_SB_DFFESR_Q_D_SB_LUT4_I3_O
|
|
.sym 20053 i_sck$SB_IO_IN
|
|
.sym 20056 w_tx_fifo_pulled_data[21]
|
|
.sym 20060 w_tx_fifo_pulled_data[23]
|
|
.sym 20067 spi_if_ins.spi.o_spi_miso_SB_DFFE_Q_D_SB_LUT4_O_I2_SB_LUT4_O_I0[1]
|
|
.sym 20071 spi_if_ins.spi.r_tx_byte_SB_DFFESR_Q_E
|
|
.sym 20073 w_tx_fifo_data[20]
|
|
.sym 20076 w_tx_fifo_pulled_data[20]
|
|
.sym 20080 w_rx_data[1]
|
|
.sym 20082 tx_fifo.empty_o_SB_LUT4_I3_O_SB_LUT4_O_1_I0[3]
|
|
.sym 20085 tx_fifo.empty_o_SB_LUT4_I3_O_SB_LUT4_O_I0[1]
|
|
.sym 20086 w_tx_fifo_data[26]
|
|
.sym 20087 tx_fifo.rd_addr[0]
|
|
.sym 20090 o_miso_$_TBUF__Y_E
|
|
.sym 20096 spi_if_ins.spi.r_temp_rx_byte[3]
|
|
.sym 20098 spi_if_ins.spi.r_temp_rx_byte[5]
|
|
.sym 20102 spi_if_ins.spi.r_temp_rx_byte[0]
|
|
.sym 20104 i_mosi$SB_IO_IN
|
|
.sym 20105 i_sck$SB_IO_IN
|
|
.sym 20107 spi_if_ins.spi.r_temp_rx_byte[1]
|
|
.sym 20114 o_miso_$_TBUF__Y_E
|
|
.sym 20121 spi_if_ins.spi.r_temp_rx_byte[2]
|
|
.sym 20124 spi_if_ins.spi.r_temp_rx_byte[4]
|
|
.sym 20129 spi_if_ins.spi.r_temp_rx_byte[2]
|
|
.sym 20136 spi_if_ins.spi.r_temp_rx_byte[1]
|
|
.sym 20142 spi_if_ins.spi.r_temp_rx_byte[4]
|
|
.sym 20148 spi_if_ins.spi.r_temp_rx_byte[0]
|
|
.sym 20155 spi_if_ins.spi.r_temp_rx_byte[3]
|
|
.sym 20160 spi_if_ins.spi.r_temp_rx_byte[5]
|
|
.sym 20166 i_mosi$SB_IO_IN
|
|
.sym 20175 o_miso_$_TBUF__Y_E
|
|
.sym 20176 i_sck$SB_IO_IN
|
|
.sym 20179 w_tx_fifo_pulled_data[24]
|
|
.sym 20183 w_tx_fifo_pulled_data[26]
|
|
.sym 20190 i_mosi$SB_IO_IN
|
|
.sym 20194 tx_fifo.empty_o_SB_DFF_Q_D_SB_LUT4_O_I1_SB_LUT4_O_1_I3_SB_LUT4_O_I3[1]
|
|
.sym 20199 tx_fifo.empty_o_SB_DFF_Q_D_SB_LUT4_O_I1_SB_LUT4_O_1_I3[1]
|
|
.sym 20200 tx_fifo.empty_o_SB_LUT4_I3_O_SB_LUT4_O_I0[3]
|
|
.sym 20203 w_cs[0]
|
|
.sym 20205 w_tx_fifo_data[24]
|
|
.sym 20206 w_rx_data[1]
|
|
.sym 20207 spi_if_ins.o_fetch_cmd_SB_DFFESR_Q_E_SB_LUT4_O_I1[0]
|
|
.sym 20208 w_rx_data[4]
|
|
.sym 20209 tx_fifo.empty_o_SB_DFF_Q_D_SB_LUT4_O_I1_SB_LUT4_O_1_I3[1]
|
|
.sym 20210 w_rx_data[7]
|
|
.sym 20211 tx_fifo.wr_addr[3]
|
|
.sym 20213 tx_fifo.full_o_SB_DFF_Q_D_SB_LUT4_O_I0_SB_LUT4_O_1_I2_SB_LUT4_O_I3[0]
|
|
.sym 20220 spi_if_ins.w_rx_data[6]
|
|
.sym 20228 spi_if_ins.w_rx_data[7]
|
|
.sym 20230 spi_if_ins.w_rx_data[1]
|
|
.sym 20232 spi_if_ins.w_rx_data[5]
|
|
.sym 20237 spi_if_ins.w_rx_data[4]
|
|
.sym 20246 spi_if_ins.o_data_in_SB_DFFE_Q_E
|
|
.sym 20252 spi_if_ins.w_rx_data[7]
|
|
.sym 20265 spi_if_ins.w_rx_data[6]
|
|
.sym 20285 spi_if_ins.w_rx_data[5]
|
|
.sym 20288 spi_if_ins.w_rx_data[1]
|
|
.sym 20297 spi_if_ins.w_rx_data[4]
|
|
.sym 20298 spi_if_ins.o_data_in_SB_DFFE_Q_E
|
|
.sym 20299 r_counter_$glb_clk
|
|
.sym 20302 w_tx_fifo_pulled_data[25]
|
|
.sym 20306 w_tx_fifo_pulled_data[27]
|
|
.sym 20313 w_rx_data[7]
|
|
.sym 20314 $PACKER_VCC_NET
|
|
.sym 20317 tx_fifo.wr_addr[8]
|
|
.sym 20318 tx_fifo.wr_addr[9]
|
|
.sym 20319 tx_fifo.wr_addr[2]
|
|
.sym 20322 tx_fifo.wr_addr[3]
|
|
.sym 20324 tx_fifo.wr_addr[5]
|
|
.sym 20326 w_rx_data[6]
|
|
.sym 20327 tx_fifo.empty_o_SB_LUT4_I3_O_SB_LUT4_O_1_I0[2]
|
|
.sym 20328 io_ctrl_ins.rf_pin_state[5]
|
|
.sym 20329 tx_fifo.empty_o_SB_DFF_Q_D_SB_LUT4_O_I1_SB_LUT4_O_1_I3_SB_LUT4_O_I3[1]
|
|
.sym 20330 io_ctrl_ins.rf_pin_state[4]
|
|
.sym 20332 spi_if_ins.o_load_cmd_SB_LUT4_I3_O_SB_LUT4_I3_O
|
|
.sym 20334 w_rx_data[1]
|
|
.sym 20335 tx_fifo.wr_addr[4]
|
|
.sym 20344 spi_if_ins.spi.o_rx_data_valid_SB_LUT4_I3_O_SB_LUT4_I3_O[2]
|
|
.sym 20347 spi_if_ins.w_rx_data[4]
|
|
.sym 20350 spi_if_ins.w_rx_data[1]
|
|
.sym 20351 w_ioc[4]
|
|
.sym 20352 w_ioc[3]
|
|
.sym 20354 w_ioc[2]
|
|
.sym 20357 sys_ctrl_ins.i_cs_SB_DFFE_Q_D[0]
|
|
.sym 20359 spi_if_ins.state_if[1]
|
|
.sym 20360 spi_if_ins.w_rx_data[2]
|
|
.sym 20364 spi_if_ins.w_rx_data[0]
|
|
.sym 20366 spi_if_ins.w_rx_data[3]
|
|
.sym 20368 spi_if_ins.state_if[0]
|
|
.sym 20369 spi_if_ins.state_if[2]
|
|
.sym 20373 w_ioc[1]
|
|
.sym 20375 spi_if_ins.state_if[2]
|
|
.sym 20376 spi_if_ins.state_if[0]
|
|
.sym 20378 spi_if_ins.state_if[1]
|
|
.sym 20381 spi_if_ins.w_rx_data[4]
|
|
.sym 20388 spi_if_ins.w_rx_data[3]
|
|
.sym 20396 spi_if_ins.w_rx_data[0]
|
|
.sym 20399 spi_if_ins.w_rx_data[2]
|
|
.sym 20405 w_ioc[2]
|
|
.sym 20406 w_ioc[1]
|
|
.sym 20407 w_ioc[3]
|
|
.sym 20408 w_ioc[4]
|
|
.sym 20411 sys_ctrl_ins.i_cs_SB_DFFE_Q_D[0]
|
|
.sym 20417 spi_if_ins.w_rx_data[1]
|
|
.sym 20421 spi_if_ins.spi.o_rx_data_valid_SB_LUT4_I3_O_SB_LUT4_I3_O[2]
|
|
.sym 20422 r_counter_$glb_clk
|
|
.sym 20425 w_tx_fifo_pulled_data[0]
|
|
.sym 20429 w_tx_fifo_pulled_data[2]
|
|
.sym 20436 $PACKER_VCC_NET
|
|
.sym 20439 tx_fifo.empty_o_SB_LUT4_I3_O_SB_LUT4_O_1_I0[2]
|
|
.sym 20442 tx_fifo.rd_addr[0]
|
|
.sym 20449 $PACKER_VCC_NET
|
|
.sym 20450 tx_fifo.empty_o_SB_LUT4_I3_O_SB_LUT4_O_1_I0[3]
|
|
.sym 20452 $PACKER_VCC_NET
|
|
.sym 20453 tx_fifo.wr_addr[6]
|
|
.sym 20455 o_rx_h_tx_l$SB_IO_OUT
|
|
.sym 20456 tx_fifo.empty_o_SB_DFF_Q_D_SB_LUT4_O_I1_SB_LUT4_O_1_I3[2]
|
|
.sym 20457 w_cs[0]
|
|
.sym 20459 w_tx_fifo_data[3]
|
|
.sym 20465 io_ctrl_ins.o_data_out_SB_DFFESR_Q_6_R_SB_LUT4_O_I0_SB_LUT4_I2_O[1]
|
|
.sym 20467 spi_if_ins.o_load_cmd_SB_LUT4_I3_1_I0[2]
|
|
.sym 20468 o_rx_h_tx_l_b$SB_IO_OUT
|
|
.sym 20469 w_ioc[2]
|
|
.sym 20472 io_ctrl_ins.o_data_out_SB_DFFESR_Q_6_R_SB_LUT4_O_I1_SB_LUT4_I2_O[1]
|
|
.sym 20474 io_ctrl_ins.led1_state_SB_LUT4_I0_I2[1]
|
|
.sym 20475 w_ioc[3]
|
|
.sym 20476 io_ctrl_ins.o_pmod[6]
|
|
.sym 20477 io_ctrl_ins.o_pmod[4]
|
|
.sym 20479 w_rx_data[4]
|
|
.sym 20481 i_config[1]$SB_IO_IN
|
|
.sym 20482 w_rx_data[7]
|
|
.sym 20486 w_rx_data[6]
|
|
.sym 20487 w_rx_data[5]
|
|
.sym 20491 io_ctrl_ins.pmod_dir_state[4]
|
|
.sym 20492 spi_if_ins.o_load_cmd_SB_LUT4_I3_O_SB_LUT4_I3_O
|
|
.sym 20495 io_ctrl_ins.o_data_out_SB_DFFESR_Q_6_R_SB_LUT4_O_I0_SB_LUT4_I2_O[2]
|
|
.sym 20496 io_ctrl_ins.rf_mode[2]
|
|
.sym 20501 w_rx_data[4]
|
|
.sym 20504 w_rx_data[6]
|
|
.sym 20510 io_ctrl_ins.o_data_out_SB_DFFESR_Q_6_R_SB_LUT4_O_I0_SB_LUT4_I2_O[1]
|
|
.sym 20511 o_rx_h_tx_l_b$SB_IO_OUT
|
|
.sym 20512 io_ctrl_ins.o_pmod[6]
|
|
.sym 20513 io_ctrl_ins.o_data_out_SB_DFFESR_Q_6_R_SB_LUT4_O_I0_SB_LUT4_I2_O[2]
|
|
.sym 20516 io_ctrl_ins.o_data_out_SB_DFFESR_Q_6_R_SB_LUT4_O_I0_SB_LUT4_I2_O[2]
|
|
.sym 20517 i_config[1]$SB_IO_IN
|
|
.sym 20518 io_ctrl_ins.o_pmod[4]
|
|
.sym 20519 io_ctrl_ins.led1_state_SB_LUT4_I0_I2[1]
|
|
.sym 20523 w_rx_data[7]
|
|
.sym 20528 w_ioc[3]
|
|
.sym 20529 w_ioc[2]
|
|
.sym 20534 spi_if_ins.o_load_cmd_SB_LUT4_I3_1_I0[2]
|
|
.sym 20535 io_ctrl_ins.o_data_out_SB_DFFESR_Q_6_R_SB_LUT4_O_I1_SB_LUT4_I2_O[1]
|
|
.sym 20536 io_ctrl_ins.rf_mode[2]
|
|
.sym 20537 io_ctrl_ins.pmod_dir_state[4]
|
|
.sym 20541 w_rx_data[5]
|
|
.sym 20544 spi_if_ins.o_load_cmd_SB_LUT4_I3_O_SB_LUT4_I3_O
|
|
.sym 20545 r_counter_$glb_clk
|
|
.sym 20548 w_tx_fifo_pulled_data[1]
|
|
.sym 20552 w_tx_fifo_pulled_data[3]
|
|
.sym 20559 i_config[0]$SB_IO_IN
|
|
.sym 20562 io_ctrl_ins.o_data_out_SB_DFFESR_Q_E
|
|
.sym 20563 tx_fifo.wr_addr[9]
|
|
.sym 20567 io_ctrl_ins.tr_vc_1_b_state_SB_LUT4_I0_I2[2]
|
|
.sym 20568 tx_fifo.full_o_SB_DFF_Q_D_SB_LUT4_O_I0_SB_LUT4_O_1_I0_SB_LUT4_O_I3[1]
|
|
.sym 20569 tx_fifo.wr_addr[5]
|
|
.sym 20572 tx_fifo.empty_o_SB_DFF_Q_D_SB_LUT4_O_I1_SB_LUT4_O_1_I3_SB_LUT4_O_I3[2]
|
|
.sym 20574 tx_fifo.empty_o_SB_LUT4_I3_O_SB_LUT4_O_I0[3]
|
|
.sym 20577 o_tr_vc2$SB_IO_OUT
|
|
.sym 20578 tx_fifo.empty_o_SB_LUT4_I3_O_SB_LUT4_O_I0[1]
|
|
.sym 20579 tx_fifo.rd_addr[0]
|
|
.sym 20581 o_rx_h_tx_l$SB_IO_OUT
|
|
.sym 20589 io_ctrl_ins.rf_pin_state[6]
|
|
.sym 20591 io_ctrl_ins.o_data_out_SB_DFFESR_Q_6_R_SB_LUT4_O_I1_SB_LUT4_I2_O[0]
|
|
.sym 20592 io_ctrl_ins.rf_pin_state[7]
|
|
.sym 20594 i_config[2]$SB_IO_IN
|
|
.sym 20595 io_ctrl_ins.rx_h_state_SB_DFFE_Q_D_SB_LUT4_O_I3[2]
|
|
.sym 20597 io_ctrl_ins.pmod_dir_state[3]
|
|
.sym 20599 io_ctrl_ins.rx_h_state_SB_DFFE_Q_E
|
|
.sym 20604 io_ctrl_ins.rx_h_state_SB_DFFE_Q_D_SB_LUT4_O_I2[2]
|
|
.sym 20606 io_ctrl_ins.rf_pin_state[3]
|
|
.sym 20607 io_ctrl_ins.rf_mode[1]
|
|
.sym 20608 io_ctrl_ins.rf_pin_state[2]
|
|
.sym 20611 io_ctrl_ins.o_data_out_SB_DFFESR_Q_6_R_SB_LUT4_O_I1_SB_LUT4_I2_O[1]
|
|
.sym 20612 io_ctrl_ins.o_data_out_SB_DFFESR_Q_6_R_SB_LUT4_O_I0_SB_LUT4_I2_O[1]
|
|
.sym 20613 io_ctrl_ins.led1_state_SB_LUT4_I0_I2[1]
|
|
.sym 20614 io_ctrl_ins.rf_mode[2]
|
|
.sym 20615 io_ctrl_ins.rf_mode[1]
|
|
.sym 20616 io_ctrl_ins.rf_pin_state[0]
|
|
.sym 20618 io_ctrl_ins.rf_pin_state[1]
|
|
.sym 20619 o_tr_vc2$SB_IO_OUT
|
|
.sym 20621 io_ctrl_ins.rx_h_state_SB_DFFE_Q_D_SB_LUT4_O_I2[2]
|
|
.sym 20622 io_ctrl_ins.rf_pin_state[0]
|
|
.sym 20623 io_ctrl_ins.rf_mode[1]
|
|
.sym 20624 io_ctrl_ins.rf_mode[2]
|
|
.sym 20627 io_ctrl_ins.rx_h_state_SB_DFFE_Q_D_SB_LUT4_O_I3[2]
|
|
.sym 20628 io_ctrl_ins.rf_pin_state[7]
|
|
.sym 20630 io_ctrl_ins.rx_h_state_SB_DFFE_Q_D_SB_LUT4_O_I2[2]
|
|
.sym 20633 io_ctrl_ins.led1_state_SB_LUT4_I0_I2[1]
|
|
.sym 20634 io_ctrl_ins.o_data_out_SB_DFFESR_Q_6_R_SB_LUT4_O_I1_SB_LUT4_I2_O[0]
|
|
.sym 20635 i_config[2]$SB_IO_IN
|
|
.sym 20636 io_ctrl_ins.o_data_out_SB_DFFESR_Q_6_R_SB_LUT4_O_I1_SB_LUT4_I2_O[1]
|
|
.sym 20639 io_ctrl_ins.rf_pin_state[6]
|
|
.sym 20640 io_ctrl_ins.rx_h_state_SB_DFFE_Q_D_SB_LUT4_O_I2[2]
|
|
.sym 20641 io_ctrl_ins.rx_h_state_SB_DFFE_Q_D_SB_LUT4_O_I3[2]
|
|
.sym 20645 io_ctrl_ins.rx_h_state_SB_DFFE_Q_D_SB_LUT4_O_I2[2]
|
|
.sym 20646 io_ctrl_ins.rf_mode[2]
|
|
.sym 20647 io_ctrl_ins.rf_pin_state[2]
|
|
.sym 20648 io_ctrl_ins.rf_mode[1]
|
|
.sym 20652 io_ctrl_ins.rf_mode[1]
|
|
.sym 20653 io_ctrl_ins.rf_pin_state[1]
|
|
.sym 20654 io_ctrl_ins.rx_h_state_SB_DFFE_Q_D_SB_LUT4_O_I2[2]
|
|
.sym 20657 io_ctrl_ins.pmod_dir_state[3]
|
|
.sym 20658 io_ctrl_ins.o_data_out_SB_DFFESR_Q_6_R_SB_LUT4_O_I1_SB_LUT4_I2_O[1]
|
|
.sym 20659 o_tr_vc2$SB_IO_OUT
|
|
.sym 20660 io_ctrl_ins.o_data_out_SB_DFFESR_Q_6_R_SB_LUT4_O_I0_SB_LUT4_I2_O[1]
|
|
.sym 20663 io_ctrl_ins.rf_mode[2]
|
|
.sym 20664 io_ctrl_ins.rx_h_state_SB_DFFE_Q_D_SB_LUT4_O_I2[2]
|
|
.sym 20665 io_ctrl_ins.rf_mode[1]
|
|
.sym 20666 io_ctrl_ins.rf_pin_state[3]
|
|
.sym 20667 io_ctrl_ins.rx_h_state_SB_DFFE_Q_E
|
|
.sym 20668 r_counter_$glb_clk
|
|
.sym 20672 i_config[0]$SB_IO_IN
|
|
.sym 20681 tx_fifo.empty_o_SB_DFF_Q_D_SB_LUT4_O_I1_SB_LUT4_O_1_I3_SB_LUT4_O_I3[1]
|
|
.sym 20684 tx_fifo.empty_o_SB_DFF_Q_D_SB_LUT4_O_I1_SB_LUT4_O_1_I3[1]
|
|
.sym 20686 o_rx_h_tx_l_b$SB_IO_OUT
|
|
.sym 20687 w_tx_fifo_pulled_data[1]
|
|
.sym 20696 io_ctrl_ins.rf_mode[2]
|
|
.sym 20698 tx_fifo.rd_addr[9]
|
|
.sym 20699 io_ctrl_ins.tr_vc_2_state_SB_LUT4_I0_O[3]
|
|
.sym 20748 w_smi_data_output[5]
|
|
.sym 20750 o_led0$SB_IO_OUT
|
|
.sym 20751 $PACKER_VCC_NET
|
|
.sym 20756 o_led0$SB_IO_OUT
|
|
.sym 20766 w_smi_data_output[5]
|
|
.sym 20767 $PACKER_VCC_NET
|
|
.sym 20770 w_rx_24_fifo_data[27]
|
|
.sym 20771 w_rx_fifo_data[26]
|
|
.sym 20772 w_rx_fifo_data[27]
|
|
.sym 20773 w_rx_24_fifo_data[26]
|
|
.sym 20774 w_rx_fifo_data[25]
|
|
.sym 20775 w_rx_24_fifo_data[29]
|
|
.sym 20776 w_rx_24_fifo_data[28]
|
|
.sym 20792 w_rx_fifo_pulled_data[13]
|
|
.sym 20793 tx_fifo.empty_o_SB_DFF_Q_D_SB_LUT4_O_I1_SB_LUT4_O_1_I3[2]
|
|
.sym 20804 i_ss$SB_IO_IN
|
|
.sym 20811 rx_fifo.wr_addr[9]
|
|
.sym 20812 rx_fifo.wr_addr[6]
|
|
.sym 20815 rx_fifo.wr_addr[3]
|
|
.sym 20816 rx_fifo.wr_addr[4]
|
|
.sym 20821 w_rx_fifo_push
|
|
.sym 20823 $PACKER_VCC_NET
|
|
.sym 20824 rx_fifo.wr_addr[5]
|
|
.sym 20826 w_rx_fifo_data[24]
|
|
.sym 20828 rx_fifo.wr_addr[8]
|
|
.sym 20829 rx_fifo.wr_addr[7]
|
|
.sym 20832 rx_fifo.full_o_SB_DFF_Q_D_SB_LUT4_O_I0_SB_LUT4_O_1_I0[2]
|
|
.sym 20834 rx_fifo.full_o_SB_DFF_Q_D_SB_LUT4_O_I0_SB_LUT4_O_1_I0[1]
|
|
.sym 20835 w_rx_fifo_data[26]
|
|
.sym 20839 rx_fifo.wr_addr[2]
|
|
.sym 20844 i_mosi$SB_IO_IN
|
|
.sym 20846 w_rx_fifo_data[24]
|
|
.sym 20847 w_rx_09_fifo_data[26]
|
|
.sym 20848 w_rx_fifo_data[31]
|
|
.sym 20849 w_rx_fifo_data[29]
|
|
.sym 20850 w_rx_09_fifo_data[31]
|
|
.sym 20851 w_rx_09_fifo_data[27]
|
|
.sym 20852 smi_ctrl_ins.o_smi_data_out_SB_DFFNE_Q_D_SB_LUT4_O_4_I3[3]
|
|
.sym 20853 w_rx_09_fifo_data[29]
|
|
.sym 20862 rx_fifo.wr_addr[2]
|
|
.sym 20863 rx_fifo.wr_addr[3]
|
|
.sym 20865 rx_fifo.wr_addr[4]
|
|
.sym 20866 rx_fifo.wr_addr[5]
|
|
.sym 20867 rx_fifo.wr_addr[6]
|
|
.sym 20868 rx_fifo.wr_addr[7]
|
|
.sym 20869 rx_fifo.wr_addr[8]
|
|
.sym 20870 rx_fifo.wr_addr[9]
|
|
.sym 20871 rx_fifo.full_o_SB_DFF_Q_D_SB_LUT4_O_I0_SB_LUT4_O_1_I0[2]
|
|
.sym 20872 rx_fifo.full_o_SB_DFF_Q_D_SB_LUT4_O_I0_SB_LUT4_O_1_I0[1]
|
|
.sym 20873 o_iq_tx_clk_p$SB_IO_OUT_$glb_clk
|
|
.sym 20874 w_rx_fifo_push
|
|
.sym 20876 w_rx_fifo_data[24]
|
|
.sym 20880 w_rx_fifo_data[26]
|
|
.sym 20883 $PACKER_VCC_NET
|
|
.sym 20894 smi_ctrl_ins.o_smi_data_out_SB_DFFNE_Q_D_SB_LUT4_O_4_I3[1]
|
|
.sym 20913 w_rx_24_fifo_data[25]
|
|
.sym 20915 w_rx_09_fifo_data[25]
|
|
.sym 20916 w_rx_fifo_pull
|
|
.sym 20917 o_led1$SB_IO_OUT
|
|
.sym 20919 rx_fifo.wr_addr[6]
|
|
.sym 20921 rx_fifo.empty_o_SB_LUT4_I2_O[0]
|
|
.sym 20924 rx_fifo.wr_addr[4]
|
|
.sym 20932 rx_fifo.empty_o_SB_DFF_Q_D_SB_LUT4_O_I0_SB_LUT4_O_1_I1_SB_LUT4_O_1_I0[1]
|
|
.sym 20933 w_rx_fifo_pull
|
|
.sym 20936 w_rx_24_fifo_data[24]
|
|
.sym 20954 w_rx_fifo_data[27]
|
|
.sym 20956 w_rx_fifo_data[25]
|
|
.sym 20957 rx_fifo.empty_o_SB_DFF_Q_D_SB_LUT4_O_I0_SB_LUT4_O_1_I1_SB_LUT4_O_1_I0[3]
|
|
.sym 20960 rx_fifo.rd_addr[0]
|
|
.sym 20962 rx_fifo.rd_addr[9]
|
|
.sym 20964 rx_fifo.rd_addr[7]
|
|
.sym 20968 rx_fifo.empty_o_SB_DFF_Q_D_SB_LUT4_O_I0_SB_LUT4_O_1_I1_SB_LUT4_O_2_I0[3]
|
|
.sym 20970 w_rx_fifo_pull
|
|
.sym 20972 $PACKER_VCC_NET
|
|
.sym 20973 rx_fifo.empty_o_SB_DFF_Q_D_SB_LUT4_O_I0_SB_LUT4_O_1_I1_SB_LUT4_O_I3[1]
|
|
.sym 20974 rx_fifo.empty_o_SB_DFF_Q_D_SB_LUT4_O_I0_SB_LUT4_O_1_I1_SB_LUT4_O_I3[2]
|
|
.sym 20977 rx_fifo.empty_o_SB_LUT4_I2_O[0]
|
|
.sym 20981 rx_fifo.rd_addr[8]
|
|
.sym 20983 rx_fifo.empty_o_SB_DFF_Q_D_SB_LUT4_O_I0_SB_LUT4_O_1_I1_SB_LUT4_O_1_I0[1]
|
|
.sym 20989 smi_ctrl_ins.w_fifo_pull_trigger
|
|
.sym 21000 rx_fifo.empty_o_SB_DFF_Q_D_SB_LUT4_O_I0_SB_LUT4_O_1_I1_SB_LUT4_O_1_I0[1]
|
|
.sym 21001 rx_fifo.empty_o_SB_DFF_Q_D_SB_LUT4_O_I0_SB_LUT4_O_1_I1_SB_LUT4_O_1_I0[3]
|
|
.sym 21003 rx_fifo.empty_o_SB_DFF_Q_D_SB_LUT4_O_I0_SB_LUT4_O_1_I1_SB_LUT4_O_2_I0[3]
|
|
.sym 21004 rx_fifo.empty_o_SB_DFF_Q_D_SB_LUT4_O_I0_SB_LUT4_O_1_I1_SB_LUT4_O_I3[1]
|
|
.sym 21005 rx_fifo.empty_o_SB_DFF_Q_D_SB_LUT4_O_I0_SB_LUT4_O_1_I1_SB_LUT4_O_I3[2]
|
|
.sym 21006 rx_fifo.rd_addr[7]
|
|
.sym 21007 rx_fifo.rd_addr[8]
|
|
.sym 21008 rx_fifo.rd_addr[9]
|
|
.sym 21009 rx_fifo.empty_o_SB_LUT4_I2_O[0]
|
|
.sym 21010 rx_fifo.rd_addr[0]
|
|
.sym 21011 r_counter_$glb_clk
|
|
.sym 21012 w_rx_fifo_pull
|
|
.sym 21013 $PACKER_VCC_NET
|
|
.sym 21017 w_rx_fifo_data[27]
|
|
.sym 21021 w_rx_fifo_data[25]
|
|
.sym 21028 rx_fifo.rd_addr[9]
|
|
.sym 21033 rx_fifo.empty_o_SB_DFF_Q_D_SB_LUT4_O_I0_SB_LUT4_O_1_I1_SB_LUT4_O_1_I0[3]
|
|
.sym 21034 w_lvds_rx_09_d1_SB_LUT4_I0_O[0]
|
|
.sym 21035 w_rx_09_fifo_data[26]
|
|
.sym 21038 w_rx_fifo_data[31]
|
|
.sym 21040 w_rx_fifo_data[29]
|
|
.sym 21046 w_rx_24_fifo_data[16]
|
|
.sym 21047 rx_fifo.rd_addr[8]
|
|
.sym 21057 rx_fifo.full_o_SB_DFF_Q_D_SB_LUT4_O_I0_SB_LUT4_O_1_I0[1]
|
|
.sym 21058 $PACKER_VCC_NET
|
|
.sym 21060 rx_fifo.full_o_SB_DFF_Q_D_SB_LUT4_O_I0_SB_LUT4_O_1_I0[2]
|
|
.sym 21061 rx_fifo.wr_addr[5]
|
|
.sym 21064 rx_fifo.wr_addr[7]
|
|
.sym 21065 w_rx_fifo_data[30]
|
|
.sym 21066 rx_fifo.wr_addr[9]
|
|
.sym 21067 rx_fifo.wr_addr[8]
|
|
.sym 21069 w_rx_fifo_data[28]
|
|
.sym 21070 rx_fifo.wr_addr[2]
|
|
.sym 21080 rx_fifo.wr_addr[3]
|
|
.sym 21081 w_rx_fifo_push
|
|
.sym 21083 rx_fifo.wr_addr[4]
|
|
.sym 21085 rx_fifo.wr_addr[6]
|
|
.sym 21086 w_rx_24_fifo_data[20]
|
|
.sym 21087 w_rx_fifo_pull
|
|
.sym 21088 w_rx_24_fifo_data[24]
|
|
.sym 21089 w_rx_24_fifo_data[22]
|
|
.sym 21090 w_rx_24_fifo_data[18]
|
|
.sym 21093 w_rx_24_fifo_data[25]
|
|
.sym 21102 rx_fifo.wr_addr[2]
|
|
.sym 21103 rx_fifo.wr_addr[3]
|
|
.sym 21105 rx_fifo.wr_addr[4]
|
|
.sym 21106 rx_fifo.wr_addr[5]
|
|
.sym 21107 rx_fifo.wr_addr[6]
|
|
.sym 21108 rx_fifo.wr_addr[7]
|
|
.sym 21109 rx_fifo.wr_addr[8]
|
|
.sym 21110 rx_fifo.wr_addr[9]
|
|
.sym 21111 rx_fifo.full_o_SB_DFF_Q_D_SB_LUT4_O_I0_SB_LUT4_O_1_I0[2]
|
|
.sym 21112 rx_fifo.full_o_SB_DFF_Q_D_SB_LUT4_O_I0_SB_LUT4_O_1_I0[1]
|
|
.sym 21113 o_iq_tx_clk_p$SB_IO_OUT_$glb_clk
|
|
.sym 21114 w_rx_fifo_push
|
|
.sym 21116 w_rx_fifo_data[28]
|
|
.sym 21120 w_rx_fifo_data[30]
|
|
.sym 21123 $PACKER_VCC_NET
|
|
.sym 21127 rx_fifo.wr_addr[4]
|
|
.sym 21132 rx_fifo.wr_addr[7]
|
|
.sym 21133 rx_fifo.full_o_SB_DFF_Q_D_SB_LUT4_O_I0_SB_LUT4_O_1_I0[1]
|
|
.sym 21135 rx_fifo.wr_addr[8]
|
|
.sym 21142 w_rx_09_fifo_data[25]
|
|
.sym 21143 w_rx_fifo_empty
|
|
.sym 21147 w_rx_24_fifo_data[25]
|
|
.sym 21149 w_rx_24_fifo_data[20]
|
|
.sym 21151 w_rx_fifo_pull
|
|
.sym 21159 rx_fifo.rd_addr[7]
|
|
.sym 21160 $PACKER_VCC_NET
|
|
.sym 21161 rx_fifo.empty_o_SB_DFF_Q_D_SB_LUT4_O_I0_SB_LUT4_O_1_I1_SB_LUT4_O_I3[1]
|
|
.sym 21162 rx_fifo.empty_o_SB_DFF_Q_D_SB_LUT4_O_I0_SB_LUT4_O_1_I1_SB_LUT4_O_I3[2]
|
|
.sym 21163 rx_fifo.rd_addr[0]
|
|
.sym 21167 rx_fifo.empty_o_SB_DFF_Q_D_SB_LUT4_O_I0_SB_LUT4_O_1_I1_SB_LUT4_O_1_I0[1]
|
|
.sym 21172 rx_fifo.rd_addr[8]
|
|
.sym 21174 w_rx_fifo_pull
|
|
.sym 21176 w_rx_fifo_data[31]
|
|
.sym 21177 rx_fifo.empty_o_SB_DFF_Q_D_SB_LUT4_O_I0_SB_LUT4_O_1_I1_SB_LUT4_O_1_I0[3]
|
|
.sym 21178 w_rx_fifo_data[29]
|
|
.sym 21181 rx_fifo.empty_o_SB_LUT4_I2_O[0]
|
|
.sym 21184 rx_fifo.rd_addr[9]
|
|
.sym 21185 rx_fifo.empty_o_SB_DFF_Q_D_SB_LUT4_O_I0_SB_LUT4_O_1_I1_SB_LUT4_O_2_I0[3]
|
|
.sym 21189 w_rx_09_fifo_data[23]
|
|
.sym 21190 w_rx_fifo_data[23]
|
|
.sym 21191 w_rx_fifo_data[22]
|
|
.sym 21192 w_rx_09_fifo_data[24]
|
|
.sym 21193 w_rx_fifo_data[16]
|
|
.sym 21194 o_led1$SB_IO_OUT
|
|
.sym 21195 w_rx_09_fifo_data[25]
|
|
.sym 21204 rx_fifo.empty_o_SB_DFF_Q_D_SB_LUT4_O_I0_SB_LUT4_O_1_I1_SB_LUT4_O_1_I0[1]
|
|
.sym 21205 rx_fifo.empty_o_SB_DFF_Q_D_SB_LUT4_O_I0_SB_LUT4_O_1_I1_SB_LUT4_O_1_I0[3]
|
|
.sym 21207 rx_fifo.empty_o_SB_DFF_Q_D_SB_LUT4_O_I0_SB_LUT4_O_1_I1_SB_LUT4_O_2_I0[3]
|
|
.sym 21208 rx_fifo.empty_o_SB_DFF_Q_D_SB_LUT4_O_I0_SB_LUT4_O_1_I1_SB_LUT4_O_I3[1]
|
|
.sym 21209 rx_fifo.empty_o_SB_DFF_Q_D_SB_LUT4_O_I0_SB_LUT4_O_1_I1_SB_LUT4_O_I3[2]
|
|
.sym 21210 rx_fifo.rd_addr[7]
|
|
.sym 21211 rx_fifo.rd_addr[8]
|
|
.sym 21212 rx_fifo.rd_addr[9]
|
|
.sym 21213 rx_fifo.empty_o_SB_LUT4_I2_O[0]
|
|
.sym 21214 rx_fifo.rd_addr[0]
|
|
.sym 21215 r_counter_$glb_clk
|
|
.sym 21216 w_rx_fifo_pull
|
|
.sym 21217 $PACKER_VCC_NET
|
|
.sym 21221 w_rx_fifo_data[31]
|
|
.sym 21225 w_rx_fifo_data[29]
|
|
.sym 21231 i_sck$SB_IO_IN
|
|
.sym 21238 rx_fifo.empty_o_SB_DFF_Q_D_SB_LUT4_O_I0_SB_LUT4_O_1_I1_SB_LUT4_O_I3[2]
|
|
.sym 21239 w_rx_fifo_pull
|
|
.sym 21240 $PACKER_VCC_NET
|
|
.sym 21243 rx_fifo.wr_addr[3]
|
|
.sym 21245 rx_fifo.wr_addr[4]
|
|
.sym 21247 rx_fifo.empty_o_SB_LUT4_I2_O[0]
|
|
.sym 21248 rx_fifo.wr_addr[6]
|
|
.sym 21260 rx_fifo.wr_addr[4]
|
|
.sym 21267 rx_fifo.wr_addr[8]
|
|
.sym 21268 rx_fifo.wr_addr[5]
|
|
.sym 21270 rx_fifo.wr_addr[3]
|
|
.sym 21271 $PACKER_VCC_NET
|
|
.sym 21272 rx_fifo.wr_addr[9]
|
|
.sym 21273 rx_fifo.wr_addr[6]
|
|
.sym 21274 w_rx_fifo_data[18]
|
|
.sym 21276 w_rx_fifo_push
|
|
.sym 21277 rx_fifo.wr_addr[7]
|
|
.sym 21279 rx_fifo.full_o_SB_DFF_Q_D_SB_LUT4_O_I0_SB_LUT4_O_1_I0[1]
|
|
.sym 21280 rx_fifo.full_o_SB_DFF_Q_D_SB_LUT4_O_I0_SB_LUT4_O_1_I0[2]
|
|
.sym 21283 rx_fifo.wr_addr[2]
|
|
.sym 21287 w_rx_fifo_data[16]
|
|
.sym 21290 w_rx_fifo_data[18]
|
|
.sym 21292 w_rx_09_fifo_data[22]
|
|
.sym 21293 w_rx_09_fifo_data[20]
|
|
.sym 21294 w_rx_09_fifo_data[18]
|
|
.sym 21296 w_rx_fifo_data[20]
|
|
.sym 21297 o_smi_read_req$SB_IO_OUT
|
|
.sym 21306 rx_fifo.wr_addr[2]
|
|
.sym 21307 rx_fifo.wr_addr[3]
|
|
.sym 21309 rx_fifo.wr_addr[4]
|
|
.sym 21310 rx_fifo.wr_addr[5]
|
|
.sym 21311 rx_fifo.wr_addr[6]
|
|
.sym 21312 rx_fifo.wr_addr[7]
|
|
.sym 21313 rx_fifo.wr_addr[8]
|
|
.sym 21314 rx_fifo.wr_addr[9]
|
|
.sym 21315 rx_fifo.full_o_SB_DFF_Q_D_SB_LUT4_O_I0_SB_LUT4_O_1_I0[2]
|
|
.sym 21316 rx_fifo.full_o_SB_DFF_Q_D_SB_LUT4_O_I0_SB_LUT4_O_1_I0[1]
|
|
.sym 21317 o_iq_tx_clk_p$SB_IO_OUT_$glb_clk
|
|
.sym 21318 w_rx_fifo_push
|
|
.sym 21320 w_rx_fifo_data[16]
|
|
.sym 21324 w_rx_fifo_data[18]
|
|
.sym 21327 $PACKER_VCC_NET
|
|
.sym 21333 rx_fifo.wr_addr[8]
|
|
.sym 21339 spi_if_ins.spi.r_rx_done_SB_DFFESR_Q_D[1]
|
|
.sym 21340 w_lvds_rx_09_d1_SB_LUT4_I0_O[0]
|
|
.sym 21344 w_rx_fifo_data[23]
|
|
.sym 21346 w_rx_fifo_data[22]
|
|
.sym 21349 $PACKER_VCC_NET
|
|
.sym 21355 w_rx_fifo_pull
|
|
.sym 21364 $PACKER_VCC_NET
|
|
.sym 21370 rx_fifo.empty_o_SB_DFF_Q_D_SB_LUT4_O_I0_SB_LUT4_O_1_I1_SB_LUT4_O_1_I0[3]
|
|
.sym 21371 w_rx_fifo_data[19]
|
|
.sym 21374 rx_fifo.rd_addr[9]
|
|
.sym 21376 w_rx_fifo_data[17]
|
|
.sym 21378 w_rx_fifo_pull
|
|
.sym 21382 rx_fifo.empty_o_SB_DFF_Q_D_SB_LUT4_O_I0_SB_LUT4_O_1_I1_SB_LUT4_O_I3[2]
|
|
.sym 21384 rx_fifo.rd_addr[7]
|
|
.sym 21385 rx_fifo.empty_o_SB_LUT4_I2_O[0]
|
|
.sym 21386 rx_fifo.empty_o_SB_DFF_Q_D_SB_LUT4_O_I0_SB_LUT4_O_1_I1_SB_LUT4_O_I3[1]
|
|
.sym 21387 rx_fifo.empty_o_SB_DFF_Q_D_SB_LUT4_O_I0_SB_LUT4_O_1_I1_SB_LUT4_O_2_I0[3]
|
|
.sym 21388 rx_fifo.rd_addr[0]
|
|
.sym 21389 rx_fifo.rd_addr[8]
|
|
.sym 21391 rx_fifo.empty_o_SB_DFF_Q_D_SB_LUT4_O_I0_SB_LUT4_O_1_I1_SB_LUT4_O_1_I0[1]
|
|
.sym 21394 int_miso
|
|
.sym 21408 rx_fifo.empty_o_SB_DFF_Q_D_SB_LUT4_O_I0_SB_LUT4_O_1_I1_SB_LUT4_O_1_I0[1]
|
|
.sym 21409 rx_fifo.empty_o_SB_DFF_Q_D_SB_LUT4_O_I0_SB_LUT4_O_1_I1_SB_LUT4_O_1_I0[3]
|
|
.sym 21411 rx_fifo.empty_o_SB_DFF_Q_D_SB_LUT4_O_I0_SB_LUT4_O_1_I1_SB_LUT4_O_2_I0[3]
|
|
.sym 21412 rx_fifo.empty_o_SB_DFF_Q_D_SB_LUT4_O_I0_SB_LUT4_O_1_I1_SB_LUT4_O_I3[1]
|
|
.sym 21413 rx_fifo.empty_o_SB_DFF_Q_D_SB_LUT4_O_I0_SB_LUT4_O_1_I1_SB_LUT4_O_I3[2]
|
|
.sym 21414 rx_fifo.rd_addr[7]
|
|
.sym 21415 rx_fifo.rd_addr[8]
|
|
.sym 21416 rx_fifo.rd_addr[9]
|
|
.sym 21417 rx_fifo.empty_o_SB_LUT4_I2_O[0]
|
|
.sym 21418 rx_fifo.rd_addr[0]
|
|
.sym 21419 r_counter_$glb_clk
|
|
.sym 21420 w_rx_fifo_pull
|
|
.sym 21421 $PACKER_VCC_NET
|
|
.sym 21425 w_rx_fifo_data[19]
|
|
.sym 21429 w_rx_fifo_data[17]
|
|
.sym 21435 spi_if_ins.spi.r_rx_done_SB_DFFESR_Q_E
|
|
.sym 21436 rx_fifo.empty_o_SB_DFF_Q_D_SB_LUT4_O_I0_SB_LUT4_O_1_I1_SB_LUT4_O_1_I0[3]
|
|
.sym 21442 rx_fifo.rd_addr[9]
|
|
.sym 21443 w_lvds_rx_09_d1_SB_LUT4_I0_O[0]
|
|
.sym 21450 rx_fifo.full_o_SB_DFF_Q_D_SB_LUT4_O_I0_SB_LUT4_O_1_I0[2]
|
|
.sym 21453 spi_if_ins.r_tx_byte_SB_DFFE_Q_E
|
|
.sym 21464 rx_fifo.wr_addr[8]
|
|
.sym 21465 rx_fifo.wr_addr[7]
|
|
.sym 21467 rx_fifo.full_o_SB_DFF_Q_D_SB_LUT4_O_I0_SB_LUT4_O_1_I0[1]
|
|
.sym 21468 w_rx_fifo_data[20]
|
|
.sym 21469 rx_fifo.wr_addr[5]
|
|
.sym 21470 rx_fifo.wr_addr[3]
|
|
.sym 21471 rx_fifo.wr_addr[2]
|
|
.sym 21473 rx_fifo.full_o_SB_DFF_Q_D_SB_LUT4_O_I0_SB_LUT4_O_1_I0[2]
|
|
.sym 21475 $PACKER_VCC_NET
|
|
.sym 21476 rx_fifo.wr_addr[9]
|
|
.sym 21477 rx_fifo.wr_addr[6]
|
|
.sym 21480 w_rx_fifo_push
|
|
.sym 21482 rx_fifo.wr_addr[4]
|
|
.sym 21484 w_rx_fifo_data[22]
|
|
.sym 21494 spi_if_ins.r_tx_byte[7]
|
|
.sym 21495 spi_if_ins.r_tx_byte[5]
|
|
.sym 21496 spi_if_ins.r_tx_byte[1]
|
|
.sym 21497 spi_if_ins.r_tx_byte[4]
|
|
.sym 21498 spi_if_ins.r_tx_byte[3]
|
|
.sym 21499 spi_if_ins.r_tx_data_valid_SB_LUT4_I3_O
|
|
.sym 21500 spi_if_ins.r_tx_byte[6]
|
|
.sym 21501 spi_if_ins.r_tx_byte[2]
|
|
.sym 21510 rx_fifo.wr_addr[2]
|
|
.sym 21511 rx_fifo.wr_addr[3]
|
|
.sym 21513 rx_fifo.wr_addr[4]
|
|
.sym 21514 rx_fifo.wr_addr[5]
|
|
.sym 21515 rx_fifo.wr_addr[6]
|
|
.sym 21516 rx_fifo.wr_addr[7]
|
|
.sym 21517 rx_fifo.wr_addr[8]
|
|
.sym 21518 rx_fifo.wr_addr[9]
|
|
.sym 21519 rx_fifo.full_o_SB_DFF_Q_D_SB_LUT4_O_I0_SB_LUT4_O_1_I0[2]
|
|
.sym 21520 rx_fifo.full_o_SB_DFF_Q_D_SB_LUT4_O_I0_SB_LUT4_O_1_I0[1]
|
|
.sym 21521 o_iq_tx_clk_p$SB_IO_OUT_$glb_clk
|
|
.sym 21522 w_rx_fifo_push
|
|
.sym 21524 w_rx_fifo_data[20]
|
|
.sym 21528 w_rx_fifo_data[22]
|
|
.sym 21531 $PACKER_VCC_NET
|
|
.sym 21544 spi_if_ins.spi.o_spi_miso_SB_DFFE_Q_E
|
|
.sym 21547 w_rx_data[7]
|
|
.sym 21549 spi_if_ins.r_tx_byte[3]
|
|
.sym 21554 spi_if_ins.r_tx_data_valid_SB_DFFESR_Q_E
|
|
.sym 21559 w_rx_fifo_pull
|
|
.sym 21568 rx_fifo.empty_o_SB_LUT4_I2_O[0]
|
|
.sym 21570 rx_fifo.empty_o_SB_DFF_Q_D_SB_LUT4_O_I0_SB_LUT4_O_1_I1_SB_LUT4_O_I3[2]
|
|
.sym 21572 rx_fifo.rd_addr[7]
|
|
.sym 21573 w_rx_fifo_data[23]
|
|
.sym 21574 rx_fifo.empty_o_SB_DFF_Q_D_SB_LUT4_O_I0_SB_LUT4_O_1_I1_SB_LUT4_O_I3[1]
|
|
.sym 21575 rx_fifo.rd_addr[8]
|
|
.sym 21576 rx_fifo.rd_addr[0]
|
|
.sym 21577 w_rx_fifo_data[21]
|
|
.sym 21582 w_rx_fifo_pull
|
|
.sym 21583 rx_fifo.rd_addr[9]
|
|
.sym 21588 rx_fifo.empty_o_SB_DFF_Q_D_SB_LUT4_O_I0_SB_LUT4_O_1_I1_SB_LUT4_O_1_I0[3]
|
|
.sym 21589 rx_fifo.empty_o_SB_DFF_Q_D_SB_LUT4_O_I0_SB_LUT4_O_1_I1_SB_LUT4_O_1_I0[1]
|
|
.sym 21593 $PACKER_VCC_NET
|
|
.sym 21595 rx_fifo.empty_o_SB_DFF_Q_D_SB_LUT4_O_I0_SB_LUT4_O_1_I1_SB_LUT4_O_2_I0[3]
|
|
.sym 21598 spi_if_ins.r_tx_data_valid
|
|
.sym 21601 spi_if_ins.o_cs_SB_LUT4_I3_O[1]
|
|
.sym 21603 smi_ctrl_ins.o_data_out_SB_LUT4_I0_1_O[1]
|
|
.sym 21612 rx_fifo.empty_o_SB_DFF_Q_D_SB_LUT4_O_I0_SB_LUT4_O_1_I1_SB_LUT4_O_1_I0[1]
|
|
.sym 21613 rx_fifo.empty_o_SB_DFF_Q_D_SB_LUT4_O_I0_SB_LUT4_O_1_I1_SB_LUT4_O_1_I0[3]
|
|
.sym 21615 rx_fifo.empty_o_SB_DFF_Q_D_SB_LUT4_O_I0_SB_LUT4_O_1_I1_SB_LUT4_O_2_I0[3]
|
|
.sym 21616 rx_fifo.empty_o_SB_DFF_Q_D_SB_LUT4_O_I0_SB_LUT4_O_1_I1_SB_LUT4_O_I3[1]
|
|
.sym 21617 rx_fifo.empty_o_SB_DFF_Q_D_SB_LUT4_O_I0_SB_LUT4_O_1_I1_SB_LUT4_O_I3[2]
|
|
.sym 21618 rx_fifo.rd_addr[7]
|
|
.sym 21619 rx_fifo.rd_addr[8]
|
|
.sym 21620 rx_fifo.rd_addr[9]
|
|
.sym 21621 rx_fifo.empty_o_SB_LUT4_I2_O[0]
|
|
.sym 21622 rx_fifo.rd_addr[0]
|
|
.sym 21623 r_counter_$glb_clk
|
|
.sym 21624 w_rx_fifo_pull
|
|
.sym 21625 $PACKER_VCC_NET
|
|
.sym 21629 w_rx_fifo_data[23]
|
|
.sym 21633 w_rx_fifo_data[21]
|
|
.sym 21636 w_tx_fifo_data[1]
|
|
.sym 21639 i_sck$SB_IO_IN
|
|
.sym 21653 spi_if_ins.o_cs_SB_LUT4_I0_1_O[0]
|
|
.sym 21654 w_tx_data_io[0]
|
|
.sym 21655 rx_fifo.empty_o_SB_LUT4_I2_O[0]
|
|
.sym 21656 rx_fifo.wr_addr[6]
|
|
.sym 21657 rx_fifo.empty_o_SB_DFF_Q_D_SB_LUT4_O_I0_SB_LUT4_O_1_I1_SB_LUT4_O_1_I0[1]
|
|
.sym 21658 spi_if_ins.r_tx_byte[6]
|
|
.sym 21659 rx_fifo.empty_o_SB_DFF_Q_D_SB_LUT4_O_I0_SB_LUT4_O_1_I1_SB_LUT4_O_I3[2]
|
|
.sym 21660 spi_if_ins.r_tx_byte[2]
|
|
.sym 21661 spi_if_ins.spi.o_spi_miso_SB_DFFE_Q_D_SB_LUT4_O_I2[1]
|
|
.sym 21668 w_rx_fifo_data[14]
|
|
.sym 21669 rx_fifo.wr_addr[9]
|
|
.sym 21670 $PACKER_VCC_NET
|
|
.sym 21671 rx_fifo.wr_addr[5]
|
|
.sym 21672 rx_fifo.wr_addr[8]
|
|
.sym 21677 w_rx_fifo_data[12]
|
|
.sym 21679 rx_fifo.full_o_SB_DFF_Q_D_SB_LUT4_O_I0_SB_LUT4_O_1_I0[2]
|
|
.sym 21680 rx_fifo.wr_addr[3]
|
|
.sym 21681 rx_fifo.wr_addr[6]
|
|
.sym 21682 rx_fifo.wr_addr[2]
|
|
.sym 21684 w_rx_fifo_push
|
|
.sym 21686 rx_fifo.wr_addr[4]
|
|
.sym 21689 rx_fifo.wr_addr[7]
|
|
.sym 21690 rx_fifo.full_o_SB_DFF_Q_D_SB_LUT4_O_I0_SB_LUT4_O_1_I0[1]
|
|
.sym 21698 spi_if_ins.o_cs_SB_LUT4_I3_O[3]
|
|
.sym 21700 spi_if_ins.r_tx_byte[0]
|
|
.sym 21701 spi_if_ins.r_tx_byte_SB_DFFE_Q_E
|
|
.sym 21714 rx_fifo.wr_addr[2]
|
|
.sym 21715 rx_fifo.wr_addr[3]
|
|
.sym 21717 rx_fifo.wr_addr[4]
|
|
.sym 21718 rx_fifo.wr_addr[5]
|
|
.sym 21719 rx_fifo.wr_addr[6]
|
|
.sym 21720 rx_fifo.wr_addr[7]
|
|
.sym 21721 rx_fifo.wr_addr[8]
|
|
.sym 21722 rx_fifo.wr_addr[9]
|
|
.sym 21723 rx_fifo.full_o_SB_DFF_Q_D_SB_LUT4_O_I0_SB_LUT4_O_1_I0[2]
|
|
.sym 21724 rx_fifo.full_o_SB_DFF_Q_D_SB_LUT4_O_I0_SB_LUT4_O_1_I0[1]
|
|
.sym 21725 o_iq_tx_clk_p$SB_IO_OUT_$glb_clk
|
|
.sym 21726 w_rx_fifo_push
|
|
.sym 21728 w_rx_fifo_data[12]
|
|
.sym 21732 w_rx_fifo_data[14]
|
|
.sym 21735 $PACKER_VCC_NET
|
|
.sym 21741 w_cs[0]
|
|
.sym 21748 rx_fifo.wr_addr[8]
|
|
.sym 21752 $PACKER_VCC_NET
|
|
.sym 21753 spi_if_ins.r_tx_byte[7]
|
|
.sym 21757 tx_fifo.full_o_SB_DFF_Q_D_SB_LUT4_O_I0_SB_LUT4_O_1_I0_SB_LUT4_O_I3[1]
|
|
.sym 21759 tx_fifo.wr_addr[2]
|
|
.sym 21760 spi_if_ins.spi.r_tx_byte[0]
|
|
.sym 21762 w_cs[1]
|
|
.sym 21763 w_cs[3]
|
|
.sym 21768 rx_fifo.rd_addr[8]
|
|
.sym 21771 rx_fifo.rd_addr[9]
|
|
.sym 21773 rx_fifo.rd_addr[0]
|
|
.sym 21775 rx_fifo.rd_addr[7]
|
|
.sym 21777 rx_fifo.empty_o_SB_DFF_Q_D_SB_LUT4_O_I0_SB_LUT4_O_1_I1_SB_LUT4_O_2_I0[3]
|
|
.sym 21778 rx_fifo.empty_o_SB_DFF_Q_D_SB_LUT4_O_I0_SB_LUT4_O_1_I1_SB_LUT4_O_1_I0[3]
|
|
.sym 21779 w_rx_fifo_data[15]
|
|
.sym 21781 w_rx_fifo_data[13]
|
|
.sym 21782 rx_fifo.empty_o_SB_DFF_Q_D_SB_LUT4_O_I0_SB_LUT4_O_1_I1_SB_LUT4_O_I3[1]
|
|
.sym 21786 w_rx_fifo_pull
|
|
.sym 21788 $PACKER_VCC_NET
|
|
.sym 21793 rx_fifo.empty_o_SB_LUT4_I2_O[0]
|
|
.sym 21795 rx_fifo.empty_o_SB_DFF_Q_D_SB_LUT4_O_I0_SB_LUT4_O_1_I1_SB_LUT4_O_1_I0[1]
|
|
.sym 21797 rx_fifo.empty_o_SB_DFF_Q_D_SB_LUT4_O_I0_SB_LUT4_O_1_I1_SB_LUT4_O_I3[2]
|
|
.sym 21800 spi_if_ins.spi.r_tx_byte[7]
|
|
.sym 21801 spi_if_ins.o_cs_SB_LUT4_I0_1_O[0]
|
|
.sym 21802 spi_if_ins.spi.r_tx_byte[0]
|
|
.sym 21803 spi_if_ins.spi.r_tx_byte[6]
|
|
.sym 21804 spi_if_ins.o_cs_SB_LUT4_I0_2_O[0]
|
|
.sym 21805 spi_if_ins.spi.o_spi_miso_SB_DFFE_Q_D_SB_LUT4_O_I2[1]
|
|
.sym 21806 spi_if_ins.spi.r_tx_byte[2]
|
|
.sym 21816 rx_fifo.empty_o_SB_DFF_Q_D_SB_LUT4_O_I0_SB_LUT4_O_1_I1_SB_LUT4_O_1_I0[1]
|
|
.sym 21817 rx_fifo.empty_o_SB_DFF_Q_D_SB_LUT4_O_I0_SB_LUT4_O_1_I1_SB_LUT4_O_1_I0[3]
|
|
.sym 21819 rx_fifo.empty_o_SB_DFF_Q_D_SB_LUT4_O_I0_SB_LUT4_O_1_I1_SB_LUT4_O_2_I0[3]
|
|
.sym 21820 rx_fifo.empty_o_SB_DFF_Q_D_SB_LUT4_O_I0_SB_LUT4_O_1_I1_SB_LUT4_O_I3[1]
|
|
.sym 21821 rx_fifo.empty_o_SB_DFF_Q_D_SB_LUT4_O_I0_SB_LUT4_O_1_I1_SB_LUT4_O_I3[2]
|
|
.sym 21822 rx_fifo.rd_addr[7]
|
|
.sym 21823 rx_fifo.rd_addr[8]
|
|
.sym 21824 rx_fifo.rd_addr[9]
|
|
.sym 21825 rx_fifo.empty_o_SB_LUT4_I2_O[0]
|
|
.sym 21826 rx_fifo.rd_addr[0]
|
|
.sym 21827 r_counter_$glb_clk
|
|
.sym 21828 w_rx_fifo_pull
|
|
.sym 21829 $PACKER_VCC_NET
|
|
.sym 21833 w_rx_fifo_data[15]
|
|
.sym 21837 w_rx_fifo_data[13]
|
|
.sym 21842 spi_if_ins.o_cs_SB_LUT4_I0_O[1]
|
|
.sym 21844 o_miso_$_TBUF__Y_E
|
|
.sym 21850 spi_if_ins.r_tx_data_valid_SB_DFFESR_Q_D[1]
|
|
.sym 21852 rx_fifo.rd_addr[8]
|
|
.sym 21854 w_tx_data_smi[0]
|
|
.sym 21856 spi_if_ins.r_tx_byte_SB_DFFE_Q_E
|
|
.sym 21858 i_rst_b$SB_IO_IN
|
|
.sym 21859 spi_if_ins.spi.r_tx_byte[2]
|
|
.sym 21860 smi_ctrl_ins.o_data_out_SB_DFFESS_Q_E
|
|
.sym 21864 w_tx_fifo_pulled_data[26]
|
|
.sym 21865 spi_if_ins.o_fetch_cmd_SB_DFFESR_Q_E_SB_LUT4_O_I1[2]
|
|
.sym 21871 tx_fifo.wr_addr[3]
|
|
.sym 21872 tx_fifo.wr_addr[6]
|
|
.sym 21873 tx_fifo.wr_addr[9]
|
|
.sym 21875 tx_fifo.full_o_SB_DFF_Q_D_SB_LUT4_O_I0_SB_LUT4_O_1_I2_SB_LUT4_O_I3[0]
|
|
.sym 21878 tx_fifo.wr_addr[7]
|
|
.sym 21879 w_tx_fifo_data[20]
|
|
.sym 21881 tx_fifo.wr_addr[4]
|
|
.sym 21883 w_tx_fifo_data[22]
|
|
.sym 21884 tx_fifo.wr_addr[5]
|
|
.sym 21885 tx_fifo.wr_addr[8]
|
|
.sym 21888 w_tx_fifo_push
|
|
.sym 21890 $PACKER_VCC_NET
|
|
.sym 21895 tx_fifo.full_o_SB_DFF_Q_D_SB_LUT4_O_I0_SB_LUT4_O_1_I0_SB_LUT4_O_I3[1]
|
|
.sym 21897 tx_fifo.wr_addr[2]
|
|
.sym 21907 w_tx_data_smi[1]
|
|
.sym 21908 w_tx_data_smi[0]
|
|
.sym 21918 tx_fifo.wr_addr[2]
|
|
.sym 21919 tx_fifo.wr_addr[3]
|
|
.sym 21921 tx_fifo.wr_addr[4]
|
|
.sym 21922 tx_fifo.wr_addr[5]
|
|
.sym 21923 tx_fifo.wr_addr[6]
|
|
.sym 21924 tx_fifo.wr_addr[7]
|
|
.sym 21925 tx_fifo.wr_addr[8]
|
|
.sym 21926 tx_fifo.wr_addr[9]
|
|
.sym 21927 tx_fifo.full_o_SB_DFF_Q_D_SB_LUT4_O_I0_SB_LUT4_O_1_I0_SB_LUT4_O_I3[1]
|
|
.sym 21928 tx_fifo.full_o_SB_DFF_Q_D_SB_LUT4_O_I0_SB_LUT4_O_1_I2_SB_LUT4_O_I3[0]
|
|
.sym 21929 r_counter_$glb_clk
|
|
.sym 21930 w_tx_fifo_push
|
|
.sym 21932 w_tx_fifo_data[20]
|
|
.sym 21936 w_tx_fifo_data[22]
|
|
.sym 21939 $PACKER_VCC_NET
|
|
.sym 21944 w_cs[0]
|
|
.sym 21945 spi_if_ins.spi.o_spi_miso_SB_DFFE_Q_D_SB_LUT4_O_I2_SB_LUT4_O_I0[0]
|
|
.sym 21946 spi_if_ins.spi.SCKr_SB_LUT4_I0_O[0]
|
|
.sym 21951 tx_fifo.full_o_SB_DFF_Q_D_SB_LUT4_O_I0_SB_LUT4_O_1_I2_SB_LUT4_O_I3[0]
|
|
.sym 21952 tx_fifo.wr_addr[5]
|
|
.sym 21954 tx_fifo.wr_addr[7]
|
|
.sym 21955 tx_fifo.wr_addr[3]
|
|
.sym 21959 w_tx_fifo_pull
|
|
.sym 21965 w_tx_fifo_data[27]
|
|
.sym 21967 w_tx_fifo_pull
|
|
.sym 21972 tx_fifo.empty_o_SB_DFF_Q_D_SB_LUT4_O_I1_SB_LUT4_O_1_I3_SB_LUT4_O_I3[2]
|
|
.sym 21974 w_tx_fifo_data[21]
|
|
.sym 21975 tx_fifo.rd_addr[9]
|
|
.sym 21976 $PACKER_VCC_NET
|
|
.sym 21978 w_tx_fifo_data[23]
|
|
.sym 21979 tx_fifo.empty_o_SB_DFF_Q_D_SB_LUT4_O_I1_SB_LUT4_O_1_I3_SB_LUT4_O_I3[1]
|
|
.sym 21981 tx_fifo.empty_o_SB_LUT4_I3_O_SB_LUT4_O_1_I0[3]
|
|
.sym 21982 tx_fifo.empty_o_SB_DFF_Q_D_SB_LUT4_O_I1_SB_LUT4_O_1_I3[1]
|
|
.sym 21985 tx_fifo.empty_o_SB_LUT4_I3_O_SB_LUT4_O_I0[3]
|
|
.sym 21986 tx_fifo.empty_o_SB_LUT4_I3_O_SB_LUT4_O_1_I0[2]
|
|
.sym 21987 tx_fifo.empty_o_SB_LUT4_I3_O_SB_LUT4_O_I0[1]
|
|
.sym 21989 tx_fifo.rd_addr[0]
|
|
.sym 21997 tx_fifo.empty_o_SB_DFF_Q_D_SB_LUT4_O_I1_SB_LUT4_O_1_I3[2]
|
|
.sym 21999 w_tx_fifo_pull
|
|
.sym 22004 io_ctrl_ins.o_pmod[7]
|
|
.sym 22020 tx_fifo.empty_o_SB_LUT4_I3_O_SB_LUT4_O_I0[3]
|
|
.sym 22021 tx_fifo.empty_o_SB_LUT4_I3_O_SB_LUT4_O_1_I0[2]
|
|
.sym 22023 tx_fifo.empty_o_SB_LUT4_I3_O_SB_LUT4_O_1_I0[3]
|
|
.sym 22024 tx_fifo.empty_o_SB_DFF_Q_D_SB_LUT4_O_I1_SB_LUT4_O_1_I3[1]
|
|
.sym 22025 tx_fifo.empty_o_SB_DFF_Q_D_SB_LUT4_O_I1_SB_LUT4_O_1_I3[2]
|
|
.sym 22026 tx_fifo.empty_o_SB_DFF_Q_D_SB_LUT4_O_I1_SB_LUT4_O_1_I3_SB_LUT4_O_I3[1]
|
|
.sym 22027 tx_fifo.empty_o_SB_DFF_Q_D_SB_LUT4_O_I1_SB_LUT4_O_1_I3_SB_LUT4_O_I3[2]
|
|
.sym 22028 tx_fifo.rd_addr[9]
|
|
.sym 22029 tx_fifo.empty_o_SB_LUT4_I3_O_SB_LUT4_O_I0[1]
|
|
.sym 22030 tx_fifo.rd_addr[0]
|
|
.sym 22031 o_iq_tx_clk_p$SB_IO_OUT_$glb_clk
|
|
.sym 22032 w_tx_fifo_pull
|
|
.sym 22033 $PACKER_VCC_NET
|
|
.sym 22037 w_tx_fifo_data[23]
|
|
.sym 22041 w_tx_fifo_data[21]
|
|
.sym 22044 tx_fifo.empty_o_SB_DFF_Q_D_SB_LUT4_O_I1_SB_LUT4_O_1_I3[2]
|
|
.sym 22049 tx_fifo.empty_o_SB_DFF_Q_D_SB_LUT4_O_I1_SB_LUT4_O_1_I3_SB_LUT4_O_I3[1]
|
|
.sym 22054 tx_fifo.empty_o_SB_LUT4_I3_O_SB_LUT4_O_1_I0[2]
|
|
.sym 22056 tx_fifo.empty_o_SB_DFF_Q_D_SB_LUT4_O_I1_SB_LUT4_O_1_I3_SB_LUT4_O_I3[2]
|
|
.sym 22058 spi_if_ins.o_fetch_cmd_SB_LUT4_I3_O[2]
|
|
.sym 22060 io_ctrl_ins.o_data_out_SB_DFFESR_Q_6_R_SB_LUT4_O_I1_SB_LUT4_I2_O[1]
|
|
.sym 22061 w_tx_data_io[0]
|
|
.sym 22063 w_tx_fifo_data[25]
|
|
.sym 22069 w_tx_fifo_push
|
|
.sym 22074 tx_fifo.wr_addr[6]
|
|
.sym 22078 $PACKER_VCC_NET
|
|
.sym 22079 tx_fifo.wr_addr[7]
|
|
.sym 22083 tx_fifo.wr_addr[2]
|
|
.sym 22084 tx_fifo.wr_addr[3]
|
|
.sym 22085 w_tx_fifo_data[26]
|
|
.sym 22086 tx_fifo.wr_addr[5]
|
|
.sym 22088 tx_fifo.wr_addr[9]
|
|
.sym 22089 tx_fifo.wr_addr[8]
|
|
.sym 22092 w_tx_fifo_data[24]
|
|
.sym 22096 tx_fifo.wr_addr[4]
|
|
.sym 22100 tx_fifo.full_o_SB_DFF_Q_D_SB_LUT4_O_I0_SB_LUT4_O_1_I2_SB_LUT4_O_I3[0]
|
|
.sym 22101 w_tx_fifo_push
|
|
.sym 22105 tx_fifo.full_o_SB_DFF_Q_D_SB_LUT4_O_I0_SB_LUT4_O_1_I0_SB_LUT4_O_I3[1]
|
|
.sym 22106 i_button_SB_LUT4_I3_O[1]
|
|
.sym 22107 i_button_SB_LUT4_I3_O[0]
|
|
.sym 22109 w_tx_data_io[6]
|
|
.sym 22110 w_tx_data_io[7]
|
|
.sym 22112 w_tx_data_io[5]
|
|
.sym 22113 io_ctrl_ins.tr_vc_1_state_SB_LUT4_I0_O[1]
|
|
.sym 22122 tx_fifo.wr_addr[2]
|
|
.sym 22123 tx_fifo.wr_addr[3]
|
|
.sym 22125 tx_fifo.wr_addr[4]
|
|
.sym 22126 tx_fifo.wr_addr[5]
|
|
.sym 22127 tx_fifo.wr_addr[6]
|
|
.sym 22128 tx_fifo.wr_addr[7]
|
|
.sym 22129 tx_fifo.wr_addr[8]
|
|
.sym 22130 tx_fifo.wr_addr[9]
|
|
.sym 22131 tx_fifo.full_o_SB_DFF_Q_D_SB_LUT4_O_I0_SB_LUT4_O_1_I0_SB_LUT4_O_I3[1]
|
|
.sym 22132 tx_fifo.full_o_SB_DFF_Q_D_SB_LUT4_O_I0_SB_LUT4_O_1_I2_SB_LUT4_O_I3[0]
|
|
.sym 22133 r_counter_$glb_clk
|
|
.sym 22134 w_tx_fifo_push
|
|
.sym 22136 w_tx_fifo_data[24]
|
|
.sym 22140 w_tx_fifo_data[26]
|
|
.sym 22143 $PACKER_VCC_NET
|
|
.sym 22148 tx_fifo.wr_addr[6]
|
|
.sym 22151 o_rx_h_tx_l$SB_IO_OUT
|
|
.sym 22155 tx_fifo.wr_addr[7]
|
|
.sym 22157 spi_if_ins.o_load_cmd_SB_LUT4_I3_O_SB_LUT4_I3_1_O
|
|
.sym 22163 o_shdn_rx_lna$SB_IO_OUT
|
|
.sym 22165 w_tx_fifo_data[2]
|
|
.sym 22166 io_ctrl_ins.led1_state
|
|
.sym 22167 tx_fifo.wr_addr[2]
|
|
.sym 22168 io_ctrl_ins.led0_state
|
|
.sym 22171 tx_fifo.full_o_SB_DFF_Q_D_SB_LUT4_O_I0_SB_LUT4_O_1_I0_SB_LUT4_O_I3[1]
|
|
.sym 22176 tx_fifo.empty_o_SB_DFF_Q_D_SB_LUT4_O_I1_SB_LUT4_O_1_I3_SB_LUT4_O_I3[2]
|
|
.sym 22177 tx_fifo.rd_addr[0]
|
|
.sym 22178 tx_fifo.empty_o_SB_LUT4_I3_O_SB_LUT4_O_1_I0[3]
|
|
.sym 22179 tx_fifo.empty_o_SB_DFF_Q_D_SB_LUT4_O_I1_SB_LUT4_O_1_I3[1]
|
|
.sym 22183 tx_fifo.rd_addr[9]
|
|
.sym 22185 tx_fifo.empty_o_SB_LUT4_I3_O_SB_LUT4_O_I0[3]
|
|
.sym 22189 $PACKER_VCC_NET
|
|
.sym 22190 tx_fifo.empty_o_SB_LUT4_I3_O_SB_LUT4_O_1_I0[2]
|
|
.sym 22191 tx_fifo.empty_o_SB_LUT4_I3_O_SB_LUT4_O_I0[1]
|
|
.sym 22192 w_tx_fifo_data[27]
|
|
.sym 22194 w_tx_fifo_pull
|
|
.sym 22197 tx_fifo.empty_o_SB_DFF_Q_D_SB_LUT4_O_I1_SB_LUT4_O_1_I3_SB_LUT4_O_I3[1]
|
|
.sym 22201 w_tx_fifo_data[25]
|
|
.sym 22205 tx_fifo.empty_o_SB_DFF_Q_D_SB_LUT4_O_I1_SB_LUT4_O_1_I3[2]
|
|
.sym 22208 w_tx_data_io[4]
|
|
.sym 22209 w_tx_data_io[0]
|
|
.sym 22211 w_tx_data_io[1]
|
|
.sym 22212 io_ctrl_ins.led1_state_SB_LUT4_I0_I2[3]
|
|
.sym 22213 w_tx_data_io[3]
|
|
.sym 22214 io_ctrl_ins.rx_h_b_state_SB_LUT4_I0_O[0]
|
|
.sym 22215 io_ctrl_ins.o_data_out_SB_DFFESR_Q_R
|
|
.sym 22224 tx_fifo.empty_o_SB_LUT4_I3_O_SB_LUT4_O_I0[3]
|
|
.sym 22225 tx_fifo.empty_o_SB_LUT4_I3_O_SB_LUT4_O_1_I0[2]
|
|
.sym 22227 tx_fifo.empty_o_SB_LUT4_I3_O_SB_LUT4_O_1_I0[3]
|
|
.sym 22228 tx_fifo.empty_o_SB_DFF_Q_D_SB_LUT4_O_I1_SB_LUT4_O_1_I3[1]
|
|
.sym 22229 tx_fifo.empty_o_SB_DFF_Q_D_SB_LUT4_O_I1_SB_LUT4_O_1_I3[2]
|
|
.sym 22230 tx_fifo.empty_o_SB_DFF_Q_D_SB_LUT4_O_I1_SB_LUT4_O_1_I3_SB_LUT4_O_I3[1]
|
|
.sym 22231 tx_fifo.empty_o_SB_DFF_Q_D_SB_LUT4_O_I1_SB_LUT4_O_1_I3_SB_LUT4_O_I3[2]
|
|
.sym 22232 tx_fifo.rd_addr[9]
|
|
.sym 22233 tx_fifo.empty_o_SB_LUT4_I3_O_SB_LUT4_O_I0[1]
|
|
.sym 22234 tx_fifo.rd_addr[0]
|
|
.sym 22235 o_iq_tx_clk_p$SB_IO_OUT_$glb_clk
|
|
.sym 22236 w_tx_fifo_pull
|
|
.sym 22237 $PACKER_VCC_NET
|
|
.sym 22241 w_tx_fifo_data[27]
|
|
.sym 22245 w_tx_fifo_data[25]
|
|
.sym 22250 o_tr_vc2$SB_IO_OUT
|
|
.sym 22252 io_ctrl_ins.o_data_out_SB_DFFESR_Q_6_R_SB_LUT4_O_I0_SB_LUT4_I2_O[3]
|
|
.sym 22256 o_rx_h_tx_l$SB_IO_OUT
|
|
.sym 22259 tx_fifo.rd_addr[9]
|
|
.sym 22260 tx_fifo.empty_o_SB_DFF_Q_D_SB_LUT4_O_I1_SB_LUT4_O_1_I3_SB_LUT4_O_I3[2]
|
|
.sym 22261 tx_fifo.empty_o_SB_LUT4_I3_O_SB_LUT4_O_I0[3]
|
|
.sym 22262 o_tr_vc1$SB_IO_OUT
|
|
.sym 22280 tx_fifo.full_o_SB_DFF_Q_D_SB_LUT4_O_I0_SB_LUT4_O_1_I0_SB_LUT4_O_I3[1]
|
|
.sym 22283 tx_fifo.wr_addr[5]
|
|
.sym 22284 tx_fifo.wr_addr[4]
|
|
.sym 22285 tx_fifo.wr_addr[9]
|
|
.sym 22286 tx_fifo.wr_addr[3]
|
|
.sym 22290 tx_fifo.full_o_SB_DFF_Q_D_SB_LUT4_O_I0_SB_LUT4_O_1_I2_SB_LUT4_O_I3[0]
|
|
.sym 22292 tx_fifo.wr_addr[7]
|
|
.sym 22296 w_tx_fifo_push
|
|
.sym 22298 tx_fifo.wr_addr[6]
|
|
.sym 22300 tx_fifo.wr_addr[8]
|
|
.sym 22303 w_tx_fifo_data[2]
|
|
.sym 22305 tx_fifo.wr_addr[2]
|
|
.sym 22307 $PACKER_VCC_NET
|
|
.sym 22316 o_tr_vc1$SB_IO_OUT
|
|
.sym 22317 o_tr_vc1_b$SB_IO_OUT
|
|
.sym 22326 tx_fifo.wr_addr[2]
|
|
.sym 22327 tx_fifo.wr_addr[3]
|
|
.sym 22329 tx_fifo.wr_addr[4]
|
|
.sym 22330 tx_fifo.wr_addr[5]
|
|
.sym 22331 tx_fifo.wr_addr[6]
|
|
.sym 22332 tx_fifo.wr_addr[7]
|
|
.sym 22333 tx_fifo.wr_addr[8]
|
|
.sym 22334 tx_fifo.wr_addr[9]
|
|
.sym 22335 tx_fifo.full_o_SB_DFF_Q_D_SB_LUT4_O_I0_SB_LUT4_O_1_I0_SB_LUT4_O_I3[1]
|
|
.sym 22336 tx_fifo.full_o_SB_DFF_Q_D_SB_LUT4_O_I0_SB_LUT4_O_1_I2_SB_LUT4_O_I3[0]
|
|
.sym 22337 r_counter_$glb_clk
|
|
.sym 22338 w_tx_fifo_push
|
|
.sym 22344 w_tx_fifo_data[2]
|
|
.sym 22347 $PACKER_VCC_NET
|
|
.sym 22358 tx_fifo.full_o_SB_DFF_Q_D_SB_LUT4_O_I0_SB_LUT4_O_1_I2_SB_LUT4_O_I3[0]
|
|
.sym 22359 w_rx_data[1]
|
|
.sym 22360 tx_fifo.wr_addr[7]
|
|
.sym 22362 io_ctrl_ins.tr_vc_2_state_SB_LUT4_I0_O[3]
|
|
.sym 22367 w_tx_fifo_pull
|
|
.sym 22381 tx_fifo.empty_o_SB_DFF_Q_D_SB_LUT4_O_I1_SB_LUT4_O_1_I3[1]
|
|
.sym 22382 w_tx_fifo_pull
|
|
.sym 22383 tx_fifo.empty_o_SB_LUT4_I3_O_SB_LUT4_O_1_I0[2]
|
|
.sym 22384 tx_fifo.empty_o_SB_DFF_Q_D_SB_LUT4_O_I1_SB_LUT4_O_1_I3[2]
|
|
.sym 22386 tx_fifo.empty_o_SB_LUT4_I3_O_SB_LUT4_O_1_I0[3]
|
|
.sym 22393 $PACKER_VCC_NET
|
|
.sym 22394 tx_fifo.empty_o_SB_DFF_Q_D_SB_LUT4_O_I1_SB_LUT4_O_1_I3_SB_LUT4_O_I3[1]
|
|
.sym 22395 w_tx_fifo_data[3]
|
|
.sym 22396 tx_fifo.empty_o_SB_DFF_Q_D_SB_LUT4_O_I1_SB_LUT4_O_1_I3_SB_LUT4_O_I3[2]
|
|
.sym 22397 tx_fifo.rd_addr[0]
|
|
.sym 22398 tx_fifo.empty_o_SB_LUT4_I3_O_SB_LUT4_O_I0[3]
|
|
.sym 22402 tx_fifo.empty_o_SB_LUT4_I3_O_SB_LUT4_O_I0[1]
|
|
.sym 22405 w_tx_fifo_data[1]
|
|
.sym 22408 tx_fifo.rd_addr[9]
|
|
.sym 22424 tx_fifo.empty_o_SB_LUT4_I3_O_SB_LUT4_O_I0[3]
|
|
.sym 22425 tx_fifo.empty_o_SB_LUT4_I3_O_SB_LUT4_O_1_I0[2]
|
|
.sym 22427 tx_fifo.empty_o_SB_LUT4_I3_O_SB_LUT4_O_1_I0[3]
|
|
.sym 22428 tx_fifo.empty_o_SB_DFF_Q_D_SB_LUT4_O_I1_SB_LUT4_O_1_I3[1]
|
|
.sym 22429 tx_fifo.empty_o_SB_DFF_Q_D_SB_LUT4_O_I1_SB_LUT4_O_1_I3[2]
|
|
.sym 22430 tx_fifo.empty_o_SB_DFF_Q_D_SB_LUT4_O_I1_SB_LUT4_O_1_I3_SB_LUT4_O_I3[1]
|
|
.sym 22431 tx_fifo.empty_o_SB_DFF_Q_D_SB_LUT4_O_I1_SB_LUT4_O_1_I3_SB_LUT4_O_I3[2]
|
|
.sym 22432 tx_fifo.rd_addr[9]
|
|
.sym 22433 tx_fifo.empty_o_SB_LUT4_I3_O_SB_LUT4_O_I0[1]
|
|
.sym 22434 tx_fifo.rd_addr[0]
|
|
.sym 22435 o_iq_tx_clk_p$SB_IO_OUT_$glb_clk
|
|
.sym 22436 w_tx_fifo_pull
|
|
.sym 22437 $PACKER_VCC_NET
|
|
.sym 22441 w_tx_fifo_data[3]
|
|
.sym 22445 w_tx_fifo_data[1]
|
|
.sym 22451 spi_if_ins.o_load_cmd_SB_LUT4_I3_O_SB_LUT4_I3_O
|
|
.sym 22452 io_ctrl_ins.rf_pin_state[4]
|
|
.sym 22459 io_ctrl_ins.rx_h_state_SB_DFFE_Q_E
|
|
.sym 22460 io_ctrl_ins.rf_pin_state[5]
|
|
.sym 22470 io_ctrl_ins.rf_mode[1]
|
|
.sym 22487 o_led1$SB_IO_OUT
|
|
.sym 22500 o_led1$SB_IO_OUT
|
|
.sym 22514 i_config[0]$SB_IO_IN
|
|
.sym 22517 int_miso
|
|
.sym 22519 o_miso_$_TBUF__Y_E
|
|
.sym 22526 int_miso
|
|
.sym 22527 o_miso_$_TBUF__Y_E
|
|
.sym 22543 o_miso_$_TBUF__Y_E
|
|
.sym 22546 w_smi_data_output[3]
|
|
.sym 22552 w_lvds_rx_24_d0_SB_LUT4_I1_O[0]
|
|
.sym 22558 int_miso
|
|
.sym 22584 w_rx_24_fifo_data[27]
|
|
.sym 22585 w_rx_09_fifo_data[26]
|
|
.sym 22588 w_rx_24_fifo_data[25]
|
|
.sym 22590 w_rx_09_fifo_data[25]
|
|
.sym 22592 o_led1$SB_IO_OUT
|
|
.sym 22593 o_led1$SB_IO_OUT
|
|
.sym 22597 w_rx_09_fifo_data[27]
|
|
.sym 22601 w_rx_24_fifo_data[24]
|
|
.sym 22602 w_lvds_rx_24_d0_SB_LUT4_I1_O[0]
|
|
.sym 22603 w_rx_24_fifo_data[26]
|
|
.sym 22608 o_led1$SB_IO_OUT
|
|
.sym 22619 w_rx_24_fifo_data[25]
|
|
.sym 22623 w_rx_24_fifo_data[26]
|
|
.sym 22625 w_rx_09_fifo_data[26]
|
|
.sym 22626 o_led1$SB_IO_OUT
|
|
.sym 22629 w_rx_24_fifo_data[27]
|
|
.sym 22631 w_rx_09_fifo_data[27]
|
|
.sym 22632 o_led1$SB_IO_OUT
|
|
.sym 22637 w_rx_24_fifo_data[24]
|
|
.sym 22641 w_rx_24_fifo_data[25]
|
|
.sym 22642 o_led1$SB_IO_OUT
|
|
.sym 22643 w_rx_09_fifo_data[25]
|
|
.sym 22648 w_rx_24_fifo_data[27]
|
|
.sym 22656 w_rx_24_fifo_data[26]
|
|
.sym 22663 w_lvds_rx_24_d0_SB_LUT4_I1_O[0]
|
|
.sym 22664 o_iq_tx_clk_p$SB_IO_OUT_$glb_clk
|
|
.sym 22666 i_sck$SB_IO_IN
|
|
.sym 22668 i_ss$SB_IO_IN
|
|
.sym 22677 smi_ctrl_ins.r_fifo_pull
|
|
.sym 22680 spi_if_ins.r_tx_data_valid_SB_LUT4_I3_O
|
|
.sym 22695 o_led1$SB_IO_OUT
|
|
.sym 22707 i_ss$SB_IO_IN
|
|
.sym 22716 smi_ctrl_ins.o_smi_data_out_SB_DFFNE_Q_D_SB_LUT4_O_4_I3[0]
|
|
.sym 22724 i_ss$SB_IO_IN
|
|
.sym 22729 i_sck$SB_IO_IN
|
|
.sym 22750 smi_ctrl_ins.int_cnt_rx[3]
|
|
.sym 22752 o_led1$SB_IO_OUT
|
|
.sym 22755 w_rx_09_fifo_data[25]
|
|
.sym 22758 w_lvds_rx_09_d1_SB_LUT4_I0_O[0]
|
|
.sym 22759 w_rx_09_fifo_data[31]
|
|
.sym 22760 w_rx_24_fifo_data[29]
|
|
.sym 22763 smi_ctrl_ins.r_fifo_pulled_data[27]
|
|
.sym 22765 w_rx_24_fifo_data[31]
|
|
.sym 22767 w_rx_24_fifo_data[24]
|
|
.sym 22768 smi_ctrl_ins.int_cnt_rx[4]
|
|
.sym 22769 smi_ctrl_ins.r_fifo_pulled_data[11]
|
|
.sym 22770 w_rx_09_fifo_data[29]
|
|
.sym 22775 w_rx_09_fifo_data[24]
|
|
.sym 22776 w_rx_09_fifo_data[27]
|
|
.sym 22781 o_led1$SB_IO_OUT
|
|
.sym 22782 w_rx_24_fifo_data[24]
|
|
.sym 22783 w_rx_09_fifo_data[24]
|
|
.sym 22786 w_rx_09_fifo_data[24]
|
|
.sym 22792 w_rx_24_fifo_data[31]
|
|
.sym 22793 o_led1$SB_IO_OUT
|
|
.sym 22795 w_rx_09_fifo_data[31]
|
|
.sym 22798 w_rx_09_fifo_data[29]
|
|
.sym 22799 w_rx_24_fifo_data[29]
|
|
.sym 22800 o_led1$SB_IO_OUT
|
|
.sym 22805 w_rx_09_fifo_data[29]
|
|
.sym 22812 w_rx_09_fifo_data[25]
|
|
.sym 22816 smi_ctrl_ins.r_fifo_pulled_data[27]
|
|
.sym 22817 smi_ctrl_ins.int_cnt_rx[3]
|
|
.sym 22818 smi_ctrl_ins.r_fifo_pulled_data[11]
|
|
.sym 22819 smi_ctrl_ins.int_cnt_rx[4]
|
|
.sym 22825 w_rx_09_fifo_data[27]
|
|
.sym 22826 w_lvds_rx_09_d1_SB_LUT4_I0_O[0]
|
|
.sym 22827 o_iq_tx_clk_p$SB_IO_OUT_$glb_clk
|
|
.sym 22829 smi_ctrl_ins.r_fifo_pulled_data[27]
|
|
.sym 22851 w_rx_09_fifo_data[25]
|
|
.sym 22853 o_led1$SB_IO_OUT
|
|
.sym 22858 w_rx_24_fifo_data[23]
|
|
.sym 22861 w_rx_09_fifo_data[24]
|
|
.sym 22863 smi_ctrl_ins.r_fifo_pull
|
|
.sym 22881 i_rst_b$SB_IO_IN
|
|
.sym 22894 smi_ctrl_ins.int_cnt_rx[3]
|
|
.sym 22899 smi_ctrl_ins.int_cnt_rx[4]
|
|
.sym 22935 smi_ctrl_ins.int_cnt_rx[3]
|
|
.sym 22936 smi_ctrl_ins.int_cnt_rx[4]
|
|
.sym 22949 i_rst_b$SB_IO_IN
|
|
.sym 22950 smi_ctrl_ins.soe_and_reset_$glb_clk
|
|
.sym 22954 smi_ctrl_ins.r_fifo_pull_1
|
|
.sym 22967 i_rst_b$SB_IO_IN
|
|
.sym 22976 w_rx_24_fifo_data[18]
|
|
.sym 22979 w_rx_fifo_pulled_data[27]
|
|
.sym 22983 spi_if_ins.spi.r_rx_done_SB_DFFESR_Q_E
|
|
.sym 22984 i_ss$SB_IO_IN
|
|
.sym 22985 smi_ctrl_ins.int_cnt_rx[4]
|
|
.sym 22996 w_rx_24_fifo_data[22]
|
|
.sym 23001 w_rx_24_fifo_data[20]
|
|
.sym 23005 w_rx_24_fifo_data[16]
|
|
.sym 23011 smi_ctrl_ins.r_fifo_pull_1
|
|
.sym 23013 w_rx_24_fifo_data[18]
|
|
.sym 23018 w_rx_24_fifo_data[23]
|
|
.sym 23019 w_rx_fifo_empty
|
|
.sym 23020 w_lvds_rx_24_d0_SB_LUT4_I1_O[0]
|
|
.sym 23023 smi_ctrl_ins.r_fifo_pull
|
|
.sym 23026 w_rx_24_fifo_data[18]
|
|
.sym 23032 smi_ctrl_ins.r_fifo_pull
|
|
.sym 23033 smi_ctrl_ins.r_fifo_pull_1
|
|
.sym 23034 w_rx_fifo_empty
|
|
.sym 23041 w_rx_24_fifo_data[22]
|
|
.sym 23046 w_rx_24_fifo_data[20]
|
|
.sym 23053 w_rx_24_fifo_data[16]
|
|
.sym 23071 w_rx_24_fifo_data[23]
|
|
.sym 23072 w_lvds_rx_24_d0_SB_LUT4_I1_O[0]
|
|
.sym 23073 o_iq_tx_clk_p$SB_IO_OUT_$glb_clk
|
|
.sym 23081 spi_if_ins.spi.r_rx_done
|
|
.sym 23101 o_led0$SB_IO_OUT
|
|
.sym 23102 o_smi_read_req$SB_IO_OUT
|
|
.sym 23116 o_led1$SB_IO_OUT
|
|
.sym 23119 w_rx_24_fifo_data[22]
|
|
.sym 23122 w_rx_24_fifo_data[16]
|
|
.sym 23124 o_led1$SB_IO_OUT
|
|
.sym 23126 w_rx_09_fifo_data[22]
|
|
.sym 23127 w_lvds_rx_09_d1_SB_LUT4_I0_O[0]
|
|
.sym 23133 w_rx_09_fifo_data[23]
|
|
.sym 23134 w_rx_09_fifo_data[21]
|
|
.sym 23138 w_rx_09_fifo_data[16]
|
|
.sym 23147 w_rx_24_fifo_data[23]
|
|
.sym 23158 w_rx_09_fifo_data[21]
|
|
.sym 23161 w_rx_24_fifo_data[23]
|
|
.sym 23162 o_led1$SB_IO_OUT
|
|
.sym 23164 w_rx_09_fifo_data[23]
|
|
.sym 23167 w_rx_09_fifo_data[22]
|
|
.sym 23168 o_led1$SB_IO_OUT
|
|
.sym 23169 w_rx_24_fifo_data[22]
|
|
.sym 23174 w_rx_09_fifo_data[22]
|
|
.sym 23179 o_led1$SB_IO_OUT
|
|
.sym 23180 w_rx_24_fifo_data[16]
|
|
.sym 23182 w_rx_09_fifo_data[16]
|
|
.sym 23186 o_led1$SB_IO_OUT
|
|
.sym 23193 w_rx_09_fifo_data[23]
|
|
.sym 23195 w_lvds_rx_09_d1_SB_LUT4_I0_O[0]
|
|
.sym 23196 o_iq_tx_clk_p$SB_IO_OUT_$glb_clk
|
|
.sym 23202 spi_if_ins.spi.r2_rx_done
|
|
.sym 23218 w_rx_24_fifo_data[16]
|
|
.sym 23222 i_ss$SB_IO_IN
|
|
.sym 23226 i_sck$SB_IO_IN
|
|
.sym 23227 i_glob_clock$SB_IO_IN
|
|
.sym 23229 spi_if_ins.o_load_cmd_SB_LUT4_I3_O_SB_LUT4_I3_2_O
|
|
.sym 23230 i_glob_clock$SB_IO_IN
|
|
.sym 23239 w_rx_24_fifo_data[20]
|
|
.sym 23241 w_lvds_rx_09_d1_SB_LUT4_I0_O[0]
|
|
.sym 23245 o_led1$SB_IO_OUT
|
|
.sym 23248 w_rx_24_fifo_data[18]
|
|
.sym 23249 w_rx_fifo_empty
|
|
.sym 23250 w_rx_09_fifo_data[20]
|
|
.sym 23253 o_led1$SB_IO_OUT
|
|
.sym 23258 w_rx_09_fifo_data[16]
|
|
.sym 23261 o_led0$SB_IO_OUT
|
|
.sym 23264 w_tx_fifo_full
|
|
.sym 23267 w_rx_09_fifo_data[18]
|
|
.sym 23272 w_rx_24_fifo_data[18]
|
|
.sym 23273 w_rx_09_fifo_data[18]
|
|
.sym 23274 o_led1$SB_IO_OUT
|
|
.sym 23286 w_rx_09_fifo_data[20]
|
|
.sym 23290 w_rx_09_fifo_data[18]
|
|
.sym 23297 w_rx_09_fifo_data[16]
|
|
.sym 23308 w_rx_09_fifo_data[20]
|
|
.sym 23309 o_led1$SB_IO_OUT
|
|
.sym 23310 w_rx_24_fifo_data[20]
|
|
.sym 23314 w_rx_fifo_empty
|
|
.sym 23315 w_tx_fifo_full
|
|
.sym 23317 o_led0$SB_IO_OUT
|
|
.sym 23318 w_lvds_rx_09_d1_SB_LUT4_I0_O[0]
|
|
.sym 23319 o_iq_tx_clk_p$SB_IO_OUT_$glb_clk
|
|
.sym 23323 io_ctrl_ins.pmod_dir_state[7]
|
|
.sym 23346 i_sck$SB_IO_IN
|
|
.sym 23347 spi_if_ins.o_cs_SB_LUT4_I0_2_O_SB_LUT4_I2_O
|
|
.sym 23350 w_tx_fifo_full
|
|
.sym 23353 r_counter
|
|
.sym 23362 spi_if_ins.r_tx_byte[7]
|
|
.sym 23367 spi_if_ins.r_tx_data_valid_SB_LUT4_I3_O
|
|
.sym 23372 spi_if_ins.spi.o_spi_miso_SB_DFFE_Q_D_SB_LUT4_O_I2[1]
|
|
.sym 23373 spi_if_ins.spi.o_spi_miso_SB_DFFE_Q_E
|
|
.sym 23407 spi_if_ins.r_tx_byte[7]
|
|
.sym 23408 spi_if_ins.r_tx_data_valid_SB_LUT4_I3_O
|
|
.sym 23410 spi_if_ins.spi.o_spi_miso_SB_DFFE_Q_D_SB_LUT4_O_I2[1]
|
|
.sym 23441 spi_if_ins.spi.o_spi_miso_SB_DFFE_Q_E
|
|
.sym 23442 r_counter_$glb_clk
|
|
.sym 23458 spi_if_ins.spi.o_spi_miso_SB_DFFE_Q_D_SB_LUT4_O_I2[1]
|
|
.sym 23468 io_ctrl_ins.pmod_dir_state[7]
|
|
.sym 23469 w_tx_data_io[7]
|
|
.sym 23470 spi_if_ins.r_tx_data_valid_SB_LUT4_I3_O
|
|
.sym 23473 w_cs[0]
|
|
.sym 23475 w_tx_data_smi[2]
|
|
.sym 23476 w_tx_data_io[2]
|
|
.sym 23478 spi_if_ins.r_tx_byte[5]
|
|
.sym 23479 w_tx_data_io[6]
|
|
.sym 23487 spi_if_ins.r_tx_data_valid
|
|
.sym 23494 i_ss$SB_IO_IN
|
|
.sym 23496 spi_if_ins.r_tx_byte_SB_DFFE_Q_E
|
|
.sym 23504 r_tx_data[6]
|
|
.sym 23505 r_tx_data[4]
|
|
.sym 23508 r_tx_data[7]
|
|
.sym 23509 r_tx_data[5]
|
|
.sym 23510 r_tx_data[3]
|
|
.sym 23511 r_tx_data[1]
|
|
.sym 23514 r_tx_data[2]
|
|
.sym 23521 r_tx_data[7]
|
|
.sym 23526 r_tx_data[5]
|
|
.sym 23533 r_tx_data[1]
|
|
.sym 23537 r_tx_data[4]
|
|
.sym 23542 r_tx_data[3]
|
|
.sym 23549 i_ss$SB_IO_IN
|
|
.sym 23551 spi_if_ins.r_tx_data_valid
|
|
.sym 23555 r_tx_data[6]
|
|
.sym 23561 r_tx_data[2]
|
|
.sym 23564 spi_if_ins.r_tx_byte_SB_DFFE_Q_E
|
|
.sym 23565 r_counter_$glb_clk
|
|
.sym 23567 r_tx_data[5]
|
|
.sym 23568 r_tx_data[3]
|
|
.sym 23569 r_tx_data[1]
|
|
.sym 23570 r_tx_data[6]
|
|
.sym 23571 r_tx_data[4]
|
|
.sym 23572 r_tx_data[2]
|
|
.sym 23573 smi_ctrl_ins.o_data_out_SB_LUT4_I0_1_O[0]
|
|
.sym 23574 r_tx_data[7]
|
|
.sym 23579 spi_if_ins.r_tx_byte[7]
|
|
.sym 23580 $PACKER_VCC_NET
|
|
.sym 23592 i_ss$SB_IO_IN
|
|
.sym 23593 spi_if_ins.o_cs_SB_LUT4_I0_1_O[0]
|
|
.sym 23596 w_tx_data_io[4]
|
|
.sym 23597 w_tx_data_io[3]
|
|
.sym 23602 w_tx_data_io[1]
|
|
.sym 23610 spi_if_ins.r_tx_data_valid_SB_DFFESR_Q_E
|
|
.sym 23612 w_cs[0]
|
|
.sym 23621 spi_if_ins.r_tx_data_valid_SB_DFFESR_Q_D[1]
|
|
.sym 23626 spi_if_ins.o_cs_SB_LUT4_I0_O[1]
|
|
.sym 23628 w_cs[3]
|
|
.sym 23632 w_cs[2]
|
|
.sym 23634 spi_if_ins.o_cs_SB_LUT4_I0_1_O[0]
|
|
.sym 23635 w_tx_data_smi[2]
|
|
.sym 23636 w_tx_data_io[2]
|
|
.sym 23637 spi_if_ins.o_fetch_cmd_SB_DFFESR_Q_E_SB_LUT4_O_I1[2]
|
|
.sym 23638 w_cs[1]
|
|
.sym 23653 spi_if_ins.r_tx_data_valid_SB_DFFESR_Q_D[1]
|
|
.sym 23671 w_cs[1]
|
|
.sym 23672 w_cs[0]
|
|
.sym 23673 w_cs[2]
|
|
.sym 23674 w_cs[3]
|
|
.sym 23683 w_tx_data_io[2]
|
|
.sym 23684 spi_if_ins.o_cs_SB_LUT4_I0_O[1]
|
|
.sym 23685 spi_if_ins.o_cs_SB_LUT4_I0_1_O[0]
|
|
.sym 23686 w_tx_data_smi[2]
|
|
.sym 23687 spi_if_ins.r_tx_data_valid_SB_DFFESR_Q_E
|
|
.sym 23688 r_counter_$glb_clk
|
|
.sym 23689 spi_if_ins.o_fetch_cmd_SB_DFFESR_Q_E_SB_LUT4_O_I1[2]
|
|
.sym 23691 o_miso_$_TBUF__Y_E
|
|
.sym 23697 r_tx_data[0]
|
|
.sym 23709 spi_if_ins.r_tx_data_valid_SB_DFFESR_Q_D[1]
|
|
.sym 23715 i_glob_clock$SB_IO_IN
|
|
.sym 23716 spi_if_ins.o_load_cmd_SB_LUT4_I3_O_SB_LUT4_I3_2_O
|
|
.sym 23718 w_tx_data_io[5]
|
|
.sym 23719 i_glob_clock$SB_IO_IN
|
|
.sym 23721 w_cs[1]
|
|
.sym 23722 w_cs[2]
|
|
.sym 23724 w_tx_data_smi[1]
|
|
.sym 23732 spi_if_ins.o_cs_SB_LUT4_I0_1_O[0]
|
|
.sym 23734 spi_if_ins.r_tx_data_valid_SB_DFFESR_Q_D[1]
|
|
.sym 23739 w_tx_data_io[0]
|
|
.sym 23742 spi_if_ins.r_tx_byte_SB_DFFE_Q_E
|
|
.sym 23744 spi_if_ins.o_cs_SB_LUT4_I0_O[1]
|
|
.sym 23747 i_rst_b$SB_IO_IN
|
|
.sym 23751 w_tx_data_smi[0]
|
|
.sym 23754 spi_if_ins.o_fetch_cmd_SB_DFFESR_Q_E_SB_LUT4_O_I1[2]
|
|
.sym 23762 r_tx_data[0]
|
|
.sym 23764 spi_if_ins.o_cs_SB_LUT4_I0_O[1]
|
|
.sym 23765 spi_if_ins.o_cs_SB_LUT4_I0_1_O[0]
|
|
.sym 23766 w_tx_data_smi[0]
|
|
.sym 23767 w_tx_data_io[0]
|
|
.sym 23778 r_tx_data[0]
|
|
.sym 23782 spi_if_ins.o_fetch_cmd_SB_DFFESR_Q_E_SB_LUT4_O_I1[2]
|
|
.sym 23783 i_rst_b$SB_IO_IN
|
|
.sym 23784 spi_if_ins.r_tx_data_valid_SB_DFFESR_Q_D[1]
|
|
.sym 23810 spi_if_ins.r_tx_byte_SB_DFFE_Q_E
|
|
.sym 23811 r_counter_$glb_clk
|
|
.sym 23817 spi_if_ins.o_cs_SB_LUT4_I0_2_O_SB_LUT4_I2_O
|
|
.sym 23827 w_tx_fifo_pull
|
|
.sym 23838 spi_if_ins.o_cs_SB_LUT4_I0_2_O_SB_LUT4_I2_O
|
|
.sym 23839 w_rx_fifo_empty
|
|
.sym 23845 spi_if_ins.spi.r_tx_byte[7]
|
|
.sym 23846 w_tx_fifo_full
|
|
.sym 23847 w_tx_data_sys[0]
|
|
.sym 23859 spi_if_ins.r_tx_byte[7]
|
|
.sym 23861 w_cs[3]
|
|
.sym 23863 spi_if_ins.r_tx_byte[6]
|
|
.sym 23864 spi_if_ins.r_tx_byte[0]
|
|
.sym 23865 spi_if_ins.r_tx_byte[2]
|
|
.sym 23866 spi_if_ins.spi.o_spi_miso_SB_DFFE_Q_D_SB_LUT4_O_I2_SB_LUT4_O_I0[0]
|
|
.sym 23867 w_cs[0]
|
|
.sym 23869 spi_if_ins.spi.SCKr_SB_LUT4_I0_O[0]
|
|
.sym 23870 spi_if_ins.spi.o_spi_miso_SB_DFFE_Q_D_SB_LUT4_O_I2_SB_LUT4_O_I0[1]
|
|
.sym 23872 spi_if_ins.spi.r_tx_byte_SB_DFFESR_Q_E
|
|
.sym 23877 spi_if_ins.spi.o_spi_miso_SB_DFFE_Q_D_SB_LUT4_O_I2_SB_LUT4_O_I0[3]
|
|
.sym 23881 w_cs[1]
|
|
.sym 23882 w_cs[2]
|
|
.sym 23883 spi_if_ins.r_tx_data_valid_SB_LUT4_I3_O
|
|
.sym 23890 spi_if_ins.r_tx_byte[7]
|
|
.sym 23893 w_cs[3]
|
|
.sym 23894 w_cs[1]
|
|
.sym 23895 w_cs[2]
|
|
.sym 23896 w_cs[0]
|
|
.sym 23902 spi_if_ins.r_tx_byte[0]
|
|
.sym 23906 spi_if_ins.r_tx_byte[6]
|
|
.sym 23911 w_cs[0]
|
|
.sym 23912 w_cs[3]
|
|
.sym 23913 w_cs[1]
|
|
.sym 23914 w_cs[2]
|
|
.sym 23917 spi_if_ins.spi.o_spi_miso_SB_DFFE_Q_D_SB_LUT4_O_I2_SB_LUT4_O_I0[3]
|
|
.sym 23918 spi_if_ins.spi.SCKr_SB_LUT4_I0_O[0]
|
|
.sym 23919 spi_if_ins.spi.o_spi_miso_SB_DFFE_Q_D_SB_LUT4_O_I2_SB_LUT4_O_I0[0]
|
|
.sym 23920 spi_if_ins.spi.o_spi_miso_SB_DFFE_Q_D_SB_LUT4_O_I2_SB_LUT4_O_I0[1]
|
|
.sym 23925 spi_if_ins.r_tx_byte[2]
|
|
.sym 23933 spi_if_ins.spi.r_tx_byte_SB_DFFESR_Q_E
|
|
.sym 23934 r_counter_$glb_clk
|
|
.sym 23935 spi_if_ins.r_tx_data_valid_SB_LUT4_I3_O
|
|
.sym 23951 i_rst_b$SB_IO_IN
|
|
.sym 23960 w_cs[0]
|
|
.sym 23965 io_ctrl_ins.pmod_dir_state[7]
|
|
.sym 23966 w_tx_data_io[6]
|
|
.sym 23968 w_tx_data_io[7]
|
|
.sym 23979 smi_ctrl_ins.o_data_out_SB_DFFESS_Q_E
|
|
.sym 23997 spi_if_ins.o_load_cmd_SB_LUT4_I3_1_I0[2]
|
|
.sym 23999 w_rx_fifo_empty
|
|
.sym 24006 w_tx_fifo_full
|
|
.sym 24041 w_tx_fifo_full
|
|
.sym 24048 w_rx_fifo_empty
|
|
.sym 24056 smi_ctrl_ins.o_data_out_SB_DFFESS_Q_E
|
|
.sym 24057 r_counter_$glb_clk
|
|
.sym 24058 spi_if_ins.o_load_cmd_SB_LUT4_I3_1_I0[2]
|
|
.sym 24083 w_tx_data_io[4]
|
|
.sym 24084 io_ctrl_ins.o_data_out_SB_DFFESR_Q_6_R_SB_LUT4_O_I0_SB_LUT4_I2_O[1]
|
|
.sym 24086 io_ctrl_ins.led1_state_SB_LUT4_I0_I2[1]
|
|
.sym 24087 io_ctrl_ins.o_data_out_SB_DFFESR_Q_R
|
|
.sym 24089 w_tx_data_io[1]
|
|
.sym 24091 io_ctrl_ins.rx_h_b_state_SB_LUT4_I0_O[1]
|
|
.sym 24093 w_tx_data_io[3]
|
|
.sym 24102 spi_if_ins.o_load_cmd_SB_LUT4_I3_O_SB_LUT4_I3_1_O
|
|
.sym 24116 w_rx_data[7]
|
|
.sym 24133 w_rx_data[7]
|
|
.sym 24179 spi_if_ins.o_load_cmd_SB_LUT4_I3_O_SB_LUT4_I3_1_O
|
|
.sym 24180 r_counter_$glb_clk
|
|
.sym 24210 w_tx_data_io[5]
|
|
.sym 24211 io_ctrl_ins.mixer_en_state_SB_LUT4_I0_O[3]
|
|
.sym 24214 io_ctrl_ins.tr_vc_1_state_SB_LUT4_I0_O[0]
|
|
.sym 24223 io_ctrl_ins.o_pmod[7]
|
|
.sym 24224 o_rx_h_tx_l$SB_IO_OUT
|
|
.sym 24225 io_ctrl_ins.o_data_out_SB_DFFESR_Q_5_E
|
|
.sym 24227 spi_if_ins.o_fetch_cmd_SB_LUT4_I3_O[2]
|
|
.sym 24229 io_ctrl_ins.o_data_out_SB_DFFESR_Q_6_R_SB_LUT4_O_I1_SB_LUT4_I2_O[1]
|
|
.sym 24230 io_ctrl_ins.o_data_out_SB_DFFESR_Q_6_R_SB_LUT4_O_I0_SB_LUT4_I2_O[3]
|
|
.sym 24231 i_button_SB_LUT4_I3_O[1]
|
|
.sym 24232 io_ctrl_ins.o_data_out_SB_DFFESR_Q_6_R_SB_LUT4_O_I0_SB_LUT4_I2_O[2]
|
|
.sym 24235 io_ctrl_ins.pmod_dir_state[7]
|
|
.sym 24237 io_ctrl_ins.rx_h_b_state_SB_LUT4_I0_O[0]
|
|
.sym 24240 io_ctrl_ins.tr_vc_1_state_SB_LUT4_I0_O[0]
|
|
.sym 24243 o_tr_vc1$SB_IO_OUT
|
|
.sym 24244 io_ctrl_ins.o_data_out_SB_DFFESR_Q_6_R_SB_LUT4_O_I0_SB_LUT4_I2_O[1]
|
|
.sym 24246 io_ctrl_ins.led1_state_SB_LUT4_I0_I2[1]
|
|
.sym 24248 i_button_SB_LUT4_I3_O[0]
|
|
.sym 24250 i_button$SB_IO_IN
|
|
.sym 24251 io_ctrl_ins.rx_h_b_state_SB_LUT4_I0_O[1]
|
|
.sym 24254 io_ctrl_ins.tr_vc_1_state_SB_LUT4_I0_O[1]
|
|
.sym 24256 io_ctrl_ins.o_data_out_SB_DFFESR_Q_6_R_SB_LUT4_O_I1_SB_LUT4_I2_O[1]
|
|
.sym 24257 io_ctrl_ins.led1_state_SB_LUT4_I0_I2[1]
|
|
.sym 24258 i_button$SB_IO_IN
|
|
.sym 24259 io_ctrl_ins.pmod_dir_state[7]
|
|
.sym 24262 io_ctrl_ins.o_data_out_SB_DFFESR_Q_6_R_SB_LUT4_O_I0_SB_LUT4_I2_O[1]
|
|
.sym 24263 io_ctrl_ins.o_pmod[7]
|
|
.sym 24264 o_rx_h_tx_l$SB_IO_OUT
|
|
.sym 24265 io_ctrl_ins.o_data_out_SB_DFFESR_Q_6_R_SB_LUT4_O_I0_SB_LUT4_I2_O[2]
|
|
.sym 24274 io_ctrl_ins.rx_h_b_state_SB_LUT4_I0_O[0]
|
|
.sym 24276 io_ctrl_ins.rx_h_b_state_SB_LUT4_I0_O[1]
|
|
.sym 24282 i_button_SB_LUT4_I3_O[0]
|
|
.sym 24283 i_button_SB_LUT4_I3_O[1]
|
|
.sym 24293 io_ctrl_ins.tr_vc_1_state_SB_LUT4_I0_O[0]
|
|
.sym 24294 io_ctrl_ins.tr_vc_1_state_SB_LUT4_I0_O[1]
|
|
.sym 24298 io_ctrl_ins.o_data_out_SB_DFFESR_Q_6_R_SB_LUT4_O_I0_SB_LUT4_I2_O[3]
|
|
.sym 24299 io_ctrl_ins.o_data_out_SB_DFFESR_Q_6_R_SB_LUT4_O_I0_SB_LUT4_I2_O[2]
|
|
.sym 24300 io_ctrl_ins.o_data_out_SB_DFFESR_Q_6_R_SB_LUT4_O_I0_SB_LUT4_I2_O[1]
|
|
.sym 24301 o_tr_vc1$SB_IO_OUT
|
|
.sym 24302 io_ctrl_ins.o_data_out_SB_DFFESR_Q_5_E
|
|
.sym 24303 r_counter_$glb_clk
|
|
.sym 24304 spi_if_ins.o_fetch_cmd_SB_LUT4_I3_O[2]
|
|
.sym 24311 io_ctrl_ins.pmod_dir_state[6]
|
|
.sym 24312 io_ctrl_ins.pmod_dir_state[1]
|
|
.sym 24319 io_ctrl_ins.o_data_out_SB_DFFESR_Q_5_E
|
|
.sym 24328 io_ctrl_ins.o_data_out_SB_DFFESR_Q_6_R_SB_LUT4_O_I0_SB_LUT4_I2_O[2]
|
|
.sym 24337 w_rx_data[6]
|
|
.sym 24346 io_ctrl_ins.mixer_en_state_SB_LUT4_I0_O[2]
|
|
.sym 24347 spi_if_ins.o_fetch_cmd_SB_LUT4_I3_O[2]
|
|
.sym 24348 io_ctrl_ins.led1_state
|
|
.sym 24349 io_ctrl_ins.led1_state_SB_LUT4_I0_I2[2]
|
|
.sym 24350 io_ctrl_ins.led1_state_SB_LUT4_I0_I2[3]
|
|
.sym 24351 io_ctrl_ins.tr_vc_2_state_SB_LUT4_I0_O[3]
|
|
.sym 24352 io_ctrl_ins.tr_vc_2_state_SB_LUT4_I0_O[2]
|
|
.sym 24353 o_shdn_rx_lna$SB_IO_OUT
|
|
.sym 24357 io_ctrl_ins.o_data_out_SB_DFFESR_Q_6_R_SB_LUT4_O_I1_SB_LUT4_I2_O[1]
|
|
.sym 24358 io_ctrl_ins.led0_state
|
|
.sym 24359 io_ctrl_ins.o_data_out_SB_DFFESR_Q_R
|
|
.sym 24361 o_tr_vc1_b$SB_IO_OUT
|
|
.sym 24362 i_config[0]$SB_IO_IN
|
|
.sym 24363 spi_if_ins.o_load_cmd_SB_LUT4_I3_1_I0[2]
|
|
.sym 24366 io_ctrl_ins.tr_vc_1_b_state_SB_LUT4_I0_I2[3]
|
|
.sym 24367 io_ctrl_ins.o_data_out_SB_DFFESR_Q_6_R_SB_LUT4_O_I0_SB_LUT4_I2_O[1]
|
|
.sym 24368 io_ctrl_ins.pmod_dir_state[6]
|
|
.sym 24369 io_ctrl_ins.led1_state_SB_LUT4_I0_I2[1]
|
|
.sym 24370 i_config[3]$SB_IO_IN
|
|
.sym 24371 io_ctrl_ins.mixer_en_state_SB_LUT4_I0_O[3]
|
|
.sym 24373 io_ctrl_ins.o_data_out_SB_DFFESR_Q_E
|
|
.sym 24376 io_ctrl_ins.tr_vc_1_b_state_SB_LUT4_I0_I2[2]
|
|
.sym 24377 io_ctrl_ins.pmod_dir_state[1]
|
|
.sym 24379 o_tr_vc1_b$SB_IO_OUT
|
|
.sym 24380 io_ctrl_ins.o_data_out_SB_DFFESR_Q_6_R_SB_LUT4_O_I0_SB_LUT4_I2_O[1]
|
|
.sym 24381 io_ctrl_ins.tr_vc_1_b_state_SB_LUT4_I0_I2[3]
|
|
.sym 24382 io_ctrl_ins.tr_vc_1_b_state_SB_LUT4_I0_I2[2]
|
|
.sym 24385 io_ctrl_ins.led0_state
|
|
.sym 24386 io_ctrl_ins.mixer_en_state_SB_LUT4_I0_O[2]
|
|
.sym 24387 io_ctrl_ins.led1_state_SB_LUT4_I0_I2[1]
|
|
.sym 24388 io_ctrl_ins.mixer_en_state_SB_LUT4_I0_O[3]
|
|
.sym 24397 io_ctrl_ins.led1_state_SB_LUT4_I0_I2[1]
|
|
.sym 24398 io_ctrl_ins.led1_state
|
|
.sym 24399 io_ctrl_ins.led1_state_SB_LUT4_I0_I2[2]
|
|
.sym 24400 io_ctrl_ins.led1_state_SB_LUT4_I0_I2[3]
|
|
.sym 24403 io_ctrl_ins.o_data_out_SB_DFFESR_Q_6_R_SB_LUT4_O_I1_SB_LUT4_I2_O[1]
|
|
.sym 24404 o_shdn_rx_lna$SB_IO_OUT
|
|
.sym 24405 io_ctrl_ins.pmod_dir_state[1]
|
|
.sym 24406 io_ctrl_ins.o_data_out_SB_DFFESR_Q_6_R_SB_LUT4_O_I0_SB_LUT4_I2_O[1]
|
|
.sym 24409 io_ctrl_ins.led1_state_SB_LUT4_I0_I2[1]
|
|
.sym 24410 io_ctrl_ins.tr_vc_2_state_SB_LUT4_I0_O[2]
|
|
.sym 24411 io_ctrl_ins.tr_vc_2_state_SB_LUT4_I0_O[3]
|
|
.sym 24412 i_config[0]$SB_IO_IN
|
|
.sym 24415 io_ctrl_ins.o_data_out_SB_DFFESR_Q_6_R_SB_LUT4_O_I1_SB_LUT4_I2_O[1]
|
|
.sym 24416 io_ctrl_ins.led1_state_SB_LUT4_I0_I2[1]
|
|
.sym 24417 io_ctrl_ins.pmod_dir_state[6]
|
|
.sym 24418 i_config[3]$SB_IO_IN
|
|
.sym 24421 spi_if_ins.o_fetch_cmd_SB_LUT4_I3_O[2]
|
|
.sym 24423 spi_if_ins.o_load_cmd_SB_LUT4_I3_1_I0[2]
|
|
.sym 24425 io_ctrl_ins.o_data_out_SB_DFFESR_Q_E
|
|
.sym 24426 r_counter_$glb_clk
|
|
.sym 24427 io_ctrl_ins.o_data_out_SB_DFFESR_Q_R
|
|
.sym 24440 io_ctrl_ins.mixer_en_state_SB_LUT4_I0_O[2]
|
|
.sym 24441 spi_if_ins.o_fetch_cmd_SB_LUT4_I3_O[2]
|
|
.sym 24443 io_ctrl_ins.o_data_out_SB_DFFESR_Q_6_R_SB_LUT4_O_I1_SB_LUT4_I2_O[1]
|
|
.sym 24445 io_ctrl_ins.led1_state_SB_LUT4_I0_I2[2]
|
|
.sym 24456 o_tr_vc1$SB_IO_OUT
|
|
.sym 24471 io_ctrl_ins.rx_h_state_SB_DFFE_Q_E
|
|
.sym 24474 io_ctrl_ins.rf_pin_state[5]
|
|
.sym 24476 io_ctrl_ins.rf_pin_state[4]
|
|
.sym 24477 io_ctrl_ins.rx_h_state_SB_DFFE_Q_D_SB_LUT4_O_I2[2]
|
|
.sym 24489 io_ctrl_ins.rf_mode[1]
|
|
.sym 24498 io_ctrl_ins.tr_vc_1_state_SB_DFFE_Q_D_SB_LUT4_O_I0[0]
|
|
.sym 24538 io_ctrl_ins.tr_vc_1_state_SB_DFFE_Q_D_SB_LUT4_O_I0[0]
|
|
.sym 24539 io_ctrl_ins.rx_h_state_SB_DFFE_Q_D_SB_LUT4_O_I2[2]
|
|
.sym 24540 io_ctrl_ins.rf_mode[1]
|
|
.sym 24541 io_ctrl_ins.rf_pin_state[5]
|
|
.sym 24544 io_ctrl_ins.rf_pin_state[4]
|
|
.sym 24545 io_ctrl_ins.rf_mode[1]
|
|
.sym 24546 io_ctrl_ins.rx_h_state_SB_DFFE_Q_D_SB_LUT4_O_I2[2]
|
|
.sym 24547 io_ctrl_ins.tr_vc_1_state_SB_DFFE_Q_D_SB_LUT4_O_I0[0]
|
|
.sym 24548 io_ctrl_ins.rx_h_state_SB_DFFE_Q_E
|
|
.sym 24549 r_counter_$glb_clk
|
|
.sym 24569 io_ctrl_ins.rx_h_state_SB_DFFE_Q_D_SB_LUT4_O_I2[2]
|
|
.sym 24582 o_tr_vc1_b$SB_IO_OUT
|
|
.sym 24596 o_led0$SB_IO_OUT
|
|
.sym 24611 o_led0$SB_IO_OUT
|
|
.sym 24659 i_sck$SB_IO_IN
|
|
.sym 24664 i_ss$SB_IO_IN
|
|
.sym 24665 o_miso_$_TBUF__Y_E
|
|
.sym 24673 i_sck$SB_IO_IN
|
|
.sym 24696 i_rst_b$SB_IO_IN
|
|
.sym 24705 smi_ctrl_ins.o_smi_data_out_SB_DFFNE_Q_D_SB_LUT4_O_4_I3[1]
|
|
.sym 24706 smi_ctrl_ins.o_smi_data_out_SB_DFFNE_Q_D_SB_LUT4_O_4_I3[0]
|
|
.sym 24707 smi_ctrl_ins.o_smi_data_out_SB_DFFNE_Q_D_SB_LUT4_O_4_I3[3]
|
|
.sym 24713 smi_ctrl_ins.int_cnt_rx[3]
|
|
.sym 24714 o_miso_$_TBUF__Y_E
|
|
.sym 24725 o_miso_$_TBUF__Y_E
|
|
.sym 24742 smi_ctrl_ins.o_smi_data_out_SB_DFFNE_Q_D_SB_LUT4_O_4_I3[1]
|
|
.sym 24743 smi_ctrl_ins.o_smi_data_out_SB_DFFNE_Q_D_SB_LUT4_O_4_I3[0]
|
|
.sym 24744 smi_ctrl_ins.o_smi_data_out_SB_DFFNE_Q_D_SB_LUT4_O_4_I3[3]
|
|
.sym 24745 smi_ctrl_ins.int_cnt_rx[3]
|
|
.sym 24764 i_rst_b$SB_IO_IN
|
|
.sym 24765 smi_ctrl_ins.soe_and_reset_$glb_clk
|
|
.sym 24881 smi_ctrl_ins.w_fifo_pull_trigger
|
|
.sym 24928 smi_ctrl_ins.w_fifo_pull_trigger
|
|
.sym 24932 r_counter_$glb_clk
|
|
.sym 24933 i_rst_b_SB_LUT4_I3_O_$glb_sr
|
|
.sym 25018 smi_ctrl_ins.r_fifo_pulled_data_SB_DFFNESR_Q_E
|
|
.sym 25030 w_rx_fifo_pulled_data[27]
|
|
.sym 25041 w_rx_fifo_pulled_data[27]
|
|
.sym 25086 smi_ctrl_ins.r_fifo_pulled_data_SB_DFFNESR_Q_E
|
|
.sym 25087 smi_ctrl_ins.soe_and_reset_$glb_clk
|
|
.sym 25088 i_rst_b_SB_LUT4_I3_O_$glb_sr
|
|
.sym 25096 spi_if_ins.o_cs_SB_LUT4_I0_2_O_SB_LUT4_I2_O
|
|
.sym 25102 smi_ctrl_ins.r_fifo_pulled_data_SB_DFFNESR_Q_E
|
|
.sym 25106 o_smi_read_req$SB_IO_OUT
|
|
.sym 25176 smi_ctrl_ins.r_fifo_pull
|
|
.sym 25210 smi_ctrl_ins.r_fifo_pull
|
|
.sym 25242 r_counter_$glb_clk
|
|
.sym 25243 i_rst_b_SB_LUT4_I3_O_$glb_sr
|
|
.sym 25321 i_ss$SB_IO_IN
|
|
.sym 25328 spi_if_ins.spi.r_rx_done_SB_DFFESR_Q_E
|
|
.sym 25333 i_sck$SB_IO_IN
|
|
.sym 25338 spi_if_ins.spi.r_rx_done_SB_DFFESR_Q_D[1]
|
|
.sym 25387 spi_if_ins.spi.r_rx_done_SB_DFFESR_Q_D[1]
|
|
.sym 25396 spi_if_ins.spi.r_rx_done_SB_DFFESR_Q_E
|
|
.sym 25397 i_sck$SB_IO_IN
|
|
.sym 25398 i_ss$SB_IO_IN
|
|
.sym 25478 spi_if_ins.spi.r_rx_done
|
|
.sym 25531 spi_if_ins.spi.r_rx_done
|
|
.sym 25552 r_counter_$glb_clk
|
|
.sym 25563 spi_if_ins.spi.r_rx_done_SB_DFFESR_Q_E
|
|
.sym 25572 spi_if_ins.spi.r2_rx_done
|
|
.sym 25638 spi_if_ins.o_load_cmd_SB_LUT4_I3_O_SB_LUT4_I3_2_O
|
|
.sym 25652 w_rx_data[7]
|
|
.sym 25674 w_rx_data[7]
|
|
.sym 25706 spi_if_ins.o_load_cmd_SB_LUT4_I3_O_SB_LUT4_I3_2_O
|
|
.sym 25707 r_counter_$glb_clk
|
|
.sym 25711 i_glob_clock$SB_IO_IN
|
|
.sym 25878 i_glob_clock$SB_IO_IN
|
|
.sym 25942 w_tx_data_io[7]
|
|
.sym 25944 w_tx_data_io[6]
|
|
.sym 25946 w_cs[0]
|
|
.sym 25948 spi_if_ins.o_cs_SB_LUT4_I0_2_O_SB_LUT4_I2_O
|
|
.sym 25950 spi_if_ins.o_cs_SB_LUT4_I3_O[1]
|
|
.sym 25951 smi_ctrl_ins.o_data_out_SB_LUT4_I0_1_O[0]
|
|
.sym 25952 smi_ctrl_ins.o_data_out_SB_LUT4_I0_1_O[1]
|
|
.sym 25954 w_cs[3]
|
|
.sym 25955 w_tx_data_io[1]
|
|
.sym 25956 spi_if_ins.o_cs_SB_LUT4_I0_1_O[0]
|
|
.sym 25957 w_tx_data_io[4]
|
|
.sym 25959 smi_ctrl_ins.o_data_out_SB_LUT4_I0_1_O[0]
|
|
.sym 25960 w_tx_data_io[3]
|
|
.sym 25961 w_tx_data_io[5]
|
|
.sym 25962 i_glob_clock$SB_IO_IN
|
|
.sym 25964 w_cs[1]
|
|
.sym 25965 w_cs[2]
|
|
.sym 25967 w_tx_data_smi[1]
|
|
.sym 25968 spi_if_ins.o_cs_SB_LUT4_I0_O[1]
|
|
.sym 25971 spi_if_ins.o_cs_SB_LUT4_I0_1_O[0]
|
|
.sym 25972 smi_ctrl_ins.o_data_out_SB_LUT4_I0_1_O[0]
|
|
.sym 25973 w_tx_data_io[5]
|
|
.sym 25976 spi_if_ins.o_cs_SB_LUT4_I0_1_O[0]
|
|
.sym 25978 w_tx_data_io[3]
|
|
.sym 25982 w_tx_data_io[1]
|
|
.sym 25983 w_tx_data_smi[1]
|
|
.sym 25984 spi_if_ins.o_cs_SB_LUT4_I0_O[1]
|
|
.sym 25985 spi_if_ins.o_cs_SB_LUT4_I0_1_O[0]
|
|
.sym 25988 spi_if_ins.o_cs_SB_LUT4_I0_1_O[0]
|
|
.sym 25990 w_tx_data_io[6]
|
|
.sym 25994 w_tx_data_io[4]
|
|
.sym 25995 spi_if_ins.o_cs_SB_LUT4_I0_1_O[0]
|
|
.sym 26000 smi_ctrl_ins.o_data_out_SB_LUT4_I0_1_O[0]
|
|
.sym 26001 smi_ctrl_ins.o_data_out_SB_LUT4_I0_1_O[1]
|
|
.sym 26006 w_cs[0]
|
|
.sym 26007 w_cs[3]
|
|
.sym 26008 w_cs[1]
|
|
.sym 26009 w_cs[2]
|
|
.sym 26012 spi_if_ins.o_cs_SB_LUT4_I0_1_O[0]
|
|
.sym 26013 smi_ctrl_ins.o_data_out_SB_LUT4_I0_1_O[0]
|
|
.sym 26014 w_tx_data_io[7]
|
|
.sym 26016 spi_if_ins.o_cs_SB_LUT4_I0_2_O_SB_LUT4_I2_O
|
|
.sym 26017 i_glob_clock$SB_IO_IN
|
|
.sym 26018 spi_if_ins.o_cs_SB_LUT4_I3_O[1]
|
|
.sym 26032 r_counter
|
|
.sym 26092 spi_if_ins.o_cs_SB_LUT4_I3_O[3]
|
|
.sym 26106 smi_ctrl_ins.o_data_out_SB_LUT4_I0_1_O[0]
|
|
.sym 26108 i_glob_clock$SB_IO_IN
|
|
.sym 26111 i_ss$SB_IO_IN
|
|
.sym 26119 spi_if_ins.o_cs_SB_LUT4_I0_2_O_SB_LUT4_I2_O
|
|
.sym 26121 spi_if_ins.o_cs_SB_LUT4_I3_O[1]
|
|
.sym 26122 w_tx_data_sys[0]
|
|
.sym 26131 i_ss$SB_IO_IN
|
|
.sym 26167 w_tx_data_sys[0]
|
|
.sym 26168 spi_if_ins.o_cs_SB_LUT4_I3_O[3]
|
|
.sym 26169 smi_ctrl_ins.o_data_out_SB_LUT4_I0_1_O[0]
|
|
.sym 26170 spi_if_ins.o_cs_SB_LUT4_I3_O[1]
|
|
.sym 26171 spi_if_ins.o_cs_SB_LUT4_I0_2_O_SB_LUT4_I2_O
|
|
.sym 26172 i_glob_clock$SB_IO_IN
|
|
.sym 26193 spi_if_ins.r_tx_data_valid_SB_LUT4_I3_O
|
|
.sym 26259 spi_if_ins.o_cs_SB_LUT4_I0_2_O[0]
|
|
.sym 26261 i_rst_b$SB_IO_IN
|
|
.sym 26305 i_rst_b$SB_IO_IN
|
|
.sym 26307 spi_if_ins.o_cs_SB_LUT4_I0_2_O[0]
|
|
.sym 26809 o_tr_vc1$SB_IO_OUT
|
|
.sym 26869 spi_if_ins.o_load_cmd_SB_LUT4_I3_O_SB_LUT4_I3_2_O
|
|
.sym 26884 w_rx_data[6]
|
|
.sym 26888 w_rx_data[1]
|
|
.sym 26937 w_rx_data[6]
|
|
.sym 26944 w_rx_data[1]
|
|
.sym 26946 spi_if_ins.o_load_cmd_SB_LUT4_I3_O_SB_LUT4_I3_2_O
|
|
.sym 26947 r_counter_$glb_clk
|
|
.sym 26959 spi_if_ins.o_load_cmd_SB_LUT4_I3_O_SB_LUT4_I3_2_O
|
|
.sym 26962 o_tr_vc1_b$SB_IO_OUT
|
|
.sym 27283 o_smi_read_req$SB_IO_OUT
|
|
.sym 27296 o_smi_read_req$SB_IO_OUT
|
|
.sym 27335 i_sck$SB_IO_IN
|
|
.sym 27337 i_mosi$SB_IO_IN
|
|
.sym 27398 smi_ctrl_ins.swe_and_reset
|
|
.sym 27429 smi_ctrl_ins.swe_and_reset
|
|
.sym 27442 smi_ctrl_ins.swe_and_reset
|
|
.sym 27457 i_mosi$SB_IO_IN
|
|
.sym 27459 r_counter
|
|
.sym 27472 r_counter
|
|
.sym 27577 o_rx_h_tx_l_b$SB_IO_OUT
|
|
.sym 27582 o_rx_h_tx_l$SB_IO_OUT
|
|
.sym 27591 o_rx_h_tx_l$SB_IO_OUT
|
|
.sym 27605 o_tr_vc1$SB_IO_OUT
|
|
.sym 27608 o_tr_vc2$SB_IO_OUT
|
|
.sym 27622 o_tr_vc2$SB_IO_OUT
|
|
.sym 27627 o_tr_vc1$SB_IO_OUT
|
|
.sym 27631 o_rx_h_tx_l_b$SB_IO_OUT
|
|
.sym 27634 o_tr_vc1_b$SB_IO_OUT
|
|
.sym 27643 o_tr_vc1_b$SB_IO_OUT
|
|
.sym 27655 o_rx_h_tx_l_b$SB_IO_OUT
|
|
.sym 27683 w_lvds_rx_09_d1_SB_LUT4_I0_O_SB_LUT4_O_I0[0]
|
|
.sym 27687 lvds_rx_09_inst.r_phase_count[1]
|
|
.sym 27688 $PACKER_VCC_NET
|
|
.sym 27689 w_lvds_rx_09_d1_SB_LUT4_I0_O_SB_LUT4_O_I0[0]
|
|
.sym 27690 w_lvds_rx_09_d1_SB_LUT4_I0_O_SB_LUT4_O_I0[2]
|
|
.sym 27692 $PACKER_VCC_NET
|
|
.sym 27693 lvds_rx_09_inst.r_phase_count_SB_CARRY_CI_CO[2]
|
|
.sym 27694 w_lvds_rx_09_d1_SB_LUT4_I0_O_SB_LUT4_O_I0[0]
|
|
.sym 27701 w_lvds_rx_09_d1_SB_LUT4_I0_O[0]
|
|
.sym 27705 w_lvds_rx_09_d1_SB_LUT4_I0_O_SB_LUT4_O_I0[1]
|
|
.sym 27709 lvds_rx_09_inst.r_phase_count_SB_LUT4_O_I3[0]
|
|
.sym 27717 lvds_rx_24_inst.r_phase_count_SB_LUT4_O_I3[0]
|
|
.sym 27718 w_lvds_rx_09_d1
|
|
.sym 27726 w_lvds_rx_09_d0
|
|
.sym 27739 w_lvds_rx_09_d1_SB_LUT4_I0_O_SB_LUT4_O_I0[1]
|
|
.sym 27740 w_lvds_rx_09_d1_SB_LUT4_I0_O_SB_LUT4_O_I0[2]
|
|
.sym 27741 lvds_rx_09_inst.r_phase_count_SB_LUT4_O_I3[0]
|
|
.sym 27744 w_lvds_rx_09_d1_SB_LUT4_I0_O[0]
|
|
.sym 27745 w_lvds_rx_09_d1_SB_LUT4_I0_O[2]
|
|
.sym 27754 w_lvds_rx_09_d1_SB_LUT4_I0_O[2]
|
|
.sym 27755 w_lvds_rx_09_d0
|
|
.sym 27756 w_lvds_rx_09_d1
|
|
.sym 27757 w_lvds_rx_09_d1_SB_LUT4_I0_O[0]
|
|
.sym 27767 lvds_rx_09_inst.o_fifo_push_SB_DFFESR_Q_R_SB_LUT4_O_I1[0]
|
|
.sym 27768 w_lvds_rx_09_d1_SB_LUT4_I0_O[0]
|
|
.sym 27769 w_lvds_rx_09_d1_SB_LUT4_I0_O[2]
|
|
.sym 27778 lvds_rx_09_inst.r_state_if_SB_DFFESR_Q_D[2]
|
|
.sym 27793 lvds_rx_09_inst.r_state_if_SB_DFFESR_Q_E
|
|
.sym 27802 lvds_rx_09_inst.r_state_if_SB_DFFESR_Q_D[2]
|
|
.sym 27810 w_smi_data_input[1]
|
|
.sym 27825 o_iq_tx_clk_p$SB_IO_OUT
|
|
.sym 27830 w_smi_data_input[6]
|
|
.sym 27842 w_lvds_rx_09_d1
|
|
.sym 27843 w_lvds_rx_09_d1_SB_LUT4_I0_O[2]
|
|
.sym 27844 w_lvds_rx_09_d0
|
|
.sym 27845 w_lvds_rx_09_d1_SB_LUT4_I0_O[0]
|
|
.sym 27846 w_smi_data_input[0]
|
|
.sym 27850 $PACKER_VCC_NET
|
|
.sym 27870 w_smi_data_input[1]
|
|
.sym 27874 smi_ctrl_ins.r_fifo_pushed_data[25]
|
|
.sym 27890 smi_ctrl_ins.r_fifo_pushed_data[26]
|
|
.sym 27909 i_rst_b$SB_IO_IN
|
|
.sym 27914 smi_ctrl_ins.r_fifo_pushed_data[24]
|
|
.sym 27920 smi_ctrl_ins.r_fifo_pushed_data_SB_DFFNESR_Q_E[0]
|
|
.sym 27921 smi_ctrl_ins.r_fifo_pushed_data_SB_DFFNESR_Q_E[1]
|
|
.sym 27930 smi_ctrl_ins.r_fifo_pushed_data[10]
|
|
.sym 27934 w_smi_data_input[0]
|
|
.sym 27938 w_tx_fifo_pulled_data[27]
|
|
.sym 27945 w_lvds_tx_d0
|
|
.sym 27946 w_tx_fifo_pulled_data[12]
|
|
.sym 27950 w_tx_fifo_pulled_data[23]
|
|
.sym 27954 lvds_tx_inst.r_fifo_data[23]
|
|
.sym 27955 lvds_tx_inst.r_fifo_data[21]
|
|
.sym 27956 lvds_tx_inst.r_phase_count_SB_LUT4_I1_1_O_SB_DFF_D_Q[2]
|
|
.sym 27957 lvds_tx_inst.r_phase_count_SB_DFF_D_Q[0]
|
|
.sym 27958 w_tx_fifo_pulled_data[21]
|
|
.sym 27962 lvds_tx_inst.r_phase_count_SB_DFF_D_Q[0]
|
|
.sym 27963 lvds_tx_inst.r_phase_count_SB_LUT4_I1_1_O_SB_DFF_D_Q[2]
|
|
.sym 27964 lvds_tx_inst.r_fifo_data[27]
|
|
.sym 27965 w_lvds_tx_d1_SB_DFF_Q_D_SB_LUT4_O_1_I0_SB_LUT4_O_I0[2]
|
|
.sym 27966 w_tx_fifo_pulled_data[14]
|
|
.sym 27973 w_lvds_tx_d1
|
|
.sym 27974 lvds_tx_inst.r_fifo_data[7]
|
|
.sym 27975 lvds_tx_inst.r_fifo_data[5]
|
|
.sym 27976 lvds_tx_inst.r_phase_count_SB_LUT4_I1_1_O_SB_DFF_D_Q[2]
|
|
.sym 27977 lvds_tx_inst.r_phase_count_SB_DFF_D_Q[0]
|
|
.sym 27978 lvds_tx_inst.r_fifo_data[14]
|
|
.sym 27979 lvds_tx_inst.r_fifo_data[12]
|
|
.sym 27980 lvds_tx_inst.r_phase_count_SB_LUT4_I1_1_O_SB_DFF_D_Q[2]
|
|
.sym 27981 lvds_tx_inst.r_phase_count_SB_DFF_D_Q[0]
|
|
.sym 27982 w_lvds_tx_d1_SB_DFF_Q_D_SB_LUT4_O_1_I0_SB_LUT4_O_I2_SB_LUT4_O_1_I2[0]
|
|
.sym 27983 w_lvds_tx_d1_SB_DFF_Q_D_SB_LUT4_O_1_I0_SB_LUT4_O_1_I2[1]
|
|
.sym 27984 w_lvds_tx_d1_SB_DFF_Q_D_SB_LUT4_O_1_I0_SB_LUT4_O_I2_SB_LUT4_O_1_I2[2]
|
|
.sym 27985 w_lvds_tx_d1_SB_DFF_Q_D_SB_LUT4_O_1_I0_SB_LUT4_O_I0[2]
|
|
.sym 27986 w_tx_fifo_pulled_data[4]
|
|
.sym 27993 $PACKER_VCC_NET
|
|
.sym 28000 lvds_tx_inst.r_phase_count_SB_DFF_D_Q[0]
|
|
.sym 28001 lvds_tx_inst.r_phase_count_SB_LUT4_I1_1_O_SB_DFF_D_Q[2]
|
|
.sym 28002 lvds_tx_inst.r_phase_count_SB_CARRY_CI_CO_SB_LUT4_I3_O_SB_DFF_D_Q[0]
|
|
.sym 28003 lvds_tx_inst.r_phase_count_SB_CARRY_CI_CO_SB_LUT4_I3_O_SB_DFF_D_Q[1]
|
|
.sym 28004 lvds_tx_inst.r_phase_count_SB_CARRY_CI_CO_SB_LUT4_I3_O_SB_DFF_D_Q[2]
|
|
.sym 28005 w_lvds_tx_d1_SB_DFF_Q_D_SB_LUT4_O_1_I0[3]
|
|
.sym 28006 w_tx_fifo_pulled_data[7]
|
|
.sym 28010 w_lvds_tx_d1_SB_DFF_Q_D_SB_LUT4_O_I1_SB_LUT4_O_1_I0[0]
|
|
.sym 28011 w_lvds_tx_d1_SB_DFF_Q_D_SB_LUT4_O_I1_SB_LUT4_O_1_I0[1]
|
|
.sym 28012 w_lvds_tx_d1_SB_DFF_Q_D_SB_LUT4_O_I1_SB_LUT4_O_1_I0[2]
|
|
.sym 28013 w_lvds_tx_d1_SB_DFF_Q_D_SB_LUT4_O_1_I0_SB_LUT4_O_I0[2]
|
|
.sym 28014 lvds_tx_inst.r_fifo_data[6]
|
|
.sym 28015 lvds_tx_inst.r_fifo_data[4]
|
|
.sym 28016 lvds_tx_inst.r_phase_count_SB_LUT4_I1_1_O_SB_DFF_D_Q[2]
|
|
.sym 28017 lvds_tx_inst.r_phase_count_SB_DFF_D_Q[0]
|
|
.sym 28022 w_tx_fifo_pulled_data[6]
|
|
.sym 28026 w_tx_fifo_pulled_data[19]
|
|
.sym 28034 tx_fifo.rd_addr_gray_SB_LUT4_I2_O[2]
|
|
.sym 28038 tx_fifo.wr_addr_gray_rd_r[6]
|
|
.sym 28039 tx_fifo.rd_addr_gray_SB_LUT4_I2_O[6]
|
|
.sym 28040 tx_fifo.rd_addr_gray_SB_LUT4_I2_O[7]
|
|
.sym 28041 w_tx_fifo_pull
|
|
.sym 28042 tx_fifo.empty_o_SB_DFF_Q_D_SB_LUT4_O_I1_SB_LUT4_O_I0_SB_LUT4_O_2_I3[2]
|
|
.sym 28048 tx_fifo.empty_o_SB_DFF_Q_D_SB_LUT4_O_I1_SB_LUT4_O_I0_SB_LUT4_O_2_I3[2]
|
|
.sym 28049 tx_fifo.rd_addr_gray_SB_LUT4_I2_O[6]
|
|
.sym 28050 tx_fifo.rd_addr_gray_SB_LUT4_I2_O[7]
|
|
.sym 28056 tx_fifo.rd_addr_gray_SB_LUT4_I2_O[7]
|
|
.sym 28057 tx_fifo.rd_addr_gray_SB_LUT4_I2_O[8]
|
|
.sym 28058 tx_fifo.rd_addr_gray_SB_LUT4_I2_O[1]
|
|
.sym 28062 tx_fifo.rd_addr_gray_SB_LUT4_I2_O[6]
|
|
.sym 28067 tx_fifo.rd_addr[0]
|
|
.sym 28072 tx_fifo.empty_o_SB_LUT4_I3_O_SB_LUT4_O_I0[1]
|
|
.sym 28073 tx_fifo.rd_addr[0]
|
|
.sym 28076 tx_fifo.empty_o_SB_LUT4_I3_O_SB_LUT4_O_I0[3]
|
|
.sym 28077 tx_fifo.rd_addr_gray_SB_LUT4_I2_I3[2]
|
|
.sym 28080 tx_fifo.empty_o_SB_LUT4_I3_O_SB_LUT4_O_1_I0[2]
|
|
.sym 28081 tx_fifo.rd_addr_gray_SB_LUT4_I2_I3[3]
|
|
.sym 28084 tx_fifo.empty_o_SB_LUT4_I3_O_SB_LUT4_O_1_I0[3]
|
|
.sym 28085 tx_fifo.rd_addr_gray_SB_LUT4_I2_I3[4]
|
|
.sym 28088 tx_fifo.empty_o_SB_DFF_Q_D_SB_LUT4_O_I1_SB_LUT4_O_1_I3[1]
|
|
.sym 28089 tx_fifo.rd_addr_gray_SB_LUT4_I2_I3[5]
|
|
.sym 28092 tx_fifo.empty_o_SB_DFF_Q_D_SB_LUT4_O_I1_SB_LUT4_O_1_I3[2]
|
|
.sym 28093 tx_fifo.rd_addr_gray_SB_LUT4_I2_I3[6]
|
|
.sym 28096 tx_fifo.empty_o_SB_DFF_Q_D_SB_LUT4_O_I1_SB_LUT4_O_1_I3_SB_LUT4_O_I3[1]
|
|
.sym 28097 tx_fifo.rd_addr_gray_SB_LUT4_I2_I3[7]
|
|
.sym 28100 tx_fifo.empty_o_SB_DFF_Q_D_SB_LUT4_O_I1_SB_LUT4_O_1_I3_SB_LUT4_O_I3[2]
|
|
.sym 28101 tx_fifo.rd_addr_gray_SB_LUT4_I2_I3[8]
|
|
.sym 28104 tx_fifo.rd_addr[9]
|
|
.sym 28105 tx_fifo.rd_addr_gray_SB_LUT4_I2_I3[9]
|
|
.sym 28106 w_tx_fifo_pulled_data[25]
|
|
.sym 28111 tx_fifo.empty_o_SB_LUT4_I3_O_SB_LUT4_O_1_I0[1]
|
|
.sym 28112 tx_fifo.rd_addr_gray_SB_LUT4_I2_O[3]
|
|
.sym 28113 tx_fifo.empty_o_SB_DFF_Q_D_SB_LUT4_O_I1_SB_LUT4_O_I0_SB_LUT4_O_2_I3[1]
|
|
.sym 28115 tx_fifo.empty_o_SB_DFF_Q_D_SB_LUT4_O_I1_SB_LUT4_O_1_I3_SB_LUT4_O_I3[0]
|
|
.sym 28116 tx_fifo.rd_addr_gray_SB_LUT4_I2_O[7]
|
|
.sym 28117 tx_fifo.rd_addr_gray_SB_LUT4_I2_O[8]
|
|
.sym 28118 w_tx_fifo_pulled_data[11]
|
|
.sym 28122 w_tx_fifo_pulled_data[29]
|
|
.sym 28130 tx_fifo.empty_o_SB_LUT4_I3_O_SB_LUT4_O_I0[2]
|
|
.sym 28131 tx_fifo.rd_addr_gray_SB_DFFE_Q_8_D[1]
|
|
.sym 28132 tx_fifo.rd_addr_gray_SB_DFFE_Q_8_D[2]
|
|
.sym 28133 tx_fifo.rd_addr_gray_SB_DFFE_Q_8_D[3]
|
|
.sym 28134 tx_fifo.wr_addr_gray_rd_r[8]
|
|
.sym 28135 tx_fifo.wr_addr_gray_rd_r[9]
|
|
.sym 28136 tx_fifo.rd_addr_gray_SB_LUT4_I2_O[9]
|
|
.sym 28137 tx_fifo.rd_addr_gray_SB_LUT4_I2_O[8]
|
|
.sym 28138 tx_fifo.rd_addr_gray_SB_LUT4_I2_O[8]
|
|
.sym 28148 tx_fifo.rd_addr_gray_SB_LUT4_I2_O[6]
|
|
.sym 28149 tx_fifo.rd_addr_gray_SB_LUT4_I2_O[7]
|
|
.sym 28150 tx_fifo.rd_addr_gray_SB_DFFE_Q_8_D[1]
|
|
.sym 28154 tx_fifo.rd_addr_gray_SB_LUT4_I2_O[9]
|
|
.sym 28158 lvds_tx_inst.r_fifo_data[30]
|
|
.sym 28159 lvds_tx_inst.r_fifo_data[28]
|
|
.sym 28160 lvds_tx_inst.r_phase_count_SB_LUT4_I1_1_O_SB_DFF_D_Q[2]
|
|
.sym 28161 lvds_tx_inst.r_phase_count_SB_DFF_D_Q[0]
|
|
.sym 28163 lvds_tx_inst.r_phase_count[1]
|
|
.sym 28167 lvds_tx_inst.r_phase_count[2]
|
|
.sym 28168 $PACKER_VCC_NET
|
|
.sym 28169 lvds_tx_inst.r_phase_count[1]
|
|
.sym 28171 lvds_tx_inst.r_phase_count[3]
|
|
.sym 28172 $PACKER_VCC_NET
|
|
.sym 28173 lvds_tx_inst.r_phase_count_SB_CARRY_CI_CO[2]
|
|
.sym 28174 w_lvds_tx_d1_SB_DFF_Q_D_SB_LUT4_O_1_I0[3]
|
|
.sym 28176 $PACKER_VCC_NET
|
|
.sym 28177 lvds_tx_inst.r_phase_count_SB_CARRY_CI_CO[3]
|
|
.sym 28181 lvds_tx_inst.r_phase_count_SB_LUT4_I1_1_O_SB_DFF_D_Q[2]
|
|
.sym 28185 w_lvds_tx_d1_SB_DFF_Q_D_SB_LUT4_O_1_I0_SB_LUT4_O_I0[2]
|
|
.sym 28186 lvds_tx_inst.r_phase_count[1]
|
|
.sym 28227 w_lvds_rx_24_d0_SB_LUT4_I1_O_SB_LUT4_O_I0[0]
|
|
.sym 28231 lvds_rx_24_inst.r_phase_count[1]
|
|
.sym 28232 $PACKER_VCC_NET
|
|
.sym 28233 w_lvds_rx_24_d0_SB_LUT4_I1_O_SB_LUT4_O_I0[0]
|
|
.sym 28234 w_lvds_rx_24_d0_SB_LUT4_I1_O_SB_LUT4_O_I0[2]
|
|
.sym 28236 $PACKER_VCC_NET
|
|
.sym 28237 lvds_rx_24_inst.r_phase_count_SB_CARRY_CI_CO[2]
|
|
.sym 28239 w_lvds_rx_24_d0_SB_LUT4_I1_O_SB_LUT4_O_I0[1]
|
|
.sym 28240 w_lvds_rx_24_d0_SB_LUT4_I1_O_SB_LUT4_O_I0[2]
|
|
.sym 28241 lvds_rx_24_inst.r_phase_count_SB_LUT4_O_I3[0]
|
|
.sym 28246 w_lvds_rx_24_d0_SB_LUT4_I1_O_SB_LUT4_O_I0[0]
|
|
.sym 28250 w_lvds_rx_09_d1_SB_LUT4_I0_O_SB_LUT4_O_I0[1]
|
|
.sym 28251 w_lvds_rx_09_d1_SB_LUT4_I0_O_SB_LUT4_O_I0[2]
|
|
.sym 28252 lvds_rx_09_inst.r_phase_count_SB_LUT4_O_I3[0]
|
|
.sym 28253 w_lvds_rx_09_d1_SB_LUT4_I0_O[2]
|
|
.sym 28257 w_lvds_rx_24_d0_SB_LUT4_I1_O_SB_LUT4_O_I0[1]
|
|
.sym 28266 lvds_rx_09_inst.o_fifo_push_SB_DFFESR_Q_D
|
|
.sym 28283 w_rx_09_fifo_data[0]
|
|
.sym 28284 w_rx_24_fifo_data[0]
|
|
.sym 28285 o_led1$SB_IO_OUT
|
|
.sym 28290 w_smi_data_input[4]
|
|
.sym 28295 w_rx_09_fifo_data[1]
|
|
.sym 28296 w_rx_24_fifo_data[1]
|
|
.sym 28297 o_led1$SB_IO_OUT
|
|
.sym 28298 w_smi_data_input[0]
|
|
.sym 28302 w_smi_data_input[2]
|
|
.sym 28314 w_smi_data_input[5]
|
|
.sym 28318 w_smi_data_input[3]
|
|
.sym 28322 w_lvds_rx_09_d1_SB_LUT4_I0_O[0]
|
|
.sym 28323 w_lvds_rx_09_d1_SB_LUT4_I0_O[1]
|
|
.sym 28324 w_lvds_rx_09_d1_SB_LUT4_I0_O[2]
|
|
.sym 28325 w_lvds_rx_09_d1_SB_LUT4_I0_O[3]
|
|
.sym 28328 smi_ctrl_ins.tx_reg_state[0]
|
|
.sym 28329 i_rst_b$SB_IO_IN
|
|
.sym 28331 smi_ctrl_ins.tx_reg_state[0]
|
|
.sym 28332 w_smi_data_input[7]
|
|
.sym 28333 i_rst_b$SB_IO_IN
|
|
.sym 28338 w_smi_data_input[4]
|
|
.sym 28342 w_smi_data_input[2]
|
|
.sym 28346 w_smi_data_input[3]
|
|
.sym 28354 w_smi_data_input[4]
|
|
.sym 28358 w_smi_data_input[6]
|
|
.sym 28362 w_smi_data_input[2]
|
|
.sym 28366 w_smi_data_input[5]
|
|
.sym 28370 w_smi_data_input[1]
|
|
.sym 28374 smi_ctrl_ins.modem_tx_ctrl
|
|
.sym 28378 w_smi_data_input[3]
|
|
.sym 28382 $PACKER_VCC_NET
|
|
.sym 28386 smi_ctrl_ins.r_fifo_pushed_data[16]
|
|
.sym 28390 smi_ctrl_ins.r_fifo_pushed_data[22]
|
|
.sym 28394 smi_ctrl_ins.r_fifo_pushed_data[21]
|
|
.sym 28398 smi_ctrl_ins.r_fifo_pushed_data[19]
|
|
.sym 28402 smi_ctrl_ins.r_fifo_pushed_data[29]
|
|
.sym 28406 smi_ctrl_ins.r_fifo_pushed_data[31]
|
|
.sym 28410 smi_ctrl_ins.r_fifo_pushed_data[13]
|
|
.sym 28414 smi_ctrl_ins.r_fifo_pushed_data[20]
|
|
.sym 28418 w_smi_data_input[3]
|
|
.sym 28422 w_smi_data_input[4]
|
|
.sym 28426 smi_ctrl_ins.r_fifo_pushed_data[9]
|
|
.sym 28430 smi_ctrl_ins.r_fifo_pushed_data[11]
|
|
.sym 28434 smi_ctrl_ins.r_fifo_pushed_data[8]
|
|
.sym 28438 smi_ctrl_ins.r_fifo_pushed_data[17]
|
|
.sym 28442 w_smi_data_input[5]
|
|
.sym 28446 smi_ctrl_ins.r_fifo_pushed_data[14]
|
|
.sym 28450 smi_ctrl_ins.r_fifo_pushed_data[23]
|
|
.sym 28454 w_smi_data_input[2]
|
|
.sym 28458 smi_ctrl_ins.r_fifo_pushed_data[12]
|
|
.sym 28462 w_smi_data_input[1]
|
|
.sym 28466 smi_ctrl_ins.r_fifo_pushed_data[28]
|
|
.sym 28470 w_smi_data_input[6]
|
|
.sym 28474 smi_ctrl_ins.r_fifo_pushed_data[27]
|
|
.sym 28478 smi_ctrl_ins.r_fifo_pushed_data[18]
|
|
.sym 28482 tx_fifo.wr_addr_gray_rd[5]
|
|
.sym 28486 w_lvds_tx_d1_SB_DFF_Q_D_SB_LUT4_O_1_I0_SB_LUT4_O_I0[1]
|
|
.sym 28487 w_lvds_tx_d1_SB_DFF_Q_D_SB_LUT4_O_1_I0_SB_LUT4_O_I2[1]
|
|
.sym 28488 w_lvds_tx_d1_SB_DFF_Q_D_SB_LUT4_O_1_I0_SB_LUT4_O_I2[2]
|
|
.sym 28489 w_lvds_tx_d1_SB_DFF_Q_D_SB_LUT4_O_1_I0_SB_LUT4_O_I2[3]
|
|
.sym 28490 w_lvds_tx_d1_SB_DFF_Q_D_SB_LUT4_O_1_I0_SB_LUT4_O_I0[2]
|
|
.sym 28491 w_lvds_tx_d1_SB_DFF_Q_D_SB_LUT4_O_I1[1]
|
|
.sym 28492 w_lvds_tx_d1_SB_DFF_Q_D_SB_LUT4_O_I1[2]
|
|
.sym 28493 w_lvds_tx_d1_SB_DFF_Q_D_SB_LUT4_O_1_I0[3]
|
|
.sym 28494 w_lvds_tx_d1_SB_DFF_Q_D_SB_LUT4_O_1_I0[0]
|
|
.sym 28495 w_lvds_tx_d1_SB_DFF_Q_D_SB_LUT4_O_1_I0[1]
|
|
.sym 28496 w_lvds_tx_d1_SB_DFF_Q_D_SB_LUT4_O_1_I0[2]
|
|
.sym 28497 w_lvds_tx_d1_SB_DFF_Q_D_SB_LUT4_O_1_I0[3]
|
|
.sym 28499 lvds_tx_inst.r_fifo_data[9]
|
|
.sym 28500 w_lvds_tx_d1_SB_DFF_Q_D_SB_LUT4_O_1_I0_SB_LUT4_O_I0[1]
|
|
.sym 28501 w_lvds_tx_d1_SB_DFF_Q_D_SB_LUT4_O_1_I0_SB_LUT4_O_I0[2]
|
|
.sym 28502 lvds_tx_inst.o_fifo_pull_SB_DFFSR_Q_R_SB_LUT4_O_I1[0]
|
|
.sym 28503 w_lvds_tx_d1_SB_DFF_Q_D_SB_LUT4_O_1_I0_SB_LUT4_O_1_I2[1]
|
|
.sym 28504 lvds_tx_inst.o_fifo_pull_SB_DFFSR_Q_R_SB_LUT4_O_I1[2]
|
|
.sym 28505 lvds_tx_inst.o_fifo_pull_SB_DFFSR_Q_R_SB_LUT4_O_I1[3]
|
|
.sym 28510 w_lvds_tx_d1_SB_DFF_Q_D_SB_LUT4_O_1_I0_SB_LUT4_O_1_I2[0]
|
|
.sym 28511 w_lvds_tx_d1_SB_DFF_Q_D_SB_LUT4_O_1_I0_SB_LUT4_O_1_I2[1]
|
|
.sym 28512 w_lvds_tx_d1_SB_DFF_Q_D_SB_LUT4_O_1_I0_SB_LUT4_O_1_I2[2]
|
|
.sym 28513 w_lvds_tx_d1_SB_DFF_Q_D_SB_LUT4_O_1_I0_SB_LUT4_O_1_I2[3]
|
|
.sym 28514 w_tx_fifo_pulled_data[18]
|
|
.sym 28518 w_tx_fifo_pulled_data[17]
|
|
.sym 28522 w_tx_fifo_pulled_data[15]
|
|
.sym 28529 tx_fifo.empty_o_SB_DFF_Q_D_SB_LUT4_O_I1_SB_LUT4_O_1_I3_SB_LUT4_O_I3[1]
|
|
.sym 28530 w_tx_fifo_pulled_data[16]
|
|
.sym 28534 lvds_tx_inst.r_fifo_data[15]
|
|
.sym 28535 lvds_tx_inst.r_fifo_data[13]
|
|
.sym 28536 lvds_tx_inst.r_phase_count_SB_LUT4_I1_1_O_SB_DFF_D_Q[2]
|
|
.sym 28537 lvds_tx_inst.r_phase_count_SB_DFF_D_Q[0]
|
|
.sym 28538 w_tx_fifo_pulled_data[13]
|
|
.sym 28542 lvds_tx_inst.r_fifo_data[18]
|
|
.sym 28543 lvds_tx_inst.r_fifo_data[16]
|
|
.sym 28544 lvds_tx_inst.r_phase_count_SB_DFF_D_Q[0]
|
|
.sym 28545 lvds_tx_inst.r_phase_count_SB_LUT4_I1_1_O_SB_DFF_D_Q[2]
|
|
.sym 28546 w_tx_fifo_pulled_data[8]
|
|
.sym 28550 w_tx_fifo_pulled_data[28]
|
|
.sym 28555 tx_fifo.empty_o_SB_DFF_Q_D_SB_LUT4_O_I1_SB_LUT4_O_1_I3[0]
|
|
.sym 28556 tx_fifo.empty_o_SB_DFF_Q_D_SB_LUT4_O_I1_SB_LUT4_O_I0_SB_LUT4_O_2_I3[2]
|
|
.sym 28557 tx_fifo.rd_addr_gray_SB_LUT4_I2_O[6]
|
|
.sym 28558 w_tx_fifo_pulled_data[31]
|
|
.sym 28562 lvds_tx_inst.r_fifo_data[31]
|
|
.sym 28563 lvds_tx_inst.r_fifo_data[29]
|
|
.sym 28564 lvds_tx_inst.r_phase_count_SB_LUT4_I1_1_O_SB_DFF_D_Q[2]
|
|
.sym 28565 lvds_tx_inst.r_phase_count_SB_DFF_D_Q[0]
|
|
.sym 28566 w_tx_fifo_pulled_data[9]
|
|
.sym 28570 lvds_tx_inst.r_fifo_data[10]
|
|
.sym 28571 lvds_tx_inst.r_fifo_data[8]
|
|
.sym 28572 lvds_tx_inst.r_phase_count_SB_DFF_D_Q[0]
|
|
.sym 28573 lvds_tx_inst.r_phase_count_SB_LUT4_I1_1_O_SB_DFF_D_Q[2]
|
|
.sym 28574 tx_fifo.wr_addr_gray_rd_r[8]
|
|
.sym 28575 tx_fifo.rd_addr[9]
|
|
.sym 28576 tx_fifo.wr_addr_gray_rd_r[9]
|
|
.sym 28577 tx_fifo.empty_o_SB_DFF_Q_D_SB_LUT4_O_I1_SB_LUT4_O_1_I3_SB_LUT4_O_I3[2]
|
|
.sym 28580 tx_fifo.rd_addr_gray_SB_LUT4_I2_O[1]
|
|
.sym 28581 tx_fifo.rd_addr_gray_SB_LUT4_I2_O[2]
|
|
.sym 28589 tx_fifo.empty_o_SB_DFF_Q_D_SB_LUT4_O_I1_SB_LUT4_O_1_I3_SB_LUT4_O_I3[1]
|
|
.sym 28591 tx_fifo.wr_addr_gray_rd_r[6]
|
|
.sym 28592 tx_fifo.empty_o_SB_DFF_Q_D_SB_LUT4_O_I1_SB_LUT4_O_1_I3[2]
|
|
.sym 28593 tx_fifo.empty_o_SB_DFF_Q_D_SB_LUT4_O_I1_SB_LUT4_O_1_I3_SB_LUT4_O_I3[1]
|
|
.sym 28596 w_smi_data_input[7]
|
|
.sym 28597 w_smi_data_input[6]
|
|
.sym 28600 tx_fifo.rd_addr[0]
|
|
.sym 28601 tx_fifo.wr_addr_gray_rd_r[0]
|
|
.sym 28607 tx_fifo.rd_addr[0]
|
|
.sym 28608 tx_fifo.wr_addr_gray_rd_r[0]
|
|
.sym 28609 tx_fifo.rd_addr_gray_SB_LUT4_I2_O[1]
|
|
.sym 28610 tx_fifo.wr_addr_gray_rd[0]
|
|
.sym 28615 tx_fifo.empty_o_SB_LUT4_I3_O[0]
|
|
.sym 28616 tx_fifo.empty_o_SB_LUT4_I3_O[1]
|
|
.sym 28617 tx_fifo.empty_o_SB_LUT4_I3_O[2]
|
|
.sym 28618 tx_fifo.wr_addr_gray_rd[7]
|
|
.sym 28622 tx_fifo.wr_addr_gray_rd[6]
|
|
.sym 28626 tx_fifo.wr_addr_gray_rd[1]
|
|
.sym 28630 tx_fifo.empty_o_SB_DFF_Q_D_SB_LUT4_O_I1_SB_LUT4_O_1_I3[0]
|
|
.sym 28631 tx_fifo.empty_o_SB_DFF_Q_D_SB_LUT4_O_I1_SB_LUT4_O_1_I3[1]
|
|
.sym 28632 tx_fifo.empty_o_SB_DFF_Q_D_SB_LUT4_O_I1_SB_LUT4_O_1_I3[2]
|
|
.sym 28633 tx_fifo.empty_o_SB_DFF_Q_D_SB_LUT4_O_I1_SB_LUT4_O_1_I3[3]
|
|
.sym 28634 tx_fifo.wr_addr_gray_rd[9]
|
|
.sym 28639 tx_fifo.empty_o_SB_DFF_Q_D_SB_LUT4_O_I1[0]
|
|
.sym 28640 tx_fifo.empty_o_SB_DFF_Q_D_SB_LUT4_O_I1[1]
|
|
.sym 28641 tx_fifo.empty_o_SB_DFF_Q_D_SB_LUT4_O_I1[2]
|
|
.sym 28644 tx_fifo.rd_addr_gray_SB_LUT4_I2_O[2]
|
|
.sym 28645 tx_fifo.rd_addr_gray_SB_LUT4_I2_O[3]
|
|
.sym 28646 tx_fifo.empty_o_SB_DFF_Q_D_SB_LUT4_O_I1_SB_LUT4_O_I0[0]
|
|
.sym 28647 tx_fifo.empty_o_SB_DFF_Q_D_SB_LUT4_O_I1_SB_LUT4_O_I0[1]
|
|
.sym 28648 tx_fifo.empty_o_SB_DFF_Q_D_SB_LUT4_O_I1_SB_LUT4_O_I0[2]
|
|
.sym 28649 tx_fifo.empty_o_SB_DFF_Q_D_SB_LUT4_O_I1_SB_LUT4_O_I0[3]
|
|
.sym 28652 tx_fifo.rd_addr_gray_SB_LUT4_I2_O[9]
|
|
.sym 28653 tx_fifo.rd_addr_gray_SB_LUT4_I2_O[8]
|
|
.sym 28658 tx_fifo.empty_o_SB_DFF_Q_D_SB_LUT4_O_I1_SB_LUT4_O_I0_SB_LUT4_O_I0[0]
|
|
.sym 28659 tx_fifo.empty_o_SB_DFF_Q_D_SB_LUT4_O_I1_SB_LUT4_O_I0_SB_LUT4_O_I0[1]
|
|
.sym 28660 tx_fifo.empty_o_SB_DFF_Q_D_SB_LUT4_O_I1_SB_LUT4_O_I0_SB_LUT4_O_I0[2]
|
|
.sym 28661 tx_fifo.empty_o_SB_DFF_Q_D_SB_LUT4_O_I1_SB_LUT4_O_I0_SB_LUT4_O_I0[3]
|
|
.sym 28662 tx_fifo.empty_o_SB_LUT4_I3_O_SB_LUT4_O_I0[0]
|
|
.sym 28663 tx_fifo.empty_o_SB_LUT4_I3_O_SB_LUT4_O_I0[1]
|
|
.sym 28664 tx_fifo.empty_o_SB_LUT4_I3_O_SB_LUT4_O_I0[2]
|
|
.sym 28665 tx_fifo.empty_o_SB_LUT4_I3_O_SB_LUT4_O_I0[3]
|
|
.sym 28666 tx_fifo.empty_o_SB_DFF_Q_D_SB_LUT4_O_I1_SB_LUT4_O_I0_SB_LUT4_O_2_I3[0]
|
|
.sym 28667 tx_fifo.empty_o_SB_DFF_Q_D_SB_LUT4_O_I1_SB_LUT4_O_I0_SB_LUT4_O_2_I3[1]
|
|
.sym 28668 tx_fifo.empty_o_SB_DFF_Q_D_SB_LUT4_O_I1_SB_LUT4_O_I0_SB_LUT4_O_2_I3[2]
|
|
.sym 28669 tx_fifo.empty_o_SB_DFF_Q_D_SB_LUT4_O_I1_SB_LUT4_O_I0_SB_LUT4_O_2_I3[3]
|
|
.sym 28672 lvds_tx_inst.r_phase_count_SB_DFF_D_Q[0]
|
|
.sym 28673 lvds_tx_inst.r_phase_count_SB_LUT4_I1_1_O_SB_DFF_D_Q[2]
|
|
.sym 28681 lvds_tx_inst.r_phase_count_SB_DFF_D_Q[0]
|
|
.sym 28682 tx_fifo.empty_o_SB_DFF_Q_D_SB_LUT4_O_I1_SB_LUT4_O_1_I3_SB_LUT4_O_I3[0]
|
|
.sym 28683 tx_fifo.empty_o_SB_DFF_Q_D_SB_LUT4_O_I1_SB_LUT4_O_1_I3_SB_LUT4_O_I3[1]
|
|
.sym 28684 tx_fifo.empty_o_SB_DFF_Q_D_SB_LUT4_O_I1_SB_LUT4_O_1_I3_SB_LUT4_O_I3[2]
|
|
.sym 28685 tx_fifo.empty_o_SB_DFF_Q_D_SB_LUT4_O_I1_SB_LUT4_O_1_I3_SB_LUT4_O_I3[3]
|
|
.sym 28686 tx_fifo.rd_addr_gray[1]
|
|
.sym 28690 tx_fifo.rd_addr_gray[6]
|
|
.sym 28694 tx_fifo.rd_addr_gray_wr[6]
|
|
.sym 28698 tx_fifo.empty_o_SB_LUT4_I3_O_SB_LUT4_O_1_I0[0]
|
|
.sym 28699 tx_fifo.empty_o_SB_LUT4_I3_O_SB_LUT4_O_1_I0[1]
|
|
.sym 28700 tx_fifo.empty_o_SB_LUT4_I3_O_SB_LUT4_O_1_I0[2]
|
|
.sym 28701 tx_fifo.empty_o_SB_LUT4_I3_O_SB_LUT4_O_1_I0[3]
|
|
.sym 28702 tx_fifo.rd_addr_gray_wr[1]
|
|
.sym 28706 w_rx_09_fifo_data[2]
|
|
.sym 28710 w_rx_09_fifo_data[0]
|
|
.sym 28714 w_rx_09_fifo_data[1]
|
|
.sym 28718 w_rx_09_fifo_data[7]
|
|
.sym 28722 rx_fifo.full_o_SB_LUT4_I3_1_O_SB_LUT4_I0_O[0]
|
|
.sym 28723 rx_fifo.full_o_SB_LUT4_I3_1_O_SB_LUT4_I0_O[1]
|
|
.sym 28724 rx_fifo.full_o_SB_LUT4_I3_1_O_SB_LUT4_I0_O[2]
|
|
.sym 28725 rx_fifo.full_o_SB_LUT4_I3_1_O_SB_LUT4_I0_O[3]
|
|
.sym 28727 w_rx_09_fifo_data[3]
|
|
.sym 28728 w_rx_24_fifo_data[3]
|
|
.sym 28729 o_led1$SB_IO_OUT
|
|
.sym 28730 w_rx_09_fifo_data[5]
|
|
.sym 28734 w_rx_09_fifo_data[3]
|
|
.sym 28738 rx_fifo.wr_addr_gray_SB_DFFE_Q_8_D[0]
|
|
.sym 28739 rx_fifo.rd_addr_gray_wr_r[1]
|
|
.sym 28740 rx_fifo.wr_addr_gray_SB_DFFE_Q_8_D[2]
|
|
.sym 28741 rx_fifo.rd_addr_gray_wr_r[6]
|
|
.sym 28742 w_rx_fifo_pulled_data[8]
|
|
.sym 28746 w_rx_fifo_pulled_data[5]
|
|
.sym 28750 w_rx_fifo_pulled_data[9]
|
|
.sym 28758 w_rx_fifo_pulled_data[10]
|
|
.sym 28762 w_rx_fifo_pulled_data[0]
|
|
.sym 28769 w_lvds_rx_24_d0_SB_LUT4_I1_O[0]
|
|
.sym 28770 rx_fifo.wr_addr_gray_SB_LUT4_I2_O[7]
|
|
.sym 28774 rx_fifo.wr_addr_gray_SB_LUT4_I2_O[3]
|
|
.sym 28778 rx_fifo.wr_addr_gray_SB_LUT4_I2_O[4]
|
|
.sym 28782 rx_fifo.wr_addr_gray_SB_LUT4_I2_O[6]
|
|
.sym 28786 rx_fifo.wr_addr_gray_SB_LUT4_I2_O[2]
|
|
.sym 28794 w_rx_24_fifo_push
|
|
.sym 28795 w_rx_09_fifo_push
|
|
.sym 28796 o_led1$SB_IO_OUT
|
|
.sym 28797 w_rx_fifo_full
|
|
.sym 28798 rx_fifo.wr_addr_gray_SB_LUT4_I2_O[5]
|
|
.sym 28803 rx_fifo.full_o_SB_DFF_Q_D_SB_LUT4_O_I0_SB_LUT4_O_1_I0[2]
|
|
.sym 28808 rx_fifo.wr_addr[2]
|
|
.sym 28809 rx_fifo.full_o_SB_DFF_Q_D_SB_LUT4_O_I0_SB_LUT4_O_1_I0[2]
|
|
.sym 28812 rx_fifo.wr_addr[3]
|
|
.sym 28813 rx_fifo.full_o_SB_DFF_Q_D_SB_LUT4_O_I0_SB_LUT4_O_I0_SB_LUT4_O_I3[2]
|
|
.sym 28816 rx_fifo.wr_addr[4]
|
|
.sym 28817 rx_fifo.full_o_SB_DFF_Q_D_SB_LUT4_O_I0_SB_LUT4_O_I0_SB_LUT4_O_I3[3]
|
|
.sym 28820 rx_fifo.wr_addr[5]
|
|
.sym 28821 rx_fifo.full_o_SB_DFF_Q_D_SB_LUT4_O_I0_SB_LUT4_O_I0_SB_LUT4_O_I3[4]
|
|
.sym 28824 rx_fifo.wr_addr[6]
|
|
.sym 28825 rx_fifo.full_o_SB_DFF_Q_D_SB_LUT4_O_I0_SB_LUT4_O_I0_SB_LUT4_O_I3[5]
|
|
.sym 28828 rx_fifo.wr_addr[7]
|
|
.sym 28829 rx_fifo.full_o_SB_DFF_Q_D_SB_LUT4_O_I0_SB_LUT4_O_I0_SB_LUT4_O_I3[6]
|
|
.sym 28830 rx_fifo.full_o_SB_DFF_Q_D_SB_LUT4_O_I0_SB_LUT4_O_I0_SB_LUT4_O_I0[0]
|
|
.sym 28832 rx_fifo.wr_addr[8]
|
|
.sym 28833 rx_fifo.full_o_SB_DFF_Q_D_SB_LUT4_O_I0_SB_LUT4_O_I0_SB_LUT4_O_I3[7]
|
|
.sym 28836 rx_fifo.wr_addr[9]
|
|
.sym 28837 rx_fifo.full_o_SB_DFF_Q_D_SB_LUT4_O_I0_SB_LUT4_O_I0_SB_LUT4_O_I3[8]
|
|
.sym 28839 w_rx_24_fifo_push
|
|
.sym 28840 w_rx_09_fifo_push
|
|
.sym 28841 o_led1$SB_IO_OUT
|
|
.sym 28842 rx_fifo.rd_addr[9]
|
|
.sym 28846 rx_fifo.rd_addr_gray_wr[7]
|
|
.sym 28850 rx_fifo.rd_addr_gray_wr[1]
|
|
.sym 28855 rx_fifo.rd_addr_gray_wr_r[3]
|
|
.sym 28856 rx_fifo.full_o_SB_DFF_Q_D_SB_LUT4_O_I0_SB_LUT4_O_2_I0[3]
|
|
.sym 28857 rx_fifo.full_o_SB_DFF_Q_D_SB_LUT4_O_I0_SB_LUT4_O_2_I2[3]
|
|
.sym 28862 w_lvds_rx_24_d0_SB_LUT4_I1_O_SB_LUT4_O_I0[1]
|
|
.sym 28863 w_lvds_rx_24_d0_SB_LUT4_I1_O_SB_LUT4_O_I0[2]
|
|
.sym 28864 lvds_rx_24_inst.r_phase_count_SB_LUT4_O_I3[0]
|
|
.sym 28865 w_lvds_rx_24_d0_SB_LUT4_I1_O[2]
|
|
.sym 28867 w_smi_data_input[7]
|
|
.sym 28868 smi_ctrl_ins.tx_reg_state[1]
|
|
.sym 28869 i_rst_b$SB_IO_IN
|
|
.sym 28870 lvds_rx_24_inst.r_state_if_SB_DFFESR_Q_D[2]
|
|
.sym 28877 w_rx_fifo_full
|
|
.sym 28886 lvds_rx_24_inst.r_state_if_SB_DFFESR_Q_D[2]
|
|
.sym 28894 w_lvds_rx_24_d0_SB_LUT4_I1_O[2]
|
|
.sym 28895 w_lvds_rx_24_d1
|
|
.sym 28896 w_lvds_rx_24_d0_SB_LUT4_I1_O[0]
|
|
.sym 28897 w_lvds_rx_24_d0
|
|
.sym 28905 w_lvds_rx_24_d1
|
|
.sym 28913 w_lvds_rx_24_d0
|
|
.sym 28930 rx_fifo.wr_addr_gray_SB_DFFE_Q_2_D[2]
|
|
.sym 28938 rx_fifo.wr_addr_gray_SB_DFFE_Q_8_D[0]
|
|
.sym 28942 rx_fifo.wr_addr_gray_SB_DFFE_Q_8_D[2]
|
|
.sym 28946 w_lvds_rx_24_d0_SB_LUT4_I1_O[2]
|
|
.sym 28947 w_lvds_rx_24_d0
|
|
.sym 28948 w_lvds_rx_24_d1
|
|
.sym 28949 w_lvds_rx_24_d0_SB_LUT4_I1_O[0]
|
|
.sym 28952 rx_fifo.wr_addr_gray_SB_LUT4_I2_O[5]
|
|
.sym 28953 rx_fifo.wr_addr_gray_SB_LUT4_I2_O[6]
|
|
.sym 28954 rx_fifo.full_o_SB_LUT4_I3_1_O[1]
|
|
.sym 28965 tx_fifo.empty_o_SB_LUT4_I3_O_SB_LUT4_O_1_I0[2]
|
|
.sym 28966 w_tx_fifo_pulled_data[22]
|
|
.sym 28970 w_tx_fifo_pulled_data[24]
|
|
.sym 28974 w_tx_fifo_pulled_data[20]
|
|
.sym 28978 lvds_tx_inst.r_fifo_data[26]
|
|
.sym 28979 lvds_tx_inst.r_fifo_data[24]
|
|
.sym 28980 lvds_tx_inst.r_phase_count_SB_DFF_D_Q[0]
|
|
.sym 28981 lvds_tx_inst.r_phase_count_SB_LUT4_I1_1_O_SB_DFF_D_Q[2]
|
|
.sym 28982 lvds_tx_inst.r_fifo_data[22]
|
|
.sym 28983 lvds_tx_inst.r_fifo_data[20]
|
|
.sym 28984 lvds_tx_inst.r_phase_count_SB_LUT4_I1_1_O_SB_DFF_D_Q[2]
|
|
.sym 28985 lvds_tx_inst.r_phase_count_SB_DFF_D_Q[0]
|
|
.sym 28986 w_tx_fifo_pulled_data[5]
|
|
.sym 28990 w_tx_fifo_pulled_data[26]
|
|
.sym 28994 tx_fifo.rd_addr_gray[0]
|
|
.sym 28998 tx_fifo.rd_addr_gray[7]
|
|
.sym 29002 tx_fifo.rd_addr_gray[8]
|
|
.sym 29006 tx_fifo.rd_addr_gray[5]
|
|
.sym 29010 tx_fifo.rd_addr_gray[2]
|
|
.sym 29014 w_lvds_tx_d1_SB_DFF_Q_D_SB_LUT4_O_1_I0_SB_LUT4_O_I2_SB_LUT4_O_I2[0]
|
|
.sym 29015 w_lvds_tx_d1_SB_DFF_Q_D_SB_LUT4_O_1_I0_SB_LUT4_O_I0[1]
|
|
.sym 29016 w_lvds_tx_d1_SB_DFF_Q_D_SB_LUT4_O_1_I0_SB_LUT4_O_I2_SB_LUT4_O_I2[2]
|
|
.sym 29017 w_lvds_tx_d1_SB_DFF_Q_D_SB_LUT4_O_1_I0_SB_LUT4_O_I2_SB_LUT4_O_I2[3]
|
|
.sym 29018 tx_fifo.rd_addr_gray_wr[5]
|
|
.sym 29022 tx_fifo.rd_addr_gray_wr[7]
|
|
.sym 29030 tx_fifo.wr_addr_gray_rd[3]
|
|
.sym 29034 tx_fifo.wr_addr_gray[7]
|
|
.sym 29042 tx_fifo.wr_addr_gray_rd[2]
|
|
.sym 29047 w_lvds_tx_d1_SB_DFF_Q_D_SB_LUT4_O_1_I0_SB_LUT4_O_1_I2[1]
|
|
.sym 29048 w_lvds_tx_d1_SB_DFF_Q_D_SB_LUT4_O_1_I0_SB_LUT4_O_I0[2]
|
|
.sym 29049 w_lvds_tx_d1_SB_DFF_Q_D_SB_LUT4_O_1_I0[3]
|
|
.sym 29050 tx_fifo.wr_addr_gray_rd[4]
|
|
.sym 29054 tx_fifo.wr_addr_gray[0]
|
|
.sym 29059 tx_fifo.full_o_SB_DFF_Q_D_SB_LUT4_O_I0_SB_LUT4_O_1_I0_SB_LUT4_O_I3[1]
|
|
.sym 29064 tx_fifo.wr_addr[2]
|
|
.sym 29065 tx_fifo.full_o_SB_DFF_Q_D_SB_LUT4_O_I0_SB_LUT4_O_1_I0_SB_LUT4_O_I3[1]
|
|
.sym 29068 tx_fifo.wr_addr[3]
|
|
.sym 29069 tx_fifo.full_o_SB_DFF_Q_D_SB_LUT4_O_I0_SB_LUT4_O_1_I0_SB_LUT4_O_I3[2]
|
|
.sym 29072 tx_fifo.wr_addr[4]
|
|
.sym 29073 tx_fifo.full_o_SB_DFF_Q_D_SB_LUT4_O_I0_SB_LUT4_O_1_I0_SB_LUT4_O_I3[3]
|
|
.sym 29076 tx_fifo.wr_addr[5]
|
|
.sym 29077 tx_fifo.full_o_SB_DFF_Q_D_SB_LUT4_O_I0_SB_LUT4_O_1_I0_SB_LUT4_O_I3[4]
|
|
.sym 29080 tx_fifo.wr_addr[6]
|
|
.sym 29081 tx_fifo.full_o_SB_DFF_Q_D_SB_LUT4_O_I0_SB_LUT4_O_1_I0_SB_LUT4_O_I3[5]
|
|
.sym 29084 tx_fifo.wr_addr[7]
|
|
.sym 29085 tx_fifo.full_o_SB_DFF_Q_D_SB_LUT4_O_I0_SB_LUT4_O_1_I0_SB_LUT4_O_I3[6]
|
|
.sym 29088 tx_fifo.wr_addr[8]
|
|
.sym 29089 tx_fifo.full_o_SB_DFF_Q_D_SB_LUT4_O_I0_SB_LUT4_O_1_I0_SB_LUT4_O_I3[7]
|
|
.sym 29092 tx_fifo.wr_addr[9]
|
|
.sym 29093 tx_fifo.full_o_SB_DFF_Q_D_SB_LUT4_O_I0_SB_LUT4_O_1_I0_SB_LUT4_O_I3[8]
|
|
.sym 29094 tx_fifo.full_o_SB_DFF_Q_D_SB_LUT4_O_I0[0]
|
|
.sym 29095 tx_fifo.full_o_SB_DFF_Q_D_SB_LUT4_O_I0[1]
|
|
.sym 29096 tx_fifo.full_o_SB_DFF_Q_D_SB_LUT4_O_I0[2]
|
|
.sym 29097 tx_fifo.full_o_SB_DFF_Q_D_SB_LUT4_O_I0[3]
|
|
.sym 29098 tx_fifo.full_o_SB_DFF_Q_D_SB_LUT4_O_I0_SB_LUT4_O_I0_SB_LUT4_O_2_I3[0]
|
|
.sym 29099 tx_fifo.full_o_SB_DFF_Q_D_SB_LUT4_O_I0_SB_LUT4_O_1_I0[3]
|
|
.sym 29100 tx_fifo.full_o_SB_DFF_Q_D_SB_LUT4_O_I0_SB_LUT4_O_I0_SB_LUT4_O_I2[2]
|
|
.sym 29101 tx_fifo.full_o_SB_DFF_Q_D_SB_LUT4_O_I0_SB_LUT4_O_1_I0[4]
|
|
.sym 29102 tx_fifo.full_o_SB_DFF_Q_D_SB_LUT4_O_I0_SB_LUT4_O_I0_SB_LUT4_O_2_I3[0]
|
|
.sym 29103 tx_fifo.full_o_SB_DFF_Q_D_SB_LUT4_O_I0_SB_LUT4_O_1_I0[4]
|
|
.sym 29104 tx_fifo.full_o_SB_DFF_Q_D_SB_LUT4_O_I0_SB_LUT4_O_1_I0[3]
|
|
.sym 29105 tx_fifo.full_o_SB_DFF_Q_D_SB_LUT4_O_I0_SB_LUT4_O_I0_SB_LUT4_O_2_I3[3]
|
|
.sym 29106 rx_fifo.wr_addr_gray_rd[3]
|
|
.sym 29113 tx_fifo.full_o_SB_DFF_Q_D_SB_LUT4_O_I0_SB_LUT4_O_1_I0_SB_LUT4_O_I3[1]
|
|
.sym 29114 tx_fifo.rd_addr_gray_wr[0]
|
|
.sym 29128 tx_fifo.rd_addr_gray_wr_r[1]
|
|
.sym 29129 tx_fifo.full_o_SB_DFF_Q_D_SB_LUT4_O_I0_SB_LUT4_O_1_I0[1]
|
|
.sym 29130 tx_fifo.full_o_SB_DFF_Q_D_SB_LUT4_O_I0_SB_LUT4_O_1_I2_SB_LUT4_O_I3[0]
|
|
.sym 29131 tx_fifo.full_o_SB_DFF_Q_D_SB_LUT4_O_I0_SB_LUT4_O_1_I0_SB_LUT4_O_I3[1]
|
|
.sym 29132 tx_fifo.full_o_SB_DFF_Q_D_SB_LUT4_O_I0_SB_LUT4_O_1_I2_SB_LUT4_O_I3[2]
|
|
.sym 29133 tx_fifo.full_o_SB_DFF_Q_D_SB_LUT4_O_I0_SB_LUT4_O_1_I2_SB_LUT4_O_I3[3]
|
|
.sym 29135 w_lvds_tx_d1_SB_DFF_Q_D_SB_LUT4_O_1_I0_SB_LUT4_O_I0[0]
|
|
.sym 29136 w_lvds_tx_d1_SB_DFF_Q_D_SB_LUT4_O_1_I0_SB_LUT4_O_I0[1]
|
|
.sym 29137 w_lvds_tx_d1_SB_DFF_Q_D_SB_LUT4_O_1_I0_SB_LUT4_O_I0[2]
|
|
.sym 29138 tx_fifo.rd_addr_gray_wr[9]
|
|
.sym 29146 tx_fifo.rd_addr[9]
|
|
.sym 29154 w_tx_fifo_pulled_data[10]
|
|
.sym 29158 w_tx_fifo_pulled_data[1]
|
|
.sym 29162 w_tx_fifo_pulled_data[2]
|
|
.sym 29166 w_tx_fifo_pulled_data[3]
|
|
.sym 29170 lvds_tx_inst.r_fifo_data[2]
|
|
.sym 29171 lvds_tx_inst.r_fifo_data[0]
|
|
.sym 29172 lvds_tx_inst.r_phase_count_SB_DFF_D_Q[0]
|
|
.sym 29173 lvds_tx_inst.r_phase_count_SB_LUT4_I1_1_O_SB_DFF_D_Q[2]
|
|
.sym 29178 w_tx_fifo_pulled_data[0]
|
|
.sym 29182 w_tx_fifo_pulled_data[30]
|
|
.sym 29186 tx_fifo.wr_addr_gray_rd[8]
|
|
.sym 29190 tx_fifo.wr_addr_gray[1]
|
|
.sym 29202 tx_fifo.wr_addr_gray[8]
|
|
.sym 29218 w_rx_24_fifo_data[3]
|
|
.sym 29222 w_rx_24_fifo_data[2]
|
|
.sym 29226 w_rx_24_fifo_data[0]
|
|
.sym 29230 w_rx_24_fifo_data[5]
|
|
.sym 29235 w_rx_09_fifo_data[4]
|
|
.sym 29236 w_rx_24_fifo_data[4]
|
|
.sym 29237 o_led1$SB_IO_OUT
|
|
.sym 29239 w_rx_09_fifo_data[2]
|
|
.sym 29240 w_rx_24_fifo_data[2]
|
|
.sym 29241 o_led1$SB_IO_OUT
|
|
.sym 29243 w_rx_09_fifo_data[7]
|
|
.sym 29244 w_rx_24_fifo_data[7]
|
|
.sym 29245 o_led1$SB_IO_OUT
|
|
.sym 29247 w_rx_09_fifo_data[9]
|
|
.sym 29248 w_rx_24_fifo_data[9]
|
|
.sym 29249 o_led1$SB_IO_OUT
|
|
.sym 29251 rx_fifo.full_o_SB_DFF_Q_D_SB_LUT4_O_I0_SB_LUT4_O_1_I0[1]
|
|
.sym 29256 rx_fifo.full_o_SB_DFF_Q_D_SB_LUT4_O_I0_SB_LUT4_O_1_I0[2]
|
|
.sym 29257 rx_fifo.full_o_SB_DFF_Q_D_SB_LUT4_O_I0_SB_LUT4_O_1_I0[1]
|
|
.sym 29260 rx_fifo.wr_addr[2]
|
|
.sym 29261 rx_fifo.wr_addr_gray_SB_LUT4_I2_I3[2]
|
|
.sym 29264 rx_fifo.wr_addr[3]
|
|
.sym 29265 rx_fifo.wr_addr_gray_SB_LUT4_I2_I3[3]
|
|
.sym 29268 rx_fifo.wr_addr[4]
|
|
.sym 29269 rx_fifo.wr_addr_gray_SB_LUT4_I2_I3[4]
|
|
.sym 29272 rx_fifo.wr_addr[5]
|
|
.sym 29273 rx_fifo.wr_addr_gray_SB_LUT4_I2_I3[5]
|
|
.sym 29276 rx_fifo.wr_addr[6]
|
|
.sym 29277 rx_fifo.wr_addr_gray_SB_LUT4_I2_I3[6]
|
|
.sym 29280 rx_fifo.wr_addr[7]
|
|
.sym 29281 rx_fifo.wr_addr_gray_SB_LUT4_I2_I3[7]
|
|
.sym 29284 rx_fifo.wr_addr[8]
|
|
.sym 29285 rx_fifo.wr_addr_gray_SB_LUT4_I2_I3[8]
|
|
.sym 29288 rx_fifo.wr_addr[9]
|
|
.sym 29289 rx_fifo.wr_addr_gray_SB_LUT4_I2_I3[9]
|
|
.sym 29292 rx_fifo.wr_addr_gray_SB_LUT4_I2_O[1]
|
|
.sym 29293 rx_fifo.wr_addr_gray_SB_LUT4_I2_O[2]
|
|
.sym 29296 rx_fifo.wr_addr_gray_SB_LUT4_I2_O[6]
|
|
.sym 29297 rx_fifo.wr_addr_gray_SB_LUT4_I2_O[7]
|
|
.sym 29298 rx_fifo.full_o_SB_LUT4_I3_1_O_SB_LUT4_I0_O_SB_LUT4_O_2_I0[0]
|
|
.sym 29299 rx_fifo.full_o_SB_LUT4_I3_1_O_SB_LUT4_I0_O_SB_LUT4_O_2_I0[1]
|
|
.sym 29300 rx_fifo.full_o_SB_LUT4_I3_1_O_SB_LUT4_I0_O_SB_LUT4_O_2_I0[2]
|
|
.sym 29301 rx_fifo.full_o_SB_LUT4_I3_1_O_SB_LUT4_I0_O_SB_LUT4_O_2_I0[3]
|
|
.sym 29306 rx_fifo.full_o_SB_DFF_Q_D_SB_LUT4_O_I0_SB_LUT4_O_1_I0[2]
|
|
.sym 29307 rx_fifo.rd_addr_gray_wr_r[1]
|
|
.sym 29308 rx_fifo.full_o_SB_DFF_Q_D_SB_LUT4_O_I0_SB_LUT4_O_2_I0[2]
|
|
.sym 29309 w_rx_fifo_push
|
|
.sym 29310 lvds_rx_09_inst.o_fifo_push_SB_DFFESR_Q_D
|
|
.sym 29324 w_lvds_rx_24_d0_SB_LUT4_I1_O[0]
|
|
.sym 29325 w_lvds_rx_24_d0_SB_LUT4_I1_O[2]
|
|
.sym 29328 rx_fifo.full_o_SB_LUT4_I3_1_O[1]
|
|
.sym 29329 rx_fifo.wr_addr_gray_SB_LUT4_I2_O[8]
|
|
.sym 29331 rx_fifo.full_o_SB_DFF_Q_D_SB_LUT4_O_I0_SB_LUT4_O_I0_SB_LUT4_O_1_I3[0]
|
|
.sym 29332 rx_fifo.wr_addr_gray_SB_LUT4_I2_O[5]
|
|
.sym 29333 rx_fifo.wr_addr_gray_SB_LUT4_I2_O[6]
|
|
.sym 29334 w_rx_24_fifo_data[1]
|
|
.sym 29338 rx_fifo.wr_addr_gray_SB_DFFE_Q_2_D[0]
|
|
.sym 29339 rx_fifo.rd_addr_gray_wr_r[7]
|
|
.sym 29340 rx_fifo.wr_addr_gray_SB_DFFE_Q_2_D[2]
|
|
.sym 29341 rx_fifo.full_o_SB_DFF_Q_D_SB_LUT4_O_I0_SB_LUT4_O_I0_SB_LUT4_O_I0[1]
|
|
.sym 29343 lvds_rx_24_inst.o_fifo_push_SB_DFFESR_Q_R_SB_LUT4_O_I1[0]
|
|
.sym 29344 w_lvds_rx_24_d0_SB_LUT4_I1_O[0]
|
|
.sym 29345 w_lvds_rx_24_d0_SB_LUT4_I1_O[2]
|
|
.sym 29346 rx_fifo.rd_addr_gray[5]
|
|
.sym 29350 rx_fifo.rd_addr_gray[0]
|
|
.sym 29354 rx_fifo.rd_addr_gray[1]
|
|
.sym 29358 rx_fifo.rd_addr_gray[6]
|
|
.sym 29362 rx_fifo.rd_addr_gray[7]
|
|
.sym 29366 rx_fifo.full_o_SB_DFF_Q_D_SB_LUT4_O_I0[0]
|
|
.sym 29367 rx_fifo.full_o_SB_DFF_Q_D_SB_LUT4_O_I0[1]
|
|
.sym 29368 rx_fifo.full_o_SB_DFF_Q_D_SB_LUT4_O_I0[2]
|
|
.sym 29369 rx_fifo.full_o_SB_DFF_Q_D_SB_LUT4_O_I0[3]
|
|
.sym 29370 rx_fifo.rd_addr_gray[8]
|
|
.sym 29374 rx_fifo.rd_addr_gray[2]
|
|
.sym 29380 rx_fifo.wr_addr_gray_SB_LUT4_I2_O[2]
|
|
.sym 29381 rx_fifo.wr_addr_gray_SB_LUT4_I2_O[3]
|
|
.sym 29384 rx_fifo.wr_addr_gray_SB_LUT4_I2_O[4]
|
|
.sym 29385 rx_fifo.wr_addr_gray_SB_LUT4_I2_O[5]
|
|
.sym 29388 rx_fifo.wr_addr_gray_SB_LUT4_I2_O[3]
|
|
.sym 29389 rx_fifo.wr_addr_gray_SB_LUT4_I2_O[4]
|
|
.sym 29390 rx_fifo.wr_addr_gray_SB_DFFE_Q_2_D[0]
|
|
.sym 29398 rx_fifo.full_o_SB_DFF_Q_D_SB_LUT4_O_I0_SB_LUT4_O_1_I0[0]
|
|
.sym 29399 rx_fifo.full_o_SB_DFF_Q_D_SB_LUT4_O_I0_SB_LUT4_O_1_I0[1]
|
|
.sym 29400 rx_fifo.full_o_SB_DFF_Q_D_SB_LUT4_O_I0_SB_LUT4_O_1_I0[2]
|
|
.sym 29401 rx_fifo.full_o_SB_DFF_Q_D_SB_LUT4_O_I0_SB_LUT4_O_1_I0[3]
|
|
.sym 29402 rx_fifo.full_o_SB_DFF_Q_D_SB_LUT4_O_I0_SB_LUT4_O_I0[0]
|
|
.sym 29403 rx_fifo.full_o_SB_DFF_Q_D_SB_LUT4_O_I0_SB_LUT4_O_I0[1]
|
|
.sym 29404 rx_fifo.full_o_SB_DFF_Q_D_SB_LUT4_O_I0_SB_LUT4_O_I0[2]
|
|
.sym 29405 rx_fifo.full_o_SB_DFF_Q_D_SB_LUT4_O_I0_SB_LUT4_O_I0[3]
|
|
.sym 29406 rx_fifo.wr_addr_gray_SB_LUT4_I2_O[8]
|
|
.sym 29411 rx_fifo.rd_addr_gray_wr_r[4]
|
|
.sym 29412 rx_fifo.full_o_SB_DFF_Q_D_SB_LUT4_O_I0_SB_LUT4_O_2_I2[3]
|
|
.sym 29413 rx_fifo.full_o_SB_DFF_Q_D_SB_LUT4_O_I0_SB_LUT4_O_2_I2[4]
|
|
.sym 29414 rx_fifo.full_o_SB_DFF_Q_D_SB_LUT4_O_I0_SB_LUT4_O_2_I0[0]
|
|
.sym 29415 rx_fifo.full_o_SB_DFF_Q_D_SB_LUT4_O_I0_SB_LUT4_O_2_I0[1]
|
|
.sym 29416 rx_fifo.full_o_SB_DFF_Q_D_SB_LUT4_O_I0_SB_LUT4_O_2_I0[2]
|
|
.sym 29417 rx_fifo.full_o_SB_DFF_Q_D_SB_LUT4_O_I0_SB_LUT4_O_2_I0[3]
|
|
.sym 29418 rx_fifo.rd_addr_gray_wr[5]
|
|
.sym 29422 rx_fifo.rd_addr_gray_wr[3]
|
|
.sym 29426 w_lvds_rx_24_d0_SB_LUT4_I1_O[0]
|
|
.sym 29427 w_lvds_rx_24_d0_SB_LUT4_I1_O[1]
|
|
.sym 29428 w_lvds_rx_24_d0_SB_LUT4_I1_O[2]
|
|
.sym 29429 w_lvds_rx_24_d0_SB_LUT4_I1_O[3]
|
|
.sym 29430 rx_fifo.rd_addr_gray[3]
|
|
.sym 29435 rx_fifo.rd_addr_gray_wr_r[6]
|
|
.sym 29436 rx_fifo.full_o_SB_DFF_Q_D_SB_LUT4_O_I0_SB_LUT4_O_2_I2[5]
|
|
.sym 29437 rx_fifo.full_o_SB_DFF_Q_D_SB_LUT4_O_I0_SB_LUT4_O_2_I2[6]
|
|
.sym 29438 rx_fifo.rd_addr_gray[4]
|
|
.sym 29442 rx_fifo.rd_addr_gray_wr[8]
|
|
.sym 29446 rx_fifo.rd_addr_gray_wr[2]
|
|
.sym 29450 rx_fifo.rd_addr_gray_wr[4]
|
|
.sym 29458 rx_fifo.rd_addr_gray_wr[0]
|
|
.sym 29462 rx_fifo.rd_addr_gray_wr[9]
|
|
.sym 29470 rx_fifo.rd_addr_gray_wr[6]
|
|
.sym 29474 rx_fifo.wr_addr[9]
|
|
.sym 29478 rx_fifo.wr_addr_gray[1]
|
|
.sym 29490 rx_fifo.wr_addr_gray[5]
|
|
.sym 29494 rx_fifo.wr_addr_gray_rd[6]
|
|
.sym 29498 tx_fifo.rd_addr_gray[4]
|
|
.sym 29502 tx_fifo.rd_addr_gray[3]
|
|
.sym 29506 tx_fifo.rd_addr_gray_SB_LUT4_I2_O[3]
|
|
.sym 29510 tx_fifo.rd_addr_gray_SB_DFFE_Q_8_D[3]
|
|
.sym 29517 tx_fifo.rd_addr[0]
|
|
.sym 29518 lvds_tx_inst.r_phase_count_SB_LUT4_I1_O_SB_DFF_D_Q[0]
|
|
.sym 29519 lvds_tx_inst.r_phase_count_SB_LUT4_I1_O_SB_DFF_D_Q[1]
|
|
.sym 29520 lvds_tx_inst.r_phase_count_SB_LUT4_I1_O_SB_DFF_D_Q[2]
|
|
.sym 29521 w_lvds_tx_d1_SB_DFF_Q_D_SB_LUT4_O_1_I0_SB_LUT4_O_I0[2]
|
|
.sym 29524 tx_fifo.wr_addr_gray_SB_LUT4_I2_O[6]
|
|
.sym 29525 tx_fifo.wr_addr_gray_SB_LUT4_I2_O[7]
|
|
.sym 29528 tx_fifo.empty_o_SB_DFF_Q_D_SB_LUT4_O_I1_SB_LUT4_O_I0_SB_LUT4_O_2_I3[1]
|
|
.sym 29529 tx_fifo.empty_o_SB_DFF_Q_D_SB_LUT4_O_I1_SB_LUT4_O_I0_SB_LUT4_O_2_I3[2]
|
|
.sym 29532 tx_fifo.full_o_SB_DFF_Q_D_SB_LUT4_O_I0_SB_LUT4_O_1_I2_SB_LUT4_O_I3[0]
|
|
.sym 29533 tx_fifo.wr_addr_gray_SB_LUT4_I2_O[1]
|
|
.sym 29534 tx_fifo.empty_o_SB_DFF_Q_D_SB_LUT4_O_I1_SB_LUT4_O_I0_SB_LUT4_O_2_I3[1]
|
|
.sym 29538 tx_fifo.wr_addr_gray_SB_DFFE_Q_6_D[0]
|
|
.sym 29542 tx_fifo.wr_addr_gray_SB_DFFE_Q_6_D[3]
|
|
.sym 29546 tx_fifo.full_o_SB_LUT4_I3_O[1]
|
|
.sym 29550 tx_fifo.wr_addr_gray_SB_DFFE_Q_8_D[2]
|
|
.sym 29554 tx_fifo.wr_addr_gray_SB_LUT4_I2_O[9]
|
|
.sym 29560 tx_fifo.wr_addr_gray_SB_DFFE_Q_4_D_SB_LUT4_I2_O_SB_LUT4_O_I3[1]
|
|
.sym 29561 tx_fifo.wr_addr_gray_SB_DFFE_Q_4_D_SB_LUT4_I2_O_SB_LUT4_O_I3[2]
|
|
.sym 29562 tx_fifo.wr_addr_gray_SB_DFFE_Q_4_D[0]
|
|
.sym 29566 tx_fifo.wr_addr_gray_SB_DFFE_Q_3_D[1]
|
|
.sym 29570 tx_fifo.wr_addr_gray_SB_LUT4_I2_O[6]
|
|
.sym 29574 tx_fifo.wr_addr_gray_SB_LUT4_I2_O[2]
|
|
.sym 29578 tx_fifo.wr_addr_gray_SB_LUT4_I2_O[7]
|
|
.sym 29582 tx_fifo.wr_addr_gray_SB_DFFE_Q_4_D_SB_LUT4_I2_O_SB_LUT4_O_I3[1]
|
|
.sym 29589 tx_fifo.full_o_SB_DFF_Q_D_SB_LUT4_O_I0_SB_LUT4_O_1_I2_SB_LUT4_O_I3[0]
|
|
.sym 29590 tx_fifo.wr_addr_gray_SB_LUT4_I2_O[1]
|
|
.sym 29594 tx_fifo.wr_addr_gray_SB_LUT4_I2_O[3]
|
|
.sym 29598 tx_fifo.wr_addr_gray_SB_DFFE_Q_4_D_SB_LUT4_I2_O_SB_LUT4_O_I3[2]
|
|
.sym 29604 tx_fifo.rd_addr_gray_wr_r[3]
|
|
.sym 29605 tx_fifo.full_o_SB_DFF_Q_D_SB_LUT4_O_I0_SB_LUT4_O_1_I0[2]
|
|
.sym 29606 tx_fifo.full_o_SB_DFF_Q_D_SB_LUT4_O_I0_SB_LUT4_O_1_I2[1]
|
|
.sym 29607 tx_fifo.full_o_SB_DFF_Q_D_SB_LUT4_O_I0_SB_LUT4_O_1_I0[8]
|
|
.sym 29608 tx_fifo.rd_addr_gray_wr_r[8]
|
|
.sym 29609 tx_fifo.full_o_SB_DFF_Q_D_SB_LUT4_O_I0_SB_LUT4_O_1_I0[7]
|
|
.sym 29611 tx_fifo.rd_addr_gray_wr_r[7]
|
|
.sym 29612 tx_fifo.full_o_SB_DFF_Q_D_SB_LUT4_O_I0_SB_LUT4_O_1_I0[6]
|
|
.sym 29613 tx_fifo.full_o_SB_DFF_Q_D_SB_LUT4_O_I0_SB_LUT4_O_1_I0[7]
|
|
.sym 29615 tx_fifo.wr_addr_gray_SB_LUT4_I2_O[9]
|
|
.sym 29616 tx_fifo.full_o_SB_DFF_Q_D_SB_LUT4_O_I0_SB_LUT4_O_1_I2[1]
|
|
.sym 29617 w_tx_fifo_full
|
|
.sym 29618 $PACKER_VCC_NET
|
|
.sym 29625 tx_fifo.full_o_SB_DFF_Q_D_SB_LUT4_O_I0_SB_LUT4_O_1_I0[2]
|
|
.sym 29632 tx_fifo.rd_addr_gray_wr_r[5]
|
|
.sym 29633 tx_fifo.full_o_SB_DFF_Q_D_SB_LUT4_O_I0_SB_LUT4_O_1_I0[5]
|
|
.sym 29634 tx_fifo.full_o_SB_DFF_Q_D_SB_LUT4_O_I0_SB_LUT4_O_1_I2_SB_LUT4_O_I3[2]
|
|
.sym 29635 tx_fifo.full_o_SB_LUT4_I3_O[1]
|
|
.sym 29636 tx_fifo.full_o_SB_LUT4_I3_O[2]
|
|
.sym 29637 tx_fifo.full_o_SB_LUT4_I3_O[3]
|
|
.sym 29638 tx_fifo.wr_addr_gray_SB_DFFE_Q_4_D_SB_LUT4_I2_O[0]
|
|
.sym 29639 tx_fifo.wr_addr_gray_SB_DFFE_Q_4_D_SB_LUT4_I2_O[1]
|
|
.sym 29640 tx_fifo.wr_addr_gray_SB_DFFE_Q_4_D_SB_LUT4_I2_O[2]
|
|
.sym 29641 tx_fifo.wr_addr_gray_SB_DFFE_Q_4_D_SB_LUT4_I2_O[3]
|
|
.sym 29642 tx_fifo.full_o_SB_DFF_Q_D_SB_LUT4_O_I0_SB_LUT4_O_I0[0]
|
|
.sym 29643 tx_fifo.full_o_SB_DFF_Q_D_SB_LUT4_O_I0_SB_LUT4_O_I0[1]
|
|
.sym 29644 tx_fifo.full_o_SB_DFF_Q_D_SB_LUT4_O_I0_SB_LUT4_O_I0[2]
|
|
.sym 29645 tx_fifo.full_o_SB_DFF_Q_D_SB_LUT4_O_I0_SB_LUT4_O_I0[3]
|
|
.sym 29646 tx_fifo.rd_addr_gray_wr[3]
|
|
.sym 29658 tx_fifo.full_o_SB_DFF_Q_D_SB_LUT4_O_I0_SB_LUT4_O_1_I0[8]
|
|
.sym 29659 tx_fifo.full_o_SB_DFF_Q_D_SB_LUT4_O_I0_SB_LUT4_O_1_I2[1]
|
|
.sym 29660 tx_fifo.full_o_SB_DFF_Q_D_SB_LUT4_O_I0_SB_LUT4_O_1_I2[2]
|
|
.sym 29661 w_tx_fifo_push
|
|
.sym 29672 tx_fifo.wr_addr_gray_SB_LUT4_I2_O[9]
|
|
.sym 29673 tx_fifo.wr_addr_gray_SB_LUT4_I2_O[8]
|
|
.sym 29682 tx_fifo.wr_addr_gray_SB_DFFE_Q_8_D[1]
|
|
.sym 29694 tx_fifo.wr_addr_gray_SB_LUT4_I2_O[8]
|
|
.sym 29714 w_rx_data[0]
|
|
.sym 29730 w_rx_24_fifo_data[7]
|
|
.sym 29738 w_rx_24_fifo_data[6]
|
|
.sym 29742 w_rx_24_fifo_data[4]
|
|
.sym 29749 w_smi_data_output[7]
|
|
.sym 29751 w_rx_09_fifo_data[6]
|
|
.sym 29752 w_rx_24_fifo_data[6]
|
|
.sym 29753 o_led1$SB_IO_OUT
|
|
.sym 29754 w_rx_24_fifo_data[9]
|
|
.sym 29762 rx_fifo.full_o_SB_LUT4_I3_1_O[0]
|
|
.sym 29763 rx_fifo.full_o_SB_LUT4_I3_1_O[1]
|
|
.sym 29764 rx_fifo.full_o_SB_DFF_Q_D_SB_LUT4_O_I0_SB_LUT4_O_I0_SB_LUT4_O_I0[2]
|
|
.sym 29765 rx_fifo.full_o_SB_LUT4_I3_1_O[3]
|
|
.sym 29772 i_rst_b$SB_IO_IN
|
|
.sym 29773 i_smi_soe_se$SB_IO_IN
|
|
.sym 29774 smi_ctrl_ins.r_fifo_pulled_data[9]
|
|
.sym 29775 smi_ctrl_ins.r_fifo_pulled_data[25]
|
|
.sym 29776 smi_ctrl_ins.int_cnt_rx[3]
|
|
.sym 29777 smi_ctrl_ins.int_cnt_rx[4]
|
|
.sym 29778 smi_ctrl_ins.r_fifo_pulled_data[10]
|
|
.sym 29779 smi_ctrl_ins.r_fifo_pulled_data[26]
|
|
.sym 29780 smi_ctrl_ins.int_cnt_rx[3]
|
|
.sym 29781 smi_ctrl_ins.int_cnt_rx[4]
|
|
.sym 29782 smi_ctrl_ins.r_fifo_pulled_data[8]
|
|
.sym 29783 smi_ctrl_ins.r_fifo_pulled_data[24]
|
|
.sym 29784 smi_ctrl_ins.int_cnt_rx[3]
|
|
.sym 29785 smi_ctrl_ins.int_cnt_rx[4]
|
|
.sym 29786 rx_fifo.wr_addr_gray[0]
|
|
.sym 29790 rx_fifo.wr_addr_gray_rd[0]
|
|
.sym 29797 rx_fifo.full_o_SB_DFF_Q_D_SB_LUT4_O_I0_SB_LUT4_O_1_I0[1]
|
|
.sym 29798 rx_fifo.wr_addr_gray_SB_LUT4_I2_O[1]
|
|
.sym 29804 rx_fifo.full_o_SB_DFF_Q_D_SB_LUT4_O_I0_SB_LUT4_O_1_I0[1]
|
|
.sym 29805 rx_fifo.wr_addr_gray_SB_LUT4_I2_O[1]
|
|
.sym 29808 rx_fifo.wr_addr_gray_SB_LUT4_I2_O[7]
|
|
.sym 29809 rx_fifo.wr_addr_gray_SB_LUT4_I2_O[8]
|
|
.sym 29811 w_rx_09_fifo_data[5]
|
|
.sym 29812 w_rx_24_fifo_data[5]
|
|
.sym 29813 o_led1$SB_IO_OUT
|
|
.sym 29815 rx_fifo.full_o_SB_DFF_Q_D_SB_LUT4_O_I0_SB_LUT4_O_1_I0[1]
|
|
.sym 29816 rx_fifo.full_o_SB_DFF_Q_D_SB_LUT4_O_I0_SB_LUT4_O_1_I0[3]
|
|
.sym 29817 rx_fifo.wr_addr_gray_SB_LUT4_I2_O[1]
|
|
.sym 29819 rx_fifo.full_o_SB_DFF_Q_D_SB_LUT4_O_I0_SB_LUT4_O_2_I0[1]
|
|
.sym 29820 rx_fifo.wr_addr_gray_SB_LUT4_I2_O[2]
|
|
.sym 29821 rx_fifo.wr_addr_gray_SB_LUT4_I2_O[3]
|
|
.sym 29823 rx_fifo.rd_addr_gray_wr_r[3]
|
|
.sym 29824 rx_fifo.wr_addr_gray_SB_LUT4_I2_O[3]
|
|
.sym 29825 rx_fifo.wr_addr_gray_SB_LUT4_I2_O[4]
|
|
.sym 29831 rx_fifo.rd_addr_gray_wr_r[4]
|
|
.sym 29832 rx_fifo.wr_addr_gray_SB_LUT4_I2_O[4]
|
|
.sym 29833 rx_fifo.wr_addr_gray_SB_LUT4_I2_O[5]
|
|
.sym 29834 rx_fifo.rd_addr_gray_SB_DFFE_Q_5_D_SB_LUT4_I0_O_SB_LUT4_O_I0[0]
|
|
.sym 29835 rx_fifo.rd_addr_gray_SB_DFFE_Q_5_D_SB_LUT4_I0_O_SB_LUT4_O_I0[1]
|
|
.sym 29836 rx_fifo.rd_addr_gray_SB_DFFE_Q_5_D_SB_LUT4_I0_O_SB_LUT4_O_I0[2]
|
|
.sym 29837 w_rx_fifo_pull
|
|
.sym 29838 rx_fifo.rd_addr_gray_SB_LUT4_I2_O[6]
|
|
.sym 29846 rx_fifo.rd_addr_gray_SB_LUT4_I2_O[3]
|
|
.sym 29850 rx_fifo.full_o_SB_DFF_Q_D_SB_LUT4_O_I0_SB_LUT4_O_I0_SB_LUT4_O_1_I3[0]
|
|
.sym 29851 rx_fifo.full_o_SB_DFF_Q_D_SB_LUT4_O_I0_SB_LUT4_O_2_I2[4]
|
|
.sym 29852 rx_fifo.full_o_SB_DFF_Q_D_SB_LUT4_O_I0_SB_LUT4_O_2_I2[5]
|
|
.sym 29853 rx_fifo.full_o_SB_DFF_Q_D_SB_LUT4_O_I0_SB_LUT4_O_I0_SB_LUT4_O_1_I3[3]
|
|
.sym 29854 rx_fifo.rd_addr_gray_SB_DFFE_Q_5_D_SB_LUT4_I0_O[1]
|
|
.sym 29858 rx_fifo.rd_addr_gray_SB_LUT4_I2_O[7]
|
|
.sym 29862 rx_fifo.rd_addr_gray_SB_LUT4_I2_O[5]
|
|
.sym 29868 rx_fifo.rd_addr_gray_SB_LUT4_I2_O[4]
|
|
.sym 29869 rx_fifo.rd_addr_gray_SB_LUT4_I2_O[5]
|
|
.sym 29870 rx_fifo.rd_addr_gray_SB_DFFE_Q_6_D[3]
|
|
.sym 29877 rx_fifo.rd_addr[0]
|
|
.sym 29880 rx_fifo.rd_addr_gray_wr_r[7]
|
|
.sym 29881 rx_fifo.full_o_SB_DFF_Q_D_SB_LUT4_O_I0_SB_LUT4_O_2_I2[6]
|
|
.sym 29882 rx_fifo.rd_addr_gray_SB_LUT4_I2_O[4]
|
|
.sym 29886 rx_fifo.rd_addr_gray_SB_DFFE_Q_6_D_SB_LUT4_I0_O_SB_LUT4_O_I3[2]
|
|
.sym 29890 rx_fifo.rd_addr_gray_SB_DFFE_Q_5_D[0]
|
|
.sym 29894 rx_fifo.rd_addr_gray_SB_DFFE_Q_5_D[2]
|
|
.sym 29900 rx_fifo.rd_addr_gray_SB_DFFE_Q_5_D_SB_LUT4_I0_O[1]
|
|
.sym 29901 rx_fifo.rd_addr_gray_SB_DFFE_Q_6_D_SB_LUT4_I0_O_SB_LUT4_O_I3[2]
|
|
.sym 29902 rx_fifo.rd_addr_gray_SB_DFFE_Q_6_D[0]
|
|
.sym 29906 rx_fifo.rd_addr_gray_SB_DFFE_Q_7_D[0]
|
|
.sym 29910 rx_fifo.rd_addr_gray_SB_DFFE_Q_5_D_SB_LUT4_I0_O_SB_LUT4_O_I0[2]
|
|
.sym 29914 rx_fifo.rd_addr_gray_SB_DFFE_Q_7_D[3]
|
|
.sym 29920 rx_fifo.rd_addr[0]
|
|
.sym 29921 rx_fifo.rd_addr_gray_SB_DFFE_Q_5_D_SB_LUT4_I0_O[1]
|
|
.sym 29922 rx_fifo.wr_addr_gray[6]
|
|
.sym 29926 rx_fifo.wr_addr_gray[8]
|
|
.sym 29930 rx_fifo.wr_addr_gray[3]
|
|
.sym 29934 rx_fifo.wr_addr_gray_rd[9]
|
|
.sym 29938 rx_fifo.wr_addr_gray_rd[1]
|
|
.sym 29942 rx_fifo.wr_addr_gray[2]
|
|
.sym 29946 rx_fifo.wr_addr_gray_rd[8]
|
|
.sym 29950 rx_fifo.wr_addr_gray_rd[2]
|
|
.sym 29963 rx_fifo.rd_addr_gray_SB_DFFE_Q_7_D[1]
|
|
.sym 29964 rx_fifo.empty_o_SB_DFF_Q_D_SB_LUT4_O_I0_SB_LUT4_O_1_I1_SB_LUT4_O_I3[2]
|
|
.sym 29965 rx_fifo.rd_addr[7]
|
|
.sym 29976 rx_fifo.rd_addr_gray_SB_LUT4_I2_O[5]
|
|
.sym 29977 rx_fifo.rd_addr_gray_SB_LUT4_I2_O[6]
|
|
.sym 29982 rx_fifo.rd_addr_gray_SB_LUT4_I2_O[8]
|
|
.sym 29996 tx_fifo.rd_addr[0]
|
|
.sym 29997 tx_fifo.rd_addr_gray_SB_LUT4_I2_O[1]
|
|
.sym 30000 tx_fifo.rd_addr_gray_SB_LUT4_I2_O[3]
|
|
.sym 30001 tx_fifo.empty_o_SB_DFF_Q_D_SB_LUT4_O_I1_SB_LUT4_O_I0_SB_LUT4_O_2_I3[1]
|
|
.sym 30010 w_tx_fifo_pull
|
|
.sym 30011 tx_fifo.empty_o_SB_LUT4_I3_I1[1]
|
|
.sym 30012 tx_fifo.empty_o_SB_LUT4_I3_I1[2]
|
|
.sym 30013 w_tx_fifo_empty
|
|
.sym 30018 tx_fifo.wr_addr_gray[4]
|
|
.sym 30022 tx_fifo.wr_addr_gray[6]
|
|
.sym 30027 spi_if_ins.state_if_SB_DFFESR_Q_2_D[0]
|
|
.sym 30028 spi_if_ins.state_if[2]
|
|
.sym 30029 spi_if_ins.spi.o_rx_data_valid_SB_LUT4_I3_O[1]
|
|
.sym 30030 tx_fifo.wr_addr_gray[3]
|
|
.sym 30034 tx_fifo.wr_addr_gray[2]
|
|
.sym 30038 tx_fifo.wr_addr_gray[5]
|
|
.sym 30042 tx_fifo.wr_addr[9]
|
|
.sym 30048 tx_fifo.wr_addr_gray_SB_DFFE_Q_4_D_SB_LUT4_I2_O_SB_LUT4_O_I3[2]
|
|
.sym 30049 tx_fifo.wr_addr_gray_SB_LUT4_I2_O[6]
|
|
.sym 30051 tx_fifo.full_o_SB_DFF_Q_D_SB_LUT4_O_I0_SB_LUT4_O_1_I2_SB_LUT4_O_I3[0]
|
|
.sym 30056 tx_fifo.full_o_SB_DFF_Q_D_SB_LUT4_O_I0_SB_LUT4_O_1_I0_SB_LUT4_O_I3[1]
|
|
.sym 30057 tx_fifo.full_o_SB_DFF_Q_D_SB_LUT4_O_I0_SB_LUT4_O_1_I2_SB_LUT4_O_I3[0]
|
|
.sym 30060 tx_fifo.wr_addr[2]
|
|
.sym 30061 tx_fifo.wr_addr_gray_SB_LUT4_I2_I3[2]
|
|
.sym 30064 tx_fifo.wr_addr[3]
|
|
.sym 30065 tx_fifo.wr_addr_gray_SB_LUT4_I2_I3[3]
|
|
.sym 30068 tx_fifo.wr_addr[4]
|
|
.sym 30069 tx_fifo.wr_addr_gray_SB_LUT4_I2_I3[4]
|
|
.sym 30072 tx_fifo.wr_addr[5]
|
|
.sym 30073 tx_fifo.wr_addr_gray_SB_LUT4_I2_I3[5]
|
|
.sym 30076 tx_fifo.wr_addr[6]
|
|
.sym 30077 tx_fifo.wr_addr_gray_SB_LUT4_I2_I3[6]
|
|
.sym 30080 tx_fifo.wr_addr[7]
|
|
.sym 30081 tx_fifo.wr_addr_gray_SB_LUT4_I2_I3[7]
|
|
.sym 30084 tx_fifo.wr_addr[8]
|
|
.sym 30085 tx_fifo.wr_addr_gray_SB_LUT4_I2_I3[8]
|
|
.sym 30088 tx_fifo.wr_addr[9]
|
|
.sym 30089 tx_fifo.wr_addr_gray_SB_LUT4_I2_I3[9]
|
|
.sym 30090 spi_if_ins.state_if_SB_DFFESR_Q_2_D[1]
|
|
.sym 30095 tx_fifo.empty_o_SB_DFF_Q_D_SB_LUT4_O_I1_SB_LUT4_O_I0_SB_LUT4_O_2_I3[0]
|
|
.sym 30096 tx_fifo.empty_o_SB_LUT4_I3_O_SB_LUT4_O_1_I0[3]
|
|
.sym 30097 tx_fifo.empty_o_SB_DFF_Q_D_SB_LUT4_O_I1_SB_LUT4_O_1_I3[1]
|
|
.sym 30106 spi_if_ins.state_if_SB_DFFESR_Q_D[1]
|
|
.sym 30111 spi_if_ins.state_if[2]
|
|
.sym 30112 spi_if_ins.state_if[0]
|
|
.sym 30113 spi_if_ins.state_if[1]
|
|
.sym 30114 tx_fifo.rd_addr_gray_wr_r[1]
|
|
.sym 30115 tx_fifo.wr_addr_gray_SB_DFFE_Q_8_D[1]
|
|
.sym 30116 tx_fifo.wr_addr_gray_SB_DFFE_Q_8_D[2]
|
|
.sym 30117 tx_fifo.full_o_SB_DFF_Q_D_SB_LUT4_O_I0_SB_LUT4_O_I0_SB_LUT4_O_3_I0[1]
|
|
.sym 30118 tx_fifo.rd_addr_gray_wr[2]
|
|
.sym 30122 tx_fifo.full_o_SB_DFF_Q_D_SB_LUT4_O_I0_SB_LUT4_O_I0_SB_LUT4_O_2_I3[0]
|
|
.sym 30123 tx_fifo.wr_addr_gray_SB_DFFE_Q_4_D_SB_LUT4_I2_O_SB_LUT4_O_I3[1]
|
|
.sym 30124 tx_fifo.wr_addr_gray_SB_DFFE_Q_4_D_SB_LUT4_I2_O_SB_LUT4_O_I3[2]
|
|
.sym 30125 tx_fifo.wr_addr_gray_SB_DFFE_Q_4_D_SB_LUT4_I2_O_SB_LUT4_O_I3[3]
|
|
.sym 30129 sys_ctrl_ins.o_data_out_SB_DFFER_Q_E
|
|
.sym 30130 tx_fifo.rd_addr_gray_wr[8]
|
|
.sym 30134 tx_fifo.wr_addr_gray_SB_DFFE_Q_6_D[0]
|
|
.sym 30135 tx_fifo.rd_addr_gray_wr_r[7]
|
|
.sym 30136 tx_fifo.rd_addr_gray_wr_r[3]
|
|
.sym 30137 tx_fifo.wr_addr_gray_SB_DFFE_Q_6_D[3]
|
|
.sym 30138 tx_fifo.rd_addr_gray_wr[4]
|
|
.sym 30142 io_ctrl_ins.o_pmod[2]
|
|
.sym 30143 io_ctrl_ins.o_data_out_SB_DFFESR_Q_6_R_SB_LUT4_O_I0_SB_LUT4_I2_O[2]
|
|
.sym 30144 io_ctrl_ins.o_data_out_SB_DFFESR_Q_6_R_SB_LUT4_O_I1_SB_LUT4_I2_O[1]
|
|
.sym 30145 io_ctrl_ins.pmod_dir_state[2]
|
|
.sym 30146 spi_if_ins.w_rx_data[2]
|
|
.sym 30152 tx_fifo.wr_addr_gray_SB_DFFE_Q_4_D[0]
|
|
.sym 30153 tx_fifo.rd_addr_gray_wr_r[5]
|
|
.sym 30154 spi_if_ins.o_fetch_cmd_SB_DFFESR_Q_E_SB_LUT4_O_I1[2]
|
|
.sym 30155 spi_if_ins.state_if[2]
|
|
.sym 30156 spi_if_ins.state_if[0]
|
|
.sym 30157 spi_if_ins.state_if[1]
|
|
.sym 30158 spi_if_ins.w_rx_data[0]
|
|
.sym 30162 tx_fifo.full_o_SB_DFF_Q_D_SB_LUT4_O_I0_SB_LUT4_O_I0_SB_LUT4_O_1_I3[0]
|
|
.sym 30163 tx_fifo.full_o_SB_DFF_Q_D_SB_LUT4_O_I0_SB_LUT4_O_1_I0[5]
|
|
.sym 30164 tx_fifo.full_o_SB_DFF_Q_D_SB_LUT4_O_I0_SB_LUT4_O_1_I0[6]
|
|
.sym 30165 tx_fifo.full_o_SB_DFF_Q_D_SB_LUT4_O_I0_SB_LUT4_O_I0_SB_LUT4_O_1_I3[3]
|
|
.sym 30170 tx_fifo.full_o_SB_DFF_Q_D_SB_LUT4_O_I0_SB_LUT4_O_I0_SB_LUT4_O_3_I0[0]
|
|
.sym 30171 tx_fifo.full_o_SB_DFF_Q_D_SB_LUT4_O_I0_SB_LUT4_O_I0_SB_LUT4_O_3_I0[1]
|
|
.sym 30172 tx_fifo.full_o_SB_DFF_Q_D_SB_LUT4_O_I0_SB_LUT4_O_1_I0[1]
|
|
.sym 30173 tx_fifo.full_o_SB_DFF_Q_D_SB_LUT4_O_I0_SB_LUT4_O_1_I0[2]
|
|
.sym 30174 spi_if_ins.w_rx_data[3]
|
|
.sym 30182 w_rx_data[4]
|
|
.sym 30189 io_ctrl_ins.led1_state_SB_DFFER_Q_E
|
|
.sym 30190 w_rx_data[2]
|
|
.sym 30198 w_rx_data[1]
|
|
.sym 30202 w_rx_data[3]
|
|
.sym 30206 w_rx_data[0]
|
|
.sym 30220 io_ctrl_ins.debug_mode[1]
|
|
.sym 30221 io_ctrl_ins.debug_mode_SB_LUT4_I0_O[1]
|
|
.sym 30222 w_rx_data[0]
|
|
.sym 30226 w_rx_data[1]
|
|
.sym 30230 io_ctrl_ins.debug_mode[0]
|
|
.sym 30231 io_ctrl_ins.rf_mode[1]
|
|
.sym 30232 io_ctrl_ins.rf_mode[2]
|
|
.sym 30233 i_rst_b$SB_IO_IN
|
|
.sym 30235 w_lvds_tx_d1_SB_DFF_Q_D_SB_LUT4_O_1_I0_SB_LUT4_O_I0[1]
|
|
.sym 30236 w_lvds_tx_d1_SB_DFF_Q_D_SB_LUT4_O_1_I0_SB_LUT4_O_I0[2]
|
|
.sym 30237 w_lvds_tx_d1_SB_DFF_Q_D_SB_LUT4_O_1_I0[3]
|
|
.sym 30243 w_rx_09_fifo_data[8]
|
|
.sym 30244 w_rx_24_fifo_data[8]
|
|
.sym 30245 o_led1$SB_IO_OUT
|
|
.sym 30247 w_rx_09_fifo_data[11]
|
|
.sym 30248 w_rx_24_fifo_data[11]
|
|
.sym 30249 o_led1$SB_IO_OUT
|
|
.sym 30250 w_rx_09_fifo_data[6]
|
|
.sym 30254 w_rx_09_fifo_data[11]
|
|
.sym 30261 w_smi_data_output[0]
|
|
.sym 30262 w_rx_09_fifo_data[4]
|
|
.sym 30266 w_rx_09_fifo_data[9]
|
|
.sym 30270 w_rx_09_fifo_data[8]
|
|
.sym 30274 smi_ctrl_ins.o_smi_data_out_SB_DFFNE_Q_D_SB_LUT4_O_3_I3[0]
|
|
.sym 30275 smi_ctrl_ins.o_smi_data_out_SB_DFFNE_Q_D_SB_LUT4_O_3_I3[1]
|
|
.sym 30276 smi_ctrl_ins.int_cnt_rx[3]
|
|
.sym 30277 smi_ctrl_ins.o_smi_data_out_SB_DFFNE_Q_D_SB_LUT4_O_3_I3[3]
|
|
.sym 30278 smi_ctrl_ins.o_smi_data_out_SB_DFFNE_Q_D_SB_LUT4_O_6_I3[0]
|
|
.sym 30279 smi_ctrl_ins.o_smi_data_out_SB_DFFNE_Q_D_SB_LUT4_O_6_I3[1]
|
|
.sym 30280 smi_ctrl_ins.int_cnt_rx[3]
|
|
.sym 30281 smi_ctrl_ins.o_smi_data_out_SB_DFFNE_Q_D_SB_LUT4_O_6_I3[3]
|
|
.sym 30286 smi_ctrl_ins.o_smi_data_out_SB_DFFNE_Q_D_SB_LUT4_O_I3[0]
|
|
.sym 30287 smi_ctrl_ins.o_smi_data_out_SB_DFFNE_Q_D_SB_LUT4_O_I3[1]
|
|
.sym 30288 smi_ctrl_ins.int_cnt_rx[3]
|
|
.sym 30289 smi_ctrl_ins.o_smi_data_out_SB_DFFNE_Q_D_SB_LUT4_O_I3[3]
|
|
.sym 30290 smi_ctrl_ins.o_smi_data_out_SB_DFFNE_Q_D_SB_LUT4_O_1_I3[0]
|
|
.sym 30291 smi_ctrl_ins.o_smi_data_out_SB_DFFNE_Q_D_SB_LUT4_O_1_I3[1]
|
|
.sym 30292 smi_ctrl_ins.int_cnt_rx[3]
|
|
.sym 30293 smi_ctrl_ins.o_smi_data_out_SB_DFFNE_Q_D_SB_LUT4_O_1_I3[3]
|
|
.sym 30294 smi_ctrl_ins.o_smi_data_out_SB_DFFNE_Q_D_SB_LUT4_O_7_I3[0]
|
|
.sym 30295 smi_ctrl_ins.o_smi_data_out_SB_DFFNE_Q_D_SB_LUT4_O_7_I3[1]
|
|
.sym 30296 smi_ctrl_ins.int_cnt_rx[3]
|
|
.sym 30297 smi_ctrl_ins.o_smi_data_out_SB_DFFNE_Q_D_SB_LUT4_O_7_I3[3]
|
|
.sym 30298 smi_ctrl_ins.o_smi_data_out_SB_DFFNE_Q_D_SB_LUT4_O_5_I3[0]
|
|
.sym 30299 smi_ctrl_ins.o_smi_data_out_SB_DFFNE_Q_D_SB_LUT4_O_5_I3[1]
|
|
.sym 30300 smi_ctrl_ins.int_cnt_rx[3]
|
|
.sym 30301 smi_ctrl_ins.o_smi_data_out_SB_DFFNE_Q_D_SB_LUT4_O_5_I3[3]
|
|
.sym 30302 smi_ctrl_ins.o_smi_data_out_SB_DFFNE_Q_D_SB_LUT4_O_2_I3[0]
|
|
.sym 30303 smi_ctrl_ins.o_smi_data_out_SB_DFFNE_Q_D_SB_LUT4_O_2_I3[1]
|
|
.sym 30304 smi_ctrl_ins.int_cnt_rx[3]
|
|
.sym 30305 smi_ctrl_ins.o_smi_data_out_SB_DFFNE_Q_D_SB_LUT4_O_2_I3[3]
|
|
.sym 30306 w_rx_fifo_pulled_data[4]
|
|
.sym 30320 rx_fifo.rd_addr[0]
|
|
.sym 30321 rx_fifo.wr_addr_gray_rd_r[0]
|
|
.sym 30322 w_rx_fifo_pulled_data[6]
|
|
.sym 30326 w_rx_fifo_pulled_data[1]
|
|
.sym 30330 w_rx_fifo_pulled_data[7]
|
|
.sym 30336 w_smi_data_input[7]
|
|
.sym 30337 smi_ctrl_ins.tx_reg_state[3]
|
|
.sym 30339 rx_fifo.rd_addr[0]
|
|
.sym 30344 rx_fifo.empty_o_SB_LUT4_I2_O[0]
|
|
.sym 30345 rx_fifo.rd_addr[0]
|
|
.sym 30348 rx_fifo.empty_o_SB_DFF_Q_D_SB_LUT4_O_I0_SB_LUT4_O_1_I1_SB_LUT4_O_1_I0[1]
|
|
.sym 30349 rx_fifo.rd_addr_gray_SB_LUT4_I2_I3[2]
|
|
.sym 30352 rx_fifo.empty_o_SB_DFF_Q_D_SB_LUT4_O_I0_SB_LUT4_O_1_I1_SB_LUT4_O_1_I0[3]
|
|
.sym 30353 rx_fifo.rd_addr_gray_SB_LUT4_I2_I3[3]
|
|
.sym 30356 rx_fifo.empty_o_SB_DFF_Q_D_SB_LUT4_O_I0_SB_LUT4_O_1_I1_SB_LUT4_O_2_I0[3]
|
|
.sym 30357 rx_fifo.rd_addr_gray_SB_LUT4_I2_I3[4]
|
|
.sym 30360 rx_fifo.empty_o_SB_DFF_Q_D_SB_LUT4_O_I0_SB_LUT4_O_1_I1_SB_LUT4_O_I3[1]
|
|
.sym 30361 rx_fifo.rd_addr_gray_SB_LUT4_I2_I3[5]
|
|
.sym 30364 rx_fifo.empty_o_SB_DFF_Q_D_SB_LUT4_O_I0_SB_LUT4_O_1_I1_SB_LUT4_O_I3[2]
|
|
.sym 30365 rx_fifo.rd_addr_gray_SB_LUT4_I2_I3[6]
|
|
.sym 30368 rx_fifo.rd_addr[7]
|
|
.sym 30369 rx_fifo.rd_addr_gray_SB_LUT4_I2_I3[7]
|
|
.sym 30372 rx_fifo.rd_addr[8]
|
|
.sym 30373 rx_fifo.rd_addr_gray_SB_LUT4_I2_I3[8]
|
|
.sym 30376 rx_fifo.rd_addr[9]
|
|
.sym 30377 rx_fifo.rd_addr_gray_SB_LUT4_I2_I3[9]
|
|
.sym 30380 rx_fifo.rd_addr_gray_SB_LUT4_I2_O[3]
|
|
.sym 30381 rx_fifo.rd_addr_gray_SB_LUT4_I2_O[4]
|
|
.sym 30388 rx_fifo.rd_addr_gray_SB_LUT4_I2_O[6]
|
|
.sym 30389 rx_fifo.rd_addr_gray_SB_LUT4_I2_O[7]
|
|
.sym 30390 w_rx_24_fifo_data[15]
|
|
.sym 30395 rx_fifo.rd_addr_gray_SB_DFFE_Q_7_D[1]
|
|
.sym 30396 rx_fifo.rd_addr_gray_SB_LUT4_I2_O[6]
|
|
.sym 30397 rx_fifo.rd_addr_gray_SB_LUT4_I2_O[7]
|
|
.sym 30398 w_rx_24_fifo_data[11]
|
|
.sym 30402 rx_fifo.wr_addr_gray_rd[7]
|
|
.sym 30406 rx_fifo.wr_addr_gray_rd[5]
|
|
.sym 30410 rx_fifo.rd_addr_gray_SB_DFFE_Q_5_D[0]
|
|
.sym 30411 rx_fifo.rd_addr_gray_SB_DFFE_Q_5_D[1]
|
|
.sym 30412 rx_fifo.rd_addr_gray_SB_DFFE_Q_5_D[2]
|
|
.sym 30413 rx_fifo.rd_addr_gray_SB_DFFE_Q_5_D[3]
|
|
.sym 30414 rx_fifo.wr_addr_gray[7]
|
|
.sym 30418 rx_fifo.empty_o_SB_DFF_Q_D_SB_LUT4_O_I0[0]
|
|
.sym 30419 rx_fifo.empty_o_SB_DFF_Q_D_SB_LUT4_O_I0[1]
|
|
.sym 30420 rx_fifo.empty_o_SB_DFF_Q_D_SB_LUT4_O_I0[2]
|
|
.sym 30421 rx_fifo.empty_o_SB_DFF_Q_D_SB_LUT4_O_I0[3]
|
|
.sym 30422 rx_fifo.empty_o_SB_DFF_Q_D_SB_LUT4_O_I0_SB_LUT4_O_1_I1_SB_LUT4_O_I3[0]
|
|
.sym 30423 rx_fifo.empty_o_SB_DFF_Q_D_SB_LUT4_O_I0_SB_LUT4_O_1_I1_SB_LUT4_O_I3[1]
|
|
.sym 30424 rx_fifo.empty_o_SB_DFF_Q_D_SB_LUT4_O_I0_SB_LUT4_O_1_I1_SB_LUT4_O_I3[2]
|
|
.sym 30425 rx_fifo.empty_o_SB_DFF_Q_D_SB_LUT4_O_I0_SB_LUT4_O_1_I1_SB_LUT4_O_I3[3]
|
|
.sym 30427 rx_fifo.rd_addr_gray_SB_DFFE_Q_5_D[1]
|
|
.sym 30428 rx_fifo.empty_o_SB_DFF_Q_D_SB_LUT4_O_I0_SB_LUT4_O_1_I1_SB_LUT4_O_2_I0[3]
|
|
.sym 30429 rx_fifo.empty_o_SB_DFF_Q_D_SB_LUT4_O_I0_SB_LUT4_O_1_I1_SB_LUT4_O_I3[1]
|
|
.sym 30430 rx_fifo.full_o_SB_DFF_Q_D_SB_LUT4_O_I0_SB_LUT4_O_I0_SB_LUT4_O_I0[0]
|
|
.sym 30431 rx_fifo.full_o_SB_DFF_Q_D_SB_LUT4_O_I0_SB_LUT4_O_I0_SB_LUT4_O_I0[1]
|
|
.sym 30432 rx_fifo.full_o_SB_DFF_Q_D_SB_LUT4_O_I0_SB_LUT4_O_I0_SB_LUT4_O_I0[2]
|
|
.sym 30433 rx_fifo.full_o_SB_DFF_Q_D_SB_LUT4_O_I0_SB_LUT4_O_2_I2[8]
|
|
.sym 30434 rx_fifo.empty_o_SB_LUT4_I2_I0[0]
|
|
.sym 30435 rx_fifo.empty_o_SB_LUT4_I2_I0[1]
|
|
.sym 30436 w_rx_fifo_empty
|
|
.sym 30437 rx_fifo.empty_o_SB_LUT4_I2_I0[3]
|
|
.sym 30438 rx_fifo.rd_addr_gray_SB_DFFE_Q_6_D[1]
|
|
.sym 30439 rx_fifo.rd_addr[9]
|
|
.sym 30440 rx_fifo.rd_addr_gray_SB_DFFE_Q_5_D_SB_LUT4_I0_O_SB_LUT4_O_I0[1]
|
|
.sym 30441 rx_fifo.rd_addr[8]
|
|
.sym 30444 rx_fifo.rd_addr_gray_SB_DFFE_Q_6_D_SB_LUT4_I0_O_SB_LUT4_O_I3[0]
|
|
.sym 30445 rx_fifo.empty_o_SB_LUT4_I2_O[0]
|
|
.sym 30447 rx_fifo.empty_o_SB_LUT4_I2_O[0]
|
|
.sym 30448 rx_fifo.empty_o_SB_LUT4_I2_O[1]
|
|
.sym 30449 rx_fifo.empty_o_SB_LUT4_I2_O[2]
|
|
.sym 30451 rx_fifo.rd_addr_gray_SB_DFFE_Q_5_D[3]
|
|
.sym 30452 rx_fifo.rd_addr[7]
|
|
.sym 30453 rx_fifo.rd_addr[8]
|
|
.sym 30461 spi_if_ins.r_tx_data_valid_SB_LUT4_I3_O
|
|
.sym 30462 w_smi_data_input[0]
|
|
.sym 30478 smi_ctrl_ins.r_fifo_push
|
|
.sym 30482 rx_fifo.empty_o_SB_DFF_Q_D_SB_LUT4_O_I0_SB_LUT4_O_1_I1_SB_LUT4_O_1_I0[0]
|
|
.sym 30483 rx_fifo.empty_o_SB_DFF_Q_D_SB_LUT4_O_I0_SB_LUT4_O_1_I1_SB_LUT4_O_1_I0[1]
|
|
.sym 30484 rx_fifo.empty_o_SB_DFF_Q_D_SB_LUT4_O_I0_SB_LUT4_O_1_I1_SB_LUT4_O_1_I0[2]
|
|
.sym 30485 rx_fifo.empty_o_SB_DFF_Q_D_SB_LUT4_O_I0_SB_LUT4_O_1_I1_SB_LUT4_O_1_I0[3]
|
|
.sym 30486 smi_ctrl_ins.w_fifo_push_trigger
|
|
.sym 30495 smi_ctrl_ins.r_fifo_push_1
|
|
.sym 30496 w_tx_fifo_full
|
|
.sym 30497 smi_ctrl_ins.r_fifo_push
|
|
.sym 30509 w_tx_fifo_pull
|
|
.sym 30513 spi_if_ins.spi.o_rx_data_valid_SB_LUT4_I3_O_SB_LUT4_I3_O[2]
|
|
.sym 30514 spi_if_ins.spi.r2_rx_done
|
|
.sym 30518 spi_if_ins.spi.r3_rx_done_SB_LUT4_I2_O
|
|
.sym 30528 spi_if_ins.spi.r3_rx_done
|
|
.sym 30529 spi_if_ins.spi.r2_rx_done
|
|
.sym 30537 w_tx_fifo_empty
|
|
.sym 30562 spi_if_ins.state_if_SB_DFFESR_Q_2_D[0]
|
|
.sym 30573 spi_if_ins.o_fetch_cmd_SB_DFFESR_Q_E_SB_LUT4_O_I1[2]
|
|
.sym 30576 spi_if_ins.o_fetch_cmd_SB_DFFESR_Q_E_SB_LUT4_O_I1[0]
|
|
.sym 30577 spi_if_ins.o_fetch_cmd_SB_DFFESR_Q_E_SB_LUT4_O_I1[2]
|
|
.sym 30584 i_rst_b$SB_IO_IN
|
|
.sym 30585 spi_if_ins.o_fetch_cmd_SB_DFFESR_Q_E_SB_LUT4_O_I1[2]
|
|
.sym 30588 spi_if_ins.state_if_SB_DFFESR_Q_2_D[0]
|
|
.sym 30589 spi_if_ins.state_if_SB_DFFESR_Q_2_D[1]
|
|
.sym 30594 spi_if_ins.state_if[2]
|
|
.sym 30595 spi_if_ins.spi.o_rx_data_valid_SB_LUT4_I3_O[1]
|
|
.sym 30596 spi_if_ins.state_if[0]
|
|
.sym 30597 spi_if_ins.state_if[1]
|
|
.sym 30600 tx_fifo.wr_addr_gray_SB_LUT4_I2_O[3]
|
|
.sym 30601 tx_fifo.wr_addr_gray_SB_DFFE_Q_4_D_SB_LUT4_I2_O_SB_LUT4_O_I3[1]
|
|
.sym 30604 tx_fifo.wr_addr_gray_SB_LUT4_I2_O[2]
|
|
.sym 30605 tx_fifo.wr_addr_gray_SB_LUT4_I2_O[3]
|
|
.sym 30608 tx_fifo.wr_addr_gray_SB_LUT4_I2_O[1]
|
|
.sym 30609 tx_fifo.wr_addr_gray_SB_LUT4_I2_O[2]
|
|
.sym 30611 tx_fifo.rd_addr_gray_SB_DFFE_Q_8_D[2]
|
|
.sym 30612 tx_fifo.empty_o_SB_LUT4_I3_O_SB_LUT4_O_I0[3]
|
|
.sym 30613 tx_fifo.empty_o_SB_LUT4_I3_O_SB_LUT4_O_1_I0[2]
|
|
.sym 30615 i_rst_b$SB_IO_IN
|
|
.sym 30616 w_cs[1]
|
|
.sym 30617 w_fetch
|
|
.sym 30620 spi_if_ins.state_if_SB_DFFESR_Q_2_D[0]
|
|
.sym 30621 spi_if_ins.state_if[2]
|
|
.sym 30624 tx_fifo.wr_addr_gray_SB_LUT4_I2_O[7]
|
|
.sym 30625 tx_fifo.wr_addr_gray_SB_LUT4_I2_O[8]
|
|
.sym 30632 io_ctrl_ins.o_data_out_SB_DFFESR_Q_6_R_SB_LUT4_O_I0_SB_LUT4_I2_O[2]
|
|
.sym 30633 spi_if_ins.o_load_cmd_SB_LUT4_I3_O[1]
|
|
.sym 30634 io_ctrl_ins.o_data_out_SB_DFFESR_Q_6_R[0]
|
|
.sym 30635 io_ctrl_ins.led1_state_SB_LUT4_I0_I2[1]
|
|
.sym 30636 w_cs[0]
|
|
.sym 30637 w_fetch
|
|
.sym 30639 tx_fifo.rd_addr_gray_wr_r[8]
|
|
.sym 30640 tx_fifo.wr_addr_gray_SB_LUT4_I2_O[9]
|
|
.sym 30641 tx_fifo.wr_addr_gray_SB_LUT4_I2_O[8]
|
|
.sym 30642 spi_if_ins.r_tx_data_valid_SB_DFFESR_Q_D[1]
|
|
.sym 30643 spi_if_ins.state_if_SB_DFFESR_Q_D[1]
|
|
.sym 30644 spi_if_ins.state_if_SB_DFFESR_Q_D[2]
|
|
.sym 30645 i_rst_b$SB_IO_IN
|
|
.sym 30650 smi_ctrl_ins.o_channel
|
|
.sym 30656 spi_if_ins.state_if[0]
|
|
.sym 30657 spi_if_ins.state_if[1]
|
|
.sym 30658 w_rx_data[1]
|
|
.sym 30662 w_rx_data[5]
|
|
.sym 30666 w_rx_data[3]
|
|
.sym 30670 w_rx_data[0]
|
|
.sym 30681 io_ctrl_ins.o_data_out_SB_DFFESR_Q_6_R_SB_LUT4_O_I1_SB_LUT4_I2_O[1]
|
|
.sym 30682 w_fetch
|
|
.sym 30683 w_cs[2]
|
|
.sym 30684 i_rst_b$SB_IO_IN
|
|
.sym 30685 w_load
|
|
.sym 30686 w_rx_data[2]
|
|
.sym 30690 io_ctrl_ins.o_data_out_SB_DFFESR_Q_6_R_SB_LUT4_O_I0_SB_LUT4_I2_O[2]
|
|
.sym 30691 io_ctrl_ins.o_pmod[1]
|
|
.sym 30692 spi_if_ins.o_load_cmd_SB_LUT4_I3_1_I0[2]
|
|
.sym 30693 io_ctrl_ins.debug_mode[1]
|
|
.sym 30694 w_rx_data[4]
|
|
.sym 30698 io_ctrl_ins.o_data_out_SB_DFFESR_Q_6_R_SB_LUT4_O_I0_SB_LUT4_I2_O[2]
|
|
.sym 30699 io_ctrl_ins.o_pmod[0]
|
|
.sym 30700 spi_if_ins.o_load_cmd_SB_LUT4_I3_1_I0[2]
|
|
.sym 30701 io_ctrl_ins.debug_mode[0]
|
|
.sym 30702 io_ctrl_ins.o_data_out_SB_DFFESR_Q_6_R_SB_LUT4_O_I0_SB_LUT4_I2_O[1]
|
|
.sym 30703 o_shdn_tx_lna$SB_IO_OUT
|
|
.sym 30704 spi_if_ins.o_load_cmd_SB_LUT4_I3_1_I0[2]
|
|
.sym 30705 io_ctrl_ins.rf_mode[0]
|
|
.sym 30706 w_fetch
|
|
.sym 30707 w_cs[1]
|
|
.sym 30708 io_ctrl_ins.led1_state_SB_LUT4_I0_I2[1]
|
|
.sym 30709 w_load
|
|
.sym 30710 w_rx_data[2]
|
|
.sym 30714 w_fetch
|
|
.sym 30715 w_cs[1]
|
|
.sym 30716 i_rst_b$SB_IO_IN
|
|
.sym 30717 w_load
|
|
.sym 30718 io_ctrl_ins.o_data_out_SB_DFFESR_Q_6_R_SB_LUT4_O_I0_SB_LUT4_I2_O[2]
|
|
.sym 30719 io_ctrl_ins.o_pmod[3]
|
|
.sym 30720 spi_if_ins.o_load_cmd_SB_LUT4_I3_1_I0[2]
|
|
.sym 30721 io_ctrl_ins.rf_mode[1]
|
|
.sym 30724 io_ctrl_ins.o_data_out_SB_DFFESR_Q_6_R_SB_LUT4_O_I0_SB_LUT4_I2_O[1]
|
|
.sym 30725 spi_if_ins.o_load_cmd_SB_LUT4_I3_O[1]
|
|
.sym 30728 io_ctrl_ins.led1_state_SB_LUT4_I0_I2[1]
|
|
.sym 30729 smi_ctrl_ins.r_channel_SB_DFFE_Q_E_SB_LUT4_O_I3[1]
|
|
.sym 30730 w_rx_data[2]
|
|
.sym 30734 w_rx_data[1]
|
|
.sym 30740 io_ctrl_ins.debug_mode[0]
|
|
.sym 30741 io_ctrl_ins.debug_mode[1]
|
|
.sym 30742 w_rx_data[3]
|
|
.sym 30746 w_rx_data[0]
|
|
.sym 30754 w_rx_24_fifo_data[28]
|
|
.sym 30758 w_rx_24_fifo_data[8]
|
|
.sym 30766 w_rx_24_fifo_data[29]
|
|
.sym 30779 w_rx_09_fifo_data[10]
|
|
.sym 30780 w_rx_24_fifo_data[10]
|
|
.sym 30781 o_led1$SB_IO_OUT
|
|
.sym 30785 w_smi_data_output[4]
|
|
.sym 30794 smi_ctrl_ins.r_fifo_pulled_data[13]
|
|
.sym 30795 smi_ctrl_ins.r_fifo_pulled_data[29]
|
|
.sym 30796 smi_ctrl_ins.int_cnt_rx[3]
|
|
.sym 30797 smi_ctrl_ins.int_cnt_rx[4]
|
|
.sym 30804 smi_ctrl_ins.int_cnt_rx[3]
|
|
.sym 30805 smi_ctrl_ins.int_cnt_rx[4]
|
|
.sym 30813 smi_ctrl_ins.int_cnt_rx[3]
|
|
.sym 30819 smi_ctrl_ins.int_cnt_rx[3]
|
|
.sym 30820 smi_ctrl_ins.int_cnt_rx[4]
|
|
.sym 30821 i_rst_b$SB_IO_IN
|
|
.sym 30825 r_counter
|
|
.sym 30826 smi_ctrl_ins.r_fifo_pulled_data[15]
|
|
.sym 30827 smi_ctrl_ins.r_fifo_pulled_data[31]
|
|
.sym 30828 smi_ctrl_ins.int_cnt_rx[3]
|
|
.sym 30829 smi_ctrl_ins.int_cnt_rx[4]
|
|
.sym 30833 smi_ctrl_ins.o_smi_data_out_SB_DFFNE_Q_D_SB_LUT4_O_5_I3[1]
|
|
.sym 30834 smi_ctrl_ins.r_fifo_pulled_data[12]
|
|
.sym 30835 smi_ctrl_ins.r_fifo_pulled_data[28]
|
|
.sym 30836 smi_ctrl_ins.int_cnt_rx[3]
|
|
.sym 30837 smi_ctrl_ins.int_cnt_rx[4]
|
|
.sym 30841 smi_ctrl_ins.o_smi_data_out_SB_DFFNE_Q_D_SB_LUT4_O_7_I3[1]
|
|
.sym 30842 smi_ctrl_ins.r_fifo_pulled_data[14]
|
|
.sym 30843 smi_ctrl_ins.r_fifo_pulled_data[30]
|
|
.sym 30844 smi_ctrl_ins.int_cnt_rx[3]
|
|
.sym 30845 smi_ctrl_ins.int_cnt_rx[4]
|
|
.sym 30855 w_smi_data_input[7]
|
|
.sym 30856 smi_ctrl_ins.tx_reg_state[2]
|
|
.sym 30857 i_rst_b$SB_IO_IN
|
|
.sym 30859 i_rst_b$SB_IO_IN
|
|
.sym 30860 smi_ctrl_ins.tx_reg_state[0]
|
|
.sym 30861 w_smi_data_input[7]
|
|
.sym 30862 smi_ctrl_ins.tx_reg_state_SB_DFFN_Q_3_D_SB_LUT4_O_I0[0]
|
|
.sym 30863 smi_ctrl_ins.r_fifo_pushed_data_SB_DFFNESR_Q_E[0]
|
|
.sym 30864 w_smi_data_input[7]
|
|
.sym 30865 i_rst_b$SB_IO_IN
|
|
.sym 30867 w_smi_data_input[7]
|
|
.sym 30868 i_rst_b$SB_IO_IN
|
|
.sym 30869 smi_ctrl_ins.tx_reg_state[1]
|
|
.sym 30875 smi_ctrl_ins.tx_reg_state[1]
|
|
.sym 30876 smi_ctrl_ins.tx_reg_state[2]
|
|
.sym 30877 smi_ctrl_ins.tx_reg_state[3]
|
|
.sym 30879 w_smi_data_input[7]
|
|
.sym 30880 i_rst_b$SB_IO_IN
|
|
.sym 30881 smi_ctrl_ins.tx_reg_state[2]
|
|
.sym 30884 rx_fifo.rd_addr_gray_SB_LUT4_I2_O[7]
|
|
.sym 30885 rx_fifo.rd_addr_gray_SB_LUT4_I2_O[8]
|
|
.sym 30886 w_rx_24_fifo_data[10]
|
|
.sym 30890 w_rx_24_fifo_data[19]
|
|
.sym 30895 rx_fifo.empty_o_SB_DFF_Q_D_SB_LUT4_O_I0_SB_LUT4_O_1_I1_SB_LUT4_O_I3[0]
|
|
.sym 30896 rx_fifo.rd_addr_gray_SB_LUT4_I2_O[5]
|
|
.sym 30897 rx_fifo.rd_addr_gray_SB_LUT4_I2_O[6]
|
|
.sym 30898 w_rx_24_fifo_data[17]
|
|
.sym 30902 w_rx_24_fifo_data[21]
|
|
.sym 30908 smi_ctrl_ins.tx_reg_state[0]
|
|
.sym 30909 smi_ctrl_ins.tx_reg_state[3]
|
|
.sym 30910 w_rx_24_fifo_data[14]
|
|
.sym 30916 rx_fifo.rd_addr_gray_SB_DFFE_Q_6_D_SB_LUT4_I0_O_SB_LUT4_O_I3[2]
|
|
.sym 30917 rx_fifo.rd_addr_gray_SB_LUT4_I2_O[3]
|
|
.sym 30918 w_rx_24_fifo_data[13]
|
|
.sym 30922 w_rx_24_fifo_data[12]
|
|
.sym 30928 i_rst_b$SB_IO_IN
|
|
.sym 30929 i_smi_swe_srw$SB_IO_IN
|
|
.sym 30931 w_rx_09_fifo_data[13]
|
|
.sym 30932 w_rx_24_fifo_data[13]
|
|
.sym 30933 o_led1$SB_IO_OUT
|
|
.sym 30937 rx_fifo.rd_addr_gray_SB_DFFE_Q_6_D[3]
|
|
.sym 30938 rx_fifo.rd_addr_gray_SB_DFFE_Q_7_D[0]
|
|
.sym 30939 rx_fifo.rd_addr_gray_SB_DFFE_Q_7_D[1]
|
|
.sym 30940 rx_fifo.empty_o_SB_DFF_Q_D_SB_LUT4_O_I0_SB_LUT4_O_1_I1_SB_LUT4_O_1_I0[2]
|
|
.sym 30941 rx_fifo.rd_addr_gray_SB_DFFE_Q_7_D[3]
|
|
.sym 30944 rx_fifo.rd_addr_gray_SB_DFFE_Q_5_D_SB_LUT4_I0_O_SB_LUT4_O_I0[2]
|
|
.sym 30945 rx_fifo.rd_addr_gray_SB_LUT4_I2_O[8]
|
|
.sym 30953 w_smi_data_input[7]
|
|
.sym 30954 rx_fifo.empty_o_SB_LUT4_I2_O[1]
|
|
.sym 30955 rx_fifo.rd_addr_gray_SB_DFFE_Q_5_D_SB_LUT4_I0_O[1]
|
|
.sym 30956 rx_fifo.rd_addr_gray_SB_DFFE_Q_5_D_SB_LUT4_I0_O[2]
|
|
.sym 30957 rx_fifo.rd_addr_gray_SB_DFFE_Q_5_D_SB_LUT4_I0_O[3]
|
|
.sym 30964 smi_ctrl_ins.r_fifo_pushed_data_SB_DFFNESR_Q_E[0]
|
|
.sym 30965 i_rst_b$SB_IO_IN
|
|
.sym 30971 rx_fifo.empty_o_SB_DFF_Q_D_SB_LUT4_O_I0_SB_LUT4_O_1_I1_SB_LUT4_O_2_I0[3]
|
|
.sym 30972 rx_fifo.empty_o_SB_DFF_Q_D_SB_LUT4_O_I0_SB_LUT4_O_1_I1_SB_LUT4_O_I3[1]
|
|
.sym 30973 rx_fifo.rd_addr_gray_SB_DFFE_Q_5_D[1]
|
|
.sym 30975 rx_fifo.rd_addr_gray_SB_DFFE_Q_6_D_SB_LUT4_I0_O[0]
|
|
.sym 30976 rx_fifo.rd_addr_gray_SB_DFFE_Q_6_D_SB_LUT4_I0_O[1]
|
|
.sym 30977 rx_fifo.rd_addr_gray_SB_DFFE_Q_6_D_SB_LUT4_I0_O[2]
|
|
.sym 30980 spi_if_ins.w_rx_data[5]
|
|
.sym 30981 spi_if_ins.w_rx_data[6]
|
|
.sym 30988 spi_if_ins.w_rx_data[5]
|
|
.sym 30989 spi_if_ins.w_rx_data[6]
|
|
.sym 30992 spi_if_ins.w_rx_data[6]
|
|
.sym 30993 spi_if_ins.w_rx_data[5]
|
|
.sym 31011 spi_if_ins.spi.r_rx_bit_count[0]
|
|
.sym 31016 spi_if_ins.spi.r_rx_bit_count[1]
|
|
.sym 31020 spi_if_ins.spi.r_rx_bit_count[2]
|
|
.sym 31021 spi_if_ins.spi.r_rx_bit_count_SB_DFFSR_Q_D_SB_LUT4_O_I3[2]
|
|
.sym 31029 spi_if_ins.spi.r_rx_bit_count[0]
|
|
.sym 31037 rx_fifo.empty_o_SB_DFF_Q_D_SB_LUT4_O_I0_SB_LUT4_O_1_I1[0]
|
|
.sym 31040 spi_if_ins.spi.r_rx_bit_count[1]
|
|
.sym 31041 spi_if_ins.spi.r_rx_bit_count[0]
|
|
.sym 31042 spi_if_ins.r_tx_byte[5]
|
|
.sym 31053 spi_if_ins.spi.r_tx_byte_SB_DFFESR_Q_E
|
|
.sym 31054 spi_if_ins.r_tx_byte[1]
|
|
.sym 31058 spi_if_ins.r_tx_byte[3]
|
|
.sym 31062 spi_if_ins.r_tx_byte[4]
|
|
.sym 31067 spi_if_ins.state_if_SB_DFFESR_Q_D[1]
|
|
.sym 31068 i_rst_b$SB_IO_IN
|
|
.sym 31069 spi_if_ins.spi.o_rx_data_valid_SB_LUT4_I3_O_SB_LUT4_I3_O[2]
|
|
.sym 31071 spi_if_ins.spi.SCKr_SB_LUT4_I0_O[0]
|
|
.sym 31072 spi_if_ins.spi.SCKr_SB_LUT4_I0_O[1]
|
|
.sym 31073 spi_if_ins.r_tx_data_valid_SB_LUT4_I3_O
|
|
.sym 31074 spi_if_ins.spi.r_temp_rx_byte[3]
|
|
.sym 31078 spi_if_ins.spi.o_spi_miso_SB_DFFE_Q_D_SB_LUT4_O_I2_SB_LUT4_O_I0_SB_LUT4_O_2_I0[0]
|
|
.sym 31079 spi_if_ins.spi.o_spi_miso_SB_DFFE_Q_D_SB_LUT4_O_I2_SB_LUT4_O_I0_SB_LUT4_O_2_I0[1]
|
|
.sym 31080 spi_if_ins.spi.SCKr_SB_LUT4_I0_O[0]
|
|
.sym 31081 spi_if_ins.spi.o_spi_miso_SB_DFFE_Q_D_SB_LUT4_O_I2_SB_LUT4_O_I0_SB_LUT4_O_2_I0[3]
|
|
.sym 31091 spi_if_ins.spi.r_tx_byte[1]
|
|
.sym 31092 spi_if_ins.spi.r_tx_byte[5]
|
|
.sym 31093 spi_if_ins.spi.r_tx_bit_count[2]
|
|
.sym 31111 spi_if_ins.spi.r_tx_byte[0]
|
|
.sym 31112 spi_if_ins.spi.r_tx_byte[4]
|
|
.sym 31113 spi_if_ins.spi.r_tx_bit_count[2]
|
|
.sym 31114 spi_if_ins.spi.r_rx_byte[4]
|
|
.sym 31120 spi_if_ins.w_rx_data[5]
|
|
.sym 31121 spi_if_ins.w_rx_data[6]
|
|
.sym 31124 spi_if_ins.state_if_SB_DFFESR_Q_D[2]
|
|
.sym 31125 spi_if_ins.state_if_SB_DFFESR_Q_E_SB_LUT4_O_I2[1]
|
|
.sym 31138 spi_if_ins.o_load_cmd_SB_LUT4_I3_1_I0[2]
|
|
.sym 31139 w_fetch
|
|
.sym 31140 w_cs[1]
|
|
.sym 31141 w_load
|
|
.sym 31143 spi_if_ins.o_fetch_cmd_SB_DFFESR_Q_E_SB_LUT4_O_I1[0]
|
|
.sym 31144 spi_if_ins.w_rx_data[7]
|
|
.sym 31145 spi_if_ins.state_if_SB_DFFESR_Q_2_D[1]
|
|
.sym 31147 io_ctrl_ins.o_data_out_SB_DFFESR_Q_6_R[0]
|
|
.sym 31148 io_ctrl_ins.o_data_out_SB_DFFESR_Q_6_R[1]
|
|
.sym 31149 io_ctrl_ins.o_data_out_SB_DFFESR_Q_6_R[2]
|
|
.sym 31151 spi_if_ins.o_fetch_cmd_SB_DFFESR_Q_E_SB_LUT4_O_I1[0]
|
|
.sym 31152 spi_if_ins.r_tx_data_valid_SB_DFFESR_Q_D[1]
|
|
.sym 31153 i_rst_b$SB_IO_IN
|
|
.sym 31156 tx_fifo.full_o_SB_DFF_Q_D_SB_LUT4_O_I0_SB_LUT4_O_I0_SB_LUT4_O_1_I3[0]
|
|
.sym 31157 tx_fifo.wr_addr_gray_SB_DFFE_Q_3_D[1]
|
|
.sym 31158 spi_if_ins.o_fetch_cmd_SB_DFFESR_Q_E_SB_LUT4_O_I1[0]
|
|
.sym 31159 spi_if_ins.o_fetch_cmd_SB_DFFESR_Q_E_SB_LUT4_O_I1[1]
|
|
.sym 31160 spi_if_ins.o_fetch_cmd_SB_DFFESR_Q_E_SB_LUT4_O_I1[2]
|
|
.sym 31161 i_rst_b$SB_IO_IN
|
|
.sym 31162 io_ctrl_ins.o_data_out_SB_DFFESR_Q_6_R[0]
|
|
.sym 31163 i_rst_b$SB_IO_IN
|
|
.sym 31164 w_cs[2]
|
|
.sym 31165 w_fetch
|
|
.sym 31166 spi_if_ins.spi.r_tx_byte[2]
|
|
.sym 31167 spi_if_ins.spi.r_tx_byte[6]
|
|
.sym 31168 spi_if_ins.spi.o_spi_miso_SB_DFFE_Q_D_SB_LUT4_O_I2_SB_LUT4_O_I0_SB_LUT4_O_2_I0[3]
|
|
.sym 31169 spi_if_ins.spi.r_tx_bit_count[2]
|
|
.sym 31173 w_rx_data[5]
|
|
.sym 31174 w_ioc[0]
|
|
.sym 31175 io_ctrl_ins.o_data_out_SB_DFFESR_Q_6_R[0]
|
|
.sym 31176 spi_if_ins.o_fetch_cmd_SB_LUT4_I3_O[2]
|
|
.sym 31177 io_ctrl_ins.o_data_out_SB_DFFESR_Q_6_R[2]
|
|
.sym 31180 io_ctrl_ins.o_data_out_SB_DFFESR_Q_6_D_SB_LUT4_O_I2[0]
|
|
.sym 31181 io_ctrl_ins.o_data_out_SB_DFFESR_Q_6_D_SB_LUT4_O_I2[1]
|
|
.sym 31183 spi_if_ins.w_rx_data[7]
|
|
.sym 31184 spi_if_ins.state_if[2]
|
|
.sym 31185 spi_if_ins.state_if_SB_DFFESR_Q_2_D[0]
|
|
.sym 31186 io_ctrl_ins.o_data_out_SB_DFFESR_Q_6_R_SB_LUT4_O_I0[2]
|
|
.sym 31187 io_ctrl_ins.o_data_out_SB_DFFESR_Q_6_R_SB_LUT4_O_I1[1]
|
|
.sym 31188 w_ioc[3]
|
|
.sym 31189 w_ioc[2]
|
|
.sym 31192 w_ioc[4]
|
|
.sym 31193 w_ioc[0]
|
|
.sym 31194 w_ioc[0]
|
|
.sym 31195 w_ioc[3]
|
|
.sym 31196 io_ctrl_ins.o_data_out_SB_DFFESR_Q_6_R_SB_LUT4_O_I0[2]
|
|
.sym 31197 w_ioc[2]
|
|
.sym 31200 w_ioc[1]
|
|
.sym 31201 w_ioc[4]
|
|
.sym 31202 w_ioc[3]
|
|
.sym 31203 w_ioc[2]
|
|
.sym 31204 w_ioc[0]
|
|
.sym 31205 io_ctrl_ins.o_data_out_SB_DFFESR_Q_6_R_SB_LUT4_O_I0[2]
|
|
.sym 31206 w_ioc[0]
|
|
.sym 31207 w_ioc[4]
|
|
.sym 31208 io_ctrl_ins.o_data_out_SB_DFFESR_Q_6_R_SB_LUT4_O_I1[0]
|
|
.sym 31209 w_ioc[1]
|
|
.sym 31212 io_ctrl_ins.o_data_out_SB_DFFESR_Q_6_R[0]
|
|
.sym 31213 w_ioc[0]
|
|
.sym 31214 w_rx_data[6]
|
|
.sym 31218 w_rx_data[4]
|
|
.sym 31223 io_ctrl_ins.o_data_out_SB_DFFESR_Q_6_R[0]
|
|
.sym 31224 spi_if_ins.o_fetch_cmd_SB_LUT4_I3_O[2]
|
|
.sym 31225 io_ctrl_ins.o_data_out_SB_DFFESR_Q_6_R[2]
|
|
.sym 31226 w_ioc[4]
|
|
.sym 31227 w_ioc[3]
|
|
.sym 31228 w_ioc[2]
|
|
.sym 31229 w_ioc[1]
|
|
.sym 31231 io_ctrl_ins.o_data_out_SB_DFFESR_Q_6_R_SB_LUT4_O_I1[0]
|
|
.sym 31232 io_ctrl_ins.o_data_out_SB_DFFESR_Q_6_R_SB_LUT4_O_I1[1]
|
|
.sym 31233 w_ioc[1]
|
|
.sym 31238 w_rx_data[3]
|
|
.sym 31242 io_ctrl_ins.mixer_en_state
|
|
.sym 31243 io_ctrl_ins.o_data_out_SB_DFFESR_Q_6_R_SB_LUT4_O_I0_SB_LUT4_I2_O[1]
|
|
.sym 31244 io_ctrl_ins.o_data_out_SB_DFFESR_Q_6_R_SB_LUT4_O_I1_SB_LUT4_I2_O[1]
|
|
.sym 31245 io_ctrl_ins.pmod_dir_state[0]
|
|
.sym 31246 w_rx_data[5]
|
|
.sym 31252 io_ctrl_ins.rf_mode[0]
|
|
.sym 31253 io_ctrl_ins.rf_mode[2]
|
|
.sym 31256 io_ctrl_ins.o_data_out_SB_DFFESR_Q_6_R_SB_LUT4_O_I1_SB_LUT4_I2_O[1]
|
|
.sym 31257 spi_if_ins.o_load_cmd_SB_LUT4_I3_O[1]
|
|
.sym 31258 w_rx_data[0]
|
|
.sym 31262 io_ctrl_ins.rx_h_state_SB_DFFE_Q_D_SB_LUT4_O_I2[2]
|
|
.sym 31263 io_ctrl_ins.rf_mode[0]
|
|
.sym 31264 io_ctrl_ins.rf_mode[2]
|
|
.sym 31265 io_ctrl_ins.rf_mode[1]
|
|
.sym 31266 w_rx_09_fifo_data[26]
|
|
.sym 31274 w_rx_09_fifo_data[28]
|
|
.sym 31279 w_rx_09_fifo_data[28]
|
|
.sym 31280 w_rx_24_fifo_data[28]
|
|
.sym 31281 o_led1$SB_IO_OUT
|
|
.sym 31287 w_rx_09_fifo_data[30]
|
|
.sym 31288 w_rx_24_fifo_data[30]
|
|
.sym 31289 o_led1$SB_IO_OUT
|
|
.sym 31294 w_rx_09_fifo_data[10]
|
|
.sym 31298 w_rx_fifo_pulled_data[15]
|
|
.sym 31309 smi_ctrl_ins.r_fifo_pulled_data_SB_DFFNESR_Q_E
|
|
.sym 31311 w_rx_09_fifo_data[19]
|
|
.sym 31312 w_rx_24_fifo_data[19]
|
|
.sym 31313 o_led1$SB_IO_OUT
|
|
.sym 31314 w_rx_fifo_pulled_data[25]
|
|
.sym 31318 w_rx_fifo_pulled_data[17]
|
|
.sym 31322 w_rx_fifo_pulled_data[29]
|
|
.sym 31326 w_rx_fifo_pulled_data[11]
|
|
.sym 31330 w_rx_fifo_pulled_data[30]
|
|
.sym 31338 w_rx_fifo_pulled_data[2]
|
|
.sym 31342 w_rx_fifo_pulled_data[3]
|
|
.sym 31346 w_rx_fifo_pulled_data[13]
|
|
.sym 31350 w_rx_fifo_pulled_data[14]
|
|
.sym 31354 w_rx_fifo_pulled_data[28]
|
|
.sym 31362 w_rx_fifo_pulled_data[19]
|
|
.sym 31370 w_rx_fifo_pulled_data[12]
|
|
.sym 31374 w_rx_fifo_pulled_data[26]
|
|
.sym 31378 w_rx_fifo_pulled_data[18]
|
|
.sym 31382 w_rx_fifo_pulled_data[31]
|
|
.sym 31386 w_rx_fifo_pulled_data[16]
|
|
.sym 31390 w_rx_fifo_pulled_data[24]
|
|
.sym 31395 w_rx_09_fifo_data[17]
|
|
.sym 31396 w_rx_24_fifo_data[17]
|
|
.sym 31397 o_led1$SB_IO_OUT
|
|
.sym 31398 w_rx_09_fifo_data[17]
|
|
.sym 31402 w_rx_09_fifo_data[15]
|
|
.sym 31407 w_rx_09_fifo_data[12]
|
|
.sym 31408 w_rx_24_fifo_data[12]
|
|
.sym 31409 o_led1$SB_IO_OUT
|
|
.sym 31410 w_rx_09_fifo_data[12]
|
|
.sym 31414 w_rx_09_fifo_data[19]
|
|
.sym 31418 w_rx_09_fifo_data[13]
|
|
.sym 31422 w_rx_09_fifo_data[14]
|
|
.sym 31427 w_rx_09_fifo_data[21]
|
|
.sym 31428 w_rx_24_fifo_data[21]
|
|
.sym 31429 o_led1$SB_IO_OUT
|
|
.sym 31430 w_rx_fifo_pulled_data[23]
|
|
.sym 31434 w_rx_fifo_pulled_data[21]
|
|
.sym 31439 w_rx_09_fifo_data[14]
|
|
.sym 31440 w_rx_24_fifo_data[14]
|
|
.sym 31441 o_led1$SB_IO_OUT
|
|
.sym 31447 w_rx_09_fifo_data[15]
|
|
.sym 31448 w_rx_24_fifo_data[15]
|
|
.sym 31449 o_led1$SB_IO_OUT
|
|
.sym 31450 w_rx_fifo_pulled_data[20]
|
|
.sym 31454 w_rx_fifo_pulled_data[22]
|
|
.sym 31462 rx_fifo.wr_addr_gray[4]
|
|
.sym 31470 rx_fifo.rd_addr_gray_SB_DFFE_Q_6_D[0]
|
|
.sym 31471 rx_fifo.rd_addr_gray_SB_DFFE_Q_6_D[1]
|
|
.sym 31472 rx_fifo.empty_o_SB_DFF_Q_D_SB_LUT4_O_I0_SB_LUT4_O_1_I1_SB_LUT4_O_2_I0[1]
|
|
.sym 31473 rx_fifo.rd_addr_gray_SB_DFFE_Q_6_D[3]
|
|
.sym 31474 rx_fifo.wr_addr_gray_rd[4]
|
|
.sym 31481 $PACKER_VCC_NET
|
|
.sym 31486 rx_fifo.rd_addr_gray_SB_DFFE_Q_6_D_SB_LUT4_I0_O_SB_LUT4_O_I3[0]
|
|
.sym 31487 rx_fifo.rd_addr_gray_SB_DFFE_Q_5_D_SB_LUT4_I0_O[1]
|
|
.sym 31488 rx_fifo.rd_addr_gray_SB_DFFE_Q_6_D_SB_LUT4_I0_O_SB_LUT4_O_I3[2]
|
|
.sym 31489 rx_fifo.rd_addr_gray_SB_DFFE_Q_6_D_SB_LUT4_I0_O_SB_LUT4_O_I3[3]
|
|
.sym 31491 spi_if_ins.spi.o_spi_miso_SB_DFFE_Q_D_SB_LUT4_O_I2_SB_LUT4_O_I0_SB_LUT4_O_2_I0[3]
|
|
.sym 31495 spi_if_ins.spi.SCKr_SB_LUT4_I0_O[0]
|
|
.sym 31496 $PACKER_VCC_NET
|
|
.sym 31499 spi_if_ins.spi.r_tx_bit_count[2]
|
|
.sym 31500 $PACKER_VCC_NET
|
|
.sym 31501 spi_if_ins.spi.r_tx_bit_count_SB_DFFESR_Q_D_SB_LUT4_O_I3[2]
|
|
.sym 31505 spi_if_ins.spi.o_spi_miso_SB_DFFE_Q_D_SB_LUT4_O_I2_SB_LUT4_O_I0_SB_LUT4_O_2_I0[3]
|
|
.sym 31506 i_ss$SB_IO_IN
|
|
.sym 31507 spi_if_ins.spi.r_rx_bit_count[0]
|
|
.sym 31508 spi_if_ins.spi.r_rx_bit_count[2]
|
|
.sym 31509 spi_if_ins.spi.r_rx_bit_count[1]
|
|
.sym 31511 spi_if_ins.spi.SCKr[2]
|
|
.sym 31512 spi_if_ins.spi.SCKr[1]
|
|
.sym 31513 spi_if_ins.r_tx_data_valid_SB_LUT4_I3_O
|
|
.sym 31515 spi_if_ins.spi.r_rx_bit_count[0]
|
|
.sym 31516 spi_if_ins.spi.r_rx_bit_count[2]
|
|
.sym 31517 spi_if_ins.spi.r_rx_bit_count[1]
|
|
.sym 31519 spi_if_ins.spi.SCKr_SB_LUT4_I0_O[0]
|
|
.sym 31520 $PACKER_VCC_NET
|
|
.sym 31521 spi_if_ins.spi.o_spi_miso_SB_DFFE_Q_D_SB_LUT4_O_I2_SB_LUT4_O_I0_SB_LUT4_O_2_I0[3]
|
|
.sym 31522 i_sck$SB_IO_IN
|
|
.sym 31526 w_cs[3]
|
|
.sym 31527 w_cs[1]
|
|
.sym 31528 w_cs[0]
|
|
.sym 31529 w_cs[2]
|
|
.sym 31531 rx_fifo.empty_o_SB_DFF_Q_D_SB_LUT4_O_I0_SB_LUT4_O_1_I1[0]
|
|
.sym 31532 rx_fifo.empty_o_SB_DFF_Q_D_SB_LUT4_O_I0_SB_LUT4_O_1_I1[1]
|
|
.sym 31533 rx_fifo.empty_o_SB_DFF_Q_D_SB_LUT4_O_I0_SB_LUT4_O_1_I1[2]
|
|
.sym 31534 rx_fifo.empty_o_SB_DFF_Q_D_SB_LUT4_O_I0_SB_LUT4_O_1_I1_SB_LUT4_O_2_I0[0]
|
|
.sym 31535 rx_fifo.empty_o_SB_DFF_Q_D_SB_LUT4_O_I0_SB_LUT4_O_1_I1_SB_LUT4_O_2_I0[1]
|
|
.sym 31536 rx_fifo.empty_o_SB_DFF_Q_D_SB_LUT4_O_I0_SB_LUT4_O_1_I1_SB_LUT4_O_1_I0[3]
|
|
.sym 31537 rx_fifo.empty_o_SB_DFF_Q_D_SB_LUT4_O_I0_SB_LUT4_O_1_I1_SB_LUT4_O_2_I0[3]
|
|
.sym 31538 spi_if_ins.spi.r_tx_byte[3]
|
|
.sym 31539 spi_if_ins.spi.r_tx_byte[7]
|
|
.sym 31540 spi_if_ins.spi.r_tx_bit_count[2]
|
|
.sym 31541 spi_if_ins.spi.o_spi_miso_SB_DFFE_Q_D_SB_LUT4_O_I2_SB_LUT4_O_I0_SB_LUT4_O_2_I0[3]
|
|
.sym 31542 spi_if_ins.spi.SCKr[2]
|
|
.sym 31543 spi_if_ins.spi.o_spi_miso_SB_DFFE_Q_D_SB_LUT4_O_I2_SB_LUT4_O_I0_SB_LUT4_O_2_I0[3]
|
|
.sym 31544 spi_if_ins.spi.r_tx_bit_count[2]
|
|
.sym 31545 spi_if_ins.spi.SCKr[1]
|
|
.sym 31546 spi_if_ins.spi.SCKr[0]
|
|
.sym 31550 spi_if_ins.spi.SCKr[1]
|
|
.sym 31558 spi_if_ins.spi.r_rx_byte[5]
|
|
.sym 31562 spi_if_ins.spi.r_rx_byte[6]
|
|
.sym 31566 spi_if_ins.spi.r_rx_byte[1]
|
|
.sym 31570 spi_if_ins.spi.r_rx_byte[3]
|
|
.sym 31574 spi_if_ins.spi.r_rx_byte[2]
|
|
.sym 31578 spi_if_ins.spi.r_rx_byte[7]
|
|
.sym 31582 spi_if_ins.spi.r_rx_byte[0]
|
|
.sym 31586 spi_if_ins.spi.r_temp_rx_byte[0]
|
|
.sym 31592 i_ss$SB_IO_IN
|
|
.sym 31593 spi_if_ins.spi.r_rx_done_SB_DFFESR_Q_D[1]
|
|
.sym 31594 spi_if_ins.spi.r_temp_rx_byte[4]
|
|
.sym 31598 i_mosi$SB_IO_IN
|
|
.sym 31602 spi_if_ins.spi.r_temp_rx_byte[6]
|
|
.sym 31606 spi_if_ins.spi.r_temp_rx_byte[2]
|
|
.sym 31610 spi_if_ins.spi.r_temp_rx_byte[5]
|
|
.sym 31614 spi_if_ins.spi.r_temp_rx_byte[1]
|
|
.sym 31618 spi_if_ins.spi.r_temp_rx_byte[2]
|
|
.sym 31622 spi_if_ins.spi.r_temp_rx_byte[1]
|
|
.sym 31626 spi_if_ins.spi.r_temp_rx_byte[4]
|
|
.sym 31630 spi_if_ins.spi.r_temp_rx_byte[0]
|
|
.sym 31634 spi_if_ins.spi.r_temp_rx_byte[3]
|
|
.sym 31638 spi_if_ins.spi.r_temp_rx_byte[5]
|
|
.sym 31642 i_mosi$SB_IO_IN
|
|
.sym 31650 spi_if_ins.w_rx_data[7]
|
|
.sym 31658 spi_if_ins.w_rx_data[6]
|
|
.sym 31670 spi_if_ins.w_rx_data[5]
|
|
.sym 31674 spi_if_ins.w_rx_data[1]
|
|
.sym 31678 spi_if_ins.w_rx_data[4]
|
|
.sym 31683 spi_if_ins.state_if[2]
|
|
.sym 31684 spi_if_ins.state_if[1]
|
|
.sym 31685 spi_if_ins.state_if[0]
|
|
.sym 31686 spi_if_ins.w_rx_data[4]
|
|
.sym 31690 spi_if_ins.w_rx_data[3]
|
|
.sym 31694 spi_if_ins.w_rx_data[0]
|
|
.sym 31698 spi_if_ins.w_rx_data[2]
|
|
.sym 31702 w_ioc[2]
|
|
.sym 31703 w_ioc[1]
|
|
.sym 31704 w_ioc[4]
|
|
.sym 31705 w_ioc[3]
|
|
.sym 31706 sys_ctrl_ins.i_cs_SB_DFFE_Q_D[0]
|
|
.sym 31710 spi_if_ins.w_rx_data[1]
|
|
.sym 31714 w_rx_data[4]
|
|
.sym 31718 w_rx_data[6]
|
|
.sym 31722 o_rx_h_tx_l_b$SB_IO_OUT
|
|
.sym 31723 io_ctrl_ins.o_data_out_SB_DFFESR_Q_6_R_SB_LUT4_O_I0_SB_LUT4_I2_O[1]
|
|
.sym 31724 io_ctrl_ins.o_data_out_SB_DFFESR_Q_6_R_SB_LUT4_O_I0_SB_LUT4_I2_O[2]
|
|
.sym 31725 io_ctrl_ins.o_pmod[6]
|
|
.sym 31726 io_ctrl_ins.o_pmod[4]
|
|
.sym 31727 io_ctrl_ins.o_data_out_SB_DFFESR_Q_6_R_SB_LUT4_O_I0_SB_LUT4_I2_O[2]
|
|
.sym 31728 io_ctrl_ins.led1_state_SB_LUT4_I0_I2[1]
|
|
.sym 31729 i_config[1]$SB_IO_IN
|
|
.sym 31730 w_rx_data[7]
|
|
.sym 31736 w_ioc[2]
|
|
.sym 31737 w_ioc[3]
|
|
.sym 31738 io_ctrl_ins.o_data_out_SB_DFFESR_Q_6_R_SB_LUT4_O_I1_SB_LUT4_I2_O[1]
|
|
.sym 31739 io_ctrl_ins.pmod_dir_state[4]
|
|
.sym 31740 spi_if_ins.o_load_cmd_SB_LUT4_I3_1_I0[2]
|
|
.sym 31741 io_ctrl_ins.rf_mode[2]
|
|
.sym 31742 w_rx_data[5]
|
|
.sym 31746 io_ctrl_ins.rf_pin_state[0]
|
|
.sym 31747 io_ctrl_ins.rf_mode[2]
|
|
.sym 31748 io_ctrl_ins.rf_mode[1]
|
|
.sym 31749 io_ctrl_ins.rx_h_state_SB_DFFE_Q_D_SB_LUT4_O_I2[2]
|
|
.sym 31751 io_ctrl_ins.rf_pin_state[7]
|
|
.sym 31752 io_ctrl_ins.rx_h_state_SB_DFFE_Q_D_SB_LUT4_O_I2[2]
|
|
.sym 31753 io_ctrl_ins.rx_h_state_SB_DFFE_Q_D_SB_LUT4_O_I3[2]
|
|
.sym 31754 io_ctrl_ins.o_data_out_SB_DFFESR_Q_6_R_SB_LUT4_O_I1_SB_LUT4_I2_O[0]
|
|
.sym 31755 io_ctrl_ins.o_data_out_SB_DFFESR_Q_6_R_SB_LUT4_O_I1_SB_LUT4_I2_O[1]
|
|
.sym 31756 io_ctrl_ins.led1_state_SB_LUT4_I0_I2[1]
|
|
.sym 31757 i_config[2]$SB_IO_IN
|
|
.sym 31759 io_ctrl_ins.rx_h_state_SB_DFFE_Q_D_SB_LUT4_O_I2[2]
|
|
.sym 31760 io_ctrl_ins.rf_pin_state[6]
|
|
.sym 31761 io_ctrl_ins.rx_h_state_SB_DFFE_Q_D_SB_LUT4_O_I3[2]
|
|
.sym 31762 io_ctrl_ins.rf_mode[1]
|
|
.sym 31763 io_ctrl_ins.rf_mode[2]
|
|
.sym 31764 io_ctrl_ins.rf_pin_state[2]
|
|
.sym 31765 io_ctrl_ins.rx_h_state_SB_DFFE_Q_D_SB_LUT4_O_I2[2]
|
|
.sym 31767 io_ctrl_ins.rf_pin_state[1]
|
|
.sym 31768 io_ctrl_ins.rf_mode[1]
|
|
.sym 31769 io_ctrl_ins.rx_h_state_SB_DFFE_Q_D_SB_LUT4_O_I2[2]
|
|
.sym 31770 o_tr_vc2$SB_IO_OUT
|
|
.sym 31771 io_ctrl_ins.o_data_out_SB_DFFESR_Q_6_R_SB_LUT4_O_I0_SB_LUT4_I2_O[1]
|
|
.sym 31772 io_ctrl_ins.o_data_out_SB_DFFESR_Q_6_R_SB_LUT4_O_I1_SB_LUT4_I2_O[1]
|
|
.sym 31773 io_ctrl_ins.pmod_dir_state[3]
|
|
.sym 31774 io_ctrl_ins.rf_pin_state[3]
|
|
.sym 31775 io_ctrl_ins.rf_mode[2]
|
|
.sym 31776 io_ctrl_ins.rf_mode[1]
|
|
.sym 31777 io_ctrl_ins.rx_h_state_SB_DFFE_Q_D_SB_LUT4_O_I2[2]
|
|
.sym 31778 w_rx_24_fifo_data[25]
|
|
.sym 31783 w_rx_09_fifo_data[26]
|
|
.sym 31784 w_rx_24_fifo_data[26]
|
|
.sym 31785 o_led1$SB_IO_OUT
|
|
.sym 31787 w_rx_09_fifo_data[27]
|
|
.sym 31788 w_rx_24_fifo_data[27]
|
|
.sym 31789 o_led1$SB_IO_OUT
|
|
.sym 31790 w_rx_24_fifo_data[24]
|
|
.sym 31795 w_rx_09_fifo_data[25]
|
|
.sym 31796 w_rx_24_fifo_data[25]
|
|
.sym 31797 o_led1$SB_IO_OUT
|
|
.sym 31798 w_rx_24_fifo_data[27]
|
|
.sym 31802 w_rx_24_fifo_data[26]
|
|
.sym 31811 w_rx_09_fifo_data[24]
|
|
.sym 31812 w_rx_24_fifo_data[24]
|
|
.sym 31813 o_led1$SB_IO_OUT
|
|
.sym 31814 w_rx_09_fifo_data[24]
|
|
.sym 31819 w_rx_09_fifo_data[31]
|
|
.sym 31820 w_rx_24_fifo_data[31]
|
|
.sym 31821 o_led1$SB_IO_OUT
|
|
.sym 31823 w_rx_09_fifo_data[29]
|
|
.sym 31824 w_rx_24_fifo_data[29]
|
|
.sym 31825 o_led1$SB_IO_OUT
|
|
.sym 31826 w_rx_09_fifo_data[29]
|
|
.sym 31830 w_rx_09_fifo_data[25]
|
|
.sym 31834 smi_ctrl_ins.r_fifo_pulled_data[11]
|
|
.sym 31835 smi_ctrl_ins.r_fifo_pulled_data[27]
|
|
.sym 31836 smi_ctrl_ins.int_cnt_rx[3]
|
|
.sym 31837 smi_ctrl_ins.int_cnt_rx[4]
|
|
.sym 31838 w_rx_09_fifo_data[27]
|
|
.sym 31864 smi_ctrl_ins.int_cnt_rx[4]
|
|
.sym 31865 smi_ctrl_ins.int_cnt_rx[3]
|
|
.sym 31874 w_rx_24_fifo_data[18]
|
|
.sym 31879 smi_ctrl_ins.r_fifo_pull_1
|
|
.sym 31880 w_rx_fifo_empty
|
|
.sym 31881 smi_ctrl_ins.r_fifo_pull
|
|
.sym 31882 w_rx_24_fifo_data[22]
|
|
.sym 31886 w_rx_24_fifo_data[20]
|
|
.sym 31890 w_rx_24_fifo_data[16]
|
|
.sym 31902 w_rx_24_fifo_data[23]
|
|
.sym 31910 w_rx_09_fifo_data[21]
|
|
.sym 31915 w_rx_09_fifo_data[23]
|
|
.sym 31916 w_rx_24_fifo_data[23]
|
|
.sym 31917 o_led1$SB_IO_OUT
|
|
.sym 31919 w_rx_09_fifo_data[22]
|
|
.sym 31920 w_rx_24_fifo_data[22]
|
|
.sym 31921 o_led1$SB_IO_OUT
|
|
.sym 31922 w_rx_09_fifo_data[22]
|
|
.sym 31927 w_rx_09_fifo_data[16]
|
|
.sym 31928 w_rx_24_fifo_data[16]
|
|
.sym 31929 o_led1$SB_IO_OUT
|
|
.sym 31933 o_led1$SB_IO_OUT
|
|
.sym 31934 w_rx_09_fifo_data[23]
|
|
.sym 31939 w_rx_09_fifo_data[18]
|
|
.sym 31940 w_rx_24_fifo_data[18]
|
|
.sym 31941 o_led1$SB_IO_OUT
|
|
.sym 31946 w_rx_09_fifo_data[20]
|
|
.sym 31950 w_rx_09_fifo_data[18]
|
|
.sym 31954 w_rx_09_fifo_data[16]
|
|
.sym 31963 w_rx_09_fifo_data[20]
|
|
.sym 31964 w_rx_24_fifo_data[20]
|
|
.sym 31965 o_led1$SB_IO_OUT
|
|
.sym 31967 w_rx_fifo_empty
|
|
.sym 31968 w_tx_fifo_full
|
|
.sym 31969 o_led0$SB_IO_OUT
|
|
.sym 31979 spi_if_ins.r_tx_byte[7]
|
|
.sym 31980 spi_if_ins.spi.o_spi_miso_SB_DFFE_Q_D_SB_LUT4_O_I2[1]
|
|
.sym 31981 spi_if_ins.r_tx_data_valid_SB_LUT4_I3_O
|
|
.sym 32002 r_tx_data[7]
|
|
.sym 32006 r_tx_data[5]
|
|
.sym 32010 r_tx_data[1]
|
|
.sym 32014 r_tx_data[4]
|
|
.sym 32018 r_tx_data[3]
|
|
.sym 32024 i_ss$SB_IO_IN
|
|
.sym 32025 spi_if_ins.r_tx_data_valid
|
|
.sym 32026 r_tx_data[6]
|
|
.sym 32030 r_tx_data[2]
|
|
.sym 32042 spi_if_ins.r_tx_data_valid_SB_DFFESR_Q_D[1]
|
|
.sym 32054 w_cs[3]
|
|
.sym 32055 w_cs[1]
|
|
.sym 32056 w_cs[2]
|
|
.sym 32057 w_cs[0]
|
|
.sym 32062 w_tx_data_smi[2]
|
|
.sym 32063 spi_if_ins.o_cs_SB_LUT4_I0_O[1]
|
|
.sym 32064 spi_if_ins.o_cs_SB_LUT4_I0_1_O[0]
|
|
.sym 32065 w_tx_data_io[2]
|
|
.sym 32066 w_tx_data_smi[0]
|
|
.sym 32067 spi_if_ins.o_cs_SB_LUT4_I0_O[1]
|
|
.sym 32068 spi_if_ins.o_cs_SB_LUT4_I0_1_O[0]
|
|
.sym 32069 w_tx_data_io[0]
|
|
.sym 32074 r_tx_data[0]
|
|
.sym 32079 spi_if_ins.o_fetch_cmd_SB_DFFESR_Q_E_SB_LUT4_O_I1[2]
|
|
.sym 32080 i_rst_b$SB_IO_IN
|
|
.sym 32081 spi_if_ins.r_tx_data_valid_SB_DFFESR_Q_D[1]
|
|
.sym 32098 spi_if_ins.r_tx_byte[7]
|
|
.sym 32102 w_cs[3]
|
|
.sym 32103 w_cs[2]
|
|
.sym 32104 w_cs[0]
|
|
.sym 32105 w_cs[1]
|
|
.sym 32106 spi_if_ins.r_tx_byte[0]
|
|
.sym 32110 spi_if_ins.r_tx_byte[6]
|
|
.sym 32114 w_cs[3]
|
|
.sym 32115 w_cs[1]
|
|
.sym 32116 w_cs[2]
|
|
.sym 32117 w_cs[0]
|
|
.sym 32118 spi_if_ins.spi.o_spi_miso_SB_DFFE_Q_D_SB_LUT4_O_I2_SB_LUT4_O_I0[0]
|
|
.sym 32119 spi_if_ins.spi.o_spi_miso_SB_DFFE_Q_D_SB_LUT4_O_I2_SB_LUT4_O_I0[1]
|
|
.sym 32120 spi_if_ins.spi.SCKr_SB_LUT4_I0_O[0]
|
|
.sym 32121 spi_if_ins.spi.o_spi_miso_SB_DFFE_Q_D_SB_LUT4_O_I2_SB_LUT4_O_I0[3]
|
|
.sym 32122 spi_if_ins.r_tx_byte[2]
|
|
.sym 32150 w_tx_fifo_full
|
|
.sym 32154 w_rx_fifo_empty
|
|
.sym 32162 w_rx_data[7]
|
|
.sym 32194 io_ctrl_ins.pmod_dir_state[7]
|
|
.sym 32195 io_ctrl_ins.o_data_out_SB_DFFESR_Q_6_R_SB_LUT4_O_I1_SB_LUT4_I2_O[1]
|
|
.sym 32196 io_ctrl_ins.led1_state_SB_LUT4_I0_I2[1]
|
|
.sym 32197 i_button$SB_IO_IN
|
|
.sym 32198 o_rx_h_tx_l$SB_IO_OUT
|
|
.sym 32199 io_ctrl_ins.o_data_out_SB_DFFESR_Q_6_R_SB_LUT4_O_I0_SB_LUT4_I2_O[1]
|
|
.sym 32200 io_ctrl_ins.o_data_out_SB_DFFESR_Q_6_R_SB_LUT4_O_I0_SB_LUT4_I2_O[2]
|
|
.sym 32201 io_ctrl_ins.o_pmod[7]
|
|
.sym 32208 io_ctrl_ins.rx_h_b_state_SB_LUT4_I0_O[0]
|
|
.sym 32209 io_ctrl_ins.rx_h_b_state_SB_LUT4_I0_O[1]
|
|
.sym 32212 i_button_SB_LUT4_I3_O[0]
|
|
.sym 32213 i_button_SB_LUT4_I3_O[1]
|
|
.sym 32220 io_ctrl_ins.tr_vc_1_state_SB_LUT4_I0_O[0]
|
|
.sym 32221 io_ctrl_ins.tr_vc_1_state_SB_LUT4_I0_O[1]
|
|
.sym 32222 o_tr_vc1$SB_IO_OUT
|
|
.sym 32223 io_ctrl_ins.o_data_out_SB_DFFESR_Q_6_R_SB_LUT4_O_I0_SB_LUT4_I2_O[1]
|
|
.sym 32224 io_ctrl_ins.o_data_out_SB_DFFESR_Q_6_R_SB_LUT4_O_I0_SB_LUT4_I2_O[2]
|
|
.sym 32225 io_ctrl_ins.o_data_out_SB_DFFESR_Q_6_R_SB_LUT4_O_I0_SB_LUT4_I2_O[3]
|
|
.sym 32226 o_tr_vc1_b$SB_IO_OUT
|
|
.sym 32227 io_ctrl_ins.o_data_out_SB_DFFESR_Q_6_R_SB_LUT4_O_I0_SB_LUT4_I2_O[1]
|
|
.sym 32228 io_ctrl_ins.tr_vc_1_b_state_SB_LUT4_I0_I2[2]
|
|
.sym 32229 io_ctrl_ins.tr_vc_1_b_state_SB_LUT4_I0_I2[3]
|
|
.sym 32230 io_ctrl_ins.led0_state
|
|
.sym 32231 io_ctrl_ins.led1_state_SB_LUT4_I0_I2[1]
|
|
.sym 32232 io_ctrl_ins.mixer_en_state_SB_LUT4_I0_O[2]
|
|
.sym 32233 io_ctrl_ins.mixer_en_state_SB_LUT4_I0_O[3]
|
|
.sym 32238 io_ctrl_ins.led1_state
|
|
.sym 32239 io_ctrl_ins.led1_state_SB_LUT4_I0_I2[1]
|
|
.sym 32240 io_ctrl_ins.led1_state_SB_LUT4_I0_I2[2]
|
|
.sym 32241 io_ctrl_ins.led1_state_SB_LUT4_I0_I2[3]
|
|
.sym 32242 o_shdn_rx_lna$SB_IO_OUT
|
|
.sym 32243 io_ctrl_ins.o_data_out_SB_DFFESR_Q_6_R_SB_LUT4_O_I0_SB_LUT4_I2_O[1]
|
|
.sym 32244 io_ctrl_ins.o_data_out_SB_DFFESR_Q_6_R_SB_LUT4_O_I1_SB_LUT4_I2_O[1]
|
|
.sym 32245 io_ctrl_ins.pmod_dir_state[1]
|
|
.sym 32246 i_config[0]$SB_IO_IN
|
|
.sym 32247 io_ctrl_ins.led1_state_SB_LUT4_I0_I2[1]
|
|
.sym 32248 io_ctrl_ins.tr_vc_2_state_SB_LUT4_I0_O[2]
|
|
.sym 32249 io_ctrl_ins.tr_vc_2_state_SB_LUT4_I0_O[3]
|
|
.sym 32250 io_ctrl_ins.pmod_dir_state[6]
|
|
.sym 32251 io_ctrl_ins.o_data_out_SB_DFFESR_Q_6_R_SB_LUT4_O_I1_SB_LUT4_I2_O[1]
|
|
.sym 32252 io_ctrl_ins.led1_state_SB_LUT4_I0_I2[1]
|
|
.sym 32253 i_config[3]$SB_IO_IN
|
|
.sym 32256 spi_if_ins.o_load_cmd_SB_LUT4_I3_1_I0[2]
|
|
.sym 32257 spi_if_ins.o_fetch_cmd_SB_LUT4_I3_O[2]
|
|
.sym 32282 io_ctrl_ins.tr_vc_1_state_SB_DFFE_Q_D_SB_LUT4_O_I0[0]
|
|
.sym 32283 io_ctrl_ins.rf_mode[1]
|
|
.sym 32284 io_ctrl_ins.rf_pin_state[5]
|
|
.sym 32285 io_ctrl_ins.rx_h_state_SB_DFFE_Q_D_SB_LUT4_O_I2[2]
|
|
.sym 32286 io_ctrl_ins.tr_vc_1_state_SB_DFFE_Q_D_SB_LUT4_O_I0[0]
|
|
.sym 32287 io_ctrl_ins.rf_mode[1]
|
|
.sym 32288 io_ctrl_ins.rf_pin_state[4]
|
|
.sym 32289 io_ctrl_ins.rx_h_state_SB_DFFE_Q_D_SB_LUT4_O_I2[2]
|
|
.sym 32297 o_miso_$_TBUF__Y_E
|
|
.sym 32306 smi_ctrl_ins.o_smi_data_out_SB_DFFNE_Q_D_SB_LUT4_O_4_I3[0]
|
|
.sym 32307 smi_ctrl_ins.o_smi_data_out_SB_DFFNE_Q_D_SB_LUT4_O_4_I3[1]
|
|
.sym 32308 smi_ctrl_ins.int_cnt_rx[3]
|
|
.sym 32309 smi_ctrl_ins.o_smi_data_out_SB_DFFNE_Q_D_SB_LUT4_O_4_I3[3]
|
|
.sym 32350 smi_ctrl_ins.w_fifo_pull_trigger
|
|
.sym 32354 w_rx_fifo_pulled_data[27]
|
|
.sym 32394 smi_ctrl_ins.r_fifo_pull
|
|
.sym 32442 spi_if_ins.spi.r_rx_done_SB_DFFESR_Q_D[1]
|
|
.sym 32466 spi_if_ins.spi.r_rx_done
|
|
.sym 32490 w_rx_data[7]
|
|
.sym 32547 spi_if_ins.o_cs_SB_LUT4_I0_1_O[0]
|
|
.sym 32548 w_tx_data_io[5]
|
|
.sym 32549 smi_ctrl_ins.o_data_out_SB_LUT4_I0_1_O[0]
|
|
.sym 32552 spi_if_ins.o_cs_SB_LUT4_I0_1_O[0]
|
|
.sym 32553 w_tx_data_io[3]
|
|
.sym 32554 w_tx_data_smi[1]
|
|
.sym 32555 spi_if_ins.o_cs_SB_LUT4_I0_O[1]
|
|
.sym 32556 spi_if_ins.o_cs_SB_LUT4_I0_1_O[0]
|
|
.sym 32557 w_tx_data_io[1]
|
|
.sym 32560 spi_if_ins.o_cs_SB_LUT4_I0_1_O[0]
|
|
.sym 32561 w_tx_data_io[6]
|
|
.sym 32564 spi_if_ins.o_cs_SB_LUT4_I0_1_O[0]
|
|
.sym 32565 w_tx_data_io[4]
|
|
.sym 32568 smi_ctrl_ins.o_data_out_SB_LUT4_I0_1_O[0]
|
|
.sym 32569 smi_ctrl_ins.o_data_out_SB_LUT4_I0_1_O[1]
|
|
.sym 32570 w_cs[1]
|
|
.sym 32571 w_cs[2]
|
|
.sym 32572 w_cs[0]
|
|
.sym 32573 w_cs[3]
|
|
.sym 32575 spi_if_ins.o_cs_SB_LUT4_I0_1_O[0]
|
|
.sym 32576 w_tx_data_io[7]
|
|
.sym 32577 smi_ctrl_ins.o_data_out_SB_LUT4_I0_1_O[0]
|
|
.sym 32585 i_ss$SB_IO_IN
|
|
.sym 32606 w_tx_data_sys[0]
|
|
.sym 32607 spi_if_ins.o_cs_SB_LUT4_I3_O[1]
|
|
.sym 32608 smi_ctrl_ins.o_data_out_SB_LUT4_I0_1_O[0]
|
|
.sym 32609 spi_if_ins.o_cs_SB_LUT4_I3_O[3]
|
|
.sym 32628 spi_if_ins.o_cs_SB_LUT4_I0_2_O[0]
|
|
.sym 32629 i_rst_b$SB_IO_IN
|
|
.sym 32762 w_rx_data[6]
|
|
.sym 32766 w_rx_data[1]
|