diff --git a/firmware/complex_fifo.v b/firmware/complex_fifo.v index fbdb324..41b5d06 100644 --- a/firmware/complex_fifo.v +++ b/firmware/complex_fifo.v @@ -3,18 +3,18 @@ module complex_fifo #( parameter DATA_WIDTH = 16 ) ( - input wire wr_rst_i, - input wire wr_clk_i, - input wire wr_en_i, - input wire [2*DATA_WIDTH-1:0] wr_data_i, + input wire wr_rst_i, + input wire wr_clk_i, + input wire wr_en_i, + input wire [2*DATA_WIDTH-1:0] wr_data_i, - input wire rd_rst_i, - input wire rd_clk_i, - input wire rd_en_i, - output reg [2*DATA_WIDTH-1:0] rd_data_o, + input wire rd_rst_i, + input wire rd_clk_i, + input wire rd_en_i, + output reg [2*DATA_WIDTH-1:0] rd_data_o, - output reg full_o, - output reg empty_o + output reg full_o, + output reg empty_o ); reg [ADDR_WIDTH-1:0] wr_addr; diff --git a/firmware/smi_ctrl.v b/firmware/smi_ctrl.v index 46ffe93..2564e0d 100644 --- a/firmware/smi_ctrl.v +++ b/firmware/smi_ctrl.v @@ -29,8 +29,7 @@ module smi_ctrl output [7:0] o_smi_data_out, inout [7:0] i_smi_data_in, output o_smi_read_req, - output o_smi_write_req, - output o_smi_writing ); + output o_smi_write_req ); // MODULE SPECIFIC IOC LIST // ------------------------ @@ -69,11 +68,18 @@ module smi_ctrl end end + // Tell the RPI that data is pending in either of the two fifos + assign o_smi_read_req = !i_fifo_09_empty || !i_fifo_24_empty; + + reg [31:0] rx_data_buf_09; + reg [31:0] rx_data_buf_24; + always @(posedge i_sys_clk) - begin - if (i_fifo_09_empty == 1'b0) begin + if (!i_fifo_09_empty) begin end + begin + end diff --git a/firmware/top.asc b/firmware/top.asc index e69c397..e21e9ff 100644 --- a/firmware/top.asc +++ b/firmware/top.asc @@ -59,39 +59,39 @@ 000000000000000000 000000000000000000 000000000000000001 -000000000000010010 -000011010000010000 -001100000000000000 -000000000000000000 -000000000000000000 -000100000000000000 -000000000000000000 -000000000000000000 -000000000000000000 -000000000000000000 -000000000000000000 -000000000000000000 - -.io_tile 5 0 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000000000000000000 000000000000000000 -000000000000000000 100000000000000000 000000000000000000 000000000000000000 000000000000000000 +000000000000000000 000000000000000001 000000000000000000 000000000000000000 .io_tile 9 17 000000000000000000 -001000000000000000 +010000000000000000 000000000000000000 000000000000000001 000000000000000000 000000000000000000 001000000000000000 000000000000000000 -000000000000000000 -100100000000000000 +100000000000000000 +000100000000000000 000000000000000000 000000000000000000 000000000000000000 @@ -4411,40 +4411,40 @@ 000000000000000000 .io_tile 10 17 -000000000000000010 -000000000000000000 +000010000000000010 +000011110000000000 000000000000000000 000000000000000001 -000000000000110010 -000000000000110000 +000000000000000010 +000000000000010000 000000000000000000 +000000000000010000 000000000000000000 010000000000000000 000000000000000000 000000000000000000 000000000000000000 +000000000000000001 +000000000000000000 000000000000000000 -000000000000011001 -000000111000000000 -000000001000000000 .io_tile 11 17 000000000000000010 000000000000000000 000000000000000000 000000000000000001 -000000000000110010 +000000000000010010 000000000000110000 001100000000000000 -000000000000000000 +000011010000000000 000000000000000000 000100000000000000 000000000000000000 000000000000000000 000000000000000000 000000000000000000 -000001010000000000 -000000001000000000 +000000000000000000 +000000000000000000 .io_tile 12 17 000000000000000000 @@ -4468,2311 +4468,2386 @@ .sym 4 lvds_clock_buf .sym 7 r_counter[0]_$glb_clk .sym 8 i_glob_clock$SB_IO_IN_$glb_clk -.sym 639 r_counter[0] -.sym 748 w_lvds_rx_09_d1_SB_LUT4_I3_I2[0] +.sym 525 r_counter[0] +.sym 635 lvds_rx_09_inst.r_state_if_SB_DFFNE_Q_E +.sym 636 w_lvds_rx_09_d1_SB_LUT4_I0_O[1] +.sym 637 w_rx_09_fifo_data[1] +.sym 638 w_rx_09_fifo_data[0] +.sym 639 io_pmod[6]$SB_IO_OUT +.sym 640 w_lvds_rx_09_d1_SB_LUT4_I0_O[1] .sym 751 lvds_rx_09_inst.r_data_SB_DFFNESR_Q_R[0] +.sym 752 w_lvds_rx_09_d1_SB_LUT4_I0_O_SB_LUT4_O_I1_SB_DFFNESR_Q_E +.sym 753 w_lvds_rx_09_d1_SB_LUT4_I0_O_SB_LUT4_O_I2[3] +.sym 771 io_pmod[6]$SB_IO_OUT +.sym 779 w_lvds_rx_09_d0 +.sym 792 lvds_rx_09_inst.r_data_SB_DFFNESR_Q_R[0] +.sym 823 w_lvds_rx_09_d1 +.sym 826 w_lvds_rx_09_d0 +.sym 827 w_lvds_rx_09_d1 .sym 830 r_counter[0] -.sym 858 r_counter[0] -.sym 860 w_rx_09_fifo_data[0] -.sym 862 lvds_rx_09_inst.r_state_if_SB_DFFNE_Q_E -.sym 863 w_rx_09_fifo_data[1] -.sym 864 io_pmod[5]$SB_IO_OUT -.sym 866 io_pmod[6]$SB_IO_OUT -.sym 867 w_lvds_rx_09_d1_SB_LUT4_I0_O[2] +.sym 854 r_counter[0] +.sym 919 w_lvds_rx_09_d1_SB_LUT4_I0_O_SB_LUT4_O_I1_SB_DFFNESR_Q_E +.sym 920 r_counter[0] .sym 940 lvds_clock .sym 944 lvds_clock .sym 970 lvds_clock -.sym 1007 w_lvds_rx_09_d0 -.sym 1017 w_lvds_rx_09_d1_SB_LUT4_I0_O[2] -.sym 1031 w_lvds_rx_09_d1 -.sym 1054 w_lvds_rx_09_d0 -.sym 1055 w_lvds_rx_09_d1 +.sym 999 i_mosi$SB_IO_IN +.sym 1090 $PACKER_VCC_NET .sym 1173 w_lvds_rx_09_d0 .sym 1174 w_lvds_rx_09_d1 .sym 1183 $PACKER_VCC_NET .sym 1184 lvds_clock_buf .sym 1191 $PACKER_VCC_NET -.sym 1256 $PACKER_VCC_NET +.sym 1210 $PACKER_VCC_NET +.sym 1274 $PACKER_VCC_NET .sym 1287 lvds_clock .sym 1297 $PACKER_VCC_NET -.sym 1313 $PACKER_VCC_NET -.sym 1391 $PACKER_VCC_NET -.sym 2776 lvds_rx_09_inst.r_phase_count_SB_LUT4_I1_O_SB_DFFNESR_D_Q[1] -.sym 2777 lvds_rx_09_inst.r_phase_count[0] -.sym 2778 lvds_rx_09_inst.r_phase_count[1] -.sym 2780 w_lvds_rx_09_d1_SB_LUT4_I3_I2_SB_LUT4_O_I0[0] -.sym 2781 lvds_rx_09_inst.r_phase_count_SB_LUT4_I1_O_SB_DFFNESR_D_Q[2] -.sym 2857 r_counter[0] -.sym 2899 r_counter[0] -.sym 2907 i_glob_clock$SB_IO_IN_$glb_clk -.sym 2909 lvds_rx_09_inst.r_phase_count_SB_LUT4_I1_O_SB_DFFNESR_D_Q[3] -.sym 2910 lvds_rx_09_inst.r_state_if_SB_DFFNE_Q_E_SB_LUT4_O_I1_SB_LUT4_O_I1[0] -.sym 2911 w_lvds_rx_09_d1_SB_LUT4_I0_O[1] -.sym 2912 w_lvds_rx_09_d1_SB_LUT4_I0_O[0] -.sym 2913 w_lvds_rx_09_d1_SB_LUT4_I3_I2_SB_LUT4_O_I0_SB_DFFNESR_Q_E -.sym 2914 lvds_rx_09_inst.r_state_if_SB_DFFNE_Q_E_SB_LUT4_O_I1_SB_LUT4_I2_O[0] -.sym 2915 w_lvds_rx_09_d1_SB_LUT4_I3_I2[1] -.sym 2916 lvds_rx_09_inst.r_state_if_SB_DFFNE_Q_E_SB_LUT4_O_I1_SB_LUT4_I2_O[2] +.sym 1310 $PACKER_VCC_NET +.sym 1336 io_ctrl_ins.led1_state_SB_LUT4_I0_O_SB_LUT4_O_I2[3] +.sym 1455 spi_if_ins.w_rx_data[0] +.sym 2639 io_pmod[7]$SB_IO_OUT +.sym 2640 io_pmod[5]$SB_IO_OUT +.sym 2665 w_lvds_rx_09_d1_SB_LUT4_I0_O_SB_LUT4_O_I1_SB_DFFNESR_Q_E +.sym 2666 w_lvds_rx_09_d1_SB_LUT4_I0_O[1] +.sym 2667 r_counter[0] +.sym 2722 r_counter[0] +.sym 2762 r_counter[0] +.sym 2772 i_glob_clock$SB_IO_IN_$glb_clk +.sym 2774 w_lvds_rx_09_d1_SB_LUT4_I0_O_SB_LUT4_O_I2[2] +.sym 2775 lvds_rx_09_inst.r_data_SB_DFFNESR_Q_R[0] +.sym 2776 lvds_rx_09_inst.r_state_if_SB_DFFNESR_Q_D_SB_LUT4_I1_O[2] +.sym 2777 lvds_rx_09_inst.r_state_if_SB_DFFNESR_Q_D[1] +.sym 2778 w_lvds_rx_09_d1_SB_LUT4_I3_I2[2] +.sym 2779 w_lvds_rx_09_d1_SB_LUT4_I0_O[0] +.sym 2781 lvds_rx_09_inst.r_phase_count[0] +.sym 2831 w_lvds_rx_09_d0 +.sym 2834 w_lvds_rx_09_d1_SB_LUT4_I0_O[1] +.sym 2837 w_lvds_rx_09_d1 +.sym 2840 lvds_rx_09_inst.r_data_SB_DFFNESR_Q_R[0] +.sym 2842 w_lvds_rx_09_d1_SB_LUT4_I0_O_SB_LUT4_O_I2[3] +.sym 2843 w_lvds_rx_09_d1_SB_LUT4_I0_O_SB_LUT4_O_I2[2] +.sym 2844 lvds_rx_09_inst.r_data_SB_DFFNESR_Q_R[0] +.sym 2847 w_rx_09_fifo_data[1] +.sym 2851 w_lvds_rx_09_d1_SB_LUT4_I0_O_SB_LUT4_O_I2[2] +.sym 2854 w_lvds_rx_09_d1_SB_LUT4_I0_O[1] +.sym 2855 w_lvds_rx_09_d1_SB_LUT4_I3_I2[2] +.sym 2856 w_lvds_rx_09_d1_SB_LUT4_I0_O[0] +.sym 2873 w_lvds_rx_09_d1_SB_LUT4_I0_O[1] +.sym 2874 w_lvds_rx_09_d1_SB_LUT4_I0_O[0] +.sym 2878 w_lvds_rx_09_d1_SB_LUT4_I0_O[1] +.sym 2884 w_lvds_rx_09_d0 +.sym 2885 w_lvds_rx_09_d1_SB_LUT4_I3_I2[2] +.sym 2886 w_lvds_rx_09_d1_SB_LUT4_I0_O_SB_LUT4_O_I2[3] +.sym 2887 w_lvds_rx_09_d1_SB_LUT4_I0_O_SB_LUT4_O_I2[2] +.sym 2890 w_lvds_rx_09_d1_SB_LUT4_I3_I2[2] +.sym 2891 w_lvds_rx_09_d1_SB_LUT4_I0_O_SB_LUT4_O_I2[3] +.sym 2892 w_lvds_rx_09_d1 +.sym 2893 w_lvds_rx_09_d1_SB_LUT4_I0_O_SB_LUT4_O_I2[2] +.sym 2896 w_rx_09_fifo_data[1] +.sym 2899 lvds_rx_09_inst.r_data_SB_DFFNESR_Q_R[0] +.sym 2902 w_lvds_rx_09_d1_SB_LUT4_I0_O_SB_LUT4_O_I2[2] +.sym 2903 w_lvds_rx_09_d0 +.sym 2904 w_lvds_rx_09_d1 +.sym 2905 w_lvds_rx_09_d1_SB_LUT4_I0_O_SB_LUT4_O_I2[3] +.sym 2906 w_lvds_rx_09_d1_SB_LUT4_I0_O[1] +.sym 2907 lvds_clock_buf +.sym 2908 lvds_rx_09_inst.r_data_SB_DFFNESR_Q_R[0] +.sym 2911 lvds_rx_09_inst.r_phase_count_SB_LUT4_O_1_I3[0] +.sym 2913 lvds_rx_09_inst.r_phase_count_SB_LUT4_O_1_I3[1] +.sym 2914 lvds_rx_09_inst.r_state_if_SB_DFFNESR_Q_D_SB_LUT4_I1_O[0] +.sym 2915 w_lvds_rx_09_d1_SB_LUT4_I0_O_SB_LUT4_O_I1[0] +.sym 2916 w_lvds_rx_09_d1_SB_LUT4_I0_O_SB_LUT4_O_I2[1] +.sym 2963 lvds_rx_09_inst.r_data_SB_DFFNESR_Q_R[0] .sym 2964 lvds_rx_09_inst.r_state_if_SB_DFFNE_Q_E -.sym 2980 w_lvds_rx_09_d1_SB_LUT4_I3_I2[0] -.sym 2991 lvds_rx_09_inst.r_data_SB_DFFNESR_Q_R[0] -.sym 2992 w_lvds_rx_09_d1_SB_LUT4_I3_I2[1] -.sym 3007 lvds_rx_09_inst.r_data_SB_DFFNESR_Q_R[0] -.sym 3025 w_lvds_rx_09_d1_SB_LUT4_I3_I2[1] -.sym 3026 w_lvds_rx_09_d1_SB_LUT4_I3_I2[0] +.sym 2970 w_lvds_rx_09_d1_SB_LUT4_I0_O_SB_LUT4_O_I2[2] +.sym 2977 w_lvds_rx_09_d1_SB_LUT4_I0_O_SB_LUT4_O_I2[3] +.sym 3027 lvds_rx_09_inst.r_data_SB_DFFNESR_Q_R[0] +.sym 3031 w_lvds_rx_09_d1_SB_LUT4_I0_O_SB_LUT4_O_I2[3] +.sym 3034 w_lvds_rx_09_d1_SB_LUT4_I0_O_SB_LUT4_O_I2[2] +.sym 3037 lvds_rx_09_inst.r_data_SB_DFFNESR_Q_R[0] .sym 3041 lvds_rx_09_inst.r_state_if_SB_DFFNE_Q_E .sym 3042 lvds_clock_buf -.sym 3044 lvds_rx_09_inst.r_state_if_SB_DFFNE_Q_E -.sym 3045 io_pmod[7]$SB_IO_OUT -.sym 3046 w_lvds_rx_09_d1_SB_LUT4_I0_O[2] -.sym 3072 io_pmod[6]$SB_IO_OUT -.sym 3097 w_rx_09_fifo_data[0] -.sym 3099 w_lvds_rx_09_d1_SB_LUT4_I3_I2[0] -.sym 3102 lvds_rx_09_inst.r_data_SB_DFFNESR_Q_R[0] -.sym 3103 w_lvds_rx_09_d1_SB_LUT4_I3_I2[1] -.sym 3107 w_lvds_rx_09_d1_SB_LUT4_I0_O[1] -.sym 3108 w_rx_09_fifo_data[1] -.sym 3109 w_lvds_rx_09_d0 -.sym 3110 lvds_rx_09_inst.r_data_SB_DFFNESR_Q_R[0] -.sym 3113 lvds_rx_09_inst.r_state_if_SB_DFFNE_Q_E -.sym 3115 w_lvds_rx_09_d1_SB_LUT4_I0_O[2] -.sym 3123 w_lvds_rx_09_d1 -.sym 3130 w_lvds_rx_09_d1_SB_LUT4_I3_I2[0] -.sym 3131 w_lvds_rx_09_d1 -.sym 3132 w_lvds_rx_09_d1_SB_LUT4_I3_I2[1] -.sym 3133 w_lvds_rx_09_d1_SB_LUT4_I0_O[1] -.sym 3142 lvds_rx_09_inst.r_state_if_SB_DFFNE_Q_E -.sym 3148 w_lvds_rx_09_d1_SB_LUT4_I0_O[1] -.sym 3149 w_lvds_rx_09_d1_SB_LUT4_I3_I2[0] -.sym 3150 w_lvds_rx_09_d0 -.sym 3151 w_lvds_rx_09_d1_SB_LUT4_I3_I2[1] -.sym 3154 w_rx_09_fifo_data[0] -.sym 3155 lvds_rx_09_inst.r_data_SB_DFFNESR_Q_R[0] -.sym 3168 w_rx_09_fifo_data[1] -.sym 3169 lvds_rx_09_inst.r_data_SB_DFFNESR_Q_R[0] -.sym 3172 w_lvds_rx_09_d1 -.sym 3173 w_lvds_rx_09_d1_SB_LUT4_I3_I2[0] -.sym 3174 w_lvds_rx_09_d0 -.sym 3175 w_lvds_rx_09_d1_SB_LUT4_I3_I2[1] -.sym 3176 w_lvds_rx_09_d1_SB_LUT4_I0_O[2] -.sym 3177 lvds_clock_buf -.sym 3178 lvds_rx_09_inst.r_data_SB_DFFNESR_Q_R[0] -.sym 3201 io_pmod[5]$SB_IO_OUT -.sym 4253 lvds_rx_09_inst.r_state_if_SB_DFFNE_Q_E -.sym 4261 w_lvds_rx_09_d1_SB_LUT4_I3_I2_SB_LUT4_O_I0_SB_DFFNESR_Q_E -.sym 5059 $PACKER_VCC_NET -.sym 5062 lvds_rx_09_inst.r_state_if_SB_DFFNE_Q_E_SB_LUT4_O_I1_SB_LUT4_I2_O[0] -.sym 5068 lvds_rx_09_inst.r_phase_count[0] -.sym 5071 w_lvds_rx_09_d1_SB_LUT4_I3_I2_SB_LUT4_O_I0[0] -.sym 5072 lvds_rx_09_inst.r_state_if_SB_DFFNE_Q_E_SB_LUT4_O_I1_SB_LUT4_I2_O[2] -.sym 5075 lvds_rx_09_inst.r_phase_count_SB_LUT4_I1_O_SB_DFFNESR_D_Q[1] -.sym 5084 w_lvds_rx_09_d1_SB_LUT4_I3_I2_SB_LUT4_O_I0_SB_DFFNESR_Q_E -.sym 5085 lvds_rx_09_inst.r_phase_count[1] +.sym 3049 lvds_rx_09_inst.r_phase_count[1] +.sym 3072 $PACKER_VCC_NET +.sym 3077 lvds_rx_09_inst.r_data_SB_DFFNESR_Q_R[0] +.sym 3201 smi_ctrl_ins.o_data_out_SB_DFFESR_Q_R +.sym 3202 spi_if_ins.o_data_in_SB_DFFE_Q_E +.sym 3345 io_ctrl_ins.led0_state_SB_DFFE_Q_E +.sym 3349 spi_if_ins.o_data_in_SB_DFFE_Q_E +.sym 3370 $PACKER_VCC_NET +.sym 3413 $PACKER_VCC_NET +.sym 3450 o_ldo_2v8_en$SB_IO_OUT +.sym 3468 $PACKER_VCC_NET +.sym 3589 w_rx_data[2] +.sym 3590 w_rx_data[0] +.sym 4159 o_shdn_tx_lna$SB_IO_OUT +.sym 4251 lvds_rx_09_inst.r_data_SB_DFFNESR_Q_R[0] +.sym 4796 lvds_rx_09_inst.r_data_SB_DFFNESR_Q_R[0] +.sym 4935 lvds_rx_09_inst.r_data_SB_DFFNESR_Q_R[0] +.sym 4943 io_pmod[5]$SB_IO_OUT +.sym 4952 w_lvds_rx_09_d1_SB_LUT4_I0_O[1] +.sym 4955 w_rx_09_fifo_data[0] +.sym 4963 lvds_rx_09_inst.r_data_SB_DFFNESR_Q_R[0] +.sym 4968 lvds_rx_09_inst.r_data_SB_DFFNESR_Q_R[0] +.sym 4969 io_pmod[5]$SB_IO_OUT +.sym 4973 lvds_rx_09_inst.r_data_SB_DFFNESR_Q_R[0] +.sym 4975 w_rx_09_fifo_data[0] +.sym 5013 w_lvds_rx_09_d1_SB_LUT4_I0_O[1] +.sym 5014 lvds_clock_buf +.sym 5015 lvds_rx_09_inst.r_data_SB_DFFNESR_Q_R[0] +.sym 5028 io_pmod[7]$SB_IO_OUT +.sym 5032 io_pmod[5]$SB_IO_OUT +.sym 5059 lvds_rx_09_inst.r_state_if_SB_DFFNE_Q_E +.sym 5063 w_lvds_rx_09_d1_SB_LUT4_I0_O_SB_LUT4_O_I1[0] +.sym 5065 w_lvds_rx_09_d1_SB_LUT4_I0_O_SB_LUT4_O_I2[2] +.sym 5072 w_lvds_rx_09_d1_SB_LUT4_I0_O_SB_LUT4_O_I2[1] +.sym 5076 lvds_rx_09_inst.r_state_if_SB_DFFNESR_Q_D[1] +.sym 5080 w_lvds_rx_09_d1_SB_LUT4_I0_O_SB_LUT4_O_I2[3] .sym 5086 lvds_rx_09_inst.r_data_SB_DFFNESR_Q_R[0] -.sym 5088 lvds_rx_09_inst.r_phase_count_SB_LUT4_I1_O_SB_DFFNESR_D_Q[2] -.sym 5089 $nextpnr_ICESTORM_LC_0$O -.sym 5092 lvds_rx_09_inst.r_phase_count[0] -.sym 5095 lvds_rx_09_inst.r_phase_count_SB_CARRY_CI_CO[2] -.sym 5097 $PACKER_VCC_NET -.sym 5098 lvds_rx_09_inst.r_phase_count[1] -.sym 5102 lvds_rx_09_inst.r_phase_count_SB_LUT4_I1_O_SB_DFFNESR_D_Q[1] -.sym 5103 lvds_rx_09_inst.r_state_if_SB_DFFNE_Q_E_SB_LUT4_O_I1_SB_LUT4_I2_O[0] -.sym 5104 lvds_rx_09_inst.r_state_if_SB_DFFNE_Q_E_SB_LUT4_O_I1_SB_LUT4_I2_O[2] -.sym 5105 lvds_rx_09_inst.r_phase_count_SB_CARRY_CI_CO[2] -.sym 5110 w_lvds_rx_09_d1_SB_LUT4_I3_I2_SB_LUT4_O_I0[0] -.sym 5116 lvds_rx_09_inst.r_phase_count_SB_LUT4_I1_O_SB_DFFNESR_D_Q[2] -.sym 5127 w_lvds_rx_09_d1_SB_LUT4_I3_I2_SB_LUT4_O_I0[0] -.sym 5128 lvds_rx_09_inst.r_data_SB_DFFNESR_Q_R[0] -.sym 5132 lvds_rx_09_inst.r_phase_count[1] -.sym 5133 lvds_rx_09_inst.r_phase_count[0] -.sym 5134 lvds_rx_09_inst.r_state_if_SB_DFFNE_Q_E_SB_LUT4_O_I1_SB_LUT4_I2_O[0] -.sym 5135 lvds_rx_09_inst.r_state_if_SB_DFFNE_Q_E_SB_LUT4_O_I1_SB_LUT4_I2_O[2] -.sym 5136 w_lvds_rx_09_d1_SB_LUT4_I3_I2_SB_LUT4_O_I0_SB_DFFNESR_Q_E +.sym 5093 lvds_rx_09_inst.r_state_if_SB_DFFNESR_Q_D[1] +.sym 5096 w_lvds_rx_09_d1_SB_LUT4_I0_O_SB_LUT4_O_I2[3] +.sym 5098 w_lvds_rx_09_d1_SB_LUT4_I0_O_SB_LUT4_O_I2[2] +.sym 5102 w_lvds_rx_09_d1_SB_LUT4_I0_O_SB_LUT4_O_I1[0] +.sym 5103 lvds_rx_09_inst.r_state_if_SB_DFFNESR_Q_D[1] +.sym 5104 w_lvds_rx_09_d1_SB_LUT4_I0_O_SB_LUT4_O_I2[1] +.sym 5108 w_lvds_rx_09_d1_SB_LUT4_I0_O_SB_LUT4_O_I2[2] +.sym 5110 w_lvds_rx_09_d1_SB_LUT4_I0_O_SB_LUT4_O_I2[3] +.sym 5114 w_lvds_rx_09_d1_SB_LUT4_I0_O_SB_LUT4_O_I1[0] +.sym 5115 lvds_rx_09_inst.r_state_if_SB_DFFNESR_Q_D[1] +.sym 5116 w_lvds_rx_09_d1_SB_LUT4_I0_O_SB_LUT4_O_I2[1] +.sym 5120 w_lvds_rx_09_d1_SB_LUT4_I0_O_SB_LUT4_O_I2[3] +.sym 5121 w_lvds_rx_09_d1_SB_LUT4_I0_O_SB_LUT4_O_I2[1] +.sym 5122 w_lvds_rx_09_d1_SB_LUT4_I0_O_SB_LUT4_O_I2[2] +.sym 5123 w_lvds_rx_09_d1_SB_LUT4_I0_O_SB_LUT4_O_I1[0] +.sym 5135 w_lvds_rx_09_d1_SB_LUT4_I0_O_SB_LUT4_O_I1[0] +.sym 5136 lvds_rx_09_inst.r_state_if_SB_DFFNE_Q_E .sym 5137 lvds_clock_buf .sym 5138 lvds_rx_09_inst.r_data_SB_DFFNESR_Q_R[0] -.sym 5153 $PACKER_VCC_NET -.sym 5155 spi_if_ins.o_fetch_cmd_SB_DFFESR_Q_E -.sym 5158 io_pmod[6]$SB_IO_OUT -.sym 5161 spi_if_ins.o_cs_SB_LUT4_I2_1_O -.sym 5170 io_pmod[7]$SB_IO_OUT -.sym 5182 w_lvds_rx_09_d1_SB_LUT4_I3_I2[0] -.sym 5183 w_lvds_rx_09_d1_SB_LUT4_I0_O[0] -.sym 5186 w_lvds_rx_09_d1_SB_LUT4_I3_I2_SB_LUT4_O_I0[0] -.sym 5187 lvds_rx_09_inst.r_phase_count_SB_LUT4_I1_O_SB_DFFNESR_D_Q[2] -.sym 5189 lvds_rx_09_inst.r_state_if_SB_DFFNE_Q_E_SB_LUT4_O_I1_SB_LUT4_O_I1[0] -.sym 5190 lvds_rx_09_inst.r_phase_count_SB_LUT4_I1_O_SB_DFFNESR_D_Q[1] -.sym 5193 lvds_rx_09_inst.r_data_SB_DFFNESR_Q_R[0] -.sym 5194 w_lvds_rx_09_d1_SB_LUT4_I3_I2[1] -.sym 5196 lvds_rx_09_inst.r_phase_count_SB_LUT4_I1_O_SB_DFFNESR_D_Q[3] -.sym 5207 lvds_rx_09_inst.r_state_if_SB_DFFNE_Q_E -.sym 5215 w_lvds_rx_09_d1_SB_LUT4_I3_I2[0] -.sym 5216 w_lvds_rx_09_d1_SB_LUT4_I3_I2[1] -.sym 5219 lvds_rx_09_inst.r_phase_count_SB_LUT4_I1_O_SB_DFFNESR_D_Q[2] -.sym 5221 lvds_rx_09_inst.r_phase_count_SB_LUT4_I1_O_SB_DFFNESR_D_Q[1] -.sym 5222 w_lvds_rx_09_d1_SB_LUT4_I3_I2_SB_LUT4_O_I0[0] -.sym 5225 lvds_rx_09_inst.r_phase_count_SB_LUT4_I1_O_SB_DFFNESR_D_Q[3] -.sym 5226 lvds_rx_09_inst.r_phase_count_SB_LUT4_I1_O_SB_DFFNESR_D_Q[1] -.sym 5227 w_lvds_rx_09_d1_SB_LUT4_I3_I2_SB_LUT4_O_I0[0] -.sym 5228 lvds_rx_09_inst.r_phase_count_SB_LUT4_I1_O_SB_DFFNESR_D_Q[2] -.sym 5232 w_lvds_rx_09_d1_SB_LUT4_I3_I2[0] -.sym 5233 w_lvds_rx_09_d1_SB_LUT4_I3_I2[1] -.sym 5234 lvds_rx_09_inst.r_state_if_SB_DFFNE_Q_E_SB_LUT4_O_I1_SB_LUT4_O_I1[0] -.sym 5238 w_lvds_rx_09_d1_SB_LUT4_I3_I2[1] -.sym 5239 w_lvds_rx_09_d1_SB_LUT4_I3_I2[0] -.sym 5243 w_lvds_rx_09_d1_SB_LUT4_I0_O[0] -.sym 5246 lvds_rx_09_inst.r_phase_count_SB_LUT4_I1_O_SB_DFFNESR_D_Q[3] -.sym 5251 lvds_rx_09_inst.r_phase_count_SB_LUT4_I1_O_SB_DFFNESR_D_Q[3] -.sym 5255 lvds_rx_09_inst.r_phase_count_SB_LUT4_I1_O_SB_DFFNESR_D_Q[1] -.sym 5256 lvds_rx_09_inst.r_phase_count_SB_LUT4_I1_O_SB_DFFNESR_D_Q[3] -.sym 5257 lvds_rx_09_inst.r_phase_count_SB_LUT4_I1_O_SB_DFFNESR_D_Q[2] -.sym 5258 w_lvds_rx_09_d1_SB_LUT4_I3_I2_SB_LUT4_O_I0[0] -.sym 5259 lvds_rx_09_inst.r_state_if_SB_DFFNE_Q_E +.sym 5155 lvds_rx_09_inst.r_data_SB_DFFNESR_Q_R[0] +.sym 5182 lvds_rx_09_inst.r_state_if_SB_DFFNESR_Q_D_SB_LUT4_I1_O[2] +.sym 5185 lvds_rx_09_inst.r_state_if_SB_DFFNESR_Q_D_SB_LUT4_I1_O[0] +.sym 5187 lvds_rx_09_inst.r_phase_count[0] +.sym 5188 w_lvds_rx_09_d1_SB_LUT4_I0_O_SB_LUT4_O_I2[2] +.sym 5189 lvds_rx_09_inst.r_data_SB_DFFNESR_Q_R[0] +.sym 5191 w_lvds_rx_09_d1_SB_LUT4_I0_O_SB_LUT4_O_I1_SB_DFFNESR_Q_E +.sym 5193 lvds_rx_09_inst.r_phase_count[1] +.sym 5194 w_lvds_rx_09_d1_SB_LUT4_I0_O_SB_LUT4_O_I1[0] +.sym 5195 w_lvds_rx_09_d1_SB_LUT4_I0_O_SB_LUT4_O_I2[3] +.sym 5198 lvds_rx_09_inst.r_phase_count_SB_LUT4_O_1_I3[0] +.sym 5204 $PACKER_VCC_NET +.sym 5208 lvds_rx_09_inst.r_phase_count_SB_LUT4_O_1_I3[1] +.sym 5209 lvds_rx_09_inst.r_data_SB_DFFNESR_Q_R[0] +.sym 5211 w_lvds_rx_09_d1_SB_LUT4_I0_O_SB_LUT4_O_I2[1] +.sym 5212 $nextpnr_ICESTORM_LC_0$O +.sym 5214 lvds_rx_09_inst.r_phase_count[0] +.sym 5218 lvds_rx_09_inst.r_phase_count_SB_CARRY_CI_CO[2] +.sym 5220 lvds_rx_09_inst.r_phase_count[1] +.sym 5221 $PACKER_VCC_NET +.sym 5225 lvds_rx_09_inst.r_state_if_SB_DFFNESR_Q_D_SB_LUT4_I1_O[2] +.sym 5226 lvds_rx_09_inst.r_state_if_SB_DFFNESR_Q_D_SB_LUT4_I1_O[0] +.sym 5227 lvds_rx_09_inst.r_phase_count_SB_LUT4_O_1_I3[0] +.sym 5228 lvds_rx_09_inst.r_phase_count_SB_CARRY_CI_CO[2] +.sym 5237 lvds_rx_09_inst.r_phase_count[1] +.sym 5238 lvds_rx_09_inst.r_phase_count[0] +.sym 5239 lvds_rx_09_inst.r_state_if_SB_DFFNESR_Q_D_SB_LUT4_I1_O[2] +.sym 5240 lvds_rx_09_inst.r_state_if_SB_DFFNESR_Q_D_SB_LUT4_I1_O[0] +.sym 5243 w_lvds_rx_09_d1_SB_LUT4_I0_O_SB_LUT4_O_I2[2] +.sym 5244 w_lvds_rx_09_d1_SB_LUT4_I0_O_SB_LUT4_O_I2[3] +.sym 5245 w_lvds_rx_09_d1_SB_LUT4_I0_O_SB_LUT4_O_I1[0] +.sym 5246 w_lvds_rx_09_d1_SB_LUT4_I0_O_SB_LUT4_O_I2[1] +.sym 5250 w_lvds_rx_09_d1_SB_LUT4_I0_O_SB_LUT4_O_I1[0] +.sym 5251 lvds_rx_09_inst.r_data_SB_DFFNESR_Q_R[0] +.sym 5255 lvds_rx_09_inst.r_phase_count_SB_LUT4_O_1_I3[1] +.sym 5258 lvds_rx_09_inst.r_phase_count_SB_LUT4_O_1_I3[0] +.sym 5259 w_lvds_rx_09_d1_SB_LUT4_I0_O_SB_LUT4_O_I1_SB_DFFNESR_Q_E .sym 5260 lvds_clock_buf .sym 5261 lvds_rx_09_inst.r_data_SB_DFFNESR_Q_R[0] -.sym 5305 w_lvds_rx_09_d1_SB_LUT4_I0_O[1] -.sym 5307 io_pmod[5]$SB_IO_OUT -.sym 5310 w_lvds_rx_09_d1_SB_LUT4_I0_O[2] -.sym 5314 w_lvds_rx_09_d1_SB_LUT4_I0_O[0] -.sym 5330 w_lvds_rx_09_d1_SB_LUT4_I0_O[2] -.sym 5332 lvds_rx_09_inst.r_data_SB_DFFNESR_Q_R[0] -.sym 5336 w_lvds_rx_09_d1_SB_LUT4_I0_O[0] -.sym 5337 w_lvds_rx_09_d1_SB_LUT4_I0_O[2] -.sym 5338 w_lvds_rx_09_d1_SB_LUT4_I0_O[1] -.sym 5343 lvds_rx_09_inst.r_data_SB_DFFNESR_Q_R[0] -.sym 5345 io_pmod[5]$SB_IO_OUT -.sym 5351 w_lvds_rx_09_d1_SB_LUT4_I0_O[2] -.sym 5382 w_lvds_rx_09_d1_SB_LUT4_I0_O[2] -.sym 5383 lvds_clock_buf -.sym 5384 lvds_rx_09_inst.r_data_SB_DFFNESR_Q_R[0] -.sym 5639 io_ctrl_ins.rf_mode_SB_DFFE_Q_E -.sym 5647 $PACKER_VCC_NET +.sym 5307 lvds_rx_09_inst.r_phase_count_SB_LUT4_O_1_I3[1] +.sym 5369 lvds_rx_09_inst.r_phase_count_SB_LUT4_O_1_I3[1] +.sym 5403 spi_if_ins.o_data_in_SB_DFFE_Q_E +.sym 5643 $PACKER_VCC_NET +.sym 5656 w_rx_data[0] +.sym 5663 spi_if_ins.w_rx_data[2] +.sym 5683 io_ctrl_ins.led0_state_SB_DFFE_Q_E +.sym 5685 w_rx_data[2] +.sym 5712 w_rx_data[2] +.sym 5751 io_ctrl_ins.led0_state_SB_DFFE_Q_E +.sym 5752 r_counter[0]_$glb_clk +.sym 5767 io_ctrl_ins.o_data_out_SB_DFFESR_Q_R +.sym 5770 o_ldo_2v8_en$SB_IO_OUT +.sym 5780 w_rx_data[2] +.sym 5782 w_rx_data[0] +.sym 5797 spi_if_ins.o_data_in_SB_DFFE_Q_E +.sym 5810 spi_if_ins.w_rx_data[0] +.sym 5823 spi_if_ins.w_rx_data[2] +.sym 5858 spi_if_ins.w_rx_data[2] +.sym 5866 spi_if_ins.w_rx_data[0] +.sym 5874 spi_if_ins.o_data_in_SB_DFFE_Q_E +.sym 5875 r_counter[0]_$glb_clk +.sym 5895 i_config_SB_LUT4_I0_I3[2] +.sym 5897 io_ctrl_ins.led0_state_SB_DFFE_Q_E +.sym 5908 w_rx_data[2] +.sym 6012 io_ctrl_ins.rf_pin_state[0] +.sym 6016 io_ctrl_ins.mixer_en_state_SB_LUT4_I1_O[2] +.sym 6023 smi_ctrl_ins.o_data_out_SB_DFFESR_Q_D_SB_LUT4_I2_O +.sym 6145 o_shdn_tx_lna$SB_IO_OUT .sym 6294 o_shdn_tx_lna$SB_IO_OUT -.sym 6301 o_shdn_tx_lna$SB_IO_OUT -.sym 6316 o_shdn_rx_lna$SB_IO_OUT -.sym 6317 o_shdn_tx_lna$SB_IO_OUT -.sym 6378 $PACKER_GND_NET -.sym 6771 spi_if_ins.state_if[0] -.sym 6866 i_config_SB_LUT4_I3_O_SB_LUT4_O_I0[3] -.sym 6868 spi_if_ins.o_load_cmd_SB_DFFESR_Q_E -.sym 6870 spi_if_ins.state_if_SB_DFFESR_Q_R -.sym 6929 i_config_SB_LUT4_I3_O_SB_LUT4_O_I0[3] -.sym 6975 i_config_SB_LUT4_I3_O_SB_LUT4_O_I0[0] -.sym 7013 io_pmod[7]$SB_IO_OUT -.sym 7029 i_config_SB_LUT4_I3_O_SB_LUT4_O_I0[0] -.sym 7072 spi_if_ins.o_load_cmd_SB_DFFESR_Q_D_SB_LUT4_I1_O[2] -.sym 7117 i_config_SB_LUT4_I3_O_SB_LUT4_O_I0[0] +.sym 6310 o_shdn_tx_lna$SB_IO_OUT +.sym 6381 $PACKER_GND_NET +.sym 6920 spi_if_ins.r_tx_data_valid_SB_DFFESR_Q_D[0] +.sym 6974 spi_if_ins.o_load_cmd_SB_DFFESR_Q_D[1] +.sym 7073 spi_if_ins.state_if_SB_DFFE_Q_E +.sym 7074 spi_if_ins.state_if[0] +.sym 7075 spi_if_ins.state_if_SB_DFFESR_Q_1_D[1] +.sym 7132 spi_if_ins.o_load_cmd_SB_DFFESR_Q_D[1] .sym 7174 w_tx_data_smi[0] -.sym 7176 w_tx_data_smi[1] -.sym 7177 smi_ctrl_ins.o_data_out_SB_DFFESR_Q_R -.sym 7276 i_config_SB_LUT4_I3_O[3] -.sym 7279 io_ctrl_ins.led0_state_SB_LUT4_I3_O[3] -.sym 7312 smi_ctrl_ins.o_data_out_SB_DFFESR_Q_E -.sym 7337 io_ctrl_ins.o_pmod[0] -.sym 7376 io_ctrl_ins.pmod_dir_state[4] -.sym 7378 io_ctrl_ins.led1_state_SB_LUT4_I3_O[3] -.sym 7379 io_ctrl_ins.pmod_dir_state[1] -.sym 7380 io_ctrl_ins.pmod_dir_state[0] -.sym 7381 io_ctrl_ins.tr_vc_1_b_state_SB_LUT4_I0_I2[3] -.sym 7382 io_ctrl_ins.ldo2v8_state_SB_LUT4_I3_O[0] -.sym 7383 io_ctrl_ins.pmod_dir_state[3] -.sym 7432 io_ctrl_ins.o_pmod[3] -.sym 7478 io_ctrl_ins.o_pmod[2] -.sym 7479 io_ctrl_ins.o_pmod[1] -.sym 7481 io_ctrl_ins.led0_state_SB_DFFE_Q_E -.sym 7482 io_ctrl_ins.o_pmod[0] -.sym 7483 io_ctrl_ins.o_pmod[4] -.sym 7485 io_ctrl_ins.o_pmod[3] -.sym 7521 w_rx_data[2] -.sym 7524 w_rx_data[0] -.sym 7618 spi_if_ins.o_load_cmd_SB_LUT4_I3_1_O -.sym 7626 w_rx_data[1] -.sym 7637 w_rx_data[3] -.sym 7834 io_ctrl_ins.rx_h_state_SB_DFFE_Q_E +.sym 7177 spi_if_ins.o_load_cmd_SB_DFFESR_Q_D_SB_LUT4_I1_O[1] +.sym 7178 spi_if_ins.o_data_in_SB_DFFE_Q_E +.sym 7179 w_tx_data_smi[1] +.sym 7234 spi_if_ins.spi.r3_rx_done_SB_LUT4_I2_O +.sym 7236 w_cs[2] +.sym 7275 spi_if_ins.r_tx_data_valid_SB_DFFESR_Q_D[0] +.sym 7277 spi_if_ins.o_fetch_cmd_SB_DFFESR_Q_E +.sym 7278 spi_if_ins.state_if_SB_DFFESR_Q_R +.sym 7280 smi_ctrl_ins.o_data_out_SB_DFFESR_Q_R +.sym 7317 spi_if_ins.o_data_in_SB_DFFE_Q_E +.sym 7339 spi_if_ins.r_tx_data_valid_SB_DFFESR_Q_D[0] +.sym 7380 w_fetch +.sym 7422 spi_if_ins.spi.r3_rx_done_SB_LUT4_I2_O +.sym 7429 spi_if_ins.w_rx_data[2] +.sym 7440 io_ctrl_ins.led1_state_SB_LUT4_I0_O_SB_LUT4_O_I2[0] +.sym 7480 io_ctrl_ins.rf_pin_state[2] +.sym 7485 io_ctrl_ins.led1_state_SB_LUT4_I0_O[0] +.sym 7537 spi_if_ins.w_rx_data[2] +.sym 7581 io_ctrl_ins.o_data_out_SB_DFFESR_Q_3_D_SB_LUT4_O_I2[0] +.sym 7582 io_ctrl_ins.rf_pin_state_SB_DFFE_Q_E +.sym 7583 io_ctrl_ins.led1_state_SB_LUT4_I0_O_SB_LUT4_O_I2[2] +.sym 7584 w_ioc[2] +.sym 7586 i_config_SB_LUT4_I0_I3[2] +.sym 7630 w_rx_data[2] +.sym 7643 io_ctrl_ins.mixer_en_state +.sym 7684 io_ctrl_ins.rf_pin_state[3] +.sym 7685 io_ctrl_ins.tr_vc_1_b_state_SB_LUT4_I1_O[2] +.sym 7686 io_ctrl_ins.rf_pin_state[0] +.sym 7687 io_ctrl_ins.mixer_en_state_SB_LUT4_I1_O[2] +.sym 7688 io_ctrl_ins.rf_pin_state[1] +.sym 7725 i_config_SB_LUT4_I0_I3[2] +.sym 7728 w_rx_data[3] +.sym 7729 io_ctrl_ins.led1_state_SB_LUT4_I0_O_SB_LUT4_O_I2[3] +.sym 7733 io_ctrl_ins.o_data_out_SB_DFFESR_Q_3_D_SB_LUT4_O_I2[0] +.sym 7741 io_ctrl_ins.rf_pin_state[1] +.sym 7747 o_shdn_rx_lna$SB_IO_OUT +.sym 7784 io_ctrl_ins.rx_h_state_SB_DFFE_Q_D_SB_LUT4_O_I2[3] +.sym 7786 io_ctrl_ins.rx_h_state_SB_DFFE_Q_E +.sym 7790 io_ctrl_ins.lna_tx_shutdown_state_SB_LUT4_I1_O[0] +.sym 7834 w_rx_data[0] +.sym 7891 o_shdn_rx_lna$SB_IO_OUT +.sym 7935 w_rx_data[0] +.sym 7939 w_rx_data[2] +.sym 7946 io_ctrl_ins.pmod_state_SB_DFFE_Q_E .sym 8093 $PACKER_GND_NET -.sym 8106 $PACKER_GND_NET -.sym 8272 $PACKER_GND_NET -.sym 8431 spi_if_ins.state_if_SB_DFFE_Q_E -.sym 8432 $PACKER_GND_NET -.sym 8556 spi_if_ins.o_load_cmd_SB_DFFESR_Q_D[3] -.sym 8652 spi_if_ins.state_if[1] -.sym 8653 spi_if_ins.r_tx_data_valid_SB_DFFESR_Q_D[1] -.sym 8654 spi_if_ins.state_if_SB_DFFESR_Q_D[0] -.sym 8657 spi_if_ins.o_load_cmd_SB_DFFESR_Q_D_SB_LUT4_I1_O[1] -.sym 8677 spi_if_ins.o_data_in_SB_DFFE_Q_E -.sym 8680 i_config_SB_LUT4_I3_O_SB_LUT4_O_I0[3] -.sym 8696 spi_if_ins.state_if_SB_DFFESR_Q_R -.sym 8703 spi_if_ins.state_if_SB_DFFE_Q_E -.sym 8711 spi_if_ins.state_if_SB_DFFESR_Q_D[0] -.sym 8767 spi_if_ins.state_if_SB_DFFESR_Q_D[0] -.sym 8771 spi_if_ins.state_if_SB_DFFE_Q_E -.sym 8772 r_counter[0]_$glb_clk -.sym 8773 spi_if_ins.state_if_SB_DFFESR_Q_R -.sym 8778 spi_if_ins.o_load_cmd_SB_DFFESR_Q_D[0] -.sym 8779 spi_if_ins.state_if_SB_DFFE_Q_E -.sym 8780 spi_if_ins.o_load_cmd_SB_DFFESR_Q_D[2] -.sym 8781 spi_if_ins.o_data_in_SB_DFFE_Q_E -.sym 8795 spi_if_ins.o_load_cmd_SB_DFFESR_Q_D[1] -.sym 8801 i_config_SB_LUT4_I3_O_SB_LUT4_O_I0[0] -.sym 8805 spi_if_ins.o_cs_SB_LUT4_I2_1_O -.sym 8806 i_config_SB_LUT4_I3_O_SB_LUT4_O_I0[3] -.sym 8819 spi_if_ins.state_if_SB_DFFESR_Q_R -.sym 8820 spi_if_ins.o_load_cmd_SB_DFFESR_Q_D[3] -.sym 8822 spi_if_ins.state_if[0] -.sym 8824 spi_if_ins.state_if[1] -.sym 8833 spi_if_ins.o_load_cmd_SB_DFFESR_Q_E -.sym 8835 spi_if_ins.o_load_cmd_SB_DFFESR_Q_D[0] -.sym 8845 spi_if_ins.o_load_cmd_SB_DFFESR_Q_D[2] -.sym 8851 spi_if_ins.o_load_cmd_SB_DFFESR_Q_D[2] -.sym 8860 spi_if_ins.state_if[1] -.sym 8861 spi_if_ins.o_load_cmd_SB_DFFESR_Q_D[3] -.sym 8862 spi_if_ins.o_load_cmd_SB_DFFESR_Q_D[0] -.sym 8863 spi_if_ins.state_if[0] -.sym 8875 spi_if_ins.o_load_cmd_SB_DFFESR_Q_D[3] -.sym 8894 spi_if_ins.o_load_cmd_SB_DFFESR_Q_E -.sym 8895 r_counter[0]_$glb_clk -.sym 8896 spi_if_ins.state_if_SB_DFFESR_Q_R -.sym 8897 spi_if_ins.state_if_SB_DFFESR_Q_1_D[2] -.sym 8898 r_tx_data[3] -.sym 8899 r_tx_data[6] -.sym 8901 spi_if_ins.o_fetch_cmd_SB_DFFESR_Q_E -.sym 8902 r_tx_data[4] -.sym 8903 spi_if_ins.o_load_cmd_SB_DFFESR_Q_D_SB_LUT4_I1_O[2] -.sym 8904 r_tx_data[1] -.sym 8916 spi_if_ins.o_load_cmd_SB_DFFESR_Q_D[3] -.sym 8924 $PACKER_GND_NET -.sym 8927 spi_if_ins.state_if_SB_DFFE_Q_E -.sym 8929 w_tx_data_smi[1] -.sym 8932 io_ctrl_ins.o_data_out_SB_DFFESR_Q_E -.sym 8942 spi_if_ins.state_if_SB_DFFESR_Q_R -.sym 8950 spi_if_ins.o_load_cmd_SB_DFFESR_Q_D[0] -.sym 8952 spi_if_ins.o_load_cmd_SB_DFFESR_Q_D[2] -.sym 8956 spi_if_ins.o_fetch_cmd_SB_DFFESR_Q_E -.sym 9013 spi_if_ins.o_load_cmd_SB_DFFESR_Q_D[0] -.sym 9015 spi_if_ins.o_load_cmd_SB_DFFESR_Q_D[2] -.sym 9017 spi_if_ins.o_fetch_cmd_SB_DFFESR_Q_E +.sym 8117 $PACKER_GND_NET +.sym 8257 spi_if_ins.o_load_cmd_SB_DFFESR_Q_D[1] +.sym 8923 smi_ctrl_ins.o_data_out_SB_DFFESR_Q_E +.sym 8925 spi_if_ins.o_load_cmd_SB_DFFESR_Q_E +.sym 8942 spi_if_ins.r_tx_data_valid_SB_DFFESR_Q_D[0] +.sym 8943 spi_if_ins.state_if_SB_DFFESR_Q_1_D[1] +.sym 8949 spi_if_ins.state_if_SB_DFFE_Q_E +.sym 9008 spi_if_ins.state_if_SB_DFFESR_Q_1_D[1] +.sym 9017 spi_if_ins.state_if_SB_DFFE_Q_E .sym 9018 r_counter[0]_$glb_clk -.sym 9019 spi_if_ins.state_if_SB_DFFESR_Q_R -.sym 9020 spi_if_ins.o_cs_SB_LUT4_I1_1_O[0] -.sym 9021 w_cs[2] -.sym 9022 smi_ctrl_ins.o_data_out_SB_LUT4_I0_2_O[0] -.sym 9023 spi_if_ins.o_cs_SB_LUT4_I2_1_O -.sym 9024 w_cs[3] -.sym 9026 spi_if_ins.o_cs_SB_LUT4_I1_O[1] -.sym 9027 spi_if_ins.o_cs_SB_LUT4_I2_O -.sym 9042 w_tx_data_io[6] -.sym 9047 w_tx_data_io[1] -.sym 9051 spi_if_ins.o_load_cmd_SB_DFFESR_Q_D[3] -.sym 9053 spi_if_ins.w_rx_data[4] -.sym 9055 i_config_SB_LUT4_I3_O_SB_LUT4_O_I0[0] -.sym 9067 spi_if_ins.o_load_cmd_SB_DFFESR_Q_D_SB_LUT4_I1_O[2] -.sym 9106 spi_if_ins.o_load_cmd_SB_DFFESR_Q_D_SB_LUT4_I1_O[2] -.sym 9144 w_ioc[4] -.sym 9147 w_cs[0] -.sym 9148 io_ctrl_ins.o_data_out_SB_DFFESR_Q_E -.sym 9149 smi_ctrl_ins.o_data_out_SB_DFFESR_Q_E -.sym 9150 smi_ctrl_ins.o_data_out_SB_LUT4_I0_2_O[1] -.sym 9160 spi_if_ins.o_cs_SB_LUT4_I2_O -.sym 9165 i_config_SB_LUT4_I3_O_SB_LUT4_O_I0[3] -.sym 9167 w_tx_data_io[4] -.sym 9169 spi_if_ins.o_data_in_SB_DFFE_Q_E -.sym 9172 i_config_SB_LUT4_I3_O_SB_LUT4_O_I0[3] -.sym 9177 io_ctrl_ins.tr_vc_1_b_state_SB_LUT4_I0_I2[3] -.sym 9185 w_cs[2] +.sym 9019 spi_if_ins.r_tx_data_valid_SB_DFFESR_Q_D[0] +.sym 9020 spi_if_ins.o_load_cmd_SB_DFFESR_Q_E +.sym 9021 spi_if_ins.state_if_SB_DFFESR_Q_D[0] +.sym 9022 spi_if_ins.r_tx_data_valid_SB_DFFESR_Q_D[1] +.sym 9023 spi_if_ins.spi.r_rx_done_SB_DFFER_Q_D_SB_LUT4_I3_O +.sym 9025 spi_if_ins.state_if[1] +.sym 9043 spi_if_ins.spi.r3_rx_done_SB_LUT4_I2_O +.sym 9046 spi_if_ins.r_tx_data_valid_SB_DFFESR_Q_D[0] +.sym 9049 smi_ctrl_ins.o_data_out_SB_DFFESR_Q_D[4] +.sym 9053 spi_if_ins.o_load_cmd_SB_DFFESR_Q_D[1] +.sym 9064 spi_if_ins.r_tx_data_valid_SB_DFFESR_Q_D[0] +.sym 9067 spi_if_ins.o_load_cmd_SB_DFFESR_Q_D[1] +.sym 9072 spi_if_ins.state_if_SB_DFFE_Q_E +.sym 9081 spi_if_ins.state_if[0] +.sym 9082 spi_if_ins.state_if[1] +.sym 9086 spi_if_ins.state_if_SB_DFFESR_Q_D[0] +.sym 9090 spi_if_ins.state_if_SB_DFFESR_Q_R +.sym 9112 spi_if_ins.r_tx_data_valid_SB_DFFESR_Q_D[0] +.sym 9113 spi_if_ins.state_if[0] +.sym 9114 spi_if_ins.state_if[1] +.sym 9115 spi_if_ins.o_load_cmd_SB_DFFESR_Q_D[1] +.sym 9120 spi_if_ins.state_if_SB_DFFESR_Q_D[0] +.sym 9124 spi_if_ins.state_if[1] +.sym 9125 spi_if_ins.state_if[0] +.sym 9127 spi_if_ins.o_load_cmd_SB_DFFESR_Q_D[1] +.sym 9140 spi_if_ins.state_if_SB_DFFE_Q_E +.sym 9141 r_counter[0]_$glb_clk +.sym 9142 spi_if_ins.state_if_SB_DFFESR_Q_R +.sym 9144 spi_if_ins.o_load_cmd_SB_DFFESR_Q_D[0] +.sym 9147 w_load +.sym 9148 spi_if_ins.state_if_SB_DFFESR_Q_R +.sym 9150 spi_if_ins.r_tx_data_valid_SB_DFFESR_Q_E +.sym 9169 spi_if_ins.o_load_cmd_SB_DFFESR_Q_D_SB_LUT4_I1_O[0] +.sym 9178 spi_if_ins.o_load_cmd_SB_DFFESR_Q_D[0] +.sym 9185 spi_if_ins.r_tx_data_valid_SB_DFFESR_Q_D[0] +.sym 9188 spi_if_ins.o_load_cmd_SB_DFFESR_Q_D[1] +.sym 9189 spi_if_ins.state_if[1] +.sym 9193 spi_if_ins.r_tx_data_valid_SB_DFFESR_Q_D[0] .sym 9195 smi_ctrl_ins.o_data_out_SB_DFFESR_Q_E -.sym 9205 i_config_SB_LUT4_I3_I1[4] +.sym 9196 spi_if_ins.state_if[0] +.sym 9197 spi_if_ins.state_if_SB_DFFESR_Q_1_D[1] +.sym 9209 smi_ctrl_ins.o_data_out_SB_DFFESR_Q_D[4] .sym 9213 smi_ctrl_ins.o_data_out_SB_DFFESR_Q_R -.sym 9232 i_config_SB_LUT4_I3_I1[4] -.sym 9242 i_config_SB_LUT4_I3_I1[4] -.sym 9249 w_cs[2] +.sym 9231 smi_ctrl_ins.o_data_out_SB_DFFESR_Q_D[4] +.sym 9248 spi_if_ins.state_if_SB_DFFESR_Q_1_D[1] +.sym 9249 spi_if_ins.r_tx_data_valid_SB_DFFESR_Q_D[0] +.sym 9253 spi_if_ins.o_load_cmd_SB_DFFESR_Q_D[1] +.sym 9254 spi_if_ins.state_if[0] +.sym 9255 spi_if_ins.r_tx_data_valid_SB_DFFESR_Q_D[0] +.sym 9256 spi_if_ins.state_if[1] +.sym 9262 smi_ctrl_ins.o_data_out_SB_DFFESR_Q_D[4] .sym 9263 smi_ctrl_ins.o_data_out_SB_DFFESR_Q_E .sym 9264 r_counter[0]_$glb_clk .sym 9265 smi_ctrl_ins.o_data_out_SB_DFFESR_Q_R -.sym 9266 w_tx_data_io[2] -.sym 9267 w_tx_data_io[1] -.sym 9268 w_tx_data_io[0] -.sym 9269 io_ctrl_ins.ldo2v8_state_SB_LUT4_I3_O[1] -.sym 9270 w_tx_data_io[3] -.sym 9271 i_config_SB_LUT4_I3_I1[4] -.sym 9272 w_tx_data_io[4] -.sym 9273 i_config_SB_LUT4_I3_O_SB_LUT4_O_1_I2[1] -.sym 9286 i_config_SB_LUT4_I3_O_SB_LUT4_O_I0[0] -.sym 9293 i_config_SB_LUT4_I3_O_SB_LUT4_O_I0[0] -.sym 9294 i_config_SB_LUT4_I3_O_SB_LUT4_O_I0[3] -.sym 9297 i_config_SB_LUT4_I3_O_SB_LUT4_O_1_I2[1] -.sym 9311 io_ctrl_ins.pmod_dir_state[0] -.sym 9322 io_ctrl_ins.pmod_dir_state[3] -.sym 9323 i_config_SB_LUT4_I3_O_SB_LUT4_O_I0[2] -.sym 9326 io_ctrl_ins.ldo2v8_state_SB_LUT4_I3_O[1] -.sym 9331 io_ctrl_ins.o_pmod[0] -.sym 9337 io_ctrl_ins.o_pmod[3] -.sym 9352 io_ctrl_ins.pmod_dir_state[3] -.sym 9353 io_ctrl_ins.o_pmod[3] -.sym 9354 i_config_SB_LUT4_I3_O_SB_LUT4_O_I0[2] -.sym 9355 io_ctrl_ins.ldo2v8_state_SB_LUT4_I3_O[1] -.sym 9370 io_ctrl_ins.o_pmod[0] -.sym 9371 i_config_SB_LUT4_I3_O_SB_LUT4_O_I0[2] -.sym 9372 io_ctrl_ins.ldo2v8_state_SB_LUT4_I3_O[1] -.sym 9373 io_ctrl_ins.pmod_dir_state[0] -.sym 9389 i_config_SB_LUT4_I3_O_SB_LUT4_O_I0[2] -.sym 9391 w_rx_data[7] -.sym 9392 w_rx_data[6] -.sym 9393 io_ctrl_ins.led1_state_SB_LUT4_I3_O[2] -.sym 9394 w_rx_data[0] -.sym 9395 w_rx_data[5] -.sym 9396 w_rx_data[4] -.sym 9401 o_tr_vc2$SB_IO_OUT -.sym 9404 io_ctrl_ins.ldo2v8_state_SB_LUT4_I3_O[1] -.sym 9406 i_config_SB_LUT4_I3_O_SB_LUT4_O_1_I2[1] -.sym 9413 i_config_SB_LUT4_I3_O_SB_LUT4_O_I0[1] -.sym 9420 io_ctrl_ins.o_data_out_SB_DFFESR_Q_E -.sym 9433 io_ctrl_ins.ldo2v8_state_SB_LUT4_I3_O[1] -.sym 9436 w_rx_data[1] -.sym 9438 io_ctrl_ins.pmod_dir_state[4] -.sym 9439 io_ctrl_ins.o_pmod[1] -.sym 9440 w_rx_data[3] -.sym 9442 w_rx_data[2] -.sym 9443 io_ctrl_ins.o_pmod[4] -.sym 9446 i_config_SB_LUT4_I3_O_SB_LUT4_O_I0[2] -.sym 9448 spi_if_ins.o_load_cmd_SB_LUT4_I3_2_O -.sym 9449 io_ctrl_ins.pmod_dir_state[1] -.sym 9451 w_rx_data[0] -.sym 9453 w_rx_data[4] -.sym 9466 w_rx_data[4] -.sym 9475 i_config_SB_LUT4_I3_O_SB_LUT4_O_I0[2] -.sym 9476 io_ctrl_ins.ldo2v8_state_SB_LUT4_I3_O[1] -.sym 9477 io_ctrl_ins.o_pmod[1] -.sym 9478 io_ctrl_ins.pmod_dir_state[1] -.sym 9482 w_rx_data[1] -.sym 9490 w_rx_data[0] -.sym 9493 io_ctrl_ins.pmod_dir_state[4] -.sym 9494 i_config_SB_LUT4_I3_O_SB_LUT4_O_I0[2] -.sym 9495 io_ctrl_ins.ldo2v8_state_SB_LUT4_I3_O[1] -.sym 9496 io_ctrl_ins.o_pmod[4] -.sym 9502 w_rx_data[2] -.sym 9505 w_rx_data[3] -.sym 9509 spi_if_ins.o_load_cmd_SB_LUT4_I3_2_O +.sym 9269 spi_if_ins.w_rx_data[4] +.sym 9272 spi_if_ins.state_if_SB_DFFESR_Q_1_D_SB_LUT4_I3_O[1] +.sym 9273 spi_if_ins.o_load_cmd_SB_DFFESR_Q_D_SB_LUT4_I1_O[0] +.sym 9284 w_tx_data_smi[0] +.sym 9297 spi_if_ins.o_load_cmd_SB_DFFESR_Q_D_SB_LUT4_I1_O[0] +.sym 9300 spi_if_ins.r_tx_data_valid_SB_DFFESR_Q_D[0] +.sym 9301 w_tx_data_smi[1] +.sym 9311 spi_if_ins.spi.r3_rx_done_SB_LUT4_I2_O +.sym 9312 spi_if_ins.state_if_SB_DFFESR_Q_R +.sym 9313 w_cs[2] +.sym 9320 spi_if_ins.o_load_cmd_SB_DFFESR_Q_D_SB_LUT4_I1_O[1] +.sym 9337 spi_if_ins.state_if_SB_DFFESR_Q_1_D_SB_LUT4_I3_O[1] +.sym 9347 spi_if_ins.spi.r3_rx_done_SB_LUT4_I2_O +.sym 9359 spi_if_ins.o_load_cmd_SB_DFFESR_Q_D_SB_LUT4_I1_O[1] +.sym 9360 spi_if_ins.state_if_SB_DFFESR_Q_1_D_SB_LUT4_I3_O[1] +.sym 9365 spi_if_ins.state_if_SB_DFFESR_Q_R +.sym 9378 w_cs[2] +.sym 9387 r_counter[0]_$glb_clk +.sym 9393 smi_ctrl_ins.o_data_out_SB_DFFESR_Q_E +.sym 9395 w_tx_data_io[1] +.sym 9405 spi_if_ins.r_tx_data_valid_SB_DFFESR_Q_D[0] +.sym 9407 spi_if_ins.w_rx_data[2] +.sym 9409 spi_if_ins.state_if_SB_DFFESR_Q_D[1] +.sym 9413 w_fetch +.sym 9414 smi_ctrl_ins.o_data_out_SB_DFFESR_Q_E +.sym 9415 spi_if_ins.w_rx_data[4] +.sym 9416 spi_if_ins.o_data_in_SB_DFFE_Q_E +.sym 9421 w_ioc[2] +.sym 9422 smi_ctrl_ins.o_data_out_SB_DFFESR_Q_R +.sym 9434 spi_if_ins.state_if_SB_DFFESR_Q_R +.sym 9441 spi_if_ins.o_fetch_cmd_SB_DFFESR_Q_E +.sym 9448 spi_if_ins.o_load_cmd_SB_DFFESR_Q_D[0] +.sym 9450 spi_if_ins.o_load_cmd_SB_DFFESR_Q_D[1] +.sym 9487 spi_if_ins.o_load_cmd_SB_DFFESR_Q_D[1] +.sym 9489 spi_if_ins.o_load_cmd_SB_DFFESR_Q_D[0] +.sym 9509 spi_if_ins.o_fetch_cmd_SB_DFFESR_Q_E .sym 9510 r_counter[0]_$glb_clk -.sym 9512 spi_if_ins.o_load_cmd_SB_LUT4_I3_2_O -.sym 9513 o_ldo_2v8_en$SB_IO_OUT -.sym 9514 spi_if_ins.o_load_cmd_SB_LUT4_I3_2_O -.sym 9515 io_ctrl_ins.ldo2v8_state_SB_LUT4_I3_O[2] -.sym 9516 o_led0$SB_IO_OUT -.sym 9517 o_led1$SB_IO_OUT -.sym 9518 io_ctrl_ins.led0_state_SB_DFFE_Q_E -.sym 9519 w_rx_data[2] -.sym 9527 spi_if_ins.w_rx_data[5] -.sym 9528 w_rx_data[3] -.sym 9530 spi_if_ins.w_rx_data[4] -.sym 9532 w_rx_data[1] -.sym 9535 w_rx_data[7] -.sym 9537 spi_if_ins.w_rx_data[6] -.sym 9544 o_tr_vc1_b$SB_IO_OUT -.sym 9558 w_rx_data[0] -.sym 9560 w_rx_data[1] -.sym 9564 spi_if_ins.o_load_cmd_SB_LUT4_I3_O -.sym 9568 w_rx_data[4] -.sym 9576 w_rx_data[3] -.sym 9583 io_ctrl_ins.led0_state_SB_DFFE_Q_E -.sym 9584 w_rx_data[2] -.sym 9586 w_rx_data[2] -.sym 9592 w_rx_data[1] -.sym 9604 io_ctrl_ins.led0_state_SB_DFFE_Q_E -.sym 9613 w_rx_data[0] -.sym 9617 w_rx_data[4] -.sym 9630 w_rx_data[3] -.sym 9632 spi_if_ins.o_load_cmd_SB_LUT4_I3_O +.sym 9511 spi_if_ins.state_if_SB_DFFESR_Q_R +.sym 9514 io_ctrl_ins.o_data_out_SB_DFFESR_Q_R +.sym 9515 r_tx_data[3] +.sym 9516 io_ctrl_ins.o_data_out_SB_DFFESR_Q_E +.sym 9520 r_tx_data_SB_DFFESR_Q_E +.sym 9527 w_cs[2] +.sym 9536 smi_ctrl_ins.o_data_out_SB_DFFESR_Q_D[4] +.sym 9537 i_config_SB_LUT4_I0_I3[2] +.sym 9542 spi_if_ins.w_rx_data[1] +.sym 9555 io_ctrl_ins.rf_pin_state_SB_DFFE_Q_E +.sym 9556 w_rx_data[2] +.sym 9559 io_ctrl_ins.led1_state_SB_LUT4_I0_O_SB_LUT4_O_I2[0] +.sym 9563 io_ctrl_ins.led1_state_SB_LUT4_I0_O_SB_LUT4_O_I2[3] +.sym 9564 io_ctrl_ins.led1_state_SB_LUT4_I0_O_SB_LUT4_O_I2[2] +.sym 9567 i_config_SB_LUT4_I0_I3[2] +.sym 9599 w_rx_data[2] +.sym 9628 io_ctrl_ins.led1_state_SB_LUT4_I0_O_SB_LUT4_O_I2[3] +.sym 9629 io_ctrl_ins.led1_state_SB_LUT4_I0_O_SB_LUT4_O_I2[2] +.sym 9630 i_config_SB_LUT4_I0_I3[2] +.sym 9631 io_ctrl_ins.led1_state_SB_LUT4_I0_O_SB_LUT4_O_I2[0] +.sym 9632 io_ctrl_ins.rf_pin_state_SB_DFFE_Q_E .sym 9633 r_counter[0]_$glb_clk -.sym 9652 spi_if_ins.o_load_cmd_SB_LUT4_I3_O -.sym 9654 $PACKER_VCC_NET -.sym 9660 smi_ctrl_ins.o_data_out_SB_DFFESR_Q_E_SB_LUT4_O_I1_SB_LUT4_I1_O[2] -.sym 9770 io_ctrl_ins.pmod_dir_state[5] -.sym 9774 io_ctrl_ins.pmod_dir_state[7] +.sym 9635 io_ctrl_ins.rf_pin_state_SB_DFFE_Q_E +.sym 9637 io_ctrl_ins.led0_state_SB_LUT4_I0_O[1] +.sym 9638 w_rx_data[4] +.sym 9639 io_ctrl_ins.o_data_out_SB_DFFESR_Q_6_E_SB_LUT4_O_I1[0] +.sym 9640 w_rx_data[3] +.sym 9641 smi_ctrl_ins.o_data_out_SB_DFFESR_Q_D[4] +.sym 9642 w_rx_data[1] +.sym 9647 w_cs[1] +.sym 9652 spi_if_ins.o_cs_SB_LUT4_I1_O[1] +.sym 9660 io_ctrl_ins.rf_pin_state[2] +.sym 9662 o_tr_vc1_b$SB_IO_OUT +.sym 9668 io_ctrl_ins.rf_pin_state[3] +.sym 9677 spi_if_ins.w_rx_data[2] +.sym 9679 io_ctrl_ins.tr_vc_1_b_state_SB_LUT4_I1_O[2] +.sym 9682 io_ctrl_ins.led1_state_SB_LUT4_I0_O_SB_LUT4_O_I2[3] +.sym 9685 io_ctrl_ins.o_pmod[4] +.sym 9688 spi_if_ins.w_rx_data[0] +.sym 9692 io_ctrl_ins.rf_pin_state_SB_DFFE_Q_E +.sym 9703 spi_if_ins.o_load_cmd_SB_DFFESR_Q_D_SB_LUT4_I1_O[0] +.sym 9704 w_ioc[2] +.sym 9705 io_ctrl_ins.debug_mode[1] +.sym 9706 i_config_SB_LUT4_I0_I3[2] +.sym 9707 o_shdn_rx_lna$SB_IO_OUT +.sym 9715 io_ctrl_ins.tr_vc_1_b_state_SB_LUT4_I1_O[2] +.sym 9716 io_ctrl_ins.o_pmod[4] +.sym 9717 i_config_SB_LUT4_I0_I3[2] +.sym 9718 io_ctrl_ins.led1_state_SB_LUT4_I0_O_SB_LUT4_O_I2[3] +.sym 9723 io_ctrl_ins.rf_pin_state_SB_DFFE_Q_E +.sym 9727 i_config_SB_LUT4_I0_I3[2] +.sym 9728 io_ctrl_ins.debug_mode[1] +.sym 9729 w_ioc[2] +.sym 9730 o_shdn_rx_lna$SB_IO_OUT +.sym 9734 spi_if_ins.w_rx_data[2] +.sym 9746 spi_if_ins.w_rx_data[0] +.sym 9755 spi_if_ins.o_load_cmd_SB_DFFESR_Q_D_SB_LUT4_I1_O[0] +.sym 9756 r_counter[0]_$glb_clk +.sym 9758 io_ctrl_ins.lna_tx_shutdown_state_SB_LUT4_I1_O[2] +.sym 9760 io_ctrl_ins.tr_vc_2_state_SB_LUT4_I1_O[2] +.sym 9761 io_ctrl_ins.rf_mode[2] +.sym 9763 io_ctrl_ins.debug_mode[1] +.sym 9764 smi_ctrl_ins.o_data_out_SB_DFFESR_Q_D_SB_LUT4_I2_O +.sym 9773 w_rx_data[4] +.sym 9776 spi_if_ins.w_rx_data[0] +.sym 9778 io_ctrl_ins.led1_state_SB_LUT4_I0_O_SB_LUT4_O_I2[0] +.sym 9780 w_ioc[2] +.sym 9781 io_ctrl_ins.o_pmod[4] +.sym 9787 w_ioc[2] +.sym 9788 w_rx_data[3] +.sym 9789 spi_if_ins.o_load_cmd_SB_DFFESR_Q_D_SB_LUT4_I1_O[0] +.sym 9801 io_ctrl_ins.rf_pin_state_SB_DFFE_Q_E +.sym 9802 w_rx_data[0] +.sym 9803 w_ioc[2] +.sym 9804 io_ctrl_ins.mixer_en_state +.sym 9805 i_config_SB_LUT4_I0_I3[2] +.sym 9811 w_ioc[2] +.sym 9812 w_rx_data[3] +.sym 9814 w_rx_data[1] +.sym 9818 io_ctrl_ins.rf_mode[2] +.sym 9822 o_tr_vc1_b$SB_IO_OUT +.sym 9826 io_ctrl_ins.debug_mode[0] +.sym 9844 w_rx_data[3] +.sym 9850 o_tr_vc1_b$SB_IO_OUT +.sym 9851 i_config_SB_LUT4_I0_I3[2] +.sym 9852 io_ctrl_ins.rf_mode[2] +.sym 9853 w_ioc[2] +.sym 9857 w_rx_data[0] +.sym 9862 io_ctrl_ins.mixer_en_state +.sym 9863 i_config_SB_LUT4_I0_I3[2] +.sym 9864 w_ioc[2] +.sym 9865 io_ctrl_ins.debug_mode[0] +.sym 9868 w_rx_data[1] +.sym 9878 io_ctrl_ins.rf_pin_state_SB_DFFE_Q_E +.sym 9879 r_counter[0]_$glb_clk +.sym 9881 io_ctrl_ins.rx_h_state_SB_DFFE_Q_D_SB_LUT4_O_I3[2] +.sym 9882 io_ctrl_ins.rf_mode[0] +.sym 9884 io_ctrl_ins.debug_mode[0] +.sym 9885 io_ctrl_ins.rx_h_state_SB_DFFE_Q_E +.sym 9886 io_ctrl_ins.tr_vc_1_state_SB_DFFE_Q_D_SB_LUT4_O_I0[0] +.sym 9887 io_ctrl_ins.rf_mode[1] +.sym 9894 io_ctrl_ins.pmod_state_SB_DFFE_Q_E +.sym 9934 w_rx_data[2] +.sym 9935 io_ctrl_ins.debug_mode[1] +.sym 9940 io_ctrl_ins.pmod_state_SB_DFFE_Q_E +.sym 9941 io_ctrl_ins.debug_mode[0] +.sym 9950 io_ctrl_ins.rx_h_state_SB_DFFE_Q_E +.sym 9955 io_ctrl_ins.debug_mode[1] +.sym 9956 io_ctrl_ins.debug_mode[0] +.sym 9968 io_ctrl_ins.rx_h_state_SB_DFFE_Q_E +.sym 9992 w_rx_data[2] +.sym 10001 io_ctrl_ins.pmod_state_SB_DFFE_Q_E +.sym 10002 r_counter[0]_$glb_clk +.sym 10016 io_ctrl_ins.rx_h_state_SB_DFFE_Q_D_SB_LUT4_O_I2[3] +.sym 10026 io_ctrl_ins.mixer_en_state +.sym 10037 io_ctrl_ins.lna_tx_shutdown_state_SB_LUT4_I1_O[0] +.sym 10047 io_ctrl_ins.rx_h_state_SB_DFFE_Q_E +.sym 10049 io_ctrl_ins.rf_pin_state[1] +.sym 10053 io_ctrl_ins.rx_h_state_SB_DFFE_Q_D_SB_LUT4_O_I2[3] +.sym 10059 io_ctrl_ins.rf_mode[1] +.sym 10108 io_ctrl_ins.rx_h_state_SB_DFFE_Q_D_SB_LUT4_O_I2[3] +.sym 10109 io_ctrl_ins.rf_pin_state[1] +.sym 10110 io_ctrl_ins.rf_mode[1] +.sym 10124 io_ctrl_ins.rx_h_state_SB_DFFE_Q_E +.sym 10125 r_counter[0]_$glb_clk .sym 10172 o_shdn_rx_lna$SB_IO_OUT -.sym 10181 o_shdn_rx_lna$SB_IO_OUT +.sym 10194 o_shdn_rx_lna$SB_IO_OUT .sym 10201 $PACKER_GND_NET .sym 10204 $PACKER_GND_NET -.sym 10212 $PACKER_GND_NET -.sym 10220 $PACKER_GND_NET -.sym 10365 spi_if_ins.o_load_cmd_SB_DFFESR_Q_D_SB_LUT4_I1_O[2] -.sym 10412 $PACKER_GND_NET -.sym 10542 $PACKER_GND_NET -.sym 10787 spi_if_ins.o_load_cmd_SB_DFFESR_Q_D_SB_LUT4_I1_O[1] -.sym 10791 spi_if_ins.o_fetch_cmd_SB_DFFESR_Q_E -.sym 10801 spi_if_ins.state_if[1] -.sym 10804 spi_if_ins.o_load_cmd_SB_DFFESR_Q_D[0] -.sym 10808 spi_if_ins.o_load_cmd_SB_DFFESR_Q_D[3] -.sym 10810 spi_if_ins.o_load_cmd_SB_DFFESR_Q_D[1] -.sym 10811 spi_if_ins.state_if_SB_DFFE_Q_E -.sym 10815 spi_if_ins.state_if[0] -.sym 10822 spi_if_ins.o_load_cmd_SB_DFFESR_Q_D_SB_LUT4_I1_O[1] -.sym 10827 spi_if_ins.state_if_SB_DFFESR_Q_D[0] -.sym 10839 spi_if_ins.o_load_cmd_SB_DFFESR_Q_D[3] -.sym 10840 spi_if_ins.state_if_SB_DFFESR_Q_D[0] -.sym 10841 spi_if_ins.o_load_cmd_SB_DFFESR_Q_D[1] -.sym 10842 spi_if_ins.o_load_cmd_SB_DFFESR_Q_D_SB_LUT4_I1_O[1] -.sym 10845 spi_if_ins.o_load_cmd_SB_DFFESR_Q_D[0] -.sym 10846 spi_if_ins.state_if[1] -.sym 10847 spi_if_ins.state_if[0] -.sym 10851 spi_if_ins.state_if[1] -.sym 10852 spi_if_ins.o_load_cmd_SB_DFFESR_Q_D[0] -.sym 10854 spi_if_ins.state_if[0] -.sym 10869 spi_if_ins.state_if[0] -.sym 10870 spi_if_ins.state_if[1] -.sym 10871 spi_if_ins.o_load_cmd_SB_DFFESR_Q_D[0] -.sym 10879 spi_if_ins.state_if_SB_DFFE_Q_E -.sym 10880 r_counter[0]_$glb_clk -.sym 10885 spi_if_ins.r_tx_byte[1] -.sym 10886 spi_if_ins.r_tx_byte[3] -.sym 10887 spi_if_ins.r_tx_byte[4] -.sym 10889 spi_if_ins.r_tx_byte[6] -.sym 10907 spi_if_ins.r_tx_data_valid_SB_DFFESR_Q_D[1] -.sym 10908 spi_if_ins.r_tx_data_valid_SB_DFFESR_Q_D_SB_LUT4_I3_O -.sym 10917 spi_if_ins.o_load_cmd_SB_DFFESR_Q_D[1] -.sym 10925 spi_if_ins.state_if_SB_DFFE_Q_E -.sym 10931 spi_if_ins.o_load_cmd_SB_DFFESR_Q_D[3] -.sym 10932 spi_if_ins.state_if[1] -.sym 10936 spi_if_ins.o_load_cmd_SB_DFFESR_Q_D[3] -.sym 10937 spi_if_ins.o_load_cmd_SB_DFFESR_Q_D_SB_LUT4_I1_O[1] -.sym 10951 spi_if_ins.o_load_cmd_SB_DFFESR_Q_D[0] -.sym 10954 spi_if_ins.state_if[0] -.sym 10981 spi_if_ins.o_load_cmd_SB_DFFESR_Q_D_SB_LUT4_I1_O[1] -.sym 10986 spi_if_ins.o_load_cmd_SB_DFFESR_Q_D[0] -.sym 10987 spi_if_ins.state_if[0] -.sym 10988 spi_if_ins.o_load_cmd_SB_DFFESR_Q_D[3] -.sym 10989 spi_if_ins.state_if[1] -.sym 10992 spi_if_ins.state_if[0] -.sym 10994 spi_if_ins.state_if[1] -.sym 10998 spi_if_ins.o_load_cmd_SB_DFFESR_Q_D[0] -.sym 10999 spi_if_ins.state_if[0] -.sym 11000 spi_if_ins.o_load_cmd_SB_DFFESR_Q_D[3] -.sym 11001 spi_if_ins.state_if[1] -.sym 11002 spi_if_ins.state_if_SB_DFFE_Q_E -.sym 11003 r_counter[0]_$glb_clk -.sym 11004 spi_if_ins.o_load_cmd_SB_DFFESR_Q_D[3] -.sym 11005 spi_if_ins.r_tx_data_valid -.sym 11010 spi_if_ins.r_tx_data_valid_SB_DFFESR_Q_E -.sym 11012 spi_if_ins.r_tx_data_valid_SB_DFFESR_Q_D_SB_LUT4_I3_O -.sym 11017 spi_if_ins.o_load_cmd_SB_DFFESR_Q_D[3] -.sym 11019 spi_if_ins.state_if_SB_DFFE_Q_E -.sym 11032 spi_if_ins.o_cs_SB_LUT4_I2_O -.sym 11033 spi_if_ins.o_load_cmd_SB_DFFESR_Q_D_SB_LUT4_I1_O[2] -.sym 11034 $PACKER_GND_NET -.sym 11040 spi_if_ins.o_data_in_SB_DFFE_Q_E -.sym 11046 spi_if_ins.state_if_SB_DFFESR_Q_1_D[2] -.sym 11047 w_tx_data_io[4] -.sym 11048 spi_if_ins.o_cs_SB_LUT4_I2_O -.sym 11051 w_tx_data_io[6] -.sym 11052 spi_if_ins.o_cs_SB_LUT4_I1_O[1] -.sym 11054 spi_if_ins.o_cs_SB_LUT4_I1_1_O[0] -.sym 11058 spi_if_ins.o_load_cmd_SB_DFFESR_Q_D[0] -.sym 11059 spi_if_ins.o_load_cmd_SB_DFFESR_Q_D_SB_LUT4_I1_O[1] -.sym 11060 spi_if_ins.o_load_cmd_SB_DFFESR_Q_D[2] -.sym 11065 spi_if_ins.o_load_cmd_SB_DFFESR_Q_D[3] -.sym 11069 w_tx_data_io[1] -.sym 11071 w_tx_data_smi[1] -.sym 11073 spi_if_ins.o_load_cmd_SB_DFFESR_Q_D[3] -.sym 11074 w_tx_data_io[3] -.sym 11075 spi_if_ins.o_cs_SB_LUT4_I2_1_O -.sym 11077 spi_if_ins.o_load_cmd_SB_DFFESR_Q_D[1] -.sym 11079 spi_if_ins.o_load_cmd_SB_DFFESR_Q_D[1] -.sym 11080 spi_if_ins.o_load_cmd_SB_DFFESR_Q_D[0] -.sym 11081 spi_if_ins.o_load_cmd_SB_DFFESR_Q_D[3] -.sym 11082 spi_if_ins.o_load_cmd_SB_DFFESR_Q_D[2] -.sym 11085 spi_if_ins.o_cs_SB_LUT4_I1_1_O[0] -.sym 11086 w_tx_data_smi[1] -.sym 11087 w_tx_data_io[3] -.sym 11088 spi_if_ins.o_cs_SB_LUT4_I1_O[1] -.sym 11092 w_tx_data_io[6] -.sym 11094 spi_if_ins.o_cs_SB_LUT4_I1_1_O[0] -.sym 11103 spi_if_ins.o_load_cmd_SB_DFFESR_Q_D_SB_LUT4_I1_O[1] -.sym 11105 spi_if_ins.state_if_SB_DFFESR_Q_1_D[2] -.sym 11106 spi_if_ins.o_load_cmd_SB_DFFESR_Q_D[3] -.sym 11109 w_tx_data_io[4] -.sym 11111 spi_if_ins.o_cs_SB_LUT4_I1_1_O[0] -.sym 11116 spi_if_ins.o_load_cmd_SB_DFFESR_Q_D[0] -.sym 11117 spi_if_ins.o_load_cmd_SB_DFFESR_Q_D[3] -.sym 11118 spi_if_ins.o_load_cmd_SB_DFFESR_Q_D[2] -.sym 11121 w_tx_data_io[1] -.sym 11122 w_tx_data_smi[1] -.sym 11123 spi_if_ins.o_cs_SB_LUT4_I1_1_O[0] -.sym 11124 spi_if_ins.o_cs_SB_LUT4_I1_O[1] -.sym 11125 spi_if_ins.o_cs_SB_LUT4_I2_O -.sym 11126 i_glob_clock$SB_IO_IN_$glb_clk -.sym 11127 spi_if_ins.o_cs_SB_LUT4_I2_1_O -.sym 11129 r_tx_data[7] -.sym 11131 r_tx_data[5] -.sym 11134 r_tx_data[2] -.sym 11135 r_tx_data[0] -.sym 11140 spi_if_ins.spi.r_tx_bit_count_SB_DFFESR_Q_R -.sym 11141 w_tx_data_io[4] -.sym 11152 w_tx_data_io[2] -.sym 11158 o_shdn_rx_lna$SB_IO_OUT -.sym 11160 w_tx_data_io[3] -.sym 11161 spi_if_ins.o_load_cmd_SB_DFFESR_Q_D_SB_LUT4_I1_O[2] -.sym 11173 w_cs[0] -.sym 11188 spi_if_ins.w_rx_data[5] -.sym 11189 sys_ctrl_ins.i_cs_SB_DFFE_Q_D[0] -.sym 11193 spi_if_ins.w_rx_data[6] -.sym 11194 w_cs[2] -.sym 11196 spi_if_ins.o_load_cmd_SB_DFFESR_Q_D_SB_LUT4_I1_O[2] -.sym 11197 w_cs[3] -.sym 11199 i_config_SB_LUT4_I3_O_SB_LUT4_O_I0[1] -.sym 11202 w_cs[2] -.sym 11203 i_config_SB_LUT4_I3_O_SB_LUT4_O_I0[1] -.sym 11204 w_cs[0] -.sym 11205 w_cs[3] -.sym 11208 spi_if_ins.w_rx_data[6] -.sym 11210 spi_if_ins.w_rx_data[5] -.sym 11214 w_cs[2] -.sym 11215 i_config_SB_LUT4_I3_O_SB_LUT4_O_I0[1] -.sym 11216 w_cs[0] -.sym 11217 w_cs[3] -.sym 11220 i_config_SB_LUT4_I3_O_SB_LUT4_O_I0[1] -.sym 11221 w_cs[0] -.sym 11222 w_cs[3] -.sym 11223 w_cs[2] -.sym 11227 spi_if_ins.w_rx_data[5] -.sym 11229 spi_if_ins.w_rx_data[6] -.sym 11238 w_cs[2] -.sym 11239 w_cs[3] -.sym 11240 w_cs[0] -.sym 11241 i_config_SB_LUT4_I3_O_SB_LUT4_O_I0[1] -.sym 11244 i_config_SB_LUT4_I3_O_SB_LUT4_O_I0[1] -.sym 11245 w_cs[2] -.sym 11246 w_cs[3] -.sym 11247 w_cs[0] -.sym 11248 spi_if_ins.o_load_cmd_SB_DFFESR_Q_D_SB_LUT4_I1_O[2] +.sym 10213 $PACKER_GND_NET +.sym 10221 $PACKER_GND_NET +.sym 10387 $PACKER_GND_NET +.sym 10770 io_ctrl_ins.o_data_out_SB_DFFESR_Q_E +.sym 10884 spi_if_ins.spi.r_temp_rx_byte[5] +.sym 10911 spi_if_ins.spi.r_temp_rx_byte[4] +.sym 11029 spi_if_ins.spi.r_temp_rx_byte[5] +.sym 11030 spi_if_ins.state_if_SB_DFFESR_Q_D[1] +.sym 11035 o_miso_$_TBUF__Y_E +.sym 11037 w_load +.sym 11128 spi_if_ins.spi.r_temp_rx_byte[1] +.sym 11129 spi_if_ins.spi.r_temp_rx_byte[3] +.sym 11130 spi_if_ins.spi.r_temp_rx_byte[4] +.sym 11131 spi_if_ins.spi.r_temp_rx_byte[6] +.sym 11132 spi_if_ins.spi.r_rx_done_SB_DFFER_Q_D_SB_LUT4_I3_O +.sym 11133 spi_if_ins.spi.r_temp_rx_byte[2] +.sym 11135 spi_if_ins.spi.r_temp_rx_byte[0] +.sym 11173 spi_if_ins.state_if[0] +.sym 11174 spi_if_ins.state_if[1] +.sym 11180 spi_if_ins.state_if_SB_DFFE_Q_E +.sym 11182 spi_if_ins.state_if_SB_DFFESR_Q_1_D[1] +.sym 11186 spi_if_ins.state_if_SB_DFFESR_Q_D[0] +.sym 11188 spi_if_ins.r_tx_data_valid_SB_DFFESR_Q_D[0] +.sym 11189 spi_if_ins.spi.r_rx_done_SB_DFFER_Q_D_SB_LUT4_I3_O +.sym 11190 spi_if_ins.state_if_SB_DFFESR_Q_D[1] +.sym 11191 spi_if_ins.o_load_cmd_SB_DFFESR_Q_D[1] +.sym 11196 spi_if_ins.r_tx_data_valid_SB_DFFESR_Q_D[0] +.sym 11199 spi_if_ins.o_load_cmd_SB_DFFESR_Q_D[1] +.sym 11202 spi_if_ins.state_if[0] +.sym 11203 spi_if_ins.r_tx_data_valid_SB_DFFESR_Q_D[0] +.sym 11204 spi_if_ins.o_load_cmd_SB_DFFESR_Q_D[1] +.sym 11205 spi_if_ins.state_if[1] +.sym 11208 spi_if_ins.o_load_cmd_SB_DFFESR_Q_D[1] +.sym 11209 spi_if_ins.state_if[0] +.sym 11210 spi_if_ins.state_if[1] +.sym 11214 spi_if_ins.state_if[0] +.sym 11215 spi_if_ins.state_if[1] +.sym 11217 spi_if_ins.o_load_cmd_SB_DFFESR_Q_D[1] +.sym 11221 spi_if_ins.spi.r_rx_done_SB_DFFER_Q_D_SB_LUT4_I3_O +.sym 11232 spi_if_ins.state_if_SB_DFFESR_Q_D[0] +.sym 11233 spi_if_ins.state_if_SB_DFFESR_Q_1_D[1] +.sym 11234 spi_if_ins.state_if_SB_DFFESR_Q_D[1] +.sym 11235 spi_if_ins.r_tx_data_valid_SB_DFFESR_Q_D[0] +.sym 11248 spi_if_ins.state_if_SB_DFFE_Q_E .sym 11249 r_counter[0]_$glb_clk -.sym 11250 sys_ctrl_ins.i_cs_SB_DFFE_Q_D[0] -.sym 11251 spi_if_ins.w_rx_data[6] -.sym 11252 io_ctrl_ins.o_data_out_SB_DFFESR_Q_6_E_SB_LUT4_O_I1_SB_LUT4_O_I1_SB_LUT4_I3_O[0] -.sym 11253 $PACKER_GND_NET -.sym 11254 spi_if_ins.w_rx_data[5] -.sym 11255 sys_ctrl_ins.i_cs_SB_DFFE_Q_D[0] -.sym 11257 i_config_SB_LUT4_I3_O_SB_LUT4_O_I0[1] -.sym 11258 io_ctrl_ins.o_data_out_SB_DFFESR_Q_6_E_SB_LUT4_O_I1_SB_LUT4_O_I1[1] -.sym 11263 spi_if_ins.o_cs_SB_LUT4_I2_1_O -.sym 11265 w_tx_data_io[7] -.sym 11269 w_tx_data_io[5] -.sym 11278 spi_if_ins.o_cs_SB_LUT4_I2_1_O -.sym 11280 i_config_SB_LUT4_I3_O_SB_LUT4_O_I0[1] -.sym 11292 spi_if_ins.o_cs_SB_LUT4_I1_1_O[0] -.sym 11294 w_tx_data_io[0] -.sym 11299 i_config_SB_LUT4_I3_O_SB_LUT4_O_I0[0] -.sym 11301 w_cs[2] -.sym 11302 w_tx_data_smi[0] -.sym 11305 spi_if_ins.w_rx_data[4] -.sym 11306 spi_if_ins.o_cs_SB_LUT4_I1_O[1] -.sym 11310 spi_if_ins.o_load_cmd_SB_DFFESR_Q_D_SB_LUT4_I1_O[2] -.sym 11312 sys_ctrl_ins.i_cs_SB_DFFE_Q_D[0] -.sym 11317 io_ctrl_ins.o_data_out_SB_DFFESR_Q_6_E_SB_LUT4_O_I1_SB_LUT4_O_I1_SB_LUT4_I3_O[0] -.sym 11318 w_ioc[1] -.sym 11321 smi_ctrl_ins.o_data_out_SB_DFFESR_Q_E_SB_LUT4_O_I1[1] -.sym 11322 i_config_SB_LUT4_I3_O_SB_LUT4_O_I0[1] -.sym 11332 spi_if_ins.w_rx_data[4] -.sym 11351 sys_ctrl_ins.i_cs_SB_DFFE_Q_D[0] -.sym 11355 i_config_SB_LUT4_I3_O_SB_LUT4_O_I0[0] -.sym 11357 i_config_SB_LUT4_I3_O_SB_LUT4_O_I0[1] -.sym 11358 io_ctrl_ins.o_data_out_SB_DFFESR_Q_6_E_SB_LUT4_O_I1_SB_LUT4_O_I1_SB_LUT4_I3_O[0] -.sym 11361 smi_ctrl_ins.o_data_out_SB_DFFESR_Q_E_SB_LUT4_O_I1[1] -.sym 11362 w_ioc[1] -.sym 11363 w_cs[2] -.sym 11364 i_config_SB_LUT4_I3_O_SB_LUT4_O_I0[0] -.sym 11367 spi_if_ins.o_cs_SB_LUT4_I1_O[1] -.sym 11368 spi_if_ins.o_cs_SB_LUT4_I1_1_O[0] -.sym 11369 w_tx_data_smi[0] -.sym 11370 w_tx_data_io[0] -.sym 11371 spi_if_ins.o_load_cmd_SB_DFFESR_Q_D_SB_LUT4_I1_O[2] +.sym 11251 spi_if_ins.spi.r_rx_byte[4] +.sym 11252 spi_if_ins.spi.r_rx_byte[6] +.sym 11253 spi_if_ins.spi.r_rx_byte[2] +.sym 11254 spi_if_ins.spi.r_rx_byte[7] +.sym 11255 spi_if_ins.spi.r_rx_byte[0] +.sym 11256 spi_if_ins.spi.r_rx_byte[1] +.sym 11257 spi_if_ins.spi.r_rx_byte[5] +.sym 11258 spi_if_ins.spi.r_rx_byte[3] +.sym 11262 smi_ctrl_ins.o_data_out_SB_DFFESR_Q_D_SB_LUT4_I2_O +.sym 11266 spi_if_ins.r_tx_data_valid_SB_DFFESR_Q_D[0] +.sym 11269 spi_if_ins.r_tx_data_valid_SB_DFFESR_Q_D[1] +.sym 11273 i_ss$SB_IO_IN +.sym 11278 spi_if_ins.o_load_cmd_SB_DFFESR_Q_D_SB_LUT4_I1_O[0] +.sym 11281 spi_if_ins.spi.r3_rx_done_SB_LUT4_I2_O +.sym 11297 spi_if_ins.o_load_cmd_SB_DFFESR_Q_D_SB_LUT4_I1_O[1] +.sym 11303 spi_if_ins.o_load_cmd_SB_DFFESR_Q_E +.sym 11305 spi_if_ins.state_if[1] +.sym 11307 spi_if_ins.o_load_cmd_SB_DFFESR_Q_D_SB_LUT4_I1_O[0] +.sym 11309 spi_if_ins.r_tx_data_valid_SB_DFFESR_Q_D[0] +.sym 11317 spi_if_ins.o_load_cmd_SB_DFFESR_Q_D[0] +.sym 11320 spi_if_ins.state_if[0] +.sym 11321 spi_if_ins.state_if_SB_DFFESR_Q_R +.sym 11331 spi_if_ins.state_if[0] +.sym 11332 spi_if_ins.state_if[1] +.sym 11351 spi_if_ins.o_load_cmd_SB_DFFESR_Q_D[0] +.sym 11357 spi_if_ins.r_tx_data_valid_SB_DFFESR_Q_D[0] +.sym 11368 spi_if_ins.o_load_cmd_SB_DFFESR_Q_D_SB_LUT4_I1_O[0] +.sym 11369 spi_if_ins.o_load_cmd_SB_DFFESR_Q_D_SB_LUT4_I1_O[1] +.sym 11371 spi_if_ins.o_load_cmd_SB_DFFESR_Q_E .sym 11372 r_counter[0]_$glb_clk -.sym 11374 i_config_SB_LUT4_I3_O_SB_LUT4_O_1_I2[0] -.sym 11375 w_ioc[3] -.sym 11376 w_ioc[1] -.sym 11377 io_ctrl_ins.ldo2v8_state_SB_LUT4_I3_O[3] -.sym 11378 w_ioc[2] -.sym 11379 smi_ctrl_ins.o_data_out_SB_DFFESR_Q_E_SB_LUT4_O_I1[1] -.sym 11380 io_ctrl_ins.o_data_out_SB_DFFESR_Q_R -.sym 11381 io_ctrl_ins.led0_state_SB_LUT4_I3_O[2] -.sym 11387 i_config_SB_LUT4_I3_O_SB_LUT4_O_I0[1] -.sym 11392 io_pmod[5]$SB_IO_OUT -.sym 11397 $PACKER_GND_NET -.sym 11399 io_ctrl_ins.led0_state_SB_LUT4_I3_O[0] -.sym 11400 o_ldo_2v8_en$SB_IO_OUT -.sym 11401 w_rx_data[4] -.sym 11403 io_ctrl_ins.o_data_out_SB_DFFESR_Q_R -.sym 11404 io_ctrl_ins.ldo2v8_state_SB_LUT4_I3_O[2] -.sym 11406 o_led0$SB_IO_OUT -.sym 11407 i_config_SB_LUT4_I3_O_SB_LUT4_O_1_I2[0] -.sym 11409 spi_if_ins.o_load_cmd_SB_DFFESR_Q_D[1] -.sym 11415 io_ctrl_ins.led0_state_SB_LUT4_I3_O[0] -.sym 11416 w_ioc[4] -.sym 11417 i_config_SB_LUT4_I3_O[3] -.sym 11419 io_ctrl_ins.o_data_out_SB_DFFESR_Q_R -.sym 11420 io_ctrl_ins.led0_state_SB_LUT4_I3_O[3] -.sym 11421 io_ctrl_ins.tr_vc_1_b_state_SB_LUT4_I0_I2[3] -.sym 11422 io_ctrl_ins.ldo2v8_state_SB_LUT4_I3_O[2] -.sym 11424 o_tr_vc1_b$SB_IO_OUT -.sym 11426 io_ctrl_ins.ldo2v8_state_SB_LUT4_I3_O[1] -.sym 11427 io_ctrl_ins.led1_state_SB_LUT4_I3_O[2] -.sym 11428 o_tr_vc2$SB_IO_OUT -.sym 11430 o_shdn_rx_lna$SB_IO_OUT -.sym 11432 i_config_SB_LUT4_I3_O[2] -.sym 11433 io_ctrl_ins.led1_state_SB_LUT4_I3_O[3] -.sym 11434 io_ctrl_ins.ldo2v8_state_SB_LUT4_I3_O[3] -.sym 11435 w_ioc[2] -.sym 11437 io_ctrl_ins.ldo2v8_state_SB_LUT4_I3_O[0] -.sym 11439 i_config_SB_LUT4_I3_O_SB_LUT4_O_1_I2[0] -.sym 11440 w_ioc[3] -.sym 11441 w_ioc[1] -.sym 11442 io_ctrl_ins.o_data_out_SB_DFFESR_Q_E -.sym 11443 io_ctrl_ins.tr_vc_1_b_state_SB_LUT4_I0_I2[2] -.sym 11444 smi_ctrl_ins.o_data_out_SB_DFFESR_Q_E_SB_LUT4_O_I1[1] -.sym 11445 i_config_SB_LUT4_I3_O[1] -.sym 11446 io_ctrl_ins.led0_state_SB_LUT4_I3_O[2] -.sym 11448 io_ctrl_ins.ldo2v8_state_SB_LUT4_I3_O[1] -.sym 11449 io_ctrl_ins.ldo2v8_state_SB_LUT4_I3_O[2] -.sym 11450 io_ctrl_ins.ldo2v8_state_SB_LUT4_I3_O[0] -.sym 11451 io_ctrl_ins.ldo2v8_state_SB_LUT4_I3_O[3] -.sym 11454 io_ctrl_ins.led1_state_SB_LUT4_I3_O[2] -.sym 11455 o_shdn_rx_lna$SB_IO_OUT -.sym 11456 i_config_SB_LUT4_I3_O[1] -.sym 11457 io_ctrl_ins.led1_state_SB_LUT4_I3_O[3] -.sym 11460 io_ctrl_ins.led0_state_SB_LUT4_I3_O[0] -.sym 11461 i_config_SB_LUT4_I3_O[1] -.sym 11462 io_ctrl_ins.led0_state_SB_LUT4_I3_O[2] -.sym 11463 io_ctrl_ins.led0_state_SB_LUT4_I3_O[3] -.sym 11466 w_ioc[1] -.sym 11468 i_config_SB_LUT4_I3_O_SB_LUT4_O_1_I2[0] -.sym 11469 smi_ctrl_ins.o_data_out_SB_DFFESR_Q_E_SB_LUT4_O_I1[1] -.sym 11472 i_config_SB_LUT4_I3_O[3] -.sym 11473 i_config_SB_LUT4_I3_O[2] -.sym 11474 o_tr_vc2$SB_IO_OUT -.sym 11475 i_config_SB_LUT4_I3_O[1] -.sym 11478 w_ioc[1] -.sym 11479 smi_ctrl_ins.o_data_out_SB_DFFESR_Q_E_SB_LUT4_O_I1[1] -.sym 11480 i_config_SB_LUT4_I3_O_SB_LUT4_O_1_I2[0] -.sym 11484 o_tr_vc1_b$SB_IO_OUT -.sym 11485 i_config_SB_LUT4_I3_O[1] -.sym 11486 io_ctrl_ins.tr_vc_1_b_state_SB_LUT4_I0_I2[3] -.sym 11487 io_ctrl_ins.tr_vc_1_b_state_SB_LUT4_I0_I2[2] -.sym 11490 w_ioc[1] -.sym 11491 w_ioc[3] -.sym 11492 w_ioc[4] -.sym 11493 w_ioc[2] -.sym 11494 io_ctrl_ins.o_data_out_SB_DFFESR_Q_E +.sym 11373 spi_if_ins.state_if_SB_DFFESR_Q_R +.sym 11375 spi_if_ins.w_rx_data[1] +.sym 11380 spi_if_ins.w_rx_data[2] +.sym 11389 spi_if_ins.o_load_cmd_SB_DFFESR_Q_E +.sym 11394 spi_if_ins.spi.o_spi_miso_SB_DFFE_Q_E +.sym 11398 io_ctrl_ins.o_data_out_SB_DFFESR_Q_R +.sym 11399 w_tx_data_io[1] +.sym 11402 io_ctrl_ins.o_data_out_SB_DFFESR_Q_R +.sym 11409 spi_if_ins.r_tx_data_valid_SB_DFFESR_Q_E +.sym 11415 spi_if_ins.o_load_cmd_SB_DFFESR_Q_D[1] +.sym 11416 spi_if_ins.o_load_cmd_SB_DFFESR_Q_D[0] +.sym 11418 spi_if_ins.state_if_SB_DFFESR_Q_D[1] +.sym 11423 spi_if_ins.spi.r_rx_byte[4] +.sym 11424 spi_if_ins.r_tx_data_valid_SB_DFFESR_Q_D[0] +.sym 11433 spi_if_ins.spi.r3_rx_done_SB_LUT4_I2_O +.sym 11466 spi_if_ins.spi.r_rx_byte[4] +.sym 11484 spi_if_ins.o_load_cmd_SB_DFFESR_Q_D[1] +.sym 11485 spi_if_ins.o_load_cmd_SB_DFFESR_Q_D[0] +.sym 11486 spi_if_ins.r_tx_data_valid_SB_DFFESR_Q_D[0] +.sym 11487 spi_if_ins.state_if_SB_DFFESR_Q_D[1] +.sym 11490 spi_if_ins.o_load_cmd_SB_DFFESR_Q_D[0] +.sym 11491 spi_if_ins.o_load_cmd_SB_DFFESR_Q_D[1] +.sym 11493 spi_if_ins.r_tx_data_valid_SB_DFFESR_Q_D[0] +.sym 11494 spi_if_ins.spi.r3_rx_done_SB_LUT4_I2_O .sym 11495 r_counter[0]_$glb_clk -.sym 11496 io_ctrl_ins.o_data_out_SB_DFFESR_Q_R -.sym 11497 io_ctrl_ins.rf_mode_SB_DFFE_Q_E -.sym 11498 i_config_SB_LUT4_I3_O[2] -.sym 11499 w_rx_data[2] -.sym 11500 io_ctrl_ins.o_data_out_SB_DFFESR_Q_6_R[1] -.sym 11501 io_ctrl_ins.tr_vc_1_b_state_SB_LUT4_I0_I2[2] -.sym 11502 w_rx_data[3] -.sym 11503 i_config_SB_LUT4_I3_O[1] -.sym 11504 w_rx_data[1] -.sym 11505 spi_if_ins.w_rx_data[0] -.sym 11509 spi_if_ins.w_rx_data[6] -.sym 11511 i_config_SB_LUT4_I3_O_SB_LUT4_O_I0[0] -.sym 11516 i_config_SB_LUT4_I3_O_SB_LUT4_O_1_I2[0] -.sym 11519 spi_if_ins.w_rx_data[4] -.sym 11520 o_tr_vc1_b$SB_IO_OUT -.sym 11523 w_rx_data[0] -.sym 11524 io_ctrl_ins.ldo2v8_state_SB_LUT4_I3_O[1] -.sym 11525 w_rx_data[5] -.sym 11526 spi_if_ins.o_load_cmd_SB_LUT4_I3_2_O -.sym 11527 w_rx_data[4] -.sym 11528 i_config_SB_LUT4_I3_I1[4] -.sym 11532 spi_if_ins.o_data_in_SB_DFFE_Q_E -.sym 11546 i_config_SB_LUT4_I3_O_SB_LUT4_O_1_I2[0] -.sym 11547 spi_if_ins.w_rx_data[4] -.sym 11548 spi_if_ins.w_rx_data[0] -.sym 11549 spi_if_ins.o_data_in_SB_DFFE_Q_E -.sym 11552 spi_if_ins.w_rx_data[5] -.sym 11553 i_config_SB_LUT4_I3_O_SB_LUT4_O_1_I2[1] -.sym 11559 spi_if_ins.w_rx_data[6] -.sym 11567 io_ctrl_ins.led1_state_SB_LUT4_I3_O[2] -.sym 11569 spi_if_ins.o_load_cmd_SB_DFFESR_Q_D[1] -.sym 11571 i_config_SB_LUT4_I3_O_SB_LUT4_O_1_I2[1] -.sym 11574 i_config_SB_LUT4_I3_O_SB_LUT4_O_1_I2[0] -.sym 11583 spi_if_ins.o_load_cmd_SB_DFFESR_Q_D[1] -.sym 11591 spi_if_ins.w_rx_data[6] -.sym 11597 io_ctrl_ins.led1_state_SB_LUT4_I3_O[2] -.sym 11601 spi_if_ins.w_rx_data[0] -.sym 11610 spi_if_ins.w_rx_data[5] -.sym 11616 spi_if_ins.w_rx_data[4] -.sym 11617 spi_if_ins.o_data_in_SB_DFFE_Q_E +.sym 11498 w_ioc[1] +.sym 11499 w_ioc[4] +.sym 11500 w_cs[0] +.sym 11501 r_tx_data_SB_DFFESR_Q_R +.sym 11502 w_ioc[3] +.sym 11503 r_tx_data_SB_DFFESR_Q_E +.sym 11504 spi_if_ins.o_cs_SB_LUT4_I1_O[2] +.sym 11518 spi_if_ins.w_rx_data[1] +.sym 11525 spi_if_ins.w_rx_data[3] +.sym 11529 w_load +.sym 11532 i_config_SB_LUT4_I0_I3[2] +.sym 11542 w_fetch +.sym 11552 w_cs[2] +.sym 11557 io_ctrl_ins.led1_state_SB_LUT4_I0_O_SB_LUT4_O_I2[3] +.sym 11558 io_ctrl_ins.o_data_out_SB_DFFESR_Q_R +.sym 11561 io_ctrl_ins.led1_state_SB_LUT4_I0_O[1] +.sym 11563 w_ioc[2] +.sym 11565 io_ctrl_ins.o_data_out_SB_DFFESR_Q_E +.sym 11569 io_ctrl_ins.led1_state_SB_LUT4_I0_O[0] +.sym 11595 w_fetch +.sym 11596 io_ctrl_ins.led1_state_SB_LUT4_I0_O_SB_LUT4_O_I2[3] +.sym 11597 w_ioc[2] +.sym 11598 w_cs[2] +.sym 11607 io_ctrl_ins.led1_state_SB_LUT4_I0_O[0] +.sym 11608 io_ctrl_ins.led1_state_SB_LUT4_I0_O[1] +.sym 11617 io_ctrl_ins.o_data_out_SB_DFFESR_Q_E .sym 11618 r_counter[0]_$glb_clk -.sym 11620 w_rx_data[6] -.sym 11621 i_config_SB_LUT4_I3_O_SB_LUT4_O_I0[2] -.sym 11625 io_ctrl_ins.led1_state_SB_LUT4_I3_O[2] -.sym 11627 io_ctrl_ins.debug_mode_SB_LUT4_I2_O[1] -.sym 11632 smi_ctrl_ins.o_data_out_SB_DFFESR_Q_E_SB_LUT4_O_I1_SB_LUT4_I1_O[2] -.sym 11634 spi_if_ins.w_rx_data[0] -.sym 11638 i_config_SB_LUT4_I3_O_SB_LUT4_O_I0[3] -.sym 11639 i_config[1]$SB_IO_IN -.sym 11640 w_rx_data[6] -.sym 11644 o_led0$SB_IO_OUT -.sym 11645 w_rx_data[7] -.sym 11646 o_led1$SB_IO_OUT -.sym 11647 w_rx_data[6] -.sym 11649 o_shdn_rx_lna$SB_IO_OUT -.sym 11650 io_ctrl_ins.rx_h_state_SB_DFFE_Q_E -.sym 11654 o_ldo_2v8_en$SB_IO_OUT -.sym 11655 o_shdn_tx_lna$SB_IO_OUT -.sym 11663 i_config_SB_LUT4_I3_O_SB_LUT4_O_I0[0] -.sym 11665 i_config_SB_LUT4_I3_O_SB_LUT4_O_I0[1] -.sym 11666 i_config_SB_LUT4_I3_O_SB_LUT4_O_I0[3] -.sym 11668 w_rx_data[1] -.sym 11669 io_ctrl_ins.o_pmod[2] -.sym 11671 w_rx_data[2] -.sym 11672 io_ctrl_ins.led0_state_SB_DFFE_Q_E -.sym 11674 w_rx_data[0] -.sym 11675 i_config_SB_LUT4_I3_O_SB_LUT4_O_1_I2[1] -.sym 11677 i_config_SB_LUT4_I3_O_SB_LUT4_O_1_I2[0] -.sym 11679 o_shdn_tx_lna$SB_IO_OUT -.sym 11682 smi_ctrl_ins.o_data_out_SB_DFFESR_Q_E_SB_LUT4_O_I1_SB_LUT4_I1_O[2] -.sym 11684 io_ctrl_ins.ldo2v8_state_SB_LUT4_I3_O[1] -.sym 11685 spi_if_ins.o_load_cmd_SB_LUT4_I3_2_O -.sym 11694 i_config_SB_LUT4_I3_O_SB_LUT4_O_I0[1] -.sym 11695 io_ctrl_ins.ldo2v8_state_SB_LUT4_I3_O[1] -.sym 11696 i_config_SB_LUT4_I3_O_SB_LUT4_O_I0[0] -.sym 11697 i_config_SB_LUT4_I3_O_SB_LUT4_O_I0[3] -.sym 11702 w_rx_data[2] -.sym 11707 spi_if_ins.o_load_cmd_SB_LUT4_I3_2_O -.sym 11712 i_config_SB_LUT4_I3_O_SB_LUT4_O_1_I2[1] -.sym 11713 o_shdn_tx_lna$SB_IO_OUT -.sym 11714 io_ctrl_ins.o_pmod[2] -.sym 11715 i_config_SB_LUT4_I3_O_SB_LUT4_O_1_I2[0] -.sym 11718 w_rx_data[0] -.sym 11726 w_rx_data[1] -.sym 11730 i_config_SB_LUT4_I3_O_SB_LUT4_O_I0[1] -.sym 11731 i_config_SB_LUT4_I3_O_SB_LUT4_O_I0[3] -.sym 11732 i_config_SB_LUT4_I3_O_SB_LUT4_O_I0[0] -.sym 11733 smi_ctrl_ins.o_data_out_SB_DFFESR_Q_E_SB_LUT4_O_I1_SB_LUT4_I1_O[2] -.sym 11736 w_rx_data[2] -.sym 11740 io_ctrl_ins.led0_state_SB_DFFE_Q_E -.sym 11741 r_counter[0]_$glb_clk -.sym 11744 io_ctrl_ins.rx_h_state_SB_DFFE_Q_E -.sym 11747 io_ctrl_ins.pmod_dir_state[5] -.sym 11748 io_ctrl_ins.pmod_dir_state[7] -.sym 11749 io_ctrl_ins.debug_mode_SB_LUT4_I2_O[3] -.sym 11750 io_ctrl_ins.pmod_dir_state[6] -.sym 11774 io_ctrl_ins.rf_mode_SB_DFFE_Q_E -.sym 11868 o_shdn_rx_lna$SB_IO_OUT -.sym 11870 io_ctrl_ins.led0_state_SB_LUT4_I3_O[0] -.sym 11871 o_shdn_tx_lna$SB_IO_OUT -.sym 11879 io_ctrl_ins.debug_mode_SB_LUT4_I2_O[3] -.sym 11891 io_ctrl_ins.led0_state_SB_LUT4_I3_O[0] -.sym 12007 o_tr_vc1_b$SB_IO_OUT -.sym 12013 o_shdn_rx_lna$SB_IO_OUT -.sym 12019 o_shdn_tx_lna$SB_IO_OUT -.sym 12146 o_ldo_2v8_en$SB_IO_OUT +.sym 11619 io_ctrl_ins.o_data_out_SB_DFFESR_Q_R +.sym 11620 io_ctrl_ins.ldo2v8_state_SB_LUT4_I0_O[1] +.sym 11621 w_tx_data_io[0] +.sym 11623 io_ctrl_ins.led1_state_SB_LUT4_I0_O_SB_LUT4_O_I2[3] +.sym 11624 w_tx_data_io[3] +.sym 11625 i_config_SB_LUT4_I0_I3[3] +.sym 11626 w_tx_data_io[2] +.sym 11627 w_tx_data_io[4] +.sym 11637 spi_if_ins.o_load_cmd_SB_DFFESR_Q_D_SB_LUT4_I1_O[0] +.sym 11639 $PACKER_VCC_NET +.sym 11645 io_ctrl_ins.o_data_out_SB_DFFESR_Q_2_D_SB_LUT4_O_I2[0] +.sym 11646 smi_ctrl_ins.o_data_out_SB_DFFESR_Q_D_SB_LUT4_I2_O +.sym 11647 io_ctrl_ins.led1_state_SB_LUT4_I0_O[1] +.sym 11649 io_ctrl_ins.rf_pin_state_SB_DFFE_Q_E +.sym 11650 i_config[0]$SB_IO_IN +.sym 11652 r_tx_data_SB_DFFESR_Q_E +.sym 11653 io_ctrl_ins.mixer_en_state_SB_LUT4_I1_O[2] +.sym 11663 r_tx_data_SB_DFFESR_Q_E +.sym 11665 r_tx_data_SB_DFFESR_Q_R +.sym 11666 w_cs[1] +.sym 11667 spi_if_ins.o_cs_SB_LUT4_I1_O[1] +.sym 11671 w_tx_data_smi[1] +.sym 11673 w_ioc[2] +.sym 11676 spi_if_ins.o_cs_SB_LUT4_I1_O[2] +.sym 11680 io_ctrl_ins.led1_state_SB_LUT4_I0_O_SB_LUT4_O_I2[3] +.sym 11681 w_fetch +.sym 11683 i_config_SB_LUT4_I0_I3[2] +.sym 11689 w_tx_data_io[3] +.sym 11690 i_config_SB_LUT4_I0_I3[3] +.sym 11706 i_config_SB_LUT4_I0_I3[3] +.sym 11707 w_ioc[2] +.sym 11708 i_config_SB_LUT4_I0_I3[2] +.sym 11709 io_ctrl_ins.led1_state_SB_LUT4_I0_O_SB_LUT4_O_I2[3] +.sym 11712 w_tx_data_io[3] +.sym 11713 spi_if_ins.o_cs_SB_LUT4_I1_O[1] +.sym 11714 w_tx_data_smi[1] +.sym 11715 spi_if_ins.o_cs_SB_LUT4_I1_O[2] +.sym 11718 w_fetch +.sym 11719 w_cs[1] +.sym 11720 i_config_SB_LUT4_I0_I3[3] +.sym 11721 io_ctrl_ins.led1_state_SB_LUT4_I0_O_SB_LUT4_O_I2[3] +.sym 11740 r_tx_data_SB_DFFESR_Q_E +.sym 11741 i_glob_clock$SB_IO_IN_$glb_clk +.sym 11742 r_tx_data_SB_DFFESR_Q_R +.sym 11743 spi_if_ins.o_load_cmd_SB_LUT4_I3_O[1] +.sym 11744 io_ctrl_ins.o_data_out_SB_DFFESR_Q_2_D_SB_LUT4_O_I2[1] +.sym 11745 i_button_SB_LUT4_I0_O[1] +.sym 11746 io_ctrl_ins.o_data_out_SB_DFFESR_Q_6_E +.sym 11747 io_ctrl_ins.led0_state_SB_LUT4_I0_O[0] +.sym 11750 io_ctrl_ins.led1_state_SB_LUT4_I0_O_SB_LUT4_O_I2[0] +.sym 11751 io_ctrl_ins.o_data_out_SB_DFFESR_Q_E +.sym 11756 w_tx_data_io[2] +.sym 11760 w_tx_data_io[4] +.sym 11761 w_tx_data_smi[1] +.sym 11763 r_tx_data[3] +.sym 11766 w_ioc[2] +.sym 11767 io_ctrl_ins.ldo2v8_state_SB_LUT4_I0_O[0] +.sym 11769 io_ctrl_ins.led1_state_SB_LUT4_I0_O_SB_LUT4_O_I2[3] +.sym 11773 w_rx_data[1] +.sym 11786 spi_if_ins.o_data_in_SB_DFFE_Q_E +.sym 11787 io_ctrl_ins.led1_state_SB_LUT4_I0_O_SB_LUT4_O_I2[3] +.sym 11788 w_ioc[2] +.sym 11789 i_config_SB_LUT4_I0_I3[3] +.sym 11790 i_config_SB_LUT4_I0_I3[2] +.sym 11794 spi_if_ins.w_rx_data[1] +.sym 11795 spi_if_ins.w_rx_data[4] +.sym 11797 spi_if_ins.w_rx_data[3] +.sym 11802 i_button_SB_LUT4_I0_O[1] +.sym 11804 io_ctrl_ins.pmod_dir_state[0] +.sym 11805 o_led0$SB_IO_OUT +.sym 11808 spi_if_ins.o_load_cmd_SB_LUT4_I3_O[1] +.sym 11817 i_button_SB_LUT4_I0_O[1] +.sym 11820 spi_if_ins.o_load_cmd_SB_LUT4_I3_O[1] +.sym 11829 i_config_SB_LUT4_I0_I3[2] +.sym 11830 o_led0$SB_IO_OUT +.sym 11831 io_ctrl_ins.pmod_dir_state[0] +.sym 11832 i_config_SB_LUT4_I0_I3[3] +.sym 11836 spi_if_ins.w_rx_data[4] +.sym 11841 i_config_SB_LUT4_I0_I3[2] +.sym 11842 i_config_SB_LUT4_I0_I3[3] +.sym 11843 w_ioc[2] +.sym 11844 io_ctrl_ins.led1_state_SB_LUT4_I0_O_SB_LUT4_O_I2[3] +.sym 11848 spi_if_ins.w_rx_data[3] +.sym 11853 i_config_SB_LUT4_I0_I3[2] +.sym 11854 io_ctrl_ins.led1_state_SB_LUT4_I0_O_SB_LUT4_O_I2[3] +.sym 11855 w_ioc[2] +.sym 11859 spi_if_ins.w_rx_data[1] +.sym 11863 spi_if_ins.o_data_in_SB_DFFE_Q_E +.sym 11864 r_counter[0]_$glb_clk +.sym 11866 io_ctrl_ins.o_data_out_SB_DFFESR_Q_2_D_SB_LUT4_O_I2[0] +.sym 11867 io_ctrl_ins.led1_state_SB_LUT4_I0_O[1] +.sym 11868 io_ctrl_ins.rf_pin_state[4] +.sym 11869 io_ctrl_ins.rf_pin_state[6] +.sym 11870 io_ctrl_ins.pmod_dir_state[0] +.sym 11871 io_ctrl_ins.rf_pin_state[5] +.sym 11872 io_ctrl_ins.ldo2v8_state_SB_LUT4_I0_O[0] +.sym 11873 io_ctrl_ins.rf_pin_state[7] +.sym 11887 w_fetch +.sym 11888 i_config[1]$SB_IO_IN +.sym 11891 o_led0$SB_IO_OUT +.sym 11893 o_ldo_2v8_en$SB_IO_OUT +.sym 11901 w_rx_data[1] +.sym 11907 spi_if_ins.o_load_cmd_SB_LUT4_I3_O[1] +.sym 11910 w_rx_data[4] +.sym 11913 io_ctrl_ins.rf_mode[1] +.sym 11914 w_rx_data[1] +.sym 11916 io_ctrl_ins.rf_mode[0] +.sym 11918 smi_ctrl_ins.o_data_out_SB_DFFESR_Q_D_SB_LUT4_I2_O +.sym 11921 smi_ctrl_ins.o_data_out_SB_DFFESR_Q_D[4] +.sym 11927 o_shdn_tx_lna$SB_IO_OUT +.sym 11929 o_tr_vc2$SB_IO_OUT +.sym 11935 w_ioc[2] +.sym 11937 i_config_SB_LUT4_I0_I3[2] +.sym 11940 io_ctrl_ins.rf_mode[0] +.sym 11941 i_config_SB_LUT4_I0_I3[2] +.sym 11942 o_shdn_tx_lna$SB_IO_OUT +.sym 11943 w_ioc[2] +.sym 11952 io_ctrl_ins.rf_mode[1] +.sym 11953 i_config_SB_LUT4_I0_I3[2] +.sym 11954 o_tr_vc2$SB_IO_OUT +.sym 11955 w_ioc[2] +.sym 11958 w_rx_data[4] +.sym 11972 w_rx_data[1] +.sym 11976 spi_if_ins.o_load_cmd_SB_LUT4_I3_O[1] +.sym 11979 smi_ctrl_ins.o_data_out_SB_DFFESR_Q_D[4] +.sym 11986 smi_ctrl_ins.o_data_out_SB_DFFESR_Q_D_SB_LUT4_I2_O +.sym 11987 r_counter[0]_$glb_clk +.sym 11989 io_ctrl_ins.mixer_en_state +.sym 11990 o_rx_h_tx_l$SB_IO_OUT +.sym 11991 o_tr_vc1_b$SB_IO_OUT +.sym 11992 o_tr_vc1$SB_IO_OUT +.sym 11993 o_shdn_tx_lna$SB_IO_OUT +.sym 11994 o_rx_h_tx_l_b$SB_IO_OUT +.sym 11995 o_tr_vc2$SB_IO_OUT +.sym 12001 i_config_SB_LUT4_I0_I3[2] +.sym 12002 io_ctrl_ins.lna_tx_shutdown_state_SB_LUT4_I1_O[0] +.sym 12009 i_config_SB_LUT4_I0_I3[2] +.sym 12030 io_ctrl_ins.rx_h_state_SB_DFFE_Q_D_SB_LUT4_O_I2[3] +.sym 12032 w_rx_data[3] +.sym 12033 io_ctrl_ins.rf_mode[2] +.sym 12039 io_ctrl_ins.rf_mode[0] +.sym 12041 io_ctrl_ins.rf_mode[2] +.sym 12043 io_ctrl_ins.debug_mode[1] +.sym 12044 io_ctrl_ins.rf_mode[1] +.sym 12049 io_ctrl_ins.debug_mode[0] +.sym 12055 w_rx_data[2] +.sym 12057 smi_ctrl_ins.o_data_out_SB_DFFESR_Q_D_SB_LUT4_I2_O +.sym 12059 w_rx_data[0] +.sym 12063 io_ctrl_ins.rf_mode[0] +.sym 12064 io_ctrl_ins.rf_mode[1] +.sym 12065 io_ctrl_ins.rx_h_state_SB_DFFE_Q_D_SB_LUT4_O_I2[3] +.sym 12066 io_ctrl_ins.rf_mode[2] +.sym 12070 w_rx_data[2] +.sym 12082 w_rx_data[0] +.sym 12087 io_ctrl_ins.rf_mode[2] +.sym 12088 io_ctrl_ins.rf_mode[1] +.sym 12089 io_ctrl_ins.debug_mode[1] +.sym 12090 io_ctrl_ins.debug_mode[0] +.sym 12094 io_ctrl_ins.rf_mode[2] +.sym 12096 io_ctrl_ins.rf_mode[0] +.sym 12101 w_rx_data[3] +.sym 12109 smi_ctrl_ins.o_data_out_SB_DFFESR_Q_D_SB_LUT4_I2_O +.sym 12110 r_counter[0]_$glb_clk +.sym 12112 o_led0$SB_IO_OUT +.sym 12120 io_ctrl_ins.rx_h_state_SB_DFFE_Q_E +.sym 12128 io_ctrl_ins.rf_pin_state[3] +.sym 12132 io_ctrl_ins.rf_pin_state[2] +.sym 12135 o_tr_vc1_b$SB_IO_OUT +.sym 12137 io_ctrl_ins.rf_pin_state[0] .sym 12313 $PACKER_GND_NET -.sym 12331 $PACKER_GND_NET -.sym 12481 $PACKER_GND_NET -.sym 12488 $PACKER_GND_NET -.sym 12650 $PACKER_GND_NET -.sym 12758 o_miso_$_TBUF__Y_E -.sym 12894 spi_if_ins.spi.r3_rx_done_SB_LUT4_I2_O -.sym 12995 spi_if_ins.o_load_cmd_SB_DFFESR_Q_D[3] -.sym 13018 spi_if_ins.r_tx_data_valid_SB_DFFESR_Q_D_SB_LUT4_I3_O -.sym 13020 spi_if_ins.r_tx_data_valid -.sym 13024 spi_if_ins.r_tx_data_valid_SB_LUT4_I3_O -.sym 13055 r_tx_data[1] -.sym 13057 r_tx_data[3] -.sym 13058 r_tx_data[6] -.sym 13059 spi_if_ins.r_tx_data_valid_SB_DFFESR_Q_D_SB_LUT4_I3_O -.sym 13061 r_tx_data[4] -.sym 13085 r_tx_data[1] -.sym 13089 r_tx_data[3] -.sym 13096 r_tx_data[4] -.sym 13109 r_tx_data[6] -.sym 13111 spi_if_ins.r_tx_data_valid_SB_DFFESR_Q_D_SB_LUT4_I3_O -.sym 13112 r_counter[0]_$glb_clk -.sym 13114 spi_if_ins.spi.r_tx_byte[5] -.sym 13115 spi_if_ins.spi.r_tx_byte[3] -.sym 13116 spi_if_ins.spi.r_tx_byte[4] -.sym 13117 spi_if_ins.spi.o_spi_miso_SB_DFFE_Q_D_SB_LUT4_O_I2_SB_LUT4_O_I0[0] -.sym 13118 spi_if_ins.spi.r_tx_byte[6] -.sym 13119 spi_if_ins.spi.r_tx_byte[0] -.sym 13120 spi_if_ins.spi.o_spi_miso_SB_DFFE_Q_D_SB_LUT4_O_I2_SB_LUT4_O_I0_SB_LUT4_O_2_I0[1] -.sym 13121 spi_if_ins.spi.r_tx_byte[1] -.sym 13142 $PACKER_GND_NET -.sym 13149 spi_if_ins.spi.r_tx_byte[7] -.sym 13157 spi_if_ins.r_tx_data_valid_SB_DFFESR_Q_E -.sym 13159 spi_if_ins.o_load_cmd_SB_DFFESR_Q_D[3] -.sym 13160 spi_if_ins.o_load_cmd_SB_DFFESR_Q_D_SB_LUT4_I1_O[1] -.sym 13167 spi_if_ins.o_load_cmd_SB_DFFESR_Q_D[3] -.sym 13168 spi_if_ins.r_tx_data_valid_SB_DFFESR_Q_D[1] -.sym 13169 spi_if_ins.o_load_cmd_SB_DFFESR_Q_D_SB_LUT4_I1_O[2] -.sym 13190 spi_if_ins.r_tx_data_valid_SB_DFFESR_Q_D[1] -.sym 13218 spi_if_ins.o_load_cmd_SB_DFFESR_Q_D_SB_LUT4_I1_O[2] -.sym 13219 spi_if_ins.o_load_cmd_SB_DFFESR_Q_D[3] -.sym 13220 spi_if_ins.o_load_cmd_SB_DFFESR_Q_D_SB_LUT4_I1_O[1] -.sym 13232 spi_if_ins.o_load_cmd_SB_DFFESR_Q_D[3] -.sym 13233 spi_if_ins.r_tx_data_valid_SB_DFFESR_Q_D[1] -.sym 13234 spi_if_ins.r_tx_data_valid_SB_DFFESR_Q_E -.sym 13235 r_counter[0]_$glb_clk -.sym 13236 spi_if_ins.o_load_cmd_SB_DFFESR_Q_D[3] -.sym 13237 spi_if_ins.r_tx_byte[7] -.sym 13241 spi_if_ins.r_tx_byte[2] -.sym 13242 spi_if_ins.r_tx_byte[5] -.sym 13243 spi_if_ins.spi.o_spi_miso_SB_DFFE_Q_D_SB_LUT4_O_I2_SB_LUT4_O_I0[1] -.sym 13244 spi_if_ins.r_tx_byte[0] -.sym 13251 spi_if_ins.r_tx_data_valid_SB_DFFESR_Q_E -.sym 13258 $PACKER_VCC_NET -.sym 13259 io_pmod[6]$SB_IO_OUT -.sym 13262 i_config_SB_LUT4_I3_O_SB_LUT4_O_I0[1] -.sym 13280 smi_ctrl_ins.o_data_out_SB_LUT4_I0_2_O[0] -.sym 13285 w_tx_data_io[7] -.sym 13286 spi_if_ins.o_cs_SB_LUT4_I1_1_O[0] -.sym 13287 w_tx_data_io[5] -.sym 13291 spi_if_ins.o_cs_SB_LUT4_I2_1_O -.sym 13301 smi_ctrl_ins.o_data_out_SB_LUT4_I0_2_O[1] -.sym 13303 w_tx_data_io[2] -.sym 13305 spi_if_ins.o_cs_SB_LUT4_I2_O -.sym 13317 w_tx_data_io[7] -.sym 13318 smi_ctrl_ins.o_data_out_SB_LUT4_I0_2_O[0] -.sym 13319 spi_if_ins.o_cs_SB_LUT4_I1_1_O[0] -.sym 13329 spi_if_ins.o_cs_SB_LUT4_I1_1_O[0] -.sym 13330 smi_ctrl_ins.o_data_out_SB_LUT4_I0_2_O[0] -.sym 13332 w_tx_data_io[5] -.sym 13347 smi_ctrl_ins.o_data_out_SB_LUT4_I0_2_O[0] -.sym 13348 spi_if_ins.o_cs_SB_LUT4_I1_1_O[0] -.sym 13349 w_tx_data_io[2] -.sym 13353 smi_ctrl_ins.o_data_out_SB_LUT4_I0_2_O[1] -.sym 13356 smi_ctrl_ins.o_data_out_SB_LUT4_I0_2_O[0] -.sym 13357 spi_if_ins.o_cs_SB_LUT4_I2_O -.sym 13358 i_glob_clock$SB_IO_IN_$glb_clk -.sym 13359 spi_if_ins.o_cs_SB_LUT4_I2_1_O -.sym 13361 spi_if_ins.spi.r_tx_byte[2] -.sym 13365 spi_if_ins.spi.r_tx_byte[7] -.sym 13374 spi_if_ins.o_load_cmd_SB_DFFESR_Q_D[1] -.sym 13390 io_ctrl_ins.o_data_out_SB_DFFESR_Q_6_R[1] -.sym 13393 i_config_SB_LUT4_I3_O_SB_LUT4_O_I0[0] -.sym 13402 w_ioc[4] -.sym 13403 w_ioc[1] -.sym 13405 w_ioc[2] -.sym 13410 w_ioc[3] -.sym 13412 spi_if_ins.o_load_cmd_SB_DFFESR_Q_D_SB_LUT4_I1_O[2] -.sym 13421 sys_ctrl_ins.i_cs_SB_DFFE_Q_D[0] -.sym 13424 io_ctrl_ins.o_data_out_SB_DFFESR_Q_6_E_SB_LUT4_O_I1_SB_LUT4_O_I1[1] -.sym 13426 spi_if_ins.w_rx_data[5] -.sym 13429 spi_if_ins.w_rx_data[6] -.sym 13435 spi_if_ins.w_rx_data[6] -.sym 13440 io_ctrl_ins.o_data_out_SB_DFFESR_Q_6_E_SB_LUT4_O_I1_SB_LUT4_O_I1[1] -.sym 13441 w_ioc[1] -.sym 13443 w_ioc[2] -.sym 13453 spi_if_ins.w_rx_data[5] -.sym 13459 spi_if_ins.w_rx_data[6] -.sym 13460 spi_if_ins.w_rx_data[5] -.sym 13472 spi_if_ins.w_rx_data[5] -.sym 13473 spi_if_ins.w_rx_data[6] -.sym 13477 w_ioc[3] -.sym 13478 w_ioc[4] -.sym 13480 spi_if_ins.o_load_cmd_SB_DFFESR_Q_D_SB_LUT4_I1_O[2] -.sym 13481 r_counter[0]_$glb_clk -.sym 13482 sys_ctrl_ins.i_cs_SB_DFFE_Q_D[0] -.sym 13483 spi_if_ins.w_rx_data[4] -.sym 13484 spi_if_ins.w_rx_data[5] -.sym 13485 spi_if_ins.w_rx_data[3] -.sym 13486 spi_if_ins.w_rx_data[2] -.sym 13487 spi_if_ins.w_rx_data[6] -.sym 13489 spi_if_ins.w_rx_data[1] -.sym 13490 io_ctrl_ins.o_data_out_SB_DFFESR_Q_6_E_SB_LUT4_O_I1[0] -.sym 13498 spi_if_ins.o_load_cmd_SB_DFFESR_Q_D_SB_LUT4_I1_O[2] -.sym 13501 $PACKER_GND_NET -.sym 13510 w_rx_data[1] -.sym 13512 io_ctrl_ins.rf_mode_SB_DFFE_Q_E -.sym 13515 spi_if_ins.r_tx_data_valid_SB_LUT4_I3_O -.sym 13516 i_config_SB_LUT4_I3_O_SB_LUT4_O_I0[1] -.sym 13526 spi_if_ins.o_load_cmd_SB_DFFESR_Q_D_SB_LUT4_I1_O[2] -.sym 13527 spi_if_ins.w_rx_data[0] -.sym 13529 i_config_SB_LUT4_I3_I1[4] -.sym 13533 w_ioc[3] -.sym 13535 io_ctrl_ins.o_data_out_SB_DFFESR_Q_6_R[1] -.sym 13536 w_ioc[2] -.sym 13541 w_ioc[4] -.sym 13543 o_ldo_2v8_en$SB_IO_OUT -.sym 13544 smi_ctrl_ins.o_data_out_SB_DFFESR_Q_E_SB_LUT4_O_I1_SB_LUT4_I1_O[2] -.sym 13546 spi_if_ins.w_rx_data[1] -.sym 13549 o_led0$SB_IO_OUT -.sym 13550 spi_if_ins.w_rx_data[3] -.sym 13551 spi_if_ins.w_rx_data[2] -.sym 13554 io_ctrl_ins.debug_mode[0] -.sym 13555 io_ctrl_ins.rf_mode[0] -.sym 13560 spi_if_ins.w_rx_data[0] -.sym 13565 spi_if_ins.w_rx_data[3] -.sym 13571 spi_if_ins.w_rx_data[1] -.sym 13575 i_config_SB_LUT4_I3_I1[4] -.sym 13576 smi_ctrl_ins.o_data_out_SB_DFFESR_Q_E_SB_LUT4_O_I1_SB_LUT4_I1_O[2] -.sym 13577 o_ldo_2v8_en$SB_IO_OUT -.sym 13578 io_ctrl_ins.rf_mode[0] -.sym 13581 spi_if_ins.w_rx_data[2] -.sym 13587 w_ioc[2] -.sym 13589 w_ioc[4] -.sym 13590 w_ioc[3] -.sym 13593 io_ctrl_ins.o_data_out_SB_DFFESR_Q_6_R[1] -.sym 13594 i_config_SB_LUT4_I3_I1[4] -.sym 13599 io_ctrl_ins.debug_mode[0] -.sym 13600 o_led0$SB_IO_OUT -.sym 13601 i_config_SB_LUT4_I3_I1[4] -.sym 13602 smi_ctrl_ins.o_data_out_SB_DFFESR_Q_E_SB_LUT4_O_I1_SB_LUT4_I1_O[2] -.sym 13603 spi_if_ins.o_load_cmd_SB_DFFESR_Q_D_SB_LUT4_I1_O[2] +.sym 12320 $PACKER_GND_NET +.sym 12367 i_sck$SB_IO_IN +.sym 12466 $PACKER_GND_NET +.sym 12498 $PACKER_GND_NET +.sym 12637 $PACKER_GND_NET +.sym 12648 $PACKER_GND_NET +.sym 12769 o_miso_$_TBUF__Y_E +.sym 12874 o_miso_$_TBUF__Y_E +.sym 13004 o_miso_$_TBUF__Y_E +.sym 13023 o_miso_$_TBUF__Y_E +.sym 13026 i_mosi$SB_IO_IN +.sym 13034 o_miso_$_TBUF__Y_E +.sym 13052 spi_if_ins.spi.r_temp_rx_byte[4] +.sym 13079 spi_if_ins.spi.r_temp_rx_byte[4] +.sym 13111 o_miso_$_TBUF__Y_E +.sym 13112 i_sck$SB_IO_IN_$glb_clk +.sym 13115 spi_if_ins.spi.r3_rx_done +.sym 13119 spi_if_ins.spi.r2_rx_done +.sym 13120 spi_if_ins.spi.r3_rx_done_SB_LUT4_I2_O +.sym 13126 io_pmod[7]$SB_IO_OUT +.sym 13133 io_pmod[5]$SB_IO_OUT +.sym 13139 spi_if_ins.spi.r_temp_rx_byte[5] +.sym 13143 spi_if_ins.spi.r3_rx_done_SB_LUT4_I2_O +.sym 13239 spi_if_ins.spi.r_rx_bit_count[2] +.sym 13242 spi_if_ins.spi.r_rx_done_SB_DFFER_Q_D[1] +.sym 13243 spi_if_ins.spi.r_rx_bit_count[1] +.sym 13244 spi_if_ins.spi.r_rx_bit_count[0] +.sym 13250 spi_if_ins.spi.r3_rx_done_SB_LUT4_I2_O +.sym 13269 spi_if_ins.spi.r3_rx_done_SB_LUT4_I2_O +.sym 13278 spi_if_ins.spi.r_temp_rx_byte[1] +.sym 13280 o_miso_$_TBUF__Y_E +.sym 13283 spi_if_ins.spi.r_temp_rx_byte[2] +.sym 13290 spi_if_ins.spi.r_temp_rx_byte[5] +.sym 13291 i_ss$SB_IO_IN +.sym 13295 spi_if_ins.spi.r_temp_rx_byte[3] +.sym 13296 i_mosi$SB_IO_IN +.sym 13299 spi_if_ins.spi.r_rx_done_SB_DFFER_Q_D[1] +.sym 13309 spi_if_ins.spi.r_temp_rx_byte[0] +.sym 13311 spi_if_ins.spi.r_temp_rx_byte[0] +.sym 13319 spi_if_ins.spi.r_temp_rx_byte[2] +.sym 13324 spi_if_ins.spi.r_temp_rx_byte[3] +.sym 13331 spi_if_ins.spi.r_temp_rx_byte[5] +.sym 13336 spi_if_ins.spi.r_rx_done_SB_DFFER_Q_D[1] +.sym 13337 i_ss$SB_IO_IN +.sym 13342 spi_if_ins.spi.r_temp_rx_byte[1] +.sym 13356 i_mosi$SB_IO_IN +.sym 13357 o_miso_$_TBUF__Y_E +.sym 13358 i_sck$SB_IO_IN_$glb_clk +.sym 13360 spi_if_ins.w_rx_data[3] +.sym 13361 spi_if_ins.state_if_SB_DFFESR_Q_D[1] +.sym 13362 spi_if_ins.spi.r_tx_byte_SB_DFFESR_Q_E +.sym 13363 spi_if_ins.w_rx_data[6] +.sym 13364 spi_if_ins.w_rx_data[5] +.sym 13374 spi_if_ins.r_tx_data_valid_SB_DFFESR_Q_E +.sym 13388 sys_ctrl_ins.i_cs_SB_DFFE_Q_D[0] +.sym 13393 spi_if_ins.w_rx_data[3] +.sym 13401 spi_if_ins.spi.r_temp_rx_byte[1] +.sym 13406 spi_if_ins.spi.r_temp_rx_byte[2] +.sym 13408 i_mosi$SB_IO_IN +.sym 13409 spi_if_ins.spi.r_temp_rx_byte[5] +.sym 13410 spi_if_ins.spi.r_temp_rx_byte[3] +.sym 13411 spi_if_ins.spi.r_temp_rx_byte[4] +.sym 13412 spi_if_ins.spi.r_temp_rx_byte[6] +.sym 13416 spi_if_ins.spi.r_temp_rx_byte[0] +.sym 13428 spi_if_ins.spi.r_rx_done_SB_DFFER_Q_D_SB_LUT4_I3_O +.sym 13436 spi_if_ins.spi.r_temp_rx_byte[3] +.sym 13442 spi_if_ins.spi.r_temp_rx_byte[5] +.sym 13448 spi_if_ins.spi.r_temp_rx_byte[1] +.sym 13455 spi_if_ins.spi.r_temp_rx_byte[6] +.sym 13459 i_mosi$SB_IO_IN +.sym 13465 spi_if_ins.spi.r_temp_rx_byte[0] +.sym 13471 spi_if_ins.spi.r_temp_rx_byte[4] +.sym 13476 spi_if_ins.spi.r_temp_rx_byte[2] +.sym 13480 spi_if_ins.spi.r_rx_done_SB_DFFER_Q_D_SB_LUT4_I3_O +.sym 13481 i_sck$SB_IO_IN_$glb_clk +.sym 13484 spi_if_ins.spi.r_tx_byte[2] +.sym 13485 spi_if_ins.spi.r_tx_byte[6] +.sym 13487 spi_if_ins.spi.r_tx_byte[1] +.sym 13488 spi_if_ins.r_tx_data_valid_SB_LUT4_I3_O_SB_LUT4_O_1_I1[1] +.sym 13490 spi_if_ins.spi.r_tx_byte[7] +.sym 13502 spi_if_ins.w_rx_data[3] +.sym 13504 spi_if_ins.state_if_SB_DFFESR_Q_D[1] +.sym 13505 spi_if_ins.spi.r_rx_byte[0] +.sym 13508 r_tx_data_SB_DFFESR_Q_E +.sym 13509 spi_if_ins.w_rx_data[6] +.sym 13513 r_tx_data_SB_DFFESR_Q_R +.sym 13518 w_cs[0] +.sym 13526 spi_if_ins.spi.r3_rx_done_SB_LUT4_I2_O +.sym 13529 spi_if_ins.spi.r_rx_byte[1] +.sym 13534 spi_if_ins.spi.r_rx_byte[2] +.sym 13563 spi_if_ins.spi.r_rx_byte[1] +.sym 13596 spi_if_ins.spi.r_rx_byte[2] +.sym 13603 spi_if_ins.spi.r3_rx_done_SB_LUT4_I2_O .sym 13604 r_counter[0]_$glb_clk -.sym 13610 smi_ctrl_ins.o_data_out_SB_DFFESR_Q_E_SB_LUT4_O_I1_SB_LUT4_I1_O[2] -.sym 13611 w_rx_data[3] -.sym 13612 io_ctrl_ins.debug_mode[0] -.sym 13613 io_ctrl_ins.rf_mode[0] -.sym 13622 spi_if_ins.o_load_cmd_SB_DFFESR_Q_D_SB_LUT4_I1_O[2] -.sym 13626 spi_if_ins.spi.r3_rx_done_SB_LUT4_I2_O -.sym 13633 io_ctrl_ins.debug_mode_SB_LUT4_I2_O[1] -.sym 13634 spi_if_ins.o_load_cmd_SB_LUT4_I3_1_O -.sym 13637 io_ctrl_ins.rf_mode[0] -.sym 13647 i_config[1]$SB_IO_IN -.sym 13649 i_config[0]$SB_IO_IN -.sym 13654 io_ctrl_ins.debug_mode_SB_LUT4_I2_O[1] -.sym 13655 i_config_SB_LUT4_I3_O_SB_LUT4_O_1_I2[0] -.sym 13656 i_config_SB_LUT4_I3_O_SB_LUT4_O_I0[3] -.sym 13657 spi_if_ins.w_rx_data[3] -.sym 13658 spi_if_ins.w_rx_data[2] -.sym 13659 i_config_SB_LUT4_I3_O_SB_LUT4_O_I0[1] -.sym 13661 spi_if_ins.w_rx_data[1] -.sym 13663 i_config_SB_LUT4_I3_O_SB_LUT4_O_I0[0] -.sym 13665 spi_if_ins.o_data_in_SB_DFFE_Q_E -.sym 13667 smi_ctrl_ins.o_data_out_SB_DFFESR_Q_E_SB_LUT4_O_I1_SB_LUT4_I1_O[2] -.sym 13668 i_config_SB_LUT4_I3_I1[4] -.sym 13670 i_config_SB_LUT4_I3_O_SB_LUT4_O_1_I2[1] -.sym 13674 io_ctrl_ins.ldo2v8_state_SB_LUT4_I3_O[1] -.sym 13675 io_ctrl_ins.rf_mode[2] -.sym 13678 i_config_SB_LUT4_I3_O_SB_LUT4_O_1_I2[1] -.sym 13680 i_config_SB_LUT4_I3_O_SB_LUT4_O_I0[0] -.sym 13681 i_config_SB_LUT4_I3_O_SB_LUT4_O_I0[1] -.sym 13682 i_config_SB_LUT4_I3_O_SB_LUT4_O_I0[3] -.sym 13683 i_config_SB_LUT4_I3_I1[4] -.sym 13686 io_ctrl_ins.debug_mode_SB_LUT4_I2_O[1] -.sym 13687 i_config[0]$SB_IO_IN -.sym 13688 i_config_SB_LUT4_I3_I1[4] -.sym 13689 smi_ctrl_ins.o_data_out_SB_DFFESR_Q_E_SB_LUT4_O_I1_SB_LUT4_I1_O[2] -.sym 13692 spi_if_ins.w_rx_data[2] -.sym 13698 i_config_SB_LUT4_I3_O_SB_LUT4_O_1_I2[1] -.sym 13699 smi_ctrl_ins.o_data_out_SB_DFFESR_Q_E_SB_LUT4_O_I1_SB_LUT4_I1_O[2] -.sym 13701 io_ctrl_ins.ldo2v8_state_SB_LUT4_I3_O[1] -.sym 13704 i_config[1]$SB_IO_IN -.sym 13705 io_ctrl_ins.rf_mode[2] -.sym 13706 smi_ctrl_ins.o_data_out_SB_DFFESR_Q_E_SB_LUT4_O_I1_SB_LUT4_I1_O[2] -.sym 13707 i_config_SB_LUT4_I3_I1[4] -.sym 13712 spi_if_ins.w_rx_data[3] -.sym 13718 i_config_SB_LUT4_I3_O_SB_LUT4_O_1_I2[1] -.sym 13719 i_config_SB_LUT4_I3_O_SB_LUT4_O_1_I2[0] -.sym 13722 spi_if_ins.w_rx_data[1] -.sym 13726 spi_if_ins.o_data_in_SB_DFFE_Q_E +.sym 13606 sys_ctrl_ins.i_cs_SB_DFFE_Q_D[0] +.sym 13607 r_tx_data_SB_DFFESR_Q_R +.sym 13608 w_cs[3] +.sym 13611 spi_if_ins.o_cs_SB_LUT4_I1_O[2] +.sym 13612 w_cs[1] +.sym 13613 w_cs[2] +.sym 13623 spi_if_ins.r_tx_byte[7] +.sym 13633 spi_if_ins.state_if_SB_DFFESR_Q_D[1] +.sym 13636 io_ctrl_ins.o_data_out_SB_DFFESR_Q_3_D_SB_LUT4_O_I2[0] +.sym 13637 spi_if_ins.o_data_in_SB_DFFE_Q_E +.sym 13640 o_rx_h_tx_l$SB_IO_OUT +.sym 13641 io_ctrl_ins.led1_state_SB_LUT4_I0_O_SB_LUT4_O_I2[3] +.sym 13649 spi_if_ins.o_load_cmd_SB_DFFESR_Q_D_SB_LUT4_I1_O[0] +.sym 13650 w_cs[0] +.sym 13656 spi_if_ins.w_rx_data[1] +.sym 13663 spi_if_ins.w_rx_data[3] +.sym 13664 r_tx_data_SB_DFFESR_Q_R +.sym 13669 w_cs[1] +.sym 13671 sys_ctrl_ins.i_cs_SB_DFFE_Q_D[0] +.sym 13673 w_cs[3] +.sym 13674 spi_if_ins.w_rx_data[4] +.sym 13676 spi_if_ins.o_cs_SB_LUT4_I1_O[2] +.sym 13678 w_cs[2] +.sym 13689 spi_if_ins.w_rx_data[1] +.sym 13694 spi_if_ins.w_rx_data[4] +.sym 13698 sys_ctrl_ins.i_cs_SB_DFFE_Q_D[0] +.sym 13705 r_tx_data_SB_DFFESR_Q_R +.sym 13711 spi_if_ins.w_rx_data[3] +.sym 13716 w_cs[2] +.sym 13717 w_cs[3] +.sym 13718 w_cs[1] +.sym 13719 w_cs[0] +.sym 13723 spi_if_ins.o_cs_SB_LUT4_I1_O[2] +.sym 13726 spi_if_ins.o_load_cmd_SB_DFFESR_Q_D_SB_LUT4_I1_O[0] .sym 13727 r_counter[0]_$glb_clk -.sym 13729 spi_if_ins.o_load_cmd_SB_LUT4_I3_1_O -.sym 13730 io_ctrl_ins.debug_mode[1] -.sym 13732 spi_if_ins.o_load_cmd_SB_LUT4_I3_O -.sym 13733 io_ctrl_ins.rf_mode[2] -.sym 13741 io_ctrl_ins.rf_mode_SB_DFFE_Q_E -.sym 13743 i_config[0]$SB_IO_IN -.sym 13744 $PACKER_VCC_NET -.sym 13754 w_rx_data[2] -.sym 13759 io_ctrl_ins.debug_mode_SB_LUT4_I2_O[1] -.sym 13760 io_ctrl_ins.rx_h_state_SB_DFFE_Q_E -.sym 13761 io_ctrl_ins.debug_mode[0] -.sym 13764 w_rx_data[1] -.sym 13775 o_led1$SB_IO_OUT -.sym 13781 i_config_SB_LUT4_I3_I1[4] -.sym 13782 smi_ctrl_ins.o_data_out_SB_DFFESR_Q_E_SB_LUT4_O_I1_SB_LUT4_I1_O[2] -.sym 13783 w_rx_data[3] -.sym 13786 i_config_SB_LUT4_I3_O_SB_LUT4_O_I0[2] -.sym 13789 w_rx_data[6] -.sym 13795 io_ctrl_ins.debug_mode[1] -.sym 13797 io_ctrl_ins.rf_mode_SB_DFFE_Q_E -.sym 13804 w_rx_data[6] -.sym 13810 i_config_SB_LUT4_I3_O_SB_LUT4_O_I0[2] -.sym 13833 o_led1$SB_IO_OUT -.sym 13834 i_config_SB_LUT4_I3_I1[4] -.sym 13835 smi_ctrl_ins.o_data_out_SB_DFFESR_Q_E_SB_LUT4_O_I1_SB_LUT4_I1_O[2] -.sym 13836 io_ctrl_ins.debug_mode[1] -.sym 13846 w_rx_data[3] -.sym 13849 io_ctrl_ins.rf_mode_SB_DFFE_Q_E +.sym 13730 smi_ctrl_ins.o_data_out_SB_LUT4_I0_2_O[1] +.sym 13731 w_rx_data[5] +.sym 13733 w_rx_data[7] +.sym 13736 w_rx_data[6] +.sym 13741 $PACKER_VCC_NET +.sym 13749 w_cs[0] +.sym 13755 i_config_SB_LUT4_I0_I3[3] +.sym 13760 w_rx_data[6] +.sym 13761 w_cs[1] +.sym 13771 io_ctrl_ins.o_data_out_SB_DFFESR_Q_2_D_SB_LUT4_O_I2[1] +.sym 13772 o_ldo_2v8_en$SB_IO_OUT +.sym 13774 w_ioc[2] +.sym 13775 w_ioc[3] +.sym 13777 i_config_SB_LUT4_I0_I3[2] +.sym 13778 io_ctrl_ins.ldo2v8_state_SB_LUT4_I0_O[1] +.sym 13779 w_ioc[1] +.sym 13780 w_ioc[4] +.sym 13781 io_ctrl_ins.o_data_out_SB_DFFESR_Q_E +.sym 13782 io_ctrl_ins.led0_state_SB_LUT4_I0_O[0] +.sym 13783 io_ctrl_ins.o_data_out_SB_DFFESR_Q_R +.sym 13786 io_ctrl_ins.o_data_out_SB_DFFESR_Q_2_D_SB_LUT4_O_I2[0] +.sym 13788 io_ctrl_ins.led0_state_SB_LUT4_I0_O[1] +.sym 13790 io_ctrl_ins.ldo2v8_state_SB_LUT4_I0_O[0] +.sym 13791 i_config_SB_LUT4_I0_I3[3] +.sym 13796 io_ctrl_ins.o_data_out_SB_DFFESR_Q_3_D_SB_LUT4_O_I2[0] +.sym 13798 io_ctrl_ins.o_data_out_SB_DFFESR_Q_3_D_SB_LUT4_O_I2[1] +.sym 13799 i_config_SB_LUT4_I0_I3[1] +.sym 13803 i_config_SB_LUT4_I0_I3[1] +.sym 13804 i_config_SB_LUT4_I0_I3[3] +.sym 13805 o_ldo_2v8_en$SB_IO_OUT +.sym 13806 i_config_SB_LUT4_I0_I3[2] +.sym 13810 io_ctrl_ins.led0_state_SB_LUT4_I0_O[1] +.sym 13811 io_ctrl_ins.led0_state_SB_LUT4_I0_O[0] +.sym 13821 w_ioc[4] +.sym 13823 w_ioc[3] +.sym 13824 w_ioc[1] +.sym 13827 io_ctrl_ins.o_data_out_SB_DFFESR_Q_2_D_SB_LUT4_O_I2[0] +.sym 13828 io_ctrl_ins.o_data_out_SB_DFFESR_Q_2_D_SB_LUT4_O_I2[1] +.sym 13833 w_ioc[3] +.sym 13834 w_ioc[1] +.sym 13835 w_ioc[4] +.sym 13836 w_ioc[2] +.sym 13839 io_ctrl_ins.ldo2v8_state_SB_LUT4_I0_O[0] +.sym 13842 io_ctrl_ins.ldo2v8_state_SB_LUT4_I0_O[1] +.sym 13845 io_ctrl_ins.o_data_out_SB_DFFESR_Q_3_D_SB_LUT4_O_I2[1] +.sym 13847 io_ctrl_ins.o_data_out_SB_DFFESR_Q_3_D_SB_LUT4_O_I2[0] +.sym 13849 io_ctrl_ins.o_data_out_SB_DFFESR_Q_E .sym 13850 r_counter[0]_$glb_clk -.sym 13852 io_ctrl_ins.rf_pin_state[2] -.sym 13853 io_ctrl_ins.rf_pin_state[5] -.sym 13854 io_ctrl_ins.rf_pin_state[0] -.sym 13855 io_ctrl_ins.debug_mode_SB_LUT4_I2_O[2] -.sym 13856 io_ctrl_ins.rf_pin_state[6] -.sym 13857 io_ctrl_ins.debug_mode_SB_LUT4_I2_O[0] -.sym 13859 io_ctrl_ins.rf_pin_state[1] -.sym 13868 w_rx_data[4] -.sym 13880 io_ctrl_ins.rf_mode[2] -.sym 13895 spi_if_ins.o_load_cmd_SB_LUT4_I3_2_O -.sym 13897 io_ctrl_ins.rf_mode[2] -.sym 13898 w_rx_data[5] -.sym 13900 io_ctrl_ins.debug_mode_SB_LUT4_I2_O[1] -.sym 13902 io_ctrl_ins.debug_mode[1] -.sym 13906 w_rx_data[7] -.sym 13908 w_rx_data[6] -.sym 13921 io_ctrl_ins.debug_mode[0] -.sym 13932 io_ctrl_ins.debug_mode_SB_LUT4_I2_O[1] -.sym 13933 io_ctrl_ins.rf_mode[2] -.sym 13934 io_ctrl_ins.debug_mode[0] -.sym 13935 io_ctrl_ins.debug_mode[1] -.sym 13951 w_rx_data[5] -.sym 13959 w_rx_data[7] -.sym 13964 io_ctrl_ins.debug_mode[1] -.sym 13965 io_ctrl_ins.debug_mode[0] -.sym 13971 w_rx_data[6] -.sym 13972 spi_if_ins.o_load_cmd_SB_LUT4_I3_2_O +.sym 13851 io_ctrl_ins.o_data_out_SB_DFFESR_Q_R +.sym 13852 io_ctrl_ins.tr_vc_1_state_SB_LUT4_I3_O[1] +.sym 13853 io_ctrl_ins.tr_vc_1_state_SB_LUT4_I3_O[2] +.sym 13854 w_tx_data_io[7] +.sym 13855 io_ctrl_ins.o_data_out_SB_DFFESR_Q_6_R +.sym 13856 io_ctrl_ins.o_data_out_SB_DFFESR_Q_3_D_SB_LUT4_O_I2[1] +.sym 13857 w_tx_data_io[6] +.sym 13858 w_tx_data_io[5] +.sym 13859 io_ctrl_ins.led0_state_SB_DFFE_Q_E +.sym 13864 w_tx_data_io[1] +.sym 13868 o_ldo_2v8_en$SB_IO_OUT +.sym 13876 w_rx_data[5] +.sym 13879 io_ctrl_ins.led1_state_SB_LUT4_I0_O_SB_LUT4_O_I2[3] +.sym 13880 w_rx_data[7] +.sym 13882 o_tr_vc1$SB_IO_OUT +.sym 13883 io_ctrl_ins.led0_state_SB_DFFE_Q_E +.sym 13885 i_config_SB_LUT4_I0_I3[1] +.sym 13887 io_ctrl_ins.rf_pin_state[6] +.sym 13895 w_fetch +.sym 13896 io_ctrl_ins.led1_state_SB_LUT4_I0_O_SB_LUT4_O_I2[3] +.sym 13898 io_ctrl_ins.mixer_en_state_SB_LUT4_I1_O[2] +.sym 13900 w_rx_data[1] +.sym 13902 w_load +.sym 13903 i_config[0]$SB_IO_IN +.sym 13905 io_ctrl_ins.o_data_out_SB_DFFESR_Q_6_E_SB_LUT4_O_I1[0] +.sym 13906 i_config_SB_LUT4_I0_I3[3] +.sym 13911 io_ctrl_ins.pmod_state_SB_DFFE_Q_E +.sym 13913 i_config_SB_LUT4_I0_I3[2] +.sym 13917 w_ioc[2] +.sym 13919 io_ctrl_ins.pmod_dir_state[3] +.sym 13921 w_cs[1] +.sym 13922 io_ctrl_ins.mixer_en_state_SB_LUT4_I1_O[0] +.sym 13926 w_load +.sym 13928 w_fetch +.sym 13929 w_cs[1] +.sym 13932 i_config[0]$SB_IO_IN +.sym 13933 i_config_SB_LUT4_I0_I3[2] +.sym 13934 io_ctrl_ins.pmod_dir_state[3] +.sym 13935 i_config_SB_LUT4_I0_I3[3] +.sym 13938 i_config_SB_LUT4_I0_I3[2] +.sym 13939 w_ioc[2] +.sym 13941 io_ctrl_ins.led1_state_SB_LUT4_I0_O_SB_LUT4_O_I2[3] +.sym 13944 io_ctrl_ins.o_data_out_SB_DFFESR_Q_6_E_SB_LUT4_O_I1[0] +.sym 13945 w_fetch +.sym 13946 w_cs[1] +.sym 13950 io_ctrl_ins.mixer_en_state_SB_LUT4_I1_O[0] +.sym 13951 io_ctrl_ins.mixer_en_state_SB_LUT4_I1_O[2] +.sym 13952 i_config_SB_LUT4_I0_I3[2] +.sym 13953 io_ctrl_ins.led1_state_SB_LUT4_I0_O_SB_LUT4_O_I2[3] +.sym 13970 w_rx_data[1] +.sym 13972 io_ctrl_ins.pmod_state_SB_DFFE_Q_E .sym 13973 r_counter[0]_$glb_clk -.sym 13975 o_tr_vc1$SB_IO_OUT -.sym 13977 io_ctrl_ins.debug_mode_SB_LUT4_I2_O[3] -.sym 13981 o_tr_vc1_b$SB_IO_OUT -.sym 13989 spi_if_ins.o_load_cmd_SB_LUT4_I3_2_O -.sym 13990 w_rx_data[5] -.sym 13996 w_rx_data[4] -.sym 13998 w_rx_data[0] -.sym 14010 io_ctrl_ins.pmod_dir_state[6] -.sym 14016 io_ctrl_ins.rf_pin_state[2] -.sym 14018 io_ctrl_ins.rf_pin_state[0] -.sym 14023 io_ctrl_ins.rf_pin_state[1] -.sym 14030 io_ctrl_ins.debug_mode_SB_LUT4_I2_O[3] -.sym 14031 io_ctrl_ins.debug_mode_SB_LUT4_I2_O[1] -.sym 14040 io_ctrl_ins.rf_mode[2] -.sym 14043 io_ctrl_ins.rx_h_state_SB_DFFE_Q_E -.sym 14061 io_ctrl_ins.debug_mode_SB_LUT4_I2_O[1] -.sym 14062 io_ctrl_ins.debug_mode_SB_LUT4_I2_O[3] -.sym 14064 io_ctrl_ins.rf_pin_state[1] -.sym 14073 io_ctrl_ins.rf_pin_state[0] -.sym 14074 io_ctrl_ins.rf_mode[2] -.sym 14075 io_ctrl_ins.debug_mode_SB_LUT4_I2_O[1] -.sym 14076 io_ctrl_ins.debug_mode_SB_LUT4_I2_O[3] -.sym 14079 io_ctrl_ins.debug_mode_SB_LUT4_I2_O[3] -.sym 14080 io_ctrl_ins.rf_pin_state[2] -.sym 14081 io_ctrl_ins.rf_mode[2] -.sym 14082 io_ctrl_ins.debug_mode_SB_LUT4_I2_O[1] -.sym 14095 io_ctrl_ins.rx_h_state_SB_DFFE_Q_E +.sym 13975 io_ctrl_ins.o_pmod[7] +.sym 13976 io_ctrl_ins.o_pmod[6] +.sym 13977 io_ctrl_ins.pmod_state_SB_DFFE_Q_E +.sym 13978 io_ctrl_ins.pmod_dir_state_SB_DFFE_Q_E +.sym 13979 io_ctrl_ins.o_pmod[3] +.sym 13980 io_ctrl_ins.mixer_en_state_SB_LUT4_I1_O[0] +.sym 13981 io_ctrl_ins.rx_h_b_state_SB_LUT4_I0_I2[2] +.sym 13982 i_button_SB_LUT4_I0_O[2] +.sym 13992 io_ctrl_ins.led0_state_SB_DFFE_Q_E +.sym 13999 io_ctrl_ins.pmod_dir_state[4] +.sym 14000 o_led1$SB_IO_OUT +.sym 14005 io_ctrl_ins.pmod_dir_state[3] +.sym 14016 io_ctrl_ins.lna_tx_shutdown_state_SB_LUT4_I1_O[2] +.sym 14018 io_ctrl_ins.rf_pin_state_SB_DFFE_Q_E +.sym 14019 i_config_SB_LUT4_I0_I3[2] +.sym 14020 io_ctrl_ins.lna_tx_shutdown_state_SB_LUT4_I1_O[0] +.sym 14022 io_ctrl_ins.led1_state_SB_LUT4_I0_O_SB_LUT4_O_I2[3] +.sym 14024 o_led1$SB_IO_OUT +.sym 14026 io_ctrl_ins.tr_vc_2_state_SB_LUT4_I1_O[2] +.sym 14027 i_config_SB_LUT4_I0_I3[3] +.sym 14029 i_config_SB_LUT4_I0_I3[2] +.sym 14030 w_rx_data[6] +.sym 14032 io_ctrl_ins.pmod_dir_state[1] +.sym 14036 w_rx_data[5] +.sym 14039 io_ctrl_ins.led1_state_SB_LUT4_I0_O_SB_LUT4_O_I2[3] +.sym 14040 w_rx_data[7] +.sym 14043 w_rx_data[4] +.sym 14044 io_ctrl_ins.o_pmod[3] +.sym 14047 io_ctrl_ins.pmod_dir_state[0] +.sym 14049 i_config_SB_LUT4_I0_I3[2] +.sym 14050 io_ctrl_ins.o_pmod[3] +.sym 14051 io_ctrl_ins.led1_state_SB_LUT4_I0_O_SB_LUT4_O_I2[3] +.sym 14052 io_ctrl_ins.tr_vc_2_state_SB_LUT4_I1_O[2] +.sym 14055 o_led1$SB_IO_OUT +.sym 14056 io_ctrl_ins.pmod_dir_state[1] +.sym 14057 i_config_SB_LUT4_I0_I3[2] +.sym 14058 i_config_SB_LUT4_I0_I3[3] +.sym 14063 w_rx_data[4] +.sym 14067 w_rx_data[6] +.sym 14075 io_ctrl_ins.pmod_dir_state[0] +.sym 14080 w_rx_data[5] +.sym 14085 io_ctrl_ins.lna_tx_shutdown_state_SB_LUT4_I1_O[2] +.sym 14086 io_ctrl_ins.led1_state_SB_LUT4_I0_O_SB_LUT4_O_I2[3] +.sym 14087 io_ctrl_ins.lna_tx_shutdown_state_SB_LUT4_I1_O[0] +.sym 14088 i_config_SB_LUT4_I0_I3[2] +.sym 14091 w_rx_data[7] +.sym 14095 io_ctrl_ins.rf_pin_state_SB_DFFE_Q_E .sym 14096 r_counter[0]_$glb_clk -.sym 14111 o_led0$SB_IO_OUT -.sym 14116 o_rx_h_tx_l$SB_IO_OUT -.sym 14119 io_ctrl_ins.rx_h_state_SB_DFFE_Q_E -.sym 14121 o_led1$SB_IO_OUT +.sym 14098 io_ctrl_ins.pmod_dir_state[1] +.sym 14099 io_ctrl_ins.pmod_dir_state[3] +.sym 14102 i_config_SB_LUT4_I0_I3[1] +.sym 14104 io_ctrl_ins.pmod_dir_state[4] +.sym 14105 io_ctrl_ins.pmod_dir_state[0] +.sym 14112 io_ctrl_ins.rf_pin_state_SB_DFFE_Q_E +.sym 14119 i_config[0]$SB_IO_IN +.sym 14124 o_rx_h_tx_l_b$SB_IO_OUT +.sym 14128 w_rx_data[3] +.sym 14129 i_config_SB_LUT4_I0_I3[2] +.sym 14132 o_rx_h_tx_l$SB_IO_OUT +.sym 14141 io_ctrl_ins.rf_pin_state[4] +.sym 14142 io_ctrl_ins.rf_pin_state[2] +.sym 14144 io_ctrl_ins.tr_vc_1_state_SB_DFFE_Q_D_SB_LUT4_O_I0[0] +.sym 14145 io_ctrl_ins.rf_mode[1] +.sym 14146 io_ctrl_ins.rf_pin_state[3] +.sym 14147 io_ctrl_ins.rx_h_state_SB_DFFE_Q_D_SB_LUT4_O_I3[2] +.sym 14150 io_ctrl_ins.rx_h_state_SB_DFFE_Q_E +.sym 14152 io_ctrl_ins.rf_pin_state[5] +.sym 14154 io_ctrl_ins.rf_pin_state[7] +.sym 14157 io_ctrl_ins.rf_pin_state[6] +.sym 14160 io_ctrl_ins.rf_pin_state[0] +.sym 14163 io_ctrl_ins.rx_h_state_SB_DFFE_Q_D_SB_LUT4_O_I2[3] +.sym 14166 io_ctrl_ins.rf_mode[2] +.sym 14172 io_ctrl_ins.rf_mode[1] +.sym 14173 io_ctrl_ins.rf_pin_state[0] +.sym 14174 io_ctrl_ins.rf_mode[2] +.sym 14175 io_ctrl_ins.rx_h_state_SB_DFFE_Q_D_SB_LUT4_O_I2[3] +.sym 14178 io_ctrl_ins.rx_h_state_SB_DFFE_Q_D_SB_LUT4_O_I3[2] +.sym 14179 io_ctrl_ins.rf_pin_state[7] +.sym 14180 io_ctrl_ins.rx_h_state_SB_DFFE_Q_D_SB_LUT4_O_I2[3] +.sym 14184 io_ctrl_ins.rf_mode[1] +.sym 14185 io_ctrl_ins.tr_vc_1_state_SB_DFFE_Q_D_SB_LUT4_O_I0[0] +.sym 14186 io_ctrl_ins.rf_pin_state[4] +.sym 14187 io_ctrl_ins.rx_h_state_SB_DFFE_Q_D_SB_LUT4_O_I2[3] +.sym 14190 io_ctrl_ins.tr_vc_1_state_SB_DFFE_Q_D_SB_LUT4_O_I0[0] +.sym 14191 io_ctrl_ins.rf_mode[1] +.sym 14192 io_ctrl_ins.rx_h_state_SB_DFFE_Q_D_SB_LUT4_O_I2[3] +.sym 14193 io_ctrl_ins.rf_pin_state[5] +.sym 14196 io_ctrl_ins.rf_mode[1] +.sym 14197 io_ctrl_ins.rx_h_state_SB_DFFE_Q_D_SB_LUT4_O_I2[3] +.sym 14198 io_ctrl_ins.rf_mode[2] +.sym 14199 io_ctrl_ins.rf_pin_state[2] +.sym 14202 io_ctrl_ins.rx_h_state_SB_DFFE_Q_D_SB_LUT4_O_I2[3] +.sym 14204 io_ctrl_ins.rx_h_state_SB_DFFE_Q_D_SB_LUT4_O_I3[2] +.sym 14205 io_ctrl_ins.rf_pin_state[6] +.sym 14208 io_ctrl_ins.rf_mode[1] +.sym 14209 io_ctrl_ins.rx_h_state_SB_DFFE_Q_D_SB_LUT4_O_I2[3] +.sym 14210 io_ctrl_ins.rf_mode[2] +.sym 14211 io_ctrl_ins.rf_pin_state[3] +.sym 14218 io_ctrl_ins.rx_h_state_SB_DFFE_Q_E +.sym 14219 r_counter[0]_$glb_clk +.sym 14221 o_led1$SB_IO_OUT +.sym 14234 w_rx_data[1] +.sym 14235 o_rx_h_tx_l_b$SB_IO_OUT +.sym 14243 o_shdn_tx_lna$SB_IO_OUT +.sym 14248 o_tr_vc1$SB_IO_OUT +.sym 14254 o_tr_vc2$SB_IO_OUT +.sym 14289 io_ctrl_ins.led0_state_SB_DFFE_Q_E +.sym 14293 w_rx_data[0] +.sym 14297 w_rx_data[0] +.sym 14341 io_ctrl_ins.led0_state_SB_DFFE_Q_E +.sym 14342 r_counter[0]_$glb_clk +.sym 14352 o_led0$SB_IO_OUT +.sym 14358 w_rx_data[1] +.sym 14359 o_led1$SB_IO_OUT +.sym 14371 io_ctrl_ins.led0_state_SB_DFFE_Q_E +.sym 14375 w_rx_data[0] +.sym 14379 o_ldo_2v8_en$SB_IO_OUT .sym 14392 o_ldo_2v8_en$SB_IO_OUT -.sym 14412 o_ldo_2v8_en$SB_IO_OUT +.sym 14405 o_ldo_2v8_en$SB_IO_OUT .sym 14418 i_sck$SB_IO_IN .sym 14419 $PACKER_GND_NET -.sym 14436 i_sck$SB_IO_IN -.sym 14437 $PACKER_GND_NET -.sym 14476 i_sck$SB_IO_IN -.sym 14888 i_sck$SB_IO_IN -.sym 14982 spi_if_ins.spi.SCKr[0] -.sym 15101 spi_if_ins.spi.SCKr[1] -.sym 15103 spi_if_ins.spi.SCKr[2] -.sym 15106 spi_if_ins.spi.r_tx_bit_count_SB_DFFESR_Q_R -.sym 15107 spi_if_ins.spi.o_spi_miso_SB_DFFE_Q_E -.sym 15131 spi_if_ins.spi.o_spi_miso_SB_DFFE_Q_E -.sym 15132 i_ss$SB_IO_IN -.sym 15135 spi_if_ins.spi.o_spi_miso_SB_DFFE_Q_D_SB_LUT4_O_I2_SB_LUT4_O_I0[0] -.sym 15147 spi_if_ins.spi.r3_rx_done_SB_LUT4_I2_O -.sym 15200 spi_if_ins.spi.r3_rx_done_SB_LUT4_I2_O -.sym 15221 r_counter[0]_$glb_clk -.sym 15225 spi_if_ins.spi.r_tx_bit_count[2] -.sym 15227 spi_if_ins.spi.o_spi_miso_SB_DFFE_Q_D_SB_LUT4_O_I2[1] -.sym 15228 spi_if_ins.spi.SCKr_SB_LUT4_I0_O[1] -.sym 15229 spi_if_ins.spi.SCKr_SB_LUT4_I0_O[0] -.sym 15230 spi_if_ins.spi.o_spi_miso_SB_DFFE_Q_D_SB_LUT4_O_I2_SB_LUT4_O_I0_SB_LUT4_O_2_I0[3] -.sym 15239 io_pmod[7]$SB_IO_OUT -.sym 15240 spi_if_ins.spi.o_spi_miso_SB_DFFE_Q_E -.sym 15249 spi_if_ins.r_tx_data_valid_SB_LUT4_I3_O -.sym 15253 spi_if_ins.o_load_cmd_SB_DFFESR_Q_D[1] -.sym 15266 spi_if_ins.spi.r_tx_byte[4] -.sym 15269 spi_if_ins.r_tx_byte[5] -.sym 15277 spi_if_ins.r_tx_data_valid_SB_LUT4_I3_O -.sym 15279 spi_if_ins.r_tx_byte[0] -.sym 15282 spi_if_ins.spi.r_tx_bit_count[2] -.sym 15283 spi_if_ins.r_tx_byte[1] -.sym 15285 spi_if_ins.spi.r_tx_byte[0] -.sym 15287 spi_if_ins.spi.o_spi_miso_SB_DFFE_Q_D_SB_LUT4_O_I2_SB_LUT4_O_I0_SB_LUT4_O_2_I0[3] -.sym 15289 spi_if_ins.spi.r_tx_byte[3] -.sym 15290 spi_if_ins.spi.r_tx_byte[7] -.sym 15291 spi_if_ins.spi.r_tx_byte_SB_DFFESR_Q_E -.sym 15292 spi_if_ins.r_tx_byte[3] -.sym 15293 spi_if_ins.r_tx_byte[4] -.sym 15295 spi_if_ins.r_tx_byte[6] -.sym 15298 spi_if_ins.r_tx_byte[5] -.sym 15305 spi_if_ins.r_tx_byte[3] -.sym 15309 spi_if_ins.r_tx_byte[4] -.sym 15315 spi_if_ins.spi.o_spi_miso_SB_DFFE_Q_D_SB_LUT4_O_I2_SB_LUT4_O_I0_SB_LUT4_O_2_I0[3] -.sym 15316 spi_if_ins.spi.r_tx_byte[3] -.sym 15317 spi_if_ins.spi.r_tx_byte[7] -.sym 15318 spi_if_ins.spi.r_tx_bit_count[2] -.sym 15323 spi_if_ins.r_tx_byte[6] -.sym 15328 spi_if_ins.r_tx_byte[0] -.sym 15333 spi_if_ins.spi.r_tx_bit_count[2] -.sym 15334 spi_if_ins.spi.r_tx_byte[0] -.sym 15335 spi_if_ins.spi.r_tx_byte[4] -.sym 15341 spi_if_ins.r_tx_byte[1] -.sym 15343 spi_if_ins.spi.r_tx_byte_SB_DFFESR_Q_E +.sym 14439 $PACKER_GND_NET +.sym 14440 i_sck$SB_IO_IN +.sym 14479 $PACKER_GND_NET +.sym 14624 $PACKER_GND_NET +.sym 14751 o_miso_$_TBUF__Y_E +.sym 14887 i_ss$SB_IO_IN +.sym 14991 i_mosi$SB_IO_IN +.sym 15047 i_ss$SB_IO_IN +.sym 15089 i_ss$SB_IO_IN +.sym 15117 $PACKER_GND_NET +.sym 15124 i_ss$SB_IO_IN +.sym 15135 i_sck$SB_IO_IN +.sym 15226 spi_if_ins.spi.r_rx_done +.sym 15251 spi_if_ins.spi.r3_rx_done_SB_LUT4_I2_O +.sym 15253 spi_if_ins.spi.o_spi_miso_SB_DFFE_Q_E +.sym 15265 spi_if_ins.spi.r3_rx_done +.sym 15285 spi_if_ins.spi.r2_rx_done +.sym 15291 spi_if_ins.spi.r_rx_done +.sym 15305 spi_if_ins.spi.r2_rx_done +.sym 15328 spi_if_ins.spi.r_rx_done +.sym 15334 spi_if_ins.spi.r3_rx_done +.sym 15336 spi_if_ins.spi.r2_rx_done .sym 15344 r_counter[0]_$glb_clk -.sym 15345 spi_if_ins.r_tx_data_valid_SB_LUT4_I3_O -.sym 15346 spi_if_ins.spi.o_spi_miso_SB_DFFE_Q_D_SB_LUT4_O_I2_SB_LUT4_O_I0[3] -.sym 15347 spi_if_ins.o_load_cmd_SB_DFFESR_Q_D[1] -.sym 15349 spi_if_ins.spi.r_tx_byte_SB_DFFESR_Q_E -.sym 15350 spi_if_ins.spi.o_spi_miso_SB_DFFE_Q_D_SB_LUT4_O_I2_SB_LUT4_O_I0_SB_LUT4_O_2_I0[0] -.sym 15353 spi_if_ins.r_tx_data_valid_SB_LUT4_I3_O -.sym 15363 spi_if_ins.spi.r3_rx_done_SB_LUT4_I2_O -.sym 15378 spi_if_ins.r_tx_byte[7] -.sym 15388 r_tx_data[7] -.sym 15389 spi_if_ins.r_tx_data_valid_SB_DFFESR_Q_D_SB_LUT4_I3_O -.sym 15390 r_tx_data[5] -.sym 15391 spi_if_ins.spi.r_tx_byte[6] -.sym 15393 r_tx_data[2] -.sym 15394 spi_if_ins.spi.o_spi_miso_SB_DFFE_Q_D_SB_LUT4_O_I2_SB_LUT4_O_I0_SB_LUT4_O_2_I0[3] -.sym 15396 spi_if_ins.spi.r_tx_byte[2] -.sym 15397 spi_if_ins.spi.r_tx_bit_count[2] -.sym 15402 r_tx_data[0] -.sym 15421 r_tx_data[7] -.sym 15444 r_tx_data[2] -.sym 15450 r_tx_data[5] -.sym 15456 spi_if_ins.spi.r_tx_byte[6] -.sym 15457 spi_if_ins.spi.o_spi_miso_SB_DFFE_Q_D_SB_LUT4_O_I2_SB_LUT4_O_I0_SB_LUT4_O_2_I0[3] -.sym 15458 spi_if_ins.spi.r_tx_byte[2] -.sym 15459 spi_if_ins.spi.r_tx_bit_count[2] -.sym 15465 r_tx_data[0] -.sym 15466 spi_if_ins.r_tx_data_valid_SB_DFFESR_Q_D_SB_LUT4_I3_O -.sym 15467 r_counter[0]_$glb_clk -.sym 15469 spi_if_ins.spi.r_temp_rx_byte[2] -.sym 15471 spi_if_ins.spi.r_temp_rx_byte[4] -.sym 15472 spi_if_ins.spi.r_temp_rx_byte[5] -.sym 15473 spi_if_ins.spi.r_temp_rx_byte[0] -.sym 15474 spi_if_ins.spi.r_temp_rx_byte[6] -.sym 15475 spi_if_ins.spi.r_temp_rx_byte[1] -.sym 15476 spi_if_ins.spi.r_temp_rx_byte[3] -.sym 15486 spi_if_ins.r_tx_data_valid_SB_LUT4_I3_O -.sym 15487 spi_if_ins.r_tx_data_valid -.sym 15489 spi_if_ins.spi.r3_rx_done_SB_LUT4_I2_O -.sym 15498 spi_if_ins.w_rx_data[4] -.sym 15500 spi_if_ins.w_rx_data[5] -.sym 15502 w_tx_data_io[6] -.sym 15510 spi_if_ins.r_tx_byte[7] -.sym 15521 spi_if_ins.spi.r_tx_byte_SB_DFFESR_Q_E -.sym 15522 spi_if_ins.r_tx_byte[2] -.sym 15530 spi_if_ins.r_tx_data_valid_SB_LUT4_I3_O -.sym 15549 spi_if_ins.r_tx_byte[2] -.sym 15574 spi_if_ins.r_tx_byte[7] -.sym 15589 spi_if_ins.spi.r_tx_byte_SB_DFFESR_Q_E +.sym 15347 spi_if_ins.spi.o_spi_miso_SB_DFFE_Q_E +.sym 15348 spi_if_ins.spi.SCKr[0] +.sym 15350 spi_if_ins.spi.r_tx_bit_count_SB_DFFESR_Q_R +.sym 15351 spi_if_ins.spi.SCKr[1] +.sym 15352 spi_if_ins.spi.r_rx_done_SB_DFFER_Q_E +.sym 15353 spi_if_ins.spi.SCKr[2] +.sym 15377 spi_if_ins.state_if_SB_DFFESR_Q_D[1] +.sym 15397 spi_if_ins.spi.r_rx_bit_count[2] +.sym 15400 i_ss$SB_IO_IN +.sym 15401 spi_if_ins.spi.r_rx_bit_count[1] +.sym 15418 spi_if_ins.spi.r_rx_bit_count[0] +.sym 15419 $nextpnr_ICESTORM_LC_1$O +.sym 15422 spi_if_ins.spi.r_rx_bit_count[0] +.sym 15425 spi_if_ins.spi.r_rx_bit_count_SB_DFFR_Q_D_SB_LUT4_O_I3[2] +.sym 15428 spi_if_ins.spi.r_rx_bit_count[1] +.sym 15433 spi_if_ins.spi.r_rx_bit_count[2] +.sym 15435 spi_if_ins.spi.r_rx_bit_count_SB_DFFR_Q_D_SB_LUT4_O_I3[2] +.sym 15450 spi_if_ins.spi.r_rx_bit_count[1] +.sym 15452 spi_if_ins.spi.r_rx_bit_count[2] +.sym 15453 spi_if_ins.spi.r_rx_bit_count[0] +.sym 15456 spi_if_ins.spi.r_rx_bit_count[0] +.sym 15457 spi_if_ins.spi.r_rx_bit_count[1] +.sym 15463 spi_if_ins.spi.r_rx_bit_count[0] +.sym 15467 i_sck$SB_IO_IN_$glb_clk +.sym 15468 i_ss$SB_IO_IN +.sym 15471 spi_if_ins.spi.r_tx_bit_count[2] +.sym 15472 spi_if_ins.spi.SCKr_SB_LUT4_I0_O[1] +.sym 15473 spi_if_ins.spi.r_tx_bit_count[0] +.sym 15474 spi_if_ins.spi.r_tx_byte_SB_DFFESR_Q_E +.sym 15475 spi_if_ins.r_tx_data_valid_SB_LUT4_I3_O[0] +.sym 15476 spi_if_ins.r_tx_data_valid_SB_LUT4_I3_O_SB_LUT4_O_1_I1[2] +.sym 15488 i_ss$SB_IO_IN +.sym 15495 r_tx_data_SB_DFFESR_Q_R +.sym 15501 spi_if_ins.spi.r_rx_done_SB_DFFER_Q_E +.sym 15502 $PACKER_VCC_NET +.sym 15512 spi_if_ins.spi.r3_rx_done_SB_LUT4_I2_O +.sym 15513 spi_if_ins.spi.r_rx_byte[7] +.sym 15517 spi_if_ins.spi.r_rx_byte[3] +.sym 15519 spi_if_ins.spi.r_rx_byte[6] +.sym 15524 spi_if_ins.spi.r_rx_byte[5] +.sym 15531 spi_if_ins.spi.r_tx_byte_SB_DFFESR_Q_E +.sym 15544 spi_if_ins.spi.r_rx_byte[3] +.sym 15551 spi_if_ins.spi.r_rx_byte[7] +.sym 15556 spi_if_ins.spi.r_tx_byte_SB_DFFESR_Q_E +.sym 15564 spi_if_ins.spi.r_rx_byte[6] +.sym 15570 spi_if_ins.spi.r_rx_byte[5] +.sym 15589 spi_if_ins.spi.r3_rx_done_SB_LUT4_I2_O .sym 15590 r_counter[0]_$glb_clk -.sym 15591 spi_if_ins.r_tx_data_valid_SB_LUT4_I3_O -.sym 15592 spi_if_ins.spi.r_rx_byte[5] -.sym 15593 spi_if_ins.spi.r_rx_byte[6] -.sym 15595 spi_if_ins.spi.r_rx_byte[1] -.sym 15596 io_ctrl_ins.o_data_out_SB_DFFESR_Q_6_E -.sym 15597 spi_if_ins.spi.r_rx_byte[3] -.sym 15598 spi_if_ins.spi.r_rx_byte[4] -.sym 15599 spi_if_ins.spi.r_rx_byte[2] -.sym 15604 i_mosi$SB_IO_IN -.sym 15625 i_config_SB_LUT4_I3_O_SB_LUT4_O_I0[3] -.sym 15635 w_ioc[1] -.sym 15641 i_config_SB_LUT4_I3_O_SB_LUT4_O_1_I2[0] -.sym 15644 spi_if_ins.spi.r3_rx_done_SB_LUT4_I2_O -.sym 15645 w_ioc[2] -.sym 15650 spi_if_ins.spi.r_rx_byte[6] -.sym 15655 spi_if_ins.spi.r_rx_byte[4] -.sym 15656 spi_if_ins.spi.r_rx_byte[2] -.sym 15657 spi_if_ins.spi.r_rx_byte[5] -.sym 15660 spi_if_ins.spi.r_rx_byte[1] -.sym 15662 spi_if_ins.spi.r_rx_byte[3] -.sym 15664 io_ctrl_ins.o_data_out_SB_DFFESR_Q_6_E_SB_LUT4_O_I1_SB_LUT4_O_I1[1] -.sym 15666 spi_if_ins.spi.r_rx_byte[4] -.sym 15672 spi_if_ins.spi.r_rx_byte[5] -.sym 15680 spi_if_ins.spi.r_rx_byte[3] -.sym 15686 spi_if_ins.spi.r_rx_byte[2] -.sym 15693 spi_if_ins.spi.r_rx_byte[6] -.sym 15702 spi_if_ins.spi.r_rx_byte[1] -.sym 15708 i_config_SB_LUT4_I3_O_SB_LUT4_O_1_I2[0] -.sym 15709 w_ioc[1] -.sym 15710 w_ioc[2] -.sym 15711 io_ctrl_ins.o_data_out_SB_DFFESR_Q_6_E_SB_LUT4_O_I1_SB_LUT4_O_I1[1] -.sym 15712 spi_if_ins.spi.r3_rx_done_SB_LUT4_I2_O +.sym 15592 spi_if_ins.spi.r_tx_byte[4] +.sym 15593 spi_if_ins.r_tx_data_valid_SB_LUT4_I3_O_SB_LUT4_O_I1[0] +.sym 15594 spi_if_ins.r_tx_data_valid_SB_LUT4_I3_O_SB_LUT4_O_I1[1] +.sym 15595 spi_if_ins.r_tx_data_valid_SB_LUT4_I3_O[1] +.sym 15596 spi_if_ins.spi.r_tx_byte[5] +.sym 15597 spi_if_ins.spi.r_tx_byte[0] +.sym 15598 spi_if_ins.spi.r_tx_byte[3] +.sym 15599 spi_if_ins.r_tx_data_valid_SB_LUT4_I3_O_SB_LUT4_O_1_I1[0] +.sym 15606 spi_if_ins.spi.r3_rx_done_SB_LUT4_I2_O +.sym 15608 spi_if_ins.state_if_SB_DFFESR_Q_D[1] +.sym 15617 w_cs[1] +.sym 15618 spi_if_ins.o_cs_SB_LUT4_I1_O[1] +.sym 15620 spi_if_ins.r_tx_data_valid_SB_LUT4_I3_O[3] +.sym 15621 spi_if_ins.w_rx_data[5] +.sym 15633 spi_if_ins.r_tx_byte[2] +.sym 15634 spi_if_ins.spi.r_tx_byte[2] +.sym 15635 spi_if_ins.spi.r_tx_byte_SB_DFFESR_Q_E +.sym 15637 spi_if_ins.spi.r_tx_bit_count[0] +.sym 15639 spi_if_ins.r_tx_byte[7] +.sym 15643 spi_if_ins.spi.r_tx_bit_count[2] +.sym 15646 spi_if_ins.r_tx_data_valid_SB_LUT4_I3_O[3] +.sym 15651 spi_if_ins.spi.r_tx_byte[6] +.sym 15652 spi_if_ins.r_tx_byte[6] +.sym 15658 spi_if_ins.r_tx_byte[1] +.sym 15673 spi_if_ins.r_tx_byte[2] +.sym 15681 spi_if_ins.r_tx_byte[6] +.sym 15692 spi_if_ins.r_tx_byte[1] +.sym 15696 spi_if_ins.spi.r_tx_bit_count[2] +.sym 15697 spi_if_ins.spi.r_tx_bit_count[0] +.sym 15698 spi_if_ins.spi.r_tx_byte[2] +.sym 15699 spi_if_ins.spi.r_tx_byte[6] +.sym 15709 spi_if_ins.r_tx_byte[7] +.sym 15712 spi_if_ins.spi.r_tx_byte_SB_DFFESR_Q_E .sym 15713 r_counter[0]_$glb_clk -.sym 15715 w_tx_data_io[5] -.sym 15718 w_tx_data_io[7] -.sym 15719 w_tx_data_io[6] -.sym 15735 i_config_SB_LUT4_I3_O_SB_LUT4_O_I0[1] -.sym 15740 i_config[3]$SB_IO_IN -.sym 15742 io_ctrl_ins.pmod_dir_state[7] -.sym 15744 i_button$SB_IO_IN -.sym 15746 io_ctrl_ins.pmod_dir_state[5] -.sym 15748 io_ctrl_ins.tr_vc_1_state_SB_LUT4_I1_O[1] -.sym 15749 i_config_SB_LUT4_I3_O_SB_LUT4_O_I0[0] -.sym 15750 i_button_SB_LUT4_I3_O[1] -.sym 15761 w_rx_data[3] -.sym 15766 w_rx_data[2] -.sym 15767 io_ctrl_ins.rf_mode_SB_DFFE_Q_E -.sym 15769 w_rx_data[0] -.sym 15772 i_config_SB_LUT4_I3_O_SB_LUT4_O_1_I2[0] -.sym 15774 w_ioc[1] -.sym 15777 smi_ctrl_ins.o_data_out_SB_DFFESR_Q_E_SB_LUT4_O_I1[1] -.sym 15813 i_config_SB_LUT4_I3_O_SB_LUT4_O_1_I2[0] -.sym 15814 smi_ctrl_ins.o_data_out_SB_DFFESR_Q_E_SB_LUT4_O_I1[1] -.sym 15815 w_ioc[1] -.sym 15819 w_rx_data[3] -.sym 15827 w_rx_data[0] -.sym 15833 w_rx_data[2] -.sym 15835 io_ctrl_ins.rf_mode_SB_DFFE_Q_E +.sym 15714 spi_if_ins.r_tx_data_valid_SB_LUT4_I3_O[3] +.sym 15715 spi_if_ins.r_tx_byte[0] +.sym 15716 spi_if_ins.r_tx_byte[1] +.sym 15717 spi_if_ins.r_tx_data_valid_SB_DFFESR_Q_D_SB_LUT4_I3_O +.sym 15718 spi_if_ins.r_tx_byte[6] +.sym 15719 $PACKER_VCC_NET +.sym 15720 spi_if_ins.r_tx_byte[3] +.sym 15721 spi_if_ins.r_tx_byte[4] +.sym 15722 spi_if_ins.o_cs_SB_LUT4_I1_O[1] +.sym 15737 spi_if_ins.r_tx_byte[2] +.sym 15739 spi_if_ins.spi.r3_rx_done_SB_LUT4_I2_O +.sym 15747 w_tx_data_smi[0] +.sym 15762 w_cs[1] +.sym 15763 w_cs[2] +.sym 15767 w_cs[0] +.sym 15769 sys_ctrl_ins.i_cs_SB_DFFE_Q_D[0] +.sym 15770 spi_if_ins.w_rx_data[6] +.sym 15781 spi_if_ins.w_rx_data[5] +.sym 15782 w_cs[3] +.sym 15783 spi_if_ins.o_load_cmd_SB_DFFESR_Q_D_SB_LUT4_I1_O[0] +.sym 15789 spi_if_ins.w_rx_data[5] +.sym 15792 spi_if_ins.w_rx_data[6] +.sym 15795 w_cs[2] +.sym 15796 w_cs[0] +.sym 15797 w_cs[3] +.sym 15798 w_cs[1] +.sym 15801 spi_if_ins.w_rx_data[5] +.sym 15802 spi_if_ins.w_rx_data[6] +.sym 15819 w_cs[2] +.sym 15820 w_cs[0] +.sym 15821 w_cs[3] +.sym 15822 w_cs[1] +.sym 15827 spi_if_ins.w_rx_data[5] +.sym 15828 spi_if_ins.w_rx_data[6] +.sym 15831 spi_if_ins.w_rx_data[6] +.sym 15834 spi_if_ins.w_rx_data[5] +.sym 15835 spi_if_ins.o_load_cmd_SB_DFFESR_Q_D_SB_LUT4_I1_O[0] .sym 15836 r_counter[0]_$glb_clk -.sym 15839 io_ctrl_ins.rf_pin_state[3] -.sym 15840 i_button_SB_LUT4_I3_O[0] -.sym 15841 io_ctrl_ins.rx_h_b_state_SB_LUT4_I1_O[1] -.sym 15842 io_ctrl_ins.rf_pin_state[7] -.sym 15843 io_ctrl_ins.rx_h_b_state_SB_LUT4_I1_O[0] -.sym 15844 io_ctrl_ins.tr_vc_1_state_SB_LUT4_I1_O[0] -.sym 15851 io_ctrl_ins.o_data_out_SB_DFFESR_Q_6_R[1] -.sym 15857 w_rx_data[0] -.sym 15862 io_ctrl_ins.rf_mode[2] -.sym 15867 io_ctrl_ins.ldo2v8_state_SB_LUT4_I3_O[1] -.sym 15869 o_tr_vc2$SB_IO_OUT -.sym 15871 i_config_SB_LUT4_I3_O_SB_LUT4_O_1_I2[1] -.sym 15873 io_ctrl_ins.rf_mode[0] -.sym 15881 io_ctrl_ins.rf_mode_SB_DFFE_Q_E -.sym 15887 i_config_SB_LUT4_I3_O_SB_LUT4_O_I0[1] -.sym 15888 i_config_SB_LUT4_I3_O_SB_LUT4_O_I0[2] -.sym 15894 w_rx_data[4] -.sym 15895 i_config_SB_LUT4_I3_O_SB_LUT4_O_I0[3] -.sym 15901 i_config_SB_LUT4_I3_O[1] -.sym 15902 w_rx_data[1] -.sym 15909 i_config_SB_LUT4_I3_O_SB_LUT4_O_I0[0] -.sym 15912 i_config_SB_LUT4_I3_O_SB_LUT4_O_I0[3] -.sym 15913 i_config_SB_LUT4_I3_O_SB_LUT4_O_I0[0] -.sym 15914 i_config_SB_LUT4_I3_O[1] -.sym 15915 i_config_SB_LUT4_I3_O_SB_LUT4_O_I0[1] -.sym 15920 w_rx_data[1] -.sym 15930 i_config_SB_LUT4_I3_O_SB_LUT4_O_I0[1] -.sym 15931 i_config_SB_LUT4_I3_O_SB_LUT4_O_I0[2] -.sym 15932 i_config_SB_LUT4_I3_O_SB_LUT4_O_I0[0] -.sym 15933 i_config_SB_LUT4_I3_O_SB_LUT4_O_I0[3] -.sym 15936 w_rx_data[4] -.sym 15958 io_ctrl_ins.rf_mode_SB_DFFE_Q_E +.sym 15837 sys_ctrl_ins.i_cs_SB_DFFE_Q_D[0] +.sym 15838 smi_ctrl_ins.o_data_out_SB_LUT4_I0_2_O[0] +.sym 15839 r_tx_data[0] +.sym 15841 r_tx_data[1] +.sym 15842 io_ctrl_ins.o_data_out_SB_DFFESR_Q_6_R +.sym 15843 r_tx_data[6] +.sym 15844 r_tx_data[4] +.sym 15845 w_tx_data_io[7] +.sym 15850 sys_ctrl_ins.i_cs_SB_DFFE_Q_D[0] +.sym 15852 spi_if_ins.o_cs_SB_LUT4_I1_O[2] +.sym 15882 spi_if_ins.w_rx_data[6] +.sym 15884 spi_if_ins.o_cs_SB_LUT4_I1_O[2] +.sym 15886 spi_if_ins.state_if_SB_DFFESR_Q_D[1] +.sym 15888 w_tx_data_io[0] +.sym 15890 spi_if_ins.o_data_in_SB_DFFE_Q_E +.sym 15891 spi_if_ins.w_rx_data[5] +.sym 15894 spi_if_ins.o_cs_SB_LUT4_I1_O[1] +.sym 15907 w_tx_data_smi[0] +.sym 15918 spi_if_ins.o_cs_SB_LUT4_I1_O[2] +.sym 15919 spi_if_ins.o_cs_SB_LUT4_I1_O[1] +.sym 15920 w_tx_data_smi[0] +.sym 15921 w_tx_data_io[0] +.sym 15925 spi_if_ins.w_rx_data[5] +.sym 15937 spi_if_ins.state_if_SB_DFFESR_Q_D[1] +.sym 15956 spi_if_ins.w_rx_data[6] +.sym 15958 spi_if_ins.o_data_in_SB_DFFE_Q_E .sym 15959 r_counter[0]_$glb_clk -.sym 15961 io_ctrl_ins.o_pmod[6] -.sym 15964 io_ctrl_ins.o_pmod[5] -.sym 15965 io_ctrl_ins.tr_vc_1_state_SB_LUT4_I1_O[1] -.sym 15966 i_button_SB_LUT4_I3_O[1] -.sym 15967 io_ctrl_ins.rx_h_state_SB_DFFE_Q_D_SB_LUT4_O_I3[2] -.sym 15968 io_ctrl_ins.o_pmod[7] -.sym 15975 io_ctrl_ins.rf_mode_SB_DFFE_Q_E -.sym 15978 io_ctrl_ins.pmod_dir_state[6] -.sym 15986 o_tr_vc1_b$SB_IO_OUT -.sym 15988 w_rx_data[7] -.sym 16004 w_rx_data[4] -.sym 16006 io_ctrl_ins.rf_mode[2] -.sym 16008 w_rx_data[5] -.sym 16013 spi_if_ins.o_load_cmd_SB_LUT4_I3_1_O -.sym 16014 w_rx_data[0] -.sym 16015 w_rx_data[2] -.sym 16016 io_ctrl_ins.rf_mode[0] -.sym 16017 w_rx_data[1] -.sym 16018 w_rx_data[6] -.sym 16037 w_rx_data[2] -.sym 16044 w_rx_data[5] -.sym 16048 w_rx_data[0] -.sym 16056 w_rx_data[4] -.sym 16059 w_rx_data[6] -.sym 16065 io_ctrl_ins.rf_mode[0] -.sym 16066 io_ctrl_ins.rf_mode[2] -.sym 16078 w_rx_data[1] -.sym 16081 spi_if_ins.o_load_cmd_SB_LUT4_I3_1_O +.sym 15963 io_ctrl_ins.o_pmod[5] +.sym 15964 io_ctrl_ins.o_pmod[4] +.sym 15974 r_tx_data_SB_DFFESR_Q_R +.sym 15975 w_cs[0] +.sym 15981 r_tx_data_SB_DFFESR_Q_E +.sym 15986 w_rx_data[5] +.sym 15989 w_tx_data_io[5] +.sym 15990 w_rx_data[7] +.sym 15995 i_config[3]$SB_IO_IN +.sym 15996 w_rx_data[6] +.sym 16002 spi_if_ins.o_load_cmd_SB_LUT4_I3_O[1] +.sym 16004 i_button_SB_LUT4_I0_O[1] +.sym 16005 o_rx_h_tx_l$SB_IO_OUT +.sym 16006 io_ctrl_ins.o_data_out_SB_DFFESR_Q_6_R +.sym 16008 io_ctrl_ins.rx_h_b_state_SB_LUT4_I0_I2[2] +.sym 16009 i_button_SB_LUT4_I0_O[2] +.sym 16010 o_rx_h_tx_l_b$SB_IO_OUT +.sym 16013 io_ctrl_ins.o_data_out_SB_DFFESR_Q_6_E +.sym 16014 i_config_SB_LUT4_I0_I3[2] +.sym 16018 i_config[1]$SB_IO_IN +.sym 16020 io_ctrl_ins.o_pmod[5] +.sym 16021 io_ctrl_ins.tr_vc_1_state_SB_LUT4_I3_O[3] +.sym 16022 io_ctrl_ins.pmod_dir_state[4] +.sym 16023 i_config_SB_LUT4_I0_I3[3] +.sym 16025 o_tr_vc1$SB_IO_OUT +.sym 16026 io_ctrl_ins.tr_vc_1_state_SB_LUT4_I3_O[1] +.sym 16027 io_ctrl_ins.tr_vc_1_state_SB_LUT4_I3_O[2] +.sym 16028 io_ctrl_ins.rx_h_b_state_SB_LUT4_I0_I2[3] +.sym 16029 io_ctrl_ins.led1_state_SB_LUT4_I0_O_SB_LUT4_O_I2[3] +.sym 16031 w_ioc[2] +.sym 16033 i_button_SB_LUT4_I0_O[3] +.sym 16035 io_ctrl_ins.led1_state_SB_LUT4_I0_O_SB_LUT4_O_I2[3] +.sym 16037 w_ioc[2] +.sym 16038 i_config_SB_LUT4_I0_I3[2] +.sym 16041 i_config_SB_LUT4_I0_I3[2] +.sym 16042 w_ioc[2] +.sym 16043 o_tr_vc1$SB_IO_OUT +.sym 16044 io_ctrl_ins.led1_state_SB_LUT4_I0_O_SB_LUT4_O_I2[3] +.sym 16047 i_button_SB_LUT4_I0_O[1] +.sym 16048 i_button_SB_LUT4_I0_O[2] +.sym 16049 i_button_SB_LUT4_I0_O[3] +.sym 16050 o_rx_h_tx_l$SB_IO_OUT +.sym 16053 i_config_SB_LUT4_I0_I3[3] +.sym 16055 io_ctrl_ins.tr_vc_1_state_SB_LUT4_I3_O[1] +.sym 16056 i_button_SB_LUT4_I0_O[1] +.sym 16059 io_ctrl_ins.pmod_dir_state[4] +.sym 16060 i_config_SB_LUT4_I0_I3[2] +.sym 16061 i_config[1]$SB_IO_IN +.sym 16062 i_config_SB_LUT4_I0_I3[3] +.sym 16065 io_ctrl_ins.rx_h_b_state_SB_LUT4_I0_I2[3] +.sym 16066 i_button_SB_LUT4_I0_O[1] +.sym 16067 o_rx_h_tx_l_b$SB_IO_OUT +.sym 16068 io_ctrl_ins.rx_h_b_state_SB_LUT4_I0_I2[2] +.sym 16071 io_ctrl_ins.tr_vc_1_state_SB_LUT4_I3_O[2] +.sym 16072 io_ctrl_ins.tr_vc_1_state_SB_LUT4_I3_O[3] +.sym 16073 io_ctrl_ins.o_pmod[5] +.sym 16074 io_ctrl_ins.tr_vc_1_state_SB_LUT4_I3_O[1] +.sym 16077 i_config_SB_LUT4_I0_I3[3] +.sym 16078 spi_if_ins.o_load_cmd_SB_LUT4_I3_O[1] +.sym 16079 i_config_SB_LUT4_I0_I3[2] +.sym 16081 io_ctrl_ins.o_data_out_SB_DFFESR_Q_6_E .sym 16082 r_counter[0]_$glb_clk -.sym 16087 o_tr_vc2$SB_IO_OUT -.sym 16088 o_rx_h_tx_l_b$SB_IO_OUT -.sym 16090 o_rx_h_tx_l$SB_IO_OUT -.sym 16099 spi_if_ins.o_load_cmd_SB_LUT4_I3_1_O -.sym 16100 io_ctrl_ins.debug_mode_SB_LUT4_I2_O[1] -.sym 16126 io_ctrl_ins.rf_pin_state[5] -.sym 16127 io_ctrl_ins.rx_h_state_SB_DFFE_Q_E -.sym 16128 io_ctrl_ins.debug_mode_SB_LUT4_I2_O[2] -.sym 16130 io_ctrl_ins.debug_mode_SB_LUT4_I2_O[0] -.sym 16140 io_ctrl_ins.debug_mode_SB_LUT4_I2_O[1] -.sym 16147 io_ctrl_ins.debug_mode_SB_LUT4_I2_O[3] -.sym 16158 io_ctrl_ins.debug_mode_SB_LUT4_I2_O[3] -.sym 16159 io_ctrl_ins.rf_pin_state[5] -.sym 16160 io_ctrl_ins.debug_mode_SB_LUT4_I2_O[1] -.sym 16161 io_ctrl_ins.debug_mode_SB_LUT4_I2_O[0] -.sym 16170 io_ctrl_ins.debug_mode_SB_LUT4_I2_O[3] -.sym 16194 io_ctrl_ins.debug_mode_SB_LUT4_I2_O[3] -.sym 16195 io_ctrl_ins.debug_mode_SB_LUT4_I2_O[2] -.sym 16196 io_ctrl_ins.debug_mode_SB_LUT4_I2_O[1] -.sym 16197 io_ctrl_ins.debug_mode_SB_LUT4_I2_O[0] -.sym 16204 io_ctrl_ins.rx_h_state_SB_DFFE_Q_E +.sym 16083 io_ctrl_ins.o_data_out_SB_DFFESR_Q_6_R +.sym 16084 io_ctrl_ins.pmod_dir_state[6] +.sym 16085 io_ctrl_ins.pmod_dir_state[5] +.sym 16086 io_ctrl_ins.rx_h_b_state_SB_LUT4_I0_I2[3] +.sym 16087 io_ctrl_ins.tr_vc_1_state_SB_LUT4_I3_O[3] +.sym 16088 io_ctrl_ins.pmod_dir_state[7] +.sym 16091 i_button_SB_LUT4_I0_O[3] +.sym 16099 o_rx_h_tx_l$SB_IO_OUT +.sym 16102 i_config_SB_LUT4_I0_I3[2] +.sym 16106 o_rx_h_tx_l_b$SB_IO_OUT +.sym 16119 io_ctrl_ins.led0_state_SB_DFFE_Q_E +.sym 16125 w_rx_data[7] +.sym 16131 w_rx_data[6] +.sym 16132 io_ctrl_ins.led1_state_SB_LUT4_I0_O_SB_LUT4_O_I2[3] +.sym 16133 io_ctrl_ins.tr_vc_1_state_SB_LUT4_I3_O[1] +.sym 16136 i_config_SB_LUT4_I0_I3[3] +.sym 16139 w_rx_data[0] +.sym 16141 io_ctrl_ins.o_pmod[7] +.sym 16143 io_ctrl_ins.pmod_state_SB_DFFE_Q_E +.sym 16144 i_config_SB_LUT4_I0_I3[2] +.sym 16145 w_ioc[2] +.sym 16147 i_config_SB_LUT4_I0_I3[2] +.sym 16149 spi_if_ins.o_load_cmd_SB_LUT4_I3_O[1] +.sym 16150 io_ctrl_ins.o_pmod[6] +.sym 16151 w_rx_data[3] +.sym 16158 w_rx_data[7] +.sym 16167 w_rx_data[6] +.sym 16171 io_ctrl_ins.tr_vc_1_state_SB_LUT4_I3_O[1] +.sym 16173 spi_if_ins.o_load_cmd_SB_LUT4_I3_O[1] +.sym 16176 spi_if_ins.o_load_cmd_SB_LUT4_I3_O[1] +.sym 16177 i_config_SB_LUT4_I0_I3[3] +.sym 16179 i_config_SB_LUT4_I0_I3[2] +.sym 16185 w_rx_data[3] +.sym 16188 w_rx_data[0] +.sym 16194 io_ctrl_ins.o_pmod[6] +.sym 16195 io_ctrl_ins.led1_state_SB_LUT4_I0_O_SB_LUT4_O_I2[3] +.sym 16196 w_ioc[2] +.sym 16197 i_config_SB_LUT4_I0_I3[2] +.sym 16200 io_ctrl_ins.led1_state_SB_LUT4_I0_O_SB_LUT4_O_I2[3] +.sym 16201 w_ioc[2] +.sym 16202 i_config_SB_LUT4_I0_I3[2] +.sym 16203 io_ctrl_ins.o_pmod[7] +.sym 16204 io_ctrl_ins.pmod_state_SB_DFFE_Q_E .sym 16205 r_counter[0]_$glb_clk -.sym 16219 o_tr_vc1$SB_IO_OUT -.sym 16220 io_ctrl_ins.debug_mode_SB_LUT4_I2_O[1] -.sym 16227 io_ctrl_ins.rx_h_state_SB_DFFE_Q_E -.sym 16232 i_config[3]$SB_IO_IN -.sym 16236 i_button$SB_IO_IN +.sym 16220 o_tr_vc2$SB_IO_OUT +.sym 16227 w_rx_data[0] +.sym 16228 o_tr_vc1$SB_IO_OUT +.sym 16230 i_config_SB_LUT4_I0_I3[3] +.sym 16231 w_ioc[2] +.sym 16236 w_rx_data[4] +.sym 16248 w_rx_data[2] +.sym 16252 w_rx_data[4] +.sym 16259 io_ctrl_ins.pmod_dir_state_SB_DFFE_Q_E +.sym 16260 w_rx_data[1] +.sym 16261 w_rx_data[0] +.sym 16271 w_rx_data[3] +.sym 16282 w_rx_data[1] +.sym 16289 w_rx_data[3] +.sym 16307 w_rx_data[2] +.sym 16317 w_rx_data[4] +.sym 16326 w_rx_data[0] +.sym 16327 io_ctrl_ins.pmod_dir_state_SB_DFFE_Q_E +.sym 16328 r_counter[0]_$glb_clk +.sym 16342 w_rx_data[2] +.sym 16349 w_rx_data[0] +.sym 16362 i_button$SB_IO_IN +.sym 16380 w_rx_data[1] +.sym 16389 io_ctrl_ins.led0_state_SB_DFFE_Q_E +.sym 16404 w_rx_data[1] +.sym 16450 io_ctrl_ins.led0_state_SB_DFFE_Q_E +.sym 16451 r_counter[0]_$glb_clk .sym 16453 i_config[3]$SB_IO_IN .sym 16455 i_button$SB_IO_IN -.sym 16708 $PACKER_GND_NET -.sym 16736 i_ss$SB_IO_IN -.sym 16842 o_miso_$_TBUF__Y_E -.sym 16859 i_sck$SB_IO_IN -.sym 16866 $PACKER_GND_NET -.sym 17109 i_ss$SB_IO_IN -.sym 17111 spi_if_ins.spi.r_tx_bit_count_SB_DFFESR_Q_R -.sym 17133 i_sck$SB_IO_IN -.sym 17193 i_sck$SB_IO_IN -.sym 17207 r_counter[0]_$glb_clk -.sym 17213 int_miso -.sym 17255 spi_if_ins.spi.SCKr[0] -.sym 17269 spi_if_ins.spi.SCKr[2] -.sym 17275 spi_if_ins.spi.SCKr[1] -.sym 17280 spi_if_ins.r_tx_data_valid_SB_LUT4_I3_O -.sym 17291 spi_if_ins.spi.SCKr[0] -.sym 17302 spi_if_ins.spi.SCKr[1] -.sym 17322 spi_if_ins.r_tx_data_valid_SB_LUT4_I3_O -.sym 17325 spi_if_ins.r_tx_data_valid_SB_LUT4_I3_O -.sym 17327 spi_if_ins.spi.SCKr[2] -.sym 17328 spi_if_ins.spi.SCKr[1] -.sym 17330 r_counter[0]_$glb_clk -.sym 17355 spi_if_ins.r_tx_byte[7] -.sym 17358 $PACKER_GND_NET -.sym 17359 spi_if_ins.r_tx_data_valid_SB_LUT4_I3_O -.sym 17373 spi_if_ins.spi.o_spi_miso_SB_DFFE_Q_D_SB_LUT4_O_I2_SB_LUT4_O_I0[3] -.sym 17376 spi_if_ins.spi.SCKr[2] -.sym 17379 $PACKER_VCC_NET -.sym 17380 spi_if_ins.spi.o_spi_miso_SB_DFFE_Q_D_SB_LUT4_O_I2_SB_LUT4_O_I0[0] -.sym 17382 spi_if_ins.spi.SCKr[1] -.sym 17383 spi_if_ins.spi.r_tx_bit_count[2] -.sym 17384 spi_if_ins.spi.o_spi_miso_SB_DFFE_Q_E -.sym 17387 spi_if_ins.spi.SCKr_SB_LUT4_I0_O[0] -.sym 17388 spi_if_ins.spi.o_spi_miso_SB_DFFE_Q_D_SB_LUT4_O_I2_SB_LUT4_O_I0_SB_LUT4_O_2_I0[3] -.sym 17395 spi_if_ins.spi.o_spi_miso_SB_DFFE_Q_D_SB_LUT4_O_I2_SB_LUT4_O_I0[1] -.sym 17402 spi_if_ins.spi.r_tx_bit_count_SB_DFFESR_Q_R -.sym 17405 $nextpnr_ICESTORM_LC_2$O -.sym 17408 spi_if_ins.spi.o_spi_miso_SB_DFFE_Q_D_SB_LUT4_O_I2_SB_LUT4_O_I0_SB_LUT4_O_2_I0[3] -.sym 17411 spi_if_ins.spi.r_tx_bit_count_SB_DFFESR_Q_D_SB_LUT4_O_I3[2] -.sym 17413 $PACKER_VCC_NET -.sym 17414 spi_if_ins.spi.SCKr_SB_LUT4_I0_O[0] -.sym 17418 $PACKER_VCC_NET -.sym 17419 spi_if_ins.spi.r_tx_bit_count[2] -.sym 17421 spi_if_ins.spi.r_tx_bit_count_SB_DFFESR_Q_D_SB_LUT4_O_I3[2] -.sym 17430 spi_if_ins.spi.o_spi_miso_SB_DFFE_Q_D_SB_LUT4_O_I2_SB_LUT4_O_I0[1] -.sym 17431 spi_if_ins.spi.o_spi_miso_SB_DFFE_Q_D_SB_LUT4_O_I2_SB_LUT4_O_I0[0] -.sym 17432 spi_if_ins.spi.o_spi_miso_SB_DFFE_Q_D_SB_LUT4_O_I2_SB_LUT4_O_I0[3] -.sym 17433 spi_if_ins.spi.SCKr_SB_LUT4_I0_O[0] -.sym 17436 spi_if_ins.spi.r_tx_bit_count[2] -.sym 17437 spi_if_ins.spi.o_spi_miso_SB_DFFE_Q_D_SB_LUT4_O_I2_SB_LUT4_O_I0_SB_LUT4_O_2_I0[3] -.sym 17438 spi_if_ins.spi.SCKr[2] -.sym 17439 spi_if_ins.spi.SCKr[1] -.sym 17442 $PACKER_VCC_NET -.sym 17443 spi_if_ins.spi.SCKr_SB_LUT4_I0_O[0] -.sym 17444 spi_if_ins.spi.o_spi_miso_SB_DFFE_Q_D_SB_LUT4_O_I2_SB_LUT4_O_I0_SB_LUT4_O_2_I0[3] -.sym 17449 spi_if_ins.spi.o_spi_miso_SB_DFFE_Q_D_SB_LUT4_O_I2_SB_LUT4_O_I0_SB_LUT4_O_2_I0[3] -.sym 17452 spi_if_ins.spi.o_spi_miso_SB_DFFE_Q_E -.sym 17453 r_counter[0]_$glb_clk -.sym 17454 spi_if_ins.spi.r_tx_bit_count_SB_DFFESR_Q_R -.sym 17457 spi_if_ins.spi.r_rx_bit_count[2] -.sym 17458 spi_if_ins.spi.r_rx_bit_count[0] -.sym 17459 spi_if_ins.spi.r_rx_done_SB_DFFER_Q_E -.sym 17460 spi_if_ins.spi.r_rx_bit_count[1] -.sym 17462 spi_if_ins.spi.r_rx_done_SB_DFFER_Q_D[1] -.sym 17475 $PACKER_VCC_NET -.sym 17497 i_ss$SB_IO_IN -.sym 17498 spi_if_ins.spi.r_tx_bit_count[2] -.sym 17500 spi_if_ins.spi.o_spi_miso_SB_DFFE_Q_D_SB_LUT4_O_I2_SB_LUT4_O_I0_SB_LUT4_O_2_I0[0] -.sym 17501 spi_if_ins.spi.SCKr_SB_LUT4_I0_O[1] -.sym 17502 spi_if_ins.spi.SCKr_SB_LUT4_I0_O[0] -.sym 17503 spi_if_ins.spi.o_spi_miso_SB_DFFE_Q_D_SB_LUT4_O_I2_SB_LUT4_O_I0_SB_LUT4_O_2_I0[3] -.sym 17505 spi_if_ins.r_tx_data_valid -.sym 17507 spi_if_ins.spi.r3_rx_done_SB_LUT4_I2_O -.sym 17511 spi_if_ins.r_tx_data_valid_SB_LUT4_I3_O -.sym 17519 spi_if_ins.spi.r_tx_byte[1] -.sym 17520 spi_if_ins.spi.r_tx_byte[5] -.sym 17525 spi_if_ins.spi.r_rx_byte[7] -.sym 17526 spi_if_ins.spi.o_spi_miso_SB_DFFE_Q_D_SB_LUT4_O_I2_SB_LUT4_O_I0_SB_LUT4_O_2_I0[1] -.sym 17529 spi_if_ins.spi.SCKr_SB_LUT4_I0_O[0] -.sym 17530 spi_if_ins.spi.o_spi_miso_SB_DFFE_Q_D_SB_LUT4_O_I2_SB_LUT4_O_I0_SB_LUT4_O_2_I0[1] -.sym 17531 spi_if_ins.spi.o_spi_miso_SB_DFFE_Q_D_SB_LUT4_O_I2_SB_LUT4_O_I0_SB_LUT4_O_2_I0[0] -.sym 17532 spi_if_ins.spi.o_spi_miso_SB_DFFE_Q_D_SB_LUT4_O_I2_SB_LUT4_O_I0_SB_LUT4_O_2_I0[3] -.sym 17536 spi_if_ins.spi.r_rx_byte[7] -.sym 17548 spi_if_ins.spi.SCKr_SB_LUT4_I0_O[0] -.sym 17549 spi_if_ins.spi.SCKr_SB_LUT4_I0_O[1] -.sym 17550 spi_if_ins.r_tx_data_valid_SB_LUT4_I3_O -.sym 17554 spi_if_ins.spi.r_tx_byte[5] -.sym 17555 spi_if_ins.spi.r_tx_bit_count[2] -.sym 17556 spi_if_ins.spi.r_tx_byte[1] -.sym 17572 spi_if_ins.r_tx_data_valid -.sym 17573 i_ss$SB_IO_IN -.sym 17575 spi_if_ins.spi.r3_rx_done_SB_LUT4_I2_O +.sym 16482 i_config[3]$SB_IO_IN +.sym 16856 i_ss$SB_IO_IN +.sym 16981 $PACKER_GND_NET +.sym 17099 i_ss$SB_IO_IN +.sym 17100 i_sck$SB_IO_IN +.sym 17237 spi_if_ins.r_tx_data_valid_SB_DFFESR_Q_D[0] +.sym 17363 spi_if_ins.spi.o_spi_miso_SB_DFFE_Q_E +.sym 17375 spi_if_ins.spi.r_rx_done_SB_DFFER_Q_E +.sym 17377 i_ss$SB_IO_IN +.sym 17402 spi_if_ins.spi.r_rx_done_SB_DFFER_Q_D[1] +.sym 17425 spi_if_ins.spi.r_rx_done_SB_DFFER_Q_D[1] +.sym 17452 spi_if_ins.spi.r_rx_done_SB_DFFER_Q_E +.sym 17453 i_sck$SB_IO_IN_$glb_clk +.sym 17454 i_ss$SB_IO_IN +.sym 17455 spi_if_ins.r_tx_data_valid_SB_LUT4_I3_O[3] +.sym 17460 spi_if_ins.r_tx_data_valid +.sym 17471 spi_if_ins.spi.r_rx_done_SB_DFFER_Q_E +.sym 17498 spi_if_ins.spi.r_rx_bit_count[2] +.sym 17501 spi_if_ins.spi.SCKr[1] +.sym 17503 spi_if_ins.spi.SCKr[2] +.sym 17506 i_sck$SB_IO_IN +.sym 17510 spi_if_ins.spi.r_rx_bit_count[1] +.sym 17511 spi_if_ins.spi.r_rx_bit_count[0] +.sym 17512 spi_if_ins.r_tx_data_valid_SB_LUT4_I3_O[3] +.sym 17514 spi_if_ins.spi.SCKr[0] +.sym 17535 spi_if_ins.spi.SCKr[2] +.sym 17537 spi_if_ins.spi.SCKr[1] +.sym 17538 spi_if_ins.r_tx_data_valid_SB_LUT4_I3_O[3] +.sym 17544 i_sck$SB_IO_IN +.sym 17555 spi_if_ins.r_tx_data_valid_SB_LUT4_I3_O[3] +.sym 17562 spi_if_ins.spi.SCKr[0] +.sym 17565 spi_if_ins.spi.r_rx_bit_count[2] +.sym 17567 spi_if_ins.spi.r_rx_bit_count[0] +.sym 17568 spi_if_ins.spi.r_rx_bit_count[1] +.sym 17571 spi_if_ins.spi.SCKr[1] .sym 17576 r_counter[0]_$glb_clk -.sym 17578 spi_if_ins.spi.r_rx_byte[0] -.sym 17580 spi_if_ins.spi.r_rx_done_SB_DFFER_Q_D_SB_LUT4_I3_O -.sym 17583 spi_if_ins.spi.r_rx_byte[7] -.sym 17590 i_ss$SB_IO_IN -.sym 17605 o_miso_$_TBUF__Y_E -.sym 17606 spi_if_ins.w_rx_data[0] -.sym 17619 spi_if_ins.spi.r_temp_rx_byte[2] -.sym 17621 o_miso_$_TBUF__Y_E -.sym 17626 spi_if_ins.spi.r_temp_rx_byte[3] -.sym 17629 spi_if_ins.spi.r_temp_rx_byte[4] -.sym 17630 spi_if_ins.spi.r_temp_rx_byte[5] -.sym 17632 i_mosi$SB_IO_IN -.sym 17639 spi_if_ins.spi.r_temp_rx_byte[0] -.sym 17649 spi_if_ins.spi.r_temp_rx_byte[1] -.sym 17653 spi_if_ins.spi.r_temp_rx_byte[1] -.sym 17667 spi_if_ins.spi.r_temp_rx_byte[3] -.sym 17672 spi_if_ins.spi.r_temp_rx_byte[4] -.sym 17676 i_mosi$SB_IO_IN -.sym 17685 spi_if_ins.spi.r_temp_rx_byte[5] -.sym 17688 spi_if_ins.spi.r_temp_rx_byte[0] -.sym 17695 spi_if_ins.spi.r_temp_rx_byte[2] -.sym 17698 o_miso_$_TBUF__Y_E -.sym 17699 i_sck$SB_IO_IN_$glb_clk -.sym 17701 spi_if_ins.w_rx_data[0] -.sym 17704 io_ctrl_ins.o_data_out_SB_DFFESR_Q_6_E -.sym 17722 i_ss$SB_IO_IN -.sym 17730 w_tx_data_io[5] -.sym 17736 w_tx_data_io[7] -.sym 17744 spi_if_ins.spi.r_rx_done_SB_DFFER_Q_D_SB_LUT4_I3_O -.sym 17745 spi_if_ins.spi.r_temp_rx_byte[5] -.sym 17748 spi_if_ins.spi.r_temp_rx_byte[1] -.sym 17749 io_ctrl_ins.o_data_out_SB_DFFESR_Q_6_E_SB_LUT4_O_I1[0] -.sym 17750 spi_if_ins.spi.r_temp_rx_byte[2] -.sym 17752 spi_if_ins.spi.r_temp_rx_byte[4] -.sym 17753 i_config_SB_LUT4_I3_O_SB_LUT4_O_I0[1] -.sym 17754 spi_if_ins.spi.r_temp_rx_byte[0] -.sym 17757 spi_if_ins.spi.r_temp_rx_byte[3] -.sym 17765 i_config_SB_LUT4_I3_O_SB_LUT4_O_I0[0] -.sym 17776 spi_if_ins.spi.r_temp_rx_byte[4] -.sym 17783 spi_if_ins.spi.r_temp_rx_byte[5] -.sym 17793 spi_if_ins.spi.r_temp_rx_byte[0] -.sym 17799 i_config_SB_LUT4_I3_O_SB_LUT4_O_I0[1] -.sym 17800 i_config_SB_LUT4_I3_O_SB_LUT4_O_I0[0] -.sym 17802 io_ctrl_ins.o_data_out_SB_DFFESR_Q_6_E_SB_LUT4_O_I1[0] -.sym 17807 spi_if_ins.spi.r_temp_rx_byte[2] -.sym 17811 spi_if_ins.spi.r_temp_rx_byte[3] -.sym 17818 spi_if_ins.spi.r_temp_rx_byte[1] -.sym 17821 spi_if_ins.spi.r_rx_done_SB_DFFER_Q_D_SB_LUT4_I3_O -.sym 17822 i_sck$SB_IO_IN_$glb_clk -.sym 17833 spi_if_ins.spi.r3_rx_done_SB_LUT4_I2_O -.sym 17853 i_config[2]$SB_IO_IN -.sym 17868 io_ctrl_ins.rx_h_b_state_SB_LUT4_I1_O[1] -.sym 17869 io_ctrl_ins.o_data_out_SB_DFFESR_Q_6_R[1] -.sym 17875 i_button_SB_LUT4_I3_O[0] -.sym 17876 io_ctrl_ins.o_data_out_SB_DFFESR_Q_6_E -.sym 17878 io_ctrl_ins.rx_h_b_state_SB_LUT4_I1_O[0] -.sym 17879 io_ctrl_ins.tr_vc_1_state_SB_LUT4_I1_O[0] -.sym 17881 io_ctrl_ins.tr_vc_1_state_SB_LUT4_I1_O[1] -.sym 17891 i_button_SB_LUT4_I3_O[1] -.sym 17898 io_ctrl_ins.tr_vc_1_state_SB_LUT4_I1_O[1] -.sym 17901 io_ctrl_ins.tr_vc_1_state_SB_LUT4_I1_O[0] -.sym 17916 i_button_SB_LUT4_I3_O[1] -.sym 17918 i_button_SB_LUT4_I3_O[0] -.sym 17924 io_ctrl_ins.rx_h_b_state_SB_LUT4_I1_O[0] -.sym 17925 io_ctrl_ins.rx_h_b_state_SB_LUT4_I1_O[1] -.sym 17944 io_ctrl_ins.o_data_out_SB_DFFESR_Q_6_E +.sym 17584 int_miso +.sym 17591 i_ss$SB_IO_IN +.sym 17597 spi_if_ins.r_tx_data_valid_SB_LUT4_I3_O[3] +.sym 17621 spi_if_ins.spi.r_tx_bit_count[2] +.sym 17623 spi_if_ins.spi.r_tx_bit_count_SB_DFFESR_Q_R +.sym 17624 spi_if_ins.spi.SCKr[1] +.sym 17626 spi_if_ins.spi.SCKr[2] +.sym 17627 spi_if_ins.r_tx_data_valid_SB_LUT4_I3_O[3] +.sym 17628 spi_if_ins.r_tx_data_valid_SB_LUT4_I3_O_SB_LUT4_O_I1[0] +.sym 17629 spi_if_ins.r_tx_data_valid_SB_LUT4_I3_O_SB_LUT4_O_I1[1] +.sym 17638 spi_if_ins.spi.SCKr_SB_LUT4_I0_O[1] +.sym 17639 spi_if_ins.spi.r_tx_bit_count[0] +.sym 17643 $PACKER_VCC_NET +.sym 17646 spi_if_ins.spi.o_spi_miso_SB_DFFE_Q_E +.sym 17650 spi_if_ins.r_tx_data_valid_SB_LUT4_I3_O_SB_LUT4_O_1_I1[2] +.sym 17651 $nextpnr_ICESTORM_LC_2$O +.sym 17654 spi_if_ins.spi.r_tx_bit_count[0] +.sym 17657 spi_if_ins.spi.r_tx_bit_count_SB_DFFESR_Q_D_SB_LUT4_O_1_I3[2] +.sym 17659 spi_if_ins.r_tx_data_valid_SB_LUT4_I3_O_SB_LUT4_O_1_I1[2] +.sym 17660 $PACKER_VCC_NET +.sym 17664 spi_if_ins.spi.r_tx_bit_count[2] +.sym 17665 $PACKER_VCC_NET +.sym 17667 spi_if_ins.spi.r_tx_bit_count_SB_DFFESR_Q_D_SB_LUT4_O_1_I3[2] +.sym 17670 spi_if_ins.spi.SCKr[2] +.sym 17671 spi_if_ins.spi.r_tx_bit_count[0] +.sym 17672 spi_if_ins.spi.SCKr[1] +.sym 17673 spi_if_ins.spi.r_tx_bit_count[2] +.sym 17678 spi_if_ins.spi.r_tx_bit_count[0] +.sym 17682 spi_if_ins.spi.SCKr_SB_LUT4_I0_O[1] +.sym 17684 spi_if_ins.r_tx_data_valid_SB_LUT4_I3_O[3] +.sym 17685 spi_if_ins.r_tx_data_valid_SB_LUT4_I3_O_SB_LUT4_O_1_I1[2] +.sym 17688 spi_if_ins.r_tx_data_valid_SB_LUT4_I3_O_SB_LUT4_O_1_I1[2] +.sym 17689 spi_if_ins.r_tx_data_valid_SB_LUT4_I3_O_SB_LUT4_O_I1[1] +.sym 17690 spi_if_ins.r_tx_data_valid_SB_LUT4_I3_O_SB_LUT4_O_I1[0] +.sym 17694 $PACKER_VCC_NET +.sym 17695 spi_if_ins.spi.r_tx_bit_count[0] +.sym 17697 spi_if_ins.r_tx_data_valid_SB_LUT4_I3_O_SB_LUT4_O_1_I1[2] +.sym 17698 spi_if_ins.spi.o_spi_miso_SB_DFFE_Q_E +.sym 17699 r_counter[0]_$glb_clk +.sym 17700 spi_if_ins.spi.r_tx_bit_count_SB_DFFESR_Q_R +.sym 17701 spi_if_ins.r_tx_byte[2] +.sym 17702 spi_if_ins.r_tx_byte[5] +.sym 17704 spi_if_ins.r_tx_byte[7] +.sym 17706 spi_if_ins.r_tx_data_valid_SB_DFFESR_Q_D_SB_LUT4_I3_O +.sym 17722 spi_if_ins.spi.o_spi_miso_SB_DFFE_Q_E +.sym 17726 r_tx_data[3] +.sym 17730 spi_if_ins.r_tx_data_valid_SB_DFFESR_Q_D[1] +.sym 17731 w_tx_data_io[2] +.sym 17742 spi_if_ins.r_tx_byte[0] +.sym 17744 spi_if_ins.spi.r_tx_bit_count[2] +.sym 17746 spi_if_ins.spi.r_tx_bit_count[0] +.sym 17747 spi_if_ins.r_tx_byte[3] +.sym 17748 spi_if_ins.r_tx_byte[4] +.sym 17749 spi_if_ins.r_tx_data_valid_SB_LUT4_I3_O_SB_LUT4_O_1_I1[2] +.sym 17750 spi_if_ins.spi.r_tx_byte[4] +.sym 17752 spi_if_ins.spi.r_tx_bit_count[2] +.sym 17754 spi_if_ins.spi.r_tx_byte[1] +.sym 17755 spi_if_ins.r_tx_data_valid_SB_LUT4_I3_O_SB_LUT4_O_1_I1[1] +.sym 17757 spi_if_ins.spi.r_tx_byte[7] +.sym 17759 spi_if_ins.r_tx_byte[5] +.sym 17760 spi_if_ins.spi.r_tx_byte_SB_DFFESR_Q_E +.sym 17763 spi_if_ins.spi.r_tx_byte[0] +.sym 17770 spi_if_ins.spi.r_tx_byte[5] +.sym 17771 spi_if_ins.r_tx_data_valid_SB_LUT4_I3_O[3] +.sym 17772 spi_if_ins.spi.r_tx_byte[3] +.sym 17773 spi_if_ins.r_tx_data_valid_SB_LUT4_I3_O_SB_LUT4_O_1_I1[0] +.sym 17777 spi_if_ins.r_tx_byte[4] +.sym 17781 spi_if_ins.spi.r_tx_byte[4] +.sym 17782 spi_if_ins.spi.r_tx_bit_count[2] +.sym 17783 spi_if_ins.spi.r_tx_byte[0] +.sym 17784 spi_if_ins.spi.r_tx_bit_count[0] +.sym 17787 spi_if_ins.spi.r_tx_bit_count[2] +.sym 17788 spi_if_ins.spi.r_tx_byte[5] +.sym 17789 spi_if_ins.spi.r_tx_bit_count[0] +.sym 17790 spi_if_ins.spi.r_tx_byte[1] +.sym 17794 spi_if_ins.r_tx_data_valid_SB_LUT4_I3_O_SB_LUT4_O_1_I1[0] +.sym 17795 spi_if_ins.r_tx_data_valid_SB_LUT4_I3_O_SB_LUT4_O_1_I1[2] +.sym 17796 spi_if_ins.r_tx_data_valid_SB_LUT4_I3_O_SB_LUT4_O_1_I1[1] +.sym 17802 spi_if_ins.r_tx_byte[5] +.sym 17806 spi_if_ins.r_tx_byte[0] +.sym 17814 spi_if_ins.r_tx_byte[3] +.sym 17817 spi_if_ins.spi.r_tx_bit_count[2] +.sym 17818 spi_if_ins.spi.r_tx_byte[7] +.sym 17819 spi_if_ins.spi.r_tx_byte[3] +.sym 17820 spi_if_ins.spi.r_tx_bit_count[0] +.sym 17821 spi_if_ins.spi.r_tx_byte_SB_DFFESR_Q_E +.sym 17822 r_counter[0]_$glb_clk +.sym 17823 spi_if_ins.r_tx_data_valid_SB_LUT4_I3_O[3] +.sym 17827 r_tx_data[2] +.sym 17828 r_tx_data[7] +.sym 17829 r_tx_data[5] +.sym 17843 spi_if_ins.r_tx_data_valid_SB_DFFESR_Q_D[0] +.sym 17848 $PACKER_VCC_NET +.sym 17866 r_tx_data[0] +.sym 17867 w_cs[3] +.sym 17868 r_tx_data[1] +.sym 17870 spi_if_ins.r_tx_data_valid_SB_DFFESR_Q_D_SB_LUT4_I3_O +.sym 17871 r_tx_data[4] +.sym 17872 w_cs[2] +.sym 17878 r_tx_data[6] +.sym 17879 w_cs[1] +.sym 17883 spi_if_ins.r_tx_data_valid_SB_DFFESR_Q_D_SB_LUT4_I3_O +.sym 17886 r_tx_data[3] +.sym 17887 w_cs[0] +.sym 17899 r_tx_data[0] +.sym 17906 r_tx_data[1] +.sym 17913 spi_if_ins.r_tx_data_valid_SB_DFFESR_Q_D_SB_LUT4_I3_O +.sym 17917 r_tx_data[6] +.sym 17930 r_tx_data[3] +.sym 17934 r_tx_data[4] +.sym 17940 w_cs[2] +.sym 17941 w_cs[3] +.sym 17942 w_cs[1] +.sym 17943 w_cs[0] +.sym 17944 spi_if_ins.r_tx_data_valid_SB_DFFESR_Q_D_SB_LUT4_I3_O .sym 17945 r_counter[0]_$glb_clk -.sym 17946 io_ctrl_ins.o_data_out_SB_DFFESR_Q_6_R[1] -.sym 17975 i_config_SB_LUT4_I3_O_SB_LUT4_O_1_I2[0] -.sym 17979 o_rx_h_tx_l_b$SB_IO_OUT -.sym 17981 io_ctrl_ins.rf_pin_state[3] -.sym 17989 i_button$SB_IO_IN -.sym 17990 o_rx_h_tx_l_b$SB_IO_OUT -.sym 17991 io_ctrl_ins.pmod_dir_state[5] -.sym 17993 i_config_SB_LUT4_I3_O_SB_LUT4_O_1_I2[0] -.sym 17996 io_ctrl_ins.o_pmod[6] -.sym 17999 spi_if_ins.o_load_cmd_SB_LUT4_I3_1_O -.sym 18001 i_config[3]$SB_IO_IN -.sym 18002 io_ctrl_ins.pmod_dir_state[6] -.sym 18003 io_ctrl_ins.pmod_dir_state[7] -.sym 18004 i_config_SB_LUT4_I3_O_SB_LUT4_O_1_I2[1] -.sym 18008 io_ctrl_ins.ldo2v8_state_SB_LUT4_I3_O[1] -.sym 18013 i_config[2]$SB_IO_IN -.sym 18016 smi_ctrl_ins.o_data_out_SB_DFFESR_Q_E_SB_LUT4_O_I1_SB_LUT4_I1_O[2] -.sym 18017 w_rx_data[3] -.sym 18019 w_rx_data[7] -.sym 18028 w_rx_data[3] -.sym 18033 io_ctrl_ins.pmod_dir_state[7] -.sym 18034 i_button$SB_IO_IN -.sym 18035 io_ctrl_ins.ldo2v8_state_SB_LUT4_I3_O[1] -.sym 18036 smi_ctrl_ins.o_data_out_SB_DFFESR_Q_E_SB_LUT4_O_I1_SB_LUT4_I1_O[2] -.sym 18039 io_ctrl_ins.o_pmod[6] -.sym 18040 o_rx_h_tx_l_b$SB_IO_OUT -.sym 18041 i_config_SB_LUT4_I3_O_SB_LUT4_O_1_I2[0] -.sym 18042 i_config_SB_LUT4_I3_O_SB_LUT4_O_1_I2[1] -.sym 18047 w_rx_data[7] -.sym 18051 smi_ctrl_ins.o_data_out_SB_DFFESR_Q_E_SB_LUT4_O_I1_SB_LUT4_I1_O[2] -.sym 18052 i_config[3]$SB_IO_IN -.sym 18053 io_ctrl_ins.pmod_dir_state[6] -.sym 18054 io_ctrl_ins.ldo2v8_state_SB_LUT4_I3_O[1] -.sym 18057 i_config[2]$SB_IO_IN -.sym 18058 smi_ctrl_ins.o_data_out_SB_DFFESR_Q_E_SB_LUT4_O_I1_SB_LUT4_I1_O[2] -.sym 18059 io_ctrl_ins.ldo2v8_state_SB_LUT4_I3_O[1] -.sym 18060 io_ctrl_ins.pmod_dir_state[5] -.sym 18067 spi_if_ins.o_load_cmd_SB_LUT4_I3_1_O -.sym 18068 r_counter[0]_$glb_clk -.sym 18089 $PACKER_VCC_NET -.sym 18099 io_ctrl_ins.rf_pin_state[7] -.sym 18101 w_rx_data[6] -.sym 18104 i_config[1]$SB_IO_IN -.sym 18116 i_config_SB_LUT4_I3_O_SB_LUT4_O_1_I2[1] -.sym 18117 o_rx_h_tx_l$SB_IO_OUT -.sym 18118 io_ctrl_ins.rf_mode[0] -.sym 18122 io_ctrl_ins.o_pmod[5] -.sym 18125 w_rx_data[6] -.sym 18126 io_ctrl_ins.debug_mode_SB_LUT4_I2_O[1] -.sym 18127 o_tr_vc1$SB_IO_OUT -.sym 18129 w_rx_data[7] -.sym 18130 w_rx_data[5] -.sym 18131 io_ctrl_ins.debug_mode_SB_LUT4_I2_O[3] -.sym 18135 i_config_SB_LUT4_I3_O_SB_LUT4_O_1_I2[0] -.sym 18138 spi_if_ins.o_load_cmd_SB_LUT4_I3_O -.sym 18139 io_ctrl_ins.rf_mode[2] -.sym 18142 io_ctrl_ins.o_pmod[7] -.sym 18145 w_rx_data[6] -.sym 18162 w_rx_data[5] -.sym 18168 o_tr_vc1$SB_IO_OUT -.sym 18169 i_config_SB_LUT4_I3_O_SB_LUT4_O_1_I2[1] -.sym 18170 io_ctrl_ins.o_pmod[5] -.sym 18171 i_config_SB_LUT4_I3_O_SB_LUT4_O_1_I2[0] -.sym 18174 i_config_SB_LUT4_I3_O_SB_LUT4_O_1_I2[0] -.sym 18175 io_ctrl_ins.o_pmod[7] -.sym 18176 i_config_SB_LUT4_I3_O_SB_LUT4_O_1_I2[1] -.sym 18177 o_rx_h_tx_l$SB_IO_OUT -.sym 18180 io_ctrl_ins.debug_mode_SB_LUT4_I2_O[3] -.sym 18181 io_ctrl_ins.rf_mode[2] -.sym 18182 io_ctrl_ins.debug_mode_SB_LUT4_I2_O[1] -.sym 18183 io_ctrl_ins.rf_mode[0] -.sym 18187 w_rx_data[7] -.sym 18190 spi_if_ins.o_load_cmd_SB_LUT4_I3_O +.sym 17966 w_tx_data_io[5] +.sym 17969 $PACKER_VCC_NET +.sym 17970 r_tx_data_SB_DFFESR_Q_R +.sym 17972 i_config[2]$SB_IO_IN +.sym 17992 r_tx_data_SB_DFFESR_Q_R +.sym 17995 w_cs[0] +.sym 17997 smi_ctrl_ins.o_data_out_SB_LUT4_I0_2_O[1] +.sym 17999 r_tx_data_SB_DFFESR_Q_E +.sym 18003 spi_if_ins.o_cs_SB_LUT4_I1_O[1] +.sym 18004 w_tx_data_io[1] +.sym 18005 w_tx_data_smi[1] +.sym 18006 w_cs[3] +.sym 18009 spi_if_ins.o_cs_SB_LUT4_I1_O[2] +.sym 18010 w_cs[1] +.sym 18011 w_cs[2] +.sym 18012 smi_ctrl_ins.o_data_out_SB_LUT4_I0_2_O[0] +.sym 18014 w_tx_data_io[7] +.sym 18015 io_ctrl_ins.o_data_out_SB_DFFESR_Q_6_R +.sym 18017 w_tx_data_io[6] +.sym 18018 w_tx_data_io[4] +.sym 18021 w_cs[3] +.sym 18022 w_cs[2] +.sym 18023 w_cs[1] +.sym 18024 w_cs[0] +.sym 18027 smi_ctrl_ins.o_data_out_SB_LUT4_I0_2_O[0] +.sym 18028 smi_ctrl_ins.o_data_out_SB_LUT4_I0_2_O[1] +.sym 18039 spi_if_ins.o_cs_SB_LUT4_I1_O[2] +.sym 18040 spi_if_ins.o_cs_SB_LUT4_I1_O[1] +.sym 18041 w_tx_data_smi[1] +.sym 18042 w_tx_data_io[1] +.sym 18045 io_ctrl_ins.o_data_out_SB_DFFESR_Q_6_R +.sym 18051 spi_if_ins.o_cs_SB_LUT4_I1_O[2] +.sym 18054 w_tx_data_io[6] +.sym 18058 spi_if_ins.o_cs_SB_LUT4_I1_O[2] +.sym 18060 w_tx_data_io[4] +.sym 18065 w_tx_data_io[7] +.sym 18067 r_tx_data_SB_DFFESR_Q_E +.sym 18068 i_glob_clock$SB_IO_IN_$glb_clk +.sym 18069 r_tx_data_SB_DFFESR_Q_R +.sym 18076 spi_if_ins.w_rx_data[0] +.sym 18122 w_rx_data[4] +.sym 18129 io_ctrl_ins.pmod_state_SB_DFFE_Q_E +.sym 18137 w_rx_data[5] +.sym 18159 w_rx_data[5] +.sym 18165 w_rx_data[4] +.sym 18190 io_ctrl_ins.pmod_state_SB_DFFE_Q_E .sym 18191 r_counter[0]_$glb_clk -.sym 18217 o_rx_h_tx_l_b$SB_IO_OUT -.sym 18235 io_ctrl_ins.rf_mode[2] -.sym 18236 io_ctrl_ins.debug_mode_SB_LUT4_I2_O[3] -.sym 18238 io_ctrl_ins.debug_mode_SB_LUT4_I2_O[1] -.sym 18245 io_ctrl_ins.rx_h_state_SB_DFFE_Q_E -.sym 18248 io_ctrl_ins.rx_h_state_SB_DFFE_Q_D_SB_LUT4_O_I3[2] -.sym 18253 io_ctrl_ins.rf_pin_state[3] -.sym 18254 io_ctrl_ins.rf_pin_state[6] -.sym 18259 io_ctrl_ins.rf_pin_state[7] -.sym 18285 io_ctrl_ins.rf_mode[2] -.sym 18286 io_ctrl_ins.debug_mode_SB_LUT4_I2_O[3] -.sym 18287 io_ctrl_ins.rf_pin_state[3] -.sym 18288 io_ctrl_ins.debug_mode_SB_LUT4_I2_O[1] -.sym 18291 io_ctrl_ins.rf_pin_state[6] -.sym 18293 io_ctrl_ins.debug_mode_SB_LUT4_I2_O[3] -.sym 18294 io_ctrl_ins.rx_h_state_SB_DFFE_Q_D_SB_LUT4_O_I3[2] -.sym 18303 io_ctrl_ins.rf_pin_state[7] -.sym 18304 io_ctrl_ins.rx_h_state_SB_DFFE_Q_D_SB_LUT4_O_I3[2] -.sym 18305 io_ctrl_ins.debug_mode_SB_LUT4_I2_O[3] -.sym 18313 io_ctrl_ins.rx_h_state_SB_DFFE_Q_E +.sym 18206 spi_if_ins.w_rx_data[0] +.sym 18208 w_rx_data[4] +.sym 18213 io_ctrl_ins.o_pmod[4] +.sym 18214 spi_if_ins.spi.r3_rx_done_SB_LUT4_I2_O +.sym 18236 i_button$SB_IO_IN +.sym 18240 i_config[3]$SB_IO_IN +.sym 18241 w_rx_data[6] +.sym 18242 i_config[2]$SB_IO_IN +.sym 18243 w_rx_data[7] +.sym 18245 io_ctrl_ins.pmod_dir_state_SB_DFFE_Q_E +.sym 18246 i_config_SB_LUT4_I0_I3[3] +.sym 18247 w_rx_data[5] +.sym 18258 io_ctrl_ins.pmod_dir_state[6] +.sym 18259 io_ctrl_ins.pmod_dir_state[5] +.sym 18261 i_config_SB_LUT4_I0_I3[2] +.sym 18262 io_ctrl_ins.pmod_dir_state[7] +.sym 18268 w_rx_data[6] +.sym 18276 w_rx_data[5] +.sym 18279 i_config_SB_LUT4_I0_I3[2] +.sym 18280 io_ctrl_ins.pmod_dir_state[6] +.sym 18281 i_config[3]$SB_IO_IN +.sym 18282 i_config_SB_LUT4_I0_I3[3] +.sym 18285 i_config[2]$SB_IO_IN +.sym 18286 io_ctrl_ins.pmod_dir_state[5] +.sym 18287 i_config_SB_LUT4_I0_I3[3] +.sym 18288 i_config_SB_LUT4_I0_I3[2] +.sym 18291 w_rx_data[7] +.sym 18309 io_ctrl_ins.pmod_dir_state[7] +.sym 18310 i_button$SB_IO_IN +.sym 18311 i_config_SB_LUT4_I0_I3[3] +.sym 18312 i_config_SB_LUT4_I0_I3[2] +.sym 18313 io_ctrl_ins.pmod_dir_state_SB_DFFE_Q_E .sym 18314 r_counter[0]_$glb_clk -.sym 18336 o_tr_vc2$SB_IO_OUT -.sym 18345 i_config[2]$SB_IO_IN -.sym 18459 o_tr_vc1_b$SB_IO_OUT +.sym 18332 i_button$SB_IO_IN +.sym 18349 i_config[1]$SB_IO_IN +.sym 18471 i_config[2]$SB_IO_IN .sym 18562 i_config[1]$SB_IO_IN .sym 18564 i_config[2]$SB_IO_IN -.sym 18591 i_config[1]$SB_IO_IN .sym 18636 $PACKER_GND_NET .sym 18656 $PACKER_GND_NET .sym 18695 i_ss$SB_IO_IN -.sym 18800 o_miso_$_TBUF__Y_E -.sym 18815 $PACKER_GND_NET -.sym 18818 int_miso -.sym 18994 i_ss$SB_IO_IN -.sym 19037 i_ss$SB_IO_IN -.sym 19103 int_miso -.sym 19370 spi_if_ins.r_tx_byte[7] -.sym 19378 spi_if_ins.spi.o_spi_miso_SB_DFFE_Q_D_SB_LUT4_O_I2[1] -.sym 19385 spi_if_ins.spi.o_spi_miso_SB_DFFE_Q_E -.sym 19389 spi_if_ins.r_tx_data_valid_SB_LUT4_I3_O -.sym 19415 spi_if_ins.spi.o_spi_miso_SB_DFFE_Q_D_SB_LUT4_O_I2[1] -.sym 19416 spi_if_ins.r_tx_byte[7] -.sym 19417 spi_if_ins.r_tx_data_valid_SB_LUT4_I3_O -.sym 19437 spi_if_ins.spi.o_spi_miso_SB_DFFE_Q_E -.sym 19438 r_counter[0]_$glb_clk -.sym 19587 spi_if_ins.spi.r_rx_done_SB_DFFER_Q_E -.sym 19593 spi_if_ins.spi.r_rx_done_SB_DFFER_Q_D[1] -.sym 19607 spi_if_ins.spi.r_rx_bit_count[0] -.sym 19617 i_ss$SB_IO_IN -.sym 19630 spi_if_ins.spi.r_rx_bit_count[2] -.sym 19633 spi_if_ins.spi.r_rx_bit_count[1] -.sym 19636 $nextpnr_ICESTORM_LC_1$O -.sym 19638 spi_if_ins.spi.r_rx_bit_count[0] -.sym 19642 spi_if_ins.spi.r_rx_bit_count_SB_DFFR_Q_D_SB_LUT4_O_I3[2] -.sym 19644 spi_if_ins.spi.r_rx_bit_count[1] -.sym 19650 spi_if_ins.spi.r_rx_bit_count[2] -.sym 19652 spi_if_ins.spi.r_rx_bit_count_SB_DFFR_Q_D_SB_LUT4_O_I3[2] -.sym 19657 spi_if_ins.spi.r_rx_bit_count[0] -.sym 19661 spi_if_ins.spi.r_rx_bit_count[1] -.sym 19662 spi_if_ins.spi.r_rx_bit_count[0] -.sym 19664 spi_if_ins.spi.r_rx_bit_count[2] -.sym 19669 spi_if_ins.spi.r_rx_bit_count[0] -.sym 19670 spi_if_ins.spi.r_rx_bit_count[1] -.sym 19679 spi_if_ins.spi.r_rx_bit_count[0] -.sym 19681 spi_if_ins.spi.r_rx_bit_count[2] -.sym 19682 spi_if_ins.spi.r_rx_bit_count[1] -.sym 19684 i_sck$SB_IO_IN_$glb_clk -.sym 19685 i_ss$SB_IO_IN -.sym 19710 $PACKER_VCC_NET -.sym 19729 spi_if_ins.spi.r_rx_done_SB_DFFER_Q_D_SB_LUT4_I3_O -.sym 19732 spi_if_ins.spi.r_temp_rx_byte[6] -.sym 19734 spi_if_ins.spi.r_rx_done_SB_DFFER_Q_D[1] -.sym 19737 i_ss$SB_IO_IN -.sym 19743 i_mosi$SB_IO_IN -.sym 19760 i_mosi$SB_IO_IN -.sym 19773 i_ss$SB_IO_IN -.sym 19775 spi_if_ins.spi.r_rx_done_SB_DFFER_Q_D[1] -.sym 19790 spi_if_ins.spi.r_temp_rx_byte[6] -.sym 19806 spi_if_ins.spi.r_rx_done_SB_DFFER_Q_D_SB_LUT4_I3_O -.sym 19807 i_sck$SB_IO_IN_$glb_clk -.sym 19821 io_pmod[5]$SB_IO_OUT -.sym 19850 spi_if_ins.spi.r_rx_byte[0] -.sym 19852 spi_if_ins.spi.r3_rx_done_SB_LUT4_I2_O -.sym 19854 io_ctrl_ins.o_data_out_SB_DFFESR_Q_6_E -.sym 19883 spi_if_ins.spi.r_rx_byte[0] -.sym 19904 io_ctrl_ins.o_data_out_SB_DFFESR_Q_6_E -.sym 19929 spi_if_ins.spi.r3_rx_done_SB_LUT4_I2_O +.sym 18828 $PACKER_GND_NET +.sym 19104 int_miso +.sym 19352 spi_if_ins.r_tx_data_valid_SB_DFFESR_Q_E +.sym 19588 int_miso +.sym 19608 i_ss$SB_IO_IN +.sym 19616 spi_if_ins.r_tx_data_valid_SB_DFFESR_Q_D[1] +.sym 19617 spi_if_ins.r_tx_data_valid_SB_DFFESR_Q_D[0] +.sym 19622 spi_if_ins.r_tx_data_valid_SB_DFFESR_Q_E +.sym 19633 spi_if_ins.r_tx_data_valid +.sym 19637 i_ss$SB_IO_IN +.sym 19639 spi_if_ins.r_tx_data_valid +.sym 19669 spi_if_ins.r_tx_data_valid_SB_DFFESR_Q_D[1] +.sym 19683 spi_if_ins.r_tx_data_valid_SB_DFFESR_Q_E +.sym 19684 r_counter[0]_$glb_clk +.sym 19685 spi_if_ins.r_tx_data_valid_SB_DFFESR_Q_D[0] +.sym 19698 i_ss$SB_IO_IN +.sym 19704 spi_if_ins.r_tx_data_valid_SB_DFFESR_Q_D[1] +.sym 19729 spi_if_ins.spi.o_spi_miso_SB_DFFE_Q_E +.sym 19730 spi_if_ins.r_tx_byte[7] +.sym 19733 spi_if_ins.r_tx_data_valid_SB_LUT4_I3_O[0] +.sym 19735 spi_if_ins.r_tx_data_valid_SB_LUT4_I3_O[3] +.sym 19754 spi_if_ins.r_tx_data_valid_SB_LUT4_I3_O[1] +.sym 19796 spi_if_ins.r_tx_data_valid_SB_LUT4_I3_O[1] +.sym 19797 spi_if_ins.r_tx_data_valid_SB_LUT4_I3_O[3] +.sym 19798 spi_if_ins.r_tx_data_valid_SB_LUT4_I3_O[0] +.sym 19799 spi_if_ins.r_tx_byte[7] +.sym 19806 spi_if_ins.spi.o_spi_miso_SB_DFFE_Q_E +.sym 19807 r_counter[0]_$glb_clk +.sym 19822 $PACKER_VCC_NET +.sym 19852 spi_if_ins.r_tx_data_valid_SB_DFFESR_Q_D_SB_LUT4_I3_O +.sym 19855 r_tx_data[5] +.sym 19858 spi_if_ins.r_tx_data_valid_SB_DFFESR_Q_D[0] +.sym 19861 r_tx_data[2] +.sym 19862 r_tx_data[7] +.sym 19878 spi_if_ins.r_tx_data_valid_SB_DFFESR_Q_D[1] +.sym 19883 r_tx_data[2] +.sym 19891 r_tx_data[5] +.sym 19903 r_tx_data[7] +.sym 19913 spi_if_ins.r_tx_data_valid_SB_DFFESR_Q_D[1] +.sym 19915 spi_if_ins.r_tx_data_valid_SB_DFFESR_Q_D[0] +.sym 19929 spi_if_ins.r_tx_data_valid_SB_DFFESR_Q_D_SB_LUT4_I3_O .sym 19930 r_counter[0]_$glb_clk -.sym 20198 o_rx_h_tx_l_b$SB_IO_OUT -.sym 20207 i_config[0]$SB_IO_IN -.sym 20574 o_led1$SB_IO_OUT -.sym 20578 o_led0$SB_IO_OUT +.sym 19946 spi_if_ins.r_tx_data_valid_SB_DFFESR_Q_D_SB_LUT4_I3_O +.sym 19956 spi_if_ins.spi.r_rx_byte[0] +.sym 19973 w_tx_data_io[5] +.sym 19977 r_tx_data_SB_DFFESR_Q_R +.sym 19983 w_tx_data_io[2] +.sym 19984 r_tx_data_SB_DFFESR_Q_E +.sym 19989 smi_ctrl_ins.o_data_out_SB_LUT4_I0_2_O[0] +.sym 19996 w_tx_data_io[7] +.sym 19999 spi_if_ins.o_cs_SB_LUT4_I1_O[2] +.sym 20024 w_tx_data_io[2] +.sym 20025 smi_ctrl_ins.o_data_out_SB_LUT4_I0_2_O[0] +.sym 20026 spi_if_ins.o_cs_SB_LUT4_I1_O[2] +.sym 20030 smi_ctrl_ins.o_data_out_SB_LUT4_I0_2_O[0] +.sym 20031 spi_if_ins.o_cs_SB_LUT4_I1_O[2] +.sym 20033 w_tx_data_io[7] +.sym 20037 w_tx_data_io[5] +.sym 20038 spi_if_ins.o_cs_SB_LUT4_I1_O[2] +.sym 20039 smi_ctrl_ins.o_data_out_SB_LUT4_I0_2_O[0] +.sym 20052 r_tx_data_SB_DFFESR_Q_E +.sym 20053 i_glob_clock$SB_IO_IN_$glb_clk +.sym 20054 r_tx_data_SB_DFFESR_Q_R +.sym 20221 spi_if_ins.spi.r3_rx_done_SB_LUT4_I2_O +.sym 20228 spi_if_ins.spi.r_rx_byte[0] +.sym 20290 spi_if_ins.spi.r_rx_byte[0] +.sym 20298 spi_if_ins.spi.r3_rx_done_SB_LUT4_I2_O +.sym 20299 r_counter[0]_$glb_clk +.sym 20566 o_tr_vc1_b$SB_IO_OUT +.sym 20571 i_config[0]$SB_IO_IN .sym 20672 i_config[0]$SB_IO_IN -.sym 20695 i_config[0]$SB_IO_IN .sym 20748 $PACKER_GND_NET -.sym 20764 $PACKER_GND_NET -.sym 20802 o_miso_$_TBUF__Y_E -.sym 20804 int_miso +.sym 20768 $PACKER_GND_NET +.sym 20802 i_sck$SB_IO_IN .sym 20842 i_mosi$SB_IO_IN -.sym 21129 o_miso_$_TBUF__Y_E -.sym 21294 spi_if_ins.spi.r_rx_done -.sym 21392 spi_if_ins.spi.r2_rx_done -.sym 21434 spi_if_ins.spi.r_rx_done_SB_DFFER_Q_D[1] -.sym 21442 spi_if_ins.spi.r_rx_done_SB_DFFER_Q_E -.sym 21447 i_mosi$SB_IO_IN -.sym 21546 io_pmod[6]$SB_IO_OUT -.sym 21652 spi_if_ins.spi.r3_rx_done_SB_LUT4_I2_O -.sym 21657 spi_if_ins.spi.r2_rx_done -.sym 21701 spi_if_ins.spi.r3_rx_done -.sym 21705 spi_if_ins.spi.r3_rx_done_SB_LUT4_I2_O -.sym 21749 $PACKER_GND_NET -.sym 21759 spi_if_ins.spi.r3_rx_done_SB_LUT4_I2_O -.sym 21847 spi_if_ins.spi.r3_rx_done_SB_LUT4_I2_O -.sym 21954 $PACKER_VCC_NET -.sym 22259 o_rx_h_tx_l$SB_IO_OUT +.sym 20905 o_miso_$_TBUF__Y_E +.sym 20935 i_mosi$SB_IO_IN +.sym 21027 int_miso +.sym 21345 i_ss$SB_IO_IN +.sym 21434 io_pmod[7]$SB_IO_OUT +.sym 21441 io_pmod[5]$SB_IO_OUT +.sym 22360 o_rx_h_tx_l_b$SB_IO_OUT +.sym 22475 o_led0$SB_IO_OUT +.sym 22478 o_led1$SB_IO_OUT .sym 22487 o_led1$SB_IO_OUT -.sym 22511 o_led1$SB_IO_OUT -.sym 22515 o_led0$SB_IO_OUT +.sym 22496 o_led1$SB_IO_OUT +.sym 22514 o_led0$SB_IO_OUT .sym 22520 int_miso .sym 22522 o_miso_$_TBUF__Y_E -.sym 22530 o_miso_$_TBUF__Y_E -.sym 22540 int_miso +.sym 22534 int_miso +.sym 22539 o_miso_$_TBUF__Y_E .sym 22558 i_mosi$SB_IO_IN -.sym 22574 i_sck$SB_IO_IN +.sym 22574 int_miso .sym 22666 i_sck$SB_IO_IN .sym 22668 i_ss$SB_IO_IN -.sym 22702 i_sck$SB_IO_IN .sym 22707 i_ss$SB_IO_IN -.sym 22733 i_ss$SB_IO_IN -.sym 22980 i_ss$SB_IO_IN -.sym 23223 i_ss$SB_IO_IN -.sym 23244 spi_if_ins.spi.r_rx_done_SB_DFFER_Q_D[1] -.sym 23250 spi_if_ins.spi.r_rx_done_SB_DFFER_Q_E -.sym 23252 i_ss$SB_IO_IN -.sym 23297 spi_if_ins.spi.r_rx_done_SB_DFFER_Q_D[1] -.sym 23318 spi_if_ins.spi.r_rx_done_SB_DFFER_Q_E -.sym 23319 i_sck$SB_IO_IN_$glb_clk -.sym 23320 i_ss$SB_IO_IN -.sym 23337 io_pmod[7]$SB_IO_OUT -.sym 23348 i_ss$SB_IO_IN -.sym 23374 spi_if_ins.spi.r_rx_done -.sym 23396 spi_if_ins.spi.r_rx_done -.sym 23442 r_counter[0]_$glb_clk -.sym 23456 spi_if_ins.spi.r2_rx_done -.sym 23592 $PACKER_VCC_NET -.sym 23718 $PACKER_VCC_NET -.sym 23734 spi_if_ins.spi.r2_rx_done -.sym 23750 spi_if_ins.spi.r3_rx_done -.sym 23784 spi_if_ins.spi.r2_rx_done -.sym 23806 spi_if_ins.spi.r2_rx_done -.sym 23808 spi_if_ins.spi.r3_rx_done -.sym 23811 r_counter[0]_$glb_clk -.sym 23813 $PACKER_VCC_NET -.sym 23846 $PACKER_VCC_NET -.sym 24322 o_tr_vc1$SB_IO_OUT +.sym 22724 i_ss$SB_IO_IN +.sym 22729 i_sck$SB_IO_IN +.sym 23087 i_ss$SB_IO_IN +.sym 23104 $PACKER_GND_NET +.sym 23218 $PACKER_GND_NET +.sym 23222 i_ss$SB_IO_IN +.sym 23452 io_pmod[6]$SB_IO_OUT +.sym 24198 o_rx_h_tx_l$SB_IO_OUT +.sym 24318 o_tr_vc2$SB_IO_OUT +.sym 24319 o_tr_vc1$SB_IO_OUT .sym 24596 o_led0$SB_IO_OUT -.sym 24620 o_led0$SB_IO_OUT -.sym 24664 i_ss$SB_IO_IN +.sym 24611 o_led0$SB_IO_OUT .sym 25711 i_glob_clock$SB_IO_IN +.sym 25719 $PACKER_GND_NET .sym 25878 i_glob_clock$SB_IO_IN -.sym 26037 $PACKER_VCC_NET -.sym 26813 o_tr_vc2$SB_IO_OUT -.sym 26961 o_tr_vc1_b$SB_IO_OUT -.sym 27366 $PACKER_GND_NET -.sym 27367 io_pmod[5]$SB_IO_OUT +.sym 26340 $PACKER_VCC_NET +.sym 27337 i_ss$SB_IO_IN +.sym 27368 $PACKER_GND_NET .sym 27370 io_pmod[5]$SB_IO_OUT .sym 27373 io_pmod[7]$SB_IO_OUT -.sym 27385 io_pmod[5]$SB_IO_OUT -.sym 27386 io_pmod[7]$SB_IO_OUT +.sym 27387 io_pmod[7]$SB_IO_OUT +.sym 27392 io_pmod[5]$SB_IO_OUT .sym 27400 $PACKER_GND_NET .sym 27403 io_pmod[6]$SB_IO_OUT -.sym 27417 io_pmod[6]$SB_IO_OUT -.sym 27418 $PACKER_GND_NET +.sym 27411 $PACKER_GND_NET +.sym 27412 io_pmod[6]$SB_IO_OUT .sym 27429 i_glob_clock$SB_IO_IN .sym 27451 i_glob_clock$SB_IO_IN .sym 27460 $PACKER_VCC_NET -.sym 27469 $PACKER_VCC_NET -.sym 27486 $PACKER_GND_NET -.sym 27515 o_rx_h_tx_l$SB_IO_OUT +.sym 27473 $PACKER_VCC_NET +.sym 27488 $PACKER_GND_NET +.sym 27519 $PACKER_VCC_NET .sym 27522 $PACKER_GND_NET -.sym 27529 $PACKER_GND_NET -.sym 27549 $PACKER_GND_NET +.sym 27531 $PACKER_GND_NET +.sym 27539 $PACKER_VCC_NET .sym 27552 $PACKER_GND_NET -.sym 27563 $PACKER_GND_NET -.sym 27571 $PACKER_GND_NET -.sym 27577 o_rx_h_tx_l_b$SB_IO_OUT +.sym 27565 $PACKER_GND_NET .sym 27582 o_rx_h_tx_l$SB_IO_OUT -.sym 27593 o_rx_h_tx_l$SB_IO_OUT +.sym 27595 o_rx_h_tx_l$SB_IO_OUT .sym 27605 o_tr_vc1$SB_IO_OUT .sym 27608 o_tr_vc2$SB_IO_OUT -.sym 27615 o_tr_vc2$SB_IO_OUT -.sym 27620 o_tr_vc1$SB_IO_OUT +.sym 27626 o_tr_vc2$SB_IO_OUT +.sym 27629 o_tr_vc1$SB_IO_OUT .sym 27631 o_rx_h_tx_l_b$SB_IO_OUT .sym 27634 o_tr_vc1_b$SB_IO_OUT -.sym 27650 o_tr_vc1_b$SB_IO_OUT -.sym 27655 o_rx_h_tx_l_b$SB_IO_OUT -.sym 27901 r_counter[0] -.sym 27914 lvds_rx_09_inst.r_data_SB_DFFNESR_Q_R[0] -.sym 27928 w_lvds_rx_09_d1_SB_LUT4_I3_I2[0] -.sym 27929 w_lvds_rx_09_d1_SB_LUT4_I3_I2[1] -.sym 27938 w_lvds_rx_09_d1_SB_LUT4_I3_I2[0] -.sym 27939 w_lvds_rx_09_d1_SB_LUT4_I3_I2[1] -.sym 27940 w_lvds_rx_09_d1_SB_LUT4_I0_O[1] -.sym 27941 w_lvds_rx_09_d1 -.sym 27949 lvds_rx_09_inst.r_state_if_SB_DFFNE_Q_E -.sym 27950 w_lvds_rx_09_d1_SB_LUT4_I3_I2[0] -.sym 27951 w_lvds_rx_09_d1_SB_LUT4_I3_I2[1] -.sym 27952 w_lvds_rx_09_d1_SB_LUT4_I0_O[1] -.sym 27953 w_lvds_rx_09_d0 -.sym 27956 lvds_rx_09_inst.r_data_SB_DFFNESR_Q_R[0] -.sym 27957 w_rx_09_fifo_data[0] -.sym 27964 lvds_rx_09_inst.r_data_SB_DFFNESR_Q_R[0] -.sym 27965 w_rx_09_fifo_data[1] -.sym 27966 w_lvds_rx_09_d1 -.sym 27967 w_lvds_rx_09_d0 -.sym 27968 w_lvds_rx_09_d1_SB_LUT4_I3_I2[0] -.sym 27969 w_lvds_rx_09_d1_SB_LUT4_I3_I2[1] -.sym 28387 lvds_rx_09_inst.r_phase_count[0] -.sym 28391 lvds_rx_09_inst.r_phase_count[1] -.sym 28392 $PACKER_VCC_NET -.sym 28394 lvds_rx_09_inst.r_state_if_SB_DFFNE_Q_E_SB_LUT4_O_I1_SB_LUT4_I2_O[0] -.sym 28395 lvds_rx_09_inst.r_phase_count_SB_LUT4_I1_O_SB_DFFNESR_D_Q[1] -.sym 28396 lvds_rx_09_inst.r_state_if_SB_DFFNE_Q_E_SB_LUT4_O_I1_SB_LUT4_I2_O[2] -.sym 28397 lvds_rx_09_inst.r_phase_count_SB_CARRY_CI_CO[2] -.sym 28401 w_lvds_rx_09_d1_SB_LUT4_I3_I2_SB_LUT4_O_I0[0] -.sym 28405 lvds_rx_09_inst.r_phase_count_SB_LUT4_I1_O_SB_DFFNESR_D_Q[2] -.sym 28412 lvds_rx_09_inst.r_data_SB_DFFNESR_Q_R[0] -.sym 28413 w_lvds_rx_09_d1_SB_LUT4_I3_I2_SB_LUT4_O_I0[0] -.sym 28414 lvds_rx_09_inst.r_state_if_SB_DFFNE_Q_E_SB_LUT4_O_I1_SB_LUT4_I2_O[0] -.sym 28415 lvds_rx_09_inst.r_phase_count[1] -.sym 28416 lvds_rx_09_inst.r_state_if_SB_DFFNE_Q_E_SB_LUT4_O_I1_SB_LUT4_I2_O[2] -.sym 28417 lvds_rx_09_inst.r_phase_count[0] -.sym 28420 w_lvds_rx_09_d1_SB_LUT4_I3_I2[1] -.sym 28421 w_lvds_rx_09_d1_SB_LUT4_I3_I2[0] -.sym 28423 w_lvds_rx_09_d1_SB_LUT4_I3_I2_SB_LUT4_O_I0[0] -.sym 28424 lvds_rx_09_inst.r_phase_count_SB_LUT4_I1_O_SB_DFFNESR_D_Q[2] -.sym 28425 lvds_rx_09_inst.r_phase_count_SB_LUT4_I1_O_SB_DFFNESR_D_Q[1] -.sym 28426 w_lvds_rx_09_d1_SB_LUT4_I3_I2_SB_LUT4_O_I0[0] -.sym 28427 lvds_rx_09_inst.r_phase_count_SB_LUT4_I1_O_SB_DFFNESR_D_Q[1] -.sym 28428 lvds_rx_09_inst.r_phase_count_SB_LUT4_I1_O_SB_DFFNESR_D_Q[2] -.sym 28429 lvds_rx_09_inst.r_phase_count_SB_LUT4_I1_O_SB_DFFNESR_D_Q[3] -.sym 28431 lvds_rx_09_inst.r_state_if_SB_DFFNE_Q_E_SB_LUT4_O_I1_SB_LUT4_O_I1[0] -.sym 28432 w_lvds_rx_09_d1_SB_LUT4_I3_I2[0] -.sym 28433 w_lvds_rx_09_d1_SB_LUT4_I3_I2[1] -.sym 28436 w_lvds_rx_09_d1_SB_LUT4_I3_I2[0] -.sym 28437 w_lvds_rx_09_d1_SB_LUT4_I3_I2[1] -.sym 28440 w_lvds_rx_09_d1_SB_LUT4_I0_O[0] -.sym 28441 lvds_rx_09_inst.r_phase_count_SB_LUT4_I1_O_SB_DFFNESR_D_Q[3] -.sym 28442 lvds_rx_09_inst.r_phase_count_SB_LUT4_I1_O_SB_DFFNESR_D_Q[3] -.sym 28446 lvds_rx_09_inst.r_phase_count_SB_LUT4_I1_O_SB_DFFNESR_D_Q[3] -.sym 28447 lvds_rx_09_inst.r_phase_count_SB_LUT4_I1_O_SB_DFFNESR_D_Q[1] -.sym 28448 lvds_rx_09_inst.r_phase_count_SB_LUT4_I1_O_SB_DFFNESR_D_Q[2] -.sym 28449 w_lvds_rx_09_d1_SB_LUT4_I3_I2_SB_LUT4_O_I0[0] -.sym 28451 w_lvds_rx_09_d1_SB_LUT4_I0_O[0] -.sym 28452 w_lvds_rx_09_d1_SB_LUT4_I0_O[1] -.sym 28453 w_lvds_rx_09_d1_SB_LUT4_I0_O[2] -.sym 28456 lvds_rx_09_inst.r_data_SB_DFFNESR_Q_R[0] -.sym 28457 io_pmod[5]$SB_IO_OUT -.sym 28461 w_lvds_rx_09_d1_SB_LUT4_I0_O[2] -.sym 28862 spi_if_ins.state_if_SB_DFFESR_Q_D[0] -.sym 28866 spi_if_ins.o_load_cmd_SB_DFFESR_Q_D[2] -.sym 28874 spi_if_ins.o_load_cmd_SB_DFFESR_Q_D[3] -.sym 28875 spi_if_ins.o_load_cmd_SB_DFFESR_Q_D[0] -.sym 28876 spi_if_ins.state_if[0] -.sym 28877 spi_if_ins.state_if[1] -.sym 28885 spi_if_ins.o_load_cmd_SB_DFFESR_Q_D[3] -.sym 28928 spi_if_ins.o_load_cmd_SB_DFFESR_Q_D[2] -.sym 28929 spi_if_ins.o_load_cmd_SB_DFFESR_Q_D[0] -.sym 28941 spi_if_ins.o_load_cmd_SB_DFFESR_Q_D_SB_LUT4_I1_O[2] -.sym 28973 i_config_SB_LUT4_I3_I1[4] -.sym 28978 i_config_SB_LUT4_I3_I1[4] -.sym 28985 w_cs[2] -.sym 29002 i_config_SB_LUT4_I3_O_SB_LUT4_O_I0[2] -.sym 29003 io_ctrl_ins.o_pmod[3] -.sym 29004 io_ctrl_ins.ldo2v8_state_SB_LUT4_I3_O[1] -.sym 29005 io_ctrl_ins.pmod_dir_state[3] -.sym 29014 io_ctrl_ins.o_pmod[0] -.sym 29015 i_config_SB_LUT4_I3_O_SB_LUT4_O_I0[2] -.sym 29016 io_ctrl_ins.ldo2v8_state_SB_LUT4_I3_O[1] -.sym 29017 io_ctrl_ins.pmod_dir_state[0] -.sym 29026 w_rx_data[4] -.sym 29034 io_ctrl_ins.o_pmod[1] -.sym 29035 i_config_SB_LUT4_I3_O_SB_LUT4_O_I0[2] -.sym 29036 io_ctrl_ins.ldo2v8_state_SB_LUT4_I3_O[1] -.sym 29037 io_ctrl_ins.pmod_dir_state[1] -.sym 29038 w_rx_data[1] -.sym 29042 w_rx_data[0] -.sym 29046 io_ctrl_ins.o_pmod[4] -.sym 29047 i_config_SB_LUT4_I3_O_SB_LUT4_O_I0[2] -.sym 29048 io_ctrl_ins.ldo2v8_state_SB_LUT4_I3_O[1] -.sym 29049 io_ctrl_ins.pmod_dir_state[4] -.sym 29050 w_rx_data[2] -.sym 29054 w_rx_data[3] -.sym 29058 w_rx_data[2] -.sym 29062 w_rx_data[1] -.sym 29073 io_ctrl_ins.led0_state_SB_DFFE_Q_E -.sym 29074 w_rx_data[0] -.sym 29078 w_rx_data[4] -.sym 29086 w_rx_data[3] -.sym 29350 spi_if_ins.state_if_SB_DFFESR_Q_D[0] -.sym 29351 spi_if_ins.o_load_cmd_SB_DFFESR_Q_D[1] -.sym 29352 spi_if_ins.o_load_cmd_SB_DFFESR_Q_D_SB_LUT4_I1_O[1] -.sym 29353 spi_if_ins.o_load_cmd_SB_DFFESR_Q_D[3] -.sym 29355 spi_if_ins.state_if[0] -.sym 29356 spi_if_ins.o_load_cmd_SB_DFFESR_Q_D[0] -.sym 29357 spi_if_ins.state_if[1] -.sym 29359 spi_if_ins.state_if[1] -.sym 29360 spi_if_ins.state_if[0] -.sym 29361 spi_if_ins.o_load_cmd_SB_DFFESR_Q_D[0] -.sym 29371 spi_if_ins.state_if[1] -.sym 29372 spi_if_ins.o_load_cmd_SB_DFFESR_Q_D[0] -.sym 29373 spi_if_ins.state_if[0] -.sym 29394 spi_if_ins.o_load_cmd_SB_DFFESR_Q_D_SB_LUT4_I1_O[1] -.sym 29398 spi_if_ins.o_load_cmd_SB_DFFESR_Q_D[0] -.sym 29399 spi_if_ins.o_load_cmd_SB_DFFESR_Q_D[3] -.sym 29400 spi_if_ins.state_if[1] -.sym 29401 spi_if_ins.state_if[0] -.sym 29404 spi_if_ins.state_if[1] -.sym 29405 spi_if_ins.state_if[0] -.sym 29406 spi_if_ins.o_load_cmd_SB_DFFESR_Q_D[0] -.sym 29407 spi_if_ins.state_if[1] -.sym 29408 spi_if_ins.state_if[0] -.sym 29409 spi_if_ins.o_load_cmd_SB_DFFESR_Q_D[3] -.sym 29410 spi_if_ins.o_load_cmd_SB_DFFESR_Q_D[0] -.sym 29411 spi_if_ins.o_load_cmd_SB_DFFESR_Q_D[1] -.sym 29412 spi_if_ins.o_load_cmd_SB_DFFESR_Q_D[2] -.sym 29413 spi_if_ins.o_load_cmd_SB_DFFESR_Q_D[3] -.sym 29414 w_tx_data_smi[1] -.sym 29415 spi_if_ins.o_cs_SB_LUT4_I1_O[1] -.sym 29416 spi_if_ins.o_cs_SB_LUT4_I1_1_O[0] -.sym 29417 w_tx_data_io[3] -.sym 29420 spi_if_ins.o_cs_SB_LUT4_I1_1_O[0] -.sym 29421 w_tx_data_io[6] -.sym 29427 spi_if_ins.o_load_cmd_SB_DFFESR_Q_D[3] -.sym 29428 spi_if_ins.o_load_cmd_SB_DFFESR_Q_D_SB_LUT4_I1_O[1] -.sym 29429 spi_if_ins.state_if_SB_DFFESR_Q_1_D[2] -.sym 29432 spi_if_ins.o_cs_SB_LUT4_I1_1_O[0] -.sym 29433 w_tx_data_io[4] -.sym 29435 spi_if_ins.o_load_cmd_SB_DFFESR_Q_D[2] -.sym 29436 spi_if_ins.o_load_cmd_SB_DFFESR_Q_D[0] -.sym 29437 spi_if_ins.o_load_cmd_SB_DFFESR_Q_D[3] -.sym 29438 w_tx_data_smi[1] -.sym 29439 spi_if_ins.o_cs_SB_LUT4_I1_O[1] -.sym 29440 spi_if_ins.o_cs_SB_LUT4_I1_1_O[0] -.sym 29441 w_tx_data_io[1] -.sym 29442 w_cs[2] -.sym 29443 w_cs[3] -.sym 29444 w_cs[0] -.sym 29445 i_config_SB_LUT4_I3_O_SB_LUT4_O_I0[1] -.sym 29448 spi_if_ins.w_rx_data[5] -.sym 29449 spi_if_ins.w_rx_data[6] -.sym 29450 w_cs[2] -.sym 29451 i_config_SB_LUT4_I3_O_SB_LUT4_O_I0[1] -.sym 29452 w_cs[0] -.sym 29453 w_cs[3] -.sym 29454 w_cs[2] -.sym 29455 i_config_SB_LUT4_I3_O_SB_LUT4_O_I0[1] -.sym 29456 w_cs[3] -.sym 29457 w_cs[0] -.sym 29460 spi_if_ins.w_rx_data[5] -.sym 29461 spi_if_ins.w_rx_data[6] -.sym 29466 i_config_SB_LUT4_I3_O_SB_LUT4_O_I0[1] -.sym 29467 w_cs[3] -.sym 29468 w_cs[0] -.sym 29469 w_cs[2] -.sym 29470 w_cs[2] -.sym 29471 i_config_SB_LUT4_I3_O_SB_LUT4_O_I0[1] -.sym 29472 w_cs[3] -.sym 29473 w_cs[0] -.sym 29478 spi_if_ins.w_rx_data[4] -.sym 29490 sys_ctrl_ins.i_cs_SB_DFFE_Q_D[0] -.sym 29495 io_ctrl_ins.o_data_out_SB_DFFESR_Q_6_E_SB_LUT4_O_I1_SB_LUT4_O_I1_SB_LUT4_I3_O[0] -.sym 29496 i_config_SB_LUT4_I3_O_SB_LUT4_O_I0[1] -.sym 29497 i_config_SB_LUT4_I3_O_SB_LUT4_O_I0[0] -.sym 29498 w_ioc[1] -.sym 29499 smi_ctrl_ins.o_data_out_SB_DFFESR_Q_E_SB_LUT4_O_I1[1] -.sym 29500 i_config_SB_LUT4_I3_O_SB_LUT4_O_I0[0] -.sym 29501 w_cs[2] -.sym 29502 w_tx_data_smi[0] -.sym 29503 spi_if_ins.o_cs_SB_LUT4_I1_O[1] -.sym 29504 spi_if_ins.o_cs_SB_LUT4_I1_1_O[0] -.sym 29505 w_tx_data_io[0] -.sym 29506 io_ctrl_ins.ldo2v8_state_SB_LUT4_I3_O[0] -.sym 29507 io_ctrl_ins.ldo2v8_state_SB_LUT4_I3_O[1] -.sym 29508 io_ctrl_ins.ldo2v8_state_SB_LUT4_I3_O[2] -.sym 29509 io_ctrl_ins.ldo2v8_state_SB_LUT4_I3_O[3] -.sym 29510 o_shdn_rx_lna$SB_IO_OUT -.sym 29511 i_config_SB_LUT4_I3_O[1] -.sym 29512 io_ctrl_ins.led1_state_SB_LUT4_I3_O[2] -.sym 29513 io_ctrl_ins.led1_state_SB_LUT4_I3_O[3] -.sym 29514 io_ctrl_ins.led0_state_SB_LUT4_I3_O[0] -.sym 29515 i_config_SB_LUT4_I3_O[1] -.sym 29516 io_ctrl_ins.led0_state_SB_LUT4_I3_O[2] -.sym 29517 io_ctrl_ins.led0_state_SB_LUT4_I3_O[3] -.sym 29519 smi_ctrl_ins.o_data_out_SB_DFFESR_Q_E_SB_LUT4_O_I1[1] -.sym 29520 w_ioc[1] -.sym 29521 i_config_SB_LUT4_I3_O_SB_LUT4_O_1_I2[0] -.sym 29522 o_tr_vc2$SB_IO_OUT -.sym 29523 i_config_SB_LUT4_I3_O[1] -.sym 29524 i_config_SB_LUT4_I3_O[2] -.sym 29525 i_config_SB_LUT4_I3_O[3] -.sym 29527 w_ioc[1] -.sym 29528 smi_ctrl_ins.o_data_out_SB_DFFESR_Q_E_SB_LUT4_O_I1[1] -.sym 29529 i_config_SB_LUT4_I3_O_SB_LUT4_O_1_I2[0] -.sym 29530 o_tr_vc1_b$SB_IO_OUT -.sym 29531 i_config_SB_LUT4_I3_O[1] -.sym 29532 io_ctrl_ins.tr_vc_1_b_state_SB_LUT4_I0_I2[2] -.sym 29533 io_ctrl_ins.tr_vc_1_b_state_SB_LUT4_I0_I2[3] -.sym 29534 w_ioc[1] -.sym 29535 w_ioc[4] -.sym 29536 w_ioc[3] -.sym 29537 w_ioc[2] -.sym 29540 i_config_SB_LUT4_I3_O_SB_LUT4_O_1_I2[0] -.sym 29541 i_config_SB_LUT4_I3_O_SB_LUT4_O_1_I2[1] -.sym 29546 spi_if_ins.o_load_cmd_SB_DFFESR_Q_D[1] -.sym 29550 spi_if_ins.w_rx_data[6] -.sym 29557 io_ctrl_ins.led1_state_SB_LUT4_I3_O[2] -.sym 29558 spi_if_ins.w_rx_data[0] -.sym 29562 spi_if_ins.w_rx_data[5] -.sym 29566 spi_if_ins.w_rx_data[4] -.sym 29570 i_config_SB_LUT4_I3_O_SB_LUT4_O_I0[0] -.sym 29571 i_config_SB_LUT4_I3_O_SB_LUT4_O_I0[1] -.sym 29572 io_ctrl_ins.ldo2v8_state_SB_LUT4_I3_O[1] -.sym 29573 i_config_SB_LUT4_I3_O_SB_LUT4_O_I0[3] -.sym 29574 w_rx_data[2] -.sym 29581 spi_if_ins.o_load_cmd_SB_LUT4_I3_2_O -.sym 29582 io_ctrl_ins.o_pmod[2] -.sym 29583 o_shdn_tx_lna$SB_IO_OUT -.sym 29584 i_config_SB_LUT4_I3_O_SB_LUT4_O_1_I2[0] -.sym 29585 i_config_SB_LUT4_I3_O_SB_LUT4_O_1_I2[1] -.sym 29586 w_rx_data[0] -.sym 29590 w_rx_data[1] -.sym 29594 i_config_SB_LUT4_I3_O_SB_LUT4_O_I0[0] -.sym 29595 i_config_SB_LUT4_I3_O_SB_LUT4_O_I0[1] -.sym 29596 smi_ctrl_ins.o_data_out_SB_DFFESR_Q_E_SB_LUT4_O_I1_SB_LUT4_I1_O[2] -.sym 29597 i_config_SB_LUT4_I3_O_SB_LUT4_O_I0[3] -.sym 29601 w_rx_data[2] -.sym 29902 r_tx_data[1] -.sym 29906 r_tx_data[3] -.sym 29910 r_tx_data[4] -.sym 29918 r_tx_data[6] -.sym 29922 spi_if_ins.r_tx_data_valid_SB_DFFESR_Q_D[1] -.sym 29943 spi_if_ins.o_load_cmd_SB_DFFESR_Q_D[3] -.sym 29944 spi_if_ins.o_load_cmd_SB_DFFESR_Q_D_SB_LUT4_I1_O[1] -.sym 29945 spi_if_ins.o_load_cmd_SB_DFFESR_Q_D_SB_LUT4_I1_O[2] -.sym 29952 spi_if_ins.o_load_cmd_SB_DFFESR_Q_D[3] -.sym 29953 spi_if_ins.r_tx_data_valid_SB_DFFESR_Q_D[1] -.sym 29959 spi_if_ins.o_cs_SB_LUT4_I1_1_O[0] -.sym 29960 w_tx_data_io[7] -.sym 29961 smi_ctrl_ins.o_data_out_SB_LUT4_I0_2_O[0] -.sym 29967 spi_if_ins.o_cs_SB_LUT4_I1_1_O[0] -.sym 29968 w_tx_data_io[5] -.sym 29969 smi_ctrl_ins.o_data_out_SB_LUT4_I0_2_O[0] -.sym 29979 spi_if_ins.o_cs_SB_LUT4_I1_1_O[0] -.sym 29980 w_tx_data_io[2] -.sym 29981 smi_ctrl_ins.o_data_out_SB_LUT4_I0_2_O[0] -.sym 29984 smi_ctrl_ins.o_data_out_SB_LUT4_I0_2_O[0] -.sym 29985 smi_ctrl_ins.o_data_out_SB_LUT4_I0_2_O[1] -.sym 29989 spi_if_ins.w_rx_data[6] -.sym 29991 w_ioc[1] -.sym 29992 w_ioc[2] -.sym 29993 io_ctrl_ins.o_data_out_SB_DFFESR_Q_6_E_SB_LUT4_O_I1_SB_LUT4_O_I1[1] -.sym 30001 spi_if_ins.w_rx_data[5] -.sym 30004 spi_if_ins.w_rx_data[5] -.sym 30005 spi_if_ins.w_rx_data[6] -.sym 30012 spi_if_ins.w_rx_data[6] -.sym 30013 spi_if_ins.w_rx_data[5] -.sym 30016 w_ioc[4] -.sym 30017 w_ioc[3] -.sym 30018 spi_if_ins.w_rx_data[0] -.sym 30022 spi_if_ins.w_rx_data[3] -.sym 30026 spi_if_ins.w_rx_data[1] -.sym 30030 io_ctrl_ins.rf_mode[0] -.sym 30031 i_config_SB_LUT4_I3_I1[4] -.sym 30032 smi_ctrl_ins.o_data_out_SB_DFFESR_Q_E_SB_LUT4_O_I1_SB_LUT4_I1_O[2] -.sym 30033 o_ldo_2v8_en$SB_IO_OUT -.sym 30034 spi_if_ins.w_rx_data[2] -.sym 30039 w_ioc[2] -.sym 30040 w_ioc[4] -.sym 30041 w_ioc[3] -.sym 30044 i_config_SB_LUT4_I3_I1[4] -.sym 30045 io_ctrl_ins.o_data_out_SB_DFFESR_Q_6_R[1] -.sym 30046 io_ctrl_ins.debug_mode[0] -.sym 30047 i_config_SB_LUT4_I3_I1[4] -.sym 30048 smi_ctrl_ins.o_data_out_SB_DFFESR_Q_E_SB_LUT4_O_I1_SB_LUT4_I1_O[2] -.sym 30049 o_led0$SB_IO_OUT -.sym 30050 i_config_SB_LUT4_I3_O_SB_LUT4_O_I0[0] -.sym 30051 i_config_SB_LUT4_I3_O_SB_LUT4_O_I0[1] -.sym 30052 i_config_SB_LUT4_I3_I1[4] -.sym 30053 i_config_SB_LUT4_I3_O_SB_LUT4_O_I0[3] -.sym 30054 io_ctrl_ins.debug_mode_SB_LUT4_I2_O[1] -.sym 30055 i_config_SB_LUT4_I3_I1[4] -.sym 30056 smi_ctrl_ins.o_data_out_SB_DFFESR_Q_E_SB_LUT4_O_I1_SB_LUT4_I1_O[2] -.sym 30057 i_config[0]$SB_IO_IN -.sym 30058 spi_if_ins.w_rx_data[2] -.sym 30063 smi_ctrl_ins.o_data_out_SB_DFFESR_Q_E_SB_LUT4_O_I1_SB_LUT4_I1_O[2] -.sym 30064 io_ctrl_ins.ldo2v8_state_SB_LUT4_I3_O[1] -.sym 30065 i_config_SB_LUT4_I3_O_SB_LUT4_O_1_I2[1] -.sym 30066 io_ctrl_ins.rf_mode[2] -.sym 30067 i_config_SB_LUT4_I3_I1[4] -.sym 30068 smi_ctrl_ins.o_data_out_SB_DFFESR_Q_E_SB_LUT4_O_I1_SB_LUT4_I1_O[2] -.sym 30069 i_config[1]$SB_IO_IN +.sym 27646 o_rx_h_tx_l_b$SB_IO_OUT +.sym 27648 o_tr_vc1_b$SB_IO_OUT +.sym 27869 r_counter[0] +.sym 27884 w_lvds_rx_09_d1_SB_LUT4_I0_O[0] +.sym 27885 w_lvds_rx_09_d1_SB_LUT4_I0_O[1] +.sym 27889 w_lvds_rx_09_d1_SB_LUT4_I0_O[1] +.sym 27890 w_lvds_rx_09_d1_SB_LUT4_I0_O_SB_LUT4_O_I2[3] +.sym 27891 w_lvds_rx_09_d1_SB_LUT4_I0_O_SB_LUT4_O_I2[2] +.sym 27892 w_lvds_rx_09_d1_SB_LUT4_I3_I2[2] +.sym 27893 w_lvds_rx_09_d0 +.sym 27894 w_lvds_rx_09_d1_SB_LUT4_I0_O_SB_LUT4_O_I2[3] +.sym 27895 w_lvds_rx_09_d1_SB_LUT4_I0_O_SB_LUT4_O_I2[2] +.sym 27896 w_lvds_rx_09_d1_SB_LUT4_I3_I2[2] +.sym 27897 w_lvds_rx_09_d1 +.sym 27900 lvds_rx_09_inst.r_data_SB_DFFNESR_Q_R[0] +.sym 27901 w_rx_09_fifo_data[1] +.sym 27902 w_lvds_rx_09_d1 +.sym 27903 w_lvds_rx_09_d0 +.sym 27904 w_lvds_rx_09_d1_SB_LUT4_I0_O_SB_LUT4_O_I2[2] +.sym 27905 w_lvds_rx_09_d1_SB_LUT4_I0_O_SB_LUT4_O_I2[3] +.sym 27929 lvds_rx_09_inst.r_data_SB_DFFNESR_Q_R[0] +.sym 27932 w_lvds_rx_09_d1_SB_LUT4_I0_O_SB_LUT4_O_I2[2] +.sym 27933 w_lvds_rx_09_d1_SB_LUT4_I0_O_SB_LUT4_O_I2[3] +.sym 27934 lvds_rx_09_inst.r_data_SB_DFFNESR_Q_R[0] +.sym 28013 $PACKER_VCC_NET +.sym 28356 lvds_rx_09_inst.r_data_SB_DFFNESR_Q_R[0] +.sym 28357 io_pmod[5]$SB_IO_OUT +.sym 28360 lvds_rx_09_inst.r_data_SB_DFFNESR_Q_R[0] +.sym 28361 w_rx_09_fifo_data[0] +.sym 28386 lvds_rx_09_inst.r_state_if_SB_DFFNESR_Q_D[1] +.sym 28392 w_lvds_rx_09_d1_SB_LUT4_I0_O_SB_LUT4_O_I2[2] +.sym 28393 w_lvds_rx_09_d1_SB_LUT4_I0_O_SB_LUT4_O_I2[3] +.sym 28395 lvds_rx_09_inst.r_state_if_SB_DFFNESR_Q_D[1] +.sym 28396 w_lvds_rx_09_d1_SB_LUT4_I0_O_SB_LUT4_O_I2[1] +.sym 28397 w_lvds_rx_09_d1_SB_LUT4_I0_O_SB_LUT4_O_I1[0] +.sym 28400 w_lvds_rx_09_d1_SB_LUT4_I0_O_SB_LUT4_O_I2[2] +.sym 28401 w_lvds_rx_09_d1_SB_LUT4_I0_O_SB_LUT4_O_I2[3] +.sym 28403 w_lvds_rx_09_d1_SB_LUT4_I0_O_SB_LUT4_O_I1[0] +.sym 28404 w_lvds_rx_09_d1_SB_LUT4_I0_O_SB_LUT4_O_I2[1] +.sym 28405 lvds_rx_09_inst.r_state_if_SB_DFFNESR_Q_D[1] +.sym 28406 w_lvds_rx_09_d1_SB_LUT4_I0_O_SB_LUT4_O_I2[2] +.sym 28407 w_lvds_rx_09_d1_SB_LUT4_I0_O_SB_LUT4_O_I1[0] +.sym 28408 w_lvds_rx_09_d1_SB_LUT4_I0_O_SB_LUT4_O_I2[1] +.sym 28409 w_lvds_rx_09_d1_SB_LUT4_I0_O_SB_LUT4_O_I2[3] +.sym 28417 w_lvds_rx_09_d1_SB_LUT4_I0_O_SB_LUT4_O_I1[0] +.sym 28419 lvds_rx_09_inst.r_phase_count[0] +.sym 28423 lvds_rx_09_inst.r_phase_count[1] +.sym 28424 $PACKER_VCC_NET +.sym 28426 lvds_rx_09_inst.r_state_if_SB_DFFNESR_Q_D_SB_LUT4_I1_O[0] +.sym 28427 lvds_rx_09_inst.r_phase_count_SB_LUT4_O_1_I3[0] +.sym 28428 lvds_rx_09_inst.r_state_if_SB_DFFNESR_Q_D_SB_LUT4_I1_O[2] +.sym 28429 lvds_rx_09_inst.r_phase_count_SB_CARRY_CI_CO[2] +.sym 28434 lvds_rx_09_inst.r_state_if_SB_DFFNESR_Q_D_SB_LUT4_I1_O[0] +.sym 28435 lvds_rx_09_inst.r_phase_count[1] +.sym 28436 lvds_rx_09_inst.r_state_if_SB_DFFNESR_Q_D_SB_LUT4_I1_O[2] +.sym 28437 lvds_rx_09_inst.r_phase_count[0] +.sym 28438 w_lvds_rx_09_d1_SB_LUT4_I0_O_SB_LUT4_O_I1[0] +.sym 28439 w_lvds_rx_09_d1_SB_LUT4_I0_O_SB_LUT4_O_I2[1] +.sym 28440 w_lvds_rx_09_d1_SB_LUT4_I0_O_SB_LUT4_O_I2[2] +.sym 28441 w_lvds_rx_09_d1_SB_LUT4_I0_O_SB_LUT4_O_I2[3] +.sym 28444 lvds_rx_09_inst.r_data_SB_DFFNESR_Q_R[0] +.sym 28445 w_lvds_rx_09_d1_SB_LUT4_I0_O_SB_LUT4_O_I1[0] +.sym 28448 lvds_rx_09_inst.r_phase_count_SB_LUT4_O_1_I3[0] +.sym 28449 lvds_rx_09_inst.r_phase_count_SB_LUT4_O_1_I3[1] +.sym 28473 lvds_rx_09_inst.r_phase_count_SB_LUT4_O_1_I3[1] +.sym 28550 w_rx_data[2] +.sym 28598 spi_if_ins.w_rx_data[2] +.sym 28602 spi_if_ins.w_rx_data[0] +.sym 28922 spi_if_ins.state_if_SB_DFFESR_Q_1_D[1] +.sym 28942 spi_if_ins.o_load_cmd_SB_DFFESR_Q_D[1] +.sym 28943 spi_if_ins.r_tx_data_valid_SB_DFFESR_Q_D[0] +.sym 28944 spi_if_ins.state_if[0] +.sym 28945 spi_if_ins.state_if[1] +.sym 28946 spi_if_ins.state_if_SB_DFFESR_Q_D[0] +.sym 28951 spi_if_ins.o_load_cmd_SB_DFFESR_Q_D[1] +.sym 28952 spi_if_ins.state_if[1] +.sym 28953 spi_if_ins.state_if[0] +.sym 28973 smi_ctrl_ins.o_data_out_SB_DFFESR_Q_D[4] +.sym 28984 spi_if_ins.r_tx_data_valid_SB_DFFESR_Q_D[0] +.sym 28985 spi_if_ins.state_if_SB_DFFESR_Q_1_D[1] +.sym 28986 spi_if_ins.o_load_cmd_SB_DFFESR_Q_D[1] +.sym 28987 spi_if_ins.r_tx_data_valid_SB_DFFESR_Q_D[0] +.sym 28988 spi_if_ins.state_if[0] +.sym 28989 spi_if_ins.state_if[1] +.sym 28990 smi_ctrl_ins.o_data_out_SB_DFFESR_Q_D[4] +.sym 28998 spi_if_ins.spi.r3_rx_done_SB_LUT4_I2_O +.sym 29008 spi_if_ins.o_load_cmd_SB_DFFESR_Q_D_SB_LUT4_I1_O[1] +.sym 29009 spi_if_ins.state_if_SB_DFFESR_Q_1_D_SB_LUT4_I3_O[1] +.sym 29013 spi_if_ins.state_if_SB_DFFESR_Q_R +.sym 29021 w_cs[2] +.sym 29044 spi_if_ins.o_load_cmd_SB_DFFESR_Q_D[0] +.sym 29045 spi_if_ins.o_load_cmd_SB_DFFESR_Q_D[1] +.sym 29066 w_rx_data[2] +.sym 29086 io_ctrl_ins.led1_state_SB_LUT4_I0_O_SB_LUT4_O_I2[0] +.sym 29087 i_config_SB_LUT4_I0_I3[2] +.sym 29088 io_ctrl_ins.led1_state_SB_LUT4_I0_O_SB_LUT4_O_I2[2] +.sym 29089 io_ctrl_ins.led1_state_SB_LUT4_I0_O_SB_LUT4_O_I2[3] +.sym 29094 io_ctrl_ins.o_pmod[4] +.sym 29095 i_config_SB_LUT4_I0_I3[2] +.sym 29096 io_ctrl_ins.tr_vc_1_b_state_SB_LUT4_I1_O[2] +.sym 29097 io_ctrl_ins.led1_state_SB_LUT4_I0_O_SB_LUT4_O_I2[3] +.sym 29101 io_ctrl_ins.rf_pin_state_SB_DFFE_Q_E +.sym 29102 io_ctrl_ins.debug_mode[1] +.sym 29103 o_shdn_rx_lna$SB_IO_OUT +.sym 29104 i_config_SB_LUT4_I0_I3[2] +.sym 29105 w_ioc[2] +.sym 29106 spi_if_ins.w_rx_data[2] +.sym 29114 spi_if_ins.w_rx_data[0] +.sym 29130 w_rx_data[3] +.sym 29134 io_ctrl_ins.rf_mode[2] +.sym 29135 o_tr_vc1_b$SB_IO_OUT +.sym 29136 i_config_SB_LUT4_I0_I3[2] +.sym 29137 w_ioc[2] +.sym 29138 w_rx_data[0] +.sym 29142 io_ctrl_ins.debug_mode[0] +.sym 29143 io_ctrl_ins.mixer_en_state +.sym 29144 i_config_SB_LUT4_I0_I3[2] +.sym 29145 w_ioc[2] +.sym 29146 w_rx_data[1] +.sym 29156 io_ctrl_ins.debug_mode[0] +.sym 29157 io_ctrl_ins.debug_mode[1] +.sym 29165 io_ctrl_ins.rx_h_state_SB_DFFE_Q_E +.sym 29178 w_rx_data[2] +.sym 29207 io_ctrl_ins.rf_pin_state[1] +.sym 29208 io_ctrl_ins.rf_mode[1] +.sym 29209 io_ctrl_ins.rx_h_state_SB_DFFE_Q_D_SB_LUT4_O_I2[3] +.sym 29442 spi_if_ins.r_tx_data_valid_SB_DFFESR_Q_D[0] +.sym 29443 spi_if_ins.o_load_cmd_SB_DFFESR_Q_D[1] +.sym 29444 spi_if_ins.state_if[0] +.sym 29445 spi_if_ins.state_if[1] +.sym 29447 spi_if_ins.o_load_cmd_SB_DFFESR_Q_D[1] +.sym 29448 spi_if_ins.state_if[0] +.sym 29449 spi_if_ins.state_if[1] +.sym 29451 spi_if_ins.o_load_cmd_SB_DFFESR_Q_D[1] +.sym 29452 spi_if_ins.state_if[0] +.sym 29453 spi_if_ins.state_if[1] +.sym 29457 spi_if_ins.spi.r_rx_done_SB_DFFER_Q_D_SB_LUT4_I3_O +.sym 29462 spi_if_ins.state_if_SB_DFFESR_Q_D[0] +.sym 29463 spi_if_ins.state_if_SB_DFFESR_Q_D[1] +.sym 29464 spi_if_ins.state_if_SB_DFFESR_Q_1_D[1] +.sym 29465 spi_if_ins.r_tx_data_valid_SB_DFFESR_Q_D[0] +.sym 29480 spi_if_ins.state_if[0] +.sym 29481 spi_if_ins.state_if[1] +.sym 29490 spi_if_ins.o_load_cmd_SB_DFFESR_Q_D[0] +.sym 29497 spi_if_ins.r_tx_data_valid_SB_DFFESR_Q_D[0] +.sym 29504 spi_if_ins.o_load_cmd_SB_DFFESR_Q_D_SB_LUT4_I1_O[0] +.sym 29505 spi_if_ins.o_load_cmd_SB_DFFESR_Q_D_SB_LUT4_I1_O[1] +.sym 29518 spi_if_ins.spi.r_rx_byte[4] +.sym 29530 spi_if_ins.o_load_cmd_SB_DFFESR_Q_D[1] +.sym 29531 spi_if_ins.state_if_SB_DFFESR_Q_D[1] +.sym 29532 spi_if_ins.o_load_cmd_SB_DFFESR_Q_D[0] +.sym 29533 spi_if_ins.r_tx_data_valid_SB_DFFESR_Q_D[0] +.sym 29535 spi_if_ins.o_load_cmd_SB_DFFESR_Q_D[0] +.sym 29536 spi_if_ins.o_load_cmd_SB_DFFESR_Q_D[1] +.sym 29537 spi_if_ins.r_tx_data_valid_SB_DFFESR_Q_D[0] +.sym 29554 w_ioc[2] +.sym 29555 io_ctrl_ins.led1_state_SB_LUT4_I0_O_SB_LUT4_O_I2[3] +.sym 29556 w_fetch +.sym 29557 w_cs[2] +.sym 29564 io_ctrl_ins.led1_state_SB_LUT4_I0_O[0] +.sym 29565 io_ctrl_ins.led1_state_SB_LUT4_I0_O[1] +.sym 29578 i_config_SB_LUT4_I0_I3[2] +.sym 29579 w_ioc[2] +.sym 29580 io_ctrl_ins.led1_state_SB_LUT4_I0_O_SB_LUT4_O_I2[3] +.sym 29581 i_config_SB_LUT4_I0_I3[3] +.sym 29582 w_tx_data_smi[1] +.sym 29583 spi_if_ins.o_cs_SB_LUT4_I1_O[1] +.sym 29584 spi_if_ins.o_cs_SB_LUT4_I1_O[2] +.sym 29585 w_tx_data_io[3] +.sym 29586 i_config_SB_LUT4_I0_I3[3] +.sym 29587 io_ctrl_ins.led1_state_SB_LUT4_I0_O_SB_LUT4_O_I2[3] +.sym 29588 w_cs[1] +.sym 29589 w_fetch +.sym 29604 i_button_SB_LUT4_I0_O[1] +.sym 29605 spi_if_ins.o_load_cmd_SB_LUT4_I3_O[1] +.sym 29610 o_led0$SB_IO_OUT +.sym 29611 io_ctrl_ins.pmod_dir_state[0] +.sym 29612 i_config_SB_LUT4_I0_I3[2] +.sym 29613 i_config_SB_LUT4_I0_I3[3] +.sym 29614 spi_if_ins.w_rx_data[4] +.sym 29618 w_ioc[2] +.sym 29619 i_config_SB_LUT4_I0_I3[2] +.sym 29620 io_ctrl_ins.led1_state_SB_LUT4_I0_O_SB_LUT4_O_I2[3] +.sym 29621 i_config_SB_LUT4_I0_I3[3] +.sym 29622 spi_if_ins.w_rx_data[3] +.sym 29627 w_ioc[2] +.sym 29628 i_config_SB_LUT4_I0_I3[2] +.sym 29629 io_ctrl_ins.led1_state_SB_LUT4_I0_O_SB_LUT4_O_I2[3] +.sym 29630 spi_if_ins.w_rx_data[1] +.sym 29634 io_ctrl_ins.rf_mode[0] +.sym 29635 o_shdn_tx_lna$SB_IO_OUT +.sym 29636 i_config_SB_LUT4_I0_I3[2] +.sym 29637 w_ioc[2] +.sym 29642 io_ctrl_ins.rf_mode[1] +.sym 29643 o_tr_vc2$SB_IO_OUT +.sym 29644 i_config_SB_LUT4_I0_I3[2] +.sym 29645 w_ioc[2] +.sym 29646 w_rx_data[4] +.sym 29654 w_rx_data[1] +.sym 29660 smi_ctrl_ins.o_data_out_SB_DFFESR_Q_D[4] +.sym 29661 spi_if_ins.o_load_cmd_SB_LUT4_I3_O[1] +.sym 29666 io_ctrl_ins.rx_h_state_SB_DFFE_Q_D_SB_LUT4_O_I2[3] +.sym 29667 io_ctrl_ins.rf_mode[0] +.sym 29668 io_ctrl_ins.rf_mode[2] +.sym 29669 io_ctrl_ins.rf_mode[1] +.sym 29670 w_rx_data[2] +.sym 29678 w_rx_data[0] +.sym 29682 io_ctrl_ins.debug_mode[0] +.sym 29683 io_ctrl_ins.rf_mode[1] +.sym 29684 io_ctrl_ins.rf_mode[2] +.sym 29685 io_ctrl_ins.debug_mode[1] +.sym 29688 io_ctrl_ins.rf_mode[0] +.sym 29689 io_ctrl_ins.rf_mode[2] +.sym 29690 w_rx_data[3] +.sym 29898 spi_if_ins.spi.r_temp_rx_byte[4] +.sym 29954 spi_if_ins.spi.r_temp_rx_byte[0] +.sym 29958 spi_if_ins.spi.r_temp_rx_byte[2] +.sym 29962 spi_if_ins.spi.r_temp_rx_byte[3] +.sym 29966 spi_if_ins.spi.r_temp_rx_byte[5] +.sym 29972 i_ss$SB_IO_IN +.sym 29973 spi_if_ins.spi.r_rx_done_SB_DFFER_Q_D[1] +.sym 29974 spi_if_ins.spi.r_temp_rx_byte[1] +.sym 29982 i_mosi$SB_IO_IN +.sym 29986 spi_if_ins.spi.r_temp_rx_byte[3] +.sym 29990 spi_if_ins.spi.r_temp_rx_byte[5] +.sym 29994 spi_if_ins.spi.r_temp_rx_byte[1] +.sym 29998 spi_if_ins.spi.r_temp_rx_byte[6] +.sym 30002 i_mosi$SB_IO_IN +.sym 30006 spi_if_ins.spi.r_temp_rx_byte[0] +.sym 30010 spi_if_ins.spi.r_temp_rx_byte[4] +.sym 30014 spi_if_ins.spi.r_temp_rx_byte[2] +.sym 30022 spi_if_ins.spi.r_rx_byte[1] +.sym 30042 spi_if_ins.spi.r_rx_byte[2] +.sym 30054 spi_if_ins.w_rx_data[1] +.sym 30058 spi_if_ins.w_rx_data[4] +.sym 30062 sys_ctrl_ins.i_cs_SB_DFFE_Q_D[0] +.sym 30069 r_tx_data_SB_DFFESR_Q_R .sym 30070 spi_if_ins.w_rx_data[3] -.sym 30076 i_config_SB_LUT4_I3_O_SB_LUT4_O_1_I2[1] -.sym 30077 i_config_SB_LUT4_I3_O_SB_LUT4_O_1_I2[0] -.sym 30078 spi_if_ins.w_rx_data[1] -.sym 30085 w_rx_data[6] -.sym 30089 i_config_SB_LUT4_I3_O_SB_LUT4_O_I0[2] -.sym 30102 io_ctrl_ins.debug_mode[1] -.sym 30103 i_config_SB_LUT4_I3_I1[4] -.sym 30104 smi_ctrl_ins.o_data_out_SB_DFFESR_Q_E_SB_LUT4_O_I1_SB_LUT4_I1_O[2] -.sym 30105 o_led1$SB_IO_OUT -.sym 30110 w_rx_data[3] -.sym 30118 io_ctrl_ins.debug_mode[0] -.sym 30119 io_ctrl_ins.debug_mode_SB_LUT4_I2_O[1] -.sym 30120 io_ctrl_ins.rf_mode[2] -.sym 30121 io_ctrl_ins.debug_mode[1] -.sym 30130 w_rx_data[5] -.sym 30134 w_rx_data[7] -.sym 30140 io_ctrl_ins.debug_mode[0] -.sym 30141 io_ctrl_ins.debug_mode[1] -.sym 30142 w_rx_data[6] -.sym 30155 io_ctrl_ins.rf_pin_state[1] -.sym 30156 io_ctrl_ins.debug_mode_SB_LUT4_I2_O[1] -.sym 30157 io_ctrl_ins.debug_mode_SB_LUT4_I2_O[3] -.sym 30162 io_ctrl_ins.rf_pin_state[0] -.sym 30163 io_ctrl_ins.rf_mode[2] -.sym 30164 io_ctrl_ins.debug_mode_SB_LUT4_I2_O[1] -.sym 30165 io_ctrl_ins.debug_mode_SB_LUT4_I2_O[3] -.sym 30166 io_ctrl_ins.debug_mode_SB_LUT4_I2_O[1] -.sym 30167 io_ctrl_ins.rf_mode[2] -.sym 30168 io_ctrl_ins.rf_pin_state[2] -.sym 30169 io_ctrl_ins.debug_mode_SB_LUT4_I2_O[3] -.sym 30418 spi_if_ins.spi.r3_rx_done_SB_LUT4_I2_O -.sym 30434 spi_if_ins.r_tx_byte[5] -.sym 30438 spi_if_ins.r_tx_byte[3] -.sym 30442 spi_if_ins.r_tx_byte[4] -.sym 30446 spi_if_ins.spi.r_tx_byte[3] -.sym 30447 spi_if_ins.spi.r_tx_byte[7] -.sym 30448 spi_if_ins.spi.r_tx_bit_count[2] -.sym 30449 spi_if_ins.spi.o_spi_miso_SB_DFFE_Q_D_SB_LUT4_O_I2_SB_LUT4_O_I0_SB_LUT4_O_2_I0[3] -.sym 30450 spi_if_ins.r_tx_byte[6] -.sym 30454 spi_if_ins.r_tx_byte[0] -.sym 30459 spi_if_ins.spi.r_tx_byte[0] -.sym 30460 spi_if_ins.spi.r_tx_byte[4] -.sym 30461 spi_if_ins.spi.r_tx_bit_count[2] -.sym 30462 spi_if_ins.r_tx_byte[1] -.sym 30466 r_tx_data[7] -.sym 30482 r_tx_data[2] -.sym 30486 r_tx_data[5] -.sym 30490 spi_if_ins.spi.r_tx_byte[2] -.sym 30491 spi_if_ins.spi.r_tx_byte[6] -.sym 30492 spi_if_ins.spi.o_spi_miso_SB_DFFE_Q_D_SB_LUT4_O_I2_SB_LUT4_O_I0_SB_LUT4_O_2_I0[3] -.sym 30493 spi_if_ins.spi.r_tx_bit_count[2] -.sym 30494 r_tx_data[0] -.sym 30502 spi_if_ins.r_tx_byte[2] -.sym 30518 spi_if_ins.r_tx_byte[7] -.sym 30530 spi_if_ins.spi.r_rx_byte[4] -.sym 30534 spi_if_ins.spi.r_rx_byte[5] -.sym 30538 spi_if_ins.spi.r_rx_byte[3] -.sym 30542 spi_if_ins.spi.r_rx_byte[2] -.sym 30546 spi_if_ins.spi.r_rx_byte[6] -.sym 30554 spi_if_ins.spi.r_rx_byte[1] -.sym 30558 i_config_SB_LUT4_I3_O_SB_LUT4_O_1_I2[0] -.sym 30559 io_ctrl_ins.o_data_out_SB_DFFESR_Q_6_E_SB_LUT4_O_I1_SB_LUT4_O_I1[1] -.sym 30560 w_ioc[1] -.sym 30561 w_ioc[2] -.sym 30579 i_config_SB_LUT4_I3_O_SB_LUT4_O_1_I2[0] -.sym 30580 w_ioc[1] -.sym 30581 smi_ctrl_ins.o_data_out_SB_DFFESR_Q_E_SB_LUT4_O_I1[1] -.sym 30585 w_rx_data[3] -.sym 30586 w_rx_data[0] -.sym 30590 w_rx_data[2] -.sym 30594 i_config_SB_LUT4_I3_O_SB_LUT4_O_I0[0] -.sym 30595 i_config_SB_LUT4_I3_O_SB_LUT4_O_I0[1] -.sym 30596 i_config_SB_LUT4_I3_O[1] -.sym 30597 i_config_SB_LUT4_I3_O_SB_LUT4_O_I0[3] -.sym 30598 w_rx_data[1] -.sym 30606 i_config_SB_LUT4_I3_O_SB_LUT4_O_I0[0] -.sym 30607 i_config_SB_LUT4_I3_O_SB_LUT4_O_I0[1] -.sym 30608 i_config_SB_LUT4_I3_O_SB_LUT4_O_I0[2] -.sym 30609 i_config_SB_LUT4_I3_O_SB_LUT4_O_I0[3] -.sym 30610 w_rx_data[4] -.sym 30626 w_rx_data[2] -.sym 30630 w_rx_data[5] -.sym 30634 w_rx_data[0] -.sym 30638 w_rx_data[4] -.sym 30642 w_rx_data[6] -.sym 30648 io_ctrl_ins.rf_mode[0] -.sym 30649 io_ctrl_ins.rf_mode[2] -.sym 30654 w_rx_data[1] -.sym 30658 io_ctrl_ins.debug_mode_SB_LUT4_I2_O[0] -.sym 30659 io_ctrl_ins.debug_mode_SB_LUT4_I2_O[1] -.sym 30660 io_ctrl_ins.rf_pin_state[5] -.sym 30661 io_ctrl_ins.debug_mode_SB_LUT4_I2_O[3] -.sym 30669 io_ctrl_ins.debug_mode_SB_LUT4_I2_O[3] -.sym 30682 io_ctrl_ins.debug_mode_SB_LUT4_I2_O[0] -.sym 30683 io_ctrl_ins.debug_mode_SB_LUT4_I2_O[1] -.sym 30684 io_ctrl_ins.debug_mode_SB_LUT4_I2_O[2] -.sym 30685 io_ctrl_ins.debug_mode_SB_LUT4_I2_O[3] -.sym 30902 i_sck$SB_IO_IN -.sym 30918 spi_if_ins.spi.SCKr[0] -.sym 30926 spi_if_ins.spi.SCKr[1] -.sym 30941 spi_if_ins.r_tx_data_valid_SB_LUT4_I3_O -.sym 30943 spi_if_ins.spi.SCKr[2] -.sym 30944 spi_if_ins.spi.SCKr[1] -.sym 30945 spi_if_ins.r_tx_data_valid_SB_LUT4_I3_O -.sym 30947 spi_if_ins.spi.o_spi_miso_SB_DFFE_Q_D_SB_LUT4_O_I2_SB_LUT4_O_I0_SB_LUT4_O_2_I0[3] -.sym 30951 spi_if_ins.spi.SCKr_SB_LUT4_I0_O[0] -.sym 30952 $PACKER_VCC_NET -.sym 30955 spi_if_ins.spi.r_tx_bit_count[2] -.sym 30956 $PACKER_VCC_NET -.sym 30957 spi_if_ins.spi.r_tx_bit_count_SB_DFFESR_Q_D_SB_LUT4_O_I3[2] -.sym 30962 spi_if_ins.spi.o_spi_miso_SB_DFFE_Q_D_SB_LUT4_O_I2_SB_LUT4_O_I0[0] -.sym 30963 spi_if_ins.spi.o_spi_miso_SB_DFFE_Q_D_SB_LUT4_O_I2_SB_LUT4_O_I0[1] -.sym 30964 spi_if_ins.spi.SCKr_SB_LUT4_I0_O[0] -.sym 30965 spi_if_ins.spi.o_spi_miso_SB_DFFE_Q_D_SB_LUT4_O_I2_SB_LUT4_O_I0[3] -.sym 30966 spi_if_ins.spi.SCKr[2] -.sym 30967 spi_if_ins.spi.o_spi_miso_SB_DFFE_Q_D_SB_LUT4_O_I2_SB_LUT4_O_I0_SB_LUT4_O_2_I0[3] -.sym 30968 spi_if_ins.spi.r_tx_bit_count[2] -.sym 30969 spi_if_ins.spi.SCKr[1] -.sym 30971 spi_if_ins.spi.SCKr_SB_LUT4_I0_O[0] -.sym 30972 $PACKER_VCC_NET -.sym 30973 spi_if_ins.spi.o_spi_miso_SB_DFFE_Q_D_SB_LUT4_O_I2_SB_LUT4_O_I0_SB_LUT4_O_2_I0[3] -.sym 30977 spi_if_ins.spi.o_spi_miso_SB_DFFE_Q_D_SB_LUT4_O_I2_SB_LUT4_O_I0_SB_LUT4_O_2_I0[3] -.sym 30978 spi_if_ins.spi.o_spi_miso_SB_DFFE_Q_D_SB_LUT4_O_I2_SB_LUT4_O_I0_SB_LUT4_O_2_I0[0] -.sym 30979 spi_if_ins.spi.o_spi_miso_SB_DFFE_Q_D_SB_LUT4_O_I2_SB_LUT4_O_I0_SB_LUT4_O_2_I0[1] -.sym 30980 spi_if_ins.spi.SCKr_SB_LUT4_I0_O[0] -.sym 30981 spi_if_ins.spi.o_spi_miso_SB_DFFE_Q_D_SB_LUT4_O_I2_SB_LUT4_O_I0_SB_LUT4_O_2_I0[3] -.sym 30982 spi_if_ins.spi.r_rx_byte[7] -.sym 30991 spi_if_ins.spi.SCKr_SB_LUT4_I0_O[0] -.sym 30992 spi_if_ins.spi.SCKr_SB_LUT4_I0_O[1] -.sym 30993 spi_if_ins.r_tx_data_valid_SB_LUT4_I3_O -.sym 30995 spi_if_ins.spi.r_tx_byte[1] -.sym 30996 spi_if_ins.spi.r_tx_byte[5] -.sym 30997 spi_if_ins.spi.r_tx_bit_count[2] -.sym 31008 i_ss$SB_IO_IN -.sym 31009 spi_if_ins.r_tx_data_valid -.sym 31010 spi_if_ins.spi.r_temp_rx_byte[1] -.sym 31018 spi_if_ins.spi.r_temp_rx_byte[3] -.sym 31022 spi_if_ins.spi.r_temp_rx_byte[4] -.sym 31026 i_mosi$SB_IO_IN -.sym 31030 spi_if_ins.spi.r_temp_rx_byte[5] -.sym 31034 spi_if_ins.spi.r_temp_rx_byte[0] -.sym 31038 spi_if_ins.spi.r_temp_rx_byte[2] -.sym 31042 spi_if_ins.spi.r_temp_rx_byte[4] -.sym 31046 spi_if_ins.spi.r_temp_rx_byte[5] -.sym 31054 spi_if_ins.spi.r_temp_rx_byte[0] -.sym 31059 io_ctrl_ins.o_data_out_SB_DFFESR_Q_6_E_SB_LUT4_O_I1[0] -.sym 31060 i_config_SB_LUT4_I3_O_SB_LUT4_O_I0[1] -.sym 31061 i_config_SB_LUT4_I3_O_SB_LUT4_O_I0[0] -.sym 31062 spi_if_ins.spi.r_temp_rx_byte[2] -.sym 31066 spi_if_ins.spi.r_temp_rx_byte[3] -.sym 31070 spi_if_ins.spi.r_temp_rx_byte[1] -.sym 31076 io_ctrl_ins.tr_vc_1_state_SB_LUT4_I1_O[0] -.sym 31077 io_ctrl_ins.tr_vc_1_state_SB_LUT4_I1_O[1] -.sym 31088 i_button_SB_LUT4_I3_O[0] -.sym 31089 i_button_SB_LUT4_I3_O[1] -.sym 31092 io_ctrl_ins.rx_h_b_state_SB_LUT4_I1_O[0] -.sym 31093 io_ctrl_ins.rx_h_b_state_SB_LUT4_I1_O[1] -.sym 31110 w_rx_data[3] -.sym 31114 io_ctrl_ins.pmod_dir_state[7] -.sym 31115 io_ctrl_ins.ldo2v8_state_SB_LUT4_I3_O[1] -.sym 31116 smi_ctrl_ins.o_data_out_SB_DFFESR_Q_E_SB_LUT4_O_I1_SB_LUT4_I1_O[2] -.sym 31117 i_button$SB_IO_IN -.sym 31118 io_ctrl_ins.o_pmod[6] -.sym 31119 o_rx_h_tx_l_b$SB_IO_OUT -.sym 31120 i_config_SB_LUT4_I3_O_SB_LUT4_O_1_I2[0] -.sym 31121 i_config_SB_LUT4_I3_O_SB_LUT4_O_1_I2[1] -.sym 31122 w_rx_data[7] -.sym 31126 io_ctrl_ins.pmod_dir_state[6] -.sym 31127 io_ctrl_ins.ldo2v8_state_SB_LUT4_I3_O[1] -.sym 31128 smi_ctrl_ins.o_data_out_SB_DFFESR_Q_E_SB_LUT4_O_I1_SB_LUT4_I1_O[2] -.sym 31129 i_config[3]$SB_IO_IN -.sym 31130 io_ctrl_ins.ldo2v8_state_SB_LUT4_I3_O[1] -.sym 31131 io_ctrl_ins.pmod_dir_state[5] -.sym 31132 smi_ctrl_ins.o_data_out_SB_DFFESR_Q_E_SB_LUT4_O_I1_SB_LUT4_I1_O[2] -.sym 31133 i_config[2]$SB_IO_IN -.sym 31138 w_rx_data[6] -.sym 31150 w_rx_data[5] -.sym 31154 io_ctrl_ins.o_pmod[5] -.sym 31155 o_tr_vc1$SB_IO_OUT -.sym 31156 i_config_SB_LUT4_I3_O_SB_LUT4_O_1_I2[0] -.sym 31157 i_config_SB_LUT4_I3_O_SB_LUT4_O_1_I2[1] -.sym 31158 io_ctrl_ins.o_pmod[7] -.sym 31159 o_rx_h_tx_l$SB_IO_OUT -.sym 31160 i_config_SB_LUT4_I3_O_SB_LUT4_O_1_I2[0] -.sym 31161 i_config_SB_LUT4_I3_O_SB_LUT4_O_1_I2[1] -.sym 31162 io_ctrl_ins.debug_mode_SB_LUT4_I2_O[3] -.sym 31163 io_ctrl_ins.rf_mode[0] -.sym 31164 io_ctrl_ins.rf_mode[2] -.sym 31165 io_ctrl_ins.debug_mode_SB_LUT4_I2_O[1] -.sym 31166 w_rx_data[7] -.sym 31182 io_ctrl_ins.rf_pin_state[3] -.sym 31183 io_ctrl_ins.rf_mode[2] -.sym 31184 io_ctrl_ins.debug_mode_SB_LUT4_I2_O[1] -.sym 31185 io_ctrl_ins.debug_mode_SB_LUT4_I2_O[3] -.sym 31187 io_ctrl_ins.debug_mode_SB_LUT4_I2_O[3] -.sym 31188 io_ctrl_ins.rf_pin_state[6] -.sym 31189 io_ctrl_ins.rx_h_state_SB_DFFE_Q_D_SB_LUT4_O_I3[2] -.sym 31195 io_ctrl_ins.rf_pin_state[7] -.sym 31196 io_ctrl_ins.debug_mode_SB_LUT4_I2_O[3] -.sym 31197 io_ctrl_ins.rx_h_state_SB_DFFE_Q_D_SB_LUT4_O_I3[2] -.sym 31341 i_ss$SB_IO_IN -.sym 31443 spi_if_ins.r_tx_byte[7] -.sym 31444 spi_if_ins.spi.o_spi_miso_SB_DFFE_Q_D_SB_LUT4_O_I2[1] -.sym 31445 spi_if_ins.r_tx_data_valid_SB_LUT4_I3_O -.sym 31491 spi_if_ins.spi.r_rx_bit_count[0] -.sym 31496 spi_if_ins.spi.r_rx_bit_count[1] -.sym 31500 spi_if_ins.spi.r_rx_bit_count[2] -.sym 31501 spi_if_ins.spi.r_rx_bit_count_SB_DFFR_Q_D_SB_LUT4_O_I3[2] -.sym 31505 spi_if_ins.spi.r_rx_bit_count[0] -.sym 31507 spi_if_ins.spi.r_rx_bit_count[0] -.sym 31508 spi_if_ins.spi.r_rx_bit_count[2] -.sym 31509 spi_if_ins.spi.r_rx_bit_count[1] -.sym 31512 spi_if_ins.spi.r_rx_bit_count[1] -.sym 31513 spi_if_ins.spi.r_rx_bit_count[0] -.sym 31519 spi_if_ins.spi.r_rx_bit_count[0] -.sym 31520 spi_if_ins.spi.r_rx_bit_count[2] -.sym 31521 spi_if_ins.spi.r_rx_bit_count[1] -.sym 31522 i_mosi$SB_IO_IN -.sym 31532 i_ss$SB_IO_IN -.sym 31533 spi_if_ins.spi.r_rx_done_SB_DFFER_Q_D[1] -.sym 31542 spi_if_ins.spi.r_temp_rx_byte[6] -.sym 31554 spi_if_ins.spi.r_rx_byte[0] -.sym 31569 io_ctrl_ins.o_data_out_SB_DFFESR_Q_6_E -.sym 31954 spi_if_ins.spi.r_rx_done_SB_DFFER_Q_D[1] -.sym 31970 spi_if_ins.spi.r_rx_done -.sym 32078 spi_if_ins.spi.r2_rx_done -.sym 32096 spi_if_ins.spi.r3_rx_done -.sym 32097 spi_if_ins.spi.r2_rx_done +.sym 30074 w_cs[2] +.sym 30075 w_cs[1] +.sym 30076 w_cs[3] +.sym 30077 w_cs[0] +.sym 30081 spi_if_ins.o_cs_SB_LUT4_I1_O[2] +.sym 30082 o_ldo_2v8_en$SB_IO_OUT +.sym 30083 i_config_SB_LUT4_I0_I3[1] +.sym 30084 i_config_SB_LUT4_I0_I3[2] +.sym 30085 i_config_SB_LUT4_I0_I3[3] +.sym 30088 io_ctrl_ins.led0_state_SB_LUT4_I0_O[0] +.sym 30089 io_ctrl_ins.led0_state_SB_LUT4_I0_O[1] +.sym 30095 w_ioc[1] +.sym 30096 w_ioc[4] +.sym 30097 w_ioc[3] +.sym 30100 io_ctrl_ins.o_data_out_SB_DFFESR_Q_2_D_SB_LUT4_O_I2[0] +.sym 30101 io_ctrl_ins.o_data_out_SB_DFFESR_Q_2_D_SB_LUT4_O_I2[1] +.sym 30102 w_ioc[2] +.sym 30103 w_ioc[4] +.sym 30104 w_ioc[3] +.sym 30105 w_ioc[1] +.sym 30108 io_ctrl_ins.ldo2v8_state_SB_LUT4_I0_O[0] +.sym 30109 io_ctrl_ins.ldo2v8_state_SB_LUT4_I0_O[1] +.sym 30112 io_ctrl_ins.o_data_out_SB_DFFESR_Q_3_D_SB_LUT4_O_I2[0] +.sym 30113 io_ctrl_ins.o_data_out_SB_DFFESR_Q_3_D_SB_LUT4_O_I2[1] +.sym 30115 w_fetch +.sym 30116 w_cs[1] +.sym 30117 w_load +.sym 30118 i_config[0]$SB_IO_IN +.sym 30119 io_ctrl_ins.pmod_dir_state[3] +.sym 30120 i_config_SB_LUT4_I0_I3[2] +.sym 30121 i_config_SB_LUT4_I0_I3[3] +.sym 30123 io_ctrl_ins.led1_state_SB_LUT4_I0_O_SB_LUT4_O_I2[3] +.sym 30124 i_config_SB_LUT4_I0_I3[2] +.sym 30125 w_ioc[2] +.sym 30127 io_ctrl_ins.o_data_out_SB_DFFESR_Q_6_E_SB_LUT4_O_I1[0] +.sym 30128 w_cs[1] +.sym 30129 w_fetch +.sym 30130 io_ctrl_ins.mixer_en_state_SB_LUT4_I1_O[0] +.sym 30131 i_config_SB_LUT4_I0_I3[2] +.sym 30132 io_ctrl_ins.mixer_en_state_SB_LUT4_I1_O[2] +.sym 30133 io_ctrl_ins.led1_state_SB_LUT4_I0_O_SB_LUT4_O_I2[3] +.sym 30142 w_rx_data[1] +.sym 30146 io_ctrl_ins.o_pmod[3] +.sym 30147 i_config_SB_LUT4_I0_I3[2] +.sym 30148 io_ctrl_ins.tr_vc_2_state_SB_LUT4_I1_O[2] +.sym 30149 io_ctrl_ins.led1_state_SB_LUT4_I0_O_SB_LUT4_O_I2[3] +.sym 30150 o_led1$SB_IO_OUT +.sym 30151 io_ctrl_ins.pmod_dir_state[1] +.sym 30152 i_config_SB_LUT4_I0_I3[2] +.sym 30153 i_config_SB_LUT4_I0_I3[3] +.sym 30154 w_rx_data[4] +.sym 30158 w_rx_data[6] +.sym 30165 io_ctrl_ins.pmod_dir_state[0] +.sym 30166 w_rx_data[5] +.sym 30170 io_ctrl_ins.lna_tx_shutdown_state_SB_LUT4_I1_O[0] +.sym 30171 i_config_SB_LUT4_I0_I3[2] +.sym 30172 io_ctrl_ins.lna_tx_shutdown_state_SB_LUT4_I1_O[2] +.sym 30173 io_ctrl_ins.led1_state_SB_LUT4_I0_O_SB_LUT4_O_I2[3] +.sym 30174 w_rx_data[7] +.sym 30178 io_ctrl_ins.rf_pin_state[0] +.sym 30179 io_ctrl_ins.rf_mode[2] +.sym 30180 io_ctrl_ins.rf_mode[1] +.sym 30181 io_ctrl_ins.rx_h_state_SB_DFFE_Q_D_SB_LUT4_O_I2[3] +.sym 30183 io_ctrl_ins.rf_pin_state[7] +.sym 30184 io_ctrl_ins.rx_h_state_SB_DFFE_Q_D_SB_LUT4_O_I2[3] +.sym 30185 io_ctrl_ins.rx_h_state_SB_DFFE_Q_D_SB_LUT4_O_I3[2] +.sym 30186 io_ctrl_ins.tr_vc_1_state_SB_DFFE_Q_D_SB_LUT4_O_I0[0] +.sym 30187 io_ctrl_ins.rf_mode[1] +.sym 30188 io_ctrl_ins.rf_pin_state[4] +.sym 30189 io_ctrl_ins.rx_h_state_SB_DFFE_Q_D_SB_LUT4_O_I2[3] +.sym 30190 io_ctrl_ins.tr_vc_1_state_SB_DFFE_Q_D_SB_LUT4_O_I0[0] +.sym 30191 io_ctrl_ins.rf_mode[1] +.sym 30192 io_ctrl_ins.rf_pin_state[5] +.sym 30193 io_ctrl_ins.rx_h_state_SB_DFFE_Q_D_SB_LUT4_O_I2[3] +.sym 30194 io_ctrl_ins.rf_mode[1] +.sym 30195 io_ctrl_ins.rf_mode[2] +.sym 30196 io_ctrl_ins.rf_pin_state[2] +.sym 30197 io_ctrl_ins.rx_h_state_SB_DFFE_Q_D_SB_LUT4_O_I2[3] +.sym 30199 io_ctrl_ins.rx_h_state_SB_DFFE_Q_D_SB_LUT4_O_I2[3] +.sym 30200 io_ctrl_ins.rf_pin_state[6] +.sym 30201 io_ctrl_ins.rx_h_state_SB_DFFE_Q_D_SB_LUT4_O_I3[2] +.sym 30202 io_ctrl_ins.rf_pin_state[3] +.sym 30203 io_ctrl_ins.rf_mode[2] +.sym 30204 io_ctrl_ins.rf_mode[1] +.sym 30205 io_ctrl_ins.rx_h_state_SB_DFFE_Q_D_SB_LUT4_O_I2[3] +.sym 30210 w_rx_data[0] +.sym 30397 i_ss$SB_IO_IN +.sym 30438 spi_if_ins.spi.r2_rx_done +.sym 30454 spi_if_ins.spi.r_rx_done +.sym 30460 spi_if_ins.spi.r3_rx_done +.sym 30461 spi_if_ins.spi.r2_rx_done +.sym 30467 spi_if_ins.spi.r_rx_bit_count[0] +.sym 30472 spi_if_ins.spi.r_rx_bit_count[1] +.sym 30476 spi_if_ins.spi.r_rx_bit_count[2] +.sym 30477 spi_if_ins.spi.r_rx_bit_count_SB_DFFR_Q_D_SB_LUT4_O_I3[2] +.sym 30487 spi_if_ins.spi.r_rx_bit_count[1] +.sym 30488 spi_if_ins.spi.r_rx_bit_count[0] +.sym 30489 spi_if_ins.spi.r_rx_bit_count[2] +.sym 30492 spi_if_ins.spi.r_rx_bit_count[1] +.sym 30493 spi_if_ins.spi.r_rx_bit_count[0] +.sym 30497 spi_if_ins.spi.r_rx_bit_count[0] +.sym 30498 spi_if_ins.spi.r_rx_byte[3] +.sym 30502 spi_if_ins.spi.r_rx_byte[7] +.sym 30509 spi_if_ins.spi.r_tx_byte_SB_DFFESR_Q_E +.sym 30510 spi_if_ins.spi.r_rx_byte[6] +.sym 30514 spi_if_ins.spi.r_rx_byte[5] +.sym 30534 spi_if_ins.r_tx_byte[2] +.sym 30538 spi_if_ins.r_tx_byte[6] +.sym 30546 spi_if_ins.r_tx_byte[1] +.sym 30550 spi_if_ins.spi.r_tx_byte[2] +.sym 30551 spi_if_ins.spi.r_tx_byte[6] +.sym 30552 spi_if_ins.spi.r_tx_bit_count[0] +.sym 30553 spi_if_ins.spi.r_tx_bit_count[2] +.sym 30558 spi_if_ins.r_tx_byte[7] +.sym 30564 spi_if_ins.w_rx_data[5] +.sym 30565 spi_if_ins.w_rx_data[6] +.sym 30566 w_cs[2] +.sym 30567 w_cs[1] +.sym 30568 w_cs[3] +.sym 30569 w_cs[0] +.sym 30572 spi_if_ins.w_rx_data[5] +.sym 30573 spi_if_ins.w_rx_data[6] +.sym 30582 w_cs[2] +.sym 30583 w_cs[3] +.sym 30584 w_cs[0] +.sym 30585 w_cs[1] +.sym 30588 spi_if_ins.w_rx_data[6] +.sym 30589 spi_if_ins.w_rx_data[5] +.sym 30592 spi_if_ins.w_rx_data[5] +.sym 30593 spi_if_ins.w_rx_data[6] +.sym 30598 w_tx_data_smi[0] +.sym 30599 spi_if_ins.o_cs_SB_LUT4_I1_O[1] +.sym 30600 spi_if_ins.o_cs_SB_LUT4_I1_O[2] +.sym 30601 w_tx_data_io[0] +.sym 30602 spi_if_ins.w_rx_data[5] +.sym 30610 spi_if_ins.state_if_SB_DFFESR_Q_D[1] +.sym 30622 spi_if_ins.w_rx_data[6] +.sym 30627 i_config_SB_LUT4_I0_I3[2] +.sym 30628 io_ctrl_ins.led1_state_SB_LUT4_I0_O_SB_LUT4_O_I2[3] +.sym 30629 w_ioc[2] +.sym 30630 io_ctrl_ins.led1_state_SB_LUT4_I0_O_SB_LUT4_O_I2[3] +.sym 30631 i_config_SB_LUT4_I0_I3[2] +.sym 30632 w_ioc[2] +.sym 30633 o_tr_vc1$SB_IO_OUT +.sym 30634 o_rx_h_tx_l$SB_IO_OUT +.sym 30635 i_button_SB_LUT4_I0_O[1] +.sym 30636 i_button_SB_LUT4_I0_O[2] +.sym 30637 i_button_SB_LUT4_I0_O[3] +.sym 30639 io_ctrl_ins.tr_vc_1_state_SB_LUT4_I3_O[1] +.sym 30640 i_button_SB_LUT4_I0_O[1] +.sym 30641 i_config_SB_LUT4_I0_I3[3] +.sym 30642 i_config[1]$SB_IO_IN +.sym 30643 io_ctrl_ins.pmod_dir_state[4] +.sym 30644 i_config_SB_LUT4_I0_I3[2] +.sym 30645 i_config_SB_LUT4_I0_I3[3] +.sym 30646 o_rx_h_tx_l_b$SB_IO_OUT +.sym 30647 i_button_SB_LUT4_I0_O[1] +.sym 30648 io_ctrl_ins.rx_h_b_state_SB_LUT4_I0_I2[2] +.sym 30649 io_ctrl_ins.rx_h_b_state_SB_LUT4_I0_I2[3] +.sym 30650 io_ctrl_ins.o_pmod[5] +.sym 30651 io_ctrl_ins.tr_vc_1_state_SB_LUT4_I3_O[1] +.sym 30652 io_ctrl_ins.tr_vc_1_state_SB_LUT4_I3_O[2] +.sym 30653 io_ctrl_ins.tr_vc_1_state_SB_LUT4_I3_O[3] +.sym 30655 i_config_SB_LUT4_I0_I3[2] +.sym 30656 spi_if_ins.o_load_cmd_SB_LUT4_I3_O[1] +.sym 30657 i_config_SB_LUT4_I0_I3[3] +.sym 30658 w_rx_data[7] +.sym 30662 w_rx_data[6] +.sym 30668 io_ctrl_ins.tr_vc_1_state_SB_LUT4_I3_O[1] +.sym 30669 spi_if_ins.o_load_cmd_SB_LUT4_I3_O[1] +.sym 30671 i_config_SB_LUT4_I0_I3[3] +.sym 30672 spi_if_ins.o_load_cmd_SB_LUT4_I3_O[1] +.sym 30673 i_config_SB_LUT4_I0_I3[2] +.sym 30674 w_rx_data[3] +.sym 30678 w_rx_data[0] +.sym 30682 i_config_SB_LUT4_I0_I3[2] +.sym 30683 io_ctrl_ins.led1_state_SB_LUT4_I0_O_SB_LUT4_O_I2[3] +.sym 30684 w_ioc[2] +.sym 30685 io_ctrl_ins.o_pmod[6] +.sym 30686 i_config_SB_LUT4_I0_I3[2] +.sym 30687 io_ctrl_ins.led1_state_SB_LUT4_I0_O_SB_LUT4_O_I2[3] +.sym 30688 w_ioc[2] +.sym 30689 io_ctrl_ins.o_pmod[7] +.sym 30690 w_rx_data[1] +.sym 30694 w_rx_data[3] +.sym 30706 w_rx_data[2] +.sym 30714 w_rx_data[4] +.sym 30718 w_rx_data[0] +.sym 30722 w_rx_data[1] +.sym 30958 spi_if_ins.spi.r_rx_done_SB_DFFER_Q_D[1] +.sym 30983 spi_if_ins.spi.SCKr[2] +.sym 30984 spi_if_ins.spi.SCKr[1] +.sym 30985 spi_if_ins.r_tx_data_valid_SB_LUT4_I3_O[3] +.sym 30986 i_sck$SB_IO_IN +.sym 30997 spi_if_ins.r_tx_data_valid_SB_LUT4_I3_O[3] +.sym 30998 spi_if_ins.spi.SCKr[0] +.sym 31003 spi_if_ins.spi.r_rx_bit_count[0] +.sym 31004 spi_if_ins.spi.r_rx_bit_count[2] +.sym 31005 spi_if_ins.spi.r_rx_bit_count[1] +.sym 31006 spi_if_ins.spi.SCKr[1] +.sym 31011 spi_if_ins.spi.r_tx_bit_count[0] +.sym 31015 spi_if_ins.r_tx_data_valid_SB_LUT4_I3_O_SB_LUT4_O_1_I1[2] +.sym 31016 $PACKER_VCC_NET +.sym 31019 spi_if_ins.spi.r_tx_bit_count[2] +.sym 31020 $PACKER_VCC_NET +.sym 31021 spi_if_ins.spi.r_tx_bit_count_SB_DFFESR_Q_D_SB_LUT4_O_1_I3[2] +.sym 31022 spi_if_ins.spi.SCKr[2] +.sym 31023 spi_if_ins.spi.r_tx_bit_count[0] +.sym 31024 spi_if_ins.spi.r_tx_bit_count[2] +.sym 31025 spi_if_ins.spi.SCKr[1] +.sym 31029 spi_if_ins.spi.r_tx_bit_count[0] +.sym 31031 spi_if_ins.r_tx_data_valid_SB_LUT4_I3_O_SB_LUT4_O_1_I1[2] +.sym 31032 spi_if_ins.spi.SCKr_SB_LUT4_I0_O[1] +.sym 31033 spi_if_ins.r_tx_data_valid_SB_LUT4_I3_O[3] +.sym 31035 spi_if_ins.r_tx_data_valid_SB_LUT4_I3_O_SB_LUT4_O_I1[0] +.sym 31036 spi_if_ins.r_tx_data_valid_SB_LUT4_I3_O_SB_LUT4_O_I1[1] +.sym 31037 spi_if_ins.r_tx_data_valid_SB_LUT4_I3_O_SB_LUT4_O_1_I1[2] +.sym 31039 spi_if_ins.r_tx_data_valid_SB_LUT4_I3_O_SB_LUT4_O_1_I1[2] +.sym 31040 $PACKER_VCC_NET +.sym 31041 spi_if_ins.spi.r_tx_bit_count[0] +.sym 31042 spi_if_ins.r_tx_byte[4] +.sym 31046 spi_if_ins.spi.r_tx_byte[0] +.sym 31047 spi_if_ins.spi.r_tx_byte[4] +.sym 31048 spi_if_ins.spi.r_tx_bit_count[0] +.sym 31049 spi_if_ins.spi.r_tx_bit_count[2] +.sym 31050 spi_if_ins.spi.r_tx_byte[1] +.sym 31051 spi_if_ins.spi.r_tx_byte[5] +.sym 31052 spi_if_ins.spi.r_tx_bit_count[2] +.sym 31053 spi_if_ins.spi.r_tx_bit_count[0] +.sym 31055 spi_if_ins.r_tx_data_valid_SB_LUT4_I3_O_SB_LUT4_O_1_I1[0] +.sym 31056 spi_if_ins.r_tx_data_valid_SB_LUT4_I3_O_SB_LUT4_O_1_I1[1] +.sym 31057 spi_if_ins.r_tx_data_valid_SB_LUT4_I3_O_SB_LUT4_O_1_I1[2] +.sym 31058 spi_if_ins.r_tx_byte[5] +.sym 31062 spi_if_ins.r_tx_byte[0] +.sym 31066 spi_if_ins.r_tx_byte[3] +.sym 31070 spi_if_ins.spi.r_tx_byte[3] +.sym 31071 spi_if_ins.spi.r_tx_byte[7] +.sym 31072 spi_if_ins.spi.r_tx_bit_count[2] +.sym 31073 spi_if_ins.spi.r_tx_bit_count[0] +.sym 31074 r_tx_data[0] +.sym 31078 r_tx_data[1] +.sym 31085 spi_if_ins.r_tx_data_valid_SB_DFFESR_Q_D_SB_LUT4_I3_O +.sym 31086 r_tx_data[6] +.sym 31094 r_tx_data[3] +.sym 31098 r_tx_data[4] +.sym 31102 w_cs[1] +.sym 31103 w_cs[3] +.sym 31104 w_cs[0] +.sym 31105 w_cs[2] +.sym 31106 w_cs[2] +.sym 31107 w_cs[1] +.sym 31108 w_cs[0] +.sym 31109 w_cs[3] +.sym 31112 smi_ctrl_ins.o_data_out_SB_LUT4_I0_2_O[0] +.sym 31113 smi_ctrl_ins.o_data_out_SB_LUT4_I0_2_O[1] +.sym 31118 w_tx_data_smi[1] +.sym 31119 spi_if_ins.o_cs_SB_LUT4_I1_O[1] +.sym 31120 spi_if_ins.o_cs_SB_LUT4_I1_O[2] +.sym 31121 w_tx_data_io[1] +.sym 31125 io_ctrl_ins.o_data_out_SB_DFFESR_Q_6_R +.sym 31128 spi_if_ins.o_cs_SB_LUT4_I1_O[2] +.sym 31129 w_tx_data_io[6] +.sym 31132 spi_if_ins.o_cs_SB_LUT4_I1_O[2] +.sym 31133 w_tx_data_io[4] +.sym 31137 w_tx_data_io[7] +.sym 31146 w_rx_data[5] +.sym 31150 w_rx_data[4] +.sym 31170 w_rx_data[6] +.sym 31174 w_rx_data[5] +.sym 31178 i_config[3]$SB_IO_IN +.sym 31179 io_ctrl_ins.pmod_dir_state[6] +.sym 31180 i_config_SB_LUT4_I0_I3[2] +.sym 31181 i_config_SB_LUT4_I0_I3[3] +.sym 31182 i_config[2]$SB_IO_IN +.sym 31183 io_ctrl_ins.pmod_dir_state[5] +.sym 31184 i_config_SB_LUT4_I0_I3[2] +.sym 31185 i_config_SB_LUT4_I0_I3[3] +.sym 31186 w_rx_data[7] +.sym 31198 i_button$SB_IO_IN +.sym 31199 io_ctrl_ins.pmod_dir_state[7] +.sym 31200 i_config_SB_LUT4_I0_I3[2] +.sym 31201 i_config_SB_LUT4_I0_I3[3] +.sym 31492 i_ss$SB_IO_IN +.sym 31493 spi_if_ins.r_tx_data_valid +.sym 31510 spi_if_ins.r_tx_data_valid_SB_DFFESR_Q_D[1] +.sym 31546 spi_if_ins.r_tx_data_valid_SB_LUT4_I3_O[0] +.sym 31547 spi_if_ins.r_tx_data_valid_SB_LUT4_I3_O[1] +.sym 31548 spi_if_ins.r_tx_byte[7] +.sym 31549 spi_if_ins.r_tx_data_valid_SB_LUT4_I3_O[3] +.sym 31554 r_tx_data[2] +.sym 31558 r_tx_data[5] +.sym 31566 r_tx_data[7] +.sym 31576 spi_if_ins.r_tx_data_valid_SB_DFFESR_Q_D[0] +.sym 31577 spi_if_ins.r_tx_data_valid_SB_DFFESR_Q_D[1] +.sym 31599 spi_if_ins.o_cs_SB_LUT4_I1_O[2] +.sym 31600 w_tx_data_io[2] +.sym 31601 smi_ctrl_ins.o_data_out_SB_LUT4_I0_2_O[0] +.sym 31603 spi_if_ins.o_cs_SB_LUT4_I1_O[2] +.sym 31604 w_tx_data_io[7] +.sym 31605 smi_ctrl_ins.o_data_out_SB_LUT4_I0_2_O[0] +.sym 31607 spi_if_ins.o_cs_SB_LUT4_I1_O[2] +.sym 31608 w_tx_data_io[5] +.sym 31609 smi_ctrl_ins.o_data_out_SB_LUT4_I0_2_O[0] +.sym 31674 spi_if_ins.spi.r_rx_byte[0] diff --git a/firmware/top.bin b/firmware/top.bin index bad0fc1..c00b584 100644 Binary files a/firmware/top.bin and b/firmware/top.bin differ diff --git a/firmware/top.json b/firmware/top.json index 95016c7..2c8ad89 100644 --- a/firmware/top.json +++ b/firmware/top.json @@ -64,7 +64,7 @@ } }, "cells": { - "$specify$245": { + "$specify$248": { "hide_name": 1, "type": "$specify2", "parameters": { @@ -95,7 +95,7 @@ "SRC": [ 6 ] } }, - "$specify$246": { + "$specify$249": { "hide_name": 1, "type": "$specify2", "parameters": { @@ -126,7 +126,7 @@ "SRC": [ 2 ] } }, - "$specify$247": { + "$specify$250": { "hide_name": 1, "type": "$specify2", "parameters": { @@ -157,7 +157,7 @@ "SRC": [ 2 ] } }, - "$specify$248": { + "$specify$251": { "hide_name": 1, "type": "$specify2", "parameters": { @@ -188,7 +188,7 @@ "SRC": [ 3 ] } }, - "$specify$249": { + "$specify$252": { "hide_name": 1, "type": "$specify2", "parameters": { @@ -219,7 +219,7 @@ "SRC": [ 3 ] } }, - "$specify$250": { + "$specify$253": { "hide_name": 1, "type": "$specify2", "parameters": { @@ -250,7 +250,7 @@ "SRC": [ 3 ] } }, - "$specify$251": { + "$specify$254": { "hide_name": 1, "type": "$specify2", "parameters": { @@ -281,7 +281,7 @@ "SRC": [ 4 ] } }, - "$specify$252": { + "$specify$255": { "hide_name": 1, "type": "$specify2", "parameters": { @@ -312,7 +312,7 @@ "SRC": [ 4 ] } }, - "$specify$253": { + "$specify$256": { "hide_name": 1, "type": "$specify2", "parameters": { @@ -343,7 +343,7 @@ "SRC": [ 4 ] } }, - "$specify$254": { + "$specify$257": { "hide_name": 1, "type": "$specify2", "parameters": { @@ -374,7 +374,7 @@ "SRC": [ 5 ] } }, - "$specify$255": { + "$specify$258": { "hide_name": 1, "type": "$specify2", "parameters": { @@ -405,7 +405,7 @@ "SRC": [ 5 ] } }, - "$specify$256": { + "$specify$259": { "hide_name": 1, "type": "$specify3", "parameters": { @@ -442,7 +442,7 @@ "SRC": [ 7 ] } }, - "$specify$257": { + "$specify$260": { "hide_name": 1, "type": "$specify2", "parameters": { @@ -473,7 +473,7 @@ "SRC": [ 9 ] } }, - "$specify$258": { + "$specify$261": { "hide_name": 1, "type": "$specrule", "parameters": { @@ -508,7 +508,7 @@ "SRC_EN": [ "1" ] } }, - "$specify$259": { + "$specify$262": { "hide_name": 1, "type": "$specrule", "parameters": { @@ -543,7 +543,7 @@ "SRC_EN": [ "1" ] } }, - "$specify$260": { + "$specify$263": { "hide_name": 1, "type": "$specrule", "parameters": { @@ -578,7 +578,7 @@ "SRC_EN": [ "1" ] } }, - "$specify$261": { + "$specify$264": { "hide_name": 1, "type": "$specrule", "parameters": { @@ -613,7 +613,7 @@ "SRC_EN": [ "1" ] } }, - "$specify$262": { + "$specify$265": { "hide_name": 1, "type": "$specrule", "parameters": { @@ -648,7 +648,7 @@ "SRC_EN": [ "1" ] } }, - "$specify$263": { + "$specify$266": { "hide_name": 1, "type": "$specrule", "parameters": { @@ -683,7 +683,7 @@ "SRC_EN": [ "1" ] } }, - "$specify$264": { + "$specify$267": { "hide_name": 1, "type": "$specrule", "parameters": { @@ -718,7 +718,7 @@ "SRC_EN": [ "1" ] } }, - "$specify$265": { + "$specify$268": { "hide_name": 1, "type": "$specrule", "parameters": { @@ -753,7 +753,7 @@ "SRC_EN": [ "1" ] } }, - "$specify$266": { + "$specify$269": { "hide_name": 1, "type": "$specrule", "parameters": { @@ -788,7 +788,7 @@ "SRC_EN": [ "1" ] } }, - "$specify$267": { + "$specify$270": { "hide_name": 1, "type": "$specrule", "parameters": { @@ -823,7 +823,7 @@ "SRC_EN": [ "1" ] } }, - "$specify$268": { + "$specify$271": { "hide_name": 1, "type": "$specrule", "parameters": { @@ -858,7 +858,7 @@ "SRC_EN": [ "1" ] } }, - "$specify$269": { + "$specify$272": { "hide_name": 1, "type": "$specrule", "parameters": { @@ -893,7 +893,7 @@ "SRC_EN": [ "1" ] } }, - "$specify$270": { + "$specify$273": { "hide_name": 1, "type": "$specrule", "parameters": { @@ -928,7 +928,7 @@ "SRC_EN": [ "1" ] } }, - "$specify$271": { + "$specify$274": { "hide_name": 1, "type": "$specrule", "parameters": { @@ -963,7 +963,7 @@ "SRC_EN": [ "1" ] } }, - "$specify$272": { + "$specify$275": { "hide_name": 1, "type": "$specrule", "parameters": { @@ -998,7 +998,7 @@ "SRC_EN": [ "1" ] } }, - "$specify$273": { + "$specify$276": { "hide_name": 1, "type": "$specrule", "parameters": { @@ -1033,7 +1033,7 @@ "SRC_EN": [ "1" ] } }, - "$specify$274": { + "$specify$277": { "hide_name": 1, "type": "$specrule", "parameters": { @@ -1068,7 +1068,7 @@ "SRC_EN": [ "1" ] } }, - "$specify$275": { + "$specify$278": { "hide_name": 1, "type": "$specrule", "parameters": { @@ -1103,7 +1103,7 @@ "SRC_EN": [ "1" ] } }, - "$specify$276": { + "$specify$279": { "hide_name": 1, "type": "$specrule", "parameters": { @@ -1138,7 +1138,7 @@ "SRC_EN": [ "1" ] } }, - "$specify$277": { + "$specify$280": { "hide_name": 1, "type": "$specrule", "parameters": { @@ -1173,7 +1173,7 @@ "SRC_EN": [ "1" ] } }, - "$specify$278": { + "$specify$281": { "hide_name": 1, "type": "$specrule", "parameters": { @@ -1208,7 +1208,7 @@ "SRC_EN": [ "1" ] } }, - "$specify$279": { + "$specify$282": { "hide_name": 1, "type": "$specrule", "parameters": { @@ -6389,7 +6389,7 @@ } }, "cells": { - "$logic_and$/usr/local/bin/../share/yosys/ice40/cells_sim.v:1593$364": { + "$logic_and$/usr/local/bin/../share/yosys/ice40/cells_sim.v:1593$367": { "hide_name": 1, "type": "$logic_and", "parameters": { @@ -6413,7 +6413,7 @@ "Y": [ 78 ] } }, - "$logic_and$/usr/local/bin/../share/yosys/ice40/cells_sim.v:1595$365": { + "$logic_and$/usr/local/bin/../share/yosys/ice40/cells_sim.v:1595$368": { "hide_name": 1, "type": "$logic_and", "parameters": { @@ -6437,7 +6437,7 @@ "Y": [ 79 ] } }, - "$logic_and$/usr/local/bin/../share/yosys/ice40/cells_sim.v:1601$366": { + "$logic_and$/usr/local/bin/../share/yosys/ice40/cells_sim.v:1601$369": { "hide_name": 1, "type": "$logic_and", "parameters": { @@ -6461,7 +6461,7 @@ "Y": [ 80 ] } }, - "$logic_and$/usr/local/bin/../share/yosys/ice40/cells_sim.v:1605$367": { + "$logic_and$/usr/local/bin/../share/yosys/ice40/cells_sim.v:1605$370": { "hide_name": 1, "type": "$logic_and", "parameters": { @@ -6485,7 +6485,7 @@ "Y": [ 81 ] } }, - "$specify$209": { + "$specify$212": { "hide_name": 1, "type": "$specrule", "parameters": { @@ -6520,7 +6520,7 @@ "SRC_EN": [ "1" ] } }, - "$specify$210": { + "$specify$213": { "hide_name": 1, "type": "$specrule", "parameters": { @@ -6555,7 +6555,7 @@ "SRC_EN": [ "1" ] } }, - "$specify$211": { + "$specify$214": { "hide_name": 1, "type": "$specrule", "parameters": { @@ -6590,7 +6590,7 @@ "SRC_EN": [ "1" ] } }, - "$specify$212": { + "$specify$215": { "hide_name": 1, "type": "$specrule", "parameters": { @@ -6625,7 +6625,7 @@ "SRC_EN": [ "1" ] } }, - "$specify$213": { + "$specify$216": { "hide_name": 1, "type": "$specrule", "parameters": { @@ -6660,7 +6660,7 @@ "SRC_EN": [ "1" ] } }, - "$specify$214": { + "$specify$217": { "hide_name": 1, "type": "$specrule", "parameters": { @@ -6695,7 +6695,7 @@ "SRC_EN": [ "1" ] } }, - "$specify$215": { + "$specify$218": { "hide_name": 1, "type": "$specrule", "parameters": { @@ -6730,7 +6730,7 @@ "SRC_EN": [ "1" ] } }, - "$specify$216": { + "$specify$219": { "hide_name": 1, "type": "$specrule", "parameters": { @@ -6765,7 +6765,7 @@ "SRC_EN": [ "1" ] } }, - "$specify$217": { + "$specify$220": { "hide_name": 1, "type": "$specify3", "parameters": { @@ -6804,28 +6804,28 @@ } }, "netnames": { - "$logic_and$/usr/local/bin/../share/yosys/ice40/cells_sim.v:1593$364_Y": { + "$logic_and$/usr/local/bin/../share/yosys/ice40/cells_sim.v:1593$367_Y": { "hide_name": 1, "bits": [ 78 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ice40/cells_sim.v:1593.33-1593.44" } }, - "$logic_and$/usr/local/bin/../share/yosys/ice40/cells_sim.v:1595$365_Y": { + "$logic_and$/usr/local/bin/../share/yosys/ice40/cells_sim.v:1595$368_Y": { "hide_name": 1, "bits": [ 79 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ice40/cells_sim.v:1595.34-1595.45" } }, - "$logic_and$/usr/local/bin/../share/yosys/ice40/cells_sim.v:1601$366_Y": { + "$logic_and$/usr/local/bin/../share/yosys/ice40/cells_sim.v:1601$369_Y": { "hide_name": 1, "bits": [ 80 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ice40/cells_sim.v:1601.34-1601.45" } }, - "$logic_and$/usr/local/bin/../share/yosys/ice40/cells_sim.v:1605$367_Y": { + "$logic_and$/usr/local/bin/../share/yosys/ice40/cells_sim.v:1605$370_Y": { "hide_name": 1, "bits": [ 81 ], "attributes": { @@ -6990,7 +6990,7 @@ } }, "cells": { - "$logic_and$/usr/local/bin/../share/yosys/ice40/cells_sim.v:1729$368": { + "$logic_and$/usr/local/bin/../share/yosys/ice40/cells_sim.v:1729$371": { "hide_name": 1, "type": "$logic_and", "parameters": { @@ -7014,7 +7014,7 @@ "Y": [ 78 ] } }, - "$logic_and$/usr/local/bin/../share/yosys/ice40/cells_sim.v:1731$369": { + "$logic_and$/usr/local/bin/../share/yosys/ice40/cells_sim.v:1731$372": { "hide_name": 1, "type": "$logic_and", "parameters": { @@ -7038,7 +7038,7 @@ "Y": [ 79 ] } }, - "$logic_and$/usr/local/bin/../share/yosys/ice40/cells_sim.v:1737$370": { + "$logic_and$/usr/local/bin/../share/yosys/ice40/cells_sim.v:1737$373": { "hide_name": 1, "type": "$logic_and", "parameters": { @@ -7062,7 +7062,7 @@ "Y": [ 80 ] } }, - "$logic_and$/usr/local/bin/../share/yosys/ice40/cells_sim.v:1741$371": { + "$logic_and$/usr/local/bin/../share/yosys/ice40/cells_sim.v:1741$374": { "hide_name": 1, "type": "$logic_and", "parameters": { @@ -7086,7 +7086,7 @@ "Y": [ 81 ] } }, - "$specify$218": { + "$specify$221": { "hide_name": 1, "type": "$specrule", "parameters": { @@ -7121,7 +7121,7 @@ "SRC_EN": [ "1" ] } }, - "$specify$219": { + "$specify$222": { "hide_name": 1, "type": "$specrule", "parameters": { @@ -7156,7 +7156,7 @@ "SRC_EN": [ "1" ] } }, - "$specify$220": { + "$specify$223": { "hide_name": 1, "type": "$specrule", "parameters": { @@ -7191,7 +7191,7 @@ "SRC_EN": [ "1" ] } }, - "$specify$221": { + "$specify$224": { "hide_name": 1, "type": "$specrule", "parameters": { @@ -7226,7 +7226,7 @@ "SRC_EN": [ "1" ] } }, - "$specify$222": { + "$specify$225": { "hide_name": 1, "type": "$specrule", "parameters": { @@ -7261,7 +7261,7 @@ "SRC_EN": [ "1" ] } }, - "$specify$223": { + "$specify$226": { "hide_name": 1, "type": "$specrule", "parameters": { @@ -7296,7 +7296,7 @@ "SRC_EN": [ "1" ] } }, - "$specify$224": { + "$specify$227": { "hide_name": 1, "type": "$specrule", "parameters": { @@ -7331,7 +7331,7 @@ "SRC_EN": [ "1" ] } }, - "$specify$225": { + "$specify$228": { "hide_name": 1, "type": "$specrule", "parameters": { @@ -7366,7 +7366,7 @@ "SRC_EN": [ "1" ] } }, - "$specify$226": { + "$specify$229": { "hide_name": 1, "type": "$specify3", "parameters": { @@ -7405,28 +7405,28 @@ } }, "netnames": { - "$logic_and$/usr/local/bin/../share/yosys/ice40/cells_sim.v:1729$368_Y": { + "$logic_and$/usr/local/bin/../share/yosys/ice40/cells_sim.v:1729$371_Y": { "hide_name": 1, "bits": [ 78 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ice40/cells_sim.v:1729.33-1729.44" } }, - "$logic_and$/usr/local/bin/../share/yosys/ice40/cells_sim.v:1731$369_Y": { + "$logic_and$/usr/local/bin/../share/yosys/ice40/cells_sim.v:1731$372_Y": { "hide_name": 1, "bits": [ 79 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ice40/cells_sim.v:1731.35-1731.46" } }, - "$logic_and$/usr/local/bin/../share/yosys/ice40/cells_sim.v:1737$370_Y": { + "$logic_and$/usr/local/bin/../share/yosys/ice40/cells_sim.v:1737$373_Y": { "hide_name": 1, "bits": [ 80 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ice40/cells_sim.v:1737.34-1737.45" } }, - "$logic_and$/usr/local/bin/../share/yosys/ice40/cells_sim.v:1741$371_Y": { + "$logic_and$/usr/local/bin/../share/yosys/ice40/cells_sim.v:1741$374_Y": { "hide_name": 1, "bits": [ 81 ], "attributes": { @@ -7591,7 +7591,7 @@ } }, "cells": { - "$logic_and$/usr/local/bin/../share/yosys/ice40/cells_sim.v:2001$376": { + "$logic_and$/usr/local/bin/../share/yosys/ice40/cells_sim.v:2001$379": { "hide_name": 1, "type": "$logic_and", "parameters": { @@ -7615,7 +7615,7 @@ "Y": [ 78 ] } }, - "$logic_and$/usr/local/bin/../share/yosys/ice40/cells_sim.v:2003$377": { + "$logic_and$/usr/local/bin/../share/yosys/ice40/cells_sim.v:2003$380": { "hide_name": 1, "type": "$logic_and", "parameters": { @@ -7639,7 +7639,7 @@ "Y": [ 79 ] } }, - "$logic_and$/usr/local/bin/../share/yosys/ice40/cells_sim.v:2009$378": { + "$logic_and$/usr/local/bin/../share/yosys/ice40/cells_sim.v:2009$381": { "hide_name": 1, "type": "$logic_and", "parameters": { @@ -7663,7 +7663,7 @@ "Y": [ 80 ] } }, - "$logic_and$/usr/local/bin/../share/yosys/ice40/cells_sim.v:2013$379": { + "$logic_and$/usr/local/bin/../share/yosys/ice40/cells_sim.v:2013$382": { "hide_name": 1, "type": "$logic_and", "parameters": { @@ -7687,7 +7687,7 @@ "Y": [ 81 ] } }, - "$specify$236": { + "$specify$239": { "hide_name": 1, "type": "$specrule", "parameters": { @@ -7722,7 +7722,7 @@ "SRC_EN": [ "1" ] } }, - "$specify$237": { + "$specify$240": { "hide_name": 1, "type": "$specrule", "parameters": { @@ -7757,7 +7757,7 @@ "SRC_EN": [ "1" ] } }, - "$specify$238": { + "$specify$241": { "hide_name": 1, "type": "$specrule", "parameters": { @@ -7792,7 +7792,7 @@ "SRC_EN": [ "1" ] } }, - "$specify$239": { + "$specify$242": { "hide_name": 1, "type": "$specrule", "parameters": { @@ -7827,7 +7827,7 @@ "SRC_EN": [ "1" ] } }, - "$specify$240": { + "$specify$243": { "hide_name": 1, "type": "$specrule", "parameters": { @@ -7862,7 +7862,7 @@ "SRC_EN": [ "1" ] } }, - "$specify$241": { + "$specify$244": { "hide_name": 1, "type": "$specrule", "parameters": { @@ -7897,7 +7897,7 @@ "SRC_EN": [ "1" ] } }, - "$specify$242": { + "$specify$245": { "hide_name": 1, "type": "$specrule", "parameters": { @@ -7932,7 +7932,7 @@ "SRC_EN": [ "1" ] } }, - "$specify$243": { + "$specify$246": { "hide_name": 1, "type": "$specrule", "parameters": { @@ -7967,7 +7967,7 @@ "SRC_EN": [ "1" ] } }, - "$specify$244": { + "$specify$247": { "hide_name": 1, "type": "$specify3", "parameters": { @@ -8006,28 +8006,28 @@ } }, "netnames": { - "$logic_and$/usr/local/bin/../share/yosys/ice40/cells_sim.v:2001$376_Y": { + "$logic_and$/usr/local/bin/../share/yosys/ice40/cells_sim.v:2001$379_Y": { "hide_name": 1, "bits": [ 78 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ice40/cells_sim.v:2001.34-2001.45" } }, - "$logic_and$/usr/local/bin/../share/yosys/ice40/cells_sim.v:2003$377_Y": { + "$logic_and$/usr/local/bin/../share/yosys/ice40/cells_sim.v:2003$380_Y": { "hide_name": 1, "bits": [ 79 ], "attributes": { "src": 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"type": "$logic_and", "parameters": { @@ -8240,7 +8240,7 @@ "Y": [ 79 ] } }, - "$logic_and$/usr/local/bin/../share/yosys/ice40/cells_sim.v:1873$374": { + "$logic_and$/usr/local/bin/../share/yosys/ice40/cells_sim.v:1873$377": { "hide_name": 1, "type": "$logic_and", "parameters": { @@ -8264,7 +8264,7 @@ "Y": [ 80 ] } }, - "$logic_and$/usr/local/bin/../share/yosys/ice40/cells_sim.v:1877$375": { + "$logic_and$/usr/local/bin/../share/yosys/ice40/cells_sim.v:1877$378": { "hide_name": 1, "type": "$logic_and", "parameters": { @@ -8288,7 +8288,7 @@ "Y": [ 81 ] } }, - "$specify$227": { + "$specify$230": { "hide_name": 1, "type": "$specrule", "parameters": { @@ -8323,7 +8323,7 @@ "SRC_EN": [ "1" ] } }, - "$specify$228": { + "$specify$231": { "hide_name": 1, "type": "$specrule", "parameters": { @@ -8358,7 +8358,7 @@ "SRC_EN": [ "1" ] } }, - "$specify$229": { + "$specify$232": { "hide_name": 1, "type": "$specrule", "parameters": { @@ -8393,7 +8393,7 @@ "SRC_EN": [ "1" ] } }, - "$specify$230": { + "$specify$233": { "hide_name": 1, "type": "$specrule", "parameters": { @@ -8428,7 +8428,7 @@ "SRC_EN": [ "1" ] } }, - "$specify$231": { + "$specify$234": { "hide_name": 1, "type": "$specrule", "parameters": { @@ -8463,7 +8463,7 @@ "SRC_EN": [ "1" ] } }, - "$specify$232": { + "$specify$235": { "hide_name": 1, "type": "$specrule", "parameters": { @@ -8498,7 +8498,7 @@ "SRC_EN": [ "1" ] } }, - "$specify$233": { + "$specify$236": { "hide_name": 1, "type": "$specrule", "parameters": { @@ -8533,7 +8533,7 @@ "SRC_EN": [ "1" ] } }, - "$specify$234": { + "$specify$237": { "hide_name": 1, "type": "$specrule", "parameters": { @@ -8568,7 +8568,7 @@ "SRC_EN": [ "1" ] } }, - "$specify$235": { + "$specify$238": { "hide_name": 1, "type": "$specify3", "parameters": { @@ -8607,28 +8607,28 @@ } }, "netnames": { - "$logic_and$/usr/local/bin/../share/yosys/ice40/cells_sim.v:1865$372_Y": { + "$logic_and$/usr/local/bin/../share/yosys/ice40/cells_sim.v:1865$375_Y": { "hide_name": 1, "bits": [ 78 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ice40/cells_sim.v:1865.34-1865.45" } }, - "$logic_and$/usr/local/bin/../share/yosys/ice40/cells_sim.v:1867$373_Y": { + "$logic_and$/usr/local/bin/../share/yosys/ice40/cells_sim.v:1867$376_Y": { "hide_name": 1, "bits": [ 79 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ice40/cells_sim.v:1867.34-1867.45" } }, - "$logic_and$/usr/local/bin/../share/yosys/ice40/cells_sim.v:1873$374_Y": { + "$logic_and$/usr/local/bin/../share/yosys/ice40/cells_sim.v:1873$377_Y": { "hide_name": 1, "bits": [ 80 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ice40/cells_sim.v:1873.35-1873.46" } }, - "$logic_and$/usr/local/bin/../share/yosys/ice40/cells_sim.v:1877$375_Y": { + "$logic_and$/usr/local/bin/../share/yosys/ice40/cells_sim.v:1877$378_Y": { "hide_name": 1, "bits": [ 81 ], "attributes": { @@ -9650,7 +9650,7 @@ "top": { "attributes": { "top": "00000000000000000000000000000001", - "src": "top.v:8.1-342.10" + "src": "top.v:8.1-341.10" }, "ports": { "i_glob_clock": { @@ -9743,7 +9743,7 @@ }, "io_pmod": { "direction": "output", - "bits": [ "0", "0", "x", "0", "x", 20, 21, 22 ] + "bits": [ "x", "0", "1", "0", "x", 20, 21, 22 ] }, "o_led0": { "direction": "output", @@ -9795,11 +9795,11 @@ } }, "cells": { - "i_button_SB_LUT4_I3": { + "i_button_SB_LUT4_I0": { "hide_name": 0, "type": "SB_LUT4", "parameters": { - "LUT_INIT": "0000011101110111" + "LUT_INIT": "0011010111111111" }, "attributes": { "module_not_derived": "00000000000000000000000000000001", @@ -9813,18 +9813,18 @@ "O": "output" }, "connections": { - "I0": [ 34 ], - "I1": [ 35 ], - "I2": [ 36 ], - "I3": [ 18 ], + "I0": [ 18 ], + "I1": [ 34 ], + "I2": [ 35 ], + "I3": [ 36 ], "O": [ 37 ] } }, - "i_config_SB_LUT4_I3": { + "i_button_SB_LUT4_I0_O_SB_LUT4_O": { "hide_name": 0, "type": "SB_LUT4", "parameters": { - "LUT_INIT": "0000011101110111" + "LUT_INIT": "0100000000000000" }, "attributes": { "module_not_derived": "00000000000000000000000000000001", @@ -9838,72 +9838,22 @@ "O": "output" }, "connections": { - "I0": [ 38 ], - "I1": [ 39 ], - "I2": [ 36 ], - "I3": [ 14 ], - "O": [ 40 ] + "I0": [ 35 ], + "I1": [ 38 ], + "I2": [ 39 ], + "I3": [ 40 ], + "O": [ 41 ] } }, - "i_config_SB_LUT4_I3_1": { + "i_button_SB_LUT4_I0_O_SB_LUT4_O_1": { "hide_name": 0, "type": "SB_LUT4", "parameters": { - "LUT_INIT": "0000011101110111" + "LUT_INIT": "1100000000000000" }, "attributes": { "module_not_derived": "00000000000000000000000000000001", - "src": "/usr/local/bin/../share/yosys/ice40/cells_map.v:26.33-27.52" - }, - "port_directions": { - "I0": "input", - "I1": "input", - "I2": "input", - "I3": "input", - "O": "output" - }, - "connections": { - "I0": [ 41 ], - "I1": [ 39 ], - "I2": [ 36 ], - "I3": [ 15 ], - "O": [ 42 ] - } - }, - "i_config_SB_LUT4_I3_O_SB_LUT4_O": { - "hide_name": 0, - "type": "SB_LUT4", - "parameters": { - "LUT_INIT": "0000011101110111" - }, - "attributes": { - "module_not_derived": "00000000000000000000000000000001", - "src": "/usr/local/bin/../share/yosys/ice40/cells_map.v:26.33-27.52" - }, - "port_directions": { - "I0": "input", - "I1": "input", - "I2": "input", - "I3": "input", - "O": "output" - }, - "connections": { - "I0": [ 43 ], - "I1": [ 44 ], - "I2": [ 35 ], - "I3": [ 45 ], - "O": [ 46 ] - } - }, - "i_config_SB_LUT4_I3_O_SB_LUT4_O_1": { - "hide_name": 0, - "type": "SB_LUT4", - "parameters": { - "LUT_INIT": "1111000000000000" - }, - "attributes": { - "module_not_derived": "00000000000000000000000000000001", - "src": "/usr/local/bin/../share/yosys/ice40/cells_map.v:17.34-18.52" + "src": "/usr/local/bin/../share/yosys/ice40/cells_map.v:22.34-23.52" }, "port_directions": { "I0": "input", @@ -9914,13 +9864,88 @@ }, "connections": { "I0": [ "0" ], - "I1": [ "0" ], - "I2": [ 47 ], - "I3": [ 48 ], - "O": [ 49 ] + "I1": [ 38 ], + "I2": [ 35 ], + "I3": [ 39 ], + "O": [ 42 ] } }, - "i_config_SB_LUT4_I3_O_SB_LUT4_O_1_I2_SB_LUT4_O": { + "i_config_SB_LUT4_I0": { + "hide_name": 0, + "type": "SB_LUT4", + "parameters": { + "LUT_INIT": "0011010111111111" + }, + "attributes": { + "module_not_derived": "00000000000000000000000000000001", + "src": "/usr/local/bin/../share/yosys/ice40/cells_map.v:26.33-27.52" + }, + "port_directions": { + "I0": "input", + "I1": "input", + "I2": "input", + "I3": "input", + "O": "output" + }, + "connections": { + "I0": [ 14 ], + "I1": [ 43 ], + "I2": [ 35 ], + "I3": [ 36 ], + "O": [ 44 ] + } + }, + "i_config_SB_LUT4_I0_1": { + "hide_name": 0, + "type": "SB_LUT4", + "parameters": { + "LUT_INIT": "0011010111111111" + }, + "attributes": { + "module_not_derived": "00000000000000000000000000000001", + "src": "/usr/local/bin/../share/yosys/ice40/cells_map.v:26.33-27.52" + }, + "port_directions": { + "I0": "input", + "I1": "input", + "I2": "input", + "I3": "input", + "O": "output" + }, + "connections": { + "I0": [ 15 ], + "I1": [ 45 ], + "I2": [ 35 ], + "I3": [ 36 ], + "O": [ 46 ] + } + }, + "i_config_SB_LUT4_I0_2": { + "hide_name": 0, + "type": "SB_LUT4", + "parameters": { + "LUT_INIT": "0011010111111111" + }, + "attributes": { + "module_not_derived": "00000000000000000000000000000001", + "src": "/usr/local/bin/../share/yosys/ice40/cells_map.v:26.33-27.52" + }, + "port_directions": { + "I0": "input", + "I1": "input", + "I2": "input", + "I3": "input", + "O": "output" + }, + "connections": { + "I0": [ 17 ], + "I1": [ 47 ], + "I2": [ 35 ], + "I3": [ 36 ], + "O": [ 48 ] + } + }, + "i_config_SB_LUT4_I0_I3_SB_LUT4_O": { "hide_name": 0, "type": "SB_LUT4", "parameters": { @@ -9938,36 +9963,11 @@ "O": "output" }, "connections": { - "I0": [ 50 ], - "I1": [ 51 ], - "I2": [ 52 ], - "I3": [ 53 ], - "O": [ 47 ] - } - }, - "i_config_SB_LUT4_I3_O_SB_LUT4_O_I0_SB_LUT4_O": { - "hide_name": 0, - "type": "SB_LUT4", - "parameters": { - "LUT_INIT": "0000111100000000" - }, - "attributes": { - "module_not_derived": "00000000000000000000000000000001", - "src": "/usr/local/bin/../share/yosys/ice40/cells_map.v:17.34-18.52" - }, - "port_directions": { - "I0": "input", - "I1": "input", - "I2": "input", - "I3": "input", - "O": "output" - }, - "connections": { - "I0": [ "0" ], - "I1": [ "0" ], - "I2": [ 48 ], - "I3": [ 47 ], - "O": [ 43 ] + "I0": [ 39 ], + "I1": [ 49 ], + "I2": [ 50 ], + "I3": [ 51 ], + "O": [ 36 ] } }, "i_ss_SB_LUT4_I3": { @@ -9992,7 +9992,7 @@ "I1": [ "0" ], "I2": [ "0" ], "I3": [ 32 ], - "O": [ 54 ] + "O": [ 52 ] } }, "io_ctrl_ins.debug_mode_SB_DFFE_Q": { @@ -10011,10 +10011,10 @@ "Q": "output" }, "connections": { - "C": [ 55 ], - "D": [ 56 ], - "E": [ 57 ], - "Q": [ 58 ] + "C": [ 53 ], + "D": [ 54 ], + "E": [ 55 ], + "Q": [ 56 ] } }, "io_ctrl_ins.debug_mode_SB_DFFE_Q_1": { @@ -10033,10 +10033,10 @@ "Q": "output" }, "connections": { - "C": [ 55 ], - "D": [ 59 ], - "E": [ 57 ], - "Q": [ 60 ] + "C": [ 53 ], + "D": [ 57 ], + "E": [ 55 ], + "Q": [ 58 ] } }, "io_ctrl_ins.debug_mode_SB_LUT4_I0": { @@ -10057,10 +10057,10 @@ "O": "output" }, "connections": { - "I0": [ 60 ], - "I1": [ 38 ], - "I2": [ 41 ], - "I3": [ 58 ], + "I0": [ 58 ], + "I1": [ 59 ], + "I2": [ 60 ], + "I3": [ 56 ], "O": [ 61 ] } }, @@ -10084,36 +10084,11 @@ "connections": { "I0": [ "0" ], "I1": [ "0" ], - "I2": [ 60 ], - "I3": [ 58 ], + "I2": [ 58 ], + "I3": [ 56 ], "O": [ 62 ] } }, - "io_ctrl_ins.debug_mode_SB_LUT4_I2_O_SB_LUT4_O": { - "hide_name": 0, - "type": "SB_LUT4", - "parameters": { - "LUT_INIT": "0000000000001111" - }, - "attributes": { - "module_not_derived": "00000000000000000000000000000001", - "src": "/usr/local/bin/../share/yosys/ice40/cells_map.v:17.34-18.52" - }, - "port_directions": { - "I0": "input", - "I1": "input", - "I2": "input", - "I3": "input", - "O": "output" - }, - "connections": { - "I0": [ "0" ], - "I1": [ "0" ], - "I2": [ 63 ], - "I3": [ 41 ], - "O": [ 64 ] - } - }, "io_ctrl_ins.i_cs_SB_DFFESR_Q": { "hide_name": 0, "type": "SB_DFFESR", @@ -10131,11 +10106,11 @@ "R": "input" }, "connections": { - "C": [ 55 ], - "D": [ 65 ], - "E": [ 66 ], - "Q": [ 67 ], - "R": [ 68 ] + "C": [ 53 ], + "D": [ 63 ], + "E": [ 64 ], + "Q": [ 65 ], + "R": [ 66 ] } }, "io_ctrl_ins.i_sys_clk_SB_DFF_Q": { @@ -10154,8 +10129,8 @@ }, "connections": { "C": [ 2 ], - "D": [ 69 ], - "Q": [ 55 ] + "D": [ 67 ], + "Q": [ 53 ] } }, "io_ctrl_ins.i_sys_clk_SB_DFF_Q_D_SB_LUT4_O": { @@ -10179,8 +10154,8 @@ "I0": [ "0" ], "I1": [ "0" ], "I2": [ "0" ], - "I3": [ 55 ], - "O": [ 69 ] + "I3": [ 53 ], + "O": [ 67 ] } }, "io_ctrl_ins.ldo2v8_state_SB_DFFE_Q": { @@ -10199,38 +10174,13 @@ "Q": "output" }, "connections": { - "C": [ 55 ], - "D": [ 70 ], - "E": [ 71 ], + "C": [ 53 ], + "D": [ 68 ], + "E": [ 69 ], "Q": [ 19 ] } }, - "io_ctrl_ins.ldo2v8_state_SB_LUT4_I3": { - "hide_name": 0, - "type": "SB_LUT4", - "parameters": { - "LUT_INIT": "0000011101110111" - }, - "attributes": { - "module_not_derived": "00000000000000000000000000000001", - "src": "/usr/local/bin/../share/yosys/ice40/cells_map.v:26.33-27.52" - }, - "port_directions": { - "I0": "input", - "I1": "input", - "I2": "input", - "I3": "input", - "O": "output" - }, - "connections": { - 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"connections": { - "I0": [ 200 ], - "I1": [ 67 ], - "I2": [ 211 ], - "I3": [ 214 ], - "O": [ 181 ] + "I0": [ 201 ], + "I1": [ 65 ], + "I2": [ 212 ], + "I3": [ 215 ], + "O": [ 182 ] } }, "spi_if_ins.o_cs_SB_LUT4_I2_1": { @@ -13587,11 +13587,11 @@ "O": "output" }, "connections": { - "I0": [ 200 ], - "I1": [ 67 ], - "I2": [ 211 ], - "I3": [ 214 ], - "O": [ 183 ] + "I0": [ 201 ], + "I1": [ 65 ], + "I2": [ 212 ], + "I3": [ 215 ], + "O": [ 184 ] } }, "spi_if_ins.o_cs_SB_LUT4_I3": { @@ -13612,11 +13612,11 @@ "O": "output" }, "connections": { - "I0": [ 200 ], - "I1": [ 67 ], - "I2": [ 214 ], - "I3": [ 211 ], - "O": [ 209 ] + "I0": [ 201 ], + "I1": [ 65 ], + "I2": [ 215 ], + "I3": [ 212 ], + "O": [ 210 ] } }, "spi_if_ins.o_data_in_SB_DFFE_Q": { @@ -13635,10 +13635,10 @@ "Q": "output" }, "connections": { - "C": [ 55 ], - "D": [ 215 ], - "E": [ 216 ], - "Q": [ 121 ] + "C": [ 53 ], + "D": [ 216 ], + "E": [ 217 ], + "Q": [ 122 ] } }, "spi_if_ins.o_data_in_SB_DFFE_Q_1": { @@ -13657,10 +13657,10 @@ "Q": "output" }, "connections": { - "C": [ 55 ], - "D": [ 212 ], - "E": [ 216 ], - "Q": [ 123 ] + "C": [ 53 ], + "D": [ 213 ], + "E": [ 217 ], + "Q": [ 124 ] } }, "spi_if_ins.o_data_in_SB_DFFE_Q_2": { @@ -13679,9 +13679,9 @@ "Q": "output" }, "connections": { - "C": [ 55 ], - "D": [ 213 ], - "E": [ 216 ], + "C": [ 53 ], + "D": [ 214 ], + "E": [ 217 ], "Q": [ 125 ] } }, @@ -13701,9 +13701,9 @@ "Q": "output" }, "connections": { - "C": [ 55 ], - "D": [ 217 ], - "E": [ 216 ], + "C": [ 53 ], + "D": [ 218 ], + "E": [ 217 ], "Q": [ 127 ] } }, @@ -13723,10 +13723,10 @@ "Q": "output" }, "connections": { - "C": [ 55 ], - "D": [ 218 ], - "E": [ 216 ], - "Q": [ 129 ] + "C": [ 53 ], + "D": [ 219 ], + "E": [ 217 ], + "Q": [ 128 ] } }, "spi_if_ins.o_data_in_SB_DFFE_Q_5": { @@ -13745,10 +13745,10 @@ "Q": "output" }, "connections": { - "C": [ 55 ], - "D": [ 219 ], - "E": [ 216 ], - "Q": [ 70 ] + "C": [ 53 ], + "D": [ 220 ], + "E": [ 217 ], + "Q": [ 68 ] } }, "spi_if_ins.o_data_in_SB_DFFE_Q_6": { @@ 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@@ -13864,20 +13864,20 @@ "connections": { "I0": [ "0" ], "I1": [ "0" ], - "I2": [ 229 ], - "I3": [ 222 ], - "O": [ 226 ] + "I2": [ 230 ], + "I3": [ 223 ], + "O": [ 227 ] } }, "spi_if_ins.o_fetch_cmd_SB_DFFESR_Q_E_SB_LUT4_O": { "hide_name": 0, "type": "SB_LUT4", "parameters": { - "LUT_INIT": "1100111100000000" + "LUT_INIT": "0000111100000000" }, "attributes": { "module_not_derived": "00000000000000000000000000000001", - "src": "/usr/local/bin/../share/yosys/ice40/cells_map.v:22.34-23.52" + "src": "/usr/local/bin/../share/yosys/ice40/cells_map.v:17.34-18.52" }, "port_directions": { "I0": "input", @@ -13888,10 +13888,35 @@ }, "connections": { "I0": [ "0" ], - "I1": [ 225 ], - "I2": [ 230 ], - "I3": [ 231 ], - "O": [ 227 ] + "I1": [ "0" ], + "I2": [ 231 ], + "I3": [ 232 ], + "O": [ 228 ] + } + }, + "spi_if_ins.o_fetch_cmd_SB_LUT4_I3": { + "hide_name": 0, + "type": "SB_LUT4", + "parameters": { + "LUT_INIT": "1110000000000000" + }, + "attributes": { + "module_not_derived": "00000000000000000000000000000001", + "src": "/usr/local/bin/../share/yosys/ice40/cells_map.v:26.33-27.52" + }, + "port_directions": { + "I0": "input", + "I1": "input", + "I2": "input", + "I3": "input", + "O": "output" + }, + "connections": { + "I0": [ 36 ], + "I1": [ 38 ], + "I2": [ 65 ], + "I3": [ 119 ], + "O": [ 95 ] } }, "spi_if_ins.o_ioc_SB_DFFE_Q": { @@ -13910,10 +13935,10 @@ "Q": "output" }, "connections": { - "C": [ 55 ], - "D": [ 217 ], - "E": [ 66 ], - "Q": [ 51 ] + "C": [ 53 ], + "D": [ 218 ], + "E": [ 64 ], + "Q": [ 49 ] } }, "spi_if_ins.o_ioc_SB_DFFE_Q_1": { @@ -13932,10 +13957,10 @@ "Q": "output" }, "connections": { - "C": [ 55 ], - "D": [ 218 ], - "E": [ 66 ], - "Q": [ 52 ] + "C": [ 53 ], + "D": [ 219 ], + "E": [ 64 ], + "Q": [ 50 ] } }, "spi_if_ins.o_ioc_SB_DFFE_Q_2": { @@ -13954,10 +13979,10 @@ "Q": "output" }, "connections": { - "C": [ 55 ], - "D": [ 219 ], - "E": [ 66 ], - "Q": [ 53 ] + "C": [ 53 ], + "D": [ 220 ], + "E": [ 64 ], + "Q": [ 39 ] } }, "spi_if_ins.o_ioc_SB_DFFE_Q_3": { @@ -13976,10 +14001,10 @@ "Q": "output" }, "connections": { - "C": [ 55 ], - "D": [ 220 ], - "E": [ 66 ], - "Q": [ 50 ] + "C": [ 53 ], + "D": [ 221 ], + "E": [ 64 ], + "Q": [ 51 ] } }, "spi_if_ins.o_ioc_SB_DFFE_Q_4": { @@ -13998,10 +14023,10 @@ "Q": "output" }, "connections": { - "C": [ 55 ], - "D": [ 221 ], - "E": [ 66 ], - "Q": [ 48 ] + "C": [ 53 ], + "D": [ 222 ], + "E": [ 64 ], + "Q": [ 35 ] } }, "spi_if_ins.o_load_cmd_SB_DFFESR_Q": { @@ -14021,11 +14046,11 @@ "R": "input" }, "connections": { - "C": [ 55 ], - "D": [ 229 ], - "E": [ 232 ], - "Q": [ 76 ], - "R": [ 228 ] + "C": [ 53 ], + "D": [ 230 ], + "E": [ 233 ], + "Q": [ 234 ], + "R": [ 229 ] } }, "spi_if_ins.o_load_cmd_SB_DFFESR_Q_D_SB_LUT4_I1": { @@ -14047,35 +14072,10 @@ }, "connections": { "I0": [ "0" ], - "I1": [ 229 ], - "I2": [ 222 ], - "I3": [ 225 ], - "O": [ 66 ] - } - }, - "spi_if_ins.o_load_cmd_SB_DFFESR_Q_D_SB_LUT4_I2": { - "hide_name": 0, - "type": "SB_LUT4", - "parameters": { - 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- "E": [ 305 ], - "Q": [ 222 ], - "R": [ 225 ] + "C": [ 53 ], + "D": [ 308 ], + "E": [ 307 ], + "Q": [ 223 ], + "R": [ 224 ] + } + }, + "spi_if_ins.state_if_SB_DFFESR_Q_1_D_SB_LUT4_I3": { + "hide_name": 0, + "type": "SB_LUT4", + "parameters": { + "LUT_INIT": "0000111100000000" + }, + "attributes": { + "module_not_derived": "00000000000000000000000000000001", + "src": "/usr/local/bin/../share/yosys/ice40/cells_map.v:17.34-18.52" + }, + "port_directions": { + "I0": "input", + "I1": "input", + "I2": "input", + "I3": "input", + "O": "output" + }, + "connections": { + "I0": [ "0" ], + "I1": [ "0" ], + "I2": [ 224 ], + "I3": [ 308 ], + "O": [ 231 ] + } + }, + "spi_if_ins.state_if_SB_DFFESR_Q_1_D_SB_LUT4_I3_O_SB_LUT4_O": { + "hide_name": 0, + "type": "SB_LUT4", + "parameters": { + "LUT_INIT": "0000101111111111" + }, + "attributes": { + "module_not_derived": "00000000000000000000000000000001", + "src": "/usr/local/bin/../share/yosys/ice40/cells_map.v:26.33-27.52" + }, + "port_directions": { + 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224 ], + "O": [ 229 ] } }, "spi_if_ins.state_if_SB_DFFE_Q": { @@ -16236,10 +16286,10 @@ "Q": "output" }, "connections": { - "C": [ 55 ], - "D": [ 306 ], - "E": [ 305 ], - "Q": [ 223 ] + "C": [ 53 ], + "D": [ 309 ], + "E": [ 307 ], + "Q": [ 226 ] } }, "spi_if_ins.state_if_SB_DFFE_Q_D_SB_LUT4_O": { @@ -16260,11 +16310,11 @@ "O": "output" }, "connections": { - "I0": [ 304 ], - "I1": [ 215 ], - "I2": [ 230 ], - "I3": [ 225 ], - "O": [ 306 ] + "I0": [ 306 ], + "I1": [ 216 ], + "I2": [ 308 ], + "I3": [ 224 ], + "O": [ 309 ] } }, "spi_if_ins.state_if_SB_DFFE_Q_E_SB_LUT4_O": { @@ -16285,11 +16335,11 @@ "O": "output" }, "connections": { - "I0": [ 222 ], - "I1": [ 225 ], - "I2": [ 223 ], - "I3": [ 224 ], - "O": [ 305 ] + "I0": [ 223 ], + "I1": [ 224 ], + "I2": [ 225 ], + "I3": [ 226 ], + "O": [ 307 ] } }, "sys_ctrl_ins.i_cs_SB_DFFE_Q": { @@ -16308,10 +16358,10 @@ "Q": "output" }, "connections": { - "C": [ 55 ], - "D": [ 68 ], - "E": [ 66 ], - "Q": [ 214 ] + "C": [ 53 ], + "D": [ 66 ], + "E": [ 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"type": "SB_LUT4", + "parameters": { + "LUT_INIT": "1111000000000000" + }, + "attributes": { + "module_not_derived": "00000000000000000000000000000001", + "src": "/usr/local/bin/../share/yosys/ice40/cells_map.v:17.34-18.52" + }, + "port_directions": { + "I0": "input", + "I1": "input", + "I2": "input", + "I3": "input", + "O": "output" + }, + "connections": { + "I0": [ "0" ], + "I1": [ "0" ], + "I2": [ 172 ], + "I3": [ 169 ], + "O": [ 176 ] } }, "w_lvds_rx_09_d1_SB_LUT4_I3": { @@ -16407,110 +16581,11 @@ "O": "output" }, "connections": { - "I0": [ 173 ], - "I1": [ 172 ], - "I2": [ 175 ], - "I3": [ 149 ], - "O": [ 152 ] - } - }, - "w_lvds_rx_09_d1_SB_LUT4_I3_I2_SB_LUT4_O": { - "hide_name": 0, - "type": "SB_LUT4", - "parameters": { - "LUT_INIT": "0111111100000000" - }, - "attributes": { - "module_not_derived": "00000000000000000000000000000001", - "src": "/usr/local/bin/../share/yosys/ice40/cells_map.v:26.33-27.52" - }, - "port_directions": { - "I0": "input", - "I1": "input", - "I2": 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"I0": [ "0" ], "I1": [ "0" ], - "I2": [ 155 ], - "I3": [ 20 ], - "O": [ 160 ] + "I2": [ 156 ], + "I3": [ 155 ], + "O": [ 159 ] } }, "w_lvds_rx_09_d1_SB_LUT4_I3_O_SB_LUT4_O_1": { @@ -16558,9 +16633,9 @@ "connections": { "I0": [ "0" ], "I1": [ "0" ], - "I2": [ 155 ], - "I3": [ 157 ], - "O": [ 159 ] + "I2": [ 156 ], + "I3": [ 20 ], + "O": [ 161 ] } }, "w_lvds_rx_09_d1_SB_LUT4_I3_O_SB_LUT4_O_2": { @@ -16583,9 +16658,9 @@ "connections": { "I0": [ "0" ], "I1": [ "0" ], - "I2": [ 155 ], - "I3": [ 154 ], - "O": [ 158 ] + "I2": [ 156 ], + "I3": [ 158 ], + "O": [ 160 ] } } }, @@ -16597,9 +16672,9 @@ "src": "top.v:42.13-42.21" } }, - "i_button_SB_LUT4_I3_O": { + "i_button_SB_LUT4_I0_O": { "hide_name": 0, - "bits": [ 37, 116 ], + "bits": [ 3, 42, 41, 37 ], "attributes": { "force_downto": "00000000000000000000000000000001", "src": "/usr/local/bin/../share/yosys/ice40/cells_map.v:6.21-6.22" @@ -16612,34 +16687,9 @@ "src": "top.v:41.19-41.27" } }, - "i_config_SB_LUT4_I3_I1": { + "i_config_SB_LUT4_I0_I3": { "hide_name": 0, - "bits": [ 308, 309, 310, 311, 39 ], - "attributes": { - "force_downto": "00000000000000000000000000000001", - "src": "top.v:125.12-154.5|io_ctrl.v:130.17-170.24|io_ctrl.v:0.0-0.0|/usr/local/bin/../share/yosys/techmap.v:573.22-573.23", - "unused_bits": "0 1 2 3" - } - }, - "i_config_SB_LUT4_I3_O": { - "hide_name": 0, - "bits": [ 7, 49, 40, 46 ], - "attributes": { - "force_downto": "00000000000000000000000000000001", - "src": "/usr/local/bin/../share/yosys/ice40/cells_map.v:6.21-6.22" - } - }, - "i_config_SB_LUT4_I3_O_SB_LUT4_O_1_I2": { - "hide_name": 0, - "bits": [ 48, 47 ], - "attributes": { - "force_downto": "00000000000000000000000000000001", - "src": "/usr/local/bin/../share/yosys/ice40/cells_map.v:6.21-6.22" - } - }, - "i_config_SB_LUT4_I3_O_SB_LUT4_O_I0": { - "hide_name": 0, - "bits": [ 75, 67, 43, 76 ], + "bits": [ 19, 70, 35, 36 ], "attributes": { "force_downto": "00000000000000000000000000000001", "src": "/usr/local/bin/../share/yosys/ice40/cells_map.v:6.21-6.22" @@ -16745,27 +16795,19 @@ }, "int_miso": { "hide_name": 0, - "bits": [ 179 ], + "bits": [ 180 ], "attributes": { "src": "top.v:110.9-110.17" } }, "io_ctrl_ins.debug_mode": { "hide_name": 0, - "bits": [ 60, 58 ], + "bits": [ 58, 56 ], "attributes": { "hdlname": "io_ctrl_ins debug_mode", "src": "top.v:125.12-154.5|io_ctrl.v:68.17-68.27" } }, - "io_ctrl_ins.debug_mode_SB_LUT4_I2_O": { - "hide_name": 0, - "bits": [ 64, 38, 139, 62 ], - "attributes": { - "force_downto": "00000000000000000000000000000001", - "src": "/usr/local/bin/../share/yosys/ice40/cells_map.v:6.21-6.22" - } - }, "io_ctrl_ins.i_button": { "hide_name": 0, "bits": [ 18 ], @@ -16784,7 +16826,7 @@ }, "io_ctrl_ins.i_cs": { "hide_name": 0, - "bits": [ 67 ], + "bits": [ 65 ], "attributes": { "hdlname": "io_ctrl_ins i_cs", "src": "top.v:125.12-154.5|io_ctrl.v:9.29-9.33" @@ -16792,7 +16834,7 @@ }, "io_ctrl_ins.i_data_in": { "hide_name": 0, - "bits": [ 59, 56, 70, 129, 127, 125, 123, 121 ], + "bits": [ 57, 54, 68, 128, 127, 125, 124, 122 ], "attributes": { "hdlname": "io_ctrl_ins i_data_in", "src": "top.v:125.12-154.5|io_ctrl.v:7.29-7.38" @@ -16800,7 +16842,7 @@ }, "io_ctrl_ins.i_fetch_cmd": { "hide_name": 0, - "bits": [ 75 ], + "bits": [ 119 ], "attributes": { "hdlname": "io_ctrl_ins i_fetch_cmd", "src": "top.v:125.12-154.5|io_ctrl.v:10.29-10.40" @@ -16808,7 +16850,7 @@ }, "io_ctrl_ins.i_ioc": { "hide_name": 0, - "bits": [ 48, 50, 53, 52, 51 ], + "bits": [ 35, 51, 39, 50, 49 ], "attributes": { "hdlname": "io_ctrl_ins i_ioc", "src": "top.v:125.12-154.5|io_ctrl.v:6.29-6.34" @@ -16816,7 +16858,7 @@ }, "io_ctrl_ins.i_load_cmd": { "hide_name": 0, - "bits": [ 76 ], + "bits": [ 234 ], "attributes": { "hdlname": "io_ctrl_ins i_load_cmd", "src": "top.v:125.12-154.5|io_ctrl.v:11.29-11.39" @@ -16832,7 +16874,7 @@ }, "io_ctrl_ins.i_sys_clk": { "hide_name": 0, - "bits": [ 55 ], + "bits": [ 53 ], "attributes": { "hdlname": "io_ctrl_ins i_sys_clk", "src": "top.v:125.12-154.5|io_ctrl.v:4.29-4.38" @@ -16840,7 +16882,7 @@ }, "io_ctrl_ins.i_sys_clk_SB_DFF_Q_D": { "hide_name": 0, - "bits": [ 69, "x" ], + "bits": [ 67, "x" ], "attributes": { "force_downto": "00000000000000000000000000000001", "src": "top.v:167.20-167.33|/usr/local/bin/../share/yosys/techmap.v:270.23-270.24" @@ -16854,9 +16896,9 @@ "src": "top.v:125.12-154.5|io_ctrl.v:72.17-72.29" } }, - "io_ctrl_ins.ldo2v8_state_SB_LUT4_I3_O": { + "io_ctrl_ins.ldo2v8_state_SB_LUT4_I0_O": { "hide_name": 0, - "bits": [ 99, 35, 74, 72 ], + "bits": [ 74, 71 ], "attributes": { "force_downto": "00000000000000000000000000000001", "src": "/usr/local/bin/../share/yosys/ice40/cells_map.v:6.21-6.22" @@ -16872,13 +16914,13 @@ }, "io_ctrl_ins.led0_state_SB_DFFE_Q_E": { "hide_name": 0, - "bits": [ 71 ], + "bits": [ 69 ], "attributes": { } }, - "io_ctrl_ins.led0_state_SB_LUT4_I3_O": { + "io_ctrl_ins.led0_state_SB_LUT4_I0_O": { "hide_name": 0, - "bits": [ 90, 49, 77, 80 ], + "bits": [ 80, 77 ], "attributes": { "force_downto": "00000000000000000000000000000001", "src": "/usr/local/bin/../share/yosys/ice40/cells_map.v:6.21-6.22" @@ -16892,9 +16934,17 @@ "src": "top.v:125.12-154.5|io_ctrl.v:74.17-74.27" } }, - "io_ctrl_ins.led1_state_SB_LUT4_I3_O": { + "io_ctrl_ins.led1_state_SB_LUT4_I0_O": { "hide_name": 0, - "bits": [ 8, 49, 81, 84 ], + "bits": [ 85, 82 ], + "attributes": { + "force_downto": "00000000000000000000000000000001", + "src": "/usr/local/bin/../share/yosys/ice40/cells_map.v:6.21-6.22" + } + }, + "io_ctrl_ins.led1_state_SB_LUT4_I0_O_SB_LUT4_O_I2": { + "hide_name": 0, + "bits": [ 83, 35, 84, 38 ], "attributes": { "force_downto": "00000000000000000000000000000001", "src": "/usr/local/bin/../share/yosys/ice40/cells_map.v:6.21-6.22" @@ -16910,7 +16960,7 @@ }, "io_ctrl_ins.lna_rx_shutdown_state_SB_DFFE_Q_D": { "hide_name": 0, - "bits": [ 85 ], + "bits": [ 86 ], "attributes": { "src": "top.v:125.12-154.5|io_ctrl.v:216.5-311.8" } @@ -16925,14 +16975,22 @@ }, "io_ctrl_ins.lna_tx_shutdown_state_SB_DFFE_Q_D": { "hide_name": 0, - "bits": [ 87 ], + "bits": [ 88 ], "attributes": { "src": "top.v:125.12-154.5|io_ctrl.v:216.5-311.8" } }, + "io_ctrl_ins.lna_tx_shutdown_state_SB_LUT4_I1_O": { + "hide_name": 0, + "bits": [ 72, 35, 73, 38 ], + "attributes": { + "force_downto": "00000000000000000000000000000001", + "src": "/usr/local/bin/../share/yosys/ice40/cells_map.v:6.21-6.22" + } + }, "io_ctrl_ins.mixer_en_state": { "hide_name": 0, - "bits": [ 90 ], + "bits": [ 92 ], "attributes": { "hdlname": "io_ctrl_ins mixer_en_state", "src": "top.v:125.12-154.5|io_ctrl.v:78.17-78.31" @@ -16940,14 +16998,22 @@ }, "io_ctrl_ins.mixer_en_state_SB_DFFE_Q_D": { "hide_name": 0, - "bits": [ 89 ], + "bits": [ 91 ], "attributes": { "src": "top.v:125.12-154.5|io_ctrl.v:216.5-311.8" } }, + "io_ctrl_ins.mixer_en_state_SB_LUT4_I1_O": { + "hide_name": 0, + "bits": [ 78, 35, 79, 38 ], + "attributes": { + "force_downto": "00000000000000000000000000000001", + "src": "/usr/local/bin/../share/yosys/ice40/cells_map.v:6.21-6.22" + } + }, "io_ctrl_ins.o_data_out": { "hide_name": 0, - "bits": [ 120, 95, 98, 101, 103, 106, 111, 115 ], + "bits": [ 121, 96, 99, 101, 104, 108, 115, 117 ], "attributes": { "hdlname": "io_ctrl_ins o_data_out", "src": "top.v:125.12-154.5|io_ctrl.v:8.29-8.39" @@ -16955,7 +17021,7 @@ }, "io_ctrl_ins.o_data_out_SB_DFFESR_Q_1_D": { "hide_name": 0, - "bits": [ 97 ], + "bits": [ 98 ], "attributes": { "force_downto": "00000000000000000000000000000001", "src": "top.v:125.12-154.5|io_ctrl.v:130.17-170.24|io_ctrl.v:0.0-0.0|/usr/local/bin/../share/yosys/techmap.v:578.19-578.22" @@ -16969,17 +17035,33 @@ "src": "top.v:125.12-154.5|io_ctrl.v:130.17-170.24|io_ctrl.v:0.0-0.0|/usr/local/bin/../share/yosys/techmap.v:578.19-578.22" } }, + "io_ctrl_ins.o_data_out_SB_DFFESR_Q_2_D_SB_LUT4_O_I2": { + "hide_name": 0, + "bits": [ 102, 44 ], + "attributes": { + "force_downto": "00000000000000000000000000000001", + "src": "/usr/local/bin/../share/yosys/ice40/cells_map.v:6.21-6.22" + } + }, "io_ctrl_ins.o_data_out_SB_DFFESR_Q_3_D": { "hide_name": 0, - "bits": [ 102 ], + "bits": [ 103 ], "attributes": { "force_downto": "00000000000000000000000000000001", "src": "top.v:125.12-154.5|io_ctrl.v:130.17-170.24|io_ctrl.v:0.0-0.0|/usr/local/bin/../share/yosys/techmap.v:578.19-578.22" } }, + "io_ctrl_ins.o_data_out_SB_DFFESR_Q_3_D_SB_LUT4_O_I2": { + "hide_name": 0, + "bits": [ 105, 46 ], + "attributes": { + "force_downto": "00000000000000000000000000000001", + "src": "/usr/local/bin/../share/yosys/ice40/cells_map.v:6.21-6.22" + } + }, "io_ctrl_ins.o_data_out_SB_DFFESR_Q_4_D": { "hide_name": 0, - "bits": [ 104 ], + "bits": [ 106 ], "attributes": { "force_downto": "00000000000000000000000000000001", "src": "top.v:125.12-154.5|io_ctrl.v:130.17-170.24|io_ctrl.v:0.0-0.0|/usr/local/bin/../share/yosys/techmap.v:578.19-578.22" @@ -16987,7 +17069,7 @@ }, "io_ctrl_ins.o_data_out_SB_DFFESR_Q_5_D": { "hide_name": 0, - "bits": [ 110 ], + "bits": [ 114 ], "attributes": { "force_downto": "00000000000000000000000000000001", "src": "top.v:125.12-154.5|io_ctrl.v:130.17-170.24|io_ctrl.v:0.0-0.0|/usr/local/bin/../share/yosys/techmap.v:578.19-578.22" @@ -16995,7 +17077,7 @@ }, "io_ctrl_ins.o_data_out_SB_DFFESR_Q_6_D": { "hide_name": 0, - "bits": [ 114 ], + "bits": [ 116 ], "attributes": { "force_downto": "00000000000000000000000000000001", "src": "top.v:125.12-154.5|io_ctrl.v:130.17-170.24|io_ctrl.v:0.0-0.0|/usr/local/bin/../share/yosys/techmap.v:578.19-578.22" @@ -17003,29 +17085,13 @@ }, "io_ctrl_ins.o_data_out_SB_DFFESR_Q_6_E": { "hide_name": 0, - "bits": [ 105 ], + "bits": [ 107 ], "attributes": { } }, "io_ctrl_ins.o_data_out_SB_DFFESR_Q_6_E_SB_LUT4_O_I1": { "hide_name": 0, - "bits": [ 117, 67, 75 ], - "attributes": { - "force_downto": "00000000000000000000000000000001", - "src": "/usr/local/bin/../share/yosys/ice40/cells_map.v:6.21-6.22" - } - }, - "io_ctrl_ins.o_data_out_SB_DFFESR_Q_6_E_SB_LUT4_O_I1_SB_LUT4_O_I1": { - "hide_name": 0, - "bits": [ 48, 118, 50, 53 ], - "attributes": { - "force_downto": "00000000000000000000000000000001", - "src": "/usr/local/bin/../share/yosys/ice40/cells_map.v:6.21-6.22" - } - }, - "io_ctrl_ins.o_data_out_SB_DFFESR_Q_6_E_SB_LUT4_O_I1_SB_LUT4_O_I1_SB_LUT4_I3_O": { - "hide_name": 0, - "bits": [ 119, 67, 75 ], + "bits": [ 118, 65, 119 ], "attributes": { "force_downto": "00000000000000000000000000000001", "src": "/usr/local/bin/../share/yosys/ice40/cells_map.v:6.21-6.22" @@ -17033,15 +17099,13 @@ }, "io_ctrl_ins.o_data_out_SB_DFFESR_Q_6_R": { "hide_name": 0, - "bits": [ 39, 107 ], + "bits": [ 109 ], "attributes": { - "force_downto": "00000000000000000000000000000001", - "src": "/usr/local/bin/../share/yosys/ice40/cells_map.v:6.21-6.22" } }, "io_ctrl_ins.o_data_out_SB_DFFESR_Q_D": { "hide_name": 0, - "bits": [ 93 ], + "bits": [ 94 ], "attributes": { "force_downto": "00000000000000000000000000000001", "src": "top.v:125.12-154.5|io_ctrl.v:130.17-170.24|io_ctrl.v:0.0-0.0|/usr/local/bin/../share/yosys/techmap.v:578.19-578.22" @@ -17049,19 +17113,19 @@ }, "io_ctrl_ins.o_data_out_SB_DFFESR_Q_E": { "hide_name": 0, - "bits": [ 94 ], + "bits": [ 95 ], "attributes": { } }, "io_ctrl_ins.o_data_out_SB_DFFESR_Q_R": { "hide_name": 0, - "bits": [ 96 ], + "bits": [ 97 ], "attributes": { } }, "io_ctrl_ins.o_data_out_SB_DFFESS_Q_D": { "hide_name": 0, - "bits": [ 92 ], + "bits": [ 120 ], "attributes": { "force_downto": "00000000000000000000000000000001", "src": "top.v:125.12-154.5|io_ctrl.v:130.17-170.24|io_ctrl.v:0.0-0.0|/usr/local/bin/../share/yosys/techmap.v:578.19-578.22" @@ -17109,7 +17173,7 @@ }, "io_ctrl_ins.o_pmod": { "hide_name": 0, - "bits": [ 78, 82, 73, 44, 134, 133, 132, 131 ], + "bits": [ 78, 83, 72, 132, 131, 110, 130, 40 ], "attributes": { "hdlname": "io_ctrl_ins o_pmod", "src": "top.v:125.12-154.5|io_ctrl.v:19.29-19.35" @@ -17173,42 +17237,54 @@ }, "io_ctrl_ins.pmod_dir_state": { "hide_name": 0, - "bits": [ 79, 83, 99, 45, 128, 126, 124, 34 ], + "bits": [ 76, 81, 70, 43, 45, 126, 47, 34 ], "attributes": { "hdlname": "io_ctrl_ins pmod_dir_state", "src": "top.v:125.12-154.5|io_ctrl.v:75.17-75.31" } }, + "io_ctrl_ins.pmod_dir_state_SB_DFFE_Q_E": { + "hide_name": 0, + "bits": [ 123 ], + "attributes": { + } + }, "io_ctrl_ins.pmod_state": { "hide_name": 0, - "bits": [ 78, 82, 73, 44, 134, 133, 132, 131 ], + "bits": [ 78, 83, 72, 132, 131, 110, 130, 40 ], "attributes": { "hdlname": "io_ctrl_ins pmod_state", "src": "top.v:125.12-154.5|io_ctrl.v:76.17-76.27" } }, + "io_ctrl_ins.pmod_state_SB_DFFE_Q_E": { + "hide_name": 0, + "bits": [ 129 ], + "attributes": { + } + }, "io_ctrl_ins.rf_mode": { "hide_name": 0, - "bits": [ 63, 38, 41 ], + "bits": [ 90, 59, 60 ], "attributes": { "hdlname": "io_ctrl_ins rf_mode", "src": "top.v:125.12-154.5|io_ctrl.v:69.17-69.24" } }, - "io_ctrl_ins.rf_mode_SB_DFFE_Q_E": { - "hide_name": 0, - "bits": [ 57 ], - "attributes": { - } - }, "io_ctrl_ins.rf_pin_state": { "hide_name": 0, - "bits": [ 91, 86, 88, 140, 139, 138, 137, 136 ], + "bits": [ 93, 87, 89, 138, 137, 136, 135, 134 ], "attributes": { "hdlname": "io_ctrl_ins rf_pin_state", "src": "top.v:125.12-154.5|io_ctrl.v:77.17-77.29" } }, + "io_ctrl_ins.rf_pin_state_SB_DFFE_Q_E": { + "hide_name": 0, + "bits": [ 133 ], + "attributes": { + } + }, "io_ctrl_ins.rx_h_b_state": { "hide_name": 0, "bits": [ 4 ], @@ -17219,14 +17295,14 @@ }, "io_ctrl_ins.rx_h_b_state_SB_DFFE_Q_D": { "hide_name": 0, - "bits": [ 141 ], + "bits": [ 139 ], "attributes": { "src": "top.v:125.12-154.5|io_ctrl.v:216.5-311.8" } }, - "io_ctrl_ins.rx_h_b_state_SB_LUT4_I1_O": { + "io_ctrl_ins.rx_h_b_state_SB_LUT4_I0_I2": { "hide_name": 0, - "bits": [ 112, 113 ], + "bits": [ 4, 42, 141, 48 ], "attributes": { "force_downto": "00000000000000000000000000000001", "src": "/usr/local/bin/../share/yosys/ice40/cells_map.v:6.21-6.22" @@ -17242,14 +17318,22 @@ }, "io_ctrl_ins.rx_h_state_SB_DFFE_Q_D": { "hide_name": 0, - "bits": [ 143 ], + "bits": [ 142 ], "attributes": { "src": "top.v:125.12-154.5|io_ctrl.v:216.5-311.8" } }, + "io_ctrl_ins.rx_h_state_SB_DFFE_Q_D_SB_LUT4_O_I2": { + "hide_name": 0, + "bits": [ 59, 60, 89, 62 ], + "attributes": { + "force_downto": "00000000000000000000000000000001", + "src": "/usr/local/bin/../share/yosys/ice40/cells_map.v:6.21-6.22" + } + }, "io_ctrl_ins.rx_h_state_SB_DFFE_Q_D_SB_LUT4_O_I3": { "hide_name": 0, - "bits": [ 136, 62, 142 ], + "bits": [ 134, 62, 140 ], "attributes": { "force_downto": "00000000000000000000000000000001", "src": "/usr/local/bin/../share/yosys/ice40/cells_map.v:6.21-6.22" @@ -17271,14 +17355,14 @@ }, "io_ctrl_ins.tr_vc_1_b_state_SB_DFFE_Q_D": { "hide_name": 0, - "bits": [ 144 ], + "bits": [ 143 ], "attributes": { "src": "top.v:125.12-154.5|io_ctrl.v:216.5-311.8" } }, - "io_ctrl_ins.tr_vc_1_b_state_SB_LUT4_I0_I2": { + "io_ctrl_ins.tr_vc_1_b_state_SB_LUT4_I1_O": { "hide_name": 0, - "bits": [ 6, 49, 42, 145 ], + "bits": [ 131, 35, 145, 38 ], "attributes": { "force_downto": "00000000000000000000000000000001", "src": "/usr/local/bin/../share/yosys/ice40/cells_map.v:6.21-6.22" @@ -17299,9 +17383,17 @@ "src": "top.v:125.12-154.5|io_ctrl.v:216.5-311.8" } }, - "io_ctrl_ins.tr_vc_1_state_SB_LUT4_I1_O": { + "io_ctrl_ins.tr_vc_1_state_SB_DFFE_Q_D_SB_LUT4_O_I0": { "hide_name": 0, - "bits": [ 108, 109 ], + "bits": [ 144, 59, 136, 62 ], + "attributes": { + "force_downto": "00000000000000000000000000000001", + "src": "/usr/local/bin/../share/yosys/ice40/cells_map.v:6.21-6.22" + } + }, + "io_ctrl_ins.tr_vc_1_state_SB_LUT4_I3_O": { + "hide_name": 0, + "bits": [ 110, 111, 112, 113 ], "attributes": { "force_downto": "00000000000000000000000000000001", "src": "/usr/local/bin/../share/yosys/ice40/cells_map.v:6.21-6.22" @@ -17322,9 +17414,17 @@ "src": "top.v:125.12-154.5|io_ctrl.v:216.5-311.8" } }, + "io_ctrl_ins.tr_vc_2_state_SB_LUT4_I1_O": { + "hide_name": 0, + "bits": [ 132, 35, 148, 38 ], + "attributes": { + "force_downto": "00000000000000000000000000000001", + "src": "/usr/local/bin/../share/yosys/ice40/cells_map.v:6.21-6.22" + } + }, "io_pmod": { "hide_name": 0, - "bits": [ "0", "0", "x", "0", "x", 20, 21, 22 ], + "bits": [ "x", "0", "1", "0", "x", 20, 21, 22 ], "attributes": { "src": "top.v:44.20-44.27" } @@ -17338,21 +17438,21 @@ }, "lvds_clock": { "hide_name": 0, - "bits": [ 151 ], + "bits": [ 152 ], "attributes": { "src": "top.v:182.9-182.19" } }, "lvds_clock_buf": { "hide_name": 0, - "bits": [ 150 ], + "bits": [ 151 ], "attributes": { "src": "top.v:183.9-183.23" } }, "lvds_rx_09_inst.i_ddr_clk": { "hide_name": 0, - "bits": [ 150 ], + "bits": [ 151 ], "attributes": { "hdlname": "lvds_rx_09_inst i_ddr_clk", "src": "top.v:246.12-255.5|lvds_rx.v:4.29-4.38" @@ -17360,7 +17460,7 @@ }, "lvds_rx_09_inst.i_ddr_data": { "hide_name": 0, - "bits": [ 149, 148 ], + "bits": [ 150, 149 ], "attributes": { "hdlname": "lvds_rx_09_inst i_ddr_data", "src": "top.v:246.12-255.5|lvds_rx.v:5.29-5.39" @@ -17384,7 +17484,7 @@ }, "lvds_rx_09_inst.o_fifo_data": { "hide_name": 0, - "bits": [ 154, 157, 20, 21, 22, "x", "x", "x", "x", "x", "x", "x", "x", "x", "x", "x", "x", "x", "x", "x", "x", "x", "x", "x", "x", "x", "x", "x", "x", "x", "x", "x" ], + "bits": [ 155, 158, 20, 21, 22, "x", "x", "x", "x", "x", "x", "x", "x", "x", "x", "x", "x", "x", "x", "x", "x", "x", "x", "x", "x", "x", "x", "x", "x", "x", "x", "x" ], "attributes": { "hdlname": "lvds_rx_09_inst o_fifo_data", "src": "top.v:246.12-255.5|lvds_rx.v:10.29-10.40" @@ -17400,7 +17500,7 @@ }, "lvds_rx_09_inst.o_fifo_write_clk": { "hide_name": 0, - "bits": [ 150 ], + "bits": [ 151 ], "attributes": { "hdlname": "lvds_rx_09_inst o_fifo_write_clk", "src": "top.v:246.12-255.5|lvds_rx.v:8.29-8.45" @@ -17408,7 +17508,7 @@ }, "lvds_rx_09_inst.r_data": { "hide_name": 0, - "bits": [ 154, 157, 20, 21, 22, "x", "x", "x", "x", "x", "x", "x", "x", "x", "x", "x", "x", "x", "x", "x", "x", "x", "x", "x", "x", "x", "x", "x", "x", "x", "x", "x" ], + "bits": [ 155, 158, 20, 21, 22, "x", "x", "x", "x", "x", "x", "x", "x", "x", "x", "x", "x", "x", "x", "x", "x", "x", "x", "x", "x", "x", "x", "x", "x", "x", "x", "x" ], "attributes": { "hdlname": "lvds_rx_09_inst r_data", "src": "top.v:246.12-255.5|lvds_rx.v:21.17-21.23" @@ -17416,7 +17516,7 @@ }, "lvds_rx_09_inst.r_data_SB_DFFNESR_Q_R": { "hide_name": 0, - "bits": [ 155, 312 ], + "bits": [ 156, 311 ], "attributes": { "force_downto": "00000000000000000000000000000001", "src": "top.v:246.12-255.5|lvds_rx.v:47.13-78.20|lvds_rx.v:0.0-0.0|/usr/local/bin/../share/yosys/techmap.v:575.21-575.22", @@ -17425,7 +17525,7 @@ }, "lvds_rx_09_inst.r_phase_count": { "hide_name": 0, - "bits": [ 161, 163, 313 ], + "bits": [ 162, 164, 312 ], "attributes": { "hdlname": "lvds_rx_09_inst r_phase_count", "src": "top.v:246.12-255.5|lvds_rx.v:20.17-20.30", @@ -17434,7 +17534,7 @@ }, "lvds_rx_09_inst.r_phase_count_SB_CARRY_CI_CO": { "hide_name": 0, - "bits": [ "1", 161, 162 ], + "bits": [ "1", 162, 163 ], "attributes": { "force_downto": "00000000000000000000000000000001", "src": "top.v:246.12-255.5|lvds_rx.v:63.42-63.59|/usr/local/bin/../share/yosys/ice40/arith_map.v:51.21-51.22" @@ -17442,13 +17542,13 @@ }, "lvds_rx_09_inst.r_phase_count_SB_LUT4_I1_O": { "hide_name": 0, - "bits": [ 166 ], + "bits": [ 167 ], "attributes": { } }, - "lvds_rx_09_inst.r_phase_count_SB_LUT4_I1_O_SB_DFFNESR_D_Q": { + "lvds_rx_09_inst.r_phase_count_SB_LUT4_O_1_I3": { "hide_name": 0, - "bits": [ 169, 176, 168, 170 ], + "bits": [ 172, 169 ], "attributes": { "force_downto": "00000000000000000000000000000001", "src": "/usr/local/bin/../share/yosys/ice40/cells_map.v:6.21-6.22" @@ -17464,7 +17564,7 @@ }, "lvds_rx_09_inst.r_state_if": { "hide_name": 0, - "bits": [ 173, 172, "0" ], + "bits": [ 177, 175, "0" ], "attributes": { "hdlname": "lvds_rx_09_inst r_state_if", "src": "top.v:246.12-255.5|lvds_rx.v:19.17-19.27" @@ -17472,52 +17572,36 @@ }, "lvds_rx_09_inst.r_state_if_SB_DFFNESR_Q_D": { "hide_name": 0, - "bits": [ 314, 170 ], + "bits": [ 313, 173 ], "attributes": { "force_downto": "00000000000000000000000000000001", "src": "top.v:246.12-255.5|lvds_rx.v:47.13-78.20|lvds_rx.v:0.0-0.0|/usr/local/bin/../share/yosys/techmap.v:573.22-573.23", "unused_bits": "0 " } }, - "lvds_rx_09_inst.r_state_if_SB_DFFNE_Q_E": { + "lvds_rx_09_inst.r_state_if_SB_DFFNESR_Q_D_SB_LUT4_I1_O": { "hide_name": 0, - "bits": [ 171 ], - "attributes": { - } - }, - "lvds_rx_09_inst.r_state_if_SB_DFFNE_Q_E_SB_LUT4_O_I1": { - "hide_name": 0, - "bits": [ 174, 170 ], - "attributes": { - "force_downto": "00000000000000000000000000000001", - "src": "/usr/local/bin/../share/yosys/ice40/cells_map.v:6.21-6.22" - } - }, - "lvds_rx_09_inst.r_state_if_SB_DFFNE_Q_E_SB_LUT4_O_I1_SB_LUT4_I2_O": { - "hide_name": 0, - "bits": [ 164, 163, 165, 161 ], + "bits": [ 165, 164, 166, 162 ], "attributes": { "force_downto": "00000000000000000000000000000001", "src": "top.v:246.12-255.5|lvds_rx.v:63.42-63.59|/usr/local/bin/../share/yosys/ice40/arith_map.v:62.5-70.4|/usr/local/bin/../share/yosys/ice40/cells_map.v:6.21-6.22" } }, - "lvds_rx_09_inst.r_state_if_SB_DFFNE_Q_E_SB_LUT4_O_I1_SB_LUT4_I2_O_SB_LUT4_I0_O": { + "lvds_rx_09_inst.r_state_if_SB_DFFNESR_Q_D_SB_LUT4_I1_O_SB_LUT4_I0_O": { "hide_name": 0, - "bits": [ 177 ], + "bits": [ 171 ], "attributes": { } }, - "lvds_rx_09_inst.r_state_if_SB_DFFNE_Q_E_SB_LUT4_O_I1_SB_LUT4_O_I1": { + "lvds_rx_09_inst.r_state_if_SB_DFFNE_Q_E": { "hide_name": 0, - "bits": [ 178, 173, 172 ], + "bits": [ 174 ], "attributes": { - "force_downto": "00000000000000000000000000000001", - "src": "/usr/local/bin/../share/yosys/ice40/cells_map.v:6.21-6.22" } }, "lvds_rx_24_inst.i_ddr_clk": { "hide_name": 0, - "bits": [ 150 ], + "bits": [ 151 ], "attributes": { "hdlname": "lvds_rx_24_inst i_ddr_clk", "src": "top.v:270.12-279.5|lvds_rx.v:4.29-4.38" @@ -17549,7 +17633,7 @@ }, "lvds_rx_24_inst.o_fifo_write_clk": { "hide_name": 0, - "bits": [ 150 ], + "bits": [ 151 ], "attributes": { "hdlname": "lvds_rx_24_inst o_fifo_write_clk", "src": "top.v:270.12-279.5|lvds_rx.v:8.29-8.45" @@ -17629,7 +17713,7 @@ }, "o_miso_$_TBUF__Y_E": { "hide_name": 0, - "bits": [ 54 ], + "bits": [ 52 ], "attributes": { } }, @@ -17698,7 +17782,7 @@ }, "r_counter": { "hide_name": 0, - "bits": [ 55, "x" ], + "bits": [ 53, "x" ], "attributes": { "src": "top.v:66.16-66.25" } @@ -17712,26 +17796,38 @@ }, "r_tx_data": { "hide_name": 0, - "bits": [ 198, 182, 185, 187, 189, 191, 193, 196 ], + "bits": [ 199, 183, 186, 188, 190, 192, 194, 197 ], "attributes": { "src": "top.v:71.16-71.25" } }, "r_tx_data_SB_DFFESR_Q_5_D": { "hide_name": 0, - "bits": [ "0", "0", "0", "0", "0", "0", "0", "0", 315, "0", 315, "0", "0", 315, "0", 315, 316, 317, "0", 317, "0", "0", "0", "0", 318, 319, 320, 321, 188, 322, 192, 323 ], + "bits": [ "0", "0", "0", "0", "0", "0", "0", "0", 314, "0", 314, "0", "0", 314, "0", 314, 315, 316, "0", 316, "0", "0", "0", "0", 317, 318, 319, 320, 189, 321, 193, 322 ], "attributes": { "force_downto": "00000000000000000000000000000001", "src": "top.v:0.0-0.0|top.v:169.7-175.14|/usr/local/bin/../share/yosys/techmap.v:583.28-583.35", "unused_bits": "8 10 13 15 16 17 19 24 25 26 27 29 31" } }, + "r_tx_data_SB_DFFESR_Q_E": { + "hide_name": 0, + "bits": [ 182 ], + "attributes": { + } + }, + "r_tx_data_SB_DFFESR_Q_R": { + "hide_name": 0, + "bits": [ 184 ], + "attributes": { + } + }, "rx_09_fifo.empty_o": { "hide_name": 0, "bits": [ "0" ], "attributes": { "hdlname": "rx_09_fifo empty_o", - "src": "top.v:257.17-268.5|complex_fifo.v:17.16-17.23" + "src": "top.v:257.17-268.5|complex_fifo.v:17.17-17.24" } }, "rx_09_fifo.full_o": { @@ -17739,7 +17835,7 @@ "bits": [ "1" ], "attributes": { "hdlname": "rx_09_fifo full_o", - "src": "top.v:257.17-268.5|complex_fifo.v:16.16-16.22" + "src": "top.v:257.17-268.5|complex_fifo.v:16.17-16.23" } }, "rx_09_fifo.rd_addr": { @@ -17776,10 +17872,10 @@ }, "rx_09_fifo.rd_clk_i": { "hide_name": 0, - "bits": [ 55 ], + "bits": [ 53 ], "attributes": { "hdlname": "rx_09_fifo rd_clk_i", - "src": "top.v:257.17-268.5|complex_fifo.v:12.28-12.36" + "src": "top.v:257.17-268.5|complex_fifo.v:12.29-12.37" } }, "rx_09_fifo.rd_en_i": { @@ -17787,7 +17883,7 @@ "bits": [ "x" ], "attributes": { "hdlname": "rx_09_fifo rd_en_i", - "src": "top.v:257.17-268.5|complex_fifo.v:13.28-13.35" + "src": "top.v:257.17-268.5|complex_fifo.v:13.29-13.36" } }, "rx_09_fifo.rd_rst_i": { @@ -17795,7 +17891,7 @@ "bits": [ "0" ], "attributes": { "hdlname": "rx_09_fifo rd_rst_i", - "src": "top.v:257.17-268.5|complex_fifo.v:11.28-11.36" + "src": "top.v:257.17-268.5|complex_fifo.v:11.29-11.37" } }, "rx_09_fifo.wr_addr": { @@ -17832,18 +17928,18 @@ }, "rx_09_fifo.wr_clk_i": { "hide_name": 0, - "bits": [ 150 ], + "bits": [ 151 ], "attributes": { "hdlname": "rx_09_fifo wr_clk_i", - "src": "top.v:257.17-268.5|complex_fifo.v:7.28-7.36" + "src": "top.v:257.17-268.5|complex_fifo.v:7.29-7.37" } }, "rx_09_fifo.wr_data_i": { "hide_name": 0, - "bits": [ 154, 157, 20, 21, 22, "x", "x", "x", "x", "x", "x", "x", "x", "x", "x", "x", "x", "x", "x", "x", "x", "x", "x", "x", "x", "x", "x", "x", "x", "x", "x", "x" ], + "bits": [ 155, 158, 20, 21, 22, "x", "x", "x", "x", "x", "x", "x", "x", "x", "x", "x", "x", "x", "x", "x", "x", "x", "x", "x", "x", "x", "x", "x", "x", "x", "x", "x" ], "attributes": { "hdlname": "rx_09_fifo wr_data_i", - "src": "top.v:257.17-268.5|complex_fifo.v:9.32-9.41" + "src": "top.v:257.17-268.5|complex_fifo.v:9.33-9.42" } }, "rx_09_fifo.wr_en_i": { @@ -17851,7 +17947,7 @@ "bits": [ "0" ], "attributes": { "hdlname": "rx_09_fifo wr_en_i", - "src": "top.v:257.17-268.5|complex_fifo.v:8.28-8.35" + "src": "top.v:257.17-268.5|complex_fifo.v:8.29-8.36" } }, "rx_09_fifo.wr_rst_i": { @@ -17859,7 +17955,7 @@ "bits": [ "0" ], "attributes": { "hdlname": "rx_09_fifo wr_rst_i", - "src": "top.v:257.17-268.5|complex_fifo.v:6.28-6.36" + "src": "top.v:257.17-268.5|complex_fifo.v:6.29-6.37" } }, "rx_24_fifo.empty_o": { @@ -17867,7 +17963,7 @@ "bits": [ "0" ], "attributes": { "hdlname": "rx_24_fifo empty_o", - "src": "top.v:281.17-292.5|complex_fifo.v:17.16-17.23" + "src": "top.v:281.17-292.5|complex_fifo.v:17.17-17.24" } }, "rx_24_fifo.full_o": { @@ -17875,7 +17971,7 @@ "bits": [ "1" ], "attributes": { "hdlname": "rx_24_fifo full_o", - "src": "top.v:281.17-292.5|complex_fifo.v:16.16-16.22" + "src": "top.v:281.17-292.5|complex_fifo.v:16.17-16.23" } }, "rx_24_fifo.rd_addr": { @@ -17912,10 +18008,10 @@ }, "rx_24_fifo.rd_clk_i": { "hide_name": 0, - "bits": [ 55 ], + "bits": [ 53 ], "attributes": { "hdlname": "rx_24_fifo rd_clk_i", - "src": "top.v:281.17-292.5|complex_fifo.v:12.28-12.36" + "src": "top.v:281.17-292.5|complex_fifo.v:12.29-12.37" } }, "rx_24_fifo.rd_en_i": { @@ -17923,7 +18019,7 @@ "bits": [ "x" ], "attributes": { "hdlname": "rx_24_fifo rd_en_i", - "src": "top.v:281.17-292.5|complex_fifo.v:13.28-13.35" + "src": "top.v:281.17-292.5|complex_fifo.v:13.29-13.36" } }, "rx_24_fifo.rd_rst_i": { @@ -17931,7 +18027,7 @@ "bits": [ "0" ], "attributes": { "hdlname": "rx_24_fifo rd_rst_i", - "src": "top.v:281.17-292.5|complex_fifo.v:11.28-11.36" + "src": "top.v:281.17-292.5|complex_fifo.v:11.29-11.37" } }, "rx_24_fifo.wr_addr": { @@ -17968,10 +18064,10 @@ }, "rx_24_fifo.wr_clk_i": { "hide_name": 0, - "bits": [ 150 ], + "bits": [ 151 ], "attributes": { "hdlname": "rx_24_fifo wr_clk_i", - "src": "top.v:281.17-292.5|complex_fifo.v:7.28-7.36" + "src": "top.v:281.17-292.5|complex_fifo.v:7.29-7.37" } }, "rx_24_fifo.wr_en_i": { @@ -17979,7 +18075,7 @@ "bits": [ "0" ], "attributes": { "hdlname": "rx_24_fifo wr_en_i", - "src": "top.v:281.17-292.5|complex_fifo.v:8.28-8.35" + "src": "top.v:281.17-292.5|complex_fifo.v:8.29-8.36" } }, "rx_24_fifo.wr_rst_i": { @@ -17987,31 +18083,31 @@ "bits": [ "0" ], "attributes": { "hdlname": "rx_24_fifo wr_rst_i", - "src": "top.v:281.17-292.5|complex_fifo.v:6.28-6.36" + "src": "top.v:281.17-292.5|complex_fifo.v:6.29-6.37" } }, "smi_ctrl_ins.i_cs": { "hide_name": 0, - "bits": [ 200 ], + "bits": [ 201 ], "attributes": { "hdlname": "smi_ctrl_ins i_cs", - "src": "top.v:294.13-323.5|smi_ctrl.v:9.29-9.33" + "src": "top.v:294.13-322.5|smi_ctrl.v:9.29-9.33" } }, "smi_ctrl_ins.i_data_in": { "hide_name": 0, - "bits": [ 59, 56, 70, 129, 127, 125, 123, 121 ], + "bits": [ 57, 54, 68, 128, 127, 125, 124, 122 ], "attributes": { "hdlname": "smi_ctrl_ins i_data_in", - "src": "top.v:294.13-323.5|smi_ctrl.v:7.29-7.38" + "src": "top.v:294.13-322.5|smi_ctrl.v:7.29-7.38" } }, "smi_ctrl_ins.i_fetch_cmd": { "hide_name": 0, - "bits": [ 75 ], + "bits": [ 119 ], "attributes": { "hdlname": "smi_ctrl_ins i_fetch_cmd", - "src": "top.v:294.13-323.5|smi_ctrl.v:10.29-10.40" + "src": "top.v:294.13-322.5|smi_ctrl.v:10.29-10.40" } }, "smi_ctrl_ins.i_fifo_09_empty": { @@ -18019,7 +18115,7 @@ "bits": [ "0" ], "attributes": { "hdlname": "smi_ctrl_ins i_fifo_09_empty", - "src": "top.v:294.13-323.5|smi_ctrl.v:17.29-17.44" + "src": "top.v:294.13-322.5|smi_ctrl.v:17.29-17.44" } }, "smi_ctrl_ins.i_fifo_09_full": { @@ -18027,7 +18123,7 @@ "bits": [ "1" ], "attributes": { "hdlname": "smi_ctrl_ins i_fifo_09_full", - "src": "top.v:294.13-323.5|smi_ctrl.v:16.29-16.43" + "src": "top.v:294.13-322.5|smi_ctrl.v:16.29-16.43" } }, "smi_ctrl_ins.i_fifo_24_empty": { @@ -18035,7 +18131,7 @@ "bits": [ "0" ], "attributes": { "hdlname": "smi_ctrl_ins i_fifo_24_empty", - "src": "top.v:294.13-323.5|smi_ctrl.v:23.29-23.44" + "src": "top.v:294.13-322.5|smi_ctrl.v:23.29-23.44" } }, "smi_ctrl_ins.i_fifo_24_full": { @@ -18043,23 +18139,23 @@ "bits": [ "1" ], "attributes": { "hdlname": "smi_ctrl_ins i_fifo_24_full", - "src": "top.v:294.13-323.5|smi_ctrl.v:22.29-22.43" + "src": "top.v:294.13-322.5|smi_ctrl.v:22.29-22.43" } }, "smi_ctrl_ins.i_ioc": { "hide_name": 0, - "bits": [ 48, 50, 53, 52, 51 ], + "bits": [ 35, 51, 39, 50, 49 ], "attributes": { "hdlname": "smi_ctrl_ins i_ioc", - "src": "top.v:294.13-323.5|smi_ctrl.v:6.29-6.34" + "src": "top.v:294.13-322.5|smi_ctrl.v:6.29-6.34" } }, "smi_ctrl_ins.i_load_cmd": { "hide_name": 0, - "bits": [ 76 ], + "bits": [ 234 ], "attributes": { "hdlname": "smi_ctrl_ins i_load_cmd", - "src": "top.v:294.13-323.5|smi_ctrl.v:11.29-11.39" + "src": "top.v:294.13-322.5|smi_ctrl.v:11.29-11.39" } }, "smi_ctrl_ins.i_rst_b": { @@ -18067,7 +18163,7 @@ "bits": [ "0" ], "attributes": { "hdlname": "smi_ctrl_ins i_rst_b", - "src": "top.v:294.13-323.5|smi_ctrl.v:3.29-3.36" + "src": "top.v:294.13-322.5|smi_ctrl.v:3.29-3.36" } }, "smi_ctrl_ins.i_smi_a": { @@ -18075,7 +18171,7 @@ "bits": [ 27, 26, 25 ], "attributes": { "hdlname": "smi_ctrl_ins i_smi_a", - "src": "top.v:294.13-323.5|smi_ctrl.v:26.29-26.36", + "src": "top.v:294.13-322.5|smi_ctrl.v:26.29-26.36", "unused_bits": "0 1 2" } }, @@ -18084,7 +18180,7 @@ "bits": [ "z", "0", "0", "0", "0", "0", "0", "0" ], "attributes": { "hdlname": "smi_ctrl_ins i_smi_data_in", - "src": "top.v:294.13-323.5|smi_ctrl.v:30.29-30.42" + "src": "top.v:294.13-322.5|smi_ctrl.v:30.29-30.42" } }, "smi_ctrl_ins.i_smi_soe_se": { @@ -18092,7 +18188,7 @@ "bits": [ 28 ], "attributes": { "hdlname": "smi_ctrl_ins i_smi_soe_se", - "src": "top.v:294.13-323.5|smi_ctrl.v:27.29-27.41", + "src": "top.v:294.13-322.5|smi_ctrl.v:27.29-27.41", "unused_bits": "0 " } }, @@ -18101,71 +18197,62 @@ "bits": [ 29 ], "attributes": { "hdlname": "smi_ctrl_ins i_smi_swe_srw", - "src": "top.v:294.13-323.5|smi_ctrl.v:28.29-28.42", + "src": "top.v:294.13-322.5|smi_ctrl.v:28.29-28.42", "unused_bits": "0 " } }, "smi_ctrl_ins.i_sys_clk": { "hide_name": 0, - "bits": [ 55 ], + "bits": [ 53 ], "attributes": { "hdlname": "smi_ctrl_ins i_sys_clk", - "src": "top.v:294.13-323.5|smi_ctrl.v:4.29-4.38" + "src": "top.v:294.13-322.5|smi_ctrl.v:4.29-4.38" } }, "smi_ctrl_ins.o_data_out": { "hide_name": 0, - "bits": [ 205, 202, "0", 202, "0", "0", "0", "0" ], + "bits": [ 207, 204, "0", 204, "0", "0", "0", "0" ], "attributes": { "hdlname": "smi_ctrl_ins o_data_out", - "src": "top.v:294.13-323.5|smi_ctrl.v:8.29-8.39" + "src": "top.v:294.13-322.5|smi_ctrl.v:8.29-8.39" } }, "smi_ctrl_ins.o_data_out_SB_DFFESR_Q_1_D": { "hide_name": 0, - "bits": [ 204 ], + "bits": [ 206 ], + "attributes": { + } + }, + "smi_ctrl_ins.o_data_out_SB_DFFESR_Q_D": { + "hide_name": 0, + "bits": [ 323, 324, 325, 326, 202 ], + "attributes": { + "force_downto": "00000000000000000000000000000001", + "src": "top.v:125.12-154.5|io_ctrl.v:130.17-170.24|io_ctrl.v:0.0-0.0|/usr/local/bin/../share/yosys/techmap.v:573.22-573.23", + "unused_bits": "0 1 2 3" + } + }, + "smi_ctrl_ins.o_data_out_SB_DFFESR_Q_D_SB_LUT4_I2_O": { + "hide_name": 0, + "bits": [ 55 ], "attributes": { } }, "smi_ctrl_ins.o_data_out_SB_DFFESR_Q_E": { "hide_name": 0, - "bits": [ 201 ], + "bits": [ 203 ], "attributes": { } }, - "smi_ctrl_ins.o_data_out_SB_DFFESR_Q_E_SB_LUT4_O_I1": { - "hide_name": 0, - "bits": [ 50, 206, 48 ], - "attributes": { - "force_downto": "00000000000000000000000000000001", - "src": "/usr/local/bin/../share/yosys/ice40/cells_map.v:6.21-6.22" - } - }, - "smi_ctrl_ins.o_data_out_SB_DFFESR_Q_E_SB_LUT4_O_I1_SB_LUT4_I1_O": { - "hide_name": 0, - "bits": [ 124, 35, 36, 17 ], - "attributes": { - "force_downto": "00000000000000000000000000000001", - "src": "/usr/local/bin/../share/yosys/ice40/cells_map.v:6.21-6.22" - } - }, - "smi_ctrl_ins.o_data_out_SB_DFFESR_Q_E_SB_LUT4_O_I1_SB_LUT4_I3_O": { - "hide_name": 0, - "bits": [ 41, 39, 36, 15 ], - "attributes": { - "force_downto": "00000000000000000000000000000001", - "src": "/usr/local/bin/../share/yosys/ice40/cells_map.v:6.21-6.22" - } - }, "smi_ctrl_ins.o_data_out_SB_DFFESR_Q_R": { "hide_name": 0, - "bits": [ 203 ], + "bits": [ 205 ], "attributes": { } }, "smi_ctrl_ins.o_data_out_SB_LUT4_I0_2_O": { "hide_name": 0, - "bits": [ 209, 208 ], + "bits": [ 210, 209 ], "attributes": { "force_downto": "00000000000000000000000000000001", "src": "/usr/local/bin/../share/yosys/ice40/cells_map.v:6.21-6.22" @@ -18173,7 +18260,7 @@ }, "smi_ctrl_ins.o_data_out_SB_LUT4_I0_O": { "hide_name": 0, - "bits": [ 197, 180, 184, 186, 188, 190, 192, 195 ], + "bits": [ 198, 181, 185, 187, 189, 191, 193, 196 ], "attributes": { "force_downto": "00000000000000000000000000000001", "src": "top.v:0.0-0.0|top.v:169.7-175.14|/usr/local/bin/../share/yosys/techmap.v:578.19-578.22" @@ -18184,7 +18271,7 @@ "bits": [ "x" ], "attributes": { "hdlname": "smi_ctrl_ins o_fifo_09_pull", - "src": "top.v:294.13-323.5|smi_ctrl.v:14.29-14.43" + "src": "top.v:294.13-322.5|smi_ctrl.v:14.29-14.43" } }, "smi_ctrl_ins.o_fifo_24_pull": { @@ -18192,15 +18279,23 @@ "bits": [ "x" ], "attributes": { "hdlname": "smi_ctrl_ins o_fifo_24_pull", - "src": "top.v:294.13-323.5|smi_ctrl.v:20.29-20.43" + "src": "top.v:294.13-322.5|smi_ctrl.v:20.29-20.43" + } + }, + "smi_ctrl_ins.o_smi_data_out": { + "hide_name": 0, + "bits": [ "x", "x", "x", "x", "x", "x", "x", "x" ], + "attributes": { + "hdlname": "smi_ctrl_ins o_smi_data_out", + "src": "top.v:294.13-322.5|smi_ctrl.v:29.29-29.43" } }, "smi_ctrl_ins.o_smi_read_req": { "hide_name": 0, - "bits": [ "x" ], + "bits": [ "1" ], "attributes": { "hdlname": "smi_ctrl_ins o_smi_read_req", - "src": "top.v:294.13-323.5|smi_ctrl.v:31.29-31.43" + "src": "top.v:294.13-322.5|smi_ctrl.v:31.29-31.43" } }, "smi_ctrl_ins.o_smi_write_req": { @@ -18208,7 +18303,7 @@ "bits": [ "x" ], "attributes": { "hdlname": "smi_ctrl_ins o_smi_write_req", - "src": "top.v:294.13-323.5|smi_ctrl.v:32.29-32.44" + "src": "top.v:294.13-322.5|smi_ctrl.v:32.29-32.44" } }, "smi_ctrl_ins.o_smi_writing": { @@ -18216,12 +18311,12 @@ "bits": [ "0" ], "attributes": { "hdlname": "smi_ctrl_ins o_smi_writing", - "src": "top.v:294.13-323.5|smi_ctrl.v:33.29-33.42" + "src": "top.v:294.13-322.5|smi_ctrl.v:45.12-45.25" } }, "spi_if_ins.i_data_out": { "hide_name": 0, - "bits": [ 198, 182, 185, 187, 189, 191, 193, 196 ], + "bits": [ 199, 183, 186, 188, 190, 192, 194, 197 ], "attributes": { "hdlname": "spi_if_ins i_data_out", "src": "top.v:92.11-108.5|spi_if.v:10.29-10.39" @@ -18261,7 +18356,7 @@ }, "spi_if_ins.i_sys_clk": { "hide_name": 0, - "bits": [ 55 ], + "bits": [ 53 ], "attributes": { "hdlname": "spi_if_ins i_sys_clk", "src": "top.v:92.11-108.5|spi_if.v:6.29-6.38" @@ -18269,7 +18364,7 @@ }, "spi_if_ins.o_cs": { "hide_name": 0, - "bits": [ 214, 67, 200, 211 ], + "bits": [ 215, 65, 201, 212 ], "attributes": { "hdlname": "spi_if_ins o_cs", "src": "top.v:92.11-108.5|spi_if.v:11.29-11.33" @@ -18277,43 +18372,23 @@ }, "spi_if_ins.o_cs_SB_DFFESR_Q_D": { "hide_name": 0, - "bits": [ "0", "0", "0", 210, "0", "0", 199, "0", "0", 65, "0", "0" ], + "bits": [ "0", "0", "0", 211, "0", "0", 200, "0", "0", 63, "0", "0" ], "attributes": { "force_downto": "00000000000000000000000000000001", "src": "top.v:92.11-108.5|spi_if.v:65.21-70.28|spi_if.v:0.0-0.0|/usr/local/bin/../share/yosys/techmap.v:583.28-583.35" } }, - "spi_if_ins.o_cs_SB_LUT4_I1_1_O": { - "hide_name": 0, - "bits": [ 194, 103 ], - "attributes": { - "force_downto": "00000000000000000000000000000001", - "src": "/usr/local/bin/../share/yosys/ice40/cells_map.v:6.21-6.22" - } - }, "spi_if_ins.o_cs_SB_LUT4_I1_O": { "hide_name": 0, - "bits": [ 202, 207, 194, 101 ], + "bits": [ 204, 208, 195, 96 ], "attributes": { "force_downto": "00000000000000000000000000000001", "src": "/usr/local/bin/../share/yosys/ice40/cells_map.v:6.21-6.22" } }, - "spi_if_ins.o_cs_SB_LUT4_I2_1_O": { - "hide_name": 0, - "bits": [ 183 ], - "attributes": { - } - }, - "spi_if_ins.o_cs_SB_LUT4_I2_O": { - "hide_name": 0, - "bits": [ 181 ], - "attributes": { - } - }, "spi_if_ins.o_cs_SB_LUT4_I3_O": { "hide_name": 0, - "bits": [ 194, 106, 209 ], + "bits": [ 195, 117, 210 ], "attributes": { "force_downto": "00000000000000000000000000000001", "src": "/usr/local/bin/../share/yosys/ice40/cells_map.v:6.21-6.22" @@ -18321,7 +18396,7 @@ }, "spi_if_ins.o_data_in": { "hide_name": 0, - "bits": [ 59, 56, 70, 129, 127, 125, 123, 121 ], + "bits": [ 57, 54, 68, 128, 127, 125, 124, 122 ], "attributes": { "hdlname": "spi_if_ins o_data_in", "src": "top.v:92.11-108.5|spi_if.v:9.29-9.38" @@ -18329,13 +18404,13 @@ }, "spi_if_ins.o_data_in_SB_DFFE_Q_E": { "hide_name": 0, - "bits": [ 216 ], + "bits": [ 217 ], "attributes": { } }, "spi_if_ins.o_fetch_cmd": { "hide_name": 0, - "bits": [ 75 ], + "bits": [ 119 ], "attributes": { "hdlname": "spi_if_ins o_fetch_cmd", "src": "top.v:92.11-108.5|spi_if.v:12.29-12.40" @@ -18343,19 +18418,19 @@ }, "spi_if_ins.o_fetch_cmd_SB_DFFESR_Q_D": { "hide_name": 0, - "bits": [ 226 ], + "bits": [ 227 ], "attributes": { } }, "spi_if_ins.o_fetch_cmd_SB_DFFESR_Q_E": { "hide_name": 0, - "bits": [ 227 ], + "bits": [ 228 ], "attributes": { } }, "spi_if_ins.o_ioc": { "hide_name": 0, - "bits": [ 48, 50, 53, 52, 51 ], + "bits": [ 35, 51, 39, 50, 49 ], "attributes": { "hdlname": "spi_if_ins o_ioc", "src": "top.v:92.11-108.5|spi_if.v:8.29-8.34" @@ -18363,7 +18438,7 @@ }, "spi_if_ins.o_load_cmd": { "hide_name": 0, - "bits": [ 76 ], + "bits": [ 234 ], "attributes": { "hdlname": "spi_if_ins o_load_cmd", "src": "top.v:92.11-108.5|spi_if.v:13.29-13.39" @@ -18371,7 +18446,7 @@ }, "spi_if_ins.o_load_cmd_SB_DFFESR_Q_D": { "hide_name": 0, - "bits": [ 222, 215, 229, 225 ], + "bits": [ 230, 223 ], "attributes": { "force_downto": "00000000000000000000000000000001", "src": "/usr/local/bin/../share/yosys/ice40/cells_map.v:6.21-6.22" @@ -18379,7 +18454,7 @@ }, "spi_if_ins.o_load_cmd_SB_DFFESR_Q_D_SB_LUT4_I1_O": { "hide_name": 0, - "bits": [ 225, 230, 66 ], + "bits": [ 64, 231 ], "attributes": { "force_downto": "00000000000000000000000000000001", "src": "/usr/local/bin/../share/yosys/ice40/cells_map.v:6.21-6.22" @@ -18387,31 +18462,21 @@ }, "spi_if_ins.o_load_cmd_SB_DFFESR_Q_E": { "hide_name": 0, - "bits": [ 232 ], - "attributes": { - } - }, - "spi_if_ins.o_load_cmd_SB_LUT4_I3_1_O": { - "hide_name": 0, - "bits": [ 135 ], - "attributes": { - } - }, - "spi_if_ins.o_load_cmd_SB_LUT4_I3_2_O": { - "hide_name": 0, - "bits": [ 122 ], + "bits": [ 233 ], "attributes": { } }, "spi_if_ins.o_load_cmd_SB_LUT4_I3_O": { "hide_name": 0, - "bits": [ 130 ], + "bits": [ 202, 75 ], "attributes": { + "force_downto": "00000000000000000000000000000001", + "src": "/usr/local/bin/../share/yosys/ice40/cells_map.v:6.21-6.22" } }, "spi_if_ins.o_spi_miso": { "hide_name": 0, - "bits": [ 179 ], + "bits": [ 180 ], "attributes": { "hdlname": "spi_if_ins o_spi_miso", "src": "top.v:92.11-108.5|spi_if.v:17.29-17.39" @@ -18419,7 +18484,7 @@ }, "spi_if_ins.r_tx_byte": { "hide_name": 0, - "bits": [ 241, 240, 239, 238, 237, 236, 235, 234 ], + "bits": [ 243, 242, 241, 240, 239, 238, 237, 236 ], "attributes": { "hdlname": "spi_if_ins r_tx_byte", "src": "top.v:92.11-108.5|spi_if.v:32.17-32.26" @@ -18427,7 +18492,7 @@ }, "spi_if_ins.r_tx_data_valid": { "hide_name": 0, - "bits": [ 244 ], + "bits": [ 246 ], "attributes": { "hdlname": "spi_if_ins r_tx_data_valid", "src": "top.v:92.11-108.5|spi_if.v:31.17-31.32" @@ -18435,7 +18500,7 @@ }, "spi_if_ins.r_tx_data_valid_SB_DFFESR_Q_D": { "hide_name": 0, - "bits": [ 225, 242 ], + "bits": [ 224, 244 ], "attributes": { "force_downto": "00000000000000000000000000000001", "src": "/usr/local/bin/../share/yosys/ice40/cells_map.v:6.21-6.22" @@ -18443,19 +18508,35 @@ }, "spi_if_ins.r_tx_data_valid_SB_DFFESR_Q_D_SB_LUT4_I3_O": { "hide_name": 0, - "bits": [ 233 ], + "bits": [ 235 ], "attributes": { } }, "spi_if_ins.r_tx_data_valid_SB_DFFESR_Q_E": { "hide_name": 0, - "bits": [ 243 ], + "bits": [ 245 ], "attributes": { } }, "spi_if_ins.r_tx_data_valid_SB_LUT4_I3_O": { "hide_name": 0, - "bits": [ 245 ], + "bits": [ 251, 254, 236, 247 ], + "attributes": { + "force_downto": "00000000000000000000000000000001", + "src": "/usr/local/bin/../share/yosys/ice40/cells_map.v:6.21-6.22" + } + }, + "spi_if_ins.r_tx_data_valid_SB_LUT4_I3_O_SB_LUT4_O_1_I1": { + "hide_name": 0, + "bits": [ 252, 253, 250 ], + "attributes": { + "force_downto": "00000000000000000000000000000001", + "src": "/usr/local/bin/../share/yosys/ice40/cells_map.v:6.21-6.22" + } + }, + "spi_if_ins.r_tx_data_valid_SB_LUT4_I3_O_SB_LUT4_O_I1": { + "hide_name": 0, + "bits": [ 248, 249, 250 ], "attributes": { "force_downto": "00000000000000000000000000000001", "src": "/usr/local/bin/../share/yosys/ice40/cells_map.v:6.21-6.22" @@ -18463,7 +18544,7 @@ }, "spi_if_ins.spi.SCKr": { "hide_name": 0, - "bits": [ 248, 246, 247 ], + "bits": [ 267, 265, 266 ], "attributes": { "hdlname": "spi_if_ins spi SCKr", "src": "top.v:92.11-108.5|spi_slave.v:62.13-62.17|spi_if.v:42.15-54.6" @@ -18471,7 +18552,7 @@ }, "spi_if_ins.spi.SCKr_SB_LUT4_I0_O": { "hide_name": 0, - "bits": [ 266, 251, 245 ], + "bits": [ 250, 268, 247 ], "attributes": { "force_downto": "00000000000000000000000000000001", "src": "/usr/local/bin/../share/yosys/ice40/cells_map.v:6.21-6.22" @@ -18503,7 +18584,7 @@ }, "spi_if_ins.spi.i_sys_clk": { "hide_name": 0, - "bits": [ 55 ], + "bits": [ 53 ], "attributes": { "hdlname": "spi_if_ins spi i_sys_clk", "src": "top.v:92.11-108.5|spi_slave.v:5.23-5.32|spi_if.v:42.15-54.6" @@ -18511,7 +18592,7 @@ }, "spi_if_ins.spi.i_tx_byte": { "hide_name": 0, - "bits": [ 241, 240, 239, 238, 237, 236, 235, 234 ], + "bits": [ 243, 242, 241, 240, 239, 238, 237, 236 ], "attributes": { "hdlname": "spi_if_ins spi i_tx_byte", "src": "top.v:92.11-108.5|spi_slave.v:9.23-9.32|spi_if.v:42.15-54.6" @@ -18519,7 +18600,7 @@ }, "spi_if_ins.spi.i_tx_data_valid": { "hide_name": 0, - "bits": [ 244 ], + "bits": [ 246 ], "attributes": { "hdlname": "spi_if_ins spi i_tx_data_valid", "src": "top.v:92.11-108.5|spi_slave.v:8.23-8.38|spi_if.v:42.15-54.6" @@ -18527,7 +18608,7 @@ }, "spi_if_ins.spi.o_rx_byte": { "hide_name": 0, - "bits": [ 221, 220, 219, 218, 217, 213, 212, 215 ], + "bits": [ 222, 221, 220, 219, 218, 214, 213, 216 ], "attributes": { "hdlname": "spi_if_ins spi o_rx_byte", "src": "top.v:92.11-108.5|spi_slave.v:7.23-7.32|spi_if.v:42.15-54.6" @@ -18535,7 +18616,7 @@ }, "spi_if_ins.spi.o_rx_data_valid": { "hide_name": 0, - "bits": [ 225 ], + "bits": [ 224 ], "attributes": { "hdlname": "spi_if_ins spi o_rx_data_valid", "src": "top.v:92.11-108.5|spi_slave.v:6.23-6.38|spi_if.v:42.15-54.6" @@ -18543,7 +18624,7 @@ }, "spi_if_ins.spi.o_spi_miso": { "hide_name": 0, - "bits": [ 179 ], + "bits": [ 180 ], "attributes": { "hdlname": "spi_if_ins spi o_spi_miso", "src": "top.v:92.11-108.5|spi_slave.v:13.23-13.33|spi_if.v:42.15-54.6" @@ -18551,44 +18632,20 @@ }, "spi_if_ins.spi.o_spi_miso_SB_DFFE_Q_D": { "hide_name": 0, - "bits": [ 261 ], + "bits": [ 279 ], "attributes": { "src": "top.v:92.11-108.5|spi_slave.v:69.3-86.6|spi_if.v:42.15-54.6" } }, - "spi_if_ins.spi.o_spi_miso_SB_DFFE_Q_D_SB_LUT4_O_I2": { - "hide_name": 0, - "bits": [ 234, 263, 245 ], - "attributes": { - "force_downto": "00000000000000000000000000000001", - "src": "/usr/local/bin/../share/yosys/ice40/cells_map.v:6.21-6.22" - } - }, - "spi_if_ins.spi.o_spi_miso_SB_DFFE_Q_D_SB_LUT4_O_I2_SB_LUT4_O_I0": { - "hide_name": 0, - "bits": [ 264, 265, 266, 267 ], - "attributes": { - "force_downto": "00000000000000000000000000000001", - "src": "/usr/local/bin/../share/yosys/ice40/cells_map.v:6.21-6.22" - } - }, - "spi_if_ins.spi.o_spi_miso_SB_DFFE_Q_D_SB_LUT4_O_I2_SB_LUT4_O_I0_SB_LUT4_O_2_I0": { - "hide_name": 0, - "bits": [ 272, 273, 266, 249 ], - "attributes": { - "force_downto": "00000000000000000000000000000001", - "src": "/usr/local/bin/../share/yosys/ice40/cells_map.v:6.21-6.22" - } - }, "spi_if_ins.spi.o_spi_miso_SB_DFFE_Q_E": { "hide_name": 0, - "bits": [ 262 ], + "bits": [ 269 ], "attributes": { } }, "spi_if_ins.spi.r2_rx_done": { "hide_name": 0, - "bits": [ 279 ], + "bits": [ 281 ], "attributes": { "hdlname": "spi_if_ins spi r2_rx_done", "src": "top.v:92.11-108.5|spi_slave.v:22.7-22.17|spi_if.v:42.15-54.6" @@ -18596,7 +18653,7 @@ }, "spi_if_ins.spi.r3_rx_done": { "hide_name": 0, - "bits": [ 280 ], + "bits": [ 282 ], "attributes": { "hdlname": "spi_if_ins spi r3_rx_done", "src": "top.v:92.11-108.5|spi_slave.v:23.7-23.17|spi_if.v:42.15-54.6" @@ -18604,14 +18661,14 @@ }, "spi_if_ins.spi.r3_rx_done_SB_LUT4_I2_O": { "hide_name": 0, - "bits": [ 253 ], + "bits": [ 271 ], "attributes": { "src": "top.v:92.11-108.5|spi_slave.v:48.3-60.6|spi_if.v:42.15-54.6" } }, "spi_if_ins.spi.r_rx_bit_count": { "hide_name": 0, - "bits": [ 286, 284, 282 ], + "bits": [ 288, 286, 284 ], "attributes": { "hdlname": "spi_if_ins spi r_rx_bit_count", "src": "top.v:92.11-108.5|spi_slave.v:17.13-17.27|spi_if.v:42.15-54.6" @@ -18619,7 +18676,7 @@ }, "spi_if_ins.spi.r_rx_bit_count_SB_DFFR_Q_2_D": { "hide_name": 0, - "bits": [ 285, 284, 282 ], + "bits": [ 287, 286, 284 ], "attributes": { "force_downto": "00000000000000000000000000000001", "src": "top.v:92.11-108.5|spi_slave.v:34.25-34.43|spi_if.v:42.15-54.6|/usr/local/bin/../share/yosys/ice40/arith_map.v:33.23-33.24" @@ -18627,7 +18684,7 @@ }, "spi_if_ins.spi.r_rx_bit_count_SB_DFFR_Q_D": { "hide_name": 0, - "bits": [ 285, 283, 281 ], + "bits": [ 287, 285, 283 ], "attributes": { "force_downto": "00000000000000000000000000000001", "src": "top.v:92.11-108.5|spi_slave.v:34.25-34.43|spi_if.v:42.15-54.6|/usr/local/bin/../share/yosys/ice40/arith_map.v:33.26-33.27" @@ -18635,7 +18692,7 @@ }, "spi_if_ins.spi.r_rx_bit_count_SB_DFFR_Q_D_SB_LUT4_O_I3": { "hide_name": 0, - "bits": [ "0", 286, 287 ], + "bits": [ "0", 288, 289 ], "attributes": { "force_downto": "00000000000000000000000000000001", "src": "top.v:92.11-108.5|spi_slave.v:34.25-34.43|spi_if.v:42.15-54.6|/usr/local/bin/../share/yosys/ice40/arith_map.v:51.21-51.22" @@ -18643,7 +18700,7 @@ }, "spi_if_ins.spi.r_rx_byte": { "hide_name": 0, - "bits": [ 260, 259, 258, 257, 256, 255, 254, 252 ], + "bits": [ 278, 277, 276, 275, 274, 273, 272, 270 ], "attributes": { "hdlname": "spi_if_ins spi r_rx_byte", "src": "top.v:92.11-108.5|spi_slave.v:20.13-20.22|spi_if.v:42.15-54.6" @@ -18651,7 +18708,7 @@ }, "spi_if_ins.spi.r_rx_done": { "hide_name": 0, - "bits": [ 278 ], + "bits": [ 280 ], "attributes": { "hdlname": "spi_if_ins spi r_rx_done", "src": "top.v:92.11-108.5|spi_slave.v:21.7-21.16|spi_if.v:42.15-54.6" @@ -18659,7 +18716,7 @@ }, "spi_if_ins.spi.r_rx_done_SB_DFFER_Q_D": { "hide_name": 0, - "bits": [ 32, 296 ], + "bits": [ 32, 298 ], "attributes": { "force_downto": "00000000000000000000000000000001", "src": "/usr/local/bin/../share/yosys/ice40/cells_map.v:6.21-6.22" @@ -18667,19 +18724,19 @@ }, "spi_if_ins.spi.r_rx_done_SB_DFFER_Q_D_SB_LUT4_I3_O": { "hide_name": 0, - "bits": [ 289 ], + "bits": [ 291 ], "attributes": { } }, "spi_if_ins.spi.r_rx_done_SB_DFFER_Q_E": { "hide_name": 0, - "bits": [ 297 ], + "bits": [ 299 ], "attributes": { } }, "spi_if_ins.spi.r_temp_rx_byte": { "hide_name": 0, - "bits": [ 295, 294, 293, 292, 291, 290, 288, "x" ], + "bits": [ 297, 296, 295, 294, 293, 292, 290, "x" ], "attributes": { "hdlname": "spi_if_ins spi r_temp_rx_byte", "src": "top.v:92.11-108.5|spi_slave.v:19.13-19.27|spi_if.v:42.15-54.6" @@ -18687,7 +18744,7 @@ }, "spi_if_ins.spi.r_tx_bit_count": { "hide_name": 0, - "bits": [ 249, 266, 250 ], + "bits": [ 257, 250, 258 ], "attributes": { "hdlname": "spi_if_ins spi r_tx_bit_count", "src": "top.v:92.11-108.5|spi_slave.v:18.13-18.27|spi_if.v:42.15-54.6" @@ -18695,15 +18752,15 @@ }, "spi_if_ins.spi.r_tx_bit_count_SB_DFFESR_Q_D": { "hide_name": 0, - "bits": [ 298, 302, 301 ], + "bits": [ 300, 302, 304 ], "attributes": { "force_downto": "00000000000000000000000000000001", "src": "top.v:92.11-108.5|spi_slave.v:77.27-77.45|spi_if.v:42.15-54.6|/usr/local/bin/../share/yosys/ice40/arith_map.v:33.26-33.27" } }, - "spi_if_ins.spi.r_tx_bit_count_SB_DFFESR_Q_D_SB_LUT4_O_I3": { + "spi_if_ins.spi.r_tx_bit_count_SB_DFFESR_Q_D_SB_LUT4_O_1_I3": { "hide_name": 0, - "bits": [ "1", 249, 300 ], + "bits": [ "1", 257, 303 ], "attributes": { "force_downto": "00000000000000000000000000000001", "src": "top.v:92.11-108.5|spi_slave.v:77.27-77.45|spi_if.v:42.15-54.6|/usr/local/bin/../share/yosys/ice40/arith_map.v:51.21-51.22" @@ -18711,13 +18768,13 @@ }, "spi_if_ins.spi.r_tx_bit_count_SB_DFFESR_Q_R": { "hide_name": 0, - "bits": [ 299 ], + "bits": [ 301 ], "attributes": { } }, "spi_if_ins.spi.r_tx_byte": { "hide_name": 0, - "bits": [ 276, 274, 268, 270, 277, 275, 269, 271 ], + "bits": [ 263, 261, 255, 259, 264, 262, 256, 260 ], "attributes": { "hdlname": "spi_if_ins spi r_tx_byte", "src": "top.v:92.11-108.5|spi_slave.v:24.13-24.22|spi_if.v:42.15-54.6" @@ -18725,13 +18782,13 @@ }, "spi_if_ins.spi.r_tx_byte_SB_DFFESR_Q_E": { "hide_name": 0, - "bits": [ 303 ], + "bits": [ 305 ], "attributes": { } }, "spi_if_ins.state_if": { "hide_name": 0, - "bits": [ 224, 223, 222 ], + "bits": [ 225, 226, 223 ], "attributes": { "hdlname": "spi_if_ins state_if", "src": "top.v:92.11-108.5|spi_if.v:28.17-28.25" @@ -18739,7 +18796,15 @@ }, "spi_if_ins.state_if_SB_DFFESR_Q_1_D": { "hide_name": 0, - "bits": [ 225, 230, 231 ], + "bits": [ 224, 308 ], + "attributes": { + "force_downto": "00000000000000000000000000000001", + "src": "/usr/local/bin/../share/yosys/ice40/cells_map.v:6.21-6.22" + } + }, + "spi_if_ins.state_if_SB_DFFESR_Q_1_D_SB_LUT4_I3_O": { + "hide_name": 0, + "bits": [ 231, 232 ], "attributes": { "force_downto": "00000000000000000000000000000001", "src": "/usr/local/bin/../share/yosys/ice40/cells_map.v:6.21-6.22" @@ -18747,7 +18812,7 @@ }, "spi_if_ins.state_if_SB_DFFESR_Q_D": { "hide_name": 0, - "bits": [ 304, 215, 230, 225 ], + "bits": [ 306, 216, 308, 224 ], "attributes": { "force_downto": "00000000000000000000000000000001", "src": "/usr/local/bin/../share/yosys/ice40/cells_map.v:6.21-6.22" @@ -18755,26 +18820,26 @@ }, "spi_if_ins.state_if_SB_DFFESR_Q_R": { "hide_name": 0, - "bits": [ 228 ], + "bits": [ 229 ], "attributes": { } }, "spi_if_ins.state_if_SB_DFFE_Q_D": { "hide_name": 0, - "bits": [ 306 ], + "bits": [ 309 ], "attributes": { "src": "top.v:92.11-108.5|spi_if.v:56.5-111.8" } }, "spi_if_ins.state_if_SB_DFFE_Q_E": { "hide_name": 0, - "bits": [ 305 ], + "bits": [ 307 ], "attributes": { } }, "spi_if_ins.w_rx_data": { "hide_name": 0, - "bits": [ 221, 220, 219, 218, 217, 213, 212, 215 ], + "bits": [ 222, 221, 220, 219, 218, 214, 213, 216 ], "attributes": { "hdlname": "spi_if_ins w_rx_data", "src": "top.v:92.11-108.5|spi_if.v:30.17-30.26" @@ -18782,7 +18847,7 @@ }, "spi_if_ins.w_rx_data_valid": { "hide_name": 0, - "bits": [ 225 ], + "bits": [ 224 ], "attributes": { "hdlname": "spi_if_ins w_rx_data_valid", "src": "top.v:92.11-108.5|spi_if.v:29.17-29.32" @@ -18790,7 +18855,7 @@ }, "sys_ctrl_ins.i_cs": { "hide_name": 0, - "bits": [ 214 ], + "bits": [ 215 ], "attributes": { "hdlname": "sys_ctrl_ins i_cs", "src": "top.v:113.13-123.5|sys_ctrl.v:9.29-9.33" @@ -18798,7 +18863,7 @@ }, "sys_ctrl_ins.i_cs_SB_DFFE_Q_D": { "hide_name": 0, - "bits": [ 68, 324, 325, 326 ], + "bits": [ 66, 327, 328, 329 ], "attributes": { "force_downto": "00000000000000000000000000000001", "src": "top.v:92.11-108.5|spi_if.v:65.21-70.28|spi_if.v:0.0-0.0|/usr/local/bin/../share/yosys/techmap.v:575.21-575.22", @@ -18807,7 +18872,7 @@ }, "sys_ctrl_ins.i_data_in": { "hide_name": 0, - "bits": [ 59, 56, 70, 129, 127, 125, 123, 121 ], + "bits": [ 57, 54, 68, 128, 127, 125, 124, 122 ], "attributes": { "hdlname": "sys_ctrl_ins i_data_in", "src": "top.v:113.13-123.5|sys_ctrl.v:7.29-7.38" @@ -18815,7 +18880,7 @@ }, "sys_ctrl_ins.i_fetch_cmd": { "hide_name": 0, - "bits": [ 75 ], + "bits": [ 119 ], "attributes": { "hdlname": "sys_ctrl_ins i_fetch_cmd", "src": "top.v:113.13-123.5|sys_ctrl.v:10.29-10.40" @@ -18823,7 +18888,7 @@ }, "sys_ctrl_ins.i_ioc": { "hide_name": 0, - "bits": [ 48, 50, 53, 52, 51 ], + "bits": [ 35, 51, 39, 50, 49 ], "attributes": { "hdlname": "sys_ctrl_ins i_ioc", "src": "top.v:113.13-123.5|sys_ctrl.v:6.29-6.34" @@ -18831,7 +18896,7 @@ }, "sys_ctrl_ins.i_load_cmd": { "hide_name": 0, - "bits": [ 76 ], + "bits": [ 234 ], "attributes": { "hdlname": "sys_ctrl_ins i_load_cmd", "src": "top.v:113.13-123.5|sys_ctrl.v:11.29-11.39" @@ -18847,7 +18912,7 @@ }, "sys_ctrl_ins.i_sys_clk": { "hide_name": 0, - "bits": [ 55 ], + "bits": [ 53 ], "attributes": { "hdlname": "sys_ctrl_ins i_sys_clk", "src": "top.v:113.13-123.5|sys_ctrl.v:4.29-4.38" @@ -18863,63 +18928,92 @@ }, "w_clock_spi": { "hide_name": 0, - "bits": [ 55 ], + "bits": [ 53 ], "attributes": { "src": "top.v:67.16-67.27" } }, "w_clock_sys": { "hide_name": 0, - "bits": [ 55 ], + "bits": [ 53 ], "attributes": { "src": "top.v:68.16-68.27" } }, "w_cs": { "hide_name": 0, - "bits": [ 214, 67, 200, 211 ], + "bits": [ 215, 65, 201, 212 ], "attributes": { "src": "top.v:72.16-72.20" } }, "w_fetch": { "hide_name": 0, - "bits": [ 75 ], + "bits": [ 119 ], "attributes": { "src": "top.v:73.16-73.23" } }, "w_ioc": { "hide_name": 0, - "bits": [ 48, 50, 53, 52, 51 ], + "bits": [ 35, 51, 39, 50, 49 ], "attributes": { "src": "top.v:69.16-69.21" } }, "w_load": { "hide_name": 0, - "bits": [ 76 ], + "bits": [ 234 ], "attributes": { "src": "top.v:74.16-74.22" } }, "w_lvds_rx_09_d0": { "hide_name": 0, - "bits": [ 148 ], + "bits": [ 149 ], "attributes": { "src": "top.v:225.9-225.24" } }, "w_lvds_rx_09_d1": { "hide_name": 0, - "bits": [ 149 ], + "bits": [ 150 ], "attributes": { "src": "top.v:226.9-226.24" } }, "w_lvds_rx_09_d1_SB_LUT4_I0_O": { "hide_name": 0, - "bits": [ 174, 175, 153 ], + "bits": [ 179, 154 ], + "attributes": { + "force_downto": "00000000000000000000000000000001", + "src": "/usr/local/bin/../share/yosys/ice40/cells_map.v:6.21-6.22" + } + }, + "w_lvds_rx_09_d1_SB_LUT4_I0_O_SB_LUT4_O_I1": { + "hide_name": 0, + "bits": [ 168, 330, 331 ], + "attributes": { + "force_downto": "00000000000000000000000000000001", + "src": "top.v:246.12-255.5|lvds_rx.v:63.42-63.59|/usr/local/bin/../share/yosys/ice40/arith_map.v:33.26-33.27", + "unused_bits": "1 2" + } + }, + "w_lvds_rx_09_d1_SB_LUT4_I0_O_SB_LUT4_O_I1_SB_DFFNESR_Q_D": { + "hide_name": 0, + "bits": [ 310 ], + "attributes": { + } + }, + "w_lvds_rx_09_d1_SB_LUT4_I0_O_SB_LUT4_O_I1_SB_DFFNESR_Q_E": { + "hide_name": 0, + "bits": [ 170 ], + "attributes": { + } + }, + "w_lvds_rx_09_d1_SB_LUT4_I0_O_SB_LUT4_O_I2": { + "hide_name": 0, + "bits": [ 168, 176, 175, 177 ], "attributes": { "force_downto": "00000000000000000000000000000001", "src": "/usr/local/bin/../share/yosys/ice40/cells_map.v:6.21-6.22" @@ -18927,36 +19021,15 @@ }, "w_lvds_rx_09_d1_SB_LUT4_I3_I2": { "hide_name": 0, - "bits": [ 173, 172, 175, 149 ], + "bits": [ 177, 175, 178, 149 ], "attributes": { "force_downto": "00000000000000000000000000000001", "src": "/usr/local/bin/../share/yosys/ice40/cells_map.v:6.21-6.22" } }, - "w_lvds_rx_09_d1_SB_LUT4_I3_I2_SB_LUT4_O_I0": { - "hide_name": 0, - "bits": [ 169, 327, 328 ], - "attributes": { - "force_downto": "00000000000000000000000000000001", - "src": "top.v:246.12-255.5|lvds_rx.v:63.42-63.59|/usr/local/bin/../share/yosys/ice40/arith_map.v:33.26-33.27", - "unused_bits": "1 2" - } - }, - "w_lvds_rx_09_d1_SB_LUT4_I3_I2_SB_LUT4_O_I0_SB_DFFNESR_Q_D": { - "hide_name": 0, - "bits": [ 307 ], - "attributes": { - } - }, - "w_lvds_rx_09_d1_SB_LUT4_I3_I2_SB_LUT4_O_I0_SB_DFFNESR_Q_E": { - "hide_name": 0, - "bits": [ 167 ], - "attributes": { - } - }, "w_lvds_rx_09_d1_SB_LUT4_I3_O": { "hide_name": 0, - "bits": [ 152, 156, 158, 159, 160 ], + "bits": [ 153, 157, 159, 160, 161 ], "attributes": { "force_downto": "00000000000000000000000000000001", "src": "top.v:246.12-255.5|lvds_rx.v:47.13-78.20|lvds_rx.v:0.0-0.0|/usr/local/bin/../share/yosys/techmap.v:578.19-578.22" @@ -18964,7 +19037,7 @@ }, "w_rx_09_fifo_data": { "hide_name": 0, - "bits": [ 154, 157, 20, 21, 22 ], + "bits": [ 155, 158, 20, 21, 22 ], "attributes": { } }, @@ -18998,7 +19071,7 @@ }, "w_rx_09_fifo_write_clk": { "hide_name": 0, - "bits": [ 150 ], + "bits": [ 151 ], "attributes": { "src": "top.v:232.9-232.31" } @@ -19033,14 +19106,14 @@ }, "w_rx_24_fifo_write_clk": { "hide_name": 0, - "bits": [ 150 ], + "bits": [ 151 ], "attributes": { "src": "top.v:240.9-240.31" } }, "w_rx_data": { "hide_name": 0, - "bits": [ 59, 56, 70, 129, 127, 125, 123, 121 ], + "bits": [ 57, 54, 68, 128, 127, 125, 124, 122 ], "attributes": { "src": "top.v:70.16-70.25" } @@ -19049,40 +19122,47 @@ "hide_name": 0, "bits": [ "z", "0", "0", "0", "0", "0", "0", "0" ], "attributes": { - "src": "top.v:326.15-326.31" + "src": "top.v:325.15-325.31" + } + }, + "w_smi_data_output": { + "hide_name": 0, + "bits": [ "x", "x", "x", "x", "x", "x", "x", "x" ], + "attributes": { + "src": "top.v:324.15-324.32" } }, "w_smi_read_req": { "hide_name": 0, - "bits": [ "x" ], + "bits": [ "1" ], "attributes": { - "src": "top.v:327.9-327.23" + "src": "top.v:326.9-326.23" } }, "w_smi_write_req": { "hide_name": 0, "bits": [ "x" ], "attributes": { - "src": "top.v:328.9-328.24" + "src": "top.v:327.9-327.24" } }, "w_smi_writing": { "hide_name": 0, - "bits": [ "0" ], + "bits": [ "x" ], "attributes": { - "src": "top.v:329.9-329.22" + "src": "top.v:328.9-328.22" } }, "w_tx_data_io": { "hide_name": 0, - "bits": [ 120, 95, 98, 101, 103, 106, 111, 115 ], + "bits": [ 121, 96, 99, 101, 104, 108, 115, 117 ], "attributes": { "src": "top.v:78.16-78.28" } }, "w_tx_data_smi": { "hide_name": 0, - "bits": [ 205, 202, "0", 202 ], + "bits": [ 207, 204, "0", 204 ], "attributes": { } }, diff --git a/firmware/top.v b/firmware/top.v index d18e412..1289e0f 100644 --- a/firmware/top.v +++ b/firmware/top.v @@ -318,8 +318,7 @@ module top( .o_smi_data_out (w_smi_data_output), .i_smi_data_in (w_smi_data_input), .o_smi_read_req (w_smi_read_req), - .o_smi_write_req (w_smi_write_req), - .o_smi_writing (w_smi_writing) + .o_smi_write_req (w_smi_write_req) ); wire [7:0] w_smi_data_output; @@ -328,7 +327,7 @@ module top( wire w_smi_write_req; wire w_smi_writing; - assign io_smi_data = (w_smi_writing)?w_smi_data_output:1'bZ; + assign io_smi_data = (i_smi_a3)?1'bZ:w_smi_data_output; assign w_smi_data_input = io_smi_data; // Testing - output the clock signal (positive and negative) to the PMOD diff --git a/software/libcariboulite/src/caribou_fpga/build/CMakeCache.txt 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Try to identify the platform and guess that + it is the native compiler. */ +#elif defined(__hpux) || defined(__hpua) +# define COMPILER_ID "HP" + +#else /* unknown compiler */ +# define COMPILER_ID "" +#endif + +/* Construct the string literal in pieces to prevent the source from + getting matched. Store it in a pointer rather than an array + because some compilers will just produce instructions to fill the + array rather than assigning a pointer to a static array. */ +char const* info_compiler = "INFO" ":" "compiler[" COMPILER_ID "]"; +#ifdef SIMULATE_ID +char const* info_simulate = "INFO" ":" "simulate[" SIMULATE_ID "]"; +#endif + +#ifdef __QNXNTO__ +char const* qnxnto = "INFO" ":" "qnxnto[]"; +#endif + +#if defined(__CRAYXE) || defined(__CRAYXC) +char const *info_cray = "INFO" ":" "compiler_wrapper[CrayPrgEnv]"; +#endif + +#define STRINGIFY_HELPER(X) #X +#define STRINGIFY(X) STRINGIFY_HELPER(X) + +/* Identify known platforms by name. */ +#if defined(__linux) || defined(__linux__) || defined(linux) +# define PLATFORM_ID "Linux" + +#elif defined(__CYGWIN__) +# define PLATFORM_ID "Cygwin" + +#elif defined(__MINGW32__) +# define PLATFORM_ID "MinGW" + +#elif defined(__APPLE__) +# define PLATFORM_ID "Darwin" + +#elif defined(_WIN32) || defined(__WIN32__) || defined(WIN32) +# define PLATFORM_ID "Windows" + +#elif defined(__FreeBSD__) || defined(__FreeBSD) +# define PLATFORM_ID "FreeBSD" + +#elif defined(__NetBSD__) || defined(__NetBSD) +# define PLATFORM_ID "NetBSD" + +#elif defined(__OpenBSD__) || defined(__OPENBSD) +# define PLATFORM_ID "OpenBSD" + +#elif defined(__sun) || defined(sun) +# define PLATFORM_ID "SunOS" + +#elif defined(_AIX) || defined(__AIX) || defined(__AIX__) || defined(__aix) || defined(__aix__) +# define PLATFORM_ID "AIX" + +#elif defined(__hpux) || defined(__hpux__) +# define PLATFORM_ID "HP-UX" + +#elif defined(__HAIKU__) +# define PLATFORM_ID "Haiku" + +#elif defined(__BeOS) || defined(__BEOS__) || defined(_BEOS) +# define PLATFORM_ID "BeOS" + +#elif defined(__QNX__) || defined(__QNXNTO__) +# define PLATFORM_ID "QNX" + +#elif defined(__tru64) || defined(_tru64) || defined(__TRU64__) +# define PLATFORM_ID "Tru64" + +#elif defined(__riscos) || defined(__riscos__) +# define PLATFORM_ID "RISCos" + +#elif defined(__sinix) || defined(__sinix__) || defined(__SINIX__) +# define PLATFORM_ID "SINIX" + +#elif defined(__UNIX_SV__) +# define PLATFORM_ID "UNIX_SV" + +#elif defined(__bsdos__) +# define PLATFORM_ID "BSDOS" + +#elif defined(_MPRAS) || defined(MPRAS) +# define PLATFORM_ID "MP-RAS" + +#elif defined(__osf) || defined(__osf__) +# define PLATFORM_ID "OSF1" + +#elif defined(_SCO_SV) || defined(SCO_SV) || defined(sco_sv) +# define PLATFORM_ID "SCO_SV" + +#elif defined(__ultrix) || defined(__ultrix__) || defined(_ULTRIX) +# define PLATFORM_ID "ULTRIX" + +#elif defined(__XENIX__) || defined(_XENIX) || defined(XENIX) +# define PLATFORM_ID "Xenix" + +#elif defined(__WATCOMC__) +# if defined(__LINUX__) +# define PLATFORM_ID "Linux" + +# elif defined(__DOS__) +# define PLATFORM_ID "DOS" + +# elif defined(__OS2__) +# define PLATFORM_ID "OS2" + +# elif defined(__WINDOWS__) +# define PLATFORM_ID "Windows3x" + +# elif defined(__VXWORKS__) +# define PLATFORM_ID "VxWorks" + +# else /* unknown platform */ +# define PLATFORM_ID +# endif + +#elif defined(__INTEGRITY) +# if defined(INT_178B) +# define PLATFORM_ID "Integrity178" + +# else /* regular Integrity */ +# define PLATFORM_ID "Integrity" +# endif + +#else /* unknown platform */ +# define PLATFORM_ID + +#endif + +/* For windows compilers MSVC and Intel we can determine + the architecture of the compiler being used. This is because + the compilers do not have flags that can change the architecture, + but rather depend on which compiler is being used +*/ +#if defined(_WIN32) && defined(_MSC_VER) +# if defined(_M_IA64) +# define ARCHITECTURE_ID "IA64" + +# elif defined(_M_X64) || defined(_M_AMD64) +# define ARCHITECTURE_ID "x64" + +# elif defined(_M_IX86) +# define ARCHITECTURE_ID "X86" + +# elif defined(_M_ARM64) +# define ARCHITECTURE_ID "ARM64" + +# elif defined(_M_ARM) +# if _M_ARM == 4 +# define ARCHITECTURE_ID "ARMV4I" +# elif _M_ARM == 5 +# define ARCHITECTURE_ID "ARMV5I" +# else +# define ARCHITECTURE_ID "ARMV" STRINGIFY(_M_ARM) +# endif + +# elif defined(_M_MIPS) +# define ARCHITECTURE_ID "MIPS" + +# elif defined(_M_SH) +# define ARCHITECTURE_ID "SHx" + +# else /* unknown architecture */ +# define ARCHITECTURE_ID "" +# endif + +#elif defined(__WATCOMC__) +# if defined(_M_I86) +# define ARCHITECTURE_ID "I86" + +# elif defined(_M_IX86) +# define ARCHITECTURE_ID "X86" + +# else /* unknown architecture */ +# define ARCHITECTURE_ID "" +# endif + +#elif defined(__IAR_SYSTEMS_ICC__) || defined(__IAR_SYSTEMS_ICC) +# if defined(__ICCARM__) +# define ARCHITECTURE_ID "ARM" + +# elif defined(__ICCRX__) +# define ARCHITECTURE_ID "RX" + +# elif defined(__ICCRH850__) +# define ARCHITECTURE_ID "RH850" + +# elif defined(__ICCRL78__) +# define ARCHITECTURE_ID "RL78" + +# elif defined(__ICCRISCV__) +# define ARCHITECTURE_ID "RISCV" + +# elif defined(__ICCAVR__) +# define ARCHITECTURE_ID "AVR" + +# elif defined(__ICC430__) +# define ARCHITECTURE_ID "MSP430" + +# elif defined(__ICCV850__) +# define ARCHITECTURE_ID "V850" + +# elif defined(__ICC8051__) +# define ARCHITECTURE_ID "8051" + +# else /* unknown architecture */ +# define ARCHITECTURE_ID "" +# endif + +#elif defined(__ghs__) +# if defined(__PPC64__) +# define ARCHITECTURE_ID "PPC64" + +# elif defined(__ppc__) +# define ARCHITECTURE_ID "PPC" + +# elif defined(__ARM__) +# define ARCHITECTURE_ID "ARM" + +# elif defined(__x86_64__) +# define ARCHITECTURE_ID "x64" + +# elif defined(__i386__) +# define ARCHITECTURE_ID "X86" + +# else /* unknown architecture */ +# define ARCHITECTURE_ID "" +# endif +#else +# define ARCHITECTURE_ID +#endif + +/* Convert integer to decimal digit literals. */ +#define DEC(n) \ + ('0' + (((n) / 10000000)%10)), \ + ('0' + (((n) / 1000000)%10)), \ + ('0' + (((n) / 100000)%10)), \ + ('0' + (((n) / 10000)%10)), \ + ('0' + (((n) / 1000)%10)), \ + ('0' + (((n) / 100)%10)), \ + ('0' + (((n) / 10)%10)), \ + ('0' + ((n) % 10)) + +/* Convert integer to hex digit literals. */ +#define HEX(n) \ + ('0' + ((n)>>28 & 0xF)), \ + ('0' + ((n)>>24 & 0xF)), \ + ('0' + ((n)>>20 & 0xF)), \ + ('0' + ((n)>>16 & 0xF)), \ + ('0' + ((n)>>12 & 0xF)), \ + ('0' + ((n)>>8 & 0xF)), \ + ('0' + ((n)>>4 & 0xF)), \ + ('0' + ((n) & 0xF)) + +/* Construct a string literal encoding the version number components. */ +#ifdef COMPILER_VERSION_MAJOR +char const info_version[] = { + 'I', 'N', 'F', 'O', ':', + 'c','o','m','p','i','l','e','r','_','v','e','r','s','i','o','n','[', + COMPILER_VERSION_MAJOR, +# ifdef COMPILER_VERSION_MINOR + '.', COMPILER_VERSION_MINOR, +# ifdef COMPILER_VERSION_PATCH + '.', COMPILER_VERSION_PATCH, +# ifdef COMPILER_VERSION_TWEAK + '.', COMPILER_VERSION_TWEAK, +# endif +# endif +# endif + ']','\0'}; +#endif + +/* Construct a string literal encoding the internal version number. */ +#ifdef COMPILER_VERSION_INTERNAL +char const info_version_internal[] = { + 'I', 'N', 'F', 'O', ':', + 'c','o','m','p','i','l','e','r','_','v','e','r','s','i','o','n','_', + 'i','n','t','e','r','n','a','l','[', + COMPILER_VERSION_INTERNAL,']','\0'}; +#endif + +/* Construct a string literal encoding the version number components. */ +#ifdef SIMULATE_VERSION_MAJOR +char const info_simulate_version[] = { + 'I', 'N', 'F', 'O', ':', + 's','i','m','u','l','a','t','e','_','v','e','r','s','i','o','n','[', + SIMULATE_VERSION_MAJOR, +# ifdef SIMULATE_VERSION_MINOR + '.', SIMULATE_VERSION_MINOR, +# ifdef SIMULATE_VERSION_PATCH + '.', SIMULATE_VERSION_PATCH, +# ifdef SIMULATE_VERSION_TWEAK + '.', SIMULATE_VERSION_TWEAK, +# endif +# endif +# endif + ']','\0'}; +#endif + +/* Construct the string literal in pieces to prevent the source from + getting matched. Store it in a pointer rather than an array + because some compilers will just produce instructions to fill the + array rather than assigning a pointer to a static array. */ +char const* info_platform = "INFO" ":" "platform[" PLATFORM_ID "]"; +char const* info_arch = "INFO" ":" "arch[" ARCHITECTURE_ID "]"; + + + + +#if !defined(__STDC__) +# if (defined(_MSC_VER) && !defined(__clang__)) \ + || (defined(__ibmxl__) || defined(__IBMC__)) +# define C_DIALECT "90" +# else +# define C_DIALECT +# endif +#elif __STDC_VERSION__ >= 201000L +# define C_DIALECT "11" +#elif __STDC_VERSION__ >= 199901L +# define C_DIALECT "99" +#else +# define C_DIALECT "90" +#endif +const char* info_language_dialect_default = + "INFO" ":" "dialect_default[" C_DIALECT "]"; + +/*--------------------------------------------------------------------------*/ + +#ifdef ID_VOID_MAIN +void main() {} +#else +# if defined(__CLASSIC_C__) +int main(argc, argv) int argc; char *argv[]; +# else +int main(int argc, char* argv[]) +# endif +{ + int require = 0; + require += info_compiler[argc]; + require += info_platform[argc]; + require += info_arch[argc]; +#ifdef COMPILER_VERSION_MAJOR + require += info_version[argc]; +#endif +#ifdef COMPILER_VERSION_INTERNAL + require += info_version_internal[argc]; +#endif +#ifdef SIMULATE_ID + require += info_simulate[argc]; +#endif +#ifdef SIMULATE_VERSION_MAJOR + require += info_simulate_version[argc]; +#endif +#if defined(__CRAYXE) || defined(__CRAYXC) + require += info_cray[argc]; +#endif + require += info_language_dialect_default[argc]; + (void)argv; + return require; +} +#endif diff --git a/software/libcariboulite/src/caribou_fpga/build/CMakeFiles/3.18.4/CompilerIdCXX/CMakeCXXCompilerId.cpp b/software/libcariboulite/src/caribou_fpga/build/CMakeFiles/3.18.4/CompilerIdCXX/CMakeCXXCompilerId.cpp new file mode 100644 index 0000000..37c21ca --- /dev/null +++ b/software/libcariboulite/src/caribou_fpga/build/CMakeFiles/3.18.4/CompilerIdCXX/CMakeCXXCompilerId.cpp @@ -0,0 +1,663 @@ +/* This source file must have a .cpp extension so that all C++ compilers + recognize the extension without flags. Borland does not know .cxx for + example. */ +#ifndef __cplusplus +# error "A C compiler has been selected for C++." +#endif + + +/* Version number components: V=Version, R=Revision, P=Patch + Version date components: YYYY=Year, MM=Month, DD=Day */ + +#if defined(__COMO__) +# define COMPILER_ID "Comeau" + /* __COMO_VERSION__ = VRR */ +# define COMPILER_VERSION_MAJOR DEC(__COMO_VERSION__ / 100) +# define COMPILER_VERSION_MINOR DEC(__COMO_VERSION__ % 100) + +#elif defined(__INTEL_COMPILER) || defined(__ICC) +# define COMPILER_ID "Intel" +# if defined(_MSC_VER) +# define SIMULATE_ID "MSVC" +# endif +# if defined(__GNUC__) +# define SIMULATE_ID "GNU" +# endif + /* __INTEL_COMPILER = VRP */ +# define COMPILER_VERSION_MAJOR DEC(__INTEL_COMPILER/100) +# define COMPILER_VERSION_MINOR DEC(__INTEL_COMPILER/10 % 10) +# if defined(__INTEL_COMPILER_UPDATE) +# define COMPILER_VERSION_PATCH DEC(__INTEL_COMPILER_UPDATE) +# else +# define COMPILER_VERSION_PATCH DEC(__INTEL_COMPILER % 10) +# endif +# if defined(__INTEL_COMPILER_BUILD_DATE) + /* __INTEL_COMPILER_BUILD_DATE = YYYYMMDD */ +# define COMPILER_VERSION_TWEAK DEC(__INTEL_COMPILER_BUILD_DATE) +# endif +# if defined(_MSC_VER) + /* _MSC_VER = VVRR */ +# define SIMULATE_VERSION_MAJOR DEC(_MSC_VER / 100) +# define SIMULATE_VERSION_MINOR DEC(_MSC_VER % 100) +# endif +# if defined(__GNUC__) +# define SIMULATE_VERSION_MAJOR DEC(__GNUC__) +# elif defined(__GNUG__) +# define SIMULATE_VERSION_MAJOR DEC(__GNUG__) +# endif +# if defined(__GNUC_MINOR__) +# define SIMULATE_VERSION_MINOR DEC(__GNUC_MINOR__) +# endif +# if defined(__GNUC_PATCHLEVEL__) +# define SIMULATE_VERSION_PATCH DEC(__GNUC_PATCHLEVEL__) +# endif + +#elif defined(__PATHCC__) +# define COMPILER_ID "PathScale" +# define COMPILER_VERSION_MAJOR DEC(__PATHCC__) +# define COMPILER_VERSION_MINOR DEC(__PATHCC_MINOR__) +# if defined(__PATHCC_PATCHLEVEL__) +# define COMPILER_VERSION_PATCH DEC(__PATHCC_PATCHLEVEL__) +# endif + +#elif defined(__BORLANDC__) && defined(__CODEGEARC_VERSION__) +# define COMPILER_ID "Embarcadero" +# define COMPILER_VERSION_MAJOR HEX(__CODEGEARC_VERSION__>>24 & 0x00FF) +# define COMPILER_VERSION_MINOR HEX(__CODEGEARC_VERSION__>>16 & 0x00FF) +# define COMPILER_VERSION_PATCH DEC(__CODEGEARC_VERSION__ & 0xFFFF) + +#elif defined(__BORLANDC__) +# define COMPILER_ID "Borland" + /* __BORLANDC__ = 0xVRR */ +# define COMPILER_VERSION_MAJOR HEX(__BORLANDC__>>8) +# define COMPILER_VERSION_MINOR HEX(__BORLANDC__ & 0xFF) + +#elif defined(__WATCOMC__) && __WATCOMC__ < 1200 +# define COMPILER_ID "Watcom" + /* __WATCOMC__ = VVRR */ +# define COMPILER_VERSION_MAJOR DEC(__WATCOMC__ / 100) +# define COMPILER_VERSION_MINOR DEC((__WATCOMC__ / 10) % 10) +# if (__WATCOMC__ % 10) > 0 +# define COMPILER_VERSION_PATCH DEC(__WATCOMC__ % 10) +# endif + +#elif defined(__WATCOMC__) +# define COMPILER_ID "OpenWatcom" + /* __WATCOMC__ = VVRP + 1100 */ +# define COMPILER_VERSION_MAJOR DEC((__WATCOMC__ - 1100) / 100) +# define COMPILER_VERSION_MINOR DEC((__WATCOMC__ / 10) % 10) +# if (__WATCOMC__ % 10) > 0 +# define COMPILER_VERSION_PATCH DEC(__WATCOMC__ % 10) +# endif + +#elif defined(__SUNPRO_CC) +# define COMPILER_ID "SunPro" +# if __SUNPRO_CC >= 0x5100 + /* __SUNPRO_CC = 0xVRRP */ +# define COMPILER_VERSION_MAJOR HEX(__SUNPRO_CC>>12) +# define COMPILER_VERSION_MINOR HEX(__SUNPRO_CC>>4 & 0xFF) +# define COMPILER_VERSION_PATCH HEX(__SUNPRO_CC & 0xF) +# else + /* __SUNPRO_CC = 0xVRP */ +# define COMPILER_VERSION_MAJOR HEX(__SUNPRO_CC>>8) +# define COMPILER_VERSION_MINOR HEX(__SUNPRO_CC>>4 & 0xF) +# define COMPILER_VERSION_PATCH HEX(__SUNPRO_CC & 0xF) +# endif + +#elif defined(__HP_aCC) +# define COMPILER_ID "HP" + /* __HP_aCC = VVRRPP */ +# define COMPILER_VERSION_MAJOR DEC(__HP_aCC/10000) +# define COMPILER_VERSION_MINOR DEC(__HP_aCC/100 % 100) +# define COMPILER_VERSION_PATCH DEC(__HP_aCC % 100) + +#elif defined(__DECCXX) +# define COMPILER_ID "Compaq" + /* __DECCXX_VER = VVRRTPPPP */ +# define COMPILER_VERSION_MAJOR DEC(__DECCXX_VER/10000000) +# define COMPILER_VERSION_MINOR DEC(__DECCXX_VER/100000 % 100) +# define COMPILER_VERSION_PATCH DEC(__DECCXX_VER % 10000) + +#elif defined(__IBMCPP__) && defined(__COMPILER_VER__) +# define COMPILER_ID "zOS" + /* __IBMCPP__ = VRP */ +# define COMPILER_VERSION_MAJOR DEC(__IBMCPP__/100) +# define COMPILER_VERSION_MINOR DEC(__IBMCPP__/10 % 10) +# define COMPILER_VERSION_PATCH DEC(__IBMCPP__ % 10) + +#elif defined(__ibmxl__) && defined(__clang__) +# define COMPILER_ID "XLClang" +# define COMPILER_VERSION_MAJOR DEC(__ibmxl_version__) +# define COMPILER_VERSION_MINOR DEC(__ibmxl_release__) +# define COMPILER_VERSION_PATCH DEC(__ibmxl_modification__) +# define COMPILER_VERSION_TWEAK DEC(__ibmxl_ptf_fix_level__) + + +#elif defined(__IBMCPP__) && !defined(__COMPILER_VER__) && __IBMCPP__ >= 800 +# define COMPILER_ID "XL" + /* __IBMCPP__ = VRP */ +# define COMPILER_VERSION_MAJOR DEC(__IBMCPP__/100) +# define COMPILER_VERSION_MINOR DEC(__IBMCPP__/10 % 10) +# define COMPILER_VERSION_PATCH DEC(__IBMCPP__ % 10) + +#elif defined(__IBMCPP__) && !defined(__COMPILER_VER__) && __IBMCPP__ < 800 +# define COMPILER_ID "VisualAge" + /* __IBMCPP__ = VRP */ +# define COMPILER_VERSION_MAJOR DEC(__IBMCPP__/100) +# define COMPILER_VERSION_MINOR DEC(__IBMCPP__/10 % 10) +# define COMPILER_VERSION_PATCH DEC(__IBMCPP__ % 10) + +#elif defined(__PGI) +# define COMPILER_ID "PGI" +# define COMPILER_VERSION_MAJOR DEC(__PGIC__) +# define COMPILER_VERSION_MINOR DEC(__PGIC_MINOR__) +# if defined(__PGIC_PATCHLEVEL__) +# define COMPILER_VERSION_PATCH DEC(__PGIC_PATCHLEVEL__) +# endif + +#elif defined(_CRAYC) +# define COMPILER_ID "Cray" +# define COMPILER_VERSION_MAJOR DEC(_RELEASE_MAJOR) +# define COMPILER_VERSION_MINOR DEC(_RELEASE_MINOR) + +#elif defined(__TI_COMPILER_VERSION__) +# define COMPILER_ID "TI" + /* __TI_COMPILER_VERSION__ = VVVRRRPPP */ +# define COMPILER_VERSION_MAJOR DEC(__TI_COMPILER_VERSION__/1000000) +# define COMPILER_VERSION_MINOR DEC(__TI_COMPILER_VERSION__/1000 % 1000) +# define COMPILER_VERSION_PATCH DEC(__TI_COMPILER_VERSION__ % 1000) + +#elif defined(__FUJITSU) || defined(__FCC_VERSION) || defined(__fcc_version) +# define COMPILER_ID "Fujitsu" + +#elif defined(__ghs__) +# define COMPILER_ID "GHS" +/* __GHS_VERSION_NUMBER = VVVVRP */ +# ifdef __GHS_VERSION_NUMBER +# define COMPILER_VERSION_MAJOR DEC(__GHS_VERSION_NUMBER / 100) +# define COMPILER_VERSION_MINOR DEC(__GHS_VERSION_NUMBER / 10 % 10) +# define COMPILER_VERSION_PATCH DEC(__GHS_VERSION_NUMBER % 10) +# endif + +#elif defined(__SCO_VERSION__) +# define COMPILER_ID "SCO" + +#elif defined(__ARMCC_VERSION) && !defined(__clang__) +# define COMPILER_ID "ARMCC" +#if __ARMCC_VERSION >= 1000000 + /* __ARMCC_VERSION = VRRPPPP */ + # define COMPILER_VERSION_MAJOR DEC(__ARMCC_VERSION/1000000) + # define COMPILER_VERSION_MINOR DEC(__ARMCC_VERSION/10000 % 100) + # define COMPILER_VERSION_PATCH DEC(__ARMCC_VERSION % 10000) +#else + /* __ARMCC_VERSION = VRPPPP */ + # define COMPILER_VERSION_MAJOR DEC(__ARMCC_VERSION/100000) + # define COMPILER_VERSION_MINOR DEC(__ARMCC_VERSION/10000 % 10) + # define COMPILER_VERSION_PATCH DEC(__ARMCC_VERSION % 10000) +#endif + + +#elif defined(__clang__) && defined(__apple_build_version__) +# define COMPILER_ID "AppleClang" +# if defined(_MSC_VER) +# define SIMULATE_ID "MSVC" +# endif +# define COMPILER_VERSION_MAJOR DEC(__clang_major__) +# define COMPILER_VERSION_MINOR DEC(__clang_minor__) +# define COMPILER_VERSION_PATCH DEC(__clang_patchlevel__) +# if defined(_MSC_VER) + /* _MSC_VER = VVRR */ +# define SIMULATE_VERSION_MAJOR DEC(_MSC_VER / 100) +# define SIMULATE_VERSION_MINOR DEC(_MSC_VER % 100) +# endif +# define COMPILER_VERSION_TWEAK DEC(__apple_build_version__) + +#elif defined(__clang__) && defined(__ARMCOMPILER_VERSION) +# define COMPILER_ID "ARMClang" + # define COMPILER_VERSION_MAJOR DEC(__ARMCOMPILER_VERSION/1000000) + # define COMPILER_VERSION_MINOR DEC(__ARMCOMPILER_VERSION/10000 % 100) + # define COMPILER_VERSION_PATCH DEC(__ARMCOMPILER_VERSION % 10000) +# define COMPILER_VERSION_INTERNAL DEC(__ARMCOMPILER_VERSION) + +#elif defined(__clang__) +# define COMPILER_ID "Clang" +# if defined(_MSC_VER) +# define SIMULATE_ID "MSVC" +# endif +# define COMPILER_VERSION_MAJOR DEC(__clang_major__) +# define COMPILER_VERSION_MINOR DEC(__clang_minor__) +# define COMPILER_VERSION_PATCH DEC(__clang_patchlevel__) +# if defined(_MSC_VER) + /* _MSC_VER = VVRR */ +# define SIMULATE_VERSION_MAJOR DEC(_MSC_VER / 100) +# define SIMULATE_VERSION_MINOR DEC(_MSC_VER % 100) +# endif + +#elif defined(__GNUC__) || defined(__GNUG__) +# define COMPILER_ID "GNU" +# if defined(__GNUC__) +# define COMPILER_VERSION_MAJOR DEC(__GNUC__) +# else +# define COMPILER_VERSION_MAJOR DEC(__GNUG__) +# endif +# if defined(__GNUC_MINOR__) +# define COMPILER_VERSION_MINOR DEC(__GNUC_MINOR__) +# endif +# if defined(__GNUC_PATCHLEVEL__) +# define COMPILER_VERSION_PATCH DEC(__GNUC_PATCHLEVEL__) +# endif + +#elif defined(_MSC_VER) +# define COMPILER_ID "MSVC" + /* _MSC_VER = VVRR */ +# define COMPILER_VERSION_MAJOR DEC(_MSC_VER / 100) +# define COMPILER_VERSION_MINOR DEC(_MSC_VER % 100) +# if defined(_MSC_FULL_VER) +# if _MSC_VER >= 1400 + /* _MSC_FULL_VER = VVRRPPPPP */ +# define COMPILER_VERSION_PATCH DEC(_MSC_FULL_VER % 100000) +# else + /* _MSC_FULL_VER = VVRRPPPP */ +# define COMPILER_VERSION_PATCH DEC(_MSC_FULL_VER % 10000) +# endif +# endif +# if defined(_MSC_BUILD) +# define COMPILER_VERSION_TWEAK DEC(_MSC_BUILD) +# endif + +#elif defined(__VISUALDSPVERSION__) || defined(__ADSPBLACKFIN__) || defined(__ADSPTS__) || defined(__ADSP21000__) +# define COMPILER_ID "ADSP" +#if defined(__VISUALDSPVERSION__) + /* __VISUALDSPVERSION__ = 0xVVRRPP00 */ +# define COMPILER_VERSION_MAJOR HEX(__VISUALDSPVERSION__>>24) +# define COMPILER_VERSION_MINOR HEX(__VISUALDSPVERSION__>>16 & 0xFF) +# define COMPILER_VERSION_PATCH HEX(__VISUALDSPVERSION__>>8 & 0xFF) +#endif + +#elif defined(__IAR_SYSTEMS_ICC__) || defined(__IAR_SYSTEMS_ICC) +# define COMPILER_ID "IAR" +# if defined(__VER__) && defined(__ICCARM__) +# define COMPILER_VERSION_MAJOR DEC((__VER__) / 1000000) +# define COMPILER_VERSION_MINOR DEC(((__VER__) / 1000) % 1000) +# define COMPILER_VERSION_PATCH DEC((__VER__) % 1000) +# define COMPILER_VERSION_INTERNAL DEC(__IAR_SYSTEMS_ICC__) +# elif defined(__VER__) && (defined(__ICCAVR__) || defined(__ICCRX__) || defined(__ICCRH850__) || defined(__ICCRL78__) || defined(__ICC430__) || defined(__ICCRISCV__) || defined(__ICCV850__) || defined(__ICC8051__)) +# define COMPILER_VERSION_MAJOR DEC((__VER__) / 100) +# define COMPILER_VERSION_MINOR DEC((__VER__) - (((__VER__) / 100)*100)) +# define COMPILER_VERSION_PATCH DEC(__SUBVERSION__) +# define COMPILER_VERSION_INTERNAL DEC(__IAR_SYSTEMS_ICC__) +# endif + + +/* These compilers are either not known or too old to define an + identification macro. Try to identify the platform and guess that + it is the native compiler. */ +#elif defined(__hpux) || defined(__hpua) +# define COMPILER_ID "HP" + +#else /* unknown compiler */ +# define COMPILER_ID "" +#endif + +/* Construct the string literal in pieces to prevent the source from + getting matched. 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test_caribou_fpga" + @echo "... caribou_fpga.o" + @echo "... caribou_fpga.i" + @echo "... caribou_fpga.s" + @echo "... test_caribou_fpga.o" + @echo "... test_caribou_fpga.i" + @echo "... test_caribou_fpga.s" +.PHONY : help + + + +#============================================================================= +# Special targets to cleanup operation of make. + +# Special rule to run CMake to check the build system integrity. +# No rule that depends on this can have commands that come from listfiles +# because they might be regenerated. +cmake_check_build_system: + $(CMAKE_COMMAND) -S$(CMAKE_SOURCE_DIR) -B$(CMAKE_BINARY_DIR) --check-build-system CMakeFiles/Makefile.cmake 0 +.PHONY : cmake_check_build_system + diff --git a/software/libcariboulite/src/caribou_fpga/build/cmake_install.cmake b/software/libcariboulite/src/caribou_fpga/build/cmake_install.cmake new file mode 100644 index 0000000..fe60c98 --- /dev/null +++ b/software/libcariboulite/src/caribou_fpga/build/cmake_install.cmake @@ -0,0 +1,66 @@ +# Install script for directory: /home/pi/projects/cariboulite/software/libcariboulite/src/caribou_fpga + +# Set the install prefix +if(NOT DEFINED CMAKE_INSTALL_PREFIX) + set(CMAKE_INSTALL_PREFIX "/usr/local") +endif() +string(REGEX REPLACE "/$" "" CMAKE_INSTALL_PREFIX "${CMAKE_INSTALL_PREFIX}") + +# Set the install configuration name. +if(NOT DEFINED CMAKE_INSTALL_CONFIG_NAME) + if(BUILD_TYPE) + string(REGEX REPLACE "^[^A-Za-z0-9_]+" "" + CMAKE_INSTALL_CONFIG_NAME "${BUILD_TYPE}") + else() + set(CMAKE_INSTALL_CONFIG_NAME "Release") + endif() + message(STATUS "Install configuration: \"${CMAKE_INSTALL_CONFIG_NAME}\"") +endif() + +# Set the component getting installed. +if(NOT CMAKE_INSTALL_COMPONENT) + if(COMPONENT) + message(STATUS "Install component: \"${COMPONENT}\"") + set(CMAKE_INSTALL_COMPONENT "${COMPONENT}") + else() + set(CMAKE_INSTALL_COMPONENT) + endif() +endif() + +# Install shared libraries without execute permission? +if(NOT DEFINED CMAKE_INSTALL_SO_NO_EXE) + set(CMAKE_INSTALL_SO_NO_EXE "1") +endif() + +# Is this installation the result of a crosscompile? +if(NOT DEFINED CMAKE_CROSSCOMPILING) + set(CMAKE_CROSSCOMPILING "FALSE") +endif() + +# Set default install directory permissions. +if(NOT DEFINED CMAKE_OBJDUMP) + set(CMAKE_OBJDUMP "/usr/bin/objdump") +endif() + +if("x${CMAKE_INSTALL_COMPONENT}x" STREQUAL "xUnspecifiedx" OR NOT CMAKE_INSTALL_COMPONENT) + list(APPEND CMAKE_ABSOLUTE_DESTINATION_FILES + "/usr/lib/libcaribou_fpga.a") + if(CMAKE_WARN_ON_ABSOLUTE_INSTALL_DESTINATION) + message(WARNING "ABSOLUTE path INSTALL DESTINATION : ${CMAKE_ABSOLUTE_DESTINATION_FILES}") + endif() + if(CMAKE_ERROR_ON_ABSOLUTE_INSTALL_DESTINATION) + message(FATAL_ERROR "ABSOLUTE path INSTALL DESTINATION forbidden (by caller): ${CMAKE_ABSOLUTE_DESTINATION_FILES}") + endif() +file(INSTALL DESTINATION "/usr/lib" TYPE STATIC_LIBRARY FILES "/home/pi/projects/cariboulite/software/libcariboulite/src/caribou_fpga/build/libcaribou_fpga.a") +endif() + +if(CMAKE_INSTALL_COMPONENT) + set(CMAKE_INSTALL_MANIFEST "install_manifest_${CMAKE_INSTALL_COMPONENT}.txt") +else() + set(CMAKE_INSTALL_MANIFEST "install_manifest.txt") +endif() + +string(REPLACE ";" "\n" CMAKE_INSTALL_MANIFEST_CONTENT + "${CMAKE_INSTALL_MANIFEST_FILES}") +file(WRITE "/home/pi/projects/cariboulite/software/libcariboulite/src/caribou_fpga/build/${CMAKE_INSTALL_MANIFEST}" + "${CMAKE_INSTALL_MANIFEST_CONTENT}") diff --git a/software/libcariboulite/src/caribou_fpga/build/test_caribou_fpga b/software/libcariboulite/src/caribou_fpga/build/test_caribou_fpga new file mode 100755 index 0000000..17981ec Binary files /dev/null and b/software/libcariboulite/src/caribou_fpga/build/test_caribou_fpga differ diff --git a/software/libcariboulite/src/caribou_fpga/test_caribou_fpga.c b/software/libcariboulite/src/caribou_fpga/test_caribou_fpga.c index 8254f52..07b99e7 100644 --- a/software/libcariboulite/src/caribou_fpga/test_caribou_fpga.c +++ b/software/libcariboulite/src/caribou_fpga/test_caribou_fpga.c @@ -41,36 +41,103 @@ int main () // init fpga comm caribou_fpga_init(&dev, &io_spi_dev); + // get versions + caribou_fpga_versions_st versions = {0}; + caribou_fpga_get_versions (&dev, &versions); + printf("VERSIONS: sys: 0x%02X, manu: 0x%02X, sys_ctrl: 0x%02X, io_ctrl: 0x%02X, smi_ctrl: 0x%02X\n", + versions.sys_ver, + versions.sys_manu_id, + versions.sys_ctrl_mod_ver, + versions.io_ctrl_mod_ver, + versions.smi_ctrl_mod_ver); + + // get errors + uint8_t err_map = 0; + caribou_fpga_get_errors (&dev, &err_map); + printf("ERRORS: 0x%02X\n", err_map); + + // io control mode + uint8_t debug_mode = 0; + caribou_fpga_io_ctrl_rfm_en rfmode = 0; + caribou_fpga_get_io_ctrl_mode (&dev, &debug_mode, &rfmode); + printf("IO_CTRL MODE: debug = %d, rfm = %d (should be %d)\n", debug_mode, rfmode); + + // io_ctrl_dig + int ldo = 0; + int led0 = 0; + int led1 = 0; + int btn = 0; + int cfg = 0; + caribou_fpga_get_io_ctrl_dig (&dev, &ldo, &led0, &led1, &btn, &cfg); + printf("IO_CTRL: ldo: %d, led0: %d, led1: %d, btn: %d, cfg: 0x%02X\n", ldo, led0, led1, btn, cfg); + + // pmod dir + uint8_t dir = 0; + caribou_fpga_get_io_ctrl_pmod_dir (&dev, &dir); + printf("PMOD_DIR: dir = 0x%02X\n", dir); + + // pmod val + uint8_t val = 0; + caribou_fpga_get_io_ctrl_pmod_val (&dev, &val); + printf("PMOD_VAL: val = 0x%02X\n", val); + + // rf state + caribou_fpga_rf_pin_st pins = {0}; + caribou_fpga_get_io_ctrl_rf_state (&dev, &pins); + printf("RF_PIN_STATE: val = 0x%02X\n", pins); + printf("MODE = caribou_fpga_io_ctrl_rfm_low_power\npress enter\n"); caribou_fpga_set_io_ctrl_mode (&dev, 0, caribou_fpga_io_ctrl_rfm_low_power); + caribou_fpga_get_io_ctrl_mode (&dev, &debug_mode, &rfmode); + printf("IO_CTRL MODE: debug = %d, rfm = %d (should be %d)\n", debug_mode, rfmode, caribou_fpga_io_ctrl_rfm_low_power); + printf("RF_PIN_STATE: val = 0x%02X\n", pins); getchar(); printf("MODE = caribou_fpga_io_ctrl_rfm_bypass\npress enter\n"); caribou_fpga_set_io_ctrl_mode (&dev, 0, caribou_fpga_io_ctrl_rfm_bypass); + caribou_fpga_get_io_ctrl_mode (&dev, &debug_mode, &rfmode); + printf("IO_CTRL MODE: debug = %d, rfm = %d (should be %d)\n", debug_mode, rfmode, caribou_fpga_io_ctrl_rfm_bypass); + printf("RF_PIN_STATE: val = 0x%02X\n", pins); getchar(); printf("MODE = caribou_fpga_io_ctrl_rfm_rx_lowpass\npress enter\n"); caribou_fpga_set_io_ctrl_mode (&dev, 0, caribou_fpga_io_ctrl_rfm_rx_lowpass); + caribou_fpga_get_io_ctrl_mode (&dev, &debug_mode, &rfmode); + printf("IO_CTRL MODE: debug = %d, rfm = %d (should be %d)\n", debug_mode, rfmode, caribou_fpga_io_ctrl_rfm_rx_lowpass); + printf("RF_PIN_STATE: val = 0x%02X\n", pins); getchar(); printf("MODE = caribou_fpga_io_ctrl_rfm_rx_hipass\npress enter\n"); caribou_fpga_set_io_ctrl_mode (&dev, 0, caribou_fpga_io_ctrl_rfm_rx_hipass); + caribou_fpga_get_io_ctrl_mode (&dev, &debug_mode, &rfmode); + printf("IO_CTRL MODE: debug = %d, rfm = %d (should be %d)\n", debug_mode, rfmode, caribou_fpga_io_ctrl_rfm_rx_hipass); + printf("RF_PIN_STATE: val = 0x%02X\n", pins); getchar(); printf("MODE = caribou_fpga_io_ctrl_rfm_tx_lowpass\npress enter\n"); caribou_fpga_set_io_ctrl_mode (&dev, 0, caribou_fpga_io_ctrl_rfm_tx_lowpass); + caribou_fpga_get_io_ctrl_mode (&dev, &debug_mode, &rfmode); + printf("IO_CTRL MODE: debug = %d, rfm = %d (should be %d)\n", debug_mode, rfmode, caribou_fpga_io_ctrl_rfm_tx_lowpass); + printf("RF_PIN_STATE: val = 0x%02X\n", pins); getchar(); printf("MODE = caribou_fpga_io_ctrl_rfm_tx_hipass\npress enter\n"); caribou_fpga_set_io_ctrl_mode (&dev, 0, caribou_fpga_io_ctrl_rfm_tx_hipass); + caribou_fpga_get_io_ctrl_mode (&dev, &debug_mode, &rfmode); + printf("IO_CTRL MODE: debug = %d, rfm = %d (should be %d)\n", debug_mode, rfmode, caribou_fpga_io_ctrl_rfm_tx_hipass); + printf("RF_PIN_STATE: val = 0x%02X\n", pins); getchar(); caribou_fpga_set_io_ctrl_mode (&dev, 0, caribou_fpga_io_ctrl_rfm_low_power); + caribou_fpga_get_io_ctrl_mode (&dev, &debug_mode, &rfmode); + printf("IO_CTRL MODE: debug = %d, rfm = %d (should be %d)\n", debug_mode, rfmode, caribou_fpga_io_ctrl_rfm_low_power); + printf("RF_PIN_STATE: val = 0x%02X\n", pins); + // read out stuff /*caribou_fpga_versions_st vers = {0}; uint8_t err_map = 0; diff --git a/software/libcariboulite/test/fpga_comm_test.c b/software/libcariboulite/test/fpga_comm_test.c index 94721b1..754fa18 100644 --- a/software/libcariboulite/test/fpga_comm_test.c +++ b/software/libcariboulite/test/fpga_comm_test.c @@ -7,7 +7,6 @@ int main() printf("fpga api test program!\n"); cariboulite_setup_io (); - //cariboulite_configure_fpga ("/home/pi/projects/Caribou/Software/CaribouLite/libcariboulite/src/latticeice40/ex_firmware/leds.bin"); cariboulite_init_submodules (); cariboulite_release_submodules(); cariboulite_release_io ();