From ffb9a693b50cc6633489f46e154cff5cf1dd6662 Mon Sep 17 00:00:00 2001 From: meexmachina Date: Wed, 18 Aug 2021 16:08:01 +0300 Subject: [PATCH] verolog bug fix --- firmware/io_ctrl.v | 19 +- firmware/top.asc | 19185 ++++++++-------- firmware/top.bin | Bin 32220 -> 32220 bytes firmware/top.json | 15286 ++++++------ firmware/top.v | 1 - software/libcariboulite/build/test/fpgacomm | Bin 243160 -> 243156 bytes .../libcariboulite/build/test/ice40programmer | Bin 243164 -> 243160 bytes .../src/at86rf215/build/test_at86rf215 | Bin 232120 -> 232120 bytes 8 files changed, 17113 insertions(+), 17378 deletions(-) diff --git a/firmware/io_ctrl.v b/firmware/io_ctrl.v index 917baa9..9142509 100644 --- a/firmware/io_ctrl.v +++ b/firmware/io_ctrl.v @@ -13,7 +13,6 @@ module io_ctrl // Digital interfaces input i_button, input [3:0] i_config, - output o_ldo_2v8_en, output o_led0, output o_led1, output [7:0] o_pmod, @@ -69,7 +68,6 @@ module io_ctrl reg [2:0] rf_mode; // Digital outputs - reg ldo2v8_state; reg led0_state; reg led1_state; reg [7:0] pmod_dir_state; @@ -86,21 +84,9 @@ module io_ctrl reg tr_vc_1_b_state; reg tr_vc_2_state; - //========================================================================= - // INITIAL STATES - //========================================================================= - /*initial begin - debug_mode = debug_mode_none; - rf_mode = rf_mode_low_power; - ldo2v8_state = 1'b0; - led0_state = 1'b0; - led1_state = 1'b0; - end*/ - //========================================================================= // LOGICAL SIGNAL ASSIGNMENTS //========================================================================= - assign o_ldo_2v8_en = ldo2v8_state; assign o_led0 = led0_state; assign o_led1 = led1_state; assign o_pmod = pmod_state; @@ -125,7 +111,6 @@ module io_ctrl if (i_reset) begin debug_mode = debug_mode_none; rf_mode = rf_mode_low_power; - ldo2v8_state = 1'b0; led0_state = 1'b0; led1_state = 1'b0; end else begin @@ -148,7 +133,6 @@ module io_ctrl ioc_dig_pin: begin o_data_out[0] <= led0_state; o_data_out[1] <= led1_state; - o_data_out[2] <= ldo2v8_state; o_data_out[6:3] <= i_config; o_data_out[7] <= i_button; end @@ -175,7 +159,7 @@ module io_ctrl o_data_out[7] <= rx_h_state; end endcase - end + end //============================================= // WRITE OPERATIONS //============================================= @@ -196,7 +180,6 @@ module io_ctrl ioc_dig_pin: begin led0_state <= i_data_in[0]; led1_state <= i_data_in[1]; - ldo2v8_state <= i_data_in[2]; end //---------------------------------------------- diff --git a/firmware/top.asc b/firmware/top.asc index 2bc4e7d..e3d27e6 100644 --- a/firmware/top.asc +++ b/firmware/top.asc @@ -38,12 +38,12 @@ .io_tile 3 0 000000000000000000 -000000000000000000 -000000000000000000 000000000000010000 000000000000000000 000000000000000000 -000100000000011000 +000000000000000000 +000000000000000000 +000100000000000000 000000000000000000 000000000000000000 000100000000000000 @@ -59,12 +59,66 @@ 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rx_09_fifo.full_o_SB_LUT4_I3_O_SB_LUT4_I3_O[1] +.sym 520 rx_09_fifo.wr_addr_gray_SB_DFFESR_Q_3_D[1] +.sym 521 rx_09_fifo.wr_addr_gray_SB_DFFESR_Q_3_D[3] +.sym 522 rx_09_fifo.full_o_SB_LUT4_I3_O_SB_LUT4_I3_O[2] +.sym 523 rx_09_fifo.wr_addr_gray_SB_DFFESR_Q_7_D[0] +.sym 524 rx_09_fifo.wr_addr_gray_SB_DFFESR_Q_7_D[3] +.sym 525 rx_09_fifo.full_o_SB_LUT4_I3_O_SB_LUT4_I3_O[3] +.sym 526 lvds_rx_09_inst.r_push_SB_LUT4_I3_O_SB_LUT4_O_2_I0[3] +.sym 635 rx_09_fifo.full_o_SB_DFFSR_Q_D_SB_LUT4_O_I1[2] +.sym 637 rx_09_fifo.rd_addr_gray_wr_r[7] +.sym 638 rx_09_fifo.rd_addr_gray_wr[7] +.sym 688 rx_09_fifo.rd_addr_gray_wr_r[0] +.sym 747 lvds_rx_24_inst.r_push_SB_LUT4_I2_I0_SB_LUT4_O_I1[1] +.sym 748 lvds_rx_24_inst.r_push_SB_LUT4_I2_I0_SB_LUT4_O_2_I0[3] +.sym 749 lvds_rx_24_inst.r_push_SB_LUT4_I2_I0_SB_LUT4_O_2_I0[2] +.sym 750 lvds_rx_24_inst.r_push_SB_LUT4_I2_I0_SB_LUT4_O_I0[1] +.sym 751 lvds_rx_24_inst.r_push_SB_LUT4_I2_I0_SB_LUT4_O_I0[3] +.sym 752 lvds_rx_24_inst.r_push_SB_LUT4_I2_I0_SB_LUT4_O_I1[6] .sym 830 lvds_clock .sym 845 lvds_clock -.sym 860 lvds_rx_09_inst.r_push_SB_DFFNESR_Q_E_SB_LUT4_O_I1_SB_LUT4_O_I2[0] -.sym 861 w_lvds_rx_09_d1_SB_LUT4_I0_O_SB_LUT4_I3_O -.sym 862 rx_24_fifo.rd_addr_gray_wr_r[2] -.sym 863 lvds_rx_09_inst.r_push_SB_DFFNESR_Q_E_SB_LUT4_O_I1[0] -.sym 864 lvds_rx_09_inst.r_state_if_SB_DFFNESR_Q_E_SB_LUT4_O_I2[1] -.sym 865 lvds_rx_09_inst.r_state_if_SB_DFFNESR_Q_E -.sym 866 rx_24_fifo.rd_addr_gray_wr[2] -.sym 867 lvds_rx_09_inst.r_push_SB_DFFNESR_Q_E_SB_LUT4_O_I1[3] -.sym 893 w_rx_24_fifo_data[20] +.sym 860 rx_24_fifo.full_o_SB_DFFSR_Q_D_SB_LUT4_O_I1_SB_LUT4_O_I0[3] +.sym 861 rx_24_fifo.wr_addr[0] +.sym 862 rx_24_fifo.wr_addr[3] +.sym 863 rx_24_fifo.wr_addr[4] +.sym 865 rx_24_fifo.wr_addr[5] +.sym 867 rx_24_fifo.wr_addr[2] .sym 910 lvds_clock +.sym 926 lvds_rx_24_inst.r_push_SB_LUT4_I2_I0_SB_LUT4_O_2_I0[1] .sym 940 lvds_clock +.sym 941 $PACKER_VCC_NET .sym 944 w_lvds_rx_09_d1_SB_LUT4_I0_O_SB_LUT4_I3_O -.sym 959 w_lvds_rx_09_d1_SB_LUT4_I0_O_SB_LUT4_I3_O -.sym 974 lvds_rx_09_inst.r_push_SB_DFFNESR_Q_E_SB_LUT4_O_I1_SB_LUT4_I0_O_SB_DFFNESR_D_Q[1] -.sym 975 lvds_rx_09_inst.r_phase_count[1] -.sym 976 lvds_rx_09_inst.r_push_SB_DFFNESR_Q_E_SB_LUT4_O_I1_SB_LUT4_I0_O_SB_DFFNESR_D_Q[0] -.sym 977 lvds_rx_24_inst.r_push_SB_LUT4_I0_1_I1[3] -.sym 978 lvds_rx_24_inst.r_push_SB_LUT4_I0_1_I1_SB_LUT4_O_2_I0[0] -.sym 979 lvds_rx_24_inst.r_push_SB_LUT4_I0_1_I1_SB_LUT4_O_1_I3[3] -.sym 980 w_lvds_rx_09_d1_SB_LUT4_I0_O[1] -.sym 981 lvds_rx_24_inst.r_push_SB_LUT4_I0_1_I1[2] -.sym 1010 i_smi_a1_SB_LUT4_I1_O_SB_LUT4_O_I2_SB_LUT4_I0_O[2] -.sym 1031 lvds_rx_09_inst.r_state_if_SB_DFFNESR_Q_E -.sym 1050 rx_24_fifo.wr_addr[5] -.sym 1055 $PACKER_VCC_NET -.sym 1088 rx_24_fifo.full_o_SB_DFFSR_Q_D_SB_LUT4_O_I1[1] -.sym 1089 w_rx_24_fifo_push -.sym 1091 lvds_rx_24_inst.r_state_if_SB_LUT4_I2_O[0] -.sym 1094 lvds_rx_09_inst.r_push_SB_DFFNESR_Q_E_SB_LUT4_O_I1_SB_LUT4_I0_O_SB_DFFNESR_D_E -.sym 1095 rx_24_fifo.full_o_SB_LUT4_I0_I1[3] -.sym 1148 rx_24_fifo.rd_addr_gray_wr_r[5] -.sym 1163 lvds_rx_24_inst.r_push_SB_LUT4_I0_1_I1_SB_LUT4_O_2_I0[1] +.sym 963 w_lvds_rx_09_d1_SB_LUT4_I0_O_SB_LUT4_I3_O +.sym 977 w_rx_24_fifo_data[28] +.sym 978 rx_24_fifo.full_o_SB_LUT4_I3_O[3] +.sym 979 w_lvds_rx_09_d1_SB_LUT4_I0_O_SB_LUT4_I3_O +.sym 980 lvds_rx_24_inst.r_push_SB_LUT4_I3_O +.sym 987 rx_24_fifo.wr_addr[4] +.sym 1009 rx_24_fifo.wr_addr[4] +.sym 1013 rx_24_fifo.wr_addr[5] +.sym 1017 rx_24_fifo.wr_addr[2] +.sym 1029 rx_24_fifo.wr_addr[2] +.sym 1053 rx_24_fifo.wr_addr[3] +.sym 1054 w_lvds_rx_09_d0 +.sym 1055 w_lvds_rx_09_d1 +.sym 1088 rx_24_fifo.wr_addr[7] +.sym 1089 rx_24_fifo.wr_addr_gray_SB_DFFESR_Q_7_D[3] +.sym 1090 rx_24_fifo.wr_addr_gray_SB_DFFESR_Q_7_D[0] +.sym 1091 rx_24_fifo.wr_addr[6] +.sym 1092 rx_24_fifo.wr_addr_gray[5] +.sym 1093 w_lvds_rx_09_d1_SB_LUT4_I0_O[1] +.sym 1094 rx_24_fifo.wr_addr_gray[6] +.sym 1108 lvds_rx_24_inst.r_push_SB_LUT4_I2_I0_SB_LUT4_O_2_I0[1] +.sym 1120 rx_24_fifo.wr_addr_gray_SB_LUT4_I2_O[4] +.sym 1128 lvds_rx_24_inst.r_state_if_SB_LUT4_I2_O[0] .sym 1173 w_lvds_rx_09_d0 .sym 1174 w_lvds_rx_09_d1 .sym 1183 $PACKER_VCC_NET .sym 1184 lvds_clock_buf -.sym 1196 $PACKER_VCC_NET -.sym 1203 lvds_rx_24_inst.r_push_SB_DFFNESR_Q_E_SB_LUT4_O_I1[1] -.sym 1204 rx_24_fifo.full_o_SB_LUT4_I0_O[1] -.sym 1206 lvds_rx_24_inst.r_push_SB_DFFNESR_Q_E_SB_LUT4_O_I1_SB_LUT4_O_I2[0] -.sym 1208 lvds_rx_24_inst.r_push_SB_DFFNESR_Q_E -.sym 1209 lvds_rx_24_inst.r_state_if_SB_LUT4_I2_O[1] -.sym 1216 lvds_rx_24_inst.r_push_SB_LUT4_I0_1_I1_SB_LUT4_O_2_I0[1] -.sym 1253 $PACKER_VCC_NET -.sym 1260 w_lvds_rx_09_d0 -.sym 1271 w_lvds_rx_09_d1 -.sym 1279 w_rx_24_fifo_push +.sym 1191 $PACKER_VCC_NET +.sym 1203 lvds_rx_09_inst.r_state_if[1] +.sym 1204 lvds_rx_09_inst.r_state_if_SB_DFFNESR_Q_E +.sym 1206 lvds_rx_09_inst.r_state_if[0] +.sym 1234 rx_24_fifo.wr_addr_gray_SB_DFFESR_Q_6_D[2] +.sym 1235 rx_24_fifo.wr_addr_gray[6] +.sym 1237 rx_24_fifo.wr_addr[6] +.sym 1282 w_lvds_rx_24_d0 +.sym 1283 w_lvds_rx_24_d1 .sym 1287 lvds_clock .sym 1297 $PACKER_VCC_NET -.sym 1313 $PACKER_VCC_NET -.sym 1316 w_rx_24_fifo_data[1] -.sym 1317 lvds_rx_24_inst.r_push_SB_DFFNESR_Q_E_SB_LUT4_O_I1_SB_LUT4_I0_O_SB_DFFNESR_D_E -.sym 1318 lvds_rx_24_inst.r_state_if_SB_DFFNESR_Q_E_SB_LUT4_O_I2[1] -.sym 1319 lvds_rx_24_inst.r_push_SB_DFFNESR_Q_E_SB_LUT4_O_I1[0] -.sym 1320 w_rx_24_fifo_data[0] -.sym 1321 lvds_rx_24_inst.r_state_if_SB_DFFNESR_Q_E -.sym 1322 lvds_rx_24_inst.r_push_SB_DFFNESR_Q_E_SB_LUT4_O_I1_SB_LUT4_O_I2_SB_LUT4_I0_O[0] -.sym 1323 w_lvds_rx_24_d1_SB_LUT4_I0_O[1] -.sym 1357 i_smi_a1_SB_LUT4_I1_O_SB_LUT4_O_I2_SB_LUT4_I0_O[2] -.sym 1360 rx_24_fifo.wr_addr_gray_SB_DFFESR_Q_7_D[1] -.sym 1382 rx_24_fifo.wr_addr_gray_SB_DFFESR_Q_7_D[2] -.sym 1395 rx_24_fifo.rd_addr_gray_wr_r[6] +.sym 1310 $PACKER_VCC_NET +.sym 1317 w_lvds_rx_24_d1_SB_LUT4_I0_O_SB_LUT4_O_I2_SB_LUT4_I0_O[2] +.sym 1318 lvds_rx_24_inst.r_phase_count_SB_LUT4_I1_O[2] +.sym 1319 w_rx_09_fifo_data[0] +.sym 1320 lvds_rx_24_inst.r_phase_count[1] +.sym 1322 w_rx_09_fifo_data[1] +.sym 1323 lvds_rx_24_inst.r_phase_count[0] +.sym 1350 $PACKER_VCC_NET +.sym 1393 $PACKER_VCC_NET .sym 1401 w_lvds_rx_24_d0 .sym 1402 w_lvds_rx_24_d1 .sym 1411 $PACKER_VCC_NET .sym 1412 lvds_clock_buf .sym 1424 $PACKER_VCC_NET -.sym 1431 lvds_rx_24_inst.r_phase_count_SB_LUT4_I1_O[1] -.sym 1432 lvds_rx_24_inst.r_phase_count_SB_LUT4_I1_O[2] -.sym 1433 lvds_rx_24_inst.r_push_SB_DFFNESR_Q_E_SB_LUT4_O_I1_SB_LUT4_I0_O_SB_DFFNESR_D_Q[1] -.sym 1434 lvds_rx_24_inst.r_phase_count[0] -.sym 1435 lvds_rx_24_inst.r_push_SB_DFFNESR_Q_E_SB_LUT4_O_I1_SB_LUT4_I0_O_SB_DFFNESR_D_Q[0] -.sym 1436 lvds_rx_24_inst.r_push_SB_DFFNESR_Q_E_SB_LUT4_O_I1_SB_LUT4_O_I2[2] -.sym 1437 lvds_rx_24_inst.r_phase_count[1] -.sym 1456 lvds_rx_24_inst.r_push_SB_LUT4_I0_1_I1_SB_LUT4_O_1_I3[0] -.sym 1472 i_smi_a1_SB_LUT4_I1_O_SB_LUT4_O_I2_SB_LUT4_I0_O[2] -.sym 1474 $PACKER_VCC_NET -.sym 1544 w_rx_09_fifo_data[0] -.sym 1550 w_rx_09_fifo_data[1] -.sym 1600 lvds_rx_24_inst.r_push_SB_DFFNESR_Q_E_SB_LUT4_O_I1_SB_LUT4_I0_O_SB_DFFNESR_D_E -.sym 1677 w_rx_09_fifo_data[1] -.sym 1683 w_rx_09_fifo_data[1] -.sym 1879 io_smi_data[0]$SB_IO_OUT -.sym 1880 smi_ctrl_ins.o_smi_data_out_SB_DFFE_Q_1_D_SB_LUT4_O_I1[2] -.sym 1881 w_smi_data_output[4] -.sym 1882 smi_ctrl_ins.o_smi_data_out_SB_DFFE_Q_3_D_SB_LUT4_O_I1_SB_LUT4_O_I3[3] -.sym 1883 w_smi_data_output[3] -.sym 1884 smi_ctrl_ins.o_smi_data_out_SB_DFFE_Q_7_D_SB_LUT4_O_I0[0] -.sym 1885 smi_ctrl_ins.o_smi_data_out_SB_DFFE_Q_3_D_SB_LUT4_O_I1[1] -.sym 1886 io_smi_data[6]$SB_IO_OUT -.sym 1939 i_smi_soe_se$rename$0 -.sym 1943 smi_ctrl_ins.r_fifo_24_pull_SB_DFFESR_Q_E -.sym 1955 i_smi_a1_SB_LUT4_I1_O[2] -.sym 2063 w_smi_data_output[6] -.sym 2064 w_smi_data_output[5] -.sym 2065 w_smi_data_output[7] -.sym 2066 smi_ctrl_ins.r_fifo_24_pull_SB_LUT4_I1_O_SB_LUT4_I0_O_SB_LUT4_I3_O -.sym 2067 smi_ctrl_ins.o_smi_data_out_SB_DFFE_Q_6_D_SB_LUT4_O_I1[1] -.sym 2068 smi_ctrl_ins.o_smi_data_out_SB_DFFE_Q_6_D_SB_LUT4_O_I1_SB_LUT4_O_I3[3] -.sym 2069 w_smi_data_output[1] -.sym 2070 w_smi_data_output[2] -.sym 2074 w_rx_24_fifo_data[1] -.sym 2076 rx_09_fifo.wr_addr[2] -.sym 2079 smi_ctrl_ins.int_cnt_09_SB_DFFESR_Q_D_SB_LUT4_O_I3[2] -.sym 2080 w_rx_09_fifo_data[0] -.sym 2082 smi_ctrl_ins.o_smi_data_out_SB_DFFE_Q_D_SB_LUT4_O_I2[1] -.sym 2084 smi_ctrl_ins.o_smi_data_out_SB_DFFE_Q_7_D_SB_LUT4_O_I0[1] -.sym 2085 smi_ctrl_ins.int_cnt_09_SB_DFFESR_Q_D_SB_LUT4_O_I3[2] +.sym 1430 w_lvds_rx_24_d1_SB_LUT4_I0_O_SB_LUT4_O_I2_SB_LUT4_I0_O[3] +.sym 1431 w_lvds_rx_24_d1_SB_LUT4_I0_O[0] +.sym 1432 w_lvds_rx_24_d1_SB_LUT4_I0_O_SB_LUT4_O_I2_SB_LUT4_I0_O[0] +.sym 1433 w_lvds_rx_24_d1_SB_LUT4_I0_O_SB_LUT4_O_I2[1] +.sym 1434 w_lvds_rx_24_d1_SB_LUT4_I0_O[1] +.sym 1435 lvds_rx_24_inst.r_phase_count_SB_LUT4_O_I3[0] +.sym 1436 lvds_rx_24_inst.r_phase_count_SB_LUT4_O_I3[1] +.sym 1437 w_lvds_rx_24_d1_SB_LUT4_I0_O_SB_LUT4_O_I2[2] +.sym 1455 w_rx_09_fifo_data[1] +.sym 1464 $PACKER_VCC_NET +.sym 1480 w_lvds_rx_09_d0 +.sym 1507 w_lvds_rx_09_d1 +.sym 1545 w_rx_24_fifo_data[1] +.sym 1547 lvds_rx_09_inst.r_state_if_SB_DFFNESR_Q_E_SB_LUT4_O_I2_SB_LUT4_O_I2_SB_LUT4_I2_O[3] +.sym 1548 lvds_rx_09_inst.r_state_if_SB_DFFNESR_Q_E_SB_LUT4_O_I2_SB_LUT4_O_I2_SB_LUT4_I2_O[1] +.sym 1549 w_rx_24_fifo_data[0] +.sym 1551 lvds_rx_09_inst.r_state_if_SB_DFFNESR_Q_E_SB_LUT4_O_I2[1] +.sym 1659 lvds_rx_09_inst.r_phase_count[0] +.sym 1691 w_lvds_rx_24_d0 +.sym 1735 w_lvds_rx_24_d1 +.sym 1736 lvds_rx_09_inst.r_state_if_SB_DFFNESR_Q_E_SB_LUT4_O_I2_SB_LUT4_O_I2_SB_LUT4_I2_O[0] +.sym 2063 lvds_rx_09_inst.r_push_SB_LUT4_I3_O_SB_LUT4_O_1_I0[1] +.sym 2066 rx_09_fifo.rd_addr_gray_wr[1] +.sym 2068 rx_09_fifo.rd_addr_gray_wr[6] +.sym 2070 rx_09_fifo.rd_addr_gray_wr_r[6] .sym 2086 rx_09_fifo.wr_addr[5] -.sym 2091 smi_ctrl_ins.int_cnt_09_SB_DFFESR_Q_D_SB_LUT4_O_I3[1] -.sym 2092 w_smi_data_output[6] -.sym 2093 smi_ctrl_ins.o_smi_data_out_SB_DFFE_Q_5_D_SB_LUT4_O_I1[1] -.sym 2096 i_smi_a2_SB_LUT4_I1_O[3] -.sym 2098 smi_ctrl_ins.int_cnt_09_SB_DFFESR_Q_D_SB_LUT4_O_I3[1] -.sym 2106 smi_ctrl_ins.o_smi_data_out_SB_DFFE_Q_7_D_SB_LUT4_O_I0[2] -.sym 2114 smi_ctrl_ins.o_smi_data_out_SB_DFFE_Q_5_D_SB_LUT4_O_I1_SB_LUT4_O_1_I1[2] -.sym 2116 smi_ctrl_ins.int_cnt_24_SB_DFFESR_Q_E -.sym 2123 smi_ctrl_ins.o_smi_data_out_SB_DFFE_Q_1_D_SB_LUT4_O_I1_SB_LUT4_O_1_I1[2] -.sym 2124 i_smi_a1_SB_LUT4_I1_O[3] -.sym 2125 smi_ctrl_ins.o_smi_data_out_SB_DFFE_Q_6_D_SB_LUT4_O_I1_SB_LUT4_O_1_I1[2] -.sym 2126 smi_ctrl_ins.r_fifo_24_pull_SB_LUT4_I1_O[2] -.sym 2128 i_smi_a2_SB_LUT4_I1_O_SB_LUT4_I3_1_I2_SB_LUT4_O_I3[1] -.sym 2136 w_rx_24_fifo_pull -.sym 2138 smi_ctrl_ins.int_cnt_24[5] -.sym 2139 w_rx_09_fifo_pull -.sym 2146 w_rx_09_fifo_data[0] -.sym 2154 smi_ctrl_ins.r_fifo_24_pull_SB_LUT4_I1_O[2] -.sym 2155 i_smi_soe_se$rename$0 -.sym 2156 w_rx_24_fifo_pull -.sym 2164 i_smi_a2_SB_LUT4_I1_O[3] -.sym 2171 i_smi_a2_SB_LUT4_I1_O_SB_LUT4_I3_1_I2_SB_LUT4_O_I3[1] -.sym 2176 w_rx_09_fifo_pull -.sym 2185 smi_ctrl_ins.r_fifo_24_pull_SB_LUT4_I1_O[2] -.sym 2186 i_smi_soe_se$rename$0 -.sym 2191 i_smi_a2_SB_LUT4_I1_O[3] -.sym 2193 w_rx_09_fifo_pull -.sym 2194 w_rx_24_fifo_pull -.sym 2212 i_smi_a2_SB_LUT4_I1_O_SB_LUT4_I3_1_I2_SB_LUT4_O_I3[1] -.sym 2236 i_smi_a2_SB_LUT4_I1_O_SB_LUT4_I3_1_I2[2] -.sym 2237 i_smi_a2_SB_LUT4_I1_O_SB_LUT4_I3_1_I2_SB_LUT4_O_I3[1] -.sym 2238 smi_ctrl_ins.o_smi_data_out_SB_DFFE_Q_6_D_SB_LUT4_O_I1[3] -.sym 2239 smi_ctrl_ins.o_smi_data_out_SB_DFFE_Q_5_D_SB_LUT4_O_I1[3] -.sym 2240 smi_ctrl_ins.r_fifo_24_pull_SB_LUT4_I1_O_SB_LUT4_I0_O[2] -.sym 2241 smi_ctrl_ins.o_smi_data_out_SB_DFFE_Q_1_D_SB_LUT4_O_I1[3] -.sym 2246 i_smi_a1_SB_LUT4_I1_O[2] -.sym 2247 smi_ctrl_ins.o_smi_data_out_SB_DFFE_Q_1_D_SB_LUT4_O_I1[1] -.sym 2251 w_smi_data_output[2] -.sym 2254 lvds_rx_09_inst.o_fifo_data[11] -.sym 2258 smi_ctrl_ins.o_smi_data_out_SB_DFFE_Q_3_D_SB_LUT4_O_I1[3] -.sym 2259 smi_ctrl_ins.int_cnt_24_SB_DFFESR_Q_E -.sym 2260 smi_ctrl_ins.o_smi_data_out_SB_DFFE_Q_D_SB_LUT4_O_I1_SB_LUT4_O_1_I1[2] -.sym 2263 smi_ctrl_ins.o_smi_data_out_SB_DFFE_Q_5_D_SB_LUT4_O_I1_SB_LUT4_O_1_I1[1] -.sym 2268 smi_ctrl_ins.o_smi_data_out_SB_DFFE_Q_D_SB_LUT4_O_I1[3] -.sym 2269 smi_ctrl_ins.o_smi_data_out_SB_DFFE_Q_2_D_SB_LUT4_O_I1[3] -.sym 2270 w_rx_24_fifo_data[9] -.sym 2271 smi_ctrl_ins.r_fifo_24_pull_SB_LUT4_I1_O[2] -.sym 2274 w_rx_24_fifo_pull -.sym 2289 smi_ctrl_ins.r_fifo_24_pull_SB_DFFESR_Q_E -.sym 2290 $PACKER_VCC_NET -.sym 2291 smi_ctrl_ins.r_fifo_24_pull_SB_LUT4_I1_O[2] -.sym 2293 i_smi_a1_SB_LUT4_I1_O_SB_LUT4_O_I2_SB_CARRY_CO_I1[4] -.sym 2296 i_smi_soe_se$rename$0 -.sym 2297 i_smi_a1_SB_LUT4_I1_O_SB_LUT4_O_I2_SB_LUT4_I0_I1[5] -.sym 2298 i_smi_a1_SB_LUT4_I1_O_SB_LUT4_O_I2_SB_CARRY_CO_I1[5] -.sym 2299 i_smi_a1_SB_LUT4_I1_O_SB_LUT4_O_I2[3] -.sym 2305 smi_ctrl_ins.int_cnt_24[4] -.sym 2306 i_smi_a1_SB_LUT4_I1_O_SB_LUT4_O_I2[5] -.sym 2319 $nextpnr_ICESTORM_LC_12$O -.sym 2321 i_smi_a1_SB_LUT4_I1_O_SB_LUT4_O_I2[3] -.sym 2325 i_smi_a1_SB_LUT4_I1_O_SB_LUT4_O_I2[4] -.sym 2327 i_smi_a1_SB_LUT4_I1_O_SB_LUT4_O_I2_SB_CARRY_CO_I1[4] -.sym 2331 $nextpnr_ICESTORM_LC_13$I3 -.sym 2334 i_smi_a1_SB_LUT4_I1_O_SB_LUT4_O_I2_SB_CARRY_CO_I1[5] -.sym 2337 $nextpnr_ICESTORM_LC_13$COUT -.sym 2340 $PACKER_VCC_NET -.sym 2341 $nextpnr_ICESTORM_LC_13$I3 -.sym 2344 smi_ctrl_ins.r_fifo_24_pull_SB_LUT4_I1_O[2] -.sym 2346 i_smi_soe_se$rename$0 -.sym 2347 $nextpnr_ICESTORM_LC_13$COUT -.sym 2351 smi_ctrl_ins.r_fifo_24_pull_SB_LUT4_I1_O[2] -.sym 2352 i_smi_a1_SB_LUT4_I1_O_SB_LUT4_O_I2[5] -.sym 2353 i_smi_soe_se$rename$0 -.sym 2356 smi_ctrl_ins.int_cnt_24[4] -.sym 2362 i_smi_a1_SB_LUT4_I1_O_SB_LUT4_O_I2_SB_LUT4_I0_I1[5] -.sym 2363 i_smi_soe_se$rename$0 -.sym 2364 i_smi_a1_SB_LUT4_I1_O_SB_LUT4_O_I2[5] -.sym 2365 smi_ctrl_ins.r_fifo_24_pull_SB_LUT4_I1_O[2] -.sym 2366 smi_ctrl_ins.r_fifo_24_pull_SB_DFFESR_Q_E -.sym 2367 r_counter[0]_$glb_clk -.sym 2368 i_smi_a1_SB_LUT4_I1_O_SB_LUT4_O_I2_SB_LUT4_I0_O[2]_$glb_sr -.sym 2369 smi_ctrl_ins.o_smi_data_out_SB_DFFE_Q_1_D_SB_LUT4_O_I1_SB_LUT4_O_1_I1[1] -.sym 2370 i_smi_a1_SB_LUT4_I1_O[1] -.sym 2371 smi_ctrl_ins.int_cnt_24[4] -.sym 2372 smi_ctrl_ins.o_smi_data_out_SB_DFFE_Q_D_SB_LUT4_O_I1[3] -.sym 2373 smi_ctrl_ins.o_smi_data_out_SB_DFFE_Q_6_D_SB_LUT4_O_I1_SB_LUT4_O_1_I1[1] -.sym 2374 smi_ctrl_ins.r_fifo_24_pull_SB_LUT4_I1_O[3] -.sym 2375 smi_ctrl_ins.o_smi_data_out_SB_DFFE_Q_3_D_SB_LUT4_O_I1[3] -.sym 2376 smi_ctrl_ins.o_smi_data_out_SB_DFFE_Q_1_D_SB_LUT4_O_I1_SB_LUT4_O_1_I1[3] -.sym 2380 w_rx_09_fifo_data[0] -.sym 2382 i_smi_soe_se$rename$0 -.sym 2392 i_smi_a2_SB_LUT4_I1_O_SB_LUT4_I3_1_I2[2] -.sym 2393 i_smi_a2_SB_LUT4_I1_O_SB_LUT4_I3_1_I2[2] -.sym 2394 i_smi_a2_SB_LUT4_I1_O[1] -.sym 2395 i_smi_a2_SB_LUT4_I1_O_SB_LUT4_I3_1_I2_SB_LUT4_O_I3[1] -.sym 2398 w_rx_24_fifo_data[10] -.sym 2400 w_rx_24_fifo_data[14] -.sym 2402 w_rx_24_fifo_data[12] -.sym 2404 w_rx_24_fifo_data[11] -.sym 2405 w_rx_24_fifo_data[16] -.sym 2409 i_smi_soe_se$rename$0 -.sym 2410 w_rx_24_fifo_data[21] -.sym 2411 smi_ctrl_ins.r_fifo_24_pull_SB_DFFESR_Q_E -.sym 2412 lvds_rx_24_inst.r_state_if_SB_LUT4_I2_O[0] -.sym 2429 smi_ctrl_ins.int_cnt_24[5] -.sym 2430 i_smi_a1_SB_LUT4_I1_O[2] -.sym 2433 i_smi_a1_SB_LUT4_I1_O_SB_LUT4_O_I2_SB_CARRY_CO_I1[5] -.sym 2435 i_smi_a1_SB_LUT4_I1_O[0] -.sym 2436 i_smi_a1_SB_LUT4_I1_O_SB_LUT4_O_I2_SB_CARRY_CO_I1[4] -.sym 2437 i_smi_a1_SB_LUT4_I1_O_SB_LUT4_O_I2_SB_LUT4_I0_O[0] -.sym 2439 i_smi_a1_SB_LUT4_I1_O[1] -.sym 2444 i_smi_a1_SB_LUT4_I1_O[3] -.sym 2445 i_smi_a1_SB_LUT4_I1_O_SB_LUT4_O_I2_SB_LUT4_I0_O[1] -.sym 2446 i_smi_soe_se$rename$0 -.sym 2449 i_smi_a1_SB_LUT4_I1_O_SB_LUT4_O_I2_SB_LUT4_I0_O[2] -.sym 2454 $nextpnr_ICESTORM_LC_17$O -.sym 2456 i_smi_a1_SB_LUT4_I1_O_SB_LUT4_O_I2_SB_CARRY_CO_I1[4] -.sym 2460 $nextpnr_ICESTORM_LC_18$I3 -.sym 2462 i_smi_a1_SB_LUT4_I1_O_SB_LUT4_O_I2_SB_CARRY_CO_I1[5] -.sym 2470 $nextpnr_ICESTORM_LC_18$I3 -.sym 2473 smi_ctrl_ins.int_cnt_24[5] -.sym 2482 i_smi_soe_se$rename$0 -.sym 2485 i_smi_a1_SB_LUT4_I1_O_SB_LUT4_O_I2_SB_LUT4_I0_O[1] -.sym 2488 i_smi_a1_SB_LUT4_I1_O_SB_LUT4_O_I2_SB_LUT4_I0_O[2] -.sym 2491 i_smi_a1_SB_LUT4_I1_O_SB_LUT4_O_I2_SB_LUT4_I0_O[2] -.sym 2493 i_smi_a1_SB_LUT4_I1_O_SB_LUT4_O_I2_SB_LUT4_I0_O[0] -.sym 2494 i_smi_a1_SB_LUT4_I1_O_SB_LUT4_O_I2_SB_LUT4_I0_O[1] -.sym 2497 i_smi_a1_SB_LUT4_I1_O[2] -.sym 2498 i_smi_a1_SB_LUT4_I1_O[3] -.sym 2499 i_smi_a1_SB_LUT4_I1_O[1] -.sym 2500 i_smi_a1_SB_LUT4_I1_O[0] -.sym 2502 r_counter[0]_$glb_clk -.sym 2503 i_smi_a1_SB_LUT4_I1_O_SB_LUT4_O_I2_SB_LUT4_I0_O[2]_$glb_sr -.sym 2504 smi_ctrl_ins.o_smi_data_out_SB_DFFE_Q_D_SB_LUT4_O_I2_SB_LUT4_O_1_I1[1] -.sym 2505 i_smi_a2_SB_LUT4_I1_O_SB_LUT4_I3_1_I2[1] -.sym 2506 smi_ctrl_ins.o_smi_data_out_SB_DFFE_Q_5_D_SB_LUT4_O_I1_SB_LUT4_O_1_I1[1] -.sym 2507 smi_ctrl_ins.o_smi_data_out_SB_DFFE_Q_D_SB_LUT4_O_I1_SB_LUT4_O_1_I3[1] -.sym 2508 smi_ctrl_ins.o_smi_data_out_SB_DFFE_Q_D_SB_LUT4_O_I1_SB_LUT4_O_1_I1[1] -.sym 2509 smi_ctrl_ins.o_smi_data_out_SB_DFFE_Q_2_D_SB_LUT4_O_I1[3] -.sym 2510 smi_ctrl_ins.o_smi_data_out_SB_DFFE_Q_D_SB_LUT4_O_I2[3] -.sym 2511 smi_ctrl_ins.o_smi_data_out_SB_DFFE_Q_2_D_SB_LUT4_O_I1_SB_LUT4_O_1_I1[1] -.sym 2514 lvds_rx_09_inst.r_push_SB_DFFNESR_Q_E_SB_LUT4_O_I1[3] -.sym 2526 smi_ctrl_ins.r_fifo_24_pull_SB_LUT4_I1_O[2] -.sym 2528 smi_ctrl_ins.o_smi_data_out_SB_DFFE_Q_5_D_SB_LUT4_O_I1_SB_LUT4_O_1_I1[2] -.sym 2529 w_rx_24_fifo_data[16] -.sym 2533 i_smi_soe_se$rename$0 -.sym 2534 lvds_rx_24_inst.r_state_if_SB_LUT4_I2_O[0] -.sym 2535 w_rx_24_fifo_empty -.sym 2537 smi_ctrl_ins.int_cnt_24_SB_DFFESR_Q_E -.sym 2538 smi_ctrl_ins.o_smi_data_out_SB_DFFE_Q_7_D_SB_LUT4_O_I0[2] -.sym 2539 i_smi_a2_SB_LUT4_I1_O_SB_LUT4_I3_1_I2[1] -.sym 2540 w_rx_24_fifo_data[25] -.sym 2563 w_rx_24_fifo_data[9] -.sym 2564 w_rx_24_fifo_data[8] -.sym 2567 w_rx_24_fifo_data[12] -.sym 2569 w_rx_24_fifo_data[7] -.sym 2570 w_rx_24_fifo_data[3] -.sym 2572 w_rx_24_fifo_data[5] -.sym 2573 w_rx_24_fifo_data[10] -.sym 2579 lvds_rx_24_inst.r_state_if_SB_LUT4_I2_O[0] -.sym 2581 w_rx_24_fifo_data[1] -.sym 2592 lvds_rx_24_inst.r_state_if_SB_LUT4_I2_O[0] -.sym 2593 w_rx_24_fifo_data[8] -.sym 2596 w_rx_24_fifo_data[12] -.sym 2599 lvds_rx_24_inst.r_state_if_SB_LUT4_I2_O[0] -.sym 2602 lvds_rx_24_inst.r_state_if_SB_LUT4_I2_O[0] -.sym 2604 w_rx_24_fifo_data[10] -.sym 2609 w_rx_24_fifo_data[9] -.sym 2611 lvds_rx_24_inst.r_state_if_SB_LUT4_I2_O[0] -.sym 2614 lvds_rx_24_inst.r_state_if_SB_LUT4_I2_O[0] -.sym 2616 w_rx_24_fifo_data[5] -.sym 2620 w_rx_24_fifo_data[1] -.sym 2623 lvds_rx_24_inst.r_state_if_SB_LUT4_I2_O[0] -.sym 2626 lvds_rx_24_inst.r_state_if_SB_LUT4_I2_O[0] -.sym 2627 w_rx_24_fifo_data[7] -.sym 2633 w_rx_24_fifo_data[3] -.sym 2635 lvds_rx_24_inst.r_state_if_SB_LUT4_I2_O[0] -.sym 2636 w_lvds_rx_24_d1_SB_LUT4_I0_O_SB_LUT4_I3_O_$glb_ce -.sym 2637 lvds_clock_buf -.sym 2638 i_smi_a1_SB_LUT4_I1_O_SB_LUT4_O_I2_SB_LUT4_I0_O[2]_$glb_sr -.sym 2639 smi_ctrl_ins.o_smi_data_out_SB_DFFE_Q_7_D_SB_LUT4_O_I0_SB_LUT4_O_I3[3] -.sym 2640 smi_ctrl_ins.o_smi_data_out_SB_DFFE_Q_D_SB_LUT4_O_I2_SB_LUT4_O_1_I1[2] -.sym 2641 w_rx_24_fifo_data[6] -.sym 2642 smi_ctrl_ins.o_smi_data_out_SB_DFFE_Q_7_D_SB_LUT4_O_I0[2] -.sym 2643 smi_ctrl_ins.o_smi_data_out_SB_DFFE_Q_2_D_SB_LUT4_O_I1_SB_LUT4_O_1_I1[2] -.sym 2644 smi_ctrl_ins.o_smi_data_out_SB_DFFE_Q_D_SB_LUT4_O_I1_SB_LUT4_O_1_I3[2] -.sym 2645 smi_ctrl_ins.o_smi_data_out_SB_DFFE_Q_5_D_SB_LUT4_O_I1_SB_LUT4_O_1_I1[2] -.sym 2646 w_rx_24_fifo_data[4] -.sym 2651 w_rx_24_fifo_pull -.sym 2652 w_rx_24_fifo_data[2] -.sym 2655 smi_ctrl_ins.int_cnt_24[5] -.sym 2657 w_rx_09_fifo_data[0] -.sym 2658 w_rx_09_fifo_pull -.sym 2659 smi_ctrl_ins.r_fifo_09_pull_SB_DFFESR_Q_E -.sym 2661 w_rx_24_fifo_data[7] -.sym 2663 smi_ctrl_ins.o_smi_data_out_SB_DFFE_Q_1_D_SB_LUT4_O_I1_SB_LUT4_O_1_I1[2] -.sym 2665 w_rx_24_fifo_data[20] -.sym 2666 i_smi_a2_SB_LUT4_I1_O_SB_LUT4_I3_1_I2_SB_LUT4_O_I3[1] -.sym 2670 w_rx_24_fifo_data[27] -.sym 2673 i_smi_a1_SB_LUT4_I1_O[3] -.sym 2674 smi_ctrl_ins.o_smi_data_out_SB_DFFE_Q_6_D_SB_LUT4_O_I1_SB_LUT4_O_1_I1[2] -.sym 2675 w_rx_24_fifo_data[2] -.sym 2681 lvds_rx_09_inst.r_push_SB_DFFNESR_Q_E_SB_LUT4_O_I1_SB_LUT4_I0_O_SB_DFFNESR_D_E -.sym 2693 w_rx_24_fifo_data[14] -.sym 2695 lvds_rx_24_inst.r_state_if_SB_LUT4_I2_O[0] -.sym 2703 w_rx_24_fifo_data[11] -.sym 2710 w_rx_24_fifo_data[6] -.sym 2712 w_rx_24_fifo_data[13] -.sym 2713 w_rx_24_fifo_data[0] -.sym 2725 w_rx_24_fifo_data[13] -.sym 2726 lvds_rx_24_inst.r_state_if_SB_LUT4_I2_O[0] -.sym 2738 w_rx_24_fifo_data[0] -.sym 2740 lvds_rx_24_inst.r_state_if_SB_LUT4_I2_O[0] -.sym 2750 lvds_rx_24_inst.r_state_if_SB_LUT4_I2_O[0] -.sym 2751 w_rx_24_fifo_data[11] -.sym 2762 w_rx_24_fifo_data[14] -.sym 2764 lvds_rx_24_inst.r_state_if_SB_LUT4_I2_O[0] -.sym 2767 lvds_rx_24_inst.r_state_if_SB_LUT4_I2_O[0] -.sym 2770 w_rx_24_fifo_data[6] -.sym 2771 w_lvds_rx_24_d1_SB_LUT4_I0_O_SB_LUT4_I3_O_$glb_ce -.sym 2772 lvds_clock_buf -.sym 2773 i_smi_a1_SB_LUT4_I1_O_SB_LUT4_O_I2_SB_LUT4_I0_O[2]_$glb_sr -.sym 2774 w_rx_24_fifo_data[22] -.sym 2775 w_rx_24_fifo_data[24] -.sym 2776 w_rx_24_fifo_data[28] -.sym 2777 w_rx_24_fifo_data[29] -.sym 2778 w_rx_24_fifo_data[26] -.sym 2779 w_rx_24_fifo_data[18] -.sym 2780 smi_ctrl_ins.o_smi_data_out_SB_DFFE_Q_1_D_SB_LUT4_O_I1_SB_LUT4_O_1_I1[2] -.sym 2781 w_rx_24_fifo_data[30] -.sym 2782 w_rx_24_fifo_data[13] -.sym 2786 smi_ctrl_ins.r_fifo_24_pull_SB_LUT4_I1_O[2] -.sym 2793 w_rx_24_fifo_pull -.sym 2795 w_rx_24_fifo_data[9] -.sym 2799 w_rx_24_fifo_data[0] -.sym 2800 smi_ctrl_ins.o_smi_data_out_SB_DFFE_Q_D_SB_LUT4_O_I1_SB_LUT4_O_1_I1[2] -.sym 2802 lvds_rx_09_inst.r_state_if_SB_LUT4_I2_O[0] -.sym 2803 w_rx_24_fifo_data[1] -.sym 2804 lvds_rx_09_inst.r_state_if_SB_DFFNESR_Q_E -.sym 2807 i_smi_a2_SB_LUT4_I1_O_SB_LUT4_I3_1_I2[1] -.sym 2811 lvds_rx_09_inst.r_push_SB_DFFNESR_Q_E_SB_LUT4_O_I1_SB_LUT4_I0_O_SB_DFFNESR_D_Q[1] -.sym 2813 lvds_rx_09_inst.r_phase_count[1] -.sym 2827 w_rx_24_fifo_data[15] -.sym 2829 w_rx_24_fifo_data[21] -.sym 2830 w_rx_24_fifo_data[23] -.sym 2841 lvds_rx_24_inst.r_state_if_SB_LUT4_I2_O[0] -.sym 2847 w_rx_24_fifo_data[17] -.sym 2849 w_rx_24_fifo_data[25] -.sym 2851 w_rx_24_fifo_data[19] -.sym 2862 w_rx_24_fifo_data[17] -.sym 2863 lvds_rx_24_inst.r_state_if_SB_LUT4_I2_O[0] -.sym 2866 lvds_rx_24_inst.r_state_if_SB_LUT4_I2_O[0] -.sym 2867 w_rx_24_fifo_data[25] -.sym 2873 lvds_rx_24_inst.r_state_if_SB_LUT4_I2_O[0] -.sym 2875 w_rx_24_fifo_data[19] -.sym 2879 w_rx_24_fifo_data[21] -.sym 2880 lvds_rx_24_inst.r_state_if_SB_LUT4_I2_O[0] -.sym 2884 w_rx_24_fifo_data[15] -.sym 2887 lvds_rx_24_inst.r_state_if_SB_LUT4_I2_O[0] -.sym 2897 lvds_rx_24_inst.r_state_if_SB_LUT4_I2_O[0] -.sym 2899 w_rx_24_fifo_data[23] -.sym 2906 w_lvds_rx_24_d1_SB_LUT4_I0_O_SB_LUT4_I3_O_$glb_ce +.sym 2107 rx_09_fifo.rd_addr_gray_wr_r[6] +.sym 2127 lvds_rx_09_inst.r_push_SB_LUT4_I3_O_SB_LUT4_O_1_I0[1] +.sym 2143 rx_09_fifo.wr_addr[5] +.sym 2154 rx_09_fifo.wr_addr_gray_rd[4] +.sym 2157 rx_09_fifo.wr_addr_gray[1] +.sym 2166 rx_09_fifo.wr_addr_gray[4] +.sym 2183 rx_09_fifo.wr_addr_gray_rd[1] +.sym 2198 rx_09_fifo.wr_addr_gray[4] +.sym 2211 rx_09_fifo.wr_addr_gray_rd[4] +.sym 2218 rx_09_fifo.wr_addr_gray_rd[1] +.sym 2227 rx_09_fifo.wr_addr_gray[1] +.sym 2232 r_counter[0]_$glb_clk +.sym 2234 rx_09_fifo.wr_addr_gray_rd[2] +.sym 2235 rx_09_fifo.wr_addr_gray_rd[5] +.sym 2236 rx_09_fifo.wr_addr_gray_rd[0] +.sym 2238 rx_09_fifo.wr_addr_gray_rd[3] +.sym 2240 rx_09_fifo.rd_addr_gray_SB_DFFESR_Q_2_D[0] +.sym 2247 rx_09_fifo.rd_addr_gray[1] +.sym 2248 rx_09_fifo.rd_addr_gray_SB_DFFESR_Q_2_D_SB_LUT4_I3_O_SB_LUT4_O_1_I1_SB_LUT4_O_1_I0[1] +.sym 2253 w_rx_09_fifo_pull +.sym 2256 rx_09_fifo.rd_addr_gray_SB_DFFESR_Q_2_D_SB_LUT4_I3_O_SB_LUT4_O_2_I0_SB_LUT4_O_2_I0[1] +.sym 2258 rx_09_fifo.wr_addr[7] +.sym 2259 rx_09_fifo.wr_addr[6] +.sym 2265 rx_09_fifo.wr_addr[0] +.sym 2267 w_rx_09_fifo_push +.sym 2269 lvds_rx_09_inst.r_push_SB_LUT4_I3_O_SB_LUT4_O_1_I0[3] +.sym 2273 rx_09_fifo.wr_addr_gray_SB_DFFESR_Q_3_D[1] +.sym 2275 rx_09_fifo.wr_addr_gray_SB_DFFESR_Q_3_D[3] +.sym 2281 rx_09_fifo.wr_addr_gray_SB_DFFESR_Q_7_D[3] +.sym 2294 rx_09_fifo.wr_addr_gray_SB_DFFESR_Q_6_D[1] +.sym 2299 rx_09_fifo.wr_addr_gray_SB_DFFESR_Q_6_D[2] +.sym 2305 lvds_rx_09_inst.r_push_SB_LUT4_I3_1_O +.sym 2310 rx_09_fifo.wr_addr_gray_SB_DFFESR_Q_3_D[1] +.sym 2312 rx_09_fifo.wr_addr_gray_SB_DFFESR_Q_3_D[3] +.sym 2318 rx_09_fifo.wr_addr_gray_SB_DFFESR_Q_7_D[3] +.sym 2322 rx_09_fifo.wr_addr_gray_SB_DFFESR_Q_3_D[3] +.sym 2341 rx_09_fifo.wr_addr_gray_SB_DFFESR_Q_7_D[3] +.sym 2352 rx_09_fifo.wr_addr_gray_SB_DFFESR_Q_6_D[1] +.sym 2357 rx_09_fifo.wr_addr_gray_SB_DFFESR_Q_3_D[1] +.sym 2362 rx_09_fifo.wr_addr_gray_SB_DFFESR_Q_6_D[2] +.sym 2366 lvds_rx_09_inst.r_push_SB_LUT4_I3_1_O +.sym 2367 lvds_clock_buf +.sym 2368 i_smi_a1_SB_LUT4_I1_O[3]_$glb_sr +.sym 2369 rx_09_fifo.wr_addr_gray[6] +.sym 2370 rx_09_fifo.wr_addr[4] +.sym 2371 lvds_rx_09_inst.r_push_SB_LUT4_I3_O_SB_LUT4_O_1_I0[0] +.sym 2372 lvds_rx_09_inst.r_push_SB_LUT4_I3_1_O +.sym 2373 lvds_rx_09_inst.r_push_SB_LUT4_I3_1_O +.sym 2374 rx_09_fifo.wr_addr_gray[3] +.sym 2375 rx_09_fifo.wr_addr[7] +.sym 2376 rx_09_fifo.wr_addr[3] +.sym 2382 rx_09_fifo.rd_addr_gray_SB_DFFESR_Q_2_D[0] +.sym 2384 w_rx_09_fifo_data[0] +.sym 2385 rx_09_fifo.wr_addr[6] +.sym 2387 w_rx_09_fifo_pulled_data[6] +.sym 2392 rx_09_fifo.wr_addr_gray_rd[0] +.sym 2396 i_smi_a1_SB_LUT4_I1_O[3] +.sym 2400 lvds_rx_09_inst.r_push_SB_LUT4_I3_O_SB_LUT4_O_1_I0[1] +.sym 2401 rx_09_fifo.wr_addr_gray_SB_DFFESR_Q_7_D[0] +.sym 2403 rx_09_fifo.wr_addr[0] +.sym 2413 rx_09_fifo.wr_addr[6] +.sym 2415 w_rx_09_fifo_data[0] +.sym 2427 rx_09_fifo.wr_addr_gray_SB_LUT4_I2_1_O[5] +.sym 2429 rx_09_fifo.rd_addr_gray_wr_r[2] +.sym 2431 rx_09_fifo.wr_addr_gray_SB_LUT4_I2_1_O[1] +.sym 2432 rx_09_fifo.wr_addr_gray_SB_LUT4_I2_1_O[2] +.sym 2433 rx_09_fifo.full_o_SB_LUT4_I3_O[1] +.sym 2436 rx_09_fifo.wr_addr_gray_SB_LUT4_I2_1_O[6] +.sym 2438 lvds_rx_09_inst.r_push_SB_LUT4_I3_O_SB_LUT4_O_1_I0[1] +.sym 2442 rx_09_fifo.wr_addr_gray_SB_DFFESR_Q_6_D[2] +.sym 2445 rx_09_fifo.wr_addr_gray_SB_DFFESR_Q_6_D[1] +.sym 2447 rx_09_fifo.wr_addr[0] +.sym 2449 lvds_rx_09_inst.r_push_SB_LUT4_I3_1_O +.sym 2455 lvds_rx_09_inst.r_push_SB_LUT4_I3_O_SB_LUT4_O_1_I0[1] +.sym 2456 rx_09_fifo.wr_addr_gray_SB_DFFESR_Q_6_D[1] +.sym 2457 rx_09_fifo.wr_addr_gray_SB_DFFESR_Q_6_D[2] +.sym 2458 rx_09_fifo.rd_addr_gray_wr_r[2] +.sym 2464 rx_09_fifo.wr_addr[0] +.sym 2468 rx_09_fifo.wr_addr_gray_SB_LUT4_I2_1_O[5] +.sym 2474 rx_09_fifo.wr_addr_gray_SB_LUT4_I2_1_O[1] +.sym 2480 rx_09_fifo.wr_addr_gray_SB_LUT4_I2_1_O[2] +.sym 2481 rx_09_fifo.full_o_SB_LUT4_I3_O[1] +.sym 2487 rx_09_fifo.wr_addr_gray_SB_LUT4_I2_1_O[2] +.sym 2494 rx_09_fifo.wr_addr_gray_SB_LUT4_I2_1_O[6] +.sym 2497 rx_09_fifo.wr_addr_gray_SB_LUT4_I2_1_O[2] +.sym 2498 rx_09_fifo.wr_addr_gray_SB_LUT4_I2_1_O[1] +.sym 2501 lvds_rx_09_inst.r_push_SB_LUT4_I3_1_O +.sym 2502 lvds_clock_buf +.sym 2503 i_smi_a1_SB_LUT4_I1_O[3]_$glb_sr +.sym 2505 lvds_rx_09_inst.r_push_SB_LUT4_I3_I1[1] +.sym 2506 lvds_rx_09_inst.r_push_SB_LUT4_I3_I1[2] +.sym 2507 lvds_rx_09_inst.r_push_SB_LUT4_I3_I1[3] +.sym 2508 lvds_rx_09_inst.r_push_SB_LUT4_I3_I1[4] +.sym 2509 lvds_rx_09_inst.r_push_SB_LUT4_I3_I1[5] +.sym 2510 lvds_rx_09_inst.r_push_SB_LUT4_I3_I1[6] +.sym 2511 lvds_rx_09_inst.r_push_SB_LUT4_I3_O[1] +.sym 2513 w_rx_09_fifo_data[0] +.sym 2514 w_rx_09_fifo_data[0] +.sym 2515 lvds_rx_24_inst.r_push_SB_LUT4_I3_O +.sym 2516 rx_09_fifo.full_o_SB_LUT4_I3_O_SB_LUT4_I3_O[0] +.sym 2517 rx_09_fifo.wr_addr[7] +.sym 2527 rx_09_fifo.rd_addr[7] +.sym 2531 lvds_rx_09_inst.r_push_SB_LUT4_I3_O_SB_LUT4_O_1_I0[3] +.sym 2535 rx_09_fifo.rd_addr_gray_wr_r[6] +.sym 2537 w_rx_09_fifo_data[1] +.sym 2547 rx_09_fifo.full_o_SB_LUT4_I3_O_SB_LUT4_I3_O[0] +.sym 2548 rx_09_fifo.rd_addr[7] +.sym 2558 rx_09_fifo.wr_addr[4] +.sym 2562 rx_09_fifo.wr_addr[2] +.sym 2563 rx_09_fifo.wr_addr[6] +.sym 2566 rx_09_fifo.wr_addr[0] +.sym 2567 rx_09_fifo.wr_addr[5] +.sym 2568 lvds_rx_09_inst.r_push_SB_LUT4_I3_O_SB_LUT4_O_1_I0[3] +.sym 2571 rx_09_fifo.wr_addr[7] +.sym 2572 rx_09_fifo.wr_addr[3] +.sym 2589 $nextpnr_ICESTORM_LC_7$O +.sym 2592 rx_09_fifo.wr_addr[0] +.sym 2595 rx_09_fifo.wr_addr_gray_SB_LUT4_I2_1_I3[2] +.sym 2597 lvds_rx_09_inst.r_push_SB_LUT4_I3_O_SB_LUT4_O_1_I0[3] +.sym 2599 rx_09_fifo.wr_addr[0] +.sym 2601 rx_09_fifo.wr_addr_gray_SB_LUT4_I2_1_I3[3] +.sym 2603 rx_09_fifo.wr_addr[2] +.sym 2605 rx_09_fifo.wr_addr_gray_SB_LUT4_I2_1_I3[2] +.sym 2607 rx_09_fifo.wr_addr_gray_SB_LUT4_I2_1_I3[4] +.sym 2609 rx_09_fifo.wr_addr[3] +.sym 2611 rx_09_fifo.wr_addr_gray_SB_LUT4_I2_1_I3[3] +.sym 2613 rx_09_fifo.wr_addr_gray_SB_LUT4_I2_1_I3[5] +.sym 2615 rx_09_fifo.wr_addr[4] +.sym 2617 rx_09_fifo.wr_addr_gray_SB_LUT4_I2_1_I3[4] +.sym 2619 rx_09_fifo.wr_addr_gray_SB_LUT4_I2_1_I3[6] +.sym 2622 rx_09_fifo.wr_addr[5] +.sym 2623 rx_09_fifo.wr_addr_gray_SB_LUT4_I2_1_I3[5] +.sym 2625 rx_09_fifo.wr_addr_gray_SB_LUT4_I2_1_I3[7] +.sym 2628 rx_09_fifo.wr_addr[6] +.sym 2629 rx_09_fifo.wr_addr_gray_SB_LUT4_I2_1_I3[6] +.sym 2632 rx_09_fifo.wr_addr[7] +.sym 2635 rx_09_fifo.wr_addr_gray_SB_LUT4_I2_1_I3[7] +.sym 2639 rx_09_fifo.full_o_SB_LUT4_I3_O[3] +.sym 2640 rx_09_fifo.full_o_SB_DFFSR_Q_D_SB_LUT4_O_I1[0] +.sym 2641 lvds_rx_09_inst.r_push_SB_LUT4_I3_O[2] +.sym 2642 lvds_rx_09_inst.r_push_SB_LUT4_I3_O[0] +.sym 2643 w_rx_09_fifo_full +.sym 2644 lvds_rx_09_inst.r_push_SB_LUT4_I3_O_SB_LUT4_O_2_I2[2] +.sym 2645 rx_09_fifo.full_o_SB_DFFSR_Q_D_SB_LUT4_O_I1[1] +.sym 2646 lvds_rx_09_inst.r_push_SB_LUT4_I3_O[3] +.sym 2663 rx_24_fifo.rd_addr_gray_wr_r[6] +.sym 2665 lvds_rx_24_inst.r_push_SB_LUT4_I2_I0_SB_LUT4_O_I1[1] +.sym 2667 rx_24_fifo.rd_addr_gray_wr_r[7] +.sym 2676 rx_24_fifo.full_o_SB_DFFSR_Q_D_SB_LUT4_O_I1_SB_LUT4_O_I0[3] +.sym 2693 rx_09_fifo.wr_addr_gray_SB_LUT4_I2_1_O[1] +.sym 2695 rx_09_fifo.full_o_SB_LUT4_I3_O[1] +.sym 2696 rx_09_fifo.full_o_SB_LUT4_I3_O[2] +.sym 2697 rx_09_fifo.wr_addr_gray_SB_LUT4_I2_1_O[5] +.sym 2698 rx_09_fifo.wr_addr_gray_SB_LUT4_I2_1_O[6] +.sym 2699 rx_09_fifo.wr_addr_gray_SB_LUT4_I2_1_O[7] +.sym 2701 rx_09_fifo.full_o_SB_LUT4_I3_O[0] +.sym 2702 lvds_rx_09_inst.r_push_SB_LUT4_I3_I1[2] +.sym 2703 rx_09_fifo.rd_addr_gray_wr_r[5] +.sym 2704 lvds_rx_09_inst.r_push_SB_LUT4_I3_O_SB_LUT4_O_2_I0[0] +.sym 2706 rx_09_fifo.rd_addr_gray_wr_r[0] +.sym 2709 rx_09_fifo.wr_addr_gray_SB_DFFESR_Q_3_D[1] +.sym 2710 rx_09_fifo.wr_addr_gray_SB_DFFESR_Q_3_D[3] +.sym 2711 rx_09_fifo.wr_addr[0] +.sym 2716 rx_09_fifo.full_o_SB_LUT4_I3_O[3] +.sym 2719 rx_09_fifo.rd_addr_gray_wr_r[6] +.sym 2720 rx_09_fifo.wr_addr_gray_SB_DFFESR_Q_7_D[0] +.sym 2721 rx_09_fifo.wr_addr_gray_SB_DFFESR_Q_7_D[3] +.sym 2725 rx_09_fifo.rd_addr_gray_wr_r[5] +.sym 2726 lvds_rx_09_inst.r_push_SB_LUT4_I3_O_SB_LUT4_O_2_I0[0] +.sym 2727 rx_09_fifo.wr_addr_gray_SB_DFFESR_Q_3_D[3] +.sym 2728 rx_09_fifo.wr_addr_gray_SB_DFFESR_Q_3_D[1] +.sym 2733 rx_09_fifo.wr_addr_gray_SB_LUT4_I2_1_O[5] +.sym 2734 rx_09_fifo.full_o_SB_LUT4_I3_O[2] +.sym 2737 rx_09_fifo.wr_addr_gray_SB_LUT4_I2_1_O[6] +.sym 2738 rx_09_fifo.wr_addr_gray_SB_LUT4_I2_1_O[5] +.sym 2743 rx_09_fifo.rd_addr_gray_wr_r[0] +.sym 2744 rx_09_fifo.rd_addr_gray_wr_r[6] +.sym 2745 rx_09_fifo.wr_addr_gray_SB_DFFESR_Q_7_D[0] +.sym 2746 rx_09_fifo.wr_addr_gray_SB_DFFESR_Q_7_D[3] +.sym 2751 rx_09_fifo.wr_addr_gray_SB_LUT4_I2_1_O[6] +.sym 2752 rx_09_fifo.wr_addr_gray_SB_LUT4_I2_1_O[7] +.sym 2755 rx_09_fifo.wr_addr_gray_SB_LUT4_I2_1_O[1] +.sym 2757 rx_09_fifo.wr_addr[0] +.sym 2761 rx_09_fifo.full_o_SB_LUT4_I3_O[0] +.sym 2762 rx_09_fifo.full_o_SB_LUT4_I3_O[3] +.sym 2763 rx_09_fifo.full_o_SB_LUT4_I3_O[2] +.sym 2764 rx_09_fifo.full_o_SB_LUT4_I3_O[1] +.sym 2768 rx_09_fifo.full_o_SB_LUT4_I3_O[0] +.sym 2769 lvds_rx_09_inst.r_push_SB_LUT4_I3_I1[2] +.sym 2776 w_rx_24_fifo_data[19] +.sym 2777 w_rx_24_fifo_data[6] +.sym 2778 w_rx_24_fifo_data[20] +.sym 2779 w_rx_24_fifo_data[2] +.sym 2780 w_rx_24_fifo_data[4] +.sym 2786 w_rx_09_fifo_push +.sym 2791 rx_09_fifo.rd_addr_gray_wr_r[5] +.sym 2792 lvds_rx_09_inst.r_push_SB_LUT4_I3_O_SB_LUT4_O_2_I0[0] +.sym 2793 rx_09_fifo.rd_addr_gray_wr_r[2] +.sym 2797 rx_09_fifo.full_o_SB_LUT4_I3_O[0] +.sym 2799 w_rx_09_fifo_push +.sym 2800 rx_24_fifo.wr_addr[0] +.sym 2808 rx_24_fifo.rd_addr_gray_wr_r[2] +.sym 2830 rx_09_fifo.full_o_SB_LUT4_I3_O_SB_LUT4_I3_O[0] +.sym 2831 rx_09_fifo.rd_addr[7] +.sym 2832 rx_09_fifo.rd_addr_gray_wr[7] +.sym 2833 rx_09_fifo.full_o_SB_LUT4_I3_O_SB_LUT4_I3_O[3] +.sym 2835 rx_09_fifo.full_o_SB_LUT4_I3_O_SB_LUT4_I3_O[1] +.sym 2838 rx_09_fifo.full_o_SB_LUT4_I3_O_SB_LUT4_I3_O[2] +.sym 2872 rx_09_fifo.full_o_SB_LUT4_I3_O_SB_LUT4_I3_O[3] +.sym 2873 rx_09_fifo.full_o_SB_LUT4_I3_O_SB_LUT4_I3_O[1] +.sym 2874 rx_09_fifo.full_o_SB_LUT4_I3_O_SB_LUT4_I3_O[2] +.sym 2875 rx_09_fifo.full_o_SB_LUT4_I3_O_SB_LUT4_I3_O[0] +.sym 2887 rx_09_fifo.rd_addr_gray_wr[7] +.sym 2893 rx_09_fifo.rd_addr[7] .sym 2907 lvds_clock_buf -.sym 2908 i_smi_a1_SB_LUT4_I1_O_SB_LUT4_O_I2_SB_LUT4_I0_O[2]_$glb_sr -.sym 2909 lvds_rx_09_inst.r_push_SB_DFFNESR_Q_E -.sym 2910 lvds_rx_09_inst.r_push_SB_DFFNESR_Q_E_SB_LUT4_O_I1_SB_LUT4_O_I2[2] -.sym 2913 lvds_rx_09_inst.r_push_SB_DFFNESR_Q_E_SB_LUT4_O_I1_SB_LUT4_O_I2[3] -.sym 2914 smi_ctrl_ins.o_smi_data_out_SB_DFFE_Q_6_D_SB_LUT4_O_I1_SB_LUT4_O_1_I1[2] -.sym 2916 smi_ctrl_ins.o_smi_data_out_SB_DFFE_Q_D_SB_LUT4_O_I1_SB_LUT4_O_1_I1[2] -.sym 2922 w_rx_24_fifo_data[16] -.sym 2923 w_rx_24_fifo_data[21] -.sym 2928 i_smi_soe_se$rename$0 -.sym 2929 lvds_rx_24_inst.r_state_if_SB_LUT4_I2_O[0] -.sym 2931 w_rx_24_fifo_data[17] -.sym 2934 lvds_rx_09_inst.r_push_SB_DFFNESR_Q_E_SB_LUT4_O_I1_SB_LUT4_O_I2[3] -.sym 2942 rx_24_fifo.rd_addr_gray_wr_r[2] -.sym 2943 lvds_rx_09_inst.r_phase_count_SB_LUT4_I1_O[1] -.sym 2944 lvds_rx_09_inst.r_push_SB_DFFNESR_Q_E_SB_LUT4_O_I1_SB_LUT4_O_I2[2] -.sym 2947 lvds_rx_09_inst.r_push_SB_DFFNESR_Q_E_SB_LUT4_O_I1[1] -.sym 2952 lvds_rx_24_inst.r_state_if_SB_LUT4_I2_O[0] -.sym 2964 lvds_rx_09_inst.r_push_SB_DFFNESR_Q_E_SB_LUT4_O_I1_SB_LUT4_I0_O_SB_DFFNESR_D_E -.sym 2977 lvds_rx_09_inst.r_phase_count[0] -.sym 2978 lvds_rx_09_inst.r_push_SB_DFFNESR_Q_E_SB_LUT4_O_I1_SB_LUT4_I0_O_SB_DFFNESR_D_Q[1] -.sym 2979 lvds_rx_09_inst.r_push_SB_DFFNESR_Q_E_SB_LUT4_O_I1_SB_LUT4_O_I2[2] -.sym 2982 lvds_rx_09_inst.r_push_SB_DFFNESR_Q_E_SB_LUT4_O_I1_SB_LUT4_O_I2[3] -.sym 2985 lvds_rx_09_inst.r_phase_count[0] -.sym 2986 lvds_rx_09_inst.r_state_if_SB_LUT4_I2_O[0] -.sym 2988 lvds_rx_09_inst.r_phase_count[1] -.sym 2991 $PACKER_VCC_NET -.sym 2992 lvds_rx_09_inst.r_phase_count_SB_LUT4_I1_O[0] -.sym 2994 $nextpnr_ICESTORM_LC_3$O -.sym 2996 lvds_rx_09_inst.r_phase_count[0] -.sym 3000 lvds_rx_09_inst.r_phase_count_SB_CARRY_CI_CO[2] -.sym 3002 $PACKER_VCC_NET -.sym 3003 lvds_rx_09_inst.r_phase_count[1] -.sym 3004 lvds_rx_09_inst.r_phase_count[0] -.sym 3007 $PACKER_VCC_NET -.sym 3009 lvds_rx_09_inst.r_push_SB_DFFNESR_Q_E_SB_LUT4_O_I1_SB_LUT4_I0_O_SB_DFFNESR_D_Q[1] -.sym 3010 lvds_rx_09_inst.r_phase_count_SB_CARRY_CI_CO[2] -.sym 3014 lvds_rx_09_inst.r_push_SB_DFFNESR_Q_E_SB_LUT4_O_I1_SB_LUT4_O_I2[3] -.sym 3015 lvds_rx_09_inst.r_push_SB_DFFNESR_Q_E_SB_LUT4_O_I1_SB_LUT4_O_I2[2] -.sym 3032 lvds_rx_09_inst.r_state_if_SB_LUT4_I2_O[0] -.sym 3034 lvds_rx_09_inst.r_phase_count_SB_LUT4_I1_O[0] -.sym 3037 lvds_rx_09_inst.r_phase_count_SB_LUT4_I1_O[0] -.sym 3041 lvds_rx_09_inst.r_push_SB_DFFNESR_Q_E_SB_LUT4_O_I1_SB_LUT4_I0_O_SB_DFFNESR_D_E -.sym 3042 lvds_clock_buf -.sym 3043 i_smi_a1_SB_LUT4_I1_O_SB_LUT4_O_I2_SB_LUT4_I0_O[2]_$glb_sr -.sym 3045 lvds_rx_24_inst.r_push_SB_LUT4_I0_1_I1_SB_LUT4_O_I2[1] -.sym 3046 lvds_rx_24_inst.r_push_SB_LUT4_I0_1_I1_SB_LUT4_O_2_I0[2] -.sym 3047 lvds_rx_24_inst.r_push_SB_LUT4_I0_1_I1_SB_LUT4_O_1_I3[1] -.sym 3048 lvds_rx_24_inst.r_push_SB_LUT4_I0_1_I1_SB_LUT4_O_1_I3[2] -.sym 3049 lvds_rx_24_inst.r_push_SB_LUT4_I0_1_I1_SB_LUT4_O_I2[5] -.sym 3050 lvds_rx_24_inst.r_push_SB_LUT4_I0_1_I1_SB_LUT4_O_I2[6] -.sym 3051 spi_if_ins.state_if[0] -.sym 3057 w_rx_24_fifo_data[25] -.sym 3063 lvds_rx_09_inst.r_push_SB_DFFNESR_Q_E -.sym 3065 lvds_rx_09_inst.r_push_SB_DFFNESR_Q_E_SB_LUT4_O_I1_SB_LUT4_O_I2[2] -.sym 3069 lvds_rx_09_inst.r_phase_count_SB_LUT4_I1_O[2] -.sym 3070 w_rx_24_fifo_push -.sym 3071 $PACKER_VCC_NET -.sym 3072 lvds_rx_09_inst.r_push_SB_DFFNESR_Q_E_SB_LUT4_O_I1_SB_LUT4_O_I2[3] -.sym 3074 lvds_rx_24_inst.r_state_if_SB_LUT4_I2_O[0] -.sym 3077 $PACKER_VCC_NET -.sym 3078 lvds_rx_24_inst.r_push_SB_LUT4_I0_1_I1_SB_LUT4_O_1_I3[0] -.sym 3079 w_rx_24_fifo_empty -.sym 3086 lvds_rx_09_inst.r_push_SB_DFFNESR_Q_E_SB_LUT4_O_I1_SB_LUT4_O_I2[2] -.sym 3088 i_smi_a1_SB_LUT4_I1_O_SB_LUT4_O_I2_SB_LUT4_I0_O[2] -.sym 3091 lvds_rx_24_inst.r_state_if_SB_DFFNESR_Q_E -.sym 3097 lvds_rx_09_inst.r_push_SB_DFFNESR_Q_E_SB_LUT4_O_I1_SB_LUT4_I0_O_SB_DFFNESR_D_Q[1] -.sym 3098 lvds_rx_09_inst.r_push_SB_DFFNESR_Q_E_SB_LUT4_O_I1_SB_LUT4_O_I2[2] -.sym 3101 lvds_rx_09_inst.r_push_SB_DFFNESR_Q_E_SB_LUT4_O_I1_SB_LUT4_O_I2[3] -.sym 3103 w_lvds_rx_09_d1_SB_LUT4_I0_O[1] -.sym 3105 rx_24_fifo.rd_addr_gray[2] -.sym 3107 lvds_rx_09_inst.r_push_SB_DFFNESR_Q_E_SB_LUT4_O_I1_SB_LUT4_I0_O_SB_DFFNESR_D_Q[0] -.sym 3111 lvds_rx_09_inst.r_phase_count_SB_LUT4_I1_O[0] -.sym 3113 lvds_rx_09_inst.r_push_SB_DFFNESR_Q_E_SB_LUT4_O_I1_SB_LUT4_O_I2[0] -.sym 3114 i_smi_a1_SB_LUT4_I1_O_SB_LUT4_O_I2_SB_LUT4_I0_O[2] -.sym 3125 lvds_rx_09_inst.r_state_if_SB_DFFNESR_Q_E_SB_LUT4_O_I2[1] -.sym 3127 rx_24_fifo.rd_addr_gray_wr[2] -.sym 3132 lvds_rx_09_inst.r_push_SB_DFFNESR_Q_E_SB_LUT4_O_I1_SB_LUT4_I0_O_SB_DFFNESR_D_Q[1] -.sym 3133 lvds_rx_09_inst.r_push_SB_DFFNESR_Q_E_SB_LUT4_O_I1_SB_LUT4_I0_O_SB_DFFNESR_D_Q[0] -.sym 3138 i_smi_a1_SB_LUT4_I1_O_SB_LUT4_O_I2_SB_LUT4_I0_O[2] -.sym 3139 w_lvds_rx_09_d1_SB_LUT4_I0_O[1] -.sym 3143 rx_24_fifo.rd_addr_gray_wr[2] -.sym 3148 lvds_rx_09_inst.r_phase_count_SB_LUT4_I1_O[0] -.sym 3150 lvds_rx_09_inst.r_push_SB_DFFNESR_Q_E_SB_LUT4_O_I1_SB_LUT4_O_I2[2] -.sym 3151 lvds_rx_09_inst.r_push_SB_DFFNESR_Q_E_SB_LUT4_O_I1_SB_LUT4_O_I2[0] -.sym 3154 lvds_rx_09_inst.r_push_SB_DFFNESR_Q_E_SB_LUT4_O_I1_SB_LUT4_O_I2[3] -.sym 3155 lvds_rx_09_inst.r_push_SB_DFFNESR_Q_E_SB_LUT4_O_I1_SB_LUT4_O_I2[2] -.sym 3156 lvds_rx_09_inst.r_push_SB_DFFNESR_Q_E_SB_LUT4_O_I1_SB_LUT4_O_I2[0] -.sym 3157 lvds_rx_09_inst.r_phase_count_SB_LUT4_I1_O[0] -.sym 3160 lvds_rx_09_inst.r_state_if_SB_DFFNESR_Q_E_SB_LUT4_O_I2[1] -.sym 3162 i_smi_a1_SB_LUT4_I1_O_SB_LUT4_O_I2_SB_LUT4_I0_O[2] -.sym 3163 w_lvds_rx_09_d1_SB_LUT4_I0_O[1] -.sym 3167 rx_24_fifo.rd_addr_gray[2] -.sym 3172 lvds_rx_09_inst.r_phase_count_SB_LUT4_I1_O[0] -.sym 3173 lvds_rx_09_inst.r_push_SB_DFFNESR_Q_E_SB_LUT4_O_I1_SB_LUT4_O_I2[0] -.sym 3174 lvds_rx_09_inst.r_push_SB_DFFNESR_Q_E_SB_LUT4_O_I1_SB_LUT4_O_I2[2] -.sym 3175 lvds_rx_09_inst.r_push_SB_DFFNESR_Q_E_SB_LUT4_O_I1_SB_LUT4_O_I2[3] +.sym 2909 rx_24_fifo.full_o_SB_DFFSR_Q_D_SB_LUT4_O_I1[1] +.sym 2910 lvds_rx_24_inst.r_push_SB_LUT4_I2_I0[3] +.sym 2911 lvds_rx_24_inst.r_push_SB_LUT4_I2_I0_SB_LUT4_O_I0[0] +.sym 2912 lvds_rx_24_inst.r_push_SB_LUT4_I2_I0[1] +.sym 2913 w_rx_24_fifo_data[21] +.sym 2914 lvds_rx_24_inst.r_push_SB_LUT4_I2_I0[0] +.sym 2915 lvds_rx_24_inst.r_push_SB_LUT4_I2_I0_SB_LUT4_O_2_I0[0] +.sym 2916 w_rx_24_fifo_data[23] +.sym 2922 w_rx_24_fifo_data[18] +.sym 2928 rx_24_fifo.wr_addr[7] +.sym 2930 w_rx_24_fifo_data[1] +.sym 2931 rx_24_fifo.full_o_SB_DFFSR_Q_D_SB_LUT4_O_I1_SB_LUT4_O_I0[3] +.sym 2941 i_smi_a1_SB_LUT4_I1_O[3] +.sym 2946 rx_24_fifo.wr_addr[7] +.sym 2948 w_rx_24_fifo_data[1] +.sym 2952 rx_24_fifo.wr_addr[6] +.sym 2954 rx_24_fifo.full_o_SB_DFFSR_Q_D_SB_LUT4_O_I1_SB_LUT4_O_I0[3] +.sym 2956 rx_24_fifo.wr_addr[0] +.sym 2967 rx_24_fifo.wr_addr[5] +.sym 2970 rx_24_fifo.full_o_SB_DFFSR_Q_D_SB_LUT4_O_I1_SB_LUT4_O_I0[3] +.sym 2972 rx_24_fifo.wr_addr[3] +.sym 2973 rx_24_fifo.wr_addr[4] +.sym 2975 rx_24_fifo.full_o_SB_DFFSR_Q_D_SB_LUT4_O_I1_SB_LUT4_O_I0[3] +.sym 2977 rx_24_fifo.wr_addr[2] +.sym 2989 rx_24_fifo.wr_addr[6] +.sym 2991 rx_24_fifo.wr_addr[7] +.sym 2994 $nextpnr_ICESTORM_LC_5$O +.sym 2996 rx_24_fifo.full_o_SB_DFFSR_Q_D_SB_LUT4_O_I1_SB_LUT4_O_I0[3] +.sym 3000 rx_24_fifo.wr_addr_gray_SB_LUT4_I2_1_I3[2] +.sym 3002 rx_24_fifo.wr_addr[2] +.sym 3004 rx_24_fifo.full_o_SB_DFFSR_Q_D_SB_LUT4_O_I1_SB_LUT4_O_I0[3] +.sym 3006 rx_24_fifo.wr_addr_gray_SB_LUT4_I2_1_I3[3] +.sym 3008 rx_24_fifo.wr_addr[3] +.sym 3010 rx_24_fifo.wr_addr_gray_SB_LUT4_I2_1_I3[2] +.sym 3012 rx_24_fifo.wr_addr_gray_SB_LUT4_I2_1_I3[4] +.sym 3014 rx_24_fifo.wr_addr[4] +.sym 3016 rx_24_fifo.wr_addr_gray_SB_LUT4_I2_1_I3[3] +.sym 3018 rx_24_fifo.wr_addr_gray_SB_LUT4_I2_1_I3[5] +.sym 3020 rx_24_fifo.wr_addr[5] +.sym 3022 rx_24_fifo.wr_addr_gray_SB_LUT4_I2_1_I3[4] +.sym 3024 rx_24_fifo.wr_addr_gray_SB_LUT4_I2_1_I3[6] +.sym 3026 rx_24_fifo.wr_addr[6] +.sym 3028 rx_24_fifo.wr_addr_gray_SB_LUT4_I2_1_I3[5] +.sym 3031 rx_24_fifo.wr_addr[7] +.sym 3034 rx_24_fifo.wr_addr_gray_SB_LUT4_I2_1_I3[6] +.sym 3044 w_rx_24_fifo_data[24] +.sym 3045 w_rx_24_fifo_data[26] +.sym 3046 w_rx_24_fifo_data[27] +.sym 3047 w_rx_24_fifo_data[31] +.sym 3048 w_rx_24_fifo_data[30] +.sym 3049 w_rx_24_fifo_data[22] +.sym 3050 w_rx_24_fifo_data[25] +.sym 3051 w_rx_24_fifo_data[29] +.sym 3069 lvds_rx_24_inst.r_push_SB_LUT4_I3_O +.sym 3071 w_rx_24_fifo_data[0] +.sym 3074 rx_24_fifo.wr_addr[6] +.sym 3075 w_rx_24_fifo_push +.sym 3076 rx_24_fifo.full_o_SB_DFFSR_Q_D_SB_LUT4_O_I1_SB_LUT4_O_I0[3] +.sym 3077 w_rx_09_fifo_data[1] +.sym 3078 rx_24_fifo.wr_addr[0] +.sym 3099 lvds_rx_24_inst.r_push_SB_LUT4_I3_O +.sym 3114 rx_24_fifo.wr_addr_gray_SB_LUT4_I2_O[1] +.sym 3117 rx_24_fifo.wr_addr_gray_SB_LUT4_I2_O[4] +.sym 3122 rx_24_fifo.wr_addr[0] +.sym 3123 rx_24_fifo.wr_addr_gray_SB_LUT4_I2_O[2] +.sym 3124 rx_24_fifo.wr_addr_gray_SB_LUT4_I2_O[3] +.sym 3126 rx_24_fifo.wr_addr_gray_SB_LUT4_I2_O[5] +.sym 3133 rx_24_fifo.wr_addr_gray_SB_LUT4_I2_O[1] +.sym 3139 rx_24_fifo.wr_addr[0] +.sym 3144 rx_24_fifo.wr_addr_gray_SB_LUT4_I2_O[3] +.sym 3149 rx_24_fifo.wr_addr_gray_SB_LUT4_I2_O[4] +.sym 3163 rx_24_fifo.wr_addr_gray_SB_LUT4_I2_O[5] +.sym 3174 rx_24_fifo.wr_addr_gray_SB_LUT4_I2_O[2] +.sym 3176 lvds_rx_24_inst.r_push_SB_LUT4_I3_O .sym 3177 lvds_clock_buf -.sym 3179 rx_24_fifo.wr_addr[4] -.sym 3180 rx_24_fifo.wr_addr_gray[6] -.sym 3181 rx_24_fifo.full_o_SB_DFFSR_Q_D_SB_LUT4_O_I1_SB_LUT4_O_I0[3] -.sym 3182 lvds_rx_24_inst.r_push_SB_LUT4_I0_1_I1[1] -.sym 3183 rx_24_fifo.wr_addr[6] -.sym 3184 rx_24_fifo.wr_addr[3] -.sym 3185 rx_24_fifo.wr_addr[7] -.sym 3186 rx_24_fifo.wr_addr[2] -.sym 3191 rx_24_fifo.rd_addr_gray[2] -.sym 3192 spi_if_ins.state_if_SB_DFFESR_Q_1_R -.sym 3196 spi_if_ins.state_if[0] -.sym 3201 spi_if_ins.state_if_SB_DFFESR_Q_D[0] -.sym 3214 lvds_rx_24_inst.r_state_if_SB_LUT4_I2_O[0] -.sym 3220 lvds_rx_09_inst.r_push_SB_DFFNESR_Q_E_SB_LUT4_O_I1_SB_LUT4_I0_O_SB_DFFNESR_D_E -.sym 3226 w_rx_24_fifo_push -.sym 3232 lvds_rx_24_inst.r_push_SB_LUT4_I0_1_I1_SB_LUT4_O_2_I0[1] -.sym 3233 lvds_rx_24_inst.r_push_SB_LUT4_I0_1_I1_SB_LUT4_O_I2[1] -.sym 3234 lvds_rx_09_inst.r_push_SB_DFFNESR_Q_E_SB_LUT4_O_I1_SB_LUT4_I0_O_SB_DFFNESR_D_E -.sym 3235 lvds_rx_24_inst.r_push_SB_LUT4_I0_1_I1_SB_LUT4_O_1_I3[1] -.sym 3236 lvds_rx_24_inst.r_push_SB_LUT4_I0_1_I1_SB_LUT4_O_1_I3[2] -.sym 3237 lvds_rx_24_inst.r_push_SB_LUT4_I0_1_I1_SB_LUT4_O_I2[5] -.sym 3238 lvds_rx_09_inst.r_push_SB_DFFNESR_Q_E_SB_LUT4_O_I1[1] -.sym 3239 lvds_rx_09_inst.r_push_SB_DFFNESR_Q_E_SB_LUT4_O_I1[3] -.sym 3240 lvds_rx_09_inst.r_push_SB_DFFNESR_Q_E_SB_LUT4_O_I1_SB_LUT4_O_I2[3] -.sym 3242 lvds_rx_24_inst.r_push_SB_LUT4_I0_1_I1_SB_LUT4_O_2_I0[2] -.sym 3243 lvds_rx_09_inst.r_push_SB_DFFNESR_Q_E_SB_LUT4_O_I1[0] -.sym 3244 lvds_rx_24_inst.r_push_SB_LUT4_I0_1_I1_SB_LUT4_O_1_I3[2] -.sym 3245 lvds_rx_24_inst.r_push_SB_LUT4_I0_1_I1_SB_LUT4_O_1_I3[3] -.sym 3248 rx_24_fifo.rd_addr_gray_wr_r[2] -.sym 3250 lvds_rx_09_inst.r_push_SB_DFFNESR_Q_E_SB_LUT4_O_I1_SB_LUT4_O_I2[2] -.sym 3251 lvds_rx_09_inst.r_phase_count_SB_LUT4_I1_O[1] -.sym 3252 lvds_rx_24_inst.r_push_SB_LUT4_I0_1_I1_SB_LUT4_O_2_I0[0] -.sym 3253 lvds_rx_09_inst.r_phase_count_SB_LUT4_I1_O[2] -.sym 3256 w_lvds_rx_09_d0 -.sym 3257 w_lvds_rx_09_d1 -.sym 3258 lvds_rx_09_inst.r_push_SB_DFFNESR_Q_E_SB_LUT4_O_I1_SB_LUT4_I0_O_SB_DFFNESR_D_Q[0] -.sym 3262 lvds_rx_24_inst.r_push_SB_LUT4_I0_1_I1_SB_LUT4_O_1_I3[0] -.sym 3263 rx_24_fifo.rd_addr_gray_wr_r[5] -.sym 3265 lvds_rx_09_inst.r_push_SB_DFFNESR_Q_E_SB_LUT4_O_I1[1] -.sym 3266 lvds_rx_09_inst.r_push_SB_DFFNESR_Q_E_SB_LUT4_O_I1[3] -.sym 3267 lvds_rx_09_inst.r_push_SB_DFFNESR_Q_E_SB_LUT4_O_I1[0] -.sym 3268 lvds_rx_09_inst.r_phase_count_SB_LUT4_I1_O[2] -.sym 3273 lvds_rx_09_inst.r_push_SB_DFFNESR_Q_E_SB_LUT4_O_I1_SB_LUT4_I0_O_SB_DFFNESR_D_Q[0] -.sym 3277 lvds_rx_09_inst.r_push_SB_DFFNESR_Q_E_SB_LUT4_O_I1[0] -.sym 3278 lvds_rx_09_inst.r_push_SB_DFFNESR_Q_E_SB_LUT4_O_I1[3] -.sym 3279 lvds_rx_09_inst.r_push_SB_DFFNESR_Q_E_SB_LUT4_O_I1[1] -.sym 3280 lvds_rx_09_inst.r_phase_count_SB_LUT4_I1_O[1] -.sym 3283 lvds_rx_24_inst.r_push_SB_LUT4_I0_1_I1_SB_LUT4_O_1_I3[1] -.sym 3284 lvds_rx_24_inst.r_push_SB_LUT4_I0_1_I1_SB_LUT4_O_1_I3[2] -.sym 3285 lvds_rx_24_inst.r_push_SB_LUT4_I0_1_I1_SB_LUT4_O_1_I3[0] -.sym 3286 lvds_rx_24_inst.r_push_SB_LUT4_I0_1_I1_SB_LUT4_O_1_I3[3] -.sym 3290 lvds_rx_24_inst.r_push_SB_LUT4_I0_1_I1_SB_LUT4_O_1_I3[2] -.sym 3291 rx_24_fifo.rd_addr_gray_wr_r[5] -.sym 3292 lvds_rx_24_inst.r_push_SB_LUT4_I0_1_I1_SB_LUT4_O_I2[5] -.sym 3295 lvds_rx_24_inst.r_push_SB_LUT4_I0_1_I1_SB_LUT4_O_I2[1] -.sym 3296 rx_24_fifo.rd_addr_gray_wr_r[2] -.sym 3297 lvds_rx_24_inst.r_push_SB_LUT4_I0_1_I1_SB_LUT4_O_2_I0[2] -.sym 3301 lvds_rx_09_inst.r_push_SB_DFFNESR_Q_E_SB_LUT4_O_I1_SB_LUT4_O_I2[2] -.sym 3302 w_lvds_rx_09_d0 -.sym 3303 w_lvds_rx_09_d1 -.sym 3304 lvds_rx_09_inst.r_push_SB_DFFNESR_Q_E_SB_LUT4_O_I1_SB_LUT4_O_I2[3] -.sym 3307 lvds_rx_24_inst.r_push_SB_LUT4_I0_1_I1_SB_LUT4_O_1_I3[1] -.sym 3308 lvds_rx_24_inst.r_push_SB_LUT4_I0_1_I1_SB_LUT4_O_2_I0[1] -.sym 3309 lvds_rx_24_inst.r_push_SB_LUT4_I0_1_I1_SB_LUT4_O_2_I0[2] -.sym 3310 lvds_rx_24_inst.r_push_SB_LUT4_I0_1_I1_SB_LUT4_O_2_I0[0] -.sym 3311 lvds_rx_09_inst.r_push_SB_DFFNESR_Q_E_SB_LUT4_O_I1_SB_LUT4_I0_O_SB_DFFNESR_D_E +.sym 3178 i_smi_a1_SB_LUT4_I1_O[3]_$glb_sr +.sym 3180 rx_24_fifo.wr_addr_gray_SB_LUT4_I2_O[1] +.sym 3181 rx_24_fifo.wr_addr_gray_SB_LUT4_I2_O[2] +.sym 3182 rx_24_fifo.wr_addr_gray_SB_LUT4_I2_O[3] +.sym 3183 rx_24_fifo.wr_addr_gray_SB_LUT4_I2_O[4] +.sym 3184 rx_24_fifo.wr_addr_gray_SB_LUT4_I2_O[5] +.sym 3185 rx_24_fifo.wr_addr_gray_SB_LUT4_I2_O[6] +.sym 3186 rx_24_fifo.wr_addr_gray_SB_LUT4_I2_O[7] +.sym 3191 rx_24_fifo.full_o_SB_DFFSR_Q_D_SB_LUT4_O_I1_SB_LUT4_O_I0[3] +.sym 3192 i_smi_a1_SB_LUT4_I1_O[3] +.sym 3193 rx_24_fifo.wr_addr[5] +.sym 3194 w_rx_24_fifo_data[16] +.sym 3195 lvds_rx_24_inst.r_push_SB_LUT4_I3_O +.sym 3204 rx_24_fifo.full_o_SB_DFFSR_Q_D_SB_LUT4_O_I1[1] +.sym 3205 lvds_rx_09_inst.r_state_if[1] +.sym 3206 rx_24_fifo.rd_addr_gray_wr_r[7] +.sym 3210 lvds_rx_24_inst.r_push_SB_LUT4_I2_I0_SB_LUT4_O_I0[2] +.sym 3213 lvds_rx_24_inst.r_push_SB_LUT4_I2_I0_SB_LUT4_O_I1[1] +.sym 3214 rx_24_fifo.rd_addr_gray_wr_r[6] +.sym 3215 i_smi_a1_SB_LUT4_I1_O[3] +.sym 3223 lvds_rx_24_inst.r_push_SB_LUT4_I3_O +.sym 3237 lvds_rx_24_inst.r_push_SB_LUT4_I2_I0_SB_LUT4_O_2_I0[1] +.sym 3241 w_rx_24_fifo_data[26] +.sym 3242 i_smi_a1_SB_LUT4_I1_O[3] +.sym 3245 w_lvds_rx_09_d1_SB_LUT4_I0_O[1] +.sym 3249 i_smi_a1_SB_LUT4_I1_O[3] +.sym 3251 rx_24_fifo.wr_addr_gray_SB_LUT4_I2_O[3] +.sym 3252 rx_24_fifo.wr_addr_gray_SB_LUT4_I2_O[4] +.sym 3259 w_rx_24_fifo_push +.sym 3261 lvds_rx_24_inst.r_state_if_SB_LUT4_I2_O[0] +.sym 3284 w_rx_24_fifo_data[26] +.sym 3286 lvds_rx_24_inst.r_state_if_SB_LUT4_I2_O[0] +.sym 3289 rx_24_fifo.wr_addr_gray_SB_LUT4_I2_O[4] +.sym 3290 lvds_rx_24_inst.r_push_SB_LUT4_I2_I0_SB_LUT4_O_2_I0[1] +.sym 3292 rx_24_fifo.wr_addr_gray_SB_LUT4_I2_O[3] +.sym 3297 i_smi_a1_SB_LUT4_I1_O[3] +.sym 3298 w_lvds_rx_09_d1_SB_LUT4_I0_O[1] +.sym 3303 w_rx_24_fifo_push +.sym 3304 i_smi_a1_SB_LUT4_I1_O[3] +.sym 3311 w_lvds_rx_24_d1_SB_LUT4_I0_O_SB_LUT4_I3_O_$glb_ce .sym 3312 lvds_clock_buf -.sym 3313 i_smi_a1_SB_LUT4_I1_O_SB_LUT4_O_I2_SB_LUT4_I0_O[2]_$glb_sr -.sym 3315 rx_24_fifo.wr_addr_gray_SB_LUT4_I2_1_O[1] -.sym 3316 rx_24_fifo.wr_addr_gray_SB_LUT4_I2_1_O[2] -.sym 3317 rx_24_fifo.wr_addr_gray_SB_LUT4_I2_1_O[3] -.sym 3318 rx_24_fifo.wr_addr_gray_SB_LUT4_I2_1_O[4] -.sym 3319 rx_24_fifo.wr_addr_gray_SB_LUT4_I2_1_O[5] -.sym 3320 rx_24_fifo.wr_addr_gray_SB_LUT4_I2_1_O[6] -.sym 3321 rx_24_fifo.wr_addr_gray_SB_LUT4_I2_1_O[7] -.sym 3330 lvds_rx_09_inst.r_push_SB_DFFNESR_Q_E_SB_LUT4_O_I1_SB_LUT4_I0_O_SB_DFFNESR_D_E -.sym 3338 w_rx_24_fifo_data[1] -.sym 3339 rx_24_fifo.wr_addr[0] -.sym 3341 lvds_rx_24_inst.r_push_SB_LUT4_I0_1_I1_SB_LUT4_O_I2[1] -.sym 3342 rx_24_fifo.rd_addr_gray_wr_r[7] -.sym 3346 w_rx_24_fifo_data[0] -.sym 3358 lvds_rx_09_inst.r_push_SB_DFFNESR_Q_E_SB_LUT4_O_I1_SB_LUT4_I0_O_SB_DFFNESR_D_E -.sym 3368 lvds_rx_24_inst.r_push_SB_LUT4_I0_1_I1_SB_LUT4_O_2_I0[1] -.sym 3369 lvds_rx_24_inst.r_push_SB_DFFNESR_Q_E -.sym 3370 lvds_rx_24_inst.r_push_SB_LUT4_I0_1_I1[3] -.sym 3371 i_smi_a1_SB_LUT4_I1_O_SB_LUT4_O_I2_SB_LUT4_I0_O[2] -.sym 3376 lvds_rx_24_inst.r_push_SB_DFFNESR_Q_E_SB_LUT4_O_I1[1] -.sym 3377 lvds_rx_09_inst.r_push_SB_DFFNESR_Q_E_SB_LUT4_O_I1_SB_LUT4_O_I2[2] -.sym 3378 lvds_rx_24_inst.r_push_SB_LUT4_I0_1_I1[1] -.sym 3379 lvds_rx_24_inst.r_push_SB_DFFNESR_Q_E_SB_LUT4_O_I1_SB_LUT4_O_I2[0] -.sym 3380 lvds_rx_09_inst.r_push_SB_DFFNESR_Q_E_SB_LUT4_O_I1_SB_LUT4_O_I2[3] -.sym 3382 lvds_rx_24_inst.r_push_SB_LUT4_I0_1_I1[2] -.sym 3384 w_rx_24_fifo_push -.sym 3386 rx_24_fifo.wr_addr_gray_SB_LUT4_I2_1_O[3] -.sym 3387 rx_24_fifo.wr_addr_gray_SB_LUT4_I2_1_O[4] -.sym 3392 w_rx_24_fifo_full -.sym 3400 lvds_rx_24_inst.r_push_SB_LUT4_I0_1_I1[1] -.sym 3401 w_rx_24_fifo_push -.sym 3402 lvds_rx_24_inst.r_push_SB_LUT4_I0_1_I1[2] -.sym 3403 lvds_rx_24_inst.r_push_SB_LUT4_I0_1_I1[3] -.sym 3406 lvds_rx_24_inst.r_push_SB_DFFNESR_Q_E_SB_LUT4_O_I1_SB_LUT4_O_I2[0] -.sym 3407 w_rx_24_fifo_full -.sym 3409 lvds_rx_24_inst.r_push_SB_DFFNESR_Q_E_SB_LUT4_O_I1[1] -.sym 3420 lvds_rx_24_inst.r_push_SB_DFFNESR_Q_E_SB_LUT4_O_I1_SB_LUT4_O_I2[0] -.sym 3421 lvds_rx_24_inst.r_push_SB_DFFNESR_Q_E_SB_LUT4_O_I1[1] -.sym 3436 lvds_rx_09_inst.r_push_SB_DFFNESR_Q_E_SB_LUT4_O_I1_SB_LUT4_O_I2[3] -.sym 3438 i_smi_a1_SB_LUT4_I1_O_SB_LUT4_O_I2_SB_LUT4_I0_O[2] -.sym 3439 lvds_rx_09_inst.r_push_SB_DFFNESR_Q_E_SB_LUT4_O_I1_SB_LUT4_O_I2[2] -.sym 3442 rx_24_fifo.wr_addr_gray_SB_LUT4_I2_1_O[3] -.sym 3444 lvds_rx_24_inst.r_push_SB_LUT4_I0_1_I1_SB_LUT4_O_2_I0[1] -.sym 3445 rx_24_fifo.wr_addr_gray_SB_LUT4_I2_1_O[4] -.sym 3446 lvds_rx_24_inst.r_push_SB_DFFNESR_Q_E +.sym 3313 i_smi_a1_SB_LUT4_I1_O[3]_$glb_sr +.sym 3314 rx_24_fifo.full_o_SB_LUT4_I3_O_SB_LUT4_I1_O[1] +.sym 3315 rx_24_fifo.full_o_SB_DFFSR_Q_D_SB_LUT4_O_I1[0] +.sym 3316 rx_24_fifo.full_o_SB_LUT4_I3_O_SB_LUT4_I1_O[2] +.sym 3317 rx_24_fifo.full_o_SB_LUT4_I3_O[2] +.sym 3318 rx_24_fifo.wr_addr_gray_SB_DFFESR_Q_6_D[2] +.sym 3319 w_rx_24_fifo_full +.sym 3320 rx_24_fifo.wr_addr_gray_SB_DFFESR_Q_6_D[1] +.sym 3321 rx_24_fifo.full_o_SB_LUT4_I3_O[1] +.sym 3328 i_smi_a1_SB_LUT4_I1_O[3] +.sym 3334 w_rx_24_fifo_data[28] +.sym 3338 rx_24_fifo.rd_addr_gray_wr[4] +.sym 3343 w_rx_09_fifo_push +.sym 3344 rx_24_fifo.rd_addr_gray_wr[6] +.sym 3345 rx_24_fifo.wr_addr[0] +.sym 3346 rx_24_fifo.wr_addr[7] +.sym 3347 rx_24_fifo.rd_addr_gray_wr_r[2] +.sym 3368 lvds_rx_09_inst.r_state_if[1] +.sym 3369 rx_24_fifo.wr_addr[0] +.sym 3371 lvds_rx_09_inst.r_state_if[0] +.sym 3372 rx_24_fifo.wr_addr_gray_SB_LUT4_I2_O[5] +.sym 3373 rx_24_fifo.wr_addr_gray_SB_LUT4_I2_O[6] +.sym 3376 rx_24_fifo.wr_addr_gray_SB_LUT4_I2_O[1] +.sym 3377 rx_24_fifo.wr_addr_gray_SB_DFFESR_Q_7_D[0] +.sym 3379 w_lvds_rx_09_d0 +.sym 3380 w_lvds_rx_09_d1 +.sym 3382 rx_24_fifo.wr_addr_gray_SB_LUT4_I2_O[7] +.sym 3394 lvds_rx_24_inst.r_push_SB_LUT4_I3_O +.sym 3400 rx_24_fifo.wr_addr_gray_SB_LUT4_I2_O[7] +.sym 3407 rx_24_fifo.wr_addr_gray_SB_LUT4_I2_O[1] +.sym 3409 rx_24_fifo.wr_addr[0] +.sym 3412 rx_24_fifo.wr_addr_gray_SB_LUT4_I2_O[7] +.sym 3414 rx_24_fifo.wr_addr_gray_SB_LUT4_I2_O[6] +.sym 3419 rx_24_fifo.wr_addr_gray_SB_LUT4_I2_O[6] +.sym 3424 rx_24_fifo.wr_addr_gray_SB_LUT4_I2_O[6] +.sym 3427 rx_24_fifo.wr_addr_gray_SB_LUT4_I2_O[5] +.sym 3430 lvds_rx_09_inst.r_state_if[1] +.sym 3431 w_lvds_rx_09_d1 +.sym 3432 w_lvds_rx_09_d0 +.sym 3433 lvds_rx_09_inst.r_state_if[0] +.sym 3439 rx_24_fifo.wr_addr_gray_SB_DFFESR_Q_7_D[0] +.sym 3446 lvds_rx_24_inst.r_push_SB_LUT4_I3_O .sym 3447 lvds_clock_buf -.sym 3448 i_smi_a1_SB_LUT4_I1_O_SB_LUT4_O_I2_SB_LUT4_I0_O[2]_$glb_sr -.sym 3449 rx_24_fifo.full_o_SB_LUT4_I0_I1[1] -.sym 3450 w_rx_24_fifo_full -.sym 3451 rx_24_fifo.wr_addr_gray_SB_DFFESR_Q_6_D[1] -.sym 3452 rx_24_fifo.wr_addr_gray_SB_DFFESR_Q_6_D[2] -.sym 3453 rx_24_fifo.full_o_SB_DFFSR_Q_D_SB_LUT4_O_I1[0] -.sym 3454 rx_24_fifo.wr_addr_gray_SB_DFFESR_Q_7_D[1] -.sym 3455 rx_24_fifo.wr_addr_gray_SB_DFFESR_Q_7_D[2] -.sym 3456 rx_24_fifo.full_o_SB_LUT4_I0_I1[2] -.sym 3462 rx_24_fifo.wr_addr[0] -.sym 3464 rx_24_fifo.wr_addr_gray_SB_LUT4_I2_1_O[3] -.sym 3465 lvds_rx_24_inst.r_push_SB_DFFNESR_Q_E -.sym 3466 rx_24_fifo.wr_addr[5] -.sym 3470 rx_24_fifo.wr_addr[0] -.sym 3476 lvds_rx_24_inst.r_state_if_SB_LUT4_I2_O[0] -.sym 3478 rx_24_fifo.rd_addr_gray_wr_r[5] -.sym 3480 lvds_rx_24_inst.r_push_SB_DFFNESR_Q_E_SB_LUT4_O_I1_SB_LUT4_I0_O_SB_DFFNESR_D_E -.sym 3482 rx_24_fifo.rd_addr_gray_wr_r[2] -.sym 3486 w_lvds_rx_09_d1 -.sym 3493 lvds_rx_24_inst.r_push_SB_DFFNESR_Q_E -.sym 3495 lvds_rx_24_inst.r_state_if_SB_LUT4_I2_O[1] -.sym 3504 lvds_rx_24_inst.r_state_if_SB_DFFNESR_Q_E -.sym 3505 lvds_rx_24_inst.r_push_SB_DFFNESR_Q_E_SB_LUT4_O_I1[0] -.sym 3506 lvds_rx_24_inst.r_push_SB_DFFNESR_Q_E_SB_LUT4_O_I1_SB_LUT4_O_I2[0] -.sym 3509 rx_24_fifo.full_o_SB_LUT4_I0_I1[3] -.sym 3513 lvds_rx_24_inst.r_state_if_SB_LUT4_I2_O[0] -.sym 3517 lvds_rx_24_inst.r_state_if_SB_LUT4_I2_O[1] -.sym 3518 rx_24_fifo.full_o_SB_LUT4_I0_I1[1] -.sym 3519 w_rx_24_fifo_full -.sym 3522 i_smi_a1_SB_LUT4_I1_O_SB_LUT4_O_I2_SB_LUT4_I0_O[2] -.sym 3527 lvds_rx_24_inst.r_push_SB_DFFNESR_Q_E_SB_LUT4_O_I1[1] -.sym 3533 rx_24_fifo.full_o_SB_LUT4_I0_I1[2] -.sym 3542 lvds_rx_24_inst.r_state_if_SB_LUT4_I2_O[0] -.sym 3547 rx_24_fifo.full_o_SB_LUT4_I0_I1[2] -.sym 3548 w_rx_24_fifo_full -.sym 3549 rx_24_fifo.full_o_SB_LUT4_I0_I1[1] -.sym 3550 rx_24_fifo.full_o_SB_LUT4_I0_I1[3] -.sym 3561 lvds_rx_24_inst.r_state_if_SB_LUT4_I2_O[1] -.sym 3571 lvds_rx_24_inst.r_push_SB_DFFNESR_Q_E_SB_LUT4_O_I1[1] -.sym 3572 lvds_rx_24_inst.r_push_SB_DFFNESR_Q_E_SB_LUT4_O_I1[0] -.sym 3573 i_smi_a1_SB_LUT4_I1_O_SB_LUT4_O_I2_SB_LUT4_I0_O[2] -.sym 3578 lvds_rx_24_inst.r_push_SB_DFFNESR_Q_E_SB_LUT4_O_I1[1] -.sym 3580 lvds_rx_24_inst.r_push_SB_DFFNESR_Q_E_SB_LUT4_O_I1_SB_LUT4_O_I2[0] -.sym 3581 lvds_rx_24_inst.r_state_if_SB_DFFNESR_Q_E +.sym 3448 i_smi_a1_SB_LUT4_I1_O[3]_$glb_sr +.sym 3449 rx_24_fifo.full_o_SB_LUT4_I3_O_SB_LUT4_I1_O[0] +.sym 3450 rx_24_fifo.rd_addr_gray_wr_r[7] +.sym 3451 rx_24_fifo.full_o_SB_DFFSR_Q_D_SB_LUT4_O_I1_SB_LUT4_O_I0[0] +.sym 3452 lvds_rx_24_inst.r_push_SB_LUT4_I2_I0_SB_LUT4_O_I0[2] +.sym 3453 rx_24_fifo.full_o_SB_DFFSR_Q_D_SB_LUT4_O_I1[2] +.sym 3454 rx_24_fifo.rd_addr_gray_wr_r[6] +.sym 3455 rx_24_fifo.full_o_SB_LUT4_I3_O_SB_LUT4_I1_O[3] +.sym 3456 rx_24_fifo.full_o_SB_LUT4_I3_O[0] +.sym 3461 rx_24_fifo.wr_addr[7] +.sym 3462 rx_24_fifo.wr_addr_gray_SB_DFFESR_Q_6_D[1] +.sym 3465 rx_24_fifo.wr_addr_gray_SB_DFFESR_Q_7_D[3] +.sym 3466 rx_24_fifo.full_o_SB_LUT4_I3_O[1] +.sym 3471 rx_24_fifo.wr_addr_gray[5] +.sym 3473 lvds_rx_09_inst.r_state_if[0] +.sym 3481 i_smi_a1_SB_LUT4_I1_O[3] +.sym 3488 w_rx_24_fifo_data[1] +.sym 3492 lvds_rx_09_inst.r_state_if_SB_DFFNESR_Q_E_SB_LUT4_O_I2_SB_LUT4_O_I2_SB_LUT4_I2_O[3] +.sym 3494 lvds_rx_09_inst.r_state_if_SB_DFFNESR_Q_E_SB_LUT4_O_I2_SB_LUT4_O_I2_SB_LUT4_I2_O[1] +.sym 3504 lvds_rx_09_inst.r_state_if_SB_DFFNESR_Q_E +.sym 3506 i_smi_a1_SB_LUT4_I1_O[3] +.sym 3507 w_lvds_rx_09_d1_SB_LUT4_I0_O[1] +.sym 3511 lvds_rx_09_inst.r_state_if_SB_LUT4_I2_O[0] +.sym 3513 lvds_rx_09_inst.r_state_if_SB_DFFNESR_Q_E_SB_LUT4_O_I2[1] +.sym 3531 lvds_rx_09_inst.r_state_if_SB_DFFNESR_Q_E_SB_LUT4_O_I2_SB_LUT4_O_I2_SB_LUT4_I2_O[1] +.sym 3544 lvds_rx_09_inst.r_state_if_SB_DFFNESR_Q_E_SB_LUT4_O_I2_SB_LUT4_O_I2_SB_LUT4_I2_O[1] +.sym 3547 lvds_rx_09_inst.r_state_if_SB_DFFNESR_Q_E_SB_LUT4_O_I2[1] +.sym 3549 i_smi_a1_SB_LUT4_I1_O[3] +.sym 3550 w_lvds_rx_09_d1_SB_LUT4_I0_O[1] +.sym 3559 lvds_rx_09_inst.r_state_if_SB_LUT4_I2_O[0] +.sym 3581 lvds_rx_09_inst.r_state_if_SB_DFFNESR_Q_E .sym 3582 lvds_clock_buf -.sym 3583 i_smi_a1_SB_LUT4_I1_O_SB_LUT4_O_I2_SB_LUT4_I0_O[2]_$glb_sr -.sym 3585 lvds_rx_24_inst.r_phase_count_SB_LUT4_I1_O[0] -.sym 3586 rx_24_fifo.full_o_SB_LUT4_I0_O[3] -.sym 3587 rx_24_fifo.full_o_SB_LUT4_I0_O[2] -.sym 3588 rx_24_fifo.full_o_SB_DFFSR_Q_D_SB_LUT4_O_I1[2] -.sym 3589 lvds_rx_24_inst.r_push_SB_LUT4_I3_O -.sym 3590 rx_24_fifo.full_o_SB_DFFSR_Q_D_SB_LUT4_O_I1_SB_LUT4_O_I0[0] -.sym 3602 i_smi_a1_SB_LUT4_I1_O_SB_LUT4_O_I2_SB_LUT4_I0_O[2] -.sym 3608 w_lvds_rx_09_d0 -.sym 3609 rx_24_fifo.rd_addr_gray_wr[0] -.sym 3610 rx_24_fifo.full_o_SB_DFFSR_Q_D_SB_LUT4_O_I1_SB_LUT4_O_I0[1] -.sym 3612 $PACKER_VCC_NET -.sym 3613 $PACKER_VCC_NET -.sym 3618 lvds_rx_24_inst.r_push_SB_DFFNESR_Q_E_SB_LUT4_O_I1_SB_LUT4_I0_O_SB_DFFNESR_D_E -.sym 3626 lvds_rx_24_inst.r_state_if_SB_DFFNESR_Q_E -.sym 3638 lvds_rx_24_inst.r_push_SB_DFFNESR_Q_E_SB_LUT4_O_I1[1] -.sym 3641 w_lvds_rx_24_d0 -.sym 3646 lvds_rx_24_inst.r_push_SB_DFFNESR_Q_E_SB_LUT4_O_I1[1] -.sym 3647 lvds_rx_24_inst.r_state_if_SB_DFFNESR_Q_E_SB_LUT4_O_I2[1] -.sym 3649 lvds_rx_24_inst.r_push_SB_DFFNESR_Q_E_SB_LUT4_O_I1_SB_LUT4_O_I2[0] -.sym 3650 w_lvds_rx_24_d1 -.sym 3651 lvds_rx_24_inst.r_push_SB_DFFNESR_Q_E_SB_LUT4_O_I1_SB_LUT4_O_I2[2] -.sym 3659 lvds_rx_24_inst.r_push_SB_DFFNESR_Q_E_SB_LUT4_O_I1_SB_LUT4_O_I2_SB_LUT4_I0_O[0] -.sym 3660 w_lvds_rx_24_d1_SB_LUT4_I0_O[1] -.sym 3662 lvds_rx_24_inst.r_phase_count_SB_LUT4_I1_O[0] -.sym 3668 i_smi_a1_SB_LUT4_I1_O_SB_LUT4_O_I2_SB_LUT4_I0_O[2] -.sym 3670 w_lvds_rx_24_d0 -.sym 3672 lvds_rx_24_inst.r_push_SB_DFFNESR_Q_E_SB_LUT4_O_I1_SB_LUT4_O_I2_SB_LUT4_I0_O[0] -.sym 3677 lvds_rx_24_inst.r_push_SB_DFFNESR_Q_E_SB_LUT4_O_I1[1] -.sym 3678 lvds_rx_24_inst.r_push_SB_DFFNESR_Q_E_SB_LUT4_O_I1_SB_LUT4_O_I2[0] -.sym 3679 i_smi_a1_SB_LUT4_I1_O_SB_LUT4_O_I2_SB_LUT4_I0_O[2] -.sym 3682 lvds_rx_24_inst.r_phase_count_SB_LUT4_I1_O[0] -.sym 3683 lvds_rx_24_inst.r_push_SB_DFFNESR_Q_E_SB_LUT4_O_I1_SB_LUT4_O_I2[2] -.sym 3684 lvds_rx_24_inst.r_push_SB_DFFNESR_Q_E_SB_LUT4_O_I1[1] -.sym 3685 lvds_rx_24_inst.r_push_SB_DFFNESR_Q_E_SB_LUT4_O_I1_SB_LUT4_O_I2[0] -.sym 3688 lvds_rx_24_inst.r_push_SB_DFFNESR_Q_E_SB_LUT4_O_I1_SB_LUT4_O_I2[0] -.sym 3689 lvds_rx_24_inst.r_phase_count_SB_LUT4_I1_O[0] -.sym 3690 lvds_rx_24_inst.r_push_SB_DFFNESR_Q_E_SB_LUT4_O_I1_SB_LUT4_O_I2[2] -.sym 3694 w_lvds_rx_24_d1 -.sym 3696 lvds_rx_24_inst.r_push_SB_DFFNESR_Q_E_SB_LUT4_O_I1_SB_LUT4_O_I2_SB_LUT4_I0_O[0] -.sym 3700 w_lvds_rx_24_d1_SB_LUT4_I0_O[1] -.sym 3702 lvds_rx_24_inst.r_state_if_SB_DFFNESR_Q_E_SB_LUT4_O_I2[1] -.sym 3703 i_smi_a1_SB_LUT4_I1_O_SB_LUT4_O_I2_SB_LUT4_I0_O[2] -.sym 3706 lvds_rx_24_inst.r_push_SB_DFFNESR_Q_E_SB_LUT4_O_I1[1] -.sym 3707 lvds_rx_24_inst.r_push_SB_DFFNESR_Q_E_SB_LUT4_O_I1_SB_LUT4_O_I2[0] -.sym 3708 lvds_rx_24_inst.r_phase_count_SB_LUT4_I1_O[0] -.sym 3709 lvds_rx_24_inst.r_push_SB_DFFNESR_Q_E_SB_LUT4_O_I1_SB_LUT4_O_I2[2] -.sym 3712 lvds_rx_24_inst.r_push_SB_DFFNESR_Q_E_SB_LUT4_O_I1_SB_LUT4_O_I2[0] -.sym 3713 w_lvds_rx_24_d1 -.sym 3714 lvds_rx_24_inst.r_push_SB_DFFNESR_Q_E_SB_LUT4_O_I1[1] -.sym 3715 w_lvds_rx_24_d0 -.sym 3716 w_lvds_rx_24_d1_SB_LUT4_I0_O_SB_LUT4_I3_O_$glb_ce +.sym 3583 i_smi_a1_SB_LUT4_I1_O[3]_$glb_sr +.sym 3584 rx_24_fifo.rd_addr_gray_wr[5] +.sym 3590 rx_24_fifo.full_o_SB_DFFSR_Q_D_SB_LUT4_O_I1_SB_LUT4_O_I0[1] +.sym 3597 lvds_rx_09_inst.r_state_if_SB_LUT4_I2_O[0] +.sym 3600 lvds_rx_09_inst.r_state_if[1] +.sym 3601 lvds_rx_09_inst.r_state_if_SB_DFFNESR_Q_E_SB_LUT4_O_I2[1] +.sym 3606 lvds_rx_09_inst.r_state_if[0] +.sym 3610 w_rx_24_fifo_push +.sym 3612 w_rx_09_fifo_data[1] +.sym 3613 lvds_rx_09_inst.r_state_if[0] +.sym 3617 lvds_rx_24_inst.r_push_SB_LUT4_I3_O +.sym 3618 w_rx_24_fifo_data[0] +.sym 3622 lvds_rx_09_inst.r_state_if_SB_DFFNESR_Q_E_SB_LUT4_O_I2[1] +.sym 3629 lvds_rx_09_inst.r_state_if[1] +.sym 3640 w_lvds_rx_24_d1_SB_LUT4_I0_O_SB_LUT4_O_I2[1] +.sym 3644 lvds_rx_24_inst.r_phase_count[0] +.sym 3647 w_lvds_rx_09_d1 +.sym 3649 lvds_rx_24_inst.r_phase_count[1] +.sym 3650 lvds_rx_24_inst.r_phase_count_SB_LUT4_O_I3[0] +.sym 3651 lvds_rx_24_inst.r_phase_count_SB_LUT4_O_I3[1] +.sym 3652 $PACKER_VCC_NET +.sym 3657 w_lvds_rx_09_d0 +.sym 3667 lvds_rx_09_inst.r_state_if_SB_DFFNESR_Q_E_SB_LUT4_O_I2_SB_LUT4_O_I2_SB_LUT4_I2_O[3] +.sym 3668 lvds_rx_24_inst.r_phase_count[0] +.sym 3669 $nextpnr_ICESTORM_LC_4$O +.sym 3671 lvds_rx_24_inst.r_phase_count[0] +.sym 3675 lvds_rx_24_inst.r_phase_count_SB_CARRY_CI_CO[2] +.sym 3677 $PACKER_VCC_NET +.sym 3678 lvds_rx_24_inst.r_phase_count[1] +.sym 3679 lvds_rx_24_inst.r_phase_count[0] +.sym 3683 lvds_rx_24_inst.r_phase_count_SB_LUT4_O_I3[1] +.sym 3684 $PACKER_VCC_NET +.sym 3685 lvds_rx_24_inst.r_phase_count_SB_CARRY_CI_CO[2] +.sym 3688 lvds_rx_09_inst.r_state_if_SB_DFFNESR_Q_E_SB_LUT4_O_I2_SB_LUT4_O_I2_SB_LUT4_I2_O[3] +.sym 3690 w_lvds_rx_09_d1 +.sym 3694 lvds_rx_24_inst.r_phase_count_SB_LUT4_O_I3[0] +.sym 3706 w_lvds_rx_09_d0 +.sym 3707 lvds_rx_09_inst.r_state_if_SB_DFFNESR_Q_E_SB_LUT4_O_I2_SB_LUT4_O_I2_SB_LUT4_I2_O[3] +.sym 3712 w_lvds_rx_24_d1_SB_LUT4_I0_O_SB_LUT4_O_I2[1] +.sym 3716 w_lvds_rx_09_d1_SB_LUT4_I0_O_SB_LUT4_I3_O_$glb_ce .sym 3717 lvds_clock_buf -.sym 3718 i_smi_a1_SB_LUT4_I1_O_SB_LUT4_O_I2_SB_LUT4_I0_O[2]_$glb_sr -.sym 3721 rx_24_fifo.rd_addr_gray_wr_r[5] -.sym 3722 rx_24_fifo.rd_addr_gray_wr_r[0] -.sym 3726 rx_24_fifo.full_o_SB_DFFSR_Q_D_SB_LUT4_O_I1_SB_LUT4_O_I0[1] -.sym 3737 w_rx_24_fifo_push -.sym 3738 rx_24_fifo.wr_addr[0] -.sym 3754 w_lvds_rx_24_d1_SB_LUT4_I0_O[1] -.sym 3773 lvds_rx_24_inst.r_phase_count_SB_LUT4_I1_O[0] -.sym 3775 lvds_rx_24_inst.r_push_SB_DFFNESR_Q_E_SB_LUT4_O_I1_SB_LUT4_I0_O_SB_DFFNESR_D_Q[1] -.sym 3778 lvds_rx_24_inst.r_push_SB_DFFNESR_Q_E_SB_LUT4_O_I1_SB_LUT4_O_I2_SB_LUT4_I0_O[0] -.sym 3783 lvds_rx_24_inst.r_push_SB_DFFNESR_Q_E_SB_LUT4_O_I1[0] -.sym 3786 lvds_rx_24_inst.r_state_if_SB_LUT4_I2_O[1] -.sym 3789 lvds_rx_24_inst.r_phase_count_SB_LUT4_I1_O[1] -.sym 3792 lvds_rx_24_inst.r_phase_count[0] -.sym 3796 $PACKER_VCC_NET -.sym 3797 $PACKER_VCC_NET -.sym 3798 lvds_rx_24_inst.r_phase_count_SB_LUT4_I1_O[2] -.sym 3799 lvds_rx_24_inst.r_push_SB_DFFNESR_Q_E_SB_LUT4_O_I1_SB_LUT4_I0_O_SB_DFFNESR_D_E -.sym 3800 lvds_rx_24_inst.r_phase_count[0] -.sym 3801 lvds_rx_24_inst.r_push_SB_DFFNESR_Q_E_SB_LUT4_O_I1_SB_LUT4_I0_O_SB_DFFNESR_D_Q[0] -.sym 3803 lvds_rx_24_inst.r_phase_count[1] -.sym 3804 $nextpnr_ICESTORM_LC_5$O -.sym 3806 lvds_rx_24_inst.r_phase_count[0] -.sym 3810 lvds_rx_24_inst.r_phase_count_SB_CARRY_CI_CO[2] -.sym 3812 lvds_rx_24_inst.r_phase_count[1] -.sym 3813 $PACKER_VCC_NET -.sym 3814 lvds_rx_24_inst.r_phase_count[0] -.sym 3818 lvds_rx_24_inst.r_push_SB_DFFNESR_Q_E_SB_LUT4_O_I1_SB_LUT4_I0_O_SB_DFFNESR_D_Q[1] -.sym 3819 $PACKER_VCC_NET -.sym 3820 lvds_rx_24_inst.r_phase_count_SB_CARRY_CI_CO[2] -.sym 3823 lvds_rx_24_inst.r_state_if_SB_LUT4_I2_O[1] -.sym 3824 lvds_rx_24_inst.r_push_SB_DFFNESR_Q_E_SB_LUT4_O_I1_SB_LUT4_O_I2_SB_LUT4_I0_O[0] -.sym 3825 lvds_rx_24_inst.r_phase_count_SB_LUT4_I1_O[2] -.sym 3826 lvds_rx_24_inst.r_push_SB_DFFNESR_Q_E_SB_LUT4_O_I1[0] -.sym 3830 lvds_rx_24_inst.r_phase_count_SB_LUT4_I1_O[0] -.sym 3835 lvds_rx_24_inst.r_phase_count_SB_LUT4_I1_O[1] -.sym 3836 lvds_rx_24_inst.r_push_SB_DFFNESR_Q_E_SB_LUT4_O_I1[0] -.sym 3837 lvds_rx_24_inst.r_state_if_SB_LUT4_I2_O[1] -.sym 3838 lvds_rx_24_inst.r_push_SB_DFFNESR_Q_E_SB_LUT4_O_I1_SB_LUT4_O_I2_SB_LUT4_I0_O[0] -.sym 3841 lvds_rx_24_inst.r_push_SB_DFFNESR_Q_E_SB_LUT4_O_I1_SB_LUT4_I0_O_SB_DFFNESR_D_Q[0] -.sym 3844 lvds_rx_24_inst.r_push_SB_DFFNESR_Q_E_SB_LUT4_O_I1_SB_LUT4_I0_O_SB_DFFNESR_D_Q[1] -.sym 3848 lvds_rx_24_inst.r_push_SB_DFFNESR_Q_E_SB_LUT4_O_I1_SB_LUT4_I0_O_SB_DFFNESR_D_Q[0] -.sym 3851 lvds_rx_24_inst.r_push_SB_DFFNESR_Q_E_SB_LUT4_O_I1_SB_LUT4_I0_O_SB_DFFNESR_D_E +.sym 3718 i_smi_a1_SB_LUT4_I1_O[3]_$glb_sr +.sym 3719 lvds_rx_24_inst.r_push_SB_DFFNESR_Q_E +.sym 3721 lvds_rx_24_inst.r_phase_count_SB_LUT4_I1_O_SB_DFFNESR_Q_E +.sym 3723 w_lvds_rx_24_d1_SB_LUT4_I0_O_SB_LUT4_O_I2_SB_LUT4_I0_O[1] +.sym 3724 lvds_rx_24_inst.r_state_if_SB_LUT4_I2_O[0] +.sym 3725 lvds_rx_24_inst.r_state_if_SB_DFFNESR_Q_E +.sym 3726 w_rx_24_fifo_push +.sym 3748 rx_24_fifo.rd_addr_gray_wr_r[0] +.sym 3750 lvds_rx_09_inst.r_state_if[1] +.sym 3753 w_lvds_rx_24_d1_SB_LUT4_I0_O[0] +.sym 3772 w_lvds_rx_24_d1_SB_LUT4_I0_O_SB_LUT4_O_I2_SB_LUT4_I0_O[3] +.sym 3774 lvds_rx_24_inst.r_phase_count_SB_LUT4_I1_O[2] +.sym 3775 w_lvds_rx_24_d1_SB_LUT4_I0_O_SB_LUT4_O_I2[1] +.sym 3781 w_lvds_rx_24_d1_SB_LUT4_I0_O_SB_LUT4_O_I2_SB_LUT4_I0_O[2] +.sym 3782 w_lvds_rx_24_d1_SB_LUT4_I0_O_SB_LUT4_O_I2_SB_LUT4_I0_O[0] +.sym 3785 lvds_rx_24_inst.r_phase_count_SB_LUT4_O_I3[0] +.sym 3786 lvds_rx_24_inst.r_phase_count_SB_LUT4_O_I3[1] +.sym 3787 w_lvds_rx_24_d1_SB_LUT4_I0_O_SB_LUT4_O_I2[2] +.sym 3790 lvds_rx_24_inst.r_phase_count_SB_LUT4_I1_O_SB_DFFNESR_Q_E +.sym 3792 w_lvds_rx_24_d1_SB_LUT4_I0_O_SB_LUT4_O_I2[0] +.sym 3793 lvds_rx_24_inst.r_state_if_SB_LUT4_I2_O[0] +.sym 3796 w_lvds_rx_24_d0 +.sym 3800 w_lvds_rx_24_d1_SB_LUT4_I0_O_SB_LUT4_O_I2_SB_LUT4_I0_O[1] +.sym 3801 w_lvds_rx_24_d1 +.sym 3802 w_lvds_rx_24_d1_SB_LUT4_I0_O_SB_LUT4_O_I2[3] +.sym 3805 w_lvds_rx_24_d1_SB_LUT4_I0_O_SB_LUT4_O_I2[0] +.sym 3806 w_lvds_rx_24_d1_SB_LUT4_I0_O_SB_LUT4_O_I2[3] +.sym 3807 w_lvds_rx_24_d1_SB_LUT4_I0_O_SB_LUT4_O_I2[2] +.sym 3808 w_lvds_rx_24_d1_SB_LUT4_I0_O_SB_LUT4_O_I2[1] +.sym 3811 w_lvds_rx_24_d0 +.sym 3812 w_lvds_rx_24_d1 +.sym 3813 w_lvds_rx_24_d1_SB_LUT4_I0_O_SB_LUT4_O_I2[3] +.sym 3814 w_lvds_rx_24_d1_SB_LUT4_I0_O_SB_LUT4_O_I2[0] +.sym 3817 w_lvds_rx_24_d1_SB_LUT4_I0_O_SB_LUT4_O_I2[0] +.sym 3818 w_lvds_rx_24_d1_SB_LUT4_I0_O_SB_LUT4_O_I2[1] +.sym 3819 w_lvds_rx_24_d1_SB_LUT4_I0_O_SB_LUT4_O_I2[2] +.sym 3823 lvds_rx_24_inst.r_state_if_SB_LUT4_I2_O[0] +.sym 3825 w_lvds_rx_24_d1_SB_LUT4_I0_O_SB_LUT4_O_I2[1] +.sym 3829 w_lvds_rx_24_d1_SB_LUT4_I0_O_SB_LUT4_O_I2[0] +.sym 3830 w_lvds_rx_24_d1_SB_LUT4_I0_O_SB_LUT4_O_I2[1] +.sym 3831 w_lvds_rx_24_d1_SB_LUT4_I0_O_SB_LUT4_O_I2[2] +.sym 3832 w_lvds_rx_24_d1_SB_LUT4_I0_O_SB_LUT4_O_I2[3] +.sym 3835 w_lvds_rx_24_d1_SB_LUT4_I0_O_SB_LUT4_O_I2_SB_LUT4_I0_O[0] +.sym 3836 w_lvds_rx_24_d1_SB_LUT4_I0_O_SB_LUT4_O_I2_SB_LUT4_I0_O[3] +.sym 3837 w_lvds_rx_24_d1_SB_LUT4_I0_O_SB_LUT4_O_I2_SB_LUT4_I0_O[1] +.sym 3838 w_lvds_rx_24_d1_SB_LUT4_I0_O_SB_LUT4_O_I2_SB_LUT4_I0_O[2] +.sym 3841 w_lvds_rx_24_d1_SB_LUT4_I0_O_SB_LUT4_O_I2_SB_LUT4_I0_O[3] +.sym 3842 w_lvds_rx_24_d1_SB_LUT4_I0_O_SB_LUT4_O_I2_SB_LUT4_I0_O[0] +.sym 3843 lvds_rx_24_inst.r_phase_count_SB_LUT4_I1_O[2] +.sym 3844 w_lvds_rx_24_d1_SB_LUT4_I0_O_SB_LUT4_O_I2_SB_LUT4_I0_O[1] +.sym 3849 lvds_rx_24_inst.r_phase_count_SB_LUT4_O_I3[1] +.sym 3850 lvds_rx_24_inst.r_phase_count_SB_LUT4_O_I3[0] +.sym 3851 lvds_rx_24_inst.r_phase_count_SB_LUT4_I1_O_SB_DFFNESR_Q_E .sym 3852 lvds_clock_buf -.sym 3853 i_smi_a1_SB_LUT4_I1_O_SB_LUT4_O_I2_SB_LUT4_I0_O[2]_$glb_sr -.sym 3878 i_smi_a1$SB_IO_IN -.sym 3915 w_lvds_rx_09_d1 -.sym 3916 w_lvds_rx_09_d0 -.sym 3933 lvds_rx_09_inst.r_push_SB_DFFNESR_Q_E_SB_LUT4_O_I1[3] -.sym 3941 w_lvds_rx_09_d1 -.sym 3943 lvds_rx_09_inst.r_push_SB_DFFNESR_Q_E_SB_LUT4_O_I1[3] -.sym 3976 w_lvds_rx_09_d0 -.sym 3977 lvds_rx_09_inst.r_push_SB_DFFNESR_Q_E_SB_LUT4_O_I1[3] -.sym 3986 w_lvds_rx_09_d1_SB_LUT4_I0_O_SB_LUT4_I3_O_$glb_ce +.sym 3853 i_smi_a1_SB_LUT4_I1_O[3]_$glb_sr +.sym 3854 lvds_rx_09_inst.r_state_if_SB_DFFNESR_Q_E_SB_LUT4_O_I2_SB_LUT4_O_I2_SB_LUT4_I2_O[0] +.sym 3855 lvds_rx_09_inst.r_phase_count_SB_LUT4_I1_O_SB_DFFNESR_Q_E +.sym 3858 w_lvds_rx_24_d1_SB_LUT4_I0_O_SB_LUT4_O_I2[0] +.sym 3860 w_lvds_rx_24_d1_SB_LUT4_I0_O_SB_LUT4_O_I2[3] +.sym 3909 w_lvds_rx_24_d1 +.sym 3911 w_lvds_rx_24_d0 +.sym 3912 lvds_rx_09_inst.r_state_if[1] +.sym 3915 w_lvds_rx_24_d1_SB_LUT4_I0_O_SB_LUT4_O_I2_SB_LUT4_I0_O[3] +.sym 3919 lvds_rx_09_inst.r_state_if[0] +.sym 3927 lvds_rx_09_inst.r_state_if_SB_DFFNESR_Q_E_SB_LUT4_O_I2_SB_LUT4_O_I2[0] +.sym 3936 lvds_rx_09_inst.r_phase_count_SB_LUT4_I1_O[0] +.sym 3947 w_lvds_rx_24_d0 +.sym 3948 w_lvds_rx_24_d1_SB_LUT4_I0_O_SB_LUT4_O_I2_SB_LUT4_I0_O[3] +.sym 3958 lvds_rx_09_inst.r_state_if[0] +.sym 3959 lvds_rx_09_inst.r_state_if_SB_DFFNESR_Q_E_SB_LUT4_O_I2_SB_LUT4_O_I2[0] +.sym 3960 lvds_rx_09_inst.r_state_if[1] +.sym 3961 lvds_rx_09_inst.r_phase_count_SB_LUT4_I1_O[0] +.sym 3965 lvds_rx_09_inst.r_state_if[0] +.sym 3967 lvds_rx_09_inst.r_state_if[1] +.sym 3972 w_lvds_rx_24_d1_SB_LUT4_I0_O_SB_LUT4_O_I2_SB_LUT4_I0_O[3] +.sym 3973 w_lvds_rx_24_d1 +.sym 3982 lvds_rx_09_inst.r_state_if[1] +.sym 3983 lvds_rx_09_inst.r_phase_count_SB_LUT4_I1_O[0] +.sym 3984 lvds_rx_09_inst.r_state_if[0] +.sym 3985 lvds_rx_09_inst.r_state_if_SB_DFFNESR_Q_E_SB_LUT4_O_I2_SB_LUT4_O_I2[0] +.sym 3986 w_lvds_rx_24_d1_SB_LUT4_I0_O_SB_LUT4_I3_O_$glb_ce .sym 3987 lvds_clock_buf -.sym 3988 i_smi_a1_SB_LUT4_I1_O_SB_LUT4_O_I2_SB_LUT4_I0_O[2]_$glb_sr -.sym 3990 i_smi_a1_SB_LUT4_I1_O[3] -.sym 3991 i_smi_a2_SB_LUT4_I1_O[3] -.sym 4011 o_shdn_tx_lna$SB_IO_OUT +.sym 3988 i_smi_a1_SB_LUT4_I1_O[3]_$glb_sr +.sym 3990 lvds_rx_09_inst.r_phase_count_SB_LUT4_I1_O[1] +.sym 3991 lvds_rx_09_inst.r_phase_count_SB_LUT4_I1_O[2] +.sym 3992 lvds_rx_09_inst.r_phase_count_SB_LUT4_O_1_I3[0] +.sym 3993 lvds_rx_09_inst.r_state_if_SB_DFFNESR_Q_E_SB_LUT4_O_I2_SB_LUT4_O_I2[0] +.sym 3994 lvds_rx_09_inst.r_phase_count_SB_LUT4_I1_O[0] +.sym 3995 lvds_rx_09_inst.r_phase_count[1] +.sym 3996 lvds_rx_09_inst.r_phase_count_SB_LUT4_O_1_I3[1] +.sym 4008 i_smi_a1_SB_LUT4_I1_O[3] +.sym 4063 lvds_rx_09_inst.r_phase_count_SB_LUT4_I1_O[0] +.sym 4083 lvds_rx_09_inst.r_phase_count_SB_LUT4_I1_O[0] .sym 4138 i_smi_a2$SB_IO_IN -.sym 4207 o_shdn_tx_lna$SB_IO_OUT -.sym 4237 w_rx_09_fifo_pulled_data[0] -.sym 4238 w_rx_09_fifo_pulled_data[1] -.sym 4239 w_rx_09_fifo_pulled_data[2] -.sym 4240 w_rx_09_fifo_pulled_data[3] -.sym 4241 w_rx_09_fifo_pulled_data[4] -.sym 4242 w_rx_09_fifo_pulled_data[5] -.sym 4243 w_rx_09_fifo_pulled_data[6] -.sym 4244 w_rx_09_fifo_pulled_data[7] -.sym 4248 i_smi_a2_SB_LUT4_I1_O[3] -.sym 4268 i_smi_a1_SB_LUT4_I1_O[3] -.sym 4279 smi_ctrl_ins.o_smi_data_out_SB_DFFE_Q_D_SB_LUT4_O_I2[1] -.sym 4281 smi_ctrl_ins.o_smi_data_out_SB_DFFE_Q_7_D_SB_LUT4_O_I0[1] -.sym 4282 w_rx_09_fifo_pulled_data[20] -.sym 4283 smi_ctrl_ins.int_cnt_09_SB_DFFESR_Q_D_SB_LUT4_O_I3[1] -.sym 4284 smi_ctrl_ins.int_cnt_09_SB_DFFESR_Q_D_SB_LUT4_O_I3[2] -.sym 4287 w_rx_09_fifo_pulled_data[16] -.sym 4288 smi_ctrl_ins.o_smi_data_out_SB_DFFE_Q_3_D_SB_LUT4_O_I1[3] -.sym 4290 smi_ctrl_ins.r_fifo_24_pull_SB_LUT4_I1_O_SB_LUT4_I0_O_SB_LUT4_I3_O -.sym 4292 w_smi_data_output[6] -.sym 4293 smi_ctrl_ins.o_smi_data_out_SB_DFFE_Q_3_D_SB_LUT4_O_I1[1] -.sym 4294 smi_ctrl_ins.int_cnt_09_SB_DFFESR_Q_D_SB_LUT4_O_I3[2] -.sym 4296 smi_ctrl_ins.o_smi_data_out_SB_DFFE_Q_1_D_SB_LUT4_O_I1[2] -.sym 4297 i_smi_a3$SB_IO_IN -.sym 4298 smi_ctrl_ins.o_smi_data_out_SB_DFFE_Q_3_D_SB_LUT4_O_I1_SB_LUT4_O_I3[3] -.sym 4299 w_rx_09_fifo_pulled_data[12] -.sym 4300 smi_ctrl_ins.o_smi_data_out_SB_DFFE_Q_7_D_SB_LUT4_O_I0[0] -.sym 4301 smi_ctrl_ins.o_smi_data_out_SB_DFFE_Q_D_SB_LUT4_O_I2[3] -.sym 4303 w_rx_09_fifo_pulled_data[0] -.sym 4304 smi_ctrl_ins.o_smi_data_out_SB_DFFE_Q_1_D_SB_LUT4_O_I1[2] -.sym 4305 smi_ctrl_ins.o_smi_data_out_SB_DFFE_Q_7_D_SB_LUT4_O_I0[2] -.sym 4306 i_smi_a2_SB_LUT4_I1_O[3] -.sym 4307 w_rx_09_fifo_pulled_data[4] -.sym 4308 w_rx_09_fifo_pulled_data[28] -.sym 4309 smi_ctrl_ins.int_cnt_09[3] -.sym 4310 smi_ctrl_ins.int_cnt_09[3] -.sym 4312 smi_ctrl_ins.o_smi_data_out_SB_DFFE_Q_7_D_SB_LUT4_O_I0[1] -.sym 4313 smi_ctrl_ins.o_smi_data_out_SB_DFFE_Q_7_D_SB_LUT4_O_I0[2] -.sym 4314 i_smi_a2_SB_LUT4_I1_O[3] -.sym 4315 smi_ctrl_ins.o_smi_data_out_SB_DFFE_Q_7_D_SB_LUT4_O_I0[0] -.sym 4318 w_rx_09_fifo_pulled_data[0] -.sym 4319 smi_ctrl_ins.int_cnt_09_SB_DFFESR_Q_D_SB_LUT4_O_I3[2] -.sym 4321 i_smi_a2_SB_LUT4_I1_O[3] -.sym 4324 smi_ctrl_ins.o_smi_data_out_SB_DFFE_Q_3_D_SB_LUT4_O_I1[3] -.sym 4325 smi_ctrl_ins.o_smi_data_out_SB_DFFE_Q_3_D_SB_LUT4_O_I1[1] -.sym 4326 smi_ctrl_ins.o_smi_data_out_SB_DFFE_Q_1_D_SB_LUT4_O_I1[2] -.sym 4327 smi_ctrl_ins.int_cnt_09_SB_DFFESR_Q_D_SB_LUT4_O_I3[2] -.sym 4330 w_rx_09_fifo_pulled_data[4] -.sym 4331 smi_ctrl_ins.int_cnt_09[3] -.sym 4332 w_rx_09_fifo_pulled_data[20] -.sym 4333 smi_ctrl_ins.int_cnt_09_SB_DFFESR_Q_D_SB_LUT4_O_I3[1] -.sym 4336 smi_ctrl_ins.o_smi_data_out_SB_DFFE_Q_D_SB_LUT4_O_I2[1] -.sym 4337 smi_ctrl_ins.o_smi_data_out_SB_DFFE_Q_1_D_SB_LUT4_O_I1[2] -.sym 4338 smi_ctrl_ins.o_smi_data_out_SB_DFFE_Q_D_SB_LUT4_O_I2[3] -.sym 4339 smi_ctrl_ins.int_cnt_09_SB_DFFESR_Q_D_SB_LUT4_O_I3[2] -.sym 4342 w_rx_09_fifo_pulled_data[0] -.sym 4343 smi_ctrl_ins.int_cnt_09[3] -.sym 4344 w_rx_09_fifo_pulled_data[16] -.sym 4345 smi_ctrl_ins.int_cnt_09_SB_DFFESR_Q_D_SB_LUT4_O_I3[1] -.sym 4348 w_rx_09_fifo_pulled_data[12] -.sym 4349 smi_ctrl_ins.o_smi_data_out_SB_DFFE_Q_3_D_SB_LUT4_O_I1_SB_LUT4_O_I3[3] -.sym 4350 w_rx_09_fifo_pulled_data[28] -.sym 4351 smi_ctrl_ins.int_cnt_09[3] -.sym 4355 i_smi_a3$SB_IO_IN -.sym 4357 w_smi_data_output[6] -.sym 4358 smi_ctrl_ins.r_fifo_24_pull_SB_LUT4_I1_O_SB_LUT4_I0_O_SB_LUT4_I3_O -.sym 4359 r_counter[0]_$glb_clk -.sym 4365 w_rx_09_fifo_pulled_data[8] -.sym 4366 w_rx_09_fifo_pulled_data[9] -.sym 4367 w_rx_09_fifo_pulled_data[10] -.sym 4368 w_rx_09_fifo_pulled_data[11] -.sym 4369 w_rx_09_fifo_pulled_data[12] -.sym 4370 w_rx_09_fifo_pulled_data[13] -.sym 4371 w_rx_09_fifo_pulled_data[14] -.sym 4372 w_rx_09_fifo_pulled_data[15] -.sym 4377 io_smi_data[0]$SB_IO_OUT -.sym 4378 smi_ctrl_ins.o_smi_data_out_SB_DFFE_Q_3_D_SB_LUT4_O_I1[3] -.sym 4379 rx_09_fifo.wr_addr[0] -.sym 4382 lvds_rx_09_inst.o_fifo_data[6] -.sym 4383 w_smi_data_output[4] -.sym 4387 w_smi_data_output[3] -.sym 4388 io_pmod[4]$SB_IO_IN -.sym 4393 io_pmod_SB_DFFSS_Q_D_SB_LUT4_O_I0_SB_LUT4_O_I0[1] -.sym 4394 io_pmod[7]$SB_IO_IN -.sym 4395 smi_ctrl_ins.o_smi_data_out_SB_DFFE_Q_D_SB_LUT4_O_I2[3] -.sym 4402 w_rx_09_fifo_push -.sym 4403 rx_09_fifo.wr_addr[7] -.sym 4404 smi_ctrl_ins.int_cnt_09[3] -.sym 4405 smi_ctrl_ins.int_cnt_09[3] -.sym 4406 w_rx_09_fifo_pulled_data[16] -.sym 4407 io_pmod_SB_DFFSS_Q_D_SB_LUT4_O_I0_SB_LUT4_O_2_I0[3] -.sym 4409 io_pmod_SB_DFFSS_Q_D_SB_LUT4_O_I0_SB_LUT4_O_3_I2[1] -.sym 4414 io_smi_data[6]$SB_IO_OUT -.sym 4415 w_rx_09_fifo_pulled_data[20] -.sym 4416 $PACKER_VCC_NET -.sym 4417 i_smi_a3$SB_IO_IN -.sym 4418 io_pmod_SB_DFFSS_Q_D_SB_LUT4_O_I0_SB_LUT4_O_3_I2[3] -.sym 4420 rx_09_fifo.wr_addr[4] -.sym 4421 rx_09_fifo.wr_addr[3] -.sym 4422 smi_ctrl_ins.int_cnt_09_SB_DFFESR_Q_D_SB_LUT4_O_I3[2] -.sym 4425 rx_09_fifo.wr_addr[2] -.sym 4426 rx_09_fifo.full_o_SB_DFFSR_Q_D_SB_LUT4_O_I1_SB_LUT4_O_I0_SB_LUT4_O_1_I3[1] -.sym 4427 rx_09_fifo.wr_addr[6] -.sym 4428 smi_ctrl_ins.int_cnt_09_SB_DFFESR_Q_D_SB_LUT4_O_I3[2] -.sym 4429 w_rx_09_fifo_pulled_data[28] -.sym 4430 rx_09_fifo.wr_addr[6] -.sym 4431 smi_ctrl_ins.int_cnt_24_SB_DFFESR_Q_E -.sym 4442 smi_ctrl_ins.o_smi_data_out_SB_DFFE_Q_D_SB_LUT4_O_I1[1] -.sym 4443 w_rx_09_fifo_pulled_data[1] -.sym 4444 smi_ctrl_ins.int_cnt_09_SB_DFFESR_Q_D_SB_LUT4_O_I3[2] -.sym 4445 smi_ctrl_ins.o_smi_data_out_SB_DFFE_Q_5_D_SB_LUT4_O_I1[1] -.sym 4446 smi_ctrl_ins.o_smi_data_out_SB_DFFE_Q_1_D_SB_LUT4_O_I1[1] -.sym 4447 smi_ctrl_ins.o_smi_data_out_SB_DFFE_Q_5_D_SB_LUT4_O_I1[3] -.sym 4448 smi_ctrl_ins.r_fifo_24_pull_SB_LUT4_I1_O_SB_LUT4_I0_O[2] -.sym 4449 smi_ctrl_ins.o_smi_data_out_SB_DFFE_Q_1_D_SB_LUT4_O_I1[3] -.sym 4450 smi_ctrl_ins.o_smi_data_out_SB_DFFE_Q_2_D_SB_LUT4_O_I1[1] -.sym 4451 smi_ctrl_ins.o_smi_data_out_SB_DFFE_Q_1_D_SB_LUT4_O_I1[2] -.sym 4452 smi_ctrl_ins.int_cnt_09_SB_DFFESR_Q_D_SB_LUT4_O_I3[2] -.sym 4454 smi_ctrl_ins.o_smi_data_out_SB_DFFE_Q_6_D_SB_LUT4_O_I1[3] -.sym 4455 smi_ctrl_ins.o_smi_data_out_SB_DFFE_Q_6_D_SB_LUT4_O_I1_SB_LUT4_O_I3[3] -.sym 4456 smi_ctrl_ins.int_cnt_09_SB_DFFESR_Q_D_SB_LUT4_O_I3[1] -.sym 4459 w_rx_09_fifo_pulled_data[9] -.sym 4460 smi_ctrl_ins.int_cnt_09[3] -.sym 4462 smi_ctrl_ins.o_smi_data_out_SB_DFFE_Q_6_D_SB_LUT4_O_I1[1] -.sym 4464 i_smi_a1_SB_LUT4_I1_O[3] -.sym 4466 i_smi_a2_SB_LUT4_I1_O[3] -.sym 4467 w_rx_09_fifo_pulled_data[17] -.sym 4468 w_rx_09_fifo_pulled_data[25] -.sym 4469 smi_ctrl_ins.r_fifo_24_pull_SB_LUT4_I1_O_SB_LUT4_I0_O_SB_LUT4_I3_O -.sym 4472 smi_ctrl_ins.o_smi_data_out_SB_DFFE_Q_D_SB_LUT4_O_I1[3] -.sym 4473 smi_ctrl_ins.o_smi_data_out_SB_DFFE_Q_2_D_SB_LUT4_O_I1[3] -.sym 4475 smi_ctrl_ins.o_smi_data_out_SB_DFFE_Q_1_D_SB_LUT4_O_I1[2] -.sym 4476 smi_ctrl_ins.o_smi_data_out_SB_DFFE_Q_1_D_SB_LUT4_O_I1[3] -.sym 4477 smi_ctrl_ins.o_smi_data_out_SB_DFFE_Q_1_D_SB_LUT4_O_I1[1] -.sym 4478 smi_ctrl_ins.int_cnt_09_SB_DFFESR_Q_D_SB_LUT4_O_I3[2] -.sym 4481 smi_ctrl_ins.o_smi_data_out_SB_DFFE_Q_2_D_SB_LUT4_O_I1[1] -.sym 4482 smi_ctrl_ins.o_smi_data_out_SB_DFFE_Q_1_D_SB_LUT4_O_I1[2] -.sym 4483 smi_ctrl_ins.int_cnt_09_SB_DFFESR_Q_D_SB_LUT4_O_I3[2] -.sym 4484 smi_ctrl_ins.o_smi_data_out_SB_DFFE_Q_2_D_SB_LUT4_O_I1[3] -.sym 4487 smi_ctrl_ins.o_smi_data_out_SB_DFFE_Q_1_D_SB_LUT4_O_I1[2] -.sym 4488 smi_ctrl_ins.int_cnt_09_SB_DFFESR_Q_D_SB_LUT4_O_I3[2] -.sym 4489 smi_ctrl_ins.o_smi_data_out_SB_DFFE_Q_D_SB_LUT4_O_I1[1] -.sym 4490 smi_ctrl_ins.o_smi_data_out_SB_DFFE_Q_D_SB_LUT4_O_I1[3] -.sym 4494 smi_ctrl_ins.r_fifo_24_pull_SB_LUT4_I1_O_SB_LUT4_I0_O[2] -.sym 4495 i_smi_a2_SB_LUT4_I1_O[3] -.sym 4496 i_smi_a1_SB_LUT4_I1_O[3] -.sym 4499 smi_ctrl_ins.int_cnt_09[3] -.sym 4500 w_rx_09_fifo_pulled_data[25] -.sym 4501 smi_ctrl_ins.o_smi_data_out_SB_DFFE_Q_6_D_SB_LUT4_O_I1_SB_LUT4_O_I3[3] -.sym 4502 w_rx_09_fifo_pulled_data[9] -.sym 4505 smi_ctrl_ins.int_cnt_09_SB_DFFESR_Q_D_SB_LUT4_O_I3[1] -.sym 4506 smi_ctrl_ins.int_cnt_09[3] -.sym 4507 w_rx_09_fifo_pulled_data[1] -.sym 4508 w_rx_09_fifo_pulled_data[17] -.sym 4511 smi_ctrl_ins.o_smi_data_out_SB_DFFE_Q_6_D_SB_LUT4_O_I1[1] -.sym 4512 smi_ctrl_ins.int_cnt_09_SB_DFFESR_Q_D_SB_LUT4_O_I3[2] -.sym 4513 smi_ctrl_ins.o_smi_data_out_SB_DFFE_Q_1_D_SB_LUT4_O_I1[2] -.sym 4514 smi_ctrl_ins.o_smi_data_out_SB_DFFE_Q_6_D_SB_LUT4_O_I1[3] -.sym 4517 smi_ctrl_ins.o_smi_data_out_SB_DFFE_Q_5_D_SB_LUT4_O_I1[1] -.sym 4518 smi_ctrl_ins.int_cnt_09_SB_DFFESR_Q_D_SB_LUT4_O_I3[2] -.sym 4519 smi_ctrl_ins.o_smi_data_out_SB_DFFE_Q_5_D_SB_LUT4_O_I1[3] -.sym 4520 smi_ctrl_ins.o_smi_data_out_SB_DFFE_Q_1_D_SB_LUT4_O_I1[2] -.sym 4521 smi_ctrl_ins.r_fifo_24_pull_SB_LUT4_I1_O_SB_LUT4_I0_O_SB_LUT4_I3_O -.sym 4522 r_counter[0]_$glb_clk -.sym 4524 w_rx_09_fifo_pulled_data[16] -.sym 4525 w_rx_09_fifo_pulled_data[17] -.sym 4526 w_rx_09_fifo_pulled_data[18] -.sym 4527 w_rx_09_fifo_pulled_data[19] -.sym 4528 w_rx_09_fifo_pulled_data[20] -.sym 4529 w_rx_09_fifo_pulled_data[21] -.sym 4530 w_rx_09_fifo_pulled_data[22] -.sym 4531 w_rx_09_fifo_pulled_data[23] -.sym 4532 smi_ctrl_ins.o_smi_data_out_SB_DFFE_Q_2_D_SB_LUT4_O_I1[1] -.sym 4536 smi_ctrl_ins.o_smi_data_out_SB_DFFE_Q_D_SB_LUT4_O_I1[1] -.sym 4537 smi_ctrl_ins.int_cnt_09_SB_DFFESR_Q_D_SB_LUT4_O_I3[1] -.sym 4538 smi_ctrl_ins.o_smi_data_out_SB_DFFE_Q_5_D_SB_LUT4_O_I1[1] -.sym 4540 w_smi_data_output[5] -.sym 4542 w_smi_data_output[7] -.sym 4543 rx_09_fifo.rd_addr[0] -.sym 4544 lvds_rx_09_inst.o_fifo_data[15] -.sym 4545 lvds_rx_09_inst.o_fifo_data[13] -.sym 4546 lvds_rx_09_inst.o_fifo_data[9] -.sym 4548 lvds_rx_09_inst.o_fifo_data[16] -.sym 4549 w_rx_24_fifo_pulled_data[14] -.sym 4550 i_smi_a1_SB_LUT4_I1_O_SB_LUT4_O_I2_SB_LUT4_I0_O[2] -.sym 4554 w_rx_09_fifo_pulled_data[25] -.sym 4559 smi_ctrl_ins.int_cnt_24[5] -.sym 4565 smi_ctrl_ins.o_smi_data_out_SB_DFFE_Q_1_D_SB_LUT4_O_I1_SB_LUT4_O_1_I1[1] -.sym 4566 smi_ctrl_ins.o_smi_data_out_SB_DFFE_Q_1_D_SB_LUT4_O_I1_SB_LUT4_O_1_I1[2] -.sym 4567 smi_ctrl_ins.int_cnt_24[4] -.sym 4568 smi_ctrl_ins.o_smi_data_out_SB_DFFE_Q_6_D_SB_LUT4_O_I1_SB_LUT4_O_1_I1[2] -.sym 4569 smi_ctrl_ins.o_smi_data_out_SB_DFFE_Q_6_D_SB_LUT4_O_I1_SB_LUT4_O_1_I1[1] -.sym 4570 smi_ctrl_ins.int_cnt_24[5] -.sym 4572 smi_ctrl_ins.o_smi_data_out_SB_DFFE_Q_1_D_SB_LUT4_O_I1_SB_LUT4_O_1_I1[3] -.sym 4574 smi_ctrl_ins.o_smi_data_out_SB_DFFE_Q_5_D_SB_LUT4_O_I1_SB_LUT4_O_1_I1[2] -.sym 4576 smi_ctrl_ins.int_cnt_24_SB_DFFESR_Q_E -.sym 4577 i_smi_soe_se$rename$0 -.sym 4578 smi_ctrl_ins.r_fifo_24_pull_SB_LUT4_I1_O[3] -.sym 4580 $PACKER_VCC_NET -.sym 4582 $PACKER_VCC_NET -.sym 4583 i_smi_a2_SB_LUT4_I1_O_SB_LUT4_I3_1_I2[2] -.sym 4585 smi_ctrl_ins.o_smi_data_out_SB_DFFE_Q_5_D_SB_LUT4_O_I1_SB_LUT4_O_1_I1[1] -.sym 4590 smi_ctrl_ins.r_fifo_24_pull_SB_LUT4_I1_O[0] -.sym 4591 i_smi_a2_SB_LUT4_I1_O_SB_LUT4_I3_1_I2[2] -.sym 4592 i_smi_a2_SB_LUT4_I1_O_SB_LUT4_I3_1_I2_SB_LUT4_O_I3[1] -.sym 4593 smi_ctrl_ins.r_fifo_24_pull_SB_LUT4_I1_O[2] -.sym 4597 $nextpnr_ICESTORM_LC_0$O -.sym 4600 i_smi_a2_SB_LUT4_I1_O_SB_LUT4_I3_1_I2_SB_LUT4_O_I3[1] -.sym 4603 i_smi_a2_SB_LUT4_I1_O_SB_LUT4_I3_1_I2_SB_LUT4_O_I3[2] -.sym 4605 smi_ctrl_ins.int_cnt_24[4] -.sym 4606 $PACKER_VCC_NET -.sym 4611 smi_ctrl_ins.int_cnt_24[5] -.sym 4612 $PACKER_VCC_NET -.sym 4613 i_smi_a2_SB_LUT4_I1_O_SB_LUT4_I3_1_I2_SB_LUT4_O_I3[2] -.sym 4616 smi_ctrl_ins.r_fifo_24_pull_SB_LUT4_I1_O[2] -.sym 4617 i_smi_a2_SB_LUT4_I1_O_SB_LUT4_I3_1_I2_SB_LUT4_O_I3[1] -.sym 4618 i_smi_soe_se$rename$0 -.sym 4622 smi_ctrl_ins.o_smi_data_out_SB_DFFE_Q_6_D_SB_LUT4_O_I1_SB_LUT4_O_1_I1[1] -.sym 4623 smi_ctrl_ins.o_smi_data_out_SB_DFFE_Q_1_D_SB_LUT4_O_I1_SB_LUT4_O_1_I1[3] -.sym 4624 i_smi_a2_SB_LUT4_I1_O_SB_LUT4_I3_1_I2[2] -.sym 4625 smi_ctrl_ins.o_smi_data_out_SB_DFFE_Q_6_D_SB_LUT4_O_I1_SB_LUT4_O_1_I1[2] -.sym 4628 i_smi_a2_SB_LUT4_I1_O_SB_LUT4_I3_1_I2[2] -.sym 4629 smi_ctrl_ins.o_smi_data_out_SB_DFFE_Q_5_D_SB_LUT4_O_I1_SB_LUT4_O_1_I1[1] -.sym 4630 smi_ctrl_ins.o_smi_data_out_SB_DFFE_Q_1_D_SB_LUT4_O_I1_SB_LUT4_O_1_I1[3] -.sym 4631 smi_ctrl_ins.o_smi_data_out_SB_DFFE_Q_5_D_SB_LUT4_O_I1_SB_LUT4_O_1_I1[2] -.sym 4634 smi_ctrl_ins.r_fifo_24_pull_SB_LUT4_I1_O[0] -.sym 4635 i_smi_soe_se$rename$0 -.sym 4636 smi_ctrl_ins.r_fifo_24_pull_SB_LUT4_I1_O[3] -.sym 4637 smi_ctrl_ins.r_fifo_24_pull_SB_LUT4_I1_O[2] -.sym 4640 smi_ctrl_ins.o_smi_data_out_SB_DFFE_Q_1_D_SB_LUT4_O_I1_SB_LUT4_O_1_I1[2] -.sym 4641 smi_ctrl_ins.o_smi_data_out_SB_DFFE_Q_1_D_SB_LUT4_O_I1_SB_LUT4_O_1_I1[1] -.sym 4642 smi_ctrl_ins.o_smi_data_out_SB_DFFE_Q_1_D_SB_LUT4_O_I1_SB_LUT4_O_1_I1[3] -.sym 4643 i_smi_a2_SB_LUT4_I1_O_SB_LUT4_I3_1_I2[2] -.sym 4644 smi_ctrl_ins.int_cnt_24_SB_DFFESR_Q_E +.sym 4147 lvds_rx_09_inst.r_state_if_SB_LUT4_I2_O[0] +.sym 4207 i_smi_a3$SB_IO_IN +.sym 4209 i_smi_a2$SB_IO_IN +.sym 4237 w_rx_09_fifo_pulled_data[16] +.sym 4238 w_rx_09_fifo_pulled_data[17] +.sym 4239 w_rx_09_fifo_pulled_data[18] +.sym 4240 w_rx_09_fifo_pulled_data[19] +.sym 4241 w_rx_09_fifo_pulled_data[20] +.sym 4242 w_rx_09_fifo_pulled_data[21] +.sym 4243 w_rx_09_fifo_pulled_data[22] +.sym 4244 w_rx_09_fifo_pulled_data[23] +.sym 4254 rx_09_fifo.rd_addr_gray_wr_r[6] +.sym 4365 w_rx_09_fifo_pulled_data[24] +.sym 4366 w_rx_09_fifo_pulled_data[25] +.sym 4367 w_rx_09_fifo_pulled_data[26] +.sym 4368 w_rx_09_fifo_pulled_data[27] +.sym 4369 w_rx_09_fifo_pulled_data[28] +.sym 4370 w_rx_09_fifo_pulled_data[29] +.sym 4371 w_rx_09_fifo_pulled_data[30] +.sym 4372 w_rx_09_fifo_pulled_data[31] +.sym 4373 lvds_rx_09_inst.o_fifo_data[21] +.sym 4374 lvds_rx_09_inst.o_fifo_data[18] +.sym 4379 $PACKER_VCC_NET +.sym 4380 rx_09_fifo.wr_addr[0] +.sym 4382 lvds_rx_09_inst.r_push_SB_LUT4_I3_O_SB_LUT4_O_1_I0[3] +.sym 4384 rx_09_fifo.wr_addr[6] +.sym 4385 rx_09_fifo.wr_addr[7] +.sym 4407 i_smi_a3$SB_IO_IN +.sym 4408 lvds_rx_09_inst.o_fifo_data[28] +.sym 4410 w_rx_09_fifo_pulled_data[22] +.sym 4419 io_pmod[7]$SB_IO_IN +.sym 4421 rx_09_fifo.wr_addr[4] +.sym 4422 rx_09_fifo.wr_addr[2] +.sym 4424 w_rx_09_fifo_pulled_data[0] +.sym 4425 rx_09_fifo.wr_addr[0] +.sym 4429 rx_09_fifo.wr_addr[2] +.sym 4432 rx_09_fifo.wr_addr[3] +.sym 4446 rx_09_fifo.rd_addr_gray[1] +.sym 4455 rx_09_fifo.rd_addr_gray[6] +.sym 4469 rx_09_fifo.rd_addr_gray_wr[1] +.sym 4471 rx_09_fifo.rd_addr_gray_wr[6] +.sym 4477 rx_09_fifo.rd_addr_gray_wr[1] +.sym 4496 rx_09_fifo.rd_addr_gray[1] +.sym 4506 rx_09_fifo.rd_addr_gray[6] +.sym 4520 rx_09_fifo.rd_addr_gray_wr[6] +.sym 4522 lvds_clock_buf +.sym 4524 w_rx_09_fifo_pulled_data[0] +.sym 4525 w_rx_09_fifo_pulled_data[1] +.sym 4526 w_rx_09_fifo_pulled_data[2] +.sym 4527 w_rx_09_fifo_pulled_data[3] +.sym 4528 w_rx_09_fifo_pulled_data[4] +.sym 4529 w_rx_09_fifo_pulled_data[5] +.sym 4530 w_rx_09_fifo_pulled_data[6] +.sym 4531 w_rx_09_fifo_pulled_data[7] +.sym 4536 lvds_rx_09_inst.r_push_SB_LUT4_I3_O_SB_LUT4_O_1_I0[1] +.sym 4539 lvds_rx_09_inst.o_fifo_data[25] +.sym 4543 rx_09_fifo.rd_addr_gray[6] +.sym 4544 lvds_rx_09_inst.o_fifo_data[30] +.sym 4545 lvds_rx_09_inst.o_fifo_data[27] +.sym 4546 lvds_rx_09_inst.o_fifo_data[29] +.sym 4547 rx_09_fifo.rd_addr[7] +.sym 4549 lvds_rx_09_inst.o_fifo_data[10] +.sym 4551 rx_09_fifo.wr_addr[3] +.sym 4558 lvds_rx_09_inst.o_fifo_data[31] +.sym 4565 rx_09_fifo.wr_addr_gray[5] +.sym 4568 rx_09_fifo.wr_addr_gray[0] +.sym 4572 rx_09_fifo.wr_addr_gray[2] +.sym 4578 rx_09_fifo.wr_addr_gray[3] +.sym 4590 rx_09_fifo.wr_addr_gray_rd[5] +.sym 4599 rx_09_fifo.wr_addr_gray[2] +.sym 4605 rx_09_fifo.wr_addr_gray[5] +.sym 4611 rx_09_fifo.wr_addr_gray[0] +.sym 4624 rx_09_fifo.wr_addr_gray[3] +.sym 4634 rx_09_fifo.wr_addr_gray_rd[5] .sym 4645 r_counter[0]_$glb_clk -.sym 4646 i_smi_a1_SB_LUT4_I1_O_SB_LUT4_O_I2_SB_LUT4_I0_O[2]_$glb_sr -.sym 4647 w_rx_09_fifo_pulled_data[24] -.sym 4648 w_rx_09_fifo_pulled_data[25] -.sym 4649 w_rx_09_fifo_pulled_data[26] -.sym 4650 w_rx_09_fifo_pulled_data[27] -.sym 4651 w_rx_09_fifo_pulled_data[28] -.sym 4652 w_rx_09_fifo_pulled_data[29] -.sym 4653 w_rx_09_fifo_pulled_data[30] -.sym 4654 w_rx_09_fifo_pulled_data[31] -.sym 4655 lvds_rx_09_inst.r_push_SB_LUT4_I3_1_O -.sym 4659 rx_09_fifo.wr_addr[7] -.sym 4661 rx_09_fifo.wr_addr[4] -.sym 4662 lvds_rx_09_inst.o_fifo_data[17] -.sym 4666 smi_ctrl_ins.int_cnt_24[5] -.sym 4667 rx_09_fifo.wr_addr[5] -.sym 4668 $PACKER_VCC_NET -.sym 4669 w_rx_09_fifo_push -.sym 4670 lvds_rx_09_inst.o_fifo_data[21] -.sym 4672 smi_ctrl_ins.o_smi_data_out_SB_DFFE_Q_D_SB_LUT4_O_I2[3] -.sym 4674 w_rx_24_fifo_pulled_data[9] -.sym 4675 rx_24_fifo.wr_addr[6] -.sym 4677 i_smi_a3$SB_IO_IN -.sym 4678 w_rx_09_fifo_push -.sym 4680 rx_24_fifo.full_o_SB_DFFSR_Q_D_SB_LUT4_O_I1_SB_LUT4_O_I0[3] -.sym 4681 smi_ctrl_ins.o_smi_data_out_SB_DFFE_Q_D_SB_LUT4_O_I1_SB_LUT4_O_1_I3[2] -.sym 4688 smi_ctrl_ins.o_smi_data_out_SB_DFFE_Q_D_SB_LUT4_O_I1_SB_LUT4_O_1_I3[2] -.sym 4689 i_smi_a2_SB_LUT4_I1_O_SB_LUT4_I3_1_I2[1] -.sym 4690 i_smi_a2_SB_LUT4_I1_O_SB_LUT4_I3_1_I2[2] -.sym 4691 smi_ctrl_ins.o_smi_data_out_SB_DFFE_Q_D_SB_LUT4_O_I1_SB_LUT4_O_1_I3[1] -.sym 4692 smi_ctrl_ins.r_fifo_24_pull_SB_LUT4_I1_O[2] -.sym 4694 smi_ctrl_ins.o_smi_data_out_SB_DFFE_Q_D_SB_LUT4_O_I1_SB_LUT4_O_1_I1[2] -.sym 4695 i_smi_a1_SB_LUT4_I1_O[3] -.sym 4697 i_smi_a2_SB_LUT4_I1_O_SB_LUT4_I3_1_I2[1] -.sym 4698 w_rx_24_fifo_pulled_data[9] -.sym 4699 i_smi_a2_SB_LUT4_I1_O_SB_LUT4_I3_1_I2_SB_LUT4_O_I3[1] -.sym 4700 smi_ctrl_ins.o_smi_data_out_SB_DFFE_Q_D_SB_LUT4_O_I1_SB_LUT4_O_1_I1[1] -.sym 4704 w_rx_24_fifo_pulled_data[0] -.sym 4705 i_smi_soe_se$rename$0 -.sym 4706 smi_ctrl_ins.int_cnt_24_SB_DFFESR_Q_E -.sym 4707 w_rx_24_fifo_empty -.sym 4709 w_rx_24_fifo_pulled_data[14] -.sym 4710 i_smi_a1_SB_LUT4_I1_O_SB_LUT4_O_I2_SB_LUT4_I0_O[2] -.sym 4711 smi_ctrl_ins.o_smi_data_out_SB_DFFE_Q_1_D_SB_LUT4_O_I1_SB_LUT4_O_1_I1[3] -.sym 4712 i_smi_a2_SB_LUT4_I1_O[1] -.sym 4713 w_rx_24_fifo_pulled_data[1] -.sym 4714 smi_ctrl_ins.int_cnt_24[4] -.sym 4716 i_smi_a2_SB_LUT4_I1_O[3] -.sym 4717 i_smi_a1_SB_LUT4_I1_O[0] -.sym 4718 w_rx_24_fifo_pulled_data[6] -.sym 4719 smi_ctrl_ins.int_cnt_24[5] -.sym 4721 i_smi_a2_SB_LUT4_I1_O_SB_LUT4_I3_1_I2[1] -.sym 4722 w_rx_24_fifo_pulled_data[6] -.sym 4723 i_smi_a2_SB_LUT4_I1_O_SB_LUT4_I3_1_I2_SB_LUT4_O_I3[1] -.sym 4724 w_rx_24_fifo_pulled_data[14] -.sym 4727 w_rx_24_fifo_empty -.sym 4728 smi_ctrl_ins.int_cnt_24[5] -.sym 4729 smi_ctrl_ins.int_cnt_24[4] -.sym 4730 i_smi_a2_SB_LUT4_I1_O_SB_LUT4_I3_1_I2_SB_LUT4_O_I3[1] -.sym 4733 i_smi_a2_SB_LUT4_I1_O_SB_LUT4_I3_1_I2[1] -.sym 4735 smi_ctrl_ins.r_fifo_24_pull_SB_LUT4_I1_O[2] -.sym 4736 i_smi_soe_se$rename$0 -.sym 4739 smi_ctrl_ins.o_smi_data_out_SB_DFFE_Q_1_D_SB_LUT4_O_I1_SB_LUT4_O_1_I1[3] -.sym 4740 smi_ctrl_ins.o_smi_data_out_SB_DFFE_Q_D_SB_LUT4_O_I1_SB_LUT4_O_1_I1[2] -.sym 4741 smi_ctrl_ins.o_smi_data_out_SB_DFFE_Q_D_SB_LUT4_O_I1_SB_LUT4_O_1_I1[1] -.sym 4742 i_smi_a2_SB_LUT4_I1_O_SB_LUT4_I3_1_I2[2] -.sym 4745 w_rx_24_fifo_pulled_data[1] -.sym 4746 i_smi_a2_SB_LUT4_I1_O_SB_LUT4_I3_1_I2[1] -.sym 4747 i_smi_a2_SB_LUT4_I1_O_SB_LUT4_I3_1_I2_SB_LUT4_O_I3[1] -.sym 4748 w_rx_24_fifo_pulled_data[9] -.sym 4751 i_smi_a2_SB_LUT4_I1_O[1] -.sym 4752 i_smi_a1_SB_LUT4_I1_O_SB_LUT4_O_I2_SB_LUT4_I0_O[2] -.sym 4753 i_smi_a1_SB_LUT4_I1_O[3] -.sym 4754 i_smi_a1_SB_LUT4_I1_O[0] -.sym 4757 smi_ctrl_ins.o_smi_data_out_SB_DFFE_Q_D_SB_LUT4_O_I1_SB_LUT4_O_1_I3[2] -.sym 4758 smi_ctrl_ins.o_smi_data_out_SB_DFFE_Q_1_D_SB_LUT4_O_I1_SB_LUT4_O_1_I1[3] -.sym 4759 i_smi_a2_SB_LUT4_I1_O_SB_LUT4_I3_1_I2[2] -.sym 4760 smi_ctrl_ins.o_smi_data_out_SB_DFFE_Q_D_SB_LUT4_O_I1_SB_LUT4_O_1_I3[1] -.sym 4763 i_smi_a2_SB_LUT4_I1_O[3] -.sym 4764 i_smi_a2_SB_LUT4_I1_O_SB_LUT4_I3_1_I2[2] -.sym 4766 w_rx_24_fifo_pulled_data[0] -.sym 4767 smi_ctrl_ins.int_cnt_24_SB_DFFESR_Q_E -.sym 4768 r_counter[0]_$glb_clk -.sym 4769 i_smi_a1_SB_LUT4_I1_O_SB_LUT4_O_I2_SB_LUT4_I0_O[2]_$glb_sr -.sym 4770 w_rx_24_fifo_pulled_data[0] -.sym 4771 w_rx_24_fifo_pulled_data[1] -.sym 4772 w_rx_24_fifo_pulled_data[2] -.sym 4773 w_rx_24_fifo_pulled_data[3] -.sym 4774 w_rx_24_fifo_pulled_data[4] -.sym 4775 w_rx_24_fifo_pulled_data[5] -.sym 4776 w_rx_24_fifo_pulled_data[6] -.sym 4777 w_rx_24_fifo_pulled_data[7] -.sym 4783 rx_09_fifo.rd_addr[0] -.sym 4784 lvds_rx_09_inst.o_fifo_data[28] -.sym 4785 io_pmod_SB_DFFSS_Q_D_SB_LUT4_O_I0_SB_LUT4_O_I0[1] -.sym 4788 lvds_rx_09_inst.o_fifo_data[24] -.sym 4789 io_pmod_SB_DFFSS_Q_D_SB_LUT4_O_I0_SB_LUT4_O_I2[1] -.sym 4790 io_pmod_SB_DFFSS_Q_D_SB_LUT4_O_I0_SB_LUT4_O_2_I0[3] -.sym 4791 io_pmod_SB_DFFSS_Q_D_SB_LUT4_O_I0_SB_LUT4_O_3_I2[3] -.sym 4794 w_rx_24_fifo_pulled_data[28] -.sym 4795 w_rx_24_fifo_pulled_data[16] -.sym 4796 $PACKER_VCC_NET -.sym 4797 rx_24_fifo.wr_addr[2] -.sym 4798 w_rx_24_fifo_pull -.sym 4799 rx_24_fifo.wr_addr[4] -.sym 4803 lvds_rx_09_inst.o_fifo_data[26] -.sym 4804 io_pmod_SB_DFFSS_Q_D_SB_LUT4_O_I0_SB_LUT4_O_3_I2[1] +.sym 4647 w_rx_09_fifo_pulled_data[8] +.sym 4648 w_rx_09_fifo_pulled_data[9] +.sym 4649 w_rx_09_fifo_pulled_data[10] +.sym 4650 w_rx_09_fifo_pulled_data[11] +.sym 4651 w_rx_09_fifo_pulled_data[12] +.sym 4652 w_rx_09_fifo_pulled_data[13] +.sym 4653 w_rx_09_fifo_pulled_data[14] +.sym 4654 w_rx_09_fifo_pulled_data[15] +.sym 4655 rx_09_fifo.wr_addr_gray_rd[3] +.sym 4659 rx_09_fifo.wr_addr_gray_rd[2] +.sym 4660 i_smi_a2_SB_LUT4_I1_O_SB_LUT4_I3_I2_SB_LUT4_O_I3[1] +.sym 4662 lvds_rx_09_inst.o_fifo_data[7] +.sym 4668 lvds_rx_09_inst.r_push_SB_LUT4_I3_O_SB_LUT4_O_1_I0[3] +.sym 4669 w_rx_09_fifo_data[1] +.sym 4680 rx_09_fifo.rd_addr[3] +.sym 4681 io_pmod[5]$SB_IO_IN +.sym 4697 rx_09_fifo.wr_addr[0] +.sym 4698 rx_09_fifo.rd_addr_gray_wr_r[0] +.sym 4701 w_rx_09_fifo_push +.sym 4707 rx_09_fifo.full_o_SB_LUT4_I3_O[1] +.sym 4708 rx_09_fifo.full_o_SB_LUT4_I3_O[2] +.sym 4713 rx_09_fifo.wr_addr_gray_SB_DFFESR_Q_7_D[0] +.sym 4714 i_smi_a1_SB_LUT4_I1_O[3] +.sym 4715 lvds_rx_09_inst.r_push_SB_LUT4_I3_1_O +.sym 4716 lvds_rx_09_inst.r_push_SB_LUT4_I3_1_O +.sym 4719 rx_09_fifo.wr_addr_gray_SB_LUT4_I2_1_O[7] +.sym 4723 rx_09_fifo.wr_addr_gray_SB_DFFESR_Q_7_D[0] +.sym 4728 rx_09_fifo.full_o_SB_LUT4_I3_O[2] +.sym 4734 rx_09_fifo.rd_addr_gray_wr_r[0] +.sym 4735 rx_09_fifo.wr_addr[0] +.sym 4739 lvds_rx_09_inst.r_push_SB_LUT4_I3_1_O +.sym 4745 w_rx_09_fifo_push +.sym 4748 i_smi_a1_SB_LUT4_I1_O[3] +.sym 4752 rx_09_fifo.full_o_SB_LUT4_I3_O[2] +.sym 4753 rx_09_fifo.full_o_SB_LUT4_I3_O[1] +.sym 4759 rx_09_fifo.wr_addr_gray_SB_LUT4_I2_1_O[7] +.sym 4765 rx_09_fifo.full_o_SB_LUT4_I3_O[1] +.sym 4767 lvds_rx_09_inst.r_push_SB_LUT4_I3_1_O +.sym 4768 lvds_clock_buf +.sym 4769 i_smi_a1_SB_LUT4_I1_O[3]_$glb_sr +.sym 4782 rx_09_fifo.wr_addr_gray[6] +.sym 4783 w_rx_09_fifo_pulled_data[14] +.sym 4784 rx_09_fifo.rd_addr_gray_wr_r[0] +.sym 4785 rx_09_fifo.rd_addr[2] +.sym 4786 rx_09_fifo.rd_addr[4] +.sym 4787 w_rx_09_fifo_pulled_data[15] +.sym 4789 w_rx_09_fifo_pulled_data[8] +.sym 4791 rx_09_fifo.rd_addr[1] +.sym 4798 w_rx_24_fifo_push +.sym 4799 lvds_rx_09_inst.r_push_SB_LUT4_I3_1_O .sym 4805 i_smi_a3$SB_IO_IN -.sym 4813 smi_ctrl_ins.int_cnt_24[4] -.sym 4814 $PACKER_VCC_NET -.sym 4815 i_smi_a2_SB_LUT4_I1_O_SB_LUT4_I3_1_I2[2] -.sym 4817 i_smi_a2_SB_LUT4_I1_O_SB_LUT4_I3_1_I2_SB_LUT4_O_I3[1] -.sym 4818 smi_ctrl_ins.o_smi_data_out_SB_DFFE_Q_1_D_SB_LUT4_O_I1_SB_LUT4_O_1_I1[3] -.sym 4820 smi_ctrl_ins.o_smi_data_out_SB_DFFE_Q_D_SB_LUT4_O_I2_SB_LUT4_O_1_I1[2] -.sym 4823 smi_ctrl_ins.o_smi_data_out_SB_DFFE_Q_2_D_SB_LUT4_O_I1_SB_LUT4_O_1_I1[2] -.sym 4826 smi_ctrl_ins.o_smi_data_out_SB_DFFE_Q_2_D_SB_LUT4_O_I1_SB_LUT4_O_1_I1[1] -.sym 4828 i_smi_a2_SB_LUT4_I1_O_SB_LUT4_I3_1_I2[1] -.sym 4829 w_rx_24_fifo_pulled_data[2] -.sym 4830 w_rx_24_fifo_pulled_data[3] -.sym 4831 w_rx_24_fifo_pulled_data[12] -.sym 4832 w_rx_24_fifo_pulled_data[13] -.sym 4834 w_rx_24_fifo_pulled_data[7] -.sym 4835 smi_ctrl_ins.o_smi_data_out_SB_DFFE_Q_D_SB_LUT4_O_I2_SB_LUT4_O_1_I1[1] -.sym 4837 w_rx_24_fifo_pulled_data[10] -.sym 4838 w_rx_24_fifo_pulled_data[11] -.sym 4839 w_rx_24_fifo_pulled_data[4] -.sym 4840 w_rx_24_fifo_pulled_data[5] -.sym 4842 w_rx_24_fifo_pulled_data[15] -.sym 4844 i_smi_a2_SB_LUT4_I1_O_SB_LUT4_I3_1_I2_SB_LUT4_O_I3[1] -.sym 4845 i_smi_a2_SB_LUT4_I1_O_SB_LUT4_I3_1_I2[1] -.sym 4846 w_rx_24_fifo_pulled_data[11] -.sym 4847 w_rx_24_fifo_pulled_data[3] -.sym 4850 $PACKER_VCC_NET -.sym 4851 i_smi_a2_SB_LUT4_I1_O_SB_LUT4_I3_1_I2_SB_LUT4_O_I3[1] -.sym 4853 smi_ctrl_ins.int_cnt_24[4] -.sym 4856 w_rx_24_fifo_pulled_data[2] -.sym 4857 i_smi_a2_SB_LUT4_I1_O_SB_LUT4_I3_1_I2[1] -.sym 4858 i_smi_a2_SB_LUT4_I1_O_SB_LUT4_I3_1_I2_SB_LUT4_O_I3[1] -.sym 4859 w_rx_24_fifo_pulled_data[10] -.sym 4862 i_smi_a2_SB_LUT4_I1_O_SB_LUT4_I3_1_I2[1] -.sym 4863 w_rx_24_fifo_pulled_data[12] -.sym 4864 w_rx_24_fifo_pulled_data[4] -.sym 4865 i_smi_a2_SB_LUT4_I1_O_SB_LUT4_I3_1_I2_SB_LUT4_O_I3[1] -.sym 4868 w_rx_24_fifo_pulled_data[15] -.sym 4869 i_smi_a2_SB_LUT4_I1_O_SB_LUT4_I3_1_I2[1] -.sym 4870 i_smi_a2_SB_LUT4_I1_O_SB_LUT4_I3_1_I2_SB_LUT4_O_I3[1] -.sym 4871 w_rx_24_fifo_pulled_data[7] -.sym 4874 smi_ctrl_ins.o_smi_data_out_SB_DFFE_Q_1_D_SB_LUT4_O_I1_SB_LUT4_O_1_I1[3] -.sym 4875 i_smi_a2_SB_LUT4_I1_O_SB_LUT4_I3_1_I2[2] -.sym 4876 smi_ctrl_ins.o_smi_data_out_SB_DFFE_Q_2_D_SB_LUT4_O_I1_SB_LUT4_O_1_I1[2] -.sym 4877 smi_ctrl_ins.o_smi_data_out_SB_DFFE_Q_2_D_SB_LUT4_O_I1_SB_LUT4_O_1_I1[1] -.sym 4880 smi_ctrl_ins.o_smi_data_out_SB_DFFE_Q_D_SB_LUT4_O_I2_SB_LUT4_O_1_I1[2] -.sym 4881 smi_ctrl_ins.o_smi_data_out_SB_DFFE_Q_D_SB_LUT4_O_I2_SB_LUT4_O_1_I1[1] -.sym 4882 i_smi_a2_SB_LUT4_I1_O_SB_LUT4_I3_1_I2[2] -.sym 4883 smi_ctrl_ins.o_smi_data_out_SB_DFFE_Q_1_D_SB_LUT4_O_I1_SB_LUT4_O_1_I1[3] -.sym 4886 w_rx_24_fifo_pulled_data[13] -.sym 4887 i_smi_a2_SB_LUT4_I1_O_SB_LUT4_I3_1_I2_SB_LUT4_O_I3[1] -.sym 4888 i_smi_a2_SB_LUT4_I1_O_SB_LUT4_I3_1_I2[1] -.sym 4889 w_rx_24_fifo_pulled_data[5] -.sym 4893 w_rx_24_fifo_pulled_data[8] -.sym 4894 w_rx_24_fifo_pulled_data[9] -.sym 4895 w_rx_24_fifo_pulled_data[10] -.sym 4896 w_rx_24_fifo_pulled_data[11] -.sym 4897 w_rx_24_fifo_pulled_data[12] -.sym 4898 w_rx_24_fifo_pulled_data[13] -.sym 4899 w_rx_24_fifo_pulled_data[14] -.sym 4900 w_rx_24_fifo_pulled_data[15] -.sym 4903 i_smi_a1_SB_LUT4_I1_O[3] -.sym 4905 w_rx_09_fifo_pull -.sym 4909 i_smi_a2_SB_LUT4_I1_O_SB_LUT4_I3_1_I2[1] -.sym 4911 w_rx_24_fifo_data[1] -.sym 4912 w_rx_24_fifo_data[0] -.sym 4913 smi_ctrl_ins.int_cnt_24_SB_DFFESR_Q_E -.sym 4917 rx_24_fifo.wr_addr[7] -.sym 4918 w_rx_24_fifo_pulled_data[24] -.sym 4922 w_rx_24_fifo_pulled_data[26] -.sym 4924 w_rx_24_fifo_pulled_data[27] -.sym 4926 rx_24_fifo.wr_addr[7] -.sym 4927 rx_24_fifo.wr_addr[3] -.sym 4928 w_rx_24_fifo_pulled_data[29] -.sym 4934 w_rx_24_fifo_pulled_data[0] -.sym 4935 w_rx_24_fifo_pulled_data[29] -.sym 4936 w_rx_24_fifo_data[2] -.sym 4937 i_smi_a2_SB_LUT4_I1_O_SB_LUT4_I3_1_I2_SB_LUT4_O_I3[1] -.sym 4940 w_rx_24_fifo_pulled_data[27] -.sym 4942 w_rx_24_fifo_pulled_data[24] -.sym 4943 i_smi_a2_SB_LUT4_I1_O_SB_LUT4_I3_1_I2[1] -.sym 4944 lvds_rx_24_inst.r_state_if_SB_LUT4_I2_O[0] -.sym 4945 i_smi_a2_SB_LUT4_I1_O_SB_LUT4_I3_1_I2_SB_LUT4_O_I3[1] -.sym 4946 w_rx_24_fifo_pulled_data[26] -.sym 4950 w_rx_24_fifo_pulled_data[8] -.sym 4952 w_rx_24_fifo_pulled_data[18] -.sym 4953 w_rx_24_fifo_pulled_data[19] -.sym 4954 w_rx_24_fifo_pulled_data[28] -.sym 4955 w_rx_24_fifo_pulled_data[16] -.sym 4958 smi_ctrl_ins.o_smi_data_out_SB_DFFE_Q_7_D_SB_LUT4_O_I0_SB_LUT4_O_I3[3] -.sym 4962 w_rx_24_fifo_pulled_data[20] -.sym 4963 w_rx_24_fifo_pulled_data[21] -.sym 4965 w_rx_24_fifo_data[4] -.sym 4967 i_smi_a2_SB_LUT4_I1_O_SB_LUT4_I3_1_I2[1] -.sym 4968 i_smi_a2_SB_LUT4_I1_O_SB_LUT4_I3_1_I2_SB_LUT4_O_I3[1] -.sym 4969 w_rx_24_fifo_pulled_data[0] -.sym 4970 w_rx_24_fifo_pulled_data[16] -.sym 4973 i_smi_a2_SB_LUT4_I1_O_SB_LUT4_I3_1_I2_SB_LUT4_O_I3[1] -.sym 4974 w_rx_24_fifo_pulled_data[27] -.sym 4975 w_rx_24_fifo_pulled_data[19] -.sym 4976 i_smi_a2_SB_LUT4_I1_O_SB_LUT4_I3_1_I2[1] -.sym 4979 w_rx_24_fifo_data[4] -.sym 4982 lvds_rx_24_inst.r_state_if_SB_LUT4_I2_O[0] -.sym 4985 w_rx_24_fifo_pulled_data[24] -.sym 4986 w_rx_24_fifo_pulled_data[8] -.sym 4987 smi_ctrl_ins.o_smi_data_out_SB_DFFE_Q_7_D_SB_LUT4_O_I0_SB_LUT4_O_I3[3] -.sym 4988 i_smi_a2_SB_LUT4_I1_O_SB_LUT4_I3_1_I2_SB_LUT4_O_I3[1] -.sym 4991 i_smi_a2_SB_LUT4_I1_O_SB_LUT4_I3_1_I2[1] -.sym 4992 w_rx_24_fifo_pulled_data[29] -.sym 4993 w_rx_24_fifo_pulled_data[21] -.sym 4994 i_smi_a2_SB_LUT4_I1_O_SB_LUT4_I3_1_I2_SB_LUT4_O_I3[1] -.sym 4997 i_smi_a2_SB_LUT4_I1_O_SB_LUT4_I3_1_I2_SB_LUT4_O_I3[1] -.sym 4998 i_smi_a2_SB_LUT4_I1_O_SB_LUT4_I3_1_I2[1] -.sym 4999 w_rx_24_fifo_pulled_data[20] -.sym 5000 w_rx_24_fifo_pulled_data[28] -.sym 5003 w_rx_24_fifo_pulled_data[18] -.sym 5004 i_smi_a2_SB_LUT4_I1_O_SB_LUT4_I3_1_I2_SB_LUT4_O_I3[1] -.sym 5005 i_smi_a2_SB_LUT4_I1_O_SB_LUT4_I3_1_I2[1] -.sym 5006 w_rx_24_fifo_pulled_data[26] -.sym 5009 lvds_rx_24_inst.r_state_if_SB_LUT4_I2_O[0] -.sym 5012 w_rx_24_fifo_data[2] -.sym 5013 w_lvds_rx_24_d1_SB_LUT4_I0_O_SB_LUT4_I3_O_$glb_ce +.sym 4812 rx_09_fifo.wr_addr[4] +.sym 4813 lvds_rx_09_inst.r_push_SB_LUT4_I3_O_SB_LUT4_O_1_I0[0] +.sym 4814 lvds_rx_09_inst.r_push_SB_LUT4_I3_O_SB_LUT4_O_1_I0[1] +.sym 4818 rx_09_fifo.wr_addr[3] +.sym 4825 rx_09_fifo.wr_addr[7] +.sym 4828 lvds_rx_09_inst.r_push_SB_LUT4_I3_I1[1] +.sym 4829 rx_09_fifo.wr_addr[5] +.sym 4830 lvds_rx_09_inst.r_push_SB_LUT4_I3_O_SB_LUT4_O_1_I0[3] +.sym 4832 rx_09_fifo.wr_addr[2] +.sym 4833 rx_09_fifo.wr_addr[6] +.sym 4838 lvds_rx_09_inst.r_push_SB_LUT4_I3_O_SB_LUT4_O_1_I0[3] +.sym 4843 $nextpnr_ICESTORM_LC_3$O +.sym 4845 lvds_rx_09_inst.r_push_SB_LUT4_I3_O_SB_LUT4_O_1_I0[3] +.sym 4849 rx_09_fifo.wr_addr_gray_SB_LUT4_I2_I3[2] +.sym 4852 rx_09_fifo.wr_addr[2] +.sym 4853 lvds_rx_09_inst.r_push_SB_LUT4_I3_O_SB_LUT4_O_1_I0[3] +.sym 4855 rx_09_fifo.wr_addr_gray_SB_LUT4_I2_I3[3] +.sym 4857 rx_09_fifo.wr_addr[3] +.sym 4859 rx_09_fifo.wr_addr_gray_SB_LUT4_I2_I3[2] +.sym 4861 rx_09_fifo.wr_addr_gray_SB_LUT4_I2_I3[4] +.sym 4864 rx_09_fifo.wr_addr[4] +.sym 4865 rx_09_fifo.wr_addr_gray_SB_LUT4_I2_I3[3] +.sym 4867 rx_09_fifo.wr_addr_gray_SB_LUT4_I2_I3[5] +.sym 4870 rx_09_fifo.wr_addr[5] +.sym 4871 rx_09_fifo.wr_addr_gray_SB_LUT4_I2_I3[4] +.sym 4873 rx_09_fifo.wr_addr_gray_SB_LUT4_I2_I3[6] +.sym 4875 rx_09_fifo.wr_addr[6] +.sym 4877 rx_09_fifo.wr_addr_gray_SB_LUT4_I2_I3[5] +.sym 4881 rx_09_fifo.wr_addr[7] +.sym 4883 rx_09_fifo.wr_addr_gray_SB_LUT4_I2_I3[6] +.sym 4886 lvds_rx_09_inst.r_push_SB_LUT4_I3_O_SB_LUT4_O_1_I0[1] +.sym 4887 lvds_rx_09_inst.r_push_SB_LUT4_I3_O_SB_LUT4_O_1_I0[0] +.sym 4888 lvds_rx_09_inst.r_push_SB_LUT4_I3_I1[1] +.sym 4889 lvds_rx_09_inst.r_push_SB_LUT4_I3_O_SB_LUT4_O_1_I0[3] +.sym 4935 lvds_rx_09_inst.r_push_SB_LUT4_I3_O_SB_LUT4_O_2_I0[0] +.sym 4936 lvds_rx_09_inst.r_push_SB_LUT4_I3_O[2] +.sym 4937 lvds_rx_09_inst.r_push_SB_LUT4_I3_O[0] +.sym 4938 lvds_rx_09_inst.r_push_SB_LUT4_I3_I1[4] +.sym 4939 lvds_rx_09_inst.r_push_SB_LUT4_I3_I1[5] +.sym 4940 lvds_rx_09_inst.r_push_SB_LUT4_I3_I1[6] +.sym 4941 lvds_rx_09_inst.r_push_SB_LUT4_I3_O_SB_LUT4_O_2_I0[3] +.sym 4942 rx_09_fifo.rd_addr_gray_wr_r[2] +.sym 4943 lvds_rx_09_inst.r_push_SB_LUT4_I3_I1[1] +.sym 4944 lvds_rx_09_inst.r_push_SB_LUT4_I3_I1[2] +.sym 4945 lvds_rx_09_inst.r_push_SB_LUT4_I3_I1[3] +.sym 4946 w_rx_09_fifo_full +.sym 4947 w_rx_09_fifo_push +.sym 4948 rx_09_fifo.rd_addr_gray_wr_r[5] +.sym 4949 lvds_rx_09_inst.r_push_SB_LUT4_I3_O[1] +.sym 4954 rx_09_fifo.rd_addr_gray_wr_r[7] +.sym 4956 rx_09_fifo.full_o_SB_DFFSR_Q_D_SB_LUT4_O_I1[1] +.sym 4957 lvds_rx_09_inst.r_push_SB_LUT4_I3_O[3] +.sym 4959 rx_09_fifo.full_o_SB_DFFSR_Q_D_SB_LUT4_O_I1[0] +.sym 4960 rx_09_fifo.full_o_SB_DFFSR_Q_D_SB_LUT4_O_I1[2] +.sym 4962 rx_09_fifo.rd_addr_gray_wr_r[7] +.sym 4963 lvds_rx_09_inst.r_push_SB_LUT4_I3_O_SB_LUT4_O_2_I2[2] +.sym 4964 rx_09_fifo.rd_addr_gray_wr_r[6] +.sym 4965 rx_09_fifo.wr_addr_gray_SB_LUT4_I2_1_O[7] +.sym 4967 w_rx_09_fifo_push +.sym 4968 w_rx_09_fifo_full +.sym 4969 rx_09_fifo.wr_addr_gray_SB_LUT4_I2_1_O[7] +.sym 4970 rx_09_fifo.rd_addr_gray_wr_r[7] +.sym 4973 lvds_rx_09_inst.r_push_SB_LUT4_I3_O[3] +.sym 4974 lvds_rx_09_inst.r_push_SB_LUT4_I3_O[1] +.sym 4975 lvds_rx_09_inst.r_push_SB_LUT4_I3_O[0] +.sym 4976 lvds_rx_09_inst.r_push_SB_LUT4_I3_O[2] +.sym 4979 w_rx_09_fifo_push +.sym 4980 rx_09_fifo.rd_addr_gray_wr_r[2] +.sym 4981 lvds_rx_09_inst.r_push_SB_LUT4_I3_I1[1] +.sym 4982 lvds_rx_09_inst.r_push_SB_LUT4_I3_I1[2] +.sym 4985 lvds_rx_09_inst.r_push_SB_LUT4_I3_O_SB_LUT4_O_2_I0[0] +.sym 4986 lvds_rx_09_inst.r_push_SB_LUT4_I3_I1[4] +.sym 4987 lvds_rx_09_inst.r_push_SB_LUT4_I3_O_SB_LUT4_O_2_I0[3] +.sym 4988 lvds_rx_09_inst.r_push_SB_LUT4_I3_O_SB_LUT4_O_2_I2[2] +.sym 4991 rx_09_fifo.full_o_SB_DFFSR_Q_D_SB_LUT4_O_I1[1] +.sym 4992 rx_09_fifo.full_o_SB_DFFSR_Q_D_SB_LUT4_O_I1[2] +.sym 4993 rx_09_fifo.full_o_SB_DFFSR_Q_D_SB_LUT4_O_I1[0] +.sym 4997 rx_09_fifo.rd_addr_gray_wr_r[5] +.sym 4999 lvds_rx_09_inst.r_push_SB_LUT4_I3_I1[5] +.sym 5003 lvds_rx_09_inst.r_push_SB_LUT4_I3_I1[4] +.sym 5004 lvds_rx_09_inst.r_push_SB_LUT4_I3_O_SB_LUT4_O_2_I0[0] +.sym 5005 lvds_rx_09_inst.r_push_SB_LUT4_I3_I1[3] +.sym 5006 lvds_rx_09_inst.r_push_SB_LUT4_I3_O_SB_LUT4_O_2_I0[3] +.sym 5009 lvds_rx_09_inst.r_push_SB_LUT4_I3_I1[5] +.sym 5010 lvds_rx_09_inst.r_push_SB_LUT4_I3_I1[6] +.sym 5011 rx_09_fifo.rd_addr_gray_wr_r[6] +.sym 5012 rx_09_fifo.rd_addr_gray_wr_r[7] .sym 5014 lvds_clock_buf -.sym 5015 i_smi_a1_SB_LUT4_I1_O_SB_LUT4_O_I2_SB_LUT4_I0_O[2]_$glb_sr -.sym 5016 w_rx_24_fifo_pulled_data[16] -.sym 5017 w_rx_24_fifo_pulled_data[17] -.sym 5018 w_rx_24_fifo_pulled_data[18] -.sym 5019 w_rx_24_fifo_pulled_data[19] -.sym 5020 w_rx_24_fifo_pulled_data[20] -.sym 5021 w_rx_24_fifo_pulled_data[21] -.sym 5022 w_rx_24_fifo_pulled_data[22] -.sym 5023 w_rx_24_fifo_pulled_data[23] -.sym 5024 i_smi_a2_SB_LUT4_I1_O[3] -.sym 5027 i_smi_a2_SB_LUT4_I1_O[3] -.sym 5028 i_smi_a2_SB_LUT4_I1_O[1] -.sym 5030 w_rx_24_fifo_data[10] -.sym 5033 lvds_rx_09_inst.r_push_SB_DFFNESR_Q_E_SB_LUT4_O_I1_SB_LUT4_O_I2[2] -.sym 5034 w_rx_24_fifo_data[11] -.sym 5035 lvds_rx_09_inst.r_push_SB_DFFNESR_Q_E_SB_LUT4_O_I1_SB_LUT4_O_I2[3] -.sym 5036 w_rx_24_fifo_data[14] -.sym 5038 w_rx_24_fifo_data[12] -.sym 5042 i_smi_a1_SB_LUT4_I1_O_SB_LUT4_O_I2_SB_LUT4_I0_O[2] -.sym 5048 w_rx_24_fifo_pulled_data[14] -.sym 5057 w_rx_24_fifo_data[22] -.sym 5058 w_rx_24_fifo_data[27] -.sym 5064 lvds_rx_24_inst.r_state_if_SB_LUT4_I2_O[0] -.sym 5065 w_rx_24_fifo_data[16] -.sym 5067 i_smi_a2_SB_LUT4_I1_O_SB_LUT4_I3_1_I2[1] -.sym 5071 w_rx_24_fifo_data[20] -.sym 5072 i_smi_a2_SB_LUT4_I1_O_SB_LUT4_I3_1_I2_SB_LUT4_O_I3[1] -.sym 5075 w_rx_24_fifo_data[28] -.sym 5077 w_rx_24_fifo_data[26] -.sym 5079 w_rx_24_fifo_pulled_data[30] -.sym 5082 w_rx_24_fifo_data[24] -.sym 5087 w_rx_24_fifo_pulled_data[22] -.sym 5091 lvds_rx_24_inst.r_state_if_SB_LUT4_I2_O[0] -.sym 5093 w_rx_24_fifo_data[20] -.sym 5096 lvds_rx_24_inst.r_state_if_SB_LUT4_I2_O[0] -.sym 5097 w_rx_24_fifo_data[22] -.sym 5104 w_rx_24_fifo_data[26] -.sym 5105 lvds_rx_24_inst.r_state_if_SB_LUT4_I2_O[0] -.sym 5108 lvds_rx_24_inst.r_state_if_SB_LUT4_I2_O[0] -.sym 5110 w_rx_24_fifo_data[27] -.sym 5115 lvds_rx_24_inst.r_state_if_SB_LUT4_I2_O[0] -.sym 5116 w_rx_24_fifo_data[24] +.sym 5015 i_smi_a1_SB_LUT4_I1_O[3]_$glb_sr +.sym 5016 w_rx_24_fifo_pulled_data[0] +.sym 5017 w_rx_24_fifo_pulled_data[1] +.sym 5018 w_rx_24_fifo_pulled_data[2] +.sym 5019 w_rx_24_fifo_pulled_data[3] +.sym 5020 w_rx_24_fifo_pulled_data[4] +.sym 5021 w_rx_24_fifo_pulled_data[5] +.sym 5022 w_rx_24_fifo_pulled_data[6] +.sym 5023 w_rx_24_fifo_pulled_data[7] +.sym 5038 w_rx_09_fifo_full +.sym 5039 i_smi_a1_SB_LUT4_I1_O[3] +.sym 5040 w_rx_24_fifo_data[20] +.sym 5041 rx_24_fifo.wr_addr[2] +.sym 5043 rx_24_fifo.wr_addr[5] +.sym 5044 rx_24_fifo.empty_o_SB_DFFSS_Q_D_SB_LUT4_O_I0_SB_LUT4_O_I0_SB_LUT4_O_I0[2] +.sym 5045 w_rx_09_fifo_full +.sym 5046 rx_24_fifo.empty_o_SB_DFFSS_Q_D_SB_LUT4_O_I0_SB_LUT4_O_2_I3[1] +.sym 5049 i_smi_a3$SB_IO_IN +.sym 5050 rx_24_fifo.empty_o_SB_DFFSS_Q_D_SB_LUT4_O_I0_SB_LUT4_O_I0_SB_LUT4_O_I0[3] +.sym 5051 rx_24_fifo.full_o_SB_LUT4_I3_O[0] +.sym 5065 w_rx_24_fifo_data[17] +.sym 5067 w_rx_24_fifo_data[0] +.sym 5069 w_rx_24_fifo_data[18] +.sym 5070 w_rx_24_fifo_data[2] +.sym 5083 lvds_rx_24_inst.r_state_if_SB_LUT4_I2_O[0] +.sym 5087 w_rx_24_fifo_data[4] +.sym 5103 lvds_rx_24_inst.r_state_if_SB_LUT4_I2_O[0] +.sym 5105 w_rx_24_fifo_data[17] +.sym 5108 w_rx_24_fifo_data[4] +.sym 5110 lvds_rx_24_inst.r_state_if_SB_LUT4_I2_O[0] +.sym 5115 w_rx_24_fifo_data[18] +.sym 5117 lvds_rx_24_inst.r_state_if_SB_LUT4_I2_O[0] .sym 5120 lvds_rx_24_inst.r_state_if_SB_LUT4_I2_O[0] -.sym 5122 w_rx_24_fifo_data[16] -.sym 5126 i_smi_a2_SB_LUT4_I1_O_SB_LUT4_I3_1_I2_SB_LUT4_O_I3[1] -.sym 5127 i_smi_a2_SB_LUT4_I1_O_SB_LUT4_I3_1_I2[1] -.sym 5128 w_rx_24_fifo_pulled_data[30] -.sym 5129 w_rx_24_fifo_pulled_data[22] -.sym 5132 lvds_rx_24_inst.r_state_if_SB_LUT4_I2_O[0] -.sym 5135 w_rx_24_fifo_data[28] +.sym 5122 w_rx_24_fifo_data[0] +.sym 5126 w_rx_24_fifo_data[2] +.sym 5127 lvds_rx_24_inst.r_state_if_SB_LUT4_I2_O[0] .sym 5136 w_lvds_rx_24_d1_SB_LUT4_I0_O_SB_LUT4_I3_O_$glb_ce .sym 5137 lvds_clock_buf -.sym 5138 i_smi_a1_SB_LUT4_I1_O_SB_LUT4_O_I2_SB_LUT4_I0_O[2]_$glb_sr -.sym 5139 w_rx_24_fifo_pulled_data[24] -.sym 5140 w_rx_24_fifo_pulled_data[25] -.sym 5141 w_rx_24_fifo_pulled_data[26] -.sym 5142 w_rx_24_fifo_pulled_data[27] -.sym 5143 w_rx_24_fifo_pulled_data[28] -.sym 5144 w_rx_24_fifo_pulled_data[29] -.sym 5145 w_rx_24_fifo_pulled_data[30] -.sym 5146 w_rx_24_fifo_pulled_data[31] -.sym 5153 w_rx_24_fifo_data[18] -.sym 5154 i_smi_soe_se$rename$0 -.sym 5155 $PACKER_VCC_NET -.sym 5159 w_rx_24_fifo_data[29] -.sym 5160 lvds_rx_24_inst.r_state_if_SB_LUT4_I2_O[0] -.sym 5161 w_rx_24_fifo_push -.sym 5167 rx_24_fifo.full_o_SB_DFFSR_Q_D_SB_LUT4_O_I1_SB_LUT4_O_I0[3] -.sym 5171 rx_24_fifo.wr_addr[6] -.sym 5173 i_smi_a3$SB_IO_IN -.sym 5180 lvds_rx_09_inst.r_state_if_SB_LUT4_I2_O[0] -.sym 5182 lvds_rx_09_inst.r_state_if_SB_DFFNESR_Q_E -.sym 5183 lvds_rx_09_inst.r_push_SB_DFFNESR_Q_E_SB_LUT4_O_I1[1] -.sym 5187 w_rx_24_fifo_pulled_data[23] -.sym 5189 w_rx_24_fifo_pulled_data[17] -.sym 5190 i_smi_a2_SB_LUT4_I1_O_SB_LUT4_I3_1_I2_SB_LUT4_O_I3[1] -.sym 5193 i_smi_a2_SB_LUT4_I1_O_SB_LUT4_I3_1_I2[1] -.sym 5197 w_rx_24_fifo_pulled_data[25] -.sym 5199 lvds_rx_09_inst.r_push_SB_DFFNESR_Q_E_SB_LUT4_O_I1[0] -.sym 5200 lvds_rx_09_inst.r_push_SB_DFFNESR_Q_E_SB_LUT4_O_I1_SB_LUT4_O_I2[3] -.sym 5202 i_smi_a1_SB_LUT4_I1_O_SB_LUT4_O_I2_SB_LUT4_I0_O[2] -.sym 5211 w_rx_24_fifo_pulled_data[31] -.sym 5213 lvds_rx_09_inst.r_push_SB_DFFNESR_Q_E_SB_LUT4_O_I1_SB_LUT4_O_I2[3] -.sym 5214 lvds_rx_09_inst.r_push_SB_DFFNESR_Q_E_SB_LUT4_O_I1[0] -.sym 5215 i_smi_a1_SB_LUT4_I1_O_SB_LUT4_O_I2_SB_LUT4_I0_O[2] -.sym 5221 lvds_rx_09_inst.r_push_SB_DFFNESR_Q_E_SB_LUT4_O_I1[1] -.sym 5237 lvds_rx_09_inst.r_state_if_SB_LUT4_I2_O[0] -.sym 5243 w_rx_24_fifo_pulled_data[25] -.sym 5244 i_smi_a2_SB_LUT4_I1_O_SB_LUT4_I3_1_I2[1] -.sym 5245 i_smi_a2_SB_LUT4_I1_O_SB_LUT4_I3_1_I2_SB_LUT4_O_I3[1] -.sym 5246 w_rx_24_fifo_pulled_data[17] -.sym 5255 w_rx_24_fifo_pulled_data[23] -.sym 5256 i_smi_a2_SB_LUT4_I1_O_SB_LUT4_I3_1_I2[1] -.sym 5257 i_smi_a2_SB_LUT4_I1_O_SB_LUT4_I3_1_I2_SB_LUT4_O_I3[1] -.sym 5258 w_rx_24_fifo_pulled_data[31] -.sym 5259 lvds_rx_09_inst.r_state_if_SB_DFFNESR_Q_E +.sym 5138 i_smi_a1_SB_LUT4_I1_O[3]_$glb_sr +.sym 5139 w_rx_24_fifo_pulled_data[8] +.sym 5140 w_rx_24_fifo_pulled_data[9] +.sym 5141 w_rx_24_fifo_pulled_data[10] +.sym 5142 w_rx_24_fifo_pulled_data[11] +.sym 5143 w_rx_24_fifo_pulled_data[12] +.sym 5144 w_rx_24_fifo_pulled_data[13] +.sym 5145 w_rx_24_fifo_pulled_data[14] +.sym 5146 w_rx_24_fifo_pulled_data[15] +.sym 5148 lvds_rx_24_inst.r_state_if_SB_LUT4_I2_O[0] +.sym 5149 lvds_rx_24_inst.r_state_if_SB_LUT4_I2_O[0] +.sym 5154 w_rx_24_fifo_data[7] +.sym 5155 w_rx_24_fifo_data[0] +.sym 5157 rx_24_fifo.wr_addr[0] +.sym 5159 w_rx_24_fifo_data[6] +.sym 5160 rx_24_fifo.wr_addr[6] +.sym 5161 w_rx_24_fifo_data[17] +.sym 5163 w_rx_24_fifo_data[11] +.sym 5164 w_rx_24_fifo_data[19] +.sym 5168 w_rx_24_fifo_pulled_data[14] +.sym 5169 lvds_rx_24_inst.r_state_if_SB_LUT4_I2_O[0] +.sym 5171 w_rx_24_fifo_data[14] +.sym 5181 rx_24_fifo.rd_addr_gray_wr_r[6] +.sym 5182 lvds_rx_24_inst.r_push_SB_LUT4_I2_I0_SB_LUT4_O_2_I0[3] +.sym 5183 lvds_rx_24_inst.r_push_SB_LUT4_I2_I0_SB_LUT4_O_2_I0[2] +.sym 5184 w_rx_24_fifo_data[21] +.sym 5185 lvds_rx_24_inst.r_push_SB_LUT4_I2_I0_SB_LUT4_O_I0[3] +.sym 5186 lvds_rx_24_inst.r_push_SB_LUT4_I2_I0_SB_LUT4_O_I1[6] +.sym 5189 lvds_rx_24_inst.r_push_SB_LUT4_I2_I0_SB_LUT4_O_I1[1] +.sym 5190 w_rx_24_fifo_data[19] +.sym 5191 lvds_rx_24_inst.r_push_SB_LUT4_I2_I0_SB_LUT4_O_I0[2] +.sym 5192 lvds_rx_24_inst.r_push_SB_LUT4_I2_I0_SB_LUT4_O_I0[1] +.sym 5193 rx_24_fifo.rd_addr_gray_wr_r[7] +.sym 5194 rx_24_fifo.rd_addr_gray_wr_r[2] +.sym 5195 lvds_rx_24_inst.r_state_if_SB_LUT4_I2_O[0] +.sym 5197 lvds_rx_24_inst.r_push_SB_LUT4_I2_I0[3] +.sym 5198 lvds_rx_24_inst.r_push_SB_LUT4_I2_I0_SB_LUT4_O_I0[0] +.sym 5199 lvds_rx_24_inst.r_push_SB_LUT4_I2_I0[1] +.sym 5200 lvds_rx_24_inst.r_push_SB_LUT4_I2_I0_SB_LUT4_O_2_I0[1] +.sym 5207 w_rx_24_fifo_push +.sym 5209 lvds_rx_24_inst.r_push_SB_LUT4_I2_I0[0] +.sym 5210 lvds_rx_24_inst.r_push_SB_LUT4_I2_I0_SB_LUT4_O_2_I0[0] +.sym 5211 rx_24_fifo.full_o_SB_LUT4_I3_O[0] +.sym 5213 w_rx_24_fifo_push +.sym 5214 lvds_rx_24_inst.r_push_SB_LUT4_I2_I0[3] +.sym 5215 lvds_rx_24_inst.r_push_SB_LUT4_I2_I0[0] +.sym 5216 lvds_rx_24_inst.r_push_SB_LUT4_I2_I0[1] +.sym 5219 rx_24_fifo.rd_addr_gray_wr_r[6] +.sym 5220 lvds_rx_24_inst.r_push_SB_LUT4_I2_I0_SB_LUT4_O_I1[6] +.sym 5221 lvds_rx_24_inst.r_push_SB_LUT4_I2_I0_SB_LUT4_O_I0[3] +.sym 5222 rx_24_fifo.rd_addr_gray_wr_r[7] +.sym 5225 rx_24_fifo.full_o_SB_LUT4_I3_O[0] +.sym 5226 lvds_rx_24_inst.r_push_SB_LUT4_I2_I0_SB_LUT4_O_2_I0[2] +.sym 5231 lvds_rx_24_inst.r_push_SB_LUT4_I2_I0_SB_LUT4_O_I0[3] +.sym 5232 lvds_rx_24_inst.r_push_SB_LUT4_I2_I0_SB_LUT4_O_I0[2] +.sym 5233 lvds_rx_24_inst.r_push_SB_LUT4_I2_I0_SB_LUT4_O_I0[1] +.sym 5234 lvds_rx_24_inst.r_push_SB_LUT4_I2_I0_SB_LUT4_O_I0[0] +.sym 5239 lvds_rx_24_inst.r_state_if_SB_LUT4_I2_O[0] +.sym 5240 w_rx_24_fifo_data[19] +.sym 5243 lvds_rx_24_inst.r_push_SB_LUT4_I2_I0_SB_LUT4_O_2_I0[2] +.sym 5244 lvds_rx_24_inst.r_push_SB_LUT4_I2_I0_SB_LUT4_O_2_I0[1] +.sym 5245 lvds_rx_24_inst.r_push_SB_LUT4_I2_I0_SB_LUT4_O_2_I0[0] +.sym 5246 lvds_rx_24_inst.r_push_SB_LUT4_I2_I0_SB_LUT4_O_2_I0[3] +.sym 5250 rx_24_fifo.rd_addr_gray_wr_r[2] +.sym 5251 lvds_rx_24_inst.r_push_SB_LUT4_I2_I0_SB_LUT4_O_I1[1] +.sym 5256 w_rx_24_fifo_data[21] +.sym 5258 lvds_rx_24_inst.r_state_if_SB_LUT4_I2_O[0] +.sym 5259 w_lvds_rx_24_d1_SB_LUT4_I0_O_SB_LUT4_I3_O_$glb_ce .sym 5260 lvds_clock_buf -.sym 5261 i_smi_a1_SB_LUT4_I1_O_SB_LUT4_O_I2_SB_LUT4_I0_O[2]_$glb_sr -.sym 5274 w_rx_24_fifo_data[27] -.sym 5276 w_rx_24_fifo_data[20] -.sym 5279 lvds_rx_24_inst.r_state_if_SB_LUT4_I2_O[0] -.sym 5281 smi_ctrl_ins.r_fifo_24_pull_SB_LUT4_I3_1_O -.sym 5289 rx_24_fifo.wr_addr[2] -.sym 5290 w_rx_24_fifo_pulled_data[28] -.sym 5291 rx_24_fifo.wr_addr[4] -.sym 5292 spi_if_ins.state_if[0] -.sym 5293 lvds_rx_24_inst.r_push_SB_LUT4_I3_O -.sym 5294 rx_24_fifo.rd_addr_gray_wr_r[6] -.sym 5295 w_rx_24_fifo_pull -.sym 5303 rx_24_fifo.wr_addr[4] -.sym 5305 rx_24_fifo.full_o_SB_DFFSR_Q_D_SB_LUT4_O_I1_SB_LUT4_O_I0[3] -.sym 5307 spi_if_ins.state_if_SB_DFFESR_Q_1_R -.sym 5308 rx_24_fifo.wr_addr[3] -.sym 5310 rx_24_fifo.wr_addr[2] -.sym 5314 spi_if_ins.state_if_SB_DFFE_Q_E -.sym 5315 rx_24_fifo.wr_addr[6] -.sym 5316 spi_if_ins.state_if_SB_DFFESR_Q_D[0] -.sym 5317 rx_24_fifo.wr_addr[7] -.sym 5333 rx_24_fifo.wr_addr[5] -.sym 5335 $nextpnr_ICESTORM_LC_6$O -.sym 5338 rx_24_fifo.full_o_SB_DFFSR_Q_D_SB_LUT4_O_I1_SB_LUT4_O_I0[3] -.sym 5341 rx_24_fifo.wr_addr_gray_SB_LUT4_I2_I3[2] -.sym 5344 rx_24_fifo.wr_addr[2] -.sym 5345 rx_24_fifo.full_o_SB_DFFSR_Q_D_SB_LUT4_O_I1_SB_LUT4_O_I0[3] -.sym 5347 rx_24_fifo.wr_addr_gray_SB_LUT4_I2_I3[3] -.sym 5349 rx_24_fifo.wr_addr[3] -.sym 5351 rx_24_fifo.wr_addr_gray_SB_LUT4_I2_I3[2] -.sym 5353 rx_24_fifo.wr_addr_gray_SB_LUT4_I2_I3[4] -.sym 5355 rx_24_fifo.wr_addr[4] -.sym 5357 rx_24_fifo.wr_addr_gray_SB_LUT4_I2_I3[3] -.sym 5359 rx_24_fifo.wr_addr_gray_SB_LUT4_I2_I3[5] -.sym 5361 rx_24_fifo.wr_addr[5] -.sym 5363 rx_24_fifo.wr_addr_gray_SB_LUT4_I2_I3[4] -.sym 5365 rx_24_fifo.wr_addr_gray_SB_LUT4_I2_I3[6] -.sym 5368 rx_24_fifo.wr_addr[6] -.sym 5369 rx_24_fifo.wr_addr_gray_SB_LUT4_I2_I3[5] -.sym 5373 rx_24_fifo.wr_addr[7] -.sym 5375 rx_24_fifo.wr_addr_gray_SB_LUT4_I2_I3[6] -.sym 5381 spi_if_ins.state_if_SB_DFFESR_Q_D[0] -.sym 5382 spi_if_ins.state_if_SB_DFFE_Q_E -.sym 5383 r_counter[0]_$glb_clk -.sym 5384 spi_if_ins.state_if_SB_DFFESR_Q_1_R -.sym 5397 lvds_rx_09_inst.r_state_if_SB_LUT4_I2_O[0] -.sym 5401 lvds_rx_24_inst.r_push_SB_LUT4_I0_1_I1_SB_LUT4_O_I2[1] -.sym 5402 spi_if_ins.state_if_SB_DFFE_Q_E -.sym 5404 rx_24_fifo.rd_addr_gray_wr_r[7] -.sym 5411 rx_24_fifo.wr_addr[3] -.sym 5413 rx_24_fifo.wr_addr[7] -.sym 5419 rx_24_fifo.wr_addr_gray[6] -.sym 5420 spi_if_ins.state_if[0] -.sym 5427 rx_24_fifo.wr_addr_gray_SB_LUT4_I2_1_O[1] -.sym 5429 rx_24_fifo.wr_addr_gray_SB_LUT4_I2_1_O[3] -.sym 5430 rx_24_fifo.wr_addr_gray_SB_LUT4_I2_1_O[4] -.sym 5432 lvds_rx_24_inst.r_push_SB_LUT4_I0_1_I1_SB_LUT4_O_I2[6] -.sym 5436 rx_24_fifo.wr_addr_gray_SB_LUT4_I2_1_O[2] -.sym 5439 lvds_rx_24_inst.r_push_SB_LUT4_I0_1_I1_SB_LUT4_O_I2[5] -.sym 5440 rx_24_fifo.wr_addr_gray_SB_LUT4_I2_1_O[6] -.sym 5441 rx_24_fifo.wr_addr_gray_SB_LUT4_I2_1_O[7] -.sym 5450 rx_24_fifo.rd_addr_gray_wr_r[7] -.sym 5453 lvds_rx_24_inst.r_push_SB_LUT4_I3_O -.sym 5454 rx_24_fifo.rd_addr_gray_wr_r[6] -.sym 5461 rx_24_fifo.wr_addr_gray_SB_LUT4_I2_1_O[4] -.sym 5465 rx_24_fifo.wr_addr_gray_SB_LUT4_I2_1_O[6] -.sym 5468 rx_24_fifo.wr_addr_gray_SB_LUT4_I2_1_O[7] -.sym 5472 rx_24_fifo.wr_addr_gray_SB_LUT4_I2_1_O[1] -.sym 5477 rx_24_fifo.rd_addr_gray_wr_r[6] -.sym 5478 lvds_rx_24_inst.r_push_SB_LUT4_I0_1_I1_SB_LUT4_O_I2[6] -.sym 5479 rx_24_fifo.rd_addr_gray_wr_r[7] -.sym 5480 lvds_rx_24_inst.r_push_SB_LUT4_I0_1_I1_SB_LUT4_O_I2[5] -.sym 5484 rx_24_fifo.wr_addr_gray_SB_LUT4_I2_1_O[6] -.sym 5491 rx_24_fifo.wr_addr_gray_SB_LUT4_I2_1_O[3] -.sym 5495 rx_24_fifo.wr_addr_gray_SB_LUT4_I2_1_O[7] -.sym 5501 rx_24_fifo.wr_addr_gray_SB_LUT4_I2_1_O[2] -.sym 5505 lvds_rx_24_inst.r_push_SB_LUT4_I3_O -.sym 5506 lvds_clock_buf -.sym 5507 i_smi_a1_SB_LUT4_I1_O_SB_LUT4_O_I2_SB_LUT4_I0_O[2]_$glb_sr -.sym 5532 rx_24_fifo.wr_addr_gray_SB_LUT4_I2_1_O[4] -.sym 5533 rx_24_fifo.full_o_SB_DFFSR_Q_D_SB_LUT4_O_I1_SB_LUT4_O_I0[3] -.sym 5534 rx_24_fifo.wr_addr_gray_SB_LUT4_I2_1_O[5] -.sym 5536 rx_24_fifo.wr_addr_gray_SB_LUT4_I2_1_O[6] -.sym 5541 rx_24_fifo.wr_addr_gray_SB_DFFESR_Q_6_D[1] -.sym 5543 rx_24_fifo.wr_addr_gray_SB_DFFESR_Q_6_D[2] -.sym 5549 rx_24_fifo.wr_addr[4] -.sym 5551 rx_24_fifo.full_o_SB_DFFSR_Q_D_SB_LUT4_O_I1_SB_LUT4_O_I0[3] -.sym 5553 rx_24_fifo.wr_addr[0] -.sym 5555 rx_24_fifo.wr_addr[7] -.sym 5559 rx_24_fifo.wr_addr[0] -.sym 5561 rx_24_fifo.wr_addr[6] -.sym 5562 rx_24_fifo.wr_addr[3] -.sym 5563 rx_24_fifo.wr_addr[5] -.sym 5564 rx_24_fifo.wr_addr[2] -.sym 5581 $nextpnr_ICESTORM_LC_10$O -.sym 5583 rx_24_fifo.wr_addr[0] -.sym 5587 rx_24_fifo.wr_addr_gray_SB_LUT4_I2_1_I3[2] +.sym 5261 i_smi_a1_SB_LUT4_I1_O[3]_$glb_sr +.sym 5262 w_rx_24_fifo_pulled_data[16] +.sym 5263 w_rx_24_fifo_pulled_data[17] +.sym 5264 w_rx_24_fifo_pulled_data[18] +.sym 5265 w_rx_24_fifo_pulled_data[19] +.sym 5266 w_rx_24_fifo_pulled_data[20] +.sym 5267 w_rx_24_fifo_pulled_data[21] +.sym 5268 w_rx_24_fifo_pulled_data[22] +.sym 5269 w_rx_24_fifo_pulled_data[23] +.sym 5273 lvds_rx_24_inst.r_state_if_SB_DFFNESR_Q_E +.sym 5274 rx_24_fifo.full_o_SB_DFFSR_Q_D_SB_LUT4_O_I1[1] +.sym 5275 w_rx_24_fifo_data[9] +.sym 5277 lvds_rx_24_inst.r_push_SB_LUT4_I2_I0_SB_LUT4_O_I0[2] +.sym 5280 smi_ctrl_ins.o_smi_data_out_SB_DFFE_Q_7_D_SB_LUT4_O_I0[2] +.sym 5281 w_rx_24_fifo_data[10] +.sym 5282 w_rx_24_fifo_data[8] +.sym 5289 w_rx_24_fifo_push +.sym 5290 w_rx_24_fifo_push +.sym 5293 $PACKER_VCC_NET +.sym 5294 w_rx_24_fifo_data[18] +.sym 5297 rx_24_fifo.wr_addr_gray_SB_LUT4_I2_O[3] +.sym 5305 w_rx_24_fifo_data[27] +.sym 5309 w_rx_24_fifo_data[25] +.sym 5310 w_rx_24_fifo_data[23] +.sym 5311 w_rx_24_fifo_data[24] +.sym 5312 w_rx_24_fifo_data[20] +.sym 5326 w_rx_24_fifo_data[29] +.sym 5329 lvds_rx_24_inst.r_state_if_SB_LUT4_I2_O[0] +.sym 5330 w_rx_24_fifo_data[28] +.sym 5332 w_rx_24_fifo_data[22] +.sym 5336 w_rx_24_fifo_data[22] +.sym 5337 lvds_rx_24_inst.r_state_if_SB_LUT4_I2_O[0] +.sym 5342 lvds_rx_24_inst.r_state_if_SB_LUT4_I2_O[0] +.sym 5344 w_rx_24_fifo_data[24] +.sym 5350 w_rx_24_fifo_data[25] +.sym 5351 lvds_rx_24_inst.r_state_if_SB_LUT4_I2_O[0] +.sym 5354 lvds_rx_24_inst.r_state_if_SB_LUT4_I2_O[0] +.sym 5356 w_rx_24_fifo_data[29] +.sym 5362 w_rx_24_fifo_data[28] +.sym 5363 lvds_rx_24_inst.r_state_if_SB_LUT4_I2_O[0] +.sym 5368 lvds_rx_24_inst.r_state_if_SB_LUT4_I2_O[0] +.sym 5369 w_rx_24_fifo_data[20] +.sym 5373 lvds_rx_24_inst.r_state_if_SB_LUT4_I2_O[0] +.sym 5375 w_rx_24_fifo_data[23] +.sym 5379 w_rx_24_fifo_data[27] +.sym 5380 lvds_rx_24_inst.r_state_if_SB_LUT4_I2_O[0] +.sym 5382 w_lvds_rx_24_d1_SB_LUT4_I0_O_SB_LUT4_I3_O_$glb_ce +.sym 5383 lvds_clock_buf +.sym 5384 i_smi_a1_SB_LUT4_I1_O[3]_$glb_sr +.sym 5385 w_rx_24_fifo_pulled_data[24] +.sym 5386 w_rx_24_fifo_pulled_data[25] +.sym 5387 w_rx_24_fifo_pulled_data[26] +.sym 5388 w_rx_24_fifo_pulled_data[27] +.sym 5389 w_rx_24_fifo_pulled_data[28] +.sym 5390 w_rx_24_fifo_pulled_data[29] +.sym 5391 w_rx_24_fifo_pulled_data[30] +.sym 5392 w_rx_24_fifo_pulled_data[31] +.sym 5401 rx_24_fifo.wr_addr[7] +.sym 5402 rx_24_fifo.wr_addr[0] +.sym 5405 w_rx_24_fifo_empty +.sym 5419 rx_24_fifo.wr_addr_gray_SB_LUT4_I2_O[1] +.sym 5442 rx_24_fifo.full_o_SB_DFFSR_Q_D_SB_LUT4_O_I1_SB_LUT4_O_I0[3] +.sym 5445 rx_24_fifo.wr_addr[4] +.sym 5447 rx_24_fifo.wr_addr[5] +.sym 5450 rx_24_fifo.wr_addr[7] +.sym 5451 rx_24_fifo.wr_addr[0] +.sym 5452 rx_24_fifo.wr_addr[3] +.sym 5453 rx_24_fifo.wr_addr[6] +.sym 5457 rx_24_fifo.wr_addr[2] +.sym 5458 $nextpnr_ICESTORM_LC_9$O +.sym 5461 rx_24_fifo.wr_addr[0] +.sym 5464 rx_24_fifo.wr_addr_gray_SB_LUT4_I2_I3[2] +.sym 5466 rx_24_fifo.full_o_SB_DFFSR_Q_D_SB_LUT4_O_I1_SB_LUT4_O_I0[3] +.sym 5468 rx_24_fifo.wr_addr[0] +.sym 5470 rx_24_fifo.wr_addr_gray_SB_LUT4_I2_I3[3] +.sym 5473 rx_24_fifo.wr_addr[2] +.sym 5474 rx_24_fifo.wr_addr_gray_SB_LUT4_I2_I3[2] +.sym 5476 rx_24_fifo.wr_addr_gray_SB_LUT4_I2_I3[4] +.sym 5479 rx_24_fifo.wr_addr[3] +.sym 5480 rx_24_fifo.wr_addr_gray_SB_LUT4_I2_I3[3] +.sym 5482 rx_24_fifo.wr_addr_gray_SB_LUT4_I2_I3[5] +.sym 5484 rx_24_fifo.wr_addr[4] +.sym 5486 rx_24_fifo.wr_addr_gray_SB_LUT4_I2_I3[4] +.sym 5488 rx_24_fifo.wr_addr_gray_SB_LUT4_I2_I3[6] +.sym 5491 rx_24_fifo.wr_addr[5] +.sym 5492 rx_24_fifo.wr_addr_gray_SB_LUT4_I2_I3[5] +.sym 5494 rx_24_fifo.wr_addr_gray_SB_LUT4_I2_I3[7] +.sym 5497 rx_24_fifo.wr_addr[6] +.sym 5498 rx_24_fifo.wr_addr_gray_SB_LUT4_I2_I3[6] +.sym 5503 rx_24_fifo.wr_addr[7] +.sym 5504 rx_24_fifo.wr_addr_gray_SB_LUT4_I2_I3[7] +.sym 5529 rx_24_fifo.empty_o_SB_DFFSS_Q_D_SB_LUT4_O_I0_SB_LUT4_O_I0_SB_LUT4_O_I0[3] +.sym 5531 rx_24_fifo.empty_o_SB_DFFSS_Q_D_SB_LUT4_O_I0_SB_LUT4_O_2_I3[2] +.sym 5533 rx_24_fifo.empty_o_SB_DFFSS_Q_D_SB_LUT4_O_I0_SB_LUT4_O_I0_SB_LUT4_O_I0[2] +.sym 5535 rx_24_fifo.full_o_SB_LUT4_I3_O[0] +.sym 5537 w_rx_09_fifo_full +.sym 5538 rx_24_fifo.rd_addr_gray[5] +.sym 5541 rx_24_fifo.empty_o_SB_DFFSS_Q_D_SB_LUT4_O_I0_SB_LUT4_O_2_I3[1] +.sym 5549 w_rx_24_fifo_push +.sym 5550 rx_24_fifo.rd_addr_gray_wr_r[7] +.sym 5551 rx_24_fifo.full_o_SB_DFFSR_Q_D_SB_LUT4_O_I1_SB_LUT4_O_I0[0] +.sym 5552 lvds_rx_24_inst.r_push_SB_LUT4_I2_I0_SB_LUT4_O_I0[2] +.sym 5553 rx_24_fifo.full_o_SB_DFFSR_Q_D_SB_LUT4_O_I1[2] +.sym 5554 rx_24_fifo.full_o_SB_DFFSR_Q_D_SB_LUT4_O_I1[1] +.sym 5555 rx_24_fifo.wr_addr_gray_SB_LUT4_I2_O[6] +.sym 5556 rx_24_fifo.wr_addr_gray_SB_LUT4_I2_O[7] +.sym 5558 rx_24_fifo.full_o_SB_DFFSR_Q_D_SB_LUT4_O_I1_SB_LUT4_O_I0[3] +.sym 5559 rx_24_fifo.wr_addr_gray_SB_LUT4_I2_O[2] +.sym 5560 rx_24_fifo.wr_addr_gray_SB_LUT4_I2_O[3] +.sym 5561 rx_24_fifo.wr_addr_gray_SB_LUT4_I2_O[4] +.sym 5562 rx_24_fifo.wr_addr_gray_SB_LUT4_I2_O[5] +.sym 5563 lvds_rx_24_inst.r_push_SB_LUT4_I2_I0_SB_LUT4_O_I1[1] +.sym 5564 rx_24_fifo.full_o_SB_LUT4_I3_O[0] +.sym 5568 rx_24_fifo.full_o_SB_LUT4_I3_O[2] +.sym 5570 rx_24_fifo.full_o_SB_DFFSR_Q_D_SB_LUT4_O_I1_SB_LUT4_O_I0[1] +.sym 5574 rx_24_fifo.full_o_SB_DFFSR_Q_D_SB_LUT4_O_I1[0] +.sym 5577 rx_24_fifo.full_o_SB_LUT4_I3_O[3] +.sym 5578 w_rx_24_fifo_full +.sym 5579 rx_24_fifo.wr_addr_gray_SB_LUT4_I2_O[1] +.sym 5580 rx_24_fifo.full_o_SB_LUT4_I3_O[1] +.sym 5582 rx_24_fifo.full_o_SB_LUT4_I3_O[1] +.sym 5583 rx_24_fifo.full_o_SB_LUT4_I3_O[2] +.sym 5584 rx_24_fifo.full_o_SB_LUT4_I3_O[0] +.sym 5585 rx_24_fifo.full_o_SB_LUT4_I3_O[3] +.sym 5588 lvds_rx_24_inst.r_push_SB_LUT4_I2_I0_SB_LUT4_O_I1[1] .sym 5589 rx_24_fifo.full_o_SB_DFFSR_Q_D_SB_LUT4_O_I1_SB_LUT4_O_I0[3] -.sym 5591 rx_24_fifo.wr_addr[0] -.sym 5593 rx_24_fifo.wr_addr_gray_SB_LUT4_I2_1_I3[3] -.sym 5596 rx_24_fifo.wr_addr[2] -.sym 5597 rx_24_fifo.wr_addr_gray_SB_LUT4_I2_1_I3[2] -.sym 5599 rx_24_fifo.wr_addr_gray_SB_LUT4_I2_1_I3[4] -.sym 5601 rx_24_fifo.wr_addr[3] -.sym 5603 rx_24_fifo.wr_addr_gray_SB_LUT4_I2_1_I3[3] -.sym 5605 rx_24_fifo.wr_addr_gray_SB_LUT4_I2_1_I3[5] -.sym 5608 rx_24_fifo.wr_addr[4] -.sym 5609 rx_24_fifo.wr_addr_gray_SB_LUT4_I2_1_I3[4] -.sym 5611 rx_24_fifo.wr_addr_gray_SB_LUT4_I2_1_I3[6] -.sym 5614 rx_24_fifo.wr_addr[5] -.sym 5615 rx_24_fifo.wr_addr_gray_SB_LUT4_I2_1_I3[5] -.sym 5617 rx_24_fifo.wr_addr_gray_SB_LUT4_I2_1_I3[7] -.sym 5619 rx_24_fifo.wr_addr[6] -.sym 5621 rx_24_fifo.wr_addr_gray_SB_LUT4_I2_1_I3[6] -.sym 5625 rx_24_fifo.wr_addr[7] -.sym 5627 rx_24_fifo.wr_addr_gray_SB_LUT4_I2_1_I3[7] -.sym 5650 w_rx_24_fifo_empty -.sym 5651 lvds_rx_24_inst.r_push_SB_LUT4_I0_1_I1_SB_LUT4_O_1_I3[0] -.sym 5663 i_smi_a1_SB_LUT4_I1_O_SB_LUT4_O_I2_SB_LUT4_I0_O[2] -.sym 5664 i_smi_a3$SB_IO_IN -.sym 5665 w_rx_24_fifo_full -.sym 5673 rx_24_fifo.wr_addr_gray_SB_LUT4_I2_1_O[1] -.sym 5674 rx_24_fifo.wr_addr_gray_SB_LUT4_I2_1_O[2] -.sym 5676 rx_24_fifo.wr_addr_gray_SB_LUT4_I2_1_O[4] -.sym 5677 rx_24_fifo.wr_addr[0] -.sym 5678 rx_24_fifo.full_o_SB_DFFSR_Q_D_SB_LUT4_O_I1_SB_LUT4_O_I0[0] -.sym 5679 lvds_rx_24_inst.r_push_SB_LUT4_I0_1_I1_SB_LUT4_O_I2[1] -.sym 5680 rx_24_fifo.rd_addr_gray_wr_r[7] -.sym 5683 rx_24_fifo.wr_addr_gray_SB_LUT4_I2_1_O[3] -.sym 5684 rx_24_fifo.full_o_SB_DFFSR_Q_D_SB_LUT4_O_I1[2] -.sym 5685 rx_24_fifo.wr_addr_gray_SB_LUT4_I2_1_O[5] -.sym 5686 rx_24_fifo.wr_addr_gray_SB_LUT4_I2_1_O[6] -.sym 5687 rx_24_fifo.wr_addr_gray_SB_LUT4_I2_1_O[7] -.sym 5688 rx_24_fifo.full_o_SB_DFFSR_Q_D_SB_LUT4_O_I1[1] -.sym 5692 rx_24_fifo.rd_addr_gray_wr_r[5] -.sym 5693 rx_24_fifo.full_o_SB_DFFSR_Q_D_SB_LUT4_O_I1_SB_LUT4_O_I0[3] -.sym 5694 rx_24_fifo.full_o_SB_DFFSR_Q_D_SB_LUT4_O_I1_SB_LUT4_O_I0[1] -.sym 5697 rx_24_fifo.rd_addr_gray_wr_r[6] -.sym 5700 rx_24_fifo.full_o_SB_DFFSR_Q_D_SB_LUT4_O_I1[0] -.sym 5705 rx_24_fifo.wr_addr_gray_SB_LUT4_I2_1_O[7] -.sym 5706 rx_24_fifo.rd_addr_gray_wr_r[7] -.sym 5707 rx_24_fifo.rd_addr_gray_wr_r[6] -.sym 5708 rx_24_fifo.wr_addr_gray_SB_LUT4_I2_1_O[6] -.sym 5711 rx_24_fifo.full_o_SB_DFFSR_Q_D_SB_LUT4_O_I1[0] -.sym 5713 rx_24_fifo.full_o_SB_DFFSR_Q_D_SB_LUT4_O_I1[2] -.sym 5714 rx_24_fifo.full_o_SB_DFFSR_Q_D_SB_LUT4_O_I1[1] -.sym 5717 rx_24_fifo.wr_addr_gray_SB_LUT4_I2_1_O[2] -.sym 5718 rx_24_fifo.wr_addr_gray_SB_LUT4_I2_1_O[1] -.sym 5724 rx_24_fifo.wr_addr_gray_SB_LUT4_I2_1_O[2] -.sym 5726 rx_24_fifo.wr_addr_gray_SB_LUT4_I2_1_O[3] -.sym 5729 rx_24_fifo.full_o_SB_DFFSR_Q_D_SB_LUT4_O_I1_SB_LUT4_O_I0[0] -.sym 5730 rx_24_fifo.full_o_SB_DFFSR_Q_D_SB_LUT4_O_I1_SB_LUT4_O_I0[3] -.sym 5731 rx_24_fifo.full_o_SB_DFFSR_Q_D_SB_LUT4_O_I1_SB_LUT4_O_I0[1] -.sym 5732 lvds_rx_24_inst.r_push_SB_LUT4_I0_1_I1_SB_LUT4_O_I2[1] -.sym 5735 rx_24_fifo.wr_addr_gray_SB_LUT4_I2_1_O[1] -.sym 5737 rx_24_fifo.wr_addr[0] -.sym 5741 rx_24_fifo.wr_addr_gray_SB_LUT4_I2_1_O[5] -.sym 5743 rx_24_fifo.wr_addr_gray_SB_LUT4_I2_1_O[4] -.sym 5748 rx_24_fifo.wr_addr_gray_SB_LUT4_I2_1_O[5] -.sym 5749 rx_24_fifo.wr_addr_gray_SB_LUT4_I2_1_O[6] -.sym 5750 rx_24_fifo.rd_addr_gray_wr_r[5] +.sym 5590 rx_24_fifo.full_o_SB_DFFSR_Q_D_SB_LUT4_O_I1_SB_LUT4_O_I0[1] +.sym 5591 rx_24_fifo.full_o_SB_DFFSR_Q_D_SB_LUT4_O_I1_SB_LUT4_O_I0[0] +.sym 5594 rx_24_fifo.wr_addr_gray_SB_LUT4_I2_O[6] +.sym 5595 lvds_rx_24_inst.r_push_SB_LUT4_I2_I0_SB_LUT4_O_I0[2] +.sym 5596 rx_24_fifo.wr_addr_gray_SB_LUT4_I2_O[5] +.sym 5600 rx_24_fifo.rd_addr_gray_wr_r[7] +.sym 5601 w_rx_24_fifo_push +.sym 5602 rx_24_fifo.wr_addr_gray_SB_LUT4_I2_O[7] +.sym 5603 w_rx_24_fifo_full +.sym 5607 rx_24_fifo.wr_addr_gray_SB_LUT4_I2_O[2] +.sym 5608 rx_24_fifo.wr_addr_gray_SB_LUT4_I2_O[3] +.sym 5612 rx_24_fifo.full_o_SB_DFFSR_Q_D_SB_LUT4_O_I1[1] +.sym 5613 rx_24_fifo.full_o_SB_DFFSR_Q_D_SB_LUT4_O_I1[0] +.sym 5615 rx_24_fifo.full_o_SB_DFFSR_Q_D_SB_LUT4_O_I1[2] +.sym 5619 rx_24_fifo.wr_addr_gray_SB_LUT4_I2_O[2] +.sym 5621 rx_24_fifo.wr_addr_gray_SB_LUT4_I2_O[1] +.sym 5624 rx_24_fifo.wr_addr_gray_SB_LUT4_I2_O[4] +.sym 5625 rx_24_fifo.wr_addr_gray_SB_LUT4_I2_O[5] +.sym 5629 lvds_clock_buf +.sym 5630 i_smi_a1_SB_LUT4_I1_O[3]_$glb_sr +.sym 5645 w_rx_24_fifo_full +.sym 5653 w_rx_24_fifo_push +.sym 5654 lvds_rx_09_inst.r_state_if[0] +.sym 5656 rx_24_fifo.full_o_SB_DFFSR_Q_D_SB_LUT4_O_I1_SB_LUT4_O_I0[1] +.sym 5657 rx_24_fifo.rd_addr_gray_wr[7] +.sym 5662 w_rx_24_fifo_full +.sym 5665 lvds_rx_24_inst.r_state_if_SB_LUT4_I2_O[0] +.sym 5672 rx_24_fifo.full_o_SB_LUT4_I3_O_SB_LUT4_I1_O[1] +.sym 5673 rx_24_fifo.rd_addr_gray_wr_r[0] +.sym 5674 rx_24_fifo.rd_addr_gray_wr[6] +.sym 5675 rx_24_fifo.rd_addr_gray_wr[7] +.sym 5676 rx_24_fifo.rd_addr_gray_wr[4] +.sym 5677 rx_24_fifo.rd_addr_gray_wr_r[6] +.sym 5678 rx_24_fifo.full_o_SB_DFFSR_Q_D_SB_LUT4_O_I1_SB_LUT4_O_I0[1] +.sym 5680 rx_24_fifo.rd_addr_gray_wr[5] +.sym 5681 rx_24_fifo.rd_addr_gray_wr_r[0] +.sym 5682 rx_24_fifo.full_o_SB_LUT4_I3_O_SB_LUT4_I1_O[2] +.sym 5683 rx_24_fifo.wr_addr[0] +.sym 5684 rx_24_fifo.wr_addr_gray_SB_DFFESR_Q_6_D[2] +.sym 5685 rx_24_fifo.rd_addr_gray_wr_r[2] +.sym 5686 rx_24_fifo.wr_addr_gray_SB_DFFESR_Q_6_D[1] +.sym 5688 rx_24_fifo.full_o_SB_LUT4_I3_O_SB_LUT4_I1_O[0] +.sym 5697 rx_24_fifo.wr_addr_gray_SB_DFFESR_Q_7_D[3] +.sym 5698 rx_24_fifo.wr_addr_gray_SB_DFFESR_Q_7_D[0] +.sym 5702 rx_24_fifo.full_o_SB_LUT4_I3_O_SB_LUT4_I1_O[3] +.sym 5705 rx_24_fifo.rd_addr_gray_wr_r[2] +.sym 5706 rx_24_fifo.wr_addr_gray_SB_DFFESR_Q_6_D[2] +.sym 5707 rx_24_fifo.full_o_SB_DFFSR_Q_D_SB_LUT4_O_I1_SB_LUT4_O_I0[1] +.sym 5708 rx_24_fifo.wr_addr_gray_SB_DFFESR_Q_6_D[1] +.sym 5711 rx_24_fifo.rd_addr_gray_wr[7] +.sym 5717 rx_24_fifo.wr_addr[0] +.sym 5718 rx_24_fifo.rd_addr_gray_wr_r[0] +.sym 5725 rx_24_fifo.rd_addr_gray_wr[5] +.sym 5729 rx_24_fifo.full_o_SB_LUT4_I3_O_SB_LUT4_I1_O[1] +.sym 5730 rx_24_fifo.full_o_SB_LUT4_I3_O_SB_LUT4_I1_O[3] +.sym 5731 rx_24_fifo.full_o_SB_LUT4_I3_O_SB_LUT4_I1_O[0] +.sym 5732 rx_24_fifo.full_o_SB_LUT4_I3_O_SB_LUT4_I1_O[2] +.sym 5738 rx_24_fifo.rd_addr_gray_wr[6] +.sym 5741 rx_24_fifo.rd_addr_gray_wr_r[0] +.sym 5742 rx_24_fifo.wr_addr_gray_SB_DFFESR_Q_7_D[0] +.sym 5743 rx_24_fifo.wr_addr_gray_SB_DFFESR_Q_7_D[3] +.sym 5744 rx_24_fifo.rd_addr_gray_wr_r[6] +.sym 5748 rx_24_fifo.rd_addr_gray_wr[4] .sym 5752 lvds_clock_buf -.sym 5753 i_smi_a1_SB_LUT4_I1_O_SB_LUT4_O_I2_SB_LUT4_I0_O[2]_$glb_sr -.sym 5780 lvds_rx_24_inst.r_push_SB_LUT4_I3_O -.sym 5795 rx_24_fifo.wr_addr[0] -.sym 5797 rx_24_fifo.wr_addr_gray_SB_DFFESR_Q_6_D[1] -.sym 5798 rx_24_fifo.wr_addr_gray_SB_DFFESR_Q_6_D[2] -.sym 5800 rx_24_fifo.rd_addr_gray_wr_r[2] -.sym 5802 lvds_rx_24_inst.r_state_if_SB_LUT4_I2_O[0] -.sym 5803 lvds_rx_24_inst.r_push_SB_LUT4_I0_1_I1_SB_LUT4_O_1_I3[0] -.sym 5804 w_rx_24_fifo_push -.sym 5806 rx_24_fifo.rd_addr_gray_wr_r[0] -.sym 5808 rx_24_fifo.wr_addr_gray_SB_DFFESR_Q_7_D[1] -.sym 5809 rx_24_fifo.wr_addr_gray_SB_DFFESR_Q_7_D[2] -.sym 5810 rx_24_fifo.full_o_SB_DFFSR_Q_D_SB_LUT4_O_I1_SB_LUT4_O_I0[1] -.sym 5812 lvds_rx_24_inst.r_phase_count_SB_LUT4_I1_O[0] -.sym 5813 rx_24_fifo.full_o_SB_LUT4_I0_O[3] -.sym 5814 rx_24_fifo.full_o_SB_LUT4_I0_O[2] -.sym 5821 rx_24_fifo.full_o_SB_LUT4_I0_O[1] -.sym 5822 lvds_rx_24_inst.r_push_SB_DFFNESR_Q_E_SB_LUT4_O_I1_SB_LUT4_I0_O_SB_DFFNESR_D_E -.sym 5823 i_smi_a1_SB_LUT4_I1_O_SB_LUT4_O_I2_SB_LUT4_I0_O[2] -.sym 5834 lvds_rx_24_inst.r_state_if_SB_LUT4_I2_O[0] -.sym 5836 lvds_rx_24_inst.r_phase_count_SB_LUT4_I1_O[0] -.sym 5840 rx_24_fifo.full_o_SB_DFFSR_Q_D_SB_LUT4_O_I1_SB_LUT4_O_I0[1] -.sym 5841 rx_24_fifo.rd_addr_gray_wr_r[2] -.sym 5842 rx_24_fifo.wr_addr_gray_SB_DFFESR_Q_6_D[1] -.sym 5843 rx_24_fifo.wr_addr_gray_SB_DFFESR_Q_6_D[2] -.sym 5846 lvds_rx_24_inst.r_push_SB_LUT4_I0_1_I1_SB_LUT4_O_1_I3[0] -.sym 5847 rx_24_fifo.wr_addr_gray_SB_DFFESR_Q_7_D[1] -.sym 5848 rx_24_fifo.wr_addr_gray_SB_DFFESR_Q_7_D[2] -.sym 5849 rx_24_fifo.rd_addr_gray_wr_r[0] -.sym 5852 rx_24_fifo.full_o_SB_LUT4_I0_O[3] -.sym 5853 rx_24_fifo.full_o_SB_LUT4_I0_O[1] -.sym 5854 w_rx_24_fifo_push -.sym 5855 rx_24_fifo.full_o_SB_LUT4_I0_O[2] -.sym 5859 w_rx_24_fifo_push -.sym 5860 i_smi_a1_SB_LUT4_I1_O_SB_LUT4_O_I2_SB_LUT4_I0_O[2] -.sym 5864 rx_24_fifo.rd_addr_gray_wr_r[0] -.sym 5866 rx_24_fifo.wr_addr[0] -.sym 5874 lvds_rx_24_inst.r_push_SB_DFFNESR_Q_E_SB_LUT4_O_I1_SB_LUT4_I0_O_SB_DFFNESR_D_E +.sym 5777 rx_24_fifo.rd_addr_gray_wr_r[0] +.sym 5780 lvds_rx_09_inst.r_phase_count_SB_LUT4_I1_O_SB_DFFNESR_Q_E +.sym 5781 w_rx_24_fifo_push +.sym 5785 rx_24_fifo.wr_addr_gray_SB_LUT4_I2_O[3] +.sym 5796 rx_24_fifo.rd_addr_gray_wr[1] +.sym 5810 rx_24_fifo.rd_addr_gray[5] +.sym 5830 rx_24_fifo.rd_addr_gray[5] +.sym 5865 rx_24_fifo.rd_addr_gray_wr[1] .sym 5875 lvds_clock_buf -.sym 5876 i_smi_a1_SB_LUT4_I1_O_SB_LUT4_O_I2_SB_LUT4_I0_O[2]_$glb_sr -.sym 5889 rx_24_fifo.wr_addr[0] -.sym 5891 lvds_rx_24_inst.r_push_SB_LUT4_I3_O -.sym 5920 rx_24_fifo.rd_addr_gray_wr[5] -.sym 5923 rx_24_fifo.rd_addr_gray_wr[0] -.sym 5926 rx_24_fifo.rd_addr_gray_wr[1] -.sym 5965 rx_24_fifo.rd_addr_gray_wr[5] -.sym 5969 rx_24_fifo.rd_addr_gray_wr[0] -.sym 5995 rx_24_fifo.rd_addr_gray_wr[1] +.sym 5890 rx_24_fifo.rd_addr_gray_wr[4] +.sym 5894 rx_24_fifo.rd_addr_gray_wr_r[2] +.sym 5895 w_rx_09_fifo_push +.sym 5898 rx_24_fifo.rd_addr_gray_wr[6] +.sym 5900 rx_24_fifo.rd_addr_gray_wr[1] +.sym 5909 lvds_rx_24_inst.r_push_SB_DFFNESR_Q_E +.sym 5919 w_lvds_rx_24_d1_SB_LUT4_I0_O[0] +.sym 5920 lvds_rx_24_inst.r_push_SB_DFFNESR_Q_E +.sym 5922 w_lvds_rx_24_d1_SB_LUT4_I0_O[1] +.sym 5924 w_lvds_rx_24_d1_SB_LUT4_I0_O_SB_LUT4_O_I2[3] +.sym 5927 i_smi_a1_SB_LUT4_I1_O[3] +.sym 5928 w_lvds_rx_24_d1_SB_LUT4_I0_O_SB_LUT4_O_I2_SB_LUT4_I0_O[0] +.sym 5930 w_lvds_rx_24_d1_SB_LUT4_I0_O_SB_LUT4_O_I2[0] +.sym 5932 w_rx_24_fifo_full +.sym 5951 i_smi_a1_SB_LUT4_I1_O[3] +.sym 5953 w_lvds_rx_24_d1_SB_LUT4_I0_O_SB_LUT4_O_I2[3] +.sym 5954 w_lvds_rx_24_d1_SB_LUT4_I0_O_SB_LUT4_O_I2_SB_LUT4_I0_O[0] +.sym 5963 i_smi_a1_SB_LUT4_I1_O[3] +.sym 5964 w_lvds_rx_24_d1_SB_LUT4_I0_O_SB_LUT4_O_I2[0] +.sym 5965 w_lvds_rx_24_d1_SB_LUT4_I0_O_SB_LUT4_O_I2[3] +.sym 5975 w_lvds_rx_24_d1_SB_LUT4_I0_O_SB_LUT4_O_I2[3] +.sym 5976 w_lvds_rx_24_d1_SB_LUT4_I0_O_SB_LUT4_O_I2[0] +.sym 5982 w_lvds_rx_24_d1_SB_LUT4_I0_O_SB_LUT4_O_I2[3] +.sym 5983 w_lvds_rx_24_d1_SB_LUT4_I0_O_SB_LUT4_O_I2[0] +.sym 5987 i_smi_a1_SB_LUT4_I1_O[3] +.sym 5988 w_lvds_rx_24_d1_SB_LUT4_I0_O[0] +.sym 5989 w_lvds_rx_24_d1_SB_LUT4_I0_O[1] +.sym 5993 w_rx_24_fifo_full +.sym 5995 w_lvds_rx_24_d1_SB_LUT4_I0_O_SB_LUT4_O_I2[0] +.sym 5996 w_lvds_rx_24_d1_SB_LUT4_I0_O_SB_LUT4_O_I2[3] +.sym 5997 lvds_rx_24_inst.r_push_SB_DFFNESR_Q_E .sym 5998 lvds_clock_buf -.sym 6016 rx_24_fifo.rd_addr_gray_wr[5] -.sym 6022 rx_24_fifo.rd_addr_gray_wr[1] -.sym 6144 rx_24_fifo.rd_addr_gray_wr[0] +.sym 5999 i_smi_a1_SB_LUT4_I1_O[3]_$glb_sr +.sym 6021 lvds_rx_09_inst.r_state_if[0] +.sym 6045 lvds_rx_09_inst.r_state_if_SB_DFFNESR_Q_E_SB_LUT4_O_I2_SB_LUT4_O_I2[0] +.sym 6046 lvds_rx_09_inst.r_phase_count_SB_LUT4_I1_O[0] +.sym 6049 i_smi_a1_SB_LUT4_I1_O[3] +.sym 6051 lvds_rx_09_inst.r_state_if[0] +.sym 6052 lvds_rx_09_inst.r_state_if[1] +.sym 6053 w_lvds_rx_24_d1_SB_LUT4_I0_O_SB_LUT4_O_I2_SB_LUT4_I0_O[1] +.sym 6054 lvds_rx_24_inst.r_state_if_SB_LUT4_I2_O[0] +.sym 6068 lvds_rx_24_inst.r_state_if_SB_DFFNESR_Q_E +.sym 6074 lvds_rx_09_inst.r_state_if[1] +.sym 6075 lvds_rx_09_inst.r_phase_count_SB_LUT4_I1_O[0] +.sym 6076 lvds_rx_09_inst.r_state_if_SB_DFFNESR_Q_E_SB_LUT4_O_I2_SB_LUT4_O_I2[0] +.sym 6080 i_smi_a1_SB_LUT4_I1_O[3] +.sym 6081 lvds_rx_09_inst.r_state_if[1] +.sym 6082 lvds_rx_09_inst.r_state_if[0] +.sym 6099 w_lvds_rx_24_d1_SB_LUT4_I0_O_SB_LUT4_O_I2_SB_LUT4_I0_O[1] +.sym 6112 lvds_rx_24_inst.r_state_if_SB_LUT4_I2_O[0] +.sym 6120 lvds_rx_24_inst.r_state_if_SB_DFFNESR_Q_E +.sym 6121 lvds_clock_buf +.sym 6122 i_smi_a1_SB_LUT4_I1_O[3]_$glb_sr +.sym 6137 lvds_rx_09_inst.r_state_if[0] +.sym 6139 lvds_rx_24_inst.r_push_SB_LUT4_I3_O .sym 6151 i_smi_a3$SB_IO_IN -.sym 6176 i_smi_a1$SB_IO_IN -.sym 6180 i_smi_a3$SB_IO_IN -.sym 6190 i_smi_a2$SB_IO_IN -.sym 6203 i_smi_a1$SB_IO_IN -.sym 6204 i_smi_a3$SB_IO_IN -.sym 6205 i_smi_a2$SB_IO_IN -.sym 6210 i_smi_a2$SB_IO_IN -.sym 6211 i_smi_a3$SB_IO_IN -.sym 6212 i_smi_a1$SB_IO_IN +.sym 6164 lvds_rx_09_inst.r_state_if_SB_DFFNESR_Q_E_SB_LUT4_O_I2_SB_LUT4_O_I2_SB_LUT4_I2_O[0] +.sym 6167 lvds_rx_09_inst.r_phase_count_SB_LUT4_O_1_I3[0] +.sym 6170 lvds_rx_09_inst.r_state_if_SB_LUT4_I2_O[0] +.sym 6171 lvds_rx_09_inst.r_phase_count_SB_LUT4_O_1_I3[1] +.sym 6173 lvds_rx_09_inst.r_phase_count[0] +.sym 6181 lvds_rx_09_inst.r_phase_count_SB_LUT4_I1_O[1] +.sym 6183 lvds_rx_09_inst.r_state_if_SB_DFFNESR_Q_E_SB_LUT4_O_I2_SB_LUT4_O_I2_SB_LUT4_I2_O[3] +.sym 6184 lvds_rx_09_inst.r_state_if_SB_DFFNESR_Q_E_SB_LUT4_O_I2_SB_LUT4_O_I2_SB_LUT4_I2_O[1] +.sym 6186 lvds_rx_09_inst.r_phase_count[1] +.sym 6190 lvds_rx_09_inst.r_phase_count_SB_LUT4_I1_O[2] +.sym 6191 lvds_rx_09_inst.r_phase_count_SB_LUT4_I1_O_SB_DFFNESR_Q_E +.sym 6192 $PACKER_VCC_NET +.sym 6193 lvds_rx_09_inst.r_phase_count_SB_LUT4_I1_O[0] +.sym 6195 $PACKER_VCC_NET +.sym 6196 $nextpnr_ICESTORM_LC_2$O +.sym 6199 lvds_rx_09_inst.r_phase_count[0] +.sym 6202 lvds_rx_09_inst.r_phase_count_SB_CARRY_CI_CO[2] +.sym 6204 lvds_rx_09_inst.r_phase_count[1] +.sym 6205 $PACKER_VCC_NET +.sym 6206 lvds_rx_09_inst.r_phase_count[0] +.sym 6210 lvds_rx_09_inst.r_phase_count_SB_LUT4_O_1_I3[1] +.sym 6211 $PACKER_VCC_NET +.sym 6212 lvds_rx_09_inst.r_phase_count_SB_CARRY_CI_CO[2] +.sym 6215 lvds_rx_09_inst.r_state_if_SB_DFFNESR_Q_E_SB_LUT4_O_I2_SB_LUT4_O_I2_SB_LUT4_I2_O[3] +.sym 6216 lvds_rx_09_inst.r_state_if_SB_DFFNESR_Q_E_SB_LUT4_O_I2_SB_LUT4_O_I2_SB_LUT4_I2_O[0] +.sym 6217 lvds_rx_09_inst.r_phase_count_SB_LUT4_I1_O[1] +.sym 6218 lvds_rx_09_inst.r_state_if_SB_DFFNESR_Q_E_SB_LUT4_O_I2_SB_LUT4_O_I2_SB_LUT4_I2_O[1] +.sym 6222 lvds_rx_09_inst.r_phase_count_SB_LUT4_O_1_I3[1] +.sym 6224 lvds_rx_09_inst.r_phase_count_SB_LUT4_O_1_I3[0] +.sym 6228 lvds_rx_09_inst.r_phase_count_SB_LUT4_I1_O[0] +.sym 6230 lvds_rx_09_inst.r_state_if_SB_LUT4_I2_O[0] +.sym 6234 lvds_rx_09_inst.r_phase_count_SB_LUT4_O_1_I3[0] +.sym 6239 lvds_rx_09_inst.r_phase_count_SB_LUT4_I1_O[2] +.sym 6240 lvds_rx_09_inst.r_state_if_SB_DFFNESR_Q_E_SB_LUT4_O_I2_SB_LUT4_O_I2_SB_LUT4_I2_O[0] +.sym 6241 lvds_rx_09_inst.r_state_if_SB_DFFNESR_Q_E_SB_LUT4_O_I2_SB_LUT4_O_I2_SB_LUT4_I2_O[3] +.sym 6242 lvds_rx_09_inst.r_state_if_SB_DFFNESR_Q_E_SB_LUT4_O_I2_SB_LUT4_O_I2_SB_LUT4_I2_O[1] +.sym 6243 lvds_rx_09_inst.r_phase_count_SB_LUT4_I1_O_SB_DFFNESR_Q_E +.sym 6244 lvds_clock_buf +.sym 6245 i_smi_a1_SB_LUT4_I1_O[3]_$glb_sr .sym 6246 i_smi_a3$SB_IO_IN -.sym 6260 w_lvds_rx_24_d1_SB_LUT4_I0_O[1] +.sym 6257 o_shdn_tx_lna$SB_IO_OUT +.sym 6260 rx_24_fifo.rd_addr_gray_wr_r[0] +.sym 6261 w_lvds_rx_24_d1_SB_LUT4_I0_O[0] +.sym 6273 lvds_rx_09_inst.r_phase_count_SB_LUT4_I1_O_SB_DFFNESR_Q_E +.sym 6274 $PACKER_VCC_NET +.sym 6277 $PACKER_VCC_NET +.sym 6282 o_shdn_tx_lna$SB_IO_OUT .sym 6294 o_shdn_tx_lna$SB_IO_OUT -.sym 6312 o_shdn_tx_lna$SB_IO_OUT -.sym 6316 i_smi_a1$SB_IO_IN -.sym 6346 lvds_rx_09_inst.o_fifo_data[8] -.sym 6347 lvds_rx_09_inst.o_fifo_data[16] -.sym 6348 lvds_rx_09_inst.o_fifo_data[12] -.sym 6349 lvds_rx_09_inst.o_fifo_data[14] -.sym 6350 smi_ctrl_ins.o_smi_data_out_SB_DFFE_Q_D_SB_LUT4_O_I2[1] -.sym 6351 smi_ctrl_ins.o_smi_data_out_SB_DFFE_Q_7_D_SB_LUT4_O_I0[1] -.sym 6352 smi_ctrl_ins.o_smi_data_out_SB_DFFE_Q_D_SB_LUT4_O_I2_SB_LUT4_O_I3[3] -.sym 6353 lvds_rx_09_inst.o_fifo_data[10] -.sym 6372 w_rx_09_fifo_data[1] -.sym 6379 io_smi_data[6]$SB_IO_OUT -.sym 6380 io_pmod[7]$SB_IO_IN -.sym 6386 lvds_rx_09_inst.o_fifo_data[7] -.sym 6390 w_rx_09_fifo_push -.sym 6391 rx_09_fifo.wr_addr[7] -.sym 6394 io_pmod[6]$SB_IO_IN -.sym 6396 $PACKER_VCC_NET -.sym 6397 $PACKER_VCC_NET -.sym 6398 io_pmod[4]$SB_IO_IN -.sym 6399 io_pmod[7]$SB_IO_IN -.sym 6400 lvds_rx_09_inst.o_fifo_data[6] -.sym 6401 rx_09_fifo.wr_addr[0] +.sym 6308 o_shdn_tx_lna$SB_IO_OUT +.sym 6346 rx_09_fifo.wr_addr_gray_rd_r[0] +.sym 6347 rx_09_fifo.rd_addr_gray_SB_DFFESR_Q_2_D_SB_LUT4_I3_O_SB_LUT4_O_I1[1] +.sym 6349 rx_09_fifo.rd_addr_gray_SB_DFFESR_Q_2_D_SB_LUT4_I3_O_SB_LUT4_O_2_I0[0] +.sym 6350 rx_09_fifo.rd_addr_gray_SB_DFFESR_Q_2_D_SB_LUT4_I3_O_SB_LUT4_O_I1_SB_LUT4_O_1_I0[0] +.sym 6352 rx_09_fifo.rd_addr_gray_SB_DFFESR_Q_3_D[1] +.sym 6353 rx_09_fifo.rd_addr_gray_SB_DFFESR_Q_2_D_SB_LUT4_I3_O_SB_LUT4_O_I1_SB_LUT4_O_I2[2] +.sym 6378 i_smi_a3$SB_IO_IN +.sym 6386 rx_09_fifo.wr_addr[6] +.sym 6387 lvds_rx_09_inst.o_fifo_data[22] +.sym 6389 rx_09_fifo.wr_addr[7] +.sym 6391 rx_09_fifo.wr_addr[3] +.sym 6392 rx_09_fifo.wr_addr[0] +.sym 6393 $PACKER_VCC_NET +.sym 6395 lvds_rx_09_inst.o_fifo_data[19] +.sym 6396 lvds_rx_09_inst.o_fifo_data[18] +.sym 6397 lvds_rx_09_inst.o_fifo_data[21] +.sym 6398 lvds_rx_09_inst.o_fifo_data[20] +.sym 6399 lvds_rx_09_inst.o_fifo_data[23] +.sym 6400 lvds_rx_09_inst.r_push_SB_LUT4_I3_O_SB_LUT4_O_1_I0[3] +.sym 6401 $PACKER_VCC_NET .sym 6403 rx_09_fifo.wr_addr[5] -.sym 6405 w_rx_09_fifo_data[0] -.sym 6406 w_rx_09_fifo_data[1] -.sym 6408 rx_09_fifo.wr_addr[6] -.sym 6411 rx_09_fifo.wr_addr[2] -.sym 6412 rx_09_fifo.full_o_SB_DFFSR_Q_D_SB_LUT4_O_I1_SB_LUT4_O_I0_SB_LUT4_O_1_I3[1] -.sym 6413 io_pmod[5]$SB_IO_IN -.sym 6415 rx_09_fifo.wr_addr[4] -.sym 6416 rx_09_fifo.wr_addr[3] -.sym 6422 smi_ctrl_ins.o_smi_data_out_SB_DFFE_Q_5_D_SB_LUT4_O_I1_SB_LUT4_O_I3[3] -.sym 6423 smi_ctrl_ins.o_smi_data_out_SB_DFFE_Q_5_D_SB_LUT4_O_I1[1] -.sym 6424 smi_ctrl_ins.o_smi_data_out_SB_DFFE_Q_1_D_SB_LUT4_O_I1[1] -.sym 6425 smi_ctrl_ins.o_smi_data_out_SB_DFFE_Q_D_SB_LUT4_O_I1_SB_LUT4_O_I3[3] -.sym 6426 smi_ctrl_ins.o_smi_data_out_SB_DFFE_Q_D_SB_LUT4_O_I1[1] -.sym 6427 smi_ctrl_ins.o_smi_data_out_SB_DFFE_Q_1_D_SB_LUT4_O_I1_SB_LUT4_O_I3[3] -.sym 6428 smi_ctrl_ins.o_smi_data_out_SB_DFFE_Q_2_D_SB_LUT4_O_I1[1] -.sym 6429 smi_ctrl_ins.o_smi_data_out_SB_DFFE_Q_2_D_SB_LUT4_O_I1_SB_LUT4_O_I3[3] +.sym 6404 $PACKER_VCC_NET +.sym 6406 w_rx_09_fifo_push +.sym 6407 lvds_rx_09_inst.o_fifo_data[16] +.sym 6408 rx_09_fifo.wr_addr[4] +.sym 6413 lvds_rx_09_inst.o_fifo_data[17] +.sym 6415 rx_09_fifo.wr_addr[2] +.sym 6422 rx_09_fifo.rd_addr_gray[2] +.sym 6423 rx_09_fifo.rd_addr_gray_SB_DFFESR_Q_2_D_SB_LUT4_I3_O_SB_LUT4_O_I1[2] +.sym 6424 smi_ctrl_ins.o_smi_data_out_SB_DFFE_Q_6_D_SB_LUT4_O_I1_SB_LUT4_O_I3[3] +.sym 6425 rx_09_fifo.rd_addr_gray_SB_DFFESR_Q_2_D_SB_LUT4_I3_O_SB_LUT4_O_I1[0] +.sym 6426 rx_09_fifo.rd_addr_gray[4] +.sym 6427 rx_09_fifo.rd_addr_gray_SB_DFFESR_Q_2_D_SB_LUT4_I3_O[2] +.sym 6428 rx_09_fifo.rd_addr_gray[3] +.sym 6429 smi_ctrl_ins.o_smi_data_out_SB_DFFE_Q_6_D_SB_LUT4_O_I1[1] .sym 6430 $PACKER_VCC_NET .sym 6431 $PACKER_VCC_NET .sym 6432 $PACKER_VCC_NET @@ -6177,7 +5896,7 @@ .sym 6436 $PACKER_VCC_NET .sym 6437 $PACKER_VCC_NET .sym 6438 rx_09_fifo.wr_addr[0] -.sym 6439 rx_09_fifo.full_o_SB_DFFSR_Q_D_SB_LUT4_O_I1_SB_LUT4_O_I0_SB_LUT4_O_1_I3[1] +.sym 6439 lvds_rx_09_inst.r_push_SB_LUT4_I3_O_SB_LUT4_O_1_I0[3] .sym 6441 rx_09_fifo.wr_addr[2] .sym 6442 rx_09_fifo.wr_addr[3] .sym 6443 rx_09_fifo.wr_addr[4] @@ -6186,66 +5905,71 @@ .sym 6446 rx_09_fifo.wr_addr[7] .sym 6449 lvds_clock_buf .sym 6450 $PACKER_VCC_NET -.sym 6451 w_rx_09_fifo_data[0] -.sym 6452 w_rx_09_fifo_data[1] -.sym 6453 io_pmod[4]$SB_IO_IN -.sym 6454 io_pmod[5]$SB_IO_IN -.sym 6455 io_pmod[6]$SB_IO_IN -.sym 6456 io_pmod[7]$SB_IO_IN -.sym 6457 lvds_rx_09_inst.o_fifo_data[6] -.sym 6458 lvds_rx_09_inst.o_fifo_data[7] +.sym 6451 lvds_rx_09_inst.o_fifo_data[16] +.sym 6452 lvds_rx_09_inst.o_fifo_data[17] +.sym 6453 lvds_rx_09_inst.o_fifo_data[18] +.sym 6454 lvds_rx_09_inst.o_fifo_data[19] +.sym 6455 lvds_rx_09_inst.o_fifo_data[20] +.sym 6456 lvds_rx_09_inst.o_fifo_data[21] +.sym 6457 lvds_rx_09_inst.o_fifo_data[22] +.sym 6458 lvds_rx_09_inst.o_fifo_data[23] .sym 6459 w_rx_09_fifo_push .sym 6460 i_smi_a3$SB_IO_IN .sym 6463 i_smi_a3$SB_IO_IN -.sym 6464 lvds_rx_09_inst.o_fifo_data[7] -.sym 6473 lvds_rx_09_inst.o_fifo_data[16] -.sym 6474 io_pmod[6]$SB_IO_IN -.sym 6477 w_rx_09_fifo_pulled_data[27] -.sym 6487 io_pmod[5]$SB_IO_IN -.sym 6488 $PACKER_VCC_NET -.sym 6490 w_rx_09_fifo_pulled_data[2] -.sym 6492 smi_ctrl_ins.int_cnt_09[3] -.sym 6494 w_rx_09_fifo_pulled_data[31] -.sym 6496 w_rx_09_fifo_pulled_data[26] -.sym 6497 io_pmod_SB_DFFSS_Q_D_SB_LUT4_O_I0_SB_LUT4_O_I2[1] -.sym 6499 $PACKER_VCC_NET -.sym 6500 $PACKER_VCC_NET -.sym 6501 w_rx_09_fifo_pulled_data[19] -.sym 6505 $PACKER_VCC_NET -.sym 6506 w_rx_09_fifo_pulled_data[24] -.sym 6507 rx_09_fifo.wr_addr[3] -.sym 6512 rx_09_fifo.rd_addr[3] -.sym 6513 io_pmod_SB_DFFSS_Q_D_SB_LUT4_O_I0_SB_LUT4_O_2_I0[2] -.sym 6517 w_rx_09_fifo_pulled_data[29] -.sym 6518 rx_09_fifo.wr_addr[0] -.sym 6528 rx_09_fifo.rd_addr[0] -.sym 6529 io_pmod_SB_DFFSS_Q_D_SB_LUT4_O_I0_SB_LUT4_O_I0[1] -.sym 6530 lvds_rx_09_inst.o_fifo_data[13] -.sym 6531 lvds_rx_09_inst.o_fifo_data[14] -.sym 6532 $PACKER_VCC_NET -.sym 6533 rx_09_fifo.rd_addr[3] -.sym 6534 io_pmod_SB_DFFSS_Q_D_SB_LUT4_O_I0_SB_LUT4_O_3_I2[3] -.sym 6535 lvds_rx_09_inst.o_fifo_data[10] -.sym 6536 lvds_rx_09_inst.o_fifo_data[8] -.sym 6537 io_pmod_SB_DFFSS_Q_D_SB_LUT4_O_I0_SB_LUT4_O_2_I0[2] -.sym 6538 lvds_rx_09_inst.o_fifo_data[12] -.sym 6539 lvds_rx_09_inst.o_fifo_data[15] -.sym 6540 io_pmod_SB_DFFSS_Q_D_SB_LUT4_O_I0_SB_LUT4_O_2_I0[3] -.sym 6541 lvds_rx_09_inst.o_fifo_data[9] -.sym 6542 io_pmod_SB_DFFSS_Q_D_SB_LUT4_O_I0_SB_LUT4_O_3_I2[1] -.sym 6550 lvds_rx_09_inst.o_fifo_data[11] -.sym 6553 io_pmod_SB_DFFSS_Q_D_SB_LUT4_O_I0_SB_LUT4_O_I2[1] -.sym 6555 $PACKER_VCC_NET +.sym 6465 lvds_rx_09_inst.o_fifo_data[19] +.sym 6471 lvds_rx_09_inst.o_fifo_data[31] +.sym 6475 lvds_rx_09_inst.o_fifo_data[22] +.sym 6478 $PACKER_VCC_NET +.sym 6480 w_rx_09_fifo_push +.sym 6481 lvds_rx_09_inst.o_fifo_data[16] +.sym 6483 rx_09_fifo.rd_addr[0] +.sym 6487 lvds_rx_09_inst.o_fifo_data[17] +.sym 6489 lvds_rx_09_inst.o_fifo_data[26] +.sym 6490 rx_09_fifo.rd_addr[6] +.sym 6493 rx_09_fifo.rd_addr_gray_SB_DFFESR_Q_2_D_SB_LUT4_I3_O_SB_LUT4_O_2_I0[2] +.sym 6494 w_rx_09_fifo_pulled_data[20] +.sym 6495 i_smi_a2_SB_LUT4_I1_O_SB_LUT4_I3_I2_SB_LUT4_O_I3[1] +.sym 6496 w_rx_09_fifo_pulled_data[21] +.sym 6497 w_rx_09_fifo_pulled_data[24] +.sym 6501 w_rx_09_fifo_pulled_data[23] +.sym 6503 w_rx_09_fifo_pulled_data[16] +.sym 6506 w_rx_09_fifo_push +.sym 6507 w_rx_09_fifo_pulled_data[18] +.sym 6508 i_smi_a2_SB_LUT4_I1_O_SB_LUT4_I3_I2[1] +.sym 6510 lvds_rx_09_inst.o_fifo_data[20] +.sym 6511 w_rx_09_fifo_pulled_data[30] +.sym 6513 io_pmod[4]$SB_IO_IN +.sym 6514 $PACKER_VCC_NET +.sym 6515 rx_09_fifo.wr_addr[5] +.sym 6518 $PACKER_VCC_NET +.sym 6528 rx_09_fifo.rd_addr[4] +.sym 6529 lvds_rx_09_inst.o_fifo_data[24] +.sym 6530 lvds_rx_09_inst.o_fifo_data[27] +.sym 6531 lvds_rx_09_inst.o_fifo_data[30] +.sym 6533 rx_09_fifo.rd_addr[5] +.sym 6534 lvds_rx_09_inst.o_fifo_data[25] +.sym 6535 lvds_rx_09_inst.o_fifo_data[28] +.sym 6538 rx_09_fifo.rd_addr[3] +.sym 6539 rx_09_fifo.rd_addr[2] +.sym 6540 rx_09_fifo.rd_addr[7] +.sym 6541 lvds_rx_09_inst.o_fifo_data[29] +.sym 6542 rx_09_fifo.rd_addr[1] +.sym 6543 rx_09_fifo.rd_addr[0] +.sym 6544 rx_09_fifo.rd_addr[6] +.sym 6545 lvds_rx_09_inst.o_fifo_data[26] +.sym 6546 $PACKER_VCC_NET +.sym 6548 $PACKER_VCC_NET +.sym 6550 lvds_rx_09_inst.o_fifo_data[31] +.sym 6554 $PACKER_VCC_NET .sym 6557 w_rx_09_fifo_pull -.sym 6558 $PACKER_VCC_NET -.sym 6560 lvds_rx_09_inst.o_fifo_data[23] -.sym 6561 lvds_rx_09_inst.o_fifo_data[25] -.sym 6562 lvds_rx_09_inst.o_fifo_data[30] -.sym 6563 lvds_rx_09_inst.o_fifo_data[31] -.sym 6564 lvds_rx_09_inst.o_fifo_data[20] -.sym 6565 lvds_rx_09_inst.o_fifo_data[29] -.sym 6566 lvds_rx_09_inst.o_fifo_data[27] -.sym 6567 lvds_rx_09_inst.o_fifo_data[18] +.sym 6560 rx_09_fifo.rd_addr_gray_SB_DFFESR_Q_2_D_SB_LUT4_I3_O_SB_LUT4_O_2_I0[2] +.sym 6561 smi_ctrl_ins.o_smi_data_out_SB_DFFE_Q_D_SB_LUT4_O_I2_SB_LUT4_O_I3[3] +.sym 6562 smi_ctrl_ins.o_smi_data_out_SB_DFFE_Q_D_SB_LUT4_O_I1_SB_LUT4_O_I3[3] +.sym 6563 smi_ctrl_ins.o_smi_data_out_SB_DFFE_Q_4_D_SB_LUT4_O_I1_SB_LUT4_O_I3[3] +.sym 6564 smi_ctrl_ins.o_smi_data_out_SB_DFFE_Q_3_D_SB_LUT4_O_I1_SB_LUT4_O_I3[3] +.sym 6565 smi_ctrl_ins.o_smi_data_out_SB_DFFE_Q_2_D_SB_LUT4_O_I1_SB_LUT4_O_I3[3] +.sym 6566 rx_09_fifo.rd_addr_gray_SB_DFFESR_Q_2_D_SB_LUT4_I3_O_SB_LUT4_O_I1_SB_LUT4_O_I2[0] +.sym 6567 smi_ctrl_ins.o_smi_data_out_SB_DFFE_Q_2_D_SB_LUT4_O_I1[1] .sym 6568 $PACKER_VCC_NET .sym 6569 $PACKER_VCC_NET .sym 6570 $PACKER_VCC_NET @@ -6255,60 +5979,69 @@ .sym 6574 $PACKER_VCC_NET .sym 6575 $PACKER_VCC_NET .sym 6576 rx_09_fifo.rd_addr[0] -.sym 6577 io_pmod_SB_DFFSS_Q_D_SB_LUT4_O_I0_SB_LUT4_O_3_I2[1] -.sym 6579 io_pmod_SB_DFFSS_Q_D_SB_LUT4_O_I0_SB_LUT4_O_3_I2[3] +.sym 6577 rx_09_fifo.rd_addr[1] +.sym 6579 rx_09_fifo.rd_addr[2] .sym 6580 rx_09_fifo.rd_addr[3] -.sym 6581 io_pmod_SB_DFFSS_Q_D_SB_LUT4_O_I0_SB_LUT4_O_2_I0[2] -.sym 6582 io_pmod_SB_DFFSS_Q_D_SB_LUT4_O_I0_SB_LUT4_O_2_I0[3] -.sym 6583 io_pmod_SB_DFFSS_Q_D_SB_LUT4_O_I0_SB_LUT4_O_I2[1] -.sym 6584 io_pmod_SB_DFFSS_Q_D_SB_LUT4_O_I0_SB_LUT4_O_I0[1] +.sym 6581 rx_09_fifo.rd_addr[4] +.sym 6582 rx_09_fifo.rd_addr[5] +.sym 6583 rx_09_fifo.rd_addr[6] +.sym 6584 rx_09_fifo.rd_addr[7] .sym 6587 r_counter[0]_$glb_clk .sym 6588 $PACKER_VCC_NET .sym 6589 w_rx_09_fifo_pull -.sym 6590 lvds_rx_09_inst.o_fifo_data[10] -.sym 6591 lvds_rx_09_inst.o_fifo_data[11] -.sym 6592 lvds_rx_09_inst.o_fifo_data[12] -.sym 6593 lvds_rx_09_inst.o_fifo_data[13] -.sym 6594 lvds_rx_09_inst.o_fifo_data[14] -.sym 6595 lvds_rx_09_inst.o_fifo_data[15] -.sym 6596 lvds_rx_09_inst.o_fifo_data[8] -.sym 6597 lvds_rx_09_inst.o_fifo_data[9] -.sym 6602 i_smi_a3$SB_IO_IN -.sym 6604 smi_ctrl_ins.int_cnt_09[3] -.sym 6607 rx_09_fifo.wr_addr[7] -.sym 6608 smi_ctrl_ins.int_cnt_09[3] -.sym 6610 smi_ctrl_ins.int_cnt_09[3] -.sym 6612 io_pmod_SB_DFFSS_Q_D_SB_LUT4_O_I0_SB_LUT4_O_I0[1] -.sym 6617 $PACKER_VCC_NET -.sym 6620 rx_24_fifo.wr_addr[0] -.sym 6621 $PACKER_VCC_NET -.sym 6622 rx_09_fifo.rd_addr_gray_wr[0] -.sym 6623 w_rx_09_fifo_pull -.sym 6624 rx_24_fifo.wr_addr[5] -.sym 6625 w_rx_09_fifo_pulled_data[27] -.sym 6630 lvds_rx_09_inst.o_fifo_data[19] -.sym 6632 $PACKER_VCC_NET -.sym 6633 rx_09_fifo.wr_addr[5] -.sym 6634 lvds_rx_09_inst.o_fifo_data[21] -.sym 6635 rx_09_fifo.wr_addr[7] -.sym 6636 lvds_rx_09_inst.o_fifo_data[17] -.sym 6639 rx_09_fifo.wr_addr[2] -.sym 6640 rx_09_fifo.full_o_SB_DFFSR_Q_D_SB_LUT4_O_I1_SB_LUT4_O_I0_SB_LUT4_O_1_I3[1] -.sym 6641 rx_09_fifo.wr_addr[6] -.sym 6642 $PACKER_VCC_NET -.sym 6643 w_rx_09_fifo_push -.sym 6644 lvds_rx_09_inst.o_fifo_data[22] -.sym 6645 rx_09_fifo.wr_addr[4] -.sym 6646 lvds_rx_09_inst.o_fifo_data[23] -.sym 6647 lvds_rx_09_inst.o_fifo_data[16] -.sym 6651 rx_09_fifo.wr_addr[3] -.sym 6653 lvds_rx_09_inst.o_fifo_data[18] -.sym 6658 lvds_rx_09_inst.o_fifo_data[20] -.sym 6661 rx_09_fifo.wr_addr[0] -.sym 6664 smi_ctrl_ins.int_cnt_09_SB_DFFESR_Q_D_SB_LUT4_O_I3[2] -.sym 6665 rx_09_fifo.rd_addr_gray_wr_r[0] -.sym 6667 rx_09_fifo.rd_addr_gray_wr[7] -.sym 6668 lvds_rx_09_inst.r_push_SB_LUT4_I3_O[0] +.sym 6590 lvds_rx_09_inst.o_fifo_data[26] +.sym 6591 lvds_rx_09_inst.o_fifo_data[27] +.sym 6592 lvds_rx_09_inst.o_fifo_data[28] +.sym 6593 lvds_rx_09_inst.o_fifo_data[29] +.sym 6594 lvds_rx_09_inst.o_fifo_data[30] +.sym 6595 lvds_rx_09_inst.o_fifo_data[31] +.sym 6596 lvds_rx_09_inst.o_fifo_data[24] +.sym 6597 lvds_rx_09_inst.o_fifo_data[25] +.sym 6605 rx_09_fifo.rd_addr[2] +.sym 6606 rx_09_fifo.rd_addr[3] +.sym 6609 rx_09_fifo.rd_addr[5] +.sym 6610 rx_09_fifo.rd_addr[1] +.sym 6611 rx_09_fifo.rd_addr[0] +.sym 6612 rx_09_fifo.rd_addr[4] +.sym 6613 lvds_rx_09_inst.o_fifo_data[24] +.sym 6614 $PACKER_VCC_NET +.sym 6615 w_rx_09_fifo_pulled_data[26] +.sym 6616 w_rx_09_fifo_pulled_data[19] +.sym 6617 w_rx_09_fifo_pulled_data[27] +.sym 6618 rx_09_fifo.rd_addr_gray[4] +.sym 6619 w_rx_09_fifo_pulled_data[28] +.sym 6620 $PACKER_VCC_NET +.sym 6621 w_rx_09_fifo_pulled_data[9] +.sym 6622 rx_09_fifo.rd_addr_gray[3] +.sym 6625 w_rx_09_fifo_pulled_data[31] +.sym 6633 lvds_rx_09_inst.o_fifo_data[6] +.sym 6634 io_pmod[7]$SB_IO_IN +.sym 6636 lvds_rx_09_inst.o_fifo_data[7] +.sym 6637 $PACKER_VCC_NET +.sym 6639 rx_09_fifo.wr_addr[0] +.sym 6640 lvds_rx_09_inst.r_push_SB_LUT4_I3_O_SB_LUT4_O_1_I0[3] +.sym 6643 w_rx_09_fifo_data[1] +.sym 6644 io_pmod[6]$SB_IO_IN +.sym 6645 rx_09_fifo.wr_addr[2] +.sym 6648 rx_09_fifo.wr_addr[6] +.sym 6649 w_rx_09_fifo_data[0] +.sym 6650 w_rx_09_fifo_push +.sym 6652 io_pmod[5]$SB_IO_IN +.sym 6653 rx_09_fifo.wr_addr[3] +.sym 6655 rx_09_fifo.wr_addr[4] +.sym 6656 io_pmod[4]$SB_IO_IN +.sym 6657 $PACKER_VCC_NET +.sym 6658 rx_09_fifo.wr_addr[5] +.sym 6660 rx_09_fifo.wr_addr[7] +.sym 6661 $PACKER_VCC_NET +.sym 6662 smi_ctrl_ins.o_smi_data_out_SB_DFFE_Q_4_D_SB_LUT4_O_I1[1] +.sym 6663 rx_09_fifo.rd_addr_gray_wr_r[0] +.sym 6664 smi_ctrl_ins.o_smi_data_out_SB_DFFE_Q_3_D_SB_LUT4_O_I1[1] +.sym 6665 smi_ctrl_ins.o_smi_data_out_SB_DFFE_Q_D_SB_LUT4_O_I2[1] +.sym 6666 rx_09_fifo.rd_addr_gray_wr[2] +.sym 6667 smi_ctrl_ins.o_smi_data_out_SB_DFFE_Q_D_SB_LUT4_O_I1[1] +.sym 6668 rx_09_fifo.rd_addr_gray_wr_r[2] +.sym 6669 rx_09_fifo.rd_addr_gray_wr[5] .sym 6670 $PACKER_VCC_NET .sym 6671 $PACKER_VCC_NET .sym 6672 $PACKER_VCC_NET @@ -6318,7 +6051,7 @@ .sym 6676 $PACKER_VCC_NET .sym 6677 $PACKER_VCC_NET .sym 6678 rx_09_fifo.wr_addr[0] -.sym 6679 rx_09_fifo.full_o_SB_DFFSR_Q_D_SB_LUT4_O_I1_SB_LUT4_O_I0_SB_LUT4_O_1_I3[1] +.sym 6679 lvds_rx_09_inst.r_push_SB_LUT4_I3_O_SB_LUT4_O_1_I0[3] .sym 6681 rx_09_fifo.wr_addr[2] .sym 6682 rx_09_fifo.wr_addr[3] .sym 6683 rx_09_fifo.wr_addr[4] @@ -6327,54 +6060,51 @@ .sym 6686 rx_09_fifo.wr_addr[7] .sym 6689 lvds_clock_buf .sym 6690 $PACKER_VCC_NET -.sym 6691 lvds_rx_09_inst.o_fifo_data[16] -.sym 6692 lvds_rx_09_inst.o_fifo_data[17] -.sym 6693 lvds_rx_09_inst.o_fifo_data[18] -.sym 6694 lvds_rx_09_inst.o_fifo_data[19] -.sym 6695 lvds_rx_09_inst.o_fifo_data[20] -.sym 6696 lvds_rx_09_inst.o_fifo_data[21] -.sym 6697 lvds_rx_09_inst.o_fifo_data[22] -.sym 6698 lvds_rx_09_inst.o_fifo_data[23] +.sym 6691 w_rx_09_fifo_data[0] +.sym 6692 w_rx_09_fifo_data[1] +.sym 6693 io_pmod[4]$SB_IO_IN +.sym 6694 io_pmod[5]$SB_IO_IN +.sym 6695 io_pmod[6]$SB_IO_IN +.sym 6696 io_pmod[7]$SB_IO_IN +.sym 6697 lvds_rx_09_inst.o_fifo_data[6] +.sym 6698 lvds_rx_09_inst.o_fifo_data[7] .sym 6699 w_rx_09_fifo_push -.sym 6703 w_rx_09_fifo_data[1] -.sym 6705 io_pmod_SB_DFFSS_Q_D_SB_LUT4_O_I0_SB_LUT4_O_2_I0[3] -.sym 6706 io_pmod_SB_DFFSS_Q_D_SB_LUT4_O_I0_SB_LUT4_O_3_I2[1] -.sym 6708 lvds_rx_09_inst.o_fifo_data[26] +.sym 6701 i_smi_a2_SB_LUT4_I1_O_SB_LUT4_I3_I2_SB_LUT4_O_I3[1] +.sym 6704 w_rx_09_fifo_pulled_data[0] +.sym 6706 w_rx_09_fifo_pulled_data[22] +.sym 6707 lvds_rx_09_inst.o_fifo_data[6] +.sym 6708 lvds_rx_09_inst.o_fifo_data[28] .sym 6709 i_smi_a3$SB_IO_IN -.sym 6710 $PACKER_VCC_NET -.sym 6711 io_pmod_SB_DFFSS_Q_D_SB_LUT4_O_I0_SB_LUT4_O_3_I2[1] -.sym 6712 io_pmod_SB_DFFSS_Q_D_SB_LUT4_O_I0_SB_LUT4_O_3_I2[3] -.sym 6715 $PACKER_VCC_NET -.sym 6717 rx_24_fifo.rd_addr[3] -.sym 6720 w_rx_09_fifo_pulled_data[30] -.sym 6721 smi_ctrl_ins.int_cnt_09[5] -.sym 6722 smi_ctrl_ins.int_cnt_09[3] -.sym 6724 smi_ctrl_ins.int_cnt_09[4] -.sym 6727 rx_24_fifo.rd_addr[2] -.sym 6732 io_pmod_SB_DFFSS_Q_D_SB_LUT4_O_I0_SB_LUT4_O_I2[1] -.sym 6733 lvds_rx_09_inst.o_fifo_data[24] -.sym 6734 io_pmod_SB_DFFSS_Q_D_SB_LUT4_O_I0_SB_LUT4_O_3_I2[3] -.sym 6735 io_pmod_SB_DFFSS_Q_D_SB_LUT4_O_I0_SB_LUT4_O_2_I0[3] -.sym 6736 rx_09_fifo.rd_addr[0] -.sym 6738 lvds_rx_09_inst.o_fifo_data[27] -.sym 6739 lvds_rx_09_inst.o_fifo_data[28] -.sym 6741 lvds_rx_09_inst.o_fifo_data[25] -.sym 6742 lvds_rx_09_inst.o_fifo_data[30] -.sym 6743 lvds_rx_09_inst.o_fifo_data[31] -.sym 6744 rx_09_fifo.rd_addr[3] -.sym 6745 lvds_rx_09_inst.o_fifo_data[29] -.sym 6746 io_pmod_SB_DFFSS_Q_D_SB_LUT4_O_I0_SB_LUT4_O_I0[1] -.sym 6747 io_pmod_SB_DFFSS_Q_D_SB_LUT4_O_I0_SB_LUT4_O_2_I0[2] -.sym 6752 w_rx_09_fifo_pull -.sym 6753 lvds_rx_09_inst.o_fifo_data[26] -.sym 6755 $PACKER_VCC_NET -.sym 6759 $PACKER_VCC_NET -.sym 6762 io_pmod_SB_DFFSS_Q_D_SB_LUT4_O_I0_SB_LUT4_O_3_I2[1] -.sym 6766 i_smi_a2_SB_LUT4_I1_O_SB_LUT4_O_I3_SB_LUT4_I0_I1[5] -.sym 6767 i_smi_a2_SB_LUT4_I1_O_SB_LUT4_O_I3_SB_CARRY_CO_I1[5] -.sym 6768 w_rx_09_fifo_pull -.sym 6770 i_smi_a2_SB_LUT4_I1_O_SB_LUT4_O_I3_SB_CARRY_CO_I1[4] -.sym 6771 rx_09_fifo.full_o_SB_DFFSR_Q_D_SB_LUT4_O_I1_SB_LUT4_O_I0_SB_LUT4_O_1_I3[3] +.sym 6712 io_pmod[6]$SB_IO_IN +.sym 6718 w_rx_09_fifo_pulled_data[13] +.sym 6719 rx_09_fifo.rd_addr[0] +.sym 6720 w_rx_09_fifo_push +.sym 6725 rx_09_fifo.rd_addr[6] +.sym 6727 rx_09_fifo.rd_addr_gray_wr_r[0] +.sym 6732 lvds_rx_09_inst.o_fifo_data[15] +.sym 6733 rx_09_fifo.rd_addr[5] +.sym 6734 rx_09_fifo.rd_addr[0] +.sym 6737 lvds_rx_09_inst.o_fifo_data[10] +.sym 6738 rx_09_fifo.rd_addr[2] +.sym 6739 lvds_rx_09_inst.o_fifo_data[8] +.sym 6741 lvds_rx_09_inst.o_fifo_data[9] +.sym 6742 rx_09_fifo.rd_addr[1] +.sym 6743 lvds_rx_09_inst.o_fifo_data[13] +.sym 6744 lvds_rx_09_inst.o_fifo_data[12] +.sym 6745 lvds_rx_09_inst.o_fifo_data[11] +.sym 6746 lvds_rx_09_inst.o_fifo_data[14] +.sym 6747 rx_09_fifo.rd_addr[4] +.sym 6748 rx_09_fifo.rd_addr[6] +.sym 6749 rx_09_fifo.rd_addr[7] +.sym 6750 $PACKER_VCC_NET +.sym 6752 $PACKER_VCC_NET +.sym 6756 rx_09_fifo.rd_addr[3] +.sym 6758 $PACKER_VCC_NET +.sym 6761 w_rx_09_fifo_pull +.sym 6764 lvds_rx_09_inst.r_push_SB_LUT4_I3_O_SB_LUT4_O_2_I0[0] +.sym 6767 rx_09_fifo.rd_addr_gray_wr[3] +.sym 6768 rx_09_fifo.rd_addr_gray_wr[4] +.sym 6770 io_smi_data[6]$SB_IO_OUT .sym 6772 $PACKER_VCC_NET .sym 6773 $PACKER_VCC_NET .sym 6774 $PACKER_VCC_NET @@ -6384,189 +6114,109 @@ .sym 6778 $PACKER_VCC_NET .sym 6779 $PACKER_VCC_NET .sym 6780 rx_09_fifo.rd_addr[0] -.sym 6781 io_pmod_SB_DFFSS_Q_D_SB_LUT4_O_I0_SB_LUT4_O_3_I2[1] -.sym 6783 io_pmod_SB_DFFSS_Q_D_SB_LUT4_O_I0_SB_LUT4_O_3_I2[3] +.sym 6781 rx_09_fifo.rd_addr[1] +.sym 6783 rx_09_fifo.rd_addr[2] .sym 6784 rx_09_fifo.rd_addr[3] -.sym 6785 io_pmod_SB_DFFSS_Q_D_SB_LUT4_O_I0_SB_LUT4_O_2_I0[2] -.sym 6786 io_pmod_SB_DFFSS_Q_D_SB_LUT4_O_I0_SB_LUT4_O_2_I0[3] -.sym 6787 io_pmod_SB_DFFSS_Q_D_SB_LUT4_O_I0_SB_LUT4_O_I2[1] -.sym 6788 io_pmod_SB_DFFSS_Q_D_SB_LUT4_O_I0_SB_LUT4_O_I0[1] +.sym 6785 rx_09_fifo.rd_addr[4] +.sym 6786 rx_09_fifo.rd_addr[5] +.sym 6787 rx_09_fifo.rd_addr[6] +.sym 6788 rx_09_fifo.rd_addr[7] .sym 6791 r_counter[0]_$glb_clk .sym 6792 $PACKER_VCC_NET .sym 6793 w_rx_09_fifo_pull -.sym 6794 lvds_rx_09_inst.o_fifo_data[26] -.sym 6795 lvds_rx_09_inst.o_fifo_data[27] -.sym 6796 lvds_rx_09_inst.o_fifo_data[28] -.sym 6797 lvds_rx_09_inst.o_fifo_data[29] -.sym 6798 lvds_rx_09_inst.o_fifo_data[30] -.sym 6799 lvds_rx_09_inst.o_fifo_data[31] -.sym 6800 lvds_rx_09_inst.o_fifo_data[24] -.sym 6801 lvds_rx_09_inst.o_fifo_data[25] -.sym 6806 rx_09_fifo.wr_addr[4] -.sym 6808 rx_09_fifo.wr_addr[3] -.sym 6809 i_smi_a1_SB_LUT4_I1_O_SB_LUT4_O_I2_SB_LUT4_I0_O[2] -.sym 6810 rx_09_fifo.full_o_SB_DFFSR_Q_D_SB_LUT4_O_I1_SB_LUT4_O_I0_SB_LUT4_O_1_I3[1] -.sym 6812 rx_09_fifo.wr_addr[2] -.sym 6814 rx_09_fifo.wr_addr[6] -.sym 6817 smi_ctrl_ins.int_cnt_09_SB_DFFESR_Q_D_SB_LUT4_O_I3[2] -.sym 6819 w_rx_09_fifo_pulled_data[26] -.sym 6822 $PACKER_VCC_NET -.sym 6823 w_rx_24_fifo_push -.sym 6825 $PACKER_VCC_NET -.sym 6829 w_rx_09_fifo_pulled_data[31] -.sym 6834 rx_24_fifo.wr_addr[6] -.sym 6838 w_rx_24_fifo_push -.sym 6839 rx_24_fifo.full_o_SB_DFFSR_Q_D_SB_LUT4_O_I1_SB_LUT4_O_I0[3] -.sym 6840 w_rx_24_fifo_data[3] -.sym 6842 w_rx_24_fifo_data[0] -.sym 6843 w_rx_24_fifo_data[1] -.sym 6848 $PACKER_VCC_NET -.sym 6849 rx_24_fifo.wr_addr[0] -.sym 6850 w_rx_24_fifo_data[7] -.sym 6851 w_rx_24_fifo_data[2] -.sym 6852 rx_24_fifo.wr_addr[2] -.sym 6853 rx_24_fifo.wr_addr[5] -.sym 6854 rx_24_fifo.wr_addr[4] -.sym 6855 rx_24_fifo.wr_addr[7] -.sym 6856 w_rx_24_fifo_data[5] -.sym 6857 w_rx_24_fifo_data[4] -.sym 6860 w_rx_24_fifo_data[6] -.sym 6861 $PACKER_VCC_NET -.sym 6864 rx_24_fifo.wr_addr[3] -.sym 6869 i_smi_a2_SB_LUT4_I1_O_SB_LUT4_O_I3[5] -.sym 6870 i_smi_a2_SB_LUT4_I1_O[1] -.sym 6871 smi_ctrl_ins.r_fifo_09_pull_SB_DFFESR_Q_E -.sym 6872 smi_ctrl_ins.int_cnt_09_SB_DFFESR_Q_E_SB_LUT4_O_I1[1] -.sym 6873 spi_if_ins.o_load_cmd_SB_DFFESR_Q_D[1] -.sym 6874 $PACKER_VCC_NET -.sym 6875 $PACKER_VCC_NET -.sym 6876 $PACKER_VCC_NET -.sym 6877 $PACKER_VCC_NET -.sym 6878 $PACKER_VCC_NET -.sym 6879 $PACKER_VCC_NET -.sym 6880 $PACKER_VCC_NET -.sym 6881 $PACKER_VCC_NET -.sym 6882 rx_24_fifo.wr_addr[0] -.sym 6883 rx_24_fifo.full_o_SB_DFFSR_Q_D_SB_LUT4_O_I1_SB_LUT4_O_I0[3] -.sym 6885 rx_24_fifo.wr_addr[2] -.sym 6886 rx_24_fifo.wr_addr[3] -.sym 6887 rx_24_fifo.wr_addr[4] -.sym 6888 rx_24_fifo.wr_addr[5] -.sym 6889 rx_24_fifo.wr_addr[6] -.sym 6890 rx_24_fifo.wr_addr[7] -.sym 6893 lvds_clock_buf -.sym 6894 $PACKER_VCC_NET -.sym 6895 w_rx_24_fifo_data[0] -.sym 6896 w_rx_24_fifo_data[1] -.sym 6897 w_rx_24_fifo_data[2] -.sym 6898 w_rx_24_fifo_data[3] -.sym 6899 w_rx_24_fifo_data[4] -.sym 6900 w_rx_24_fifo_data[5] -.sym 6901 w_rx_24_fifo_data[6] -.sym 6902 w_rx_24_fifo_data[7] -.sym 6903 w_rx_24_fifo_push +.sym 6794 lvds_rx_09_inst.o_fifo_data[10] +.sym 6795 lvds_rx_09_inst.o_fifo_data[11] +.sym 6796 lvds_rx_09_inst.o_fifo_data[12] +.sym 6797 lvds_rx_09_inst.o_fifo_data[13] +.sym 6798 lvds_rx_09_inst.o_fifo_data[14] +.sym 6799 lvds_rx_09_inst.o_fifo_data[15] +.sym 6800 lvds_rx_09_inst.o_fifo_data[8] +.sym 6801 lvds_rx_09_inst.o_fifo_data[9] +.sym 6806 lvds_rx_09_inst.o_fifo_data[15] +.sym 6807 rx_09_fifo.rd_addr[5] +.sym 6809 w_rx_09_fifo_pulled_data[0] +.sym 6811 lvds_rx_09_inst.o_fifo_data[13] +.sym 6812 lvds_rx_09_inst.o_fifo_data[12] +.sym 6813 lvds_rx_09_inst.o_fifo_data[11] +.sym 6814 lvds_rx_09_inst.o_fifo_data[14] +.sym 6815 lvds_rx_09_inst.o_fifo_data[8] +.sym 6816 io_pmod[7]$SB_IO_IN +.sym 6817 lvds_rx_09_inst.o_fifo_data[9] +.sym 6821 w_rx_24_fifo_pulled_data[11] +.sym 6823 lvds_rx_09_inst.r_state_if_SB_LUT4_I2_O[0] +.sym 6827 rx_09_fifo.rd_addr_gray[5] +.sym 6828 rx_09_fifo.rd_addr_gray_wr[5] +.sym 6866 smi_ctrl_ins.o_smi_data_out_SB_DFFE_Q_D_SB_LUT4_O_I1_SB_LUT4_O_1_I1[1] +.sym 6867 smi_ctrl_ins.o_smi_data_out_SB_DFFE_Q_1_D_SB_LUT4_O_I1_SB_LUT4_O_1_I1[1] +.sym 6868 smi_ctrl_ins.o_smi_data_out_SB_DFFE_Q_3_D_SB_LUT4_O_I1_SB_LUT4_O_1_I1[1] +.sym 6869 rx_09_fifo.rd_addr_gray_wr_r[5] +.sym 6870 smi_ctrl_ins.o_smi_data_out_SB_DFFE_Q_D_SB_LUT4_O_I1_SB_LUT4_O_1_I3[1] +.sym 6871 smi_ctrl_ins.o_smi_data_out_SB_DFFE_Q_6_D_SB_LUT4_O_I1_SB_LUT4_O_1_I1[1] +.sym 6872 rx_09_fifo.full_o_SB_LUT4_I3_O[0] +.sym 6873 smi_ctrl_ins.o_smi_data_out_SB_DFFE_Q_4_D_SB_LUT4_O_I1_SB_LUT4_O_1_I1[1] +.sym 6904 i_smi_a3$SB_IO_IN .sym 6907 i_smi_a3$SB_IO_IN -.sym 6910 smi_ctrl_ins.int_cnt_24[5] -.sym 6926 w_rx_24_fifo_data[20] -.sym 6929 rx_24_fifo.rd_addr[4] -.sym 6930 rx_24_fifo.rd_addr[4] +.sym 6909 i_smi_a3$SB_IO_IN +.sym 6916 w_smi_data_output[4] +.sym 6917 lvds_rx_09_inst.o_fifo_data[10] +.sym 6920 w_rx_09_fifo_push +.sym 6922 w_rx_24_fifo_pulled_data[9] +.sym 6924 w_rx_24_fifo_pulled_data[10] +.sym 6925 w_rx_24_fifo_pulled_data[0] +.sym 6926 $PACKER_VCC_NET +.sym 6928 w_rx_24_fifo_pulled_data[12] .sym 6931 $PACKER_VCC_NET -.sym 6936 rx_24_fifo.rd_addr[4] -.sym 6939 w_rx_24_fifo_data[14] -.sym 6940 w_rx_24_fifo_data[13] -.sym 6941 w_rx_24_fifo_data[12] -.sym 6942 $PACKER_VCC_NET -.sym 6943 w_rx_24_fifo_data[10] -.sym 6944 rx_24_fifo.rd_addr[3] -.sym 6945 w_rx_24_fifo_data[11] -.sym 6946 w_rx_24_fifo_data[8] -.sym 6947 w_rx_24_fifo_data[15] -.sym 6950 $PACKER_VCC_NET -.sym 6952 rx_24_fifo.rd_addr[0] -.sym 6954 rx_24_fifo.rd_addr[2] -.sym 6957 rx_24_fifo.rd_addr[5] -.sym 6961 rx_24_fifo.rd_addr[6] -.sym 6963 $PACKER_VCC_NET -.sym 6964 rx_24_fifo.rd_addr[1] -.sym 6965 w_rx_24_fifo_pull -.sym 6966 rx_24_fifo.rd_addr[7] -.sym 6967 w_rx_24_fifo_data[9] -.sym 6968 rx_24_fifo.rd_addr[0] -.sym 6969 rx_24_fifo.rd_addr[6] -.sym 6971 i_smi_a2_SB_LUT4_I1_O_SB_LUT4_O_I3[3] -.sym 6972 rx_24_fifo.rd_addr[1] -.sym 6973 rx_24_fifo.rd_addr[5] -.sym 6974 rx_24_fifo.rd_addr[7] -.sym 6975 rx_24_fifo.rd_addr_gray[2] -.sym 6976 $PACKER_VCC_NET -.sym 6977 $PACKER_VCC_NET -.sym 6978 $PACKER_VCC_NET -.sym 6979 $PACKER_VCC_NET -.sym 6980 $PACKER_VCC_NET -.sym 6981 $PACKER_VCC_NET -.sym 6982 $PACKER_VCC_NET -.sym 6983 $PACKER_VCC_NET -.sym 6984 rx_24_fifo.rd_addr[0] -.sym 6985 rx_24_fifo.rd_addr[1] -.sym 6987 rx_24_fifo.rd_addr[2] -.sym 6988 rx_24_fifo.rd_addr[3] -.sym 6989 rx_24_fifo.rd_addr[4] -.sym 6990 rx_24_fifo.rd_addr[5] -.sym 6991 rx_24_fifo.rd_addr[6] -.sym 6992 rx_24_fifo.rd_addr[7] -.sym 6995 r_counter[0]_$glb_clk -.sym 6996 $PACKER_VCC_NET -.sym 6997 w_rx_24_fifo_pull -.sym 6998 w_rx_24_fifo_data[10] -.sym 6999 w_rx_24_fifo_data[11] -.sym 7000 w_rx_24_fifo_data[12] -.sym 7001 w_rx_24_fifo_data[13] -.sym 7002 w_rx_24_fifo_data[14] -.sym 7003 w_rx_24_fifo_data[15] -.sym 7004 w_rx_24_fifo_data[8] -.sym 7005 w_rx_24_fifo_data[9] -.sym 7011 smi_ctrl_ins.int_cnt_09_SB_DFFESR_Q_E_SB_LUT4_O_I1[1] -.sym 7012 i_smi_a1_SB_LUT4_I1_O_SB_LUT4_O_I2_SB_LUT4_I0_O[2] -.sym 7013 w_rx_24_fifo_data[15] -.sym 7018 w_rx_09_fifo_push -.sym 7020 spi_if_ins.r_tx_data_valid_SB_DFFESR_Q_D[0] -.sym 7022 $PACKER_VCC_NET -.sym 7024 rx_24_fifo.wr_addr[5] -.sym 7025 rx_24_fifo.rd_addr[5] +.sym 6968 w_rx_24_fifo_data[17] +.sym 6969 w_rx_24_fifo_data[16] +.sym 6970 w_rx_24_fifo_data[18] +.sym 6971 w_rx_24_fifo_data[5] +.sym 6972 w_rx_24_fifo_data[3] +.sym 6973 smi_ctrl_ins.o_smi_data_out_SB_DFFE_Q_2_D_SB_LUT4_O_I1_SB_LUT4_O_1_I1[1] +.sym 6974 w_rx_24_fifo_data[13] +.sym 6975 w_rx_24_fifo_data[15] +.sym 7010 lvds_rx_24_inst.r_state_if_SB_LUT4_I2_O[0] +.sym 7011 w_rx_24_fifo_data[11] +.sym 7013 io_pmod[5]$SB_IO_IN +.sym 7016 w_rx_24_fifo_pulled_data[14] +.sym 7021 w_rx_24_fifo_data[14] +.sym 7023 $PACKER_VCC_NET +.sym 7024 $PACKER_VCC_NET +.sym 7025 w_rx_24_fifo_pulled_data[15] .sym 7026 $PACKER_VCC_NET -.sym 7027 rx_24_fifo.rd_addr_gray_SB_DFFESR_Q_7_D_SB_LUT4_I3_O_SB_LUT4_O_2_I0_SB_LUT4_O_1_I3[1] -.sym 7029 rx_24_fifo.rd_addr_gray_SB_DFFESR_Q_7_D_SB_LUT4_I3_O_SB_LUT4_O_2_I0_SB_LUT4_O_1_I3[2] -.sym 7030 rx_24_fifo.rd_addr[3] -.sym 7032 rx_24_fifo.wr_addr[0] -.sym 7033 rx_24_fifo.rd_addr[6] -.sym 7038 rx_24_fifo.wr_addr[0] -.sym 7040 rx_24_fifo.wr_addr[2] -.sym 7041 rx_24_fifo.wr_addr[5] -.sym 7042 w_rx_24_fifo_data[19] -.sym 7043 w_rx_24_fifo_data[18] -.sym 7045 $PACKER_VCC_NET -.sym 7046 w_rx_24_fifo_data[22] -.sym 7047 rx_24_fifo.wr_addr[4] +.sym 7027 $PACKER_VCC_NET +.sym 7028 rx_24_fifo.rd_addr[1] +.sym 7030 rx_24_fifo.wr_addr[3] +.sym 7031 w_rx_24_fifo_data[17] +.sym 7032 rx_24_fifo.wr_addr[4] +.sym 7033 rx_24_fifo.empty_o_SB_DFFSS_Q_D_SB_LUT4_O_I0_SB_LUT4_O_2_I3[2] +.sym 7038 rx_24_fifo.wr_addr[4] +.sym 7040 rx_24_fifo.wr_addr[6] +.sym 7041 w_rx_24_fifo_data[6] +.sym 7042 $PACKER_VCC_NET +.sym 7043 w_rx_24_fifo_data[2] +.sym 7044 w_rx_24_fifo_data[7] +.sym 7045 w_rx_24_fifo_data[0] +.sym 7047 rx_24_fifo.wr_addr[0] .sym 7049 $PACKER_VCC_NET -.sym 7050 rx_24_fifo.wr_addr[7] +.sym 7050 $PACKER_VCC_NET .sym 7051 w_rx_24_fifo_push -.sym 7052 rx_24_fifo.wr_addr[3] -.sym 7053 $PACKER_VCC_NET -.sym 7054 w_rx_24_fifo_data[17] -.sym 7055 w_rx_24_fifo_data[16] -.sym 7056 w_rx_24_fifo_data[21] -.sym 7058 rx_24_fifo.wr_addr[6] -.sym 7060 w_rx_24_fifo_data[23] +.sym 7052 w_rx_24_fifo_data[4] +.sym 7054 rx_24_fifo.wr_addr[2] +.sym 7055 rx_24_fifo.wr_addr[3] +.sym 7058 w_rx_24_fifo_data[3] +.sym 7059 rx_24_fifo.wr_addr[7] .sym 7062 rx_24_fifo.full_o_SB_DFFSR_Q_D_SB_LUT4_O_I1_SB_LUT4_O_I0[3] -.sym 7064 w_rx_24_fifo_data[20] -.sym 7070 rx_24_fifo.rd_addr_gray_SB_DFFESR_Q_7_D_SB_LUT4_I3_O_SB_LUT4_O_I0[1] -.sym 7071 rx_24_fifo.rd_addr_gray_SB_DFFESR_Q_7_D_SB_LUT4_I3_O_SB_LUT4_O_I0_SB_LUT4_O_2_I0[2] -.sym 7072 rx_24_fifo.rd_addr_gray_SB_DFFESR_Q_6_D[2] -.sym 7073 rx_24_fifo.wr_addr_gray_rd[7] -.sym 7074 rx_24_fifo.wr_addr_gray_rd[6] -.sym 7075 rx_24_fifo.wr_addr_gray_rd_r[7] -.sym 7076 rx_24_fifo.wr_addr_gray_rd[3] -.sym 7077 rx_24_fifo.rd_addr_gray_SB_DFFESR_Q_7_D_SB_LUT4_I3_O_SB_LUT4_O_I0_SB_LUT4_O_2_I0[0] +.sym 7064 rx_24_fifo.wr_addr[5] +.sym 7065 w_rx_24_fifo_data[5] +.sym 7069 w_rx_24_fifo_data[1] +.sym 7070 rx_24_fifo.empty_o_SB_DFFSS_Q_D_SB_LUT4_O_I0_SB_LUT4_O_I0[3] +.sym 7071 smi_ctrl_ins.o_smi_data_out_SB_DFFE_Q_D_SB_LUT4_O_I1_SB_LUT4_O_1_I3[2] +.sym 7072 smi_ctrl_ins.o_smi_data_out_SB_DFFE_Q_2_D_SB_LUT4_O_I1_SB_LUT4_O_1_I1[2] +.sym 7073 rx_24_fifo.empty_o_SB_DFFSS_Q_D_SB_LUT4_O_I0_SB_LUT4_O_2_I3_SB_LUT4_O_I0[1] +.sym 7074 smi_ctrl_ins.o_smi_data_out_SB_DFFE_Q_4_D_SB_LUT4_O_I1_SB_LUT4_O_1_I1[2] +.sym 7075 smi_ctrl_ins.o_smi_data_out_SB_DFFE_Q_7_D_SB_LUT4_O_I0_SB_LUT4_O_I3[3] +.sym 7076 smi_ctrl_ins.o_smi_data_out_SB_DFFE_Q_7_D_SB_LUT4_O_I0[2] +.sym 7077 rx_24_fifo.empty_o_SB_LUT4_I3_I2[1] .sym 7078 $PACKER_VCC_NET .sym 7079 $PACKER_VCC_NET .sym 7080 $PACKER_VCC_NET @@ -6585,52 +6235,55 @@ .sym 7094 rx_24_fifo.wr_addr[7] .sym 7097 lvds_clock_buf .sym 7098 $PACKER_VCC_NET -.sym 7099 w_rx_24_fifo_data[16] -.sym 7100 w_rx_24_fifo_data[17] -.sym 7101 w_rx_24_fifo_data[18] -.sym 7102 w_rx_24_fifo_data[19] -.sym 7103 w_rx_24_fifo_data[20] -.sym 7104 w_rx_24_fifo_data[21] -.sym 7105 w_rx_24_fifo_data[22] -.sym 7106 w_rx_24_fifo_data[23] +.sym 7099 w_rx_24_fifo_data[0] +.sym 7100 w_rx_24_fifo_data[1] +.sym 7101 w_rx_24_fifo_data[2] +.sym 7102 w_rx_24_fifo_data[3] +.sym 7103 w_rx_24_fifo_data[4] +.sym 7104 w_rx_24_fifo_data[5] +.sym 7105 w_rx_24_fifo_data[6] +.sym 7106 w_rx_24_fifo_data[7] .sym 7107 w_rx_24_fifo_push -.sym 7116 rx_24_fifo.wr_addr[2] -.sym 7121 spi_if_ins.state_if[0] -.sym 7123 rx_24_fifo.wr_addr[4] -.sym 7124 rx_24_fifo.rd_addr_gray_SB_LUT4_I2_O[6] -.sym 7125 rx_24_fifo.rd_addr[3] -.sym 7126 rx_24_fifo.rd_addr_gray_SB_LUT4_I2_O[7] -.sym 7127 rx_24_fifo.rd_addr[2] -.sym 7129 rx_24_fifo.wr_addr_gray[3] -.sym 7130 smi_ctrl_ins.int_cnt_09[3] -.sym 7132 rx_24_fifo.rd_addr[7] -.sym 7140 rx_24_fifo.rd_addr[0] -.sym 7142 rx_24_fifo.rd_addr[2] -.sym 7145 rx_24_fifo.rd_addr[5] -.sym 7148 rx_24_fifo.rd_addr[3] -.sym 7149 rx_24_fifo.rd_addr[6] -.sym 7151 w_rx_24_fifo_data[31] -.sym 7152 rx_24_fifo.rd_addr[1] -.sym 7153 w_rx_24_fifo_data[27] -.sym 7154 rx_24_fifo.rd_addr[7] -.sym 7156 rx_24_fifo.rd_addr[4] -.sym 7157 w_rx_24_fifo_data[24] +.sym 7112 w_rx_24_fifo_pulled_data[0] +.sym 7113 w_rx_24_fifo_data[11] +.sym 7115 w_rx_24_fifo_data[5] +.sym 7119 w_rx_24_fifo_data[14] +.sym 7121 spi_if_ins.r_tx_data_valid_SB_DFFESR_Q_D_SB_LUT4_I3_O +.sym 7123 w_rx_24_fifo_data[18] +.sym 7124 w_rx_24_fifo_pulled_data[24] +.sym 7128 i_smi_a2_SB_LUT4_I1_O_SB_LUT4_I3_1_I2_SB_LUT4_O_I3[1] +.sym 7130 w_rx_24_fifo_pulled_data[27] +.sym 7132 w_rx_09_fifo_push +.sym 7133 rx_24_fifo.empty_o_SB_DFFSS_Q_D_SB_LUT4_O_I0_SB_LUT4_O_I0[3] +.sym 7134 w_rx_24_fifo_pulled_data[29] +.sym 7140 rx_24_fifo.empty_o_SB_DFFSS_Q_D_SB_LUT4_O_I0_SB_LUT4_O_I0_SB_LUT4_O_I0[2] +.sym 7143 w_rx_24_fifo_data[8] +.sym 7144 w_rx_24_fifo_data[9] +.sym 7146 w_rx_24_fifo_data[13] +.sym 7148 w_rx_24_fifo_data[10] +.sym 7150 rx_24_fifo.empty_o_SB_DFFSS_Q_D_SB_LUT4_O_I0_SB_LUT4_O_2_I3[1] +.sym 7151 rx_24_fifo.empty_o_SB_LUT4_I3_I2[1] +.sym 7152 w_rx_24_fifo_data[12] +.sym 7153 w_rx_24_fifo_pull +.sym 7154 rx_24_fifo.empty_o_SB_DFFSS_Q_D_SB_LUT4_O_I0_SB_LUT4_O_I0_SB_LUT4_O_I0[3] +.sym 7155 w_rx_24_fifo_data[15] +.sym 7157 w_rx_24_fifo_data[14] .sym 7158 $PACKER_VCC_NET -.sym 7160 $PACKER_VCC_NET -.sym 7163 w_rx_24_fifo_data[30] -.sym 7164 $PACKER_VCC_NET -.sym 7165 w_rx_24_fifo_data[25] -.sym 7166 w_rx_24_fifo_data[28] -.sym 7167 w_rx_24_fifo_data[29] -.sym 7168 w_rx_24_fifo_data[26] -.sym 7169 w_rx_24_fifo_pull -.sym 7173 rx_24_fifo.rd_addr_gray_SB_LUT4_I2_O[1] -.sym 7174 rx_24_fifo.rd_addr_gray_SB_DFFESR_Q_7_D_SB_LUT4_I3_O_SB_LUT4_O_2_I0_SB_LUT4_O_1_I3[1] -.sym 7175 rx_24_fifo.rd_addr_gray_SB_DFFESR_Q_7_D_SB_LUT4_I3_O_SB_LUT4_O_2_I0_SB_LUT4_O_1_I3[2] -.sym 7176 rx_24_fifo.rd_addr_gray_SB_LUT4_I2_O[4] -.sym 7177 rx_24_fifo.rd_addr_gray_SB_LUT4_I2_O[5] -.sym 7178 rx_24_fifo.rd_addr_gray_SB_LUT4_I2_O[6] -.sym 7179 rx_24_fifo.rd_addr_gray_SB_LUT4_I2_O[7] +.sym 7161 $PACKER_VCC_NET +.sym 7162 $PACKER_VCC_NET +.sym 7164 rx_24_fifo.empty_o_SB_DFFSS_Q_D_SB_LUT4_O_I0_SB_LUT4_O_I0[3] +.sym 7165 w_rx_24_fifo_data[11] +.sym 7166 rx_24_fifo.rd_addr[1] +.sym 7167 rx_24_fifo.empty_o_SB_DFFSS_Q_D_SB_LUT4_O_I0_SB_LUT4_O_2_I3_SB_LUT4_O_I0[1] +.sym 7171 rx_24_fifo.empty_o_SB_DFFSS_Q_D_SB_LUT4_O_I0_SB_LUT4_O_2_I3[2] +.sym 7172 smi_ctrl_ins.o_smi_data_out_SB_DFFE_Q_D_SB_LUT4_O_I1_SB_LUT4_O_1_I1[2] +.sym 7173 rx_24_fifo.empty_o_SB_DFFSS_Q_D_SB_LUT4_O_I0[1] +.sym 7174 smi_ctrl_ins.o_smi_data_out_SB_DFFE_Q_6_D_SB_LUT4_O_I1_SB_LUT4_O_1_I1[2] +.sym 7175 rx_24_fifo.empty_o_SB_DFFSS_Q_D_SB_LUT4_O_I0_SB_LUT4_O_2_I3[3] +.sym 7176 smi_ctrl_ins.o_smi_data_out_SB_DFFE_Q_3_D_SB_LUT4_O_I1_SB_LUT4_O_1_I1[2] +.sym 7177 rx_24_fifo.empty_o_SB_LUT4_I3_I2[1] +.sym 7178 rx_24_fifo.empty_o_SB_DFFSS_Q_D_SB_LUT4_O_I0_SB_LUT4_O_I0[3] +.sym 7179 w_rx_24_fifo_empty .sym 7180 $PACKER_VCC_NET .sym 7181 $PACKER_VCC_NET .sym 7182 $PACKER_VCC_NET @@ -6639,5130 +6292,5440 @@ .sym 7185 $PACKER_VCC_NET .sym 7186 $PACKER_VCC_NET .sym 7187 $PACKER_VCC_NET -.sym 7188 rx_24_fifo.rd_addr[0] +.sym 7188 rx_24_fifo.empty_o_SB_LUT4_I3_I2[1] .sym 7189 rx_24_fifo.rd_addr[1] -.sym 7191 rx_24_fifo.rd_addr[2] -.sym 7192 rx_24_fifo.rd_addr[3] -.sym 7193 rx_24_fifo.rd_addr[4] -.sym 7194 rx_24_fifo.rd_addr[5] -.sym 7195 rx_24_fifo.rd_addr[6] -.sym 7196 rx_24_fifo.rd_addr[7] +.sym 7191 rx_24_fifo.empty_o_SB_DFFSS_Q_D_SB_LUT4_O_I0_SB_LUT4_O_2_I3_SB_LUT4_O_I0[1] +.sym 7192 rx_24_fifo.empty_o_SB_DFFSS_Q_D_SB_LUT4_O_I0_SB_LUT4_O_2_I3[1] +.sym 7193 rx_24_fifo.empty_o_SB_DFFSS_Q_D_SB_LUT4_O_I0_SB_LUT4_O_2_I3[2] +.sym 7194 rx_24_fifo.empty_o_SB_DFFSS_Q_D_SB_LUT4_O_I0_SB_LUT4_O_I0_SB_LUT4_O_I0[3] +.sym 7195 rx_24_fifo.empty_o_SB_DFFSS_Q_D_SB_LUT4_O_I0_SB_LUT4_O_I0_SB_LUT4_O_I0[2] +.sym 7196 rx_24_fifo.empty_o_SB_DFFSS_Q_D_SB_LUT4_O_I0_SB_LUT4_O_I0[3] .sym 7199 r_counter[0]_$glb_clk .sym 7200 $PACKER_VCC_NET .sym 7201 w_rx_24_fifo_pull -.sym 7202 w_rx_24_fifo_data[26] -.sym 7203 w_rx_24_fifo_data[27] -.sym 7204 w_rx_24_fifo_data[28] -.sym 7205 w_rx_24_fifo_data[29] -.sym 7206 w_rx_24_fifo_data[30] -.sym 7207 w_rx_24_fifo_data[31] -.sym 7208 w_rx_24_fifo_data[24] -.sym 7209 w_rx_24_fifo_data[25] -.sym 7216 rx_24_fifo.wr_addr[7] -.sym 7217 w_rx_24_fifo_data[31] -.sym 7219 spi_if_ins.state_if[0] -.sym 7220 rx_24_fifo.wr_addr_gray[6] -.sym 7221 i_smi_a1_SB_LUT4_I1_O_SB_LUT4_O_I2_SB_LUT4_I0_O[2] -.sym 7226 w_rx_24_fifo_push -.sym 7274 rx_24_fifo.rd_addr_gray_SB_DFFESR_Q_3_D[1] -.sym 7275 rx_24_fifo.rd_addr_gray_SB_DFFESR_Q_3_D[2] -.sym 7276 rx_24_fifo.rd_addr_gray_SB_DFFESR_Q_7_D_SB_LUT4_I3_O_SB_LUT4_O_2_I0_SB_LUT4_O_1_I3[3] -.sym 7280 w_tx_data_smi[3] -.sym 7281 rx_24_fifo.rd_addr_gray_SB_DFFESR_Q_7_D_SB_LUT4_I3_O_SB_LUT4_O_2_I0[0] -.sym 7318 i_smi_a1_SB_LUT4_I1_O_SB_LUT4_O_I2_SB_LUT4_I0_O[2] -.sym 7330 rx_24_fifo.rd_addr_gray_SB_DFFESR_Q_7_D_SB_LUT4_I3_O_SB_LUT4_O_2_I0_SB_LUT4_O_1_I3[2] -.sym 7332 rx_24_fifo.rd_addr_gray_SB_LUT4_I2_O[4] -.sym 7336 rx_24_fifo.rd_addr_gray_wr_r[6] -.sym 7337 rx_24_fifo.rd_addr[4] -.sym 7339 rx_24_fifo.rd_addr_gray_SB_DFFESR_Q_3_D[2] -.sym 7377 rx_24_fifo.rd_addr_gray_wr[3] -.sym 7378 rx_24_fifo.rd_addr_gray_wr_r[6] -.sym 7383 lvds_rx_24_inst.r_push_SB_LUT4_I0_1_I1_SB_LUT4_O_2_I0[1] -.sym 7421 w_rx_24_fifo_full -.sym 7430 rx_24_fifo.rd_addr[3] -.sym 7431 rx_24_fifo.wr_addr[5] -.sym 7433 $PACKER_VCC_NET -.sym 7439 rx_24_fifo.wr_addr[0] -.sym 7479 rx_24_fifo.rd_addr_gray[5] -.sym 7482 rx_24_fifo.rd_addr[4] -.sym 7483 rx_24_fifo.rd_addr[2] -.sym 7484 rx_24_fifo.rd_addr[3] -.sym 7485 rx_24_fifo.rd_addr_gray[3] -.sym 7521 rx_24_fifo.rd_addr_gray_wr[6] -.sym 7531 rx_24_fifo.rd_addr_gray_wr_r[6] -.sym 7532 rx_24_fifo.wr_addr_gray[3] -.sym 7535 rx_24_fifo.rd_addr[2] -.sym 7537 rx_24_fifo.rd_addr[3] -.sym 7542 lvds_rx_24_inst.r_push_SB_LUT4_I0_1_I1_SB_LUT4_O_2_I0[1] -.sym 7543 rx_24_fifo.rd_addr_gray[5] -.sym 7580 rx_24_fifo.wr_addr[5] -.sym 7581 rx_24_fifo.wr_addr_gray[4] -.sym 7582 rx_24_fifo.wr_addr_gray[0] -.sym 7583 rx_24_fifo.wr_addr_gray[1] -.sym 7584 rx_24_fifo.wr_addr[0] -.sym 7585 rx_24_fifo.wr_addr_gray[5] -.sym 7586 rx_24_fifo.wr_addr_gray[3] -.sym 7587 rx_24_fifo.wr_addr_gray[2] -.sym 7632 i_smi_a1_SB_LUT4_I1_O_SB_LUT4_O_I2_SB_LUT4_I0_O[2] -.sym 7687 rx_24_fifo.rd_addr_gray_wr[5] +.sym 7202 w_rx_24_fifo_data[10] +.sym 7203 w_rx_24_fifo_data[11] +.sym 7204 w_rx_24_fifo_data[12] +.sym 7205 w_rx_24_fifo_data[13] +.sym 7206 w_rx_24_fifo_data[14] +.sym 7207 w_rx_24_fifo_data[15] +.sym 7208 w_rx_24_fifo_data[8] +.sym 7209 w_rx_24_fifo_data[9] +.sym 7219 rx_24_fifo.empty_o_SB_LUT4_I3_I2[1] +.sym 7220 w_rx_24_fifo_data[12] +.sym 7221 w_rx_24_fifo_pull +.sym 7222 smi_ctrl_ins.r_fifo_24_pull_SB_LUT4_I3_1_O +.sym 7226 w_rx_24_fifo_pull +.sym 7227 w_rx_24_fifo_pulled_data[30] +.sym 7229 w_rx_24_fifo_pulled_data[11] +.sym 7230 w_rx_24_fifo_pulled_data[22] +.sym 7231 lvds_rx_09_inst.r_state_if_SB_LUT4_I2_O[0] +.sym 7232 rx_24_fifo.wr_addr_gray[6] +.sym 7235 w_rx_24_fifo_pulled_data[26] +.sym 7236 rx_24_fifo.wr_addr[6] +.sym 7242 rx_24_fifo.wr_addr[6] +.sym 7243 w_rx_24_fifo_data[20] +.sym 7244 rx_24_fifo.wr_addr[4] +.sym 7247 w_rx_24_fifo_data[22] +.sym 7248 rx_24_fifo.wr_addr[0] +.sym 7249 rx_24_fifo.wr_addr[7] +.sym 7250 $PACKER_VCC_NET +.sym 7253 $PACKER_VCC_NET +.sym 7255 w_rx_24_fifo_data[19] +.sym 7258 w_rx_24_fifo_data[17] +.sym 7259 w_rx_24_fifo_data[18] +.sym 7261 w_rx_24_fifo_data[16] +.sym 7262 w_rx_24_fifo_data[21] +.sym 7264 rx_24_fifo.wr_addr[2] +.sym 7266 rx_24_fifo.full_o_SB_DFFSR_Q_D_SB_LUT4_O_I1_SB_LUT4_O_I0[3] +.sym 7268 rx_24_fifo.wr_addr[5] +.sym 7270 rx_24_fifo.wr_addr[3] +.sym 7271 w_rx_24_fifo_push +.sym 7273 w_rx_24_fifo_data[23] +.sym 7274 rx_24_fifo.empty_o_SB_DFFSS_Q_D_SB_LUT4_O_I0_SB_LUT4_O_I0_SB_LUT4_O_I0[0] +.sym 7275 lvds_rx_24_inst.r_push_SB_LUT4_I2_I0_SB_LUT4_O_2_I0[1] +.sym 7276 rx_24_fifo.rd_addr_gray_wr[7] +.sym 7277 rx_24_fifo.empty_o_SB_DFFSS_Q_D_SB_LUT4_O_I0_SB_LUT4_O_I0[2] +.sym 7278 rx_24_fifo.empty_o_SB_DFFSS_Q_D_SB_LUT4_O_I0_SB_LUT4_O_2_I3_SB_LUT4_O_I0[0] +.sym 7279 rx_24_fifo.empty_o_SB_DFFSS_Q_D_SB_LUT4_O_I0_SB_LUT4_O_I0[0] +.sym 7280 rx_24_fifo.empty_o_SB_DFFSS_Q_D_SB_LUT4_O_I0[0] +.sym 7281 rx_24_fifo.rd_addr[1] +.sym 7282 $PACKER_VCC_NET +.sym 7283 $PACKER_VCC_NET +.sym 7284 $PACKER_VCC_NET +.sym 7285 $PACKER_VCC_NET +.sym 7286 $PACKER_VCC_NET +.sym 7287 $PACKER_VCC_NET +.sym 7288 $PACKER_VCC_NET +.sym 7289 $PACKER_VCC_NET +.sym 7290 rx_24_fifo.wr_addr[0] +.sym 7291 rx_24_fifo.full_o_SB_DFFSR_Q_D_SB_LUT4_O_I1_SB_LUT4_O_I0[3] +.sym 7293 rx_24_fifo.wr_addr[2] +.sym 7294 rx_24_fifo.wr_addr[3] +.sym 7295 rx_24_fifo.wr_addr[4] +.sym 7296 rx_24_fifo.wr_addr[5] +.sym 7297 rx_24_fifo.wr_addr[6] +.sym 7298 rx_24_fifo.wr_addr[7] +.sym 7301 lvds_clock_buf +.sym 7302 $PACKER_VCC_NET +.sym 7303 w_rx_24_fifo_data[16] +.sym 7304 w_rx_24_fifo_data[17] +.sym 7305 w_rx_24_fifo_data[18] +.sym 7306 w_rx_24_fifo_data[19] +.sym 7307 w_rx_24_fifo_data[20] +.sym 7308 w_rx_24_fifo_data[21] +.sym 7309 w_rx_24_fifo_data[22] +.sym 7310 w_rx_24_fifo_data[23] +.sym 7311 w_rx_24_fifo_push +.sym 7316 rx_24_fifo.empty_o_SB_DFFSS_Q_D_SB_LUT4_O_I0_SB_LUT4_O_I0_SB_LUT4_O_I0[2] +.sym 7320 rx_24_fifo.empty_o_SB_DFFSS_Q_D_SB_LUT4_O_I0_SB_LUT4_O_2_I3[1] +.sym 7324 rx_24_fifo.empty_o_SB_DFFSS_Q_D_SB_LUT4_O_I0_SB_LUT4_O_I0_SB_LUT4_O_I0[3] +.sym 7329 rx_24_fifo.empty_o_SB_DFFSS_Q_D_SB_LUT4_O_I0_SB_LUT4_O_2_I3_SB_LUT4_O_I0[1] +.sym 7331 rx_24_fifo.empty_o_SB_DFFSS_Q_D_SB_LUT4_O_I0_SB_LUT4_O_2_I3_SB_LUT4_O_I0[2] +.sym 7332 w_rx_09_fifo_push +.sym 7334 $PACKER_VCC_NET +.sym 7335 rx_24_fifo.rd_addr_gray_SB_DFFESR_Q_7_D[3] +.sym 7337 rx_24_fifo.empty_o_SB_DFFSS_Q_D_SB_LUT4_O_I0_SB_LUT4_O_2_I3[0] +.sym 7339 lvds_rx_24_inst.r_push_SB_LUT4_I2_I0_SB_LUT4_O_2_I0[1] +.sym 7344 rx_24_fifo.empty_o_SB_DFFSS_Q_D_SB_LUT4_O_I0_SB_LUT4_O_2_I3_SB_LUT4_O_I0[1] +.sym 7348 rx_24_fifo.empty_o_SB_DFFSS_Q_D_SB_LUT4_O_I0_SB_LUT4_O_2_I3[2] +.sym 7351 $PACKER_VCC_NET +.sym 7354 rx_24_fifo.empty_o_SB_DFFSS_Q_D_SB_LUT4_O_I0_SB_LUT4_O_I0_SB_LUT4_O_I0[3] +.sym 7355 $PACKER_VCC_NET +.sym 7357 rx_24_fifo.empty_o_SB_LUT4_I3_I2[1] +.sym 7358 rx_24_fifo.empty_o_SB_DFFSS_Q_D_SB_LUT4_O_I0_SB_LUT4_O_I0[3] +.sym 7359 $PACKER_VCC_NET +.sym 7361 w_rx_24_fifo_data[26] +.sym 7362 w_rx_24_fifo_data[27] +.sym 7364 w_rx_24_fifo_pull +.sym 7365 rx_24_fifo.empty_o_SB_DFFSS_Q_D_SB_LUT4_O_I0_SB_LUT4_O_2_I3[1] +.sym 7366 w_rx_24_fifo_data[25] +.sym 7367 rx_24_fifo.rd_addr[1] +.sym 7368 w_rx_24_fifo_data[24] +.sym 7371 w_rx_24_fifo_data[31] +.sym 7372 w_rx_24_fifo_data[30] +.sym 7373 rx_24_fifo.empty_o_SB_DFFSS_Q_D_SB_LUT4_O_I0_SB_LUT4_O_I0_SB_LUT4_O_I0[2] +.sym 7374 w_rx_24_fifo_data[28] +.sym 7375 w_rx_24_fifo_data[29] +.sym 7376 rx_24_fifo.rd_addr_gray_SB_DFFESR_Q_3_D[0] +.sym 7377 rx_24_fifo.rd_addr_gray_SB_DFFESR_Q_5_D[1] +.sym 7378 lvds_rx_09_inst.r_state_if_SB_LUT4_I2_O[0] +.sym 7379 rx_24_fifo.wr_addr_gray_rd[5] +.sym 7380 rx_24_fifo.empty_o_SB_DFFSS_Q_D_SB_LUT4_O_I0_SB_LUT4_O_I0_SB_LUT4_O_I0[1] +.sym 7381 rx_24_fifo.wr_addr_gray_rd[7] +.sym 7382 rx_24_fifo.wr_addr_gray_rd[6] +.sym 7383 rx_24_fifo.empty_o_SB_DFFSS_Q_D_SB_LUT4_O_I0_SB_LUT4_O_I0[1] +.sym 7384 $PACKER_VCC_NET +.sym 7385 $PACKER_VCC_NET +.sym 7386 $PACKER_VCC_NET +.sym 7387 $PACKER_VCC_NET +.sym 7388 $PACKER_VCC_NET +.sym 7389 $PACKER_VCC_NET +.sym 7390 $PACKER_VCC_NET +.sym 7391 $PACKER_VCC_NET +.sym 7392 rx_24_fifo.empty_o_SB_LUT4_I3_I2[1] +.sym 7393 rx_24_fifo.rd_addr[1] +.sym 7395 rx_24_fifo.empty_o_SB_DFFSS_Q_D_SB_LUT4_O_I0_SB_LUT4_O_2_I3_SB_LUT4_O_I0[1] +.sym 7396 rx_24_fifo.empty_o_SB_DFFSS_Q_D_SB_LUT4_O_I0_SB_LUT4_O_2_I3[1] +.sym 7397 rx_24_fifo.empty_o_SB_DFFSS_Q_D_SB_LUT4_O_I0_SB_LUT4_O_2_I3[2] +.sym 7398 rx_24_fifo.empty_o_SB_DFFSS_Q_D_SB_LUT4_O_I0_SB_LUT4_O_I0_SB_LUT4_O_I0[3] +.sym 7399 rx_24_fifo.empty_o_SB_DFFSS_Q_D_SB_LUT4_O_I0_SB_LUT4_O_I0_SB_LUT4_O_I0[2] +.sym 7400 rx_24_fifo.empty_o_SB_DFFSS_Q_D_SB_LUT4_O_I0_SB_LUT4_O_I0[3] +.sym 7403 r_counter[0]_$glb_clk +.sym 7404 $PACKER_VCC_NET +.sym 7405 w_rx_24_fifo_pull +.sym 7406 w_rx_24_fifo_data[26] +.sym 7407 w_rx_24_fifo_data[27] +.sym 7408 w_rx_24_fifo_data[28] +.sym 7409 w_rx_24_fifo_data[29] +.sym 7410 w_rx_24_fifo_data[30] +.sym 7411 w_rx_24_fifo_data[31] +.sym 7412 w_rx_24_fifo_data[24] +.sym 7413 w_rx_24_fifo_data[25] +.sym 7420 spi_if_ins.o_ioc_SB_DFFE_Q_E[2] +.sym 7429 rx_24_fifo.rd_addr_gray_wr[7] +.sym 7479 rx_24_fifo.empty_o_SB_DFFSS_Q_D_SB_LUT4_O_I0_SB_LUT4_O_2_I3_SB_LUT4_O_I0[2] +.sym 7481 rx_24_fifo.rd_addr_gray_SB_DFFESR_Q_7_D[3] +.sym 7482 rx_24_fifo.empty_o_SB_DFFSS_Q_D_SB_LUT4_O_I0_SB_LUT4_O_2_I3[0] +.sym 7483 rx_24_fifo.rd_addr_gray_SB_DFFESR_Q_7_D[0] +.sym 7528 $PACKER_VCC_NET +.sym 7532 w_rx_09_fifo_push +.sym 7535 rx_24_fifo.wr_addr_gray_rd[2] +.sym 7536 rx_24_fifo.wr_addr_gray_SB_LUT4_I2_O[4] +.sym 7541 rx_24_fifo.wr_addr_gray_rd[1] +.sym 7543 rx_24_fifo.wr_addr_gray_rd[3] +.sym 7586 w_rx_09_fifo_push +.sym 7635 rx_24_fifo.wr_addr_gray_SB_DFFESR_Q_6_D[2] +.sym 7636 rx_24_fifo.wr_addr_gray_rd[0] +.sym 7643 lvds_rx_09_inst.r_state_if_SB_DFFNESR_Q_E_SB_LUT4_O_I2_SB_LUT4_O_I2_SB_LUT4_I2_O[0] +.sym 7682 rx_24_fifo.wr_addr_gray_rd[4] +.sym 7683 rx_24_fifo.wr_addr_gray_rd[2] +.sym 7684 lvds_rx_09_inst.r_push_SB_DFFNESR_Q_E +.sym 7686 rx_24_fifo.wr_addr_gray_rd[1] +.sym 7687 rx_24_fifo.wr_addr_gray_rd[3] +.sym 7689 rx_24_fifo.wr_addr_gray_rd[0] .sym 7723 i_smi_a3$SB_IO_IN -.sym 7725 rx_24_fifo.wr_addr_gray_SB_LUT4_I2_1_O[4] -.sym 7729 rx_24_fifo.wr_addr_gray_SB_LUT4_I2_1_O[5] -.sym 7730 rx_24_fifo.wr_addr_gray_SB_DFFESR_Q_6_D[2] -.sym 7731 rx_24_fifo.wr_addr_gray_SB_LUT4_I2_1_O[6] -.sym 7733 i_smi_a1_SB_LUT4_I1_O_SB_LUT4_O_I2_SB_LUT4_I0_O[2] -.sym 7734 rx_24_fifo.wr_addr_gray_SB_DFFESR_Q_6_D[1] -.sym 7742 rx_24_fifo.wr_addr_gray_SB_DFFESR_Q_7_D[1] -.sym 7744 rx_24_fifo.wr_addr_gray_SB_DFFESR_Q_7_D[2] -.sym 7832 i_smi_a1_SB_LUT4_I1_O_SB_LUT4_O_I2_SB_LUT4_I0_O[2] +.sym 7726 w_rx_09_fifo_full +.sym 7733 rx_24_fifo.rd_addr_gray[5] +.sym 7744 w_rx_09_fifo_push +.sym 7785 rx_24_fifo.wr_addr_gray[0] +.sym 7786 rx_24_fifo.wr_addr_gray[3] +.sym 7787 rx_24_fifo.wr_addr_gray[4] +.sym 7788 rx_24_fifo.wr_addr_gray[2] +.sym 7791 rx_24_fifo.wr_addr_gray[1] +.sym 7828 i_smi_a3$SB_IO_IN +.sym 7892 rx_24_fifo.rd_addr_gray_wr_r[0] +.sym 7934 $PACKER_VCC_NET +.sym 7936 rx_24_fifo.wr_addr_gray_SB_LUT4_I2_O[3] +.sym 7939 $PACKER_VCC_NET +.sym 7944 rx_24_fifo.wr_addr_gray_SB_LUT4_I2_O[4] .sym 8088 i_smi_a3$SB_IO_IN .sym 8093 io_smi_data[6]$SB_IO_OUT -.sym 8115 io_smi_data[6]$SB_IO_OUT -.sym 8119 lvds_rx_09_inst.o_fifo_data[15] -.sym 8120 lvds_rx_09_inst.o_fifo_data[9] -.sym 8121 lvds_rx_09_inst.o_fifo_data[6] -.sym 8122 lvds_rx_09_inst.o_fifo_data[7] -.sym 8124 lvds_rx_09_inst.o_fifo_data[11] -.sym 8125 lvds_rx_09_inst.o_fifo_data[13] -.sym 8162 lvds_rx_09_inst.o_fifo_data[12] -.sym 8163 lvds_rx_09_inst.o_fifo_data[14] -.sym 8168 lvds_rx_09_inst.o_fifo_data[8] -.sym 8169 w_rx_09_fifo_pulled_data[27] -.sym 8171 w_rx_09_fifo_pulled_data[3] -.sym 8174 smi_ctrl_ins.o_smi_data_out_SB_DFFE_Q_D_SB_LUT4_O_I2_SB_LUT4_O_I3[3] -.sym 8175 smi_ctrl_ins.int_cnt_09[3] -.sym 8179 w_rx_09_fifo_pulled_data[11] -.sym 8180 w_rx_09_fifo_pulled_data[24] -.sym 8181 lvds_rx_09_inst.r_state_if_SB_LUT4_I2_O[0] -.sym 8183 w_rx_09_fifo_pulled_data[19] -.sym 8184 w_rx_09_fifo_pulled_data[8] -.sym 8186 smi_ctrl_ins.int_cnt_09_SB_DFFESR_Q_D_SB_LUT4_O_I3[1] -.sym 8187 lvds_rx_09_inst.o_fifo_data[6] -.sym 8191 lvds_rx_09_inst.o_fifo_data[10] -.sym 8193 lvds_rx_09_inst.o_fifo_data[6] -.sym 8194 lvds_rx_09_inst.r_state_if_SB_LUT4_I2_O[0] -.sym 8199 lvds_rx_09_inst.o_fifo_data[14] -.sym 8201 lvds_rx_09_inst.r_state_if_SB_LUT4_I2_O[0] -.sym 8205 lvds_rx_09_inst.o_fifo_data[10] -.sym 8206 lvds_rx_09_inst.r_state_if_SB_LUT4_I2_O[0] -.sym 8211 lvds_rx_09_inst.r_state_if_SB_LUT4_I2_O[0] -.sym 8214 lvds_rx_09_inst.o_fifo_data[12] -.sym 8217 smi_ctrl_ins.int_cnt_09[3] -.sym 8218 smi_ctrl_ins.o_smi_data_out_SB_DFFE_Q_D_SB_LUT4_O_I2_SB_LUT4_O_I3[3] -.sym 8219 w_rx_09_fifo_pulled_data[27] -.sym 8220 w_rx_09_fifo_pulled_data[11] -.sym 8223 smi_ctrl_ins.int_cnt_09_SB_DFFESR_Q_D_SB_LUT4_O_I3[1] -.sym 8224 smi_ctrl_ins.int_cnt_09[3] -.sym 8225 w_rx_09_fifo_pulled_data[8] -.sym 8226 w_rx_09_fifo_pulled_data[24] -.sym 8229 smi_ctrl_ins.int_cnt_09[3] -.sym 8230 w_rx_09_fifo_pulled_data[19] -.sym 8231 w_rx_09_fifo_pulled_data[3] -.sym 8232 smi_ctrl_ins.int_cnt_09_SB_DFFESR_Q_D_SB_LUT4_O_I3[1] -.sym 8235 lvds_rx_09_inst.r_state_if_SB_LUT4_I2_O[0] -.sym 8237 lvds_rx_09_inst.o_fifo_data[8] -.sym 8239 w_lvds_rx_09_d1_SB_LUT4_I0_O_SB_LUT4_I3_O_$glb_ce -.sym 8240 lvds_clock_buf -.sym 8241 i_smi_a1_SB_LUT4_I1_O_SB_LUT4_O_I2_SB_LUT4_I0_O[2]_$glb_sr -.sym 8246 io_smi_data[2]$SB_IO_OUT -.sym 8247 io_smi_data[1]$SB_IO_OUT -.sym 8248 smi_ctrl_ins.int_cnt_09_SB_DFFESR_Q_D_SB_LUT4_O_I3[1] -.sym 8249 smi_ctrl_ins.r_fifo_09_pull_SB_LUT4_I3_1_O -.sym 8251 io_smi_data[7]$SB_IO_OUT -.sym 8255 rx_09_fifo.rd_addr_gray_wr[4] +.sym 8106 io_smi_data[6]$SB_IO_OUT +.sym 8119 rx_09_fifo.rd_addr_gray_SB_DFFESR_Q_2_D_SB_LUT4_I3_O_SB_LUT4_O_I1_SB_LUT4_O_1_I0[3] +.sym 8120 rx_09_fifo.rd_addr_gray_SB_DFFESR_Q_2_D_SB_LUT4_I3_O_SB_LUT4_O_I1_SB_LUT4_O_1_I0[2] +.sym 8121 rx_09_fifo.rd_addr_gray_SB_DFFESR_Q_2_D_SB_LUT4_I3_O_SB_LUT4_O_I1_SB_LUT4_O_I2[1] +.sym 8122 rx_09_fifo.rd_addr_gray_SB_DFFESR_Q_2_D_SB_LUT4_I3_O_SB_LUT4_O_I1_SB_LUT4_O_I2[3] +.sym 8123 rx_09_fifo.rd_addr_gray_SB_LUT4_I2_O[5] +.sym 8124 rx_09_fifo.rd_addr_gray_SB_LUT4_I2_O[6] +.sym 8125 rx_09_fifo.rd_addr_gray_SB_LUT4_I2_O[7] +.sym 8139 io_smi_data[6]$SB_IO_OUT +.sym 8162 rx_09_fifo.wr_addr_gray_rd[0] +.sym 8175 rx_09_fifo.rd_addr[0] +.sym 8176 rx_09_fifo.rd_addr_gray_SB_DFFESR_Q_2_D_SB_LUT4_I3_O_SB_LUT4_O_2_I0[2] +.sym 8180 rx_09_fifo.rd_addr_gray_SB_DFFESR_Q_2_D_SB_LUT4_I3_O_SB_LUT4_O_I1_SB_LUT4_O_I2[3] +.sym 8183 rx_09_fifo.rd_addr[1] +.sym 8184 rx_09_fifo.wr_addr_gray_rd_r[0] +.sym 8185 rx_09_fifo.rd_addr_gray_SB_DFFESR_Q_2_D_SB_LUT4_I3_O_SB_LUT4_O_I1_SB_LUT4_O_1_I0[3] +.sym 8186 rx_09_fifo.rd_addr_gray_SB_DFFESR_Q_2_D_SB_LUT4_I3_O_SB_LUT4_O_I1_SB_LUT4_O_1_I0[2] +.sym 8188 rx_09_fifo.rd_addr_gray_SB_DFFESR_Q_2_D_SB_LUT4_I3_O_SB_LUT4_O_I1_SB_LUT4_O_1_I0[0] +.sym 8189 rx_09_fifo.rd_addr_gray_SB_LUT4_I2_O[5] +.sym 8191 rx_09_fifo.rd_addr_gray_SB_DFFESR_Q_2_D_SB_LUT4_I3_O_SB_LUT4_O_1_I1_SB_LUT4_O_1_I0[1] +.sym 8195 rx_09_fifo.wr_addr_gray_rd[0] +.sym 8199 rx_09_fifo.rd_addr_gray_SB_DFFESR_Q_2_D_SB_LUT4_I3_O_SB_LUT4_O_I1_SB_LUT4_O_1_I0[0] +.sym 8200 rx_09_fifo.rd_addr_gray_SB_DFFESR_Q_2_D_SB_LUT4_I3_O_SB_LUT4_O_I1_SB_LUT4_O_1_I0[3] +.sym 8201 rx_09_fifo.rd_addr_gray_SB_DFFESR_Q_2_D_SB_LUT4_I3_O_SB_LUT4_O_I1_SB_LUT4_O_1_I0[2] +.sym 8202 rx_09_fifo.rd_addr_gray_SB_DFFESR_Q_2_D_SB_LUT4_I3_O_SB_LUT4_O_1_I1_SB_LUT4_O_1_I0[1] +.sym 8211 rx_09_fifo.rd_addr[1] +.sym 8212 rx_09_fifo.rd_addr[0] +.sym 8213 rx_09_fifo.wr_addr_gray_rd_r[0] +.sym 8219 rx_09_fifo.rd_addr[0] +.sym 8220 rx_09_fifo.wr_addr_gray_rd_r[0] +.sym 8229 rx_09_fifo.rd_addr_gray_SB_LUT4_I2_O[5] +.sym 8231 rx_09_fifo.rd_addr_gray_SB_DFFESR_Q_2_D_SB_LUT4_I3_O_SB_LUT4_O_I1_SB_LUT4_O_I2[3] +.sym 8235 rx_09_fifo.rd_addr_gray_SB_DFFESR_Q_2_D_SB_LUT4_I3_O_SB_LUT4_O_I1_SB_LUT4_O_1_I0[2] +.sym 8238 rx_09_fifo.rd_addr_gray_SB_DFFESR_Q_2_D_SB_LUT4_I3_O_SB_LUT4_O_2_I0[2] +.sym 8240 r_counter[0]_$glb_clk +.sym 8246 rx_09_fifo.rd_addr[4] +.sym 8247 rx_09_fifo.rd_addr_gray_SB_DFFESR_Q_2_D_SB_LUT4_I3_O_SB_LUT4_O_2_I0[3] +.sym 8248 rx_09_fifo.rd_addr_gray_SB_DFFESR_Q_2_D_SB_LUT4_I3_O[0] +.sym 8249 rx_09_fifo.rd_addr_gray_SB_DFFESR_Q_3_D[2] +.sym 8250 rx_09_fifo.rd_addr_gray[6] +.sym 8251 rx_09_fifo.rd_addr[3] +.sym 8252 rx_09_fifo.rd_addr[7] +.sym 8253 rx_09_fifo.rd_addr[1] +.sym 8254 lvds_rx_09_inst.r_state_if_SB_LUT4_I2_O[0] +.sym 8257 lvds_rx_09_inst.r_state_if_SB_LUT4_I2_O[0] .sym 8260 $PACKER_VCC_NET -.sym 8262 $PACKER_VCC_NET -.sym 8263 rx_09_fifo.rd_addr_gray_wr[0] -.sym 8274 lvds_rx_09_inst.o_fifo_data[11] -.sym 8275 lvds_rx_09_inst.r_state_if_SB_LUT4_I2_O[0] -.sym 8277 io_smi_data[1]$SB_IO_OUT -.sym 8278 io_pmod[7]$SB_IO_IN -.sym 8292 io_smi_data[2]$SB_IO_OUT -.sym 8299 lvds_rx_09_inst.o_fifo_data[16] -.sym 8323 w_rx_09_fifo_pulled_data[2] -.sym 8324 smi_ctrl_ins.int_cnt_09[3] -.sym 8325 w_rx_09_fifo_pulled_data[10] -.sym 8328 smi_ctrl_ins.o_smi_data_out_SB_DFFE_Q_1_D_SB_LUT4_O_I1_SB_LUT4_O_I3[3] -.sym 8329 w_rx_09_fifo_pulled_data[14] -.sym 8330 w_rx_09_fifo_pulled_data[15] -.sym 8332 smi_ctrl_ins.int_cnt_09[3] -.sym 8333 w_rx_09_fifo_pulled_data[30] -.sym 8335 w_rx_09_fifo_pulled_data[31] -.sym 8336 w_rx_09_fifo_pulled_data[13] -.sym 8337 w_rx_09_fifo_pulled_data[26] -.sym 8338 smi_ctrl_ins.o_smi_data_out_SB_DFFE_Q_2_D_SB_LUT4_O_I1_SB_LUT4_O_I3[3] -.sym 8339 smi_ctrl_ins.o_smi_data_out_SB_DFFE_Q_5_D_SB_LUT4_O_I1_SB_LUT4_O_I3[3] -.sym 8341 w_rx_09_fifo_pulled_data[18] -.sym 8342 w_rx_09_fifo_pulled_data[29] -.sym 8344 w_rx_09_fifo_pulled_data[21] -.sym 8345 w_rx_09_fifo_pulled_data[22] -.sym 8346 w_rx_09_fifo_pulled_data[23] -.sym 8349 smi_ctrl_ins.int_cnt_09_SB_DFFESR_Q_D_SB_LUT4_O_I3[1] -.sym 8350 smi_ctrl_ins.o_smi_data_out_SB_DFFE_Q_D_SB_LUT4_O_I1_SB_LUT4_O_I3[3] -.sym 8352 w_rx_09_fifo_pulled_data[5] -.sym 8353 w_rx_09_fifo_pulled_data[6] -.sym 8354 w_rx_09_fifo_pulled_data[7] -.sym 8356 w_rx_09_fifo_pulled_data[2] -.sym 8357 smi_ctrl_ins.int_cnt_09[3] -.sym 8358 w_rx_09_fifo_pulled_data[18] -.sym 8359 smi_ctrl_ins.int_cnt_09_SB_DFFESR_Q_D_SB_LUT4_O_I3[1] -.sym 8362 w_rx_09_fifo_pulled_data[26] -.sym 8363 w_rx_09_fifo_pulled_data[10] -.sym 8364 smi_ctrl_ins.int_cnt_09[3] -.sym 8365 smi_ctrl_ins.o_smi_data_out_SB_DFFE_Q_5_D_SB_LUT4_O_I1_SB_LUT4_O_I3[3] -.sym 8368 w_rx_09_fifo_pulled_data[14] -.sym 8369 w_rx_09_fifo_pulled_data[30] -.sym 8370 smi_ctrl_ins.int_cnt_09[3] -.sym 8371 smi_ctrl_ins.o_smi_data_out_SB_DFFE_Q_1_D_SB_LUT4_O_I1_SB_LUT4_O_I3[3] -.sym 8374 smi_ctrl_ins.int_cnt_09_SB_DFFESR_Q_D_SB_LUT4_O_I3[1] -.sym 8375 smi_ctrl_ins.int_cnt_09[3] -.sym 8376 w_rx_09_fifo_pulled_data[23] -.sym 8377 w_rx_09_fifo_pulled_data[7] -.sym 8380 smi_ctrl_ins.o_smi_data_out_SB_DFFE_Q_D_SB_LUT4_O_I1_SB_LUT4_O_I3[3] -.sym 8381 w_rx_09_fifo_pulled_data[15] -.sym 8382 smi_ctrl_ins.int_cnt_09[3] -.sym 8383 w_rx_09_fifo_pulled_data[31] -.sym 8386 smi_ctrl_ins.int_cnt_09_SB_DFFESR_Q_D_SB_LUT4_O_I3[1] -.sym 8387 smi_ctrl_ins.int_cnt_09[3] -.sym 8388 w_rx_09_fifo_pulled_data[6] -.sym 8389 w_rx_09_fifo_pulled_data[22] -.sym 8392 w_rx_09_fifo_pulled_data[13] -.sym 8393 smi_ctrl_ins.int_cnt_09[3] -.sym 8394 smi_ctrl_ins.o_smi_data_out_SB_DFFE_Q_2_D_SB_LUT4_O_I1_SB_LUT4_O_I3[3] -.sym 8395 w_rx_09_fifo_pulled_data[29] -.sym 8398 smi_ctrl_ins.int_cnt_09_SB_DFFESR_Q_D_SB_LUT4_O_I3[1] -.sym 8399 smi_ctrl_ins.int_cnt_09[3] -.sym 8400 w_rx_09_fifo_pulled_data[21] -.sym 8401 w_rx_09_fifo_pulled_data[5] -.sym 8405 lvds_rx_09_inst.o_fifo_data[24] -.sym 8406 lvds_rx_09_inst.o_fifo_data[22] -.sym 8407 lvds_rx_09_inst.o_fifo_data[19] -.sym 8408 lvds_rx_09_inst.o_fifo_data[28] -.sym 8409 rx_09_fifo.wr_addr_gray_SB_DFFESR_Q_4_D[1] -.sym 8410 lvds_rx_09_inst.o_fifo_data[26] -.sym 8411 lvds_rx_09_inst.o_fifo_data[21] -.sym 8412 lvds_rx_09_inst.o_fifo_data[17] -.sym 8418 io_pmod[5]$SB_IO_IN -.sym 8419 w_rx_09_fifo_pulled_data[30] -.sym 8424 smi_ctrl_ins.int_cnt_09[3] -.sym 8426 w_smi_data_output[1] -.sym 8428 smi_ctrl_ins.int_cnt_09[4] -.sym 8429 rx_09_fifo.wr_addr[2] -.sym 8430 lvds_rx_09_inst.r_push_SB_LUT4_I3_O[0] -.sym 8437 rx_09_fifo.wr_addr[5] -.sym 8438 smi_ctrl_ins.int_cnt_09_SB_DFFESR_Q_D_SB_LUT4_O_I3[2] -.sym 8440 rx_09_fifo.rd_addr_gray_wr_r[0] -.sym 8447 lvds_rx_09_inst.o_fifo_data[25] -.sym 8453 lvds_rx_09_inst.o_fifo_data[18] -.sym 8462 lvds_rx_09_inst.o_fifo_data[23] -.sym 8465 lvds_rx_09_inst.o_fifo_data[16] -.sym 8468 lvds_rx_09_inst.o_fifo_data[27] -.sym 8471 lvds_rx_09_inst.r_state_if_SB_LUT4_I2_O[0] -.sym 8473 lvds_rx_09_inst.o_fifo_data[28] -.sym 8475 lvds_rx_09_inst.o_fifo_data[29] -.sym 8476 lvds_rx_09_inst.o_fifo_data[21] -.sym 8480 lvds_rx_09_inst.o_fifo_data[21] -.sym 8481 lvds_rx_09_inst.r_state_if_SB_LUT4_I2_O[0] -.sym 8486 lvds_rx_09_inst.r_state_if_SB_LUT4_I2_O[0] -.sym 8488 lvds_rx_09_inst.o_fifo_data[23] -.sym 8491 lvds_rx_09_inst.r_state_if_SB_LUT4_I2_O[0] -.sym 8493 lvds_rx_09_inst.o_fifo_data[28] -.sym 8498 lvds_rx_09_inst.r_state_if_SB_LUT4_I2_O[0] -.sym 8500 lvds_rx_09_inst.o_fifo_data[29] -.sym 8503 lvds_rx_09_inst.r_state_if_SB_LUT4_I2_O[0] -.sym 8504 lvds_rx_09_inst.o_fifo_data[18] -.sym 8510 lvds_rx_09_inst.o_fifo_data[27] -.sym 8512 lvds_rx_09_inst.r_state_if_SB_LUT4_I2_O[0] -.sym 8515 lvds_rx_09_inst.r_state_if_SB_LUT4_I2_O[0] -.sym 8516 lvds_rx_09_inst.o_fifo_data[25] -.sym 8522 lvds_rx_09_inst.r_state_if_SB_LUT4_I2_O[0] -.sym 8523 lvds_rx_09_inst.o_fifo_data[16] -.sym 8525 w_lvds_rx_09_d1_SB_LUT4_I0_O_SB_LUT4_I3_O_$glb_ce -.sym 8526 lvds_clock_buf -.sym 8527 i_smi_a1_SB_LUT4_I1_O_SB_LUT4_O_I2_SB_LUT4_I0_O[2]_$glb_sr -.sym 8528 rx_09_fifo.wr_addr[0] -.sym 8529 rx_09_fifo.wr_addr[3] -.sym 8530 rx_09_fifo.wr_addr[5] -.sym 8531 rx_09_fifo.wr_addr_gray[3] -.sym 8532 rx_09_fifo.wr_addr[4] -.sym 8533 rx_09_fifo.full_o_SB_DFFSR_Q_D_SB_LUT4_O_I1_SB_LUT4_O_I0_SB_LUT4_O_1_I3[1] -.sym 8534 rx_09_fifo.wr_addr[2] -.sym 8535 rx_09_fifo.wr_addr[6] -.sym 8539 rx_24_fifo.rd_addr[0] -.sym 8543 $PACKER_VCC_NET -.sym 8546 io_pmod_SB_DFFSS_Q_D_SB_LUT4_O_I0_SB_LUT4_O_I2[1] -.sym 8548 $PACKER_VCC_NET -.sym 8552 rx_09_fifo.wr_addr[7] -.sym 8553 i_smi_a1_SB_LUT4_I1_O[2] -.sym 8557 lvds_rx_09_inst.r_state_if_SB_LUT4_I2_O[0] -.sym 8558 i_smi_a2_SB_LUT4_I1_O_SB_LUT4_O_I3[5] -.sym 8571 $PACKER_VCC_NET -.sym 8573 rx_09_fifo.rd_addr_gray_wr[0] -.sym 8579 $PACKER_VCC_NET -.sym 8589 smi_ctrl_ins.int_cnt_09[5] -.sym 8590 rx_09_fifo.rd_addr_gray_wr[7] -.sym 8592 smi_ctrl_ins.int_cnt_09[3] -.sym 8594 smi_ctrl_ins.int_cnt_09[4] -.sym 8596 io_pmod_SB_DFFSS_Q_D_SB_LUT4_O_I0_SB_LUT4_O_I0[1] -.sym 8601 $nextpnr_ICESTORM_LC_11$O -.sym 8603 smi_ctrl_ins.int_cnt_09[3] -.sym 8607 smi_ctrl_ins.int_cnt_09_SB_DFFESR_Q_D_SB_LUT4_O_I3_SB_LUT4_O_I3[2] -.sym 8609 smi_ctrl_ins.int_cnt_09[4] -.sym 8610 $PACKER_VCC_NET -.sym 8614 smi_ctrl_ins.int_cnt_09[5] -.sym 8616 $PACKER_VCC_NET -.sym 8617 smi_ctrl_ins.int_cnt_09_SB_DFFESR_Q_D_SB_LUT4_O_I3_SB_LUT4_O_I3[2] -.sym 8623 rx_09_fifo.rd_addr_gray_wr[0] -.sym 8633 io_pmod_SB_DFFSS_Q_D_SB_LUT4_O_I0_SB_LUT4_O_I0[1] -.sym 8641 rx_09_fifo.rd_addr_gray_wr[7] +.sym 8261 lvds_rx_09_inst.o_fifo_data[20] +.sym 8286 rx_09_fifo.rd_addr_gray_SB_DFFESR_Q_2_D_SB_LUT4_I3_O_SB_LUT4_O_1_I1_SB_LUT4_O_1_I0[1] +.sym 8291 w_rx_09_fifo_pulled_data[6] +.sym 8293 io_smi_data[1]$SB_IO_OUT +.sym 8297 rx_09_fifo.wr_addr_gray_rd[0] +.sym 8299 rx_09_fifo.rd_addr_gray_SB_DFFESR_Q_2_D_SB_LUT4_I3_O_SB_LUT4_O_I1[1] +.sym 8303 smi_ctrl_ins.o_smi_data_out_SB_DFFE_Q_2_D_SB_LUT4_O_I1[1] +.sym 8306 rx_09_fifo.rd_addr[7] +.sym 8308 rx_09_fifo.rd_addr_gray_wr[0] +.sym 8309 rx_09_fifo.rd_addr_gray[2] +.sym 8312 rx_09_fifo.rd_addr_gray_SB_DFFESR_Q_2_D_SB_LUT4_I3_O_SB_LUT4_O_1_I1_SB_LUT4_O_I2[0] +.sym 8313 io_smi_data[2]$SB_IO_OUT +.sym 8324 rx_09_fifo.rd_addr_gray_SB_DFFESR_Q_2_D_SB_LUT4_I3_O_SB_LUT4_O_I1[2] +.sym 8325 smi_ctrl_ins.r_fifo_09_pull_SB_LUT4_I3_1_O +.sym 8326 rx_09_fifo.rd_addr_gray_SB_DFFESR_Q_2_D_SB_LUT4_I3_O_SB_LUT4_O_I1_SB_LUT4_O_I2[1] +.sym 8327 rx_09_fifo.rd_addr_gray_SB_DFFESR_Q_2_D_SB_LUT4_I3_O_SB_LUT4_O_I1_SB_LUT4_O_I2[3] +.sym 8329 rx_09_fifo.rd_addr_gray_SB_DFFESR_Q_2_D_SB_LUT4_I3_O_SB_LUT4_O_I1_SB_LUT4_O_I2[0] +.sym 8330 rx_09_fifo.rd_addr_gray_SB_DFFESR_Q_2_D_SB_LUT4_I3_O_SB_LUT4_O_I1_SB_LUT4_O_I2[2] +.sym 8331 w_rx_09_fifo_pull +.sym 8332 w_rx_09_fifo_pulled_data[25] +.sym 8333 rx_09_fifo.rd_addr_gray_SB_DFFESR_Q_2_D_SB_LUT4_I3_O_SB_LUT4_O_I1_SB_LUT4_O_1_I0[2] +.sym 8334 rx_09_fifo.rd_addr_gray_SB_DFFESR_Q_2_D_SB_LUT4_I3_O_SB_LUT4_O_I1[0] +.sym 8335 i_smi_a2_SB_LUT4_I1_O_SB_LUT4_I3_I2[1] +.sym 8337 rx_09_fifo.rd_addr_gray_SB_DFFESR_Q_3_D[1] +.sym 8338 i_smi_a2_SB_LUT4_I1_O_SB_LUT4_I3_I2_SB_LUT4_O_I3[1] +.sym 8340 w_rx_09_fifo_pulled_data[17] +.sym 8342 w_rx_09_fifo_pulled_data[9] +.sym 8348 w_rx_09_fifo_pulled_data[1] +.sym 8349 smi_ctrl_ins.o_smi_data_out_SB_DFFE_Q_6_D_SB_LUT4_O_I1_SB_LUT4_O_I3[3] +.sym 8350 rx_09_fifo.rd_addr_gray_SB_DFFESR_Q_3_D[2] +.sym 8352 rx_09_fifo.rd_addr_gray_SB_DFFESR_Q_2_D_SB_LUT4_I3_O_SB_LUT4_O_2_I0_SB_LUT4_O_2_I0[1] +.sym 8353 rx_09_fifo.rd_addr_gray_SB_DFFESR_Q_2_D_SB_LUT4_I3_O_SB_LUT4_O_I1[1] +.sym 8357 rx_09_fifo.rd_addr_gray_SB_DFFESR_Q_2_D_SB_LUT4_I3_O_SB_LUT4_O_I1_SB_LUT4_O_1_I0[2] +.sym 8359 rx_09_fifo.rd_addr_gray_SB_DFFESR_Q_2_D_SB_LUT4_I3_O_SB_LUT4_O_I1_SB_LUT4_O_I2[1] +.sym 8362 rx_09_fifo.rd_addr_gray_SB_DFFESR_Q_2_D_SB_LUT4_I3_O_SB_LUT4_O_I1_SB_LUT4_O_I2[2] +.sym 8363 rx_09_fifo.rd_addr_gray_SB_DFFESR_Q_2_D_SB_LUT4_I3_O_SB_LUT4_O_I1_SB_LUT4_O_I2[3] +.sym 8364 rx_09_fifo.rd_addr_gray_SB_DFFESR_Q_2_D_SB_LUT4_I3_O_SB_LUT4_O_I1_SB_LUT4_O_I2[1] +.sym 8365 rx_09_fifo.rd_addr_gray_SB_DFFESR_Q_2_D_SB_LUT4_I3_O_SB_LUT4_O_I1_SB_LUT4_O_I2[0] +.sym 8368 w_rx_09_fifo_pulled_data[1] +.sym 8369 i_smi_a2_SB_LUT4_I1_O_SB_LUT4_I3_I2[1] +.sym 8370 i_smi_a2_SB_LUT4_I1_O_SB_LUT4_I3_I2_SB_LUT4_O_I3[1] +.sym 8371 w_rx_09_fifo_pulled_data[17] +.sym 8374 rx_09_fifo.rd_addr_gray_SB_DFFESR_Q_3_D[1] +.sym 8375 rx_09_fifo.rd_addr_gray_SB_DFFESR_Q_2_D_SB_LUT4_I3_O_SB_LUT4_O_2_I0_SB_LUT4_O_2_I0[1] +.sym 8376 w_rx_09_fifo_pull +.sym 8377 rx_09_fifo.rd_addr_gray_SB_DFFESR_Q_3_D[2] +.sym 8383 rx_09_fifo.rd_addr_gray_SB_DFFESR_Q_3_D[1] +.sym 8386 rx_09_fifo.rd_addr_gray_SB_DFFESR_Q_2_D_SB_LUT4_I3_O_SB_LUT4_O_I1[2] +.sym 8388 rx_09_fifo.rd_addr_gray_SB_DFFESR_Q_2_D_SB_LUT4_I3_O_SB_LUT4_O_I1[1] +.sym 8389 rx_09_fifo.rd_addr_gray_SB_DFFESR_Q_2_D_SB_LUT4_I3_O_SB_LUT4_O_I1[0] +.sym 8392 rx_09_fifo.rd_addr_gray_SB_DFFESR_Q_2_D_SB_LUT4_I3_O_SB_LUT4_O_I1_SB_LUT4_O_I2[3] +.sym 8393 rx_09_fifo.rd_addr_gray_SB_DFFESR_Q_2_D_SB_LUT4_I3_O_SB_LUT4_O_I1_SB_LUT4_O_I2[1] +.sym 8398 w_rx_09_fifo_pulled_data[9] +.sym 8399 i_smi_a2_SB_LUT4_I1_O_SB_LUT4_I3_I2_SB_LUT4_O_I3[1] +.sym 8400 smi_ctrl_ins.o_smi_data_out_SB_DFFE_Q_6_D_SB_LUT4_O_I1_SB_LUT4_O_I3[3] +.sym 8401 w_rx_09_fifo_pulled_data[25] +.sym 8402 smi_ctrl_ins.r_fifo_09_pull_SB_LUT4_I3_1_O +.sym 8403 r_counter[0]_$glb_clk +.sym 8404 i_smi_a1_SB_LUT4_I1_O[3]_$glb_sr +.sym 8405 rx_09_fifo.rd_addr_gray_SB_DFFESR_Q_2_D_SB_LUT4_I3_O_SB_LUT4_O_1_I1[1] +.sym 8406 rx_09_fifo.rd_addr_gray_SB_DFFESR_Q_2_D_SB_LUT4_I3_O_SB_LUT4_O_1_I1[2] +.sym 8407 smi_ctrl_ins.o_smi_data_out_SB_DFFE_Q_1_D_SB_LUT4_O_I1_SB_LUT4_O_I3[3] +.sym 8408 rx_09_fifo.rd_addr_gray_SB_DFFESR_Q_2_D_SB_LUT4_I3_O_SB_LUT4_O_1_I1_SB_LUT4_O_1_I0[0] +.sym 8409 rx_09_fifo.rd_addr_gray_SB_DFFESR_Q_2_D_SB_LUT4_I3_O[1] +.sym 8410 rx_09_fifo.rd_addr_gray_SB_DFFESR_Q_2_D_SB_LUT4_I3_O_SB_LUT4_O_1_I1[0] +.sym 8411 $io_pmod[2]$iobuf_i +.sym 8412 rx_09_fifo.rd_addr_gray_SB_DFFESR_Q_2_D_SB_LUT4_I3_O_SB_LUT4_O_2_I0_SB_LUT4_O_2_I0[0] +.sym 8416 rx_24_fifo.wr_addr_gray_rd[4] +.sym 8418 lvds_rx_09_inst.o_fifo_data[17] +.sym 8421 rx_09_fifo.rd_addr[0] +.sym 8423 i_smi_a2_SB_LUT4_I1_O_SB_LUT4_I3_I2[1] +.sym 8426 lvds_rx_09_inst.o_fifo_data[16] +.sym 8427 rx_09_fifo.rd_addr[6] +.sym 8428 lvds_rx_09_inst.o_fifo_data[26] +.sym 8431 io_smi_data[1]$SB_IO_OUT +.sym 8432 io_smi_data[2]$SB_IO_OUT +.sym 8438 i_smi_a3$SB_IO_IN +.sym 8440 smi_ctrl_ins.o_smi_data_out_SB_DFFE_Q_6_D_SB_LUT4_O_I1[1] +.sym 8448 i_smi_a2_SB_LUT4_I1_O_SB_LUT4_I3_I2_SB_LUT4_O_I3[1] +.sym 8449 w_rx_09_fifo_pulled_data[21] +.sym 8450 rx_09_fifo.wr_addr_gray_rd[3] +.sym 8451 w_rx_09_fifo_pulled_data[5] +.sym 8452 i_smi_a2_SB_LUT4_I1_O_SB_LUT4_I3_I2[1] +.sym 8453 w_rx_09_fifo_pulled_data[7] +.sym 8455 w_rx_09_fifo_pulled_data[20] +.sym 8456 w_rx_09_fifo_pulled_data[2] +.sym 8457 w_rx_09_fifo_pulled_data[3] +.sym 8458 w_rx_09_fifo_pulled_data[4] +.sym 8459 w_rx_09_fifo_pulled_data[18] +.sym 8460 i_smi_a2_SB_LUT4_I1_O_SB_LUT4_I3_I2[1] +.sym 8461 w_rx_09_fifo_pulled_data[23] +.sym 8463 i_smi_a2_SB_LUT4_I1_O_SB_LUT4_I3_I2_SB_LUT4_O_I3[1] +.sym 8465 w_rx_09_fifo_pulled_data[19] +.sym 8467 smi_ctrl_ins.o_smi_data_out_SB_DFFE_Q_2_D_SB_LUT4_O_I1_SB_LUT4_O_I3[3] +.sym 8468 w_rx_09_fifo_pulled_data[13] +.sym 8470 rx_09_fifo.wr_addr_gray_rd[2] +.sym 8475 w_rx_09_fifo_pulled_data[29] +.sym 8480 rx_09_fifo.wr_addr_gray_rd[2] +.sym 8485 w_rx_09_fifo_pulled_data[2] +.sym 8486 w_rx_09_fifo_pulled_data[18] +.sym 8487 i_smi_a2_SB_LUT4_I1_O_SB_LUT4_I3_I2[1] +.sym 8488 i_smi_a2_SB_LUT4_I1_O_SB_LUT4_I3_I2_SB_LUT4_O_I3[1] +.sym 8491 w_rx_09_fifo_pulled_data[23] +.sym 8492 i_smi_a2_SB_LUT4_I1_O_SB_LUT4_I3_I2[1] +.sym 8493 i_smi_a2_SB_LUT4_I1_O_SB_LUT4_I3_I2_SB_LUT4_O_I3[1] +.sym 8494 w_rx_09_fifo_pulled_data[7] +.sym 8497 w_rx_09_fifo_pulled_data[19] +.sym 8498 i_smi_a2_SB_LUT4_I1_O_SB_LUT4_I3_I2_SB_LUT4_O_I3[1] +.sym 8499 i_smi_a2_SB_LUT4_I1_O_SB_LUT4_I3_I2[1] +.sym 8500 w_rx_09_fifo_pulled_data[3] +.sym 8503 i_smi_a2_SB_LUT4_I1_O_SB_LUT4_I3_I2_SB_LUT4_O_I3[1] +.sym 8504 w_rx_09_fifo_pulled_data[4] +.sym 8505 w_rx_09_fifo_pulled_data[20] +.sym 8506 i_smi_a2_SB_LUT4_I1_O_SB_LUT4_I3_I2[1] +.sym 8509 w_rx_09_fifo_pulled_data[21] +.sym 8510 i_smi_a2_SB_LUT4_I1_O_SB_LUT4_I3_I2[1] +.sym 8511 w_rx_09_fifo_pulled_data[5] +.sym 8512 i_smi_a2_SB_LUT4_I1_O_SB_LUT4_I3_I2_SB_LUT4_O_I3[1] +.sym 8515 rx_09_fifo.wr_addr_gray_rd[3] +.sym 8521 smi_ctrl_ins.o_smi_data_out_SB_DFFE_Q_2_D_SB_LUT4_O_I1_SB_LUT4_O_I3[3] +.sym 8522 w_rx_09_fifo_pulled_data[29] +.sym 8523 i_smi_a2_SB_LUT4_I1_O_SB_LUT4_I3_I2_SB_LUT4_O_I3[1] +.sym 8524 w_rx_09_fifo_pulled_data[13] +.sym 8526 r_counter[0]_$glb_clk +.sym 8528 rx_09_fifo.wr_addr_gray_rd[7] +.sym 8529 rx_09_fifo.rd_addr_gray_SB_DFFESR_Q_2_D_SB_LUT4_I3_O_SB_LUT4_O_1_I1_SB_LUT4_O_I2[1] +.sym 8530 smi_ctrl_ins.o_smi_data_out_SB_DFFE_Q_1_D_SB_LUT4_O_I1[1] +.sym 8532 smi_ctrl_ins.o_smi_data_out_SB_DFFE_Q_1_D_SB_LUT4_O_I1[2] +.sym 8533 rx_09_fifo.rd_addr_gray_SB_DFFESR_Q_2_D_SB_LUT4_I3_O_SB_LUT4_O_1_I1_SB_LUT4_O_I2[0] +.sym 8534 rx_09_fifo.wr_addr_gray_rd[6] +.sym 8535 io_smi_data[1]$SB_IO_OUT +.sym 8536 rx_09_fifo.rd_addr_gray[0] +.sym 8541 $io_pmod[2]$iobuf_i +.sym 8542 w_rx_09_fifo_pulled_data[24] +.sym 8544 i_smi_a2_SB_LUT4_I1_O_SB_LUT4_I3_I2_SB_LUT4_O_I3[1] +.sym 8546 lvds_rx_09_inst.r_state_if_SB_LUT4_I2_O[0] +.sym 8550 rx_09_fifo.rd_addr_gray[5] +.sym 8551 w_rx_09_fifo_pulled_data[16] +.sym 8553 smi_ctrl_ins.o_smi_data_out_SB_DFFE_Q_1_D_SB_LUT4_O_I1[2] +.sym 8554 rx_09_fifo.rd_addr_gray_SB_DFFESR_Q_2_D_SB_LUT4_I3_O_SB_LUT4_O_1_I1_SB_LUT4_O_1_I0[1] +.sym 8556 rx_09_fifo.rd_addr_gray_wr_r[2] +.sym 8557 lvds_rx_09_inst.r_push_SB_LUT4_I3_O_SB_LUT4_O_2_I0[0] +.sym 8562 w_rx_09_fifo_pull +.sym 8569 i_smi_a2_SB_LUT4_I1_O_SB_LUT4_I3_I2_SB_LUT4_O_I3[1] +.sym 8570 w_rx_09_fifo_pulled_data[28] +.sym 8571 smi_ctrl_ins.o_smi_data_out_SB_DFFE_Q_D_SB_LUT4_O_I1_SB_LUT4_O_I3[3] +.sym 8572 smi_ctrl_ins.o_smi_data_out_SB_DFFE_Q_4_D_SB_LUT4_O_I1_SB_LUT4_O_I3[3] +.sym 8573 w_rx_09_fifo_pulled_data[12] +.sym 8576 w_rx_09_fifo_pulled_data[27] +.sym 8577 i_smi_a2_SB_LUT4_I1_O_SB_LUT4_I3_I2_SB_LUT4_O_I3[1] +.sym 8578 smi_ctrl_ins.o_smi_data_out_SB_DFFE_Q_D_SB_LUT4_O_I2_SB_LUT4_O_I3[3] +.sym 8579 w_rx_09_fifo_pulled_data[10] +.sym 8580 w_rx_09_fifo_pulled_data[11] +.sym 8581 smi_ctrl_ins.o_smi_data_out_SB_DFFE_Q_3_D_SB_LUT4_O_I1_SB_LUT4_O_I3[3] +.sym 8582 w_rx_09_fifo_pulled_data[26] +.sym 8583 rx_09_fifo.rd_addr_gray_wr[0] +.sym 8584 w_rx_09_fifo_pulled_data[31] +.sym 8586 rx_09_fifo.rd_addr_gray[2] +.sym 8588 w_rx_09_fifo_pulled_data[15] +.sym 8597 rx_09_fifo.rd_addr_gray_wr[2] +.sym 8598 rx_09_fifo.rd_addr_gray[5] +.sym 8602 i_smi_a2_SB_LUT4_I1_O_SB_LUT4_I3_I2_SB_LUT4_O_I3[1] +.sym 8603 w_rx_09_fifo_pulled_data[27] +.sym 8604 w_rx_09_fifo_pulled_data[11] +.sym 8605 smi_ctrl_ins.o_smi_data_out_SB_DFFE_Q_4_D_SB_LUT4_O_I1_SB_LUT4_O_I3[3] +.sym 8610 rx_09_fifo.rd_addr_gray_wr[0] +.sym 8614 i_smi_a2_SB_LUT4_I1_O_SB_LUT4_I3_I2_SB_LUT4_O_I3[1] +.sym 8615 w_rx_09_fifo_pulled_data[28] +.sym 8616 w_rx_09_fifo_pulled_data[12] +.sym 8617 smi_ctrl_ins.o_smi_data_out_SB_DFFE_Q_3_D_SB_LUT4_O_I1_SB_LUT4_O_I3[3] +.sym 8620 i_smi_a2_SB_LUT4_I1_O_SB_LUT4_I3_I2_SB_LUT4_O_I3[1] +.sym 8621 smi_ctrl_ins.o_smi_data_out_SB_DFFE_Q_D_SB_LUT4_O_I2_SB_LUT4_O_I3[3] +.sym 8622 w_rx_09_fifo_pulled_data[10] +.sym 8623 w_rx_09_fifo_pulled_data[26] +.sym 8627 rx_09_fifo.rd_addr_gray[2] +.sym 8632 i_smi_a2_SB_LUT4_I1_O_SB_LUT4_I3_I2_SB_LUT4_O_I3[1] +.sym 8633 smi_ctrl_ins.o_smi_data_out_SB_DFFE_Q_D_SB_LUT4_O_I1_SB_LUT4_O_I3[3] +.sym 8634 w_rx_09_fifo_pulled_data[15] +.sym 8635 w_rx_09_fifo_pulled_data[31] +.sym 8639 rx_09_fifo.rd_addr_gray_wr[2] +.sym 8647 rx_09_fifo.rd_addr_gray[5] .sym 8649 lvds_clock_buf -.sym 8652 lvds_rx_09_inst.r_push_SB_LUT4_I3_O_SB_LUT4_O_I3[1] -.sym 8653 lvds_rx_09_inst.r_push_SB_LUT4_I3_O_SB_LUT4_O_I3[2] -.sym 8654 lvds_rx_09_inst.r_push_SB_LUT4_I3_O_SB_LUT4_O_I3[3] -.sym 8655 lvds_rx_09_inst.r_push_SB_LUT4_I3_O_SB_LUT4_O_I3[4] -.sym 8656 lvds_rx_09_inst.r_push_SB_LUT4_I3_O_SB_LUT4_O_I3[5] -.sym 8657 lvds_rx_09_inst.r_push_SB_LUT4_I3_O[1] -.sym 8658 $io_pmod[4]$iobuf_i -.sym 8665 $PACKER_VCC_NET -.sym 8666 rx_09_fifo.rd_addr[3] -.sym 8667 io_pmod_SB_DFFSS_Q_D_SB_LUT4_O_I0_SB_LUT4_O_2_I0[2] -.sym 8670 rx_09_fifo.wr_addr[0] -.sym 8671 rx_09_fifo.rd_addr_gray_wr_r[0] -.sym 8672 rx_09_fifo.wr_addr[3] -.sym 8675 rx_24_fifo.rd_addr[0] -.sym 8677 rx_24_fifo.rd_addr[6] -.sym 8679 i_smi_soe_se$rename$0 -.sym 8680 io_pmod[2]$SB_IO_IN -.sym 8684 spi_if_ins.state_if_SB_DFFE_Q_E -.sym 8685 rx_24_fifo.rd_addr[5] -.sym 8692 rx_09_fifo.wr_addr[0] -.sym 8695 rx_09_fifo.rd_addr_gray_wr_r[0] -.sym 8696 smi_ctrl_ins.int_cnt_09[4] -.sym 8697 rx_09_fifo.full_o_SB_DFFSR_Q_D_SB_LUT4_O_I1_SB_LUT4_O_I0_SB_LUT4_O_1_I3[1] -.sym 8701 smi_ctrl_ins.int_cnt_09[5] -.sym 8703 i_smi_a2_SB_LUT4_I1_O_SB_LUT4_O_I3_SB_CARRY_CO_I1[5] -.sym 8704 i_smi_a2_SB_LUT4_I1_O[1] -.sym 8719 smi_ctrl_ins.r_fifo_09_pull_SB_DFFESR_Q_E -.sym 8722 i_smi_a2_SB_LUT4_I1_O_SB_LUT4_O_I3_SB_CARRY_CO_I1[4] -.sym 8724 $nextpnr_ICESTORM_LC_19$O -.sym 8726 i_smi_a2_SB_LUT4_I1_O_SB_LUT4_O_I3_SB_CARRY_CO_I1[4] -.sym 8730 $nextpnr_ICESTORM_LC_20$I3 -.sym 8732 i_smi_a2_SB_LUT4_I1_O_SB_LUT4_O_I3_SB_CARRY_CO_I1[5] -.sym 8740 $nextpnr_ICESTORM_LC_20$I3 -.sym 8744 smi_ctrl_ins.int_cnt_09[5] -.sym 8752 i_smi_a2_SB_LUT4_I1_O[1] -.sym 8763 smi_ctrl_ins.int_cnt_09[4] -.sym 8767 rx_09_fifo.full_o_SB_DFFSR_Q_D_SB_LUT4_O_I1_SB_LUT4_O_I0_SB_LUT4_O_1_I3[1] -.sym 8768 rx_09_fifo.wr_addr[0] -.sym 8769 rx_09_fifo.rd_addr_gray_wr_r[0] -.sym 8771 smi_ctrl_ins.r_fifo_09_pull_SB_DFFESR_Q_E -.sym 8772 r_counter[0]_$glb_clk -.sym 8773 i_smi_a1_SB_LUT4_I1_O_SB_LUT4_O_I2_SB_LUT4_I0_O[2]_$glb_sr -.sym 8774 smi_ctrl_ins.int_cnt_09_SB_DFFESR_Q_E_SB_LUT4_O_I1[0] -.sym 8775 i_smi_a2_SB_LUT4_I1_O[0] -.sym 8776 lvds_rx_09_inst.r_state_if_SB_LUT4_I2_O[0] -.sym 8777 rx_09_fifo.full_o_SB_DFFSR_Q_D_SB_LUT4_O_I1_SB_LUT4_O_I0[3] -.sym 8778 rx_09_fifo.full_o_SB_DFFSR_Q_D_SB_LUT4_O_I1_SB_LUT4_O_I0[2] -.sym 8779 rx_09_fifo.full_o_SB_DFFSR_Q_D_SB_LUT4_O_I1_SB_LUT4_O_I0[0] -.sym 8780 rx_09_fifo.full_o_SB_DFFSR_Q_D_SB_LUT4_O_I1[1] -.sym 8781 w_rx_09_fifo_push -.sym 8787 $PACKER_VCC_NET -.sym 8789 $PACKER_VCC_NET -.sym 8791 $io_pmod[4]$iobuf_i -.sym 8792 $PACKER_VCC_NET -.sym 8796 w_rx_09_fifo_pull -.sym 8797 $PACKER_VCC_NET -.sym 8799 spi_if_ins.o_load_cmd_SB_DFFESR_Q_D_SB_LUT4_I1_O[0] -.sym 8801 rx_24_fifo.rd_addr[2] -.sym 8808 lvds_rx_09_inst.r_push_SB_DFFNESR_Q_E -.sym 8815 $PACKER_VCC_NET -.sym 8818 i_smi_a2_SB_LUT4_I1_O_SB_LUT4_O_I3[3] -.sym 8819 i_smi_a2_SB_LUT4_I1_O[1] -.sym 8821 smi_ctrl_ins.int_cnt_09_SB_DFFESR_Q_E_SB_LUT4_O_I1[1] -.sym 8822 i_smi_a1_SB_LUT4_I1_O_SB_LUT4_O_I2_SB_LUT4_I0_O[2] -.sym 8823 i_smi_a1_SB_LUT4_I1_O[2] -.sym 8826 i_smi_a2_SB_LUT4_I1_O_SB_LUT4_O_I3_SB_CARRY_CO_I1[5] -.sym 8827 i_smi_a2_SB_LUT4_I1_O[3] -.sym 8828 spi_if_ins.r_tx_data_valid_SB_DFFESR_Q_D[0] -.sym 8829 i_smi_a2_SB_LUT4_I1_O_SB_LUT4_O_I3_SB_CARRY_CO_I1[4] -.sym 8833 spi_if_ins.state_if_SB_DFFE_Q_E -.sym 8836 spi_if_ins.state_if_SB_DFFESR_Q_D[2] -.sym 8839 i_smi_soe_se$rename$0 -.sym 8840 i_smi_a2_SB_LUT4_I1_O[0] -.sym 8844 smi_ctrl_ins.r_fifo_24_pull_SB_LUT4_I1_O[2] -.sym 8847 $nextpnr_ICESTORM_LC_1$O -.sym 8849 i_smi_a2_SB_LUT4_I1_O_SB_LUT4_O_I3[3] -.sym 8853 i_smi_a2_SB_LUT4_I1_O_SB_LUT4_O_I3[4] -.sym 8856 i_smi_a2_SB_LUT4_I1_O_SB_LUT4_O_I3_SB_CARRY_CO_I1[4] -.sym 8859 $nextpnr_ICESTORM_LC_2$I3 -.sym 8862 i_smi_a2_SB_LUT4_I1_O_SB_LUT4_O_I3_SB_CARRY_CO_I1[5] -.sym 8865 $nextpnr_ICESTORM_LC_2$COUT -.sym 8867 $PACKER_VCC_NET -.sym 8869 $nextpnr_ICESTORM_LC_2$I3 -.sym 8873 i_smi_soe_se$rename$0 -.sym 8874 smi_ctrl_ins.r_fifo_24_pull_SB_LUT4_I1_O[2] -.sym 8875 $nextpnr_ICESTORM_LC_2$COUT -.sym 8878 i_smi_a1_SB_LUT4_I1_O_SB_LUT4_O_I2_SB_LUT4_I0_O[2] -.sym 8881 smi_ctrl_ins.int_cnt_09_SB_DFFESR_Q_E_SB_LUT4_O_I1[1] -.sym 8884 i_smi_a2_SB_LUT4_I1_O[0] -.sym 8885 i_smi_a2_SB_LUT4_I1_O[3] -.sym 8886 i_smi_a2_SB_LUT4_I1_O[1] -.sym 8887 i_smi_a1_SB_LUT4_I1_O[2] -.sym 8892 spi_if_ins.state_if_SB_DFFESR_Q_D[2] -.sym 8894 spi_if_ins.state_if_SB_DFFE_Q_E -.sym 8895 r_counter[0]_$glb_clk -.sym 8896 spi_if_ins.r_tx_data_valid_SB_DFFESR_Q_D[0] -.sym 8897 spi_if_ins.state_if_SB_DFFESR_Q_D[0] -.sym 8899 spi_if_ins.state_if_SB_DFFE_Q_E -.sym 8901 spi_if_ins.state_if_SB_DFFE_Q_E -.sym 8902 spi_if_ins.state_if_SB_DFFESR_Q_D[2] -.sym 8904 spi_if_ins.state_if[1] -.sym 8912 smi_ctrl_ins.int_cnt_09[5] -.sym 8918 smi_ctrl_ins.int_cnt_09[3] -.sym 8920 smi_ctrl_ins.int_cnt_09[4] -.sym 8921 rx_24_fifo.rd_addr[1] -.sym 8923 rx_24_fifo.rd_addr_gray_SB_LUT4_I2_O[1] -.sym 8925 w_rx_24_fifo_pull -.sym 8927 rx_24_fifo.rd_addr_gray[2] -.sym 8928 smi_ctrl_ins.r_fifo_09_pull_SB_DFFESR_Q_E -.sym 8929 rx_24_fifo.rd_addr[0] -.sym 8930 spi_if_ins.state_if_SB_DFFESR_Q_D[0] -.sym 8931 rx_24_fifo.rd_addr_gray_SB_LUT4_I2_O[5] -.sym 8932 spi_if_ins.o_load_cmd_SB_DFFESR_Q_D[1] -.sym 8949 rx_24_fifo.rd_addr_gray_SB_LUT4_I2_O[1] -.sym 8954 rx_24_fifo.rd_addr[0] -.sym 8956 smi_ctrl_ins.r_fifo_24_pull_SB_LUT4_I3_1_O -.sym 8957 rx_24_fifo.rd_addr_gray_SB_LUT4_I2_O[5] -.sym 8958 rx_24_fifo.rd_addr_gray_SB_DFFESR_Q_7_D_SB_LUT4_I3_O_SB_LUT4_O_2_I0_SB_LUT4_O_1_I3[1] -.sym 8960 rx_24_fifo.rd_addr_gray_SB_DFFESR_Q_7_D_SB_LUT4_I3_O_SB_LUT4_O_2_I0_SB_LUT4_O_1_I3[2] -.sym 8964 smi_ctrl_ins.int_cnt_09[3] -.sym 8966 rx_24_fifo.rd_addr_gray_SB_LUT4_I2_O[6] -.sym 8968 rx_24_fifo.rd_addr_gray_SB_LUT4_I2_O[7] -.sym 8971 rx_24_fifo.rd_addr[0] -.sym 8979 rx_24_fifo.rd_addr_gray_SB_LUT4_I2_O[6] -.sym 8991 smi_ctrl_ins.int_cnt_09[3] -.sym 8995 rx_24_fifo.rd_addr_gray_SB_LUT4_I2_O[1] -.sym 9003 rx_24_fifo.rd_addr_gray_SB_LUT4_I2_O[5] -.sym 9008 rx_24_fifo.rd_addr_gray_SB_LUT4_I2_O[7] -.sym 9014 rx_24_fifo.rd_addr_gray_SB_DFFESR_Q_7_D_SB_LUT4_I3_O_SB_LUT4_O_2_I0_SB_LUT4_O_1_I3[2] -.sym 9016 rx_24_fifo.rd_addr_gray_SB_DFFESR_Q_7_D_SB_LUT4_I3_O_SB_LUT4_O_2_I0_SB_LUT4_O_1_I3[1] -.sym 9017 smi_ctrl_ins.r_fifo_24_pull_SB_LUT4_I3_1_O -.sym 9018 r_counter[0]_$glb_clk -.sym 9019 i_smi_a1_SB_LUT4_I1_O_SB_LUT4_O_I2_SB_LUT4_I0_O[2]_$glb_sr -.sym 9020 w_fetch -.sym 9021 rx_24_fifo.rd_addr_gray_SB_DFFESR_Q_7_D_SB_LUT4_I3_O_SB_LUT4_O_I0[3] -.sym 9022 smi_ctrl_ins.r_fifo_24_pull_SB_LUT4_I3_1_O -.sym 9023 rx_24_fifo.rd_addr_gray_SB_DFFESR_Q_7_D_SB_LUT4_I3_O_SB_LUT4_O_2_I0[2] -.sym 9024 smi_ctrl_ins.r_fifo_24_pull_SB_LUT4_I3_1_O -.sym 9026 rx_24_fifo.rd_addr_gray_SB_DFFESR_Q_7_D_SB_LUT4_I3_O[0] -.sym 9027 rx_24_fifo.rd_addr_gray_SB_DFFESR_Q_7_D_SB_LUT4_I3_O_SB_LUT4_O_I0[0] -.sym 9045 smi_ctrl_ins.r_fifo_24_pull_SB_LUT4_I3_1_O -.sym 9046 smi_ctrl_ins.o_data_out_SB_DFFESS_Q_E -.sym 9050 rx_24_fifo.rd_addr_gray_SB_DFFESR_Q_7_D_SB_LUT4_I3_O_SB_LUT4_O_2_I0_SB_LUT4_O_1_I3[0] -.sym 9053 rx_24_fifo.rd_addr[7] -.sym 9054 rx_24_fifo.rd_addr_gray_SB_DFFESR_Q_7_D_SB_LUT4_I3_O_SB_LUT4_O_I0_SB_LUT4_O_2_I0[2] -.sym 9062 rx_24_fifo.wr_addr_gray[6] -.sym 9065 rx_24_fifo.wr_addr_gray_rd[6] -.sym 9068 rx_24_fifo.wr_addr[7] -.sym 9070 rx_24_fifo.rd_addr[4] -.sym 9071 rx_24_fifo.rd_addr[2] -.sym 9072 rx_24_fifo.wr_addr_gray_rd[7] -.sym 9073 rx_24_fifo.rd_addr[3] -.sym 9075 rx_24_fifo.wr_addr_gray_rd[3] -.sym 9076 rx_24_fifo.rd_addr_gray_SB_DFFESR_Q_7_D_SB_LUT4_I3_O_SB_LUT4_O_2_I0_SB_LUT4_O_1_I3[0] -.sym 9081 rx_24_fifo.wr_addr_gray[3] -.sym 9084 rx_24_fifo.rd_addr_gray_SB_DFFESR_Q_7_D_SB_LUT4_I3_O_SB_LUT4_O_I0_SB_LUT4_O_2_I0[0] -.sym 9086 rx_24_fifo.rd_addr_gray_SB_DFFESR_Q_7_D_SB_LUT4_I3_O_SB_LUT4_O_I0_SB_LUT4_O_2_I0[2] -.sym 9094 rx_24_fifo.rd_addr_gray_SB_DFFESR_Q_7_D_SB_LUT4_I3_O_SB_LUT4_O_I0_SB_LUT4_O_2_I0[2] -.sym 9095 rx_24_fifo.rd_addr_gray_SB_DFFESR_Q_7_D_SB_LUT4_I3_O_SB_LUT4_O_I0_SB_LUT4_O_2_I0[0] -.sym 9096 rx_24_fifo.rd_addr[4] -.sym 9097 rx_24_fifo.rd_addr[3] -.sym 9102 rx_24_fifo.wr_addr_gray_rd[3] -.sym 9106 rx_24_fifo.wr_addr_gray_rd[6] -.sym 9114 rx_24_fifo.wr_addr[7] -.sym 9119 rx_24_fifo.wr_addr_gray[6] -.sym 9127 rx_24_fifo.wr_addr_gray_rd[7] -.sym 9132 rx_24_fifo.wr_addr_gray[3] -.sym 9136 rx_24_fifo.rd_addr[2] -.sym 9139 rx_24_fifo.rd_addr_gray_SB_DFFESR_Q_7_D_SB_LUT4_I3_O_SB_LUT4_O_2_I0_SB_LUT4_O_1_I3[0] +.sym 8651 w_smi_data_output[6] +.sym 8652 io_smi_data[2]$SB_IO_OUT +.sym 8653 w_smi_data_output[7] +.sym 8654 w_smi_data_output[1] +.sym 8655 w_smi_data_output[3] +.sym 8656 io_smi_data[3]$SB_IO_OUT +.sym 8657 w_smi_data_output[2] +.sym 8658 w_smi_data_output[4] +.sym 8663 i_smi_a2_SB_LUT4_I1_O_SB_LUT4_I3_I2_SB_LUT4_O_I3[1] +.sym 8665 i_smi_a2_SB_LUT4_I1_O_SB_LUT4_I3_I2[1] +.sym 8666 w_rx_09_fifo_pulled_data[30] +.sym 8667 io_pmod[4]$SB_IO_IN +.sym 8670 w_rx_09_fifo_pull +.sym 8672 i_smi_a2_SB_LUT4_I1_O_SB_LUT4_I3_I2_SB_LUT4_O_I3[1] +.sym 8675 lvds_rx_09_inst.r_state_if_SB_LUT4_I2_O[0] +.sym 8677 smi_ctrl_ins.o_data_out_SB_DFFESS_Q_E +.sym 8684 i_smi_soe_se$rename$0 +.sym 8693 rx_09_fifo.rd_addr_gray[3] +.sym 8695 i_smi_a3$SB_IO_IN +.sym 8696 rx_09_fifo.rd_addr_gray_wr[4] +.sym 8697 rx_09_fifo.rd_addr_gray[4] +.sym 8716 w_smi_data_output[6] +.sym 8727 rx_09_fifo.rd_addr_gray_wr[4] +.sym 8745 rx_09_fifo.rd_addr_gray[3] +.sym 8750 rx_09_fifo.rd_addr_gray[4] +.sym 8762 i_smi_a3$SB_IO_IN +.sym 8764 w_smi_data_output[6] +.sym 8772 lvds_clock_buf +.sym 8774 i_smi_a2_SB_LUT4_I1_O_SB_LUT4_I3_1_I2_SB_LUT4_O_I3[1] +.sym 8775 smi_ctrl_ins.o_smi_data_out_SB_DFFE_Q_1_D_SB_LUT4_O_I1[3] +.sym 8776 smi_ctrl_ins.int_cnt_24[4] +.sym 8777 smi_ctrl_ins.o_smi_data_out_SB_DFFE_Q_3_D_SB_LUT4_O_I1[3] +.sym 8778 smi_ctrl_ins.o_smi_data_out_SB_DFFE_Q_D_SB_LUT4_O_I1[3] +.sym 8779 smi_ctrl_ins.o_smi_data_out_SB_DFFE_Q_D_SB_LUT4_O_I2[3] +.sym 8780 smi_ctrl_ins.o_smi_data_out_SB_DFFE_Q_4_D_SB_LUT4_O_I1[3] +.sym 8781 smi_ctrl_ins.o_smi_data_out_SB_DFFE_Q_6_D_SB_LUT4_O_I1[3] +.sym 8791 i_smi_a3$SB_IO_IN +.sym 8800 smi_ctrl_ins.o_smi_data_out_SB_DFFE_Q_D_SB_LUT4_O_I1_SB_LUT4_O_1_I3[2] +.sym 8806 smi_ctrl_ins.o_smi_data_out_SB_DFFE_Q_4_D_SB_LUT4_O_I1_SB_LUT4_O_1_I1[2] +.sym 8807 i_smi_a2_SB_LUT4_I1_O_SB_LUT4_I3_1_I2_SB_LUT4_O_I3[1] +.sym 8818 rx_09_fifo.rd_addr_gray_wr[3] +.sym 8821 rx_09_fifo.rd_addr_gray_wr[5] +.sym 8824 w_rx_24_fifo_pulled_data[14] +.sym 8830 w_rx_24_fifo_pulled_data[11] +.sym 8831 i_smi_a2_SB_LUT4_I1_O_SB_LUT4_I3_1_I2_SB_LUT4_O_I3[1] +.sym 8832 w_rx_24_fifo_pulled_data[12] +.sym 8833 w_rx_24_fifo_pulled_data[2] +.sym 8834 w_rx_24_fifo_pulled_data[3] +.sym 8835 w_rx_24_fifo_pulled_data[4] +.sym 8836 w_rx_24_fifo_pulled_data[10] +.sym 8837 w_rx_24_fifo_pulled_data[6] +.sym 8838 w_rx_24_fifo_pulled_data[15] +.sym 8839 i_smi_a2_SB_LUT4_I1_O_SB_LUT4_I3_1_I2_SB_LUT4_O_I3[1] +.sym 8840 w_rx_24_fifo_pulled_data[1] +.sym 8842 w_rx_24_fifo_pulled_data[9] +.sym 8845 i_smi_a2_SB_LUT4_I1_O_SB_LUT4_I3_1_I2[1] +.sym 8846 w_rx_24_fifo_pulled_data[7] +.sym 8848 i_smi_a2_SB_LUT4_I1_O_SB_LUT4_I3_1_I2_SB_LUT4_O_I3[1] +.sym 8849 w_rx_24_fifo_pulled_data[15] +.sym 8850 w_rx_24_fifo_pulled_data[7] +.sym 8851 i_smi_a2_SB_LUT4_I1_O_SB_LUT4_I3_1_I2[1] +.sym 8854 i_smi_a2_SB_LUT4_I1_O_SB_LUT4_I3_1_I2_SB_LUT4_O_I3[1] +.sym 8855 w_rx_24_fifo_pulled_data[14] +.sym 8856 i_smi_a2_SB_LUT4_I1_O_SB_LUT4_I3_1_I2[1] +.sym 8857 w_rx_24_fifo_pulled_data[6] +.sym 8860 i_smi_a2_SB_LUT4_I1_O_SB_LUT4_I3_1_I2_SB_LUT4_O_I3[1] +.sym 8861 i_smi_a2_SB_LUT4_I1_O_SB_LUT4_I3_1_I2[1] +.sym 8862 w_rx_24_fifo_pulled_data[4] +.sym 8863 w_rx_24_fifo_pulled_data[12] +.sym 8867 rx_09_fifo.rd_addr_gray_wr[5] +.sym 8872 i_smi_a2_SB_LUT4_I1_O_SB_LUT4_I3_1_I2_SB_LUT4_O_I3[1] +.sym 8873 i_smi_a2_SB_LUT4_I1_O_SB_LUT4_I3_1_I2[1] +.sym 8874 w_rx_24_fifo_pulled_data[2] +.sym 8875 w_rx_24_fifo_pulled_data[10] +.sym 8878 i_smi_a2_SB_LUT4_I1_O_SB_LUT4_I3_1_I2[1] +.sym 8879 w_rx_24_fifo_pulled_data[9] +.sym 8880 i_smi_a2_SB_LUT4_I1_O_SB_LUT4_I3_1_I2_SB_LUT4_O_I3[1] +.sym 8881 w_rx_24_fifo_pulled_data[1] +.sym 8887 rx_09_fifo.rd_addr_gray_wr[3] +.sym 8890 i_smi_a2_SB_LUT4_I1_O_SB_LUT4_I3_1_I2[1] +.sym 8891 i_smi_a2_SB_LUT4_I1_O_SB_LUT4_I3_1_I2_SB_LUT4_O_I3[1] +.sym 8892 w_rx_24_fifo_pulled_data[3] +.sym 8893 w_rx_24_fifo_pulled_data[11] +.sym 8895 lvds_clock_buf +.sym 8898 smi_ctrl_ins.o_smi_data_out_SB_DFFE_Q_1_D_SB_LUT4_O_I1_SB_LUT4_O_1_I1[2] +.sym 8899 w_tx_data_smi[1] +.sym 8900 smi_ctrl_ins.o_smi_data_out_SB_DFFE_Q_1_D_SB_LUT4_O_I1_SB_LUT4_O_1_I1[3] +.sym 8901 smi_ctrl_ins.o_smi_data_out_SB_DFFE_Q_2_D_SB_LUT4_O_I1[3] +.sym 8902 w_tx_data_smi[2] +.sym 8903 i_smi_a2_SB_LUT4_I1_O_SB_LUT4_I3_1_I2[1] +.sym 8916 i_smi_a2_SB_LUT4_I1_O_SB_LUT4_I3_1_I2_SB_LUT4_O_I3[1] +.sym 8921 smi_ctrl_ins.o_smi_data_out_SB_DFFE_Q_D_SB_LUT4_O_I1_SB_LUT4_O_1_I1[2] +.sym 8922 i_smi_a3$SB_IO_IN +.sym 8923 i_smi_a1_SB_LUT4_I1_O_SB_LUT4_O_I0[3] +.sym 8925 smi_ctrl_ins.o_smi_data_out_SB_DFFE_Q_6_D_SB_LUT4_O_I1_SB_LUT4_O_1_I1[2] +.sym 8928 w_rx_24_fifo_pull +.sym 8929 smi_ctrl_ins.o_smi_data_out_SB_DFFE_Q_3_D_SB_LUT4_O_I1_SB_LUT4_O_1_I1[2] +.sym 8931 w_rx_24_fifo_data[16] +.sym 8938 w_rx_24_fifo_data[14] +.sym 8939 w_rx_24_fifo_data[16] +.sym 8942 w_rx_24_fifo_data[11] +.sym 8943 lvds_rx_24_inst.r_state_if_SB_LUT4_I2_O[0] +.sym 8945 w_rx_24_fifo_data[15] +.sym 8946 i_smi_a2_SB_LUT4_I1_O_SB_LUT4_I3_1_I2_SB_LUT4_O_I3[1] +.sym 8950 w_rx_24_fifo_data[3] +.sym 8951 w_rx_24_fifo_pulled_data[5] +.sym 8952 w_rx_24_fifo_data[13] +.sym 8956 w_rx_24_fifo_data[1] +.sym 8959 w_rx_24_fifo_pulled_data[13] +.sym 8960 i_smi_a2_SB_LUT4_I1_O_SB_LUT4_I3_1_I2[1] +.sym 8972 lvds_rx_24_inst.r_state_if_SB_LUT4_I2_O[0] +.sym 8974 w_rx_24_fifo_data[15] +.sym 8978 w_rx_24_fifo_data[14] +.sym 8979 lvds_rx_24_inst.r_state_if_SB_LUT4_I2_O[0] +.sym 8984 w_rx_24_fifo_data[16] +.sym 8986 lvds_rx_24_inst.r_state_if_SB_LUT4_I2_O[0] +.sym 8989 lvds_rx_24_inst.r_state_if_SB_LUT4_I2_O[0] +.sym 8991 w_rx_24_fifo_data[3] +.sym 8997 w_rx_24_fifo_data[1] +.sym 8998 lvds_rx_24_inst.r_state_if_SB_LUT4_I2_O[0] +.sym 9001 i_smi_a2_SB_LUT4_I1_O_SB_LUT4_I3_1_I2_SB_LUT4_O_I3[1] +.sym 9002 w_rx_24_fifo_pulled_data[5] +.sym 9003 w_rx_24_fifo_pulled_data[13] +.sym 9004 i_smi_a2_SB_LUT4_I1_O_SB_LUT4_I3_1_I2[1] +.sym 9007 w_rx_24_fifo_data[11] +.sym 9008 lvds_rx_24_inst.r_state_if_SB_LUT4_I2_O[0] +.sym 9013 w_rx_24_fifo_data[13] +.sym 9015 lvds_rx_24_inst.r_state_if_SB_LUT4_I2_O[0] +.sym 9017 w_lvds_rx_24_d1_SB_LUT4_I0_O_SB_LUT4_I3_O_$glb_ce +.sym 9018 lvds_clock_buf +.sym 9019 i_smi_a1_SB_LUT4_I1_O[3]_$glb_sr +.sym 9021 rx_24_fifo.rd_addr_gray_SB_LUT4_I2_O[1] +.sym 9022 rx_24_fifo.rd_addr_gray_SB_LUT4_I2_O[2] +.sym 9023 rx_24_fifo.rd_addr_gray_SB_LUT4_I2_O[3] +.sym 9024 rx_24_fifo.rd_addr_gray_SB_LUT4_I2_O[4] +.sym 9025 rx_24_fifo.rd_addr_gray_SB_LUT4_I2_O[5] +.sym 9026 rx_24_fifo.rd_addr_gray_SB_LUT4_I2_O[6] +.sym 9027 rx_24_fifo.rd_addr_gray_SB_LUT4_I2_O[7] +.sym 9032 w_rx_24_fifo_pulled_data[30] +.sym 9033 w_rx_24_fifo_pull +.sym 9034 w_rx_24_fifo_pulled_data[22] +.sym 9045 w_rx_09_fifo_push +.sym 9047 w_rx_24_fifo_empty +.sym 9048 i_smi_a1_SB_LUT4_I1_O[3] +.sym 9052 i_smi_a2_SB_LUT4_I1_O_SB_LUT4_I3_1_I2[1] +.sym 9065 w_rx_24_fifo_pulled_data[0] +.sym 9069 w_rx_24_fifo_pulled_data[8] +.sym 9072 smi_ctrl_ins.r_fifo_24_pull_SB_LUT4_I3_1_O +.sym 9074 smi_ctrl_ins.o_smi_data_out_SB_DFFE_Q_7_D_SB_LUT4_O_I0_SB_LUT4_O_I3[3] +.sym 9075 i_smi_a2_SB_LUT4_I1_O_SB_LUT4_I3_1_I2[1] +.sym 9076 rx_24_fifo.empty_o_SB_LUT4_I3_I2[1] +.sym 9077 i_smi_a2_SB_LUT4_I1_O_SB_LUT4_I3_1_I2_SB_LUT4_O_I3[1] +.sym 9078 w_rx_24_fifo_pulled_data[24] +.sym 9079 rx_24_fifo.rd_addr_gray_SB_LUT4_I2_O[2] +.sym 9080 w_rx_24_fifo_pulled_data[19] +.sym 9082 w_rx_24_fifo_pulled_data[21] +.sym 9084 rx_24_fifo.rd_addr_gray_SB_LUT4_I2_O[7] +.sym 9085 w_rx_24_fifo_pulled_data[16] +.sym 9087 w_rx_24_fifo_pulled_data[18] +.sym 9088 w_rx_24_fifo_pulled_data[29] +.sym 9090 w_rx_24_fifo_pulled_data[26] +.sym 9092 w_rx_24_fifo_pulled_data[27] +.sym 9097 rx_24_fifo.rd_addr_gray_SB_LUT4_I2_O[7] +.sym 9100 w_rx_24_fifo_pulled_data[18] +.sym 9101 i_smi_a2_SB_LUT4_I1_O_SB_LUT4_I3_1_I2_SB_LUT4_O_I3[1] +.sym 9102 i_smi_a2_SB_LUT4_I1_O_SB_LUT4_I3_1_I2[1] +.sym 9103 w_rx_24_fifo_pulled_data[26] +.sym 9106 i_smi_a2_SB_LUT4_I1_O_SB_LUT4_I3_1_I2_SB_LUT4_O_I3[1] +.sym 9107 i_smi_a2_SB_LUT4_I1_O_SB_LUT4_I3_1_I2[1] +.sym 9108 w_rx_24_fifo_pulled_data[29] +.sym 9109 w_rx_24_fifo_pulled_data[21] +.sym 9115 rx_24_fifo.rd_addr_gray_SB_LUT4_I2_O[2] +.sym 9118 i_smi_a2_SB_LUT4_I1_O_SB_LUT4_I3_1_I2_SB_LUT4_O_I3[1] +.sym 9119 w_rx_24_fifo_pulled_data[19] +.sym 9120 w_rx_24_fifo_pulled_data[27] +.sym 9121 i_smi_a2_SB_LUT4_I1_O_SB_LUT4_I3_1_I2[1] +.sym 9124 w_rx_24_fifo_pulled_data[16] +.sym 9125 i_smi_a2_SB_LUT4_I1_O_SB_LUT4_I3_1_I2_SB_LUT4_O_I3[1] +.sym 9126 i_smi_a2_SB_LUT4_I1_O_SB_LUT4_I3_1_I2[1] +.sym 9127 w_rx_24_fifo_pulled_data[0] +.sym 9130 smi_ctrl_ins.o_smi_data_out_SB_DFFE_Q_7_D_SB_LUT4_O_I0_SB_LUT4_O_I3[3] +.sym 9131 w_rx_24_fifo_pulled_data[24] +.sym 9132 i_smi_a2_SB_LUT4_I1_O_SB_LUT4_I3_1_I2_SB_LUT4_O_I3[1] +.sym 9133 w_rx_24_fifo_pulled_data[8] +.sym 9139 rx_24_fifo.empty_o_SB_LUT4_I3_I2[1] +.sym 9140 smi_ctrl_ins.r_fifo_24_pull_SB_LUT4_I3_1_O .sym 9141 r_counter[0]_$glb_clk -.sym 9143 spi_if_ins.o_load_cmd_SB_DFFESR_Q_E -.sym 9144 rx_24_fifo.rd_addr_gray_SB_DFFESR_Q_7_D_SB_LUT4_I3_O_SB_LUT4_O_I0_SB_LUT4_O_1_I0[0] -.sym 9145 rx_24_fifo.rd_addr_gray_wr[7] -.sym 9147 rx_24_fifo.rd_addr_gray_wr_r[7] -.sym 9148 spi_if_ins.state_if_SB_DFFESR_Q_1_R -.sym 9150 rx_24_fifo.rd_addr_gray_SB_DFFESR_Q_7_D_SB_LUT4_I3_O_SB_LUT4_O_I0[2] -.sym 9156 rx_24_fifo.rd_addr[4] -.sym 9157 w_rx_24_fifo_data[20] -.sym 9162 w_fetch -.sym 9165 spi_if_ins.o_cs_SB_DFFESR_Q_R[0] -.sym 9167 rx_24_fifo.rd_addr[0] -.sym 9168 rx_24_fifo.rd_addr_gray_SB_DFFESR_Q_6_D[2] -.sym 9169 rx_24_fifo.rd_addr[6] -.sym 9176 w_rx_24_fifo_empty -.sym 9177 rx_24_fifo.rd_addr[5] -.sym 9186 rx_24_fifo.rd_addr[6] -.sym 9190 rx_24_fifo.rd_addr[3] -.sym 9193 rx_24_fifo.rd_addr[1] -.sym 9194 rx_24_fifo.rd_addr[5] -.sym 9196 rx_24_fifo.rd_addr[7] -.sym 9201 rx_24_fifo.rd_addr[0] -.sym 9204 rx_24_fifo.rd_addr[0] -.sym 9205 rx_24_fifo.rd_addr[4] -.sym 9214 rx_24_fifo.rd_addr[2] -.sym 9216 $nextpnr_ICESTORM_LC_9$O -.sym 9218 rx_24_fifo.rd_addr[0] -.sym 9222 rx_24_fifo.rd_addr_gray_SB_LUT4_I2_I3[2] -.sym 9224 rx_24_fifo.rd_addr[1] -.sym 9226 rx_24_fifo.rd_addr[0] -.sym 9228 rx_24_fifo.rd_addr_gray_SB_LUT4_I2_I3[3] -.sym 9230 rx_24_fifo.rd_addr[2] -.sym 9232 rx_24_fifo.rd_addr_gray_SB_LUT4_I2_I3[2] -.sym 9234 rx_24_fifo.rd_addr_gray_SB_LUT4_I2_I3[4] -.sym 9236 rx_24_fifo.rd_addr[3] -.sym 9238 rx_24_fifo.rd_addr_gray_SB_LUT4_I2_I3[3] -.sym 9240 rx_24_fifo.rd_addr_gray_SB_LUT4_I2_I3[5] -.sym 9242 rx_24_fifo.rd_addr[4] -.sym 9244 rx_24_fifo.rd_addr_gray_SB_LUT4_I2_I3[4] -.sym 9246 rx_24_fifo.rd_addr_gray_SB_LUT4_I2_I3[6] -.sym 9249 rx_24_fifo.rd_addr[5] -.sym 9250 rx_24_fifo.rd_addr_gray_SB_LUT4_I2_I3[5] -.sym 9252 rx_24_fifo.rd_addr_gray_SB_LUT4_I2_I3[7] -.sym 9255 rx_24_fifo.rd_addr[6] -.sym 9256 rx_24_fifo.rd_addr_gray_SB_LUT4_I2_I3[6] -.sym 9259 rx_24_fifo.rd_addr[7] -.sym 9262 rx_24_fifo.rd_addr_gray_SB_LUT4_I2_I3[7] -.sym 9266 w_load -.sym 9267 rx_24_fifo.rd_addr_gray_SB_DFFESR_Q_7_D_SB_LUT4_I3_O[3] -.sym 9268 rx_24_fifo.rd_addr_gray_SB_DFFESR_Q_7_D[1] -.sym 9269 rx_24_fifo.rd_addr_gray_SB_DFFESR_Q_7_D_SB_LUT4_I3_O_SB_LUT4_O_2_I0[3] -.sym 9271 rx_24_fifo.rd_addr_gray_SB_DFFESR_Q_6_D[1] -.sym 9272 rx_24_fifo.rd_addr_gray_SB_DFFESR_Q_6_D[3] -.sym 9279 spi_if_ins.r_tx_data_valid_SB_DFFESR_Q_D[0] -.sym 9282 $PACKER_VCC_NET -.sym 9286 rx_24_fifo.rd_addr[3] -.sym 9291 rx_24_fifo.rd_addr_gray_SB_DFFESR_Q_7_D_SB_LUT4_I3_O_SB_LUT4_O_2_I0_SB_LUT4_O_1_I3[1] -.sym 9297 rx_24_fifo.rd_addr_gray_SB_DFFESR_Q_6_D[0] -.sym 9298 rx_24_fifo.rd_addr_gray_SB_DFFESR_Q_3_D[1] -.sym 9300 rx_24_fifo.rd_addr[2] -.sym 9301 rx_24_fifo.rd_addr_gray_SB_DFFESR_Q_7_D[0] -.sym 9310 rx_24_fifo.rd_addr_gray_SB_DFFESR_Q_7_D_SB_LUT4_I3_O_SB_LUT4_O_2_I0_SB_LUT4_O_1_I3[2] -.sym 9311 rx_24_fifo.rd_addr_gray_SB_LUT4_I2_O[4] -.sym 9312 rx_24_fifo.rd_addr_gray_SB_LUT4_I2_O[5] -.sym 9313 w_rx_24_fifo_full -.sym 9317 rx_24_fifo.rd_addr_gray_SB_DFFESR_Q_7_D_SB_LUT4_I3_O_SB_LUT4_O_2_I0_SB_LUT4_O_1_I3[1] -.sym 9318 smi_ctrl_ins.o_data_out_SB_DFFESS_Q_E -.sym 9320 io_ctrl_ins.o_data_out_SB_DFFESR_Q_6_R[0] -.sym 9321 rx_24_fifo.rd_addr_gray_SB_LUT4_I2_O[6] -.sym 9325 rx_24_fifo.rd_addr_gray_SB_DFFESR_Q_7_D_SB_LUT4_I3_O_SB_LUT4_O_2_I0_SB_LUT4_O_1_I3[3] -.sym 9326 rx_24_fifo.rd_addr_gray_SB_DFFESR_Q_7_D_SB_LUT4_I3_O_SB_LUT4_O_I0_SB_LUT4_O_2_I0[2] -.sym 9327 rx_24_fifo.rd_addr_gray_SB_DFFESR_Q_7_D_SB_LUT4_I3_O_SB_LUT4_O_2_I0_SB_LUT4_O_1_I3[0] -.sym 9340 rx_24_fifo.rd_addr_gray_SB_LUT4_I2_O[4] -.sym 9343 rx_24_fifo.rd_addr_gray_SB_LUT4_I2_O[5] -.sym 9346 rx_24_fifo.rd_addr_gray_SB_LUT4_I2_O[6] -.sym 9348 rx_24_fifo.rd_addr_gray_SB_LUT4_I2_O[5] -.sym 9352 rx_24_fifo.rd_addr_gray_SB_LUT4_I2_O[4] -.sym 9353 rx_24_fifo.rd_addr_gray_SB_DFFESR_Q_7_D_SB_LUT4_I3_O_SB_LUT4_O_I0_SB_LUT4_O_2_I0[2] -.sym 9378 w_rx_24_fifo_full -.sym 9382 rx_24_fifo.rd_addr_gray_SB_DFFESR_Q_7_D_SB_LUT4_I3_O_SB_LUT4_O_2_I0_SB_LUT4_O_1_I3[1] -.sym 9383 rx_24_fifo.rd_addr_gray_SB_DFFESR_Q_7_D_SB_LUT4_I3_O_SB_LUT4_O_2_I0_SB_LUT4_O_1_I3[3] -.sym 9384 rx_24_fifo.rd_addr_gray_SB_DFFESR_Q_7_D_SB_LUT4_I3_O_SB_LUT4_O_2_I0_SB_LUT4_O_1_I3[2] -.sym 9385 rx_24_fifo.rd_addr_gray_SB_DFFESR_Q_7_D_SB_LUT4_I3_O_SB_LUT4_O_2_I0_SB_LUT4_O_1_I3[0] -.sym 9386 smi_ctrl_ins.o_data_out_SB_DFFESS_Q_E -.sym 9387 r_counter[0]_$glb_clk -.sym 9388 io_ctrl_ins.o_data_out_SB_DFFESR_Q_6_R[0] -.sym 9389 rx_24_fifo.rd_addr_gray_SB_DFFESR_Q_7_D_SB_LUT4_I3_O[2] -.sym 9390 rx_24_fifo.rd_addr_gray_SB_DFFESR_Q_7_D_SB_LUT4_I3_O[1] -.sym 9391 rx_24_fifo.rd_addr_gray_SB_DFFESR_Q_7_D_SB_LUT4_I3_O_SB_LUT4_O_1_I3[3] -.sym 9393 w_rx_24_fifo_empty -.sym 9395 rx_24_fifo.rd_addr_gray_SB_DFFESR_Q_7_D_SB_LUT4_I3_O_SB_LUT4_O_2_I0[1] -.sym 9408 io_ctrl_ins.o_data_out_SB_DFFESR_Q_6_R[0] -.sym 9413 rx_24_fifo.rd_addr_gray_SB_DFFESR_Q_7_D_SB_LUT4_I3_O_SB_LUT4_O_2_I0_SB_LUT4_O_1_I3[0] -.sym 9420 spi_if_ins.o_load_cmd_SB_DFFESR_Q_E -.sym 9422 w_tx_data_smi[3] -.sym 9437 rx_24_fifo.rd_addr_gray[3] -.sym 9442 rx_24_fifo.rd_addr_gray_wr[6] -.sym 9455 rx_24_fifo.rd_addr_gray_wr[3] -.sym 9469 rx_24_fifo.rd_addr_gray[3] -.sym 9476 rx_24_fifo.rd_addr_gray_wr[6] -.sym 9508 rx_24_fifo.rd_addr_gray_wr[3] -.sym 9510 lvds_clock_buf -.sym 9513 rx_24_fifo.rd_addr_gray_SB_DFFESR_Q_3_D[0] -.sym 9514 rx_24_fifo.wr_addr_gray_rd[1] -.sym 9515 rx_24_fifo.rd_addr_gray_SB_DFFESR_Q_6_D[0] -.sym 9516 rx_24_fifo.wr_addr_gray_rd[0] -.sym 9517 rx_24_fifo.rd_addr_gray_SB_DFFESR_Q_7_D[0] -.sym 9518 rx_24_fifo.rd_addr_gray_SB_DFFESR_Q_7_D_SB_LUT4_I3_O_SB_LUT4_O_2_I0_SB_LUT4_O_1_I3[0] -.sym 9519 rx_24_fifo.rd_addr_gray_SB_DFFESR_Q_3_D[3] -.sym 9529 io_ctrl_ins.o_data_out_SB_DFFESR_Q_E[3] -.sym 9538 smi_ctrl_ins.r_fifo_24_pull_SB_LUT4_I3_1_O -.sym 9541 rx_24_fifo.rd_addr_gray_SB_DFFESR_Q_7_D_SB_LUT4_I3_O_SB_LUT4_O_2_I0_SB_LUT4_O_1_I3[0] -.sym 9556 rx_24_fifo.rd_addr_gray_SB_DFFESR_Q_7_D_SB_LUT4_I3_O_SB_LUT4_O_2_I0_SB_LUT4_O_1_I3[2] -.sym 9558 rx_24_fifo.rd_addr_gray_SB_LUT4_I2_O[4] -.sym 9561 rx_24_fifo.rd_addr_gray_SB_DFFESR_Q_7_D_SB_LUT4_I3_O_SB_LUT4_O_2_I0_SB_LUT4_O_1_I3[1] -.sym 9563 rx_24_fifo.rd_addr_gray_SB_DFFESR_Q_3_D[2] -.sym 9564 smi_ctrl_ins.r_fifo_24_pull_SB_LUT4_I3_1_O -.sym 9594 rx_24_fifo.rd_addr_gray_SB_DFFESR_Q_3_D[2] -.sym 9613 rx_24_fifo.rd_addr_gray_SB_LUT4_I2_O[4] -.sym 9618 rx_24_fifo.rd_addr_gray_SB_DFFESR_Q_7_D_SB_LUT4_I3_O_SB_LUT4_O_2_I0_SB_LUT4_O_1_I3[1] -.sym 9625 rx_24_fifo.rd_addr_gray_SB_DFFESR_Q_7_D_SB_LUT4_I3_O_SB_LUT4_O_2_I0_SB_LUT4_O_1_I3[2] -.sym 9628 rx_24_fifo.rd_addr_gray_SB_LUT4_I2_O[4] -.sym 9630 rx_24_fifo.rd_addr_gray_SB_DFFESR_Q_7_D_SB_LUT4_I3_O_SB_LUT4_O_2_I0_SB_LUT4_O_1_I3[2] -.sym 9632 smi_ctrl_ins.r_fifo_24_pull_SB_LUT4_I3_1_O +.sym 9142 i_smi_a1_SB_LUT4_I1_O[3]_$glb_sr +.sym 9143 rx_24_fifo.empty_o_SB_DFFSS_Q_D_SB_LUT4_O_I0_SB_LUT4_O_2_I3[2] +.sym 9144 rx_24_fifo.rd_addr[1] +.sym 9145 smi_ctrl_ins.r_fifo_24_pull_SB_LUT4_I3_O_SB_LUT4_I3_O[3] +.sym 9146 rx_24_fifo.rd_addr_gray_SB_DFFESR_Q_7_D[1] +.sym 9147 rx_24_fifo.empty_o_SB_DFFSS_Q_D_SB_LUT4_O_I0_SB_LUT4_O_I0_SB_LUT4_O_I0[2] +.sym 9148 rx_24_fifo.empty_o_SB_DFFSS_Q_D_SB_LUT4_O_I0_SB_LUT4_O_2_I3[1] +.sym 9149 rx_24_fifo.empty_o_SB_DFFSS_Q_D_SB_LUT4_O_I0[2] +.sym 9150 rx_24_fifo.empty_o_SB_DFFSS_Q_D_SB_LUT4_O_I0_SB_LUT4_O_I0_SB_LUT4_O_I0[3] +.sym 9159 spi_if_ins.state_if[0] +.sym 9163 rx_24_fifo.empty_o_SB_DFFSS_Q_D_SB_LUT4_O_I0_SB_LUT4_O_2_I3_SB_LUT4_O_I0[1] +.sym 9170 $PACKER_VCC_NET +.sym 9171 lvds_rx_09_inst.r_state_if_SB_LUT4_I2_O[0] +.sym 9173 smi_ctrl_ins.o_data_out_SB_DFFESS_Q_E +.sym 9175 spi_if_ins.w_rx_data[6] +.sym 9184 i_smi_a2_SB_LUT4_I1_O_SB_LUT4_I3_1_I2_SB_LUT4_O_I3[1] +.sym 9185 w_rx_24_fifo_pulled_data[17] +.sym 9187 rx_24_fifo.empty_o_SB_DFFSS_Q_D_SB_LUT4_O_I0_SB_LUT4_O_2_I3[3] +.sym 9188 rx_24_fifo.empty_o_SB_DFFSS_Q_D_SB_LUT4_O_I0_SB_LUT4_O_2_I3_SB_LUT4_O_I0[0] +.sym 9191 w_rx_24_fifo_pulled_data[23] +.sym 9192 rx_24_fifo.empty_o_SB_DFFSS_Q_D_SB_LUT4_O_I0_SB_LUT4_O_I0[3] +.sym 9193 rx_24_fifo.empty_o_SB_DFFSS_Q_D_SB_LUT4_O_I0[1] +.sym 9195 rx_24_fifo.empty_o_SB_DFFSS_Q_D_SB_LUT4_O_I0_SB_LUT4_O_2_I3_SB_LUT4_O_I0[1] +.sym 9196 w_rx_24_fifo_pulled_data[20] +.sym 9198 rx_24_fifo.empty_o_SB_DFFSS_Q_D_SB_LUT4_O_I0[0] +.sym 9199 rx_24_fifo.empty_o_SB_LUT4_I3_I2[1] +.sym 9200 rx_24_fifo.empty_o_SB_DFFSS_Q_D_SB_LUT4_O_I0_SB_LUT4_O_2_I3[2] +.sym 9204 w_rx_24_fifo_pulled_data[28] +.sym 9205 rx_24_fifo.empty_o_SB_DFFSS_Q_D_SB_LUT4_O_I0_SB_LUT4_O_2_I3[1] +.sym 9206 rx_24_fifo.empty_o_SB_DFFSS_Q_D_SB_LUT4_O_I0[3] +.sym 9207 rx_24_fifo.empty_o_SB_DFFSS_Q_D_SB_LUT4_O_I0_SB_LUT4_O_2_I3_SB_LUT4_O_I0[2] +.sym 9209 w_rx_24_fifo_pulled_data[25] +.sym 9212 i_smi_a2_SB_LUT4_I1_O_SB_LUT4_I3_1_I2[1] +.sym 9213 rx_24_fifo.empty_o_SB_DFFSS_Q_D_SB_LUT4_O_I0_SB_LUT4_O_2_I3[0] +.sym 9214 rx_24_fifo.empty_o_SB_DFFSS_Q_D_SB_LUT4_O_I0[2] +.sym 9215 w_rx_24_fifo_pulled_data[31] +.sym 9217 w_rx_24_fifo_pulled_data[31] +.sym 9218 w_rx_24_fifo_pulled_data[23] +.sym 9219 i_smi_a2_SB_LUT4_I1_O_SB_LUT4_I3_1_I2_SB_LUT4_O_I3[1] +.sym 9220 i_smi_a2_SB_LUT4_I1_O_SB_LUT4_I3_1_I2[1] +.sym 9223 rx_24_fifo.empty_o_SB_DFFSS_Q_D_SB_LUT4_O_I0_SB_LUT4_O_2_I3[1] +.sym 9224 rx_24_fifo.empty_o_SB_DFFSS_Q_D_SB_LUT4_O_I0_SB_LUT4_O_2_I3[2] +.sym 9225 rx_24_fifo.empty_o_SB_DFFSS_Q_D_SB_LUT4_O_I0_SB_LUT4_O_2_I3[3] +.sym 9226 rx_24_fifo.empty_o_SB_DFFSS_Q_D_SB_LUT4_O_I0_SB_LUT4_O_2_I3[0] +.sym 9229 w_rx_24_fifo_pulled_data[25] +.sym 9230 w_rx_24_fifo_pulled_data[17] +.sym 9231 i_smi_a2_SB_LUT4_I1_O_SB_LUT4_I3_1_I2_SB_LUT4_O_I3[1] +.sym 9232 i_smi_a2_SB_LUT4_I1_O_SB_LUT4_I3_1_I2[1] +.sym 9235 rx_24_fifo.empty_o_SB_DFFSS_Q_D_SB_LUT4_O_I0_SB_LUT4_O_2_I3[1] +.sym 9236 rx_24_fifo.empty_o_SB_DFFSS_Q_D_SB_LUT4_O_I0_SB_LUT4_O_2_I3_SB_LUT4_O_I0[1] +.sym 9237 rx_24_fifo.empty_o_SB_DFFSS_Q_D_SB_LUT4_O_I0_SB_LUT4_O_2_I3_SB_LUT4_O_I0[2] +.sym 9238 rx_24_fifo.empty_o_SB_DFFSS_Q_D_SB_LUT4_O_I0_SB_LUT4_O_2_I3_SB_LUT4_O_I0[0] +.sym 9241 w_rx_24_fifo_pulled_data[28] +.sym 9242 i_smi_a2_SB_LUT4_I1_O_SB_LUT4_I3_1_I2[1] +.sym 9243 i_smi_a2_SB_LUT4_I1_O_SB_LUT4_I3_1_I2_SB_LUT4_O_I3[1] +.sym 9244 w_rx_24_fifo_pulled_data[20] +.sym 9248 rx_24_fifo.empty_o_SB_LUT4_I3_I2[1] +.sym 9256 rx_24_fifo.empty_o_SB_DFFSS_Q_D_SB_LUT4_O_I0_SB_LUT4_O_I0[3] +.sym 9259 rx_24_fifo.empty_o_SB_DFFSS_Q_D_SB_LUT4_O_I0[0] +.sym 9260 rx_24_fifo.empty_o_SB_DFFSS_Q_D_SB_LUT4_O_I0[1] +.sym 9261 rx_24_fifo.empty_o_SB_DFFSS_Q_D_SB_LUT4_O_I0[2] +.sym 9262 rx_24_fifo.empty_o_SB_DFFSS_Q_D_SB_LUT4_O_I0[3] +.sym 9264 r_counter[0]_$glb_clk +.sym 9265 i_smi_a1_SB_LUT4_I1_O[3]_$glb_sr +.sym 9266 smi_ctrl_ins.r_fifo_24_pull_SB_LUT4_I3_O_SB_LUT4_I3_O[1] +.sym 9267 smi_ctrl_ins.r_fifo_24_pull_SB_LUT4_I3_O_SB_LUT4_I3_O[2] +.sym 9268 w_cs[2] +.sym 9269 smi_ctrl_ins.r_fifo_24_pull_SB_LUT4_I3_O_SB_LUT4_I3_O[0] +.sym 9270 w_cs[1] +.sym 9271 rx_24_fifo.empty_o_SB_LUT4_I3_I2[2] +.sym 9272 rx_24_fifo.empty_o_SB_DFFSS_Q_D_SB_LUT4_O_I0[3] +.sym 9273 w_cs[3] +.sym 9278 $PACKER_VCC_NET +.sym 9280 $PACKER_VCC_NET +.sym 9284 $PACKER_VCC_NET +.sym 9285 rx_24_fifo.empty_o_SB_DFFSS_Q_D_SB_LUT4_O_I0_SB_LUT4_O_2_I3[2] +.sym 9287 rx_24_fifo.rd_addr[1] +.sym 9292 rx_24_fifo.empty_o_SB_DFFSS_Q_D_SB_LUT4_O_I0_SB_LUT4_O_2_I3_SB_LUT4_O_I0[2] +.sym 9293 lvds_rx_09_inst.r_state_if[1] +.sym 9296 rx_24_fifo.rd_addr_gray_SB_DFFESR_Q_7_D[3] +.sym 9298 rx_24_fifo.empty_o_SB_DFFSS_Q_D_SB_LUT4_O_I0_SB_LUT4_O_2_I3[0] +.sym 9299 lvds_rx_09_inst.r_state_if_SB_LUT4_I2_O[0] +.sym 9300 rx_24_fifo.rd_addr_gray_SB_DFFESR_Q_7_D[0] +.sym 9307 rx_24_fifo.empty_o_SB_DFFSS_Q_D_SB_LUT4_O_I0_SB_LUT4_O_2_I3[2] +.sym 9308 rx_24_fifo.rd_addr_gray_SB_DFFESR_Q_5_D[1] +.sym 9309 rx_24_fifo.empty_o_SB_DFFSS_Q_D_SB_LUT4_O_I0_SB_LUT4_O_I0[3] +.sym 9310 rx_24_fifo.empty_o_SB_DFFSS_Q_D_SB_LUT4_O_I0_SB_LUT4_O_I0[2] +.sym 9311 rx_24_fifo.empty_o_SB_DFFSS_Q_D_SB_LUT4_O_I0_SB_LUT4_O_I0_SB_LUT4_O_I0[2] +.sym 9312 rx_24_fifo.empty_o_SB_DFFSS_Q_D_SB_LUT4_O_I0_SB_LUT4_O_I0[0] +.sym 9314 rx_24_fifo.empty_o_SB_DFFSS_Q_D_SB_LUT4_O_I0_SB_LUT4_O_I0_SB_LUT4_O_I0[3] +.sym 9315 rx_24_fifo.rd_addr_gray_SB_DFFESR_Q_3_D[0] +.sym 9316 rx_24_fifo.rd_addr[1] +.sym 9319 rx_24_fifo.empty_o_SB_DFFSS_Q_D_SB_LUT4_O_I0_SB_LUT4_O_I0_SB_LUT4_O_I0[1] +.sym 9322 rx_24_fifo.empty_o_SB_DFFSS_Q_D_SB_LUT4_O_I0_SB_LUT4_O_I0[1] +.sym 9323 rx_24_fifo.empty_o_SB_DFFSS_Q_D_SB_LUT4_O_I0_SB_LUT4_O_I0_SB_LUT4_O_I0[0] +.sym 9330 rx_24_fifo.rd_addr_gray_wr[3] +.sym 9337 rx_24_fifo.rd_addr_gray_SB_DFFESR_Q_7_D[3] +.sym 9342 rx_24_fifo.empty_o_SB_DFFSS_Q_D_SB_LUT4_O_I0_SB_LUT4_O_2_I3[2] +.sym 9343 rx_24_fifo.rd_addr_gray_SB_DFFESR_Q_3_D[0] +.sym 9346 rx_24_fifo.rd_addr_gray_wr[3] +.sym 9354 rx_24_fifo.empty_o_SB_DFFSS_Q_D_SB_LUT4_O_I0_SB_LUT4_O_I0[3] +.sym 9359 rx_24_fifo.empty_o_SB_DFFSS_Q_D_SB_LUT4_O_I0_SB_LUT4_O_I0_SB_LUT4_O_I0[2] +.sym 9360 rx_24_fifo.rd_addr_gray_SB_DFFESR_Q_5_D[1] +.sym 9366 rx_24_fifo.rd_addr[1] +.sym 9367 rx_24_fifo.rd_addr_gray_SB_DFFESR_Q_7_D[3] +.sym 9370 rx_24_fifo.empty_o_SB_DFFSS_Q_D_SB_LUT4_O_I0_SB_LUT4_O_I0_SB_LUT4_O_I0[3] +.sym 9371 rx_24_fifo.empty_o_SB_DFFSS_Q_D_SB_LUT4_O_I0_SB_LUT4_O_I0_SB_LUT4_O_I0[2] +.sym 9372 rx_24_fifo.empty_o_SB_DFFSS_Q_D_SB_LUT4_O_I0_SB_LUT4_O_I0_SB_LUT4_O_I0[1] +.sym 9373 rx_24_fifo.empty_o_SB_DFFSS_Q_D_SB_LUT4_O_I0_SB_LUT4_O_I0_SB_LUT4_O_I0[0] +.sym 9376 rx_24_fifo.empty_o_SB_DFFSS_Q_D_SB_LUT4_O_I0_SB_LUT4_O_I0[3] +.sym 9377 rx_24_fifo.empty_o_SB_DFFSS_Q_D_SB_LUT4_O_I0_SB_LUT4_O_I0[2] +.sym 9378 rx_24_fifo.empty_o_SB_DFFSS_Q_D_SB_LUT4_O_I0_SB_LUT4_O_I0[1] +.sym 9379 rx_24_fifo.empty_o_SB_DFFSS_Q_D_SB_LUT4_O_I0_SB_LUT4_O_I0[0] +.sym 9383 rx_24_fifo.rd_addr[1] +.sym 9387 lvds_clock_buf +.sym 9391 w_tx_data_smi[0] +.sym 9392 w_tx_data_smi[3] +.sym 9405 rx_24_fifo.empty_o_SB_DFFSS_Q_D_SB_LUT4_O_I0_SB_LUT4_O_I0[3] +.sym 9414 w_tx_data_sys[0] +.sym 9416 rx_24_fifo.rd_addr_gray_wr[3] +.sym 9418 i_smi_a3$SB_IO_IN +.sym 9419 rx_24_fifo.empty_o_SB_DFFSS_Q_D_SB_LUT4_O_I0_SB_LUT4_O_I0[1] +.sym 9433 rx_24_fifo.wr_addr_gray_rd[5] +.sym 9435 rx_24_fifo.wr_addr_gray_rd[7] +.sym 9436 rx_24_fifo.wr_addr_gray_rd[6] +.sym 9437 rx_24_fifo.wr_addr_gray[6] +.sym 9451 rx_24_fifo.wr_addr_gray[5] +.sym 9453 lvds_rx_09_inst.r_state_if[1] +.sym 9455 lvds_rx_09_inst.r_state_if[0] +.sym 9459 rx_24_fifo.wr_addr[7] +.sym 9461 rx_24_fifo.wr_addr_gray_rd[4] +.sym 9463 rx_24_fifo.wr_addr_gray_rd[4] +.sym 9470 rx_24_fifo.wr_addr_gray_rd[6] +.sym 9477 lvds_rx_09_inst.r_state_if[0] +.sym 9478 lvds_rx_09_inst.r_state_if[1] +.sym 9481 rx_24_fifo.wr_addr_gray[5] +.sym 9488 rx_24_fifo.wr_addr_gray_rd[5] +.sym 9494 rx_24_fifo.wr_addr[7] +.sym 9500 rx_24_fifo.wr_addr_gray[6] +.sym 9505 rx_24_fifo.wr_addr_gray_rd[7] +.sym 9510 r_counter[0]_$glb_clk +.sym 9514 r_tx_data[0] +.sym 9515 spi_if_ins.o_cs_SB_LUT4_I3_1_O +.sym 9520 io_pmod[2]$SB_IO_IN +.sym 9530 lvds_rx_09_inst.r_state_if_SB_LUT4_I2_O[0] +.sym 9532 w_cs[0] +.sym 9534 i_config_SB_LUT4_I3_I2[0] +.sym 9537 w_rx_09_fifo_push +.sym 9545 i_smi_a1_SB_LUT4_I1_O[3] +.sym 9569 rx_24_fifo.wr_addr_gray_rd[1] +.sym 9571 rx_24_fifo.wr_addr_gray_rd[3] +.sym 9575 rx_24_fifo.wr_addr_gray_rd[0] +.sym 9579 rx_24_fifo.wr_addr_gray_rd[2] +.sym 9594 rx_24_fifo.wr_addr_gray_rd[2] +.sym 9605 rx_24_fifo.wr_addr_gray_rd[1] +.sym 9612 rx_24_fifo.wr_addr_gray_rd[3] +.sym 9617 rx_24_fifo.wr_addr_gray_rd[0] .sym 9633 r_counter[0]_$glb_clk -.sym 9634 i_smi_a1_SB_LUT4_I1_O_SB_LUT4_O_I2_SB_LUT4_I0_O[2]_$glb_sr -.sym 9635 rx_24_fifo.wr_addr_gray_rd[5] -.sym 9640 rx_24_fifo.wr_addr_gray_rd[4] -.sym 9642 rx_24_fifo.wr_addr_gray_rd[2] -.sym 9659 rx_24_fifo.wr_addr[0] -.sym 9664 rx_24_fifo.wr_addr_gray_SB_LUT4_I2_1_O[3] -.sym 9667 rx_24_fifo.wr_addr[5] -.sym 9680 rx_24_fifo.wr_addr_gray_SB_LUT4_I2_1_O[4] -.sym 9682 rx_24_fifo.wr_addr_gray_SB_LUT4_I2_1_O[5] -.sym 9684 rx_24_fifo.wr_addr_gray_SB_LUT4_I2_1_O[6] -.sym 9685 rx_24_fifo.wr_addr_gray_SB_DFFESR_Q_6_D[2] -.sym 9688 rx_24_fifo.wr_addr_gray_SB_LUT4_I2_1_O[3] -.sym 9689 rx_24_fifo.wr_addr_gray_SB_DFFESR_Q_6_D[1] -.sym 9694 lvds_rx_24_inst.r_push_SB_LUT4_I3_O -.sym 9696 rx_24_fifo.wr_addr[0] -.sym 9702 rx_24_fifo.wr_addr_gray_SB_DFFESR_Q_7_D[1] -.sym 9704 rx_24_fifo.wr_addr_gray_SB_DFFESR_Q_7_D[2] -.sym 9711 rx_24_fifo.wr_addr_gray_SB_LUT4_I2_1_O[5] -.sym 9717 rx_24_fifo.wr_addr_gray_SB_DFFESR_Q_7_D[2] -.sym 9724 rx_24_fifo.wr_addr_gray_SB_DFFESR_Q_7_D[1] -.sym 9730 rx_24_fifo.wr_addr_gray_SB_DFFESR_Q_6_D[1] -.sym 9733 rx_24_fifo.wr_addr[0] -.sym 9741 rx_24_fifo.wr_addr_gray_SB_LUT4_I2_1_O[6] -.sym 9742 rx_24_fifo.wr_addr_gray_SB_LUT4_I2_1_O[5] -.sym 9745 rx_24_fifo.wr_addr_gray_SB_LUT4_I2_1_O[4] -.sym 9746 rx_24_fifo.wr_addr_gray_SB_LUT4_I2_1_O[3] -.sym 9754 rx_24_fifo.wr_addr_gray_SB_DFFESR_Q_6_D[2] -.sym 9755 lvds_rx_24_inst.r_push_SB_LUT4_I3_O +.sym 9636 rx_24_fifo.rd_addr_gray_wr[3] +.sym 9637 rx_24_fifo.rd_addr_gray_wr[4] +.sym 9638 rx_24_fifo.rd_addr_gray_wr_r[2] +.sym 9640 rx_24_fifo.rd_addr_gray_wr[6] +.sym 9641 rx_24_fifo.rd_addr_gray_wr[1] +.sym 9656 $PACKER_VCC_NET +.sym 9659 rx_24_fifo.wr_addr_gray_SB_DFFESR_Q_6_D[1] +.sym 9661 rx_24_fifo.full_o_SB_LUT4_I3_O[1] +.sym 9662 $PACKER_VCC_NET +.sym 9665 rx_24_fifo.wr_addr_gray_SB_DFFESR_Q_7_D[3] +.sym 9678 lvds_rx_09_inst.r_push_SB_DFFNESR_Q_E +.sym 9683 w_rx_09_fifo_full +.sym 9702 lvds_rx_09_inst.r_state_if[1] +.sym 9705 lvds_rx_09_inst.r_state_if[0] +.sym 9745 lvds_rx_09_inst.r_state_if[0] +.sym 9746 w_rx_09_fifo_full +.sym 9748 lvds_rx_09_inst.r_state_if[1] +.sym 9755 lvds_rx_09_inst.r_push_SB_DFFNESR_Q_E .sym 9756 lvds_clock_buf -.sym 9757 i_smi_a1_SB_LUT4_I1_O_SB_LUT4_O_I2_SB_LUT4_I0_O[2]_$glb_sr -.sym 9793 i_smi_a1_SB_LUT4_I1_O_SB_LUT4_O_I2_SB_LUT4_I0_O[2] -.sym 9801 rx_24_fifo.rd_addr_gray[5] -.sym 9865 rx_24_fifo.rd_addr_gray[5] -.sym 9879 lvds_clock_buf -.sym 10138 o_shdn_rx_lna$SB_IO_OUT -.sym 10147 o_shdn_tx_lna$SB_IO_OUT -.sym 10163 o_shdn_rx_lna$SB_IO_OUT +.sym 9757 i_smi_a1_SB_LUT4_I1_O[3]_$glb_sr +.sym 9758 rx_24_fifo.rd_addr_gray_wr[2] +.sym 9772 $PACKER_VCC_NET +.sym 9788 lvds_rx_09_inst.r_state_if[1] +.sym 9791 lvds_rx_09_inst.r_state_if[0] +.sym 9792 lvds_rx_09_inst.r_state_if_SB_LUT4_I2_O[0] +.sym 9801 rx_24_fifo.wr_addr_gray[3] +.sym 9802 rx_24_fifo.wr_addr_gray[4] +.sym 9803 rx_24_fifo.wr_addr_gray[2] +.sym 9808 rx_24_fifo.wr_addr_gray[0] +.sym 9812 lvds_rx_09_inst.r_state_if_SB_DFFNESR_Q_E_SB_LUT4_O_I2_SB_LUT4_O_I2_SB_LUT4_I2_O[0] +.sym 9814 rx_24_fifo.wr_addr_gray[1] +.sym 9815 i_smi_a1_SB_LUT4_I1_O[3] +.sym 9822 lvds_rx_09_inst.r_state_if[0] +.sym 9833 rx_24_fifo.wr_addr_gray[4] +.sym 9839 rx_24_fifo.wr_addr_gray[2] +.sym 9844 lvds_rx_09_inst.r_state_if_SB_DFFNESR_Q_E_SB_LUT4_O_I2_SB_LUT4_O_I2_SB_LUT4_I2_O[0] +.sym 9846 i_smi_a1_SB_LUT4_I1_O[3] +.sym 9847 lvds_rx_09_inst.r_state_if[0] +.sym 9858 rx_24_fifo.wr_addr_gray[1] +.sym 9863 rx_24_fifo.wr_addr_gray[3] +.sym 9877 rx_24_fifo.wr_addr_gray[0] +.sym 9879 r_counter[0]_$glb_clk +.sym 9881 rx_24_fifo.rd_addr_gray[0] +.sym 9897 i_smi_a1_SB_LUT4_I1_O_SB_LUT4_I3_O[3] +.sym 9905 i_smi_a3$SB_IO_IN +.sym 9925 rx_24_fifo.wr_addr_gray_SB_LUT4_I2_O[3] +.sym 9930 rx_24_fifo.wr_addr_gray_SB_DFFESR_Q_6_D[2] +.sym 9931 rx_24_fifo.wr_addr_gray_SB_DFFESR_Q_6_D[1] +.sym 9933 rx_24_fifo.full_o_SB_LUT4_I3_O[1] +.sym 9937 rx_24_fifo.wr_addr_gray_SB_DFFESR_Q_7_D[3] +.sym 9938 rx_24_fifo.wr_addr_gray_SB_LUT4_I2_O[4] +.sym 9940 lvds_rx_24_inst.r_push_SB_LUT4_I3_O +.sym 9962 rx_24_fifo.wr_addr_gray_SB_DFFESR_Q_7_D[3] +.sym 9968 rx_24_fifo.wr_addr_gray_SB_LUT4_I2_O[3] +.sym 9969 rx_24_fifo.wr_addr_gray_SB_LUT4_I2_O[4] +.sym 9976 rx_24_fifo.full_o_SB_LUT4_I3_O[1] +.sym 9982 rx_24_fifo.wr_addr_gray_SB_DFFESR_Q_6_D[2] +.sym 9998 rx_24_fifo.wr_addr_gray_SB_DFFESR_Q_6_D[1] +.sym 10001 lvds_rx_24_inst.r_push_SB_LUT4_I3_O +.sym 10002 lvds_clock_buf +.sym 10003 i_smi_a1_SB_LUT4_I1_O[3]_$glb_sr +.sym 10004 rx_24_fifo.rd_addr_gray_wr[0] +.sym 10029 i_smi_a2$SB_IO_IN +.sym 10069 rx_24_fifo.rd_addr_gray_wr[0] +.sym 10115 rx_24_fifo.rd_addr_gray_wr[0] +.sym 10125 lvds_clock_buf .sym 10172 o_shdn_rx_lna$SB_IO_OUT .sym 10181 o_shdn_rx_lna$SB_IO_OUT +.sym 10197 o_shdn_rx_lna$SB_IO_OUT .sym 10201 io_smi_data[2]$SB_IO_OUT .sym 10204 io_smi_data[1]$SB_IO_OUT -.sym 10217 io_smi_data[1]$SB_IO_OUT +.sym 10213 io_smi_data[1]$SB_IO_OUT .sym 10223 io_smi_data[2]$SB_IO_OUT -.sym 10226 rx_09_fifo.rd_addr_gray_wr_r[5] -.sym 10227 rx_09_fifo.full_o_SB_DFFSR_Q_D_SB_LUT4_O_I1_SB_LUT4_O_I0[1] -.sym 10228 rx_09_fifo.full_o_SB_DFFSR_Q_D_SB_LUT4_O_I1_SB_LUT4_O_I0_SB_LUT4_O_I0[1] -.sym 10229 io_smi_data[3]$SB_IO_OUT -.sym 10230 io_smi_data[4]$SB_IO_OUT -.sym 10232 rx_09_fifo.rd_addr_gray_wr[6] -.sym 10233 rx_09_fifo.rd_addr_gray_wr_r[6] -.sym 10241 lvds_rx_09_inst.r_state_if_SB_LUT4_I2_O[0] -.sym 10268 io_pmod[7]$SB_IO_IN -.sym 10272 lvds_rx_09_inst.o_fifo_data[7] -.sym 10278 lvds_rx_09_inst.o_fifo_data[9] -.sym 10281 lvds_rx_09_inst.r_state_if_SB_LUT4_I2_O[0] -.sym 10289 io_pmod[6]$SB_IO_IN -.sym 10291 lvds_rx_09_inst.o_fifo_data[13] -.sym 10298 lvds_rx_09_inst.o_fifo_data[11] -.sym 10308 lvds_rx_09_inst.r_state_if_SB_LUT4_I2_O[0] -.sym 10309 lvds_rx_09_inst.o_fifo_data[13] -.sym 10313 lvds_rx_09_inst.o_fifo_data[7] -.sym 10315 lvds_rx_09_inst.r_state_if_SB_LUT4_I2_O[0] -.sym 10319 io_pmod[6]$SB_IO_IN -.sym 10320 lvds_rx_09_inst.r_state_if_SB_LUT4_I2_O[0] -.sym 10325 lvds_rx_09_inst.r_state_if_SB_LUT4_I2_O[0] -.sym 10327 io_pmod[7]$SB_IO_IN -.sym 10338 lvds_rx_09_inst.o_fifo_data[9] -.sym 10339 lvds_rx_09_inst.r_state_if_SB_LUT4_I2_O[0] -.sym 10345 lvds_rx_09_inst.o_fifo_data[11] -.sym 10346 lvds_rx_09_inst.r_state_if_SB_LUT4_I2_O[0] -.sym 10347 w_lvds_rx_09_d1_SB_LUT4_I0_O_SB_LUT4_I3_O_$glb_ce -.sym 10348 lvds_clock_buf -.sym 10349 i_smi_a1_SB_LUT4_I1_O_SB_LUT4_O_I2_SB_LUT4_I0_O[2]_$glb_sr -.sym 10355 rx_09_fifo.wr_addr[7] -.sym 10356 rx_09_fifo.wr_addr_gray[5] -.sym 10359 smi_ctrl_ins.r_fifo_09_pull_SB_LUT4_I3_1_O -.sym 10360 rx_09_fifo.wr_addr_gray[6] -.sym 10361 rx_09_fifo.wr_addr_gray[4] -.sym 10378 io_smi_data[0]$SB_IO_OUT -.sym 10383 io_pmod[6]$SB_IO_IN -.sym 10384 rx_09_fifo.rd_addr_gray_wr_r[6] -.sym 10385 lvds_rx_09_inst.o_fifo_data[13] -.sym 10388 rx_09_fifo.full_o_SB_DFFSR_Q_D_SB_LUT4_O_I1_SB_LUT4_O_I0[1] -.sym 10389 lvds_rx_09_inst.o_fifo_data[15] -.sym 10391 rx_09_fifo.full_o_SB_DFFSR_Q_D_SB_LUT4_O_I1_SB_LUT4_O_I0_SB_LUT4_O_I0[1] -.sym 10392 lvds_rx_09_inst.o_fifo_data[9] -.sym 10393 io_smi_data[7]$SB_IO_OUT -.sym 10403 rx_09_fifo.wr_addr[7] -.sym 10405 $PACKER_VCC_NET -.sym 10406 rx_09_fifo.rd_addr_gray[6] -.sym 10407 lvds_rx_09_inst.o_fifo_data[15] -.sym 10414 lvds_rx_09_inst.o_fifo_data[24] -.sym 10419 io_pmod_SB_DFFSS_Q_D_SB_LUT4_O_I0_SB_LUT4_O_I0[1] -.sym 10420 lvds_rx_09_inst.o_fifo_data[28] -.sym 10431 smi_ctrl_ins.int_cnt_09[3] -.sym 10433 w_smi_data_output[1] -.sym 10435 smi_ctrl_ins.int_cnt_09[4] -.sym 10437 w_smi_data_output[2] -.sym 10448 w_smi_data_output[7] -.sym 10455 i_smi_a3$SB_IO_IN -.sym 10459 $PACKER_VCC_NET -.sym 10460 smi_ctrl_ins.r_fifo_09_pull_SB_LUT4_I3_1_O -.sym 10464 w_smi_data_output[2] -.sym 10467 i_smi_a3$SB_IO_IN -.sym 10470 i_smi_a3$SB_IO_IN -.sym 10471 w_smi_data_output[1] -.sym 10476 smi_ctrl_ins.int_cnt_09[3] -.sym 10477 $PACKER_VCC_NET -.sym 10478 smi_ctrl_ins.int_cnt_09[4] -.sym 10483 smi_ctrl_ins.r_fifo_09_pull_SB_LUT4_I3_1_O -.sym 10494 i_smi_a3$SB_IO_IN -.sym 10496 w_smi_data_output[7] -.sym 10513 lvds_rx_09_inst.r_push_SB_LUT4_I3_1_O -.sym 10514 rx_09_fifo.full_o_SB_LUT4_I3_O_SB_LUT4_I3_O[3] -.sym 10515 rx_09_fifo.full_o_SB_LUT4_I3_O_SB_LUT4_I3_O[2] -.sym 10516 io_pmod_SB_DFFSS_Q_D_SB_LUT4_O_I0_SB_LUT4_O_I0[1] -.sym 10517 rx_09_fifo.wr_addr_gray_SB_DFFESR_Q_3_D[2] -.sym 10518 rx_09_fifo.rd_addr_gray[6] -.sym 10519 rx_09_fifo.wr_addr_gray_SB_DFFESR_Q_3_D[1] -.sym 10520 rx_09_fifo.wr_addr_gray_SB_DFFESR_Q_4_D[2] -.sym 10525 io_pmod[7]$SB_IO_IN -.sym 10533 w_smi_data_output[2] -.sym 10534 rx_09_fifo.wr_addr[7] -.sym 10538 rx_09_fifo.rd_addr_gray_wr_r[5] -.sym 10539 rx_09_fifo.wr_addr_gray_SB_LUT4_I2_1_O[7] -.sym 10542 rx_09_fifo.wr_addr[0] -.sym 10544 w_rx_09_fifo_pull -.sym 10546 rx_09_fifo.full_o_SB_DFFSR_Q_D_SB_LUT4_O_I1_SB_LUT4_O_I0_SB_LUT4_O_1_I3[0] -.sym 10558 lvds_rx_09_inst.o_fifo_data[20] -.sym 10561 lvds_rx_09_inst.o_fifo_data[17] -.sym 10564 lvds_rx_09_inst.o_fifo_data[19] -.sym 10567 lvds_rx_09_inst.o_fifo_data[26] -.sym 10571 lvds_rx_09_inst.o_fifo_data[22] -.sym 10573 lvds_rx_09_inst.o_fifo_data[15] -.sym 10578 lvds_rx_09_inst.o_fifo_data[24] -.sym 10579 lvds_rx_09_inst.r_state_if_SB_LUT4_I2_O[0] -.sym 10581 rx_09_fifo.full_o_SB_LUT4_I3_O[2] -.sym 10582 rx_09_fifo.wr_addr_gray_SB_LUT4_I2_1_O[4] -.sym 10587 lvds_rx_09_inst.r_state_if_SB_LUT4_I2_O[0] -.sym 10590 lvds_rx_09_inst.o_fifo_data[22] -.sym 10594 lvds_rx_09_inst.o_fifo_data[20] -.sym 10596 lvds_rx_09_inst.r_state_if_SB_LUT4_I2_O[0] -.sym 10599 lvds_rx_09_inst.r_state_if_SB_LUT4_I2_O[0] -.sym 10600 lvds_rx_09_inst.o_fifo_data[17] -.sym 10606 lvds_rx_09_inst.o_fifo_data[26] -.sym 10608 lvds_rx_09_inst.r_state_if_SB_LUT4_I2_O[0] -.sym 10612 rx_09_fifo.wr_addr_gray_SB_LUT4_I2_1_O[4] -.sym 10613 rx_09_fifo.full_o_SB_LUT4_I3_O[2] -.sym 10618 lvds_rx_09_inst.r_state_if_SB_LUT4_I2_O[0] -.sym 10619 lvds_rx_09_inst.o_fifo_data[24] -.sym 10623 lvds_rx_09_inst.r_state_if_SB_LUT4_I2_O[0] -.sym 10624 lvds_rx_09_inst.o_fifo_data[19] -.sym 10629 lvds_rx_09_inst.o_fifo_data[15] -.sym 10632 lvds_rx_09_inst.r_state_if_SB_LUT4_I2_O[0] -.sym 10633 w_lvds_rx_09_d1_SB_LUT4_I0_O_SB_LUT4_I3_O_$glb_ce -.sym 10634 lvds_clock_buf -.sym 10635 i_smi_a1_SB_LUT4_I1_O_SB_LUT4_O_I2_SB_LUT4_I0_O[2]_$glb_sr -.sym 10638 rx_09_fifo.full_o_SB_LUT4_I3_O[1] -.sym 10639 rx_09_fifo.full_o_SB_LUT4_I3_O[2] -.sym 10640 rx_09_fifo.wr_addr_gray_SB_LUT4_I2_1_O[4] -.sym 10641 rx_09_fifo.wr_addr_gray_SB_LUT4_I2_1_O[5] -.sym 10642 rx_09_fifo.wr_addr_gray_SB_LUT4_I2_1_O[6] -.sym 10643 rx_09_fifo.wr_addr_gray_SB_LUT4_I2_1_O[7] -.sym 10650 i_smi_soe_se$rename$0 -.sym 10651 rx_09_fifo.rd_addr_gray_SB_LUT4_I2_O[7] -.sym 10655 i_smi_a2_SB_LUT4_I1_O_SB_LUT4_I3_1_I2[2] -.sym 10662 rx_09_fifo.full_o_SB_DFFSR_Q_D_SB_LUT4_O_I1_SB_LUT4_O_I0_SB_LUT4_O_1_I3[1] -.sym 10666 rx_09_fifo.full_o_SB_DFFSR_Q_D_SB_LUT4_O_I1_SB_LUT4_O_I0[1] -.sym 10667 smi_ctrl_ins.int_cnt_09_SB_DFFESR_Q_D_SB_LUT4_O_I3[1] -.sym 10668 rx_09_fifo.full_o_SB_DFFSR_Q_D_SB_LUT4_O_I1_SB_LUT4_O_I0_SB_LUT4_O_I0[1] -.sym 10670 rx_09_fifo.rd_addr_gray_wr_r[6] -.sym 10671 spi_if_ins.r_tx_data_valid_SB_DFFESR_Q_D_SB_LUT4_I3_O -.sym 10685 rx_09_fifo.wr_addr[0] -.sym 10689 rx_09_fifo.wr_addr_gray_SB_DFFESR_Q_4_D[1] -.sym 10695 rx_09_fifo.full_o_SB_LUT4_I3_O[1] -.sym 10696 rx_09_fifo.full_o_SB_LUT4_I3_O[2] -.sym 10697 rx_09_fifo.wr_addr_gray_SB_LUT4_I2_1_O[4] -.sym 10699 rx_09_fifo.wr_addr_gray_SB_LUT4_I2_1_O[6] -.sym 10701 rx_09_fifo.wr_addr_gray_SB_LUT4_I2_1_O[1] -.sym 10704 lvds_rx_09_inst.r_push_SB_LUT4_I3_1_O -.sym 10706 rx_09_fifo.wr_addr_gray_SB_LUT4_I2_1_O[5] -.sym 10713 rx_09_fifo.wr_addr[0] -.sym 10716 rx_09_fifo.full_o_SB_LUT4_I3_O[2] -.sym 10722 rx_09_fifo.wr_addr_gray_SB_LUT4_I2_1_O[5] -.sym 10730 rx_09_fifo.wr_addr_gray_SB_DFFESR_Q_4_D[1] -.sym 10734 rx_09_fifo.wr_addr_gray_SB_LUT4_I2_1_O[4] -.sym 10740 rx_09_fifo.wr_addr_gray_SB_LUT4_I2_1_O[1] -.sym 10746 rx_09_fifo.full_o_SB_LUT4_I3_O[1] -.sym 10753 rx_09_fifo.wr_addr_gray_SB_LUT4_I2_1_O[6] -.sym 10756 lvds_rx_09_inst.r_push_SB_LUT4_I3_1_O -.sym 10757 lvds_clock_buf -.sym 10758 i_smi_a1_SB_LUT4_I1_O_SB_LUT4_O_I2_SB_LUT4_I0_O[2]_$glb_sr -.sym 10759 rx_09_fifo.wr_addr_gray_SB_LUT4_I2_1_O[1] -.sym 10760 lvds_rx_09_inst.r_push_SB_LUT4_I3_I0[0] -.sym 10761 rx_09_fifo.full_o_SB_DFFSR_Q_D_SB_LUT4_O_I1[0] -.sym 10762 rx_09_fifo.full_o_SB_LUT4_I3_O[3] -.sym 10763 lvds_rx_09_inst.r_push_SB_LUT4_I3_O[2] -.sym 10764 w_rx_09_fifo_full -.sym 10765 lvds_rx_09_inst.r_push_SB_LUT4_I3_O[3] -.sym 10766 lvds_rx_09_inst.r_push_SB_LUT4_I3_I0[2] -.sym 10767 rx_09_fifo.wr_addr_gray_rd[3] -.sym 10777 smi_ctrl_ins.r_fifo_24_pull_SB_LUT4_I1_O[2] -.sym 10779 rx_09_fifo.wr_addr_gray[3] -.sym 10784 rx_09_fifo.wr_addr[5] -.sym 10786 w_rx_09_fifo_push -.sym 10788 rx_09_fifo.wr_addr[4] -.sym 10790 lvds_rx_09_inst.r_push_SB_LUT4_I3_1_O -.sym 10792 i_smi_soe_se$rename$0 -.sym 10802 lvds_rx_09_inst.r_state_if_SB_LUT4_I2_O[0] -.sym 10804 rx_09_fifo.wr_addr[7] -.sym 10806 rx_09_fifo.wr_addr[2] -.sym 10807 rx_09_fifo.wr_addr[6] -.sym 10809 rx_09_fifo.wr_addr[3] -.sym 10810 rx_09_fifo.wr_addr[5] -.sym 10812 rx_09_fifo.wr_addr[4] -.sym 10813 rx_09_fifo.full_o_SB_DFFSR_Q_D_SB_LUT4_O_I1_SB_LUT4_O_I0_SB_LUT4_O_1_I3[1] -.sym 10815 w_rx_09_fifo_data[0] -.sym 10832 $nextpnr_ICESTORM_LC_4$O -.sym 10835 rx_09_fifo.full_o_SB_DFFSR_Q_D_SB_LUT4_O_I1_SB_LUT4_O_I0_SB_LUT4_O_1_I3[1] -.sym 10838 rx_09_fifo.wr_addr_gray_SB_LUT4_I2_I3[2] -.sym 10840 rx_09_fifo.wr_addr[2] -.sym 10842 rx_09_fifo.full_o_SB_DFFSR_Q_D_SB_LUT4_O_I1_SB_LUT4_O_I0_SB_LUT4_O_1_I3[1] -.sym 10844 rx_09_fifo.wr_addr_gray_SB_LUT4_I2_I3[3] -.sym 10847 rx_09_fifo.wr_addr[3] -.sym 10848 rx_09_fifo.wr_addr_gray_SB_LUT4_I2_I3[2] -.sym 10850 rx_09_fifo.wr_addr_gray_SB_LUT4_I2_I3[4] -.sym 10853 rx_09_fifo.wr_addr[4] -.sym 10854 rx_09_fifo.wr_addr_gray_SB_LUT4_I2_I3[3] -.sym 10856 rx_09_fifo.wr_addr_gray_SB_LUT4_I2_I3[5] -.sym 10858 rx_09_fifo.wr_addr[5] -.sym 10860 rx_09_fifo.wr_addr_gray_SB_LUT4_I2_I3[4] -.sym 10862 rx_09_fifo.wr_addr_gray_SB_LUT4_I2_I3[6] -.sym 10865 rx_09_fifo.wr_addr[6] -.sym 10866 rx_09_fifo.wr_addr_gray_SB_LUT4_I2_I3[5] -.sym 10869 rx_09_fifo.wr_addr[7] -.sym 10872 rx_09_fifo.wr_addr_gray_SB_LUT4_I2_I3[6] -.sym 10876 lvds_rx_09_inst.r_state_if_SB_LUT4_I2_O[0] -.sym 10878 w_rx_09_fifo_data[0] -.sym 10879 w_lvds_rx_09_d1_SB_LUT4_I0_O_SB_LUT4_I3_O_$glb_ce -.sym 10880 lvds_clock_buf -.sym 10881 i_smi_a1_SB_LUT4_I1_O_SB_LUT4_O_I2_SB_LUT4_I0_O[2]_$glb_sr -.sym 10883 spi_if_ins.r_tx_byte[0] -.sym 10884 rx_09_fifo.full_o_SB_DFFSR_Q_D_SB_LUT4_O_I1_SB_LUT4_O_I0_SB_LUT4_O_I0[0] -.sym 10885 lvds_rx_09_inst.r_push_SB_LUT4_I3_I0[1] -.sym 10887 smi_ctrl_ins.int_cnt_09_SB_DFFESR_Q_E -.sym 10894 lvds_rx_09_inst.r_push_SB_LUT4_I3_O[0] -.sym 10898 smi_ctrl_ins.int_cnt_24[5] -.sym 10900 rx_09_fifo.rd_addr_gray_wr_r[0] -.sym 10903 w_rx_09_fifo_data[0] -.sym 10923 smi_ctrl_ins.r_fifo_24_pull_SB_LUT4_I1_O[2] -.sym 10924 lvds_rx_09_inst.r_push_SB_LUT4_I3_O_SB_LUT4_O_I3[1] -.sym 10925 lvds_rx_09_inst.r_push_SB_LUT4_I3_O_SB_LUT4_O_I3[2] -.sym 10926 lvds_rx_09_inst.r_push_SB_LUT4_I3_O_SB_LUT4_O_I3[3] -.sym 10927 lvds_rx_09_inst.r_push_SB_LUT4_I3_O_SB_LUT4_O_I3[4] -.sym 10928 rx_09_fifo.full_o_SB_DFFSR_Q_D_SB_LUT4_O_I1_SB_LUT4_O_I0[0] -.sym 10929 smi_ctrl_ins.int_cnt_09[5] -.sym 10930 i_smi_a2_SB_LUT4_I1_O_SB_LUT4_O_I3[5] -.sym 10932 io_pmod[2]$SB_IO_IN -.sym 10933 smi_ctrl_ins.int_cnt_09[3] -.sym 10934 rx_09_fifo.full_o_SB_DFFSR_Q_D_SB_LUT4_O_I1_SB_LUT4_O_I0_SB_LUT4_O_1_I3[1] -.sym 10935 smi_ctrl_ins.int_cnt_09[4] -.sym 10936 w_rx_09_fifo_full -.sym 10938 rx_09_fifo.full_o_SB_DFFSR_Q_D_SB_LUT4_O_I1_SB_LUT4_O_I0[1] -.sym 10940 rx_09_fifo.full_o_SB_DFFSR_Q_D_SB_LUT4_O_I1_SB_LUT4_O_I0_SB_LUT4_O_I0[1] -.sym 10941 rx_09_fifo.full_o_SB_DFFSR_Q_D_SB_LUT4_O_I1_SB_LUT4_O_I0_SB_LUT4_O_I0[0] -.sym 10942 rx_09_fifo.full_o_SB_DFFSR_Q_D_SB_LUT4_O_I1_SB_LUT4_O_I0[3] -.sym 10943 rx_09_fifo.full_o_SB_DFFSR_Q_D_SB_LUT4_O_I1_SB_LUT4_O_I0[2] -.sym 10946 rx_09_fifo.full_o_SB_DFFSR_Q_D_SB_LUT4_O_I1_SB_LUT4_O_I0_SB_LUT4_O_1_I3[3] -.sym 10947 lvds_rx_09_inst.r_push_SB_DFFNESR_Q_E_SB_LUT4_O_I1_SB_LUT4_O_I2[3] -.sym 10948 rx_09_fifo.full_o_SB_DFFSR_Q_D_SB_LUT4_O_I1_SB_LUT4_O_I0_SB_LUT4_O_1_I3[0] -.sym 10949 i_smi_a2_SB_LUT4_I1_O_SB_LUT4_O_I3_SB_LUT4_I0_I1[5] -.sym 10950 lvds_rx_09_inst.r_push_SB_DFFNESR_Q_E -.sym 10952 i_smi_soe_se$rename$0 -.sym 10953 lvds_rx_09_inst.r_push_SB_DFFNESR_Q_E_SB_LUT4_O_I1_SB_LUT4_O_I2[2] -.sym 10956 smi_ctrl_ins.r_fifo_24_pull_SB_LUT4_I1_O[2] -.sym 10957 i_smi_a2_SB_LUT4_I1_O_SB_LUT4_O_I3[5] +.sym 10226 lvds_rx_09_inst.o_fifo_data[21] +.sym 10227 lvds_rx_09_inst.o_fifo_data[27] +.sym 10228 lvds_rx_09_inst.o_fifo_data[19] +.sym 10229 lvds_rx_09_inst.o_fifo_data[25] +.sym 10230 lvds_rx_09_inst.o_fifo_data[31] +.sym 10231 lvds_rx_09_inst.o_fifo_data[23] +.sym 10232 lvds_rx_09_inst.o_fifo_data[30] +.sym 10233 lvds_rx_09_inst.o_fifo_data[29] +.sym 10258 i_sck$SB_IO_IN +.sym 10273 rx_09_fifo.rd_addr[3] +.sym 10276 rx_09_fifo.rd_addr[4] +.sym 10282 rx_09_fifo.rd_addr[7] +.sym 10283 rx_09_fifo.rd_addr[1] +.sym 10292 rx_09_fifo.rd_addr[6] +.sym 10296 rx_09_fifo.rd_addr[5] +.sym 10297 rx_09_fifo.rd_addr[0] +.sym 10299 rx_09_fifo.rd_addr[2] +.sym 10300 $nextpnr_ICESTORM_LC_6$O +.sym 10303 rx_09_fifo.rd_addr[0] +.sym 10306 rx_09_fifo.rd_addr_gray_SB_LUT4_I2_I3[2] +.sym 10308 rx_09_fifo.rd_addr[1] +.sym 10310 rx_09_fifo.rd_addr[0] +.sym 10312 rx_09_fifo.rd_addr_gray_SB_LUT4_I2_I3[3] +.sym 10315 rx_09_fifo.rd_addr[2] +.sym 10316 rx_09_fifo.rd_addr_gray_SB_LUT4_I2_I3[2] +.sym 10318 rx_09_fifo.rd_addr_gray_SB_LUT4_I2_I3[4] +.sym 10321 rx_09_fifo.rd_addr[3] +.sym 10322 rx_09_fifo.rd_addr_gray_SB_LUT4_I2_I3[3] +.sym 10324 rx_09_fifo.rd_addr_gray_SB_LUT4_I2_I3[5] +.sym 10326 rx_09_fifo.rd_addr[4] +.sym 10328 rx_09_fifo.rd_addr_gray_SB_LUT4_I2_I3[4] +.sym 10330 rx_09_fifo.rd_addr_gray_SB_LUT4_I2_I3[6] +.sym 10333 rx_09_fifo.rd_addr[5] +.sym 10334 rx_09_fifo.rd_addr_gray_SB_LUT4_I2_I3[5] +.sym 10336 rx_09_fifo.rd_addr_gray_SB_LUT4_I2_I3[7] +.sym 10338 rx_09_fifo.rd_addr[6] +.sym 10340 rx_09_fifo.rd_addr_gray_SB_LUT4_I2_I3[6] +.sym 10343 rx_09_fifo.rd_addr[7] +.sym 10346 rx_09_fifo.rd_addr_gray_SB_LUT4_I2_I3[7] +.sym 10354 rx_09_fifo.rd_addr[6] +.sym 10355 rx_09_fifo.rd_addr_gray_SB_DFFESR_Q_2_D[1] +.sym 10356 rx_09_fifo.rd_addr_gray_SB_DFFESR_Q_2_D_SB_LUT4_I3_O_SB_LUT4_O_2_I0[1] +.sym 10357 smi_ctrl_ins.r_fifo_09_pull_SB_LUT4_I3_1_O +.sym 10358 rx_09_fifo.rd_addr[5] +.sym 10359 rx_09_fifo.rd_addr[0] +.sym 10360 rx_09_fifo.rd_addr_gray[1] +.sym 10361 rx_09_fifo.rd_addr[2] +.sym 10382 lvds_rx_09_inst.o_fifo_data[30] +.sym 10384 lvds_rx_09_inst.o_fifo_data[29] +.sym 10388 lvds_rx_09_inst.o_fifo_data[27] +.sym 10393 lvds_rx_09_inst.o_fifo_data[25] +.sym 10398 i_smi_a2_SB_LUT4_I1_O_SB_LUT4_I3_I2_SB_LUT4_O_I3[1] +.sym 10405 io_pmod[2]$SB_IO_IN +.sym 10407 rx_09_fifo.rd_addr_gray_SB_DFFESR_Q_2_D_SB_LUT4_I3_O_SB_LUT4_O_I1_SB_LUT4_O_1_I0[3] +.sym 10409 io_smi_data[0]$SB_IO_OUT +.sym 10410 rx_09_fifo.rd_addr_gray_SB_DFFESR_Q_2_D_SB_LUT4_I3_O_SB_LUT4_O_1_I1_SB_LUT4_O_I2[1] +.sym 10411 io_smi_data[7]$SB_IO_OUT +.sym 10415 rx_09_fifo.rd_addr[1] +.sym 10416 rx_09_fifo.rd_addr[2] +.sym 10417 rx_09_fifo.rd_addr[4] +.sym 10419 w_rx_09_fifo_pulled_data[8] +.sym 10420 i_smi_a2_SB_LUT4_I1_O_SB_LUT4_I3_I2[1] +.sym 10423 io_smi_data[3]$SB_IO_OUT +.sym 10434 rx_09_fifo.rd_addr_gray_SB_DFFESR_Q_2_D_SB_LUT4_I3_O_SB_LUT4_O_1_I1_SB_LUT4_O_I2[1] +.sym 10435 rx_09_fifo.rd_addr_gray_SB_DFFESR_Q_2_D_SB_LUT4_I3_O_SB_LUT4_O_I1_SB_LUT4_O_I2[3] +.sym 10437 rx_09_fifo.rd_addr_gray_SB_LUT4_I2_O[6] +.sym 10438 rx_09_fifo.rd_addr_gray_SB_LUT4_I2_O[7] +.sym 10439 rx_09_fifo.rd_addr_gray_SB_DFFESR_Q_2_D_SB_LUT4_I3_O_SB_LUT4_O_2_I0_SB_LUT4_O_2_I0[1] +.sym 10440 rx_09_fifo.rd_addr_gray_SB_DFFESR_Q_2_D_SB_LUT4_I3_O_SB_LUT4_O_I1_SB_LUT4_O_1_I0[3] +.sym 10442 rx_09_fifo.rd_addr_gray_SB_DFFESR_Q_2_D_SB_LUT4_I3_O_SB_LUT4_O_I1_SB_LUT4_O_I2[1] +.sym 10446 rx_09_fifo.rd_addr_gray_SB_DFFESR_Q_2_D_SB_LUT4_I3_O_SB_LUT4_O_2_I0_SB_LUT4_O_2_I0[0] +.sym 10447 rx_09_fifo.rd_addr_gray_SB_DFFESR_Q_2_D_SB_LUT4_I3_O_SB_LUT4_O_2_I0[2] +.sym 10449 rx_09_fifo.rd_addr_gray_SB_DFFESR_Q_2_D_SB_LUT4_I3_O_SB_LUT4_O_1_I1_SB_LUT4_O_I2[0] +.sym 10450 rx_09_fifo.rd_addr_gray_SB_DFFESR_Q_2_D_SB_LUT4_I3_O_SB_LUT4_O_2_I0[0] +.sym 10451 rx_09_fifo.rd_addr[5] +.sym 10455 rx_09_fifo.rd_addr[4] +.sym 10456 rx_09_fifo.rd_addr_gray_SB_DFFESR_Q_2_D_SB_LUT4_I3_O_SB_LUT4_O_2_I0[3] +.sym 10457 rx_09_fifo.rd_addr_gray_SB_DFFESR_Q_2_D_SB_LUT4_I3_O_SB_LUT4_O_2_I0[1] +.sym 10458 smi_ctrl_ins.r_fifo_09_pull_SB_LUT4_I3_1_O +.sym 10466 rx_09_fifo.rd_addr_gray_SB_DFFESR_Q_2_D_SB_LUT4_I3_O_SB_LUT4_O_I1_SB_LUT4_O_I2[3] +.sym 10470 rx_09_fifo.rd_addr[4] +.sym 10471 rx_09_fifo.rd_addr[5] +.sym 10472 rx_09_fifo.rd_addr_gray_SB_DFFESR_Q_2_D_SB_LUT4_I3_O_SB_LUT4_O_2_I0_SB_LUT4_O_2_I0[1] +.sym 10473 rx_09_fifo.rd_addr_gray_SB_DFFESR_Q_2_D_SB_LUT4_I3_O_SB_LUT4_O_2_I0_SB_LUT4_O_2_I0[0] +.sym 10476 rx_09_fifo.rd_addr_gray_SB_DFFESR_Q_2_D_SB_LUT4_I3_O_SB_LUT4_O_2_I0[3] +.sym 10477 rx_09_fifo.rd_addr_gray_SB_DFFESR_Q_2_D_SB_LUT4_I3_O_SB_LUT4_O_2_I0[1] +.sym 10478 rx_09_fifo.rd_addr_gray_SB_DFFESR_Q_2_D_SB_LUT4_I3_O_SB_LUT4_O_2_I0[2] +.sym 10479 rx_09_fifo.rd_addr_gray_SB_DFFESR_Q_2_D_SB_LUT4_I3_O_SB_LUT4_O_2_I0[0] +.sym 10482 rx_09_fifo.rd_addr_gray_SB_LUT4_I2_O[7] +.sym 10483 rx_09_fifo.rd_addr_gray_SB_LUT4_I2_O[6] +.sym 10484 rx_09_fifo.rd_addr_gray_SB_DFFESR_Q_2_D_SB_LUT4_I3_O_SB_LUT4_O_1_I1_SB_LUT4_O_I2[1] +.sym 10485 rx_09_fifo.rd_addr_gray_SB_DFFESR_Q_2_D_SB_LUT4_I3_O_SB_LUT4_O_1_I1_SB_LUT4_O_I2[0] +.sym 10489 rx_09_fifo.rd_addr_gray_SB_LUT4_I2_O[7] +.sym 10490 rx_09_fifo.rd_addr_gray_SB_LUT4_I2_O[6] +.sym 10495 rx_09_fifo.rd_addr_gray_SB_DFFESR_Q_2_D_SB_LUT4_I3_O_SB_LUT4_O_I1_SB_LUT4_O_I2[1] +.sym 10503 rx_09_fifo.rd_addr_gray_SB_LUT4_I2_O[7] +.sym 10507 rx_09_fifo.rd_addr_gray_SB_DFFESR_Q_2_D_SB_LUT4_I3_O_SB_LUT4_O_I1_SB_LUT4_O_1_I0[3] +.sym 10510 smi_ctrl_ins.r_fifo_09_pull_SB_LUT4_I3_1_O +.sym 10511 r_counter[0]_$glb_clk +.sym 10512 i_smi_a1_SB_LUT4_I1_O[3]_$glb_sr +.sym 10513 rx_09_fifo.rd_addr_gray[5] +.sym 10514 smi_ctrl_ins.o_smi_data_out_SB_DFFE_Q_7_D_SB_LUT4_O_I0[1] +.sym 10517 rx_09_fifo.rd_addr_gray_SB_DFFESR_Q_2_D_SB_LUT4_I3_O[3] +.sym 10518 smi_ctrl_ins.o_smi_data_out_SB_DFFE_Q_7_D_SB_LUT4_O_I0[0] +.sym 10519 rx_09_fifo.rd_addr_gray[0] +.sym 10520 rx_09_fifo.rd_addr_gray_SB_DFFESR_Q_2_D_SB_LUT4_I3_O_SB_LUT4_O_1_I1_SB_LUT4_O_I2[2] +.sym 10526 rx_09_fifo.rd_addr_gray[1] +.sym 10532 w_rx_09_fifo_pull +.sym 10535 rx_09_fifo.rd_addr_gray_SB_DFFESR_Q_2_D_SB_LUT4_I3_O_SB_LUT4_O_2_I0_SB_LUT4_O_2_I0[1] +.sym 10546 smi_ctrl_ins.int_cnt_24_SB_DFFESR_Q_E +.sym 10547 io_smi_data[3]$SB_IO_OUT +.sym 10548 $PACKER_VCC_NET +.sym 10554 rx_09_fifo.rd_addr[6] +.sym 10555 rx_09_fifo.rd_addr_gray_SB_DFFESR_Q_2_D_SB_LUT4_I3_O_SB_LUT4_O_1_I1[2] +.sym 10556 rx_09_fifo.rd_addr_gray_SB_DFFESR_Q_2_D_SB_LUT4_I3_O[0] +.sym 10557 rx_09_fifo.rd_addr_gray_SB_DFFESR_Q_2_D_SB_LUT4_I3_O_SB_LUT4_O_1_I1_SB_LUT4_O_1_I0[0] +.sym 10559 rx_09_fifo.rd_addr_gray_SB_DFFESR_Q_2_D_SB_LUT4_I3_O_SB_LUT4_O_1_I1_SB_LUT4_O_I2[0] +.sym 10560 rx_09_fifo.rd_addr[7] +.sym 10561 rx_09_fifo.rd_addr[2] +.sym 10562 rx_09_fifo.rd_addr[4] +.sym 10563 rx_09_fifo.rd_addr_gray_SB_DFFESR_Q_2_D_SB_LUT4_I3_O_SB_LUT4_O_1_I1_SB_LUT4_O_I2[1] +.sym 10565 i_smi_a2_SB_LUT4_I1_O_SB_LUT4_I3_I2_SB_LUT4_O_I3[1] +.sym 10566 w_rx_09_fifo_pulled_data[6] +.sym 10567 rx_09_fifo.rd_addr[3] +.sym 10568 rx_09_fifo.rd_addr_gray_SB_DFFESR_Q_2_D_SB_LUT4_I3_O_SB_LUT4_O_I1_SB_LUT4_O_I2[0] +.sym 10569 rx_09_fifo.rd_addr[1] +.sym 10570 rx_09_fifo.rd_addr_gray_SB_DFFESR_Q_2_D_SB_LUT4_I3_O_SB_LUT4_O_1_I1[1] +.sym 10571 io_pmod[2]$SB_IO_IN +.sym 10574 rx_09_fifo.rd_addr_gray_SB_DFFESR_Q_2_D_SB_LUT4_I3_O[1] +.sym 10575 rx_09_fifo.rd_addr_gray_SB_DFFESR_Q_2_D_SB_LUT4_I3_O[2] +.sym 10576 rx_09_fifo.rd_addr_gray_SB_DFFESR_Q_2_D_SB_LUT4_I3_O_SB_LUT4_O_1_I1_SB_LUT4_O_1_I0[1] +.sym 10577 rx_09_fifo.rd_addr_gray_SB_DFFESR_Q_2_D_SB_LUT4_I3_O_SB_LUT4_O_1_I1_SB_LUT4_O_I2[2] +.sym 10580 w_rx_09_fifo_pulled_data[22] +.sym 10582 rx_09_fifo.rd_addr_gray_SB_DFFESR_Q_2_D_SB_LUT4_I3_O[3] +.sym 10583 rx_09_fifo.rd_addr_gray_SB_DFFESR_Q_2_D_SB_LUT4_I3_O_SB_LUT4_O_1_I1[0] +.sym 10584 w_rx_09_fifo_pull +.sym 10585 i_smi_a2_SB_LUT4_I1_O_SB_LUT4_I3_I2[1] +.sym 10587 rx_09_fifo.rd_addr[6] +.sym 10588 rx_09_fifo.rd_addr_gray_SB_DFFESR_Q_2_D_SB_LUT4_I3_O_SB_LUT4_O_1_I1_SB_LUT4_O_I2[0] +.sym 10589 rx_09_fifo.rd_addr_gray_SB_DFFESR_Q_2_D_SB_LUT4_I3_O_SB_LUT4_O_1_I1_SB_LUT4_O_I2[1] +.sym 10590 rx_09_fifo.rd_addr_gray_SB_DFFESR_Q_2_D_SB_LUT4_I3_O_SB_LUT4_O_1_I1_SB_LUT4_O_I2[2] +.sym 10593 io_pmod[2]$SB_IO_IN +.sym 10594 rx_09_fifo.rd_addr[7] +.sym 10595 w_rx_09_fifo_pull +.sym 10596 rx_09_fifo.rd_addr_gray_SB_DFFESR_Q_2_D_SB_LUT4_I3_O_SB_LUT4_O_1_I1_SB_LUT4_O_I2[1] +.sym 10599 i_smi_a2_SB_LUT4_I1_O_SB_LUT4_I3_I2_SB_LUT4_O_I3[1] +.sym 10600 w_rx_09_fifo_pulled_data[22] +.sym 10601 i_smi_a2_SB_LUT4_I1_O_SB_LUT4_I3_I2[1] +.sym 10602 w_rx_09_fifo_pulled_data[6] +.sym 10605 rx_09_fifo.rd_addr_gray_SB_DFFESR_Q_2_D_SB_LUT4_I3_O_SB_LUT4_O_I1_SB_LUT4_O_I2[0] +.sym 10607 rx_09_fifo.rd_addr[4] +.sym 10608 rx_09_fifo.rd_addr[3] +.sym 10611 rx_09_fifo.rd_addr_gray_SB_DFFESR_Q_2_D_SB_LUT4_I3_O_SB_LUT4_O_1_I1[0] +.sym 10612 rx_09_fifo.rd_addr_gray_SB_DFFESR_Q_2_D_SB_LUT4_I3_O_SB_LUT4_O_1_I1[2] +.sym 10613 rx_09_fifo.rd_addr_gray_SB_DFFESR_Q_2_D_SB_LUT4_I3_O_SB_LUT4_O_1_I1[1] +.sym 10617 rx_09_fifo.rd_addr_gray_SB_DFFESR_Q_2_D_SB_LUT4_I3_O_SB_LUT4_O_1_I1_SB_LUT4_O_1_I0[0] +.sym 10618 rx_09_fifo.rd_addr_gray_SB_DFFESR_Q_2_D_SB_LUT4_I3_O_SB_LUT4_O_1_I1_SB_LUT4_O_1_I0[1] +.sym 10619 rx_09_fifo.rd_addr[2] +.sym 10620 rx_09_fifo.rd_addr[1] +.sym 10623 rx_09_fifo.rd_addr_gray_SB_DFFESR_Q_2_D_SB_LUT4_I3_O[1] +.sym 10624 rx_09_fifo.rd_addr_gray_SB_DFFESR_Q_2_D_SB_LUT4_I3_O[3] +.sym 10625 rx_09_fifo.rd_addr_gray_SB_DFFESR_Q_2_D_SB_LUT4_I3_O[0] +.sym 10626 rx_09_fifo.rd_addr_gray_SB_DFFESR_Q_2_D_SB_LUT4_I3_O[2] +.sym 10629 rx_09_fifo.rd_addr_gray_SB_DFFESR_Q_2_D_SB_LUT4_I3_O_SB_LUT4_O_1_I1_SB_LUT4_O_I2[0] +.sym 10630 rx_09_fifo.rd_addr[6] +.sym 10632 rx_09_fifo.rd_addr[7] +.sym 10634 r_counter[0]_$glb_clk +.sym 10635 i_smi_a1_SB_LUT4_I1_O[3]_$glb_sr +.sym 10636 io_smi_data[0]$SB_IO_OUT +.sym 10637 io_smi_data[7]$SB_IO_OUT +.sym 10639 smi_ctrl_ins.o_smi_data_out_SB_DFFE_Q_E +.sym 10643 w_smi_data_output[5] +.sym 10649 lvds_rx_09_inst.r_state_if_SB_LUT4_I2_O[0] +.sym 10654 rx_09_fifo.rd_addr_gray_SB_DFFESR_Q_2_D[0] +.sym 10660 i_smi_a1_SB_LUT4_I1_O_SB_LUT4_I3_O[3] +.sym 10678 i_smi_a1_SB_LUT4_I1_O_SB_LUT4_I3_O[3] +.sym 10679 i_smi_a2_SB_LUT4_I1_O_SB_LUT4_I3_I2_SB_LUT4_O_I3[1] +.sym 10680 w_smi_data_output[1] +.sym 10681 rx_09_fifo.wr_addr[7] +.sym 10683 w_rx_09_fifo_pulled_data[30] +.sym 10685 rx_09_fifo.wr_addr_gray_rd[7] +.sym 10686 i_smi_a2_SB_LUT4_I1_O_SB_LUT4_I3_I2[2] +.sym 10687 smi_ctrl_ins.o_smi_data_out_SB_DFFE_Q_1_D_SB_LUT4_O_I1_SB_LUT4_O_I3[3] +.sym 10690 i_smi_a3$SB_IO_IN +.sym 10704 w_rx_09_fifo_pulled_data[0] +.sym 10705 w_rx_09_fifo_pulled_data[14] +.sym 10706 rx_09_fifo.wr_addr_gray[6] +.sym 10707 rx_09_fifo.wr_addr_gray_rd[6] +.sym 10710 rx_09_fifo.wr_addr[7] +.sym 10716 rx_09_fifo.wr_addr_gray_rd[7] +.sym 10722 w_rx_09_fifo_pulled_data[30] +.sym 10723 w_rx_09_fifo_pulled_data[14] +.sym 10724 i_smi_a2_SB_LUT4_I1_O_SB_LUT4_I3_I2_SB_LUT4_O_I3[1] +.sym 10725 smi_ctrl_ins.o_smi_data_out_SB_DFFE_Q_1_D_SB_LUT4_O_I1_SB_LUT4_O_I3[3] +.sym 10734 w_rx_09_fifo_pulled_data[0] +.sym 10735 i_smi_a1_SB_LUT4_I1_O_SB_LUT4_I3_O[3] +.sym 10736 i_smi_a2_SB_LUT4_I1_O_SB_LUT4_I3_I2[2] +.sym 10740 rx_09_fifo.wr_addr_gray_rd[6] +.sym 10746 rx_09_fifo.wr_addr_gray[6] +.sym 10754 w_smi_data_output[1] +.sym 10755 i_smi_a3$SB_IO_IN +.sym 10757 r_counter[0]_$glb_clk +.sym 10759 i_smi_a1_SB_LUT4_I1_O_SB_LUT4_O_I2_SB_CARRY_CO_I1[5] +.sym 10760 smi_ctrl_ins.int_cnt_24[5] +.sym 10761 smi_ctrl_ins.int_cnt_24_SB_DFFESR_Q_E +.sym 10762 i_smi_a1_SB_LUT4_I1_O_SB_LUT4_I3_O[1] +.sym 10763 smi_ctrl_ins.int_cnt_24_SB_DFFESR_Q_E +.sym 10764 i_smi_a1_SB_LUT4_I1_O_SB_LUT4_O_I2[3] +.sym 10765 i_smi_a1_SB_LUT4_I1_O_SB_LUT4_O_I0[0] +.sym 10766 i_smi_a1_SB_LUT4_I1_O_SB_LUT4_O_I2_SB_CARRY_CO_I1[4] +.sym 10772 i_smi_a2_SB_LUT4_I1_O_SB_LUT4_I3_I2[2] +.sym 10776 w_smi_data_output[5] +.sym 10777 rx_09_fifo.wr_addr[7] +.sym 10779 rx_09_fifo.rd_addr_gray_wr[0] +.sym 10781 smi_ctrl_ins.o_smi_data_out_SB_DFFE_Q_2_D_SB_LUT4_O_I1[1] +.sym 10783 io_pmod[2]$SB_IO_IN +.sym 10788 i_smi_a2_SB_LUT4_I1_O_SB_LUT4_I3_1_I2[2] +.sym 10790 w_rx_24_fifo_data[6] +.sym 10791 smi_ctrl_ins.o_smi_data_out_SB_DFFE_Q_2_D_SB_LUT4_O_I1[3] +.sym 10793 w_rx_24_fifo_data[7] +.sym 10794 smi_ctrl_ins.int_cnt_24[5] +.sym 10800 i_smi_a2_SB_LUT4_I1_O_SB_LUT4_I3_I2[2] +.sym 10802 smi_ctrl_ins.o_smi_data_out_SB_DFFE_Q_6_D_SB_LUT4_O_I1[1] +.sym 10803 smi_ctrl_ins.o_smi_data_out_SB_DFFE_Q_3_D_SB_LUT4_O_I1[3] +.sym 10804 i_smi_a3$SB_IO_IN +.sym 10805 smi_ctrl_ins.o_smi_data_out_SB_DFFE_Q_D_SB_LUT4_O_I2[3] +.sym 10806 w_smi_data_output[2] +.sym 10807 smi_ctrl_ins.o_smi_data_out_SB_DFFE_Q_6_D_SB_LUT4_O_I1[3] +.sym 10808 i_smi_a2_SB_LUT4_I1_O_SB_LUT4_I3_I2[2] +.sym 10809 smi_ctrl_ins.o_smi_data_out_SB_DFFE_Q_1_D_SB_LUT4_O_I1[3] +.sym 10810 smi_ctrl_ins.o_smi_data_out_SB_DFFE_Q_1_D_SB_LUT4_O_I1[1] +.sym 10811 smi_ctrl_ins.o_smi_data_out_SB_DFFE_Q_E +.sym 10812 smi_ctrl_ins.o_smi_data_out_SB_DFFE_Q_D_SB_LUT4_O_I1[3] +.sym 10813 smi_ctrl_ins.o_smi_data_out_SB_DFFE_Q_1_D_SB_LUT4_O_I1[2] +.sym 10814 smi_ctrl_ins.o_smi_data_out_SB_DFFE_Q_4_D_SB_LUT4_O_I1[3] +.sym 10819 smi_ctrl_ins.o_smi_data_out_SB_DFFE_Q_D_SB_LUT4_O_I2[1] +.sym 10820 w_smi_data_output[3] +.sym 10824 smi_ctrl_ins.o_smi_data_out_SB_DFFE_Q_4_D_SB_LUT4_O_I1[1] +.sym 10826 smi_ctrl_ins.o_smi_data_out_SB_DFFE_Q_3_D_SB_LUT4_O_I1[1] +.sym 10829 smi_ctrl_ins.o_smi_data_out_SB_DFFE_Q_D_SB_LUT4_O_I1[1] +.sym 10833 smi_ctrl_ins.o_smi_data_out_SB_DFFE_Q_1_D_SB_LUT4_O_I1[3] +.sym 10834 i_smi_a2_SB_LUT4_I1_O_SB_LUT4_I3_I2[2] +.sym 10835 smi_ctrl_ins.o_smi_data_out_SB_DFFE_Q_1_D_SB_LUT4_O_I1[2] +.sym 10836 smi_ctrl_ins.o_smi_data_out_SB_DFFE_Q_1_D_SB_LUT4_O_I1[1] +.sym 10840 w_smi_data_output[2] +.sym 10842 i_smi_a3$SB_IO_IN +.sym 10845 smi_ctrl_ins.o_smi_data_out_SB_DFFE_Q_D_SB_LUT4_O_I1[1] +.sym 10846 i_smi_a2_SB_LUT4_I1_O_SB_LUT4_I3_I2[2] +.sym 10847 smi_ctrl_ins.o_smi_data_out_SB_DFFE_Q_1_D_SB_LUT4_O_I1[2] +.sym 10848 smi_ctrl_ins.o_smi_data_out_SB_DFFE_Q_D_SB_LUT4_O_I1[3] +.sym 10851 smi_ctrl_ins.o_smi_data_out_SB_DFFE_Q_6_D_SB_LUT4_O_I1[3] +.sym 10852 smi_ctrl_ins.o_smi_data_out_SB_DFFE_Q_1_D_SB_LUT4_O_I1[2] +.sym 10853 i_smi_a2_SB_LUT4_I1_O_SB_LUT4_I3_I2[2] +.sym 10854 smi_ctrl_ins.o_smi_data_out_SB_DFFE_Q_6_D_SB_LUT4_O_I1[1] +.sym 10857 i_smi_a2_SB_LUT4_I1_O_SB_LUT4_I3_I2[2] +.sym 10858 smi_ctrl_ins.o_smi_data_out_SB_DFFE_Q_4_D_SB_LUT4_O_I1[1] +.sym 10859 smi_ctrl_ins.o_smi_data_out_SB_DFFE_Q_1_D_SB_LUT4_O_I1[2] +.sym 10860 smi_ctrl_ins.o_smi_data_out_SB_DFFE_Q_4_D_SB_LUT4_O_I1[3] +.sym 10864 i_smi_a3$SB_IO_IN +.sym 10866 w_smi_data_output[3] +.sym 10869 i_smi_a2_SB_LUT4_I1_O_SB_LUT4_I3_I2[2] +.sym 10870 smi_ctrl_ins.o_smi_data_out_SB_DFFE_Q_D_SB_LUT4_O_I2[3] +.sym 10871 smi_ctrl_ins.o_smi_data_out_SB_DFFE_Q_1_D_SB_LUT4_O_I1[2] +.sym 10872 smi_ctrl_ins.o_smi_data_out_SB_DFFE_Q_D_SB_LUT4_O_I2[1] +.sym 10875 smi_ctrl_ins.o_smi_data_out_SB_DFFE_Q_3_D_SB_LUT4_O_I1[3] +.sym 10876 i_smi_a2_SB_LUT4_I1_O_SB_LUT4_I3_I2[2] +.sym 10877 smi_ctrl_ins.o_smi_data_out_SB_DFFE_Q_3_D_SB_LUT4_O_I1[1] +.sym 10878 smi_ctrl_ins.o_smi_data_out_SB_DFFE_Q_1_D_SB_LUT4_O_I1[2] +.sym 10879 smi_ctrl_ins.o_smi_data_out_SB_DFFE_Q_E +.sym 10880 r_counter[0]_$glb_clk +.sym 10882 w_rx_24_fifo_data[9] +.sym 10883 w_rx_24_fifo_data[12] +.sym 10884 w_rx_24_fifo_data[11] +.sym 10885 w_rx_24_fifo_data[7] +.sym 10886 w_rx_24_fifo_data[10] +.sym 10888 w_rx_24_fifo_data[14] +.sym 10889 w_rx_24_fifo_data[8] +.sym 10894 w_rx_24_fifo_pull +.sym 10897 spi_if_ins.spi.r_tx_bit_count_SB_DFFESR_Q_R +.sym 10899 i_smi_a1_SB_LUT4_I1_O_SB_LUT4_O_I0[3] +.sym 10904 i_smi_a2_SB_LUT4_I1_O_SB_LUT4_I3_I2[2] +.sym 10907 w_rx_24_fifo_data[10] +.sym 10913 w_rx_24_fifo_data[8] +.sym 10915 w_rx_24_fifo_data[9] +.sym 10917 smi_ctrl_ins.o_smi_data_out_SB_DFFE_Q_7_D_SB_LUT4_O_I0[2] +.sym 10923 i_smi_a2_SB_LUT4_I1_O_SB_LUT4_I3_1_I2_SB_LUT4_O_I3[1] +.sym 10924 smi_ctrl_ins.o_smi_data_out_SB_DFFE_Q_1_D_SB_LUT4_O_I1_SB_LUT4_O_1_I1[1] +.sym 10925 smi_ctrl_ins.int_cnt_24_SB_DFFESR_Q_E +.sym 10928 smi_ctrl_ins.o_smi_data_out_SB_DFFE_Q_6_D_SB_LUT4_O_I1_SB_LUT4_O_1_I1[1] +.sym 10930 smi_ctrl_ins.o_smi_data_out_SB_DFFE_Q_4_D_SB_LUT4_O_I1_SB_LUT4_O_1_I1[1] +.sym 10931 smi_ctrl_ins.o_smi_data_out_SB_DFFE_Q_D_SB_LUT4_O_I1_SB_LUT4_O_1_I1[1] +.sym 10932 smi_ctrl_ins.o_smi_data_out_SB_DFFE_Q_1_D_SB_LUT4_O_I1_SB_LUT4_O_1_I1[2] +.sym 10933 smi_ctrl_ins.o_smi_data_out_SB_DFFE_Q_3_D_SB_LUT4_O_I1_SB_LUT4_O_1_I1[1] +.sym 10934 smi_ctrl_ins.o_smi_data_out_SB_DFFE_Q_1_D_SB_LUT4_O_I1_SB_LUT4_O_1_I1[3] +.sym 10935 smi_ctrl_ins.o_smi_data_out_SB_DFFE_Q_D_SB_LUT4_O_I1_SB_LUT4_O_1_I3[1] +.sym 10936 i_smi_soe_se$rename$0 +.sym 10937 i_smi_a2_SB_LUT4_I1_O_SB_LUT4_I3_1_I2[1] +.sym 10941 i_smi_a2_SB_LUT4_I1_O_SB_LUT4_I3_1_I2[2] +.sym 10943 smi_ctrl_ins.o_smi_data_out_SB_DFFE_Q_3_D_SB_LUT4_O_I1_SB_LUT4_O_1_I1[2] +.sym 10947 smi_ctrl_ins.o_smi_data_out_SB_DFFE_Q_6_D_SB_LUT4_O_I1_SB_LUT4_O_1_I1[2] +.sym 10948 smi_ctrl_ins.o_smi_data_out_SB_DFFE_Q_4_D_SB_LUT4_O_I1_SB_LUT4_O_1_I1[2] +.sym 10949 i_smi_a2_SB_LUT4_I1_O_SB_LUT4_I3_1_I2[2] +.sym 10950 smi_ctrl_ins.o_smi_data_out_SB_DFFE_Q_D_SB_LUT4_O_I1_SB_LUT4_O_1_I3[2] +.sym 10951 smi_ctrl_ins.o_smi_data_out_SB_DFFE_Q_D_SB_LUT4_O_I1_SB_LUT4_O_1_I1[2] +.sym 10953 i_smi_a1_SB_LUT4_I1_O_SB_LUT4_O_I0[3] +.sym 10956 i_smi_a2_SB_LUT4_I1_O_SB_LUT4_I3_1_I2_SB_LUT4_O_I3[1] +.sym 10957 i_smi_a1_SB_LUT4_I1_O_SB_LUT4_O_I0[3] .sym 10958 i_smi_soe_se$rename$0 -.sym 10959 i_smi_a2_SB_LUT4_I1_O_SB_LUT4_O_I3_SB_LUT4_I0_I1[5] -.sym 10962 smi_ctrl_ins.int_cnt_09[4] -.sym 10963 io_pmod[2]$SB_IO_IN -.sym 10964 smi_ctrl_ins.int_cnt_09[3] -.sym 10965 smi_ctrl_ins.int_cnt_09[5] -.sym 10969 lvds_rx_09_inst.r_push_SB_DFFNESR_Q_E_SB_LUT4_O_I1_SB_LUT4_O_I2[3] -.sym 10971 lvds_rx_09_inst.r_push_SB_DFFNESR_Q_E_SB_LUT4_O_I1_SB_LUT4_O_I2[2] -.sym 10974 rx_09_fifo.full_o_SB_DFFSR_Q_D_SB_LUT4_O_I1_SB_LUT4_O_I0_SB_LUT4_O_1_I3[3] -.sym 10975 rx_09_fifo.full_o_SB_DFFSR_Q_D_SB_LUT4_O_I1_SB_LUT4_O_I0_SB_LUT4_O_1_I3[0] -.sym 10976 lvds_rx_09_inst.r_push_SB_LUT4_I3_O_SB_LUT4_O_I3[1] -.sym 10977 rx_09_fifo.full_o_SB_DFFSR_Q_D_SB_LUT4_O_I1_SB_LUT4_O_I0_SB_LUT4_O_1_I3[1] -.sym 10981 lvds_rx_09_inst.r_push_SB_LUT4_I3_O_SB_LUT4_O_I3[3] -.sym 10982 lvds_rx_09_inst.r_push_SB_LUT4_I3_O_SB_LUT4_O_I3[4] -.sym 10986 lvds_rx_09_inst.r_push_SB_LUT4_I3_O_SB_LUT4_O_I3[3] -.sym 10987 lvds_rx_09_inst.r_push_SB_LUT4_I3_O_SB_LUT4_O_I3[2] -.sym 10988 rx_09_fifo.full_o_SB_DFFSR_Q_D_SB_LUT4_O_I1_SB_LUT4_O_I0_SB_LUT4_O_I0[1] -.sym 10989 rx_09_fifo.full_o_SB_DFFSR_Q_D_SB_LUT4_O_I1_SB_LUT4_O_I0_SB_LUT4_O_I0[0] -.sym 10992 rx_09_fifo.full_o_SB_DFFSR_Q_D_SB_LUT4_O_I1_SB_LUT4_O_I0[2] -.sym 10993 rx_09_fifo.full_o_SB_DFFSR_Q_D_SB_LUT4_O_I1_SB_LUT4_O_I0[0] -.sym 10994 rx_09_fifo.full_o_SB_DFFSR_Q_D_SB_LUT4_O_I1_SB_LUT4_O_I0[1] -.sym 10995 rx_09_fifo.full_o_SB_DFFSR_Q_D_SB_LUT4_O_I1_SB_LUT4_O_I0[3] -.sym 10998 lvds_rx_09_inst.r_push_SB_DFFNESR_Q_E_SB_LUT4_O_I1_SB_LUT4_O_I2[3] -.sym 10999 w_rx_09_fifo_full -.sym 11000 lvds_rx_09_inst.r_push_SB_DFFNESR_Q_E_SB_LUT4_O_I1_SB_LUT4_O_I2[2] -.sym 11002 lvds_rx_09_inst.r_push_SB_DFFNESR_Q_E -.sym 11003 lvds_clock_buf -.sym 11004 i_smi_a1_SB_LUT4_I1_O_SB_LUT4_O_I2_SB_LUT4_I0_O[2]_$glb_sr -.sym 11005 w_tx_data_smi[1] -.sym 11007 w_tx_data_smi[2] -.sym 11012 w_tx_data_smi[0] -.sym 11017 smi_ctrl_ins.r_fifo_24_pull_SB_LUT4_I1_O[2] -.sym 11022 rx_09_fifo.full_o_SB_LUT4_I3_O[0] -.sym 11023 lvds_rx_09_inst.r_state_if_SB_LUT4_I2_O[0] -.sym 11026 spi_if_ins.r_tx_byte[0] -.sym 11029 spi_if_ins.state_if_SB_DFFE_Q_E -.sym 11030 lvds_rx_09_inst.r_state_if_SB_LUT4_I2_O[0] -.sym 11034 rx_09_fifo.full_o_SB_DFFSR_Q_D_SB_LUT4_O_I1_SB_LUT4_O_I0_SB_LUT4_O_1_I3[0] -.sym 11046 spi_if_ins.r_tx_data_valid_SB_DFFESR_Q_D[0] -.sym 11048 spi_if_ins.state_if_SB_DFFE_Q_E -.sym 11050 spi_if_ins.state_if_SB_DFFE_Q_E -.sym 11051 spi_if_ins.state_if_SB_DFFESR_Q_D[2] -.sym 11053 spi_if_ins.state_if[1] -.sym 11054 spi_if_ins.r_tx_data_valid_SB_DFFESR_Q_D[0] -.sym 11059 spi_if_ins.o_load_cmd_SB_DFFESR_Q_D_SB_LUT4_I1_O[0] -.sym 11062 spi_if_ins.state_if_SB_DFFESR_Q_D[0] -.sym 11069 spi_if_ins.o_load_cmd_SB_DFFESR_Q_D[1] -.sym 11077 spi_if_ins.state_if[0] -.sym 11080 spi_if_ins.o_load_cmd_SB_DFFESR_Q_D[1] -.sym 11081 spi_if_ins.state_if[0] -.sym 11082 spi_if_ins.state_if[1] -.sym 11091 spi_if_ins.state_if_SB_DFFE_Q_E -.sym 11103 spi_if_ins.state_if[0] -.sym 11104 spi_if_ins.o_load_cmd_SB_DFFESR_Q_D[1] -.sym 11105 spi_if_ins.r_tx_data_valid_SB_DFFESR_Q_D[0] -.sym 11106 spi_if_ins.state_if[1] -.sym 11109 spi_if_ins.state_if[1] -.sym 11111 spi_if_ins.o_load_cmd_SB_DFFESR_Q_D[1] -.sym 11112 spi_if_ins.state_if[0] -.sym 11121 spi_if_ins.state_if_SB_DFFESR_Q_D[2] -.sym 11122 spi_if_ins.o_load_cmd_SB_DFFESR_Q_D_SB_LUT4_I1_O[0] -.sym 11123 spi_if_ins.r_tx_data_valid_SB_DFFESR_Q_D[0] -.sym 11124 spi_if_ins.state_if_SB_DFFESR_Q_D[0] -.sym 11125 spi_if_ins.state_if_SB_DFFE_Q_E +.sym 10962 i_smi_a2_SB_LUT4_I1_O_SB_LUT4_I3_1_I2[2] +.sym 10963 smi_ctrl_ins.o_smi_data_out_SB_DFFE_Q_1_D_SB_LUT4_O_I1_SB_LUT4_O_1_I1[2] +.sym 10964 smi_ctrl_ins.o_smi_data_out_SB_DFFE_Q_1_D_SB_LUT4_O_I1_SB_LUT4_O_1_I1[1] +.sym 10965 smi_ctrl_ins.o_smi_data_out_SB_DFFE_Q_1_D_SB_LUT4_O_I1_SB_LUT4_O_1_I1[3] +.sym 10969 i_smi_a2_SB_LUT4_I1_O_SB_LUT4_I3_1_I2[1] +.sym 10970 i_smi_soe_se$rename$0 +.sym 10971 i_smi_a1_SB_LUT4_I1_O_SB_LUT4_O_I0[3] +.sym 10974 smi_ctrl_ins.o_smi_data_out_SB_DFFE_Q_3_D_SB_LUT4_O_I1_SB_LUT4_O_1_I1[1] +.sym 10975 smi_ctrl_ins.o_smi_data_out_SB_DFFE_Q_1_D_SB_LUT4_O_I1_SB_LUT4_O_1_I1[3] +.sym 10976 i_smi_a2_SB_LUT4_I1_O_SB_LUT4_I3_1_I2[2] +.sym 10977 smi_ctrl_ins.o_smi_data_out_SB_DFFE_Q_3_D_SB_LUT4_O_I1_SB_LUT4_O_1_I1[2] +.sym 10980 i_smi_a2_SB_LUT4_I1_O_SB_LUT4_I3_1_I2[2] +.sym 10981 smi_ctrl_ins.o_smi_data_out_SB_DFFE_Q_D_SB_LUT4_O_I1_SB_LUT4_O_1_I1[2] +.sym 10982 smi_ctrl_ins.o_smi_data_out_SB_DFFE_Q_1_D_SB_LUT4_O_I1_SB_LUT4_O_1_I1[3] +.sym 10983 smi_ctrl_ins.o_smi_data_out_SB_DFFE_Q_D_SB_LUT4_O_I1_SB_LUT4_O_1_I1[1] +.sym 10986 i_smi_a2_SB_LUT4_I1_O_SB_LUT4_I3_1_I2[2] +.sym 10987 smi_ctrl_ins.o_smi_data_out_SB_DFFE_Q_D_SB_LUT4_O_I1_SB_LUT4_O_1_I3[2] +.sym 10988 smi_ctrl_ins.o_smi_data_out_SB_DFFE_Q_D_SB_LUT4_O_I1_SB_LUT4_O_1_I3[1] +.sym 10989 smi_ctrl_ins.o_smi_data_out_SB_DFFE_Q_1_D_SB_LUT4_O_I1_SB_LUT4_O_1_I1[3] +.sym 10992 smi_ctrl_ins.o_smi_data_out_SB_DFFE_Q_4_D_SB_LUT4_O_I1_SB_LUT4_O_1_I1[2] +.sym 10993 i_smi_a2_SB_LUT4_I1_O_SB_LUT4_I3_1_I2[2] +.sym 10994 smi_ctrl_ins.o_smi_data_out_SB_DFFE_Q_1_D_SB_LUT4_O_I1_SB_LUT4_O_1_I1[3] +.sym 10995 smi_ctrl_ins.o_smi_data_out_SB_DFFE_Q_4_D_SB_LUT4_O_I1_SB_LUT4_O_1_I1[1] +.sym 10998 smi_ctrl_ins.o_smi_data_out_SB_DFFE_Q_6_D_SB_LUT4_O_I1_SB_LUT4_O_1_I1[2] +.sym 10999 smi_ctrl_ins.o_smi_data_out_SB_DFFE_Q_1_D_SB_LUT4_O_I1_SB_LUT4_O_1_I1[3] +.sym 11000 smi_ctrl_ins.o_smi_data_out_SB_DFFE_Q_6_D_SB_LUT4_O_I1_SB_LUT4_O_1_I1[1] +.sym 11001 i_smi_a2_SB_LUT4_I1_O_SB_LUT4_I3_1_I2[2] +.sym 11002 smi_ctrl_ins.int_cnt_24_SB_DFFESR_Q_E +.sym 11003 r_counter[0]_$glb_clk +.sym 11004 i_smi_a1_SB_LUT4_I1_O[3]_$glb_sr +.sym 11007 i_smi_a2_SB_LUT4_I1_O_SB_LUT4_I3_1_I2[2] +.sym 11010 spi_if_ins.r_tx_byte[0] +.sym 11020 i_smi_a1_SB_LUT4_I1_O[3] +.sym 11023 spi_if_ins.r_tx_data_valid_SB_LUT4_I3_O[2] +.sym 11030 w_rx_24_fifo_empty +.sym 11033 smi_ctrl_ins.r_fifo_24_pull_SB_LUT4_I3_1_O +.sym 11034 i_config_SB_LUT4_I3_I2[0] +.sym 11038 r_tx_data[0] +.sym 11040 rx_24_fifo.rd_addr_gray_SB_LUT4_I2_O[3] +.sym 11046 i_smi_a2_SB_LUT4_I1_O_SB_LUT4_I3_1_I2_SB_LUT4_O_I3[1] +.sym 11048 smi_ctrl_ins.int_cnt_24[4] +.sym 11049 smi_ctrl_ins.o_smi_data_out_SB_DFFE_Q_1_D_SB_LUT4_O_I1_SB_LUT4_O_1_I1[3] +.sym 11050 i_config_SB_LUT4_I3_I2[0] +.sym 11051 w_rx_24_fifo_pulled_data[30] +.sym 11054 i_smi_a2_SB_LUT4_I1_O_SB_LUT4_I3_1_I2_SB_LUT4_O_I3[1] +.sym 11056 $PACKER_VCC_NET +.sym 11057 smi_ctrl_ins.o_data_out_SB_DFFESS_Q_E +.sym 11059 smi_ctrl_ins.o_smi_data_out_SB_DFFE_Q_2_D_SB_LUT4_O_I1_SB_LUT4_O_1_I1[1] +.sym 11060 i_smi_a2_SB_LUT4_I1_O_SB_LUT4_I3_1_I2[1] +.sym 11061 w_rx_24_fifo_pulled_data[22] +.sym 11062 w_rx_24_fifo_pulled_data[0] +.sym 11064 smi_ctrl_ins.o_smi_data_out_SB_DFFE_Q_2_D_SB_LUT4_O_I1_SB_LUT4_O_1_I1[2] +.sym 11069 w_rx_24_fifo_empty +.sym 11072 i_smi_a2_SB_LUT4_I1_O_SB_LUT4_I3_1_I2[2] +.sym 11075 w_rx_09_fifo_full +.sym 11077 i_smi_a1_SB_LUT4_I1_O_SB_LUT4_I3_O[3] +.sym 11085 i_smi_a2_SB_LUT4_I1_O_SB_LUT4_I3_1_I2[1] +.sym 11086 i_smi_a2_SB_LUT4_I1_O_SB_LUT4_I3_1_I2_SB_LUT4_O_I3[1] +.sym 11087 w_rx_24_fifo_pulled_data[30] +.sym 11088 w_rx_24_fifo_pulled_data[22] +.sym 11093 w_rx_09_fifo_full +.sym 11097 i_smi_a2_SB_LUT4_I1_O_SB_LUT4_I3_1_I2[2] +.sym 11098 w_rx_24_fifo_pulled_data[0] +.sym 11100 i_smi_a1_SB_LUT4_I1_O_SB_LUT4_I3_O[3] +.sym 11103 smi_ctrl_ins.o_smi_data_out_SB_DFFE_Q_2_D_SB_LUT4_O_I1_SB_LUT4_O_1_I1[1] +.sym 11104 smi_ctrl_ins.o_smi_data_out_SB_DFFE_Q_1_D_SB_LUT4_O_I1_SB_LUT4_O_1_I1[3] +.sym 11105 smi_ctrl_ins.o_smi_data_out_SB_DFFE_Q_2_D_SB_LUT4_O_I1_SB_LUT4_O_1_I1[2] +.sym 11106 i_smi_a2_SB_LUT4_I1_O_SB_LUT4_I3_1_I2[2] +.sym 11111 w_rx_24_fifo_empty +.sym 11115 smi_ctrl_ins.int_cnt_24[4] +.sym 11116 i_smi_a2_SB_LUT4_I1_O_SB_LUT4_I3_1_I2_SB_LUT4_O_I3[1] +.sym 11118 $PACKER_VCC_NET +.sym 11125 smi_ctrl_ins.o_data_out_SB_DFFESS_Q_E .sym 11126 r_counter[0]_$glb_clk -.sym 11129 w_rx_24_fifo_data[20] -.sym 11130 spi_if_ins.o_cs_SB_LUT4_I2_2_O[3] -.sym 11131 spi_if_ins.o_fetch_cmd_SB_DFFESR_Q_E -.sym 11132 spi_if_ins.r_tx_data_valid_SB_DFFESR_Q_E -.sym 11133 spi_if_ins.o_load_cmd_SB_DFFESR_Q_D_SB_LUT4_I1_O[2] -.sym 11134 spi_if_ins.o_load_cmd_SB_DFFESR_Q_D[0] -.sym 11135 w_rx_24_fifo_data[31] -.sym 11140 spi_if_ins.r_tx_data_valid_SB_DFFESR_Q_D[0] -.sym 11141 w_rx_24_fifo_empty -.sym 11144 spi_if_ins.state_if_SB_DFFE_Q_E -.sym 11146 io_pmod[2]$SB_IO_IN -.sym 11147 i_smi_soe_se$rename$0 -.sym 11150 spi_if_ins.r_tx_data_valid_SB_LUT4_I3_O[2] -.sym 11151 io_ctrl_ins.o_data_out_SB_DFFESR_Q_6_R[0] -.sym 11158 spi_if_ins.r_tx_data_valid_SB_DFFESR_Q_D_SB_LUT4_I3_O -.sym 11160 w_fetch -.sym 11163 spi_if_ins.state_if[1] -.sym 11169 rx_24_fifo.rd_addr_gray_SB_DFFESR_Q_7_D_SB_LUT4_I3_O_SB_LUT4_O_I0[1] -.sym 11170 rx_24_fifo.rd_addr_gray_SB_DFFESR_Q_7_D_SB_LUT4_I3_O_SB_LUT4_O_I0[3] -.sym 11174 rx_24_fifo.wr_addr_gray_rd_r[7] -.sym 11176 spi_if_ins.o_load_cmd_SB_DFFESR_Q_D[1] -.sym 11177 w_rx_24_fifo_pull -.sym 11179 rx_24_fifo.rd_addr_gray_SB_DFFESR_Q_6_D[2] -.sym 11182 spi_if_ins.state_if_SB_DFFESR_Q_1_R -.sym 11184 rx_24_fifo.rd_addr_gray_SB_DFFESR_Q_7_D_SB_LUT4_I3_O_SB_LUT4_O_I0[2] -.sym 11190 i_smi_a1_SB_LUT4_I1_O_SB_LUT4_O_I2_SB_LUT4_I0_O[2] -.sym 11191 rx_24_fifo.rd_addr[7] -.sym 11192 rx_24_fifo.rd_addr_gray_SB_DFFESR_Q_7_D_SB_LUT4_I3_O_SB_LUT4_O_I0[0] -.sym 11194 rx_24_fifo.rd_addr[6] -.sym 11196 spi_if_ins.o_fetch_cmd_SB_DFFESR_Q_E -.sym 11197 smi_ctrl_ins.r_fifo_24_pull_SB_LUT4_I3_1_O -.sym 11198 w_rx_24_fifo_empty -.sym 11199 spi_if_ins.o_load_cmd_SB_DFFESR_Q_D[0] -.sym 11200 rx_24_fifo.rd_addr_gray_SB_LUT4_I2_O[7] -.sym 11203 spi_if_ins.o_load_cmd_SB_DFFESR_Q_D[1] -.sym 11205 spi_if_ins.o_load_cmd_SB_DFFESR_Q_D[0] -.sym 11208 rx_24_fifo.wr_addr_gray_rd_r[7] -.sym 11209 rx_24_fifo.rd_addr[7] -.sym 11210 rx_24_fifo.rd_addr_gray_SB_DFFESR_Q_6_D[2] -.sym 11211 rx_24_fifo.rd_addr[6] -.sym 11215 smi_ctrl_ins.r_fifo_24_pull_SB_LUT4_I3_1_O -.sym 11220 rx_24_fifo.wr_addr_gray_rd_r[7] -.sym 11222 w_rx_24_fifo_pull -.sym 11223 rx_24_fifo.rd_addr_gray_SB_LUT4_I2_O[7] -.sym 11227 i_smi_a1_SB_LUT4_I1_O_SB_LUT4_O_I2_SB_LUT4_I0_O[2] -.sym 11229 w_rx_24_fifo_pull -.sym 11238 rx_24_fifo.rd_addr_gray_SB_DFFESR_Q_7_D_SB_LUT4_I3_O_SB_LUT4_O_I0[1] -.sym 11239 rx_24_fifo.rd_addr_gray_SB_DFFESR_Q_7_D_SB_LUT4_I3_O_SB_LUT4_O_I0[3] -.sym 11240 rx_24_fifo.rd_addr_gray_SB_DFFESR_Q_7_D_SB_LUT4_I3_O_SB_LUT4_O_I0[2] -.sym 11241 rx_24_fifo.rd_addr_gray_SB_DFFESR_Q_7_D_SB_LUT4_I3_O_SB_LUT4_O_I0[0] -.sym 11244 w_rx_24_fifo_pull -.sym 11245 w_rx_24_fifo_empty -.sym 11246 rx_24_fifo.wr_addr_gray_rd_r[7] -.sym 11247 rx_24_fifo.rd_addr[7] -.sym 11248 spi_if_ins.o_fetch_cmd_SB_DFFESR_Q_E -.sym 11249 r_counter[0]_$glb_clk -.sym 11250 spi_if_ins.state_if_SB_DFFESR_Q_1_R -.sym 11251 r_tx_data[0] -.sym 11252 spi_if_ins.r_tx_data_valid_SB_DFFESR_Q_D_SB_LUT4_I3_O -.sym 11253 spi_if_ins.r_tx_data_valid_SB_DFFESR_Q_E -.sym 11254 spi_if_ins.r_tx_data_valid_SB_DFFESR_Q_D[1] -.sym 11255 spi_if_ins.o_data_in_SB_DFFE_Q_E -.sym 11258 spi_if_ins.o_load_cmd_SB_DFFESR_Q_D_SB_LUT4_I1_O[1] -.sym 11259 lvds_rx_09_inst.r_state_if_SB_LUT4_I2_O[0] -.sym 11263 spi_if_ins.o_load_cmd_SB_DFFESR_Q_D_SB_LUT4_I1_O[0] -.sym 11276 spi_if_ins.o_data_in_SB_DFFE_Q_E -.sym 11278 rx_24_fifo.rd_addr_gray_SB_DFFESR_Q_7_D_SB_LUT4_I3_O_SB_LUT4_O_2_I0[2] -.sym 11282 w_rx_24_fifo_data[29] -.sym 11283 spi_if_ins.o_load_cmd_SB_DFFESR_Q_D[0] -.sym 11284 rx_24_fifo.rd_addr_gray_SB_DFFESR_Q_7_D_SB_LUT4_I3_O[0] -.sym 11286 w_rx_24_fifo_data[18] -.sym 11293 rx_24_fifo.rd_addr[0] -.sym 11294 spi_if_ins.o_load_cmd_SB_DFFESR_Q_D[1] -.sym 11296 spi_if_ins.r_tx_data_valid_SB_DFFESR_Q_D[0] -.sym 11301 rx_24_fifo.rd_addr[1] -.sym 11304 spi_if_ins.r_tx_data_valid_SB_DFFESR_Q_D[0] -.sym 11305 rx_24_fifo.rd_addr[7] -.sym 11306 spi_if_ins.state_if[0] -.sym 11310 rx_24_fifo.rd_addr_gray_wr[7] -.sym 11311 rx_24_fifo.rd_addr_gray_SB_DFFESR_Q_6_D[0] -.sym 11315 rx_24_fifo.rd_addr_gray_SB_DFFESR_Q_7_D[0] -.sym 11317 rx_24_fifo.rd_addr_gray_SB_DFFESR_Q_7_D_SB_LUT4_I3_O_SB_LUT4_O_I0_SB_LUT4_O_1_I0[0] -.sym 11322 rx_24_fifo.rd_addr[2] -.sym 11323 spi_if_ins.state_if[1] -.sym 11325 spi_if_ins.state_if[1] -.sym 11326 spi_if_ins.r_tx_data_valid_SB_DFFESR_Q_D[0] -.sym 11327 spi_if_ins.o_load_cmd_SB_DFFESR_Q_D[1] -.sym 11328 spi_if_ins.state_if[0] -.sym 11331 rx_24_fifo.rd_addr_gray_SB_DFFESR_Q_7_D[0] -.sym 11333 rx_24_fifo.rd_addr[0] -.sym 11337 rx_24_fifo.rd_addr[7] -.sym 11351 rx_24_fifo.rd_addr_gray_wr[7] -.sym 11356 spi_if_ins.r_tx_data_valid_SB_DFFESR_Q_D[0] -.sym 11367 rx_24_fifo.rd_addr[2] -.sym 11368 rx_24_fifo.rd_addr_gray_SB_DFFESR_Q_7_D_SB_LUT4_I3_O_SB_LUT4_O_I0_SB_LUT4_O_1_I0[0] -.sym 11369 rx_24_fifo.rd_addr_gray_SB_DFFESR_Q_6_D[0] -.sym 11370 rx_24_fifo.rd_addr[1] -.sym 11372 lvds_clock_buf -.sym 11377 spi_if_ins.o_load_cmd_SB_DFFESR_Q_D_SB_LUT4_I1_O[1] -.sym 11380 w_tx_data_sys[0] -.sym 11386 spi_if_ins.o_load_cmd_SB_DFFESR_Q_E -.sym 11387 w_tx_data_smi[3] -.sym 11388 spi_if_ins.state_if_SB_DFFESR_Q_1_R -.sym 11392 spi_if_ins.o_load_cmd_SB_DFFESR_Q_D[1] -.sym 11394 spi_if_ins.state_if[0] -.sym 11400 rx_24_fifo.rd_addr_gray_SB_DFFESR_Q_6_D[1] -.sym 11402 rx_24_fifo.rd_addr_gray_SB_DFFESR_Q_6_D[3] -.sym 11406 w_load -.sym 11409 smi_ctrl_ins.r_fifo_24_pull_SB_LUT4_I3_1_O -.sym 11420 rx_24_fifo.rd_addr_gray_SB_DFFESR_Q_6_D[2] -.sym 11421 rx_24_fifo.rd_addr_gray_SB_DFFESR_Q_6_D[3] -.sym 11426 rx_24_fifo.rd_addr_gray_SB_DFFESR_Q_7_D_SB_LUT4_I3_O_SB_LUT4_O_2_I0[3] -.sym 11427 rx_24_fifo.rd_addr[0] -.sym 11428 spi_if_ins.state_if_SB_DFFESR_Q_1_R -.sym 11429 rx_24_fifo.rd_addr_gray_SB_DFFESR_Q_7_D_SB_LUT4_I3_O_SB_LUT4_O_2_I0[1] -.sym 11430 rx_24_fifo.rd_addr_gray_SB_DFFESR_Q_7_D_SB_LUT4_I3_O_SB_LUT4_O_2_I0[0] -.sym 11436 rx_24_fifo.rd_addr_gray_SB_DFFESR_Q_6_D[1] -.sym 11437 rx_24_fifo.rd_addr_gray_SB_DFFESR_Q_6_D[0] -.sym 11438 rx_24_fifo.rd_addr_gray_SB_DFFESR_Q_7_D_SB_LUT4_I3_O_SB_LUT4_O_2_I0[2] -.sym 11440 rx_24_fifo.rd_addr_gray_SB_LUT4_I2_O[1] -.sym 11441 rx_24_fifo.rd_addr_gray_SB_DFFESR_Q_7_D_SB_LUT4_I3_O_SB_LUT4_O_2_I0_SB_LUT4_O_1_I3[1] -.sym 11442 spi_if_ins.o_load_cmd_SB_DFFESR_Q_E -.sym 11443 spi_if_ins.o_load_cmd_SB_DFFESR_Q_D[0] -.sym 11445 rx_24_fifo.rd_addr_gray_SB_LUT4_I2_O[6] -.sym 11446 rx_24_fifo.rd_addr_gray_SB_LUT4_I2_O[7] -.sym 11451 spi_if_ins.o_load_cmd_SB_DFFESR_Q_D[0] -.sym 11454 rx_24_fifo.rd_addr_gray_SB_DFFESR_Q_7_D_SB_LUT4_I3_O_SB_LUT4_O_2_I0[2] -.sym 11455 rx_24_fifo.rd_addr_gray_SB_DFFESR_Q_7_D_SB_LUT4_I3_O_SB_LUT4_O_2_I0[0] -.sym 11456 rx_24_fifo.rd_addr_gray_SB_DFFESR_Q_7_D_SB_LUT4_I3_O_SB_LUT4_O_2_I0[1] -.sym 11457 rx_24_fifo.rd_addr_gray_SB_DFFESR_Q_7_D_SB_LUT4_I3_O_SB_LUT4_O_2_I0[3] -.sym 11460 rx_24_fifo.rd_addr_gray_SB_LUT4_I2_O[1] -.sym 11463 rx_24_fifo.rd_addr[0] -.sym 11466 rx_24_fifo.rd_addr_gray_SB_DFFESR_Q_6_D[1] -.sym 11467 rx_24_fifo.rd_addr_gray_SB_DFFESR_Q_6_D[3] -.sym 11468 rx_24_fifo.rd_addr_gray_SB_DFFESR_Q_6_D[2] -.sym 11469 rx_24_fifo.rd_addr_gray_SB_DFFESR_Q_6_D[0] -.sym 11480 rx_24_fifo.rd_addr_gray_SB_DFFESR_Q_7_D_SB_LUT4_I3_O_SB_LUT4_O_2_I0_SB_LUT4_O_1_I3[1] -.sym 11481 rx_24_fifo.rd_addr_gray_SB_LUT4_I2_O[1] -.sym 11484 rx_24_fifo.rd_addr_gray_SB_LUT4_I2_O[7] -.sym 11487 rx_24_fifo.rd_addr_gray_SB_LUT4_I2_O[6] -.sym 11494 spi_if_ins.o_load_cmd_SB_DFFESR_Q_E +.sym 11127 i_config_SB_LUT4_I3_I2[0] +.sym 11128 smi_ctrl_ins.r_fifo_24_pull_SB_LUT4_I3_1_O +.sym 11133 spi_if_ins.state_if[0] +.sym 11143 spi_if_ins.r_tx_data_valid_SB_LUT4_I3_O[2] +.sym 11144 $PACKER_VCC_NET +.sym 11145 spi_if_ins.w_rx_data[6] +.sym 11150 i_smi_soe_se$rename$0 +.sym 11152 rx_24_fifo.rd_addr_gray_SB_LUT4_I2_O[4] +.sym 11153 w_tx_data_smi[1] +.sym 11154 rx_24_fifo.rd_addr_gray_SB_DFFESR_Q_3_D[3] +.sym 11155 rx_24_fifo.empty_o_SB_DFFSS_Q_D_SB_LUT4_O_I0_SB_LUT4_O_I0_SB_LUT4_O_I0[3] +.sym 11156 spi_if_ins.state_if_SB_DFFESR_Q_1_R +.sym 11157 rx_24_fifo.empty_o_SB_DFFSS_Q_D_SB_LUT4_O_I0_SB_LUT4_O_2_I3[2] +.sym 11158 rx_24_fifo.rd_addr_gray_SB_DFFESR_Q_7_D[2] +.sym 11159 w_tx_data_smi[2] +.sym 11160 rx_24_fifo.rd_addr_gray_SB_DFFESR_Q_5_D[3] +.sym 11161 w_rx_09_fifo_full +.sym 11163 i_smi_a1_SB_LUT4_I1_O_SB_LUT4_I3_O[3] +.sym 11169 rx_24_fifo.empty_o_SB_DFFSS_Q_D_SB_LUT4_O_I0_SB_LUT4_O_I0[3] +.sym 11170 rx_24_fifo.rd_addr[1] +.sym 11173 rx_24_fifo.empty_o_SB_DFFSS_Q_D_SB_LUT4_O_I0_SB_LUT4_O_I0_SB_LUT4_O_I0[2] +.sym 11174 rx_24_fifo.empty_o_SB_DFFSS_Q_D_SB_LUT4_O_I0_SB_LUT4_O_2_I3[1] +.sym 11176 rx_24_fifo.empty_o_SB_DFFSS_Q_D_SB_LUT4_O_I0_SB_LUT4_O_I0_SB_LUT4_O_I0[3] +.sym 11177 rx_24_fifo.empty_o_SB_DFFSS_Q_D_SB_LUT4_O_I0_SB_LUT4_O_2_I3[2] +.sym 11180 rx_24_fifo.empty_o_SB_DFFSS_Q_D_SB_LUT4_O_I0_SB_LUT4_O_2_I3_SB_LUT4_O_I0[1] +.sym 11184 rx_24_fifo.empty_o_SB_LUT4_I3_I2[1] +.sym 11201 $nextpnr_ICESTORM_LC_8$O +.sym 11204 rx_24_fifo.empty_o_SB_LUT4_I3_I2[1] +.sym 11207 rx_24_fifo.rd_addr_gray_SB_LUT4_I2_I3[2] +.sym 11210 rx_24_fifo.rd_addr[1] +.sym 11211 rx_24_fifo.empty_o_SB_LUT4_I3_I2[1] +.sym 11213 rx_24_fifo.rd_addr_gray_SB_LUT4_I2_I3[3] +.sym 11216 rx_24_fifo.empty_o_SB_DFFSS_Q_D_SB_LUT4_O_I0_SB_LUT4_O_2_I3_SB_LUT4_O_I0[1] +.sym 11217 rx_24_fifo.rd_addr_gray_SB_LUT4_I2_I3[2] +.sym 11219 rx_24_fifo.rd_addr_gray_SB_LUT4_I2_I3[4] +.sym 11222 rx_24_fifo.empty_o_SB_DFFSS_Q_D_SB_LUT4_O_I0_SB_LUT4_O_2_I3[1] +.sym 11223 rx_24_fifo.rd_addr_gray_SB_LUT4_I2_I3[3] +.sym 11225 rx_24_fifo.rd_addr_gray_SB_LUT4_I2_I3[5] +.sym 11227 rx_24_fifo.empty_o_SB_DFFSS_Q_D_SB_LUT4_O_I0_SB_LUT4_O_2_I3[2] +.sym 11229 rx_24_fifo.rd_addr_gray_SB_LUT4_I2_I3[4] +.sym 11231 rx_24_fifo.rd_addr_gray_SB_LUT4_I2_I3[6] +.sym 11234 rx_24_fifo.empty_o_SB_DFFSS_Q_D_SB_LUT4_O_I0_SB_LUT4_O_I0_SB_LUT4_O_I0[3] +.sym 11235 rx_24_fifo.rd_addr_gray_SB_LUT4_I2_I3[5] +.sym 11237 rx_24_fifo.rd_addr_gray_SB_LUT4_I2_I3[7] +.sym 11240 rx_24_fifo.empty_o_SB_DFFSS_Q_D_SB_LUT4_O_I0_SB_LUT4_O_I0_SB_LUT4_O_I0[2] +.sym 11241 rx_24_fifo.rd_addr_gray_SB_LUT4_I2_I3[6] +.sym 11245 rx_24_fifo.empty_o_SB_DFFSS_Q_D_SB_LUT4_O_I0_SB_LUT4_O_I0[3] +.sym 11247 rx_24_fifo.rd_addr_gray_SB_LUT4_I2_I3[7] +.sym 11251 w_load +.sym 11252 rx_24_fifo.rd_addr_gray_SB_DFFESR_Q_7_D[2] +.sym 11253 rx_24_fifo.rd_addr_gray_SB_DFFESR_Q_5_D[3] +.sym 11254 smi_ctrl_ins.r_fifo_24_pull_SB_LUT4_I3_O[3] +.sym 11255 rx_24_fifo.rd_addr_gray_SB_DFFESR_Q_3_D[1] +.sym 11256 rx_24_fifo.rd_addr_gray_SB_DFFESR_Q_5_D[0] +.sym 11258 rx_24_fifo.rd_addr_gray_SB_DFFESR_Q_3_D[3] +.sym 11261 rx_24_fifo.rd_addr_gray_SB_DFFESR_Q_7_D[1] +.sym 11264 lvds_rx_09_inst.r_state_if_SB_LUT4_I2_O[0] +.sym 11276 spi_if_ins.w_rx_data[5] +.sym 11284 w_cs[2] +.sym 11296 rx_24_fifo.rd_addr_gray_SB_LUT4_I2_O[4] +.sym 11297 rx_24_fifo.empty_o_SB_LUT4_I3_I2[2] +.sym 11298 rx_24_fifo.rd_addr_gray_SB_LUT4_I2_O[6] +.sym 11301 rx_24_fifo.rd_addr_gray_SB_LUT4_I2_O[1] +.sym 11303 rx_24_fifo.rd_addr_gray_SB_LUT4_I2_O[3] +.sym 11305 rx_24_fifo.rd_addr_gray_SB_LUT4_I2_O[5] +.sym 11306 w_rx_24_fifo_pull +.sym 11307 w_rx_24_fifo_empty +.sym 11311 smi_ctrl_ins.r_fifo_24_pull_SB_LUT4_I3_O[3] +.sym 11319 smi_ctrl_ins.r_fifo_24_pull_SB_LUT4_I3_1_O +.sym 11320 rx_24_fifo.empty_o_SB_DFFSS_Q_D_SB_LUT4_O_I0_SB_LUT4_O_2_I3[0] +.sym 11323 rx_24_fifo.empty_o_SB_LUT4_I3_I2[1] +.sym 11327 rx_24_fifo.rd_addr_gray_SB_LUT4_I2_O[4] +.sym 11332 rx_24_fifo.rd_addr_gray_SB_LUT4_I2_O[1] +.sym 11337 rx_24_fifo.rd_addr_gray_SB_LUT4_I2_O[3] +.sym 11338 rx_24_fifo.empty_o_SB_DFFSS_Q_D_SB_LUT4_O_I0_SB_LUT4_O_2_I3[0] +.sym 11339 rx_24_fifo.rd_addr_gray_SB_LUT4_I2_O[4] +.sym 11340 smi_ctrl_ins.r_fifo_24_pull_SB_LUT4_I3_O[3] +.sym 11344 rx_24_fifo.empty_o_SB_LUT4_I3_I2[1] +.sym 11346 rx_24_fifo.rd_addr_gray_SB_LUT4_I2_O[1] +.sym 11349 rx_24_fifo.rd_addr_gray_SB_LUT4_I2_O[6] +.sym 11358 rx_24_fifo.rd_addr_gray_SB_LUT4_I2_O[3] +.sym 11361 rx_24_fifo.empty_o_SB_LUT4_I3_I2[1] +.sym 11362 rx_24_fifo.empty_o_SB_LUT4_I3_I2[2] +.sym 11363 w_rx_24_fifo_empty +.sym 11364 w_rx_24_fifo_pull +.sym 11368 rx_24_fifo.rd_addr_gray_SB_LUT4_I2_O[5] +.sym 11371 smi_ctrl_ins.r_fifo_24_pull_SB_LUT4_I3_1_O +.sym 11372 r_counter[0]_$glb_clk +.sym 11373 i_smi_a1_SB_LUT4_I1_O[3]_$glb_sr +.sym 11374 spi_if_ins.o_cs_SB_DFFESR_Q_R[0] +.sym 11375 r_tx_data[4] +.sym 11376 spi_if_ins.o_load_cmd_SB_LUT4_I2_O[1] +.sym 11378 r_tx_data[1] +.sym 11379 r_tx_data[6] +.sym 11380 r_tx_data[2] +.sym 11381 r_tx_data[3] +.sym 11388 i_smi_a1_SB_LUT4_I1_O[3] +.sym 11389 spi_if_ins.o_data_in_SB_DFFE_Q_E +.sym 11395 rx_24_fifo.empty_o_SB_DFFSS_Q_D_SB_LUT4_O_I0_SB_LUT4_O_I0[1] +.sym 11398 w_tx_data_io[2] +.sym 11402 spi_if_ins.o_cs_SB_LUT4_I3_1_O +.sym 11405 smi_ctrl_ins.r_fifo_24_pull_SB_LUT4_I3_1_O +.sym 11416 rx_24_fifo.rd_addr_gray_SB_DFFESR_Q_7_D[2] +.sym 11417 smi_ctrl_ins.r_fifo_24_pull_SB_LUT4_I3_O_SB_LUT4_I3_O[3] +.sym 11418 smi_ctrl_ins.r_fifo_24_pull_SB_LUT4_I3_O_SB_LUT4_I3_O[0] +.sym 11419 spi_if_ins.w_rx_data[6] +.sym 11420 rx_24_fifo.rd_addr_gray_SB_DFFESR_Q_5_D[0] +.sym 11424 rx_24_fifo.rd_addr[1] +.sym 11425 rx_24_fifo.rd_addr_gray_SB_DFFESR_Q_5_D[3] +.sym 11426 rx_24_fifo.rd_addr_gray_SB_DFFESR_Q_7_D[1] +.sym 11427 rx_24_fifo.rd_addr_gray_SB_DFFESR_Q_3_D[1] +.sym 11428 spi_if_ins.o_cs_SB_DFFESR_Q_R[0] +.sym 11430 rx_24_fifo.rd_addr_gray_SB_DFFESR_Q_3_D[3] +.sym 11431 smi_ctrl_ins.r_fifo_24_pull_SB_LUT4_I3_O_SB_LUT4_I3_O[1] +.sym 11432 smi_ctrl_ins.r_fifo_24_pull_SB_LUT4_I3_O_SB_LUT4_I3_O[2] +.sym 11433 spi_if_ins.o_ioc_SB_DFFE_Q_E[2] +.sym 11434 rx_24_fifo.rd_addr_gray_SB_DFFESR_Q_7_D[0] +.sym 11435 rx_24_fifo.empty_o_SB_DFFSS_Q_D_SB_LUT4_O_I0_SB_LUT4_O_I0_SB_LUT4_O_I0[1] +.sym 11436 spi_if_ins.w_rx_data[5] +.sym 11439 rx_24_fifo.rd_addr_gray_SB_DFFESR_Q_3_D[0] +.sym 11440 rx_24_fifo.rd_addr_gray_SB_DFFESR_Q_5_D[1] +.sym 11442 rx_24_fifo.empty_o_SB_DFFSS_Q_D_SB_LUT4_O_I0_SB_LUT4_O_2_I3_SB_LUT4_O_I0[2] +.sym 11446 rx_24_fifo.rd_addr_gray_SB_DFFESR_Q_7_D[3] +.sym 11448 rx_24_fifo.empty_o_SB_DFFSS_Q_D_SB_LUT4_O_I0_SB_LUT4_O_I0_SB_LUT4_O_I0[1] +.sym 11449 rx_24_fifo.rd_addr_gray_SB_DFFESR_Q_3_D[1] +.sym 11450 rx_24_fifo.rd_addr_gray_SB_DFFESR_Q_3_D[3] +.sym 11451 rx_24_fifo.rd_addr_gray_SB_DFFESR_Q_3_D[0] +.sym 11454 rx_24_fifo.rd_addr_gray_SB_DFFESR_Q_5_D[3] +.sym 11455 rx_24_fifo.rd_addr_gray_SB_DFFESR_Q_5_D[1] +.sym 11456 rx_24_fifo.rd_addr_gray_SB_DFFESR_Q_5_D[0] +.sym 11457 rx_24_fifo.empty_o_SB_DFFSS_Q_D_SB_LUT4_O_I0_SB_LUT4_O_2_I3_SB_LUT4_O_I0[2] +.sym 11460 spi_if_ins.w_rx_data[6] +.sym 11463 spi_if_ins.w_rx_data[5] +.sym 11466 rx_24_fifo.rd_addr_gray_SB_DFFESR_Q_7_D[2] +.sym 11467 rx_24_fifo.rd_addr_gray_SB_DFFESR_Q_7_D[1] +.sym 11468 rx_24_fifo.rd_addr_gray_SB_DFFESR_Q_7_D[0] +.sym 11469 rx_24_fifo.rd_addr_gray_SB_DFFESR_Q_7_D[3] +.sym 11474 spi_if_ins.w_rx_data[6] +.sym 11475 spi_if_ins.w_rx_data[5] +.sym 11480 rx_24_fifo.rd_addr_gray_SB_DFFESR_Q_7_D[0] +.sym 11481 rx_24_fifo.rd_addr[1] +.sym 11484 smi_ctrl_ins.r_fifo_24_pull_SB_LUT4_I3_O_SB_LUT4_I3_O[1] +.sym 11485 smi_ctrl_ins.r_fifo_24_pull_SB_LUT4_I3_O_SB_LUT4_I3_O[2] +.sym 11486 smi_ctrl_ins.r_fifo_24_pull_SB_LUT4_I3_O_SB_LUT4_I3_O[3] +.sym 11487 smi_ctrl_ins.r_fifo_24_pull_SB_LUT4_I3_O_SB_LUT4_I3_O[0] +.sym 11490 spi_if_ins.w_rx_data[5] +.sym 11493 spi_if_ins.w_rx_data[6] +.sym 11494 spi_if_ins.o_ioc_SB_DFFE_Q_E[2] .sym 11495 r_counter[0]_$glb_clk -.sym 11496 spi_if_ins.state_if_SB_DFFESR_Q_1_R -.sym 11499 rx_24_fifo.rd_addr_gray_wr[6] -.sym 11511 smi_ctrl_ins.o_data_out_SB_DFFESS_Q_E -.sym 11522 rx_24_fifo.rd_addr_gray_SB_DFFESR_Q_7_D[1] -.sym 11538 rx_24_fifo.rd_addr_gray_SB_DFFESR_Q_7_D_SB_LUT4_I3_O[2] -.sym 11539 rx_24_fifo.rd_addr_gray_SB_DFFESR_Q_7_D_SB_LUT4_I3_O[3] -.sym 11540 rx_24_fifo.rd_addr_gray_SB_DFFESR_Q_7_D[1] -.sym 11541 rx_24_fifo.rd_addr[5] -.sym 11545 rx_24_fifo.rd_addr_gray_SB_DFFESR_Q_3_D[3] -.sym 11547 rx_24_fifo.rd_addr_gray_SB_DFFESR_Q_3_D[0] -.sym 11548 rx_24_fifo.rd_addr_gray_SB_DFFESR_Q_7_D_SB_LUT4_I3_O_SB_LUT4_O_1_I3[3] -.sym 11549 rx_24_fifo.rd_addr[6] -.sym 11551 rx_24_fifo.rd_addr_gray_SB_DFFESR_Q_7_D[0] -.sym 11553 rx_24_fifo.rd_addr_gray_SB_DFFESR_Q_3_D[3] -.sym 11554 rx_24_fifo.rd_addr_gray_SB_DFFESR_Q_7_D_SB_LUT4_I3_O[0] -.sym 11555 rx_24_fifo.rd_addr_gray_SB_DFFESR_Q_7_D_SB_LUT4_I3_O[1] -.sym 11558 rx_24_fifo.rd_addr[4] -.sym 11562 rx_24_fifo.rd_addr_gray_SB_DFFESR_Q_3_D[1] -.sym 11563 rx_24_fifo.rd_addr_gray_SB_DFFESR_Q_3_D[2] -.sym 11571 rx_24_fifo.rd_addr_gray_SB_DFFESR_Q_7_D[1] -.sym 11573 rx_24_fifo.rd_addr_gray_SB_DFFESR_Q_7_D[0] -.sym 11577 rx_24_fifo.rd_addr_gray_SB_DFFESR_Q_7_D_SB_LUT4_I3_O_SB_LUT4_O_1_I3[3] -.sym 11578 rx_24_fifo.rd_addr_gray_SB_DFFESR_Q_3_D[0] -.sym 11579 rx_24_fifo.rd_addr[5] -.sym 11580 rx_24_fifo.rd_addr[4] -.sym 11583 rx_24_fifo.rd_addr[6] -.sym 11585 rx_24_fifo.rd_addr_gray_SB_DFFESR_Q_3_D[3] -.sym 11595 rx_24_fifo.rd_addr_gray_SB_DFFESR_Q_7_D_SB_LUT4_I3_O[0] -.sym 11596 rx_24_fifo.rd_addr_gray_SB_DFFESR_Q_7_D_SB_LUT4_I3_O[3] -.sym 11597 rx_24_fifo.rd_addr_gray_SB_DFFESR_Q_7_D_SB_LUT4_I3_O[2] -.sym 11598 rx_24_fifo.rd_addr_gray_SB_DFFESR_Q_7_D_SB_LUT4_I3_O[1] -.sym 11607 rx_24_fifo.rd_addr_gray_SB_DFFESR_Q_3_D[2] -.sym 11608 rx_24_fifo.rd_addr_gray_SB_DFFESR_Q_3_D[3] -.sym 11609 rx_24_fifo.rd_addr_gray_SB_DFFESR_Q_3_D[0] -.sym 11610 rx_24_fifo.rd_addr_gray_SB_DFFESR_Q_3_D[1] +.sym 11496 spi_if_ins.o_cs_SB_DFFESR_Q_R[0] +.sym 11497 spi_if_ins.o_cs_SB_LUT4_I3_1_O +.sym 11498 spi_if_ins.o_cs_SB_LUT4_I2_O[2] +.sym 11499 smi_ctrl_ins.o_data_out_SB_LUT4_I2_I3[2] +.sym 11500 spi_if_ins.o_cs_SB_LUT4_I2_2_O[2] +.sym 11501 spi_if_ins.o_cs_SB_LUT4_I2_2_O[1] +.sym 11502 smi_ctrl_ins.o_data_out_SB_LUT4_I2_I3[0] +.sym 11504 w_cs[0] +.sym 11506 spi_if_ins.o_ioc_SB_DFFE_Q_E[0] +.sym 11511 w_tx_data_io[3] +.sym 11512 sys_ctrl_ins.reset_cmd_SB_DFFESR_Q_R +.sym 11516 spi_if_ins.o_cs_SB_DFFESR_Q_R[0] +.sym 11517 w_tx_data_io[1] +.sym 11519 w_cs[1] +.sym 11521 i_config_SB_LUT4_I3_I2[0] +.sym 11525 smi_ctrl_ins.r_fifo_24_pull_SB_LUT4_I3_1_O +.sym 11527 w_tx_data_io[0] +.sym 11530 r_tx_data[0] +.sym 11532 rx_24_fifo.rd_addr_gray_SB_LUT4_I2_O[3] +.sym 11540 smi_ctrl_ins.o_data_out_SB_DFFESS_Q_E +.sym 11541 io_pmod[2]$SB_IO_IN +.sym 11551 i_config_SB_LUT4_I3_I2[0] +.sym 11561 w_rx_24_fifo_full +.sym 11586 io_pmod[2]$SB_IO_IN +.sym 11589 w_rx_24_fifo_full +.sym 11617 smi_ctrl_ins.o_data_out_SB_DFFESS_Q_E .sym 11618 r_counter[0]_$glb_clk -.sym 11619 i_smi_a1_SB_LUT4_I1_O_SB_LUT4_O_I2_SB_LUT4_I0_O[2]_$glb_sr -.sym 11621 rx_24_fifo.rd_addr_gray[1] -.sym 11622 rx_24_fifo.rd_addr_gray[4] -.sym 11624 rx_24_fifo.rd_addr_gray[6] -.sym 11627 rx_24_fifo.rd_addr_gray[0] -.sym 11642 w_rx_24_fifo_empty -.sym 11646 rx_24_fifo.rd_addr_gray_wr[1] -.sym 11663 rx_24_fifo.wr_addr_gray_rd[1] -.sym 11666 rx_24_fifo.wr_addr_gray_rd[4] -.sym 11669 rx_24_fifo.wr_addr_gray_rd[5] -.sym 11676 rx_24_fifo.wr_addr_gray_rd[2] -.sym 11679 rx_24_fifo.wr_addr_gray[0] -.sym 11680 rx_24_fifo.wr_addr_gray[1] -.sym 11689 rx_24_fifo.wr_addr_gray_rd[0] -.sym 11702 rx_24_fifo.wr_addr_gray_rd[4] -.sym 11707 rx_24_fifo.wr_addr_gray[1] -.sym 11715 rx_24_fifo.wr_addr_gray_rd[1] -.sym 11718 rx_24_fifo.wr_addr_gray[0] -.sym 11726 rx_24_fifo.wr_addr_gray_rd[0] -.sym 11732 rx_24_fifo.wr_addr_gray_rd[2] -.sym 11736 rx_24_fifo.wr_addr_gray_rd[5] -.sym 11741 r_counter[0]_$glb_clk -.sym 11746 rx_24_fifo.rd_addr_gray_wr[4] -.sym 11747 lvds_rx_24_inst.r_push_SB_LUT4_I0_1_I1_SB_LUT4_O_1_I3[0] -.sym 11748 rx_24_fifo.rd_addr_gray_wr[0] -.sym 11750 rx_24_fifo.rd_addr_gray_wr[1] -.sym 11752 io_ctrl_ins.o_data_out_SB_DFFESR_Q_6_R[1] -.sym 11760 rx_24_fifo.rd_addr_gray_SB_DFFESR_Q_3_D[1] -.sym 11768 lvds_rx_24_inst.r_push_SB_LUT4_I0_1_I1_SB_LUT4_O_1_I3[0] -.sym 11770 rx_24_fifo.rd_addr_gray_wr[0] -.sym 11785 rx_24_fifo.wr_addr_gray[4] -.sym 11797 rx_24_fifo.wr_addr_gray[5] -.sym 11799 rx_24_fifo.wr_addr_gray[2] -.sym 11817 rx_24_fifo.wr_addr_gray[5] -.sym 11849 rx_24_fifo.wr_addr_gray[4] -.sym 11862 rx_24_fifo.wr_addr_gray[2] -.sym 11864 r_counter[0]_$glb_clk -.sym 11878 io_ctrl_ins.debug_mode_SB_LUT4_I2_O[1] -.sym 12117 w_lvds_rx_24_d1_SB_LUT4_I0_O_SB_LUT4_I3_O -.sym 12124 o_shdn_tx_lna$SB_IO_OUT -.sym 12245 i_smi_a1_SB_LUT4_I1_O_SB_LUT4_O_I2_SB_LUT4_I0_O[2] +.sym 11619 i_config_SB_LUT4_I3_I2[0] +.sym 11621 r_tx_data[5] +.sym 11622 r_tx_data[7] +.sym 11623 spi_if_ins.o_cs_SB_LUT4_I2_2_O[3] +.sym 11636 smi_ctrl_ins.o_data_out_SB_DFFESS_Q_E +.sym 11646 rx_24_fifo.rd_addr_gray_SB_DFFESR_Q_3_D[3] +.sym 11648 rx_24_fifo.rd_addr_gray_SB_DFFESR_Q_5_D[3] +.sym 11649 rx_24_fifo.rd_addr_gray_SB_LUT4_I2_O[4] +.sym 11650 rx_24_fifo.rd_addr_gray_SB_DFFESR_Q_7_D[2] +.sym 11655 i_smi_a1_SB_LUT4_I1_O_SB_LUT4_I3_O[3] +.sym 11661 spi_if_ins.o_cs_SB_LUT4_I3_1_O +.sym 11664 spi_if_ins.o_cs_SB_LUT4_I2_2_O[2] +.sym 11672 spi_if_ins.o_cs_SB_LUT4_I3_1_O +.sym 11673 spi_if_ins.o_cs_SB_LUT4_I2_2_O[1] +.sym 11674 w_tx_data_sys[0] +.sym 11688 spi_if_ins.o_cs_SB_LUT4_I2_2_O[3] +.sym 11706 w_tx_data_sys[0] +.sym 11707 spi_if_ins.o_cs_SB_LUT4_I2_2_O[1] +.sym 11708 spi_if_ins.o_cs_SB_LUT4_I2_2_O[3] +.sym 11709 spi_if_ins.o_cs_SB_LUT4_I2_2_O[2] +.sym 11713 spi_if_ins.o_cs_SB_LUT4_I3_1_O +.sym 11740 spi_if_ins.o_cs_SB_LUT4_I3_1_O +.sym 11741 i_glob_clock$SB_IO_IN_$glb_clk +.sym 11744 rx_24_fifo.rd_addr_gray[6] +.sym 11745 rx_24_fifo.rd_addr_gray[3] +.sym 11746 rx_24_fifo.rd_addr_gray[2] +.sym 11747 rx_24_fifo.rd_addr_gray[4] +.sym 11748 rx_24_fifo.rd_addr_gray[5] +.sym 11750 rx_24_fifo.rd_addr_gray[1] +.sym 11784 rx_24_fifo.rd_addr_gray_wr[2] +.sym 11801 rx_24_fifo.rd_addr_gray[6] +.sym 11804 rx_24_fifo.rd_addr_gray[4] +.sym 11807 rx_24_fifo.rd_addr_gray[1] +.sym 11810 rx_24_fifo.rd_addr_gray[3] +.sym 11825 rx_24_fifo.rd_addr_gray[3] +.sym 11831 rx_24_fifo.rd_addr_gray[4] +.sym 11836 rx_24_fifo.rd_addr_gray_wr[2] +.sym 11847 rx_24_fifo.rd_addr_gray[6] +.sym 11854 rx_24_fifo.rd_addr_gray[1] +.sym 11864 lvds_clock_buf +.sym 11869 i_smi_a1_SB_LUT4_I1_O[2] +.sym 11871 i_smi_a1_SB_LUT4_I1_O_SB_LUT4_I3_O[3] +.sym 11878 w_tx_data_sys[0] +.sym 11897 smi_ctrl_ins.r_fifo_24_pull_SB_LUT4_I3_1_O +.sym 11910 rx_24_fifo.rd_addr_gray[2] +.sym 11943 rx_24_fifo.rd_addr_gray[2] +.sym 11987 lvds_clock_buf +.sym 12001 i_smi_a2$SB_IO_IN +.sym 12048 rx_24_fifo.rd_addr_gray_SB_DFFESR_Q_7_D[1] +.sym 12057 smi_ctrl_ins.r_fifo_24_pull_SB_LUT4_I3_1_O +.sym 12063 rx_24_fifo.rd_addr_gray_SB_DFFESR_Q_7_D[1] +.sym 12109 smi_ctrl_ins.r_fifo_24_pull_SB_LUT4_I3_1_O +.sym 12110 r_counter[0]_$glb_clk +.sym 12111 i_smi_a1_SB_LUT4_I1_O[3]_$glb_sr +.sym 12118 w_lvds_rx_24_d1_SB_LUT4_I0_O_SB_LUT4_I3_O +.sym 12126 io_ctrl_ins.rf_pin_state[3] +.sym 12131 i_smi_a1_SB_LUT4_I1_O[3] +.sym 12135 $PACKER_VCC_NET +.sym 12153 rx_24_fifo.rd_addr_gray[0] +.sym 12188 rx_24_fifo.rd_addr_gray[0] +.sym 12233 lvds_clock_buf +.sym 12309 i_sck$SB_IO_IN .sym 12310 io_smi_data[0]$SB_IO_OUT .sym 12313 io_smi_data[7]$SB_IO_OUT -.sym 12319 io_smi_data[0]$SB_IO_OUT -.sym 12333 io_smi_data[7]$SB_IO_OUT -.sym 12335 io_pmod_SB_DFFSS_Q_D_SB_LUT4_O_I0_SB_LUT4_O_1_I1_SB_LUT4_O_I0[1] -.sym 12336 io_pmod_SB_DFFSS_Q_D_SB_LUT4_O_I0_SB_LUT4_O_I0[3] -.sym 12337 rx_09_fifo.wr_addr_gray_rd[7] -.sym 12338 io_pmod_SB_DFFSS_Q_D_SB_LUT4_O_I0_SB_LUT4_O_I0[0] -.sym 12340 rx_09_fifo.wr_addr_gray_rd_r[2] -.sym 12342 rx_09_fifo.wr_addr_gray_rd[6] -.sym 12351 r_tx_data[0] -.sym 12361 lvds_rx_09_inst.r_push_SB_LUT4_I3_1_O -.sym 12369 io_pmod[6]$SB_IO_IN -.sym 12384 i_smi_a3$SB_IO_IN -.sym 12386 rx_09_fifo.rd_addr_gray_wr[3] -.sym 12388 w_smi_data_output[3] -.sym 12389 w_smi_data_output[4] -.sym 12390 rx_09_fifo.rd_addr_gray_wr[4] -.sym 12392 rx_09_fifo.rd_addr_gray_wr[5] -.sym 12399 rx_09_fifo.rd_addr_gray_wr[6] -.sym 12403 rx_09_fifo.rd_addr_gray[6] -.sym 12410 rx_09_fifo.rd_addr_gray_wr[5] -.sym 12419 rx_09_fifo.rd_addr_gray_wr[4] -.sym 12422 rx_09_fifo.rd_addr_gray_wr[3] -.sym 12428 i_smi_a3$SB_IO_IN -.sym 12431 w_smi_data_output[3] -.sym 12435 i_smi_a3$SB_IO_IN -.sym 12437 w_smi_data_output[4] -.sym 12447 rx_09_fifo.rd_addr_gray[6] -.sym 12455 rx_09_fifo.rd_addr_gray_wr[6] +.sym 12326 io_smi_data[7]$SB_IO_OUT +.sym 12331 i_sck$SB_IO_IN +.sym 12332 io_smi_data[0]$SB_IO_OUT +.sym 12335 lvds_rx_09_inst.o_fifo_data[26] +.sym 12336 lvds_rx_09_inst.o_fifo_data[18] +.sym 12337 lvds_rx_09_inst.o_fifo_data[24] +.sym 12338 lvds_rx_09_inst.o_fifo_data[22] +.sym 12340 lvds_rx_09_inst.o_fifo_data[28] +.sym 12342 lvds_rx_09_inst.o_fifo_data[20] +.sym 12356 spi_if_ins.o_cs_SB_LUT4_I3_1_O +.sym 12368 io_smi_data[3]$SB_IO_OUT +.sym 12377 lvds_rx_09_inst.o_fifo_data[21] +.sym 12380 lvds_rx_09_inst.o_fifo_data[25] +.sym 12382 lvds_rx_09_inst.o_fifo_data[23] +.sym 12387 lvds_rx_09_inst.o_fifo_data[19] +.sym 12389 lvds_rx_09_inst.r_state_if_SB_LUT4_I2_O[0] +.sym 12394 lvds_rx_09_inst.o_fifo_data[27] +.sym 12395 lvds_rx_09_inst.o_fifo_data[17] +.sym 12406 lvds_rx_09_inst.o_fifo_data[28] +.sym 12408 lvds_rx_09_inst.o_fifo_data[29] +.sym 12411 lvds_rx_09_inst.r_state_if_SB_LUT4_I2_O[0] +.sym 12413 lvds_rx_09_inst.o_fifo_data[19] +.sym 12416 lvds_rx_09_inst.r_state_if_SB_LUT4_I2_O[0] +.sym 12418 lvds_rx_09_inst.o_fifo_data[25] +.sym 12422 lvds_rx_09_inst.o_fifo_data[17] +.sym 12425 lvds_rx_09_inst.r_state_if_SB_LUT4_I2_O[0] +.sym 12428 lvds_rx_09_inst.r_state_if_SB_LUT4_I2_O[0] +.sym 12430 lvds_rx_09_inst.o_fifo_data[23] +.sym 12434 lvds_rx_09_inst.o_fifo_data[29] +.sym 12437 lvds_rx_09_inst.r_state_if_SB_LUT4_I2_O[0] +.sym 12441 lvds_rx_09_inst.o_fifo_data[21] +.sym 12442 lvds_rx_09_inst.r_state_if_SB_LUT4_I2_O[0] +.sym 12446 lvds_rx_09_inst.o_fifo_data[28] +.sym 12447 lvds_rx_09_inst.r_state_if_SB_LUT4_I2_O[0] +.sym 12452 lvds_rx_09_inst.r_state_if_SB_LUT4_I2_O[0] +.sym 12454 lvds_rx_09_inst.o_fifo_data[27] +.sym 12456 w_lvds_rx_09_d1_SB_LUT4_I0_O_SB_LUT4_I3_O_$glb_ce .sym 12457 lvds_clock_buf -.sym 12463 rx_09_fifo.wr_addr_gray_rd[5] -.sym 12464 io_pmod_SB_DFFSS_Q_D_SB_LUT4_O_I0_SB_LUT4_O_I2[2] -.sym 12465 rx_09_fifo.wr_addr_gray_rd_r[5] -.sym 12466 io_pmod_SB_DFFSS_Q_D_SB_LUT4_O_I0_SB_LUT4_O_1_I1[2] -.sym 12467 rx_09_fifo.wr_addr_gray_rd_r[0] -.sym 12468 io_pmod_SB_DFFSS_Q_D_SB_LUT4_O_I0_SB_LUT4_O_3_I2[0] -.sym 12469 rx_09_fifo.wr_addr_gray_rd[2] -.sym 12470 rx_09_fifo.wr_addr_gray_rd[4] -.sym 12472 rx_09_fifo.rd_addr_gray_wr[3] -.sym 12475 rx_09_fifo.rd_addr_gray_wr_r[5] -.sym 12476 io_pmod[4]$SB_IO_IN -.sym 12478 w_smi_data_output[3] -.sym 12479 rx_09_fifo.full_o_SB_DFFSR_Q_D_SB_LUT4_O_I1_SB_LUT4_O_I0_SB_LUT4_O_1_I3[0] -.sym 12481 w_smi_data_output[4] -.sym 12484 rx_09_fifo.rd_addr_gray_wr[5] -.sym 12485 io_smi_data[4]$SB_IO_OUT -.sym 12493 rx_09_fifo.wr_addr[7] -.sym 12495 i_smi_a1_SB_LUT4_I1_O_SB_LUT4_O_I2_SB_LUT4_I0_O[2] -.sym 12514 rx_09_fifo.rd_addr_gray_wr_r[5] -.sym 12516 rx_09_fifo.full_o_SB_DFFSR_Q_D_SB_LUT4_O_I1_SB_LUT4_O_I0[1] -.sym 12517 rx_09_fifo.wr_addr_gray_rd_r[3] -.sym 12518 rx_09_fifo.full_o_SB_DFFSR_Q_D_SB_LUT4_O_I1_SB_LUT4_O_I0_SB_LUT4_O_I0[1] -.sym 12519 io_pmod_SB_DFFSS_Q_D_SB_LUT4_O_I0_SB_LUT4_O_I0[0] -.sym 12520 i_smi_a1_SB_LUT4_I1_O_SB_LUT4_O_I2_SB_LUT4_I0_O[2] -.sym 12523 rx_09_fifo.wr_addr_gray_rd[1] -.sym 12524 rx_09_fifo.wr_addr_gray_rd_r[2] -.sym 12528 rx_09_fifo.wr_addr[7] -.sym 12529 rx_09_fifo.rd_addr_gray_wr_r[6] -.sym 12544 rx_09_fifo.wr_addr_gray_SB_DFFESR_Q_3_D[2] -.sym 12546 rx_09_fifo.wr_addr_gray_SB_DFFESR_Q_3_D[1] -.sym 12553 i_smi_a1_SB_LUT4_I1_O_SB_LUT4_O_I2_SB_LUT4_I0_O[2] -.sym 12555 rx_09_fifo.wr_addr_gray_SB_DFFESR_Q_4_D[2] -.sym 12559 w_rx_09_fifo_pull -.sym 12562 rx_09_fifo.wr_addr_gray_SB_LUT4_I2_1_O[7] -.sym 12567 lvds_rx_09_inst.r_push_SB_LUT4_I3_1_O -.sym 12580 rx_09_fifo.wr_addr_gray_SB_LUT4_I2_1_O[7] -.sym 12585 rx_09_fifo.wr_addr_gray_SB_DFFESR_Q_4_D[2] -.sym 12605 w_rx_09_fifo_pull -.sym 12606 i_smi_a1_SB_LUT4_I1_O_SB_LUT4_O_I2_SB_LUT4_I0_O[2] -.sym 12611 rx_09_fifo.wr_addr_gray_SB_DFFESR_Q_3_D[2] -.sym 12618 rx_09_fifo.wr_addr_gray_SB_DFFESR_Q_3_D[1] -.sym 12619 lvds_rx_09_inst.r_push_SB_LUT4_I3_1_O -.sym 12620 lvds_clock_buf -.sym 12621 i_smi_a1_SB_LUT4_I1_O_SB_LUT4_O_I2_SB_LUT4_I0_O[2]_$glb_sr -.sym 12622 rx_09_fifo.rd_addr_gray_SB_DFFESR_Q_1_D[1] -.sym 12623 smi_ctrl_ins.r_fifo_09_pull_SB_LUT4_I2_O[2] -.sym 12624 smi_ctrl_ins.r_fifo_09_pull_SB_LUT4_I2_O[0] -.sym 12625 rx_09_fifo.wr_addr_gray[1] -.sym 12626 rx_09_fifo.wr_addr_gray[2] -.sym 12627 rx_09_fifo.rd_addr_gray_SB_DFFESR_Q_1_D[3] -.sym 12628 io_pmod_SB_DFFSS_Q_D_SB_LUT4_O_I0_SB_LUT4_O_I2[3] -.sym 12629 rx_09_fifo.wr_addr_gray[0] -.sym 12631 io_pmod_SB_DFFSS_Q_D_SB_LUT4_O_I0_SB_LUT4_O_3_I2[0] -.sym 12636 smi_ctrl_ins.r_fifo_09_pull_SB_LUT4_I3_1_O -.sym 12638 rx_09_fifo.rd_addr[0] -.sym 12641 w_smi_data_output[5] -.sym 12647 rx_09_fifo.wr_addr_gray_SB_DFFESR_Q_7_D[1] -.sym 12665 w_rx_09_fifo_push -.sym 12667 rx_09_fifo.wr_addr_gray_SB_DFFESR_Q_4_D[1] -.sym 12668 rx_09_fifo.wr_addr_gray_SB_LUT4_I2_1_O[5] -.sym 12669 rx_09_fifo.wr_addr_gray_SB_LUT4_I2_1_O[6] -.sym 12670 rx_09_fifo.wr_addr_gray_SB_LUT4_I2_1_O[7] -.sym 12675 rx_09_fifo.wr_addr_gray_SB_LUT4_I2_1_O[4] -.sym 12677 rx_09_fifo.rd_addr_gray_SB_LUT4_I2_O[7] -.sym 12678 rx_09_fifo.wr_addr_gray_SB_DFFESR_Q_4_D[2] -.sym 12679 rx_09_fifo.rd_addr_gray_SB_DFFESR_Q_1_D[1] -.sym 12680 rx_09_fifo.rd_addr_gray_wr_r[5] -.sym 12682 rx_09_fifo.full_o_SB_DFFSR_Q_D_SB_LUT4_O_I1_SB_LUT4_O_I0[1] -.sym 12684 rx_09_fifo.full_o_SB_DFFSR_Q_D_SB_LUT4_O_I1_SB_LUT4_O_I0_SB_LUT4_O_I0[1] -.sym 12685 rx_09_fifo.wr_addr_gray_SB_DFFESR_Q_3_D[1] -.sym 12686 i_smi_a1_SB_LUT4_I1_O_SB_LUT4_O_I2_SB_LUT4_I0_O[2] -.sym 12690 smi_ctrl_ins.r_fifo_09_pull_SB_LUT4_I3_1_O -.sym 12691 rx_09_fifo.wr_addr_gray_SB_DFFESR_Q_3_D[2] -.sym 12694 rx_09_fifo.rd_addr_gray_wr_r[6] -.sym 12697 i_smi_a1_SB_LUT4_I1_O_SB_LUT4_O_I2_SB_LUT4_I0_O[2] -.sym 12698 w_rx_09_fifo_push -.sym 12702 rx_09_fifo.wr_addr_gray_SB_DFFESR_Q_3_D[2] -.sym 12703 rx_09_fifo.rd_addr_gray_wr_r[6] -.sym 12704 rx_09_fifo.full_o_SB_DFFSR_Q_D_SB_LUT4_O_I1_SB_LUT4_O_I0[1] -.sym 12705 rx_09_fifo.wr_addr_gray_SB_DFFESR_Q_3_D[1] -.sym 12708 rx_09_fifo.wr_addr_gray_SB_DFFESR_Q_4_D[1] -.sym 12709 rx_09_fifo.full_o_SB_DFFSR_Q_D_SB_LUT4_O_I1_SB_LUT4_O_I0_SB_LUT4_O_I0[1] -.sym 12710 rx_09_fifo.wr_addr_gray_SB_DFFESR_Q_4_D[2] -.sym 12711 rx_09_fifo.rd_addr_gray_wr_r[5] -.sym 12714 rx_09_fifo.rd_addr_gray_SB_LUT4_I2_O[7] -.sym 12722 rx_09_fifo.wr_addr_gray_SB_LUT4_I2_1_O[6] -.sym 12723 rx_09_fifo.wr_addr_gray_SB_LUT4_I2_1_O[7] -.sym 12727 rx_09_fifo.rd_addr_gray_SB_DFFESR_Q_1_D[1] -.sym 12733 rx_09_fifo.wr_addr_gray_SB_LUT4_I2_1_O[5] -.sym 12735 rx_09_fifo.wr_addr_gray_SB_LUT4_I2_1_O[4] -.sym 12738 rx_09_fifo.wr_addr_gray_SB_LUT4_I2_1_O[5] -.sym 12741 rx_09_fifo.wr_addr_gray_SB_LUT4_I2_1_O[6] +.sym 12458 i_smi_a1_SB_LUT4_I1_O[3]_$glb_sr +.sym 12465 lvds_rx_09_inst.o_fifo_data[17] +.sym 12467 lvds_rx_09_inst.o_fifo_data[15] +.sym 12468 lvds_rx_09_inst.o_fifo_data[16] +.sym 12470 lvds_rx_09_inst.o_fifo_data[14] +.sym 12474 rx_24_fifo.rd_addr_gray_SB_DFFESR_Q_3_D[1] +.sym 12500 lvds_rx_09_inst.o_fifo_data[24] +.sym 12501 i_smi_a1_SB_LUT4_I1_O[3] +.sym 12506 lvds_rx_09_inst.o_fifo_data[28] +.sym 12517 rx_09_fifo.rd_addr[5] +.sym 12518 lvds_rx_09_inst.o_fifo_data[15] +.sym 12519 lvds_rx_09_inst.o_fifo_data[13] +.sym 12522 lvds_rx_09_inst.o_fifo_data[11] +.sym 12524 lvds_rx_09_inst.o_fifo_data[8] +.sym 12525 lvds_rx_09_inst.o_fifo_data[14] +.sym 12526 lvds_rx_09_inst.o_fifo_data[9] +.sym 12528 lvds_rx_09_inst.o_fifo_data[12] +.sym 12540 w_rx_09_fifo_pull +.sym 12551 smi_ctrl_ins.r_fifo_09_pull_SB_LUT4_I3_1_O +.sym 12553 rx_09_fifo.rd_addr[3] +.sym 12555 rx_09_fifo.rd_addr[2] +.sym 12556 i_smi_a1_SB_LUT4_I1_O[3] +.sym 12558 rx_09_fifo.rd_addr_gray_SB_DFFESR_Q_2_D_SB_LUT4_I3_O_SB_LUT4_O_I1_SB_LUT4_O_1_I0[2] +.sym 12561 rx_09_fifo.rd_addr_gray_SB_LUT4_I2_O[5] +.sym 12562 rx_09_fifo.rd_addr_gray_SB_LUT4_I2_O[6] +.sym 12565 rx_09_fifo.rd_addr_gray_SB_DFFESR_Q_2_D_SB_LUT4_I3_O_SB_LUT4_O_I1_SB_LUT4_O_1_I0[3] +.sym 12569 rx_09_fifo.rd_addr[0] +.sym 12575 rx_09_fifo.rd_addr_gray_SB_LUT4_I2_O[6] +.sym 12580 rx_09_fifo.rd_addr_gray_SB_LUT4_I2_O[6] +.sym 12581 rx_09_fifo.rd_addr_gray_SB_LUT4_I2_O[5] +.sym 12585 rx_09_fifo.rd_addr[3] +.sym 12587 rx_09_fifo.rd_addr[2] +.sym 12592 w_rx_09_fifo_pull +.sym 12594 i_smi_a1_SB_LUT4_I1_O[3] +.sym 12600 rx_09_fifo.rd_addr_gray_SB_LUT4_I2_O[5] +.sym 12604 rx_09_fifo.rd_addr[0] +.sym 12609 rx_09_fifo.rd_addr_gray_SB_DFFESR_Q_2_D_SB_LUT4_I3_O_SB_LUT4_O_I1_SB_LUT4_O_1_I0[2] +.sym 12611 rx_09_fifo.rd_addr_gray_SB_DFFESR_Q_2_D_SB_LUT4_I3_O_SB_LUT4_O_I1_SB_LUT4_O_1_I0[3] +.sym 12616 rx_09_fifo.rd_addr_gray_SB_DFFESR_Q_2_D_SB_LUT4_I3_O_SB_LUT4_O_I1_SB_LUT4_O_1_I0[2] +.sym 12619 smi_ctrl_ins.r_fifo_09_pull_SB_LUT4_I3_1_O +.sym 12620 r_counter[0]_$glb_clk +.sym 12621 i_smi_a1_SB_LUT4_I1_O[3]_$glb_sr +.sym 12622 lvds_rx_09_inst.o_fifo_data[11] +.sym 12623 lvds_rx_09_inst.o_fifo_data[8] +.sym 12624 lvds_rx_09_inst.o_fifo_data[9] +.sym 12625 lvds_rx_09_inst.o_fifo_data[12] +.sym 12626 lvds_rx_09_inst.o_fifo_data[6] +.sym 12627 lvds_rx_09_inst.o_fifo_data[10] +.sym 12628 i_smi_a1_SB_LUT4_I1_O_SB_LUT4_I3_O[0] +.sym 12629 lvds_rx_09_inst.o_fifo_data[13] +.sym 12632 rx_24_fifo.rd_addr_gray_SB_DFFESR_Q_5_D[0] +.sym 12637 sys_ctrl_ins.o_soft_reset_SB_DFFESS_Q_S +.sym 12647 w_smi_data_output[4] +.sym 12649 lvds_rx_09_inst.o_fifo_data[10] +.sym 12652 i_smi_a3$SB_IO_IN +.sym 12664 rx_09_fifo.rd_addr_gray_SB_DFFESR_Q_2_D[0] +.sym 12665 i_smi_a2_SB_LUT4_I1_O_SB_LUT4_I3_I2_SB_LUT4_O_I3[1] +.sym 12666 rx_09_fifo.rd_addr_gray_SB_DFFESR_Q_2_D_SB_LUT4_I3_O_SB_LUT4_O_I1_SB_LUT4_O_1_I0[3] +.sym 12672 rx_09_fifo.rd_addr_gray_SB_DFFESR_Q_2_D[1] +.sym 12673 i_smi_a2_SB_LUT4_I1_O_SB_LUT4_I3_I2_SB_LUT4_O_I3[1] +.sym 12674 smi_ctrl_ins.r_fifo_09_pull_SB_LUT4_I3_1_O +.sym 12675 rx_09_fifo.rd_addr[5] +.sym 12676 rx_09_fifo.rd_addr[0] +.sym 12677 w_rx_09_fifo_pulled_data[8] +.sym 12678 i_smi_a2_SB_LUT4_I1_O_SB_LUT4_I3_I2[1] +.sym 12680 w_rx_09_fifo_pulled_data[16] +.sym 12681 w_rx_09_fifo_pulled_data[24] +.sym 12684 w_rx_09_fifo_pulled_data[0] +.sym 12696 rx_09_fifo.rd_addr_gray_SB_DFFESR_Q_2_D[1] +.sym 12702 i_smi_a2_SB_LUT4_I1_O_SB_LUT4_I3_I2_SB_LUT4_O_I3[1] +.sym 12703 w_rx_09_fifo_pulled_data[24] +.sym 12704 w_rx_09_fifo_pulled_data[8] +.sym 12705 i_smi_a2_SB_LUT4_I1_O_SB_LUT4_I3_I2[1] +.sym 12720 rx_09_fifo.rd_addr_gray_SB_DFFESR_Q_2_D[1] +.sym 12721 rx_09_fifo.rd_addr_gray_SB_DFFESR_Q_2_D[0] +.sym 12726 w_rx_09_fifo_pulled_data[0] +.sym 12727 i_smi_a2_SB_LUT4_I1_O_SB_LUT4_I3_I2[1] +.sym 12728 w_rx_09_fifo_pulled_data[16] +.sym 12729 i_smi_a2_SB_LUT4_I1_O_SB_LUT4_I3_I2_SB_LUT4_O_I3[1] +.sym 12734 rx_09_fifo.rd_addr[0] +.sym 12735 rx_09_fifo.rd_addr_gray_SB_DFFESR_Q_2_D_SB_LUT4_I3_O_SB_LUT4_O_I1_SB_LUT4_O_1_I0[3] +.sym 12738 rx_09_fifo.rd_addr[5] +.sym 12740 rx_09_fifo.rd_addr_gray_SB_DFFESR_Q_2_D[0] .sym 12742 smi_ctrl_ins.r_fifo_09_pull_SB_LUT4_I3_1_O .sym 12743 r_counter[0]_$glb_clk -.sym 12744 i_smi_a1_SB_LUT4_I1_O_SB_LUT4_O_I2_SB_LUT4_I0_O[2]_$glb_sr -.sym 12745 rx_09_fifo.wr_addr_gray_rd[0] -.sym 12746 smi_ctrl_ins.r_fifo_09_pull_SB_LUT4_I2_O[3] -.sym 12747 rx_09_fifo.wr_addr_gray_rd[1] -.sym 12748 rx_09_fifo.full_o_SB_DFFSR_Q_D_SB_LUT4_O_I1[2] -.sym 12749 rx_09_fifo.full_o_SB_LUT4_I3_O_SB_LUT4_I3_O[1] -.sym 12750 rx_09_fifo.full_o_SB_LUT4_I3_O_SB_LUT4_I3_O[0] -.sym 12751 rx_09_fifo.wr_addr_gray_rd[3] -.sym 12752 rx_09_fifo.wr_addr_gray_SB_DFFESR_Q_7_D[3] -.sym 12757 lvds_rx_09_inst.r_push_SB_LUT4_I3_1_O -.sym 12760 io_pmod_SB_DFFSS_Q_D_SB_LUT4_O_I0_SB_LUT4_O_3_I2[3] -.sym 12761 w_rx_09_fifo_push -.sym 12763 $PACKER_VCC_NET -.sym 12764 smi_ctrl_ins.int_cnt_24[5] -.sym 12765 io_pmod_SB_DFFSS_Q_D_SB_LUT4_O_I0_SB_LUT4_O_I0[1] -.sym 12772 io_pmod_SB_DFFSS_Q_D_SB_LUT4_O_I0_SB_LUT4_O_I0[1] -.sym 12779 smi_ctrl_ins.int_cnt_09_SB_DFFESR_Q_E -.sym 12780 smi_ctrl_ins.int_cnt_09[3] -.sym 12786 rx_09_fifo.wr_addr[0] -.sym 12790 rx_09_fifo.wr_addr[4] -.sym 12791 rx_09_fifo.full_o_SB_DFFSR_Q_D_SB_LUT4_O_I1_SB_LUT4_O_I0_SB_LUT4_O_1_I3[1] -.sym 12792 rx_09_fifo.wr_addr[2] -.sym 12793 rx_09_fifo.wr_addr[6] -.sym 12795 rx_09_fifo.wr_addr[3] -.sym 12796 rx_09_fifo.wr_addr[5] -.sym 12805 rx_09_fifo.wr_addr[7] -.sym 12818 $nextpnr_ICESTORM_LC_8$O -.sym 12821 rx_09_fifo.wr_addr[0] -.sym 12824 rx_09_fifo.wr_addr_gray_SB_LUT4_I2_1_I3[2] -.sym 12827 rx_09_fifo.full_o_SB_DFFSR_Q_D_SB_LUT4_O_I1_SB_LUT4_O_I0_SB_LUT4_O_1_I3[1] -.sym 12830 rx_09_fifo.wr_addr_gray_SB_LUT4_I2_1_I3[3] -.sym 12833 rx_09_fifo.wr_addr[2] -.sym 12834 rx_09_fifo.wr_addr_gray_SB_LUT4_I2_1_I3[2] -.sym 12836 rx_09_fifo.wr_addr_gray_SB_LUT4_I2_1_I3[4] -.sym 12838 rx_09_fifo.wr_addr[3] -.sym 12840 rx_09_fifo.wr_addr_gray_SB_LUT4_I2_1_I3[3] -.sym 12842 rx_09_fifo.wr_addr_gray_SB_LUT4_I2_1_I3[5] -.sym 12845 rx_09_fifo.wr_addr[4] -.sym 12846 rx_09_fifo.wr_addr_gray_SB_LUT4_I2_1_I3[4] -.sym 12848 rx_09_fifo.wr_addr_gray_SB_LUT4_I2_1_I3[6] -.sym 12851 rx_09_fifo.wr_addr[5] -.sym 12852 rx_09_fifo.wr_addr_gray_SB_LUT4_I2_1_I3[5] -.sym 12854 rx_09_fifo.wr_addr_gray_SB_LUT4_I2_1_I3[7] -.sym 12856 rx_09_fifo.wr_addr[6] -.sym 12858 rx_09_fifo.wr_addr_gray_SB_LUT4_I2_1_I3[6] -.sym 12863 rx_09_fifo.wr_addr[7] -.sym 12864 rx_09_fifo.wr_addr_gray_SB_LUT4_I2_1_I3[7] -.sym 12868 rx_09_fifo.wr_addr_gray_SB_DFFESR_Q_7_D[1] -.sym 12869 spi_if_ins.r_tx_byte[7] -.sym 12870 spi_if_ins.r_tx_byte[3] -.sym 12871 spi_if_ins.r_tx_byte[1] -.sym 12873 spi_if_ins.r_tx_byte[2] -.sym 12875 spi_if_ins.r_tx_byte[5] -.sym 12881 io_pmod[2]$SB_IO_IN -.sym 12882 rx_09_fifo.rd_addr[0] -.sym 12884 spi_if_ins.spi.o_spi_miso_SB_DFFE_Q_E -.sym 12887 io_pmod_SB_DFFSS_Q_D_SB_LUT4_O_I0_SB_LUT4_O_I2[1] -.sym 12888 io_pmod_SB_DFFSS_Q_D_SB_LUT4_O_I0_SB_LUT4_O_2_I0[3] -.sym 12889 io_pmod_SB_DFFSS_Q_D_SB_LUT4_O_I0_SB_LUT4_O_3_I2[3] -.sym 12894 w_rx_09_fifo_full -.sym 12903 smi_ctrl_ins.o_data_out_SB_DFFESS_Q_E -.sym 12909 rx_09_fifo.rd_addr_gray_wr_r[5] -.sym 12910 rx_09_fifo.rd_addr_gray_wr_r[0] -.sym 12912 lvds_rx_09_inst.r_push_SB_LUT4_I3_I0[1] -.sym 12913 lvds_rx_09_inst.r_push_SB_LUT4_I3_O[2] -.sym 12914 lvds_rx_09_inst.r_push_SB_LUT4_I3_O[0] -.sym 12915 lvds_rx_09_inst.r_push_SB_LUT4_I3_O[1] -.sym 12916 rx_09_fifo.wr_addr_gray_SB_LUT4_I2_1_O[7] -.sym 12919 rx_09_fifo.full_o_SB_DFFSR_Q_D_SB_LUT4_O_I1[0] -.sym 12920 rx_09_fifo.full_o_SB_DFFSR_Q_D_SB_LUT4_O_I1[2] -.sym 12921 lvds_rx_09_inst.r_push_SB_LUT4_I3_O_SB_LUT4_O_I3[4] -.sym 12922 lvds_rx_09_inst.r_push_SB_LUT4_I3_O_SB_LUT4_O_I3[5] -.sym 12923 rx_09_fifo.rd_addr_gray_wr_r[6] -.sym 12924 lvds_rx_09_inst.r_push_SB_LUT4_I3_I0[2] -.sym 12925 rx_09_fifo.wr_addr[0] -.sym 12926 lvds_rx_09_inst.r_push_SB_LUT4_I3_I0[0] -.sym 12930 rx_09_fifo.full_o_SB_DFFSR_Q_D_SB_LUT4_O_I1_SB_LUT4_O_I0_SB_LUT4_O_1_I3[1] -.sym 12931 rx_09_fifo.full_o_SB_DFFSR_Q_D_SB_LUT4_O_I1[1] -.sym 12938 w_rx_09_fifo_full -.sym 12939 lvds_rx_09_inst.r_push_SB_LUT4_I3_O[3] -.sym 12940 w_rx_09_fifo_push -.sym 12942 rx_09_fifo.wr_addr[0] -.sym 12945 rx_09_fifo.full_o_SB_DFFSR_Q_D_SB_LUT4_O_I1_SB_LUT4_O_I0_SB_LUT4_O_1_I3[1] -.sym 12948 rx_09_fifo.rd_addr_gray_wr_r[0] -.sym 12950 rx_09_fifo.full_o_SB_DFFSR_Q_D_SB_LUT4_O_I1_SB_LUT4_O_I0_SB_LUT4_O_1_I3[1] -.sym 12951 rx_09_fifo.wr_addr[0] -.sym 12954 lvds_rx_09_inst.r_push_SB_LUT4_I3_O[1] -.sym 12955 lvds_rx_09_inst.r_push_SB_LUT4_I3_O[0] -.sym 12956 lvds_rx_09_inst.r_push_SB_LUT4_I3_O[2] -.sym 12957 lvds_rx_09_inst.r_push_SB_LUT4_I3_O[3] -.sym 12960 rx_09_fifo.wr_addr_gray_SB_LUT4_I2_1_O[7] -.sym 12961 w_rx_09_fifo_push -.sym 12962 lvds_rx_09_inst.r_push_SB_LUT4_I3_O[0] -.sym 12963 w_rx_09_fifo_full -.sym 12966 lvds_rx_09_inst.r_push_SB_LUT4_I3_O_SB_LUT4_O_I3[5] -.sym 12967 rx_09_fifo.rd_addr_gray_wr_r[6] -.sym 12972 rx_09_fifo.full_o_SB_DFFSR_Q_D_SB_LUT4_O_I1[0] -.sym 12973 rx_09_fifo.full_o_SB_DFFSR_Q_D_SB_LUT4_O_I1[1] -.sym 12975 rx_09_fifo.full_o_SB_DFFSR_Q_D_SB_LUT4_O_I1[2] -.sym 12978 w_rx_09_fifo_push -.sym 12979 lvds_rx_09_inst.r_push_SB_LUT4_I3_I0[1] -.sym 12980 lvds_rx_09_inst.r_push_SB_LUT4_I3_I0[2] -.sym 12981 lvds_rx_09_inst.r_push_SB_LUT4_I3_I0[0] -.sym 12984 lvds_rx_09_inst.r_push_SB_LUT4_I3_O_SB_LUT4_O_I3[4] -.sym 12985 rx_09_fifo.rd_addr_gray_wr_r[5] -.sym 12987 lvds_rx_09_inst.r_push_SB_LUT4_I3_O_SB_LUT4_O_I3[5] -.sym 12989 lvds_clock_buf -.sym 12990 i_smi_a1_SB_LUT4_I1_O_SB_LUT4_O_I2_SB_LUT4_I0_O[2]_$glb_sr -.sym 12996 smi_ctrl_ins.int_cnt_09[3] -.sym 12997 smi_ctrl_ins.int_cnt_09[4] -.sym 12998 smi_ctrl_ins.int_cnt_09[5] -.sym 13005 rx_09_fifo.wr_addr[0] -.sym 13011 smi_ctrl_ins.int_cnt_24_SB_DFFESR_Q_E -.sym 13023 smi_ctrl_ins.int_cnt_09_SB_DFFESR_Q_D_SB_LUT4_O_I3[2] -.sym 13025 i_smi_a1_SB_LUT4_I1_O_SB_LUT4_O_I2_SB_LUT4_I0_O[2] -.sym 13026 w_tx_data_io[0] -.sym 13032 smi_ctrl_ins.int_cnt_09_SB_DFFESR_Q_E_SB_LUT4_O_I1[0] -.sym 13034 spi_if_ins.r_tx_data_valid_SB_DFFESR_Q_D_SB_LUT4_I3_O -.sym 13035 rx_09_fifo.full_o_SB_DFFSR_Q_D_SB_LUT4_O_I1_SB_LUT4_O_I0_SB_LUT4_O_1_I3[1] -.sym 13046 rx_09_fifo.full_o_SB_LUT4_I3_O[0] -.sym 13049 lvds_rx_09_inst.r_push_SB_LUT4_I3_O_SB_LUT4_O_I3[1] -.sym 13051 i_smi_a1_SB_LUT4_I1_O_SB_LUT4_O_I2_SB_LUT4_I0_O[2] -.sym 13055 r_tx_data[0] -.sym 13057 rx_09_fifo.full_o_SB_DFFSR_Q_D_SB_LUT4_O_I1_SB_LUT4_O_I0_SB_LUT4_O_1_I3[0] -.sym 13060 smi_ctrl_ins.int_cnt_09_SB_DFFESR_Q_E_SB_LUT4_O_I1[1] -.sym 13073 r_tx_data[0] -.sym 13078 lvds_rx_09_inst.r_push_SB_LUT4_I3_O_SB_LUT4_O_I3[1] -.sym 13080 rx_09_fifo.full_o_SB_LUT4_I3_O[0] -.sym 13083 lvds_rx_09_inst.r_push_SB_LUT4_I3_O_SB_LUT4_O_I3[1] -.sym 13085 rx_09_fifo.full_o_SB_DFFSR_Q_D_SB_LUT4_O_I1_SB_LUT4_O_I0_SB_LUT4_O_1_I3[1] -.sym 13086 rx_09_fifo.full_o_SB_DFFSR_Q_D_SB_LUT4_O_I1_SB_LUT4_O_I0_SB_LUT4_O_1_I3[0] -.sym 13095 i_smi_a1_SB_LUT4_I1_O_SB_LUT4_O_I2_SB_LUT4_I0_O[2] -.sym 13096 smi_ctrl_ins.int_cnt_09_SB_DFFESR_Q_E_SB_LUT4_O_I1[0] -.sym 13097 smi_ctrl_ins.int_cnt_09_SB_DFFESR_Q_E_SB_LUT4_O_I1[1] -.sym 13111 spi_if_ins.r_tx_data_valid_SB_DFFESR_Q_D_SB_LUT4_I3_O -.sym 13112 r_counter[0]_$glb_clk -.sym 13118 spi_if_ins.r_tx_data_valid_SB_DFFESR_Q_D[0] -.sym 13126 smi_ctrl_ins.int_cnt_09_SB_DFFESR_Q_D_SB_LUT4_O_I3[1] -.sym 13130 i_ss_SB_LUT4_I3_O -.sym 13140 spi_if_ins.r_tx_data_valid_SB_DFFESR_Q_D_SB_LUT4_I3_O -.sym 13146 w_tx_data_smi[1] -.sym 13156 io_pmod[2]$SB_IO_IN -.sym 13159 io_ctrl_ins.o_data_out_SB_DFFESR_Q_6_R[0] -.sym 13166 w_rx_09_fifo_full -.sym 13167 w_rx_24_fifo_empty -.sym 13173 smi_ctrl_ins.o_data_out_SB_DFFESS_Q_E -.sym 13188 w_rx_09_fifo_full -.sym 13201 w_rx_24_fifo_empty -.sym 13232 io_pmod[2]$SB_IO_IN -.sym 13234 smi_ctrl_ins.o_data_out_SB_DFFESS_Q_E +.sym 12744 i_smi_a1_SB_LUT4_I1_O[3]_$glb_sr +.sym 12747 smi_ctrl_ins.r_fifo_24_pull_SB_DFFESR_Q_E_SB_LUT4_O_I1[5] +.sym 12749 smi_ctrl_ins.r_fifo_24_pull_SB_DFFESR_Q_E[1] +.sym 12751 i_smi_a1_SB_LUT4_I1_O_SB_LUT4_I3_O[2] +.sym 12756 $PACKER_VCC_NET +.sym 12759 i_smi_a2_SB_LUT4_I1_O_SB_LUT4_I3_I2_SB_LUT4_O_I3[1] +.sym 12760 lvds_rx_09_inst.o_fifo_data[7] +.sym 12765 io_pmod[2]$SB_IO_IN +.sym 12775 i_smi_a1_SB_LUT4_I1_O[2] +.sym 12778 i_smi_a1_SB_LUT4_I1_O[3] +.sym 12780 spi_if_ins.spi.r_tx_byte_SB_DFFESR_Q_E +.sym 12787 smi_ctrl_ins.o_smi_data_out_SB_DFFE_Q_7_D_SB_LUT4_O_I0[1] +.sym 12789 smi_ctrl_ins.o_smi_data_out_SB_DFFE_Q_7_D_SB_LUT4_O_I0[2] +.sym 12790 i_smi_a2_SB_LUT4_I1_O_SB_LUT4_I3_I2[2] +.sym 12791 smi_ctrl_ins.o_smi_data_out_SB_DFFE_Q_2_D_SB_LUT4_O_I1[1] +.sym 12792 i_smi_a1_SB_LUT4_I1_O_SB_LUT4_I3_O[0] +.sym 12797 i_smi_a1_SB_LUT4_I1_O_SB_LUT4_I3_O[1] +.sym 12798 smi_ctrl_ins.o_smi_data_out_SB_DFFE_Q_1_D_SB_LUT4_O_I1[2] +.sym 12799 smi_ctrl_ins.o_smi_data_out_SB_DFFE_Q_7_D_SB_LUT4_O_I0[0] +.sym 12803 i_smi_a1_SB_LUT4_I1_O_SB_LUT4_I3_O[3] +.sym 12804 w_smi_data_output[7] +.sym 12806 smi_ctrl_ins.o_smi_data_out_SB_DFFE_Q_2_D_SB_LUT4_O_I1[3] +.sym 12811 i_smi_a1_SB_LUT4_I1_O_SB_LUT4_I3_O[3] +.sym 12812 i_smi_a3$SB_IO_IN +.sym 12813 smi_ctrl_ins.o_smi_data_out_SB_DFFE_Q_E +.sym 12816 i_smi_a1_SB_LUT4_I1_O_SB_LUT4_I3_O[2] +.sym 12819 smi_ctrl_ins.o_smi_data_out_SB_DFFE_Q_7_D_SB_LUT4_O_I0[0] +.sym 12820 smi_ctrl_ins.o_smi_data_out_SB_DFFE_Q_7_D_SB_LUT4_O_I0[1] +.sym 12821 i_smi_a1_SB_LUT4_I1_O_SB_LUT4_I3_O[3] +.sym 12822 smi_ctrl_ins.o_smi_data_out_SB_DFFE_Q_7_D_SB_LUT4_O_I0[2] +.sym 12825 i_smi_a3$SB_IO_IN +.sym 12826 w_smi_data_output[7] +.sym 12837 i_smi_a1_SB_LUT4_I1_O_SB_LUT4_I3_O[2] +.sym 12838 i_smi_a1_SB_LUT4_I1_O_SB_LUT4_I3_O[0] +.sym 12839 i_smi_a1_SB_LUT4_I1_O_SB_LUT4_I3_O[3] +.sym 12840 i_smi_a1_SB_LUT4_I1_O_SB_LUT4_I3_O[1] +.sym 12861 smi_ctrl_ins.o_smi_data_out_SB_DFFE_Q_2_D_SB_LUT4_O_I1[1] +.sym 12862 smi_ctrl_ins.o_smi_data_out_SB_DFFE_Q_2_D_SB_LUT4_O_I1[3] +.sym 12863 smi_ctrl_ins.o_smi_data_out_SB_DFFE_Q_1_D_SB_LUT4_O_I1[2] +.sym 12864 i_smi_a2_SB_LUT4_I1_O_SB_LUT4_I3_I2[2] +.sym 12865 smi_ctrl_ins.o_smi_data_out_SB_DFFE_Q_E +.sym 12866 r_counter[0]_$glb_clk +.sym 12871 i_smi_a1_SB_LUT4_I1_O_SB_LUT4_O_I0[2] +.sym 12872 w_rx_24_fifo_pull +.sym 12873 smi_ctrl_ins.r_fifo_24_pull_SB_DFFESR_Q_E[2] +.sym 12874 i_smi_a1_SB_LUT4_I1_O[1] +.sym 12875 i_smi_a1_SB_LUT4_I1_O_SB_LUT4_I0_O[0] +.sym 12880 io_smi_data[5]$SB_IO_OUT +.sym 12881 i_smi_soe_se$rename$0 +.sym 12882 i_smi_a2_SB_LUT4_I1_O_SB_LUT4_I3_I2[1] +.sym 12885 smi_ctrl_ins.o_smi_data_out_SB_DFFE_Q_7_D_SB_LUT4_O_I0[2] +.sym 12893 w_rx_24_fifo_data[14] +.sym 12901 w_rx_24_fifo_data[11] +.sym 12902 w_rx_24_fifo_data[5] +.sym 12911 smi_ctrl_ins.int_cnt_24_SB_DFFESR_Q_E +.sym 12913 smi_ctrl_ins.r_fifo_24_pull_SB_DFFESR_Q_E[1] +.sym 12914 w_rx_24_fifo_empty +.sym 12918 i_smi_soe_se$rename$0 +.sym 12921 smi_ctrl_ins.int_cnt_24_SB_DFFESR_Q_E +.sym 12923 i_smi_a1_SB_LUT4_I1_O_SB_LUT4_O_I0[3] +.sym 12925 i_smi_a2_SB_LUT4_I1_O_SB_LUT4_I3_1_I2_SB_LUT4_O_I3[1] +.sym 12926 smi_ctrl_ins.int_cnt_24[5] +.sym 12927 smi_ctrl_ins.int_cnt_24[4] +.sym 12929 w_rx_24_fifo_pull +.sym 12930 smi_ctrl_ins.r_fifo_24_pull_SB_DFFESR_Q_E[2] +.sym 12934 smi_ctrl_ins.int_cnt_24[5] +.sym 12935 i_smi_a1_SB_LUT4_I1_O[2] +.sym 12937 i_smi_a2_SB_LUT4_I1_O_SB_LUT4_I3_1_I2[2] +.sym 12938 i_smi_a1_SB_LUT4_I1_O[3] +.sym 12942 smi_ctrl_ins.int_cnt_24[5] +.sym 12948 i_smi_a1_SB_LUT4_I1_O_SB_LUT4_O_I0[3] +.sym 12950 i_smi_a2_SB_LUT4_I1_O_SB_LUT4_I3_1_I2[2] +.sym 12951 i_smi_soe_se$rename$0 +.sym 12955 smi_ctrl_ins.int_cnt_24_SB_DFFESR_Q_E +.sym 12960 i_smi_a1_SB_LUT4_I1_O[2] +.sym 12961 i_smi_soe_se$rename$0 +.sym 12962 i_smi_a1_SB_LUT4_I1_O_SB_LUT4_O_I0[3] +.sym 12963 w_rx_24_fifo_pull +.sym 12966 i_smi_a1_SB_LUT4_I1_O[3] +.sym 12967 smi_ctrl_ins.r_fifo_24_pull_SB_DFFESR_Q_E[2] +.sym 12968 smi_ctrl_ins.r_fifo_24_pull_SB_DFFESR_Q_E[1] +.sym 12973 i_smi_a2_SB_LUT4_I1_O_SB_LUT4_I3_1_I2_SB_LUT4_O_I3[1] +.sym 12978 smi_ctrl_ins.int_cnt_24[4] +.sym 12979 smi_ctrl_ins.int_cnt_24[5] +.sym 12980 i_smi_a2_SB_LUT4_I1_O_SB_LUT4_I3_1_I2_SB_LUT4_O_I3[1] +.sym 12981 w_rx_24_fifo_empty +.sym 12985 smi_ctrl_ins.int_cnt_24[4] +.sym 12988 smi_ctrl_ins.int_cnt_24_SB_DFFESR_Q_E +.sym 12989 r_counter[0]_$glb_clk +.sym 12990 i_smi_a1_SB_LUT4_I1_O[3]_$glb_sr +.sym 12991 spi_if_ins.spi.r_tx_byte[7] +.sym 12992 spi_if_ins.spi.r_tx_byte[5] +.sym 12996 spi_if_ins.spi.r_tx_byte[2] +.sym 12997 spi_if_ins.spi.r_tx_byte[1] +.sym 13007 smi_ctrl_ins.int_cnt_24_SB_DFFESR_Q_E +.sym 13009 i_smi_soe_se$rename$0 +.sym 13010 w_rx_24_fifo_empty +.sym 13014 i_smi_soe_se$rename$0 +.sym 13015 smi_ctrl_ins.r_fifo_24_pull_SB_LUT4_I3_1_O +.sym 13019 w_rx_24_fifo_pull +.sym 13025 w_rx_24_fifo_data[12] +.sym 13026 spi_if_ins.r_tx_data_valid_SB_DFFESR_Q_D_SB_LUT4_I3_O +.sym 13035 w_rx_24_fifo_data[6] +.sym 13039 w_rx_24_fifo_data[8] +.sym 13048 w_rx_24_fifo_data[9] +.sym 13049 w_rx_24_fifo_data[12] +.sym 13051 w_rx_24_fifo_data[7] +.sym 13060 w_rx_24_fifo_data[10] +.sym 13061 lvds_rx_24_inst.r_state_if_SB_LUT4_I2_O[0] +.sym 13062 w_rx_24_fifo_data[5] +.sym 13065 lvds_rx_24_inst.r_state_if_SB_LUT4_I2_O[0] +.sym 13066 w_rx_24_fifo_data[7] +.sym 13071 w_rx_24_fifo_data[10] +.sym 13072 lvds_rx_24_inst.r_state_if_SB_LUT4_I2_O[0] +.sym 13077 lvds_rx_24_inst.r_state_if_SB_LUT4_I2_O[0] +.sym 13079 w_rx_24_fifo_data[9] +.sym 13083 w_rx_24_fifo_data[5] +.sym 13086 lvds_rx_24_inst.r_state_if_SB_LUT4_I2_O[0] +.sym 13089 lvds_rx_24_inst.r_state_if_SB_LUT4_I2_O[0] +.sym 13090 w_rx_24_fifo_data[8] +.sym 13101 lvds_rx_24_inst.r_state_if_SB_LUT4_I2_O[0] +.sym 13104 w_rx_24_fifo_data[12] +.sym 13107 w_rx_24_fifo_data[6] +.sym 13110 lvds_rx_24_inst.r_state_if_SB_LUT4_I2_O[0] +.sym 13111 w_lvds_rx_24_d1_SB_LUT4_I0_O_SB_LUT4_I3_O_$glb_ce +.sym 13112 lvds_clock_buf +.sym 13113 i_smi_a1_SB_LUT4_I1_O[3]_$glb_sr +.sym 13117 spi_if_ins.r_tx_data_valid +.sym 13126 sys_ctrl_ins.o_soft_reset_SB_DFFESS_Q_E +.sym 13131 sys_ctrl_ins.o_soft_reset_SB_DFFESS_Q_E +.sym 13132 sys_ctrl_ins.o_soft_reset_SB_DFFESS_Q_S +.sym 13134 i_smi_a1_SB_LUT4_I1_O[3] +.sym 13139 spi_if_ins.r_tx_byte[7] +.sym 13140 spi_if_ins.r_tx_data_valid_SB_DFFESR_Q_E +.sym 13141 w_rx_24_fifo_pull +.sym 13149 spi_if_ins.r_tx_byte[2] +.sym 13165 smi_ctrl_ins.int_cnt_24[5] +.sym 13170 $PACKER_VCC_NET +.sym 13171 i_smi_a2_SB_LUT4_I1_O_SB_LUT4_I3_1_I2_SB_LUT4_O_I3[1] +.sym 13173 spi_if_ins.r_tx_data_valid_SB_DFFESR_Q_D_SB_LUT4_I3_O +.sym 13179 r_tx_data[0] +.sym 13181 smi_ctrl_ins.int_cnt_24[4] +.sym 13187 $nextpnr_ICESTORM_LC_0$O +.sym 13190 i_smi_a2_SB_LUT4_I1_O_SB_LUT4_I3_1_I2_SB_LUT4_O_I3[1] +.sym 13193 i_smi_a2_SB_LUT4_I1_O_SB_LUT4_I3_1_I2_SB_LUT4_O_I3[2] +.sym 13195 $PACKER_VCC_NET +.sym 13196 smi_ctrl_ins.int_cnt_24[4] +.sym 13200 $PACKER_VCC_NET +.sym 13201 smi_ctrl_ins.int_cnt_24[5] +.sym 13203 i_smi_a2_SB_LUT4_I1_O_SB_LUT4_I3_1_I2_SB_LUT4_O_I3[2] +.sym 13220 r_tx_data[0] +.sym 13234 spi_if_ins.r_tx_data_valid_SB_DFFESR_Q_D_SB_LUT4_I3_O .sym 13235 r_counter[0]_$glb_clk -.sym 13236 io_ctrl_ins.o_data_out_SB_DFFESR_Q_6_R[0] -.sym 13238 w_cs[3] -.sym 13239 smi_ctrl_ins.o_data_out_SB_LUT4_I1_O[2] -.sym 13241 w_cs[2] -.sym 13242 w_cs[1] -.sym 13245 spi_if_ins.spi.r3_rx_done_SB_LUT4_I2_O -.sym 13253 $PACKER_VCC_NET -.sym 13254 i_smi_soe_se$rename$0 -.sym 13262 w_cs[2] -.sym 13264 spi_if_ins.o_load_cmd_SB_DFFESR_Q_D_SB_LUT4_I1_O[1] -.sym 13265 spi_if_ins.r_tx_data_valid_SB_DFFESR_Q_D[0] -.sym 13268 spi_if_ins.r_tx_data_valid_SB_DFFESR_Q_D_SB_LUT4_I3_O -.sym 13272 i_smi_a1_SB_LUT4_I1_O_SB_LUT4_O_I2_SB_LUT4_I0_O[2] -.sym 13281 lvds_rx_24_inst.r_state_if_SB_LUT4_I2_O[0] -.sym 13283 spi_if_ins.o_load_cmd_SB_DFFESR_Q_D_SB_LUT4_I1_O[0] -.sym 13285 w_tx_data_smi[0] -.sym 13290 spi_if_ins.r_tx_data_valid_SB_DFFESR_Q_D[0] -.sym 13291 spi_if_ins.o_load_cmd_SB_DFFESR_Q_D_SB_LUT4_I1_O[2] -.sym 13293 spi_if_ins.o_load_cmd_SB_DFFESR_Q_D_SB_LUT4_I1_O[1] -.sym 13296 w_tx_data_io[0] -.sym 13300 spi_if_ins.state_if[0] -.sym 13301 spi_if_ins.state_if[1] -.sym 13303 spi_if_ins.o_cs_SB_LUT4_I2_1_O[1] -.sym 13305 w_rx_24_fifo_data[29] -.sym 13306 smi_ctrl_ins.o_data_out_SB_LUT4_I1_O[0] -.sym 13307 spi_if_ins.state_if_SB_DFFESR_Q_D[2] -.sym 13308 spi_if_ins.o_load_cmd_SB_DFFESR_Q_D[0] -.sym 13309 w_rx_24_fifo_data[18] -.sym 13319 lvds_rx_24_inst.r_state_if_SB_LUT4_I2_O[0] -.sym 13320 w_rx_24_fifo_data[18] -.sym 13323 w_tx_data_io[0] -.sym 13324 w_tx_data_smi[0] -.sym 13325 spi_if_ins.o_cs_SB_LUT4_I2_1_O[1] -.sym 13326 smi_ctrl_ins.o_data_out_SB_LUT4_I1_O[0] -.sym 13330 spi_if_ins.o_load_cmd_SB_DFFESR_Q_D_SB_LUT4_I1_O[1] -.sym 13331 spi_if_ins.o_load_cmd_SB_DFFESR_Q_D_SB_LUT4_I1_O[0] -.sym 13332 spi_if_ins.o_load_cmd_SB_DFFESR_Q_D_SB_LUT4_I1_O[2] -.sym 13335 spi_if_ins.state_if_SB_DFFESR_Q_D[2] -.sym 13337 spi_if_ins.o_load_cmd_SB_DFFESR_Q_D_SB_LUT4_I1_O[1] -.sym 13338 spi_if_ins.r_tx_data_valid_SB_DFFESR_Q_D[0] -.sym 13341 spi_if_ins.r_tx_data_valid_SB_DFFESR_Q_D[0] -.sym 13343 spi_if_ins.o_load_cmd_SB_DFFESR_Q_D[0] -.sym 13344 spi_if_ins.state_if_SB_DFFESR_Q_D[2] -.sym 13347 spi_if_ins.state_if[0] -.sym 13350 spi_if_ins.state_if[1] -.sym 13353 lvds_rx_24_inst.r_state_if_SB_LUT4_I2_O[0] -.sym 13354 w_rx_24_fifo_data[29] -.sym 13357 w_lvds_rx_24_d1_SB_LUT4_I0_O_SB_LUT4_I3_O_$glb_ce -.sym 13358 lvds_clock_buf -.sym 13359 i_smi_a1_SB_LUT4_I1_O_SB_LUT4_O_I2_SB_LUT4_I0_O[2]_$glb_sr -.sym 13360 spi_if_ins.o_cs_SB_LUT4_I2_2_O[1] -.sym 13361 spi_if_ins.o_cs_SB_LUT4_I2_1_O[1] -.sym 13362 spi_if_ins.r_tx_data_valid -.sym 13363 spi_if_ins.o_cs_SB_LUT4_I3_1_O -.sym 13364 smi_ctrl_ins.o_data_out_SB_LUT4_I1_O[0] -.sym 13365 spi_if_ins.o_cs_SB_LUT4_I2_2_O[2] -.sym 13366 spi_if_ins.o_cs_SB_DFFESR_Q_R[0] -.sym 13375 spi_if_ins.w_rx_data[6] -.sym 13376 w_rx_24_fifo_data[20] -.sym 13377 lvds_rx_24_inst.r_state_if_SB_LUT4_I2_O[0] -.sym 13390 smi_ctrl_ins.o_data_out_SB_DFFESS_Q_E -.sym 13404 spi_if_ins.state_if[0] -.sym 13405 spi_if_ins.r_tx_data_valid_SB_DFFESR_Q_E -.sym 13407 w_tx_data_sys[0] -.sym 13408 spi_if_ins.state_if[1] -.sym 13410 spi_if_ins.o_load_cmd_SB_DFFESR_Q_D[1] -.sym 13411 spi_if_ins.o_cs_SB_LUT4_I2_2_O[3] -.sym 13415 spi_if_ins.o_load_cmd_SB_DFFESR_Q_D[0] -.sym 13416 spi_if_ins.state_if[1] -.sym 13417 spi_if_ins.o_cs_SB_LUT4_I2_2_O[1] -.sym 13420 spi_if_ins.r_tx_data_valid_SB_DFFESR_Q_D[1] -.sym 13422 spi_if_ins.o_cs_SB_LUT4_I2_2_O[2] -.sym 13425 spi_if_ins.r_tx_data_valid_SB_DFFESR_Q_D[0] -.sym 13428 spi_if_ins.o_cs_SB_LUT4_I3_1_O -.sym 13434 spi_if_ins.o_cs_SB_LUT4_I2_2_O[1] -.sym 13435 spi_if_ins.o_cs_SB_LUT4_I2_2_O[2] -.sym 13436 w_tx_data_sys[0] -.sym 13437 spi_if_ins.o_cs_SB_LUT4_I2_2_O[3] -.sym 13440 spi_if_ins.r_tx_data_valid_SB_DFFESR_Q_D[1] -.sym 13442 spi_if_ins.r_tx_data_valid_SB_DFFESR_Q_D[0] -.sym 13446 spi_if_ins.r_tx_data_valid_SB_DFFESR_Q_E -.sym 13452 spi_if_ins.state_if[0] -.sym 13454 spi_if_ins.state_if[1] -.sym 13455 spi_if_ins.o_load_cmd_SB_DFFESR_Q_D[1] -.sym 13458 spi_if_ins.o_load_cmd_SB_DFFESR_Q_D[1] -.sym 13459 spi_if_ins.state_if[0] -.sym 13460 spi_if_ins.state_if[1] -.sym 13461 spi_if_ins.r_tx_data_valid_SB_DFFESR_Q_D[0] -.sym 13476 spi_if_ins.o_load_cmd_SB_DFFESR_Q_D[0] -.sym 13477 spi_if_ins.o_load_cmd_SB_DFFESR_Q_D[1] -.sym 13478 spi_if_ins.r_tx_data_valid_SB_DFFESR_Q_D[0] -.sym 13480 spi_if_ins.o_cs_SB_LUT4_I3_1_O -.sym 13481 i_glob_clock$SB_IO_IN_$glb_clk -.sym 13483 w_cs[0] -.sym 13484 smi_ctrl_ins.o_data_out_SB_DFFESS_Q_E -.sym 13485 spi_if_ins.o_fetch_cmd_SB_LUT4_I3_1_O[1] -.sym 13486 sys_ctrl_ins.o_data_out_SB_DFFE_Q_E -.sym 13489 w_ioc[4] -.sym 13490 w_ioc[3] -.sym 13498 spi_if_ins.w_rx_data[6] -.sym 13504 spi_if_ins.state_if_SB_DFFE_Q_E -.sym 13511 i_smi_a1_SB_LUT4_I1_O_SB_LUT4_O_I2_SB_LUT4_I0_O[2] -.sym 13539 spi_if_ins.o_load_cmd_SB_DFFESR_Q_D_SB_LUT4_I1_O[1] -.sym 13544 io_ctrl_ins.ldo2v8_state_SB_LUT4_I3_O[1] -.sym 13551 sys_ctrl_ins.o_data_out_SB_DFFE_Q_E -.sym 13576 spi_if_ins.o_load_cmd_SB_DFFESR_Q_D_SB_LUT4_I1_O[1] -.sym 13595 io_ctrl_ins.ldo2v8_state_SB_LUT4_I3_O[1] -.sym 13603 sys_ctrl_ins.o_data_out_SB_DFFE_Q_E -.sym 13604 r_counter[0]_$glb_clk -.sym 13606 io_ctrl_ins.tr_vc_2_state_SB_LUT4_I1_I3[1] -.sym 13607 w_ioc[1] -.sym 13608 w_ioc[2] -.sym 13609 io_ctrl_ins.o_data_out_SB_DFFESR_Q_E[3] -.sym 13610 io_ctrl_ins.i_cs_SB_LUT4_I3_O[0] -.sym 13611 spi_if_ins.o_fetch_cmd_SB_LUT4_I3_1_O[0] -.sym 13613 w_ioc[0] -.sym 13619 spi_if_ins.w_rx_data[4] -.sym 13623 w_fetch -.sym 13630 io_ctrl_ins.ldo2v8_state_SB_LUT4_I3_O[1] -.sym 13641 i_smi_a1_SB_LUT4_I1_O_SB_LUT4_O_I2_SB_LUT4_I0_O[2] -.sym 13659 rx_24_fifo.rd_addr_gray[6] -.sym 13695 rx_24_fifo.rd_addr_gray[6] -.sym 13727 lvds_clock_buf -.sym 13730 io_ctrl_ins.o_data_out_SB_DFFESR_Q_6_E -.sym 13732 sys_ctrl_ins.reset_cmd_SB_DFFESR_Q_E -.sym 13733 sys_ctrl_ins.reset_cmd -.sym 13734 sys_ctrl_ins.reset_cmd_SB_DFFESR_Q_R -.sym 13735 io_ctrl_ins.ldo2v8_state_SB_LUT4_I3_O[1] -.sym 13736 spi_if_ins.o_load_cmd_SB_LUT4_I2_O[0] -.sym 13741 spi_if_ins.w_rx_data[2] -.sym 13744 spi_if_ins.w_rx_data[0] -.sym 13748 io_ctrl_ins.tr_vc_2_state_SB_LUT4_I1_I3[1] -.sym 13749 spi_if_ins.o_data_in_SB_DFFE_Q_E -.sym 13755 io_ctrl_ins.o_data_out_SB_DFFESR_Q_E[3] -.sym 13756 spi_if_ins.w_rx_data[1] -.sym 13764 i_smi_a1_SB_LUT4_I1_O_SB_LUT4_O_I2_SB_LUT4_I0_O[2] -.sym 13772 smi_ctrl_ins.r_fifo_24_pull_SB_LUT4_I3_1_O -.sym 13775 rx_24_fifo.rd_addr_gray_SB_DFFESR_Q_7_D[1] -.sym 13776 rx_24_fifo.rd_addr_gray_SB_DFFESR_Q_3_D[1] -.sym 13781 rx_24_fifo.rd_addr_gray_SB_DFFESR_Q_6_D[1] -.sym 13783 rx_24_fifo.rd_addr_gray_SB_DFFESR_Q_6_D[3] -.sym 13810 rx_24_fifo.rd_addr_gray_SB_DFFESR_Q_6_D[1] -.sym 13815 rx_24_fifo.rd_addr_gray_SB_DFFESR_Q_3_D[1] -.sym 13827 rx_24_fifo.rd_addr_gray_SB_DFFESR_Q_6_D[3] -.sym 13847 rx_24_fifo.rd_addr_gray_SB_DFFESR_Q_7_D[1] -.sym 13849 smi_ctrl_ins.r_fifo_24_pull_SB_LUT4_I3_1_O -.sym 13850 r_counter[0]_$glb_clk -.sym 13851 i_smi_a1_SB_LUT4_I1_O_SB_LUT4_O_I2_SB_LUT4_I0_O[2]_$glb_sr -.sym 13854 io_ctrl_ins.rf_mode_SB_DFFESR_Q_E -.sym 13855 io_ctrl_ins.debug_mode[1] -.sym 13856 io_ctrl_ins.debug_mode_SB_LUT4_I2_O[1] -.sym 13865 io_ctrl_ins.ldo2v8_state_SB_LUT4_I3_O[1] -.sym 13873 io_ctrl_ins.o_data_out_SB_DFFESR_Q_6_E -.sym 13875 w_load -.sym 13879 w_rx_data[2] -.sym 13880 sys_ctrl_ins.reset_cmd -.sym 13900 rx_24_fifo.rd_addr_gray[0] -.sym 13902 rx_24_fifo.rd_addr_gray[1] -.sym 13903 rx_24_fifo.rd_addr_gray[4] -.sym 13920 rx_24_fifo.rd_addr_gray_wr[4] -.sym 13944 rx_24_fifo.rd_addr_gray[4] -.sym 13950 rx_24_fifo.rd_addr_gray_wr[4] -.sym 13958 rx_24_fifo.rd_addr_gray[0] -.sym 13969 rx_24_fifo.rd_addr_gray[1] -.sym 13973 lvds_clock_buf -.sym 13978 io_ctrl_ins.rf_pin_state[2] -.sym 13981 io_ctrl_ins.rf_pin_state[1] -.sym 13993 w_rx_data[3] -.sym 14001 sys_ctrl_ins.o_soft_reset_SB_DFFESS_Q_E -.sym 14002 i_smi_a1_SB_LUT4_I1_O_SB_LUT4_O_I2_SB_LUT4_I0_O[2] -.sym 14099 o_shdn_rx_lna$SB_IO_OUT -.sym 14100 io_ctrl_ins.led1_state_SB_DFFESR_Q_E -.sym 14102 o_shdn_tx_lna$SB_IO_OUT -.sym 14105 sys_ctrl_ins.o_soft_reset_SB_DFFESS_Q_E -.sym 14110 w_rx_data[1] -.sym 14128 i_smi_a1_SB_LUT4_I1_O_SB_LUT4_O_I2_SB_LUT4_I0_O[2] -.sym 14222 i_smi_a1_SB_LUT4_I1_O_SB_LUT4_O_I2_SB_LUT4_I0_O[2] -.sym 14243 o_led1$SB_IO_OUT -.sym 14256 i_smi_a1_SB_LUT4_I1_O_SB_LUT4_O_I2_SB_LUT4_I0_O[2] -.sym 14266 w_lvds_rx_24_d1_SB_LUT4_I0_O[1] -.sym 14287 i_smi_a1_SB_LUT4_I1_O_SB_LUT4_O_I2_SB_LUT4_I0_O[2] -.sym 14326 i_smi_a1_SB_LUT4_I1_O_SB_LUT4_O_I2_SB_LUT4_I0_O[2] -.sym 14328 w_lvds_rx_24_d1_SB_LUT4_I0_O[1] +.sym 13237 spi_if_ins.o_ioc_SB_DFFE_Q_E[1] +.sym 13238 spi_if_ins.r_tx_data_valid_SB_DFFESR_Q_D[1] +.sym 13239 spi_if_ins.state_if_SB_DFFE_Q_E +.sym 13240 spi_if_ins.state_if_SB_DFFE_Q_D[1] +.sym 13241 spi_if_ins.state_if[1] +.sym 13242 spi_if_ins.r_tx_data_valid_SB_DFFESR_Q_D_SB_LUT4_I3_O +.sym 13243 spi_if_ins.state_if_SB_DFFESR_Q_D[0] +.sym 13244 spi_if_ins.r_tx_data_valid_SB_DFFESR_Q_E +.sym 13250 io_pmod[2]$SB_IO_IN +.sym 13251 spi_if_ins.r_tx_byte[0] +.sym 13261 spi_if_ins.r_tx_byte[1] +.sym 13262 spi_if_ins.o_ioc_SB_DFFE_Q_E[0] +.sym 13263 i_smi_a1_SB_LUT4_I1_O[3] +.sym 13265 spi_if_ins.state_if_SB_DFFESR_Q_1_R +.sym 13266 w_load +.sym 13267 i_smi_a1_SB_LUT4_I1_O[2] +.sym 13268 w_tx_data_io[6] +.sym 13271 spi_if_ins.o_ioc_SB_DFFE_Q_E[0] +.sym 13272 spi_if_ins.o_ioc_SB_DFFE_Q_E[2] +.sym 13281 i_smi_a1_SB_LUT4_I1_O[3] +.sym 13291 w_rx_24_fifo_pull +.sym 13296 spi_if_ins.state_if_SB_DFFE_Q_E +.sym 13300 spi_if_ins.state_if_SB_DFFESR_Q_D[0] +.sym 13307 spi_if_ins.state_if_SB_DFFESR_Q_1_R +.sym 13313 w_rx_24_fifo_pull +.sym 13314 i_smi_a1_SB_LUT4_I1_O[3] +.sym 13344 spi_if_ins.state_if_SB_DFFESR_Q_D[0] +.sym 13357 spi_if_ins.state_if_SB_DFFE_Q_E +.sym 13358 r_counter[0]_$glb_clk +.sym 13359 spi_if_ins.state_if_SB_DFFESR_Q_1_R +.sym 13360 spi_if_ins.r_tx_byte[4] +.sym 13361 spi_if_ins.o_load_cmd_SB_DFFESR_Q_E +.sym 13362 spi_if_ins.state_if_SB_DFFE_Q_D[0] +.sym 13363 spi_if_ins.r_tx_byte[3] +.sym 13364 spi_if_ins.o_fetch_cmd_SB_DFFESR_Q_E +.sym 13365 spi_if_ins.r_tx_byte[2] +.sym 13366 spi_if_ins.r_tx_byte[1] +.sym 13367 spi_if_ins.r_tx_byte[6] +.sym 13372 smi_ctrl_ins.r_fifo_24_pull_SB_LUT4_I3_1_O +.sym 13375 spi_if_ins.state_if_SB_DFFESR_Q_D[1] +.sym 13377 spi_if_ins.spi.r_rx_done_SB_DFFER_Q_D_SB_LUT4_I3_O +.sym 13387 spi_if_ins.w_rx_data[6] +.sym 13388 spi_if_ins.state_if_SB_DFFESR_Q_1_R +.sym 13390 spi_if_ins.r_tx_data_valid_SB_DFFESR_Q_D_SB_LUT4_I3_O +.sym 13392 w_tx_data_io[4] +.sym 13393 spi_if_ins.o_load_cmd_SB_LUT4_I2_O[1] +.sym 13395 spi_if_ins.o_load_cmd_SB_DFFESR_Q_E +.sym 13403 rx_24_fifo.empty_o_SB_DFFSS_Q_D_SB_LUT4_O_I0_SB_LUT4_O_I0[1] +.sym 13410 spi_if_ins.state_if_SB_DFFE_Q_D[0] +.sym 13411 w_rx_24_fifo_pull +.sym 13414 spi_if_ins.state_if_SB_DFFESR_Q_1_R +.sym 13419 spi_if_ins.o_load_cmd_SB_DFFESR_Q_E +.sym 13423 rx_24_fifo.rd_addr_gray_SB_LUT4_I2_O[6] +.sym 13424 rx_24_fifo.rd_addr_gray_SB_LUT4_I2_O[7] +.sym 13426 rx_24_fifo.rd_addr_gray_SB_LUT4_I2_O[1] +.sym 13427 rx_24_fifo.rd_addr_gray_SB_LUT4_I2_O[2] +.sym 13428 rx_24_fifo.rd_addr_gray_SB_LUT4_I2_O[3] +.sym 13429 rx_24_fifo.rd_addr_gray_SB_LUT4_I2_O[4] +.sym 13430 rx_24_fifo.rd_addr_gray_SB_LUT4_I2_O[5] +.sym 13434 spi_if_ins.state_if_SB_DFFE_Q_D[0] +.sym 13441 rx_24_fifo.rd_addr_gray_SB_LUT4_I2_O[1] +.sym 13442 rx_24_fifo.rd_addr_gray_SB_LUT4_I2_O[2] +.sym 13448 rx_24_fifo.rd_addr_gray_SB_LUT4_I2_O[3] +.sym 13449 rx_24_fifo.rd_addr_gray_SB_LUT4_I2_O[2] +.sym 13452 w_rx_24_fifo_pull +.sym 13453 rx_24_fifo.empty_o_SB_DFFSS_Q_D_SB_LUT4_O_I0_SB_LUT4_O_I0[1] +.sym 13454 rx_24_fifo.rd_addr_gray_SB_LUT4_I2_O[7] +.sym 13459 rx_24_fifo.rd_addr_gray_SB_LUT4_I2_O[4] +.sym 13460 rx_24_fifo.rd_addr_gray_SB_LUT4_I2_O[5] +.sym 13464 rx_24_fifo.rd_addr_gray_SB_LUT4_I2_O[7] +.sym 13467 rx_24_fifo.rd_addr_gray_SB_LUT4_I2_O[6] +.sym 13477 rx_24_fifo.rd_addr_gray_SB_LUT4_I2_O[6] +.sym 13479 rx_24_fifo.rd_addr_gray_SB_LUT4_I2_O[5] +.sym 13480 spi_if_ins.o_load_cmd_SB_DFFESR_Q_E +.sym 13481 r_counter[0]_$glb_clk +.sym 13482 spi_if_ins.state_if_SB_DFFESR_Q_1_R +.sym 13483 spi_if_ins.state_if_SB_DFFESR_Q_1_R +.sym 13486 spi_if_ins.o_fetch_cmd_SB_DFFESR_Q_E +.sym 13488 spi_if_ins.o_ioc_SB_DFFE_Q_E[2] +.sym 13489 w_fetch +.sym 13506 spi_if_ins.state_if_SB_DFFE_Q_D[0] +.sym 13514 spi_if_ins.r_tx_data_valid_SB_DFFESR_Q_D_SB_LUT4_I3_O +.sym 13524 w_load +.sym 13525 spi_if_ins.o_cs_SB_LUT4_I2_O[2] +.sym 13528 spi_if_ins.o_cs_SB_LUT4_I2_2_O[1] +.sym 13529 spi_if_ins.w_rx_data[5] +.sym 13530 w_tx_data_smi[2] +.sym 13532 w_tx_data_smi[1] +.sym 13534 smi_ctrl_ins.o_data_out_SB_LUT4_I2_I3[2] +.sym 13535 w_tx_data_io[1] +.sym 13536 w_cs[1] +.sym 13537 smi_ctrl_ins.o_data_out_SB_LUT4_I2_I3[0] +.sym 13538 w_tx_data_io[6] +.sym 13539 w_tx_data_io[3] +.sym 13543 w_tx_data_smi[3] +.sym 13546 w_fetch +.sym 13547 spi_if_ins.w_rx_data[6] +.sym 13551 spi_if_ins.o_cs_SB_LUT4_I3_1_O +.sym 13552 w_tx_data_io[4] +.sym 13558 spi_if_ins.w_rx_data[5] +.sym 13560 spi_if_ins.w_rx_data[6] +.sym 13563 w_tx_data_io[4] +.sym 13565 spi_if_ins.o_cs_SB_LUT4_I2_O[2] +.sym 13569 w_fetch +.sym 13570 w_cs[1] +.sym 13571 w_load +.sym 13581 smi_ctrl_ins.o_data_out_SB_LUT4_I2_I3[0] +.sym 13582 spi_if_ins.o_cs_SB_LUT4_I2_O[2] +.sym 13583 w_tx_data_io[1] +.sym 13584 w_tx_data_smi[1] +.sym 13587 w_tx_data_io[6] +.sym 13589 spi_if_ins.o_cs_SB_LUT4_I2_O[2] +.sym 13593 w_tx_data_smi[2] +.sym 13595 smi_ctrl_ins.o_data_out_SB_LUT4_I2_I3[0] +.sym 13596 smi_ctrl_ins.o_data_out_SB_LUT4_I2_I3[2] +.sym 13599 w_tx_data_smi[3] +.sym 13600 smi_ctrl_ins.o_data_out_SB_LUT4_I2_I3[0] +.sym 13601 spi_if_ins.o_cs_SB_LUT4_I2_O[2] +.sym 13602 w_tx_data_io[3] +.sym 13603 spi_if_ins.o_cs_SB_LUT4_I3_1_O +.sym 13604 i_glob_clock$SB_IO_IN_$glb_clk +.sym 13605 spi_if_ins.o_cs_SB_LUT4_I2_2_O[1] +.sym 13608 spi_if_ins.o_fetch_cmd_SB_LUT4_I3_1_O[1] +.sym 13609 sys_ctrl_ins.o_data_out_SB_DFFE_Q_E +.sym 13610 spi_if_ins.r_tx_byte[5] +.sym 13611 smi_ctrl_ins.o_data_out_SB_DFFESS_Q_E +.sym 13612 spi_if_ins.r_tx_byte[7] +.sym 13625 spi_if_ins.state_if_SB_DFFESR_Q_1_R +.sym 13630 w_tx_data_io[5] +.sym 13631 spi_if_ins.o_load_cmd_SB_LUT4_I2_O[1] +.sym 13635 spi_if_ins.r_tx_byte[7] +.sym 13639 w_rx_data[4] +.sym 13640 w_rx_data[1] +.sym 13641 w_tx_data_io[7] +.sym 13647 spi_if_ins.o_cs_SB_DFFESR_Q_R[0] +.sym 13650 spi_if_ins.o_cs_SB_LUT4_I2_2_O[2] +.sym 13656 spi_if_ins.o_cs_SB_LUT4_I2_O[2] +.sym 13659 w_tx_data_io[2] +.sym 13667 w_cs[1] +.sym 13670 w_cs[0] +.sym 13673 w_cs[2] +.sym 13674 spi_if_ins.o_ioc_SB_DFFE_Q_E[2] +.sym 13678 w_cs[3] +.sym 13680 w_cs[3] +.sym 13681 w_cs[2] +.sym 13682 w_cs[1] +.sym 13683 w_cs[0] +.sym 13686 w_cs[2] +.sym 13687 w_cs[3] +.sym 13688 w_cs[0] +.sym 13689 w_cs[1] +.sym 13692 spi_if_ins.o_cs_SB_LUT4_I2_O[2] +.sym 13693 spi_if_ins.o_cs_SB_LUT4_I2_2_O[2] +.sym 13695 w_tx_data_io[2] +.sym 13698 w_cs[0] +.sym 13699 w_cs[3] +.sym 13700 w_cs[2] +.sym 13701 w_cs[1] +.sym 13704 w_cs[3] +.sym 13705 w_cs[2] +.sym 13706 w_cs[1] +.sym 13707 w_cs[0] +.sym 13710 w_cs[2] +.sym 13711 w_cs[1] +.sym 13712 w_cs[0] +.sym 13713 w_cs[3] +.sym 13723 spi_if_ins.o_cs_SB_DFFESR_Q_R[0] +.sym 13726 spi_if_ins.o_ioc_SB_DFFE_Q_E[2] +.sym 13727 r_counter[0]_$glb_clk +.sym 13729 io_ctrl_ins.led0_state_SB_LUT4_I3_O[0] +.sym 13730 io_ctrl_ins.pmod_dir_state[5] +.sym 13731 io_ctrl_ins.pmod_dir_state[6] +.sym 13732 io_ctrl_ins.pmod_dir_state[4] +.sym 13733 io_ctrl_ins.pmod_dir_state[7] +.sym 13735 io_ctrl_ins.pmod_dir_state[2] +.sym 13736 io_ctrl_ins.led1_state_SB_LUT4_I3_O[0] +.sym 13741 spi_if_ins.w_rx_data[5] +.sym 13751 w_cs[2] +.sym 13755 i_smi_a1_SB_LUT4_I1_O[3] +.sym 13759 i_smi_a1_SB_LUT4_I1_O[2] +.sym 13760 spi_if_ins.o_ioc_SB_DFFE_Q_E[2] +.sym 13773 spi_if_ins.o_cs_SB_LUT4_I2_2_O[2] +.sym 13774 spi_if_ins.o_cs_SB_LUT4_I2_2_O[1] +.sym 13775 smi_ctrl_ins.o_data_out_SB_LUT4_I2_I3[0] +.sym 13779 spi_if_ins.o_cs_SB_LUT4_I2_O[2] +.sym 13780 w_tx_data_io[0] +.sym 13781 spi_if_ins.o_cs_SB_LUT4_I3_1_O +.sym 13788 w_tx_data_smi[0] +.sym 13790 w_tx_data_io[5] +.sym 13801 w_tx_data_io[7] +.sym 13810 spi_if_ins.o_cs_SB_LUT4_I2_O[2] +.sym 13811 spi_if_ins.o_cs_SB_LUT4_I2_2_O[2] +.sym 13812 w_tx_data_io[5] +.sym 13815 w_tx_data_io[7] +.sym 13816 spi_if_ins.o_cs_SB_LUT4_I2_2_O[2] +.sym 13817 spi_if_ins.o_cs_SB_LUT4_I2_O[2] +.sym 13821 w_tx_data_io[0] +.sym 13822 w_tx_data_smi[0] +.sym 13823 smi_ctrl_ins.o_data_out_SB_LUT4_I2_I3[0] +.sym 13824 spi_if_ins.o_cs_SB_LUT4_I2_O[2] +.sym 13849 spi_if_ins.o_cs_SB_LUT4_I3_1_O +.sym 13850 i_glob_clock$SB_IO_IN_$glb_clk +.sym 13851 spi_if_ins.o_cs_SB_LUT4_I2_2_O[1] +.sym 13854 io_ctrl_ins.pmod_dir_state_SB_DFFE_Q_E +.sym 13855 io_ctrl_ins.o_data_out_SB_DFFESR_Q_3_D_SB_LUT4_O_I2[1] +.sym 13856 w_tx_data_sys[0] +.sym 13858 spi_if_ins.o_load_cmd_SB_LUT4_I2_O_SB_LUT4_I3_O[1] +.sym 13865 w_tx_data_io[2] +.sym 13867 spi_if_ins.o_cs_SB_LUT4_I3_1_O +.sym 13873 io_ctrl_ins.pmod_dir_state[5] +.sym 13883 $PACKER_VCC_NET +.sym 13885 spi_if_ins.o_load_cmd_SB_LUT4_I2_O[1] +.sym 13894 rx_24_fifo.rd_addr_gray_SB_LUT4_I2_O[4] +.sym 13895 rx_24_fifo.rd_addr_gray_SB_DFFESR_Q_7_D[2] +.sym 13899 rx_24_fifo.rd_addr_gray_SB_DFFESR_Q_3_D[3] +.sym 13901 rx_24_fifo.rd_addr_gray_SB_DFFESR_Q_5_D[3] +.sym 13903 rx_24_fifo.rd_addr_gray_SB_LUT4_I2_O[3] +.sym 13904 smi_ctrl_ins.r_fifo_24_pull_SB_LUT4_I3_1_O +.sym 13909 rx_24_fifo.rd_addr_gray_SB_DFFESR_Q_3_D[1] +.sym 13911 rx_24_fifo.rd_addr_gray_SB_DFFESR_Q_5_D[0] +.sym 13935 rx_24_fifo.rd_addr_gray_SB_DFFESR_Q_5_D[0] +.sym 13939 rx_24_fifo.rd_addr_gray_SB_LUT4_I2_O[4] +.sym 13941 rx_24_fifo.rd_addr_gray_SB_LUT4_I2_O[3] +.sym 13946 rx_24_fifo.rd_addr_gray_SB_DFFESR_Q_5_D[3] +.sym 13952 rx_24_fifo.rd_addr_gray_SB_DFFESR_Q_3_D[1] +.sym 13959 rx_24_fifo.rd_addr_gray_SB_DFFESR_Q_3_D[3] +.sym 13971 rx_24_fifo.rd_addr_gray_SB_DFFESR_Q_7_D[2] +.sym 13972 smi_ctrl_ins.r_fifo_24_pull_SB_LUT4_I3_1_O +.sym 13973 r_counter[0]_$glb_clk +.sym 13974 i_smi_a1_SB_LUT4_I1_O[3]_$glb_sr +.sym 13979 spi_if_ins.o_load_cmd_SB_LUT4_I2_O_SB_LUT4_I2_O +.sym 13981 io_ctrl_ins.pmod_dir_state[3] +.sym 13990 smi_ctrl_ins.r_fifo_24_pull_SB_LUT4_I3_1_O +.sym 13991 w_tx_data_io[0] +.sym 13997 i_config_SB_LUT4_I3_I2[0] +.sym 14021 i_smi_a2$SB_IO_IN +.sym 14037 i_smi_a1$SB_IO_IN +.sym 14047 i_smi_a3$SB_IO_IN +.sym 14067 i_smi_a1$SB_IO_IN +.sym 14069 i_smi_a2$SB_IO_IN +.sym 14070 i_smi_a3$SB_IO_IN +.sym 14079 i_smi_a2$SB_IO_IN +.sym 14081 i_smi_a1$SB_IO_IN +.sym 14082 i_smi_a3$SB_IO_IN +.sym 14099 io_ctrl_ins.rf_pin_state[3] +.sym 14101 spi_if_ins.o_load_cmd_SB_LUT4_I2_O_SB_LUT4_I2_O +.sym 14103 io_ctrl_ins.rf_pin_state[1] +.sym 14104 io_ctrl_ins.rf_pin_state[0] +.sym 14105 io_ctrl_ins.rf_pin_state[2] +.sym 14114 w_rx_data[3] +.sym 14119 i_config[0]$SB_IO_IN +.sym 14123 i_smi_a1$SB_IO_IN +.sym 14229 $PACKER_VCC_NET +.sym 14234 io_ctrl_ins.rf_pin_state[0] +.sym 14242 w_rx_data[3] +.sym 14247 i_smi_a1_SB_LUT4_I1_O[3] +.sym 14265 i_smi_a1_SB_LUT4_I1_O[3] +.sym 14267 w_lvds_rx_24_d1_SB_LUT4_I0_O[0] +.sym 14332 w_lvds_rx_24_d1_SB_LUT4_I0_O[0] +.sym 14334 i_smi_a1_SB_LUT4_I1_O[3] .sym 14344 i_smi_a1$SB_IO_IN -.sym 14358 w_lvds_rx_24_d1_SB_LUT4_I0_O[1] -.sym 14388 i_smi_a1_SB_LUT4_I1_O_SB_LUT4_O_I2_SB_LUT4_I0_O[2] -.sym 14399 i_smi_a1_SB_LUT4_I1_O_SB_LUT4_O_I2_SB_LUT4_I0_O[2] -.sym 14414 i_smi_a1$SB_IO_IN -.sym 14418 i_sck$SB_IO_IN +.sym 14359 w_lvds_rx_24_d1_SB_LUT4_I0_O[0] +.sym 14362 o_shdn_tx_lna$SB_IO_OUT +.sym 14418 i_smi_a1_SB_LUT4_I1_O[3] .sym 14419 io_smi_data[3]$SB_IO_OUT -.sym 14436 i_sck$SB_IO_IN -.sym 14439 io_smi_data[3]$SB_IO_OUT -.sym 14445 io_pmod_SB_DFFSS_Q_D_SB_LUT4_O_I0_SB_LUT4_O_2_I0[0] -.sym 14446 io_pmod_SB_DFFSS_Q_D_SB_LUT4_O_I0[0] -.sym 14447 rx_09_fifo.rd_addr_gray_wr[1] -.sym 14449 rx_09_fifo.full_o_SB_DFFSR_Q_D_SB_LUT4_O_I1_SB_LUT4_O_I0_SB_LUT4_O_1_I3[0] -.sym 14450 rx_09_fifo.full_o_SB_LUT4_I3_O[0] -.sym 14465 spi_if_ins.r_tx_data_valid_SB_DFFESR_Q_D[0] -.sym 14475 i_smi_a1_SB_LUT4_I1_O_SB_LUT4_O_I2_SB_LUT4_I0_O[2] -.sym 14476 i_sck$SB_IO_IN -.sym 14478 io_pmod[7]$SB_IO_IN -.sym 14488 rx_09_fifo.wr_addr_gray_rd[7] -.sym 14493 rx_09_fifo.wr_addr_gray_rd[4] -.sym 14500 rx_09_fifo.wr_addr_gray_rd[2] -.sym 14501 rx_09_fifo.wr_addr_gray_rd[6] -.sym 14503 rx_09_fifo.wr_addr[7] -.sym 14508 rx_09_fifo.wr_addr_gray[6] -.sym 14520 rx_09_fifo.wr_addr_gray_rd[4] -.sym 14528 rx_09_fifo.wr_addr_gray_rd[6] -.sym 14534 rx_09_fifo.wr_addr[7] -.sym 14540 rx_09_fifo.wr_addr_gray_rd[7] -.sym 14549 rx_09_fifo.wr_addr_gray_rd[2] -.sym 14562 rx_09_fifo.wr_addr_gray[6] -.sym 14566 r_counter[0]_$glb_clk -.sym 14572 io_pmod_SB_DFFSS_Q_D_SB_LUT4_O_I0[2] -.sym 14573 io_pmod_SB_DFFSS_Q_D_SB_LUT4_O_I0_SB_LUT4_O_1_I1_SB_LUT4_O_I0[2] -.sym 14574 io_pmod_SB_DFFSS_Q_D_SB_LUT4_O_I0_SB_LUT4_O_I0[2] -.sym 14575 io_pmod_SB_DFFSS_Q_D_SB_LUT4_O_I0_SB_LUT4_O_1_I1_SB_LUT4_O_I2[2] -.sym 14576 rx_09_fifo.rd_addr_gray_SB_DFFESR_Q_1_D[0] -.sym 14577 io_pmod_SB_DFFSS_Q_D_SB_LUT4_O_I0_SB_LUT4_O_2_I0[2] -.sym 14578 rx_09_fifo.rd_addr_gray[1] -.sym 14579 rx_09_fifo.rd_addr[3] -.sym 14580 rx_09_fifo.rd_addr_gray_wr[2] -.sym 14582 w_cs[1] -.sym 14594 io_pmod[6]$SB_IO_IN -.sym 14605 io_pmod_SB_DFFSS_Q_D_SB_LUT4_O_I0_SB_LUT4_O_1_I1_SB_LUT4_O_I0[1] -.sym 14626 rx_09_fifo.wr_addr_gray_rd[0] -.sym 14629 io_pmod_SB_DFFSS_Q_D_SB_LUT4_O_I0_SB_LUT4_O_2_I0[2] -.sym 14633 rx_09_fifo.full_o_SB_DFFSR_Q_D_SB_LUT4_O_I1_SB_LUT4_O_I0_SB_LUT4_O_1_I3[0] -.sym 14634 rx_09_fifo.rd_addr[3] -.sym 14635 rx_09_fifo.full_o_SB_LUT4_I3_O[0] -.sym 14650 rx_09_fifo.wr_addr_gray_rd[0] -.sym 14653 rx_09_fifo.wr_addr_gray[2] -.sym 14654 rx_09_fifo.rd_addr_gray_SB_DFFESR_Q_1_D[3] -.sym 14656 rx_09_fifo.wr_addr_gray[4] -.sym 14657 rx_09_fifo.rd_addr_gray_SB_DFFESR_Q_1_D[1] -.sym 14658 io_pmod_SB_DFFSS_Q_D_SB_LUT4_O_I0_SB_LUT4_O_I0[3] -.sym 14659 rx_09_fifo.wr_addr_gray[5] -.sym 14660 io_pmod_SB_DFFSS_Q_D_SB_LUT4_O_I0_SB_LUT4_O_I0[0] -.sym 14665 rx_09_fifo.wr_addr_gray_rd[5] -.sym 14668 io_pmod_SB_DFFSS_Q_D_SB_LUT4_O_I0_SB_LUT4_O_I0[1] -.sym 14669 rx_09_fifo.rd_addr_gray_SB_DFFESR_Q_1_D[0] -.sym 14675 io_pmod_SB_DFFSS_Q_D_SB_LUT4_O_I0_SB_LUT4_O_I0[2] -.sym 14677 rx_09_fifo.wr_addr_gray_rd[1] -.sym 14685 rx_09_fifo.wr_addr_gray[5] -.sym 14688 io_pmod_SB_DFFSS_Q_D_SB_LUT4_O_I0_SB_LUT4_O_I0[2] -.sym 14689 io_pmod_SB_DFFSS_Q_D_SB_LUT4_O_I0_SB_LUT4_O_I0[0] -.sym 14690 io_pmod_SB_DFFSS_Q_D_SB_LUT4_O_I0_SB_LUT4_O_I0[1] -.sym 14691 io_pmod_SB_DFFSS_Q_D_SB_LUT4_O_I0_SB_LUT4_O_I0[3] -.sym 14696 rx_09_fifo.wr_addr_gray_rd[5] -.sym 14700 rx_09_fifo.rd_addr_gray_SB_DFFESR_Q_1_D[1] -.sym 14701 io_pmod_SB_DFFSS_Q_D_SB_LUT4_O_I0_SB_LUT4_O_I0[3] -.sym 14702 rx_09_fifo.rd_addr_gray_SB_DFFESR_Q_1_D[3] -.sym 14703 rx_09_fifo.rd_addr_gray_SB_DFFESR_Q_1_D[0] -.sym 14707 rx_09_fifo.wr_addr_gray_rd[0] -.sym 14714 rx_09_fifo.wr_addr_gray_rd[1] -.sym 14718 rx_09_fifo.wr_addr_gray[2] -.sym 14724 rx_09_fifo.wr_addr_gray[4] -.sym 14729 r_counter[0]_$glb_clk -.sym 14732 rx_09_fifo.rd_addr_gray_SB_LUT4_I2_O[1] -.sym 14733 rx_09_fifo.rd_addr_gray_SB_LUT4_I2_O[2] -.sym 14734 rx_09_fifo.rd_addr_gray_SB_LUT4_I2_O[3] -.sym 14735 io_pmod_SB_DFFSS_Q_D_SB_LUT4_O_I0_SB_LUT4_O_1_I1_SB_LUT4_O_I2[1] -.sym 14736 io_pmod_SB_DFFSS_Q_D_SB_LUT4_O_I0_SB_LUT4_O_1_I1_SB_LUT4_O_I0[3] -.sym 14737 rx_09_fifo.rd_addr_gray_SB_LUT4_I2_O[6] -.sym 14738 rx_09_fifo.rd_addr_gray_SB_LUT4_I2_O[7] -.sym 14745 smi_ctrl_ins.int_cnt_09[3] -.sym 14751 io_pmod_SB_DFFSS_Q_D_SB_LUT4_O_I0_SB_LUT4_O_1_I1[2] -.sym 14753 rx_09_fifo.wr_addr_gray_rd_r[0] -.sym 14756 r_tx_data[7] -.sym 14758 r_tx_data[1] -.sym 14760 r_tx_data[5] -.sym 14763 r_tx_data[2] -.sym 14764 w_rx_09_fifo_pull -.sym 14774 rx_09_fifo.wr_addr_gray_rd_r[2] -.sym 14776 rx_09_fifo.wr_addr_gray_rd_r[3] -.sym 14778 io_pmod_SB_DFFSS_Q_D_SB_LUT4_O_I0_SB_LUT4_O_I0[0] -.sym 14779 rx_09_fifo.wr_addr_gray_SB_DFFESR_Q_7_D[3] -.sym 14781 smi_ctrl_ins.r_fifo_09_pull_SB_LUT4_I2_O[3] -.sym 14782 smi_ctrl_ins.r_fifo_09_pull_SB_LUT4_I2_O[0] -.sym 14783 lvds_rx_09_inst.r_push_SB_LUT4_I3_1_O -.sym 14785 io_pmod_SB_DFFSS_Q_D_SB_LUT4_O_I0_SB_LUT4_O_2_I0[2] -.sym 14786 io_pmod_SB_DFFSS_Q_D_SB_LUT4_O_I0_SB_LUT4_O_3_I2[3] -.sym 14787 rx_09_fifo.rd_addr[3] -.sym 14788 w_rx_09_fifo_pull -.sym 14789 smi_ctrl_ins.r_fifo_09_pull_SB_LUT4_I2_O[2] -.sym 14795 rx_09_fifo.rd_addr_gray_SB_LUT4_I2_O[7] -.sym 14796 rx_09_fifo.wr_addr_gray_SB_DFFESR_Q_7_D[1] -.sym 14798 rx_09_fifo.full_o_SB_LUT4_I3_O[1] -.sym 14799 rx_09_fifo.full_o_SB_LUT4_I3_O[2] -.sym 14802 rx_09_fifo.rd_addr_gray_SB_LUT4_I2_O[6] -.sym 14806 rx_09_fifo.rd_addr_gray_SB_LUT4_I2_O[7] -.sym 14808 rx_09_fifo.rd_addr_gray_SB_LUT4_I2_O[6] -.sym 14812 rx_09_fifo.rd_addr[3] -.sym 14814 io_pmod_SB_DFFSS_Q_D_SB_LUT4_O_I0_SB_LUT4_O_2_I0[2] -.sym 14817 rx_09_fifo.wr_addr_gray_rd_r[2] -.sym 14818 io_pmod_SB_DFFSS_Q_D_SB_LUT4_O_I0_SB_LUT4_O_3_I2[3] -.sym 14819 rx_09_fifo.rd_addr[3] -.sym 14823 rx_09_fifo.wr_addr_gray_SB_DFFESR_Q_7_D[3] -.sym 14829 rx_09_fifo.full_o_SB_LUT4_I3_O[2] -.sym 14830 rx_09_fifo.full_o_SB_LUT4_I3_O[1] -.sym 14836 w_rx_09_fifo_pull -.sym 14837 rx_09_fifo.rd_addr_gray_SB_LUT4_I2_O[7] -.sym 14838 io_pmod_SB_DFFSS_Q_D_SB_LUT4_O_I0_SB_LUT4_O_I0[0] -.sym 14841 smi_ctrl_ins.r_fifo_09_pull_SB_LUT4_I2_O[3] -.sym 14842 smi_ctrl_ins.r_fifo_09_pull_SB_LUT4_I2_O[0] -.sym 14843 rx_09_fifo.wr_addr_gray_rd_r[3] -.sym 14844 smi_ctrl_ins.r_fifo_09_pull_SB_LUT4_I2_O[2] -.sym 14847 rx_09_fifo.wr_addr_gray_SB_DFFESR_Q_7_D[1] -.sym 14851 lvds_rx_09_inst.r_push_SB_LUT4_I3_1_O +.sym 14433 i_smi_a1_SB_LUT4_I1_O[3] +.sym 14441 io_smi_data[3]$SB_IO_OUT +.sym 14449 io_smi_data[4]$SB_IO_OUT +.sym 14476 i_smi_a3$SB_IO_IN +.sym 14491 lvds_rx_09_inst.o_fifo_data[16] +.sym 14493 lvds_rx_09_inst.o_fifo_data[20] +.sym 14494 lvds_rx_09_inst.o_fifo_data[26] +.sym 14501 lvds_rx_09_inst.r_state_if_SB_LUT4_I2_O[0] +.sym 14505 lvds_rx_09_inst.o_fifo_data[22] +.sym 14511 lvds_rx_09_inst.o_fifo_data[18] +.sym 14512 lvds_rx_09_inst.o_fifo_data[24] +.sym 14519 lvds_rx_09_inst.r_state_if_SB_LUT4_I2_O[0] +.sym 14520 lvds_rx_09_inst.o_fifo_data[24] +.sym 14526 lvds_rx_09_inst.r_state_if_SB_LUT4_I2_O[0] +.sym 14527 lvds_rx_09_inst.o_fifo_data[16] +.sym 14531 lvds_rx_09_inst.r_state_if_SB_LUT4_I2_O[0] +.sym 14532 lvds_rx_09_inst.o_fifo_data[22] +.sym 14538 lvds_rx_09_inst.r_state_if_SB_LUT4_I2_O[0] +.sym 14539 lvds_rx_09_inst.o_fifo_data[20] +.sym 14550 lvds_rx_09_inst.r_state_if_SB_LUT4_I2_O[0] +.sym 14551 lvds_rx_09_inst.o_fifo_data[26] +.sym 14562 lvds_rx_09_inst.r_state_if_SB_LUT4_I2_O[0] +.sym 14564 lvds_rx_09_inst.o_fifo_data[18] +.sym 14565 w_lvds_rx_09_d1_SB_LUT4_I0_O_SB_LUT4_I3_O_$glb_ce +.sym 14566 lvds_clock_buf +.sym 14567 i_smi_a1_SB_LUT4_I1_O[3]_$glb_sr +.sym 14575 i_smi_a2_SB_LUT4_I1_O_SB_LUT4_O_I0[2] +.sym 14576 w_rx_09_fifo_pull +.sym 14578 i_smi_a2_SB_LUT4_I1_O_SB_LUT4_I3_I2[0] +.sym 14584 w_smi_data_output[4] +.sym 14592 lvds_rx_09_inst.o_fifo_data[22] +.sym 14605 lvds_rx_09_inst.o_fifo_data[26] +.sym 14617 lvds_rx_09_inst.r_state_if_SB_LUT4_I2_O[0] +.sym 14627 w_rx_09_fifo_pull +.sym 14629 i_smi_a1_SB_LUT4_I1_O[3] +.sym 14633 i_smi_a2_SB_LUT4_I1_O_SB_LUT4_I3_I2_SB_LUT4_O_I3[1] +.sym 14635 i_smi_soe_se$rename$0 +.sym 14660 lvds_rx_09_inst.o_fifo_data[12] +.sym 14661 lvds_rx_09_inst.o_fifo_data[15] +.sym 14664 lvds_rx_09_inst.o_fifo_data[13] +.sym 14672 lvds_rx_09_inst.o_fifo_data[14] +.sym 14674 lvds_rx_09_inst.r_state_if_SB_LUT4_I2_O[0] +.sym 14695 lvds_rx_09_inst.o_fifo_data[15] +.sym 14696 lvds_rx_09_inst.r_state_if_SB_LUT4_I2_O[0] +.sym 14706 lvds_rx_09_inst.o_fifo_data[13] +.sym 14708 lvds_rx_09_inst.r_state_if_SB_LUT4_I2_O[0] +.sym 14714 lvds_rx_09_inst.o_fifo_data[14] +.sym 14715 lvds_rx_09_inst.r_state_if_SB_LUT4_I2_O[0] +.sym 14725 lvds_rx_09_inst.r_state_if_SB_LUT4_I2_O[0] +.sym 14727 lvds_rx_09_inst.o_fifo_data[12] +.sym 14728 w_lvds_rx_09_d1_SB_LUT4_I0_O_SB_LUT4_I3_O_$glb_ce +.sym 14729 lvds_clock_buf +.sym 14730 i_smi_a1_SB_LUT4_I1_O[3]_$glb_sr +.sym 14731 smi_ctrl_ins.r_fifo_09_pull_SB_DFFESR_Q_E[1] +.sym 14732 i_smi_a2_SB_LUT4_I1_O_SB_LUT4_I3_I2_SB_LUT4_O_I3[1] +.sym 14733 smi_ctrl_ins.r_fifo_09_pull_SB_DFFESR_Q_E[2] +.sym 14734 smi_ctrl_ins.int_cnt_09_SB_DFFESR_Q_E +.sym 14735 i_smi_a2_SB_LUT4_I1_O[1] +.sym 14736 i_smi_a2_SB_LUT4_I1_O_SB_LUT4_O_I2_SB_CARRY_CO_I1[5] +.sym 14737 i_smi_a2_SB_LUT4_I1_O_SB_LUT4_O_I0[0] +.sym 14738 i_smi_a2_SB_LUT4_I1_O_SB_LUT4_O_I2_SB_CARRY_CO_I1[4] +.sym 14741 sys_ctrl_ins.o_data_out_SB_DFFE_Q_E +.sym 14756 $PACKER_VCC_NET +.sym 14759 i_smi_a1_SB_LUT4_I1_O_SB_LUT4_O_I0[3] +.sym 14760 $PACKER_VCC_NET +.sym 14763 i_smi_a3$SB_IO_IN +.sym 14772 lvds_rx_09_inst.o_fifo_data[11] +.sym 14775 io_pmod[6]$SB_IO_IN +.sym 14776 w_rx_09_fifo_pull +.sym 14777 i_smi_a1_SB_LUT4_I1_O_SB_LUT4_O_I0[3] +.sym 14778 lvds_rx_09_inst.o_fifo_data[7] +.sym 14783 i_smi_a2_SB_LUT4_I1_O_SB_LUT4_O_I0[2] +.sym 14789 lvds_rx_09_inst.o_fifo_data[8] +.sym 14792 lvds_rx_09_inst.o_fifo_data[6] +.sym 14793 lvds_rx_09_inst.o_fifo_data[10] +.sym 14797 lvds_rx_09_inst.r_state_if_SB_LUT4_I2_O[0] +.sym 14798 lvds_rx_09_inst.o_fifo_data[9] +.sym 14800 i_smi_soe_se$rename$0 +.sym 14805 lvds_rx_09_inst.r_state_if_SB_LUT4_I2_O[0] +.sym 14808 lvds_rx_09_inst.o_fifo_data[9] +.sym 14812 lvds_rx_09_inst.o_fifo_data[6] +.sym 14814 lvds_rx_09_inst.r_state_if_SB_LUT4_I2_O[0] +.sym 14817 lvds_rx_09_inst.o_fifo_data[7] +.sym 14819 lvds_rx_09_inst.r_state_if_SB_LUT4_I2_O[0] +.sym 14823 lvds_rx_09_inst.o_fifo_data[10] +.sym 14824 lvds_rx_09_inst.r_state_if_SB_LUT4_I2_O[0] +.sym 14831 lvds_rx_09_inst.r_state_if_SB_LUT4_I2_O[0] +.sym 14832 io_pmod[6]$SB_IO_IN +.sym 14835 lvds_rx_09_inst.o_fifo_data[8] +.sym 14836 lvds_rx_09_inst.r_state_if_SB_LUT4_I2_O[0] +.sym 14841 i_smi_a2_SB_LUT4_I1_O_SB_LUT4_O_I0[2] +.sym 14842 i_smi_a1_SB_LUT4_I1_O_SB_LUT4_O_I0[3] +.sym 14843 w_rx_09_fifo_pull +.sym 14844 i_smi_soe_se$rename$0 +.sym 14848 lvds_rx_09_inst.o_fifo_data[11] +.sym 14850 lvds_rx_09_inst.r_state_if_SB_LUT4_I2_O[0] +.sym 14851 w_lvds_rx_09_d1_SB_LUT4_I0_O_SB_LUT4_I3_O_$glb_ce .sym 14852 lvds_clock_buf -.sym 14853 i_smi_a1_SB_LUT4_I1_O_SB_LUT4_O_I2_SB_LUT4_I0_O[2]_$glb_sr -.sym 14856 spi_if_ins.spi.r_tx_bit_count[2] -.sym 14857 spi_if_ins.r_tx_data_valid_SB_LUT4_I3_O[1] -.sym 14858 spi_if_ins.r_tx_data_valid_SB_LUT4_I3_O_SB_LUT4_O_I0_SB_LUT4_O_I3[2] -.sym 14859 spi_if_ins.r_tx_data_valid_SB_LUT4_I3_O_SB_LUT4_O_I0[3] -.sym 14860 spi_if_ins.spi.r_tx_byte_SB_DFFESR_Q_E -.sym 14861 spi_if_ins.r_tx_data_valid_SB_LUT4_I3_O_SB_LUT4_O_I0[0] -.sym 14867 $PACKER_VCC_NET -.sym 14868 io_pmod_SB_DFFSS_Q_D_SB_LUT4_O_I0_SB_LUT4_O_2_I0[3] +.sym 14853 i_smi_a1_SB_LUT4_I1_O[3]_$glb_sr +.sym 14855 i_smi_a2_SB_LUT4_I1_O_SB_LUT4_I3_I2[1] +.sym 14856 i_smi_a2_SB_LUT4_I1_O_SB_LUT4_I3_I2[2] +.sym 14857 smi_ctrl_ins.int_cnt_09[5] +.sym 14858 io_smi_data[5]$SB_IO_OUT +.sym 14860 i_smi_a1_SB_LUT4_I1_O[0] +.sym 14861 smi_ctrl_ins.int_cnt_09[4] .sym 14869 i_smi_a3$SB_IO_IN -.sym 14870 io_pmod_SB_DFFSS_Q_D_SB_LUT4_O_I0_SB_LUT4_O_3_I2[1] -.sym 14874 io_pmod_SB_DFFSS_Q_D_SB_LUT4_O_I0_SB_LUT4_O_3_I2[3] -.sym 14883 sys_ctrl_ins.reset_cmd -.sym 14885 r_tx_data[3] -.sym 14888 smi_ctrl_ins.int_cnt_09[3] -.sym 14896 io_pmod_SB_DFFSS_Q_D_SB_LUT4_O_I0_SB_LUT4_O_I0[0] -.sym 14897 rx_09_fifo.full_o_SB_LUT4_I3_O[1] -.sym 14898 rx_09_fifo.wr_addr_gray[1] -.sym 14902 rx_09_fifo.wr_addr_gray[0] -.sym 14903 rx_09_fifo.wr_addr_gray_SB_DFFESR_Q_7_D[1] -.sym 14905 rx_09_fifo.full_o_SB_LUT4_I3_O[1] -.sym 14906 rx_09_fifo.full_o_SB_LUT4_I3_O[2] -.sym 14907 io_pmod[2]$SB_IO_IN -.sym 14910 rx_09_fifo.full_o_SB_DFFSR_Q_D_SB_LUT4_O_I1_SB_LUT4_O_I0_SB_LUT4_O_1_I3[0] -.sym 14912 rx_09_fifo.full_o_SB_LUT4_I3_O[0] -.sym 14913 io_pmod_SB_DFFSS_Q_D_SB_LUT4_O_I0_SB_LUT4_O_I0[1] -.sym 14914 rx_09_fifo.rd_addr_gray_wr_r[0] -.sym 14915 rx_09_fifo.full_o_SB_LUT4_I3_O_SB_LUT4_I3_O[1] -.sym 14916 rx_09_fifo.full_o_SB_LUT4_I3_O_SB_LUT4_I3_O[0] -.sym 14917 rx_09_fifo.wr_addr_gray[3] -.sym 14919 rx_09_fifo.wr_addr_gray_SB_LUT4_I2_1_O[1] -.sym 14920 rx_09_fifo.full_o_SB_LUT4_I3_O_SB_LUT4_I3_O[3] -.sym 14921 rx_09_fifo.full_o_SB_LUT4_I3_O_SB_LUT4_I3_O[2] -.sym 14922 rx_09_fifo.full_o_SB_LUT4_I3_O[3] -.sym 14924 w_rx_09_fifo_pull -.sym 14926 rx_09_fifo.wr_addr_gray_SB_DFFESR_Q_7_D[3] -.sym 14929 rx_09_fifo.wr_addr_gray[0] -.sym 14934 io_pmod_SB_DFFSS_Q_D_SB_LUT4_O_I0_SB_LUT4_O_I0[0] -.sym 14935 io_pmod_SB_DFFSS_Q_D_SB_LUT4_O_I0_SB_LUT4_O_I0[1] -.sym 14936 io_pmod[2]$SB_IO_IN -.sym 14937 w_rx_09_fifo_pull -.sym 14943 rx_09_fifo.wr_addr_gray[1] -.sym 14946 rx_09_fifo.full_o_SB_LUT4_I3_O_SB_LUT4_I3_O[0] -.sym 14947 rx_09_fifo.full_o_SB_LUT4_I3_O_SB_LUT4_I3_O[1] -.sym 14948 rx_09_fifo.full_o_SB_LUT4_I3_O_SB_LUT4_I3_O[2] -.sym 14949 rx_09_fifo.full_o_SB_LUT4_I3_O_SB_LUT4_I3_O[3] -.sym 14952 rx_09_fifo.full_o_SB_LUT4_I3_O[3] -.sym 14953 rx_09_fifo.full_o_SB_LUT4_I3_O[0] -.sym 14954 rx_09_fifo.full_o_SB_LUT4_I3_O[2] -.sym 14955 rx_09_fifo.full_o_SB_LUT4_I3_O[1] -.sym 14958 rx_09_fifo.wr_addr_gray_SB_DFFESR_Q_7_D[1] -.sym 14959 rx_09_fifo.wr_addr_gray_SB_DFFESR_Q_7_D[3] -.sym 14960 rx_09_fifo.rd_addr_gray_wr_r[0] -.sym 14961 rx_09_fifo.full_o_SB_DFFSR_Q_D_SB_LUT4_O_I1_SB_LUT4_O_I0_SB_LUT4_O_1_I3[0] -.sym 14964 rx_09_fifo.wr_addr_gray[3] -.sym 14972 rx_09_fifo.wr_addr_gray_SB_LUT4_I2_1_O[1] -.sym 14973 rx_09_fifo.full_o_SB_LUT4_I3_O[1] -.sym 14975 r_counter[0]_$glb_clk -.sym 14977 spi_if_ins.spi.r_tx_byte[2] -.sym 14978 spi_if_ins.spi.r_tx_byte[1] -.sym 14979 spi_if_ins.spi.r_tx_byte[7] -.sym 14980 spi_if_ins.spi.r_tx_byte[5] -.sym 14981 spi_if_ins.r_tx_data_valid_SB_LUT4_I3_O_SB_LUT4_O_I0_SB_LUT4_O_I3[3] -.sym 14982 spi_if_ins.r_tx_data_valid_SB_LUT4_I3_O_SB_LUT4_O_I0_SB_LUT4_O_I3[0] -.sym 14983 spi_if_ins.r_tx_data_valid_SB_LUT4_I3_O_SB_LUT4_O_I0[2] -.sym 14984 spi_if_ins.r_tx_data_valid_SB_LUT4_I3_O_SB_LUT4_O_I0[1] -.sym 14989 spi_if_ins.spi.o_spi_miso_SB_DFFE_Q_E -.sym 14999 rx_09_fifo.wr_addr_gray_rd_r[3] -.sym 15000 io_pmod_SB_DFFSS_Q_D_SB_LUT4_O_I0_SB_LUT4_O_I0[0] -.sym 15002 spi_if_ins.spi.r_tx_byte[3] -.sym 15005 i_smi_soe_se$rename$0 -.sym 15009 spi_if_ins.spi.r_tx_byte_SB_DFFESR_Q_E -.sym 15012 spi_if_ins.r_tx_data_valid_SB_LUT4_I3_O_SB_LUT4_O_I0_SB_LUT4_O_I3[1] -.sym 15018 rx_09_fifo.wr_addr_gray_SB_LUT4_I2_1_O[1] -.sym 15025 rx_09_fifo.wr_addr[0] -.sym 15026 r_tx_data[7] -.sym 15028 r_tx_data[1] -.sym 15029 spi_if_ins.r_tx_data_valid_SB_DFFESR_Q_D_SB_LUT4_I3_O -.sym 15030 r_tx_data[5] -.sym 15035 r_tx_data[2] -.sym 15045 r_tx_data[3] -.sym 15051 rx_09_fifo.wr_addr_gray_SB_LUT4_I2_1_O[1] -.sym 15054 rx_09_fifo.wr_addr[0] -.sym 15057 r_tx_data[7] -.sym 15063 r_tx_data[3] -.sym 15071 r_tx_data[1] -.sym 15081 r_tx_data[2] -.sym 15093 r_tx_data[5] -.sym 15097 spi_if_ins.r_tx_data_valid_SB_DFFESR_Q_D_SB_LUT4_I3_O +.sym 14871 io_pmod[6]$SB_IO_IN +.sym 14876 lvds_rx_09_inst.o_fifo_data[6] +.sym 14878 i_smi_a1_SB_LUT4_I1_O_SB_LUT4_I3_O[3] +.sym 14881 sys_ctrl_ins.reset_cmd +.sym 14886 sys_ctrl_ins.reset_cmd +.sym 14889 i_smi_a2_SB_LUT4_I1_O_SB_LUT4_I3_I2[1] +.sym 14902 i_smi_a1_SB_LUT4_I1_O_SB_LUT4_I0_O[0] +.sym 14906 i_smi_a1_SB_LUT4_I1_O_SB_LUT4_O_I0[2] +.sym 14907 i_smi_soe_se$rename$0 +.sym 14911 i_smi_a1_SB_LUT4_I1_O_SB_LUT4_O_I2_SB_CARRY_CO_I1[5] +.sym 14913 smi_ctrl_ins.r_fifo_24_pull_SB_DFFESR_Q_E_SB_LUT4_O_I1[5] +.sym 14917 i_smi_a1_SB_LUT4_I1_O[3] +.sym 14918 i_smi_a1_SB_LUT4_I1_O_SB_LUT4_O_I2_SB_CARRY_CO_I1[4] +.sym 14919 i_smi_a1_SB_LUT4_I1_O_SB_LUT4_O_I0[3] +.sym 14925 i_smi_a1_SB_LUT4_I1_O[0] +.sym 14927 $nextpnr_ICESTORM_LC_19$O +.sym 14929 i_smi_a1_SB_LUT4_I1_O_SB_LUT4_O_I2_SB_CARRY_CO_I1[4] +.sym 14933 $nextpnr_ICESTORM_LC_20$I3 +.sym 14935 i_smi_a1_SB_LUT4_I1_O_SB_LUT4_O_I2_SB_CARRY_CO_I1[5] +.sym 14943 $nextpnr_ICESTORM_LC_20$I3 +.sym 14952 i_smi_a1_SB_LUT4_I1_O_SB_LUT4_O_I0[2] +.sym 14953 i_smi_soe_se$rename$0 +.sym 14954 smi_ctrl_ins.r_fifo_24_pull_SB_DFFESR_Q_E_SB_LUT4_O_I1[5] +.sym 14955 i_smi_a1_SB_LUT4_I1_O_SB_LUT4_O_I0[3] +.sym 14964 i_smi_a1_SB_LUT4_I1_O[3] +.sym 14965 i_smi_a1_SB_LUT4_I1_O_SB_LUT4_I0_O[0] +.sym 14967 i_smi_a1_SB_LUT4_I1_O[0] +.sym 14979 spi_if_ins.spi.r_tx_bit_count[2] +.sym 14980 spi_if_ins.spi.o_spi_miso_SB_DFFE_Q_E +.sym 14981 spi_if_ins.spi.o_spi_miso_SB_DFFE_Q_D_SB_LUT4_O_I2_SB_LUT4_O_I0_SB_LUT4_O_I3[2] +.sym 14982 spi_if_ins.spi.SCKr_SB_LUT4_I0_O[0] +.sym 14983 spi_if_ins.spi.SCKr_SB_LUT4_I0_O[1] +.sym 14984 spi_if_ins.spi.r_tx_bit_count_SB_DFFESR_Q_R +.sym 14999 io_pmod[7]$SB_IO_IN +.sym 15001 w_rx_24_fifo_pull +.sym 15003 i_smi_a1_SB_LUT4_I1_O[3] +.sym 15005 spi_if_ins.spi.r_tx_byte_SB_DFFESR_Q_E +.sym 15009 spi_if_ins.r_tx_byte[5] +.sym 15020 smi_ctrl_ins.r_fifo_24_pull_SB_DFFESR_Q_E[2] +.sym 15023 i_smi_a1_SB_LUT4_I1_O_SB_LUT4_O_I2[3] +.sym 15024 i_smi_a1_SB_LUT4_I1_O[0] +.sym 15026 i_smi_a1_SB_LUT4_I1_O_SB_LUT4_O_I2_SB_CARRY_CO_I1[5] +.sym 15027 i_smi_soe_se$rename$0 +.sym 15028 i_smi_a1_SB_LUT4_I1_O[2] +.sym 15030 $PACKER_VCC_NET +.sym 15031 i_smi_a1_SB_LUT4_I1_O_SB_LUT4_O_I0[3] +.sym 15032 i_smi_a1_SB_LUT4_I1_O_SB_LUT4_O_I0[0] +.sym 15033 i_smi_a1_SB_LUT4_I1_O_SB_LUT4_O_I2_SB_CARRY_CO_I1[4] +.sym 15037 i_smi_a1_SB_LUT4_I1_O_SB_LUT4_O_I0[2] +.sym 15040 i_smi_a1_SB_LUT4_I1_O[1] +.sym 15041 i_smi_a1_SB_LUT4_I1_O[3] +.sym 15050 $nextpnr_ICESTORM_LC_12$O +.sym 15052 i_smi_a1_SB_LUT4_I1_O_SB_LUT4_O_I2[3] +.sym 15056 i_smi_a1_SB_LUT4_I1_O_SB_LUT4_O_I2[4] +.sym 15058 i_smi_a1_SB_LUT4_I1_O_SB_LUT4_O_I2_SB_CARRY_CO_I1[4] +.sym 15062 $nextpnr_ICESTORM_LC_13$I3 +.sym 15064 i_smi_a1_SB_LUT4_I1_O_SB_LUT4_O_I2_SB_CARRY_CO_I1[5] +.sym 15068 $nextpnr_ICESTORM_LC_13$COUT +.sym 15071 $PACKER_VCC_NET +.sym 15072 $nextpnr_ICESTORM_LC_13$I3 +.sym 15075 i_smi_soe_se$rename$0 +.sym 15077 i_smi_a1_SB_LUT4_I1_O_SB_LUT4_O_I0[3] +.sym 15078 $nextpnr_ICESTORM_LC_13$COUT +.sym 15081 i_smi_a1_SB_LUT4_I1_O[2] +.sym 15082 i_smi_a1_SB_LUT4_I1_O[0] +.sym 15083 i_smi_a1_SB_LUT4_I1_O[3] +.sym 15084 i_smi_a1_SB_LUT4_I1_O[1] +.sym 15087 i_smi_soe_se$rename$0 +.sym 15088 i_smi_a1_SB_LUT4_I1_O_SB_LUT4_O_I0[0] +.sym 15089 i_smi_a1_SB_LUT4_I1_O_SB_LUT4_O_I0[3] +.sym 15090 i_smi_a1_SB_LUT4_I1_O_SB_LUT4_O_I0[2] +.sym 15093 i_smi_a1_SB_LUT4_I1_O_SB_LUT4_O_I0[2] +.sym 15094 i_smi_soe_se$rename$0 +.sym 15095 i_smi_a1_SB_LUT4_I1_O[2] +.sym 15096 i_smi_a1_SB_LUT4_I1_O_SB_LUT4_O_I0[3] +.sym 15097 smi_ctrl_ins.r_fifo_24_pull_SB_DFFESR_Q_E[2] .sym 15098 r_counter[0]_$glb_clk -.sym 15102 sys_ctrl_ins.reset_count[2] -.sym 15103 sys_ctrl_ins.reset_count[3] -.sym 15104 sys_ctrl_ins.reset_count[1] -.sym 15105 sys_ctrl_ins.o_soft_reset_SB_DFFESS_Q_S -.sym 15106 sys_ctrl_ins.reset_count[0] -.sym 15107 sys_ctrl_ins.reset_count_SB_DFFESR_Q_E -.sym 15110 i_smi_a1_SB_LUT4_I1_O_SB_LUT4_O_I2_SB_LUT4_I0_O[2] -.sym 15114 smi_ctrl_ins.int_cnt_24[5] -.sym 15116 spi_if_ins.r_tx_byte[7] -.sym 15117 spi_if_ins.r_tx_data_valid_SB_DFFESR_Q_D_SB_LUT4_I3_O -.sym 15124 i_ss$SB_IO_IN -.sym 15125 spi_if_ins.r_tx_byte[3] -.sym 15131 spi_if_ins.r_tx_data_valid_SB_LUT4_I3_O[2] -.sym 15152 smi_ctrl_ins.int_cnt_09_SB_DFFESR_Q_E -.sym 15154 smi_ctrl_ins.int_cnt_09_SB_DFFESR_Q_D_SB_LUT4_O_I3[1] -.sym 15157 smi_ctrl_ins.r_fifo_24_pull_SB_LUT4_I1_O[2] -.sym 15162 smi_ctrl_ins.int_cnt_09[3] -.sym 15165 i_smi_soe_se$rename$0 -.sym 15166 smi_ctrl_ins.int_cnt_09_SB_DFFESR_Q_D_SB_LUT4_O_I3[2] -.sym 15204 i_smi_soe_se$rename$0 -.sym 15206 smi_ctrl_ins.int_cnt_09[3] -.sym 15207 smi_ctrl_ins.r_fifo_24_pull_SB_LUT4_I1_O[2] -.sym 15210 smi_ctrl_ins.r_fifo_24_pull_SB_LUT4_I1_O[2] -.sym 15212 smi_ctrl_ins.int_cnt_09_SB_DFFESR_Q_D_SB_LUT4_O_I3[1] -.sym 15213 i_smi_soe_se$rename$0 -.sym 15217 smi_ctrl_ins.r_fifo_24_pull_SB_LUT4_I1_O[2] -.sym 15218 i_smi_soe_se$rename$0 -.sym 15219 smi_ctrl_ins.int_cnt_09_SB_DFFESR_Q_D_SB_LUT4_O_I3[2] -.sym 15220 smi_ctrl_ins.int_cnt_09_SB_DFFESR_Q_E +.sym 15099 i_smi_a1_SB_LUT4_I1_O[3]_$glb_sr +.sym 15100 spi_if_ins.spi.r_tx_byte_SB_DFFESR_Q_E +.sym 15101 spi_if_ins.spi.o_spi_miso_SB_DFFE_Q_D_SB_LUT4_O_I2_SB_LUT4_O_I0_SB_LUT4_O_I3[3] +.sym 15102 spi_if_ins.spi.o_spi_miso_SB_DFFE_Q_D_SB_LUT4_O_I2_SB_LUT4_O_I0[0] +.sym 15103 spi_if_ins.spi.o_spi_miso_SB_DFFE_Q_D_SB_LUT4_O_I2_SB_LUT4_O_I0[1] +.sym 15104 sys_ctrl_ins.o_soft_reset_SB_DFFESS_Q_E +.sym 15105 spi_if_ins.spi.o_spi_miso_SB_DFFE_Q_D_SB_LUT4_O_I2_SB_LUT4_O_I0[2] +.sym 15106 spi_if_ins.spi.o_spi_miso_SB_DFFE_Q_D_SB_LUT4_O_I2[1] +.sym 15107 i_smi_a1_SB_LUT4_I1_O[3] +.sym 15114 smi_ctrl_ins.r_fifo_24_pull_SB_DFFESR_Q_E[2] +.sym 15119 spi_if_ins.r_tx_byte[7] +.sym 15122 w_rx_24_fifo_pull +.sym 15125 i_ss$SB_IO_IN +.sym 15126 spi_if_ins.r_tx_data_valid_SB_LUT4_I3_O[2] +.sym 15131 i_smi_a1_SB_LUT4_I1_O[3] +.sym 15143 spi_if_ins.spi.r_tx_byte_SB_DFFESR_Q_E +.sym 15155 spi_if_ins.r_tx_byte[1] +.sym 15161 spi_if_ins.r_tx_data_valid_SB_LUT4_I3_O[2] +.sym 15162 spi_if_ins.r_tx_byte[7] +.sym 15169 spi_if_ins.r_tx_byte[5] +.sym 15172 spi_if_ins.r_tx_byte[2] +.sym 15177 spi_if_ins.r_tx_byte[7] +.sym 15180 spi_if_ins.r_tx_byte[5] +.sym 15207 spi_if_ins.r_tx_byte[2] +.sym 15213 spi_if_ins.r_tx_byte[1] +.sym 15220 spi_if_ins.spi.r_tx_byte_SB_DFFESR_Q_E .sym 15221 r_counter[0]_$glb_clk -.sym 15222 i_smi_a1_SB_LUT4_I1_O_SB_LUT4_O_I2_SB_LUT4_I0_O[2]_$glb_sr -.sym 15223 spi_if_ins.spi.r_tx_byte[3] -.sym 15225 spi_if_ins.spi.r_tx_byte[6] -.sym 15228 spi_if_ins.r_tx_data_valid_SB_LUT4_I3_O_SB_LUT4_O_I0_SB_LUT4_O_I3[1] -.sym 15242 spi_if_ins.r_tx_data_valid_SB_DFFESR_Q_D[0] -.sym 15247 spi_if_ins.r_tx_data_valid_SB_DFFESR_Q_D[0] -.sym 15248 r_tx_data[7] -.sym 15250 r_tx_data[1] -.sym 15253 sys_ctrl_ins.o_soft_reset_SB_DFFESS_Q_S -.sym 15254 r_tx_data[2] -.sym 15256 r_tx_data[5] -.sym 15257 spi_if_ins.r_tx_data_valid_SB_LUT4_I3_O[2] -.sym 15267 spi_if_ins.spi.r3_rx_done_SB_LUT4_I2_O -.sym 15322 spi_if_ins.spi.r3_rx_done_SB_LUT4_I2_O +.sym 15222 spi_if_ins.r_tx_data_valid_SB_LUT4_I3_O[2] +.sym 15223 spi_if_ins.spi.o_spi_miso_SB_DFFE_Q_D_SB_LUT4_O_I2_SB_LUT4_O_I0_SB_LUT4_O_I3[1] +.sym 15225 spi_if_ins.spi.o_spi_miso_SB_DFFE_Q_D_SB_LUT4_O_I2_SB_LUT4_O_I0_SB_LUT4_O_I3[0] +.sym 15226 spi_if_ins.spi.r_tx_byte[6] +.sym 15227 spi_if_ins.spi.r_tx_byte[3] +.sym 15230 spi_if_ins.r_tx_data_valid_SB_LUT4_I3_O[2] +.sym 15231 $PACKER_GND_NET +.sym 15240 i_smi_a1_SB_LUT4_I1_O[3] +.sym 15242 spi_if_ins.spi.r_tx_byte_SB_DFFESR_Q_E +.sym 15243 spi_if_ins.r_tx_byte[1] +.sym 15245 io_pmod[5]$SB_IO_IN +.sym 15247 spi_if_ins.r_tx_byte[4] +.sym 15249 spi_if_ins.o_ioc_SB_DFFE_Q_E[0] +.sym 15252 $PACKER_VCC_NET +.sym 15253 spi_if_ins.r_tx_byte[3] +.sym 15256 spi_if_ins.o_ioc_SB_DFFE_Q_E[0] +.sym 15257 i_smi_a1_SB_LUT4_I1_O[3] +.sym 15273 spi_if_ins.r_tx_data_valid_SB_DFFESR_Q_D[1] +.sym 15291 spi_if_ins.r_tx_data_valid_SB_DFFESR_Q_E +.sym 15293 spi_if_ins.o_ioc_SB_DFFE_Q_E[0] +.sym 15316 spi_if_ins.r_tx_data_valid_SB_DFFESR_Q_D[1] +.sym 15343 spi_if_ins.r_tx_data_valid_SB_DFFESR_Q_E .sym 15344 r_counter[0]_$glb_clk -.sym 15347 spi_if_ins.spi.r_rx_byte[6] -.sym 15349 spi_if_ins.r_tx_data_valid_SB_LUT4_I3_O[2] -.sym 15351 w_smi_read_req -.sym 15366 spi_if_ins.spi.r_rx_done_SB_DFFER_Q_E -.sym 15370 sys_ctrl_ins.reset_cmd -.sym 15371 spi_if_ins.r_tx_byte[4] -.sym 15372 r_tx_data[3] -.sym 15375 spi_if_ins.w_rx_data[5] -.sym 15378 sys_ctrl_ins.reset_cmd -.sym 15392 spi_if_ins.o_cs_SB_LUT4_I2_2_O[2] -.sym 15393 spi_if_ins.w_rx_data[6] -.sym 15396 spi_if_ins.o_cs_SB_LUT4_I2_1_O[1] -.sym 15405 spi_if_ins.o_load_cmd_SB_DFFESR_Q_D_SB_LUT4_I1_O[1] -.sym 15408 spi_if_ins.w_rx_data[5] -.sym 15413 w_tx_data_smi[2] -.sym 15416 spi_if_ins.o_cs_SB_DFFESR_Q_R[0] -.sym 15427 spi_if_ins.w_rx_data[6] -.sym 15428 spi_if_ins.w_rx_data[5] -.sym 15433 spi_if_ins.o_cs_SB_LUT4_I2_2_O[2] -.sym 15434 spi_if_ins.o_cs_SB_LUT4_I2_1_O[1] -.sym 15435 w_tx_data_smi[2] -.sym 15445 spi_if_ins.w_rx_data[5] -.sym 15446 spi_if_ins.w_rx_data[6] -.sym 15450 spi_if_ins.w_rx_data[5] -.sym 15451 spi_if_ins.w_rx_data[6] -.sym 15466 spi_if_ins.o_load_cmd_SB_DFFESR_Q_D_SB_LUT4_I1_O[1] +.sym 15345 spi_if_ins.o_ioc_SB_DFFE_Q_E[0] +.sym 15348 spi_if_ins.o_data_in_SB_DFFE_Q_E +.sym 15351 spi_if_ins.state_if[2] +.sym 15361 spi_if_ins.spi.r3_rx_done_SB_LUT4_I2_O +.sym 15368 spi_if_ins.w_rx_data[6] +.sym 15373 spi_if_ins.r_tx_byte[6] +.sym 15377 sys_ctrl_ins.reset_cmd +.sym 15379 sys_ctrl_ins.reset_cmd_SB_DFFESR_Q_E +.sym 15381 i_smi_a1_SB_LUT4_I1_O_SB_LUT4_I3_O[3] +.sym 15388 spi_if_ins.r_tx_data_valid_SB_DFFESR_Q_D[1] +.sym 15389 spi_if_ins.state_if_SB_DFFE_Q_E +.sym 15390 spi_if_ins.state_if_SB_DFFE_Q_D[1] +.sym 15393 spi_if_ins.state_if_SB_DFFESR_Q_D[1] +.sym 15395 spi_if_ins.o_ioc_SB_DFFE_Q_E[1] +.sym 15400 spi_if_ins.state_if[0] +.sym 15403 spi_if_ins.o_ioc_SB_DFFE_Q_E[0] +.sym 15408 spi_if_ins.state_if[2] +.sym 15409 spi_if_ins.o_ioc_SB_DFFE_Q_E[0] +.sym 15411 spi_if_ins.o_ioc_SB_DFFE_Q_E[0] +.sym 15413 spi_if_ins.o_ioc_SB_DFFE_Q_E[2] +.sym 15415 spi_if_ins.state_if[1] +.sym 15416 spi_if_ins.state_if[2] +.sym 15417 spi_if_ins.state_if_SB_DFFESR_Q_D[0] +.sym 15420 spi_if_ins.state_if[0] +.sym 15421 spi_if_ins.state_if[1] +.sym 15422 spi_if_ins.state_if[2] +.sym 15427 spi_if_ins.state_if[2] +.sym 15428 spi_if_ins.state_if[1] +.sym 15429 spi_if_ins.state_if[0] +.sym 15432 spi_if_ins.o_ioc_SB_DFFE_Q_E[0] +.sym 15433 spi_if_ins.state_if[1] +.sym 15434 spi_if_ins.state_if[0] +.sym 15435 spi_if_ins.state_if[2] +.sym 15438 spi_if_ins.state_if_SB_DFFESR_Q_D[0] +.sym 15439 spi_if_ins.state_if_SB_DFFESR_Q_D[1] +.sym 15440 spi_if_ins.o_ioc_SB_DFFE_Q_E[1] +.sym 15441 spi_if_ins.o_ioc_SB_DFFE_Q_E[0] +.sym 15445 spi_if_ins.state_if_SB_DFFE_Q_D[1] +.sym 15450 spi_if_ins.r_tx_data_valid_SB_DFFESR_Q_D[1] +.sym 15452 spi_if_ins.o_ioc_SB_DFFE_Q_E[0] +.sym 15456 spi_if_ins.state_if[0] +.sym 15458 spi_if_ins.state_if[2] +.sym 15459 spi_if_ins.state_if[1] +.sym 15462 spi_if_ins.o_ioc_SB_DFFE_Q_E[1] +.sym 15463 spi_if_ins.o_ioc_SB_DFFE_Q_E[0] +.sym 15464 spi_if_ins.o_ioc_SB_DFFE_Q_E[2] +.sym 15466 spi_if_ins.state_if_SB_DFFE_Q_E .sym 15467 r_counter[0]_$glb_clk -.sym 15468 spi_if_ins.o_cs_SB_DFFESR_Q_R[0] -.sym 15469 r_tx_data[7] -.sym 15470 r_tx_data[1] -.sym 15471 r_tx_data[4] -.sym 15472 r_tx_data[2] -.sym 15473 r_tx_data[5] -.sym 15474 spi_if_ins.w_rx_data[5] -.sym 15475 r_tx_data[6] -.sym 15476 r_tx_data[3] -.sym 15488 w_tx_data_io[0] -.sym 15493 io_ctrl_ins.tr_vc_2_state_SB_LUT4_I1_I3[1] -.sym 15500 w_tx_data_io[4] -.sym 15501 spi_if_ins.r_tx_byte[6] -.sym 15510 w_cs[0] -.sym 15511 w_cs[3] -.sym 15512 spi_if_ins.r_tx_data_valid_SB_DFFESR_Q_E -.sym 15513 spi_if_ins.r_tx_data_valid_SB_DFFESR_Q_D[1] -.sym 15514 w_cs[2] -.sym 15515 w_cs[1] -.sym 15516 spi_if_ins.w_rx_data[6] -.sym 15518 w_cs[0] -.sym 15519 w_cs[3] -.sym 15522 w_cs[2] -.sym 15530 spi_if_ins.r_tx_data_valid_SB_DFFESR_Q_D[0] -.sym 15535 spi_if_ins.w_rx_data[5] -.sym 15543 w_cs[3] -.sym 15544 w_cs[1] -.sym 15545 w_cs[0] -.sym 15546 w_cs[2] -.sym 15549 w_cs[1] -.sym 15550 w_cs[0] -.sym 15551 w_cs[3] -.sym 15552 w_cs[2] -.sym 15556 spi_if_ins.r_tx_data_valid_SB_DFFESR_Q_D[1] -.sym 15561 w_cs[2] -.sym 15562 w_cs[0] -.sym 15563 w_cs[1] -.sym 15564 w_cs[3] -.sym 15567 w_cs[3] -.sym 15568 w_cs[1] -.sym 15569 w_cs[2] -.sym 15570 w_cs[0] -.sym 15573 w_cs[1] -.sym 15574 w_cs[2] -.sym 15575 w_cs[0] -.sym 15576 w_cs[3] -.sym 15579 spi_if_ins.w_rx_data[6] -.sym 15581 spi_if_ins.w_rx_data[5] -.sym 15589 spi_if_ins.r_tx_data_valid_SB_DFFESR_Q_E +.sym 15469 w_rx_data[1] +.sym 15470 w_rx_data[0] +.sym 15471 w_rx_data[7] +.sym 15472 w_rx_data[5] +.sym 15473 w_rx_data[6] +.sym 15475 w_rx_data[2] +.sym 15476 spi_if_ins.o_data_in_SB_DFFE_Q_E +.sym 15499 spi_if_ins.state_if[2] +.sym 15500 w_cs[0] +.sym 15501 spi_if_ins.r_tx_byte[5] +.sym 15502 spi_if_ins.w_rx_data[5] +.sym 15503 spi_if_ins.spi.r3_rx_done_SB_LUT4_I2_O +.sym 15504 w_rx_data[0] +.sym 15513 spi_if_ins.state_if_SB_DFFE_Q_D[1] +.sym 15514 spi_if_ins.state_if[1] +.sym 15515 spi_if_ins.o_ioc_SB_DFFE_Q_E[0] +.sym 15516 spi_if_ins.o_ioc_SB_DFFE_Q_E[0] +.sym 15523 spi_if_ins.state_if[2] +.sym 15527 r_tx_data[4] +.sym 15531 spi_if_ins.state_if[0] +.sym 15532 r_tx_data[2] +.sym 15536 spi_if_ins.state_if_SB_DFFE_Q_D[0] +.sym 15537 spi_if_ins.r_tx_data_valid_SB_DFFESR_Q_D_SB_LUT4_I3_O +.sym 15538 r_tx_data[1] +.sym 15539 r_tx_data[6] +.sym 15541 r_tx_data[3] +.sym 15546 r_tx_data[4] +.sym 15549 spi_if_ins.o_ioc_SB_DFFE_Q_E[0] +.sym 15550 spi_if_ins.state_if[1] +.sym 15551 spi_if_ins.state_if[0] +.sym 15552 spi_if_ins.state_if[2] +.sym 15557 spi_if_ins.state_if[1] +.sym 15558 spi_if_ins.state_if[0] +.sym 15564 r_tx_data[3] +.sym 15568 spi_if_ins.state_if_SB_DFFE_Q_D[1] +.sym 15569 spi_if_ins.o_ioc_SB_DFFE_Q_E[0] +.sym 15570 spi_if_ins.state_if_SB_DFFE_Q_D[0] +.sym 15576 r_tx_data[2] +.sym 15582 r_tx_data[1] +.sym 15588 r_tx_data[6] +.sym 15589 spi_if_ins.r_tx_data_valid_SB_DFFESR_Q_D_SB_LUT4_I3_O .sym 15590 r_counter[0]_$glb_clk -.sym 15591 spi_if_ins.r_tx_data_valid_SB_DFFESR_Q_D[0] -.sym 15592 spi_if_ins.r_tx_byte[4] -.sym 15594 spi_if_ins.r_tx_byte[6] -.sym 15604 spi_if_ins.o_cs_SB_LUT4_I2_2_O[1] -.sym 15607 w_tx_data_io[5] -.sym 15608 i_mosi$SB_IO_IN -.sym 15609 w_tx_data_smi[1] -.sym 15615 w_tx_data_io[7] -.sym 15620 w_fetch -.sym 15624 w_cs[0] -.sym 15625 spi_if_ins.o_cs_SB_DFFESR_Q_R[0] -.sym 15627 w_fetch -.sym 15633 spi_if_ins.w_rx_data[3] -.sym 15634 w_ioc[1] -.sym 15635 spi_if_ins.o_load_cmd_SB_DFFESR_Q_D_SB_LUT4_I1_O[1] -.sym 15637 spi_if_ins.w_rx_data[4] -.sym 15639 w_fetch -.sym 15641 w_cs[2] -.sym 15646 spi_if_ins.o_fetch_cmd_SB_LUT4_I3_1_O[0] -.sym 15647 spi_if_ins.o_cs_SB_DFFESR_Q_R[0] -.sym 15657 w_cs[0] -.sym 15659 spi_if_ins.o_fetch_cmd_SB_LUT4_I3_1_O[1] -.sym 15664 i_smi_a1_SB_LUT4_I1_O_SB_LUT4_O_I2_SB_LUT4_I0_O[2] -.sym 15667 spi_if_ins.o_cs_SB_DFFESR_Q_R[0] -.sym 15672 spi_if_ins.o_fetch_cmd_SB_LUT4_I3_1_O[1] -.sym 15675 spi_if_ins.o_fetch_cmd_SB_LUT4_I3_1_O[0] -.sym 15678 i_smi_a1_SB_LUT4_I1_O_SB_LUT4_O_I2_SB_LUT4_I0_O[2] -.sym 15679 w_ioc[1] -.sym 15680 w_fetch -.sym 15681 w_cs[2] -.sym 15685 w_fetch -.sym 15686 w_cs[0] -.sym 15687 spi_if_ins.o_fetch_cmd_SB_LUT4_I3_1_O[0] -.sym 15702 spi_if_ins.w_rx_data[4] -.sym 15709 spi_if_ins.w_rx_data[3] -.sym 15712 spi_if_ins.o_load_cmd_SB_DFFESR_Q_D_SB_LUT4_I1_O[1] +.sym 15595 sys_ctrl_ins.reset_cmd +.sym 15596 sys_ctrl_ins.reset_cmd_SB_DFFESR_Q_E +.sym 15599 sys_ctrl_ins.reset_cmd_SB_DFFESR_Q_R +.sym 15611 w_rx_data[1] +.sym 15616 w_rx_data[7] +.sym 15618 w_rx_data[5] +.sym 15619 i_smi_a1_SB_LUT4_I1_O[3] +.sym 15620 w_rx_data[6] +.sym 15622 spi_if_ins.state_if[0] +.sym 15624 w_rx_data[2] +.sym 15635 spi_if_ins.state_if_SB_DFFE_Q_D[0] +.sym 15637 spi_if_ins.o_fetch_cmd_SB_DFFESR_Q_E +.sym 15638 spi_if_ins.o_ioc_SB_DFFE_Q_E[0] +.sym 15646 spi_if_ins.state_if_SB_DFFESR_Q_1_R +.sym 15659 spi_if_ins.state_if[2] +.sym 15660 spi_if_ins.o_fetch_cmd_SB_DFFESR_Q_E +.sym 15669 spi_if_ins.o_ioc_SB_DFFE_Q_E[0] +.sym 15685 spi_if_ins.o_fetch_cmd_SB_DFFESR_Q_E +.sym 15696 spi_if_ins.state_if[2] +.sym 15697 spi_if_ins.state_if_SB_DFFE_Q_D[0] +.sym 15698 spi_if_ins.o_ioc_SB_DFFE_Q_E[0] +.sym 15704 spi_if_ins.state_if_SB_DFFE_Q_D[0] +.sym 15705 spi_if_ins.state_if[2] +.sym 15712 spi_if_ins.o_fetch_cmd_SB_DFFESR_Q_E .sym 15713 r_counter[0]_$glb_clk -.sym 15715 io_ctrl_ins.ldo2v8_state_SB_LUT4_I3_O[0] -.sym 15716 io_ctrl_ins.pmod_dir_state[1] -.sym 15717 io_ctrl_ins.pmod_dir_state_SB_DFFE_Q_E -.sym 15718 io_ctrl_ins.pmod_dir_state[6] -.sym 15719 io_ctrl_ins.led0_state_SB_LUT4_I3_O[0] -.sym 15720 io_ctrl_ins.pmod_dir_state[3] -.sym 15721 io_ctrl_ins.pmod_dir_state[4] -.sym 15722 io_ctrl_ins.pmod_dir_state[7] -.sym 15731 spi_if_ins.w_rx_data[1] -.sym 15735 spi_if_ins.r_tx_data_valid_SB_DFFESR_Q_D_SB_LUT4_I3_O -.sym 15737 spi_if_ins.w_rx_data[3] -.sym 15745 w_ioc[0] -.sym 15747 io_ctrl_ins.tr_vc_2_state_SB_LUT4_I1_I3[1] -.sym 15749 $PACKER_VCC_NET -.sym 15750 sys_ctrl_ins.o_soft_reset_SB_DFFESS_Q_S -.sym 15757 w_ioc[1] -.sym 15761 spi_if_ins.w_rx_data[2] -.sym 15762 spi_if_ins.w_rx_data[0] -.sym 15764 i_smi_a1_SB_LUT4_I1_O_SB_LUT4_O_I2_SB_LUT4_I0_O[2] -.sym 15768 io_ctrl_ins.i_cs_SB_LUT4_I3_O[0] -.sym 15769 spi_if_ins.o_fetch_cmd_SB_LUT4_I3_1_O[0] -.sym 15770 w_ioc[4] -.sym 15771 w_ioc[3] -.sym 15774 w_ioc[2] -.sym 15779 spi_if_ins.w_rx_data[1] -.sym 15780 io_ctrl_ins.tr_vc_2_state_SB_LUT4_I1_I3[1] -.sym 15783 spi_if_ins.o_load_cmd_SB_DFFESR_Q_D_SB_LUT4_I1_O[1] -.sym 15785 w_cs[1] -.sym 15787 w_fetch -.sym 15789 w_ioc[2] -.sym 15790 w_ioc[1] -.sym 15791 w_ioc[3] -.sym 15792 w_ioc[4] -.sym 15797 spi_if_ins.w_rx_data[1] -.sym 15804 spi_if_ins.w_rx_data[2] -.sym 15807 io_ctrl_ins.i_cs_SB_LUT4_I3_O[0] -.sym 15810 w_fetch -.sym 15813 spi_if_ins.o_fetch_cmd_SB_LUT4_I3_1_O[0] -.sym 15814 i_smi_a1_SB_LUT4_I1_O_SB_LUT4_O_I2_SB_LUT4_I0_O[2] -.sym 15815 w_cs[1] -.sym 15816 io_ctrl_ins.tr_vc_2_state_SB_LUT4_I1_I3[1] -.sym 15819 w_ioc[4] -.sym 15820 w_ioc[3] -.sym 15822 w_ioc[2] -.sym 15834 spi_if_ins.w_rx_data[0] -.sym 15835 spi_if_ins.o_load_cmd_SB_DFFESR_Q_D_SB_LUT4_I1_O[1] +.sym 15714 spi_if_ins.state_if_SB_DFFESR_Q_1_R +.sym 15715 spi_if_ins.w_rx_data[1] +.sym 15718 spi_if_ins.w_rx_data[0] +.sym 15719 spi_if_ins.w_rx_data[5] +.sym 15721 spi_if_ins.o_fetch_cmd_SB_LUT4_I3_O[2] +.sym 15727 spi_if_ins.state_if_SB_DFFESR_Q_1_R +.sym 15729 spi_if_ins.o_ioc_SB_DFFE_Q_E[2] +.sym 15730 spi_if_ins.o_ioc_SB_DFFE_Q_E[0] +.sym 15733 w_load +.sym 15735 w_tx_data_io[6] +.sym 15736 spi_if_ins.o_ioc_SB_DFFE_Q_E[0] +.sym 15740 $PACKER_VCC_NET +.sym 15742 w_rx_data[0] +.sym 15744 $PACKER_VCC_NET +.sym 15745 i_smi_a1_SB_LUT4_I1_O[3] +.sym 15746 spi_if_ins.o_ioc_SB_DFFE_Q_E[2] +.sym 15748 io_ctrl_ins.pmod_dir_state[6] +.sym 15767 spi_if_ins.r_tx_data_valid_SB_DFFESR_Q_D_SB_LUT4_I3_O +.sym 15769 w_cs[2] +.sym 15770 w_fetch +.sym 15771 w_cs[0] +.sym 15773 r_tx_data[5] +.sym 15774 r_tx_data[7] +.sym 15778 w_ioc[1] +.sym 15779 i_smi_a1_SB_LUT4_I1_O[3] +.sym 15782 spi_if_ins.o_fetch_cmd_SB_LUT4_I3_1_O[1] +.sym 15785 io_ctrl_ins.o_data_out_SB_DFFESR_Q_6_R[1] +.sym 15801 w_ioc[1] +.sym 15802 i_smi_a1_SB_LUT4_I1_O[3] +.sym 15803 w_cs[2] +.sym 15804 w_fetch +.sym 15808 io_ctrl_ins.o_data_out_SB_DFFESR_Q_6_R[1] +.sym 15809 w_fetch +.sym 15810 w_cs[0] +.sym 15816 r_tx_data[5] +.sym 15820 io_ctrl_ins.o_data_out_SB_DFFESR_Q_6_R[1] +.sym 15821 spi_if_ins.o_fetch_cmd_SB_LUT4_I3_1_O[1] +.sym 15827 r_tx_data[7] +.sym 15835 spi_if_ins.r_tx_data_valid_SB_DFFESR_Q_D_SB_LUT4_I3_O .sym 15836 r_counter[0]_$glb_clk -.sym 15838 io_ctrl_ins.o_pmod[6] -.sym 15839 io_ctrl_ins.led1_state_SB_LUT4_I0_I2[1] -.sym 15840 io_ctrl_ins.pmod_state_SB_DFFE_Q_E_SB_LUT4_O_I3[1] -.sym 15841 io_ctrl_ins.o_pmod[4] -.sym 15842 io_ctrl_ins.rx_h_b_state_SB_LUT4_I0_O[0] -.sym 15843 io_ctrl_ins.o_data_out_SB_DFFESR_Q_6_R[0] -.sym 15844 io_ctrl_ins.pmod_state_SB_DFFE_Q_E_SB_LUT4_O_I3[0] -.sym 15845 io_ctrl_ins.o_data_out_SB_DFFESR_Q_6_R[1] -.sym 15851 io_ctrl_ins.pmod_dir_state[4] -.sym 15854 w_rx_data[2] -.sym 15862 sys_ctrl_ins.reset_cmd -.sym 15864 io_ctrl_ins.pmod_state_SB_DFFE_Q_E -.sym 15865 io_ctrl_ins.o_data_out_SB_DFFESR_Q_6_R[0] -.sym 15866 io_ctrl_ins.ldo2v8_state_SB_LUT4_I3_O[1] -.sym 15868 io_ctrl_ins.pmod_dir_state[3] -.sym 15873 w_ioc[0] -.sym 15880 w_ioc[1] -.sym 15882 io_ctrl_ins.o_data_out_SB_DFFESR_Q_E[3] -.sym 15884 spi_if_ins.o_fetch_cmd_SB_LUT4_I3_1_O[0] -.sym 15888 w_ioc[1] -.sym 15889 w_ioc[2] -.sym 15891 w_load -.sym 15892 w_fetch -.sym 15894 w_ioc[0] -.sym 15896 w_cs[0] -.sym 15901 io_ctrl_ins.pmod_state_SB_DFFE_Q_E_SB_LUT4_O_I3[0] -.sym 15905 w_cs[1] -.sym 15906 sys_ctrl_ins.reset_cmd_SB_DFFESR_Q_E -.sym 15908 sys_ctrl_ins.reset_cmd_SB_DFFESR_Q_R -.sym 15909 $PACKER_VCC_NET -.sym 15918 w_ioc[2] -.sym 15919 w_ioc[0] -.sym 15920 io_ctrl_ins.o_data_out_SB_DFFESR_Q_E[3] -.sym 15921 w_ioc[1] -.sym 15930 w_load -.sym 15931 w_fetch -.sym 15932 w_cs[0] -.sym 15933 io_ctrl_ins.pmod_state_SB_DFFE_Q_E_SB_LUT4_O_I3[0] -.sym 15939 $PACKER_VCC_NET -.sym 15942 w_cs[0] -.sym 15949 w_ioc[1] -.sym 15950 w_ioc[0] -.sym 15951 spi_if_ins.o_fetch_cmd_SB_LUT4_I3_1_O[0] -.sym 15954 w_cs[1] -.sym 15956 w_load -.sym 15957 w_fetch -.sym 15958 sys_ctrl_ins.reset_cmd_SB_DFFESR_Q_E +.sym 15838 spi_if_ins.o_fetch_cmd_SB_LUT4_I3_O[0] +.sym 15839 w_ioc[3] +.sym 15840 w_ioc[0] +.sym 15841 w_ioc[2] +.sym 15842 io_ctrl_ins.o_data_out_SB_DFFESR_Q_E[3] +.sym 15843 io_ctrl_ins.o_data_out_SB_DFFESR_Q_6_R[1] +.sym 15844 w_ioc[1] +.sym 15845 w_ioc[4] +.sym 15861 w_tx_data_io[4] +.sym 15865 i_smi_a1_SB_LUT4_I1_O_SB_LUT4_I3_O[3] +.sym 15881 io_ctrl_ins.pmod_dir_state_SB_DFFE_Q_E +.sym 15884 w_rx_data[4] +.sym 15885 w_rx_data[1] +.sym 15888 w_rx_data[7] +.sym 15890 w_rx_data[5] +.sym 15892 w_rx_data[6] +.sym 15896 w_rx_data[2] +.sym 15902 w_rx_data[0] +.sym 15913 w_rx_data[0] +.sym 15919 w_rx_data[5] +.sym 15926 w_rx_data[6] +.sym 15932 w_rx_data[4] +.sym 15936 w_rx_data[7] +.sym 15949 w_rx_data[2] +.sym 15955 w_rx_data[1] +.sym 15958 io_ctrl_ins.pmod_dir_state_SB_DFFE_Q_E .sym 15959 r_counter[0]_$glb_clk -.sym 15960 sys_ctrl_ins.reset_cmd_SB_DFFESR_Q_R -.sym 15961 io_ctrl_ins.rf_mode[2] -.sym 15962 io_ctrl_ins.rf_mode[0] -.sym 15963 io_ctrl_ins.rf_pin_state_SB_DFFE_Q_E -.sym 15964 io_ctrl_ins.led1_state_SB_LUT4_I0_I2[3] -.sym 15965 io_ctrl_ins.debug_mode[0] -.sym 15966 io_ctrl_ins.debug_mode_SB_LUT4_I0_O -.sym 15967 io_ctrl_ins.debug_mode_SB_LUT4_I2_O[3] -.sym 15968 io_ctrl_ins.pmod_state_SB_DFFE_Q_E -.sym 15973 io_ctrl_ins.rf_pin_state[0] -.sym 15977 io_ctrl_ins.rf_pin_state[4] -.sym 15982 i_smi_a1_SB_LUT4_I1_O_SB_LUT4_O_I2_SB_LUT4_I0_O[2] -.sym 15983 io_ctrl_ins.o_data_out_SB_DFFESR_Q_R -.sym 15985 io_ctrl_ins.tr_vc_2_state_SB_LUT4_I1_I3[1] -.sym 15987 w_rx_data[1] -.sym 15994 io_ctrl_ins.ldo2v8_state_SB_LUT4_I3_O[1] -.sym 15996 spi_if_ins.o_load_cmd_SB_LUT4_I2_O[0] -.sym 16007 io_ctrl_ins.o_data_out_SB_DFFESR_Q_6_R[0] -.sym 16011 w_rx_data[3] -.sym 16013 w_rx_data[1] -.sym 16017 spi_if_ins.o_load_cmd_SB_LUT4_I2_O[0] -.sym 16020 io_ctrl_ins.rf_mode_SB_DFFESR_Q_E -.sym 16033 i_smi_a1_SB_LUT4_I1_O_SB_LUT4_O_I2_SB_LUT4_I0_O[2] -.sym 16047 spi_if_ins.o_load_cmd_SB_LUT4_I2_O[0] -.sym 16048 io_ctrl_ins.o_data_out_SB_DFFESR_Q_6_R[0] -.sym 16049 i_smi_a1_SB_LUT4_I1_O_SB_LUT4_O_I2_SB_LUT4_I0_O[2] -.sym 16054 w_rx_data[1] -.sym 16061 w_rx_data[3] -.sym 16081 io_ctrl_ins.rf_mode_SB_DFFESR_Q_E +.sym 15961 i_config_SB_LUT4_I3_I2[0] +.sym 15962 io_ctrl_ins.led0_state_SB_LUT4_I3_O[1] +.sym 15963 io_ctrl_ins.led1_state_SB_LUT4_I3_O[2] +.sym 15964 w_tx_data_io[3] +.sym 15965 io_ctrl_ins.rx_h_b_state_SB_LUT4_I0_I2[1] +.sym 15966 w_tx_data_io[0] +.sym 15967 w_tx_data_io[1] +.sym 15968 io_ctrl_ins.led1_state_SB_DFFESR_Q_E +.sym 15969 io_ctrl_ins.o_data_out_SB_DFFESR_Q_3_E +.sym 15974 w_ioc[1] +.sym 15976 w_ioc[2] +.sym 15980 spi_if_ins.o_fetch_cmd_SB_LUT4_I3_O[0] +.sym 15981 io_ctrl_ins.pmod_dir_state[4] +.sym 15983 io_ctrl_ins.pmod_dir_state[7] +.sym 15988 w_rx_data[1] +.sym 15993 io_ctrl_ins.rf_mode[2] +.sym 15994 i_config_SB_LUT4_I3_I2[0] +.sym 15995 o_led1$SB_IO_OUT +.sym 15996 w_rx_data[0] +.sym 16010 spi_if_ins.o_load_cmd_SB_LUT4_I2_O[1] +.sym 16016 io_ctrl_ins.pmod_dir_state[2] +.sym 16017 i_smi_a1_SB_LUT4_I1_O[3] +.sym 16020 sys_ctrl_ins.o_data_out_SB_DFFE_Q_E +.sym 16022 io_ctrl_ins.rx_h_b_state_SB_LUT4_I0_I2[1] +.sym 16023 o_shdn_tx_lna$SB_IO_OUT +.sym 16027 io_ctrl_ins.led0_state_SB_LUT4_I3_O[1] +.sym 16032 spi_if_ins.o_load_cmd_SB_LUT4_I2_O_SB_LUT4_I3_O[1] +.sym 16047 io_ctrl_ins.led0_state_SB_LUT4_I3_O[1] +.sym 16048 spi_if_ins.o_load_cmd_SB_LUT4_I2_O_SB_LUT4_I3_O[1] +.sym 16053 io_ctrl_ins.pmod_dir_state[2] +.sym 16054 io_ctrl_ins.rx_h_b_state_SB_LUT4_I0_I2[1] +.sym 16055 o_shdn_tx_lna$SB_IO_OUT +.sym 16056 io_ctrl_ins.led0_state_SB_LUT4_I3_O[1] +.sym 16059 io_ctrl_ins.led0_state_SB_LUT4_I3_O[1] +.sym 16071 i_smi_a1_SB_LUT4_I1_O[3] +.sym 16074 spi_if_ins.o_load_cmd_SB_LUT4_I2_O[1] +.sym 16081 sys_ctrl_ins.o_data_out_SB_DFFE_Q_E .sym 16082 r_counter[0]_$glb_clk -.sym 16083 i_smi_a1_SB_LUT4_I1_O_SB_LUT4_O_I2_SB_LUT4_I0_O[2]_$glb_sr -.sym 16084 io_ctrl_ins.led1_state_SB_LUT4_I0_I2[2] -.sym 16086 io_ctrl_ins.o_pmod[2] -.sym 16087 io_ctrl_ins.debug_mode_SB_LUT4_I0_O -.sym 16088 io_ctrl_ins.led1_state_SB_DFFESR_Q_E -.sym 16089 io_ctrl_ins.ldo2v8_state_SB_LUT4_I3_O[2] -.sym 16090 io_ctrl_ins.o_pmod[1] -.sym 16091 io_ctrl_ins.ldo2v8_state_SB_LUT4_I3_O[3] -.sym 16096 i_button_SB_LUT4_I3_O[0] -.sym 16097 io_ctrl_ins.debug_mode_SB_LUT4_I2_O[3] -.sym 16101 io_ctrl_ins.pmod_state_SB_DFFE_Q_E -.sym 16104 io_ctrl_ins.tr_vc_1_state_SB_LUT4_I0_O[0] -.sym 16106 io_ctrl_ins.debug_mode_SB_LUT4_I2_O[1] -.sym 16113 io_ctrl_ins.debug_mode_SB_LUT4_I2_O[1] -.sym 16115 o_shdn_rx_lna$SB_IO_OUT -.sym 16116 io_ctrl_ins.debug_mode_SB_LUT4_I2_O[3] -.sym 16127 io_ctrl_ins.rf_pin_state_SB_DFFE_Q_E -.sym 16130 w_rx_data[1] -.sym 16132 w_rx_data[2] -.sym 16176 w_rx_data[2] -.sym 16197 w_rx_data[1] -.sym 16204 io_ctrl_ins.rf_pin_state_SB_DFFE_Q_E +.sym 16084 io_ctrl_ins.tr_vc_2_state_SB_LUT4_I1_O[3] +.sym 16086 io_ctrl_ins.rf_mode[2] +.sym 16087 io_ctrl_ins.led1_state_SB_LUT4_I3_O[3] +.sym 16088 io_ctrl_ins.pmod_state_SB_DFFE_Q_E +.sym 16089 i_button_SB_LUT4_I3_O[2] +.sym 16090 io_ctrl_ins.led0_state_SB_LUT4_I3_O[3] +.sym 16091 io_ctrl_ins.rf_pin_state_SB_DFFE_Q_E +.sym 16096 spi_if_ins.o_load_cmd_SB_LUT4_I2_O[1] +.sym 16097 w_tx_data_io[5] +.sym 16101 io_ctrl_ins.led1_state_SB_DFFESR_Q_E +.sym 16103 w_tx_data_io[7] +.sym 16105 io_ctrl_ins.led0_state_SB_LUT4_I3_O[1] +.sym 16106 w_rx_data[4] +.sym 16107 io_ctrl_ins.o_data_out_SB_DFFESR_Q_R +.sym 16108 $PACKER_VCC_NET +.sym 16109 o_shdn_tx_lna$SB_IO_OUT +.sym 16111 io_ctrl_ins.o_data_out_SB_DFFESR_Q_3_D_SB_LUT4_O_I2[1] +.sym 16112 w_rx_data[2] +.sym 16113 o_shdn_rx_lna$SB_IO_OUT +.sym 16115 io_ctrl_ins.rf_pin_state_SB_DFFE_Q_E +.sym 16125 i_config_SB_LUT4_I3_I2[0] +.sym 16127 io_ctrl_ins.pmod_dir_state_SB_DFFE_Q_E +.sym 16128 i_smi_a1_SB_LUT4_I1_O[3] +.sym 16138 spi_if_ins.o_load_cmd_SB_LUT4_I2_O[1] +.sym 16140 w_rx_data[3] +.sym 16182 spi_if_ins.o_load_cmd_SB_LUT4_I2_O[1] +.sym 16184 i_config_SB_LUT4_I3_I2[0] +.sym 16185 i_smi_a1_SB_LUT4_I1_O[3] +.sym 16196 w_rx_data[3] +.sym 16204 io_ctrl_ins.pmod_dir_state_SB_DFFE_Q_E .sym 16205 r_counter[0]_$glb_clk -.sym 16207 o_led1$SB_IO_OUT -.sym 16213 o_ldo_2v8_en -.sym 16214 o_led0$SB_IO_OUT -.sym 16224 io_ctrl_ins.o_data_out_SB_DFFESR_Q_E[3] -.sym 16231 sys_ctrl_ins.o_soft_reset_SB_DFFESS_Q_S -.sym 16232 io_ctrl_ins.rf_mode[2] -.sym 16236 i_button$SB_IO_IN -.sym 16248 io_ctrl_ins.rf_mode[2] -.sym 16251 io_ctrl_ins.rf_pin_state[2] -.sym 16259 io_ctrl_ins.debug_mode_SB_LUT4_I0_O -.sym 16260 io_ctrl_ins.led1_state_SB_DFFESR_Q_E -.sym 16261 sys_ctrl_ins.reset_cmd -.sym 16262 io_ctrl_ins.rf_pin_state[1] -.sym 16273 io_ctrl_ins.debug_mode_SB_LUT4_I2_O[1] -.sym 16276 io_ctrl_ins.debug_mode_SB_LUT4_I2_O[3] -.sym 16287 io_ctrl_ins.rf_pin_state[1] -.sym 16288 io_ctrl_ins.debug_mode_SB_LUT4_I2_O[1] -.sym 16289 io_ctrl_ins.debug_mode_SB_LUT4_I2_O[3] -.sym 16294 io_ctrl_ins.led1_state_SB_DFFESR_Q_E -.sym 16305 io_ctrl_ins.rf_mode[2] -.sym 16306 io_ctrl_ins.rf_pin_state[2] -.sym 16307 io_ctrl_ins.debug_mode_SB_LUT4_I2_O[1] -.sym 16308 io_ctrl_ins.debug_mode_SB_LUT4_I2_O[3] -.sym 16324 sys_ctrl_ins.reset_cmd -.sym 16327 io_ctrl_ins.debug_mode_SB_LUT4_I0_O +.sym 16208 io_ctrl_ins.debug_mode_SB_LUT4_I2_O[1] +.sym 16209 io_ctrl_ins.debug_mode[1] +.sym 16210 io_ctrl_ins.pmod_state_SB_DFFE_Q_E +.sym 16211 io_ctrl_ins.rf_mode[0] +.sym 16212 i_config_SB_LUT4_I3_I2[1] +.sym 16213 $PACKER_VCC_NET +.sym 16215 spi_if_ins.o_load_cmd_SB_LUT4_I2_O_SB_LUT4_I2_O +.sym 16219 io_ctrl_ins.rf_pin_state[6] +.sym 16221 o_led0$SB_IO_OUT +.sym 16224 io_ctrl_ins.rf_pin_state_SB_DFFE_Q_E +.sym 16235 io_ctrl_ins.pmod_state_SB_DFFE_Q_E +.sym 16236 $PACKER_VCC_NET +.sym 16250 w_rx_data[3] +.sym 16258 w_rx_data[1] +.sym 16260 spi_if_ins.o_load_cmd_SB_LUT4_I2_O_SB_LUT4_I2_O +.sym 16266 w_rx_data[0] +.sym 16272 w_rx_data[2] +.sym 16275 io_ctrl_ins.rf_pin_state_SB_DFFE_Q_E +.sym 16290 w_rx_data[3] +.sym 16299 spi_if_ins.o_load_cmd_SB_LUT4_I2_O_SB_LUT4_I2_O +.sym 16313 w_rx_data[1] +.sym 16319 w_rx_data[0] +.sym 16323 w_rx_data[2] +.sym 16327 io_ctrl_ins.rf_pin_state_SB_DFFE_Q_E .sym 16328 r_counter[0]_$glb_clk -.sym 16337 $PACKER_GND_NET -.sym 16347 o_led0$SB_IO_OUT +.sym 16330 o_shdn_tx_lna$SB_IO_OUT +.sym 16332 o_shdn_rx_lna$SB_IO_OUT +.sym 16343 $PACKER_VCC_NET .sym 16358 i_config[3]$SB_IO_IN -.sym 16382 sys_ctrl_ins.o_soft_reset_SB_DFFESS_Q_E -.sym 16391 sys_ctrl_ins.o_soft_reset_SB_DFFESS_Q_S -.sym 16394 $PACKER_GND_NET -.sym 16412 $PACKER_GND_NET -.sym 16450 sys_ctrl_ins.o_soft_reset_SB_DFFESS_Q_E -.sym 16451 r_counter[0]_$glb_clk -.sym 16452 sys_ctrl_ins.o_soft_reset_SB_DFFESS_Q_S +.sym 16362 i_button$SB_IO_IN .sym 16453 i_config[3]$SB_IO_IN .sym 16455 i_button$SB_IO_IN -.sym 16466 $PACKER_GND_NET +.sym 16473 o_shdn_rx_lna$SB_IO_OUT .sym 16497 w_lvds_rx_24_d1_SB_LUT4_I0_O_SB_LUT4_I3_O -.sym 16512 w_lvds_rx_24_d1_SB_LUT4_I0_O_SB_LUT4_I3_O +.sym 16521 w_lvds_rx_24_d1_SB_LUT4_I0_O_SB_LUT4_I3_O .sym 16523 i_smi_a3$SB_IO_IN -.sym 16554 io_smi_data[4]$SB_IO_OUT -.sym 16557 i_smi_a3$SB_IO_IN -.sym 16558 rx_09_fifo.rd_addr_gray_wr[5] -.sym 16559 io_smi_data[5]$SB_IO_OUT -.sym 16560 rx_09_fifo.rd_addr_gray_wr[0] -.sym 16572 spi_if_ins.spi.r_tx_byte_SB_DFFESR_Q_E -.sym 16595 io_pmod_SB_DFFSS_Q_D_SB_LUT4_O_I0_SB_LUT4_O_1_I1_SB_LUT4_O_I0[1] -.sym 16596 io_pmod_SB_DFFSS_Q_D_SB_LUT4_O_I0_SB_LUT4_O_2_I0[0] -.sym 16597 io_pmod_SB_DFFSS_Q_D_SB_LUT4_O_I0_SB_LUT4_O_2_I0[3] -.sym 16600 io_pmod_SB_DFFSS_Q_D_SB_LUT4_O_I0_SB_LUT4_O_2_I0[2] -.sym 16602 rx_09_fifo.rd_addr[3] -.sym 16606 rx_09_fifo.rd_addr_gray_wr[2] -.sym 16608 rx_09_fifo.wr_addr_gray_rd_r[2] -.sym 16609 rx_09_fifo.rd_addr_gray[1] -.sym 16614 rx_09_fifo.rd_addr_gray_wr[1] -.sym 16617 io_pmod_SB_DFFSS_Q_D_SB_LUT4_O_I0_SB_LUT4_O_3_I2[3] -.sym 16635 io_pmod_SB_DFFSS_Q_D_SB_LUT4_O_I0_SB_LUT4_O_3_I2[3] -.sym 16636 rx_09_fifo.rd_addr[3] -.sym 16637 rx_09_fifo.wr_addr_gray_rd_r[2] -.sym 16640 io_pmod_SB_DFFSS_Q_D_SB_LUT4_O_I0_SB_LUT4_O_2_I0[3] -.sym 16641 io_pmod_SB_DFFSS_Q_D_SB_LUT4_O_I0_SB_LUT4_O_2_I0[0] -.sym 16642 io_pmod_SB_DFFSS_Q_D_SB_LUT4_O_I0_SB_LUT4_O_1_I1_SB_LUT4_O_I0[1] -.sym 16643 io_pmod_SB_DFFSS_Q_D_SB_LUT4_O_I0_SB_LUT4_O_2_I0[2] -.sym 16648 rx_09_fifo.rd_addr_gray[1] -.sym 16660 rx_09_fifo.rd_addr_gray_wr[1] -.sym 16666 rx_09_fifo.rd_addr_gray_wr[2] -.sym 16675 lvds_clock_buf -.sym 16681 $io_pmod[2]$iobuf_i -.sym 16682 io_pmod_SB_DFFSS_Q_D_SB_LUT4_O_I0[3] -.sym 16683 io_pmod_SB_DFFSS_Q_D_SB_LUT4_O_I0_SB_LUT4_O_1_I1[0] -.sym 16684 io_pmod_SB_DFFSS_Q_D_SB_LUT4_O_I0_SB_LUT4_O_1_I1_SB_LUT4_O_I2[3] -.sym 16685 io_pmod_SB_DFFSS_Q_D_SB_LUT4_O_I0[1] -.sym 16686 io_pmod_SB_DFFSS_Q_D_SB_LUT4_O_I0_SB_LUT4_O_3_I2[2] -.sym 16688 io_pmod_SB_DFFSS_Q_D_SB_LUT4_O_I0_SB_LUT4_O_1_I1[1] -.sym 16697 $PACKER_VCC_NET -.sym 16698 rx_09_fifo.rd_addr_gray_wr[0] -.sym 16710 rx_09_fifo.full_o_SB_LUT4_I3_O[0] -.sym 16724 io_pmod_SB_DFFSS_Q_D_SB_LUT4_O_I0_SB_LUT4_O_2_I0[3] -.sym 16731 rx_09_fifo.rd_addr_gray[5] -.sym 16737 io_pmod_SB_DFFSS_Q_D_SB_LUT4_O_I0_SB_LUT4_O_3_I2[3] -.sym 16759 rx_09_fifo.rd_addr_gray_SB_LUT4_I2_O[1] -.sym 16760 rx_09_fifo.wr_addr_gray_rd_r[5] -.sym 16762 rx_09_fifo.wr_addr_gray_rd_r[0] -.sym 16767 io_pmod_SB_DFFSS_Q_D_SB_LUT4_O_I0_SB_LUT4_O_I2[2] -.sym 16768 rx_09_fifo.rd_addr_gray_SB_LUT4_I2_O[2] -.sym 16769 rx_09_fifo.rd_addr_gray_SB_LUT4_I2_O[3] -.sym 16770 io_pmod_SB_DFFSS_Q_D_SB_LUT4_O_I0_SB_LUT4_O_1_I1_SB_LUT4_O_I2[1] -.sym 16772 rx_09_fifo.rd_addr_gray_SB_LUT4_I2_O[6] -.sym 16776 smi_ctrl_ins.r_fifo_09_pull_SB_LUT4_I3_1_O -.sym 16777 rx_09_fifo.rd_addr[0] -.sym 16780 io_pmod_SB_DFFSS_Q_D_SB_LUT4_O_I0_SB_LUT4_O_I2[3] -.sym 16783 io_pmod_SB_DFFSS_Q_D_SB_LUT4_O_I0_SB_LUT4_O_2_I0[3] -.sym 16784 io_pmod_SB_DFFSS_Q_D_SB_LUT4_O_I0_SB_LUT4_O_I0[2] -.sym 16787 rx_09_fifo.wr_addr_gray_rd_r[2] -.sym 16788 io_pmod_SB_DFFSS_Q_D_SB_LUT4_O_I0_SB_LUT4_O_I2[1] -.sym 16791 io_pmod_SB_DFFSS_Q_D_SB_LUT4_O_I0_SB_LUT4_O_I2[3] -.sym 16792 io_pmod_SB_DFFSS_Q_D_SB_LUT4_O_I0_SB_LUT4_O_I0[2] -.sym 16793 io_pmod_SB_DFFSS_Q_D_SB_LUT4_O_I0_SB_LUT4_O_I2[2] -.sym 16794 io_pmod_SB_DFFSS_Q_D_SB_LUT4_O_I0_SB_LUT4_O_I2[1] -.sym 16797 rx_09_fifo.rd_addr_gray_SB_LUT4_I2_O[6] -.sym 16800 rx_09_fifo.wr_addr_gray_rd_r[5] -.sym 16803 rx_09_fifo.wr_addr_gray_rd_r[5] -.sym 16805 io_pmod_SB_DFFSS_Q_D_SB_LUT4_O_I0_SB_LUT4_O_2_I0[3] -.sym 16809 rx_09_fifo.rd_addr_gray_SB_LUT4_I2_O[1] -.sym 16811 rx_09_fifo.rd_addr[0] -.sym 16812 rx_09_fifo.wr_addr_gray_rd_r[0] -.sym 16815 rx_09_fifo.rd_addr_gray_SB_LUT4_I2_O[3] -.sym 16816 rx_09_fifo.rd_addr_gray_SB_LUT4_I2_O[2] -.sym 16817 rx_09_fifo.wr_addr_gray_rd_r[2] -.sym 16821 io_pmod_SB_DFFSS_Q_D_SB_LUT4_O_I0_SB_LUT4_O_1_I1_SB_LUT4_O_I2[1] -.sym 16828 rx_09_fifo.rd_addr_gray_SB_LUT4_I2_O[1] -.sym 16830 rx_09_fifo.rd_addr_gray_SB_LUT4_I2_O[2] -.sym 16836 rx_09_fifo.rd_addr_gray_SB_LUT4_I2_O[3] -.sym 16837 smi_ctrl_ins.r_fifo_09_pull_SB_LUT4_I3_1_O +.sym 16598 i_smi_a3$SB_IO_IN +.sym 16600 w_smi_data_output[4] +.sym 16658 i_smi_a3$SB_IO_IN +.sym 16660 w_smi_data_output[4] +.sym 16683 sys_ctrl_ins.reset_count[2] +.sym 16684 sys_ctrl_ins.reset_count[3] +.sym 16685 sys_ctrl_ins.reset_count_SB_DFFESR_Q_E +.sym 16686 sys_ctrl_ins.reset_count[1] +.sym 16687 sys_ctrl_ins.reset_count[0] +.sym 16688 sys_ctrl_ins.o_soft_reset_SB_DFFESS_Q_S +.sym 16691 i_smi_a1_SB_LUT4_I1_O[3] +.sym 16719 sys_ctrl_ins.reset_count_SB_DFFESR_Q_E +.sym 16723 i_smi_soe_se$rename$0 +.sym 16733 i_smi_soe_se$rename$0 +.sym 16735 rx_09_fifo.rd_addr_gray_wr[0] +.sym 16736 i_mosi$SB_IO_IN +.sym 16760 smi_ctrl_ins.r_fifo_09_pull_SB_DFFESR_Q_E[2] +.sym 16764 i_smi_a2_SB_LUT4_I1_O_SB_LUT4_I3_I2[0] +.sym 16765 i_smi_a2_SB_LUT4_I1_O_SB_LUT4_O_I2_SB_CARRY_CO_I1[4] +.sym 16767 i_smi_a2_SB_LUT4_I1_O_SB_LUT4_I3_I2_SB_LUT4_O_I3[1] +.sym 16771 i_smi_a2_SB_LUT4_I1_O_SB_LUT4_O_I2_SB_CARRY_CO_I1[5] +.sym 16774 i_smi_a1_SB_LUT4_I1_O_SB_LUT4_O_I0[3] +.sym 16783 $PACKER_VCC_NET +.sym 16789 i_smi_soe_se$rename$0 +.sym 16790 $nextpnr_ICESTORM_LC_10$O +.sym 16793 i_smi_a2_SB_LUT4_I1_O_SB_LUT4_I3_I2[0] +.sym 16796 i_smi_a2_SB_LUT4_I1_O_SB_LUT4_O_I2[4] +.sym 16799 i_smi_a2_SB_LUT4_I1_O_SB_LUT4_O_I2_SB_CARRY_CO_I1[4] +.sym 16802 $nextpnr_ICESTORM_LC_11$I3 +.sym 16805 i_smi_a2_SB_LUT4_I1_O_SB_LUT4_O_I2_SB_CARRY_CO_I1[5] +.sym 16808 $nextpnr_ICESTORM_LC_11$COUT +.sym 16810 $PACKER_VCC_NET +.sym 16812 $nextpnr_ICESTORM_LC_11$I3 +.sym 16815 i_smi_a1_SB_LUT4_I1_O_SB_LUT4_O_I0[3] +.sym 16817 i_smi_soe_se$rename$0 +.sym 16818 $nextpnr_ICESTORM_LC_11$COUT +.sym 16829 i_smi_a2_SB_LUT4_I1_O_SB_LUT4_I3_I2_SB_LUT4_O_I3[1] +.sym 16837 smi_ctrl_ins.r_fifo_09_pull_SB_DFFESR_Q_E[2] .sym 16838 r_counter[0]_$glb_clk -.sym 16839 i_smi_a1_SB_LUT4_I1_O_SB_LUT4_O_I2_SB_LUT4_I0_O[2]_$glb_sr -.sym 16840 rx_09_fifo.rd_addr_gray[0] -.sym 16841 io_pmod_SB_DFFSS_Q_D_SB_LUT4_O_I0_SB_LUT4_O_2_I0[3] -.sym 16842 io_pmod_SB_DFFSS_Q_D_SB_LUT4_O_I0_SB_LUT4_O_1_I1_SB_LUT4_O_I0[0] -.sym 16843 rx_09_fifo.rd_addr[0] -.sym 16844 rx_09_fifo.rd_addr_gray[5] -.sym 16845 io_pmod_SB_DFFSS_Q_D_SB_LUT4_O_I0_SB_LUT4_O_3_I2[1] -.sym 16846 io_pmod_SB_DFFSS_Q_D_SB_LUT4_O_I0_SB_LUT4_O_I2[1] -.sym 16847 io_pmod_SB_DFFSS_Q_D_SB_LUT4_O_I0_SB_LUT4_O_3_I2[3] -.sym 16853 io_pmod[5]$SB_IO_IN -.sym 16854 io_pmod_SB_DFFSS_Q_D_SB_LUT4_O_I0_SB_LUT4_O_1_I1_SB_LUT4_O_I0[1] -.sym 16864 spi_if_ins.spi.r_tx_bit_count_SB_DFFESR_Q_R -.sym 16894 io_pmod_SB_DFFSS_Q_D_SB_LUT4_O_I0_SB_LUT4_O_2_I0[2] -.sym 16896 rx_09_fifo.rd_addr[3] -.sym 16898 io_pmod_SB_DFFSS_Q_D_SB_LUT4_O_I0_SB_LUT4_O_2_I0[3] -.sym 16902 io_pmod_SB_DFFSS_Q_D_SB_LUT4_O_I0_SB_LUT4_O_3_I2[1] -.sym 16903 io_pmod_SB_DFFSS_Q_D_SB_LUT4_O_I0_SB_LUT4_O_I0[1] -.sym 16908 rx_09_fifo.rd_addr[0] -.sym 16911 io_pmod_SB_DFFSS_Q_D_SB_LUT4_O_I0_SB_LUT4_O_I2[1] -.sym 16912 io_pmod_SB_DFFSS_Q_D_SB_LUT4_O_I0_SB_LUT4_O_3_I2[3] -.sym 16913 $nextpnr_ICESTORM_LC_7$O -.sym 16916 rx_09_fifo.rd_addr[0] -.sym 16919 rx_09_fifo.rd_addr_gray_SB_LUT4_I2_I3[2] -.sym 16922 io_pmod_SB_DFFSS_Q_D_SB_LUT4_O_I0_SB_LUT4_O_3_I2[1] -.sym 16923 rx_09_fifo.rd_addr[0] -.sym 16925 rx_09_fifo.rd_addr_gray_SB_LUT4_I2_I3[3] -.sym 16928 io_pmod_SB_DFFSS_Q_D_SB_LUT4_O_I0_SB_LUT4_O_3_I2[3] -.sym 16929 rx_09_fifo.rd_addr_gray_SB_LUT4_I2_I3[2] -.sym 16931 rx_09_fifo.rd_addr_gray_SB_LUT4_I2_I3[4] -.sym 16933 rx_09_fifo.rd_addr[3] -.sym 16935 rx_09_fifo.rd_addr_gray_SB_LUT4_I2_I3[3] -.sym 16937 rx_09_fifo.rd_addr_gray_SB_LUT4_I2_I3[5] -.sym 16940 io_pmod_SB_DFFSS_Q_D_SB_LUT4_O_I0_SB_LUT4_O_2_I0[2] -.sym 16941 rx_09_fifo.rd_addr_gray_SB_LUT4_I2_I3[4] -.sym 16943 rx_09_fifo.rd_addr_gray_SB_LUT4_I2_I3[6] -.sym 16946 io_pmod_SB_DFFSS_Q_D_SB_LUT4_O_I0_SB_LUT4_O_2_I0[3] -.sym 16947 rx_09_fifo.rd_addr_gray_SB_LUT4_I2_I3[5] -.sym 16949 rx_09_fifo.rd_addr_gray_SB_LUT4_I2_I3[7] -.sym 16951 io_pmod_SB_DFFSS_Q_D_SB_LUT4_O_I0_SB_LUT4_O_I2[1] -.sym 16953 rx_09_fifo.rd_addr_gray_SB_LUT4_I2_I3[6] -.sym 16957 io_pmod_SB_DFFSS_Q_D_SB_LUT4_O_I0_SB_LUT4_O_I0[1] -.sym 16959 rx_09_fifo.rd_addr_gray_SB_LUT4_I2_I3[7] -.sym 16963 rx_09_fifo.wr_addr_gray_rd_r[3] -.sym 16964 spi_if_ins.spi.SCKr_SB_LUT4_I0_O[1] -.sym 16965 spi_if_ins.spi.SCKr[1] -.sym 16966 spi_if_ins.spi.SCKr[0] -.sym 16967 spi_if_ins.spi.o_spi_miso_SB_DFFE_Q_E -.sym 16969 spi_if_ins.spi.r_tx_bit_count_SB_DFFESR_Q_R -.sym 16970 spi_if_ins.spi.SCKr[2] -.sym 16971 $PACKER_VCC_NET -.sym 16976 io_pmod_SB_DFFSS_Q_D_SB_LUT4_O_I0_SB_LUT4_O_I2[1] -.sym 16977 io_pmod_SB_DFFSS_Q_D_SB_LUT4_O_I0_SB_LUT4_O_1_I1_SB_LUT4_O_I0[3] -.sym 16980 $PACKER_VCC_NET -.sym 16981 rx_09_fifo.rd_addr_gray_SB_LUT4_I2_O[2] -.sym 16983 rx_09_fifo.rd_addr_gray_SB_LUT4_I2_O[3] -.sym 16985 io_pmod_SB_DFFSS_Q_D_SB_LUT4_O_I0_SB_LUT4_O_1_I1_SB_LUT4_O_I2[1] -.sym 16989 rx_09_fifo.full_o_SB_LUT4_I3_O[0] -.sym 16993 spi_if_ins.r_tx_byte[0] -.sym 17006 spi_if_ins.spi.r_tx_byte[7] -.sym 17007 spi_if_ins.r_tx_data_valid_SB_LUT4_I3_O[2] -.sym 17008 spi_if_ins.r_tx_data_valid_SB_LUT4_I3_O_SB_LUT4_O_I0_SB_LUT4_O_I3[2] -.sym 17009 spi_if_ins.r_tx_data_valid_SB_LUT4_I3_O_SB_LUT4_O_I0[3] -.sym 17010 spi_if_ins.r_tx_data_valid_SB_LUT4_I3_O_SB_LUT4_O_I0[2] -.sym 17011 spi_if_ins.r_tx_data_valid_SB_LUT4_I3_O_SB_LUT4_O_I0[1] -.sym 17014 $PACKER_VCC_NET -.sym 17017 $PACKER_VCC_NET -.sym 17022 spi_if_ins.spi.o_spi_miso_SB_DFFE_Q_E -.sym 17024 spi_if_ins.spi.r_tx_bit_count_SB_DFFESR_Q_R -.sym 17025 spi_if_ins.spi.r_tx_byte[3] -.sym 17029 spi_if_ins.spi.SCKr_SB_LUT4_I0_O[1] -.sym 17030 spi_if_ins.spi.r_tx_bit_count[2] -.sym 17033 spi_if_ins.r_tx_data_valid_SB_LUT4_I3_O_SB_LUT4_O_I0[3] -.sym 17035 spi_if_ins.r_tx_data_valid_SB_LUT4_I3_O_SB_LUT4_O_I0[0] -.sym 17036 $nextpnr_ICESTORM_LC_15$O -.sym 17039 spi_if_ins.r_tx_data_valid_SB_LUT4_I3_O_SB_LUT4_O_I0_SB_LUT4_O_I3[2] -.sym 17042 spi_if_ins.spi.r_tx_bit_count_SB_DFFESR_Q_D_SB_LUT4_O_I3[2] -.sym 17044 spi_if_ins.r_tx_data_valid_SB_LUT4_I3_O_SB_LUT4_O_I0[3] +.sym 16839 i_smi_a1_SB_LUT4_I1_O[3]_$glb_sr +.sym 16842 smi_ctrl_ins.r_fifo_09_pull_SB_DFFESR_Q_E_SB_LUT4_O_I1[5] +.sym 16846 rx_09_fifo.rd_addr_gray_wr[0] +.sym 16856 sys_ctrl_ins.reset_cmd +.sym 16863 sys_ctrl_ins.reset_cmd +.sym 16868 spi_if_ins.spi.r_tx_bit_count_SB_DFFESR_Q_R +.sym 16873 i_smi_a2_SB_LUT4_I1_O_SB_LUT4_I3_I2[2] +.sym 16881 smi_ctrl_ins.r_fifo_09_pull_SB_DFFESR_Q_E[1] +.sym 16884 i_smi_a2_SB_LUT4_I1_O_SB_LUT4_O_I0[2] +.sym 16885 i_smi_soe_se$rename$0 +.sym 16887 i_smi_a2_SB_LUT4_I1_O_SB_LUT4_O_I0[0] +.sym 16888 smi_ctrl_ins.int_cnt_09[4] +.sym 16889 i_smi_a1_SB_LUT4_I1_O[3] +.sym 16890 i_smi_soe_se$rename$0 +.sym 16892 smi_ctrl_ins.int_cnt_09[5] +.sym 16895 i_smi_a1_SB_LUT4_I1_O[0] +.sym 16896 i_smi_a1_SB_LUT4_I1_O[3] +.sym 16899 smi_ctrl_ins.r_fifo_09_pull_SB_DFFESR_Q_E_SB_LUT4_O_I1[5] +.sym 16901 i_smi_a2_SB_LUT4_I1_O[1] +.sym 16902 i_smi_a1_SB_LUT4_I1_O_SB_LUT4_O_I0[3] +.sym 16906 i_smi_a2_SB_LUT4_I1_O_SB_LUT4_I3_I2_SB_LUT4_O_I3[1] +.sym 16907 smi_ctrl_ins.r_fifo_09_pull_SB_DFFESR_Q_E[2] +.sym 16908 smi_ctrl_ins.int_cnt_09_SB_DFFESR_Q_E +.sym 16909 i_smi_a1_SB_LUT4_I1_O_SB_LUT4_I3_O[3] +.sym 16911 io_pmod[2]$SB_IO_IN +.sym 16914 smi_ctrl_ins.r_fifo_09_pull_SB_DFFESR_Q_E_SB_LUT4_O_I1[5] +.sym 16915 i_smi_a2_SB_LUT4_I1_O_SB_LUT4_O_I0[2] +.sym 16916 i_smi_soe_se$rename$0 +.sym 16917 i_smi_a1_SB_LUT4_I1_O_SB_LUT4_O_I0[3] +.sym 16921 i_smi_soe_se$rename$0 +.sym 16922 i_smi_a1_SB_LUT4_I1_O_SB_LUT4_O_I0[3] +.sym 16923 i_smi_a2_SB_LUT4_I1_O_SB_LUT4_I3_I2_SB_LUT4_O_I3[1] +.sym 16926 i_smi_a1_SB_LUT4_I1_O[3] +.sym 16927 i_smi_a1_SB_LUT4_I1_O_SB_LUT4_I3_O[3] +.sym 16928 i_smi_a2_SB_LUT4_I1_O[1] +.sym 16929 i_smi_a1_SB_LUT4_I1_O[0] +.sym 16932 i_smi_a1_SB_LUT4_I1_O[3] +.sym 16933 smi_ctrl_ins.r_fifo_09_pull_SB_DFFESR_Q_E[1] +.sym 16934 smi_ctrl_ins.r_fifo_09_pull_SB_DFFESR_Q_E[2] +.sym 16938 i_smi_a2_SB_LUT4_I1_O_SB_LUT4_O_I0[0] +.sym 16939 i_smi_a1_SB_LUT4_I1_O_SB_LUT4_O_I0[3] +.sym 16940 i_smi_soe_se$rename$0 +.sym 16941 i_smi_a2_SB_LUT4_I1_O_SB_LUT4_O_I0[2] +.sym 16945 smi_ctrl_ins.int_cnt_09[5] +.sym 16950 i_smi_a2_SB_LUT4_I1_O_SB_LUT4_I3_I2_SB_LUT4_O_I3[1] +.sym 16951 smi_ctrl_ins.int_cnt_09[4] +.sym 16952 smi_ctrl_ins.int_cnt_09[5] +.sym 16953 io_pmod[2]$SB_IO_IN +.sym 16956 smi_ctrl_ins.int_cnt_09[4] +.sym 16960 smi_ctrl_ins.int_cnt_09_SB_DFFESR_Q_E +.sym 16961 r_counter[0]_$glb_clk +.sym 16962 i_smi_a1_SB_LUT4_I1_O[3]_$glb_sr +.sym 16963 spi_if_ins.r_tx_data_valid_SB_LUT4_I3_O[1] +.sym 16968 spi_if_ins.r_tx_data_valid_SB_LUT4_I3_O[0] +.sym 16970 spi_if_ins.spi.SCKr[0] +.sym 16974 w_rx_data[2] +.sym 16976 $io_pmod[2]$iobuf_i +.sym 16979 i_smi_a2_SB_LUT4_I1_O_SB_LUT4_I3_I2_SB_LUT4_O_I3[1] +.sym 16985 i_smi_a1_SB_LUT4_I1_O[3] +.sym 16987 int_miso +.sym 17005 i_smi_a2_SB_LUT4_I1_O_SB_LUT4_I3_I2[1] +.sym 17008 i_smi_a3$SB_IO_IN +.sym 17009 $PACKER_VCC_NET +.sym 17012 i_smi_a1_SB_LUT4_I1_O_SB_LUT4_O_I0[3] +.sym 17013 i_smi_a2_SB_LUT4_I1_O_SB_LUT4_I3_I2_SB_LUT4_O_I3[1] +.sym 17015 smi_ctrl_ins.int_cnt_09_SB_DFFESR_Q_E +.sym 17016 i_smi_soe_se$rename$0 +.sym 17022 i_smi_a2_SB_LUT4_I1_O_SB_LUT4_I3_I2[2] +.sym 17029 i_smi_soe_se$rename$0 +.sym 17031 smi_ctrl_ins.int_cnt_09[5] +.sym 17034 w_smi_data_output[5] +.sym 17035 smi_ctrl_ins.int_cnt_09[4] +.sym 17036 $nextpnr_ICESTORM_LC_1$O +.sym 17039 i_smi_a2_SB_LUT4_I1_O_SB_LUT4_I3_I2_SB_LUT4_O_I3[1] +.sym 17042 i_smi_a2_SB_LUT4_I1_O_SB_LUT4_I3_I2_SB_LUT4_O_I3[2] +.sym 17044 smi_ctrl_ins.int_cnt_09[4] .sym 17045 $PACKER_VCC_NET -.sym 17049 $PACKER_VCC_NET -.sym 17050 spi_if_ins.spi.r_tx_bit_count[2] -.sym 17052 spi_if_ins.spi.r_tx_bit_count_SB_DFFESR_Q_D_SB_LUT4_O_I3[2] -.sym 17055 spi_if_ins.r_tx_data_valid_SB_LUT4_I3_O_SB_LUT4_O_I0[3] -.sym 17056 spi_if_ins.r_tx_data_valid_SB_LUT4_I3_O_SB_LUT4_O_I0[0] -.sym 17057 spi_if_ins.r_tx_data_valid_SB_LUT4_I3_O_SB_LUT4_O_I0[1] -.sym 17058 spi_if_ins.r_tx_data_valid_SB_LUT4_I3_O_SB_LUT4_O_I0[2] -.sym 17061 spi_if_ins.r_tx_data_valid_SB_LUT4_I3_O_SB_LUT4_O_I0_SB_LUT4_O_I3[2] -.sym 17067 $PACKER_VCC_NET -.sym 17069 spi_if_ins.r_tx_data_valid_SB_LUT4_I3_O_SB_LUT4_O_I0[3] -.sym 17070 spi_if_ins.r_tx_data_valid_SB_LUT4_I3_O_SB_LUT4_O_I0_SB_LUT4_O_I3[2] -.sym 17073 spi_if_ins.spi.SCKr_SB_LUT4_I0_O[1] -.sym 17075 spi_if_ins.r_tx_data_valid_SB_LUT4_I3_O_SB_LUT4_O_I0[3] -.sym 17076 spi_if_ins.r_tx_data_valid_SB_LUT4_I3_O[2] -.sym 17079 spi_if_ins.spi.r_tx_byte[3] -.sym 17080 spi_if_ins.spi.r_tx_byte[7] -.sym 17081 spi_if_ins.spi.r_tx_bit_count[2] -.sym 17082 spi_if_ins.r_tx_data_valid_SB_LUT4_I3_O_SB_LUT4_O_I0_SB_LUT4_O_I3[2] -.sym 17083 spi_if_ins.spi.o_spi_miso_SB_DFFE_Q_E +.sym 17046 i_smi_a2_SB_LUT4_I1_O_SB_LUT4_I3_I2_SB_LUT4_O_I3[1] +.sym 17049 smi_ctrl_ins.int_cnt_09[5] +.sym 17050 $PACKER_VCC_NET +.sym 17052 i_smi_a2_SB_LUT4_I1_O_SB_LUT4_I3_I2_SB_LUT4_O_I3[2] +.sym 17055 i_smi_a1_SB_LUT4_I1_O_SB_LUT4_O_I0[3] +.sym 17057 i_smi_soe_se$rename$0 +.sym 17058 i_smi_a2_SB_LUT4_I1_O_SB_LUT4_I3_I2[2] +.sym 17061 i_smi_a3$SB_IO_IN +.sym 17062 w_smi_data_output[5] +.sym 17074 i_smi_soe_se$rename$0 +.sym 17076 i_smi_a1_SB_LUT4_I1_O_SB_LUT4_O_I0[3] +.sym 17079 i_smi_a1_SB_LUT4_I1_O_SB_LUT4_O_I0[3] +.sym 17080 i_smi_soe_se$rename$0 +.sym 17081 i_smi_a2_SB_LUT4_I1_O_SB_LUT4_I3_I2[1] +.sym 17083 smi_ctrl_ins.int_cnt_09_SB_DFFESR_Q_E .sym 17084 r_counter[0]_$glb_clk -.sym 17085 spi_if_ins.spi.r_tx_bit_count_SB_DFFESR_Q_R -.sym 17087 smi_ctrl_ins.int_cnt_24[5] -.sym 17099 i_ss$SB_IO_IN -.sym 17100 $PACKER_VCC_NET -.sym 17101 spi_if_ins.r_tx_data_valid_SB_LUT4_I3_O[2] -.sym 17105 $PACKER_VCC_NET -.sym 17106 spi_if_ins.r_tx_data_valid_SB_LUT4_I3_O[1] -.sym 17109 i_sck$SB_IO_IN -.sym 17113 w_smi_read_req -.sym 17114 i_smi_a2_SB_LUT4_I1_O_SB_LUT4_I3_1_I2[2] +.sym 17085 i_smi_a1_SB_LUT4_I1_O[3]_$glb_sr +.sym 17087 w_smi_read_req +.sym 17092 int_miso +.sym 17100 i_sck$SB_IO_IN +.sym 17101 io_pmod[4]$SB_IO_IN +.sym 17102 i_smi_a2_SB_LUT4_I1_O_SB_LUT4_I3_I2[1] +.sym 17104 i_smi_soe_se$rename$0 +.sym 17106 i_ss$SB_IO_IN +.sym 17111 i_ss$SB_IO_IN +.sym 17112 i_ss_SB_LUT4_I3_O +.sym 17113 i_smi_a1_SB_LUT4_I1_O[3] +.sym 17114 spi_if_ins.r_tx_data_valid_SB_LUT4_I3_O[2] .sym 17121 i_smi_soe_se$rename$0 -.sym 17128 spi_if_ins.r_tx_byte[7] -.sym 17130 spi_if_ins.r_tx_byte[1] -.sym 17131 spi_if_ins.r_tx_data_valid_SB_LUT4_I3_O[2] -.sym 17132 spi_if_ins.r_tx_data_valid_SB_LUT4_I3_O_SB_LUT4_O_I0_SB_LUT4_O_I3[0] -.sym 17136 spi_if_ins.spi.r_tx_byte[1] -.sym 17137 spi_if_ins.spi.r_tx_bit_count[2] -.sym 17138 spi_if_ins.spi.r_tx_byte[5] -.sym 17139 spi_if_ins.r_tx_data_valid_SB_LUT4_I3_O_SB_LUT4_O_I0_SB_LUT4_O_I3[2] -.sym 17140 spi_if_ins.r_tx_byte[2] -.sym 17142 spi_if_ins.r_tx_byte[5] -.sym 17143 spi_if_ins.spi.r_tx_byte[2] -.sym 17145 spi_if_ins.r_tx_data_valid_SB_LUT4_I3_O_SB_LUT4_O_I0_SB_LUT4_O_I3[1] -.sym 17147 spi_if_ins.r_tx_data_valid_SB_LUT4_I3_O_SB_LUT4_O_I0_SB_LUT4_O_I3[3] -.sym 17153 spi_if_ins.r_tx_byte[0] -.sym 17154 spi_if_ins.spi.r_tx_byte_SB_DFFESR_Q_E -.sym 17156 spi_if_ins.spi.r_tx_byte[6] -.sym 17160 spi_if_ins.r_tx_byte[2] -.sym 17166 spi_if_ins.r_tx_byte[1] -.sym 17173 spi_if_ins.r_tx_byte[7] -.sym 17179 spi_if_ins.r_tx_byte[5] -.sym 17184 spi_if_ins.spi.r_tx_byte[5] -.sym 17185 spi_if_ins.r_tx_data_valid_SB_LUT4_I3_O_SB_LUT4_O_I0_SB_LUT4_O_I3[2] -.sym 17186 spi_if_ins.spi.r_tx_byte[1] -.sym 17187 spi_if_ins.spi.r_tx_bit_count[2] -.sym 17190 spi_if_ins.r_tx_byte[0] -.sym 17196 spi_if_ins.r_tx_data_valid_SB_LUT4_I3_O_SB_LUT4_O_I0_SB_LUT4_O_I3[1] -.sym 17197 spi_if_ins.r_tx_data_valid_SB_LUT4_I3_O_SB_LUT4_O_I0_SB_LUT4_O_I3[0] -.sym 17198 spi_if_ins.r_tx_data_valid_SB_LUT4_I3_O_SB_LUT4_O_I0_SB_LUT4_O_I3[3] -.sym 17199 spi_if_ins.r_tx_data_valid_SB_LUT4_I3_O_SB_LUT4_O_I0_SB_LUT4_O_I3[2] -.sym 17202 spi_if_ins.r_tx_data_valid_SB_LUT4_I3_O_SB_LUT4_O_I0_SB_LUT4_O_I3[2] -.sym 17203 spi_if_ins.spi.r_tx_byte[6] -.sym 17204 spi_if_ins.spi.r_tx_bit_count[2] -.sym 17205 spi_if_ins.spi.r_tx_byte[2] -.sym 17206 spi_if_ins.spi.r_tx_byte_SB_DFFESR_Q_E +.sym 17132 spi_if_ins.r_tx_data_valid_SB_LUT4_I3_O[0] +.sym 17135 spi_if_ins.r_tx_data_valid_SB_LUT4_I3_O[1] +.sym 17138 spi_if_ins.spi.o_spi_miso_SB_DFFE_Q_E +.sym 17139 $PACKER_VCC_NET +.sym 17140 spi_if_ins.spi.r_tx_bit_count_SB_DFFESR_Q_R +.sym 17145 spi_if_ins.spi.r_tx_bit_count[2] +.sym 17147 spi_if_ins.spi.o_spi_miso_SB_DFFE_Q_D_SB_LUT4_O_I2_SB_LUT4_O_I0_SB_LUT4_O_I3[2] +.sym 17149 spi_if_ins.r_tx_data_valid_SB_LUT4_I3_O[2] +.sym 17156 spi_if_ins.spi.SCKr_SB_LUT4_I0_O[0] +.sym 17159 $nextpnr_ICESTORM_LC_15$O +.sym 17162 spi_if_ins.spi.o_spi_miso_SB_DFFE_Q_D_SB_LUT4_O_I2_SB_LUT4_O_I0_SB_LUT4_O_I3[2] +.sym 17165 spi_if_ins.spi.r_tx_bit_count_SB_DFFESR_Q_D_SB_LUT4_O_I3[2] +.sym 17167 spi_if_ins.spi.SCKr_SB_LUT4_I0_O[0] +.sym 17168 $PACKER_VCC_NET +.sym 17173 $PACKER_VCC_NET +.sym 17174 spi_if_ins.spi.r_tx_bit_count[2] +.sym 17175 spi_if_ins.spi.r_tx_bit_count_SB_DFFESR_Q_D_SB_LUT4_O_I3[2] +.sym 17178 spi_if_ins.r_tx_data_valid_SB_LUT4_I3_O[0] +.sym 17179 spi_if_ins.r_tx_data_valid_SB_LUT4_I3_O[2] +.sym 17180 spi_if_ins.r_tx_data_valid_SB_LUT4_I3_O[1] +.sym 17184 spi_if_ins.spi.o_spi_miso_SB_DFFE_Q_D_SB_LUT4_O_I2_SB_LUT4_O_I0_SB_LUT4_O_I3[2] +.sym 17190 $PACKER_VCC_NET +.sym 17191 spi_if_ins.spi.SCKr_SB_LUT4_I0_O[0] +.sym 17193 spi_if_ins.spi.o_spi_miso_SB_DFFE_Q_D_SB_LUT4_O_I2_SB_LUT4_O_I0_SB_LUT4_O_I3[2] +.sym 17196 spi_if_ins.spi.o_spi_miso_SB_DFFE_Q_D_SB_LUT4_O_I2_SB_LUT4_O_I0_SB_LUT4_O_I3[2] +.sym 17197 spi_if_ins.r_tx_data_valid_SB_LUT4_I3_O[1] +.sym 17198 spi_if_ins.spi.r_tx_bit_count[2] +.sym 17199 spi_if_ins.r_tx_data_valid_SB_LUT4_I3_O[0] +.sym 17203 spi_if_ins.r_tx_data_valid_SB_LUT4_I3_O[2] +.sym 17206 spi_if_ins.spi.o_spi_miso_SB_DFFE_Q_E .sym 17207 r_counter[0]_$glb_clk -.sym 17208 spi_if_ins.r_tx_data_valid_SB_LUT4_I3_O[2] +.sym 17208 spi_if_ins.spi.r_tx_bit_count_SB_DFFESR_Q_R .sym 17211 spi_if_ins.spi.r_rx_bit_count[2] -.sym 17212 spi_if_ins.spi.r_rx_bit_count[0] -.sym 17214 spi_if_ins.spi.r_rx_bit_count[1] -.sym 17222 $PACKER_VCC_NET -.sym 17224 $io_pmod[4]$iobuf_i -.sym 17227 spi_if_ins.r_tx_data_valid_SB_LUT4_I3_O[2] -.sym 17231 $PACKER_VCC_NET -.sym 17238 smi_ctrl_ins.r_fifo_24_pull_SB_LUT4_I1_O[2] -.sym 17239 spi_if_ins.w_rx_data[6] -.sym 17240 i_mosi$SB_IO_IN -.sym 17242 spi_if_ins.spi.r_tx_byte[6] -.sym 17252 sys_ctrl_ins.reset_count[2] -.sym 17254 sys_ctrl_ins.reset_cmd -.sym 17255 sys_ctrl_ins.o_soft_reset_SB_DFFESS_Q_S +.sym 17212 spi_if_ins.spi.r_rx_bit_count[1] +.sym 17215 spi_if_ins.spi.r_rx_bit_count[0] +.sym 17220 w_rx_data[1] +.sym 17227 $PACKER_VCC_NET +.sym 17228 i_smi_a1_SB_LUT4_I1_O_SB_LUT4_O_I0[3] +.sym 17230 w_smi_read_req +.sym 17235 i_mosi$SB_IO_IN +.sym 17236 spi_if_ins.r_tx_data_valid_SB_LUT4_I3_O[2] +.sym 17239 lvds_rx_09_inst.r_state_if_SB_LUT4_I2_O[0] +.sym 17250 spi_if_ins.spi.r_tx_byte[7] +.sym 17251 spi_if_ins.spi.r_tx_byte[5] +.sym 17252 spi_if_ins.spi.o_spi_miso_SB_DFFE_Q_D_SB_LUT4_O_I2_SB_LUT4_O_I0_SB_LUT4_O_I3[0] +.sym 17253 $PACKER_GND_NET +.sym 17254 spi_if_ins.spi.o_spi_miso_SB_DFFE_Q_D_SB_LUT4_O_I2_SB_LUT4_O_I0_SB_LUT4_O_I3[2] +.sym 17255 spi_if_ins.spi.r_tx_byte[2] +.sym 17256 spi_if_ins.spi.r_tx_byte[1] +.sym 17258 spi_if_ins.spi.o_spi_miso_SB_DFFE_Q_D_SB_LUT4_O_I2_SB_LUT4_O_I0_SB_LUT4_O_I3[1] .sym 17259 sys_ctrl_ins.reset_cmd -.sym 17261 sys_ctrl_ins.reset_count[3] -.sym 17262 sys_ctrl_ins.reset_count[1] -.sym 17263 sys_ctrl_ins.o_soft_reset_SB_DFFESS_Q_S -.sym 17268 sys_ctrl_ins.reset_count_SB_DFFESR_Q_E -.sym 17272 sys_ctrl_ins.reset_count[0] -.sym 17280 sys_ctrl_ins.reset_count[0] -.sym 17282 $nextpnr_ICESTORM_LC_16$O -.sym 17284 sys_ctrl_ins.reset_count[0] -.sym 17288 sys_ctrl_ins.reset_count_SB_DFFESR_Q_D_SB_LUT4_O_I3[2] -.sym 17291 sys_ctrl_ins.reset_count[1] -.sym 17294 sys_ctrl_ins.reset_count_SB_DFFESR_Q_D_SB_LUT4_O_I3[3] -.sym 17295 sys_ctrl_ins.o_soft_reset_SB_DFFESS_Q_S -.sym 17297 sys_ctrl_ins.reset_count[2] -.sym 17298 sys_ctrl_ins.reset_count_SB_DFFESR_Q_D_SB_LUT4_O_I3[2] -.sym 17301 sys_ctrl_ins.o_soft_reset_SB_DFFESS_Q_S -.sym 17302 sys_ctrl_ins.reset_count[3] -.sym 17304 sys_ctrl_ins.reset_count_SB_DFFESR_Q_D_SB_LUT4_O_I3[3] -.sym 17308 sys_ctrl_ins.o_soft_reset_SB_DFFESS_Q_S -.sym 17309 sys_ctrl_ins.reset_count[0] -.sym 17310 sys_ctrl_ins.reset_count[1] -.sym 17313 sys_ctrl_ins.reset_count[1] -.sym 17314 sys_ctrl_ins.reset_count[3] -.sym 17315 sys_ctrl_ins.reset_count[0] -.sym 17316 sys_ctrl_ins.reset_count[2] -.sym 17319 sys_ctrl_ins.reset_count[0] -.sym 17327 sys_ctrl_ins.o_soft_reset_SB_DFFESS_Q_S -.sym 17328 sys_ctrl_ins.reset_cmd -.sym 17329 sys_ctrl_ins.reset_count_SB_DFFESR_Q_E +.sym 17260 spi_if_ins.spi.r_tx_bit_count[2] +.sym 17261 spi_if_ins.spi.r_tx_byte[6] +.sym 17262 spi_if_ins.spi.r_tx_byte[3] +.sym 17263 spi_if_ins.spi.SCKr_SB_LUT4_I0_O[0] +.sym 17264 spi_if_ins.spi.SCKr_SB_LUT4_I0_O[1] +.sym 17265 spi_if_ins.r_tx_data_valid_SB_LUT4_I3_O[2] +.sym 17267 spi_if_ins.spi.o_spi_miso_SB_DFFE_Q_D_SB_LUT4_O_I2_SB_LUT4_O_I0_SB_LUT4_O_I3[3] +.sym 17268 spi_if_ins.spi.o_spi_miso_SB_DFFE_Q_D_SB_LUT4_O_I2_SB_LUT4_O_I0[0] +.sym 17269 spi_if_ins.spi.o_spi_miso_SB_DFFE_Q_D_SB_LUT4_O_I2_SB_LUT4_O_I0[1] +.sym 17270 sys_ctrl_ins.o_soft_reset_SB_DFFESS_Q_S +.sym 17271 spi_if_ins.spi.o_spi_miso_SB_DFFE_Q_D_SB_LUT4_O_I2_SB_LUT4_O_I0[2] +.sym 17277 sys_ctrl_ins.o_soft_reset_SB_DFFESS_Q_E +.sym 17283 spi_if_ins.r_tx_data_valid_SB_LUT4_I3_O[2] +.sym 17285 spi_if_ins.spi.SCKr_SB_LUT4_I0_O[0] +.sym 17286 spi_if_ins.spi.SCKr_SB_LUT4_I0_O[1] +.sym 17289 spi_if_ins.spi.r_tx_bit_count[2] +.sym 17290 spi_if_ins.spi.r_tx_byte[1] +.sym 17291 spi_if_ins.spi.r_tx_byte[5] +.sym 17292 spi_if_ins.spi.o_spi_miso_SB_DFFE_Q_D_SB_LUT4_O_I2_SB_LUT4_O_I0_SB_LUT4_O_I3[2] +.sym 17295 spi_if_ins.spi.r_tx_byte[7] +.sym 17296 spi_if_ins.spi.r_tx_bit_count[2] +.sym 17297 spi_if_ins.spi.o_spi_miso_SB_DFFE_Q_D_SB_LUT4_O_I2_SB_LUT4_O_I0_SB_LUT4_O_I3[2] +.sym 17298 spi_if_ins.spi.r_tx_byte[3] +.sym 17301 spi_if_ins.spi.r_tx_byte[2] +.sym 17302 spi_if_ins.spi.o_spi_miso_SB_DFFE_Q_D_SB_LUT4_O_I2_SB_LUT4_O_I0_SB_LUT4_O_I3[2] +.sym 17303 spi_if_ins.spi.r_tx_bit_count[2] +.sym 17304 spi_if_ins.spi.r_tx_byte[6] +.sym 17307 sys_ctrl_ins.reset_cmd +.sym 17313 spi_if_ins.spi.o_spi_miso_SB_DFFE_Q_D_SB_LUT4_O_I2_SB_LUT4_O_I0_SB_LUT4_O_I3[1] +.sym 17314 spi_if_ins.spi.o_spi_miso_SB_DFFE_Q_D_SB_LUT4_O_I2_SB_LUT4_O_I0_SB_LUT4_O_I3[0] +.sym 17315 spi_if_ins.spi.o_spi_miso_SB_DFFE_Q_D_SB_LUT4_O_I2_SB_LUT4_O_I0_SB_LUT4_O_I3[3] +.sym 17316 spi_if_ins.spi.o_spi_miso_SB_DFFE_Q_D_SB_LUT4_O_I2_SB_LUT4_O_I0_SB_LUT4_O_I3[2] +.sym 17319 spi_if_ins.spi.o_spi_miso_SB_DFFE_Q_D_SB_LUT4_O_I2_SB_LUT4_O_I0[0] +.sym 17320 spi_if_ins.spi.o_spi_miso_SB_DFFE_Q_D_SB_LUT4_O_I2_SB_LUT4_O_I0[2] +.sym 17321 spi_if_ins.spi.SCKr_SB_LUT4_I0_O[0] +.sym 17322 spi_if_ins.spi.o_spi_miso_SB_DFFE_Q_D_SB_LUT4_O_I2_SB_LUT4_O_I0[1] +.sym 17327 $PACKER_GND_NET +.sym 17329 sys_ctrl_ins.o_soft_reset_SB_DFFESS_Q_E .sym 17330 r_counter[0]_$glb_clk -.sym 17331 sys_ctrl_ins.reset_cmd -.sym 17333 spi_if_ins.w_rx_data[6] -.sym 17334 sys_ctrl_ins.reset_count_SB_DFFESR_Q_E -.sym 17335 spi_if_ins.spi.r_rx_done_SB_DFFER_Q_D[1] -.sym 17339 spi_if_ins.spi.r_rx_done_SB_DFFER_Q_E -.sym 17345 i_ss$SB_IO_IN -.sym 17355 sys_ctrl_ins.reset_cmd -.sym 17358 spi_if_ins.spi.r_rx_done_SB_DFFER_Q_D_SB_LUT4_I3_O -.sym 17365 w_tx_data_io[3] -.sym 17378 spi_if_ins.r_tx_byte[3] -.sym 17383 spi_if_ins.r_tx_byte[6] +.sym 17331 sys_ctrl_ins.o_soft_reset_SB_DFFESS_Q_S +.sym 17332 spi_if_ins.w_rx_data[6] +.sym 17335 spi_if_ins.spi.r_rx_done_SB_DFFER_Q_E +.sym 17339 spi_if_ins.spi.r_rx_done_SB_DFFER_Q_D[1] +.sym 17365 spi_if_ins.w_rx_data[6] +.sym 17367 i_smi_a1_SB_LUT4_I1_O[3] +.sym 17376 spi_if_ins.r_tx_data_valid +.sym 17378 i_ss$SB_IO_IN .sym 17384 spi_if_ins.spi.r_tx_byte_SB_DFFESR_Q_E -.sym 17394 spi_if_ins.r_tx_byte[4] -.sym 17402 spi_if_ins.r_tx_data_valid_SB_LUT4_I3_O[2] -.sym 17409 spi_if_ins.r_tx_byte[3] -.sym 17419 spi_if_ins.r_tx_byte[6] -.sym 17436 spi_if_ins.r_tx_byte[4] +.sym 17386 spi_if_ins.r_tx_data_valid_SB_LUT4_I3_O[2] +.sym 17391 spi_if_ins.r_tx_byte[0] +.sym 17396 spi_if_ins.r_tx_byte[6] +.sym 17398 spi_if_ins.r_tx_byte[4] +.sym 17404 spi_if_ins.r_tx_byte[3] +.sym 17406 spi_if_ins.r_tx_byte[4] +.sym 17418 spi_if_ins.r_tx_byte[0] +.sym 17424 spi_if_ins.r_tx_byte[6] +.sym 17432 spi_if_ins.r_tx_byte[3] +.sym 17448 i_ss$SB_IO_IN +.sym 17450 spi_if_ins.r_tx_data_valid .sym 17452 spi_if_ins.spi.r_tx_byte_SB_DFFESR_Q_E .sym 17453 r_counter[0]_$glb_clk .sym 17454 spi_if_ins.r_tx_data_valid_SB_LUT4_I3_O[2] -.sym 17455 spi_if_ins.spi.r_temp_rx_byte[0] -.sym 17456 spi_if_ins.spi.r_temp_rx_byte[4] -.sym 17457 spi_if_ins.spi.r_temp_rx_byte[5] -.sym 17458 spi_if_ins.spi.r_temp_rx_byte[1] -.sym 17459 spi_if_ins.spi.r_temp_rx_byte[3] -.sym 17460 spi_if_ins.spi.r_temp_rx_byte[2] -.sym 17461 spi_if_ins.spi.r_temp_rx_byte[6] -.sym 17462 spi_if_ins.spi.r_rx_done_SB_DFFER_Q_D_SB_LUT4_I3_O -.sym 17467 i_smi_soe_se$rename$0 -.sym 17471 spi_if_ins.r_tx_byte[6] -.sym 17472 spi_if_ins.spi.r_tx_byte_SB_DFFESR_Q_E -.sym 17476 spi_if_ins.spi.r3_rx_done_SB_LUT4_I2_O -.sym 17490 w_tx_data_io[1] -.sym 17497 i_ss$SB_IO_IN -.sym 17505 io_pmod[2]$SB_IO_IN -.sym 17507 spi_if_ins.spi.r_rx_done_SB_DFFER_Q_D_SB_LUT4_I3_O -.sym 17514 spi_if_ins.spi.r_temp_rx_byte[5] -.sym 17522 spi_if_ins.r_tx_data_valid -.sym 17525 w_rx_24_fifo_empty -.sym 17536 spi_if_ins.spi.r_temp_rx_byte[5] -.sym 17547 spi_if_ins.r_tx_data_valid -.sym 17549 i_ss$SB_IO_IN -.sym 17560 w_rx_24_fifo_empty -.sym 17562 io_pmod[2]$SB_IO_IN -.sym 17575 spi_if_ins.spi.r_rx_done_SB_DFFER_Q_D_SB_LUT4_I3_O -.sym 17576 i_sck$SB_IO_IN_$glb_clk -.sym 17578 spi_if_ins.spi.r_rx_byte[0] -.sym 17579 spi_if_ins.spi.r_rx_byte[4] -.sym 17580 spi_if_ins.spi.r_rx_byte[2] -.sym 17582 spi_if_ins.spi.r_rx_byte[7] -.sym 17583 spi_if_ins.spi.r_rx_byte[1] -.sym 17584 spi_if_ins.spi.r_rx_byte[3] -.sym 17585 spi_if_ins.spi.r_rx_byte[5] -.sym 17592 w_smi_read_req -.sym 17595 spi_if_ins.spi.r_rx_done_SB_DFFER_Q_D_SB_LUT4_I3_O -.sym 17598 i_ss$SB_IO_IN -.sym 17601 io_pmod[2]$SB_IO_IN -.sym 17602 io_ctrl_ins.ldo2v8_state_SB_LUT4_I3_O[0] -.sym 17605 spi_if_ins.r_tx_data_valid_SB_LUT4_I3_O[2] -.sym 17608 spi_if_ins.spi.r3_rx_done_SB_LUT4_I2_O -.sym 17609 w_smi_read_req -.sym 17610 io_ctrl_ins.o_data_out_SB_DFFESR_Q_6_R[0] -.sym 17611 w_rx_24_fifo_empty -.sym 17612 w_tx_data_io[2] -.sym 17613 io_pmod[2]$SB_IO_IN -.sym 17619 w_tx_data_io[2] -.sym 17623 w_tx_data_io[7] -.sym 17624 spi_if_ins.o_cs_SB_LUT4_I2_2_O[2] -.sym 17625 w_tx_data_io[5] -.sym 17628 spi_if_ins.o_cs_SB_LUT4_I2_1_O[1] -.sym 17630 spi_if_ins.o_cs_SB_LUT4_I3_1_O -.sym 17631 smi_ctrl_ins.o_data_out_SB_LUT4_I1_O[0] -.sym 17632 spi_if_ins.o_cs_SB_LUT4_I2_2_O[1] -.sym 17633 w_tx_data_smi[1] -.sym 17635 w_tx_data_io[3] -.sym 17640 w_tx_data_io[6] -.sym 17645 smi_ctrl_ins.o_data_out_SB_LUT4_I1_O[2] -.sym 17646 spi_if_ins.w_rx_data[5] -.sym 17647 w_tx_data_smi[3] -.sym 17649 w_tx_data_io[4] -.sym 17650 w_tx_data_io[1] -.sym 17653 spi_if_ins.o_cs_SB_LUT4_I2_2_O[2] -.sym 17654 w_tx_data_io[7] -.sym 17655 smi_ctrl_ins.o_data_out_SB_LUT4_I1_O[0] -.sym 17658 w_tx_data_smi[1] -.sym 17659 spi_if_ins.o_cs_SB_LUT4_I2_1_O[1] -.sym 17660 smi_ctrl_ins.o_data_out_SB_LUT4_I1_O[0] -.sym 17661 w_tx_data_io[1] -.sym 17665 smi_ctrl_ins.o_data_out_SB_LUT4_I1_O[0] -.sym 17667 w_tx_data_io[4] -.sym 17670 smi_ctrl_ins.o_data_out_SB_LUT4_I1_O[0] -.sym 17671 w_tx_data_io[2] -.sym 17672 smi_ctrl_ins.o_data_out_SB_LUT4_I1_O[2] -.sym 17677 spi_if_ins.o_cs_SB_LUT4_I2_2_O[2] -.sym 17678 w_tx_data_io[5] -.sym 17679 smi_ctrl_ins.o_data_out_SB_LUT4_I1_O[0] -.sym 17685 spi_if_ins.w_rx_data[5] -.sym 17689 smi_ctrl_ins.o_data_out_SB_LUT4_I1_O[0] -.sym 17691 w_tx_data_io[6] -.sym 17694 smi_ctrl_ins.o_data_out_SB_LUT4_I1_O[0] -.sym 17695 w_tx_data_io[3] -.sym 17696 w_tx_data_smi[3] -.sym 17697 spi_if_ins.o_cs_SB_LUT4_I2_1_O[1] -.sym 17698 spi_if_ins.o_cs_SB_LUT4_I3_1_O -.sym 17699 i_glob_clock$SB_IO_IN_$glb_clk -.sym 17700 spi_if_ins.o_cs_SB_LUT4_I2_2_O[1] -.sym 17701 spi_if_ins.w_rx_data[3] -.sym 17702 spi_if_ins.w_rx_data[0] -.sym 17703 spi_if_ins.w_rx_data[4] -.sym 17704 spi_if_ins.w_rx_data[5] -.sym 17706 spi_if_ins.w_rx_data[1] -.sym 17707 spi_if_ins.w_rx_data[2] -.sym 17708 spi_if_ins.o_load_cmd_SB_DFFESR_Q_D_SB_LUT4_I1_O[0] -.sym 17716 $PACKER_VCC_NET -.sym 17725 w_rx_data[0] -.sym 17726 w_tx_data_io[6] -.sym 17727 spi_if_ins.w_rx_data[6] -.sym 17728 io_ctrl_ins.pmod_dir_state[7] -.sym 17732 spi_if_ins.o_load_cmd_SB_DFFESR_Q_D_SB_LUT4_I1_O[0] -.sym 17748 r_tx_data[6] -.sym 17752 r_tx_data[4] -.sym 17753 spi_if_ins.r_tx_data_valid_SB_DFFESR_Q_D_SB_LUT4_I3_O -.sym 17778 r_tx_data[4] -.sym 17789 r_tx_data[6] -.sym 17821 spi_if_ins.r_tx_data_valid_SB_DFFESR_Q_D_SB_LUT4_I3_O +.sym 17458 spi_if_ins.spi.r_rx_done_SB_DFFER_Q_D_SB_LUT4_I3_O +.sym 17461 spi_if_ins.spi.r_rx_byte[6] +.sym 17470 spi_if_ins.spi.r_tx_byte_SB_DFFESR_Q_E +.sym 17472 spi_if_ins.spi.r_rx_done_SB_DFFER_Q_D[1] +.sym 17474 spi_if_ins.spi.r3_rx_done_SB_LUT4_I2_O +.sym 17483 sys_ctrl_ins.reset_cmd_SB_DFFESR_Q_R +.sym 17486 i_mosi$SB_IO_IN +.sym 17488 spi_if_ins.o_ioc_SB_DFFE_Q_E[0] +.sym 17490 spi_if_ins.r_tx_data_valid_SB_LUT4_I3_O[2] +.sym 17498 spi_if_ins.state_if_SB_DFFE_Q_E +.sym 17504 spi_if_ins.o_ioc_SB_DFFE_Q_E[1] +.sym 17509 spi_if_ins.o_ioc_SB_DFFE_Q_E[0] +.sym 17511 spi_if_ins.o_data_in_SB_DFFE_Q_E +.sym 17543 spi_if_ins.o_data_in_SB_DFFE_Q_E +.sym 17559 spi_if_ins.o_ioc_SB_DFFE_Q_E[1] +.sym 17575 spi_if_ins.state_if_SB_DFFE_Q_E +.sym 17576 r_counter[0]_$glb_clk +.sym 17577 spi_if_ins.o_ioc_SB_DFFE_Q_E[0] +.sym 17582 spi_if_ins.spi.r_temp_rx_byte[5] +.sym 17593 spi_if_ins.spi.r_rx_done_SB_DFFER_Q_D_SB_LUT4_I3_O +.sym 17601 i_ss$SB_IO_IN +.sym 17602 spi_if_ins.w_rx_data[1] +.sym 17604 spi_if_ins.spi.r_rx_done_SB_DFFER_Q_D_SB_LUT4_I3_O +.sym 17606 i_smi_a1_SB_LUT4_I1_O[3] +.sym 17608 spi_if_ins.w_rx_data[0] +.sym 17609 i_ss_SB_LUT4_I3_O +.sym 17610 w_rx_data[1] +.sym 17613 i_ss_SB_LUT4_I3_O +.sym 17620 spi_if_ins.w_rx_data[1] +.sym 17621 spi_if_ins.o_data_in_SB_DFFE_Q_E +.sym 17624 spi_if_ins.state_if[2] +.sym 17626 spi_if_ins.w_rx_data[0] +.sym 17631 spi_if_ins.w_rx_data[2] +.sym 17632 spi_if_ins.state_if_SB_DFFESR_Q_D[1] +.sym 17635 spi_if_ins.w_rx_data[6] +.sym 17637 spi_if_ins.state_if[0] +.sym 17643 spi_if_ins.w_rx_data[5] +.sym 17647 spi_if_ins.state_if[1] +.sym 17648 spi_if_ins.o_ioc_SB_DFFE_Q_E[0] +.sym 17653 spi_if_ins.w_rx_data[1] +.sym 17658 spi_if_ins.w_rx_data[0] +.sym 17666 spi_if_ins.state_if_SB_DFFESR_Q_D[1] +.sym 17670 spi_if_ins.w_rx_data[5] +.sym 17678 spi_if_ins.w_rx_data[6] +.sym 17691 spi_if_ins.w_rx_data[2] +.sym 17694 spi_if_ins.state_if[1] +.sym 17695 spi_if_ins.o_ioc_SB_DFFE_Q_E[0] +.sym 17696 spi_if_ins.state_if[2] +.sym 17697 spi_if_ins.state_if[0] +.sym 17698 spi_if_ins.o_data_in_SB_DFFE_Q_E +.sym 17699 r_counter[0]_$glb_clk +.sym 17701 spi_if_ins.spi.r_temp_rx_byte[2] +.sym 17702 spi_if_ins.spi.r_temp_rx_byte[0] +.sym 17705 spi_if_ins.spi.r_temp_rx_byte[3] +.sym 17707 spi_if_ins.spi.r_temp_rx_byte[1] +.sym 17708 spi_if_ins.spi.r_temp_rx_byte[4] +.sym 17713 $PACKER_VCC_NET +.sym 17717 w_rx_data[0] +.sym 17718 spi_if_ins.o_ioc_SB_DFFE_Q_E[0] +.sym 17719 spi_if_ins.w_rx_data[2] +.sym 17720 spi_if_ins.state_if_SB_DFFESR_Q_D[1] +.sym 17726 w_rx_data[7] +.sym 17728 w_rx_data[5] +.sym 17730 w_rx_data[6] +.sym 17733 io_ctrl_ins.o_data_out_SB_DFFESR_Q_E[3] +.sym 17734 w_rx_data[2] +.sym 17735 i_mosi$SB_IO_IN +.sym 17744 sys_ctrl_ins.reset_cmd_SB_DFFESR_Q_E +.sym 17745 w_cs[0] +.sym 17751 w_load +.sym 17753 w_cs[0] +.sym 17755 sys_ctrl_ins.reset_cmd_SB_DFFESR_Q_R +.sym 17756 w_fetch +.sym 17759 $PACKER_VCC_NET +.sym 17767 i_button_SB_LUT4_I3_O[1] +.sym 17795 $PACKER_VCC_NET +.sym 17799 i_button_SB_LUT4_I3_O[1] +.sym 17800 w_cs[0] +.sym 17801 w_load +.sym 17802 w_fetch +.sym 17820 w_cs[0] +.sym 17821 sys_ctrl_ins.reset_cmd_SB_DFFESR_Q_E .sym 17822 r_counter[0]_$glb_clk -.sym 17824 w_rx_data[7] -.sym 17825 w_rx_data[3] -.sym 17826 w_rx_data[1] -.sym 17827 w_rx_data[6] -.sym 17828 w_rx_data[4] -.sym 17829 w_rx_data[2] -.sym 17830 w_rx_data[0] -.sym 17831 w_rx_data[5] -.sym 17839 spi_if_ins.w_rx_data[5] -.sym 17840 io_ctrl_ins.o_data_out_SB_DFFESR_Q_6_R[0] -.sym 17849 w_rx_data[4] -.sym 17852 w_tx_data_io[3] -.sym 17855 w_rx_data[5] -.sym 17857 w_rx_data[7] -.sym 17858 io_ctrl_ins.pmod_dir_state[1] -.sym 17875 io_ctrl_ins.pmod_state_SB_DFFE_Q_E_SB_LUT4_O_I3[1] -.sym 17883 io_ctrl_ins.pmod_dir_state_SB_DFFE_Q_E -.sym 17884 w_rx_data[6] -.sym 17887 io_ctrl_ins.ldo2v8_state_SB_LUT4_I3_O[1] -.sym 17889 w_rx_data[7] -.sym 17890 w_rx_data[3] -.sym 17891 w_rx_data[1] -.sym 17893 w_rx_data[4] -.sym 17894 w_rx_data[2] -.sym 17895 w_rx_data[0] -.sym 17898 w_rx_data[2] -.sym 17904 w_rx_data[1] -.sym 17912 io_ctrl_ins.ldo2v8_state_SB_LUT4_I3_O[1] -.sym 17913 io_ctrl_ins.pmod_state_SB_DFFE_Q_E_SB_LUT4_O_I3[1] -.sym 17918 w_rx_data[6] -.sym 17925 w_rx_data[0] -.sym 17931 w_rx_data[3] -.sym 17937 w_rx_data[4] -.sym 17942 w_rx_data[7] -.sym 17944 io_ctrl_ins.pmod_dir_state_SB_DFFE_Q_E +.sym 17823 sys_ctrl_ins.reset_cmd_SB_DFFESR_Q_R +.sym 17826 spi_if_ins.spi.r_rx_byte[0] +.sym 17827 spi_if_ins.spi.r_rx_byte[5] +.sym 17829 spi_if_ins.spi.r_rx_byte[3] +.sym 17830 spi_if_ins.spi.r_rx_byte[1] +.sym 17831 spi_if_ins.spi.r_rx_byte[4] +.sym 17837 spi_if_ins.spi.r_temp_rx_byte[1] +.sym 17840 sys_ctrl_ins.reset_cmd_SB_DFFESR_Q_E +.sym 17853 i_button_SB_LUT4_I3_O[1] +.sym 17855 spi_if_ins.spi.r3_rx_done_SB_LUT4_I2_O +.sym 17857 w_ioc[0] +.sym 17858 spi_if_ins.o_data_in_SB_DFFE_Q_E +.sym 17876 spi_if_ins.spi.r3_rx_done_SB_LUT4_I2_O +.sym 17885 w_cs[1] +.sym 17886 i_smi_a1_SB_LUT4_I1_O[3] +.sym 17887 spi_if_ins.spi.r_rx_byte[1] +.sym 17891 spi_if_ins.spi.r_rx_byte[0] +.sym 17892 spi_if_ins.spi.r_rx_byte[5] +.sym 17895 w_fetch +.sym 17898 spi_if_ins.spi.r_rx_byte[1] +.sym 17918 spi_if_ins.spi.r_rx_byte[0] +.sym 17922 spi_if_ins.spi.r_rx_byte[5] +.sym 17934 w_cs[1] +.sym 17935 i_smi_a1_SB_LUT4_I1_O[3] +.sym 17937 w_fetch +.sym 17944 spi_if_ins.spi.r3_rx_done_SB_LUT4_I2_O .sym 17945 r_counter[0]_$glb_clk -.sym 17947 io_ctrl_ins.o_data_out_SB_DFFESR_Q_R -.sym 17948 io_ctrl_ins.rf_pin_state[6] -.sym 17949 io_ctrl_ins.debug_mode_SB_LUT4_I2_O[2] -.sym 17950 io_ctrl_ins.tr_vc_1_b_state_SB_LUT4_I1_O[3] -.sym 17951 io_ctrl_ins.rf_pin_state[0] -.sym 17952 io_ctrl_ins.rf_pin_state[4] -.sym 17953 io_ctrl_ins.rf_pin_state[7] -.sym 17954 io_ctrl_ins.rf_pin_state[3] -.sym 17955 io_ctrl_ins.led0_state_SB_LUT4_I3_O[0] -.sym 17960 w_tx_data_io[4] -.sym 17964 w_rx_data[5] -.sym 17965 io_ctrl_ins.pmod_dir_state_SB_DFFE_Q_E -.sym 17967 io_ctrl_ins.o_data_out_SB_DFFESR_Q_E[3] -.sym 17969 io_ctrl_ins.ldo2v8_state_SB_LUT4_I3_O[1] -.sym 17970 w_rx_data[1] -.sym 17971 w_rx_data[1] -.sym 17973 io_ctrl_ins.o_data_out_SB_DFFESR_Q_6_R[0] -.sym 17974 w_tx_data_io[1] -.sym 17976 io_ctrl_ins.rf_mode[2] -.sym 17977 w_rx_data[2] -.sym 17979 w_rx_data[0] -.sym 17981 io_ctrl_ins.led1_state_SB_LUT4_I0_I2[1] -.sym 17982 io_ctrl_ins.led1_state_SB_LUT4_I0_I2[3] -.sym 17990 i_smi_a1_SB_LUT4_I1_O_SB_LUT4_O_I2_SB_LUT4_I0_O[2] -.sym 17991 w_rx_data[6] -.sym 17994 io_ctrl_ins.pmod_state_SB_DFFE_Q_E_SB_LUT4_O_I3[0] -.sym 17996 io_ctrl_ins.o_pmod[6] -.sym 17999 io_ctrl_ins.pmod_dir_state[6] -.sym 18000 w_rx_data[4] -.sym 18002 io_ctrl_ins.ldo2v8_state_SB_LUT4_I3_O[1] -.sym 18003 spi_if_ins.o_load_cmd_SB_LUT4_I2_O[0] -.sym 18004 io_ctrl_ins.tr_vc_2_state_SB_LUT4_I1_I3[1] -.sym 18005 w_ioc[1] -.sym 18009 spi_if_ins.o_fetch_cmd_SB_LUT4_I3_1_O[0] -.sym 18015 io_ctrl_ins.pmod_state_SB_DFFE_Q_E -.sym 18019 w_ioc[0] -.sym 18024 w_rx_data[6] -.sym 18027 w_ioc[1] -.sym 18029 spi_if_ins.o_fetch_cmd_SB_LUT4_I3_1_O[0] -.sym 18030 w_ioc[0] -.sym 18033 i_smi_a1_SB_LUT4_I1_O_SB_LUT4_O_I2_SB_LUT4_I0_O[2] -.sym 18035 spi_if_ins.o_load_cmd_SB_LUT4_I2_O[0] -.sym 18041 w_rx_data[4] -.sym 18045 io_ctrl_ins.pmod_state_SB_DFFE_Q_E_SB_LUT4_O_I3[0] -.sym 18046 io_ctrl_ins.o_pmod[6] -.sym 18047 io_ctrl_ins.pmod_dir_state[6] -.sym 18048 io_ctrl_ins.ldo2v8_state_SB_LUT4_I3_O[1] -.sym 18051 spi_if_ins.o_fetch_cmd_SB_LUT4_I3_1_O[0] -.sym 18052 w_ioc[0] -.sym 18053 w_ioc[1] -.sym 18057 w_ioc[0] -.sym 18059 io_ctrl_ins.tr_vc_2_state_SB_LUT4_I1_I3[1] -.sym 18063 spi_if_ins.o_fetch_cmd_SB_LUT4_I3_1_O[0] -.sym 18065 w_ioc[1] -.sym 18066 io_ctrl_ins.tr_vc_2_state_SB_LUT4_I1_I3[1] -.sym 18067 io_ctrl_ins.pmod_state_SB_DFFE_Q_E +.sym 17947 spi_if_ins.w_rx_data[4] +.sym 17949 io_ctrl_ins.o_data_out_SB_DFFESR_Q_E[3] +.sym 17950 spi_if_ins.w_rx_data[3] +.sym 17959 lvds_rx_09_inst.r_state_if_SB_LUT4_I2_O[0] +.sym 17962 o_led1$SB_IO_OUT +.sym 17971 w_cs[1] +.sym 17972 w_tx_data_io[1] +.sym 17981 io_ctrl_ins.o_pmod[1] +.sym 17982 w_tx_data_io[3] +.sym 17988 spi_if_ins.w_rx_data[1] +.sym 17991 spi_if_ins.w_rx_data[0] +.sym 17994 spi_if_ins.w_rx_data[2] +.sym 17996 spi_if_ins.o_fetch_cmd_SB_LUT4_I3_O[0] +.sym 17999 spi_if_ins.o_ioc_SB_DFFE_Q_E[2] +.sym 18002 spi_if_ins.o_fetch_cmd_SB_LUT4_I3_O[2] +.sym 18003 w_ioc[4] +.sym 18004 spi_if_ins.w_rx_data[4] +.sym 18005 w_ioc[3] +.sym 18007 spi_if_ins.w_rx_data[3] +.sym 18015 w_ioc[2] +.sym 18017 io_ctrl_ins.o_data_out_SB_DFFESR_Q_6_R[1] +.sym 18018 w_ioc[1] +.sym 18021 w_ioc[4] +.sym 18022 w_ioc[1] +.sym 18023 w_ioc[2] +.sym 18024 w_ioc[3] +.sym 18029 spi_if_ins.w_rx_data[3] +.sym 18036 spi_if_ins.w_rx_data[0] +.sym 18042 spi_if_ins.w_rx_data[2] +.sym 18046 spi_if_ins.o_fetch_cmd_SB_LUT4_I3_O[2] +.sym 18047 io_ctrl_ins.o_data_out_SB_DFFESR_Q_6_R[1] +.sym 18048 spi_if_ins.o_fetch_cmd_SB_LUT4_I3_O[0] +.sym 18051 w_ioc[3] +.sym 18052 w_ioc[2] +.sym 18054 w_ioc[4] +.sym 18057 spi_if_ins.w_rx_data[1] +.sym 18066 spi_if_ins.w_rx_data[4] +.sym 18067 spi_if_ins.o_ioc_SB_DFFE_Q_E[2] .sym 18068 r_counter[0]_$glb_clk -.sym 18070 io_ctrl_ins.o_pmod[5] -.sym 18071 io_ctrl_ins.o_pmod[3] -.sym 18072 io_ctrl_ins.led0_state_SB_LUT4_I3_O[3] -.sym 18073 io_ctrl_ins.o_pmod[7] -.sym 18074 i_button_SB_LUT4_I3_O[0] -.sym 18075 io_ctrl_ins.o_pmod[0] -.sym 18076 io_ctrl_ins.tr_vc_2_state_SB_LUT4_I1_I3_SB_LUT4_I2_O[0] -.sym 18077 io_ctrl_ins.tr_vc_1_state_SB_LUT4_I0_O[0] -.sym 18084 io_ctrl_ins.o_data_out_SB_DFFESR_Q_6_R[0] -.sym 18085 io_ctrl_ins.tr_vc_1_b_state_SB_LUT4_I1_O[3] -.sym 18092 io_ctrl_ins.rx_h_b_state_SB_LUT4_I0_O[0] -.sym 18094 io_ctrl_ins.ldo2v8_state_SB_LUT4_I3_O[0] -.sym 18096 w_tx_data_io[2] -.sym 18099 w_rx_data[2] -.sym 18101 io_ctrl_ins.o_data_out_SB_DFFESR_Q_6_R[0] -.sym 18102 io_ctrl_ins.rf_mode[2] -.sym 18113 io_ctrl_ins.rf_mode_SB_DFFESR_Q_E -.sym 18115 io_ctrl_ins.debug_mode[0] -.sym 18117 io_ctrl_ins.o_pmod[1] -.sym 18119 w_rx_data[4] -.sym 18121 io_ctrl_ins.pmod_state_SB_DFFE_Q_E_SB_LUT4_O_I3[1] -.sym 18122 io_ctrl_ins.debug_mode[1] -.sym 18123 io_ctrl_ins.debug_mode_SB_LUT4_I2_O[1] -.sym 18125 io_ctrl_ins.pmod_state_SB_DFFE_Q_E_SB_LUT4_O_I3[0] -.sym 18130 io_ctrl_ins.pmod_dir_state[1] -.sym 18133 io_ctrl_ins.ldo2v8_state_SB_LUT4_I3_O[1] -.sym 18135 io_ctrl_ins.rf_mode[2] -.sym 18137 w_rx_data[2] -.sym 18139 w_rx_data[0] -.sym 18141 io_ctrl_ins.tr_vc_2_state_SB_LUT4_I1_I3_SB_LUT4_I2_O[0] -.sym 18147 w_rx_data[4] -.sym 18150 w_rx_data[2] -.sym 18157 io_ctrl_ins.pmod_state_SB_DFFE_Q_E_SB_LUT4_O_I3[1] -.sym 18159 io_ctrl_ins.tr_vc_2_state_SB_LUT4_I1_I3_SB_LUT4_I2_O[0] -.sym 18162 io_ctrl_ins.pmod_dir_state[1] -.sym 18163 io_ctrl_ins.o_pmod[1] -.sym 18164 io_ctrl_ins.pmod_state_SB_DFFE_Q_E_SB_LUT4_O_I3[0] -.sym 18165 io_ctrl_ins.ldo2v8_state_SB_LUT4_I3_O[1] -.sym 18171 w_rx_data[0] -.sym 18174 io_ctrl_ins.debug_mode_SB_LUT4_I2_O[1] -.sym 18175 io_ctrl_ins.debug_mode[1] -.sym 18176 io_ctrl_ins.rf_mode[2] -.sym 18177 io_ctrl_ins.debug_mode[0] -.sym 18180 io_ctrl_ins.debug_mode[0] -.sym 18182 io_ctrl_ins.debug_mode[1] -.sym 18186 io_ctrl_ins.pmod_state_SB_DFFE_Q_E_SB_LUT4_O_I3[0] -.sym 18188 io_ctrl_ins.pmod_state_SB_DFFE_Q_E_SB_LUT4_O_I3[1] -.sym 18190 io_ctrl_ins.rf_mode_SB_DFFESR_Q_E +.sym 18070 w_rx_data[4] +.sym 18071 io_ctrl_ins.tr_vc_1_state_SB_LUT4_I0_I2[3] +.sym 18072 i_button_SB_LUT4_I3_O[1] +.sym 18073 i_config_SB_LUT4_I3_I2[2] +.sym 18074 io_ctrl_ins.tr_vc_2_state_SB_LUT4_I1_O[2] +.sym 18075 io_ctrl_ins.o_data_out_SB_DFFESR_Q_6_R[2] +.sym 18076 io_ctrl_ins.rx_h_b_state_SB_LUT4_I0_I2[3] +.sym 18077 w_rx_data[3] +.sym 18082 spi_if_ins.o_fetch_cmd_SB_LUT4_I3_O[0] +.sym 18084 io_ctrl_ins.o_data_out_SB_DFFESR_Q_6_R[1] +.sym 18086 io_ctrl_ins.o_data_out_SB_DFFESR_Q_3_D_SB_LUT4_O_I2[1] +.sym 18088 w_ioc[0] +.sym 18090 spi_if_ins.w_rx_data[2] +.sym 18092 io_ctrl_ins.o_data_out_SB_DFFESR_Q_E[3] +.sym 18095 io_ctrl_ins.o_pmod[3] +.sym 18098 i_smi_a1_SB_LUT4_I1_O[3] +.sym 18101 w_rx_data[3] +.sym 18102 w_rx_data[1] +.sym 18103 io_ctrl_ins.rf_mode[2] +.sym 18111 spi_if_ins.o_fetch_cmd_SB_LUT4_I3_O[0] +.sym 18113 io_ctrl_ins.o_data_out_SB_DFFESR_Q_E[3] +.sym 18114 io_ctrl_ins.led1_state_SB_LUT4_I3_O[3] +.sym 18115 io_ctrl_ins.o_data_out_SB_DFFESR_Q_R +.sym 18116 spi_if_ins.o_load_cmd_SB_LUT4_I2_O[1] +.sym 18117 io_ctrl_ins.led0_state_SB_LUT4_I3_O[3] +.sym 18119 io_ctrl_ins.tr_vc_2_state_SB_LUT4_I1_O[3] +.sym 18121 w_ioc[0] +.sym 18122 io_ctrl_ins.led0_state_SB_LUT4_I3_O[2] +.sym 18124 io_ctrl_ins.o_data_out_SB_DFFESR_Q_6_R[1] +.sym 18125 w_ioc[1] +.sym 18126 i_smi_a1_SB_LUT4_I1_O[3] +.sym 18128 io_ctrl_ins.led0_state_SB_LUT4_I3_O[1] +.sym 18129 io_ctrl_ins.led1_state_SB_LUT4_I3_O[2] +.sym 18130 i_config_SB_LUT4_I3_I2[2] +.sym 18131 io_ctrl_ins.tr_vc_2_state_SB_LUT4_I1_O[2] +.sym 18133 io_ctrl_ins.pmod_dir_state[3] +.sym 18135 io_ctrl_ins.led0_state_SB_LUT4_I3_O[0] +.sym 18136 o_shdn_rx_lna$SB_IO_OUT +.sym 18141 io_ctrl_ins.o_pmod[1] +.sym 18142 io_ctrl_ins.led1_state_SB_LUT4_I3_O[0] +.sym 18144 io_ctrl_ins.o_data_out_SB_DFFESR_Q_6_R[1] +.sym 18145 w_ioc[0] +.sym 18147 w_ioc[1] +.sym 18150 w_ioc[0] +.sym 18151 io_ctrl_ins.o_data_out_SB_DFFESR_Q_6_R[1] +.sym 18152 w_ioc[1] +.sym 18156 o_shdn_rx_lna$SB_IO_OUT +.sym 18157 io_ctrl_ins.o_pmod[1] +.sym 18158 spi_if_ins.o_fetch_cmd_SB_LUT4_I3_O[0] +.sym 18159 w_ioc[0] +.sym 18162 io_ctrl_ins.tr_vc_2_state_SB_LUT4_I1_O[3] +.sym 18163 io_ctrl_ins.tr_vc_2_state_SB_LUT4_I1_O[2] +.sym 18164 io_ctrl_ins.led0_state_SB_LUT4_I3_O[1] +.sym 18165 io_ctrl_ins.pmod_dir_state[3] +.sym 18168 spi_if_ins.o_fetch_cmd_SB_LUT4_I3_O[0] +.sym 18169 w_ioc[0] +.sym 18174 io_ctrl_ins.led0_state_SB_LUT4_I3_O[0] +.sym 18175 io_ctrl_ins.led0_state_SB_LUT4_I3_O[3] +.sym 18176 io_ctrl_ins.led0_state_SB_LUT4_I3_O[1] +.sym 18177 io_ctrl_ins.led0_state_SB_LUT4_I3_O[2] +.sym 18180 io_ctrl_ins.led1_state_SB_LUT4_I3_O[0] +.sym 18181 io_ctrl_ins.led1_state_SB_LUT4_I3_O[3] +.sym 18182 io_ctrl_ins.led1_state_SB_LUT4_I3_O[2] +.sym 18183 io_ctrl_ins.led0_state_SB_LUT4_I3_O[1] +.sym 18186 spi_if_ins.o_load_cmd_SB_LUT4_I2_O[1] +.sym 18187 i_smi_a1_SB_LUT4_I1_O[3] +.sym 18188 i_config_SB_LUT4_I3_I2[2] +.sym 18190 io_ctrl_ins.o_data_out_SB_DFFESR_Q_E[3] .sym 18191 r_counter[0]_$glb_clk -.sym 18192 i_smi_a1_SB_LUT4_I1_O_SB_LUT4_O_I2_SB_LUT4_I0_O[2]_$glb_sr -.sym 18193 io_ctrl_ins.tr_vc_2_state_SB_LUT4_I1_O[2] -.sym 18194 w_tx_data_io[1] -.sym 18196 io_ctrl_ins.tr_vc_2_state_SB_LUT4_I1_O[3] -.sym 18198 io_ctrl_ins.rx_h_b_state_SB_LUT4_I0_O[1] -.sym 18199 w_tx_data_io[3] -.sym 18200 w_tx_data_io[2] -.sym 18201 io_ctrl_ins.debug_mode[0] -.sym 18205 io_ctrl_ins.rf_mode[2] -.sym 18206 io_ctrl_ins.tr_vc_2_state_SB_LUT4_I1_I3_SB_LUT4_I2_O[0] -.sym 18207 io_ctrl_ins.debug_mode_SB_LUT4_I0_O -.sym 18209 io_ctrl_ins.rf_mode[0] -.sym 18210 io_ctrl_ins.tr_vc_2_state_SB_LUT4_I1_I3[1] -.sym 18211 i_button$SB_IO_IN -.sym 18214 w_ioc[0] -.sym 18216 io_ctrl_ins.led0_state_SB_LUT4_I3_O[3] -.sym 18217 w_rx_data[0] -.sym 18220 o_led0$SB_IO_OUT -.sym 18222 i_smi_a1_SB_LUT4_I1_O_SB_LUT4_O_I2_SB_LUT4_I0_O[2] -.sym 18224 io_ctrl_ins.debug_mode_SB_LUT4_I0_O -.sym 18226 io_ctrl_ins.debug_mode_SB_LUT4_I2_O[3] -.sym 18235 io_ctrl_ins.rf_mode[0] -.sym 18236 io_ctrl_ins.o_data_out_SB_DFFESR_Q_6_R[0] -.sym 18238 i_smi_a1_SB_LUT4_I1_O_SB_LUT4_O_I2_SB_LUT4_I0_O[2] -.sym 18239 io_ctrl_ins.debug_mode_SB_LUT4_I0_O -.sym 18240 o_ldo_2v8_en -.sym 18241 spi_if_ins.o_load_cmd_SB_LUT4_I2_O[0] -.sym 18243 w_rx_data[1] -.sym 18244 w_ioc[0] -.sym 18245 io_ctrl_ins.pmod_state_SB_DFFE_Q_E -.sym 18246 io_ctrl_ins.tr_vc_2_state_SB_LUT4_I1_I3[1] -.sym 18248 io_ctrl_ins.tr_vc_2_state_SB_LUT4_I1_I3_SB_LUT4_I2_O[0] -.sym 18249 w_rx_data[2] -.sym 18251 o_shdn_rx_lna$SB_IO_OUT -.sym 18252 io_ctrl_ins.o_pmod[2] -.sym 18253 io_ctrl_ins.led1_state_SB_LUT4_I0_I2[1] -.sym 18254 o_shdn_tx_lna$SB_IO_OUT -.sym 18261 io_ctrl_ins.debug_mode[1] -.sym 18267 io_ctrl_ins.o_data_out_SB_DFFESR_Q_6_R[0] -.sym 18268 io_ctrl_ins.tr_vc_2_state_SB_LUT4_I1_I3_SB_LUT4_I2_O[0] -.sym 18269 io_ctrl_ins.debug_mode[1] -.sym 18270 o_shdn_rx_lna$SB_IO_OUT -.sym 18281 w_rx_data[2] -.sym 18285 io_ctrl_ins.debug_mode_SB_LUT4_I0_O -.sym 18291 i_smi_a1_SB_LUT4_I1_O_SB_LUT4_O_I2_SB_LUT4_I0_O[2] -.sym 18292 io_ctrl_ins.led1_state_SB_LUT4_I0_I2[1] -.sym 18294 spi_if_ins.o_load_cmd_SB_LUT4_I2_O[0] -.sym 18297 io_ctrl_ins.tr_vc_2_state_SB_LUT4_I1_I3[1] -.sym 18298 io_ctrl_ins.o_pmod[2] -.sym 18299 w_ioc[0] -.sym 18300 o_shdn_tx_lna$SB_IO_OUT -.sym 18305 w_rx_data[1] -.sym 18309 io_ctrl_ins.rf_mode[0] -.sym 18310 o_ldo_2v8_en -.sym 18311 io_ctrl_ins.led1_state_SB_LUT4_I0_I2[1] -.sym 18312 io_ctrl_ins.o_data_out_SB_DFFESR_Q_6_R[0] -.sym 18313 io_ctrl_ins.pmod_state_SB_DFFE_Q_E +.sym 18192 io_ctrl_ins.o_data_out_SB_DFFESR_Q_R +.sym 18193 io_ctrl_ins.rx_h_b_state_SB_LUT4_I0_I2[2] +.sym 18194 io_ctrl_ins.rf_pin_state[4] +.sym 18195 io_ctrl_ins.rf_pin_state[7] +.sym 18196 io_ctrl_ins.debug_mode_SB_LUT4_I2_O[2] +.sym 18197 io_ctrl_ins.rf_pin_state[6] +.sym 18198 io_ctrl_ins.tr_vc_1_b_state_SB_LUT4_I1_O[3] +.sym 18199 io_ctrl_ins.tr_vc_1_state_SB_LUT4_I0_I2[2] +.sym 18200 io_ctrl_ins.o_data_out_SB_DFFESR_Q_3_D_SB_LUT4_O_I2[0] +.sym 18207 io_ctrl_ins.pmod_state_SB_DFFE_Q_E +.sym 18208 io_ctrl_ins.led0_state_SB_LUT4_I3_O[2] +.sym 18209 io_ctrl_ins.pmod_dir_state[6] +.sym 18215 io_ctrl_ins.rx_h_b_state_SB_LUT4_I0_I2[1] +.sym 18217 io_ctrl_ins.o_pmod[6] +.sym 18219 w_rx_data[7] +.sym 18220 w_rx_data[5] +.sym 18223 w_rx_data[6] +.sym 18227 w_rx_data[2] +.sym 18228 o_tr_vc2$SB_IO_OUT +.sym 18234 w_rx_data[4] +.sym 18235 i_button$SB_IO_IN +.sym 18236 io_ctrl_ins.debug_mode[1] +.sym 18237 i_config_SB_LUT4_I3_I2[2] +.sym 18240 o_led1$SB_IO_OUT +.sym 18242 i_config_SB_LUT4_I3_I2[0] +.sym 18243 io_ctrl_ins.debug_mode_SB_LUT4_I2_O[1] +.sym 18244 i_button_SB_LUT4_I3_O[1] +.sym 18245 spi_if_ins.o_load_cmd_SB_LUT4_I2_O_SB_LUT4_I2_O +.sym 18246 io_ctrl_ins.rx_h_b_state_SB_LUT4_I0_I2[1] +.sym 18247 i_config_SB_LUT4_I3_I2[1] +.sym 18249 o_led0$SB_IO_OUT +.sym 18256 spi_if_ins.o_load_cmd_SB_LUT4_I2_O_SB_LUT4_I3_O[1] +.sym 18265 i_config[0]$SB_IO_IN +.sym 18267 io_ctrl_ins.debug_mode_SB_LUT4_I2_O[1] +.sym 18268 i_config_SB_LUT4_I3_I2[0] +.sym 18269 i_config[0]$SB_IO_IN +.sym 18270 i_config_SB_LUT4_I3_I2[2] +.sym 18281 w_rx_data[4] +.sym 18285 i_config_SB_LUT4_I3_I2[2] +.sym 18286 o_led1$SB_IO_OUT +.sym 18287 i_config_SB_LUT4_I3_I2[0] +.sym 18288 io_ctrl_ins.debug_mode[1] +.sym 18292 i_button_SB_LUT4_I3_O[1] +.sym 18293 spi_if_ins.o_load_cmd_SB_LUT4_I2_O_SB_LUT4_I3_O[1] +.sym 18297 i_button$SB_IO_IN +.sym 18299 i_config_SB_LUT4_I3_I2[2] +.sym 18303 o_led0$SB_IO_OUT +.sym 18304 i_config_SB_LUT4_I3_I2[2] +.sym 18305 i_config_SB_LUT4_I3_I2[1] +.sym 18306 i_config_SB_LUT4_I3_I2[0] +.sym 18311 io_ctrl_ins.rx_h_b_state_SB_LUT4_I0_I2[1] +.sym 18312 spi_if_ins.o_load_cmd_SB_LUT4_I2_O_SB_LUT4_I3_O[1] +.sym 18313 spi_if_ins.o_load_cmd_SB_LUT4_I2_O_SB_LUT4_I2_O .sym 18314 r_counter[0]_$glb_clk -.sym 18321 o_tr_vc2$SB_IO_OUT -.sym 18329 io_ctrl_ins.pmod_dir_state[3] -.sym 18330 i_config[3]$SB_IO_IN -.sym 18331 io_ctrl_ins.ldo2v8_state_SB_LUT4_I3_O[1] -.sym 18334 w_ioc[0] -.sym 18341 io_ctrl_ins.debug_mode_SB_LUT4_I2_O[1] -.sym 18343 o_rx_h_tx_l_b$SB_IO_OUT -.sym 18348 w_tx_data_io[3] -.sym 18359 io_ctrl_ins.led1_state_SB_DFFESR_Q_E -.sym 18360 w_rx_data[1] -.sym 18369 w_rx_data[2] -.sym 18377 w_rx_data[0] -.sym 18391 w_rx_data[1] -.sym 18429 w_rx_data[2] -.sym 18433 w_rx_data[0] -.sym 18436 io_ctrl_ins.led1_state_SB_DFFESR_Q_E +.sym 18315 i_smi_a1_SB_LUT4_I1_O[3]_$glb_sr +.sym 18316 io_ctrl_ins.o_pmod[3] +.sym 18317 io_ctrl_ins.o_pmod[2] +.sym 18318 io_ctrl_ins.debug_mode_SB_LUT4_I0_O +.sym 18319 io_ctrl_ins.o_pmod[1] +.sym 18320 io_ctrl_ins.debug_mode_SB_LUT4_I2_O[3] +.sym 18321 io_ctrl_ins.o_pmod[5] +.sym 18322 io_ctrl_ins.o_pmod[6] +.sym 18323 i_button_SB_LUT4_I3_O[0] +.sym 18329 io_ctrl_ins.tr_vc_1_state_SB_LUT4_I0_I2[2] +.sym 18330 i_button_SB_LUT4_I3_O[2] +.sym 18335 i_config[3]$SB_IO_IN +.sym 18336 io_ctrl_ins.o_data_out_SB_DFFESR_Q_6_E +.sym 18339 i_button$SB_IO_IN +.sym 18341 io_ctrl_ins.rf_mode[2] +.sym 18345 i_config[2]$SB_IO_IN +.sym 18349 i_config[1]$SB_IO_IN +.sym 18367 w_rx_data[0] +.sym 18368 spi_if_ins.o_load_cmd_SB_LUT4_I2_O_SB_LUT4_I2_O +.sym 18369 io_ctrl_ins.pmod_state_SB_DFFE_Q_E +.sym 18371 w_rx_data[3] +.sym 18377 w_rx_data[1] +.sym 18381 w_rx_data[2] +.sym 18396 w_rx_data[3] +.sym 18402 w_rx_data[1] +.sym 18408 io_ctrl_ins.pmod_state_SB_DFFE_Q_E +.sym 18417 w_rx_data[2] +.sym 18422 w_rx_data[0] +.sym 18436 spi_if_ins.o_load_cmd_SB_LUT4_I2_O_SB_LUT4_I2_O .sym 18437 r_counter[0]_$glb_clk -.sym 18438 i_smi_a1_SB_LUT4_I1_O_SB_LUT4_O_I2_SB_LUT4_I0_O[2]_$glb_sr +.sym 18438 i_smi_a1_SB_LUT4_I1_O[3]_$glb_sr +.sym 18444 o_tr_vc2$SB_IO_OUT +.sym 18455 io_ctrl_ins.debug_mode_SB_LUT4_I2_O[1] +.sym 18456 io_ctrl_ins.rf_mode[2] +.sym 18461 io_ctrl_ins.rf_mode[0] +.sym 18462 io_ctrl_ins.debug_mode_SB_LUT4_I0_O +.sym 18465 io_ctrl_ins.o_pmod[1] +.sym 18481 io_ctrl_ins.debug_mode_SB_LUT4_I2_O[1] +.sym 18482 io_ctrl_ins.debug_mode_SB_LUT4_I0_O +.sym 18484 io_ctrl_ins.debug_mode_SB_LUT4_I2_O[3] +.sym 18489 io_ctrl_ins.debug_mode_SB_LUT4_I2_O[1] +.sym 18501 io_ctrl_ins.rf_mode[2] +.sym 18503 io_ctrl_ins.rf_pin_state[2] +.sym 18509 io_ctrl_ins.rf_pin_state[1] +.sym 18513 io_ctrl_ins.debug_mode_SB_LUT4_I2_O[1] +.sym 18514 io_ctrl_ins.rf_pin_state[2] +.sym 18515 io_ctrl_ins.debug_mode_SB_LUT4_I2_O[3] +.sym 18516 io_ctrl_ins.rf_mode[2] +.sym 18525 io_ctrl_ins.rf_pin_state[1] +.sym 18526 io_ctrl_ins.debug_mode_SB_LUT4_I2_O[1] +.sym 18527 io_ctrl_ins.debug_mode_SB_LUT4_I2_O[3] +.sym 18559 io_ctrl_ins.debug_mode_SB_LUT4_I0_O +.sym 18560 r_counter[0]_$glb_clk .sym 18562 i_config[1]$SB_IO_IN .sym 18564 i_config[2]$SB_IO_IN +.sym 18584 io_ctrl_ins.rf_pin_state[3] .sym 18636 io_smi_data[4]$SB_IO_OUT .sym 18641 i_smi_a3$SB_IO_IN -.sym 18649 i_smi_a3$SB_IO_IN -.sym 18654 io_smi_data[4]$SB_IO_OUT +.sym 18645 i_smi_a3$SB_IO_IN +.sym 18658 io_smi_data[4]$SB_IO_OUT .sym 18693 i_sck$SB_IO_IN .sym 18695 i_mosi$SB_IO_IN -.sym 18712 rx_09_fifo.rd_addr_gray[0] -.sym 18715 i_smi_a3$SB_IO_IN -.sym 18719 rx_09_fifo.rd_addr_gray[5] -.sym 18724 io_smi_data[4]$SB_IO_OUT -.sym 18727 w_smi_data_output[5] -.sym 18742 io_smi_data[4]$SB_IO_OUT -.sym 18763 i_smi_a3$SB_IO_IN -.sym 18767 rx_09_fifo.rd_addr_gray[5] -.sym 18773 w_smi_data_output[5] -.sym 18775 i_smi_a3$SB_IO_IN -.sym 18781 rx_09_fifo.rd_addr_gray[0] -.sym 18783 lvds_clock_buf .sym 18785 $io_pmod[3]$iobuf_i -.sym 18821 w_smi_data_output[5] -.sym 18831 rx_09_fifo.rd_addr_gray[0] -.sym 18834 $io_pmod[2]$iobuf_i -.sym 18844 io_pmod_SB_DFFSS_Q_D_SB_LUT4_O_I0_SB_LUT4_O_I2[1] -.sym 18846 io_pmod_SB_DFFSS_Q_D_SB_LUT4_O_I0_SB_LUT4_O_3_I2[3] -.sym 18851 io_pmod_SB_DFFSS_Q_D_SB_LUT4_O_I0_SB_LUT4_O_2_I0[3] -.sym 18852 spi_if_ins.spi.o_spi_miso_SB_DFFE_Q_E -.sym 18855 rx_09_fifo.rd_addr[0] -.sym 18868 io_pmod_SB_DFFSS_Q_D_SB_LUT4_O_I0_SB_LUT4_O_1_I1[0] -.sym 18869 io_pmod_SB_DFFSS_Q_D_SB_LUT4_O_I0_SB_LUT4_O_1_I1_SB_LUT4_O_I2[2] -.sym 18871 io_pmod_SB_DFFSS_Q_D_SB_LUT4_O_I0_SB_LUT4_O_3_I2[1] -.sym 18872 io_pmod_SB_DFFSS_Q_D_SB_LUT4_O_I0_SB_LUT4_O_3_I2[0] -.sym 18873 io_pmod_SB_DFFSS_Q_D_SB_LUT4_O_I0_SB_LUT4_O_3_I2[3] -.sym 18874 io_pmod_SB_DFFSS_Q_D_SB_LUT4_O_I0[2] -.sym 18875 io_pmod_SB_DFFSS_Q_D_SB_LUT4_O_I0_SB_LUT4_O_1_I1_SB_LUT4_O_I0[2] -.sym 18876 io_pmod_SB_DFFSS_Q_D_SB_LUT4_O_I0_SB_LUT4_O_1_I1_SB_LUT4_O_I0[0] -.sym 18877 rx_09_fifo.rd_addr[0] -.sym 18879 io_pmod_SB_DFFSS_Q_D_SB_LUT4_O_I0_SB_LUT4_O_3_I2[2] -.sym 18881 io_pmod_SB_DFFSS_Q_D_SB_LUT4_O_I0_SB_LUT4_O_1_I1_SB_LUT4_O_I0[1] -.sym 18883 rx_09_fifo.rd_addr_gray_SB_LUT4_I2_O[1] -.sym 18884 io_pmod_SB_DFFSS_Q_D_SB_LUT4_O_I0[0] -.sym 18886 io_pmod_SB_DFFSS_Q_D_SB_LUT4_O_I0_SB_LUT4_O_1_I1_SB_LUT4_O_I2[1] -.sym 18887 io_pmod_SB_DFFSS_Q_D_SB_LUT4_O_I0_SB_LUT4_O_1_I1_SB_LUT4_O_I0[3] -.sym 18888 io_pmod_SB_DFFSS_Q_D_SB_LUT4_O_I0_SB_LUT4_O_1_I1[2] -.sym 18889 io_pmod_SB_DFFSS_Q_D_SB_LUT4_O_I0_SB_LUT4_O_1_I1[1] -.sym 18890 rx_09_fifo.wr_addr_gray_rd_r[0] -.sym 18891 io_pmod_SB_DFFSS_Q_D_SB_LUT4_O_I0[3] -.sym 18892 rx_09_fifo.rd_addr_gray_SB_LUT4_I2_O[2] -.sym 18893 io_pmod_SB_DFFSS_Q_D_SB_LUT4_O_I0_SB_LUT4_O_1_I1_SB_LUT4_O_I2[3] -.sym 18894 io_pmod_SB_DFFSS_Q_D_SB_LUT4_O_I0[1] -.sym 18899 io_pmod_SB_DFFSS_Q_D_SB_LUT4_O_I0[0] -.sym 18900 io_pmod_SB_DFFSS_Q_D_SB_LUT4_O_I0[2] -.sym 18901 io_pmod_SB_DFFSS_Q_D_SB_LUT4_O_I0[3] -.sym 18902 io_pmod_SB_DFFSS_Q_D_SB_LUT4_O_I0[1] -.sym 18906 io_pmod_SB_DFFSS_Q_D_SB_LUT4_O_I0_SB_LUT4_O_1_I1[0] -.sym 18907 io_pmod_SB_DFFSS_Q_D_SB_LUT4_O_I0_SB_LUT4_O_1_I1[1] -.sym 18908 io_pmod_SB_DFFSS_Q_D_SB_LUT4_O_I0_SB_LUT4_O_1_I1[2] -.sym 18911 io_pmod_SB_DFFSS_Q_D_SB_LUT4_O_I0_SB_LUT4_O_1_I1_SB_LUT4_O_I0[2] -.sym 18912 io_pmod_SB_DFFSS_Q_D_SB_LUT4_O_I0_SB_LUT4_O_1_I1_SB_LUT4_O_I0[0] -.sym 18913 io_pmod_SB_DFFSS_Q_D_SB_LUT4_O_I0_SB_LUT4_O_1_I1_SB_LUT4_O_I0[1] -.sym 18914 io_pmod_SB_DFFSS_Q_D_SB_LUT4_O_I0_SB_LUT4_O_1_I1_SB_LUT4_O_I0[3] -.sym 18917 rx_09_fifo.rd_addr_gray_SB_LUT4_I2_O[2] -.sym 18919 rx_09_fifo.rd_addr_gray_SB_LUT4_I2_O[1] -.sym 18920 io_pmod_SB_DFFSS_Q_D_SB_LUT4_O_I0_SB_LUT4_O_3_I2[0] -.sym 18923 io_pmod_SB_DFFSS_Q_D_SB_LUT4_O_I0_SB_LUT4_O_3_I2[2] -.sym 18924 io_pmod_SB_DFFSS_Q_D_SB_LUT4_O_I0_SB_LUT4_O_3_I2[1] -.sym 18925 io_pmod_SB_DFFSS_Q_D_SB_LUT4_O_I0_SB_LUT4_O_3_I2[0] -.sym 18926 io_pmod_SB_DFFSS_Q_D_SB_LUT4_O_I0_SB_LUT4_O_3_I2[3] -.sym 18929 rx_09_fifo.wr_addr_gray_rd_r[0] -.sym 18932 rx_09_fifo.rd_addr[0] -.sym 18941 io_pmod_SB_DFFSS_Q_D_SB_LUT4_O_I0_SB_LUT4_O_1_I1_SB_LUT4_O_I2[2] -.sym 18942 io_pmod_SB_DFFSS_Q_D_SB_LUT4_O_I0_SB_LUT4_O_1_I1_SB_LUT4_O_I2[1] -.sym 18943 io_pmod_SB_DFFSS_Q_D_SB_LUT4_O_I0_SB_LUT4_O_1_I1_SB_LUT4_O_I0[0] -.sym 18944 io_pmod_SB_DFFSS_Q_D_SB_LUT4_O_I0_SB_LUT4_O_1_I1_SB_LUT4_O_I2[3] +.sym 18851 io_smi_data[5]$SB_IO_OUT +.sym 18868 sys_ctrl_ins.reset_count_SB_DFFESR_Q_E +.sym 18870 sys_ctrl_ins.reset_cmd +.sym 18877 sys_ctrl_ins.reset_count[3] +.sym 18880 sys_ctrl_ins.reset_count[0] +.sym 18881 sys_ctrl_ins.reset_cmd +.sym 18889 sys_ctrl_ins.o_soft_reset_SB_DFFESS_Q_S +.sym 18892 sys_ctrl_ins.reset_count[2] +.sym 18895 sys_ctrl_ins.reset_count[1] +.sym 18897 sys_ctrl_ins.o_soft_reset_SB_DFFESS_Q_S +.sym 18898 $nextpnr_ICESTORM_LC_16$O +.sym 18900 sys_ctrl_ins.reset_count[0] +.sym 18904 sys_ctrl_ins.reset_count_SB_DFFESR_Q_D_SB_LUT4_O_I3[2] +.sym 18906 sys_ctrl_ins.reset_count[1] +.sym 18910 sys_ctrl_ins.reset_count_SB_DFFESR_Q_D_SB_LUT4_O_I3[3] +.sym 18911 sys_ctrl_ins.o_soft_reset_SB_DFFESS_Q_S +.sym 18912 sys_ctrl_ins.reset_count[2] +.sym 18914 sys_ctrl_ins.reset_count_SB_DFFESR_Q_D_SB_LUT4_O_I3[2] +.sym 18917 sys_ctrl_ins.o_soft_reset_SB_DFFESS_Q_S +.sym 18918 sys_ctrl_ins.reset_count[3] +.sym 18920 sys_ctrl_ins.reset_count_SB_DFFESR_Q_D_SB_LUT4_O_I3[3] +.sym 18923 sys_ctrl_ins.reset_cmd +.sym 18924 sys_ctrl_ins.o_soft_reset_SB_DFFESS_Q_S +.sym 18929 sys_ctrl_ins.reset_count[0] +.sym 18930 sys_ctrl_ins.reset_count[1] +.sym 18931 sys_ctrl_ins.o_soft_reset_SB_DFFESS_Q_S +.sym 18938 sys_ctrl_ins.reset_count[0] +.sym 18941 sys_ctrl_ins.reset_count[0] +.sym 18942 sys_ctrl_ins.reset_count[3] +.sym 18943 sys_ctrl_ins.reset_count[2] +.sym 18944 sys_ctrl_ins.reset_count[1] +.sym 18945 sys_ctrl_ins.reset_count_SB_DFFESR_Q_E .sym 18946 r_counter[0]_$glb_clk -.sym 18947 i_smi_a1_SB_LUT4_I1_O_SB_LUT4_O_I2_SB_LUT4_I0_O[2]_$glb_sr -.sym 18960 io_pmod[7]$SB_IO_IN -.sym 18989 rx_09_fifo.wr_addr_gray_rd_r[3] -.sym 18992 rx_09_fifo.rd_addr_gray_SB_LUT4_I2_O[3] -.sym 18994 io_pmod_SB_DFFSS_Q_D_SB_LUT4_O_I0_SB_LUT4_O_1_I1_SB_LUT4_O_I0[3] -.sym 18995 rx_09_fifo.rd_addr_gray_SB_LUT4_I2_O[6] -.sym 18998 rx_09_fifo.rd_addr_gray_SB_LUT4_I2_O[1] -.sym 18999 rx_09_fifo.rd_addr_gray_SB_LUT4_I2_O[2] -.sym 19008 rx_09_fifo.rd_addr[0] -.sym 19016 smi_ctrl_ins.r_fifo_09_pull_SB_LUT4_I3_1_O -.sym 19022 rx_09_fifo.rd_addr_gray_SB_LUT4_I2_O[1] -.sym 19025 rx_09_fifo.rd_addr[0] -.sym 19030 io_pmod_SB_DFFSS_Q_D_SB_LUT4_O_I0_SB_LUT4_O_1_I1_SB_LUT4_O_I0[3] -.sym 19036 rx_09_fifo.wr_addr_gray_rd_r[3] -.sym 19037 rx_09_fifo.rd_addr_gray_SB_LUT4_I2_O[3] -.sym 19040 rx_09_fifo.rd_addr[0] -.sym 19046 rx_09_fifo.rd_addr_gray_SB_LUT4_I2_O[6] -.sym 19047 io_pmod_SB_DFFSS_Q_D_SB_LUT4_O_I0_SB_LUT4_O_1_I1_SB_LUT4_O_I0[3] -.sym 19053 rx_09_fifo.rd_addr_gray_SB_LUT4_I2_O[1] -.sym 19060 rx_09_fifo.rd_addr_gray_SB_LUT4_I2_O[6] -.sym 19064 rx_09_fifo.rd_addr_gray_SB_LUT4_I2_O[2] -.sym 19068 smi_ctrl_ins.r_fifo_09_pull_SB_LUT4_I3_1_O -.sym 19069 r_counter[0]_$glb_clk -.sym 19070 i_smi_a1_SB_LUT4_I1_O_SB_LUT4_O_I2_SB_LUT4_I0_O[2]_$glb_sr -.sym 19092 w_smi_read_req -.sym 19098 rx_09_fifo.rd_addr[0] -.sym 19102 smi_ctrl_ins.r_fifo_09_pull_SB_LUT4_I3_1_O -.sym 19114 spi_if_ins.spi.r_tx_bit_count[2] -.sym 19116 i_sck$SB_IO_IN -.sym 19120 rx_09_fifo.wr_addr_gray_rd[3] -.sym 19124 spi_if_ins.r_tx_data_valid_SB_LUT4_I3_O_SB_LUT4_O_I0_SB_LUT4_O_I3[2] -.sym 19126 spi_if_ins.r_tx_data_valid_SB_LUT4_I3_O[2] -.sym 19131 spi_if_ins.spi.SCKr[0] -.sym 19138 spi_if_ins.spi.SCKr[1] -.sym 19143 spi_if_ins.spi.SCKr[2] -.sym 19148 rx_09_fifo.wr_addr_gray_rd[3] -.sym 19151 spi_if_ins.r_tx_data_valid_SB_LUT4_I3_O_SB_LUT4_O_I0_SB_LUT4_O_I3[2] -.sym 19152 spi_if_ins.spi.r_tx_bit_count[2] -.sym 19153 spi_if_ins.spi.SCKr[1] -.sym 19154 spi_if_ins.spi.SCKr[2] -.sym 19160 spi_if_ins.spi.SCKr[0] -.sym 19164 i_sck$SB_IO_IN -.sym 19170 spi_if_ins.r_tx_data_valid_SB_LUT4_I3_O[2] -.sym 19171 spi_if_ins.spi.SCKr[2] -.sym 19172 spi_if_ins.spi.SCKr[1] -.sym 19182 spi_if_ins.r_tx_data_valid_SB_LUT4_I3_O[2] -.sym 19189 spi_if_ins.spi.SCKr[1] +.sym 18947 sys_ctrl_ins.reset_cmd +.sym 18964 sys_ctrl_ins.reset_count_SB_DFFESR_Q_E +.sym 18968 int_miso +.sym 18992 rx_09_fifo.rd_addr_gray[0] +.sym 18996 i_smi_a2_SB_LUT4_I1_O_SB_LUT4_O_I2_SB_CARRY_CO_I1[4] +.sym 19002 i_smi_a2_SB_LUT4_I1_O_SB_LUT4_O_I2_SB_CARRY_CO_I1[5] +.sym 19021 $nextpnr_ICESTORM_LC_17$O +.sym 19023 i_smi_a2_SB_LUT4_I1_O_SB_LUT4_O_I2_SB_CARRY_CO_I1[4] +.sym 19027 $nextpnr_ICESTORM_LC_18$I3 +.sym 19029 i_smi_a2_SB_LUT4_I1_O_SB_LUT4_O_I2_SB_CARRY_CO_I1[5] +.sym 19037 $nextpnr_ICESTORM_LC_18$I3 +.sym 19061 rx_09_fifo.rd_addr_gray[0] +.sym 19069 lvds_clock_buf +.sym 19083 i_ss$SB_IO_IN +.sym 19084 lvds_rx_09_inst.r_state_if_SB_LUT4_I2_O[0] +.sym 19100 sys_ctrl_ins.o_soft_reset_SB_DFFESS_Q_S +.sym 19127 i_sck$SB_IO_IN +.sym 19136 spi_if_ins.r_tx_data_valid_SB_LUT4_I3_O[1] +.sym 19143 spi_if_ins.spi.SCKr[0] +.sym 19145 spi_if_ins.spi.SCKr[0] +.sym 19177 spi_if_ins.r_tx_data_valid_SB_LUT4_I3_O[1] +.sym 19188 i_sck$SB_IO_IN .sym 19192 r_counter[0]_$glb_clk -.sym 19206 i_mosi$SB_IO_IN -.sym 19221 $PACKER_VCC_NET -.sym 19224 $io_pmod[2]$iobuf_i -.sym 19228 smi_ctrl_ins.int_cnt_24[5] -.sym 19256 i_smi_a2_SB_LUT4_I1_O_SB_LUT4_I3_1_I2[2] -.sym 19260 smi_ctrl_ins.r_fifo_24_pull_SB_LUT4_I1_O[2] -.sym 19261 i_smi_soe_se$rename$0 -.sym 19262 smi_ctrl_ins.int_cnt_24_SB_DFFESR_Q_E -.sym 19274 i_smi_a2_SB_LUT4_I1_O_SB_LUT4_I3_1_I2[2] -.sym 19275 smi_ctrl_ins.r_fifo_24_pull_SB_LUT4_I1_O[2] -.sym 19276 i_smi_soe_se$rename$0 -.sym 19314 smi_ctrl_ins.int_cnt_24_SB_DFFESR_Q_E +.sym 19206 lvds_rx_09_inst.r_state_if_SB_LUT4_I2_O[0] +.sym 19225 io_pmod[2]$SB_IO_IN +.sym 19228 w_smi_read_req +.sym 19241 io_pmod[2]$SB_IO_IN +.sym 19246 spi_if_ins.spi.o_spi_miso_SB_DFFE_Q_E +.sym 19257 spi_if_ins.spi.o_spi_miso_SB_DFFE_Q_D_SB_LUT4_O_I2[1] +.sym 19258 spi_if_ins.r_tx_data_valid_SB_LUT4_I3_O[2] +.sym 19259 w_rx_24_fifo_empty +.sym 19264 spi_if_ins.r_tx_byte[7] +.sym 19274 w_rx_24_fifo_empty +.sym 19277 io_pmod[2]$SB_IO_IN +.sym 19304 spi_if_ins.spi.o_spi_miso_SB_DFFE_Q_D_SB_LUT4_O_I2[1] +.sym 19306 spi_if_ins.r_tx_byte[7] +.sym 19307 spi_if_ins.r_tx_data_valid_SB_LUT4_I3_O[2] +.sym 19314 spi_if_ins.spi.o_spi_miso_SB_DFFE_Q_E .sym 19315 r_counter[0]_$glb_clk -.sym 19316 i_smi_a1_SB_LUT4_I1_O_SB_LUT4_O_I2_SB_LUT4_I0_O[2]_$glb_sr -.sym 19328 i_config[1]$SB_IO_IN -.sym 19333 smi_ctrl_ins.int_cnt_24[5] -.sym 19341 io_pmod[2]$SB_IO_IN -.sym 19348 spi_if_ins.w_rx_data[6] -.sym 19361 spi_if_ins.spi.r_rx_bit_count[0] -.sym 19362 i_ss$SB_IO_IN -.sym 19371 spi_if_ins.spi.r_rx_bit_count[1] -.sym 19376 spi_if_ins.spi.r_rx_bit_count[2] +.sym 19329 i_smi_a1_SB_LUT4_I1_O_SB_LUT4_O_I0[3] +.sym 19360 spi_if_ins.spi.r_rx_bit_count[2] +.sym 19371 i_ss$SB_IO_IN +.sym 19372 spi_if_ins.spi.r_rx_bit_count[0] +.sym 19377 spi_if_ins.spi.r_rx_bit_count[1] .sym 19390 $nextpnr_ICESTORM_LC_14$O .sym 19392 spi_if_ins.spi.r_rx_bit_count[0] .sym 19396 spi_if_ins.spi.r_rx_bit_count_SB_DFFR_Q_D_SB_LUT4_O_I3[2] -.sym 19398 spi_if_ins.spi.r_rx_bit_count[1] -.sym 19403 spi_if_ins.spi.r_rx_bit_count[2] +.sym 19399 spi_if_ins.spi.r_rx_bit_count[1] +.sym 19405 spi_if_ins.spi.r_rx_bit_count[2] .sym 19406 spi_if_ins.spi.r_rx_bit_count_SB_DFFR_Q_D_SB_LUT4_O_I3[2] -.sym 19411 spi_if_ins.spi.r_rx_bit_count[0] -.sym 19421 spi_if_ins.spi.r_rx_bit_count[0] -.sym 19424 spi_if_ins.spi.r_rx_bit_count[1] +.sym 19409 spi_if_ins.spi.r_rx_bit_count[0] +.sym 19411 spi_if_ins.spi.r_rx_bit_count[1] +.sym 19428 spi_if_ins.spi.r_rx_bit_count[0] .sym 19438 i_sck$SB_IO_IN_$glb_clk .sym 19439 i_ss$SB_IO_IN -.sym 19452 lvds_rx_09_inst.r_state_if_SB_LUT4_I2_O[0] -.sym 19474 spi_if_ins.w_rx_data[6] -.sym 19483 spi_if_ins.spi.r3_rx_done_SB_LUT4_I2_O -.sym 19486 spi_if_ins.spi.r_rx_bit_count[1] -.sym 19491 spi_if_ins.spi.r_rx_bit_count[2] -.sym 19492 spi_if_ins.spi.r_rx_bit_count[0] -.sym 19498 spi_if_ins.spi.r_rx_byte[6] -.sym 19512 sys_ctrl_ins.reset_count_SB_DFFESR_Q_E -.sym 19520 spi_if_ins.spi.r_rx_byte[6] -.sym 19526 sys_ctrl_ins.reset_count_SB_DFFESR_Q_E -.sym 19532 spi_if_ins.spi.r_rx_bit_count[2] -.sym 19533 spi_if_ins.spi.r_rx_bit_count[0] +.sym 19452 i_mosi$SB_IO_IN +.sym 19483 spi_if_ins.spi.r_rx_bit_count[2] +.sym 19484 spi_if_ins.spi.r_rx_bit_count[1] +.sym 19487 spi_if_ins.spi.r_rx_bit_count[0] +.sym 19495 spi_if_ins.spi.r_rx_byte[6] +.sym 19508 spi_if_ins.spi.r3_rx_done_SB_LUT4_I2_O +.sym 19517 spi_if_ins.spi.r_rx_byte[6] +.sym 19533 spi_if_ins.spi.r_rx_bit_count[2] .sym 19534 spi_if_ins.spi.r_rx_bit_count[1] -.sym 19556 spi_if_ins.spi.r_rx_bit_count[1] -.sym 19557 spi_if_ins.spi.r_rx_bit_count[0] -.sym 19558 spi_if_ins.spi.r_rx_bit_count[2] +.sym 19535 spi_if_ins.spi.r_rx_bit_count[0] +.sym 19557 spi_if_ins.spi.r_rx_bit_count[2] +.sym 19558 spi_if_ins.spi.r_rx_bit_count[1] +.sym 19559 spi_if_ins.spi.r_rx_bit_count[0] .sym 19560 spi_if_ins.spi.r3_rx_done_SB_LUT4_I2_O .sym 19561 r_counter[0]_$glb_clk -.sym 19576 spi_if_ins.spi.r3_rx_done_SB_LUT4_I2_O +.sym 19575 spi_if_ins.w_rx_data[6] +.sym 19577 i_ss_SB_LUT4_I3_O .sym 19582 i_smi_soe_se$rename$0 -.sym 19583 spi_if_ins.spi.r_rx_done_SB_DFFER_Q_D[1] -.sym 19590 i_ss_SB_LUT4_I3_O -.sym 19606 i_ss_SB_LUT4_I3_O -.sym 19607 spi_if_ins.spi.r_rx_done_SB_DFFER_Q_D[1] -.sym 19609 spi_if_ins.spi.r_temp_rx_byte[2] -.sym 19610 i_mosi$SB_IO_IN -.sym 19612 spi_if_ins.spi.r_temp_rx_byte[0] -.sym 19613 spi_if_ins.spi.r_temp_rx_byte[4] -.sym 19615 i_ss$SB_IO_IN -.sym 19616 spi_if_ins.spi.r_temp_rx_byte[3] -.sym 19623 spi_if_ins.spi.r_temp_rx_byte[1] -.sym 19630 spi_if_ins.spi.r_temp_rx_byte[5] -.sym 19639 i_mosi$SB_IO_IN -.sym 19645 spi_if_ins.spi.r_temp_rx_byte[3] -.sym 19651 spi_if_ins.spi.r_temp_rx_byte[4] -.sym 19657 spi_if_ins.spi.r_temp_rx_byte[0] -.sym 19662 spi_if_ins.spi.r_temp_rx_byte[2] -.sym 19669 spi_if_ins.spi.r_temp_rx_byte[1] +.sym 19583 spi_if_ins.spi.r_rx_done_SB_DFFER_Q_E +.sym 19608 i_ss$SB_IO_IN +.sym 19611 spi_if_ins.spi.r_rx_done_SB_DFFER_Q_D[1] +.sym 19616 spi_if_ins.spi.r_temp_rx_byte[5] +.sym 19631 spi_if_ins.spi.r_rx_done_SB_DFFER_Q_D_SB_LUT4_I3_O +.sym 19656 i_ss$SB_IO_IN +.sym 19657 spi_if_ins.spi.r_rx_done_SB_DFFER_Q_D[1] .sym 19676 spi_if_ins.spi.r_temp_rx_byte[5] -.sym 19679 spi_if_ins.spi.r_rx_done_SB_DFFER_Q_D[1] -.sym 19682 i_ss$SB_IO_IN -.sym 19683 i_ss_SB_LUT4_I3_O +.sym 19683 spi_if_ins.spi.r_rx_done_SB_DFFER_Q_D_SB_LUT4_I3_O .sym 19684 i_sck$SB_IO_IN_$glb_clk -.sym 19697 io_ctrl_ins.o_data_out_SB_DFFESR_Q_R -.sym 19711 spi_if_ins.w_rx_data[2] -.sym 19717 spi_if_ins.w_rx_data[0] -.sym 19728 spi_if_ins.spi.r_temp_rx_byte[4] -.sym 19730 spi_if_ins.spi.r_temp_rx_byte[1] -.sym 19731 spi_if_ins.spi.r_temp_rx_byte[3] -.sym 19732 spi_if_ins.spi.r_temp_rx_byte[2] -.sym 19735 spi_if_ins.spi.r_temp_rx_byte[0] -.sym 19738 spi_if_ins.spi.r_rx_done_SB_DFFER_Q_D_SB_LUT4_I3_O -.sym 19741 spi_if_ins.spi.r_temp_rx_byte[6] -.sym 19753 i_mosi$SB_IO_IN -.sym 19763 i_mosi$SB_IO_IN -.sym 19767 spi_if_ins.spi.r_temp_rx_byte[3] -.sym 19775 spi_if_ins.spi.r_temp_rx_byte[1] -.sym 19785 spi_if_ins.spi.r_temp_rx_byte[6] -.sym 19792 spi_if_ins.spi.r_temp_rx_byte[0] -.sym 19799 spi_if_ins.spi.r_temp_rx_byte[2] -.sym 19804 spi_if_ins.spi.r_temp_rx_byte[4] -.sym 19806 spi_if_ins.spi.r_rx_done_SB_DFFER_Q_D_SB_LUT4_I3_O +.sym 19734 spi_if_ins.spi.r_temp_rx_byte[4] +.sym 19745 i_ss_SB_LUT4_I3_O +.sym 19787 spi_if_ins.spi.r_temp_rx_byte[4] +.sym 19806 i_ss_SB_LUT4_I3_O .sym 19807 i_sck$SB_IO_IN_$glb_clk -.sym 19850 spi_if_ins.spi.r_rx_byte[0] -.sym 19851 spi_if_ins.spi.r_rx_byte[4] -.sym 19852 spi_if_ins.spi.r3_rx_done_SB_LUT4_I2_O -.sym 19854 spi_if_ins.spi.r_rx_byte[7] -.sym 19855 spi_if_ins.spi.r_rx_byte[1] -.sym 19856 spi_if_ins.spi.r_rx_byte[3] -.sym 19860 spi_if_ins.spi.r_rx_byte[2] -.sym 19865 spi_if_ins.spi.r_rx_byte[5] -.sym 19883 spi_if_ins.spi.r_rx_byte[3] -.sym 19890 spi_if_ins.spi.r_rx_byte[0] -.sym 19896 spi_if_ins.spi.r_rx_byte[4] -.sym 19904 spi_if_ins.spi.r_rx_byte[5] -.sym 19915 spi_if_ins.spi.r_rx_byte[1] -.sym 19920 spi_if_ins.spi.r_rx_byte[2] -.sym 19926 spi_if_ins.spi.r_rx_byte[7] -.sym 19929 spi_if_ins.spi.r3_rx_done_SB_LUT4_I2_O -.sym 19930 r_counter[0]_$glb_clk -.sym 19957 io_ctrl_ins.rf_pin_state[7] -.sym 19963 io_ctrl_ins.rf_pin_state[6] -.sym 19965 io_ctrl_ins.debug_mode_SB_LUT4_I2_O[2] -.sym 19966 w_rx_data[3] -.sym 19978 spi_if_ins.w_rx_data[1] -.sym 19979 spi_if_ins.w_rx_data[6] -.sym 19981 spi_if_ins.w_rx_data[3] -.sym 19982 spi_if_ins.w_rx_data[0] -.sym 19983 spi_if_ins.w_rx_data[4] -.sym 19984 spi_if_ins.w_rx_data[5] -.sym 19987 spi_if_ins.w_rx_data[2] -.sym 19988 spi_if_ins.o_load_cmd_SB_DFFESR_Q_D_SB_LUT4_I1_O[0] -.sym 20000 spi_if_ins.o_data_in_SB_DFFE_Q_E -.sym 20008 spi_if_ins.o_load_cmd_SB_DFFESR_Q_D_SB_LUT4_I1_O[0] -.sym 20012 spi_if_ins.w_rx_data[3] -.sym 20021 spi_if_ins.w_rx_data[1] -.sym 20027 spi_if_ins.w_rx_data[6] -.sym 20031 spi_if_ins.w_rx_data[4] -.sym 20038 spi_if_ins.w_rx_data[2] -.sym 20044 spi_if_ins.w_rx_data[0] -.sym 20051 spi_if_ins.w_rx_data[5] -.sym 20052 spi_if_ins.o_data_in_SB_DFFE_Q_E -.sym 20053 r_counter[0]_$glb_clk -.sym 20066 i_config[2]$SB_IO_IN -.sym 20069 w_rx_data[2] -.sym 20074 io_pmod[2]$SB_IO_IN -.sym 20080 w_rx_data[1] -.sym 20087 i_config[0]$SB_IO_IN -.sym 20097 w_rx_data[3] -.sym 20099 w_rx_data[6] -.sym 20100 w_rx_data[4] -.sym 20102 w_rx_data[0] -.sym 20103 w_rx_data[5] -.sym 20104 w_rx_data[7] -.sym 20105 io_ctrl_ins.led1_state_SB_LUT4_I0_I2[1] -.sym 20107 io_ctrl_ins.o_pmod[4] -.sym 20109 io_ctrl_ins.o_data_out_SB_DFFESR_Q_6_R[0] -.sym 20110 io_ctrl_ins.pmod_state_SB_DFFE_Q_E_SB_LUT4_O_I3[0] -.sym 20111 io_ctrl_ins.o_data_out_SB_DFFESR_Q_6_R[1] -.sym 20114 io_ctrl_ins.rf_pin_state_SB_DFFE_Q_E -.sym 20115 i_config[1]$SB_IO_IN -.sym 20129 io_ctrl_ins.o_data_out_SB_DFFESR_Q_6_R[0] -.sym 20131 io_ctrl_ins.o_data_out_SB_DFFESR_Q_6_R[1] -.sym 20137 w_rx_data[6] -.sym 20142 w_rx_data[5] -.sym 20147 io_ctrl_ins.pmod_state_SB_DFFE_Q_E_SB_LUT4_O_I3[0] -.sym 20148 io_ctrl_ins.led1_state_SB_LUT4_I0_I2[1] -.sym 20149 i_config[1]$SB_IO_IN -.sym 20150 io_ctrl_ins.o_pmod[4] -.sym 20153 w_rx_data[0] -.sym 20162 w_rx_data[4] -.sym 20168 w_rx_data[7] -.sym 20171 w_rx_data[3] -.sym 20175 io_ctrl_ins.rf_pin_state_SB_DFFE_Q_E +.sym 19829 spi_if_ins.spi.r3_rx_done_SB_LUT4_I2_O +.sym 19831 spi_if_ins.spi.r_temp_rx_byte[5] +.sym 19856 spi_if_ins.spi.r_temp_rx_byte[1] +.sym 19861 i_ss_SB_LUT4_I3_O +.sym 19864 i_mosi$SB_IO_IN +.sym 19866 spi_if_ins.spi.r_temp_rx_byte[2] +.sym 19867 spi_if_ins.spi.r_temp_rx_byte[0] +.sym 19878 spi_if_ins.spi.r_temp_rx_byte[3] +.sym 19885 spi_if_ins.spi.r_temp_rx_byte[1] +.sym 19891 i_mosi$SB_IO_IN +.sym 19907 spi_if_ins.spi.r_temp_rx_byte[2] +.sym 19920 spi_if_ins.spi.r_temp_rx_byte[0] +.sym 19925 spi_if_ins.spi.r_temp_rx_byte[3] +.sym 19929 i_ss_SB_LUT4_I3_O +.sym 19930 i_sck$SB_IO_IN_$glb_clk +.sym 19949 spi_if_ins.o_ioc_SB_DFFE_Q_E[0] +.sym 19974 spi_if_ins.spi.r_temp_rx_byte[0] +.sym 19979 i_mosi$SB_IO_IN +.sym 19981 spi_if_ins.spi.r_temp_rx_byte[2] +.sym 19984 spi_if_ins.spi.r_rx_done_SB_DFFER_Q_D_SB_LUT4_I3_O +.sym 19985 spi_if_ins.spi.r_temp_rx_byte[3] +.sym 19988 spi_if_ins.spi.r_temp_rx_byte[4] +.sym 20018 i_mosi$SB_IO_IN +.sym 20025 spi_if_ins.spi.r_temp_rx_byte[4] +.sym 20036 spi_if_ins.spi.r_temp_rx_byte[2] +.sym 20043 spi_if_ins.spi.r_temp_rx_byte[0] +.sym 20050 spi_if_ins.spi.r_temp_rx_byte[3] +.sym 20052 spi_if_ins.spi.r_rx_done_SB_DFFER_Q_D_SB_LUT4_I3_O +.sym 20053 i_sck$SB_IO_IN_$glb_clk +.sym 20072 w_rx_data[1] +.sym 20080 io_ctrl_ins.rx_h_b_state_SB_LUT4_I0_I2[3] +.sym 20082 w_rx_data[3] +.sym 20086 io_ctrl_ins.tr_vc_1_state_SB_LUT4_I0_I2[3] +.sym 20088 i_button_SB_LUT4_I3_O[1] +.sym 20100 io_ctrl_ins.o_data_out_SB_DFFESR_Q_E[3] +.sym 20101 spi_if_ins.spi.r_rx_byte[3] +.sym 20103 spi_if_ins.spi.r_rx_byte[4] +.sym 20107 spi_if_ins.spi.r3_rx_done_SB_LUT4_I2_O +.sym 20130 spi_if_ins.spi.r_rx_byte[4] +.sym 20141 io_ctrl_ins.o_data_out_SB_DFFESR_Q_E[3] +.sym 20149 spi_if_ins.spi.r_rx_byte[3] +.sym 20175 spi_if_ins.spi.r3_rx_done_SB_LUT4_I2_O .sym 20176 r_counter[0]_$glb_clk -.sym 20190 w_tx_data_io[6] -.sym 20200 io_ctrl_ins.pmod_dir_state[7] -.sym 20206 io_ctrl_ins.tr_vc_2_state_SB_LUT4_I1_I3[1] -.sym 20213 io_ctrl_ins.rf_pin_state[3] -.sym 20219 io_ctrl_ins.o_pmod[5] -.sym 20223 w_rx_data[0] -.sym 20225 w_rx_data[5] -.sym 20227 w_rx_data[7] -.sym 20228 i_button$SB_IO_IN -.sym 20229 w_ioc[0] -.sym 20230 io_ctrl_ins.o_pmod[7] -.sym 20232 io_ctrl_ins.o_pmod[0] -.sym 20233 io_ctrl_ins.tr_vc_2_state_SB_LUT4_I1_I3[1] -.sym 20236 io_ctrl_ins.led1_state_SB_LUT4_I0_I2[1] -.sym 20238 w_rx_data[3] -.sym 20239 i_config[2]$SB_IO_IN -.sym 20246 io_ctrl_ins.pmod_state_SB_DFFE_Q_E -.sym 20249 io_ctrl_ins.pmod_state_SB_DFFE_Q_E_SB_LUT4_O_I3[0] -.sym 20250 o_led0$SB_IO_OUT -.sym 20254 w_rx_data[5] -.sym 20258 w_rx_data[3] -.sym 20264 o_led0$SB_IO_OUT -.sym 20265 io_ctrl_ins.led1_state_SB_LUT4_I0_I2[1] -.sym 20266 io_ctrl_ins.o_pmod[0] -.sym 20267 io_ctrl_ins.pmod_state_SB_DFFE_Q_E_SB_LUT4_O_I3[0] -.sym 20272 w_rx_data[7] -.sym 20276 i_button$SB_IO_IN -.sym 20277 io_ctrl_ins.led1_state_SB_LUT4_I0_I2[1] -.sym 20278 io_ctrl_ins.o_pmod[7] -.sym 20279 io_ctrl_ins.pmod_state_SB_DFFE_Q_E_SB_LUT4_O_I3[0] -.sym 20283 w_rx_data[0] -.sym 20289 io_ctrl_ins.tr_vc_2_state_SB_LUT4_I1_I3[1] -.sym 20291 w_ioc[0] -.sym 20294 io_ctrl_ins.pmod_state_SB_DFFE_Q_E_SB_LUT4_O_I3[0] -.sym 20295 io_ctrl_ins.o_pmod[5] -.sym 20296 io_ctrl_ins.led1_state_SB_LUT4_I0_I2[1] -.sym 20297 i_config[2]$SB_IO_IN -.sym 20298 io_ctrl_ins.pmod_state_SB_DFFE_Q_E +.sym 20195 io_ctrl_ins.o_data_out_SB_DFFESR_Q_E[3] +.sym 20208 w_rx_data[3] +.sym 20209 io_ctrl_ins.rf_pin_state[4] +.sym 20210 o_led1$SB_IO_OUT +.sym 20211 io_ctrl_ins.rf_pin_state[7] +.sym 20212 io_ctrl_ins.o_pmod[5] +.sym 20213 io_ctrl_ins.debug_mode_SB_LUT4_I2_O[2] +.sym 20221 i_button_SB_LUT4_I3_O[1] +.sym 20222 spi_if_ins.w_rx_data[3] +.sym 20226 io_ctrl_ins.pmod_dir_state[6] +.sym 20227 spi_if_ins.w_rx_data[4] +.sym 20228 io_ctrl_ins.led0_state_SB_LUT4_I3_O[1] +.sym 20230 spi_if_ins.o_data_in_SB_DFFE_Q_E +.sym 20235 spi_if_ins.o_fetch_cmd_SB_LUT4_I3_O[0] +.sym 20237 w_ioc[0] +.sym 20238 io_ctrl_ins.o_pmod[5] +.sym 20240 io_ctrl_ins.pmod_dir_state[5] +.sym 20243 io_ctrl_ins.o_pmod[3] +.sym 20245 w_ioc[0] +.sym 20247 io_ctrl_ins.o_pmod[6] +.sym 20248 io_ctrl_ins.o_data_out_SB_DFFESR_Q_6_R[1] +.sym 20249 w_ioc[1] +.sym 20250 o_tr_vc2$SB_IO_OUT +.sym 20253 spi_if_ins.w_rx_data[4] +.sym 20258 io_ctrl_ins.pmod_dir_state[5] +.sym 20259 i_button_SB_LUT4_I3_O[1] +.sym 20260 io_ctrl_ins.o_pmod[5] +.sym 20261 io_ctrl_ins.led0_state_SB_LUT4_I3_O[1] +.sym 20265 w_ioc[0] +.sym 20266 spi_if_ins.o_fetch_cmd_SB_LUT4_I3_O[0] +.sym 20270 w_ioc[1] +.sym 20271 w_ioc[0] +.sym 20273 io_ctrl_ins.o_data_out_SB_DFFESR_Q_6_R[1] +.sym 20276 spi_if_ins.o_fetch_cmd_SB_LUT4_I3_O[0] +.sym 20277 io_ctrl_ins.o_pmod[3] +.sym 20278 o_tr_vc2$SB_IO_OUT +.sym 20279 w_ioc[0] +.sym 20282 w_ioc[1] +.sym 20283 io_ctrl_ins.o_data_out_SB_DFFESR_Q_6_R[1] +.sym 20285 spi_if_ins.o_fetch_cmd_SB_LUT4_I3_O[0] +.sym 20288 i_button_SB_LUT4_I3_O[1] +.sym 20289 io_ctrl_ins.pmod_dir_state[6] +.sym 20290 io_ctrl_ins.led0_state_SB_LUT4_I3_O[1] +.sym 20291 io_ctrl_ins.o_pmod[6] +.sym 20294 spi_if_ins.w_rx_data[3] +.sym 20298 spi_if_ins.o_data_in_SB_DFFE_Q_E .sym 20299 r_counter[0]_$glb_clk -.sym 20317 o_rx_h_tx_l_b$SB_IO_OUT -.sym 20327 io_ctrl_ins.rx_h_b_state_SB_LUT4_I0_O[1] -.sym 20342 io_ctrl_ins.tr_vc_2_state_SB_LUT4_I1_O[2] -.sym 20343 w_ioc[0] -.sym 20345 io_ctrl_ins.o_data_out_SB_DFFESR_Q_6_R[0] -.sym 20346 io_ctrl_ins.ldo2v8_state_SB_LUT4_I3_O[0] -.sym 20347 io_ctrl_ins.ldo2v8_state_SB_LUT4_I3_O[2] -.sym 20348 io_ctrl_ins.ldo2v8_state_SB_LUT4_I3_O[1] -.sym 20349 io_ctrl_ins.ldo2v8_state_SB_LUT4_I3_O[3] -.sym 20350 io_ctrl_ins.led1_state_SB_LUT4_I0_I2[2] -.sym 20351 io_ctrl_ins.o_pmod[3] -.sym 20352 io_ctrl_ins.led1_state_SB_LUT4_I0_I2[3] -.sym 20353 io_ctrl_ins.led1_state_SB_LUT4_I0_I2[1] -.sym 20354 io_ctrl_ins.pmod_dir_state[3] -.sym 20355 o_tr_vc2$SB_IO_OUT -.sym 20356 io_ctrl_ins.tr_vc_2_state_SB_LUT4_I1_I3_SB_LUT4_I2_O[0] -.sym 20357 i_config[3]$SB_IO_IN -.sym 20358 o_led1$SB_IO_OUT -.sym 20359 i_config[0]$SB_IO_IN -.sym 20361 io_ctrl_ins.tr_vc_2_state_SB_LUT4_I1_O[3] -.sym 20362 io_ctrl_ins.o_data_out_SB_DFFESR_Q_R -.sym 20365 o_rx_h_tx_l_b$SB_IO_OUT -.sym 20366 io_ctrl_ins.tr_vc_2_state_SB_LUT4_I1_I3[1] -.sym 20369 io_ctrl_ins.o_data_out_SB_DFFESR_Q_E[3] -.sym 20371 io_ctrl_ins.debug_mode_SB_LUT4_I2_O[1] -.sym 20375 o_tr_vc2$SB_IO_OUT -.sym 20376 w_ioc[0] -.sym 20377 io_ctrl_ins.o_pmod[3] -.sym 20378 io_ctrl_ins.tr_vc_2_state_SB_LUT4_I1_I3[1] -.sym 20381 io_ctrl_ins.led1_state_SB_LUT4_I0_I2[2] -.sym 20382 o_led1$SB_IO_OUT -.sym 20383 io_ctrl_ins.led1_state_SB_LUT4_I0_I2[3] -.sym 20384 io_ctrl_ins.led1_state_SB_LUT4_I0_I2[1] -.sym 20393 i_config[0]$SB_IO_IN -.sym 20394 io_ctrl_ins.led1_state_SB_LUT4_I0_I2[1] -.sym 20395 io_ctrl_ins.o_data_out_SB_DFFESR_Q_6_R[0] -.sym 20396 io_ctrl_ins.debug_mode_SB_LUT4_I2_O[1] -.sym 20405 io_ctrl_ins.tr_vc_2_state_SB_LUT4_I1_I3_SB_LUT4_I2_O[0] -.sym 20406 i_config[3]$SB_IO_IN -.sym 20407 o_rx_h_tx_l_b$SB_IO_OUT -.sym 20408 io_ctrl_ins.led1_state_SB_LUT4_I0_I2[1] -.sym 20411 io_ctrl_ins.tr_vc_2_state_SB_LUT4_I1_O[2] -.sym 20412 io_ctrl_ins.tr_vc_2_state_SB_LUT4_I1_O[3] -.sym 20413 io_ctrl_ins.ldo2v8_state_SB_LUT4_I3_O[1] -.sym 20414 io_ctrl_ins.pmod_dir_state[3] -.sym 20417 io_ctrl_ins.ldo2v8_state_SB_LUT4_I3_O[3] -.sym 20418 io_ctrl_ins.ldo2v8_state_SB_LUT4_I3_O[1] -.sym 20419 io_ctrl_ins.ldo2v8_state_SB_LUT4_I3_O[2] -.sym 20420 io_ctrl_ins.ldo2v8_state_SB_LUT4_I3_O[0] -.sym 20421 io_ctrl_ins.o_data_out_SB_DFFESR_Q_E[3] +.sym 20313 w_rx_data[4] +.sym 20315 io_ctrl_ins.o_data_out_SB_DFFESR_Q_6_R[2] +.sym 20323 w_ioc[0] +.sym 20326 io_ctrl_ins.pmod_dir_state[5] +.sym 20327 io_ctrl_ins.tr_vc_1_b_state_SB_LUT4_I1_O[3] +.sym 20331 io_ctrl_ins.o_data_out_SB_DFFESR_Q_3_D_SB_LUT4_O_I2[0] +.sym 20342 w_rx_data[4] +.sym 20344 io_ctrl_ins.rf_mode[2] +.sym 20345 i_config_SB_LUT4_I3_I2[2] +.sym 20350 i_config[3]$SB_IO_IN +.sym 20351 io_ctrl_ins.o_pmod[2] +.sym 20352 i_button_SB_LUT4_I3_O[1] +.sym 20361 w_rx_data[7] +.sym 20362 io_ctrl_ins.rf_mode[0] +.sym 20365 w_rx_data[6] +.sym 20366 i_config_SB_LUT4_I3_I2[0] +.sym 20367 i_config[2]$SB_IO_IN +.sym 20368 w_rx_data[5] +.sym 20369 io_ctrl_ins.rf_pin_state_SB_DFFE_Q_E +.sym 20371 i_config[1]$SB_IO_IN +.sym 20376 i_config[3]$SB_IO_IN +.sym 20378 i_config_SB_LUT4_I3_I2[2] +.sym 20382 w_rx_data[4] +.sym 20390 w_rx_data[7] +.sym 20393 w_rx_data[5] +.sym 20402 w_rx_data[6] +.sym 20405 i_config_SB_LUT4_I3_I2[2] +.sym 20406 io_ctrl_ins.rf_mode[2] +.sym 20407 i_config_SB_LUT4_I3_I2[0] +.sym 20408 i_config[1]$SB_IO_IN +.sym 20412 i_config_SB_LUT4_I3_I2[2] +.sym 20413 i_config[2]$SB_IO_IN +.sym 20417 i_config_SB_LUT4_I3_I2[0] +.sym 20418 io_ctrl_ins.rf_mode[0] +.sym 20419 i_button_SB_LUT4_I3_O[1] +.sym 20420 io_ctrl_ins.o_pmod[2] +.sym 20421 io_ctrl_ins.rf_pin_state_SB_DFFE_Q_E .sym 20422 r_counter[0]_$glb_clk -.sym 20423 io_ctrl_ins.o_data_out_SB_DFFESR_Q_R -.sym 20442 io_ctrl_ins.rf_mode[2] -.sym 20466 io_ctrl_ins.rf_mode[2] -.sym 20476 io_ctrl_ins.debug_mode_SB_LUT4_I0_O -.sym 20478 io_ctrl_ins.debug_mode_SB_LUT4_I2_O[3] -.sym 20483 io_ctrl_ins.rf_pin_state[3] -.sym 20489 io_ctrl_ins.debug_mode_SB_LUT4_I2_O[1] -.sym 20528 io_ctrl_ins.rf_mode[2] -.sym 20529 io_ctrl_ins.rf_pin_state[3] -.sym 20530 io_ctrl_ins.debug_mode_SB_LUT4_I2_O[1] -.sym 20531 io_ctrl_ins.debug_mode_SB_LUT4_I2_O[3] -.sym 20544 io_ctrl_ins.debug_mode_SB_LUT4_I0_O +.sym 20436 io_ctrl_ins.rx_h_b_state_SB_LUT4_I0_I2[2] +.sym 20466 io_ctrl_ins.debug_mode_SB_LUT4_I2_O[1] +.sym 20467 io_ctrl_ins.debug_mode[1] +.sym 20470 i_config_SB_LUT4_I3_I2[1] +.sym 20471 w_rx_data[2] +.sym 20472 w_rx_data[5] +.sym 20474 w_rx_data[1] +.sym 20475 w_rx_data[6] +.sym 20476 io_ctrl_ins.pmod_state_SB_DFFE_Q_E +.sym 20478 i_config_SB_LUT4_I3_I2[1] +.sym 20479 w_rx_data[7] +.sym 20480 w_rx_data[3] +.sym 20483 io_ctrl_ins.rf_mode[2] +.sym 20498 w_rx_data[3] +.sym 20507 w_rx_data[2] +.sym 20510 io_ctrl_ins.debug_mode[1] +.sym 20511 io_ctrl_ins.debug_mode_SB_LUT4_I2_O[1] +.sym 20512 io_ctrl_ins.rf_mode[2] +.sym 20513 i_config_SB_LUT4_I3_I2[1] +.sym 20517 w_rx_data[1] +.sym 20522 io_ctrl_ins.debug_mode[1] +.sym 20524 i_config_SB_LUT4_I3_I2[1] +.sym 20528 w_rx_data[5] +.sym 20535 w_rx_data[6] +.sym 20542 w_rx_data[7] +.sym 20544 io_ctrl_ins.pmod_state_SB_DFFE_Q_E .sym 20545 r_counter[0]_$glb_clk -.sym 20578 o_tr_vc2$SB_IO_OUT -.sym 20579 i_config[0]$SB_IO_IN +.sym 20563 io_ctrl_ins.rf_mode[2] +.sym 20569 io_ctrl_ins.debug_mode_SB_LUT4_I2_O[3] +.sym 20571 i_config[0]$SB_IO_IN +.sym 20573 o_tr_vc2$SB_IO_OUT +.sym 20582 i_button_SB_LUT4_I3_O[0] +.sym 20590 io_ctrl_ins.debug_mode_SB_LUT4_I0_O +.sym 20592 io_ctrl_ins.debug_mode_SB_LUT4_I2_O[3] +.sym 20593 io_ctrl_ins.rf_mode[2] +.sym 20613 io_ctrl_ins.debug_mode_SB_LUT4_I2_O[1] +.sym 20618 io_ctrl_ins.rf_pin_state[3] +.sym 20651 io_ctrl_ins.rf_mode[2] +.sym 20652 io_ctrl_ins.debug_mode_SB_LUT4_I2_O[1] +.sym 20653 io_ctrl_ins.rf_pin_state[3] +.sym 20654 io_ctrl_ins.debug_mode_SB_LUT4_I2_O[3] +.sym 20667 io_ctrl_ins.debug_mode_SB_LUT4_I0_O +.sym 20668 r_counter[0]_$glb_clk .sym 20672 i_config[0]$SB_IO_IN -.sym 20699 o_led1$SB_IO_OUT +.sym 20694 o_led1$SB_IO_OUT .sym 20748 io_smi_data[5]$SB_IO_OUT -.sym 20768 io_smi_data[5]$SB_IO_OUT -.sym 20770 rx_09_fifo.rd_addr_gray_wr[2] -.sym 20771 rx_09_fifo.rd_addr_gray_wr[3] -.sym 20773 rx_09_fifo.rd_addr_gray_wr[4] +.sym 20757 io_smi_data[5]$SB_IO_OUT .sym 20802 $io_pmod[3]$iobuf_i -.sym 20804 io_pmod[6]$SB_IO_IN +.sym 20804 i_ss$SB_IO_IN .sym 20844 i_mosi$SB_IO_IN -.sym 20847 rx_09_fifo.rd_addr_gray[2] -.sym 20849 rx_09_fifo.rd_addr_gray[4] -.sym 20853 rx_09_fifo.rd_addr_gray[3] -.sym 20889 io_pmod[4]$SB_IO_IN -.sym 20907 i_ss_SB_LUT4_I3_O -.sym 20933 int_miso -.sym 21034 smi_ctrl_ins.r_fifo_09_pull_SB_LUT4_I3_1_O -.sym 21047 spi_if_ins.r_tx_byte[7] -.sym 21087 int_miso -.sym 21138 $PACKER_VCC_NET -.sym 21147 i_ss_SB_LUT4_I3_O -.sym 21293 i_ss_SB_LUT4_I3_O -.sym 21295 $io_pmod[7]$iobuf_i -.sym 21297 $io_pmod[5]$iobuf_i -.sym 21348 io_pmod[4]$SB_IO_IN -.sym 21396 spi_if_ins.spi.r_rx_done -.sym 21434 io_pmod[5]$SB_IO_IN -.sym 21437 i_ss_SB_LUT4_I3_O -.sym 21439 $io_pmod[5]$iobuf_i -.sym 21449 i_mosi$SB_IO_IN -.sym 21494 $io_pmod[6]$iobuf_i -.sym 21536 i_smi_soe_se$rename$0 -.sym 21545 $io_pmod[2]$iobuf_i -.sym 21639 io_pmod[2]$SB_IO_IN -.sym 21756 w_tx_data_io[0] -.sym 21761 io_ctrl_ins.o_data_out_SB_DFFESR_Q_R -.sym 21800 w_tx_data_io[0] -.sym 21802 w_tx_data_io[4] -.sym 21855 io_ctrl_ins.tr_vc_1_state_SB_LUT4_I0_O[0] -.sym 21856 w_tx_data_io[7] -.sym 21857 io_ctrl_ins.debug_mode_SB_LUT4_I2_O[1] -.sym 21859 io_ctrl_ins.led0_state_SB_LUT4_I3_O[2] -.sym 21861 i_button_SB_LUT4_I3_O[0] -.sym 21864 w_tx_data_io[5] -.sym 21904 io_ctrl_ins.tr_vc_1_state_SB_LUT4_I0_O[1] -.sym 21905 w_tx_data_io[5] -.sym 21906 w_tx_data_io[6] -.sym 21907 i_button_SB_LUT4_I3_O[1] -.sym 21909 w_tx_data_io[7] +.sym 20935 io_pmod[7]$SB_IO_IN +.sym 20987 lvds_rx_09_inst.o_fifo_data[7] +.sym 21091 $io_pmod[4]$iobuf_i +.sym 21131 lvds_rx_09_inst.o_fifo_data[7] +.sym 21134 w_smi_read_req +.sym 21192 i_smi_a1_SB_LUT4_I1_O_SB_LUT4_O_I0[3] +.sym 21231 i_smi_soe_se$rename$0 +.sym 21290 $PACKER_GND_NET +.sym 21291 $io_pmod[5]$iobuf_i +.sym 21333 i_smi_soe_se$rename$0 +.sym 21393 i_ss_SB_LUT4_I3_O +.sym 21395 spi_if_ins.spi.r3_rx_done +.sym 21396 spi_if_ins.spi.r3_rx_done_SB_LUT4_I2_O +.sym 21398 spi_if_ins.spi.r2_rx_done +.sym 21434 sys_ctrl_ins.o_soft_reset_SB_DFFESS_Q_E +.sym 21447 spi_if_ins.spi.r3_rx_done_SB_LUT4_I2_O +.sym 21457 i_ss_SB_LUT4_I3_O +.sym 21499 spi_if_ins.spi.r_rx_byte[7] +.sym 21537 io_pmod[2]$SB_IO_IN +.sym 21597 spi_if_ins.spi.r_temp_rx_byte[6] +.sym 21646 spi_if_ins.spi.r_rx_done_SB_DFFER_Q_D_SB_LUT4_I3_O +.sym 21648 spi_if_ins.state_if_SB_DFFESR_Q_D[1] +.sym 21703 spi_if_ins.spi.r_rx_byte[2] +.sym 21804 o_led0$SB_IO_OUT +.sym 21807 o_led1$SB_IO_OUT +.sym 21856 io_ctrl_ins.led1_state_SB_DFFESR_Q_E +.sym 21860 io_ctrl_ins.led0_state_SB_LUT4_I3_O[1] +.sym 21902 io_ctrl_ins.o_data_out_SB_DFFESR_Q_3_E +.sym 21904 io_ctrl_ins.o_data_out_SB_DFFESR_Q_3_R +.sym 21905 w_tx_data_io[4] +.sym 21949 o_led1$SB_IO_OUT +.sym 21960 o_led0$SB_IO_OUT +.sym 21963 w_tx_data_io[6] .sym 22004 io_ctrl_ins.tr_vc_1_b_state_SB_LUT4_I1_O[2] -.sym 22005 o_tr_vc1$SB_IO_OUT -.sym 22006 io_ctrl_ins.led0_state_SB_LUT4_I3_O[2] -.sym 22007 io_ctrl_ins.rx_h_state_SB_DFFE_Q_D_SB_LUT4_O_I3[2] -.sym 22008 o_tr_vc1_b$SB_IO_OUT -.sym 22009 o_rx_h_tx_l_b$SB_IO_OUT -.sym 22010 o_rx_h_tx_l$SB_IO_OUT -.sym 22011 io_ctrl_ins.mixer_en_state -.sym 22051 io_ctrl_ins.rx_h_b_state_SB_LUT4_I0_O[1] -.sym 22055 io_ctrl_ins.o_data_out_SB_DFFESR_Q_6_E -.sym 22057 io_ctrl_ins.ldo2v8_state_SB_LUT4_I3_O[1] -.sym 22109 io_ctrl_ins.debug_mode_SB_LUT4_I2_O[0] -.sym 22148 io_ctrl_ins.rf_pin_state[7] -.sym 22149 o_rx_h_tx_l$SB_IO_OUT -.sym 22156 io_ctrl_ins.rf_pin_state[6] -.sym 22158 io_ctrl_ins.debug_mode_SB_LUT4_I2_O[2] -.sym 22164 io_ctrl_ins.rf_pin_state[0] -.sym 22166 io_ctrl_ins.rf_pin_state[4] -.sym 22168 $PACKER_GND_NET -.sym 22258 o_tr_vc2$SB_IO_OUT -.sym 22471 o_led0$SB_IO_OUT +.sym 22005 io_ctrl_ins.o_data_out_SB_DFFESR_Q_6_E +.sym 22006 io_ctrl_ins.o_pmod[4] +.sym 22007 io_ctrl_ins.o_data_out_SB_DFFESR_Q_R +.sym 22008 io_ctrl_ins.o_data_out_SB_DFFESR_Q_6_R[2] +.sym 22009 i_button_SB_LUT4_I3_O[3] +.sym 22010 io_ctrl_ins.o_pmod[0] +.sym 22011 io_ctrl_ins.led0_state_SB_LUT4_I3_O[2] +.sym 22046 io_ctrl_ins.o_data_out_SB_DFFESR_Q_3_D_SB_LUT4_O_I2[0] +.sym 22048 w_tx_data_io[2] +.sym 22051 io_ctrl_ins.tr_vc_1_b_state_SB_LUT4_I1_O[3] +.sym 22060 w_tx_data_io[4] +.sym 22108 w_tx_data_io[5] +.sym 22109 w_tx_data_io[6] +.sym 22113 w_tx_data_io[7] +.sym 22160 o_rx_h_tx_l$SB_IO_OUT +.sym 22162 o_tr_vc1_b$SB_IO_OUT +.sym 22165 w_ioc[2] +.sym 22167 w_ioc[1] +.sym 22169 io_ctrl_ins.pmod_dir_state[7] +.sym 22171 spi_if_ins.o_fetch_cmd_SB_LUT4_I3_O[0] +.sym 22208 o_tr_vc1$SB_IO_OUT +.sym 22210 io_ctrl_ins.debug_mode_SB_LUT4_I2_O[0] +.sym 22211 o_rx_h_tx_l_b$SB_IO_OUT +.sym 22212 io_ctrl_ins.rx_h_state_SB_DFFE_Q_D_SB_LUT4_O_I3[2] +.sym 22213 io_ctrl_ins.mixer_en_state +.sym 22214 o_rx_h_tx_l$SB_IO_OUT +.sym 22215 o_tr_vc1_b$SB_IO_OUT +.sym 22250 io_ctrl_ins.tr_vc_1_state_SB_LUT4_I0_I2[3] +.sym 22252 i_button_SB_LUT4_I3_O[0] +.sym 22254 i_button_SB_LUT4_I3_O[1] +.sym 22258 io_ctrl_ins.rx_h_b_state_SB_LUT4_I0_I2[3] +.sym 22260 o_tr_vc2$SB_IO_OUT +.sym 22262 w_tx_data_io[5] +.sym 22272 w_tx_data_io[7] +.sym 22352 io_ctrl_ins.rf_pin_state[4] +.sym 22354 io_ctrl_ins.debug_mode_SB_LUT4_I2_O[2] +.sym 22357 o_tr_vc1_b$SB_IO_OUT +.sym 22358 io_ctrl_ins.rf_pin_state[0] +.sym 22362 io_ctrl_ins.rf_pin_state[7] +.sym 22365 io_ctrl_ins.rf_pin_state[6] +.sym 22368 o_led0$SB_IO_OUT .sym 22487 o_led1$SB_IO_OUT -.sym 22496 o_led1$SB_IO_OUT +.sym 22509 o_led1$SB_IO_OUT .sym 22517 int_miso .sym 22519 i_ss_SB_LUT4_I3_O -.sym 22533 i_ss_SB_LUT4_I3_O -.sym 22541 int_miso -.sym 22563 i_mosi$SB_IO_IN -.sym 22574 i_sck$SB_IO_IN -.sym 22576 io_pmod[7]$SB_IO_IN -.sym 22585 rx_09_fifo.rd_addr_gray[2] -.sym 22591 rx_09_fifo.rd_addr_gray[3] -.sym 22595 rx_09_fifo.rd_addr_gray[4] -.sym 22618 rx_09_fifo.rd_addr_gray[2] -.sym 22623 rx_09_fifo.rd_addr_gray[3] -.sym 22638 rx_09_fifo.rd_addr_gray[4] -.sym 22664 lvds_clock_buf +.sym 22537 int_miso +.sym 22540 i_ss_SB_LUT4_I3_O +.sym 22556 i_ss_SB_LUT4_I3_O +.sym 22576 i_mosi$SB_IO_IN +.sym 22577 int_miso .sym 22666 i_sck$SB_IO_IN .sym 22668 i_ss$SB_IO_IN -.sym 22682 io_pmod[6]$SB_IO_IN -.sym 22698 i_ss$SB_IO_IN -.sym 22711 rx_09_fifo.rd_addr_gray_SB_LUT4_I2_O[3] -.sym 22713 io_pmod_SB_DFFSS_Q_D_SB_LUT4_O_I0_SB_LUT4_O_1_I1_SB_LUT4_O_I2[1] -.sym 22715 rx_09_fifo.rd_addr_gray_SB_LUT4_I2_O[2] -.sym 22722 io_pmod_SB_DFFSS_Q_D_SB_LUT4_O_I0_SB_LUT4_O_1_I1_SB_LUT4_O_I0[3] +.sym 22681 w_rx_09_fifo_data[1] .sym 22724 i_ss$SB_IO_IN -.sym 22729 $PACKER_VCC_NET -.sym 22758 smi_ctrl_ins.r_fifo_09_pull_SB_LUT4_I3_1_O -.sym 22768 rx_09_fifo.rd_addr_gray_SB_LUT4_I2_O[3] -.sym 22770 io_pmod_SB_DFFSS_Q_D_SB_LUT4_O_I0_SB_LUT4_O_1_I1_SB_LUT4_O_I2[1] -.sym 22772 rx_09_fifo.rd_addr_gray_SB_LUT4_I2_O[2] -.sym 22778 io_pmod_SB_DFFSS_Q_D_SB_LUT4_O_I0_SB_LUT4_O_1_I1_SB_LUT4_O_I0[3] -.sym 22788 rx_09_fifo.rd_addr_gray_SB_LUT4_I2_O[3] -.sym 22789 rx_09_fifo.rd_addr_gray_SB_LUT4_I2_O[2] -.sym 22800 io_pmod_SB_DFFSS_Q_D_SB_LUT4_O_I0_SB_LUT4_O_1_I1_SB_LUT4_O_I2[1] -.sym 22801 io_pmod_SB_DFFSS_Q_D_SB_LUT4_O_I0_SB_LUT4_O_1_I1_SB_LUT4_O_I0[3] -.sym 22822 rx_09_fifo.rd_addr_gray_SB_LUT4_I2_O[3] -.sym 22824 io_pmod_SB_DFFSS_Q_D_SB_LUT4_O_I0_SB_LUT4_O_1_I1_SB_LUT4_O_I2[1] -.sym 22826 smi_ctrl_ins.r_fifo_09_pull_SB_LUT4_I3_1_O -.sym 22827 r_counter[0]_$glb_clk -.sym 22828 i_smi_a1_SB_LUT4_I1_O_SB_LUT4_O_I2_SB_LUT4_I0_O[2]_$glb_sr -.sym 22829 $PACKER_VCC_NET -.sym 22862 $PACKER_VCC_NET -.sym 22963 w_rx_09_fifo_data[1] +.sym 22729 i_sck$SB_IO_IN +.sym 22878 io_pmod[7]$SB_IO_IN +.sym 22887 lvds_rx_09_inst.r_state_if_SB_LUT4_I2_O[0] +.sym 22921 io_pmod[7]$SB_IO_IN +.sym 22923 lvds_rx_09_inst.r_state_if_SB_LUT4_I2_O[0] +.sym 22949 w_lvds_rx_09_d1_SB_LUT4_I0_O_SB_LUT4_I3_O_$glb_ce +.sym 22950 lvds_clock_buf +.sym 22951 i_smi_a1_SB_LUT4_I1_O[3]_$glb_sr +.sym 22964 io_pmod[6]$SB_IO_IN .sym 22967 i_smi_a3$SB_IO_IN -.sym 22971 $PACKER_VCC_NET -.sym 22976 i_ss$SB_IO_IN -.sym 23004 spi_if_ins.spi.o_spi_miso_SB_DFFE_Q_E -.sym 23006 spi_if_ins.r_tx_byte[7] -.sym 23020 spi_if_ins.r_tx_data_valid_SB_LUT4_I3_O[1] -.sym 23023 spi_if_ins.r_tx_data_valid_SB_LUT4_I3_O[2] -.sym 23033 spi_if_ins.r_tx_byte[7] -.sym 23034 spi_if_ins.r_tx_data_valid_SB_LUT4_I3_O[2] -.sym 23035 spi_if_ins.r_tx_data_valid_SB_LUT4_I3_O[1] -.sym 23072 spi_if_ins.spi.o_spi_miso_SB_DFFE_Q_E -.sym 23073 r_counter[0]_$glb_clk -.sym 23092 spi_if_ins.spi.o_spi_miso_SB_DFFE_Q_E -.sym 23094 io_pmod[4]$SB_IO_IN +.sym 23006 w_rx_09_fifo_data[0] +.sym 23017 lvds_rx_09_inst.r_state_if_SB_LUT4_I2_O[0] +.sym 23056 lvds_rx_09_inst.r_state_if_SB_LUT4_I2_O[0] +.sym 23057 w_rx_09_fifo_data[0] +.sym 23072 w_lvds_rx_09_d1_SB_LUT4_I0_O_SB_LUT4_I3_O_$glb_ce +.sym 23073 lvds_clock_buf +.sym 23074 i_smi_a1_SB_LUT4_I1_O[3]_$glb_sr +.sym 23087 io_pmod[7]$SB_IO_IN +.sym 23089 $io_pmod[4]$iobuf_i +.sym 23106 $io_pmod[2]$iobuf_i +.sym 23107 lvds_rx_09_inst.r_state_if_SB_LUT4_I2_O[0] +.sym 23120 i_smi_soe_se$rename$0 +.sym 23175 i_smi_soe_se$rename$0 +.sym 23196 r_counter[0]_$glb_clk +.sym 23197 i_smi_a1_SB_LUT4_I1_O[3]_$glb_sr +.sym 23200 $io_pmod[6]$iobuf_i +.sym 23204 $io_pmod[7]$iobuf_i .sym 23222 i_ss$SB_IO_IN -.sym 23244 io_pmod[5]$SB_IO_IN -.sym 23248 i_ss$SB_IO_IN -.sym 23258 w_rx_09_fifo_data[1] -.sym 23263 lvds_rx_09_inst.r_state_if_SB_LUT4_I2_O[0] -.sym 23293 i_ss$SB_IO_IN -.sym 23302 lvds_rx_09_inst.r_state_if_SB_LUT4_I2_O[0] -.sym 23304 io_pmod[5]$SB_IO_IN -.sym 23314 lvds_rx_09_inst.r_state_if_SB_LUT4_I2_O[0] -.sym 23316 w_rx_09_fifo_data[1] +.sym 23227 i_ss$SB_IO_IN +.sym 23230 $PACKER_GND_NET +.sym 23262 w_rx_09_fifo_data[1] +.sym 23267 lvds_rx_09_inst.r_state_if_SB_LUT4_I2_O[0] +.sym 23278 lvds_rx_09_inst.r_state_if_SB_LUT4_I2_O[0] +.sym 23280 w_rx_09_fifo_data[1] .sym 23318 w_lvds_rx_09_d1_SB_LUT4_I0_O_SB_LUT4_I3_O_$glb_ce .sym 23319 lvds_clock_buf -.sym 23320 i_smi_a1_SB_LUT4_I1_O_SB_LUT4_O_I2_SB_LUT4_I0_O[2]_$glb_sr -.sym 23323 spi_if_ins.spi.r3_rx_done_SB_LUT4_I2_O -.sym 23324 spi_if_ins.spi.r3_rx_done -.sym 23325 spi_if_ins.spi.r2_rx_done -.sym 23335 $io_pmod[7]$iobuf_i -.sym 23355 $PACKER_VCC_NET -.sym 23364 spi_if_ins.spi.r_rx_done_SB_DFFER_Q_E -.sym 23382 i_ss$SB_IO_IN -.sym 23392 spi_if_ins.spi.r_rx_done_SB_DFFER_Q_D[1] -.sym 23420 spi_if_ins.spi.r_rx_done_SB_DFFER_Q_D[1] -.sym 23441 spi_if_ins.spi.r_rx_done_SB_DFFER_Q_E -.sym 23442 i_sck$SB_IO_IN_$glb_clk -.sym 23443 i_ss$SB_IO_IN -.sym 23460 spi_if_ins.spi.r_rx_done_SB_DFFER_Q_E -.sym 23489 lvds_rx_09_inst.r_state_if_SB_LUT4_I2_O[0] -.sym 23490 io_pmod[4]$SB_IO_IN -.sym 23520 lvds_rx_09_inst.r_state_if_SB_LUT4_I2_O[0] -.sym 23521 io_pmod[4]$SB_IO_IN -.sym 23564 w_lvds_rx_09_d1_SB_LUT4_I0_O_SB_LUT4_I3_O_$glb_ce -.sym 23565 lvds_clock_buf -.sym 23566 i_smi_a1_SB_LUT4_I1_O_SB_LUT4_O_I2_SB_LUT4_I0_O[2]_$glb_sr -.sym 23567 r_counter[0] -.sym 23579 $io_pmod[6]$iobuf_i -.sym 23602 io_ctrl_ins.pmod_dir_state_SB_DFFE_Q_E -.sym 23716 w_smi_read_req -.sym 23718 io_ctrl_ins.tr_vc_1_b_state_SB_LUT4_I1_O[3] -.sym 23820 io_ctrl_ins.pmod_dir_state[5] -.sym 23837 io_ctrl_ins.tr_vc_1_b_state_SB_LUT4_I1_O[2] -.sym 23843 io_ctrl_ins.tr_vc_2_state_SB_LUT4_I1_I3_SB_LUT4_I2_O[0] -.sym 23845 io_ctrl_ins.led0_state_SB_LUT4_I3_O[3] -.sym 23848 io_ctrl_ins.debug_mode_SB_LUT4_I0_O -.sym 23855 io_ctrl_ins.pmod_dir_state[4] -.sym 23856 io_ctrl_ins.led0_state_SB_LUT4_I3_O[3] -.sym 23861 io_ctrl_ins.led0_state_SB_LUT4_I3_O[0] -.sym 23863 io_ctrl_ins.tr_vc_1_b_state_SB_LUT4_I1_O[2] -.sym 23867 io_ctrl_ins.o_data_out_SB_DFFESR_Q_R -.sym 23878 io_ctrl_ins.tr_vc_1_b_state_SB_LUT4_I1_O[3] -.sym 23881 io_ctrl_ins.o_data_out_SB_DFFESR_Q_E[3] -.sym 23882 io_ctrl_ins.led0_state_SB_LUT4_I3_O[2] -.sym 23883 io_ctrl_ins.ldo2v8_state_SB_LUT4_I3_O[1] -.sym 23887 io_ctrl_ins.led0_state_SB_LUT4_I3_O[3] -.sym 23888 io_ctrl_ins.led0_state_SB_LUT4_I3_O[0] -.sym 23889 io_ctrl_ins.ldo2v8_state_SB_LUT4_I3_O[1] -.sym 23890 io_ctrl_ins.led0_state_SB_LUT4_I3_O[2] -.sym 23899 io_ctrl_ins.tr_vc_1_b_state_SB_LUT4_I1_O[2] -.sym 23900 io_ctrl_ins.pmod_dir_state[4] -.sym 23901 io_ctrl_ins.ldo2v8_state_SB_LUT4_I3_O[1] -.sym 23902 io_ctrl_ins.tr_vc_1_b_state_SB_LUT4_I1_O[3] -.sym 23933 io_ctrl_ins.o_data_out_SB_DFFESR_Q_E[3] +.sym 23320 i_smi_a1_SB_LUT4_I1_O[3]_$glb_sr +.sym 23325 spi_if_ins.spi.r_rx_done +.sym 23337 $io_pmod[5]$iobuf_i +.sym 23340 io_pmod[5]$SB_IO_IN +.sym 23349 spi_if_ins.state_if_SB_DFFESR_Q_D[1] +.sym 23368 spi_if_ins.spi.r2_rx_done +.sym 23387 i_ss$SB_IO_IN +.sym 23389 spi_if_ins.spi.r3_rx_done +.sym 23390 spi_if_ins.spi.r_rx_done +.sym 23402 i_ss$SB_IO_IN +.sym 23414 spi_if_ins.spi.r2_rx_done +.sym 23419 spi_if_ins.spi.r2_rx_done +.sym 23421 spi_if_ins.spi.r3_rx_done +.sym 23432 spi_if_ins.spi.r_rx_done +.sym 23442 r_counter[0]_$glb_clk +.sym 23444 spi_if_ins.state_if_SB_DFFESR_Q_D[1] +.sym 23446 spi_if_ins.spi.r3_rx_done_SB_LUT4_I2_O +.sym 23466 spi_if_ins.spi.r3_rx_done_SB_LUT4_I2_O +.sym 23473 spi_if_ins.spi.r3_rx_done_SB_LUT4_I2_O +.sym 23494 spi_if_ins.spi.r_temp_rx_byte[6] +.sym 23496 spi_if_ins.spi.r_rx_done_SB_DFFER_Q_D_SB_LUT4_I3_O +.sym 23549 spi_if_ins.spi.r_temp_rx_byte[6] +.sym 23564 spi_if_ins.spi.r_rx_done_SB_DFFER_Q_D_SB_LUT4_I3_O +.sym 23565 i_sck$SB_IO_IN_$glb_clk +.sym 23571 r_counter[0] +.sym 23594 $io_pmod[2]$iobuf_i +.sym 23598 lvds_rx_09_inst.r_state_if_SB_LUT4_I2_O[0] +.sym 23602 spi_if_ins.spi.r3_rx_done_SB_LUT4_I2_O +.sym 23610 i_ss_SB_LUT4_I3_O +.sym 23624 spi_if_ins.spi.r_temp_rx_byte[5] +.sym 23648 spi_if_ins.spi.r_temp_rx_byte[5] +.sym 23687 i_ss_SB_LUT4_I3_O +.sym 23688 i_sck$SB_IO_IN_$glb_clk +.sym 23693 spi_if_ins.o_ioc_SB_DFFE_Q_E[0] +.sym 23710 spi_if_ins.spi.r3_rx_done_SB_LUT4_I2_O +.sym 23714 spi_if_ins.w_rx_data[2] +.sym 23717 spi_if_ins.spi.r_rx_done_SB_DFFER_Q_D_SB_LUT4_I3_O +.sym 23718 io_ctrl_ins.o_data_out_SB_DFFESR_Q_R +.sym 23722 $PACKER_GND_NET +.sym 23733 spi_if_ins.spi.r_rx_done_SB_DFFER_Q_D_SB_LUT4_I3_O +.sym 23751 spi_if_ins.spi.r_temp_rx_byte[1] +.sym 23795 spi_if_ins.spi.r_temp_rx_byte[1] +.sym 23810 spi_if_ins.spi.r_rx_done_SB_DFFER_Q_D_SB_LUT4_I3_O +.sym 23811 i_sck$SB_IO_IN_$glb_clk +.sym 23819 spi_if_ins.w_rx_data[2] +.sym 23828 spi_if_ins.o_ioc_SB_DFFE_Q_E[0] +.sym 23839 spi_if_ins.o_ioc_SB_DFFE_Q_E[0] +.sym 23840 w_rx_data[0] +.sym 23842 spi_if_ins.w_rx_data[2] +.sym 23846 io_ctrl_ins.o_data_out_SB_DFFESR_Q_3_R +.sym 23848 io_ctrl_ins.pmod_state_SB_DFFE_Q_E +.sym 23864 w_rx_data[0] +.sym 23873 w_rx_data[1] +.sym 23881 io_ctrl_ins.led1_state_SB_DFFESR_Q_E +.sym 23914 w_rx_data[0] +.sym 23929 w_rx_data[1] +.sym 23933 io_ctrl_ins.led1_state_SB_DFFESR_Q_E .sym 23934 r_counter[0]_$glb_clk -.sym 23935 io_ctrl_ins.o_data_out_SB_DFFESR_Q_R -.sym 23949 io_ctrl_ins.pmod_dir_state[4] -.sym 23967 o_tr_vc1$SB_IO_OUT -.sym 23978 o_tr_vc1$SB_IO_OUT -.sym 23979 io_ctrl_ins.o_data_out_SB_DFFESR_Q_6_E -.sym 23981 io_ctrl_ins.ldo2v8_state_SB_LUT4_I3_O[1] -.sym 23982 io_ctrl_ins.tr_vc_1_state_SB_LUT4_I0_O[0] -.sym 23983 io_ctrl_ins.rx_h_b_state_SB_LUT4_I0_O[1] -.sym 23988 i_button_SB_LUT4_I3_O[0] -.sym 23990 io_ctrl_ins.o_data_out_SB_DFFESR_Q_6_R[1] -.sym 23991 o_rx_h_tx_l$SB_IO_OUT -.sym 23992 io_ctrl_ins.pmod_dir_state[5] -.sym 23993 io_ctrl_ins.pmod_dir_state[7] -.sym 23995 io_ctrl_ins.tr_vc_1_state_SB_LUT4_I0_O[1] -.sym 23998 i_button_SB_LUT4_I3_O[1] -.sym 24003 io_ctrl_ins.tr_vc_2_state_SB_LUT4_I1_I3_SB_LUT4_I2_O[0] -.sym 24006 io_ctrl_ins.rx_h_b_state_SB_LUT4_I0_O[0] -.sym 24022 io_ctrl_ins.ldo2v8_state_SB_LUT4_I3_O[1] -.sym 24023 o_tr_vc1$SB_IO_OUT -.sym 24024 io_ctrl_ins.pmod_dir_state[5] -.sym 24025 io_ctrl_ins.tr_vc_2_state_SB_LUT4_I1_I3_SB_LUT4_I2_O[0] -.sym 24028 io_ctrl_ins.tr_vc_1_state_SB_LUT4_I0_O[0] -.sym 24031 io_ctrl_ins.tr_vc_1_state_SB_LUT4_I0_O[1] -.sym 24034 io_ctrl_ins.rx_h_b_state_SB_LUT4_I0_O[1] -.sym 24036 io_ctrl_ins.rx_h_b_state_SB_LUT4_I0_O[0] -.sym 24040 o_rx_h_tx_l$SB_IO_OUT -.sym 24041 io_ctrl_ins.ldo2v8_state_SB_LUT4_I3_O[1] -.sym 24042 io_ctrl_ins.tr_vc_2_state_SB_LUT4_I1_I3_SB_LUT4_I2_O[0] -.sym 24043 io_ctrl_ins.pmod_dir_state[7] -.sym 24054 i_button_SB_LUT4_I3_O[1] -.sym 24055 i_button_SB_LUT4_I3_O[0] -.sym 24056 io_ctrl_ins.o_data_out_SB_DFFESR_Q_6_E +.sym 23935 i_smi_a1_SB_LUT4_I1_O[3]_$glb_sr +.sym 23937 w_tx_data_io[2] +.sym 23967 io_ctrl_ins.o_data_out_SB_DFFESR_Q_6_E +.sym 23977 io_ctrl_ins.tr_vc_1_b_state_SB_LUT4_I1_O[2] +.sym 23979 io_ctrl_ins.pmod_dir_state[4] +.sym 23986 w_ioc[1] +.sym 23987 io_ctrl_ins.led0_state_SB_LUT4_I3_O[1] +.sym 23990 io_ctrl_ins.o_data_out_SB_DFFESR_Q_R +.sym 23991 io_ctrl_ins.tr_vc_1_b_state_SB_LUT4_I1_O[3] +.sym 23994 w_ioc[0] +.sym 23998 io_ctrl_ins.o_data_out_SB_DFFESR_Q_E[3] +.sym 24004 io_ctrl_ins.o_data_out_SB_DFFESR_Q_E[3] +.sym 24006 spi_if_ins.o_fetch_cmd_SB_LUT4_I3_O[0] +.sym 24008 io_ctrl_ins.o_data_out_SB_DFFESR_Q_6_R[1] +.sym 24010 w_ioc[1] +.sym 24011 w_ioc[0] +.sym 24013 io_ctrl_ins.o_data_out_SB_DFFESR_Q_E[3] +.sym 24022 spi_if_ins.o_fetch_cmd_SB_LUT4_I3_O[0] +.sym 24024 io_ctrl_ins.o_data_out_SB_DFFESR_Q_6_R[1] +.sym 24025 w_ioc[0] +.sym 24028 io_ctrl_ins.led0_state_SB_LUT4_I3_O[1] +.sym 24029 io_ctrl_ins.tr_vc_1_b_state_SB_LUT4_I1_O[2] +.sym 24030 io_ctrl_ins.tr_vc_1_b_state_SB_LUT4_I1_O[3] +.sym 24031 io_ctrl_ins.pmod_dir_state[4] +.sym 24056 io_ctrl_ins.o_data_out_SB_DFFESR_Q_E[3] .sym 24057 r_counter[0]_$glb_clk -.sym 24058 io_ctrl_ins.o_data_out_SB_DFFESR_Q_6_R[1] -.sym 24082 $PACKER_GND_NET -.sym 24083 o_tr_vc1_b$SB_IO_OUT -.sym 24085 o_rx_h_tx_l_b$SB_IO_OUT -.sym 24100 io_ctrl_ins.debug_mode_SB_LUT4_I2_O[1] -.sym 24102 io_ctrl_ins.debug_mode_SB_LUT4_I2_O[1] -.sym 24103 io_ctrl_ins.debug_mode_SB_LUT4_I2_O[0] -.sym 24104 io_ctrl_ins.debug_mode_SB_LUT4_I2_O[3] -.sym 24105 io_ctrl_ins.debug_mode_SB_LUT4_I2_O[2] -.sym 24107 io_ctrl_ins.mixer_en_state -.sym 24108 io_ctrl_ins.debug_mode_SB_LUT4_I2_O[1] -.sym 24111 io_ctrl_ins.rf_pin_state[6] -.sym 24113 io_ctrl_ins.rf_pin_state[7] -.sym 24115 io_ctrl_ins.debug_mode[0] -.sym 24118 io_ctrl_ins.debug_mode_SB_LUT4_I0_O -.sym 24119 io_ctrl_ins.rx_h_state_SB_DFFE_Q_D_SB_LUT4_O_I3[2] -.sym 24120 o_tr_vc1_b$SB_IO_OUT -.sym 24121 io_ctrl_ins.rf_mode[2] -.sym 24123 io_ctrl_ins.rf_mode[0] -.sym 24124 io_ctrl_ins.rf_pin_state[0] -.sym 24126 io_ctrl_ins.rf_pin_state[4] -.sym 24128 io_ctrl_ins.tr_vc_2_state_SB_LUT4_I1_I3_SB_LUT4_I2_O[0] -.sym 24129 io_ctrl_ins.rf_mode[2] -.sym 24131 io_ctrl_ins.o_data_out_SB_DFFESR_Q_6_R[0] -.sym 24133 io_ctrl_ins.o_data_out_SB_DFFESR_Q_6_R[0] -.sym 24134 io_ctrl_ins.rf_mode[2] -.sym 24135 o_tr_vc1_b$SB_IO_OUT -.sym 24136 io_ctrl_ins.tr_vc_2_state_SB_LUT4_I1_I3_SB_LUT4_I2_O[0] -.sym 24139 io_ctrl_ins.debug_mode_SB_LUT4_I2_O[2] -.sym 24140 io_ctrl_ins.debug_mode_SB_LUT4_I2_O[3] -.sym 24141 io_ctrl_ins.debug_mode_SB_LUT4_I2_O[0] -.sym 24142 io_ctrl_ins.debug_mode_SB_LUT4_I2_O[1] -.sym 24145 io_ctrl_ins.o_data_out_SB_DFFESR_Q_6_R[0] -.sym 24146 io_ctrl_ins.tr_vc_2_state_SB_LUT4_I1_I3_SB_LUT4_I2_O[0] -.sym 24147 io_ctrl_ins.debug_mode[0] -.sym 24148 io_ctrl_ins.mixer_en_state -.sym 24151 io_ctrl_ins.rf_mode[0] -.sym 24152 io_ctrl_ins.debug_mode_SB_LUT4_I2_O[1] -.sym 24153 io_ctrl_ins.rf_mode[2] -.sym 24154 io_ctrl_ins.debug_mode_SB_LUT4_I2_O[3] -.sym 24157 io_ctrl_ins.debug_mode_SB_LUT4_I2_O[3] -.sym 24158 io_ctrl_ins.debug_mode_SB_LUT4_I2_O[0] -.sym 24159 io_ctrl_ins.debug_mode_SB_LUT4_I2_O[1] -.sym 24160 io_ctrl_ins.rf_pin_state[4] -.sym 24164 io_ctrl_ins.debug_mode_SB_LUT4_I2_O[3] -.sym 24165 io_ctrl_ins.rx_h_state_SB_DFFE_Q_D_SB_LUT4_O_I3[2] -.sym 24166 io_ctrl_ins.rf_pin_state[6] -.sym 24169 io_ctrl_ins.debug_mode_SB_LUT4_I2_O[3] -.sym 24170 io_ctrl_ins.rx_h_state_SB_DFFE_Q_D_SB_LUT4_O_I3[2] -.sym 24171 io_ctrl_ins.rf_pin_state[7] -.sym 24175 io_ctrl_ins.rf_pin_state[0] -.sym 24176 io_ctrl_ins.debug_mode_SB_LUT4_I2_O[3] -.sym 24177 io_ctrl_ins.debug_mode_SB_LUT4_I2_O[1] -.sym 24178 io_ctrl_ins.rf_mode[2] -.sym 24179 io_ctrl_ins.debug_mode_SB_LUT4_I0_O +.sym 24058 io_ctrl_ins.o_data_out_SB_DFFESR_Q_R +.sym 24075 io_ctrl_ins.pmod_dir_state[4] +.sym 24082 w_ioc[1] +.sym 24085 io_ctrl_ins.debug_mode_SB_LUT4_I0_O +.sym 24093 io_ctrl_ins.mixer_en_state +.sym 24102 io_ctrl_ins.o_pmod[4] +.sym 24106 io_ctrl_ins.o_pmod[0] +.sym 24110 w_rx_data[0] +.sym 24115 io_ctrl_ins.led0_state_SB_LUT4_I3_O[1] +.sym 24116 w_rx_data[4] +.sym 24117 w_ioc[2] +.sym 24118 io_ctrl_ins.pmod_state_SB_DFFE_Q_E +.sym 24119 io_ctrl_ins.mixer_en_state +.sym 24120 io_ctrl_ins.o_data_out_SB_DFFESR_Q_E[3] +.sym 24121 io_ctrl_ins.pmod_dir_state[7] +.sym 24122 io_ctrl_ins.o_data_out_SB_DFFESR_Q_6_R[1] +.sym 24124 w_ioc[0] +.sym 24126 io_ctrl_ins.o_data_out_SB_DFFESR_Q_6_R[2] +.sym 24127 w_ioc[1] +.sym 24128 o_rx_h_tx_l$SB_IO_OUT +.sym 24129 io_ctrl_ins.rx_h_b_state_SB_LUT4_I0_I2[1] +.sym 24130 o_tr_vc1_b$SB_IO_OUT +.sym 24131 spi_if_ins.o_fetch_cmd_SB_LUT4_I3_O[0] +.sym 24133 spi_if_ins.o_fetch_cmd_SB_LUT4_I3_O[0] +.sym 24134 o_tr_vc1_b$SB_IO_OUT +.sym 24135 io_ctrl_ins.o_pmod[4] +.sym 24136 w_ioc[0] +.sym 24139 w_ioc[0] +.sym 24140 io_ctrl_ins.o_data_out_SB_DFFESR_Q_E[3] +.sym 24141 w_ioc[2] +.sym 24142 w_ioc[1] +.sym 24145 w_rx_data[4] +.sym 24151 io_ctrl_ins.o_data_out_SB_DFFESR_Q_6_R[2] +.sym 24153 w_ioc[0] +.sym 24154 io_ctrl_ins.o_data_out_SB_DFFESR_Q_6_R[1] +.sym 24160 io_ctrl_ins.o_data_out_SB_DFFESR_Q_6_R[2] +.sym 24163 o_rx_h_tx_l$SB_IO_OUT +.sym 24164 io_ctrl_ins.rx_h_b_state_SB_LUT4_I0_I2[1] +.sym 24165 io_ctrl_ins.pmod_dir_state[7] +.sym 24166 io_ctrl_ins.led0_state_SB_LUT4_I3_O[1] +.sym 24172 w_rx_data[0] +.sym 24175 io_ctrl_ins.mixer_en_state +.sym 24176 spi_if_ins.o_fetch_cmd_SB_LUT4_I3_O[0] +.sym 24177 w_ioc[0] +.sym 24178 io_ctrl_ins.o_pmod[0] +.sym 24179 io_ctrl_ins.pmod_state_SB_DFFE_Q_E .sym 24180 r_counter[0]_$glb_clk -.sym 24200 io_ctrl_ins.debug_mode_SB_LUT4_I2_O[3] -.sym 24204 io_ctrl_ins.debug_mode_SB_LUT4_I2_O[1] -.sym 24217 io_ctrl_ins.o_data_out_SB_DFFESR_Q_6_R[0] -.sym 24243 io_ctrl_ins.rf_mode[2] -.sym 24246 io_ctrl_ins.rf_mode[0] -.sym 24274 io_ctrl_ins.rf_mode[0] -.sym 24277 io_ctrl_ins.rf_mode[2] -.sym 24332 io_ctrl_ins.rf_mode[0] +.sym 24202 io_ctrl_ins.o_data_out_SB_DFFESR_Q_R +.sym 24203 io_ctrl_ins.led0_state_SB_LUT4_I3_O[1] +.sym 24206 io_ctrl_ins.o_data_out_SB_DFFESR_Q_E[3] +.sym 24208 io_ctrl_ins.o_data_out_SB_DFFESR_Q_6_R[1] +.sym 24209 io_ctrl_ins.o_data_out_SB_DFFESR_Q_R +.sym 24226 o_rx_h_tx_l_b$SB_IO_OUT +.sym 24227 io_ctrl_ins.o_data_out_SB_DFFESR_Q_6_R[2] +.sym 24228 i_button_SB_LUT4_I3_O[3] +.sym 24230 i_button_SB_LUT4_I3_O[1] +.sym 24231 o_tr_vc1$SB_IO_OUT +.sym 24234 io_ctrl_ins.rx_h_b_state_SB_LUT4_I0_I2[3] +.sym 24236 io_ctrl_ins.tr_vc_1_state_SB_LUT4_I0_I2[3] +.sym 24238 i_button_SB_LUT4_I3_O[0] +.sym 24247 io_ctrl_ins.rx_h_b_state_SB_LUT4_I0_I2[2] +.sym 24250 io_ctrl_ins.o_data_out_SB_DFFESR_Q_6_E +.sym 24251 io_ctrl_ins.tr_vc_1_state_SB_LUT4_I0_I2[2] +.sym 24252 io_ctrl_ins.rx_h_b_state_SB_LUT4_I0_I2[1] +.sym 24254 i_button_SB_LUT4_I3_O[2] +.sym 24268 io_ctrl_ins.rx_h_b_state_SB_LUT4_I0_I2[1] +.sym 24269 io_ctrl_ins.tr_vc_1_state_SB_LUT4_I0_I2[2] +.sym 24270 io_ctrl_ins.tr_vc_1_state_SB_LUT4_I0_I2[3] +.sym 24271 o_tr_vc1$SB_IO_OUT +.sym 24274 o_rx_h_tx_l_b$SB_IO_OUT +.sym 24275 io_ctrl_ins.rx_h_b_state_SB_LUT4_I0_I2[3] +.sym 24276 io_ctrl_ins.rx_h_b_state_SB_LUT4_I0_I2[2] +.sym 24277 io_ctrl_ins.rx_h_b_state_SB_LUT4_I0_I2[1] +.sym 24298 i_button_SB_LUT4_I3_O[3] +.sym 24299 i_button_SB_LUT4_I3_O[2] +.sym 24300 i_button_SB_LUT4_I3_O[1] +.sym 24301 i_button_SB_LUT4_I3_O[0] +.sym 24302 io_ctrl_ins.o_data_out_SB_DFFESR_Q_6_E +.sym 24303 r_counter[0]_$glb_clk +.sym 24304 io_ctrl_ins.o_data_out_SB_DFFESR_Q_6_R[2] +.sym 24333 o_rx_h_tx_l$SB_IO_OUT +.sym 24338 io_ctrl_ins.rx_h_b_state_SB_LUT4_I0_I2[1] +.sym 24351 io_ctrl_ins.rf_pin_state[7] +.sym 24355 io_ctrl_ins.rf_pin_state[0] +.sym 24357 io_ctrl_ins.debug_mode_SB_LUT4_I0_O +.sym 24359 io_ctrl_ins.rf_pin_state[4] +.sym 24361 io_ctrl_ins.debug_mode_SB_LUT4_I2_O[2] +.sym 24362 io_ctrl_ins.debug_mode_SB_LUT4_I2_O[3] +.sym 24364 io_ctrl_ins.rf_mode[2] +.sym 24367 io_ctrl_ins.rf_mode[0] +.sym 24369 io_ctrl_ins.debug_mode_SB_LUT4_I2_O[1] +.sym 24372 io_ctrl_ins.debug_mode_SB_LUT4_I2_O[0] +.sym 24374 io_ctrl_ins.rx_h_state_SB_DFFE_Q_D_SB_LUT4_O_I3[2] +.sym 24375 io_ctrl_ins.rf_pin_state[6] +.sym 24376 io_ctrl_ins.rf_mode[2] +.sym 24379 io_ctrl_ins.debug_mode_SB_LUT4_I2_O[2] +.sym 24380 io_ctrl_ins.debug_mode_SB_LUT4_I2_O[0] +.sym 24381 io_ctrl_ins.debug_mode_SB_LUT4_I2_O[3] +.sym 24382 io_ctrl_ins.debug_mode_SB_LUT4_I2_O[1] +.sym 24391 io_ctrl_ins.rf_mode[2] +.sym 24392 io_ctrl_ins.rf_mode[0] +.sym 24398 io_ctrl_ins.rf_pin_state[6] +.sym 24399 io_ctrl_ins.rx_h_state_SB_DFFE_Q_D_SB_LUT4_O_I3[2] +.sym 24400 io_ctrl_ins.debug_mode_SB_LUT4_I2_O[3] +.sym 24403 io_ctrl_ins.rf_mode[2] +.sym 24404 io_ctrl_ins.rf_mode[0] +.sym 24405 io_ctrl_ins.debug_mode_SB_LUT4_I2_O[3] +.sym 24406 io_ctrl_ins.debug_mode_SB_LUT4_I2_O[1] +.sym 24409 io_ctrl_ins.debug_mode_SB_LUT4_I2_O[1] +.sym 24410 io_ctrl_ins.rf_pin_state[0] +.sym 24411 io_ctrl_ins.rf_mode[2] +.sym 24412 io_ctrl_ins.debug_mode_SB_LUT4_I2_O[3] +.sym 24415 io_ctrl_ins.debug_mode_SB_LUT4_I2_O[3] +.sym 24416 io_ctrl_ins.rf_pin_state[7] +.sym 24418 io_ctrl_ins.rx_h_state_SB_DFFE_Q_D_SB_LUT4_O_I3[2] +.sym 24421 io_ctrl_ins.debug_mode_SB_LUT4_I2_O[1] +.sym 24422 io_ctrl_ins.rf_pin_state[4] +.sym 24423 io_ctrl_ins.debug_mode_SB_LUT4_I2_O[0] +.sym 24424 io_ctrl_ins.debug_mode_SB_LUT4_I2_O[3] +.sym 24425 io_ctrl_ins.debug_mode_SB_LUT4_I0_O +.sym 24426 r_counter[0]_$glb_clk +.sym 24440 o_tr_vc1$SB_IO_OUT +.sym 24448 o_rx_h_tx_l_b$SB_IO_OUT .sym 24596 o_led0$SB_IO_OUT .sym 24605 o_led0$SB_IO_OUT .sym 24621 i_smi_a3$SB_IO_IN -.sym 24943 io_pmod[5]$SB_IO_IN .sym 25089 io_pmod[4]$SB_IO_IN -.sym 25097 $PACKER_VCC_NET -.sym 25253 i_sck$SB_IO_IN +.sym 25253 i_smi_soe_se$rename$0 +.sym 25262 io_pmod[4]$SB_IO_IN .sym 25399 io_pmod[5]$SB_IO_IN .sym 25401 io_pmod[7]$SB_IO_IN -.sym 25416 $io_pmod[4]$iobuf_i +.sym 25416 w_smi_read_req +.sym 25481 io_pmod[4]$SB_IO_IN +.sym 25484 lvds_rx_09_inst.r_state_if_SB_LUT4_I2_O[0] +.sym 25488 io_pmod[5]$SB_IO_IN +.sym 25517 io_pmod[4]$SB_IO_IN +.sym 25518 lvds_rx_09_inst.r_state_if_SB_LUT4_I2_O[0] +.sym 25541 io_pmod[5]$SB_IO_IN +.sym 25544 lvds_rx_09_inst.r_state_if_SB_LUT4_I2_O[0] +.sym 25551 w_lvds_rx_09_d1_SB_LUT4_I0_O_SB_LUT4_I3_O_$glb_ce +.sym 25552 lvds_clock_buf +.sym 25553 i_smi_a1_SB_LUT4_I1_O[3]_$glb_sr .sym 25554 i_smi_soe_se$rename$0 .sym 25556 io_pmod[6]$SB_IO_IN -.sym 25630 spi_if_ins.spi.r3_rx_done -.sym 25631 spi_if_ins.spi.r_rx_done -.sym 25647 spi_if_ins.spi.r2_rx_done -.sym 25672 spi_if_ins.spi.r2_rx_done -.sym 25673 spi_if_ins.spi.r3_rx_done -.sym 25679 spi_if_ins.spi.r2_rx_done -.sym 25686 spi_if_ins.spi.r_rx_done -.sym 25707 r_counter[0]_$glb_clk +.sym 25563 io_pmod[4]$SB_IO_IN +.sym 25631 i_ss$SB_IO_IN +.sym 25633 spi_if_ins.spi.r_rx_done_SB_DFFER_Q_D[1] +.sym 25654 spi_if_ins.spi.r_rx_done_SB_DFFER_Q_E +.sym 25684 spi_if_ins.spi.r_rx_done_SB_DFFER_Q_D[1] +.sym 25706 spi_if_ins.spi.r_rx_done_SB_DFFER_Q_E +.sym 25707 i_sck$SB_IO_IN_$glb_clk +.sym 25708 i_ss$SB_IO_IN .sym 25711 i_glob_clock$SB_IO_IN -.sym 25717 i_smi_soe_se$rename$0 -.sym 25723 spi_if_ins.spi.r3_rx_done_SB_LUT4_I2_O -.sym 25873 io_pmod[2]$SB_IO_IN +.sym 25725 spi_if_ins.spi.r_rx_done_SB_DFFER_Q_D[1] +.sym 25784 spi_if_ins.spi.r3_rx_done_SB_LUT4_I2_O +.sym 25787 spi_if_ins.spi.r_rx_byte[7] +.sym 25810 spi_if_ins.spi.r3_rx_done_SB_LUT4_I2_O +.sym 25816 spi_if_ins.spi.r_rx_byte[7] +.sym 25830 spi_if_ins.spi.r3_rx_done_SB_LUT4_I2_O +.sym 25861 spi_if_ins.spi.r3_rx_done_SB_LUT4_I2_O +.sym 25862 r_counter[0]_$glb_clk +.sym 25876 spi_if_ins.spi.r_rx_done_SB_DFFER_Q_D_SB_LUT4_I3_O .sym 25878 i_glob_clock$SB_IO_IN -.sym 25945 r_counter[0] -.sym 25971 r_counter[0] +.sym 25957 r_counter[0] +.sym 25996 r_counter[0] .sym 26017 i_glob_clock$SB_IO_IN_$glb_clk -.sym 26030 $PACKER_VCC_NET +.sym 26032 $PACKER_VCC_NET +.sym 26096 spi_if_ins.spi.r3_rx_done_SB_LUT4_I2_O +.sym 26144 spi_if_ins.spi.r3_rx_done_SB_LUT4_I2_O +.sym 26172 r_counter[0]_$glb_clk .sym 26174 io_pmod[2]$SB_IO_IN -.sym 26249 io_ctrl_ins.pmod_dir_state_SB_DFFE_Q_E -.sym 26261 w_rx_data[5] -.sym 26324 w_rx_data[5] -.sym 26326 io_ctrl_ins.pmod_dir_state_SB_DFFE_Q_E +.sym 26249 spi_if_ins.spi.r3_rx_done_SB_LUT4_I2_O +.sym 26268 spi_if_ins.spi.r_rx_byte[2] +.sym 26319 spi_if_ins.spi.r_rx_byte[2] +.sym 26326 spi_if_ins.spi.r3_rx_done_SB_LUT4_I2_O .sym 26327 r_counter[0]_$glb_clk -.sym 26345 w_rx_data[5] -.sym 26497 w_smi_read_req -.sym 26810 o_tr_vc1$SB_IO_OUT -.sym 26966 o_tr_vc1_b$SB_IO_OUT -.sym 26968 o_rx_h_tx_l_b$SB_IO_OUT -.sym 27245 io_pmod[4]$SB_IO_IN -.sym 27246 $io_pmod[4]$iobuf_i -.sym 27247 io_pmod[6]$SB_IO_IN -.sym 27275 io_pmod[5]$SB_IO_IN -.sym 27277 io_pmod[7]$SB_IO_IN +.sym 26347 $io_pmod[2]$iobuf_i +.sym 26407 io_ctrl_ins.o_data_out_SB_DFFESR_Q_3_D_SB_LUT4_O_I2[1] +.sym 26413 io_ctrl_ins.o_data_out_SB_DFFESR_Q_3_E +.sym 26415 io_ctrl_ins.o_data_out_SB_DFFESR_Q_3_R +.sym 26426 io_ctrl_ins.o_data_out_SB_DFFESR_Q_3_D_SB_LUT4_O_I2[0] +.sym 26441 io_ctrl_ins.o_data_out_SB_DFFESR_Q_3_D_SB_LUT4_O_I2[0] +.sym 26443 io_ctrl_ins.o_data_out_SB_DFFESR_Q_3_D_SB_LUT4_O_I2[1] +.sym 26481 io_ctrl_ins.o_data_out_SB_DFFESR_Q_3_E +.sym 26482 r_counter[0]_$glb_clk +.sym 26483 io_ctrl_ins.o_data_out_SB_DFFESR_Q_3_R +.sym 26499 io_ctrl_ins.o_data_out_SB_DFFESR_Q_3_D_SB_LUT4_O_I2[1] +.sym 26503 $PACKER_GND_NET +.sym 26654 o_rx_h_tx_l$SB_IO_OUT +.sym 27275 io_pmod[4]$SB_IO_IN +.sym 27277 i_mosi$SB_IO_IN .sym 27283 w_smi_read_req .sym 27285 i_smi_a3$SB_IO_IN .sym 27295 i_smi_a3$SB_IO_IN -.sym 27299 w_smi_read_req +.sym 27301 w_smi_read_req .sym 27305 $io_pmod[3]$iobuf_i .sym 27307 io_pmod[6]$SB_IO_IN .sym 27310 $io_pmod[4]$iobuf_i -.sym 27332 $io_pmod[4]$iobuf_i -.sym 27337 $io_pmod[6]$iobuf_i -.sym 27367 io_pmod[6]$SB_IO_IN +.sym 27334 $io_pmod[4]$iobuf_i +.sym 27335 i_smi_soe_se$rename$0 +.sym 27337 io_pmod[7]$SB_IO_IN +.sym 27365 i_smi_soe_se$rename$0 +.sym 27366 w_smi_read_req .sym 27370 $io_pmod[5]$iobuf_i .sym 27373 $io_pmod[7]$iobuf_i -.sym 27386 $io_pmod[7]$iobuf_i -.sym 27390 $io_pmod[5]$iobuf_i +.sym 27393 $io_pmod[7]$iobuf_i +.sym 27394 $io_pmod[5]$iobuf_i .sym 27400 $io_pmod[3]$iobuf_i .sym 27403 $io_pmod[6]$iobuf_i .sym 27409 $io_pmod[3]$iobuf_i -.sym 27423 $io_pmod[6]$iobuf_i -.sym 27426 $io_pmod[2]$iobuf_i +.sym 27419 $io_pmod[6]$iobuf_i +.sym 27425 io_pmod[2]$SB_IO_IN .sym 27429 i_glob_clock$SB_IO_IN .sym 27451 i_glob_clock$SB_IO_IN -.sym 27455 io_pmod[2]$SB_IO_IN .sym 27459 r_counter[0] .sym 27460 $PACKER_VCC_NET -.sym 27477 r_counter[0] .sym 27480 $PACKER_VCC_NET +.sym 27481 r_counter[0] +.sym 27486 w_smi_read_req .sym 27514 i_smi_a3$SB_IO_IN .sym 27519 $io_pmod[2]$iobuf_i .sym 27524 i_smi_a3$SB_IO_IN +.sym 27528 $io_pmod[2]$iobuf_i .sym 27532 i_smi_a3$SB_IO_IN -.sym 27537 $io_pmod[2]$iobuf_i +.sym 27546 o_tr_vc1$SB_IO_OUT .sym 27549 w_smi_read_req .sym 27551 i_smi_a3$SB_IO_IN .sym 27552 $PACKER_GND_NET +.sym 27559 $PACKER_GND_NET .sym 27566 i_smi_a3$SB_IO_IN -.sym 27569 w_smi_read_req -.sym 27570 $PACKER_GND_NET +.sym 27571 w_smi_read_req .sym 27582 o_rx_h_tx_l$SB_IO_OUT -.sym 27589 o_rx_h_tx_l$SB_IO_OUT +.sym 27593 o_rx_h_tx_l$SB_IO_OUT .sym 27605 o_tr_vc1$SB_IO_OUT .sym 27608 o_tr_vc2$SB_IO_OUT .sym 27620 o_tr_vc1$SB_IO_OUT -.sym 27628 o_tr_vc2$SB_IO_OUT +.sym 27622 o_tr_vc2$SB_IO_OUT .sym 27631 o_rx_h_tx_l_b$SB_IO_OUT .sym 27634 o_tr_vc1_b$SB_IO_OUT -.sym 27647 o_tr_vc1_b$SB_IO_OUT -.sym 27649 o_rx_h_tx_l_b$SB_IO_OUT -.sym 27716 i_smi_soe_se$rename$0 -.sym 27717 smi_ctrl_ins.r_fifo_24_pull_SB_LUT4_I1_O[2] -.sym 27719 w_rx_24_fifo_pull -.sym 27720 w_rx_09_fifo_pull -.sym 27721 i_smi_a2_SB_LUT4_I1_O[3] -.sym 27733 i_smi_a2_SB_LUT4_I1_O_SB_LUT4_I3_1_I2_SB_LUT4_O_I3[1] -.sym 27747 i_smi_a1_SB_LUT4_I1_O_SB_LUT4_O_I2[3] -.sym 27752 i_smi_a1_SB_LUT4_I1_O_SB_LUT4_O_I2_SB_CARRY_CO_I1[4] -.sym 27756 i_smi_a1_SB_LUT4_I1_O_SB_LUT4_O_I2_SB_CARRY_CO_I1[5] -.sym 27759 $PACKER_VCC_NET -.sym 27761 $nextpnr_ICESTORM_LC_13$I3 -.sym 27763 i_smi_soe_se$rename$0 -.sym 27764 smi_ctrl_ins.r_fifo_24_pull_SB_LUT4_I1_O[2] -.sym 27765 $nextpnr_ICESTORM_LC_13$COUT -.sym 27767 i_smi_soe_se$rename$0 -.sym 27768 i_smi_a1_SB_LUT4_I1_O_SB_LUT4_O_I2[5] -.sym 27769 smi_ctrl_ins.r_fifo_24_pull_SB_LUT4_I1_O[2] -.sym 27773 smi_ctrl_ins.int_cnt_24[4] -.sym 27774 i_smi_a1_SB_LUT4_I1_O_SB_LUT4_O_I2[5] -.sym 27775 i_smi_a1_SB_LUT4_I1_O_SB_LUT4_O_I2_SB_LUT4_I0_I1[5] -.sym 27776 i_smi_soe_se$rename$0 -.sym 27777 smi_ctrl_ins.r_fifo_24_pull_SB_LUT4_I1_O[2] -.sym 27779 i_smi_a1_SB_LUT4_I1_O_SB_LUT4_O_I2_SB_CARRY_CO_I1[4] -.sym 27784 i_smi_a1_SB_LUT4_I1_O_SB_LUT4_O_I2_SB_CARRY_CO_I1[5] -.sym 27789 $nextpnr_ICESTORM_LC_18$I3 -.sym 27793 smi_ctrl_ins.int_cnt_24[5] -.sym 27794 i_smi_soe_se$rename$0 -.sym 27800 i_smi_a1_SB_LUT4_I1_O_SB_LUT4_O_I2_SB_LUT4_I0_O[1] -.sym 27801 i_smi_a1_SB_LUT4_I1_O_SB_LUT4_O_I2_SB_LUT4_I0_O[2] -.sym 27803 i_smi_a1_SB_LUT4_I1_O_SB_LUT4_O_I2_SB_LUT4_I0_O[0] -.sym 27804 i_smi_a1_SB_LUT4_I1_O_SB_LUT4_O_I2_SB_LUT4_I0_O[1] -.sym 27805 i_smi_a1_SB_LUT4_I1_O_SB_LUT4_O_I2_SB_LUT4_I0_O[2] -.sym 27806 i_smi_a1_SB_LUT4_I1_O[0] -.sym 27807 i_smi_a1_SB_LUT4_I1_O[1] -.sym 27808 i_smi_a1_SB_LUT4_I1_O[2] -.sym 27809 i_smi_a1_SB_LUT4_I1_O[3] -.sym 27812 lvds_rx_24_inst.r_state_if_SB_LUT4_I2_O[0] -.sym 27813 w_rx_24_fifo_data[8] -.sym 27816 lvds_rx_24_inst.r_state_if_SB_LUT4_I2_O[0] -.sym 27817 w_rx_24_fifo_data[12] -.sym 27820 lvds_rx_24_inst.r_state_if_SB_LUT4_I2_O[0] -.sym 27821 w_rx_24_fifo_data[10] -.sym 27824 lvds_rx_24_inst.r_state_if_SB_LUT4_I2_O[0] -.sym 27825 w_rx_24_fifo_data[9] -.sym 27828 lvds_rx_24_inst.r_state_if_SB_LUT4_I2_O[0] -.sym 27829 w_rx_24_fifo_data[5] -.sym 27832 lvds_rx_24_inst.r_state_if_SB_LUT4_I2_O[0] -.sym 27833 w_rx_24_fifo_data[1] -.sym 27836 lvds_rx_24_inst.r_state_if_SB_LUT4_I2_O[0] -.sym 27837 w_rx_24_fifo_data[7] -.sym 27840 lvds_rx_24_inst.r_state_if_SB_LUT4_I2_O[0] -.sym 27841 w_rx_24_fifo_data[3] -.sym 27844 lvds_rx_24_inst.r_state_if_SB_LUT4_I2_O[0] -.sym 27845 w_rx_24_fifo_data[13] -.sym 27852 lvds_rx_24_inst.r_state_if_SB_LUT4_I2_O[0] -.sym 27853 w_rx_24_fifo_data[0] -.sym 27860 lvds_rx_24_inst.r_state_if_SB_LUT4_I2_O[0] -.sym 27861 w_rx_24_fifo_data[11] -.sym 27868 lvds_rx_24_inst.r_state_if_SB_LUT4_I2_O[0] -.sym 27869 w_rx_24_fifo_data[14] -.sym 27872 lvds_rx_24_inst.r_state_if_SB_LUT4_I2_O[0] -.sym 27873 w_rx_24_fifo_data[6] -.sym 27876 lvds_rx_24_inst.r_state_if_SB_LUT4_I2_O[0] -.sym 27877 w_rx_24_fifo_data[17] -.sym 27880 lvds_rx_24_inst.r_state_if_SB_LUT4_I2_O[0] -.sym 27881 w_rx_24_fifo_data[25] -.sym 27884 lvds_rx_24_inst.r_state_if_SB_LUT4_I2_O[0] -.sym 27885 w_rx_24_fifo_data[19] -.sym 27888 lvds_rx_24_inst.r_state_if_SB_LUT4_I2_O[0] -.sym 27889 w_rx_24_fifo_data[21] -.sym 27892 lvds_rx_24_inst.r_state_if_SB_LUT4_I2_O[0] -.sym 27893 w_rx_24_fifo_data[15] -.sym 27900 lvds_rx_24_inst.r_state_if_SB_LUT4_I2_O[0] -.sym 27901 w_rx_24_fifo_data[23] -.sym 27907 lvds_rx_09_inst.r_phase_count[0] -.sym 27911 lvds_rx_09_inst.r_phase_count[1] -.sym 27912 $PACKER_VCC_NET -.sym 27913 lvds_rx_09_inst.r_phase_count[0] -.sym 27914 lvds_rx_09_inst.r_push_SB_DFFNESR_Q_E_SB_LUT4_O_I1_SB_LUT4_I0_O_SB_DFFNESR_D_Q[1] -.sym 27916 $PACKER_VCC_NET -.sym 27917 lvds_rx_09_inst.r_phase_count_SB_CARRY_CI_CO[2] -.sym 27920 lvds_rx_09_inst.r_push_SB_DFFNESR_Q_E_SB_LUT4_O_I1_SB_LUT4_O_I2[2] -.sym 27921 lvds_rx_09_inst.r_push_SB_DFFNESR_Q_E_SB_LUT4_O_I1_SB_LUT4_O_I2[3] -.sym 27932 lvds_rx_09_inst.r_state_if_SB_LUT4_I2_O[0] -.sym 27933 lvds_rx_09_inst.r_phase_count_SB_LUT4_I1_O[0] -.sym 27937 lvds_rx_09_inst.r_phase_count_SB_LUT4_I1_O[0] -.sym 27940 lvds_rx_09_inst.r_push_SB_DFFNESR_Q_E_SB_LUT4_O_I1_SB_LUT4_I0_O_SB_DFFNESR_D_Q[0] -.sym 27941 lvds_rx_09_inst.r_push_SB_DFFNESR_Q_E_SB_LUT4_O_I1_SB_LUT4_I0_O_SB_DFFNESR_D_Q[1] -.sym 27944 i_smi_a1_SB_LUT4_I1_O_SB_LUT4_O_I2_SB_LUT4_I0_O[2] -.sym 27945 w_lvds_rx_09_d1_SB_LUT4_I0_O[1] -.sym 27946 rx_24_fifo.rd_addr_gray_wr[2] -.sym 27951 lvds_rx_09_inst.r_phase_count_SB_LUT4_I1_O[0] -.sym 27952 lvds_rx_09_inst.r_push_SB_DFFNESR_Q_E_SB_LUT4_O_I1_SB_LUT4_O_I2[0] -.sym 27953 lvds_rx_09_inst.r_push_SB_DFFNESR_Q_E_SB_LUT4_O_I1_SB_LUT4_O_I2[2] -.sym 27954 lvds_rx_09_inst.r_push_SB_DFFNESR_Q_E_SB_LUT4_O_I1_SB_LUT4_O_I2[2] -.sym 27955 lvds_rx_09_inst.r_phase_count_SB_LUT4_I1_O[0] -.sym 27956 lvds_rx_09_inst.r_push_SB_DFFNESR_Q_E_SB_LUT4_O_I1_SB_LUT4_O_I2[0] -.sym 27957 lvds_rx_09_inst.r_push_SB_DFFNESR_Q_E_SB_LUT4_O_I1_SB_LUT4_O_I2[3] -.sym 27959 w_lvds_rx_09_d1_SB_LUT4_I0_O[1] -.sym 27960 lvds_rx_09_inst.r_state_if_SB_DFFNESR_Q_E_SB_LUT4_O_I2[1] -.sym 27961 i_smi_a1_SB_LUT4_I1_O_SB_LUT4_O_I2_SB_LUT4_I0_O[2] -.sym 27962 rx_24_fifo.rd_addr_gray[2] -.sym 27966 lvds_rx_09_inst.r_push_SB_DFFNESR_Q_E_SB_LUT4_O_I1_SB_LUT4_O_I2[0] -.sym 27967 lvds_rx_09_inst.r_phase_count_SB_LUT4_I1_O[0] -.sym 27968 lvds_rx_09_inst.r_push_SB_DFFNESR_Q_E_SB_LUT4_O_I1_SB_LUT4_O_I2[2] -.sym 27969 lvds_rx_09_inst.r_push_SB_DFFNESR_Q_E_SB_LUT4_O_I1_SB_LUT4_O_I2[3] -.sym 27970 lvds_rx_09_inst.r_push_SB_DFFNESR_Q_E_SB_LUT4_O_I1[0] -.sym 27971 lvds_rx_09_inst.r_push_SB_DFFNESR_Q_E_SB_LUT4_O_I1[1] -.sym 27972 lvds_rx_09_inst.r_phase_count_SB_LUT4_I1_O[2] -.sym 27973 lvds_rx_09_inst.r_push_SB_DFFNESR_Q_E_SB_LUT4_O_I1[3] -.sym 27977 lvds_rx_09_inst.r_push_SB_DFFNESR_Q_E_SB_LUT4_O_I1_SB_LUT4_I0_O_SB_DFFNESR_D_Q[0] -.sym 27978 lvds_rx_09_inst.r_push_SB_DFFNESR_Q_E_SB_LUT4_O_I1[0] -.sym 27979 lvds_rx_09_inst.r_push_SB_DFFNESR_Q_E_SB_LUT4_O_I1[1] -.sym 27980 lvds_rx_09_inst.r_phase_count_SB_LUT4_I1_O[1] -.sym 27981 lvds_rx_09_inst.r_push_SB_DFFNESR_Q_E_SB_LUT4_O_I1[3] -.sym 27982 lvds_rx_24_inst.r_push_SB_LUT4_I0_1_I1_SB_LUT4_O_1_I3[0] -.sym 27983 lvds_rx_24_inst.r_push_SB_LUT4_I0_1_I1_SB_LUT4_O_1_I3[1] -.sym 27984 lvds_rx_24_inst.r_push_SB_LUT4_I0_1_I1_SB_LUT4_O_1_I3[2] -.sym 27985 lvds_rx_24_inst.r_push_SB_LUT4_I0_1_I1_SB_LUT4_O_1_I3[3] -.sym 27987 rx_24_fifo.rd_addr_gray_wr_r[5] -.sym 27988 lvds_rx_24_inst.r_push_SB_LUT4_I0_1_I1_SB_LUT4_O_1_I3[2] -.sym 27989 lvds_rx_24_inst.r_push_SB_LUT4_I0_1_I1_SB_LUT4_O_I2[5] -.sym 27991 rx_24_fifo.rd_addr_gray_wr_r[2] -.sym 27992 lvds_rx_24_inst.r_push_SB_LUT4_I0_1_I1_SB_LUT4_O_I2[1] -.sym 27993 lvds_rx_24_inst.r_push_SB_LUT4_I0_1_I1_SB_LUT4_O_2_I0[2] -.sym 27994 w_lvds_rx_09_d1 -.sym 27995 w_lvds_rx_09_d0 -.sym 27996 lvds_rx_09_inst.r_push_SB_DFFNESR_Q_E_SB_LUT4_O_I1_SB_LUT4_O_I2[2] -.sym 27997 lvds_rx_09_inst.r_push_SB_DFFNESR_Q_E_SB_LUT4_O_I1_SB_LUT4_O_I2[3] -.sym 27998 lvds_rx_24_inst.r_push_SB_LUT4_I0_1_I1_SB_LUT4_O_2_I0[0] -.sym 27999 lvds_rx_24_inst.r_push_SB_LUT4_I0_1_I1_SB_LUT4_O_2_I0[1] -.sym 28000 lvds_rx_24_inst.r_push_SB_LUT4_I0_1_I1_SB_LUT4_O_2_I0[2] -.sym 28001 lvds_rx_24_inst.r_push_SB_LUT4_I0_1_I1_SB_LUT4_O_1_I3[1] -.sym 28002 w_rx_24_fifo_push -.sym 28003 lvds_rx_24_inst.r_push_SB_LUT4_I0_1_I1[1] -.sym 28004 lvds_rx_24_inst.r_push_SB_LUT4_I0_1_I1[2] -.sym 28005 lvds_rx_24_inst.r_push_SB_LUT4_I0_1_I1[3] -.sym 28007 lvds_rx_24_inst.r_push_SB_DFFNESR_Q_E_SB_LUT4_O_I1[1] -.sym 28008 w_rx_24_fifo_full -.sym 28009 lvds_rx_24_inst.r_push_SB_DFFNESR_Q_E_SB_LUT4_O_I1_SB_LUT4_O_I2[0] -.sym 28016 lvds_rx_24_inst.r_push_SB_DFFNESR_Q_E_SB_LUT4_O_I1_SB_LUT4_O_I2[0] -.sym 28017 lvds_rx_24_inst.r_push_SB_DFFNESR_Q_E_SB_LUT4_O_I1[1] -.sym 28027 i_smi_a1_SB_LUT4_I1_O_SB_LUT4_O_I2_SB_LUT4_I0_O[2] -.sym 28028 lvds_rx_09_inst.r_push_SB_DFFNESR_Q_E_SB_LUT4_O_I1_SB_LUT4_O_I2[2] -.sym 28029 lvds_rx_09_inst.r_push_SB_DFFNESR_Q_E_SB_LUT4_O_I1_SB_LUT4_O_I2[3] -.sym 28031 lvds_rx_24_inst.r_push_SB_LUT4_I0_1_I1_SB_LUT4_O_2_I0[1] -.sym 28032 rx_24_fifo.wr_addr_gray_SB_LUT4_I2_1_O[3] -.sym 28033 rx_24_fifo.wr_addr_gray_SB_LUT4_I2_1_O[4] -.sym 28038 lvds_rx_24_inst.r_state_if_SB_LUT4_I2_O[0] -.sym 28042 w_rx_24_fifo_full -.sym 28043 rx_24_fifo.full_o_SB_LUT4_I0_I1[1] -.sym 28044 rx_24_fifo.full_o_SB_LUT4_I0_I1[2] -.sym 28045 rx_24_fifo.full_o_SB_LUT4_I0_I1[3] -.sym 28050 lvds_rx_24_inst.r_state_if_SB_LUT4_I2_O[1] -.sym 28059 lvds_rx_24_inst.r_push_SB_DFFNESR_Q_E_SB_LUT4_O_I1[0] -.sym 28060 lvds_rx_24_inst.r_push_SB_DFFNESR_Q_E_SB_LUT4_O_I1[1] -.sym 28061 i_smi_a1_SB_LUT4_I1_O_SB_LUT4_O_I2_SB_LUT4_I0_O[2] -.sym 28064 lvds_rx_24_inst.r_push_SB_DFFNESR_Q_E_SB_LUT4_O_I1_SB_LUT4_O_I2[0] -.sym 28065 lvds_rx_24_inst.r_push_SB_DFFNESR_Q_E_SB_LUT4_O_I1[1] -.sym 28068 lvds_rx_24_inst.r_push_SB_DFFNESR_Q_E_SB_LUT4_O_I1_SB_LUT4_O_I2_SB_LUT4_I0_O[0] -.sym 28069 w_lvds_rx_24_d0 -.sym 28071 i_smi_a1_SB_LUT4_I1_O_SB_LUT4_O_I2_SB_LUT4_I0_O[2] -.sym 28072 lvds_rx_24_inst.r_push_SB_DFFNESR_Q_E_SB_LUT4_O_I1_SB_LUT4_O_I2[0] -.sym 28073 lvds_rx_24_inst.r_push_SB_DFFNESR_Q_E_SB_LUT4_O_I1[1] -.sym 28074 lvds_rx_24_inst.r_push_SB_DFFNESR_Q_E_SB_LUT4_O_I1_SB_LUT4_O_I2[0] -.sym 28075 lvds_rx_24_inst.r_phase_count_SB_LUT4_I1_O[0] -.sym 28076 lvds_rx_24_inst.r_push_SB_DFFNESR_Q_E_SB_LUT4_O_I1_SB_LUT4_O_I2[2] -.sym 28077 lvds_rx_24_inst.r_push_SB_DFFNESR_Q_E_SB_LUT4_O_I1[1] -.sym 28079 lvds_rx_24_inst.r_phase_count_SB_LUT4_I1_O[0] -.sym 28080 lvds_rx_24_inst.r_push_SB_DFFNESR_Q_E_SB_LUT4_O_I1_SB_LUT4_O_I2[2] -.sym 28081 lvds_rx_24_inst.r_push_SB_DFFNESR_Q_E_SB_LUT4_O_I1_SB_LUT4_O_I2[0] -.sym 28084 lvds_rx_24_inst.r_push_SB_DFFNESR_Q_E_SB_LUT4_O_I1_SB_LUT4_O_I2_SB_LUT4_I0_O[0] -.sym 28085 w_lvds_rx_24_d1 -.sym 28087 w_lvds_rx_24_d1_SB_LUT4_I0_O[1] -.sym 28088 lvds_rx_24_inst.r_state_if_SB_DFFNESR_Q_E_SB_LUT4_O_I2[1] -.sym 28089 i_smi_a1_SB_LUT4_I1_O_SB_LUT4_O_I2_SB_LUT4_I0_O[2] -.sym 28090 lvds_rx_24_inst.r_push_SB_DFFNESR_Q_E_SB_LUT4_O_I1_SB_LUT4_O_I2[2] -.sym 28091 lvds_rx_24_inst.r_phase_count_SB_LUT4_I1_O[0] -.sym 28092 lvds_rx_24_inst.r_push_SB_DFFNESR_Q_E_SB_LUT4_O_I1_SB_LUT4_O_I2[0] -.sym 28093 lvds_rx_24_inst.r_push_SB_DFFNESR_Q_E_SB_LUT4_O_I1[1] -.sym 28094 w_lvds_rx_24_d1 -.sym 28095 w_lvds_rx_24_d0 -.sym 28096 lvds_rx_24_inst.r_push_SB_DFFNESR_Q_E_SB_LUT4_O_I1[1] -.sym 28097 lvds_rx_24_inst.r_push_SB_DFFNESR_Q_E_SB_LUT4_O_I1_SB_LUT4_O_I2[0] -.sym 28099 lvds_rx_24_inst.r_phase_count[0] -.sym 28103 lvds_rx_24_inst.r_phase_count[1] -.sym 28104 $PACKER_VCC_NET -.sym 28105 lvds_rx_24_inst.r_phase_count[0] -.sym 28106 lvds_rx_24_inst.r_push_SB_DFFNESR_Q_E_SB_LUT4_O_I1_SB_LUT4_I0_O_SB_DFFNESR_D_Q[1] -.sym 28108 $PACKER_VCC_NET -.sym 28109 lvds_rx_24_inst.r_phase_count_SB_CARRY_CI_CO[2] -.sym 28110 lvds_rx_24_inst.r_push_SB_DFFNESR_Q_E_SB_LUT4_O_I1[0] -.sym 28111 lvds_rx_24_inst.r_state_if_SB_LUT4_I2_O[1] -.sym 28112 lvds_rx_24_inst.r_phase_count_SB_LUT4_I1_O[2] -.sym 28113 lvds_rx_24_inst.r_push_SB_DFFNESR_Q_E_SB_LUT4_O_I1_SB_LUT4_O_I2_SB_LUT4_I0_O[0] -.sym 28117 lvds_rx_24_inst.r_phase_count_SB_LUT4_I1_O[0] -.sym 28118 lvds_rx_24_inst.r_push_SB_DFFNESR_Q_E_SB_LUT4_O_I1[0] -.sym 28119 lvds_rx_24_inst.r_state_if_SB_LUT4_I2_O[1] -.sym 28120 lvds_rx_24_inst.r_phase_count_SB_LUT4_I1_O[1] -.sym 28121 lvds_rx_24_inst.r_push_SB_DFFNESR_Q_E_SB_LUT4_O_I1_SB_LUT4_O_I2_SB_LUT4_I0_O[0] -.sym 28124 lvds_rx_24_inst.r_push_SB_DFFNESR_Q_E_SB_LUT4_O_I1_SB_LUT4_I0_O_SB_DFFNESR_D_Q[0] -.sym 28125 lvds_rx_24_inst.r_push_SB_DFFNESR_Q_E_SB_LUT4_O_I1_SB_LUT4_I0_O_SB_DFFNESR_D_Q[1] -.sym 28129 lvds_rx_24_inst.r_push_SB_DFFNESR_Q_E_SB_LUT4_O_I1_SB_LUT4_I0_O_SB_DFFNESR_D_Q[0] -.sym 28132 lvds_rx_09_inst.r_push_SB_DFFNESR_Q_E_SB_LUT4_O_I1[3] -.sym 28133 w_lvds_rx_09_d1 -.sym 28156 lvds_rx_09_inst.r_push_SB_DFFNESR_Q_E_SB_LUT4_O_I1[3] -.sym 28157 w_lvds_rx_09_d0 -.sym 28194 smi_ctrl_ins.o_smi_data_out_SB_DFFE_Q_7_D_SB_LUT4_O_I0[0] -.sym 28195 smi_ctrl_ins.o_smi_data_out_SB_DFFE_Q_7_D_SB_LUT4_O_I0[1] -.sym 28196 smi_ctrl_ins.o_smi_data_out_SB_DFFE_Q_7_D_SB_LUT4_O_I0[2] -.sym 28197 i_smi_a2_SB_LUT4_I1_O[3] -.sym 28199 w_rx_09_fifo_pulled_data[0] -.sym 28200 smi_ctrl_ins.int_cnt_09_SB_DFFESR_Q_D_SB_LUT4_O_I3[2] -.sym 28201 i_smi_a2_SB_LUT4_I1_O[3] -.sym 28202 smi_ctrl_ins.int_cnt_09_SB_DFFESR_Q_D_SB_LUT4_O_I3[2] -.sym 28203 smi_ctrl_ins.o_smi_data_out_SB_DFFE_Q_3_D_SB_LUT4_O_I1[1] -.sym 28204 smi_ctrl_ins.o_smi_data_out_SB_DFFE_Q_1_D_SB_LUT4_O_I1[2] -.sym 28205 smi_ctrl_ins.o_smi_data_out_SB_DFFE_Q_3_D_SB_LUT4_O_I1[3] -.sym 28206 w_rx_09_fifo_pulled_data[4] -.sym 28207 w_rx_09_fifo_pulled_data[20] -.sym 28208 smi_ctrl_ins.int_cnt_09[3] -.sym 28209 smi_ctrl_ins.int_cnt_09_SB_DFFESR_Q_D_SB_LUT4_O_I3[1] -.sym 28210 smi_ctrl_ins.int_cnt_09_SB_DFFESR_Q_D_SB_LUT4_O_I3[2] -.sym 28211 smi_ctrl_ins.o_smi_data_out_SB_DFFE_Q_D_SB_LUT4_O_I2[1] -.sym 28212 smi_ctrl_ins.o_smi_data_out_SB_DFFE_Q_1_D_SB_LUT4_O_I1[2] -.sym 28213 smi_ctrl_ins.o_smi_data_out_SB_DFFE_Q_D_SB_LUT4_O_I2[3] -.sym 28214 w_rx_09_fifo_pulled_data[0] -.sym 28215 w_rx_09_fifo_pulled_data[16] -.sym 28216 smi_ctrl_ins.int_cnt_09_SB_DFFESR_Q_D_SB_LUT4_O_I3[1] -.sym 28217 smi_ctrl_ins.int_cnt_09[3] -.sym 28218 w_rx_09_fifo_pulled_data[12] -.sym 28219 w_rx_09_fifo_pulled_data[28] -.sym 28220 smi_ctrl_ins.int_cnt_09[3] -.sym 28221 smi_ctrl_ins.o_smi_data_out_SB_DFFE_Q_3_D_SB_LUT4_O_I1_SB_LUT4_O_I3[3] -.sym 28224 i_smi_a3$SB_IO_IN -.sym 28225 w_smi_data_output[6] -.sym 28226 smi_ctrl_ins.int_cnt_09_SB_DFFESR_Q_D_SB_LUT4_O_I3[2] -.sym 28227 smi_ctrl_ins.o_smi_data_out_SB_DFFE_Q_1_D_SB_LUT4_O_I1[1] -.sym 28228 smi_ctrl_ins.o_smi_data_out_SB_DFFE_Q_1_D_SB_LUT4_O_I1[2] -.sym 28229 smi_ctrl_ins.o_smi_data_out_SB_DFFE_Q_1_D_SB_LUT4_O_I1[3] -.sym 28230 smi_ctrl_ins.int_cnt_09_SB_DFFESR_Q_D_SB_LUT4_O_I3[2] -.sym 28231 smi_ctrl_ins.o_smi_data_out_SB_DFFE_Q_2_D_SB_LUT4_O_I1[1] -.sym 28232 smi_ctrl_ins.o_smi_data_out_SB_DFFE_Q_1_D_SB_LUT4_O_I1[2] -.sym 28233 smi_ctrl_ins.o_smi_data_out_SB_DFFE_Q_2_D_SB_LUT4_O_I1[3] -.sym 28234 smi_ctrl_ins.int_cnt_09_SB_DFFESR_Q_D_SB_LUT4_O_I3[2] -.sym 28235 smi_ctrl_ins.o_smi_data_out_SB_DFFE_Q_D_SB_LUT4_O_I1[1] -.sym 28236 smi_ctrl_ins.o_smi_data_out_SB_DFFE_Q_1_D_SB_LUT4_O_I1[2] -.sym 28237 smi_ctrl_ins.o_smi_data_out_SB_DFFE_Q_D_SB_LUT4_O_I1[3] -.sym 28239 i_smi_a2_SB_LUT4_I1_O[3] -.sym 28240 i_smi_a1_SB_LUT4_I1_O[3] -.sym 28241 smi_ctrl_ins.r_fifo_24_pull_SB_LUT4_I1_O_SB_LUT4_I0_O[2] -.sym 28242 w_rx_09_fifo_pulled_data[9] -.sym 28243 w_rx_09_fifo_pulled_data[25] -.sym 28244 smi_ctrl_ins.int_cnt_09[3] -.sym 28245 smi_ctrl_ins.o_smi_data_out_SB_DFFE_Q_6_D_SB_LUT4_O_I1_SB_LUT4_O_I3[3] -.sym 28246 w_rx_09_fifo_pulled_data[1] -.sym 28247 w_rx_09_fifo_pulled_data[17] -.sym 28248 smi_ctrl_ins.int_cnt_09[3] -.sym 28249 smi_ctrl_ins.int_cnt_09_SB_DFFESR_Q_D_SB_LUT4_O_I3[1] -.sym 28250 smi_ctrl_ins.int_cnt_09_SB_DFFESR_Q_D_SB_LUT4_O_I3[2] -.sym 28251 smi_ctrl_ins.o_smi_data_out_SB_DFFE_Q_6_D_SB_LUT4_O_I1[1] -.sym 28252 smi_ctrl_ins.o_smi_data_out_SB_DFFE_Q_1_D_SB_LUT4_O_I1[2] -.sym 28253 smi_ctrl_ins.o_smi_data_out_SB_DFFE_Q_6_D_SB_LUT4_O_I1[3] -.sym 28254 smi_ctrl_ins.int_cnt_09_SB_DFFESR_Q_D_SB_LUT4_O_I3[2] -.sym 28255 smi_ctrl_ins.o_smi_data_out_SB_DFFE_Q_5_D_SB_LUT4_O_I1[1] -.sym 28256 smi_ctrl_ins.o_smi_data_out_SB_DFFE_Q_1_D_SB_LUT4_O_I1[2] -.sym 28257 smi_ctrl_ins.o_smi_data_out_SB_DFFE_Q_5_D_SB_LUT4_O_I1[3] -.sym 28259 i_smi_a2_SB_LUT4_I1_O_SB_LUT4_I3_1_I2_SB_LUT4_O_I3[1] -.sym 28263 smi_ctrl_ins.int_cnt_24[4] -.sym 28264 $PACKER_VCC_NET -.sym 28267 smi_ctrl_ins.int_cnt_24[5] -.sym 28268 $PACKER_VCC_NET -.sym 28269 i_smi_a2_SB_LUT4_I1_O_SB_LUT4_I3_1_I2_SB_LUT4_O_I3[2] -.sym 28271 i_smi_a2_SB_LUT4_I1_O_SB_LUT4_I3_1_I2_SB_LUT4_O_I3[1] -.sym 28272 i_smi_soe_se$rename$0 -.sym 28273 smi_ctrl_ins.r_fifo_24_pull_SB_LUT4_I1_O[2] -.sym 28274 i_smi_a2_SB_LUT4_I1_O_SB_LUT4_I3_1_I2[2] -.sym 28275 smi_ctrl_ins.o_smi_data_out_SB_DFFE_Q_6_D_SB_LUT4_O_I1_SB_LUT4_O_1_I1[1] -.sym 28276 smi_ctrl_ins.o_smi_data_out_SB_DFFE_Q_6_D_SB_LUT4_O_I1_SB_LUT4_O_1_I1[2] -.sym 28277 smi_ctrl_ins.o_smi_data_out_SB_DFFE_Q_1_D_SB_LUT4_O_I1_SB_LUT4_O_1_I1[3] -.sym 28278 i_smi_a2_SB_LUT4_I1_O_SB_LUT4_I3_1_I2[2] -.sym 28279 smi_ctrl_ins.o_smi_data_out_SB_DFFE_Q_5_D_SB_LUT4_O_I1_SB_LUT4_O_1_I1[1] -.sym 28280 smi_ctrl_ins.o_smi_data_out_SB_DFFE_Q_5_D_SB_LUT4_O_I1_SB_LUT4_O_1_I1[2] -.sym 28281 smi_ctrl_ins.o_smi_data_out_SB_DFFE_Q_1_D_SB_LUT4_O_I1_SB_LUT4_O_1_I1[3] -.sym 28282 smi_ctrl_ins.r_fifo_24_pull_SB_LUT4_I1_O[0] -.sym 28283 i_smi_soe_se$rename$0 -.sym 28284 smi_ctrl_ins.r_fifo_24_pull_SB_LUT4_I1_O[2] -.sym 28285 smi_ctrl_ins.r_fifo_24_pull_SB_LUT4_I1_O[3] -.sym 28286 i_smi_a2_SB_LUT4_I1_O_SB_LUT4_I3_1_I2[2] -.sym 28287 smi_ctrl_ins.o_smi_data_out_SB_DFFE_Q_1_D_SB_LUT4_O_I1_SB_LUT4_O_1_I1[1] -.sym 28288 smi_ctrl_ins.o_smi_data_out_SB_DFFE_Q_1_D_SB_LUT4_O_I1_SB_LUT4_O_1_I1[2] -.sym 28289 smi_ctrl_ins.o_smi_data_out_SB_DFFE_Q_1_D_SB_LUT4_O_I1_SB_LUT4_O_1_I1[3] -.sym 28290 w_rx_24_fifo_pulled_data[14] -.sym 28291 w_rx_24_fifo_pulled_data[6] -.sym 28292 i_smi_a2_SB_LUT4_I1_O_SB_LUT4_I3_1_I2[1] -.sym 28293 i_smi_a2_SB_LUT4_I1_O_SB_LUT4_I3_1_I2_SB_LUT4_O_I3[1] -.sym 28294 smi_ctrl_ins.int_cnt_24[4] -.sym 28295 smi_ctrl_ins.int_cnt_24[5] -.sym 28296 i_smi_a2_SB_LUT4_I1_O_SB_LUT4_I3_1_I2_SB_LUT4_O_I3[1] -.sym 28297 w_rx_24_fifo_empty -.sym 28299 i_smi_soe_se$rename$0 -.sym 28300 smi_ctrl_ins.r_fifo_24_pull_SB_LUT4_I1_O[2] -.sym 28301 i_smi_a2_SB_LUT4_I1_O_SB_LUT4_I3_1_I2[1] -.sym 28302 i_smi_a2_SB_LUT4_I1_O_SB_LUT4_I3_1_I2[2] -.sym 28303 smi_ctrl_ins.o_smi_data_out_SB_DFFE_Q_D_SB_LUT4_O_I1_SB_LUT4_O_1_I1[1] -.sym 28304 smi_ctrl_ins.o_smi_data_out_SB_DFFE_Q_D_SB_LUT4_O_I1_SB_LUT4_O_1_I1[2] -.sym 28305 smi_ctrl_ins.o_smi_data_out_SB_DFFE_Q_1_D_SB_LUT4_O_I1_SB_LUT4_O_1_I1[3] -.sym 28306 w_rx_24_fifo_pulled_data[9] -.sym 28307 w_rx_24_fifo_pulled_data[1] -.sym 28308 i_smi_a2_SB_LUT4_I1_O_SB_LUT4_I3_1_I2[1] -.sym 28309 i_smi_a2_SB_LUT4_I1_O_SB_LUT4_I3_1_I2_SB_LUT4_O_I3[1] -.sym 28310 i_smi_a2_SB_LUT4_I1_O[1] -.sym 28311 i_smi_a1_SB_LUT4_I1_O[0] -.sym 28312 i_smi_a1_SB_LUT4_I1_O_SB_LUT4_O_I2_SB_LUT4_I0_O[2] -.sym 28313 i_smi_a1_SB_LUT4_I1_O[3] -.sym 28314 i_smi_a2_SB_LUT4_I1_O_SB_LUT4_I3_1_I2[2] -.sym 28315 smi_ctrl_ins.o_smi_data_out_SB_DFFE_Q_D_SB_LUT4_O_I1_SB_LUT4_O_1_I3[1] -.sym 28316 smi_ctrl_ins.o_smi_data_out_SB_DFFE_Q_D_SB_LUT4_O_I1_SB_LUT4_O_1_I3[2] -.sym 28317 smi_ctrl_ins.o_smi_data_out_SB_DFFE_Q_1_D_SB_LUT4_O_I1_SB_LUT4_O_1_I1[3] -.sym 28319 w_rx_24_fifo_pulled_data[0] -.sym 28320 i_smi_a2_SB_LUT4_I1_O_SB_LUT4_I3_1_I2[2] -.sym 28321 i_smi_a2_SB_LUT4_I1_O[3] -.sym 28322 w_rx_24_fifo_pulled_data[11] -.sym 28323 w_rx_24_fifo_pulled_data[3] -.sym 28324 i_smi_a2_SB_LUT4_I1_O_SB_LUT4_I3_1_I2[1] -.sym 28325 i_smi_a2_SB_LUT4_I1_O_SB_LUT4_I3_1_I2_SB_LUT4_O_I3[1] -.sym 28327 smi_ctrl_ins.int_cnt_24[4] -.sym 28328 $PACKER_VCC_NET -.sym 28329 i_smi_a2_SB_LUT4_I1_O_SB_LUT4_I3_1_I2_SB_LUT4_O_I3[1] -.sym 28330 w_rx_24_fifo_pulled_data[10] -.sym 28331 w_rx_24_fifo_pulled_data[2] -.sym 28332 i_smi_a2_SB_LUT4_I1_O_SB_LUT4_I3_1_I2[1] -.sym 28333 i_smi_a2_SB_LUT4_I1_O_SB_LUT4_I3_1_I2_SB_LUT4_O_I3[1] -.sym 28334 w_rx_24_fifo_pulled_data[12] -.sym 28335 w_rx_24_fifo_pulled_data[4] -.sym 28336 i_smi_a2_SB_LUT4_I1_O_SB_LUT4_I3_1_I2[1] -.sym 28337 i_smi_a2_SB_LUT4_I1_O_SB_LUT4_I3_1_I2_SB_LUT4_O_I3[1] -.sym 28338 w_rx_24_fifo_pulled_data[15] -.sym 28339 w_rx_24_fifo_pulled_data[7] -.sym 28340 i_smi_a2_SB_LUT4_I1_O_SB_LUT4_I3_1_I2[1] -.sym 28341 i_smi_a2_SB_LUT4_I1_O_SB_LUT4_I3_1_I2_SB_LUT4_O_I3[1] -.sym 28342 i_smi_a2_SB_LUT4_I1_O_SB_LUT4_I3_1_I2[2] -.sym 28343 smi_ctrl_ins.o_smi_data_out_SB_DFFE_Q_2_D_SB_LUT4_O_I1_SB_LUT4_O_1_I1[1] -.sym 28344 smi_ctrl_ins.o_smi_data_out_SB_DFFE_Q_2_D_SB_LUT4_O_I1_SB_LUT4_O_1_I1[2] -.sym 28345 smi_ctrl_ins.o_smi_data_out_SB_DFFE_Q_1_D_SB_LUT4_O_I1_SB_LUT4_O_1_I1[3] -.sym 28346 i_smi_a2_SB_LUT4_I1_O_SB_LUT4_I3_1_I2[2] -.sym 28347 smi_ctrl_ins.o_smi_data_out_SB_DFFE_Q_D_SB_LUT4_O_I2_SB_LUT4_O_1_I1[1] -.sym 28348 smi_ctrl_ins.o_smi_data_out_SB_DFFE_Q_D_SB_LUT4_O_I2_SB_LUT4_O_1_I1[2] -.sym 28349 smi_ctrl_ins.o_smi_data_out_SB_DFFE_Q_1_D_SB_LUT4_O_I1_SB_LUT4_O_1_I1[3] -.sym 28350 w_rx_24_fifo_pulled_data[13] -.sym 28351 w_rx_24_fifo_pulled_data[5] -.sym 28352 i_smi_a2_SB_LUT4_I1_O_SB_LUT4_I3_1_I2[1] -.sym 28353 i_smi_a2_SB_LUT4_I1_O_SB_LUT4_I3_1_I2_SB_LUT4_O_I3[1] -.sym 28354 w_rx_24_fifo_pulled_data[0] -.sym 28355 w_rx_24_fifo_pulled_data[16] -.sym 28356 i_smi_a2_SB_LUT4_I1_O_SB_LUT4_I3_1_I2_SB_LUT4_O_I3[1] -.sym 28357 i_smi_a2_SB_LUT4_I1_O_SB_LUT4_I3_1_I2[1] -.sym 28358 w_rx_24_fifo_pulled_data[27] -.sym 28359 w_rx_24_fifo_pulled_data[19] -.sym 28360 i_smi_a2_SB_LUT4_I1_O_SB_LUT4_I3_1_I2_SB_LUT4_O_I3[1] -.sym 28361 i_smi_a2_SB_LUT4_I1_O_SB_LUT4_I3_1_I2[1] -.sym 28364 lvds_rx_24_inst.r_state_if_SB_LUT4_I2_O[0] -.sym 28365 w_rx_24_fifo_data[4] -.sym 28366 w_rx_24_fifo_pulled_data[8] -.sym 28367 w_rx_24_fifo_pulled_data[24] -.sym 28368 i_smi_a2_SB_LUT4_I1_O_SB_LUT4_I3_1_I2_SB_LUT4_O_I3[1] -.sym 28369 smi_ctrl_ins.o_smi_data_out_SB_DFFE_Q_7_D_SB_LUT4_O_I0_SB_LUT4_O_I3[3] -.sym 28370 w_rx_24_fifo_pulled_data[29] -.sym 28371 w_rx_24_fifo_pulled_data[21] -.sym 28372 i_smi_a2_SB_LUT4_I1_O_SB_LUT4_I3_1_I2_SB_LUT4_O_I3[1] -.sym 28373 i_smi_a2_SB_LUT4_I1_O_SB_LUT4_I3_1_I2[1] -.sym 28374 w_rx_24_fifo_pulled_data[28] -.sym 28375 w_rx_24_fifo_pulled_data[20] -.sym 28376 i_smi_a2_SB_LUT4_I1_O_SB_LUT4_I3_1_I2_SB_LUT4_O_I3[1] -.sym 28377 i_smi_a2_SB_LUT4_I1_O_SB_LUT4_I3_1_I2[1] -.sym 28378 w_rx_24_fifo_pulled_data[26] -.sym 28379 w_rx_24_fifo_pulled_data[18] -.sym 28380 i_smi_a2_SB_LUT4_I1_O_SB_LUT4_I3_1_I2_SB_LUT4_O_I3[1] -.sym 28381 i_smi_a2_SB_LUT4_I1_O_SB_LUT4_I3_1_I2[1] -.sym 28384 lvds_rx_24_inst.r_state_if_SB_LUT4_I2_O[0] -.sym 28385 w_rx_24_fifo_data[2] -.sym 28388 lvds_rx_24_inst.r_state_if_SB_LUT4_I2_O[0] -.sym 28389 w_rx_24_fifo_data[20] -.sym 28392 lvds_rx_24_inst.r_state_if_SB_LUT4_I2_O[0] -.sym 28393 w_rx_24_fifo_data[22] +.sym 27643 o_tr_vc1_b$SB_IO_OUT +.sym 27651 o_rx_h_tx_l_b$SB_IO_OUT +.sym 27722 rx_09_fifo.wr_addr_gray[4] +.sym 27730 rx_09_fifo.wr_addr_gray_rd[4] +.sym 27734 rx_09_fifo.wr_addr_gray_rd[1] +.sym 27742 rx_09_fifo.wr_addr_gray[1] +.sym 27746 rx_09_fifo.wr_addr_gray_SB_DFFESR_Q_3_D[3] +.sym 27758 rx_09_fifo.wr_addr_gray_SB_DFFESR_Q_7_D[3] +.sym 27766 rx_09_fifo.wr_addr_gray_SB_DFFESR_Q_6_D[1] +.sym 27770 rx_09_fifo.wr_addr_gray_SB_DFFESR_Q_3_D[1] +.sym 27774 rx_09_fifo.wr_addr_gray_SB_DFFESR_Q_6_D[2] +.sym 27778 lvds_rx_09_inst.r_push_SB_LUT4_I3_O_SB_LUT4_O_1_I0[1] +.sym 27779 rx_09_fifo.wr_addr_gray_SB_DFFESR_Q_6_D[1] +.sym 27780 rx_09_fifo.wr_addr_gray_SB_DFFESR_Q_6_D[2] +.sym 27781 rx_09_fifo.rd_addr_gray_wr_r[2] +.sym 27785 rx_09_fifo.wr_addr[0] +.sym 27786 rx_09_fifo.wr_addr_gray_SB_LUT4_I2_1_O[5] +.sym 27790 rx_09_fifo.wr_addr_gray_SB_LUT4_I2_1_O[1] +.sym 27796 rx_09_fifo.wr_addr_gray_SB_LUT4_I2_1_O[2] +.sym 27797 rx_09_fifo.full_o_SB_LUT4_I3_O[1] +.sym 27798 rx_09_fifo.wr_addr_gray_SB_LUT4_I2_1_O[2] +.sym 27802 rx_09_fifo.wr_addr_gray_SB_LUT4_I2_1_O[6] +.sym 27808 rx_09_fifo.wr_addr_gray_SB_LUT4_I2_1_O[1] +.sym 27809 rx_09_fifo.wr_addr_gray_SB_LUT4_I2_1_O[2] +.sym 27811 rx_09_fifo.wr_addr[0] +.sym 27816 lvds_rx_09_inst.r_push_SB_LUT4_I3_O_SB_LUT4_O_1_I0[3] +.sym 27817 rx_09_fifo.wr_addr[0] +.sym 27820 rx_09_fifo.wr_addr[2] +.sym 27821 rx_09_fifo.wr_addr_gray_SB_LUT4_I2_1_I3[2] +.sym 27824 rx_09_fifo.wr_addr[3] +.sym 27825 rx_09_fifo.wr_addr_gray_SB_LUT4_I2_1_I3[3] +.sym 27828 rx_09_fifo.wr_addr[4] +.sym 27829 rx_09_fifo.wr_addr_gray_SB_LUT4_I2_1_I3[4] +.sym 27832 rx_09_fifo.wr_addr[5] +.sym 27833 rx_09_fifo.wr_addr_gray_SB_LUT4_I2_1_I3[5] +.sym 27836 rx_09_fifo.wr_addr[6] +.sym 27837 rx_09_fifo.wr_addr_gray_SB_LUT4_I2_1_I3[6] +.sym 27840 rx_09_fifo.wr_addr[7] +.sym 27841 rx_09_fifo.wr_addr_gray_SB_LUT4_I2_1_I3[7] +.sym 27842 lvds_rx_09_inst.r_push_SB_LUT4_I3_O_SB_LUT4_O_2_I0[0] +.sym 27843 rx_09_fifo.wr_addr_gray_SB_DFFESR_Q_3_D[1] +.sym 27844 rx_09_fifo.rd_addr_gray_wr_r[5] +.sym 27845 rx_09_fifo.wr_addr_gray_SB_DFFESR_Q_3_D[3] +.sym 27848 rx_09_fifo.full_o_SB_LUT4_I3_O[2] +.sym 27849 rx_09_fifo.wr_addr_gray_SB_LUT4_I2_1_O[5] +.sym 27852 rx_09_fifo.wr_addr_gray_SB_LUT4_I2_1_O[5] +.sym 27853 rx_09_fifo.wr_addr_gray_SB_LUT4_I2_1_O[6] +.sym 27854 rx_09_fifo.wr_addr_gray_SB_DFFESR_Q_7_D[0] +.sym 27855 rx_09_fifo.rd_addr_gray_wr_r[6] +.sym 27856 rx_09_fifo.rd_addr_gray_wr_r[0] +.sym 27857 rx_09_fifo.wr_addr_gray_SB_DFFESR_Q_7_D[3] +.sym 27860 rx_09_fifo.wr_addr_gray_SB_LUT4_I2_1_O[7] +.sym 27861 rx_09_fifo.wr_addr_gray_SB_LUT4_I2_1_O[6] +.sym 27864 rx_09_fifo.wr_addr[0] +.sym 27865 rx_09_fifo.wr_addr_gray_SB_LUT4_I2_1_O[1] +.sym 27866 rx_09_fifo.full_o_SB_LUT4_I3_O[0] +.sym 27867 rx_09_fifo.full_o_SB_LUT4_I3_O[1] +.sym 27868 rx_09_fifo.full_o_SB_LUT4_I3_O[2] +.sym 27869 rx_09_fifo.full_o_SB_LUT4_I3_O[3] +.sym 27872 rx_09_fifo.full_o_SB_LUT4_I3_O[0] +.sym 27873 lvds_rx_09_inst.r_push_SB_LUT4_I3_I1[2] +.sym 27882 rx_09_fifo.full_o_SB_LUT4_I3_O_SB_LUT4_I3_O[0] +.sym 27883 rx_09_fifo.full_o_SB_LUT4_I3_O_SB_LUT4_I3_O[1] +.sym 27884 rx_09_fifo.full_o_SB_LUT4_I3_O_SB_LUT4_I3_O[2] +.sym 27885 rx_09_fifo.full_o_SB_LUT4_I3_O_SB_LUT4_I3_O[3] +.sym 27890 rx_09_fifo.rd_addr_gray_wr[7] +.sym 27894 rx_09_fifo.rd_addr[7] +.sym 27907 rx_24_fifo.full_o_SB_DFFSR_Q_D_SB_LUT4_O_I1_SB_LUT4_O_I0[3] +.sym 27912 rx_24_fifo.wr_addr[2] +.sym 27913 rx_24_fifo.full_o_SB_DFFSR_Q_D_SB_LUT4_O_I1_SB_LUT4_O_I0[3] +.sym 27916 rx_24_fifo.wr_addr[3] +.sym 27917 rx_24_fifo.wr_addr_gray_SB_LUT4_I2_1_I3[2] +.sym 27920 rx_24_fifo.wr_addr[4] +.sym 27921 rx_24_fifo.wr_addr_gray_SB_LUT4_I2_1_I3[3] +.sym 27924 rx_24_fifo.wr_addr[5] +.sym 27925 rx_24_fifo.wr_addr_gray_SB_LUT4_I2_1_I3[4] +.sym 27928 rx_24_fifo.wr_addr[6] +.sym 27929 rx_24_fifo.wr_addr_gray_SB_LUT4_I2_1_I3[5] +.sym 27932 rx_24_fifo.wr_addr[7] +.sym 27933 rx_24_fifo.wr_addr_gray_SB_LUT4_I2_1_I3[6] +.sym 27938 rx_24_fifo.wr_addr_gray_SB_LUT4_I2_O[1] +.sym 27945 rx_24_fifo.wr_addr[0] +.sym 27946 rx_24_fifo.wr_addr_gray_SB_LUT4_I2_O[3] +.sym 27950 rx_24_fifo.wr_addr_gray_SB_LUT4_I2_O[4] +.sym 27958 rx_24_fifo.wr_addr_gray_SB_LUT4_I2_O[5] +.sym 27966 rx_24_fifo.wr_addr_gray_SB_LUT4_I2_O[2] +.sym 27984 lvds_rx_24_inst.r_state_if_SB_LUT4_I2_O[0] +.sym 27985 w_rx_24_fifo_data[26] +.sym 27987 lvds_rx_24_inst.r_push_SB_LUT4_I2_I0_SB_LUT4_O_2_I0[1] +.sym 27988 rx_24_fifo.wr_addr_gray_SB_LUT4_I2_O[3] +.sym 27989 rx_24_fifo.wr_addr_gray_SB_LUT4_I2_O[4] +.sym 27992 i_smi_a1_SB_LUT4_I1_O[3] +.sym 27993 w_lvds_rx_09_d1_SB_LUT4_I0_O[1] +.sym 27996 i_smi_a1_SB_LUT4_I1_O[3] +.sym 27997 w_rx_24_fifo_push +.sym 28002 rx_24_fifo.wr_addr_gray_SB_LUT4_I2_O[7] +.sym 28008 rx_24_fifo.wr_addr[0] +.sym 28009 rx_24_fifo.wr_addr_gray_SB_LUT4_I2_O[1] +.sym 28012 rx_24_fifo.wr_addr_gray_SB_LUT4_I2_O[7] +.sym 28013 rx_24_fifo.wr_addr_gray_SB_LUT4_I2_O[6] +.sym 28014 rx_24_fifo.wr_addr_gray_SB_LUT4_I2_O[6] +.sym 28020 rx_24_fifo.wr_addr_gray_SB_LUT4_I2_O[5] +.sym 28021 rx_24_fifo.wr_addr_gray_SB_LUT4_I2_O[6] +.sym 28022 w_lvds_rx_09_d1 +.sym 28023 w_lvds_rx_09_d0 +.sym 28024 lvds_rx_09_inst.r_state_if[1] +.sym 28025 lvds_rx_09_inst.r_state_if[0] +.sym 28026 rx_24_fifo.wr_addr_gray_SB_DFFESR_Q_7_D[0] +.sym 28038 lvds_rx_09_inst.r_state_if_SB_DFFNESR_Q_E_SB_LUT4_O_I2_SB_LUT4_O_I2_SB_LUT4_I2_O[1] +.sym 28043 w_lvds_rx_09_d1_SB_LUT4_I0_O[1] +.sym 28044 lvds_rx_09_inst.r_state_if_SB_DFFNESR_Q_E_SB_LUT4_O_I2[1] +.sym 28045 i_smi_a1_SB_LUT4_I1_O[3] +.sym 28050 lvds_rx_09_inst.r_state_if_SB_LUT4_I2_O[0] +.sym 28067 lvds_rx_24_inst.r_phase_count[0] +.sym 28071 lvds_rx_24_inst.r_phase_count[1] +.sym 28072 $PACKER_VCC_NET +.sym 28073 lvds_rx_24_inst.r_phase_count[0] +.sym 28074 lvds_rx_24_inst.r_phase_count_SB_LUT4_O_I3[1] +.sym 28076 $PACKER_VCC_NET +.sym 28077 lvds_rx_24_inst.r_phase_count_SB_CARRY_CI_CO[2] +.sym 28080 lvds_rx_09_inst.r_state_if_SB_DFFNESR_Q_E_SB_LUT4_O_I2_SB_LUT4_O_I2_SB_LUT4_I2_O[3] +.sym 28081 w_lvds_rx_09_d1 +.sym 28085 lvds_rx_24_inst.r_phase_count_SB_LUT4_O_I3[0] +.sym 28092 lvds_rx_09_inst.r_state_if_SB_DFFNESR_Q_E_SB_LUT4_O_I2_SB_LUT4_O_I2_SB_LUT4_I2_O[3] +.sym 28093 w_lvds_rx_09_d0 +.sym 28097 w_lvds_rx_24_d1_SB_LUT4_I0_O_SB_LUT4_O_I2[1] +.sym 28098 w_lvds_rx_24_d1_SB_LUT4_I0_O_SB_LUT4_O_I2[2] +.sym 28099 w_lvds_rx_24_d1_SB_LUT4_I0_O_SB_LUT4_O_I2[1] +.sym 28100 w_lvds_rx_24_d1_SB_LUT4_I0_O_SB_LUT4_O_I2[0] +.sym 28101 w_lvds_rx_24_d1_SB_LUT4_I0_O_SB_LUT4_O_I2[3] +.sym 28102 w_lvds_rx_24_d1 +.sym 28103 w_lvds_rx_24_d0 +.sym 28104 w_lvds_rx_24_d1_SB_LUT4_I0_O_SB_LUT4_O_I2[3] +.sym 28105 w_lvds_rx_24_d1_SB_LUT4_I0_O_SB_LUT4_O_I2[0] +.sym 28107 w_lvds_rx_24_d1_SB_LUT4_I0_O_SB_LUT4_O_I2[1] +.sym 28108 w_lvds_rx_24_d1_SB_LUT4_I0_O_SB_LUT4_O_I2[2] +.sym 28109 w_lvds_rx_24_d1_SB_LUT4_I0_O_SB_LUT4_O_I2[0] +.sym 28112 lvds_rx_24_inst.r_state_if_SB_LUT4_I2_O[0] +.sym 28113 w_lvds_rx_24_d1_SB_LUT4_I0_O_SB_LUT4_O_I2[1] +.sym 28114 w_lvds_rx_24_d1_SB_LUT4_I0_O_SB_LUT4_O_I2[0] +.sym 28115 w_lvds_rx_24_d1_SB_LUT4_I0_O_SB_LUT4_O_I2[1] +.sym 28116 w_lvds_rx_24_d1_SB_LUT4_I0_O_SB_LUT4_O_I2[2] +.sym 28117 w_lvds_rx_24_d1_SB_LUT4_I0_O_SB_LUT4_O_I2[3] +.sym 28118 w_lvds_rx_24_d1_SB_LUT4_I0_O_SB_LUT4_O_I2_SB_LUT4_I0_O[0] +.sym 28119 w_lvds_rx_24_d1_SB_LUT4_I0_O_SB_LUT4_O_I2_SB_LUT4_I0_O[1] +.sym 28120 w_lvds_rx_24_d1_SB_LUT4_I0_O_SB_LUT4_O_I2_SB_LUT4_I0_O[2] +.sym 28121 w_lvds_rx_24_d1_SB_LUT4_I0_O_SB_LUT4_O_I2_SB_LUT4_I0_O[3] +.sym 28122 w_lvds_rx_24_d1_SB_LUT4_I0_O_SB_LUT4_O_I2_SB_LUT4_I0_O[0] +.sym 28123 w_lvds_rx_24_d1_SB_LUT4_I0_O_SB_LUT4_O_I2_SB_LUT4_I0_O[1] +.sym 28124 lvds_rx_24_inst.r_phase_count_SB_LUT4_I1_O[2] +.sym 28125 w_lvds_rx_24_d1_SB_LUT4_I0_O_SB_LUT4_O_I2_SB_LUT4_I0_O[3] +.sym 28128 lvds_rx_24_inst.r_phase_count_SB_LUT4_O_I3[0] +.sym 28129 lvds_rx_24_inst.r_phase_count_SB_LUT4_O_I3[1] +.sym 28136 w_lvds_rx_24_d1_SB_LUT4_I0_O_SB_LUT4_O_I2_SB_LUT4_I0_O[3] +.sym 28137 w_lvds_rx_24_d0 +.sym 28142 lvds_rx_09_inst.r_state_if_SB_DFFNESR_Q_E_SB_LUT4_O_I2_SB_LUT4_O_I2[0] +.sym 28143 lvds_rx_09_inst.r_phase_count_SB_LUT4_I1_O[0] +.sym 28144 lvds_rx_09_inst.r_state_if[0] +.sym 28145 lvds_rx_09_inst.r_state_if[1] +.sym 28148 lvds_rx_09_inst.r_state_if[1] +.sym 28149 lvds_rx_09_inst.r_state_if[0] +.sym 28152 w_lvds_rx_24_d1_SB_LUT4_I0_O_SB_LUT4_O_I2_SB_LUT4_I0_O[3] +.sym 28153 w_lvds_rx_24_d1 +.sym 28158 lvds_rx_09_inst.r_state_if[0] +.sym 28159 lvds_rx_09_inst.r_phase_count_SB_LUT4_I1_O[0] +.sym 28160 lvds_rx_09_inst.r_state_if_SB_DFFNESR_Q_E_SB_LUT4_O_I2_SB_LUT4_O_I2[0] +.sym 28161 lvds_rx_09_inst.r_state_if[1] +.sym 28169 lvds_rx_09_inst.r_phase_count_SB_LUT4_I1_O[0] +.sym 28226 rx_09_fifo.rd_addr_gray_wr[1] +.sym 28238 rx_09_fifo.rd_addr_gray[1] +.sym 28246 rx_09_fifo.rd_addr_gray[6] +.sym 28254 rx_09_fifo.rd_addr_gray_wr[6] +.sym 28258 rx_09_fifo.wr_addr_gray[2] +.sym 28262 rx_09_fifo.wr_addr_gray[5] +.sym 28266 rx_09_fifo.wr_addr_gray[0] +.sym 28274 rx_09_fifo.wr_addr_gray[3] +.sym 28282 rx_09_fifo.wr_addr_gray_rd[5] +.sym 28290 rx_09_fifo.wr_addr_gray_SB_DFFESR_Q_7_D[0] +.sym 28294 rx_09_fifo.full_o_SB_LUT4_I3_O[2] +.sym 28300 rx_09_fifo.wr_addr[0] +.sym 28301 rx_09_fifo.rd_addr_gray_wr_r[0] +.sym 28305 lvds_rx_09_inst.r_push_SB_LUT4_I3_1_O +.sym 28308 i_smi_a1_SB_LUT4_I1_O[3] +.sym 28309 w_rx_09_fifo_push +.sym 28312 rx_09_fifo.full_o_SB_LUT4_I3_O[1] +.sym 28313 rx_09_fifo.full_o_SB_LUT4_I3_O[2] +.sym 28314 rx_09_fifo.wr_addr_gray_SB_LUT4_I2_1_O[7] +.sym 28318 rx_09_fifo.full_o_SB_LUT4_I3_O[1] +.sym 28323 lvds_rx_09_inst.r_push_SB_LUT4_I3_O_SB_LUT4_O_1_I0[3] +.sym 28328 rx_09_fifo.wr_addr[2] +.sym 28329 lvds_rx_09_inst.r_push_SB_LUT4_I3_O_SB_LUT4_O_1_I0[3] +.sym 28332 rx_09_fifo.wr_addr[3] +.sym 28333 rx_09_fifo.wr_addr_gray_SB_LUT4_I2_I3[2] +.sym 28336 rx_09_fifo.wr_addr[4] +.sym 28337 rx_09_fifo.wr_addr_gray_SB_LUT4_I2_I3[3] +.sym 28340 rx_09_fifo.wr_addr[5] +.sym 28341 rx_09_fifo.wr_addr_gray_SB_LUT4_I2_I3[4] +.sym 28344 rx_09_fifo.wr_addr[6] +.sym 28345 rx_09_fifo.wr_addr_gray_SB_LUT4_I2_I3[5] +.sym 28348 rx_09_fifo.wr_addr[7] +.sym 28349 rx_09_fifo.wr_addr_gray_SB_LUT4_I2_I3[6] +.sym 28350 lvds_rx_09_inst.r_push_SB_LUT4_I3_O_SB_LUT4_O_1_I0[0] +.sym 28351 lvds_rx_09_inst.r_push_SB_LUT4_I3_O_SB_LUT4_O_1_I0[1] +.sym 28352 lvds_rx_09_inst.r_push_SB_LUT4_I3_I1[1] +.sym 28353 lvds_rx_09_inst.r_push_SB_LUT4_I3_O_SB_LUT4_O_1_I0[3] +.sym 28354 w_rx_09_fifo_push +.sym 28355 rx_09_fifo.wr_addr_gray_SB_LUT4_I2_1_O[7] +.sym 28356 rx_09_fifo.rd_addr_gray_wr_r[7] +.sym 28357 w_rx_09_fifo_full +.sym 28358 lvds_rx_09_inst.r_push_SB_LUT4_I3_O[0] +.sym 28359 lvds_rx_09_inst.r_push_SB_LUT4_I3_O[1] +.sym 28360 lvds_rx_09_inst.r_push_SB_LUT4_I3_O[2] +.sym 28361 lvds_rx_09_inst.r_push_SB_LUT4_I3_O[3] +.sym 28362 rx_09_fifo.rd_addr_gray_wr_r[2] +.sym 28363 lvds_rx_09_inst.r_push_SB_LUT4_I3_I1[1] +.sym 28364 lvds_rx_09_inst.r_push_SB_LUT4_I3_I1[2] +.sym 28365 w_rx_09_fifo_push +.sym 28366 lvds_rx_09_inst.r_push_SB_LUT4_I3_O_SB_LUT4_O_2_I0[3] +.sym 28367 lvds_rx_09_inst.r_push_SB_LUT4_I3_O_SB_LUT4_O_2_I0[0] +.sym 28368 lvds_rx_09_inst.r_push_SB_LUT4_I3_O_SB_LUT4_O_2_I2[2] +.sym 28369 lvds_rx_09_inst.r_push_SB_LUT4_I3_I1[4] +.sym 28371 rx_09_fifo.full_o_SB_DFFSR_Q_D_SB_LUT4_O_I1[0] +.sym 28372 rx_09_fifo.full_o_SB_DFFSR_Q_D_SB_LUT4_O_I1[1] +.sym 28373 rx_09_fifo.full_o_SB_DFFSR_Q_D_SB_LUT4_O_I1[2] +.sym 28376 rx_09_fifo.rd_addr_gray_wr_r[5] +.sym 28377 lvds_rx_09_inst.r_push_SB_LUT4_I3_I1[5] +.sym 28378 lvds_rx_09_inst.r_push_SB_LUT4_I3_O_SB_LUT4_O_2_I0[0] +.sym 28379 lvds_rx_09_inst.r_push_SB_LUT4_I3_I1[4] +.sym 28380 lvds_rx_09_inst.r_push_SB_LUT4_I3_I1[3] +.sym 28381 lvds_rx_09_inst.r_push_SB_LUT4_I3_O_SB_LUT4_O_2_I0[3] +.sym 28382 rx_09_fifo.rd_addr_gray_wr_r[6] +.sym 28383 rx_09_fifo.rd_addr_gray_wr_r[7] +.sym 28384 lvds_rx_09_inst.r_push_SB_LUT4_I3_I1[6] +.sym 28385 lvds_rx_09_inst.r_push_SB_LUT4_I3_I1[5] .sym 28396 lvds_rx_24_inst.r_state_if_SB_LUT4_I2_O[0] -.sym 28397 w_rx_24_fifo_data[26] +.sym 28397 w_rx_24_fifo_data[17] .sym 28400 lvds_rx_24_inst.r_state_if_SB_LUT4_I2_O[0] -.sym 28401 w_rx_24_fifo_data[27] +.sym 28401 w_rx_24_fifo_data[4] .sym 28404 lvds_rx_24_inst.r_state_if_SB_LUT4_I2_O[0] -.sym 28405 w_rx_24_fifo_data[24] +.sym 28405 w_rx_24_fifo_data[18] .sym 28408 lvds_rx_24_inst.r_state_if_SB_LUT4_I2_O[0] -.sym 28409 w_rx_24_fifo_data[16] -.sym 28410 w_rx_24_fifo_pulled_data[30] -.sym 28411 w_rx_24_fifo_pulled_data[22] -.sym 28412 i_smi_a2_SB_LUT4_I1_O_SB_LUT4_I3_1_I2_SB_LUT4_O_I3[1] -.sym 28413 i_smi_a2_SB_LUT4_I1_O_SB_LUT4_I3_1_I2[1] -.sym 28416 lvds_rx_24_inst.r_state_if_SB_LUT4_I2_O[0] -.sym 28417 w_rx_24_fifo_data[28] -.sym 28419 lvds_rx_09_inst.r_push_SB_DFFNESR_Q_E_SB_LUT4_O_I1[0] -.sym 28420 lvds_rx_09_inst.r_push_SB_DFFNESR_Q_E_SB_LUT4_O_I1_SB_LUT4_O_I2[3] -.sym 28421 i_smi_a1_SB_LUT4_I1_O_SB_LUT4_O_I2_SB_LUT4_I0_O[2] -.sym 28422 lvds_rx_09_inst.r_push_SB_DFFNESR_Q_E_SB_LUT4_O_I1[1] -.sym 28434 lvds_rx_09_inst.r_state_if_SB_LUT4_I2_O[0] -.sym 28438 w_rx_24_fifo_pulled_data[25] -.sym 28439 w_rx_24_fifo_pulled_data[17] -.sym 28440 i_smi_a2_SB_LUT4_I1_O_SB_LUT4_I3_1_I2_SB_LUT4_O_I3[1] -.sym 28441 i_smi_a2_SB_LUT4_I1_O_SB_LUT4_I3_1_I2[1] -.sym 28446 w_rx_24_fifo_pulled_data[31] -.sym 28447 w_rx_24_fifo_pulled_data[23] -.sym 28448 i_smi_a2_SB_LUT4_I1_O_SB_LUT4_I3_1_I2_SB_LUT4_O_I3[1] -.sym 28449 i_smi_a2_SB_LUT4_I1_O_SB_LUT4_I3_1_I2[1] -.sym 28451 rx_24_fifo.full_o_SB_DFFSR_Q_D_SB_LUT4_O_I1_SB_LUT4_O_I0[3] -.sym 28456 rx_24_fifo.wr_addr[2] -.sym 28457 rx_24_fifo.full_o_SB_DFFSR_Q_D_SB_LUT4_O_I1_SB_LUT4_O_I0[3] -.sym 28460 rx_24_fifo.wr_addr[3] -.sym 28461 rx_24_fifo.wr_addr_gray_SB_LUT4_I2_I3[2] -.sym 28464 rx_24_fifo.wr_addr[4] -.sym 28465 rx_24_fifo.wr_addr_gray_SB_LUT4_I2_I3[3] -.sym 28468 rx_24_fifo.wr_addr[5] -.sym 28469 rx_24_fifo.wr_addr_gray_SB_LUT4_I2_I3[4] -.sym 28472 rx_24_fifo.wr_addr[6] -.sym 28473 rx_24_fifo.wr_addr_gray_SB_LUT4_I2_I3[5] -.sym 28476 rx_24_fifo.wr_addr[7] -.sym 28477 rx_24_fifo.wr_addr_gray_SB_LUT4_I2_I3[6] -.sym 28478 spi_if_ins.state_if_SB_DFFESR_Q_D[0] -.sym 28482 rx_24_fifo.wr_addr_gray_SB_LUT4_I2_1_O[4] -.sym 28488 rx_24_fifo.wr_addr_gray_SB_LUT4_I2_1_O[7] -.sym 28489 rx_24_fifo.wr_addr_gray_SB_LUT4_I2_1_O[6] -.sym 28490 rx_24_fifo.wr_addr_gray_SB_LUT4_I2_1_O[1] -.sym 28494 rx_24_fifo.rd_addr_gray_wr_r[6] -.sym 28495 rx_24_fifo.rd_addr_gray_wr_r[7] -.sym 28496 lvds_rx_24_inst.r_push_SB_LUT4_I0_1_I1_SB_LUT4_O_I2[6] -.sym 28497 lvds_rx_24_inst.r_push_SB_LUT4_I0_1_I1_SB_LUT4_O_I2[5] -.sym 28498 rx_24_fifo.wr_addr_gray_SB_LUT4_I2_1_O[6] -.sym 28502 rx_24_fifo.wr_addr_gray_SB_LUT4_I2_1_O[3] -.sym 28506 rx_24_fifo.wr_addr_gray_SB_LUT4_I2_1_O[7] -.sym 28510 rx_24_fifo.wr_addr_gray_SB_LUT4_I2_1_O[2] -.sym 28515 rx_24_fifo.wr_addr[0] -.sym 28520 rx_24_fifo.full_o_SB_DFFSR_Q_D_SB_LUT4_O_I1_SB_LUT4_O_I0[3] -.sym 28521 rx_24_fifo.wr_addr[0] -.sym 28524 rx_24_fifo.wr_addr[2] -.sym 28525 rx_24_fifo.wr_addr_gray_SB_LUT4_I2_1_I3[2] -.sym 28528 rx_24_fifo.wr_addr[3] -.sym 28529 rx_24_fifo.wr_addr_gray_SB_LUT4_I2_1_I3[3] -.sym 28532 rx_24_fifo.wr_addr[4] -.sym 28533 rx_24_fifo.wr_addr_gray_SB_LUT4_I2_1_I3[4] -.sym 28536 rx_24_fifo.wr_addr[5] -.sym 28537 rx_24_fifo.wr_addr_gray_SB_LUT4_I2_1_I3[5] -.sym 28540 rx_24_fifo.wr_addr[6] -.sym 28541 rx_24_fifo.wr_addr_gray_SB_LUT4_I2_1_I3[6] -.sym 28544 rx_24_fifo.wr_addr[7] -.sym 28545 rx_24_fifo.wr_addr_gray_SB_LUT4_I2_1_I3[7] -.sym 28546 rx_24_fifo.rd_addr_gray_wr_r[6] -.sym 28547 rx_24_fifo.wr_addr_gray_SB_LUT4_I2_1_O[7] -.sym 28548 rx_24_fifo.rd_addr_gray_wr_r[7] -.sym 28549 rx_24_fifo.wr_addr_gray_SB_LUT4_I2_1_O[6] -.sym 28551 rx_24_fifo.full_o_SB_DFFSR_Q_D_SB_LUT4_O_I1[0] -.sym 28552 rx_24_fifo.full_o_SB_DFFSR_Q_D_SB_LUT4_O_I1[1] -.sym 28553 rx_24_fifo.full_o_SB_DFFSR_Q_D_SB_LUT4_O_I1[2] -.sym 28556 rx_24_fifo.wr_addr_gray_SB_LUT4_I2_1_O[1] -.sym 28557 rx_24_fifo.wr_addr_gray_SB_LUT4_I2_1_O[2] -.sym 28560 rx_24_fifo.wr_addr_gray_SB_LUT4_I2_1_O[2] -.sym 28561 rx_24_fifo.wr_addr_gray_SB_LUT4_I2_1_O[3] -.sym 28562 rx_24_fifo.full_o_SB_DFFSR_Q_D_SB_LUT4_O_I1_SB_LUT4_O_I0[0] -.sym 28563 rx_24_fifo.full_o_SB_DFFSR_Q_D_SB_LUT4_O_I1_SB_LUT4_O_I0[1] -.sym 28564 lvds_rx_24_inst.r_push_SB_LUT4_I0_1_I1_SB_LUT4_O_I2[1] -.sym 28565 rx_24_fifo.full_o_SB_DFFSR_Q_D_SB_LUT4_O_I1_SB_LUT4_O_I0[3] -.sym 28568 rx_24_fifo.wr_addr[0] -.sym 28569 rx_24_fifo.wr_addr_gray_SB_LUT4_I2_1_O[1] -.sym 28572 rx_24_fifo.wr_addr_gray_SB_LUT4_I2_1_O[4] -.sym 28573 rx_24_fifo.wr_addr_gray_SB_LUT4_I2_1_O[5] -.sym 28575 rx_24_fifo.rd_addr_gray_wr_r[5] -.sym 28576 rx_24_fifo.wr_addr_gray_SB_LUT4_I2_1_O[5] -.sym 28577 rx_24_fifo.wr_addr_gray_SB_LUT4_I2_1_O[6] -.sym 28584 lvds_rx_24_inst.r_state_if_SB_LUT4_I2_O[0] -.sym 28585 lvds_rx_24_inst.r_phase_count_SB_LUT4_I1_O[0] -.sym 28586 rx_24_fifo.full_o_SB_DFFSR_Q_D_SB_LUT4_O_I1_SB_LUT4_O_I0[1] -.sym 28587 rx_24_fifo.wr_addr_gray_SB_DFFESR_Q_6_D[1] -.sym 28588 rx_24_fifo.wr_addr_gray_SB_DFFESR_Q_6_D[2] -.sym 28589 rx_24_fifo.rd_addr_gray_wr_r[2] -.sym 28590 rx_24_fifo.rd_addr_gray_wr_r[0] -.sym 28591 rx_24_fifo.wr_addr_gray_SB_DFFESR_Q_7_D[1] -.sym 28592 rx_24_fifo.wr_addr_gray_SB_DFFESR_Q_7_D[2] -.sym 28593 lvds_rx_24_inst.r_push_SB_LUT4_I0_1_I1_SB_LUT4_O_1_I3[0] -.sym 28594 w_rx_24_fifo_push -.sym 28595 rx_24_fifo.full_o_SB_LUT4_I0_O[1] -.sym 28596 rx_24_fifo.full_o_SB_LUT4_I0_O[2] -.sym 28597 rx_24_fifo.full_o_SB_LUT4_I0_O[3] -.sym 28600 i_smi_a1_SB_LUT4_I1_O_SB_LUT4_O_I2_SB_LUT4_I0_O[2] -.sym 28601 w_rx_24_fifo_push -.sym 28604 rx_24_fifo.wr_addr[0] -.sym 28605 rx_24_fifo.rd_addr_gray_wr_r[0] -.sym 28618 rx_24_fifo.rd_addr_gray_wr[5] -.sym 28622 rx_24_fifo.rd_addr_gray_wr[0] -.sym 28638 rx_24_fifo.rd_addr_gray_wr[1] -.sym 28679 i_smi_a1$SB_IO_IN -.sym 28680 i_smi_a3$SB_IO_IN -.sym 28681 i_smi_a2$SB_IO_IN -.sym 28683 i_smi_a2$SB_IO_IN -.sym 28684 i_smi_a1$SB_IO_IN -.sym 28685 i_smi_a3$SB_IO_IN -.sym 28708 lvds_rx_09_inst.r_state_if_SB_LUT4_I2_O[0] -.sym 28709 lvds_rx_09_inst.o_fifo_data[6] -.sym 28712 lvds_rx_09_inst.r_state_if_SB_LUT4_I2_O[0] -.sym 28713 lvds_rx_09_inst.o_fifo_data[14] -.sym 28716 lvds_rx_09_inst.r_state_if_SB_LUT4_I2_O[0] -.sym 28717 lvds_rx_09_inst.o_fifo_data[10] -.sym 28720 lvds_rx_09_inst.r_state_if_SB_LUT4_I2_O[0] -.sym 28721 lvds_rx_09_inst.o_fifo_data[12] -.sym 28722 w_rx_09_fifo_pulled_data[11] -.sym 28723 w_rx_09_fifo_pulled_data[27] -.sym 28724 smi_ctrl_ins.int_cnt_09[3] -.sym 28725 smi_ctrl_ins.o_smi_data_out_SB_DFFE_Q_D_SB_LUT4_O_I2_SB_LUT4_O_I3[3] -.sym 28726 w_rx_09_fifo_pulled_data[8] -.sym 28727 w_rx_09_fifo_pulled_data[24] -.sym 28728 smi_ctrl_ins.int_cnt_09[3] -.sym 28729 smi_ctrl_ins.int_cnt_09_SB_DFFESR_Q_D_SB_LUT4_O_I3[1] -.sym 28730 w_rx_09_fifo_pulled_data[3] -.sym 28731 w_rx_09_fifo_pulled_data[19] -.sym 28732 smi_ctrl_ins.int_cnt_09[3] -.sym 28733 smi_ctrl_ins.int_cnt_09_SB_DFFESR_Q_D_SB_LUT4_O_I3[1] -.sym 28736 lvds_rx_09_inst.r_state_if_SB_LUT4_I2_O[0] -.sym 28737 lvds_rx_09_inst.o_fifo_data[8] -.sym 28738 w_rx_09_fifo_pulled_data[2] -.sym 28739 w_rx_09_fifo_pulled_data[18] -.sym 28740 smi_ctrl_ins.int_cnt_09[3] -.sym 28741 smi_ctrl_ins.int_cnt_09_SB_DFFESR_Q_D_SB_LUT4_O_I3[1] -.sym 28742 w_rx_09_fifo_pulled_data[10] -.sym 28743 w_rx_09_fifo_pulled_data[26] -.sym 28744 smi_ctrl_ins.int_cnt_09[3] -.sym 28745 smi_ctrl_ins.o_smi_data_out_SB_DFFE_Q_5_D_SB_LUT4_O_I1_SB_LUT4_O_I3[3] -.sym 28746 w_rx_09_fifo_pulled_data[14] -.sym 28747 w_rx_09_fifo_pulled_data[30] -.sym 28748 smi_ctrl_ins.int_cnt_09[3] -.sym 28749 smi_ctrl_ins.o_smi_data_out_SB_DFFE_Q_1_D_SB_LUT4_O_I1_SB_LUT4_O_I3[3] -.sym 28750 w_rx_09_fifo_pulled_data[7] -.sym 28751 w_rx_09_fifo_pulled_data[23] -.sym 28752 smi_ctrl_ins.int_cnt_09[3] -.sym 28753 smi_ctrl_ins.int_cnt_09_SB_DFFESR_Q_D_SB_LUT4_O_I3[1] -.sym 28754 w_rx_09_fifo_pulled_data[15] -.sym 28755 w_rx_09_fifo_pulled_data[31] -.sym 28756 smi_ctrl_ins.int_cnt_09[3] -.sym 28757 smi_ctrl_ins.o_smi_data_out_SB_DFFE_Q_D_SB_LUT4_O_I1_SB_LUT4_O_I3[3] -.sym 28758 w_rx_09_fifo_pulled_data[6] -.sym 28759 w_rx_09_fifo_pulled_data[22] -.sym 28760 smi_ctrl_ins.int_cnt_09[3] -.sym 28761 smi_ctrl_ins.int_cnt_09_SB_DFFESR_Q_D_SB_LUT4_O_I3[1] -.sym 28762 w_rx_09_fifo_pulled_data[13] -.sym 28763 w_rx_09_fifo_pulled_data[29] -.sym 28764 smi_ctrl_ins.int_cnt_09[3] -.sym 28765 smi_ctrl_ins.o_smi_data_out_SB_DFFE_Q_2_D_SB_LUT4_O_I1_SB_LUT4_O_I3[3] -.sym 28766 w_rx_09_fifo_pulled_data[5] -.sym 28767 w_rx_09_fifo_pulled_data[21] -.sym 28768 smi_ctrl_ins.int_cnt_09[3] -.sym 28769 smi_ctrl_ins.int_cnt_09_SB_DFFESR_Q_D_SB_LUT4_O_I3[1] -.sym 28772 lvds_rx_09_inst.r_state_if_SB_LUT4_I2_O[0] -.sym 28773 lvds_rx_09_inst.o_fifo_data[21] -.sym 28776 lvds_rx_09_inst.r_state_if_SB_LUT4_I2_O[0] -.sym 28777 lvds_rx_09_inst.o_fifo_data[23] -.sym 28780 lvds_rx_09_inst.r_state_if_SB_LUT4_I2_O[0] -.sym 28781 lvds_rx_09_inst.o_fifo_data[28] -.sym 28784 lvds_rx_09_inst.r_state_if_SB_LUT4_I2_O[0] -.sym 28785 lvds_rx_09_inst.o_fifo_data[29] -.sym 28788 lvds_rx_09_inst.r_state_if_SB_LUT4_I2_O[0] -.sym 28789 lvds_rx_09_inst.o_fifo_data[18] -.sym 28792 lvds_rx_09_inst.r_state_if_SB_LUT4_I2_O[0] -.sym 28793 lvds_rx_09_inst.o_fifo_data[27] -.sym 28796 lvds_rx_09_inst.r_state_if_SB_LUT4_I2_O[0] -.sym 28797 lvds_rx_09_inst.o_fifo_data[25] -.sym 28800 lvds_rx_09_inst.r_state_if_SB_LUT4_I2_O[0] -.sym 28801 lvds_rx_09_inst.o_fifo_data[16] -.sym 28803 smi_ctrl_ins.int_cnt_09[3] -.sym 28807 smi_ctrl_ins.int_cnt_09[4] -.sym 28808 $PACKER_VCC_NET -.sym 28811 smi_ctrl_ins.int_cnt_09[5] -.sym 28812 $PACKER_VCC_NET -.sym 28813 smi_ctrl_ins.int_cnt_09_SB_DFFESR_Q_D_SB_LUT4_O_I3_SB_LUT4_O_I3[2] -.sym 28814 rx_09_fifo.rd_addr_gray_wr[0] -.sym 28822 io_pmod_SB_DFFSS_Q_D_SB_LUT4_O_I0_SB_LUT4_O_I0[1] -.sym 28826 rx_09_fifo.rd_addr_gray_wr[7] -.sym 28835 i_smi_a2_SB_LUT4_I1_O_SB_LUT4_O_I3_SB_CARRY_CO_I1[4] -.sym 28840 i_smi_a2_SB_LUT4_I1_O_SB_LUT4_O_I3_SB_CARRY_CO_I1[5] -.sym 28845 $nextpnr_ICESTORM_LC_20$I3 -.sym 28849 smi_ctrl_ins.int_cnt_09[5] -.sym 28850 i_smi_a2_SB_LUT4_I1_O[1] -.sym 28861 smi_ctrl_ins.int_cnt_09[4] -.sym 28863 rx_09_fifo.rd_addr_gray_wr_r[0] -.sym 28864 rx_09_fifo.full_o_SB_DFFSR_Q_D_SB_LUT4_O_I1_SB_LUT4_O_I0_SB_LUT4_O_1_I3[1] -.sym 28865 rx_09_fifo.wr_addr[0] -.sym 28867 i_smi_a2_SB_LUT4_I1_O_SB_LUT4_O_I3[3] -.sym 28872 i_smi_a2_SB_LUT4_I1_O_SB_LUT4_O_I3_SB_CARRY_CO_I1[4] -.sym 28876 i_smi_a2_SB_LUT4_I1_O_SB_LUT4_O_I3_SB_CARRY_CO_I1[5] -.sym 28879 $PACKER_VCC_NET -.sym 28881 $nextpnr_ICESTORM_LC_2$I3 -.sym 28883 i_smi_soe_se$rename$0 -.sym 28884 smi_ctrl_ins.r_fifo_24_pull_SB_LUT4_I1_O[2] -.sym 28885 $nextpnr_ICESTORM_LC_2$COUT -.sym 28888 smi_ctrl_ins.int_cnt_09_SB_DFFESR_Q_E_SB_LUT4_O_I1[1] -.sym 28889 i_smi_a1_SB_LUT4_I1_O_SB_LUT4_O_I2_SB_LUT4_I0_O[2] -.sym 28890 i_smi_a2_SB_LUT4_I1_O[0] -.sym 28891 i_smi_a2_SB_LUT4_I1_O[1] -.sym 28892 i_smi_a1_SB_LUT4_I1_O[2] -.sym 28893 i_smi_a2_SB_LUT4_I1_O[3] -.sym 28894 spi_if_ins.state_if_SB_DFFESR_Q_D[2] -.sym 28901 rx_24_fifo.rd_addr[0] -.sym 28902 rx_24_fifo.rd_addr_gray_SB_LUT4_I2_O[6] -.sym 28913 smi_ctrl_ins.int_cnt_09[3] -.sym 28914 rx_24_fifo.rd_addr_gray_SB_LUT4_I2_O[1] -.sym 28918 rx_24_fifo.rd_addr_gray_SB_LUT4_I2_O[5] -.sym 28922 rx_24_fifo.rd_addr_gray_SB_LUT4_I2_O[7] -.sym 28928 rx_24_fifo.rd_addr_gray_SB_DFFESR_Q_7_D_SB_LUT4_I3_O_SB_LUT4_O_2_I0_SB_LUT4_O_1_I3[1] -.sym 28929 rx_24_fifo.rd_addr_gray_SB_DFFESR_Q_7_D_SB_LUT4_I3_O_SB_LUT4_O_2_I0_SB_LUT4_O_1_I3[2] -.sym 28930 rx_24_fifo.rd_addr_gray_SB_DFFESR_Q_7_D_SB_LUT4_I3_O_SB_LUT4_O_I0_SB_LUT4_O_2_I0[0] -.sym 28931 rx_24_fifo.rd_addr[3] -.sym 28932 rx_24_fifo.rd_addr_gray_SB_DFFESR_Q_7_D_SB_LUT4_I3_O_SB_LUT4_O_I0_SB_LUT4_O_2_I0[2] -.sym 28933 rx_24_fifo.rd_addr[4] -.sym 28934 rx_24_fifo.wr_addr_gray_rd[3] -.sym 28938 rx_24_fifo.wr_addr_gray_rd[6] -.sym 28942 rx_24_fifo.wr_addr[7] -.sym 28946 rx_24_fifo.wr_addr_gray[6] -.sym 28950 rx_24_fifo.wr_addr_gray_rd[7] -.sym 28954 rx_24_fifo.wr_addr_gray[3] -.sym 28960 rx_24_fifo.rd_addr_gray_SB_DFFESR_Q_7_D_SB_LUT4_I3_O_SB_LUT4_O_2_I0_SB_LUT4_O_1_I3[0] -.sym 28961 rx_24_fifo.rd_addr[2] -.sym 28963 rx_24_fifo.rd_addr[0] -.sym 28968 rx_24_fifo.rd_addr[1] -.sym 28969 rx_24_fifo.rd_addr[0] -.sym 28972 rx_24_fifo.rd_addr[2] -.sym 28973 rx_24_fifo.rd_addr_gray_SB_LUT4_I2_I3[2] -.sym 28976 rx_24_fifo.rd_addr[3] -.sym 28977 rx_24_fifo.rd_addr_gray_SB_LUT4_I2_I3[3] -.sym 28980 rx_24_fifo.rd_addr[4] -.sym 28981 rx_24_fifo.rd_addr_gray_SB_LUT4_I2_I3[4] -.sym 28984 rx_24_fifo.rd_addr[5] -.sym 28985 rx_24_fifo.rd_addr_gray_SB_LUT4_I2_I3[5] -.sym 28988 rx_24_fifo.rd_addr[6] -.sym 28989 rx_24_fifo.rd_addr_gray_SB_LUT4_I2_I3[6] -.sym 28992 rx_24_fifo.rd_addr[7] -.sym 28993 rx_24_fifo.rd_addr_gray_SB_LUT4_I2_I3[7] -.sym 28996 rx_24_fifo.rd_addr_gray_SB_LUT4_I2_O[4] -.sym 28997 rx_24_fifo.rd_addr_gray_SB_LUT4_I2_O[5] -.sym 29000 rx_24_fifo.rd_addr_gray_SB_LUT4_I2_O[5] -.sym 29001 rx_24_fifo.rd_addr_gray_SB_LUT4_I2_O[6] -.sym 29004 rx_24_fifo.rd_addr_gray_SB_DFFESR_Q_7_D_SB_LUT4_I3_O_SB_LUT4_O_I0_SB_LUT4_O_2_I0[2] -.sym 29005 rx_24_fifo.rd_addr_gray_SB_LUT4_I2_O[4] -.sym 29018 w_rx_24_fifo_full -.sym 29022 rx_24_fifo.rd_addr_gray_SB_DFFESR_Q_7_D_SB_LUT4_I3_O_SB_LUT4_O_2_I0_SB_LUT4_O_1_I3[0] -.sym 29023 rx_24_fifo.rd_addr_gray_SB_DFFESR_Q_7_D_SB_LUT4_I3_O_SB_LUT4_O_2_I0_SB_LUT4_O_1_I3[1] -.sym 29024 rx_24_fifo.rd_addr_gray_SB_DFFESR_Q_7_D_SB_LUT4_I3_O_SB_LUT4_O_2_I0_SB_LUT4_O_1_I3[2] -.sym 29025 rx_24_fifo.rd_addr_gray_SB_DFFESR_Q_7_D_SB_LUT4_I3_O_SB_LUT4_O_2_I0_SB_LUT4_O_1_I3[3] -.sym 29030 rx_24_fifo.rd_addr_gray[3] -.sym 29034 rx_24_fifo.rd_addr_gray_wr[6] -.sym 29054 rx_24_fifo.rd_addr_gray_wr[3] -.sym 29062 rx_24_fifo.rd_addr_gray_SB_DFFESR_Q_3_D[2] -.sym 29074 rx_24_fifo.rd_addr_gray_SB_LUT4_I2_O[4] -.sym 29078 rx_24_fifo.rd_addr_gray_SB_DFFESR_Q_7_D_SB_LUT4_I3_O_SB_LUT4_O_2_I0_SB_LUT4_O_1_I3[1] -.sym 29082 rx_24_fifo.rd_addr_gray_SB_DFFESR_Q_7_D_SB_LUT4_I3_O_SB_LUT4_O_2_I0_SB_LUT4_O_1_I3[2] -.sym 29088 rx_24_fifo.rd_addr_gray_SB_DFFESR_Q_7_D_SB_LUT4_I3_O_SB_LUT4_O_2_I0_SB_LUT4_O_1_I3[2] -.sym 29089 rx_24_fifo.rd_addr_gray_SB_LUT4_I2_O[4] -.sym 29090 rx_24_fifo.wr_addr_gray_SB_LUT4_I2_1_O[5] -.sym 29094 rx_24_fifo.wr_addr_gray_SB_DFFESR_Q_7_D[2] -.sym 29098 rx_24_fifo.wr_addr_gray_SB_DFFESR_Q_7_D[1] -.sym 29102 rx_24_fifo.wr_addr_gray_SB_DFFESR_Q_6_D[1] -.sym 29109 rx_24_fifo.wr_addr[0] -.sym 29112 rx_24_fifo.wr_addr_gray_SB_LUT4_I2_1_O[5] -.sym 29113 rx_24_fifo.wr_addr_gray_SB_LUT4_I2_1_O[6] -.sym 29116 rx_24_fifo.wr_addr_gray_SB_LUT4_I2_1_O[3] -.sym 29117 rx_24_fifo.wr_addr_gray_SB_LUT4_I2_1_O[4] -.sym 29118 rx_24_fifo.wr_addr_gray_SB_DFFESR_Q_6_D[2] -.sym 29142 rx_24_fifo.rd_addr_gray[5] -.sym 29224 lvds_rx_09_inst.r_state_if_SB_LUT4_I2_O[0] -.sym 29225 lvds_rx_09_inst.o_fifo_data[13] -.sym 29228 lvds_rx_09_inst.r_state_if_SB_LUT4_I2_O[0] -.sym 29229 lvds_rx_09_inst.o_fifo_data[7] -.sym 29232 lvds_rx_09_inst.r_state_if_SB_LUT4_I2_O[0] -.sym 29233 io_pmod[6]$SB_IO_IN -.sym 29236 lvds_rx_09_inst.r_state_if_SB_LUT4_I2_O[0] -.sym 29237 io_pmod[7]$SB_IO_IN -.sym 29244 lvds_rx_09_inst.r_state_if_SB_LUT4_I2_O[0] -.sym 29245 lvds_rx_09_inst.o_fifo_data[9] -.sym 29248 lvds_rx_09_inst.r_state_if_SB_LUT4_I2_O[0] -.sym 29249 lvds_rx_09_inst.o_fifo_data[11] -.sym 29252 i_smi_a3$SB_IO_IN -.sym 29253 w_smi_data_output[2] -.sym 29256 i_smi_a3$SB_IO_IN -.sym 29257 w_smi_data_output[1] -.sym 29259 smi_ctrl_ins.int_cnt_09[4] -.sym 29260 $PACKER_VCC_NET -.sym 29261 smi_ctrl_ins.int_cnt_09[3] -.sym 29265 smi_ctrl_ins.r_fifo_09_pull_SB_LUT4_I3_1_O -.sym 29272 i_smi_a3$SB_IO_IN -.sym 29273 w_smi_data_output[7] -.sym 29284 lvds_rx_09_inst.r_state_if_SB_LUT4_I2_O[0] -.sym 29285 lvds_rx_09_inst.o_fifo_data[22] -.sym 29288 lvds_rx_09_inst.r_state_if_SB_LUT4_I2_O[0] -.sym 29289 lvds_rx_09_inst.o_fifo_data[20] -.sym 29292 lvds_rx_09_inst.r_state_if_SB_LUT4_I2_O[0] -.sym 29293 lvds_rx_09_inst.o_fifo_data[17] -.sym 29296 lvds_rx_09_inst.r_state_if_SB_LUT4_I2_O[0] -.sym 29297 lvds_rx_09_inst.o_fifo_data[26] -.sym 29300 rx_09_fifo.full_o_SB_LUT4_I3_O[2] -.sym 29301 rx_09_fifo.wr_addr_gray_SB_LUT4_I2_1_O[4] -.sym 29304 lvds_rx_09_inst.r_state_if_SB_LUT4_I2_O[0] -.sym 29305 lvds_rx_09_inst.o_fifo_data[24] -.sym 29308 lvds_rx_09_inst.r_state_if_SB_LUT4_I2_O[0] -.sym 29309 lvds_rx_09_inst.o_fifo_data[19] -.sym 29312 lvds_rx_09_inst.r_state_if_SB_LUT4_I2_O[0] -.sym 29313 lvds_rx_09_inst.o_fifo_data[15] -.sym 29317 rx_09_fifo.wr_addr[0] -.sym 29318 rx_09_fifo.full_o_SB_LUT4_I3_O[2] -.sym 29322 rx_09_fifo.wr_addr_gray_SB_LUT4_I2_1_O[5] -.sym 29326 rx_09_fifo.wr_addr_gray_SB_DFFESR_Q_4_D[1] -.sym 29330 rx_09_fifo.wr_addr_gray_SB_LUT4_I2_1_O[4] -.sym 29334 rx_09_fifo.wr_addr_gray_SB_LUT4_I2_1_O[1] -.sym 29338 rx_09_fifo.full_o_SB_LUT4_I3_O[1] -.sym 29342 rx_09_fifo.wr_addr_gray_SB_LUT4_I2_1_O[6] -.sym 29347 rx_09_fifo.full_o_SB_DFFSR_Q_D_SB_LUT4_O_I1_SB_LUT4_O_I0_SB_LUT4_O_1_I3[1] -.sym 29352 rx_09_fifo.wr_addr[2] -.sym 29353 rx_09_fifo.full_o_SB_DFFSR_Q_D_SB_LUT4_O_I1_SB_LUT4_O_I0_SB_LUT4_O_1_I3[1] -.sym 29356 rx_09_fifo.wr_addr[3] -.sym 29357 rx_09_fifo.wr_addr_gray_SB_LUT4_I2_I3[2] -.sym 29360 rx_09_fifo.wr_addr[4] -.sym 29361 rx_09_fifo.wr_addr_gray_SB_LUT4_I2_I3[3] -.sym 29364 rx_09_fifo.wr_addr[5] -.sym 29365 rx_09_fifo.wr_addr_gray_SB_LUT4_I2_I3[4] -.sym 29368 rx_09_fifo.wr_addr[6] -.sym 29369 rx_09_fifo.wr_addr_gray_SB_LUT4_I2_I3[5] -.sym 29372 rx_09_fifo.wr_addr[7] -.sym 29373 rx_09_fifo.wr_addr_gray_SB_LUT4_I2_I3[6] -.sym 29376 lvds_rx_09_inst.r_state_if_SB_LUT4_I2_O[0] -.sym 29377 w_rx_09_fifo_data[0] -.sym 29378 i_smi_a2_SB_LUT4_I1_O_SB_LUT4_O_I3[5] -.sym 29379 i_smi_a2_SB_LUT4_I1_O_SB_LUT4_O_I3_SB_LUT4_I0_I1[5] +.sym 28409 w_rx_24_fifo_data[0] +.sym 28412 lvds_rx_24_inst.r_state_if_SB_LUT4_I2_O[0] +.sym 28413 w_rx_24_fifo_data[2] +.sym 28418 lvds_rx_24_inst.r_push_SB_LUT4_I2_I0[0] +.sym 28419 lvds_rx_24_inst.r_push_SB_LUT4_I2_I0[1] +.sym 28420 w_rx_24_fifo_push +.sym 28421 lvds_rx_24_inst.r_push_SB_LUT4_I2_I0[3] +.sym 28422 rx_24_fifo.rd_addr_gray_wr_r[6] +.sym 28423 rx_24_fifo.rd_addr_gray_wr_r[7] +.sym 28424 lvds_rx_24_inst.r_push_SB_LUT4_I2_I0_SB_LUT4_O_I1[6] +.sym 28425 lvds_rx_24_inst.r_push_SB_LUT4_I2_I0_SB_LUT4_O_I0[3] +.sym 28428 rx_24_fifo.full_o_SB_LUT4_I3_O[0] +.sym 28429 lvds_rx_24_inst.r_push_SB_LUT4_I2_I0_SB_LUT4_O_2_I0[2] +.sym 28430 lvds_rx_24_inst.r_push_SB_LUT4_I2_I0_SB_LUT4_O_I0[0] +.sym 28431 lvds_rx_24_inst.r_push_SB_LUT4_I2_I0_SB_LUT4_O_I0[1] +.sym 28432 lvds_rx_24_inst.r_push_SB_LUT4_I2_I0_SB_LUT4_O_I0[2] +.sym 28433 lvds_rx_24_inst.r_push_SB_LUT4_I2_I0_SB_LUT4_O_I0[3] +.sym 28436 lvds_rx_24_inst.r_state_if_SB_LUT4_I2_O[0] +.sym 28437 w_rx_24_fifo_data[19] +.sym 28438 lvds_rx_24_inst.r_push_SB_LUT4_I2_I0_SB_LUT4_O_2_I0[0] +.sym 28439 lvds_rx_24_inst.r_push_SB_LUT4_I2_I0_SB_LUT4_O_2_I0[1] +.sym 28440 lvds_rx_24_inst.r_push_SB_LUT4_I2_I0_SB_LUT4_O_2_I0[2] +.sym 28441 lvds_rx_24_inst.r_push_SB_LUT4_I2_I0_SB_LUT4_O_2_I0[3] +.sym 28444 rx_24_fifo.rd_addr_gray_wr_r[2] +.sym 28445 lvds_rx_24_inst.r_push_SB_LUT4_I2_I0_SB_LUT4_O_I1[1] +.sym 28448 lvds_rx_24_inst.r_state_if_SB_LUT4_I2_O[0] +.sym 28449 w_rx_24_fifo_data[21] +.sym 28452 lvds_rx_24_inst.r_state_if_SB_LUT4_I2_O[0] +.sym 28453 w_rx_24_fifo_data[22] +.sym 28456 lvds_rx_24_inst.r_state_if_SB_LUT4_I2_O[0] +.sym 28457 w_rx_24_fifo_data[24] +.sym 28460 lvds_rx_24_inst.r_state_if_SB_LUT4_I2_O[0] +.sym 28461 w_rx_24_fifo_data[25] +.sym 28464 lvds_rx_24_inst.r_state_if_SB_LUT4_I2_O[0] +.sym 28465 w_rx_24_fifo_data[29] +.sym 28468 lvds_rx_24_inst.r_state_if_SB_LUT4_I2_O[0] +.sym 28469 w_rx_24_fifo_data[28] +.sym 28472 lvds_rx_24_inst.r_state_if_SB_LUT4_I2_O[0] +.sym 28473 w_rx_24_fifo_data[20] +.sym 28476 lvds_rx_24_inst.r_state_if_SB_LUT4_I2_O[0] +.sym 28477 w_rx_24_fifo_data[23] +.sym 28480 lvds_rx_24_inst.r_state_if_SB_LUT4_I2_O[0] +.sym 28481 w_rx_24_fifo_data[27] +.sym 28483 rx_24_fifo.wr_addr[0] +.sym 28488 rx_24_fifo.full_o_SB_DFFSR_Q_D_SB_LUT4_O_I1_SB_LUT4_O_I0[3] +.sym 28489 rx_24_fifo.wr_addr[0] +.sym 28492 rx_24_fifo.wr_addr[2] +.sym 28493 rx_24_fifo.wr_addr_gray_SB_LUT4_I2_I3[2] +.sym 28496 rx_24_fifo.wr_addr[3] +.sym 28497 rx_24_fifo.wr_addr_gray_SB_LUT4_I2_I3[3] +.sym 28500 rx_24_fifo.wr_addr[4] +.sym 28501 rx_24_fifo.wr_addr_gray_SB_LUT4_I2_I3[4] +.sym 28504 rx_24_fifo.wr_addr[5] +.sym 28505 rx_24_fifo.wr_addr_gray_SB_LUT4_I2_I3[5] +.sym 28508 rx_24_fifo.wr_addr[6] +.sym 28509 rx_24_fifo.wr_addr_gray_SB_LUT4_I2_I3[6] +.sym 28512 rx_24_fifo.wr_addr[7] +.sym 28513 rx_24_fifo.wr_addr_gray_SB_LUT4_I2_I3[7] +.sym 28514 rx_24_fifo.full_o_SB_LUT4_I3_O[0] +.sym 28515 rx_24_fifo.full_o_SB_LUT4_I3_O[1] +.sym 28516 rx_24_fifo.full_o_SB_LUT4_I3_O[2] +.sym 28517 rx_24_fifo.full_o_SB_LUT4_I3_O[3] +.sym 28518 rx_24_fifo.full_o_SB_DFFSR_Q_D_SB_LUT4_O_I1_SB_LUT4_O_I0[0] +.sym 28519 rx_24_fifo.full_o_SB_DFFSR_Q_D_SB_LUT4_O_I1_SB_LUT4_O_I0[1] +.sym 28520 lvds_rx_24_inst.r_push_SB_LUT4_I2_I0_SB_LUT4_O_I1[1] +.sym 28521 rx_24_fifo.full_o_SB_DFFSR_Q_D_SB_LUT4_O_I1_SB_LUT4_O_I0[3] +.sym 28523 lvds_rx_24_inst.r_push_SB_LUT4_I2_I0_SB_LUT4_O_I0[2] +.sym 28524 rx_24_fifo.wr_addr_gray_SB_LUT4_I2_O[5] +.sym 28525 rx_24_fifo.wr_addr_gray_SB_LUT4_I2_O[6] +.sym 28526 w_rx_24_fifo_push +.sym 28527 rx_24_fifo.wr_addr_gray_SB_LUT4_I2_O[7] +.sym 28528 rx_24_fifo.rd_addr_gray_wr_r[7] +.sym 28529 w_rx_24_fifo_full +.sym 28532 rx_24_fifo.wr_addr_gray_SB_LUT4_I2_O[2] +.sym 28533 rx_24_fifo.wr_addr_gray_SB_LUT4_I2_O[3] +.sym 28535 rx_24_fifo.full_o_SB_DFFSR_Q_D_SB_LUT4_O_I1[0] +.sym 28536 rx_24_fifo.full_o_SB_DFFSR_Q_D_SB_LUT4_O_I1[1] +.sym 28537 rx_24_fifo.full_o_SB_DFFSR_Q_D_SB_LUT4_O_I1[2] +.sym 28540 rx_24_fifo.wr_addr_gray_SB_LUT4_I2_O[1] +.sym 28541 rx_24_fifo.wr_addr_gray_SB_LUT4_I2_O[2] +.sym 28544 rx_24_fifo.wr_addr_gray_SB_LUT4_I2_O[4] +.sym 28545 rx_24_fifo.wr_addr_gray_SB_LUT4_I2_O[5] +.sym 28546 rx_24_fifo.full_o_SB_DFFSR_Q_D_SB_LUT4_O_I1_SB_LUT4_O_I0[1] +.sym 28547 rx_24_fifo.wr_addr_gray_SB_DFFESR_Q_6_D[1] +.sym 28548 rx_24_fifo.wr_addr_gray_SB_DFFESR_Q_6_D[2] +.sym 28549 rx_24_fifo.rd_addr_gray_wr_r[2] +.sym 28550 rx_24_fifo.rd_addr_gray_wr[7] +.sym 28556 rx_24_fifo.wr_addr[0] +.sym 28557 rx_24_fifo.rd_addr_gray_wr_r[0] +.sym 28558 rx_24_fifo.rd_addr_gray_wr[5] +.sym 28562 rx_24_fifo.full_o_SB_LUT4_I3_O_SB_LUT4_I1_O[0] +.sym 28563 rx_24_fifo.full_o_SB_LUT4_I3_O_SB_LUT4_I1_O[1] +.sym 28564 rx_24_fifo.full_o_SB_LUT4_I3_O_SB_LUT4_I1_O[2] +.sym 28565 rx_24_fifo.full_o_SB_LUT4_I3_O_SB_LUT4_I1_O[3] +.sym 28566 rx_24_fifo.rd_addr_gray_wr[6] +.sym 28570 rx_24_fifo.wr_addr_gray_SB_DFFESR_Q_7_D[0] +.sym 28571 rx_24_fifo.rd_addr_gray_wr_r[6] +.sym 28572 rx_24_fifo.rd_addr_gray_wr_r[0] +.sym 28573 rx_24_fifo.wr_addr_gray_SB_DFFESR_Q_7_D[3] +.sym 28574 rx_24_fifo.rd_addr_gray_wr[4] +.sym 28578 rx_24_fifo.rd_addr_gray[5] +.sym 28602 rx_24_fifo.rd_addr_gray_wr[1] +.sym 28611 w_lvds_rx_24_d1_SB_LUT4_I0_O_SB_LUT4_O_I2_SB_LUT4_I0_O[0] +.sym 28612 w_lvds_rx_24_d1_SB_LUT4_I0_O_SB_LUT4_O_I2[3] +.sym 28613 i_smi_a1_SB_LUT4_I1_O[3] +.sym 28619 i_smi_a1_SB_LUT4_I1_O[3] +.sym 28620 w_lvds_rx_24_d1_SB_LUT4_I0_O_SB_LUT4_O_I2[0] +.sym 28621 w_lvds_rx_24_d1_SB_LUT4_I0_O_SB_LUT4_O_I2[3] +.sym 28628 w_lvds_rx_24_d1_SB_LUT4_I0_O_SB_LUT4_O_I2[0] +.sym 28629 w_lvds_rx_24_d1_SB_LUT4_I0_O_SB_LUT4_O_I2[3] +.sym 28632 w_lvds_rx_24_d1_SB_LUT4_I0_O_SB_LUT4_O_I2[0] +.sym 28633 w_lvds_rx_24_d1_SB_LUT4_I0_O_SB_LUT4_O_I2[3] +.sym 28635 w_lvds_rx_24_d1_SB_LUT4_I0_O[0] +.sym 28636 w_lvds_rx_24_d1_SB_LUT4_I0_O[1] +.sym 28637 i_smi_a1_SB_LUT4_I1_O[3] +.sym 28639 w_lvds_rx_24_d1_SB_LUT4_I0_O_SB_LUT4_O_I2[3] +.sym 28640 w_rx_24_fifo_full +.sym 28641 w_lvds_rx_24_d1_SB_LUT4_I0_O_SB_LUT4_O_I2[0] +.sym 28643 lvds_rx_09_inst.r_phase_count_SB_LUT4_I1_O[0] +.sym 28644 lvds_rx_09_inst.r_state_if_SB_DFFNESR_Q_E_SB_LUT4_O_I2_SB_LUT4_O_I2[0] +.sym 28645 lvds_rx_09_inst.r_state_if[1] +.sym 28647 i_smi_a1_SB_LUT4_I1_O[3] +.sym 28648 lvds_rx_09_inst.r_state_if[0] +.sym 28649 lvds_rx_09_inst.r_state_if[1] +.sym 28658 w_lvds_rx_24_d1_SB_LUT4_I0_O_SB_LUT4_O_I2_SB_LUT4_I0_O[1] +.sym 28666 lvds_rx_24_inst.r_state_if_SB_LUT4_I2_O[0] +.sym 28675 lvds_rx_09_inst.r_phase_count[0] +.sym 28679 lvds_rx_09_inst.r_phase_count[1] +.sym 28680 $PACKER_VCC_NET +.sym 28681 lvds_rx_09_inst.r_phase_count[0] +.sym 28682 lvds_rx_09_inst.r_phase_count_SB_LUT4_O_1_I3[1] +.sym 28684 $PACKER_VCC_NET +.sym 28685 lvds_rx_09_inst.r_phase_count_SB_CARRY_CI_CO[2] +.sym 28686 lvds_rx_09_inst.r_state_if_SB_DFFNESR_Q_E_SB_LUT4_O_I2_SB_LUT4_O_I2_SB_LUT4_I2_O[0] +.sym 28687 lvds_rx_09_inst.r_state_if_SB_DFFNESR_Q_E_SB_LUT4_O_I2_SB_LUT4_O_I2_SB_LUT4_I2_O[1] +.sym 28688 lvds_rx_09_inst.r_phase_count_SB_LUT4_I1_O[1] +.sym 28689 lvds_rx_09_inst.r_state_if_SB_DFFNESR_Q_E_SB_LUT4_O_I2_SB_LUT4_O_I2_SB_LUT4_I2_O[3] +.sym 28692 lvds_rx_09_inst.r_phase_count_SB_LUT4_O_1_I3[0] +.sym 28693 lvds_rx_09_inst.r_phase_count_SB_LUT4_O_1_I3[1] +.sym 28696 lvds_rx_09_inst.r_state_if_SB_LUT4_I2_O[0] +.sym 28697 lvds_rx_09_inst.r_phase_count_SB_LUT4_I1_O[0] +.sym 28701 lvds_rx_09_inst.r_phase_count_SB_LUT4_O_1_I3[0] +.sym 28702 lvds_rx_09_inst.r_state_if_SB_DFFNESR_Q_E_SB_LUT4_O_I2_SB_LUT4_O_I2_SB_LUT4_I2_O[0] +.sym 28703 lvds_rx_09_inst.r_state_if_SB_DFFNESR_Q_E_SB_LUT4_O_I2_SB_LUT4_O_I2_SB_LUT4_I2_O[1] +.sym 28704 lvds_rx_09_inst.r_phase_count_SB_LUT4_I1_O[2] +.sym 28705 lvds_rx_09_inst.r_state_if_SB_DFFNESR_Q_E_SB_LUT4_O_I2_SB_LUT4_O_I2_SB_LUT4_I2_O[3] +.sym 28706 rx_09_fifo.wr_addr_gray_rd[0] +.sym 28710 rx_09_fifo.rd_addr_gray_SB_DFFESR_Q_2_D_SB_LUT4_I3_O_SB_LUT4_O_I1_SB_LUT4_O_1_I0[0] +.sym 28711 rx_09_fifo.rd_addr_gray_SB_DFFESR_Q_2_D_SB_LUT4_I3_O_SB_LUT4_O_1_I1_SB_LUT4_O_1_I0[1] +.sym 28712 rx_09_fifo.rd_addr_gray_SB_DFFESR_Q_2_D_SB_LUT4_I3_O_SB_LUT4_O_I1_SB_LUT4_O_1_I0[2] +.sym 28713 rx_09_fifo.rd_addr_gray_SB_DFFESR_Q_2_D_SB_LUT4_I3_O_SB_LUT4_O_I1_SB_LUT4_O_1_I0[3] +.sym 28719 rx_09_fifo.rd_addr[0] +.sym 28720 rx_09_fifo.wr_addr_gray_rd_r[0] +.sym 28721 rx_09_fifo.rd_addr[1] +.sym 28724 rx_09_fifo.rd_addr[0] +.sym 28725 rx_09_fifo.wr_addr_gray_rd_r[0] +.sym 28732 rx_09_fifo.rd_addr_gray_SB_DFFESR_Q_2_D_SB_LUT4_I3_O_SB_LUT4_O_I1_SB_LUT4_O_I2[3] +.sym 28733 rx_09_fifo.rd_addr_gray_SB_LUT4_I2_O[5] +.sym 28736 rx_09_fifo.rd_addr_gray_SB_DFFESR_Q_2_D_SB_LUT4_I3_O_SB_LUT4_O_2_I0[2] +.sym 28737 rx_09_fifo.rd_addr_gray_SB_DFFESR_Q_2_D_SB_LUT4_I3_O_SB_LUT4_O_I1_SB_LUT4_O_1_I0[2] +.sym 28740 rx_09_fifo.rd_addr_gray_SB_DFFESR_Q_2_D_SB_LUT4_I3_O_SB_LUT4_O_I1_SB_LUT4_O_1_I0[2] +.sym 28741 rx_09_fifo.rd_addr_gray_SB_DFFESR_Q_2_D_SB_LUT4_I3_O_SB_LUT4_O_I1_SB_LUT4_O_I2[1] +.sym 28742 rx_09_fifo.rd_addr_gray_SB_DFFESR_Q_2_D_SB_LUT4_I3_O_SB_LUT4_O_I1_SB_LUT4_O_I2[0] +.sym 28743 rx_09_fifo.rd_addr_gray_SB_DFFESR_Q_2_D_SB_LUT4_I3_O_SB_LUT4_O_I1_SB_LUT4_O_I2[1] +.sym 28744 rx_09_fifo.rd_addr_gray_SB_DFFESR_Q_2_D_SB_LUT4_I3_O_SB_LUT4_O_I1_SB_LUT4_O_I2[2] +.sym 28745 rx_09_fifo.rd_addr_gray_SB_DFFESR_Q_2_D_SB_LUT4_I3_O_SB_LUT4_O_I1_SB_LUT4_O_I2[3] +.sym 28746 w_rx_09_fifo_pulled_data[1] +.sym 28747 w_rx_09_fifo_pulled_data[17] +.sym 28748 i_smi_a2_SB_LUT4_I1_O_SB_LUT4_I3_I2_SB_LUT4_O_I3[1] +.sym 28749 i_smi_a2_SB_LUT4_I1_O_SB_LUT4_I3_I2[1] +.sym 28750 rx_09_fifo.rd_addr_gray_SB_DFFESR_Q_2_D_SB_LUT4_I3_O_SB_LUT4_O_2_I0_SB_LUT4_O_2_I0[1] +.sym 28751 rx_09_fifo.rd_addr_gray_SB_DFFESR_Q_3_D[1] +.sym 28752 rx_09_fifo.rd_addr_gray_SB_DFFESR_Q_3_D[2] +.sym 28753 w_rx_09_fifo_pull +.sym 28754 rx_09_fifo.rd_addr_gray_SB_DFFESR_Q_3_D[1] +.sym 28759 rx_09_fifo.rd_addr_gray_SB_DFFESR_Q_2_D_SB_LUT4_I3_O_SB_LUT4_O_I1[0] +.sym 28760 rx_09_fifo.rd_addr_gray_SB_DFFESR_Q_2_D_SB_LUT4_I3_O_SB_LUT4_O_I1[1] +.sym 28761 rx_09_fifo.rd_addr_gray_SB_DFFESR_Q_2_D_SB_LUT4_I3_O_SB_LUT4_O_I1[2] +.sym 28764 rx_09_fifo.rd_addr_gray_SB_DFFESR_Q_2_D_SB_LUT4_I3_O_SB_LUT4_O_I1_SB_LUT4_O_I2[1] +.sym 28765 rx_09_fifo.rd_addr_gray_SB_DFFESR_Q_2_D_SB_LUT4_I3_O_SB_LUT4_O_I1_SB_LUT4_O_I2[3] +.sym 28766 w_rx_09_fifo_pulled_data[9] +.sym 28767 w_rx_09_fifo_pulled_data[25] +.sym 28768 i_smi_a2_SB_LUT4_I1_O_SB_LUT4_I3_I2_SB_LUT4_O_I3[1] +.sym 28769 smi_ctrl_ins.o_smi_data_out_SB_DFFE_Q_6_D_SB_LUT4_O_I1_SB_LUT4_O_I3[3] +.sym 28770 rx_09_fifo.wr_addr_gray_rd[2] +.sym 28774 w_rx_09_fifo_pulled_data[2] +.sym 28775 w_rx_09_fifo_pulled_data[18] +.sym 28776 i_smi_a2_SB_LUT4_I1_O_SB_LUT4_I3_I2_SB_LUT4_O_I3[1] +.sym 28777 i_smi_a2_SB_LUT4_I1_O_SB_LUT4_I3_I2[1] +.sym 28778 w_rx_09_fifo_pulled_data[7] +.sym 28779 w_rx_09_fifo_pulled_data[23] +.sym 28780 i_smi_a2_SB_LUT4_I1_O_SB_LUT4_I3_I2_SB_LUT4_O_I3[1] +.sym 28781 i_smi_a2_SB_LUT4_I1_O_SB_LUT4_I3_I2[1] +.sym 28782 w_rx_09_fifo_pulled_data[3] +.sym 28783 w_rx_09_fifo_pulled_data[19] +.sym 28784 i_smi_a2_SB_LUT4_I1_O_SB_LUT4_I3_I2_SB_LUT4_O_I3[1] +.sym 28785 i_smi_a2_SB_LUT4_I1_O_SB_LUT4_I3_I2[1] +.sym 28786 w_rx_09_fifo_pulled_data[4] +.sym 28787 w_rx_09_fifo_pulled_data[20] +.sym 28788 i_smi_a2_SB_LUT4_I1_O_SB_LUT4_I3_I2_SB_LUT4_O_I3[1] +.sym 28789 i_smi_a2_SB_LUT4_I1_O_SB_LUT4_I3_I2[1] +.sym 28790 w_rx_09_fifo_pulled_data[5] +.sym 28791 w_rx_09_fifo_pulled_data[21] +.sym 28792 i_smi_a2_SB_LUT4_I1_O_SB_LUT4_I3_I2_SB_LUT4_O_I3[1] +.sym 28793 i_smi_a2_SB_LUT4_I1_O_SB_LUT4_I3_I2[1] +.sym 28794 rx_09_fifo.wr_addr_gray_rd[3] +.sym 28798 w_rx_09_fifo_pulled_data[13] +.sym 28799 w_rx_09_fifo_pulled_data[29] +.sym 28800 i_smi_a2_SB_LUT4_I1_O_SB_LUT4_I3_I2_SB_LUT4_O_I3[1] +.sym 28801 smi_ctrl_ins.o_smi_data_out_SB_DFFE_Q_2_D_SB_LUT4_O_I1_SB_LUT4_O_I3[3] +.sym 28802 w_rx_09_fifo_pulled_data[11] +.sym 28803 w_rx_09_fifo_pulled_data[27] +.sym 28804 i_smi_a2_SB_LUT4_I1_O_SB_LUT4_I3_I2_SB_LUT4_O_I3[1] +.sym 28805 smi_ctrl_ins.o_smi_data_out_SB_DFFE_Q_4_D_SB_LUT4_O_I1_SB_LUT4_O_I3[3] +.sym 28806 rx_09_fifo.rd_addr_gray_wr[0] +.sym 28810 w_rx_09_fifo_pulled_data[12] +.sym 28811 w_rx_09_fifo_pulled_data[28] +.sym 28812 i_smi_a2_SB_LUT4_I1_O_SB_LUT4_I3_I2_SB_LUT4_O_I3[1] +.sym 28813 smi_ctrl_ins.o_smi_data_out_SB_DFFE_Q_3_D_SB_LUT4_O_I1_SB_LUT4_O_I3[3] +.sym 28814 w_rx_09_fifo_pulled_data[10] +.sym 28815 w_rx_09_fifo_pulled_data[26] +.sym 28816 i_smi_a2_SB_LUT4_I1_O_SB_LUT4_I3_I2_SB_LUT4_O_I3[1] +.sym 28817 smi_ctrl_ins.o_smi_data_out_SB_DFFE_Q_D_SB_LUT4_O_I2_SB_LUT4_O_I3[3] +.sym 28818 rx_09_fifo.rd_addr_gray[2] +.sym 28822 w_rx_09_fifo_pulled_data[15] +.sym 28823 w_rx_09_fifo_pulled_data[31] +.sym 28824 i_smi_a2_SB_LUT4_I1_O_SB_LUT4_I3_I2_SB_LUT4_O_I3[1] +.sym 28825 smi_ctrl_ins.o_smi_data_out_SB_DFFE_Q_D_SB_LUT4_O_I1_SB_LUT4_O_I3[3] +.sym 28826 rx_09_fifo.rd_addr_gray_wr[2] +.sym 28830 rx_09_fifo.rd_addr_gray[5] +.sym 28834 rx_09_fifo.rd_addr_gray_wr[4] +.sym 28846 rx_09_fifo.rd_addr_gray[3] +.sym 28850 rx_09_fifo.rd_addr_gray[4] +.sym 28860 i_smi_a3$SB_IO_IN +.sym 28861 w_smi_data_output[6] +.sym 28866 w_rx_24_fifo_pulled_data[15] +.sym 28867 w_rx_24_fifo_pulled_data[7] +.sym 28868 i_smi_a2_SB_LUT4_I1_O_SB_LUT4_I3_1_I2[1] +.sym 28869 i_smi_a2_SB_LUT4_I1_O_SB_LUT4_I3_1_I2_SB_LUT4_O_I3[1] +.sym 28870 w_rx_24_fifo_pulled_data[14] +.sym 28871 w_rx_24_fifo_pulled_data[6] +.sym 28872 i_smi_a2_SB_LUT4_I1_O_SB_LUT4_I3_1_I2[1] +.sym 28873 i_smi_a2_SB_LUT4_I1_O_SB_LUT4_I3_1_I2_SB_LUT4_O_I3[1] +.sym 28874 w_rx_24_fifo_pulled_data[12] +.sym 28875 w_rx_24_fifo_pulled_data[4] +.sym 28876 i_smi_a2_SB_LUT4_I1_O_SB_LUT4_I3_1_I2[1] +.sym 28877 i_smi_a2_SB_LUT4_I1_O_SB_LUT4_I3_1_I2_SB_LUT4_O_I3[1] +.sym 28878 rx_09_fifo.rd_addr_gray_wr[5] +.sym 28882 w_rx_24_fifo_pulled_data[10] +.sym 28883 w_rx_24_fifo_pulled_data[2] +.sym 28884 i_smi_a2_SB_LUT4_I1_O_SB_LUT4_I3_1_I2[1] +.sym 28885 i_smi_a2_SB_LUT4_I1_O_SB_LUT4_I3_1_I2_SB_LUT4_O_I3[1] +.sym 28886 w_rx_24_fifo_pulled_data[9] +.sym 28887 w_rx_24_fifo_pulled_data[1] +.sym 28888 i_smi_a2_SB_LUT4_I1_O_SB_LUT4_I3_1_I2[1] +.sym 28889 i_smi_a2_SB_LUT4_I1_O_SB_LUT4_I3_1_I2_SB_LUT4_O_I3[1] +.sym 28890 rx_09_fifo.rd_addr_gray_wr[3] +.sym 28894 w_rx_24_fifo_pulled_data[11] +.sym 28895 w_rx_24_fifo_pulled_data[3] +.sym 28896 i_smi_a2_SB_LUT4_I1_O_SB_LUT4_I3_1_I2[1] +.sym 28897 i_smi_a2_SB_LUT4_I1_O_SB_LUT4_I3_1_I2_SB_LUT4_O_I3[1] +.sym 28900 lvds_rx_24_inst.r_state_if_SB_LUT4_I2_O[0] +.sym 28901 w_rx_24_fifo_data[15] +.sym 28904 lvds_rx_24_inst.r_state_if_SB_LUT4_I2_O[0] +.sym 28905 w_rx_24_fifo_data[14] +.sym 28908 lvds_rx_24_inst.r_state_if_SB_LUT4_I2_O[0] +.sym 28909 w_rx_24_fifo_data[16] +.sym 28912 lvds_rx_24_inst.r_state_if_SB_LUT4_I2_O[0] +.sym 28913 w_rx_24_fifo_data[3] +.sym 28916 lvds_rx_24_inst.r_state_if_SB_LUT4_I2_O[0] +.sym 28917 w_rx_24_fifo_data[1] +.sym 28918 w_rx_24_fifo_pulled_data[13] +.sym 28919 w_rx_24_fifo_pulled_data[5] +.sym 28920 i_smi_a2_SB_LUT4_I1_O_SB_LUT4_I3_1_I2[1] +.sym 28921 i_smi_a2_SB_LUT4_I1_O_SB_LUT4_I3_1_I2_SB_LUT4_O_I3[1] +.sym 28924 lvds_rx_24_inst.r_state_if_SB_LUT4_I2_O[0] +.sym 28925 w_rx_24_fifo_data[11] +.sym 28928 lvds_rx_24_inst.r_state_if_SB_LUT4_I2_O[0] +.sym 28929 w_rx_24_fifo_data[13] +.sym 28930 rx_24_fifo.rd_addr_gray_SB_LUT4_I2_O[7] +.sym 28934 w_rx_24_fifo_pulled_data[26] +.sym 28935 w_rx_24_fifo_pulled_data[18] +.sym 28936 i_smi_a2_SB_LUT4_I1_O_SB_LUT4_I3_1_I2_SB_LUT4_O_I3[1] +.sym 28937 i_smi_a2_SB_LUT4_I1_O_SB_LUT4_I3_1_I2[1] +.sym 28938 w_rx_24_fifo_pulled_data[29] +.sym 28939 w_rx_24_fifo_pulled_data[21] +.sym 28940 i_smi_a2_SB_LUT4_I1_O_SB_LUT4_I3_1_I2_SB_LUT4_O_I3[1] +.sym 28941 i_smi_a2_SB_LUT4_I1_O_SB_LUT4_I3_1_I2[1] +.sym 28942 rx_24_fifo.rd_addr_gray_SB_LUT4_I2_O[2] +.sym 28946 w_rx_24_fifo_pulled_data[27] +.sym 28947 w_rx_24_fifo_pulled_data[19] +.sym 28948 i_smi_a2_SB_LUT4_I1_O_SB_LUT4_I3_1_I2_SB_LUT4_O_I3[1] +.sym 28949 i_smi_a2_SB_LUT4_I1_O_SB_LUT4_I3_1_I2[1] +.sym 28950 w_rx_24_fifo_pulled_data[0] +.sym 28951 w_rx_24_fifo_pulled_data[16] +.sym 28952 i_smi_a2_SB_LUT4_I1_O_SB_LUT4_I3_1_I2_SB_LUT4_O_I3[1] +.sym 28953 i_smi_a2_SB_LUT4_I1_O_SB_LUT4_I3_1_I2[1] +.sym 28954 w_rx_24_fifo_pulled_data[8] +.sym 28955 w_rx_24_fifo_pulled_data[24] +.sym 28956 i_smi_a2_SB_LUT4_I1_O_SB_LUT4_I3_1_I2_SB_LUT4_O_I3[1] +.sym 28957 smi_ctrl_ins.o_smi_data_out_SB_DFFE_Q_7_D_SB_LUT4_O_I0_SB_LUT4_O_I3[3] +.sym 28961 rx_24_fifo.empty_o_SB_LUT4_I3_I2[1] +.sym 28962 w_rx_24_fifo_pulled_data[31] +.sym 28963 w_rx_24_fifo_pulled_data[23] +.sym 28964 i_smi_a2_SB_LUT4_I1_O_SB_LUT4_I3_1_I2_SB_LUT4_O_I3[1] +.sym 28965 i_smi_a2_SB_LUT4_I1_O_SB_LUT4_I3_1_I2[1] +.sym 28966 rx_24_fifo.empty_o_SB_DFFSS_Q_D_SB_LUT4_O_I0_SB_LUT4_O_2_I3[0] +.sym 28967 rx_24_fifo.empty_o_SB_DFFSS_Q_D_SB_LUT4_O_I0_SB_LUT4_O_2_I3[1] +.sym 28968 rx_24_fifo.empty_o_SB_DFFSS_Q_D_SB_LUT4_O_I0_SB_LUT4_O_2_I3[2] +.sym 28969 rx_24_fifo.empty_o_SB_DFFSS_Q_D_SB_LUT4_O_I0_SB_LUT4_O_2_I3[3] +.sym 28970 w_rx_24_fifo_pulled_data[25] +.sym 28971 w_rx_24_fifo_pulled_data[17] +.sym 28972 i_smi_a2_SB_LUT4_I1_O_SB_LUT4_I3_1_I2_SB_LUT4_O_I3[1] +.sym 28973 i_smi_a2_SB_LUT4_I1_O_SB_LUT4_I3_1_I2[1] +.sym 28974 rx_24_fifo.empty_o_SB_DFFSS_Q_D_SB_LUT4_O_I0_SB_LUT4_O_2_I3_SB_LUT4_O_I0[0] +.sym 28975 rx_24_fifo.empty_o_SB_DFFSS_Q_D_SB_LUT4_O_I0_SB_LUT4_O_2_I3_SB_LUT4_O_I0[1] +.sym 28976 rx_24_fifo.empty_o_SB_DFFSS_Q_D_SB_LUT4_O_I0_SB_LUT4_O_2_I3_SB_LUT4_O_I0[2] +.sym 28977 rx_24_fifo.empty_o_SB_DFFSS_Q_D_SB_LUT4_O_I0_SB_LUT4_O_2_I3[1] +.sym 28978 w_rx_24_fifo_pulled_data[28] +.sym 28979 w_rx_24_fifo_pulled_data[20] +.sym 28980 i_smi_a2_SB_LUT4_I1_O_SB_LUT4_I3_1_I2_SB_LUT4_O_I3[1] +.sym 28981 i_smi_a2_SB_LUT4_I1_O_SB_LUT4_I3_1_I2[1] +.sym 28985 rx_24_fifo.empty_o_SB_LUT4_I3_I2[1] +.sym 28989 rx_24_fifo.empty_o_SB_DFFSS_Q_D_SB_LUT4_O_I0_SB_LUT4_O_I0[3] +.sym 28990 rx_24_fifo.empty_o_SB_DFFSS_Q_D_SB_LUT4_O_I0[0] +.sym 28991 rx_24_fifo.empty_o_SB_DFFSS_Q_D_SB_LUT4_O_I0[1] +.sym 28992 rx_24_fifo.empty_o_SB_DFFSS_Q_D_SB_LUT4_O_I0[2] +.sym 28993 rx_24_fifo.empty_o_SB_DFFSS_Q_D_SB_LUT4_O_I0[3] +.sym 28996 rx_24_fifo.rd_addr_gray_SB_DFFESR_Q_3_D[0] +.sym 28997 rx_24_fifo.empty_o_SB_DFFSS_Q_D_SB_LUT4_O_I0_SB_LUT4_O_2_I3[2] +.sym 28998 rx_24_fifo.rd_addr_gray_wr[3] +.sym 29002 rx_24_fifo.empty_o_SB_DFFSS_Q_D_SB_LUT4_O_I0_SB_LUT4_O_I0[3] +.sym 29008 rx_24_fifo.rd_addr_gray_SB_DFFESR_Q_5_D[1] +.sym 29009 rx_24_fifo.empty_o_SB_DFFSS_Q_D_SB_LUT4_O_I0_SB_LUT4_O_I0_SB_LUT4_O_I0[2] +.sym 29012 rx_24_fifo.rd_addr_gray_SB_DFFESR_Q_7_D[3] +.sym 29013 rx_24_fifo.rd_addr[1] +.sym 29014 rx_24_fifo.empty_o_SB_DFFSS_Q_D_SB_LUT4_O_I0_SB_LUT4_O_I0_SB_LUT4_O_I0[0] +.sym 29015 rx_24_fifo.empty_o_SB_DFFSS_Q_D_SB_LUT4_O_I0_SB_LUT4_O_I0_SB_LUT4_O_I0[1] +.sym 29016 rx_24_fifo.empty_o_SB_DFFSS_Q_D_SB_LUT4_O_I0_SB_LUT4_O_I0_SB_LUT4_O_I0[2] +.sym 29017 rx_24_fifo.empty_o_SB_DFFSS_Q_D_SB_LUT4_O_I0_SB_LUT4_O_I0_SB_LUT4_O_I0[3] +.sym 29018 rx_24_fifo.empty_o_SB_DFFSS_Q_D_SB_LUT4_O_I0_SB_LUT4_O_I0[0] +.sym 29019 rx_24_fifo.empty_o_SB_DFFSS_Q_D_SB_LUT4_O_I0_SB_LUT4_O_I0[1] +.sym 29020 rx_24_fifo.empty_o_SB_DFFSS_Q_D_SB_LUT4_O_I0_SB_LUT4_O_I0[2] +.sym 29021 rx_24_fifo.empty_o_SB_DFFSS_Q_D_SB_LUT4_O_I0_SB_LUT4_O_I0[3] +.sym 29025 rx_24_fifo.rd_addr[1] +.sym 29026 rx_24_fifo.wr_addr_gray_rd[4] +.sym 29030 rx_24_fifo.wr_addr_gray_rd[6] +.sym 29036 lvds_rx_09_inst.r_state_if[0] +.sym 29037 lvds_rx_09_inst.r_state_if[1] +.sym 29038 rx_24_fifo.wr_addr_gray[5] +.sym 29042 rx_24_fifo.wr_addr_gray_rd[5] +.sym 29046 rx_24_fifo.wr_addr[7] +.sym 29050 rx_24_fifo.wr_addr_gray[6] +.sym 29054 rx_24_fifo.wr_addr_gray_rd[7] +.sym 29062 rx_24_fifo.wr_addr_gray_rd[2] +.sym 29070 rx_24_fifo.wr_addr_gray_rd[1] +.sym 29074 rx_24_fifo.wr_addr_gray_rd[3] +.sym 29078 rx_24_fifo.wr_addr_gray_rd[0] +.sym 29115 lvds_rx_09_inst.r_state_if[0] +.sym 29116 w_rx_09_fifo_full +.sym 29117 lvds_rx_09_inst.r_state_if[1] +.sym 29122 rx_24_fifo.wr_addr_gray[4] +.sym 29126 rx_24_fifo.wr_addr_gray[2] +.sym 29131 lvds_rx_09_inst.r_state_if_SB_DFFNESR_Q_E_SB_LUT4_O_I2_SB_LUT4_O_I2_SB_LUT4_I2_O[0] +.sym 29132 lvds_rx_09_inst.r_state_if[0] +.sym 29133 i_smi_a1_SB_LUT4_I1_O[3] +.sym 29138 rx_24_fifo.wr_addr_gray[1] +.sym 29142 rx_24_fifo.wr_addr_gray[3] +.sym 29150 rx_24_fifo.wr_addr_gray[0] +.sym 29158 rx_24_fifo.wr_addr_gray_SB_DFFESR_Q_7_D[3] +.sym 29164 rx_24_fifo.wr_addr_gray_SB_LUT4_I2_O[3] +.sym 29165 rx_24_fifo.wr_addr_gray_SB_LUT4_I2_O[4] +.sym 29166 rx_24_fifo.full_o_SB_LUT4_I3_O[1] +.sym 29170 rx_24_fifo.wr_addr_gray_SB_DFFESR_Q_6_D[2] +.sym 29182 rx_24_fifo.wr_addr_gray_SB_DFFESR_Q_6_D[1] +.sym 29210 rx_24_fifo.rd_addr_gray_wr[0] +.sym 29219 rx_09_fifo.rd_addr[0] +.sym 29224 rx_09_fifo.rd_addr[1] +.sym 29225 rx_09_fifo.rd_addr[0] +.sym 29228 rx_09_fifo.rd_addr[2] +.sym 29229 rx_09_fifo.rd_addr_gray_SB_LUT4_I2_I3[2] +.sym 29232 rx_09_fifo.rd_addr[3] +.sym 29233 rx_09_fifo.rd_addr_gray_SB_LUT4_I2_I3[3] +.sym 29236 rx_09_fifo.rd_addr[4] +.sym 29237 rx_09_fifo.rd_addr_gray_SB_LUT4_I2_I3[4] +.sym 29240 rx_09_fifo.rd_addr[5] +.sym 29241 rx_09_fifo.rd_addr_gray_SB_LUT4_I2_I3[5] +.sym 29244 rx_09_fifo.rd_addr[6] +.sym 29245 rx_09_fifo.rd_addr_gray_SB_LUT4_I2_I3[6] +.sym 29248 rx_09_fifo.rd_addr[7] +.sym 29249 rx_09_fifo.rd_addr_gray_SB_LUT4_I2_I3[7] +.sym 29250 rx_09_fifo.rd_addr_gray_SB_DFFESR_Q_2_D_SB_LUT4_I3_O_SB_LUT4_O_I1_SB_LUT4_O_I2[3] +.sym 29254 rx_09_fifo.rd_addr_gray_SB_DFFESR_Q_2_D_SB_LUT4_I3_O_SB_LUT4_O_2_I0_SB_LUT4_O_2_I0[0] +.sym 29255 rx_09_fifo.rd_addr_gray_SB_DFFESR_Q_2_D_SB_LUT4_I3_O_SB_LUT4_O_2_I0_SB_LUT4_O_2_I0[1] +.sym 29256 rx_09_fifo.rd_addr[4] +.sym 29257 rx_09_fifo.rd_addr[5] +.sym 29258 rx_09_fifo.rd_addr_gray_SB_DFFESR_Q_2_D_SB_LUT4_I3_O_SB_LUT4_O_2_I0[0] +.sym 29259 rx_09_fifo.rd_addr_gray_SB_DFFESR_Q_2_D_SB_LUT4_I3_O_SB_LUT4_O_2_I0[1] +.sym 29260 rx_09_fifo.rd_addr_gray_SB_DFFESR_Q_2_D_SB_LUT4_I3_O_SB_LUT4_O_2_I0[2] +.sym 29261 rx_09_fifo.rd_addr_gray_SB_DFFESR_Q_2_D_SB_LUT4_I3_O_SB_LUT4_O_2_I0[3] +.sym 29262 rx_09_fifo.rd_addr_gray_SB_DFFESR_Q_2_D_SB_LUT4_I3_O_SB_LUT4_O_1_I1_SB_LUT4_O_I2[0] +.sym 29263 rx_09_fifo.rd_addr_gray_SB_DFFESR_Q_2_D_SB_LUT4_I3_O_SB_LUT4_O_1_I1_SB_LUT4_O_I2[1] +.sym 29264 rx_09_fifo.rd_addr_gray_SB_LUT4_I2_O[7] +.sym 29265 rx_09_fifo.rd_addr_gray_SB_LUT4_I2_O[6] +.sym 29268 rx_09_fifo.rd_addr_gray_SB_LUT4_I2_O[7] +.sym 29269 rx_09_fifo.rd_addr_gray_SB_LUT4_I2_O[6] +.sym 29270 rx_09_fifo.rd_addr_gray_SB_DFFESR_Q_2_D_SB_LUT4_I3_O_SB_LUT4_O_I1_SB_LUT4_O_I2[1] +.sym 29274 rx_09_fifo.rd_addr_gray_SB_LUT4_I2_O[7] +.sym 29278 rx_09_fifo.rd_addr_gray_SB_DFFESR_Q_2_D_SB_LUT4_I3_O_SB_LUT4_O_I1_SB_LUT4_O_1_I0[3] +.sym 29282 rx_09_fifo.rd_addr_gray_SB_DFFESR_Q_2_D_SB_LUT4_I3_O_SB_LUT4_O_1_I1_SB_LUT4_O_I2[0] +.sym 29283 rx_09_fifo.rd_addr_gray_SB_DFFESR_Q_2_D_SB_LUT4_I3_O_SB_LUT4_O_1_I1_SB_LUT4_O_I2[1] +.sym 29284 rx_09_fifo.rd_addr_gray_SB_DFFESR_Q_2_D_SB_LUT4_I3_O_SB_LUT4_O_1_I1_SB_LUT4_O_I2[2] +.sym 29285 rx_09_fifo.rd_addr[6] +.sym 29286 rx_09_fifo.rd_addr_gray_SB_DFFESR_Q_2_D_SB_LUT4_I3_O_SB_LUT4_O_1_I1_SB_LUT4_O_I2[1] +.sym 29287 rx_09_fifo.rd_addr[7] +.sym 29288 w_rx_09_fifo_pull +.sym 29289 io_pmod[2]$SB_IO_IN +.sym 29290 w_rx_09_fifo_pulled_data[6] +.sym 29291 w_rx_09_fifo_pulled_data[22] +.sym 29292 i_smi_a2_SB_LUT4_I1_O_SB_LUT4_I3_I2_SB_LUT4_O_I3[1] +.sym 29293 i_smi_a2_SB_LUT4_I1_O_SB_LUT4_I3_I2[1] +.sym 29295 rx_09_fifo.rd_addr_gray_SB_DFFESR_Q_2_D_SB_LUT4_I3_O_SB_LUT4_O_I1_SB_LUT4_O_I2[0] +.sym 29296 rx_09_fifo.rd_addr[3] +.sym 29297 rx_09_fifo.rd_addr[4] +.sym 29299 rx_09_fifo.rd_addr_gray_SB_DFFESR_Q_2_D_SB_LUT4_I3_O_SB_LUT4_O_1_I1[0] +.sym 29300 rx_09_fifo.rd_addr_gray_SB_DFFESR_Q_2_D_SB_LUT4_I3_O_SB_LUT4_O_1_I1[1] +.sym 29301 rx_09_fifo.rd_addr_gray_SB_DFFESR_Q_2_D_SB_LUT4_I3_O_SB_LUT4_O_1_I1[2] +.sym 29302 rx_09_fifo.rd_addr_gray_SB_DFFESR_Q_2_D_SB_LUT4_I3_O_SB_LUT4_O_1_I1_SB_LUT4_O_1_I0[0] +.sym 29303 rx_09_fifo.rd_addr_gray_SB_DFFESR_Q_2_D_SB_LUT4_I3_O_SB_LUT4_O_1_I1_SB_LUT4_O_1_I0[1] +.sym 29304 rx_09_fifo.rd_addr[1] +.sym 29305 rx_09_fifo.rd_addr[2] +.sym 29306 rx_09_fifo.rd_addr_gray_SB_DFFESR_Q_2_D_SB_LUT4_I3_O[0] +.sym 29307 rx_09_fifo.rd_addr_gray_SB_DFFESR_Q_2_D_SB_LUT4_I3_O[1] +.sym 29308 rx_09_fifo.rd_addr_gray_SB_DFFESR_Q_2_D_SB_LUT4_I3_O[2] +.sym 29309 rx_09_fifo.rd_addr_gray_SB_DFFESR_Q_2_D_SB_LUT4_I3_O[3] +.sym 29311 rx_09_fifo.rd_addr_gray_SB_DFFESR_Q_2_D_SB_LUT4_I3_O_SB_LUT4_O_1_I1_SB_LUT4_O_I2[0] +.sym 29312 rx_09_fifo.rd_addr[6] +.sym 29313 rx_09_fifo.rd_addr[7] +.sym 29314 rx_09_fifo.wr_addr[7] +.sym 29318 rx_09_fifo.wr_addr_gray_rd[7] +.sym 29322 w_rx_09_fifo_pulled_data[14] +.sym 29323 w_rx_09_fifo_pulled_data[30] +.sym 29324 i_smi_a2_SB_LUT4_I1_O_SB_LUT4_I3_I2_SB_LUT4_O_I3[1] +.sym 29325 smi_ctrl_ins.o_smi_data_out_SB_DFFE_Q_1_D_SB_LUT4_O_I1_SB_LUT4_O_I3[3] +.sym 29331 w_rx_09_fifo_pulled_data[0] +.sym 29332 i_smi_a2_SB_LUT4_I1_O_SB_LUT4_I3_I2[2] +.sym 29333 i_smi_a1_SB_LUT4_I1_O_SB_LUT4_I3_O[3] +.sym 29334 rx_09_fifo.wr_addr_gray_rd[6] +.sym 29338 rx_09_fifo.wr_addr_gray[6] +.sym 29344 i_smi_a3$SB_IO_IN +.sym 29345 w_smi_data_output[1] +.sym 29346 i_smi_a2_SB_LUT4_I1_O_SB_LUT4_I3_I2[2] +.sym 29347 smi_ctrl_ins.o_smi_data_out_SB_DFFE_Q_1_D_SB_LUT4_O_I1[1] +.sym 29348 smi_ctrl_ins.o_smi_data_out_SB_DFFE_Q_1_D_SB_LUT4_O_I1[2] +.sym 29349 smi_ctrl_ins.o_smi_data_out_SB_DFFE_Q_1_D_SB_LUT4_O_I1[3] +.sym 29352 i_smi_a3$SB_IO_IN +.sym 29353 w_smi_data_output[2] +.sym 29354 i_smi_a2_SB_LUT4_I1_O_SB_LUT4_I3_I2[2] +.sym 29355 smi_ctrl_ins.o_smi_data_out_SB_DFFE_Q_D_SB_LUT4_O_I1[1] +.sym 29356 smi_ctrl_ins.o_smi_data_out_SB_DFFE_Q_1_D_SB_LUT4_O_I1[2] +.sym 29357 smi_ctrl_ins.o_smi_data_out_SB_DFFE_Q_D_SB_LUT4_O_I1[3] +.sym 29358 i_smi_a2_SB_LUT4_I1_O_SB_LUT4_I3_I2[2] +.sym 29359 smi_ctrl_ins.o_smi_data_out_SB_DFFE_Q_6_D_SB_LUT4_O_I1[1] +.sym 29360 smi_ctrl_ins.o_smi_data_out_SB_DFFE_Q_1_D_SB_LUT4_O_I1[2] +.sym 29361 smi_ctrl_ins.o_smi_data_out_SB_DFFE_Q_6_D_SB_LUT4_O_I1[3] +.sym 29362 i_smi_a2_SB_LUT4_I1_O_SB_LUT4_I3_I2[2] +.sym 29363 smi_ctrl_ins.o_smi_data_out_SB_DFFE_Q_4_D_SB_LUT4_O_I1[1] +.sym 29364 smi_ctrl_ins.o_smi_data_out_SB_DFFE_Q_1_D_SB_LUT4_O_I1[2] +.sym 29365 smi_ctrl_ins.o_smi_data_out_SB_DFFE_Q_4_D_SB_LUT4_O_I1[3] +.sym 29368 i_smi_a3$SB_IO_IN +.sym 29369 w_smi_data_output[3] +.sym 29370 i_smi_a2_SB_LUT4_I1_O_SB_LUT4_I3_I2[2] +.sym 29371 smi_ctrl_ins.o_smi_data_out_SB_DFFE_Q_D_SB_LUT4_O_I2[1] +.sym 29372 smi_ctrl_ins.o_smi_data_out_SB_DFFE_Q_1_D_SB_LUT4_O_I1[2] +.sym 29373 smi_ctrl_ins.o_smi_data_out_SB_DFFE_Q_D_SB_LUT4_O_I2[3] +.sym 29374 i_smi_a2_SB_LUT4_I1_O_SB_LUT4_I3_I2[2] +.sym 29375 smi_ctrl_ins.o_smi_data_out_SB_DFFE_Q_3_D_SB_LUT4_O_I1[1] +.sym 29376 smi_ctrl_ins.o_smi_data_out_SB_DFFE_Q_1_D_SB_LUT4_O_I1[2] +.sym 29377 smi_ctrl_ins.o_smi_data_out_SB_DFFE_Q_3_D_SB_LUT4_O_I1[3] +.sym 29379 i_smi_a2_SB_LUT4_I1_O_SB_LUT4_I3_1_I2_SB_LUT4_O_I3[1] .sym 29380 i_smi_soe_se$rename$0 -.sym 29381 smi_ctrl_ins.r_fifo_24_pull_SB_LUT4_I1_O[2] -.sym 29382 smi_ctrl_ins.int_cnt_09[4] -.sym 29383 smi_ctrl_ins.int_cnt_09[5] -.sym 29384 smi_ctrl_ins.int_cnt_09[3] -.sym 29385 io_pmod[2]$SB_IO_IN -.sym 29388 lvds_rx_09_inst.r_push_SB_DFFNESR_Q_E_SB_LUT4_O_I1_SB_LUT4_O_I2[2] -.sym 29389 lvds_rx_09_inst.r_push_SB_DFFNESR_Q_E_SB_LUT4_O_I1_SB_LUT4_O_I2[3] -.sym 29390 rx_09_fifo.full_o_SB_DFFSR_Q_D_SB_LUT4_O_I1_SB_LUT4_O_I0_SB_LUT4_O_1_I3[0] -.sym 29391 rx_09_fifo.full_o_SB_DFFSR_Q_D_SB_LUT4_O_I1_SB_LUT4_O_I0_SB_LUT4_O_1_I3[1] -.sym 29392 lvds_rx_09_inst.r_push_SB_LUT4_I3_O_SB_LUT4_O_I3[1] -.sym 29393 rx_09_fifo.full_o_SB_DFFSR_Q_D_SB_LUT4_O_I1_SB_LUT4_O_I0_SB_LUT4_O_1_I3[3] -.sym 29396 lvds_rx_09_inst.r_push_SB_LUT4_I3_O_SB_LUT4_O_I3[3] -.sym 29397 lvds_rx_09_inst.r_push_SB_LUT4_I3_O_SB_LUT4_O_I3[4] -.sym 29398 rx_09_fifo.full_o_SB_DFFSR_Q_D_SB_LUT4_O_I1_SB_LUT4_O_I0_SB_LUT4_O_I0[0] -.sym 29399 rx_09_fifo.full_o_SB_DFFSR_Q_D_SB_LUT4_O_I1_SB_LUT4_O_I0_SB_LUT4_O_I0[1] -.sym 29400 lvds_rx_09_inst.r_push_SB_LUT4_I3_O_SB_LUT4_O_I3[3] -.sym 29401 lvds_rx_09_inst.r_push_SB_LUT4_I3_O_SB_LUT4_O_I3[2] -.sym 29402 rx_09_fifo.full_o_SB_DFFSR_Q_D_SB_LUT4_O_I1_SB_LUT4_O_I0[0] -.sym 29403 rx_09_fifo.full_o_SB_DFFSR_Q_D_SB_LUT4_O_I1_SB_LUT4_O_I0[1] -.sym 29404 rx_09_fifo.full_o_SB_DFFSR_Q_D_SB_LUT4_O_I1_SB_LUT4_O_I0[2] -.sym 29405 rx_09_fifo.full_o_SB_DFFSR_Q_D_SB_LUT4_O_I1_SB_LUT4_O_I0[3] -.sym 29407 lvds_rx_09_inst.r_push_SB_DFFNESR_Q_E_SB_LUT4_O_I1_SB_LUT4_O_I2[3] -.sym 29408 w_rx_09_fifo_full -.sym 29409 lvds_rx_09_inst.r_push_SB_DFFNESR_Q_E_SB_LUT4_O_I1_SB_LUT4_O_I2[2] -.sym 29411 spi_if_ins.o_load_cmd_SB_DFFESR_Q_D[1] -.sym 29412 spi_if_ins.state_if[0] -.sym 29413 spi_if_ins.state_if[1] -.sym 29421 spi_if_ins.state_if_SB_DFFE_Q_E -.sym 29426 spi_if_ins.o_load_cmd_SB_DFFESR_Q_D[1] -.sym 29427 spi_if_ins.r_tx_data_valid_SB_DFFESR_Q_D[0] -.sym 29428 spi_if_ins.state_if[0] -.sym 29429 spi_if_ins.state_if[1] -.sym 29431 spi_if_ins.o_load_cmd_SB_DFFESR_Q_D[1] -.sym 29432 spi_if_ins.state_if[1] -.sym 29433 spi_if_ins.state_if[0] -.sym 29438 spi_if_ins.state_if_SB_DFFESR_Q_D[0] -.sym 29439 spi_if_ins.o_load_cmd_SB_DFFESR_Q_D_SB_LUT4_I1_O[0] -.sym 29440 spi_if_ins.state_if_SB_DFFESR_Q_D[2] -.sym 29441 spi_if_ins.r_tx_data_valid_SB_DFFESR_Q_D[0] -.sym 29444 spi_if_ins.o_load_cmd_SB_DFFESR_Q_D[0] -.sym 29445 spi_if_ins.o_load_cmd_SB_DFFESR_Q_D[1] -.sym 29446 rx_24_fifo.rd_addr[7] -.sym 29447 rx_24_fifo.wr_addr_gray_rd_r[7] -.sym 29448 rx_24_fifo.rd_addr_gray_SB_DFFESR_Q_6_D[2] -.sym 29449 rx_24_fifo.rd_addr[6] -.sym 29453 smi_ctrl_ins.r_fifo_24_pull_SB_LUT4_I3_1_O -.sym 29455 rx_24_fifo.wr_addr_gray_rd_r[7] -.sym 29456 rx_24_fifo.rd_addr_gray_SB_LUT4_I2_O[7] -.sym 29457 w_rx_24_fifo_pull -.sym 29460 i_smi_a1_SB_LUT4_I1_O_SB_LUT4_O_I2_SB_LUT4_I0_O[2] -.sym 29461 w_rx_24_fifo_pull -.sym 29466 rx_24_fifo.rd_addr_gray_SB_DFFESR_Q_7_D_SB_LUT4_I3_O_SB_LUT4_O_I0[0] -.sym 29467 rx_24_fifo.rd_addr_gray_SB_DFFESR_Q_7_D_SB_LUT4_I3_O_SB_LUT4_O_I0[1] -.sym 29468 rx_24_fifo.rd_addr_gray_SB_DFFESR_Q_7_D_SB_LUT4_I3_O_SB_LUT4_O_I0[2] -.sym 29469 rx_24_fifo.rd_addr_gray_SB_DFFESR_Q_7_D_SB_LUT4_I3_O_SB_LUT4_O_I0[3] -.sym 29470 rx_24_fifo.wr_addr_gray_rd_r[7] -.sym 29471 rx_24_fifo.rd_addr[7] -.sym 29472 w_rx_24_fifo_pull -.sym 29473 w_rx_24_fifo_empty -.sym 29474 spi_if_ins.r_tx_data_valid_SB_DFFESR_Q_D[0] -.sym 29475 spi_if_ins.o_load_cmd_SB_DFFESR_Q_D[1] -.sym 29476 spi_if_ins.state_if[0] -.sym 29477 spi_if_ins.state_if[1] -.sym 29480 rx_24_fifo.rd_addr[0] -.sym 29481 rx_24_fifo.rd_addr_gray_SB_DFFESR_Q_7_D[0] -.sym 29482 rx_24_fifo.rd_addr[7] -.sym 29490 rx_24_fifo.rd_addr_gray_wr[7] -.sym 29497 spi_if_ins.r_tx_data_valid_SB_DFFESR_Q_D[0] -.sym 29502 rx_24_fifo.rd_addr_gray_SB_DFFESR_Q_7_D_SB_LUT4_I3_O_SB_LUT4_O_I0_SB_LUT4_O_1_I0[0] -.sym 29503 rx_24_fifo.rd_addr[1] -.sym 29504 rx_24_fifo.rd_addr_gray_SB_DFFESR_Q_6_D[0] -.sym 29505 rx_24_fifo.rd_addr[2] -.sym 29506 spi_if_ins.o_load_cmd_SB_DFFESR_Q_D[0] -.sym 29510 rx_24_fifo.rd_addr_gray_SB_DFFESR_Q_7_D_SB_LUT4_I3_O_SB_LUT4_O_2_I0[0] -.sym 29511 rx_24_fifo.rd_addr_gray_SB_DFFESR_Q_7_D_SB_LUT4_I3_O_SB_LUT4_O_2_I0[1] -.sym 29512 rx_24_fifo.rd_addr_gray_SB_DFFESR_Q_7_D_SB_LUT4_I3_O_SB_LUT4_O_2_I0[2] -.sym 29513 rx_24_fifo.rd_addr_gray_SB_DFFESR_Q_7_D_SB_LUT4_I3_O_SB_LUT4_O_2_I0[3] -.sym 29516 rx_24_fifo.rd_addr[0] -.sym 29517 rx_24_fifo.rd_addr_gray_SB_LUT4_I2_O[1] -.sym 29518 rx_24_fifo.rd_addr_gray_SB_DFFESR_Q_6_D[0] -.sym 29519 rx_24_fifo.rd_addr_gray_SB_DFFESR_Q_6_D[1] -.sym 29520 rx_24_fifo.rd_addr_gray_SB_DFFESR_Q_6_D[2] -.sym 29521 rx_24_fifo.rd_addr_gray_SB_DFFESR_Q_6_D[3] -.sym 29528 rx_24_fifo.rd_addr_gray_SB_LUT4_I2_O[1] -.sym 29529 rx_24_fifo.rd_addr_gray_SB_DFFESR_Q_7_D_SB_LUT4_I3_O_SB_LUT4_O_2_I0_SB_LUT4_O_1_I3[1] -.sym 29532 rx_24_fifo.rd_addr_gray_SB_LUT4_I2_O[7] -.sym 29533 rx_24_fifo.rd_addr_gray_SB_LUT4_I2_O[6] -.sym 29540 rx_24_fifo.rd_addr_gray_SB_DFFESR_Q_7_D[0] -.sym 29541 rx_24_fifo.rd_addr_gray_SB_DFFESR_Q_7_D[1] -.sym 29542 rx_24_fifo.rd_addr_gray_SB_DFFESR_Q_3_D[0] -.sym 29543 rx_24_fifo.rd_addr[4] -.sym 29544 rx_24_fifo.rd_addr[5] -.sym 29545 rx_24_fifo.rd_addr_gray_SB_DFFESR_Q_7_D_SB_LUT4_I3_O_SB_LUT4_O_1_I3[3] -.sym 29548 rx_24_fifo.rd_addr_gray_SB_DFFESR_Q_3_D[3] -.sym 29549 rx_24_fifo.rd_addr[6] -.sym 29554 rx_24_fifo.rd_addr_gray_SB_DFFESR_Q_7_D_SB_LUT4_I3_O[0] -.sym 29555 rx_24_fifo.rd_addr_gray_SB_DFFESR_Q_7_D_SB_LUT4_I3_O[1] -.sym 29556 rx_24_fifo.rd_addr_gray_SB_DFFESR_Q_7_D_SB_LUT4_I3_O[2] -.sym 29557 rx_24_fifo.rd_addr_gray_SB_DFFESR_Q_7_D_SB_LUT4_I3_O[3] -.sym 29562 rx_24_fifo.rd_addr_gray_SB_DFFESR_Q_3_D[0] -.sym 29563 rx_24_fifo.rd_addr_gray_SB_DFFESR_Q_3_D[1] -.sym 29564 rx_24_fifo.rd_addr_gray_SB_DFFESR_Q_3_D[2] -.sym 29565 rx_24_fifo.rd_addr_gray_SB_DFFESR_Q_3_D[3] -.sym 29574 rx_24_fifo.wr_addr_gray_rd[4] -.sym 29578 rx_24_fifo.wr_addr_gray[1] -.sym 29582 rx_24_fifo.wr_addr_gray_rd[1] -.sym 29586 rx_24_fifo.wr_addr_gray[0] -.sym 29590 rx_24_fifo.wr_addr_gray_rd[0] -.sym 29594 rx_24_fifo.wr_addr_gray_rd[2] -.sym 29598 rx_24_fifo.wr_addr_gray_rd[5] -.sym 29602 rx_24_fifo.wr_addr_gray[5] -.sym 29622 rx_24_fifo.wr_addr_gray[4] -.sym 29630 rx_24_fifo.wr_addr_gray[2] -.sym 29730 rx_09_fifo.rd_addr_gray_wr[5] -.sym 29734 rx_09_fifo.rd_addr_gray_wr[4] -.sym 29738 rx_09_fifo.rd_addr_gray_wr[3] -.sym 29744 i_smi_a3$SB_IO_IN -.sym 29745 w_smi_data_output[3] -.sym 29748 i_smi_a3$SB_IO_IN -.sym 29749 w_smi_data_output[4] -.sym 29754 rx_09_fifo.rd_addr_gray[6] -.sym 29758 rx_09_fifo.rd_addr_gray_wr[6] -.sym 29766 rx_09_fifo.wr_addr_gray_SB_LUT4_I2_1_O[7] -.sym 29770 rx_09_fifo.wr_addr_gray_SB_DFFESR_Q_4_D[2] -.sym 29784 i_smi_a1_SB_LUT4_I1_O_SB_LUT4_O_I2_SB_LUT4_I0_O[2] -.sym 29785 w_rx_09_fifo_pull -.sym 29786 rx_09_fifo.wr_addr_gray_SB_DFFESR_Q_3_D[2] -.sym 29790 rx_09_fifo.wr_addr_gray_SB_DFFESR_Q_3_D[1] -.sym 29796 i_smi_a1_SB_LUT4_I1_O_SB_LUT4_O_I2_SB_LUT4_I0_O[2] -.sym 29797 w_rx_09_fifo_push -.sym 29798 rx_09_fifo.full_o_SB_DFFSR_Q_D_SB_LUT4_O_I1_SB_LUT4_O_I0[1] -.sym 29799 rx_09_fifo.wr_addr_gray_SB_DFFESR_Q_3_D[1] -.sym 29800 rx_09_fifo.wr_addr_gray_SB_DFFESR_Q_3_D[2] -.sym 29801 rx_09_fifo.rd_addr_gray_wr_r[6] -.sym 29802 rx_09_fifo.full_o_SB_DFFSR_Q_D_SB_LUT4_O_I1_SB_LUT4_O_I0_SB_LUT4_O_I0[1] -.sym 29803 rx_09_fifo.wr_addr_gray_SB_DFFESR_Q_4_D[1] -.sym 29804 rx_09_fifo.wr_addr_gray_SB_DFFESR_Q_4_D[2] -.sym 29805 rx_09_fifo.rd_addr_gray_wr_r[5] -.sym 29806 rx_09_fifo.rd_addr_gray_SB_LUT4_I2_O[7] -.sym 29812 rx_09_fifo.wr_addr_gray_SB_LUT4_I2_1_O[7] -.sym 29813 rx_09_fifo.wr_addr_gray_SB_LUT4_I2_1_O[6] -.sym 29814 rx_09_fifo.rd_addr_gray_SB_DFFESR_Q_1_D[1] -.sym 29820 rx_09_fifo.wr_addr_gray_SB_LUT4_I2_1_O[4] -.sym 29821 rx_09_fifo.wr_addr_gray_SB_LUT4_I2_1_O[5] -.sym 29824 rx_09_fifo.wr_addr_gray_SB_LUT4_I2_1_O[5] -.sym 29825 rx_09_fifo.wr_addr_gray_SB_LUT4_I2_1_O[6] -.sym 29827 rx_09_fifo.wr_addr[0] -.sym 29832 rx_09_fifo.full_o_SB_DFFSR_Q_D_SB_LUT4_O_I1_SB_LUT4_O_I0_SB_LUT4_O_1_I3[1] -.sym 29836 rx_09_fifo.wr_addr[2] -.sym 29837 rx_09_fifo.wr_addr_gray_SB_LUT4_I2_1_I3[2] -.sym 29840 rx_09_fifo.wr_addr[3] -.sym 29841 rx_09_fifo.wr_addr_gray_SB_LUT4_I2_1_I3[3] -.sym 29844 rx_09_fifo.wr_addr[4] -.sym 29845 rx_09_fifo.wr_addr_gray_SB_LUT4_I2_1_I3[4] -.sym 29848 rx_09_fifo.wr_addr[5] -.sym 29849 rx_09_fifo.wr_addr_gray_SB_LUT4_I2_1_I3[5] -.sym 29852 rx_09_fifo.wr_addr[6] -.sym 29853 rx_09_fifo.wr_addr_gray_SB_LUT4_I2_1_I3[6] -.sym 29856 rx_09_fifo.wr_addr[7] -.sym 29857 rx_09_fifo.wr_addr_gray_SB_LUT4_I2_1_I3[7] -.sym 29860 rx_09_fifo.full_o_SB_DFFSR_Q_D_SB_LUT4_O_I1_SB_LUT4_O_I0_SB_LUT4_O_1_I3[1] -.sym 29861 rx_09_fifo.wr_addr[0] -.sym 29863 rx_09_fifo.wr_addr[0] -.sym 29864 rx_09_fifo.full_o_SB_DFFSR_Q_D_SB_LUT4_O_I1_SB_LUT4_O_I0_SB_LUT4_O_1_I3[1] -.sym 29865 rx_09_fifo.rd_addr_gray_wr_r[0] -.sym 29866 lvds_rx_09_inst.r_push_SB_LUT4_I3_O[0] -.sym 29867 lvds_rx_09_inst.r_push_SB_LUT4_I3_O[1] -.sym 29868 lvds_rx_09_inst.r_push_SB_LUT4_I3_O[2] -.sym 29869 lvds_rx_09_inst.r_push_SB_LUT4_I3_O[3] -.sym 29870 w_rx_09_fifo_push -.sym 29871 rx_09_fifo.wr_addr_gray_SB_LUT4_I2_1_O[7] -.sym 29872 lvds_rx_09_inst.r_push_SB_LUT4_I3_O[0] -.sym 29873 w_rx_09_fifo_full -.sym 29876 rx_09_fifo.rd_addr_gray_wr_r[6] -.sym 29877 lvds_rx_09_inst.r_push_SB_LUT4_I3_O_SB_LUT4_O_I3[5] -.sym 29879 rx_09_fifo.full_o_SB_DFFSR_Q_D_SB_LUT4_O_I1[0] -.sym 29880 rx_09_fifo.full_o_SB_DFFSR_Q_D_SB_LUT4_O_I1[1] -.sym 29881 rx_09_fifo.full_o_SB_DFFSR_Q_D_SB_LUT4_O_I1[2] -.sym 29882 lvds_rx_09_inst.r_push_SB_LUT4_I3_I0[0] -.sym 29883 lvds_rx_09_inst.r_push_SB_LUT4_I3_I0[1] -.sym 29884 lvds_rx_09_inst.r_push_SB_LUT4_I3_I0[2] -.sym 29885 w_rx_09_fifo_push -.sym 29887 rx_09_fifo.rd_addr_gray_wr_r[5] -.sym 29888 lvds_rx_09_inst.r_push_SB_LUT4_I3_O_SB_LUT4_O_I3[4] -.sym 29889 lvds_rx_09_inst.r_push_SB_LUT4_I3_O_SB_LUT4_O_I3[5] -.sym 29894 r_tx_data[0] -.sym 29900 rx_09_fifo.full_o_SB_LUT4_I3_O[0] -.sym 29901 lvds_rx_09_inst.r_push_SB_LUT4_I3_O_SB_LUT4_O_I3[1] -.sym 29903 rx_09_fifo.full_o_SB_DFFSR_Q_D_SB_LUT4_O_I1_SB_LUT4_O_I0_SB_LUT4_O_1_I3[0] -.sym 29904 rx_09_fifo.full_o_SB_DFFSR_Q_D_SB_LUT4_O_I1_SB_LUT4_O_I0_SB_LUT4_O_1_I3[1] -.sym 29905 lvds_rx_09_inst.r_push_SB_LUT4_I3_O_SB_LUT4_O_I3[1] -.sym 29911 smi_ctrl_ins.int_cnt_09_SB_DFFESR_Q_E_SB_LUT4_O_I1[0] -.sym 29912 smi_ctrl_ins.int_cnt_09_SB_DFFESR_Q_E_SB_LUT4_O_I1[1] -.sym 29913 i_smi_a1_SB_LUT4_I1_O_SB_LUT4_O_I2_SB_LUT4_I0_O[2] -.sym 29922 w_rx_09_fifo_full -.sym 29930 w_rx_24_fifo_empty -.sym 29950 io_pmod[2]$SB_IO_IN -.sym 29960 lvds_rx_24_inst.r_state_if_SB_LUT4_I2_O[0] -.sym 29961 w_rx_24_fifo_data[18] -.sym 29962 w_tx_data_smi[0] -.sym 29963 spi_if_ins.o_cs_SB_LUT4_I2_1_O[1] -.sym 29964 smi_ctrl_ins.o_data_out_SB_LUT4_I1_O[0] -.sym 29965 w_tx_data_io[0] -.sym 29967 spi_if_ins.o_load_cmd_SB_DFFESR_Q_D_SB_LUT4_I1_O[0] -.sym 29968 spi_if_ins.o_load_cmd_SB_DFFESR_Q_D_SB_LUT4_I1_O[1] -.sym 29969 spi_if_ins.o_load_cmd_SB_DFFESR_Q_D_SB_LUT4_I1_O[2] -.sym 29971 spi_if_ins.r_tx_data_valid_SB_DFFESR_Q_D[0] -.sym 29972 spi_if_ins.state_if_SB_DFFESR_Q_D[2] -.sym 29973 spi_if_ins.o_load_cmd_SB_DFFESR_Q_D_SB_LUT4_I1_O[1] -.sym 29975 spi_if_ins.state_if_SB_DFFESR_Q_D[2] -.sym 29976 spi_if_ins.o_load_cmd_SB_DFFESR_Q_D[0] -.sym 29977 spi_if_ins.r_tx_data_valid_SB_DFFESR_Q_D[0] -.sym 29980 spi_if_ins.state_if[0] -.sym 29981 spi_if_ins.state_if[1] -.sym 29984 lvds_rx_24_inst.r_state_if_SB_LUT4_I2_O[0] -.sym 29985 w_rx_24_fifo_data[29] -.sym 29986 w_tx_data_sys[0] -.sym 29987 spi_if_ins.o_cs_SB_LUT4_I2_2_O[1] -.sym 29988 spi_if_ins.o_cs_SB_LUT4_I2_2_O[2] -.sym 29989 spi_if_ins.o_cs_SB_LUT4_I2_2_O[3] -.sym 29992 spi_if_ins.r_tx_data_valid_SB_DFFESR_Q_D[0] -.sym 29993 spi_if_ins.r_tx_data_valid_SB_DFFESR_Q_D[1] -.sym 29997 spi_if_ins.r_tx_data_valid_SB_DFFESR_Q_E -.sym 29999 spi_if_ins.o_load_cmd_SB_DFFESR_Q_D[1] -.sym 30000 spi_if_ins.state_if[0] -.sym 30001 spi_if_ins.state_if[1] -.sym 30002 spi_if_ins.o_load_cmd_SB_DFFESR_Q_D[1] -.sym 30003 spi_if_ins.r_tx_data_valid_SB_DFFESR_Q_D[0] -.sym 30004 spi_if_ins.state_if[0] -.sym 30005 spi_if_ins.state_if[1] -.sym 30015 spi_if_ins.o_load_cmd_SB_DFFESR_Q_D[0] -.sym 30016 spi_if_ins.o_load_cmd_SB_DFFESR_Q_D[1] -.sym 30017 spi_if_ins.r_tx_data_valid_SB_DFFESR_Q_D[0] -.sym 30033 spi_if_ins.o_load_cmd_SB_DFFESR_Q_D_SB_LUT4_I1_O[1] -.sym 30042 io_ctrl_ins.ldo2v8_state_SB_LUT4_I3_O[1] -.sym 30058 rx_24_fifo.rd_addr_gray[6] -.sym 30086 rx_24_fifo.rd_addr_gray_SB_DFFESR_Q_6_D[1] -.sym 30090 rx_24_fifo.rd_addr_gray_SB_DFFESR_Q_3_D[1] -.sym 30098 rx_24_fifo.rd_addr_gray_SB_DFFESR_Q_6_D[3] -.sym 30110 rx_24_fifo.rd_addr_gray_SB_DFFESR_Q_7_D[1] -.sym 30126 rx_24_fifo.rd_addr_gray[4] -.sym 30130 rx_24_fifo.rd_addr_gray_wr[4] -.sym 30134 rx_24_fifo.rd_addr_gray[0] -.sym 30142 rx_24_fifo.rd_addr_gray[1] -.sym 30232 i_smi_a1_SB_LUT4_I1_O_SB_LUT4_O_I2_SB_LUT4_I0_O[2] -.sym 30233 w_lvds_rx_24_d1_SB_LUT4_I0_O[1] -.sym 30242 rx_09_fifo.wr_addr_gray_rd[4] -.sym 30246 rx_09_fifo.wr_addr_gray_rd[6] -.sym 30250 rx_09_fifo.wr_addr[7] -.sym 30254 rx_09_fifo.wr_addr_gray_rd[7] -.sym 30262 rx_09_fifo.wr_addr_gray_rd[2] -.sym 30270 rx_09_fifo.wr_addr_gray[6] -.sym 30274 rx_09_fifo.wr_addr_gray[5] -.sym 30278 io_pmod_SB_DFFSS_Q_D_SB_LUT4_O_I0_SB_LUT4_O_I0[0] -.sym 30279 io_pmod_SB_DFFSS_Q_D_SB_LUT4_O_I0_SB_LUT4_O_I0[1] -.sym 30280 io_pmod_SB_DFFSS_Q_D_SB_LUT4_O_I0_SB_LUT4_O_I0[2] -.sym 30281 io_pmod_SB_DFFSS_Q_D_SB_LUT4_O_I0_SB_LUT4_O_I0[3] -.sym 30282 rx_09_fifo.wr_addr_gray_rd[5] -.sym 30286 rx_09_fifo.rd_addr_gray_SB_DFFESR_Q_1_D[0] -.sym 30287 rx_09_fifo.rd_addr_gray_SB_DFFESR_Q_1_D[1] -.sym 30288 io_pmod_SB_DFFSS_Q_D_SB_LUT4_O_I0_SB_LUT4_O_I0[3] -.sym 30289 rx_09_fifo.rd_addr_gray_SB_DFFESR_Q_1_D[3] -.sym 30290 rx_09_fifo.wr_addr_gray_rd[0] -.sym 30294 rx_09_fifo.wr_addr_gray_rd[1] -.sym 30298 rx_09_fifo.wr_addr_gray[2] -.sym 30302 rx_09_fifo.wr_addr_gray[4] -.sym 30308 rx_09_fifo.rd_addr_gray_SB_LUT4_I2_O[7] -.sym 30309 rx_09_fifo.rd_addr_gray_SB_LUT4_I2_O[6] -.sym 30312 rx_09_fifo.rd_addr[3] -.sym 30313 io_pmod_SB_DFFSS_Q_D_SB_LUT4_O_I0_SB_LUT4_O_2_I0[2] -.sym 30315 rx_09_fifo.wr_addr_gray_rd_r[2] -.sym 30316 io_pmod_SB_DFFSS_Q_D_SB_LUT4_O_I0_SB_LUT4_O_3_I2[3] -.sym 30317 rx_09_fifo.rd_addr[3] -.sym 30318 rx_09_fifo.wr_addr_gray_SB_DFFESR_Q_7_D[3] -.sym 30324 rx_09_fifo.full_o_SB_LUT4_I3_O[1] -.sym 30325 rx_09_fifo.full_o_SB_LUT4_I3_O[2] -.sym 30327 io_pmod_SB_DFFSS_Q_D_SB_LUT4_O_I0_SB_LUT4_O_I0[0] -.sym 30328 rx_09_fifo.rd_addr_gray_SB_LUT4_I2_O[7] -.sym 30329 w_rx_09_fifo_pull -.sym 30330 smi_ctrl_ins.r_fifo_09_pull_SB_LUT4_I2_O[0] -.sym 30331 rx_09_fifo.wr_addr_gray_rd_r[3] -.sym 30332 smi_ctrl_ins.r_fifo_09_pull_SB_LUT4_I2_O[2] -.sym 30333 smi_ctrl_ins.r_fifo_09_pull_SB_LUT4_I2_O[3] -.sym 30334 rx_09_fifo.wr_addr_gray_SB_DFFESR_Q_7_D[1] -.sym 30338 rx_09_fifo.wr_addr_gray[0] -.sym 30342 io_pmod_SB_DFFSS_Q_D_SB_LUT4_O_I0_SB_LUT4_O_I0[0] -.sym 30343 io_pmod_SB_DFFSS_Q_D_SB_LUT4_O_I0_SB_LUT4_O_I0[1] -.sym 30344 w_rx_09_fifo_pull -.sym 30345 io_pmod[2]$SB_IO_IN -.sym 30346 rx_09_fifo.wr_addr_gray[1] -.sym 30350 rx_09_fifo.full_o_SB_LUT4_I3_O_SB_LUT4_I3_O[0] -.sym 30351 rx_09_fifo.full_o_SB_LUT4_I3_O_SB_LUT4_I3_O[1] -.sym 30352 rx_09_fifo.full_o_SB_LUT4_I3_O_SB_LUT4_I3_O[2] -.sym 30353 rx_09_fifo.full_o_SB_LUT4_I3_O_SB_LUT4_I3_O[3] -.sym 30354 rx_09_fifo.full_o_SB_LUT4_I3_O[0] -.sym 30355 rx_09_fifo.full_o_SB_LUT4_I3_O[1] -.sym 30356 rx_09_fifo.full_o_SB_LUT4_I3_O[2] -.sym 30357 rx_09_fifo.full_o_SB_LUT4_I3_O[3] -.sym 30358 rx_09_fifo.rd_addr_gray_wr_r[0] -.sym 30359 rx_09_fifo.wr_addr_gray_SB_DFFESR_Q_7_D[1] -.sym 30360 rx_09_fifo.full_o_SB_DFFSR_Q_D_SB_LUT4_O_I1_SB_LUT4_O_I0_SB_LUT4_O_1_I3[0] -.sym 30361 rx_09_fifo.wr_addr_gray_SB_DFFESR_Q_7_D[3] -.sym 30362 rx_09_fifo.wr_addr_gray[3] -.sym 30368 rx_09_fifo.wr_addr_gray_SB_LUT4_I2_1_O[1] -.sym 30369 rx_09_fifo.full_o_SB_LUT4_I3_O[1] -.sym 30372 rx_09_fifo.wr_addr[0] -.sym 30373 rx_09_fifo.wr_addr_gray_SB_LUT4_I2_1_O[1] -.sym 30374 r_tx_data[7] -.sym 30378 r_tx_data[3] -.sym 30382 r_tx_data[1] -.sym 30390 r_tx_data[2] -.sym 30398 r_tx_data[5] -.sym 30423 smi_ctrl_ins.int_cnt_09[3] -.sym 30424 i_smi_soe_se$rename$0 -.sym 30425 smi_ctrl_ins.r_fifo_24_pull_SB_LUT4_I1_O[2] -.sym 30427 i_smi_soe_se$rename$0 -.sym 30428 smi_ctrl_ins.r_fifo_24_pull_SB_LUT4_I1_O[2] -.sym 30429 smi_ctrl_ins.int_cnt_09_SB_DFFESR_Q_D_SB_LUT4_O_I3[1] -.sym 30431 smi_ctrl_ins.int_cnt_09_SB_DFFESR_Q_D_SB_LUT4_O_I3[2] -.sym 30432 i_smi_soe_se$rename$0 -.sym 30433 smi_ctrl_ins.r_fifo_24_pull_SB_LUT4_I1_O[2] -.sym 30450 spi_if_ins.spi.r3_rx_done_SB_LUT4_I2_O -.sym 30472 spi_if_ins.w_rx_data[5] -.sym 30473 spi_if_ins.w_rx_data[6] -.sym 30475 w_tx_data_smi[2] -.sym 30476 spi_if_ins.o_cs_SB_LUT4_I2_1_O[1] -.sym 30477 spi_if_ins.o_cs_SB_LUT4_I2_2_O[2] -.sym 30484 spi_if_ins.w_rx_data[5] -.sym 30485 spi_if_ins.w_rx_data[6] -.sym 30488 spi_if_ins.w_rx_data[6] -.sym 30489 spi_if_ins.w_rx_data[5] -.sym 30498 w_cs[1] -.sym 30499 w_cs[2] -.sym 30500 w_cs[3] -.sym 30501 w_cs[0] -.sym 30502 w_cs[0] -.sym 30503 w_cs[1] -.sym 30504 w_cs[3] -.sym 30505 w_cs[2] -.sym 30506 spi_if_ins.r_tx_data_valid_SB_DFFESR_Q_D[1] -.sym 30510 w_cs[0] -.sym 30511 w_cs[1] -.sym 30512 w_cs[2] -.sym 30513 w_cs[3] -.sym 30514 w_cs[0] -.sym 30515 w_cs[2] -.sym 30516 w_cs[3] -.sym 30517 w_cs[1] -.sym 30518 w_cs[0] -.sym 30519 w_cs[1] -.sym 30520 w_cs[2] -.sym 30521 w_cs[3] -.sym 30524 spi_if_ins.w_rx_data[5] -.sym 30525 spi_if_ins.w_rx_data[6] -.sym 30530 spi_if_ins.o_cs_SB_DFFESR_Q_R[0] -.sym 30536 spi_if_ins.o_fetch_cmd_SB_LUT4_I3_1_O[0] -.sym 30537 spi_if_ins.o_fetch_cmd_SB_LUT4_I3_1_O[1] -.sym 30538 i_smi_a1_SB_LUT4_I1_O_SB_LUT4_O_I2_SB_LUT4_I0_O[2] -.sym 30539 w_ioc[1] -.sym 30540 w_cs[2] -.sym 30541 w_fetch -.sym 30543 spi_if_ins.o_fetch_cmd_SB_LUT4_I3_1_O[0] -.sym 30544 w_cs[0] -.sym 30545 w_fetch -.sym 30554 spi_if_ins.w_rx_data[4] -.sym 30558 spi_if_ins.w_rx_data[3] -.sym 30562 w_ioc[1] -.sym 30563 w_ioc[4] -.sym 30564 w_ioc[3] -.sym 30565 w_ioc[2] -.sym 30566 spi_if_ins.w_rx_data[1] -.sym 30570 spi_if_ins.w_rx_data[2] -.sym 30576 io_ctrl_ins.i_cs_SB_LUT4_I3_O[0] +.sym 29381 i_smi_a1_SB_LUT4_I1_O_SB_LUT4_O_I0[3] +.sym 29382 i_smi_a2_SB_LUT4_I1_O_SB_LUT4_I3_1_I2[2] +.sym 29383 smi_ctrl_ins.o_smi_data_out_SB_DFFE_Q_1_D_SB_LUT4_O_I1_SB_LUT4_O_1_I1[1] +.sym 29384 smi_ctrl_ins.o_smi_data_out_SB_DFFE_Q_1_D_SB_LUT4_O_I1_SB_LUT4_O_1_I1[2] +.sym 29385 smi_ctrl_ins.o_smi_data_out_SB_DFFE_Q_1_D_SB_LUT4_O_I1_SB_LUT4_O_1_I1[3] +.sym 29387 i_smi_soe_se$rename$0 +.sym 29388 i_smi_a1_SB_LUT4_I1_O_SB_LUT4_O_I0[3] +.sym 29389 i_smi_a2_SB_LUT4_I1_O_SB_LUT4_I3_1_I2[1] +.sym 29390 i_smi_a2_SB_LUT4_I1_O_SB_LUT4_I3_1_I2[2] +.sym 29391 smi_ctrl_ins.o_smi_data_out_SB_DFFE_Q_3_D_SB_LUT4_O_I1_SB_LUT4_O_1_I1[1] +.sym 29392 smi_ctrl_ins.o_smi_data_out_SB_DFFE_Q_3_D_SB_LUT4_O_I1_SB_LUT4_O_1_I1[2] +.sym 29393 smi_ctrl_ins.o_smi_data_out_SB_DFFE_Q_1_D_SB_LUT4_O_I1_SB_LUT4_O_1_I1[3] +.sym 29394 i_smi_a2_SB_LUT4_I1_O_SB_LUT4_I3_1_I2[2] +.sym 29395 smi_ctrl_ins.o_smi_data_out_SB_DFFE_Q_D_SB_LUT4_O_I1_SB_LUT4_O_1_I1[1] +.sym 29396 smi_ctrl_ins.o_smi_data_out_SB_DFFE_Q_D_SB_LUT4_O_I1_SB_LUT4_O_1_I1[2] +.sym 29397 smi_ctrl_ins.o_smi_data_out_SB_DFFE_Q_1_D_SB_LUT4_O_I1_SB_LUT4_O_1_I1[3] +.sym 29398 i_smi_a2_SB_LUT4_I1_O_SB_LUT4_I3_1_I2[2] +.sym 29399 smi_ctrl_ins.o_smi_data_out_SB_DFFE_Q_D_SB_LUT4_O_I1_SB_LUT4_O_1_I3[1] +.sym 29400 smi_ctrl_ins.o_smi_data_out_SB_DFFE_Q_D_SB_LUT4_O_I1_SB_LUT4_O_1_I3[2] +.sym 29401 smi_ctrl_ins.o_smi_data_out_SB_DFFE_Q_1_D_SB_LUT4_O_I1_SB_LUT4_O_1_I1[3] +.sym 29402 i_smi_a2_SB_LUT4_I1_O_SB_LUT4_I3_1_I2[2] +.sym 29403 smi_ctrl_ins.o_smi_data_out_SB_DFFE_Q_4_D_SB_LUT4_O_I1_SB_LUT4_O_1_I1[1] +.sym 29404 smi_ctrl_ins.o_smi_data_out_SB_DFFE_Q_4_D_SB_LUT4_O_I1_SB_LUT4_O_1_I1[2] +.sym 29405 smi_ctrl_ins.o_smi_data_out_SB_DFFE_Q_1_D_SB_LUT4_O_I1_SB_LUT4_O_1_I1[3] +.sym 29406 i_smi_a2_SB_LUT4_I1_O_SB_LUT4_I3_1_I2[2] +.sym 29407 smi_ctrl_ins.o_smi_data_out_SB_DFFE_Q_6_D_SB_LUT4_O_I1_SB_LUT4_O_1_I1[1] +.sym 29408 smi_ctrl_ins.o_smi_data_out_SB_DFFE_Q_6_D_SB_LUT4_O_I1_SB_LUT4_O_1_I1[2] +.sym 29409 smi_ctrl_ins.o_smi_data_out_SB_DFFE_Q_1_D_SB_LUT4_O_I1_SB_LUT4_O_1_I1[3] +.sym 29414 w_rx_24_fifo_pulled_data[30] +.sym 29415 w_rx_24_fifo_pulled_data[22] +.sym 29416 i_smi_a2_SB_LUT4_I1_O_SB_LUT4_I3_1_I2_SB_LUT4_O_I3[1] +.sym 29417 i_smi_a2_SB_LUT4_I1_O_SB_LUT4_I3_1_I2[1] +.sym 29418 w_rx_09_fifo_full +.sym 29423 w_rx_24_fifo_pulled_data[0] +.sym 29424 i_smi_a2_SB_LUT4_I1_O_SB_LUT4_I3_1_I2[2] +.sym 29425 i_smi_a1_SB_LUT4_I1_O_SB_LUT4_I3_O[3] +.sym 29426 i_smi_a2_SB_LUT4_I1_O_SB_LUT4_I3_1_I2[2] +.sym 29427 smi_ctrl_ins.o_smi_data_out_SB_DFFE_Q_2_D_SB_LUT4_O_I1_SB_LUT4_O_1_I1[1] +.sym 29428 smi_ctrl_ins.o_smi_data_out_SB_DFFE_Q_2_D_SB_LUT4_O_I1_SB_LUT4_O_1_I1[2] +.sym 29429 smi_ctrl_ins.o_smi_data_out_SB_DFFE_Q_1_D_SB_LUT4_O_I1_SB_LUT4_O_1_I1[3] +.sym 29430 w_rx_24_fifo_empty +.sym 29435 smi_ctrl_ins.int_cnt_24[4] +.sym 29436 $PACKER_VCC_NET +.sym 29437 i_smi_a2_SB_LUT4_I1_O_SB_LUT4_I3_1_I2_SB_LUT4_O_I3[1] +.sym 29443 rx_24_fifo.empty_o_SB_LUT4_I3_I2[1] +.sym 29448 rx_24_fifo.rd_addr[1] +.sym 29449 rx_24_fifo.empty_o_SB_LUT4_I3_I2[1] +.sym 29452 rx_24_fifo.empty_o_SB_DFFSS_Q_D_SB_LUT4_O_I0_SB_LUT4_O_2_I3_SB_LUT4_O_I0[1] +.sym 29453 rx_24_fifo.rd_addr_gray_SB_LUT4_I2_I3[2] +.sym 29456 rx_24_fifo.empty_o_SB_DFFSS_Q_D_SB_LUT4_O_I0_SB_LUT4_O_2_I3[1] +.sym 29457 rx_24_fifo.rd_addr_gray_SB_LUT4_I2_I3[3] +.sym 29460 rx_24_fifo.empty_o_SB_DFFSS_Q_D_SB_LUT4_O_I0_SB_LUT4_O_2_I3[2] +.sym 29461 rx_24_fifo.rd_addr_gray_SB_LUT4_I2_I3[4] +.sym 29464 rx_24_fifo.empty_o_SB_DFFSS_Q_D_SB_LUT4_O_I0_SB_LUT4_O_I0_SB_LUT4_O_I0[3] +.sym 29465 rx_24_fifo.rd_addr_gray_SB_LUT4_I2_I3[5] +.sym 29468 rx_24_fifo.empty_o_SB_DFFSS_Q_D_SB_LUT4_O_I0_SB_LUT4_O_I0_SB_LUT4_O_I0[2] +.sym 29469 rx_24_fifo.rd_addr_gray_SB_LUT4_I2_I3[6] +.sym 29472 rx_24_fifo.empty_o_SB_DFFSS_Q_D_SB_LUT4_O_I0_SB_LUT4_O_I0[3] +.sym 29473 rx_24_fifo.rd_addr_gray_SB_LUT4_I2_I3[7] +.sym 29474 rx_24_fifo.rd_addr_gray_SB_LUT4_I2_O[4] +.sym 29478 rx_24_fifo.rd_addr_gray_SB_LUT4_I2_O[1] +.sym 29482 rx_24_fifo.empty_o_SB_DFFSS_Q_D_SB_LUT4_O_I0_SB_LUT4_O_2_I3[0] +.sym 29483 rx_24_fifo.rd_addr_gray_SB_LUT4_I2_O[3] +.sym 29484 rx_24_fifo.rd_addr_gray_SB_LUT4_I2_O[4] +.sym 29485 smi_ctrl_ins.r_fifo_24_pull_SB_LUT4_I3_O[3] +.sym 29488 rx_24_fifo.empty_o_SB_LUT4_I3_I2[1] +.sym 29489 rx_24_fifo.rd_addr_gray_SB_LUT4_I2_O[1] +.sym 29490 rx_24_fifo.rd_addr_gray_SB_LUT4_I2_O[6] +.sym 29494 rx_24_fifo.rd_addr_gray_SB_LUT4_I2_O[3] +.sym 29498 w_rx_24_fifo_pull +.sym 29499 rx_24_fifo.empty_o_SB_LUT4_I3_I2[1] +.sym 29500 rx_24_fifo.empty_o_SB_LUT4_I3_I2[2] +.sym 29501 w_rx_24_fifo_empty +.sym 29502 rx_24_fifo.rd_addr_gray_SB_LUT4_I2_O[5] +.sym 29506 rx_24_fifo.rd_addr_gray_SB_DFFESR_Q_3_D[0] +.sym 29507 rx_24_fifo.rd_addr_gray_SB_DFFESR_Q_3_D[1] +.sym 29508 rx_24_fifo.empty_o_SB_DFFSS_Q_D_SB_LUT4_O_I0_SB_LUT4_O_I0_SB_LUT4_O_I0[1] +.sym 29509 rx_24_fifo.rd_addr_gray_SB_DFFESR_Q_3_D[3] +.sym 29510 rx_24_fifo.rd_addr_gray_SB_DFFESR_Q_5_D[0] +.sym 29511 rx_24_fifo.rd_addr_gray_SB_DFFESR_Q_5_D[1] +.sym 29512 rx_24_fifo.empty_o_SB_DFFSS_Q_D_SB_LUT4_O_I0_SB_LUT4_O_2_I3_SB_LUT4_O_I0[2] +.sym 29513 rx_24_fifo.rd_addr_gray_SB_DFFESR_Q_5_D[3] +.sym 29516 spi_if_ins.w_rx_data[5] +.sym 29517 spi_if_ins.w_rx_data[6] +.sym 29518 rx_24_fifo.rd_addr_gray_SB_DFFESR_Q_7_D[0] +.sym 29519 rx_24_fifo.rd_addr_gray_SB_DFFESR_Q_7_D[1] +.sym 29520 rx_24_fifo.rd_addr_gray_SB_DFFESR_Q_7_D[2] +.sym 29521 rx_24_fifo.rd_addr_gray_SB_DFFESR_Q_7_D[3] +.sym 29524 spi_if_ins.w_rx_data[6] +.sym 29525 spi_if_ins.w_rx_data[5] +.sym 29528 rx_24_fifo.rd_addr_gray_SB_DFFESR_Q_7_D[0] +.sym 29529 rx_24_fifo.rd_addr[1] +.sym 29530 smi_ctrl_ins.r_fifo_24_pull_SB_LUT4_I3_O_SB_LUT4_I3_O[0] +.sym 29531 smi_ctrl_ins.r_fifo_24_pull_SB_LUT4_I3_O_SB_LUT4_I3_O[1] +.sym 29532 smi_ctrl_ins.r_fifo_24_pull_SB_LUT4_I3_O_SB_LUT4_I3_O[2] +.sym 29533 smi_ctrl_ins.r_fifo_24_pull_SB_LUT4_I3_O_SB_LUT4_I3_O[3] +.sym 29536 spi_if_ins.w_rx_data[5] +.sym 29537 spi_if_ins.w_rx_data[6] +.sym 29546 io_pmod[2]$SB_IO_IN +.sym 29550 w_rx_24_fifo_full +.sym 29578 w_tx_data_sys[0] +.sym 29579 spi_if_ins.o_cs_SB_LUT4_I2_2_O[1] +.sym 29580 spi_if_ins.o_cs_SB_LUT4_I2_2_O[2] +.sym 29581 spi_if_ins.o_cs_SB_LUT4_I2_2_O[3] +.sym 29585 spi_if_ins.o_cs_SB_LUT4_I3_1_O +.sym 29606 rx_24_fifo.rd_addr_gray[3] +.sym 29610 rx_24_fifo.rd_addr_gray[4] +.sym 29614 rx_24_fifo.rd_addr_gray_wr[2] +.sym 29622 rx_24_fifo.rd_addr_gray[6] +.sym 29626 rx_24_fifo.rd_addr_gray[1] +.sym 29634 rx_24_fifo.rd_addr_gray[2] +.sym 29666 rx_24_fifo.rd_addr_gray_SB_DFFESR_Q_7_D[1] +.sym 29698 rx_24_fifo.rd_addr_gray[0] +.sym 29732 lvds_rx_09_inst.r_state_if_SB_LUT4_I2_O[0] +.sym 29733 lvds_rx_09_inst.o_fifo_data[19] +.sym 29736 lvds_rx_09_inst.r_state_if_SB_LUT4_I2_O[0] +.sym 29737 lvds_rx_09_inst.o_fifo_data[25] +.sym 29740 lvds_rx_09_inst.r_state_if_SB_LUT4_I2_O[0] +.sym 29741 lvds_rx_09_inst.o_fifo_data[17] +.sym 29744 lvds_rx_09_inst.r_state_if_SB_LUT4_I2_O[0] +.sym 29745 lvds_rx_09_inst.o_fifo_data[23] +.sym 29748 lvds_rx_09_inst.r_state_if_SB_LUT4_I2_O[0] +.sym 29749 lvds_rx_09_inst.o_fifo_data[29] +.sym 29752 lvds_rx_09_inst.r_state_if_SB_LUT4_I2_O[0] +.sym 29753 lvds_rx_09_inst.o_fifo_data[21] +.sym 29756 lvds_rx_09_inst.r_state_if_SB_LUT4_I2_O[0] +.sym 29757 lvds_rx_09_inst.o_fifo_data[28] +.sym 29760 lvds_rx_09_inst.r_state_if_SB_LUT4_I2_O[0] +.sym 29761 lvds_rx_09_inst.o_fifo_data[27] +.sym 29762 rx_09_fifo.rd_addr_gray_SB_LUT4_I2_O[6] +.sym 29768 rx_09_fifo.rd_addr_gray_SB_LUT4_I2_O[5] +.sym 29769 rx_09_fifo.rd_addr_gray_SB_LUT4_I2_O[6] +.sym 29772 rx_09_fifo.rd_addr[2] +.sym 29773 rx_09_fifo.rd_addr[3] +.sym 29776 i_smi_a1_SB_LUT4_I1_O[3] +.sym 29777 w_rx_09_fifo_pull +.sym 29778 rx_09_fifo.rd_addr_gray_SB_LUT4_I2_O[5] +.sym 29785 rx_09_fifo.rd_addr[0] +.sym 29788 rx_09_fifo.rd_addr_gray_SB_DFFESR_Q_2_D_SB_LUT4_I3_O_SB_LUT4_O_I1_SB_LUT4_O_1_I0[3] +.sym 29789 rx_09_fifo.rd_addr_gray_SB_DFFESR_Q_2_D_SB_LUT4_I3_O_SB_LUT4_O_I1_SB_LUT4_O_1_I0[2] +.sym 29790 rx_09_fifo.rd_addr_gray_SB_DFFESR_Q_2_D_SB_LUT4_I3_O_SB_LUT4_O_I1_SB_LUT4_O_1_I0[2] +.sym 29794 rx_09_fifo.rd_addr_gray_SB_DFFESR_Q_2_D[1] +.sym 29798 w_rx_09_fifo_pulled_data[8] +.sym 29799 w_rx_09_fifo_pulled_data[24] +.sym 29800 i_smi_a2_SB_LUT4_I1_O_SB_LUT4_I3_I2_SB_LUT4_O_I3[1] +.sym 29801 i_smi_a2_SB_LUT4_I1_O_SB_LUT4_I3_I2[1] +.sym 29812 rx_09_fifo.rd_addr_gray_SB_DFFESR_Q_2_D[0] +.sym 29813 rx_09_fifo.rd_addr_gray_SB_DFFESR_Q_2_D[1] +.sym 29814 w_rx_09_fifo_pulled_data[0] +.sym 29815 w_rx_09_fifo_pulled_data[16] +.sym 29816 i_smi_a2_SB_LUT4_I1_O_SB_LUT4_I3_I2[1] +.sym 29817 i_smi_a2_SB_LUT4_I1_O_SB_LUT4_I3_I2_SB_LUT4_O_I3[1] +.sym 29820 rx_09_fifo.rd_addr[0] +.sym 29821 rx_09_fifo.rd_addr_gray_SB_DFFESR_Q_2_D_SB_LUT4_I3_O_SB_LUT4_O_I1_SB_LUT4_O_1_I0[3] +.sym 29824 rx_09_fifo.rd_addr_gray_SB_DFFESR_Q_2_D[0] +.sym 29825 rx_09_fifo.rd_addr[5] +.sym 29826 smi_ctrl_ins.o_smi_data_out_SB_DFFE_Q_7_D_SB_LUT4_O_I0[0] +.sym 29827 smi_ctrl_ins.o_smi_data_out_SB_DFFE_Q_7_D_SB_LUT4_O_I0[1] +.sym 29828 smi_ctrl_ins.o_smi_data_out_SB_DFFE_Q_7_D_SB_LUT4_O_I0[2] +.sym 29829 i_smi_a1_SB_LUT4_I1_O_SB_LUT4_I3_O[3] +.sym 29832 i_smi_a3$SB_IO_IN +.sym 29833 w_smi_data_output[7] +.sym 29838 i_smi_a1_SB_LUT4_I1_O_SB_LUT4_I3_O[0] +.sym 29839 i_smi_a1_SB_LUT4_I1_O_SB_LUT4_I3_O[1] +.sym 29840 i_smi_a1_SB_LUT4_I1_O_SB_LUT4_I3_O[2] +.sym 29841 i_smi_a1_SB_LUT4_I1_O_SB_LUT4_I3_O[3] +.sym 29854 i_smi_a2_SB_LUT4_I1_O_SB_LUT4_I3_I2[2] +.sym 29855 smi_ctrl_ins.o_smi_data_out_SB_DFFE_Q_2_D_SB_LUT4_O_I1[1] +.sym 29856 smi_ctrl_ins.o_smi_data_out_SB_DFFE_Q_1_D_SB_LUT4_O_I1[2] +.sym 29857 smi_ctrl_ins.o_smi_data_out_SB_DFFE_Q_2_D_SB_LUT4_O_I1[3] +.sym 29861 smi_ctrl_ins.int_cnt_24[5] +.sym 29863 i_smi_a2_SB_LUT4_I1_O_SB_LUT4_I3_1_I2[2] +.sym 29864 i_smi_soe_se$rename$0 +.sym 29865 i_smi_a1_SB_LUT4_I1_O_SB_LUT4_O_I0[3] +.sym 29869 smi_ctrl_ins.int_cnt_24_SB_DFFESR_Q_E +.sym 29870 w_rx_24_fifo_pull +.sym 29871 i_smi_soe_se$rename$0 +.sym 29872 i_smi_a1_SB_LUT4_I1_O_SB_LUT4_O_I0[3] +.sym 29873 i_smi_a1_SB_LUT4_I1_O[2] +.sym 29875 i_smi_a1_SB_LUT4_I1_O[3] +.sym 29876 smi_ctrl_ins.r_fifo_24_pull_SB_DFFESR_Q_E[1] +.sym 29877 smi_ctrl_ins.r_fifo_24_pull_SB_DFFESR_Q_E[2] +.sym 29881 i_smi_a2_SB_LUT4_I1_O_SB_LUT4_I3_1_I2_SB_LUT4_O_I3[1] +.sym 29882 smi_ctrl_ins.int_cnt_24[4] +.sym 29883 smi_ctrl_ins.int_cnt_24[5] +.sym 29884 i_smi_a2_SB_LUT4_I1_O_SB_LUT4_I3_1_I2_SB_LUT4_O_I3[1] +.sym 29885 w_rx_24_fifo_empty +.sym 29889 smi_ctrl_ins.int_cnt_24[4] +.sym 29892 lvds_rx_24_inst.r_state_if_SB_LUT4_I2_O[0] +.sym 29893 w_rx_24_fifo_data[7] +.sym 29896 lvds_rx_24_inst.r_state_if_SB_LUT4_I2_O[0] +.sym 29897 w_rx_24_fifo_data[10] +.sym 29900 lvds_rx_24_inst.r_state_if_SB_LUT4_I2_O[0] +.sym 29901 w_rx_24_fifo_data[9] +.sym 29904 lvds_rx_24_inst.r_state_if_SB_LUT4_I2_O[0] +.sym 29905 w_rx_24_fifo_data[5] +.sym 29908 lvds_rx_24_inst.r_state_if_SB_LUT4_I2_O[0] +.sym 29909 w_rx_24_fifo_data[8] +.sym 29916 lvds_rx_24_inst.r_state_if_SB_LUT4_I2_O[0] +.sym 29917 w_rx_24_fifo_data[12] +.sym 29920 lvds_rx_24_inst.r_state_if_SB_LUT4_I2_O[0] +.sym 29921 w_rx_24_fifo_data[6] +.sym 29923 i_smi_a2_SB_LUT4_I1_O_SB_LUT4_I3_1_I2_SB_LUT4_O_I3[1] +.sym 29927 smi_ctrl_ins.int_cnt_24[4] +.sym 29928 $PACKER_VCC_NET +.sym 29931 smi_ctrl_ins.int_cnt_24[5] +.sym 29932 $PACKER_VCC_NET +.sym 29933 i_smi_a2_SB_LUT4_I1_O_SB_LUT4_I3_1_I2_SB_LUT4_O_I3[2] +.sym 29942 r_tx_data[0] +.sym 29956 i_smi_a1_SB_LUT4_I1_O[3] +.sym 29957 w_rx_24_fifo_pull +.sym 29974 spi_if_ins.state_if_SB_DFFESR_Q_D[0] +.sym 29986 spi_if_ins.state_if_SB_DFFE_Q_D[0] +.sym 29992 rx_24_fifo.rd_addr_gray_SB_LUT4_I2_O[1] +.sym 29993 rx_24_fifo.rd_addr_gray_SB_LUT4_I2_O[2] +.sym 29996 rx_24_fifo.rd_addr_gray_SB_LUT4_I2_O[2] +.sym 29997 rx_24_fifo.rd_addr_gray_SB_LUT4_I2_O[3] +.sym 29999 rx_24_fifo.empty_o_SB_DFFSS_Q_D_SB_LUT4_O_I0_SB_LUT4_O_I0[1] +.sym 30000 rx_24_fifo.rd_addr_gray_SB_LUT4_I2_O[7] +.sym 30001 w_rx_24_fifo_pull +.sym 30004 rx_24_fifo.rd_addr_gray_SB_LUT4_I2_O[4] +.sym 30005 rx_24_fifo.rd_addr_gray_SB_LUT4_I2_O[5] +.sym 30008 rx_24_fifo.rd_addr_gray_SB_LUT4_I2_O[7] +.sym 30009 rx_24_fifo.rd_addr_gray_SB_LUT4_I2_O[6] +.sym 30016 rx_24_fifo.rd_addr_gray_SB_LUT4_I2_O[5] +.sym 30017 rx_24_fifo.rd_addr_gray_SB_LUT4_I2_O[6] +.sym 30020 spi_if_ins.w_rx_data[5] +.sym 30021 spi_if_ins.w_rx_data[6] +.sym 30024 spi_if_ins.o_cs_SB_LUT4_I2_O[2] +.sym 30025 w_tx_data_io[4] +.sym 30027 w_fetch +.sym 30028 w_load +.sym 30029 w_cs[1] +.sym 30034 w_tx_data_smi[1] +.sym 30035 smi_ctrl_ins.o_data_out_SB_LUT4_I2_I3[0] +.sym 30036 spi_if_ins.o_cs_SB_LUT4_I2_O[2] +.sym 30037 w_tx_data_io[1] +.sym 30040 spi_if_ins.o_cs_SB_LUT4_I2_O[2] +.sym 30041 w_tx_data_io[6] +.sym 30043 smi_ctrl_ins.o_data_out_SB_LUT4_I2_I3[0] +.sym 30044 w_tx_data_smi[2] +.sym 30045 smi_ctrl_ins.o_data_out_SB_LUT4_I2_I3[2] +.sym 30046 w_tx_data_smi[3] +.sym 30047 smi_ctrl_ins.o_data_out_SB_LUT4_I2_I3[0] +.sym 30048 spi_if_ins.o_cs_SB_LUT4_I2_O[2] +.sym 30049 w_tx_data_io[3] +.sym 30050 w_cs[0] +.sym 30051 w_cs[1] +.sym 30052 w_cs[2] +.sym 30053 w_cs[3] +.sym 30054 w_cs[0] +.sym 30055 w_cs[2] +.sym 30056 w_cs[3] +.sym 30057 w_cs[1] +.sym 30059 w_tx_data_io[2] +.sym 30060 spi_if_ins.o_cs_SB_LUT4_I2_O[2] +.sym 30061 spi_if_ins.o_cs_SB_LUT4_I2_2_O[2] +.sym 30062 w_cs[0] +.sym 30063 w_cs[1] +.sym 30064 w_cs[2] +.sym 30065 w_cs[3] +.sym 30066 w_cs[1] +.sym 30067 w_cs[2] +.sym 30068 w_cs[3] +.sym 30069 w_cs[0] +.sym 30070 w_cs[0] +.sym 30071 w_cs[1] +.sym 30072 w_cs[3] +.sym 30073 w_cs[2] +.sym 30078 spi_if_ins.o_cs_SB_DFFESR_Q_R[0] +.sym 30087 spi_if_ins.o_cs_SB_LUT4_I2_O[2] +.sym 30088 w_tx_data_io[5] +.sym 30089 spi_if_ins.o_cs_SB_LUT4_I2_2_O[2] +.sym 30091 spi_if_ins.o_cs_SB_LUT4_I2_O[2] +.sym 30092 w_tx_data_io[7] +.sym 30093 spi_if_ins.o_cs_SB_LUT4_I2_2_O[2] +.sym 30094 w_tx_data_smi[0] +.sym 30095 smi_ctrl_ins.o_data_out_SB_LUT4_I2_I3[0] +.sym 30096 spi_if_ins.o_cs_SB_LUT4_I2_O[2] +.sym 30097 w_tx_data_io[0] +.sym 30118 rx_24_fifo.rd_addr_gray_SB_DFFESR_Q_5_D[0] +.sym 30124 rx_24_fifo.rd_addr_gray_SB_LUT4_I2_O[3] +.sym 30125 rx_24_fifo.rd_addr_gray_SB_LUT4_I2_O[4] +.sym 30126 rx_24_fifo.rd_addr_gray_SB_DFFESR_Q_5_D[3] +.sym 30130 rx_24_fifo.rd_addr_gray_SB_DFFESR_Q_3_D[1] +.sym 30134 rx_24_fifo.rd_addr_gray_SB_DFFESR_Q_3_D[3] +.sym 30142 rx_24_fifo.rd_addr_gray_SB_DFFESR_Q_7_D[2] +.sym 30159 i_smi_a1$SB_IO_IN +.sym 30160 i_smi_a3$SB_IO_IN +.sym 30161 i_smi_a2$SB_IO_IN +.sym 30167 i_smi_a2$SB_IO_IN +.sym 30168 i_smi_a1$SB_IO_IN +.sym 30169 i_smi_a3$SB_IO_IN +.sym 30236 i_smi_a1_SB_LUT4_I1_O[3] +.sym 30237 w_lvds_rx_24_d1_SB_LUT4_I0_O[0] +.sym 30244 lvds_rx_09_inst.r_state_if_SB_LUT4_I2_O[0] +.sym 30245 lvds_rx_09_inst.o_fifo_data[24] +.sym 30248 lvds_rx_09_inst.r_state_if_SB_LUT4_I2_O[0] +.sym 30249 lvds_rx_09_inst.o_fifo_data[16] +.sym 30252 lvds_rx_09_inst.r_state_if_SB_LUT4_I2_O[0] +.sym 30253 lvds_rx_09_inst.o_fifo_data[22] +.sym 30256 lvds_rx_09_inst.r_state_if_SB_LUT4_I2_O[0] +.sym 30257 lvds_rx_09_inst.o_fifo_data[20] +.sym 30264 lvds_rx_09_inst.r_state_if_SB_LUT4_I2_O[0] +.sym 30265 lvds_rx_09_inst.o_fifo_data[26] +.sym 30272 lvds_rx_09_inst.r_state_if_SB_LUT4_I2_O[0] +.sym 30273 lvds_rx_09_inst.o_fifo_data[18] +.sym 30284 lvds_rx_09_inst.r_state_if_SB_LUT4_I2_O[0] +.sym 30285 lvds_rx_09_inst.o_fifo_data[15] +.sym 30292 lvds_rx_09_inst.r_state_if_SB_LUT4_I2_O[0] +.sym 30293 lvds_rx_09_inst.o_fifo_data[13] +.sym 30296 lvds_rx_09_inst.r_state_if_SB_LUT4_I2_O[0] +.sym 30297 lvds_rx_09_inst.o_fifo_data[14] +.sym 30304 lvds_rx_09_inst.r_state_if_SB_LUT4_I2_O[0] +.sym 30305 lvds_rx_09_inst.o_fifo_data[12] +.sym 30308 lvds_rx_09_inst.r_state_if_SB_LUT4_I2_O[0] +.sym 30309 lvds_rx_09_inst.o_fifo_data[9] +.sym 30312 lvds_rx_09_inst.r_state_if_SB_LUT4_I2_O[0] +.sym 30313 lvds_rx_09_inst.o_fifo_data[6] +.sym 30316 lvds_rx_09_inst.r_state_if_SB_LUT4_I2_O[0] +.sym 30317 lvds_rx_09_inst.o_fifo_data[7] +.sym 30320 lvds_rx_09_inst.r_state_if_SB_LUT4_I2_O[0] +.sym 30321 lvds_rx_09_inst.o_fifo_data[10] +.sym 30324 lvds_rx_09_inst.r_state_if_SB_LUT4_I2_O[0] +.sym 30325 io_pmod[6]$SB_IO_IN +.sym 30328 lvds_rx_09_inst.r_state_if_SB_LUT4_I2_O[0] +.sym 30329 lvds_rx_09_inst.o_fifo_data[8] +.sym 30330 i_smi_a2_SB_LUT4_I1_O_SB_LUT4_O_I0[2] +.sym 30331 w_rx_09_fifo_pull +.sym 30332 i_smi_soe_se$rename$0 +.sym 30333 i_smi_a1_SB_LUT4_I1_O_SB_LUT4_O_I0[3] +.sym 30336 lvds_rx_09_inst.r_state_if_SB_LUT4_I2_O[0] +.sym 30337 lvds_rx_09_inst.o_fifo_data[11] +.sym 30339 i_smi_a1_SB_LUT4_I1_O_SB_LUT4_O_I2_SB_CARRY_CO_I1[4] +.sym 30344 i_smi_a1_SB_LUT4_I1_O_SB_LUT4_O_I2_SB_CARRY_CO_I1[5] +.sym 30349 $nextpnr_ICESTORM_LC_20$I3 +.sym 30354 i_smi_a1_SB_LUT4_I1_O_SB_LUT4_O_I0[2] +.sym 30355 smi_ctrl_ins.r_fifo_24_pull_SB_DFFESR_Q_E_SB_LUT4_O_I1[5] +.sym 30356 i_smi_soe_se$rename$0 +.sym 30357 i_smi_a1_SB_LUT4_I1_O_SB_LUT4_O_I0[3] +.sym 30363 i_smi_a1_SB_LUT4_I1_O_SB_LUT4_I0_O[0] +.sym 30364 i_smi_a1_SB_LUT4_I1_O[0] +.sym 30365 i_smi_a1_SB_LUT4_I1_O[3] +.sym 30371 i_smi_a1_SB_LUT4_I1_O_SB_LUT4_O_I2[3] +.sym 30376 i_smi_a1_SB_LUT4_I1_O_SB_LUT4_O_I2_SB_CARRY_CO_I1[4] +.sym 30380 i_smi_a1_SB_LUT4_I1_O_SB_LUT4_O_I2_SB_CARRY_CO_I1[5] +.sym 30383 $PACKER_VCC_NET +.sym 30385 $nextpnr_ICESTORM_LC_13$I3 +.sym 30387 i_smi_soe_se$rename$0 +.sym 30388 i_smi_a1_SB_LUT4_I1_O_SB_LUT4_O_I0[3] +.sym 30389 $nextpnr_ICESTORM_LC_13$COUT +.sym 30390 i_smi_a1_SB_LUT4_I1_O[0] +.sym 30391 i_smi_a1_SB_LUT4_I1_O[1] +.sym 30392 i_smi_a1_SB_LUT4_I1_O[2] +.sym 30393 i_smi_a1_SB_LUT4_I1_O[3] +.sym 30394 i_smi_a1_SB_LUT4_I1_O_SB_LUT4_O_I0[0] +.sym 30395 i_smi_soe_se$rename$0 +.sym 30396 i_smi_a1_SB_LUT4_I1_O_SB_LUT4_O_I0[2] +.sym 30397 i_smi_a1_SB_LUT4_I1_O_SB_LUT4_O_I0[3] +.sym 30398 i_smi_a1_SB_LUT4_I1_O[2] +.sym 30399 i_smi_soe_se$rename$0 +.sym 30400 i_smi_a1_SB_LUT4_I1_O_SB_LUT4_O_I0[2] +.sym 30401 i_smi_a1_SB_LUT4_I1_O_SB_LUT4_O_I0[3] +.sym 30402 spi_if_ins.r_tx_byte[7] +.sym 30406 spi_if_ins.r_tx_byte[5] +.sym 30422 spi_if_ins.r_tx_byte[2] +.sym 30426 spi_if_ins.r_tx_byte[1] +.sym 30446 spi_if_ins.r_tx_data_valid_SB_DFFESR_Q_D[1] +.sym 30467 spi_if_ins.state_if[2] +.sym 30468 spi_if_ins.state_if[1] +.sym 30469 spi_if_ins.state_if[0] +.sym 30471 spi_if_ins.state_if[2] +.sym 30472 spi_if_ins.state_if[0] +.sym 30473 spi_if_ins.state_if[1] +.sym 30474 spi_if_ins.state_if[2] +.sym 30475 spi_if_ins.o_ioc_SB_DFFE_Q_E[0] +.sym 30476 spi_if_ins.state_if[0] +.sym 30477 spi_if_ins.state_if[1] +.sym 30478 spi_if_ins.state_if_SB_DFFESR_Q_D[0] +.sym 30479 spi_if_ins.state_if_SB_DFFESR_Q_D[1] +.sym 30480 spi_if_ins.o_ioc_SB_DFFE_Q_E[1] +.sym 30481 spi_if_ins.o_ioc_SB_DFFE_Q_E[0] +.sym 30482 spi_if_ins.state_if_SB_DFFE_Q_D[1] +.sym 30488 spi_if_ins.o_ioc_SB_DFFE_Q_E[0] +.sym 30489 spi_if_ins.r_tx_data_valid_SB_DFFESR_Q_D[1] +.sym 30491 spi_if_ins.state_if[2] +.sym 30492 spi_if_ins.state_if[0] +.sym 30493 spi_if_ins.state_if[1] +.sym 30495 spi_if_ins.o_ioc_SB_DFFE_Q_E[0] +.sym 30496 spi_if_ins.o_ioc_SB_DFFE_Q_E[1] +.sym 30497 spi_if_ins.o_ioc_SB_DFFE_Q_E[2] +.sym 30498 r_tx_data[4] +.sym 30502 spi_if_ins.o_ioc_SB_DFFE_Q_E[0] +.sym 30503 spi_if_ins.state_if[2] +.sym 30504 spi_if_ins.state_if[0] +.sym 30505 spi_if_ins.state_if[1] +.sym 30508 spi_if_ins.state_if[0] +.sym 30509 spi_if_ins.state_if[1] +.sym 30510 r_tx_data[3] +.sym 30515 spi_if_ins.state_if_SB_DFFE_Q_D[0] +.sym 30516 spi_if_ins.state_if_SB_DFFE_Q_D[1] +.sym 30517 spi_if_ins.o_ioc_SB_DFFE_Q_E[0] +.sym 30518 r_tx_data[2] +.sym 30522 r_tx_data[1] +.sym 30526 r_tx_data[6] +.sym 30533 spi_if_ins.o_ioc_SB_DFFE_Q_E[0] +.sym 30545 spi_if_ins.o_fetch_cmd_SB_DFFESR_Q_E +.sym 30551 spi_if_ins.state_if_SB_DFFE_Q_D[0] +.sym 30552 spi_if_ins.state_if[2] +.sym 30553 spi_if_ins.o_ioc_SB_DFFE_Q_E[0] +.sym 30556 spi_if_ins.state_if_SB_DFFE_Q_D[0] +.sym 30557 spi_if_ins.state_if[2] +.sym 30570 i_smi_a1_SB_LUT4_I1_O[3] +.sym 30571 w_ioc[1] +.sym 30572 w_cs[2] +.sym 30573 w_fetch +.sym 30575 io_ctrl_ins.o_data_out_SB_DFFESR_Q_6_R[1] +.sym 30576 w_cs[0] .sym 30577 w_fetch -.sym 30578 io_ctrl_ins.tr_vc_2_state_SB_LUT4_I1_I3[1] -.sym 30579 spi_if_ins.o_fetch_cmd_SB_LUT4_I3_1_O[0] -.sym 30580 i_smi_a1_SB_LUT4_I1_O_SB_LUT4_O_I2_SB_LUT4_I0_O[2] -.sym 30581 w_cs[1] -.sym 30583 w_ioc[2] -.sym 30584 w_ioc[4] -.sym 30585 w_ioc[3] -.sym 30590 spi_if_ins.w_rx_data[0] -.sym 30598 w_ioc[2] -.sym 30599 w_ioc[1] -.sym 30600 w_ioc[0] -.sym 30601 io_ctrl_ins.o_data_out_SB_DFFESR_Q_E[3] -.sym 30606 w_fetch -.sym 30607 w_load -.sym 30608 io_ctrl_ins.pmod_state_SB_DFFE_Q_E_SB_LUT4_O_I3[0] -.sym 30609 w_cs[0] -.sym 30610 $PACKER_VCC_NET -.sym 30617 w_cs[0] -.sym 30619 spi_if_ins.o_fetch_cmd_SB_LUT4_I3_1_O[0] -.sym 30620 w_ioc[0] -.sym 30621 w_ioc[1] -.sym 30623 w_fetch -.sym 30624 w_load -.sym 30625 w_cs[1] -.sym 30635 io_ctrl_ins.o_data_out_SB_DFFESR_Q_6_R[0] -.sym 30636 spi_if_ins.o_load_cmd_SB_LUT4_I2_O[0] -.sym 30637 i_smi_a1_SB_LUT4_I1_O_SB_LUT4_O_I2_SB_LUT4_I0_O[2] -.sym 30638 w_rx_data[1] -.sym 30642 w_rx_data[3] -.sym 30670 w_rx_data[2] -.sym 30682 w_rx_data[1] -.sym 30695 io_ctrl_ins.rf_pin_state[1] -.sym 30696 io_ctrl_ins.debug_mode_SB_LUT4_I2_O[1] -.sym 30697 io_ctrl_ins.debug_mode_SB_LUT4_I2_O[3] -.sym 30701 io_ctrl_ins.led1_state_SB_DFFESR_Q_E -.sym 30706 io_ctrl_ins.debug_mode_SB_LUT4_I2_O[1] -.sym 30707 io_ctrl_ins.rf_mode[2] -.sym 30708 io_ctrl_ins.rf_pin_state[2] -.sym 30709 io_ctrl_ins.debug_mode_SB_LUT4_I2_O[3] -.sym 30721 sys_ctrl_ins.reset_cmd -.sym 30726 $PACKER_GND_NET -.sym 30759 io_pmod_SB_DFFSS_Q_D_SB_LUT4_O_I0_SB_LUT4_O_3_I2[3] -.sym 30760 rx_09_fifo.rd_addr[3] -.sym 30761 rx_09_fifo.wr_addr_gray_rd_r[2] -.sym 30762 io_pmod_SB_DFFSS_Q_D_SB_LUT4_O_I0_SB_LUT4_O_2_I0[0] -.sym 30763 io_pmod_SB_DFFSS_Q_D_SB_LUT4_O_I0_SB_LUT4_O_1_I1_SB_LUT4_O_I0[1] -.sym 30764 io_pmod_SB_DFFSS_Q_D_SB_LUT4_O_I0_SB_LUT4_O_2_I0[2] -.sym 30765 io_pmod_SB_DFFSS_Q_D_SB_LUT4_O_I0_SB_LUT4_O_2_I0[3] -.sym 30766 rx_09_fifo.rd_addr_gray[1] -.sym 30774 rx_09_fifo.rd_addr_gray_wr[1] -.sym 30778 rx_09_fifo.rd_addr_gray_wr[2] -.sym 30786 io_pmod_SB_DFFSS_Q_D_SB_LUT4_O_I0_SB_LUT4_O_I0[2] -.sym 30787 io_pmod_SB_DFFSS_Q_D_SB_LUT4_O_I0_SB_LUT4_O_I2[1] -.sym 30788 io_pmod_SB_DFFSS_Q_D_SB_LUT4_O_I0_SB_LUT4_O_I2[2] -.sym 30789 io_pmod_SB_DFFSS_Q_D_SB_LUT4_O_I0_SB_LUT4_O_I2[3] -.sym 30792 rx_09_fifo.wr_addr_gray_rd_r[5] -.sym 30793 rx_09_fifo.rd_addr_gray_SB_LUT4_I2_O[6] -.sym 30796 rx_09_fifo.wr_addr_gray_rd_r[5] -.sym 30797 io_pmod_SB_DFFSS_Q_D_SB_LUT4_O_I0_SB_LUT4_O_2_I0[3] -.sym 30799 rx_09_fifo.rd_addr[0] -.sym 30800 rx_09_fifo.wr_addr_gray_rd_r[0] -.sym 30801 rx_09_fifo.rd_addr_gray_SB_LUT4_I2_O[1] -.sym 30803 rx_09_fifo.wr_addr_gray_rd_r[2] -.sym 30804 rx_09_fifo.rd_addr_gray_SB_LUT4_I2_O[2] -.sym 30805 rx_09_fifo.rd_addr_gray_SB_LUT4_I2_O[3] -.sym 30806 io_pmod_SB_DFFSS_Q_D_SB_LUT4_O_I0_SB_LUT4_O_1_I1_SB_LUT4_O_I2[1] -.sym 30812 rx_09_fifo.rd_addr_gray_SB_LUT4_I2_O[1] -.sym 30813 rx_09_fifo.rd_addr_gray_SB_LUT4_I2_O[2] -.sym 30814 rx_09_fifo.rd_addr_gray_SB_LUT4_I2_O[3] -.sym 30819 rx_09_fifo.rd_addr[0] -.sym 30824 io_pmod_SB_DFFSS_Q_D_SB_LUT4_O_I0_SB_LUT4_O_3_I2[1] -.sym 30825 rx_09_fifo.rd_addr[0] -.sym 30828 io_pmod_SB_DFFSS_Q_D_SB_LUT4_O_I0_SB_LUT4_O_3_I2[3] -.sym 30829 rx_09_fifo.rd_addr_gray_SB_LUT4_I2_I3[2] -.sym 30832 rx_09_fifo.rd_addr[3] -.sym 30833 rx_09_fifo.rd_addr_gray_SB_LUT4_I2_I3[3] -.sym 30836 io_pmod_SB_DFFSS_Q_D_SB_LUT4_O_I0_SB_LUT4_O_2_I0[2] -.sym 30837 rx_09_fifo.rd_addr_gray_SB_LUT4_I2_I3[4] -.sym 30840 io_pmod_SB_DFFSS_Q_D_SB_LUT4_O_I0_SB_LUT4_O_2_I0[3] -.sym 30841 rx_09_fifo.rd_addr_gray_SB_LUT4_I2_I3[5] -.sym 30844 io_pmod_SB_DFFSS_Q_D_SB_LUT4_O_I0_SB_LUT4_O_I2[1] -.sym 30845 rx_09_fifo.rd_addr_gray_SB_LUT4_I2_I3[6] -.sym 30848 io_pmod_SB_DFFSS_Q_D_SB_LUT4_O_I0_SB_LUT4_O_I0[1] -.sym 30849 rx_09_fifo.rd_addr_gray_SB_LUT4_I2_I3[7] -.sym 30851 spi_if_ins.r_tx_data_valid_SB_LUT4_I3_O_SB_LUT4_O_I0_SB_LUT4_O_I3[2] -.sym 30855 spi_if_ins.r_tx_data_valid_SB_LUT4_I3_O_SB_LUT4_O_I0[3] +.sym 30578 r_tx_data[5] +.sym 30584 io_ctrl_ins.o_data_out_SB_DFFESR_Q_6_R[1] +.sym 30585 spi_if_ins.o_fetch_cmd_SB_LUT4_I3_1_O[1] +.sym 30586 r_tx_data[7] +.sym 30594 w_rx_data[0] +.sym 30598 w_rx_data[5] +.sym 30602 w_rx_data[6] +.sym 30606 w_rx_data[4] +.sym 30610 w_rx_data[7] +.sym 30618 w_rx_data[2] +.sym 30622 w_rx_data[1] +.sym 30636 io_ctrl_ins.led0_state_SB_LUT4_I3_O[1] +.sym 30637 spi_if_ins.o_load_cmd_SB_LUT4_I2_O_SB_LUT4_I3_O[1] +.sym 30638 o_shdn_tx_lna$SB_IO_OUT +.sym 30639 io_ctrl_ins.rx_h_b_state_SB_LUT4_I0_I2[1] +.sym 30640 io_ctrl_ins.led0_state_SB_LUT4_I3_O[1] +.sym 30641 io_ctrl_ins.pmod_dir_state[2] +.sym 30642 io_ctrl_ins.led0_state_SB_LUT4_I3_O[1] +.sym 30652 i_smi_a1_SB_LUT4_I1_O[3] +.sym 30653 spi_if_ins.o_load_cmd_SB_LUT4_I2_O[1] +.sym 30675 i_config_SB_LUT4_I3_I2[0] +.sym 30676 spi_if_ins.o_load_cmd_SB_LUT4_I2_O[1] +.sym 30677 i_smi_a1_SB_LUT4_I1_O[3] +.sym 30682 w_rx_data[3] +.sym 30694 w_rx_data[3] +.sym 30705 spi_if_ins.o_load_cmd_SB_LUT4_I2_O_SB_LUT4_I2_O +.sym 30710 w_rx_data[1] +.sym 30714 w_rx_data[0] +.sym 30718 w_rx_data[2] +.sym 30776 i_smi_a3$SB_IO_IN +.sym 30777 w_smi_data_output[4] +.sym 30787 i_smi_a2_SB_LUT4_I1_O_SB_LUT4_I3_I2[0] +.sym 30792 i_smi_a2_SB_LUT4_I1_O_SB_LUT4_O_I2_SB_CARRY_CO_I1[4] +.sym 30796 i_smi_a2_SB_LUT4_I1_O_SB_LUT4_O_I2_SB_CARRY_CO_I1[5] +.sym 30799 $PACKER_VCC_NET +.sym 30801 $nextpnr_ICESTORM_LC_11$I3 +.sym 30803 i_smi_soe_se$rename$0 +.sym 30804 i_smi_a1_SB_LUT4_I1_O_SB_LUT4_O_I0[3] +.sym 30805 $nextpnr_ICESTORM_LC_11$COUT +.sym 30813 i_smi_a2_SB_LUT4_I1_O_SB_LUT4_I3_I2_SB_LUT4_O_I3[1] +.sym 30818 i_smi_a2_SB_LUT4_I1_O_SB_LUT4_O_I0[2] +.sym 30819 smi_ctrl_ins.r_fifo_09_pull_SB_DFFESR_Q_E_SB_LUT4_O_I1[5] +.sym 30820 i_smi_soe_se$rename$0 +.sym 30821 i_smi_a1_SB_LUT4_I1_O_SB_LUT4_O_I0[3] +.sym 30823 i_smi_a2_SB_LUT4_I1_O_SB_LUT4_I3_I2_SB_LUT4_O_I3[1] +.sym 30824 i_smi_soe_se$rename$0 +.sym 30825 i_smi_a1_SB_LUT4_I1_O_SB_LUT4_O_I0[3] +.sym 30826 i_smi_a1_SB_LUT4_I1_O[0] +.sym 30827 i_smi_a2_SB_LUT4_I1_O[1] +.sym 30828 i_smi_a1_SB_LUT4_I1_O_SB_LUT4_I3_O[3] +.sym 30829 i_smi_a1_SB_LUT4_I1_O[3] +.sym 30831 i_smi_a1_SB_LUT4_I1_O[3] +.sym 30832 smi_ctrl_ins.r_fifo_09_pull_SB_DFFESR_Q_E[1] +.sym 30833 smi_ctrl_ins.r_fifo_09_pull_SB_DFFESR_Q_E[2] +.sym 30834 i_smi_a2_SB_LUT4_I1_O_SB_LUT4_O_I0[0] +.sym 30835 i_smi_soe_se$rename$0 +.sym 30836 i_smi_a2_SB_LUT4_I1_O_SB_LUT4_O_I0[2] +.sym 30837 i_smi_a1_SB_LUT4_I1_O_SB_LUT4_O_I0[3] +.sym 30841 smi_ctrl_ins.int_cnt_09[5] +.sym 30842 smi_ctrl_ins.int_cnt_09[4] +.sym 30843 smi_ctrl_ins.int_cnt_09[5] +.sym 30844 i_smi_a2_SB_LUT4_I1_O_SB_LUT4_I3_I2_SB_LUT4_O_I3[1] +.sym 30845 io_pmod[2]$SB_IO_IN +.sym 30849 smi_ctrl_ins.int_cnt_09[4] +.sym 30851 i_smi_a2_SB_LUT4_I1_O_SB_LUT4_I3_I2_SB_LUT4_O_I3[1] +.sym 30855 smi_ctrl_ins.int_cnt_09[4] .sym 30856 $PACKER_VCC_NET -.sym 30859 spi_if_ins.spi.r_tx_bit_count[2] +.sym 30857 i_smi_a2_SB_LUT4_I1_O_SB_LUT4_I3_I2_SB_LUT4_O_I3[1] +.sym 30859 smi_ctrl_ins.int_cnt_09[5] .sym 30860 $PACKER_VCC_NET -.sym 30861 spi_if_ins.spi.r_tx_bit_count_SB_DFFESR_Q_D_SB_LUT4_O_I3[2] -.sym 30862 spi_if_ins.r_tx_data_valid_SB_LUT4_I3_O_SB_LUT4_O_I0[0] -.sym 30863 spi_if_ins.r_tx_data_valid_SB_LUT4_I3_O_SB_LUT4_O_I0[1] -.sym 30864 spi_if_ins.r_tx_data_valid_SB_LUT4_I3_O_SB_LUT4_O_I0[2] -.sym 30865 spi_if_ins.r_tx_data_valid_SB_LUT4_I3_O_SB_LUT4_O_I0[3] -.sym 30869 spi_if_ins.r_tx_data_valid_SB_LUT4_I3_O_SB_LUT4_O_I0_SB_LUT4_O_I3[2] -.sym 30871 spi_if_ins.r_tx_data_valid_SB_LUT4_I3_O_SB_LUT4_O_I0[3] -.sym 30872 $PACKER_VCC_NET -.sym 30873 spi_if_ins.r_tx_data_valid_SB_LUT4_I3_O_SB_LUT4_O_I0_SB_LUT4_O_I3[2] -.sym 30875 spi_if_ins.r_tx_data_valid_SB_LUT4_I3_O_SB_LUT4_O_I0[3] -.sym 30876 spi_if_ins.spi.SCKr_SB_LUT4_I0_O[1] -.sym 30877 spi_if_ins.r_tx_data_valid_SB_LUT4_I3_O[2] -.sym 30878 spi_if_ins.spi.r_tx_byte[3] -.sym 30879 spi_if_ins.spi.r_tx_byte[7] -.sym 30880 spi_if_ins.spi.r_tx_bit_count[2] -.sym 30881 spi_if_ins.r_tx_data_valid_SB_LUT4_I3_O_SB_LUT4_O_I0_SB_LUT4_O_I3[2] -.sym 30882 spi_if_ins.r_tx_byte[2] -.sym 30886 spi_if_ins.r_tx_byte[1] -.sym 30890 spi_if_ins.r_tx_byte[7] -.sym 30894 spi_if_ins.r_tx_byte[5] -.sym 30898 spi_if_ins.spi.r_tx_byte[1] -.sym 30899 spi_if_ins.spi.r_tx_byte[5] -.sym 30900 spi_if_ins.r_tx_data_valid_SB_LUT4_I3_O_SB_LUT4_O_I0_SB_LUT4_O_I3[2] -.sym 30901 spi_if_ins.spi.r_tx_bit_count[2] -.sym 30902 spi_if_ins.r_tx_byte[0] -.sym 30906 spi_if_ins.r_tx_data_valid_SB_LUT4_I3_O_SB_LUT4_O_I0_SB_LUT4_O_I3[0] -.sym 30907 spi_if_ins.r_tx_data_valid_SB_LUT4_I3_O_SB_LUT4_O_I0_SB_LUT4_O_I3[1] -.sym 30908 spi_if_ins.r_tx_data_valid_SB_LUT4_I3_O_SB_LUT4_O_I0_SB_LUT4_O_I3[2] -.sym 30909 spi_if_ins.r_tx_data_valid_SB_LUT4_I3_O_SB_LUT4_O_I0_SB_LUT4_O_I3[3] -.sym 30910 spi_if_ins.spi.r_tx_byte[2] -.sym 30911 spi_if_ins.spi.r_tx_byte[6] -.sym 30912 spi_if_ins.r_tx_data_valid_SB_LUT4_I3_O_SB_LUT4_O_I0_SB_LUT4_O_I3[2] -.sym 30913 spi_if_ins.spi.r_tx_bit_count[2] -.sym 30915 sys_ctrl_ins.reset_count[0] -.sym 30920 sys_ctrl_ins.reset_count[1] -.sym 30922 sys_ctrl_ins.o_soft_reset_SB_DFFESS_Q_S -.sym 30924 sys_ctrl_ins.reset_count[2] -.sym 30925 sys_ctrl_ins.reset_count_SB_DFFESR_Q_D_SB_LUT4_O_I3[2] -.sym 30926 sys_ctrl_ins.o_soft_reset_SB_DFFESS_Q_S -.sym 30928 sys_ctrl_ins.reset_count[3] -.sym 30929 sys_ctrl_ins.reset_count_SB_DFFESR_Q_D_SB_LUT4_O_I3[3] -.sym 30930 sys_ctrl_ins.o_soft_reset_SB_DFFESS_Q_S -.sym 30932 sys_ctrl_ins.reset_count[1] -.sym 30933 sys_ctrl_ins.reset_count[0] -.sym 30934 sys_ctrl_ins.reset_count[3] -.sym 30935 sys_ctrl_ins.reset_count[1] -.sym 30936 sys_ctrl_ins.reset_count[2] -.sym 30937 sys_ctrl_ins.reset_count[0] -.sym 30941 sys_ctrl_ins.reset_count[0] -.sym 30944 sys_ctrl_ins.o_soft_reset_SB_DFFESS_Q_S -.sym 30945 sys_ctrl_ins.reset_cmd -.sym 30946 spi_if_ins.r_tx_byte[3] -.sym 30954 spi_if_ins.r_tx_byte[6] -.sym 30966 spi_if_ins.r_tx_byte[4] -.sym 30982 spi_if_ins.spi.r_temp_rx_byte[5] -.sym 30992 i_ss$SB_IO_IN -.sym 30993 spi_if_ins.r_tx_data_valid -.sym 31000 w_rx_24_fifo_empty -.sym 31001 io_pmod[2]$SB_IO_IN -.sym 31011 smi_ctrl_ins.o_data_out_SB_LUT4_I1_O[0] -.sym 31012 w_tx_data_io[7] -.sym 31013 spi_if_ins.o_cs_SB_LUT4_I2_2_O[2] -.sym 31014 w_tx_data_smi[1] -.sym 31015 spi_if_ins.o_cs_SB_LUT4_I2_1_O[1] -.sym 31016 smi_ctrl_ins.o_data_out_SB_LUT4_I1_O[0] -.sym 31017 w_tx_data_io[1] -.sym 31020 smi_ctrl_ins.o_data_out_SB_LUT4_I1_O[0] -.sym 31021 w_tx_data_io[4] -.sym 31023 smi_ctrl_ins.o_data_out_SB_LUT4_I1_O[0] -.sym 31024 w_tx_data_io[2] -.sym 31025 smi_ctrl_ins.o_data_out_SB_LUT4_I1_O[2] -.sym 31027 smi_ctrl_ins.o_data_out_SB_LUT4_I1_O[0] -.sym 31028 w_tx_data_io[5] -.sym 31029 spi_if_ins.o_cs_SB_LUT4_I2_2_O[2] -.sym 31033 spi_if_ins.w_rx_data[5] -.sym 31036 smi_ctrl_ins.o_data_out_SB_LUT4_I1_O[0] -.sym 31037 w_tx_data_io[6] -.sym 31038 w_tx_data_smi[3] -.sym 31039 spi_if_ins.o_cs_SB_LUT4_I2_1_O[1] -.sym 31040 smi_ctrl_ins.o_data_out_SB_LUT4_I1_O[0] -.sym 31041 w_tx_data_io[3] -.sym 31042 r_tx_data[4] -.sym 31050 r_tx_data[6] -.sym 31074 w_rx_data[2] -.sym 31078 w_rx_data[1] -.sym 31084 io_ctrl_ins.ldo2v8_state_SB_LUT4_I3_O[1] -.sym 31085 io_ctrl_ins.pmod_state_SB_DFFE_Q_E_SB_LUT4_O_I3[1] -.sym 31086 w_rx_data[6] -.sym 31090 w_rx_data[0] -.sym 31094 w_rx_data[3] -.sym 31098 w_rx_data[4] -.sym 31102 w_rx_data[7] -.sym 31106 w_rx_data[6] -.sym 31111 w_ioc[0] -.sym 31112 spi_if_ins.o_fetch_cmd_SB_LUT4_I3_1_O[0] -.sym 31113 w_ioc[1] -.sym 31116 i_smi_a1_SB_LUT4_I1_O_SB_LUT4_O_I2_SB_LUT4_I0_O[2] -.sym 31117 spi_if_ins.o_load_cmd_SB_LUT4_I2_O[0] -.sym 31118 w_rx_data[4] -.sym 31122 io_ctrl_ins.ldo2v8_state_SB_LUT4_I3_O[1] -.sym 31123 io_ctrl_ins.pmod_dir_state[6] -.sym 31124 io_ctrl_ins.pmod_state_SB_DFFE_Q_E_SB_LUT4_O_I3[0] -.sym 31125 io_ctrl_ins.o_pmod[6] -.sym 31127 w_ioc[1] -.sym 31128 w_ioc[0] -.sym 31129 spi_if_ins.o_fetch_cmd_SB_LUT4_I3_1_O[0] -.sym 31132 w_ioc[0] -.sym 31133 io_ctrl_ins.tr_vc_2_state_SB_LUT4_I1_I3[1] -.sym 31135 w_ioc[1] -.sym 31136 spi_if_ins.o_fetch_cmd_SB_LUT4_I3_1_O[0] -.sym 31137 io_ctrl_ins.tr_vc_2_state_SB_LUT4_I1_I3[1] -.sym 31138 w_rx_data[4] -.sym 31142 w_rx_data[2] -.sym 31148 io_ctrl_ins.tr_vc_2_state_SB_LUT4_I1_I3_SB_LUT4_I2_O[0] -.sym 31149 io_ctrl_ins.pmod_state_SB_DFFE_Q_E_SB_LUT4_O_I3[1] -.sym 31150 io_ctrl_ins.ldo2v8_state_SB_LUT4_I3_O[1] -.sym 31151 io_ctrl_ins.pmod_dir_state[1] -.sym 31152 io_ctrl_ins.pmod_state_SB_DFFE_Q_E_SB_LUT4_O_I3[0] -.sym 31153 io_ctrl_ins.o_pmod[1] -.sym 31154 w_rx_data[0] -.sym 31158 io_ctrl_ins.debug_mode[0] -.sym 31159 io_ctrl_ins.rf_mode[2] -.sym 31160 io_ctrl_ins.debug_mode_SB_LUT4_I2_O[1] -.sym 31161 io_ctrl_ins.debug_mode[1] -.sym 31164 io_ctrl_ins.debug_mode[0] -.sym 31165 io_ctrl_ins.debug_mode[1] -.sym 31168 io_ctrl_ins.pmod_state_SB_DFFE_Q_E_SB_LUT4_O_I3[0] -.sym 31169 io_ctrl_ins.pmod_state_SB_DFFE_Q_E_SB_LUT4_O_I3[1] -.sym 31170 io_ctrl_ins.tr_vc_2_state_SB_LUT4_I1_I3_SB_LUT4_I2_O[0] -.sym 31171 o_shdn_rx_lna$SB_IO_OUT -.sym 31172 io_ctrl_ins.o_data_out_SB_DFFESR_Q_6_R[0] -.sym 31173 io_ctrl_ins.debug_mode[1] -.sym 31178 w_rx_data[2] -.sym 31185 io_ctrl_ins.debug_mode_SB_LUT4_I0_O -.sym 31187 spi_if_ins.o_load_cmd_SB_LUT4_I2_O[0] -.sym 31188 io_ctrl_ins.led1_state_SB_LUT4_I0_I2[1] -.sym 31189 i_smi_a1_SB_LUT4_I1_O_SB_LUT4_O_I2_SB_LUT4_I0_O[2] -.sym 31190 io_ctrl_ins.o_pmod[2] -.sym 31191 o_shdn_tx_lna$SB_IO_OUT -.sym 31192 w_ioc[0] -.sym 31193 io_ctrl_ins.tr_vc_2_state_SB_LUT4_I1_I3[1] -.sym 31194 w_rx_data[1] -.sym 31198 io_ctrl_ins.o_data_out_SB_DFFESR_Q_6_R[0] -.sym 31199 io_ctrl_ins.rf_mode[0] -.sym 31200 io_ctrl_ins.led1_state_SB_LUT4_I0_I2[1] -.sym 31201 o_ldo_2v8_en -.sym 31202 w_rx_data[1] -.sym 31226 w_rx_data[2] -.sym 31230 w_rx_data[0] -.sym 31273 io_smi_data[4]$SB_IO_OUT -.sym 31285 i_smi_a3$SB_IO_IN -.sym 31286 rx_09_fifo.rd_addr_gray[5] -.sym 31292 i_smi_a3$SB_IO_IN -.sym 31293 w_smi_data_output[5] -.sym 31294 rx_09_fifo.rd_addr_gray[0] -.sym 31298 io_pmod_SB_DFFSS_Q_D_SB_LUT4_O_I0[0] -.sym 31299 io_pmod_SB_DFFSS_Q_D_SB_LUT4_O_I0[1] -.sym 31300 io_pmod_SB_DFFSS_Q_D_SB_LUT4_O_I0[2] -.sym 31301 io_pmod_SB_DFFSS_Q_D_SB_LUT4_O_I0[3] -.sym 31303 io_pmod_SB_DFFSS_Q_D_SB_LUT4_O_I0_SB_LUT4_O_1_I1[0] -.sym 31304 io_pmod_SB_DFFSS_Q_D_SB_LUT4_O_I0_SB_LUT4_O_1_I1[1] -.sym 31305 io_pmod_SB_DFFSS_Q_D_SB_LUT4_O_I0_SB_LUT4_O_1_I1[2] -.sym 31306 io_pmod_SB_DFFSS_Q_D_SB_LUT4_O_I0_SB_LUT4_O_1_I1_SB_LUT4_O_I0[0] -.sym 31307 io_pmod_SB_DFFSS_Q_D_SB_LUT4_O_I0_SB_LUT4_O_1_I1_SB_LUT4_O_I0[1] -.sym 31308 io_pmod_SB_DFFSS_Q_D_SB_LUT4_O_I0_SB_LUT4_O_1_I1_SB_LUT4_O_I0[2] -.sym 31309 io_pmod_SB_DFFSS_Q_D_SB_LUT4_O_I0_SB_LUT4_O_1_I1_SB_LUT4_O_I0[3] -.sym 31311 io_pmod_SB_DFFSS_Q_D_SB_LUT4_O_I0_SB_LUT4_O_3_I2[0] -.sym 31312 rx_09_fifo.rd_addr_gray_SB_LUT4_I2_O[1] -.sym 31313 rx_09_fifo.rd_addr_gray_SB_LUT4_I2_O[2] -.sym 31314 io_pmod_SB_DFFSS_Q_D_SB_LUT4_O_I0_SB_LUT4_O_3_I2[0] -.sym 31315 io_pmod_SB_DFFSS_Q_D_SB_LUT4_O_I0_SB_LUT4_O_3_I2[1] -.sym 31316 io_pmod_SB_DFFSS_Q_D_SB_LUT4_O_I0_SB_LUT4_O_3_I2[2] -.sym 31317 io_pmod_SB_DFFSS_Q_D_SB_LUT4_O_I0_SB_LUT4_O_3_I2[3] -.sym 31320 rx_09_fifo.rd_addr[0] -.sym 31321 rx_09_fifo.wr_addr_gray_rd_r[0] -.sym 31326 io_pmod_SB_DFFSS_Q_D_SB_LUT4_O_I0_SB_LUT4_O_1_I1_SB_LUT4_O_I0[0] -.sym 31327 io_pmod_SB_DFFSS_Q_D_SB_LUT4_O_I0_SB_LUT4_O_1_I1_SB_LUT4_O_I2[1] -.sym 31328 io_pmod_SB_DFFSS_Q_D_SB_LUT4_O_I0_SB_LUT4_O_1_I1_SB_LUT4_O_I2[2] -.sym 31329 io_pmod_SB_DFFSS_Q_D_SB_LUT4_O_I0_SB_LUT4_O_1_I1_SB_LUT4_O_I2[3] -.sym 31332 rx_09_fifo.rd_addr[0] -.sym 31333 rx_09_fifo.rd_addr_gray_SB_LUT4_I2_O[1] -.sym 31334 io_pmod_SB_DFFSS_Q_D_SB_LUT4_O_I0_SB_LUT4_O_1_I1_SB_LUT4_O_I0[3] -.sym 31340 rx_09_fifo.wr_addr_gray_rd_r[3] -.sym 31341 rx_09_fifo.rd_addr_gray_SB_LUT4_I2_O[3] -.sym 31345 rx_09_fifo.rd_addr[0] -.sym 31348 io_pmod_SB_DFFSS_Q_D_SB_LUT4_O_I0_SB_LUT4_O_1_I1_SB_LUT4_O_I0[3] -.sym 31349 rx_09_fifo.rd_addr_gray_SB_LUT4_I2_O[6] -.sym 31350 rx_09_fifo.rd_addr_gray_SB_LUT4_I2_O[1] -.sym 31354 rx_09_fifo.rd_addr_gray_SB_LUT4_I2_O[6] -.sym 31358 rx_09_fifo.rd_addr_gray_SB_LUT4_I2_O[2] -.sym 31362 rx_09_fifo.wr_addr_gray_rd[3] -.sym 31366 spi_if_ins.spi.SCKr[2] -.sym 31367 spi_if_ins.r_tx_data_valid_SB_LUT4_I3_O_SB_LUT4_O_I0_SB_LUT4_O_I3[2] -.sym 31368 spi_if_ins.spi.r_tx_bit_count[2] -.sym 31369 spi_if_ins.spi.SCKr[1] -.sym 31370 spi_if_ins.spi.SCKr[0] -.sym 31374 i_sck$SB_IO_IN -.sym 31379 spi_if_ins.spi.SCKr[2] -.sym 31380 spi_if_ins.spi.SCKr[1] -.sym 31381 spi_if_ins.r_tx_data_valid_SB_LUT4_I3_O[2] -.sym 31389 spi_if_ins.r_tx_data_valid_SB_LUT4_I3_O[2] -.sym 31390 spi_if_ins.spi.SCKr[1] -.sym 31399 i_smi_a2_SB_LUT4_I1_O_SB_LUT4_I3_1_I2[2] -.sym 31400 i_smi_soe_se$rename$0 -.sym 31401 smi_ctrl_ins.r_fifo_24_pull_SB_LUT4_I1_O[2] +.sym 30861 i_smi_a2_SB_LUT4_I1_O_SB_LUT4_I3_I2_SB_LUT4_O_I3[2] +.sym 30863 i_smi_a2_SB_LUT4_I1_O_SB_LUT4_I3_I2[2] +.sym 30864 i_smi_soe_se$rename$0 +.sym 30865 i_smi_a1_SB_LUT4_I1_O_SB_LUT4_O_I0[3] +.sym 30868 i_smi_a3$SB_IO_IN +.sym 30869 w_smi_data_output[5] +.sym 30876 i_smi_soe_se$rename$0 +.sym 30877 i_smi_a1_SB_LUT4_I1_O_SB_LUT4_O_I0[3] +.sym 30879 i_smi_soe_se$rename$0 +.sym 30880 i_smi_a1_SB_LUT4_I1_O_SB_LUT4_O_I0[3] +.sym 30881 i_smi_a2_SB_LUT4_I1_O_SB_LUT4_I3_I2[1] +.sym 30883 spi_if_ins.spi.o_spi_miso_SB_DFFE_Q_D_SB_LUT4_O_I2_SB_LUT4_O_I0_SB_LUT4_O_I3[2] +.sym 30887 spi_if_ins.spi.SCKr_SB_LUT4_I0_O[0] +.sym 30888 $PACKER_VCC_NET +.sym 30891 spi_if_ins.spi.r_tx_bit_count[2] +.sym 30892 $PACKER_VCC_NET +.sym 30893 spi_if_ins.spi.r_tx_bit_count_SB_DFFESR_Q_D_SB_LUT4_O_I3[2] +.sym 30895 spi_if_ins.r_tx_data_valid_SB_LUT4_I3_O[0] +.sym 30896 spi_if_ins.r_tx_data_valid_SB_LUT4_I3_O[1] +.sym 30897 spi_if_ins.r_tx_data_valid_SB_LUT4_I3_O[2] +.sym 30901 spi_if_ins.spi.o_spi_miso_SB_DFFE_Q_D_SB_LUT4_O_I2_SB_LUT4_O_I0_SB_LUT4_O_I3[2] +.sym 30903 spi_if_ins.spi.SCKr_SB_LUT4_I0_O[0] +.sym 30904 $PACKER_VCC_NET +.sym 30905 spi_if_ins.spi.o_spi_miso_SB_DFFE_Q_D_SB_LUT4_O_I2_SB_LUT4_O_I0_SB_LUT4_O_I3[2] +.sym 30906 spi_if_ins.r_tx_data_valid_SB_LUT4_I3_O[0] +.sym 30907 spi_if_ins.spi.o_spi_miso_SB_DFFE_Q_D_SB_LUT4_O_I2_SB_LUT4_O_I0_SB_LUT4_O_I3[2] +.sym 30908 spi_if_ins.spi.r_tx_bit_count[2] +.sym 30909 spi_if_ins.r_tx_data_valid_SB_LUT4_I3_O[1] +.sym 30913 spi_if_ins.r_tx_data_valid_SB_LUT4_I3_O[2] +.sym 30915 spi_if_ins.spi.SCKr_SB_LUT4_I0_O[0] +.sym 30916 spi_if_ins.spi.SCKr_SB_LUT4_I0_O[1] +.sym 30917 spi_if_ins.r_tx_data_valid_SB_LUT4_I3_O[2] +.sym 30918 spi_if_ins.spi.r_tx_byte[1] +.sym 30919 spi_if_ins.spi.r_tx_byte[5] +.sym 30920 spi_if_ins.spi.o_spi_miso_SB_DFFE_Q_D_SB_LUT4_O_I2_SB_LUT4_O_I0_SB_LUT4_O_I3[2] +.sym 30921 spi_if_ins.spi.r_tx_bit_count[2] +.sym 30922 spi_if_ins.spi.r_tx_byte[3] +.sym 30923 spi_if_ins.spi.r_tx_byte[7] +.sym 30924 spi_if_ins.spi.r_tx_bit_count[2] +.sym 30925 spi_if_ins.spi.o_spi_miso_SB_DFFE_Q_D_SB_LUT4_O_I2_SB_LUT4_O_I0_SB_LUT4_O_I3[2] +.sym 30926 spi_if_ins.spi.r_tx_byte[2] +.sym 30927 spi_if_ins.spi.r_tx_byte[6] +.sym 30928 spi_if_ins.spi.o_spi_miso_SB_DFFE_Q_D_SB_LUT4_O_I2_SB_LUT4_O_I0_SB_LUT4_O_I3[2] +.sym 30929 spi_if_ins.spi.r_tx_bit_count[2] +.sym 30933 sys_ctrl_ins.reset_cmd +.sym 30934 spi_if_ins.spi.o_spi_miso_SB_DFFE_Q_D_SB_LUT4_O_I2_SB_LUT4_O_I0_SB_LUT4_O_I3[0] +.sym 30935 spi_if_ins.spi.o_spi_miso_SB_DFFE_Q_D_SB_LUT4_O_I2_SB_LUT4_O_I0_SB_LUT4_O_I3[1] +.sym 30936 spi_if_ins.spi.o_spi_miso_SB_DFFE_Q_D_SB_LUT4_O_I2_SB_LUT4_O_I0_SB_LUT4_O_I3[2] +.sym 30937 spi_if_ins.spi.o_spi_miso_SB_DFFE_Q_D_SB_LUT4_O_I2_SB_LUT4_O_I0_SB_LUT4_O_I3[3] +.sym 30938 spi_if_ins.spi.o_spi_miso_SB_DFFE_Q_D_SB_LUT4_O_I2_SB_LUT4_O_I0[0] +.sym 30939 spi_if_ins.spi.o_spi_miso_SB_DFFE_Q_D_SB_LUT4_O_I2_SB_LUT4_O_I0[1] +.sym 30940 spi_if_ins.spi.o_spi_miso_SB_DFFE_Q_D_SB_LUT4_O_I2_SB_LUT4_O_I0[2] +.sym 30941 spi_if_ins.spi.SCKr_SB_LUT4_I0_O[0] +.sym 30942 $PACKER_GND_NET +.sym 30946 spi_if_ins.r_tx_byte[4] +.sym 30954 spi_if_ins.r_tx_byte[0] +.sym 30958 spi_if_ins.r_tx_byte[6] +.sym 30962 spi_if_ins.r_tx_byte[3] +.sym 30976 i_ss$SB_IO_IN +.sym 30977 spi_if_ins.r_tx_data_valid +.sym 30989 spi_if_ins.o_data_in_SB_DFFE_Q_E +.sym 30998 spi_if_ins.o_ioc_SB_DFFE_Q_E[1] +.sym 31010 spi_if_ins.w_rx_data[1] +.sym 31014 spi_if_ins.w_rx_data[0] +.sym 31018 spi_if_ins.state_if_SB_DFFESR_Q_D[1] +.sym 31022 spi_if_ins.w_rx_data[5] +.sym 31026 spi_if_ins.w_rx_data[6] +.sym 31034 spi_if_ins.w_rx_data[2] +.sym 31038 spi_if_ins.state_if[2] +.sym 31039 spi_if_ins.o_ioc_SB_DFFE_Q_E[0] +.sym 31040 spi_if_ins.state_if[0] +.sym 31041 spi_if_ins.state_if[1] +.sym 31054 $PACKER_VCC_NET +.sym 31058 w_fetch +.sym 31059 w_load +.sym 31060 i_button_SB_LUT4_I3_O[1] +.sym 31061 w_cs[0] +.sym 31073 w_cs[0] +.sym 31074 spi_if_ins.spi.r_rx_byte[1] +.sym 31086 spi_if_ins.spi.r_rx_byte[0] +.sym 31090 spi_if_ins.spi.r_rx_byte[5] +.sym 31099 i_smi_a1_SB_LUT4_I1_O[3] +.sym 31100 w_cs[1] +.sym 31101 w_fetch +.sym 31106 w_ioc[1] +.sym 31107 w_ioc[4] +.sym 31108 w_ioc[3] +.sym 31109 w_ioc[2] +.sym 31110 spi_if_ins.w_rx_data[3] +.sym 31114 spi_if_ins.w_rx_data[0] +.sym 31118 spi_if_ins.w_rx_data[2] +.sym 31123 spi_if_ins.o_fetch_cmd_SB_LUT4_I3_O[0] +.sym 31124 io_ctrl_ins.o_data_out_SB_DFFESR_Q_6_R[1] +.sym 31125 spi_if_ins.o_fetch_cmd_SB_LUT4_I3_O[2] +.sym 31127 w_ioc[2] +.sym 31128 w_ioc[4] +.sym 31129 w_ioc[3] +.sym 31130 spi_if_ins.w_rx_data[1] +.sym 31134 spi_if_ins.w_rx_data[4] +.sym 31139 w_ioc[1] +.sym 31140 w_ioc[0] +.sym 31141 io_ctrl_ins.o_data_out_SB_DFFESR_Q_6_R[1] +.sym 31143 io_ctrl_ins.o_data_out_SB_DFFESR_Q_6_R[1] +.sym 31144 w_ioc[0] +.sym 31145 w_ioc[1] +.sym 31146 io_ctrl_ins.o_pmod[1] +.sym 31147 o_shdn_rx_lna$SB_IO_OUT +.sym 31148 w_ioc[0] +.sym 31149 spi_if_ins.o_fetch_cmd_SB_LUT4_I3_O[0] +.sym 31150 io_ctrl_ins.pmod_dir_state[3] +.sym 31151 io_ctrl_ins.led0_state_SB_LUT4_I3_O[1] +.sym 31152 io_ctrl_ins.tr_vc_2_state_SB_LUT4_I1_O[2] +.sym 31153 io_ctrl_ins.tr_vc_2_state_SB_LUT4_I1_O[3] +.sym 31156 spi_if_ins.o_fetch_cmd_SB_LUT4_I3_O[0] +.sym 31157 w_ioc[0] +.sym 31158 io_ctrl_ins.led0_state_SB_LUT4_I3_O[0] +.sym 31159 io_ctrl_ins.led0_state_SB_LUT4_I3_O[1] +.sym 31160 io_ctrl_ins.led0_state_SB_LUT4_I3_O[2] +.sym 31161 io_ctrl_ins.led0_state_SB_LUT4_I3_O[3] +.sym 31162 io_ctrl_ins.led1_state_SB_LUT4_I3_O[0] +.sym 31163 io_ctrl_ins.led0_state_SB_LUT4_I3_O[1] +.sym 31164 io_ctrl_ins.led1_state_SB_LUT4_I3_O[2] +.sym 31165 io_ctrl_ins.led1_state_SB_LUT4_I3_O[3] +.sym 31167 spi_if_ins.o_load_cmd_SB_LUT4_I2_O[1] +.sym 31168 i_config_SB_LUT4_I3_I2[2] +.sym 31169 i_smi_a1_SB_LUT4_I1_O[3] +.sym 31170 i_config_SB_LUT4_I3_I2[0] +.sym 31171 io_ctrl_ins.debug_mode_SB_LUT4_I2_O[1] +.sym 31172 i_config_SB_LUT4_I3_I2[2] +.sym 31173 i_config[0]$SB_IO_IN +.sym 31178 w_rx_data[4] +.sym 31182 i_config_SB_LUT4_I3_I2[0] +.sym 31183 io_ctrl_ins.debug_mode[1] +.sym 31184 i_config_SB_LUT4_I3_I2[2] +.sym 31185 o_led1$SB_IO_OUT +.sym 31188 i_button_SB_LUT4_I3_O[1] +.sym 31189 spi_if_ins.o_load_cmd_SB_LUT4_I2_O_SB_LUT4_I3_O[1] +.sym 31192 i_config_SB_LUT4_I3_I2[2] +.sym 31193 i_button$SB_IO_IN +.sym 31194 i_config_SB_LUT4_I3_I2[0] +.sym 31195 i_config_SB_LUT4_I3_I2[1] +.sym 31196 i_config_SB_LUT4_I3_I2[2] +.sym 31197 o_led0$SB_IO_OUT +.sym 31200 io_ctrl_ins.rx_h_b_state_SB_LUT4_I0_I2[1] +.sym 31201 spi_if_ins.o_load_cmd_SB_LUT4_I2_O_SB_LUT4_I3_O[1] +.sym 31206 w_rx_data[3] +.sym 31210 w_rx_data[1] +.sym 31217 io_ctrl_ins.pmod_state_SB_DFFE_Q_E +.sym 31218 w_rx_data[2] +.sym 31222 w_rx_data[0] +.sym 31234 io_ctrl_ins.debug_mode_SB_LUT4_I2_O[1] +.sym 31235 io_ctrl_ins.rf_mode[2] +.sym 31236 io_ctrl_ins.rf_pin_state[2] +.sym 31237 io_ctrl_ins.debug_mode_SB_LUT4_I2_O[3] +.sym 31243 io_ctrl_ins.rf_pin_state[1] +.sym 31244 io_ctrl_ins.debug_mode_SB_LUT4_I2_O[1] +.sym 31245 io_ctrl_ins.debug_mode_SB_LUT4_I2_O[3] +.sym 31299 sys_ctrl_ins.reset_count[0] +.sym 31304 sys_ctrl_ins.reset_count[1] +.sym 31306 sys_ctrl_ins.o_soft_reset_SB_DFFESS_Q_S +.sym 31308 sys_ctrl_ins.reset_count[2] +.sym 31309 sys_ctrl_ins.reset_count_SB_DFFESR_Q_D_SB_LUT4_O_I3[2] +.sym 31310 sys_ctrl_ins.o_soft_reset_SB_DFFESS_Q_S +.sym 31312 sys_ctrl_ins.reset_count[3] +.sym 31313 sys_ctrl_ins.reset_count_SB_DFFESR_Q_D_SB_LUT4_O_I3[3] +.sym 31316 sys_ctrl_ins.o_soft_reset_SB_DFFESS_Q_S +.sym 31317 sys_ctrl_ins.reset_cmd +.sym 31318 sys_ctrl_ins.o_soft_reset_SB_DFFESS_Q_S +.sym 31320 sys_ctrl_ins.reset_count[1] +.sym 31321 sys_ctrl_ins.reset_count[0] +.sym 31325 sys_ctrl_ins.reset_count[0] +.sym 31326 sys_ctrl_ins.reset_count[3] +.sym 31327 sys_ctrl_ins.reset_count[1] +.sym 31328 sys_ctrl_ins.reset_count[2] +.sym 31329 sys_ctrl_ins.reset_count[0] +.sym 31331 i_smi_a2_SB_LUT4_I1_O_SB_LUT4_O_I2_SB_CARRY_CO_I1[4] +.sym 31336 i_smi_a2_SB_LUT4_I1_O_SB_LUT4_O_I2_SB_CARRY_CO_I1[5] +.sym 31341 $nextpnr_ICESTORM_LC_18$I3 +.sym 31354 rx_09_fifo.rd_addr_gray[0] +.sym 31362 spi_if_ins.spi.SCKr[0] +.sym 31382 spi_if_ins.r_tx_data_valid_SB_LUT4_I3_O[1] +.sym 31390 i_sck$SB_IO_IN +.sym 31400 w_rx_24_fifo_empty +.sym 31401 io_pmod[2]$SB_IO_IN +.sym 31419 spi_if_ins.r_tx_byte[7] +.sym 31420 spi_if_ins.spi.o_spi_miso_SB_DFFE_Q_D_SB_LUT4_O_I2[1] +.sym 31421 spi_if_ins.r_tx_data_valid_SB_LUT4_I3_O[2] .sym 31427 spi_if_ins.spi.r_rx_bit_count[0] .sym 31432 spi_if_ins.spi.r_rx_bit_count[1] .sym 31436 spi_if_ins.spi.r_rx_bit_count[2] .sym 31437 spi_if_ins.spi.r_rx_bit_count_SB_DFFR_Q_D_SB_LUT4_O_I3[2] +.sym 31440 spi_if_ins.spi.r_rx_bit_count[1] .sym 31441 spi_if_ins.spi.r_rx_bit_count[0] -.sym 31448 spi_if_ins.spi.r_rx_bit_count[1] -.sym 31449 spi_if_ins.spi.r_rx_bit_count[0] -.sym 31462 spi_if_ins.spi.r_rx_byte[6] -.sym 31469 sys_ctrl_ins.reset_count_SB_DFFESR_Q_E +.sym 31453 spi_if_ins.spi.r_rx_bit_count[0] +.sym 31458 spi_if_ins.spi.r_rx_byte[6] .sym 31471 spi_if_ins.spi.r_rx_bit_count[0] .sym 31472 spi_if_ins.spi.r_rx_bit_count[2] .sym 31473 spi_if_ins.spi.r_rx_bit_count[1] .sym 31487 spi_if_ins.spi.r_rx_bit_count[0] .sym 31488 spi_if_ins.spi.r_rx_bit_count[2] .sym 31489 spi_if_ins.spi.r_rx_bit_count[1] -.sym 31490 i_mosi$SB_IO_IN -.sym 31494 spi_if_ins.spi.r_temp_rx_byte[3] -.sym 31498 spi_if_ins.spi.r_temp_rx_byte[4] -.sym 31502 spi_if_ins.spi.r_temp_rx_byte[0] -.sym 31506 spi_if_ins.spi.r_temp_rx_byte[2] -.sym 31510 spi_if_ins.spi.r_temp_rx_byte[1] +.sym 31504 i_ss$SB_IO_IN +.sym 31505 spi_if_ins.spi.r_rx_done_SB_DFFER_Q_D[1] .sym 31514 spi_if_ins.spi.r_temp_rx_byte[5] -.sym 31520 i_ss$SB_IO_IN -.sym 31521 spi_if_ins.spi.r_rx_done_SB_DFFER_Q_D[1] -.sym 31522 i_mosi$SB_IO_IN -.sym 31526 spi_if_ins.spi.r_temp_rx_byte[3] -.sym 31530 spi_if_ins.spi.r_temp_rx_byte[1] -.sym 31538 spi_if_ins.spi.r_temp_rx_byte[6] -.sym 31542 spi_if_ins.spi.r_temp_rx_byte[0] -.sym 31546 spi_if_ins.spi.r_temp_rx_byte[2] -.sym 31550 spi_if_ins.spi.r_temp_rx_byte[4] -.sym 31554 spi_if_ins.spi.r_rx_byte[3] -.sym 31558 spi_if_ins.spi.r_rx_byte[0] -.sym 31562 spi_if_ins.spi.r_rx_byte[4] -.sym 31566 spi_if_ins.spi.r_rx_byte[5] -.sym 31574 spi_if_ins.spi.r_rx_byte[1] -.sym 31578 spi_if_ins.spi.r_rx_byte[2] -.sym 31582 spi_if_ins.spi.r_rx_byte[7] -.sym 31586 spi_if_ins.o_load_cmd_SB_DFFESR_Q_D_SB_LUT4_I1_O[0] -.sym 31590 spi_if_ins.w_rx_data[3] -.sym 31594 spi_if_ins.w_rx_data[1] -.sym 31598 spi_if_ins.w_rx_data[6] -.sym 31602 spi_if_ins.w_rx_data[4] -.sym 31606 spi_if_ins.w_rx_data[2] -.sym 31610 spi_if_ins.w_rx_data[0] -.sym 31614 spi_if_ins.w_rx_data[5] -.sym 31620 io_ctrl_ins.o_data_out_SB_DFFESR_Q_6_R[0] -.sym 31621 io_ctrl_ins.o_data_out_SB_DFFESR_Q_6_R[1] -.sym 31622 w_rx_data[6] -.sym 31626 w_rx_data[5] -.sym 31630 io_ctrl_ins.o_pmod[4] -.sym 31631 io_ctrl_ins.pmod_state_SB_DFFE_Q_E_SB_LUT4_O_I3[0] -.sym 31632 io_ctrl_ins.led1_state_SB_LUT4_I0_I2[1] -.sym 31633 i_config[1]$SB_IO_IN -.sym 31634 w_rx_data[0] -.sym 31638 w_rx_data[4] -.sym 31642 w_rx_data[7] -.sym 31646 w_rx_data[3] -.sym 31650 w_rx_data[5] -.sym 31654 w_rx_data[3] -.sym 31658 io_ctrl_ins.o_pmod[0] -.sym 31659 io_ctrl_ins.pmod_state_SB_DFFE_Q_E_SB_LUT4_O_I3[0] -.sym 31660 io_ctrl_ins.led1_state_SB_LUT4_I0_I2[1] -.sym 31661 o_led0$SB_IO_OUT -.sym 31662 w_rx_data[7] -.sym 31666 io_ctrl_ins.o_pmod[7] -.sym 31667 io_ctrl_ins.pmod_state_SB_DFFE_Q_E_SB_LUT4_O_I3[0] -.sym 31668 io_ctrl_ins.led1_state_SB_LUT4_I0_I2[1] -.sym 31669 i_button$SB_IO_IN -.sym 31670 w_rx_data[0] -.sym 31676 io_ctrl_ins.tr_vc_2_state_SB_LUT4_I1_I3[1] -.sym 31677 w_ioc[0] -.sym 31678 io_ctrl_ins.o_pmod[5] -.sym 31679 io_ctrl_ins.pmod_state_SB_DFFE_Q_E_SB_LUT4_O_I3[0] -.sym 31680 io_ctrl_ins.led1_state_SB_LUT4_I0_I2[1] -.sym 31681 i_config[2]$SB_IO_IN -.sym 31682 io_ctrl_ins.o_pmod[3] -.sym 31683 o_tr_vc2$SB_IO_OUT -.sym 31684 w_ioc[0] -.sym 31685 io_ctrl_ins.tr_vc_2_state_SB_LUT4_I1_I3[1] -.sym 31686 o_led1$SB_IO_OUT -.sym 31687 io_ctrl_ins.led1_state_SB_LUT4_I0_I2[1] -.sym 31688 io_ctrl_ins.led1_state_SB_LUT4_I0_I2[2] -.sym 31689 io_ctrl_ins.led1_state_SB_LUT4_I0_I2[3] -.sym 31694 io_ctrl_ins.o_data_out_SB_DFFESR_Q_6_R[0] -.sym 31695 io_ctrl_ins.debug_mode_SB_LUT4_I2_O[1] -.sym 31696 io_ctrl_ins.led1_state_SB_LUT4_I0_I2[1] -.sym 31697 i_config[0]$SB_IO_IN -.sym 31702 o_rx_h_tx_l_b$SB_IO_OUT -.sym 31703 io_ctrl_ins.tr_vc_2_state_SB_LUT4_I1_I3_SB_LUT4_I2_O[0] -.sym 31704 io_ctrl_ins.led1_state_SB_LUT4_I0_I2[1] -.sym 31705 i_config[3]$SB_IO_IN -.sym 31706 io_ctrl_ins.pmod_dir_state[3] -.sym 31707 io_ctrl_ins.ldo2v8_state_SB_LUT4_I3_O[1] -.sym 31708 io_ctrl_ins.tr_vc_2_state_SB_LUT4_I1_O[2] -.sym 31709 io_ctrl_ins.tr_vc_2_state_SB_LUT4_I1_O[3] -.sym 31710 io_ctrl_ins.ldo2v8_state_SB_LUT4_I3_O[0] -.sym 31711 io_ctrl_ins.ldo2v8_state_SB_LUT4_I3_O[1] -.sym 31712 io_ctrl_ins.ldo2v8_state_SB_LUT4_I3_O[2] -.sym 31713 io_ctrl_ins.ldo2v8_state_SB_LUT4_I3_O[3] -.sym 31734 io_ctrl_ins.rf_pin_state[3] -.sym 31735 io_ctrl_ins.debug_mode_SB_LUT4_I2_O[1] -.sym 31736 io_ctrl_ins.rf_mode[2] -.sym 31737 io_ctrl_ins.debug_mode_SB_LUT4_I2_O[3] -.sym 31778 rx_09_fifo.rd_addr_gray[2] -.sym 31782 rx_09_fifo.rd_addr_gray[3] -.sym 31790 rx_09_fifo.rd_addr_gray[4] -.sym 31816 rx_09_fifo.rd_addr_gray_SB_LUT4_I2_O[2] -.sym 31817 rx_09_fifo.rd_addr_gray_SB_LUT4_I2_O[3] -.sym 31824 io_pmod_SB_DFFSS_Q_D_SB_LUT4_O_I0_SB_LUT4_O_1_I1_SB_LUT4_O_I2[1] -.sym 31825 io_pmod_SB_DFFSS_Q_D_SB_LUT4_O_I0_SB_LUT4_O_1_I1_SB_LUT4_O_I0[3] -.sym 31840 rx_09_fifo.rd_addr_gray_SB_LUT4_I2_O[3] -.sym 31841 io_pmod_SB_DFFSS_Q_D_SB_LUT4_O_I0_SB_LUT4_O_1_I1_SB_LUT4_O_I2[1] -.sym 31879 spi_if_ins.r_tx_byte[7] -.sym 31880 spi_if_ins.r_tx_data_valid_SB_LUT4_I3_O[1] -.sym 31881 spi_if_ins.r_tx_data_valid_SB_LUT4_I3_O[2] -.sym 31953 i_ss$SB_IO_IN -.sym 31960 lvds_rx_09_inst.r_state_if_SB_LUT4_I2_O[0] -.sym 31961 io_pmod[5]$SB_IO_IN -.sym 31968 lvds_rx_09_inst.r_state_if_SB_LUT4_I2_O[0] -.sym 31969 w_rx_09_fifo_data[1] -.sym 31986 spi_if_ins.spi.r_rx_done_SB_DFFER_Q_D[1] -.sym 32004 lvds_rx_09_inst.r_state_if_SB_LUT4_I2_O[0] -.sym 32005 io_pmod[4]$SB_IO_IN -.sym 32098 io_ctrl_ins.led0_state_SB_LUT4_I3_O[0] -.sym 32099 io_ctrl_ins.ldo2v8_state_SB_LUT4_I3_O[1] -.sym 32100 io_ctrl_ins.led0_state_SB_LUT4_I3_O[2] -.sym 32101 io_ctrl_ins.led0_state_SB_LUT4_I3_O[3] -.sym 32106 io_ctrl_ins.pmod_dir_state[4] -.sym 32107 io_ctrl_ins.ldo2v8_state_SB_LUT4_I3_O[1] -.sym 32108 io_ctrl_ins.tr_vc_1_b_state_SB_LUT4_I1_O[2] -.sym 32109 io_ctrl_ins.tr_vc_1_b_state_SB_LUT4_I1_O[3] -.sym 32138 o_tr_vc1$SB_IO_OUT -.sym 32139 io_ctrl_ins.tr_vc_2_state_SB_LUT4_I1_I3_SB_LUT4_I2_O[0] -.sym 32140 io_ctrl_ins.ldo2v8_state_SB_LUT4_I3_O[1] -.sym 32141 io_ctrl_ins.pmod_dir_state[5] -.sym 32144 io_ctrl_ins.tr_vc_1_state_SB_LUT4_I0_O[0] -.sym 32145 io_ctrl_ins.tr_vc_1_state_SB_LUT4_I0_O[1] -.sym 32148 io_ctrl_ins.rx_h_b_state_SB_LUT4_I0_O[0] -.sym 32149 io_ctrl_ins.rx_h_b_state_SB_LUT4_I0_O[1] -.sym 32150 o_rx_h_tx_l$SB_IO_OUT -.sym 32151 io_ctrl_ins.tr_vc_2_state_SB_LUT4_I1_I3_SB_LUT4_I2_O[0] -.sym 32152 io_ctrl_ins.ldo2v8_state_SB_LUT4_I3_O[1] -.sym 32153 io_ctrl_ins.pmod_dir_state[7] -.sym 32160 i_button_SB_LUT4_I3_O[0] -.sym 32161 i_button_SB_LUT4_I3_O[1] -.sym 32162 io_ctrl_ins.tr_vc_2_state_SB_LUT4_I1_I3_SB_LUT4_I2_O[0] +.sym 31538 spi_if_ins.spi.r_temp_rx_byte[4] +.sym 31554 spi_if_ins.spi.r_temp_rx_byte[1] +.sym 31558 i_mosi$SB_IO_IN +.sym 31570 spi_if_ins.spi.r_temp_rx_byte[2] +.sym 31578 spi_if_ins.spi.r_temp_rx_byte[0] +.sym 31582 spi_if_ins.spi.r_temp_rx_byte[3] +.sym 31594 i_mosi$SB_IO_IN +.sym 31598 spi_if_ins.spi.r_temp_rx_byte[4] +.sym 31606 spi_if_ins.spi.r_temp_rx_byte[2] +.sym 31610 spi_if_ins.spi.r_temp_rx_byte[0] +.sym 31614 spi_if_ins.spi.r_temp_rx_byte[3] +.sym 31618 spi_if_ins.spi.r_rx_byte[4] +.sym 31629 io_ctrl_ins.o_data_out_SB_DFFESR_Q_E[3] +.sym 31630 spi_if_ins.spi.r_rx_byte[3] +.sym 31650 spi_if_ins.w_rx_data[4] +.sym 31654 io_ctrl_ins.led0_state_SB_LUT4_I3_O[1] +.sym 31655 io_ctrl_ins.pmod_dir_state[5] +.sym 31656 i_button_SB_LUT4_I3_O[1] +.sym 31657 io_ctrl_ins.o_pmod[5] +.sym 31660 w_ioc[0] +.sym 31661 spi_if_ins.o_fetch_cmd_SB_LUT4_I3_O[0] +.sym 31663 w_ioc[0] +.sym 31664 io_ctrl_ins.o_data_out_SB_DFFESR_Q_6_R[1] +.sym 31665 w_ioc[1] +.sym 31666 io_ctrl_ins.o_pmod[3] +.sym 31667 o_tr_vc2$SB_IO_OUT +.sym 31668 w_ioc[0] +.sym 31669 spi_if_ins.o_fetch_cmd_SB_LUT4_I3_O[0] +.sym 31671 w_ioc[1] +.sym 31672 io_ctrl_ins.o_data_out_SB_DFFESR_Q_6_R[1] +.sym 31673 spi_if_ins.o_fetch_cmd_SB_LUT4_I3_O[0] +.sym 31674 io_ctrl_ins.led0_state_SB_LUT4_I3_O[1] +.sym 31675 io_ctrl_ins.pmod_dir_state[6] +.sym 31676 i_button_SB_LUT4_I3_O[1] +.sym 31677 io_ctrl_ins.o_pmod[6] +.sym 31678 spi_if_ins.w_rx_data[3] +.sym 31684 i_config_SB_LUT4_I3_I2[2] +.sym 31685 i_config[3]$SB_IO_IN +.sym 31686 w_rx_data[4] +.sym 31690 w_rx_data[7] +.sym 31694 w_rx_data[5] +.sym 31698 w_rx_data[6] +.sym 31702 i_config_SB_LUT4_I3_I2[0] +.sym 31703 io_ctrl_ins.rf_mode[2] +.sym 31704 i_config_SB_LUT4_I3_I2[2] +.sym 31705 i_config[1]$SB_IO_IN +.sym 31708 i_config_SB_LUT4_I3_I2[2] +.sym 31709 i_config[2]$SB_IO_IN +.sym 31710 i_button_SB_LUT4_I3_O[1] +.sym 31711 io_ctrl_ins.o_pmod[2] +.sym 31712 i_config_SB_LUT4_I3_I2[0] +.sym 31713 io_ctrl_ins.rf_mode[0] +.sym 31714 w_rx_data[3] +.sym 31718 w_rx_data[2] +.sym 31722 i_config_SB_LUT4_I3_I2[1] +.sym 31723 io_ctrl_ins.rf_mode[2] +.sym 31724 io_ctrl_ins.debug_mode_SB_LUT4_I2_O[1] +.sym 31725 io_ctrl_ins.debug_mode[1] +.sym 31726 w_rx_data[1] +.sym 31732 i_config_SB_LUT4_I3_I2[1] +.sym 31733 io_ctrl_ins.debug_mode[1] +.sym 31734 w_rx_data[5] +.sym 31738 w_rx_data[6] +.sym 31742 w_rx_data[7] +.sym 31766 io_ctrl_ins.rf_pin_state[3] +.sym 31767 io_ctrl_ins.debug_mode_SB_LUT4_I2_O[1] +.sym 31768 io_ctrl_ins.rf_mode[2] +.sym 31769 io_ctrl_ins.debug_mode_SB_LUT4_I2_O[3] +.sym 31856 lvds_rx_09_inst.r_state_if_SB_LUT4_I2_O[0] +.sym 31857 io_pmod[7]$SB_IO_IN +.sym 31896 lvds_rx_09_inst.r_state_if_SB_LUT4_I2_O[0] +.sym 31897 w_rx_09_fifo_data[0] +.sym 31922 i_smi_soe_se$rename$0 +.sym 31944 lvds_rx_09_inst.r_state_if_SB_LUT4_I2_O[0] +.sym 31945 w_rx_09_fifo_data[1] +.sym 31977 i_ss$SB_IO_IN +.sym 31982 spi_if_ins.spi.r2_rx_done +.sym 31988 spi_if_ins.spi.r3_rx_done +.sym 31989 spi_if_ins.spi.r2_rx_done +.sym 31994 spi_if_ins.spi.r_rx_done +.sym 32022 spi_if_ins.spi.r_temp_rx_byte[6] +.sym 32038 spi_if_ins.spi.r_temp_rx_byte[5] +.sym 32086 spi_if_ins.spi.r_temp_rx_byte[1] +.sym 32114 w_rx_data[0] +.sym 32126 w_rx_data[1] +.sym 32131 w_ioc[1] +.sym 32132 w_ioc[0] +.sym 32133 io_ctrl_ins.o_data_out_SB_DFFESR_Q_E[3] +.sym 32139 w_ioc[0] +.sym 32140 io_ctrl_ins.o_data_out_SB_DFFESR_Q_6_R[1] +.sym 32141 spi_if_ins.o_fetch_cmd_SB_LUT4_I3_O[0] +.sym 32142 io_ctrl_ins.pmod_dir_state[4] +.sym 32143 io_ctrl_ins.led0_state_SB_LUT4_I3_O[1] +.sym 32144 io_ctrl_ins.tr_vc_1_b_state_SB_LUT4_I1_O[2] +.sym 32145 io_ctrl_ins.tr_vc_1_b_state_SB_LUT4_I1_O[3] +.sym 32162 io_ctrl_ins.o_pmod[4] .sym 32163 o_tr_vc1_b$SB_IO_OUT -.sym 32164 io_ctrl_ins.o_data_out_SB_DFFESR_Q_6_R[0] -.sym 32165 io_ctrl_ins.rf_mode[2] -.sym 32166 io_ctrl_ins.debug_mode_SB_LUT4_I2_O[0] -.sym 32167 io_ctrl_ins.debug_mode_SB_LUT4_I2_O[1] -.sym 32168 io_ctrl_ins.debug_mode_SB_LUT4_I2_O[2] -.sym 32169 io_ctrl_ins.debug_mode_SB_LUT4_I2_O[3] -.sym 32170 io_ctrl_ins.tr_vc_2_state_SB_LUT4_I1_I3_SB_LUT4_I2_O[0] -.sym 32171 io_ctrl_ins.mixer_en_state -.sym 32172 io_ctrl_ins.o_data_out_SB_DFFESR_Q_6_R[0] -.sym 32173 io_ctrl_ins.debug_mode[0] -.sym 32174 io_ctrl_ins.debug_mode_SB_LUT4_I2_O[3] -.sym 32175 io_ctrl_ins.debug_mode_SB_LUT4_I2_O[1] -.sym 32176 io_ctrl_ins.rf_mode[0] -.sym 32177 io_ctrl_ins.rf_mode[2] -.sym 32178 io_ctrl_ins.debug_mode_SB_LUT4_I2_O[0] -.sym 32179 io_ctrl_ins.debug_mode_SB_LUT4_I2_O[1] -.sym 32180 io_ctrl_ins.rf_pin_state[4] -.sym 32181 io_ctrl_ins.debug_mode_SB_LUT4_I2_O[3] -.sym 32183 io_ctrl_ins.debug_mode_SB_LUT4_I2_O[3] -.sym 32184 io_ctrl_ins.rf_pin_state[6] -.sym 32185 io_ctrl_ins.rx_h_state_SB_DFFE_Q_D_SB_LUT4_O_I3[2] -.sym 32187 io_ctrl_ins.rf_pin_state[7] -.sym 32188 io_ctrl_ins.debug_mode_SB_LUT4_I2_O[3] -.sym 32189 io_ctrl_ins.rx_h_state_SB_DFFE_Q_D_SB_LUT4_O_I3[2] -.sym 32190 io_ctrl_ins.rf_pin_state[0] -.sym 32191 io_ctrl_ins.debug_mode_SB_LUT4_I2_O[1] -.sym 32192 io_ctrl_ins.rf_mode[2] -.sym 32193 io_ctrl_ins.debug_mode_SB_LUT4_I2_O[3] -.sym 32208 io_ctrl_ins.rf_mode[0] -.sym 32209 io_ctrl_ins.rf_mode[2] -.sym 32492 spi_if_ins.spi.r3_rx_done -.sym 32493 spi_if_ins.spi.r2_rx_done -.sym 32494 spi_if_ins.spi.r2_rx_done -.sym 32498 spi_if_ins.spi.r_rx_done -.sym 32549 r_counter[0] -.sym 32638 w_rx_data[5] +.sym 32164 w_ioc[0] +.sym 32165 spi_if_ins.o_fetch_cmd_SB_LUT4_I3_O[0] +.sym 32166 w_ioc[2] +.sym 32167 w_ioc[1] +.sym 32168 w_ioc[0] +.sym 32169 io_ctrl_ins.o_data_out_SB_DFFESR_Q_E[3] +.sym 32170 w_rx_data[4] +.sym 32175 w_ioc[0] +.sym 32176 io_ctrl_ins.o_data_out_SB_DFFESR_Q_6_R[1] +.sym 32177 io_ctrl_ins.o_data_out_SB_DFFESR_Q_6_R[2] +.sym 32181 io_ctrl_ins.o_data_out_SB_DFFESR_Q_6_R[2] +.sym 32182 o_rx_h_tx_l$SB_IO_OUT +.sym 32183 io_ctrl_ins.rx_h_b_state_SB_LUT4_I0_I2[1] +.sym 32184 io_ctrl_ins.led0_state_SB_LUT4_I3_O[1] +.sym 32185 io_ctrl_ins.pmod_dir_state[7] +.sym 32186 w_rx_data[0] +.sym 32190 io_ctrl_ins.o_pmod[0] +.sym 32191 io_ctrl_ins.mixer_en_state +.sym 32192 w_ioc[0] +.sym 32193 spi_if_ins.o_fetch_cmd_SB_LUT4_I3_O[0] +.sym 32202 o_tr_vc1$SB_IO_OUT +.sym 32203 io_ctrl_ins.rx_h_b_state_SB_LUT4_I0_I2[1] +.sym 32204 io_ctrl_ins.tr_vc_1_state_SB_LUT4_I0_I2[2] +.sym 32205 io_ctrl_ins.tr_vc_1_state_SB_LUT4_I0_I2[3] +.sym 32206 o_rx_h_tx_l_b$SB_IO_OUT +.sym 32207 io_ctrl_ins.rx_h_b_state_SB_LUT4_I0_I2[1] +.sym 32208 io_ctrl_ins.rx_h_b_state_SB_LUT4_I0_I2[2] +.sym 32209 io_ctrl_ins.rx_h_b_state_SB_LUT4_I0_I2[3] +.sym 32222 i_button_SB_LUT4_I3_O[0] +.sym 32223 i_button_SB_LUT4_I3_O[1] +.sym 32224 i_button_SB_LUT4_I3_O[2] +.sym 32225 i_button_SB_LUT4_I3_O[3] +.sym 32226 io_ctrl_ins.debug_mode_SB_LUT4_I2_O[0] +.sym 32227 io_ctrl_ins.debug_mode_SB_LUT4_I2_O[1] +.sym 32228 io_ctrl_ins.debug_mode_SB_LUT4_I2_O[2] +.sym 32229 io_ctrl_ins.debug_mode_SB_LUT4_I2_O[3] +.sym 32236 io_ctrl_ins.rf_mode[0] +.sym 32237 io_ctrl_ins.rf_mode[2] +.sym 32239 io_ctrl_ins.debug_mode_SB_LUT4_I2_O[3] +.sym 32240 io_ctrl_ins.rf_pin_state[6] +.sym 32241 io_ctrl_ins.rx_h_state_SB_DFFE_Q_D_SB_LUT4_O_I3[2] +.sym 32242 io_ctrl_ins.debug_mode_SB_LUT4_I2_O[3] +.sym 32243 io_ctrl_ins.debug_mode_SB_LUT4_I2_O[1] +.sym 32244 io_ctrl_ins.rf_mode[0] +.sym 32245 io_ctrl_ins.rf_mode[2] +.sym 32246 io_ctrl_ins.rf_pin_state[0] +.sym 32247 io_ctrl_ins.debug_mode_SB_LUT4_I2_O[1] +.sym 32248 io_ctrl_ins.rf_mode[2] +.sym 32249 io_ctrl_ins.debug_mode_SB_LUT4_I2_O[3] +.sym 32251 io_ctrl_ins.rf_pin_state[7] +.sym 32252 io_ctrl_ins.debug_mode_SB_LUT4_I2_O[3] +.sym 32253 io_ctrl_ins.rx_h_state_SB_DFFE_Q_D_SB_LUT4_O_I3[2] +.sym 32254 io_ctrl_ins.debug_mode_SB_LUT4_I2_O[0] +.sym 32255 io_ctrl_ins.debug_mode_SB_LUT4_I2_O[1] +.sym 32256 io_ctrl_ins.rf_pin_state[4] +.sym 32257 io_ctrl_ins.debug_mode_SB_LUT4_I2_O[3] +.sym 32460 lvds_rx_09_inst.r_state_if_SB_LUT4_I2_O[0] +.sym 32461 io_pmod[4]$SB_IO_IN +.sym 32476 lvds_rx_09_inst.r_state_if_SB_LUT4_I2_O[0] +.sym 32477 io_pmod[5]$SB_IO_IN +.sym 32498 spi_if_ins.spi.r_rx_done_SB_DFFER_Q_D[1] +.sym 32514 spi_if_ins.spi.r_rx_byte[7] +.sym 32525 spi_if_ins.spi.r3_rx_done_SB_LUT4_I2_O +.sym 32565 r_counter[0] +.sym 32590 spi_if_ins.spi.r3_rx_done_SB_LUT4_I2_O +.sym 32634 spi_if_ins.spi.r_rx_byte[2] +.sym 32648 io_ctrl_ins.o_data_out_SB_DFFESR_Q_3_D_SB_LUT4_O_I2[0] +.sym 32649 io_ctrl_ins.o_data_out_SB_DFFESR_Q_3_D_SB_LUT4_O_I2[1] diff --git a/firmware/top.bin b/firmware/top.bin index 91e329de04bb34e63cfded77e45ed4da1d56a407..18012c6f87ecb280030ff09d7639713f86d284bf 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@@ "O": "output" }, "connections": { - "I0": [ 149 ], - "I1": [ 124 ], - "I2": [ 150 ], - "I3": [ 151 ], - "O": [ 147 ] + "I0": [ 154 ], + "I1": [ 155 ], + "I2": [ 112 ], + "I3": [ 104 ], + "O": [ 153 ] + } + }, + "io_ctrl_ins.o_data_out_SB_DFFESR_Q_3_E_SB_LUT4_O": { + "hide_name": 0, + "type": "SB_LUT4", + "parameters": { + "LUT_INIT": "1111001100000000" + }, + "attributes": { + "module_not_derived": "00000000000000000000000000000001", + "src": "/usr/local/bin/../share/yosys/ice40/cells_map.v:22.34-23.52" + }, + "port_directions": { + "I0": "input", + "I1": "input", + "I2": "input", + "I3": "input", + "O": "output" + }, + "connections": { + "I0": [ "0" ], + "I1": [ 116 ], + "I2": [ 115 ], + "I3": [ 136 ], + "O": [ 150 ] + } + }, + "io_ctrl_ins.o_data_out_SB_DFFESR_Q_3_R_SB_LUT4_O": { + "hide_name": 0, + "type": "SB_LUT4", + "parameters": { + "LUT_INIT": "0000000000111111" + }, + "attributes": { + "module_not_derived": "00000000000000000000000000000001", + "src": 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{ - "module_not_derived": "00000000000000000000000000000001", - "src": "/usr/local/bin/../share/yosys/ice40/cells_map.v:17.34-18.52" - }, - "port_directions": { - "I0": "input", - "I1": "input", - "I2": "input", - "I3": "input", - "O": "output" - }, - "connections": { - "I0": [ "0" ], - "I1": [ "0" ], - "I2": [ 156 ], - "I3": [ 157 ], - "O": [ 152 ] + "C": [ 94 ], + "D": [ 156 ], + "E": [ 157 ], + "Q": [ 158 ], + "R": [ 159 ] } }, "io_ctrl_ins.o_data_out_SB_DFFESR_Q_5": { @@ -11344,7 +11449,7 @@ }, "attributes": { "module_not_derived": "00000000000000000000000000000001", - "src": "top.v:128.12-157.5|io_ctrl.v:123.5-221.8|/usr/local/bin/../share/yosys/ice40/ff_map.v:24.66-24.119" + "src": "top.v:128.12-156.5|io_ctrl.v:109.5-204.8|/usr/local/bin/../share/yosys/ice40/ff_map.v:24.66-24.119" }, "port_directions": { "C": "input", @@ -11354,36 +11459,11 @@ "R": "input" }, "connections": { - "C": [ 89 ], - "D": [ 158 ], - "E": [ 153 ], - "Q": [ 159 ], - "R": [ 155 ] - } - }, - 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], + "Q": [ 176 ] } }, "io_ctrl_ins.pmod_dir_state_SB_DFFE_Q_2": { @@ -11610,7 +11740,7 @@ }, "attributes": { "module_not_derived": "00000000000000000000000000000001", - "src": "top.v:128.12-157.5|io_ctrl.v:123.5-221.8|/usr/local/bin/../share/yosys/ice40/ff_map.v:5.57-5.103" + "src": "top.v:128.12-156.5|io_ctrl.v:109.5-204.8|/usr/local/bin/../share/yosys/ice40/ff_map.v:5.57-5.103" }, "port_directions": { "C": "input", @@ -11619,10 +11749,10 @@ "Q": "output" }, "connections": { - "C": [ 89 ], - "D": [ 175 ], - "E": [ 171 ], - "Q": [ 176 ] + "C": [ 94 ], + "D": [ 177 ], + "E": [ 173 ], + "Q": [ 178 ] } }, "io_ctrl_ins.pmod_dir_state_SB_DFFE_Q_3": { @@ -11632,7 +11762,7 @@ }, "attributes": { "module_not_derived": "00000000000000000000000000000001", - "src": "top.v:128.12-157.5|io_ctrl.v:123.5-221.8|/usr/local/bin/../share/yosys/ice40/ff_map.v:5.57-5.103" + "src": "top.v:128.12-156.5|io_ctrl.v:109.5-204.8|/usr/local/bin/../share/yosys/ice40/ff_map.v:5.57-5.103" }, "port_directions": { "C": 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], - "Q": [ 184 ] + "C": [ 94 ], + "D": [ 180 ], + "E": [ 182 ], + "Q": [ 186 ] } }, "io_ctrl_ins.pmod_state_SB_DFFE_Q_5": { @@ -11877,7 +11982,7 @@ }, "attributes": { "module_not_derived": "00000000000000000000000000000001", - "src": "top.v:128.12-157.5|io_ctrl.v:123.5-221.8|/usr/local/bin/../share/yosys/ice40/ff_map.v:5.57-5.103" + "src": "top.v:128.12-156.5|io_ctrl.v:109.5-204.8|/usr/local/bin/../share/yosys/ice40/ff_map.v:5.57-5.103" }, "port_directions": { "C": "input", @@ -11886,10 +11991,10 @@ "Q": "output" }, "connections": { - "C": [ 89 ], - "D": [ 110 ], - "E": [ 180 ], - "Q": [ 115 ] + "C": [ 94 ], + "D": [ 181 ], + "E": [ 182 ], + "Q": [ 155 ] } }, "io_ctrl_ins.pmod_state_SB_DFFE_Q_6": { @@ -11899,7 +12004,7 @@ }, "attributes": { "module_not_derived": "00000000000000000000000000000001", - "src": "top.v:128.12-157.5|io_ctrl.v:123.5-221.8|/usr/local/bin/../share/yosys/ice40/ff_map.v:5.57-5.103" + "src": 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- "E": [ 202 ], - "Q": [ 277 ], - "R": [ 93 ] + "C": [ 202 ], + "D": [ 241 ], + "E": [ 204 ], + "Q": [ 242 ], + "R": [ 56 ] } }, "lvds_rx_09_inst.r_data_SB_DFFNESR_Q_17": { @@ -13891,7 +13446,7 @@ }, "attributes": { "module_not_derived": "00000000000000000000000000000001", - "src": "top.v:249.12-258.5|lvds_rx.v:39.5-82.8|/usr/local/bin/../share/yosys/ice40/ff_map.v:22.66-22.119" + "src": "top.v:248.12-257.5|lvds_rx.v:39.5-82.8|/usr/local/bin/../share/yosys/ice40/ff_map.v:22.66-22.119" }, "port_directions": { "C": "input", @@ -13901,11 +13456,11 @@ "R": "input" }, "connections": { - "C": [ 200 ], - "D": [ 278 ], - "E": [ 202 ], - "Q": [ 279 ], - "R": [ 93 ] + "C": [ 202 ], + "D": [ 243 ], + "E": [ 204 ], + "Q": [ 244 ], + "R": [ 56 ] } }, "lvds_rx_09_inst.r_data_SB_DFFNESR_Q_18": { @@ -13915,7 +13470,7 @@ }, "attributes": { "module_not_derived": "00000000000000000000000000000001", - "src": "top.v:249.12-258.5|lvds_rx.v:39.5-82.8|/usr/local/bin/../share/yosys/ice40/ff_map.v:22.66-22.119" + "src": "top.v:248.12-257.5|lvds_rx.v:39.5-82.8|/usr/local/bin/../share/yosys/ice40/ff_map.v:22.66-22.119" }, "port_directions": { "C": "input", @@ -13925,11 +13480,11 @@ "R": "input" }, "connections": { - "C": [ 200 ], - "D": [ 280 ], - "E": [ 202 ], - "Q": [ 281 ], - "R": [ 93 ] + "C": [ 202 ], + "D": [ 245 ], + "E": [ 204 ], + "Q": [ 246 ], + "R": [ 56 ] } }, "lvds_rx_09_inst.r_data_SB_DFFNESR_Q_19": { @@ -13939,7 +13494,7 @@ }, "attributes": { "module_not_derived": "00000000000000000000000000000001", - "src": "top.v:249.12-258.5|lvds_rx.v:39.5-82.8|/usr/local/bin/../share/yosys/ice40/ff_map.v:22.66-22.119" + "src": "top.v:248.12-257.5|lvds_rx.v:39.5-82.8|/usr/local/bin/../share/yosys/ice40/ff_map.v:22.66-22.119" }, "port_directions": { "C": "input", @@ -13949,11 +13504,11 @@ "R": "input" }, "connections": { - "C": [ 200 ], - "D": [ 282 ], - "E": [ 202 ], - "Q": [ 283 ], - "R": [ 93 ] + "C": [ 202 ], + "D": [ 247 ], + "E": [ 204 ], + "Q": [ 248 ], + "R": [ 56 ] } }, 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- "src": "top.v:249.12-258.5|lvds_rx.v:39.5-82.8|/usr/local/bin/../share/yosys/ice40/ff_map.v:22.66-22.119" + "src": "top.v:248.12-257.5|lvds_rx.v:39.5-82.8|/usr/local/bin/../share/yosys/ice40/ff_map.v:22.66-22.119" }, "port_directions": { "C": "input", @@ -14045,11 +13600,11 @@ "R": "input" }, "connections": { - "C": [ 200 ], - "D": [ 290 ], - "E": [ 202 ], - "Q": [ 291 ], - "R": [ 93 ] + "C": [ 202 ], + "D": [ 255 ], + "E": [ 204 ], + "Q": [ 256 ], + "R": [ 56 ] } }, "lvds_rx_09_inst.r_data_SB_DFFNESR_Q_23": { @@ -14059,7 +13614,7 @@ }, "attributes": { "module_not_derived": "00000000000000000000000000000001", - "src": "top.v:249.12-258.5|lvds_rx.v:39.5-82.8|/usr/local/bin/../share/yosys/ice40/ff_map.v:22.66-22.119" + "src": "top.v:248.12-257.5|lvds_rx.v:39.5-82.8|/usr/local/bin/../share/yosys/ice40/ff_map.v:22.66-22.119" }, "port_directions": { "C": "input", @@ -14069,11 +13624,11 @@ "R": "input" }, "connections": { - "C": [ 200 ], - "D": [ 292 ], - "E": [ 202 ], - "Q": [ 293 ], - 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"top.v:248.12-257.5|lvds_rx.v:39.5-82.8|/usr/local/bin/../share/yosys/ice40/ff_map.v:22.66-22.119" }, "port_directions": { "C": "input", @@ -14117,11 +13672,11 @@ "R": "input" }, "connections": { - "C": [ 200 ], - "D": [ 296 ], - "E": [ 202 ], - "Q": [ 297 ], - "R": [ 93 ] + "C": [ 202 ], + "D": [ 261 ], + "E": [ 204 ], + "Q": [ 262 ], + "R": [ 56 ] } }, "lvds_rx_09_inst.r_data_SB_DFFNESR_Q_26": { @@ -14131,7 +13686,7 @@ }, "attributes": { "module_not_derived": "00000000000000000000000000000001", - "src": "top.v:249.12-258.5|lvds_rx.v:39.5-82.8|/usr/local/bin/../share/yosys/ice40/ff_map.v:22.66-22.119" + "src": "top.v:248.12-257.5|lvds_rx.v:39.5-82.8|/usr/local/bin/../share/yosys/ice40/ff_map.v:22.66-22.119" }, "port_directions": { "C": "input", @@ -14141,11 +13696,11 @@ "R": "input" }, "connections": { - "C": [ 200 ], - "D": [ 298 ], - "E": [ 202 ], - "Q": [ 299 ], - "R": [ 93 ] + "C": [ 202 ], + "D": [ 263 ], + "E": [ 204 ], + "Q": [ 264 ], + "R": [ 56 ] } }, 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{ "C": "input", @@ -14189,11 +13744,11 @@ "R": "input" }, "connections": { - "C": [ 200 ], - "D": [ 302 ], - "E": [ 202 ], - "Q": [ 303 ], - "R": [ 93 ] + "C": [ 202 ], + "D": [ 267 ], + "E": [ 204 ], + "Q": [ 268 ], + "R": [ 56 ] } }, "lvds_rx_09_inst.r_data_SB_DFFNESR_Q_4": { @@ -14203,7 +13758,7 @@ }, "attributes": { "module_not_derived": "00000000000000000000000000000001", - "src": "top.v:249.12-258.5|lvds_rx.v:39.5-82.8|/usr/local/bin/../share/yosys/ice40/ff_map.v:22.66-22.119" + "src": "top.v:248.12-257.5|lvds_rx.v:39.5-82.8|/usr/local/bin/../share/yosys/ice40/ff_map.v:22.66-22.119" }, "port_directions": { "C": "input", @@ -14213,11 +13768,11 @@ "R": "input" }, "connections": { - "C": [ 200 ], - "D": [ 304 ], - "E": [ 202 ], - "Q": [ 305 ], - "R": [ 93 ] + "C": [ 202 ], + "D": [ 269 ], + "E": [ 204 ], + "Q": [ 270 ], + "R": [ 56 ] } }, "lvds_rx_09_inst.r_data_SB_DFFNESR_Q_5": { @@ -14227,7 +13782,7 @@ }, "attributes": { "module_not_derived": "00000000000000000000000000000001", - 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- "E": [ 369 ], - "Q": [ 390 ], - "R": [ 93 ] + "C": [ 202 ], + "D": [ 361 ], + "E": [ 341 ], + "Q": [ 362 ], + "R": [ 56 ] } }, "lvds_rx_24_inst.r_data_SB_DFFNESR_Q_19": { @@ -15476,7 +15081,7 @@ }, "attributes": { "module_not_derived": "00000000000000000000000000000001", - "src": "top.v:273.12-282.5|lvds_rx.v:39.5-82.8|/usr/local/bin/../share/yosys/ice40/ff_map.v:22.66-22.119" + "src": "top.v:272.12-281.5|lvds_rx.v:39.5-82.8|/usr/local/bin/../share/yosys/ice40/ff_map.v:22.66-22.119" }, "port_directions": { "C": "input", @@ -15486,11 +15091,11 @@ "R": "input" }, "connections": { - "C": [ 200 ], - "D": [ 391 ], - "E": [ 369 ], - "Q": [ 392 ], - "R": [ 93 ] + "C": [ 202 ], + "D": [ 363 ], + "E": [ 341 ], + "Q": [ 364 ], + "R": [ 56 ] } }, "lvds_rx_24_inst.r_data_SB_DFFNESR_Q_2": { @@ -15500,7 +15105,7 @@ }, "attributes": { "module_not_derived": "00000000000000000000000000000001", - "src": "top.v:273.12-282.5|lvds_rx.v:39.5-82.8|/usr/local/bin/../share/yosys/ice40/ff_map.v:22.66-22.119" + "src": "top.v:272.12-281.5|lvds_rx.v:39.5-82.8|/usr/local/bin/../share/yosys/ice40/ff_map.v:22.66-22.119" }, "port_directions": { "C": "input", @@ -15510,11 +15115,11 @@ "R": "input" }, "connections": { - "C": [ 200 ], - "D": [ 393 ], - "E": [ 369 ], - "Q": [ 394 ], - "R": [ 93 ] + "C": [ 202 ], + "D": [ 365 ], + "E": [ 341 ], + "Q": [ 366 ], + "R": [ 56 ] } }, "lvds_rx_24_inst.r_data_SB_DFFNESR_Q_20": { @@ -15524,7 +15129,7 @@ }, "attributes": { "module_not_derived": "00000000000000000000000000000001", - "src": "top.v:273.12-282.5|lvds_rx.v:39.5-82.8|/usr/local/bin/../share/yosys/ice40/ff_map.v:22.66-22.119" + "src": "top.v:272.12-281.5|lvds_rx.v:39.5-82.8|/usr/local/bin/../share/yosys/ice40/ff_map.v:22.66-22.119" }, "port_directions": { "C": "input", @@ -15534,11 +15139,11 @@ "R": "input" }, "connections": { - "C": [ 200 ], - "D": [ 395 ], - "E": [ 369 ], - "Q": [ 396 ], - "R": [ 93 ] + "C": [ 202 ], + "D": [ 367 ], + "E": [ 341 ], + "Q": [ 368 ], + "R": [ 56 ] } }, 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"port_directions": { "C": "input", @@ -15582,11 +15187,11 @@ "R": "input" }, "connections": { - "C": [ 200 ], - "D": [ 399 ], - "E": [ 369 ], - "Q": [ 400 ], - "R": [ 93 ] + "C": [ 202 ], + "D": [ 371 ], + "E": [ 341 ], + "Q": [ 372 ], + "R": [ 56 ] } }, "lvds_rx_24_inst.r_data_SB_DFFNESR_Q_23": { @@ -15596,7 +15201,7 @@ }, "attributes": { "module_not_derived": "00000000000000000000000000000001", - "src": "top.v:273.12-282.5|lvds_rx.v:39.5-82.8|/usr/local/bin/../share/yosys/ice40/ff_map.v:22.66-22.119" + "src": "top.v:272.12-281.5|lvds_rx.v:39.5-82.8|/usr/local/bin/../share/yosys/ice40/ff_map.v:22.66-22.119" }, "port_directions": { "C": "input", @@ -15606,11 +15211,11 @@ "R": "input" }, "connections": { - "C": [ 200 ], - "D": [ 401 ], - "E": [ 369 ], - "Q": [ 402 ], - "R": [ 93 ] + "C": [ 202 ], + "D": [ 373 ], + "E": [ 341 ], + "Q": [ 374 ], + "R": [ 56 ] } }, "lvds_rx_24_inst.r_data_SB_DFFNESR_Q_24": { @@ -15620,7 +15225,7 @@ }, "attributes": { "module_not_derived": "00000000000000000000000000000001", - "src": "top.v:273.12-282.5|lvds_rx.v:39.5-82.8|/usr/local/bin/../share/yosys/ice40/ff_map.v:22.66-22.119" + "src": "top.v:272.12-281.5|lvds_rx.v:39.5-82.8|/usr/local/bin/../share/yosys/ice40/ff_map.v:22.66-22.119" }, "port_directions": { "C": "input", @@ -15630,11 +15235,11 @@ "R": "input" }, "connections": { - "C": [ 200 ], - "D": [ 403 ], - "E": [ 369 ], - "Q": [ 404 ], - "R": [ 93 ] + "C": [ 202 ], + "D": [ 375 ], + "E": [ 341 ], + "Q": [ 376 ], + "R": [ 56 ] } }, "lvds_rx_24_inst.r_data_SB_DFFNESR_Q_25": { @@ -15644,7 +15249,7 @@ }, "attributes": { "module_not_derived": "00000000000000000000000000000001", - "src": "top.v:273.12-282.5|lvds_rx.v:39.5-82.8|/usr/local/bin/../share/yosys/ice40/ff_map.v:22.66-22.119" + "src": "top.v:272.12-281.5|lvds_rx.v:39.5-82.8|/usr/local/bin/../share/yosys/ice40/ff_map.v:22.66-22.119" }, "port_directions": { "C": "input", @@ -15654,11 +15259,11 @@ "R": "input" }, "connections": { - "C": [ 200 ], - "D": [ 405 ], - "E": [ 369 ], - "Q": [ 406 ], - "R": [ 93 ] + "C": [ 202 ], + "D": [ 377 ], + "E": [ 341 ], + "Q": [ 378 ], + "R": [ 56 ] } }, "lvds_rx_24_inst.r_data_SB_DFFNESR_Q_26": { @@ -15668,7 +15273,7 @@ }, "attributes": { "module_not_derived": "00000000000000000000000000000001", - "src": "top.v:273.12-282.5|lvds_rx.v:39.5-82.8|/usr/local/bin/../share/yosys/ice40/ff_map.v:22.66-22.119" + "src": "top.v:272.12-281.5|lvds_rx.v:39.5-82.8|/usr/local/bin/../share/yosys/ice40/ff_map.v:22.66-22.119" }, "port_directions": { "C": "input", @@ -15678,11 +15283,11 @@ "R": "input" }, "connections": { - "C": [ 200 ], - "D": [ 407 ], - "E": [ 369 ], - "Q": [ 408 ], - "R": [ 93 ] + "C": [ 202 ], + "D": [ 379 ], + "E": [ 341 ], + "Q": [ 380 ], + "R": [ 56 ] } }, "lvds_rx_24_inst.r_data_SB_DFFNESR_Q_27": { @@ -15692,7 +15297,7 @@ }, "attributes": { "module_not_derived": "00000000000000000000000000000001", - "src": "top.v:273.12-282.5|lvds_rx.v:39.5-82.8|/usr/local/bin/../share/yosys/ice40/ff_map.v:22.66-22.119" + "src": "top.v:272.12-281.5|lvds_rx.v:39.5-82.8|/usr/local/bin/../share/yosys/ice40/ff_map.v:22.66-22.119" }, "port_directions": { "C": "input", @@ -15702,11 +15307,11 @@ "R": "input" }, "connections": { - "C": [ 200 ], - "D": [ 409 ], - "E": [ 369 ], - "Q": [ 410 ], - "R": [ 93 ] + "C": [ 202 ], + "D": [ 381 ], + "E": [ 341 ], + "Q": [ 382 ], + "R": [ 56 ] } }, "lvds_rx_24_inst.r_data_SB_DFFNESR_Q_28": { @@ -15716,7 +15321,7 @@ }, "attributes": { "module_not_derived": "00000000000000000000000000000001", - "src": "top.v:273.12-282.5|lvds_rx.v:39.5-82.8|/usr/local/bin/../share/yosys/ice40/ff_map.v:22.66-22.119" + "src": "top.v:272.12-281.5|lvds_rx.v:39.5-82.8|/usr/local/bin/../share/yosys/ice40/ff_map.v:22.66-22.119" }, "port_directions": { "C": "input", @@ -15726,11 +15331,11 @@ "R": "input" }, "connections": { - "C": [ 200 ], - "D": [ 411 ], - "E": [ 369 ], - "Q": [ 412 ], - "R": [ 93 ] + "C": [ 202 ], + "D": [ 383 ], + "E": [ 341 ], + "Q": [ 384 ], + "R": [ 56 ] } }, "lvds_rx_24_inst.r_data_SB_DFFNESR_Q_29": { @@ -15740,7 +15345,7 @@ }, "attributes": { "module_not_derived": "00000000000000000000000000000001", - "src": "top.v:273.12-282.5|lvds_rx.v:39.5-82.8|/usr/local/bin/../share/yosys/ice40/ff_map.v:22.66-22.119" + "src": "top.v:272.12-281.5|lvds_rx.v:39.5-82.8|/usr/local/bin/../share/yosys/ice40/ff_map.v:22.66-22.119" }, "port_directions": { "C": "input", @@ -15750,11 +15355,11 @@ "R": "input" }, "connections": { - "C": [ 200 ], - "D": [ 413 ], - "E": [ 369 ], - "Q": [ 414 ], - "R": [ 93 ] + "C": [ 202 ], + "D": [ 385 ], + "E": [ 341 ], + "Q": [ 386 ], + "R": [ 56 ] } }, "lvds_rx_24_inst.r_data_SB_DFFNESR_Q_3": { @@ -15764,7 +15369,7 @@ }, "attributes": { "module_not_derived": "00000000000000000000000000000001", - "src": "top.v:273.12-282.5|lvds_rx.v:39.5-82.8|/usr/local/bin/../share/yosys/ice40/ff_map.v:22.66-22.119" + "src": "top.v:272.12-281.5|lvds_rx.v:39.5-82.8|/usr/local/bin/../share/yosys/ice40/ff_map.v:22.66-22.119" }, "port_directions": { "C": "input", @@ -15774,11 +15379,11 @@ "R": "input" }, "connections": { - "C": [ 200 ], - "D": [ 415 ], - "E": [ 369 ], - "Q": [ 416 ], - "R": [ 93 ] + "C": [ 202 ], + "D": [ 387 ], + "E": [ 341 ], + "Q": [ 388 ], + "R": [ 56 ] } }, "lvds_rx_24_inst.r_data_SB_DFFNESR_Q_30": { @@ -15788,7 +15393,7 @@ }, "attributes": { "module_not_derived": "00000000000000000000000000000001", - "src": "top.v:273.12-282.5|lvds_rx.v:39.5-82.8|/usr/local/bin/../share/yosys/ice40/ff_map.v:22.66-22.119" + "src": "top.v:272.12-281.5|lvds_rx.v:39.5-82.8|/usr/local/bin/../share/yosys/ice40/ff_map.v:22.66-22.119" }, "port_directions": { "C": "input", @@ -15798,11 +15403,11 @@ "R": "input" }, "connections": { - "C": [ 200 ], - "D": [ 417 ], - "E": [ 369 ], - "Q": [ 418 ], - "R": [ 93 ] + "C": [ 202 ], + "D": [ 389 ], + "E": [ 341 ], + "Q": [ 390 ], + "R": [ 56 ] } }, "lvds_rx_24_inst.r_data_SB_DFFNESR_Q_31": { @@ -15812,7 +15417,7 @@ }, "attributes": { "module_not_derived": "00000000000000000000000000000001", - "src": "top.v:273.12-282.5|lvds_rx.v:39.5-82.8|/usr/local/bin/../share/yosys/ice40/ff_map.v:22.66-22.119" + "src": "top.v:272.12-281.5|lvds_rx.v:39.5-82.8|/usr/local/bin/../share/yosys/ice40/ff_map.v:22.66-22.119" }, "port_directions": { "C": "input", @@ -15822,11 +15427,11 @@ "R": "input" }, "connections": { - "C": [ 200 ], - "D": [ 419 ], - "E": [ 369 ], - "Q": [ 420 ], - "R": [ 93 ] + "C": [ 202 ], + "D": [ 391 ], + "E": [ 341 ], + "Q": [ 392 ], + "R": [ 56 ] } }, "lvds_rx_24_inst.r_data_SB_DFFNESR_Q_4": { @@ -15836,7 +15441,7 @@ }, "attributes": { "module_not_derived": "00000000000000000000000000000001", - "src": "top.v:273.12-282.5|lvds_rx.v:39.5-82.8|/usr/local/bin/../share/yosys/ice40/ff_map.v:22.66-22.119" + "src": "top.v:272.12-281.5|lvds_rx.v:39.5-82.8|/usr/local/bin/../share/yosys/ice40/ff_map.v:22.66-22.119" }, "port_directions": { "C": "input", @@ -15846,11 +15451,11 @@ "R": "input" }, "connections": { - "C": [ 200 ], - "D": [ 421 ], - "E": [ 369 ], - "Q": [ 422 ], - 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- "I0": [ 447 ], - "I1": [ 439 ], - "I2": [ 455 ], - "I3": [ 445 ], - "O": [ 491 ] + "I1": [ 457 ], + "I2": [ 458 ], + "I3": [ 56 ], + "O": [ 456 ] } }, "lvds_rx_24_inst.r_state_if_SB_LUT4_I2": { @@ -16858,9 +16338,9 @@ "connections": { "I0": [ "0" ], "I1": [ "0" ], - "I2": [ 447 ], - "I3": [ 445 ], - "O": [ 449 ] + "I2": [ 413 ], + "I3": [ 414 ], + "O": [ 421 ] } }, "lvds_rx_24_inst.r_state_if_SB_LUT4_I2_1": { @@ -16883,9 +16363,9 @@ "connections": { "I0": [ "0" ], "I1": [ "0" ], - "I2": [ 447 ], - "I3": [ 445 ], - "O": [ 440 ] + "I2": [ 413 ], + "I3": [ 414 ], + "O": [ 412 ] } }, "o_miso_$_TBUF__Y": { @@ -16902,8 +16382,8 @@ "Y": "output" }, "connections": { - "A": [ 492 ], - "E": [ 88 ], + "A": [ 459 ], + "E": [ 93 ], "Y": [ 45 ] } }, @@ -16913,7 +16393,7 @@ "parameters": { }, "attributes": { - "src": "top.v:340.28-340.63" + "src": "top.v:339.28-339.63" }, "port_directions": { "A": "input", @@ -16921,7 +16401,7 @@ "Y": "output" }, "connections": { - "A": [ 199 ], + "A": [ 201 ], "E": [ 30 ], "Y": [ 41 ] } @@ -16932,7 +16412,7 @@ "parameters": { }, "attributes": { - "src": "top.v:339.29-339.65" + "src": "top.v:338.29-338.65" }, "port_directions": { "A": "input", @@ -16952,7 +16432,7 @@ }, "attributes": { "module_not_derived": "00000000000000000000000000000001", - "src": "top.v:168.4-179.7|/usr/local/bin/../share/yosys/ice40/ff_map.v:24.66-24.119" + "src": "top.v:167.4-178.7|/usr/local/bin/../share/yosys/ice40/ff_map.v:24.66-24.119" }, "port_directions": { "C": "input", @@ -16963,10 +16443,10 @@ }, "connections": { "C": [ 2 ], - "D": [ 493 ], - "E": [ 494 ], - "Q": [ 495 ], - "R": [ 496 ] + "D": [ 460 ], + "E": [ 461 ], + "Q": [ 462 ], + "R": [ 463 ] } }, "r_tx_data_SB_DFFESR_Q_1": { @@ -16976,7 +16456,7 @@ }, "attributes": { "module_not_derived": "00000000000000000000000000000001", - "src": "top.v:168.4-179.7|/usr/local/bin/../share/yosys/ice40/ff_map.v:24.66-24.119" + "src": "top.v:167.4-178.7|/usr/local/bin/../share/yosys/ice40/ff_map.v:24.66-24.119" }, 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"top.v:168.4-179.7|/usr/local/bin/../share/yosys/ice40/ff_map.v:24.66-24.119" + "src": "top.v:167.4-178.7|/usr/local/bin/../share/yosys/ice40/ff_map.v:24.66-24.119" }, "port_directions": { "C": "input", @@ -17083,10 +16563,10 @@ }, "connections": { "C": [ 2 ], - "D": [ 505 ], - "E": [ 494 ], - "Q": [ 506 ], - "R": [ 496 ] + "D": [ 472 ], + "E": [ 461 ], + "Q": [ 473 ], + "R": [ 463 ] } }, "r_tx_data_SB_DFFESR_Q_5_D_SB_LUT4_O": { @@ -17109,9 +16589,9 @@ "connections": { "I0": [ "0" ], "I1": [ "0" ], - "I2": [ 507 ], - "I3": [ 159 ], - "O": [ 505 ] + "I2": [ 474 ], + "I3": [ 161 ], + "O": [ 472 ] } }, "r_tx_data_SB_DFFESR_Q_5_D_SB_LUT4_O_1": { @@ -17134,9 +16614,9 @@ "connections": { "I0": [ "0" ], "I1": [ "0" ], - "I2": [ 507 ], - "I3": [ 148 ], - "O": [ 501 ] + "I2": [ 474 ], + "I3": [ 145 ], + "O": [ 468 ] } }, "r_tx_data_SB_DFFESR_Q_6": { @@ -17146,7 +16626,7 @@ }, "attributes": { "module_not_derived": "00000000000000000000000000000001", - "src": "top.v:168.4-179.7|/usr/local/bin/../share/yosys/ice40/ff_map.v:24.66-24.119" + "src": "top.v:167.4-178.7|/usr/local/bin/../share/yosys/ice40/ff_map.v:24.66-24.119" }, "port_directions": { "C": "input", @@ -17157,10 +16637,10 @@ }, "connections": { "C": [ 2 ], - "D": [ 508 ], - "E": [ 494 ], - "Q": [ 509 ], - "R": [ 496 ] + "D": [ 475 ], + "E": [ 461 ], + "Q": [ 476 ], + "R": [ 463 ] } }, "r_tx_data_SB_DFFE_Q": { @@ -17170,7 +16650,7 @@ }, "attributes": { "module_not_derived": "00000000000000000000000000000001", - "src": "top.v:168.4-179.7|/usr/local/bin/../share/yosys/ice40/ff_map.v:5.57-5.103" + "src": "top.v:167.4-178.7|/usr/local/bin/../share/yosys/ice40/ff_map.v:5.57-5.103" }, "port_directions": { "C": "input", @@ -17180,9 +16660,9 @@ }, "connections": { "C": [ 2 ], - "D": [ 510 ], - "E": [ 494 ], - "Q": [ 511 ] + "D": [ 477 ], + "E": [ 461 ], + "Q": [ 478 ] } }, "rx_09_fifo.full_o_SB_DFFSR_Q": { @@ -17192,7 +16672,7 @@ }, "attributes": { "module_not_derived": "00000000000000000000000000000001", - "src": "top.v:260.17-271.5|complex_fifo.v:53.1-59.71|/usr/local/bin/../share/yosys/ice40/ff_map.v:19.59-19.105" + "src": "top.v:259.17-270.5|complex_fifo.v:53.1-59.71|/usr/local/bin/../share/yosys/ice40/ff_map.v:19.59-19.105" }, "port_directions": { "C": "input", @@ -17201,10 +16681,10 @@ "R": "input" }, "connections": { - "C": [ 200 ], - "D": [ 512 ], - "Q": [ 329 ], - "R": [ 93 ] + "C": [ 202 ], + "D": [ 479 ], + "Q": [ 302 ], + "R": [ 56 ] } }, "rx_09_fifo.full_o_SB_DFFSR_Q_D_SB_LUT4_O": { @@ -17226,17 +16706,17 @@ }, "connections": { "I0": [ "0" ], - "I1": [ 513 ], - "I2": [ 514 ], - "I3": [ 515 ], - "O": [ 512 ] + "I1": [ 480 ], + "I2": [ 481 ], + "I3": [ 482 ], + "O": [ 479 ] } }, "rx_09_fifo.full_o_SB_DFFSR_Q_D_SB_LUT4_O_I1_SB_LUT4_O": { "hide_name": 0, "type": "SB_LUT4", "parameters": { - "LUT_INIT": "0001010000000000" + "LUT_INIT": "1000000000000000" }, "attributes": { "module_not_derived": "00000000000000000000000000000001", @@ -17250,18 +16730,18 @@ "O": "output" }, "connections": { - "I0": [ 516 ], - "I1": [ 517 ], - "I2": [ 518 ], - "I3": [ 519 ], - "O": [ 514 ] + "I0": [ 333 ], + "I1": [ 327 ], + "I2": [ 306 ], + "I3": [ 324 ], + "O": [ 480 ] } }, "rx_09_fifo.full_o_SB_DFFSR_Q_D_SB_LUT4_O_I1_SB_LUT4_O_1": { "hide_name": 0, "type": "SB_LUT4", "parameters": { - "LUT_INIT": "1000000100000000" + "LUT_INIT": "1110000000001011" }, "attributes": { "module_not_derived": "00000000000000000000000000000001", @@ -17275,136 +16755,11 @@ "O": "output" }, "connections": { - "I0": [ 520 ], - "I1": [ 521 ], - "I2": [ 353 ], - "I3": [ 342 ], - "O": [ 513 ] - } - }, - "rx_09_fifo.full_o_SB_DFFSR_Q_D_SB_LUT4_O_I1_SB_LUT4_O_I0_SB_LUT4_O": { - "hide_name": 0, - "type": "SB_LUT4", - "parameters": { - "LUT_INIT": "1110101101111101" - }, - "attributes": { - "module_not_derived": "00000000000000000000000000000001", - "src": "/usr/local/bin/../share/yosys/ice40/cells_map.v:26.33-27.52" - }, - "port_directions": { - "I0": "input", - "I1": "input", - "I2": "input", - "I3": "input", - "O": "output" - }, - "connections": { - "I0": [ 522 ], - "I1": [ 523 ], - "I2": [ 360 ], - "I3": [ 363 ], - "O": [ 516 ] - } - }, - "rx_09_fifo.full_o_SB_DFFSR_Q_D_SB_LUT4_O_I1_SB_LUT4_O_I0_SB_LUT4_O_1": { - "hide_name": 0, - "type": "SB_LUT4", - "parameters": { - "LUT_INIT": "0000000011010111" - }, - "attributes": { - "module_not_derived": "00000000000000000000000000000001", - "src": "/usr/local/bin/../share/yosys/ice40/cells_map.v:26.33-27.52" - }, - "port_directions": { - "I0": "input", - "I1": "input", - "I2": "input", - "I3": "input", - "O": "output" - }, - "connections": { - "I0": [ 344 ], - "I1": [ 345 ], - "I2": [ 346 ], - "I3": [ 524 ], - "O": [ 519 ] - } - }, - "rx_09_fifo.full_o_SB_DFFSR_Q_D_SB_LUT4_O_I1_SB_LUT4_O_I0_SB_LUT4_O_1_I3_SB_LUT4_O": { - "hide_name": 0, - "type": "SB_LUT4", - "parameters": { - "LUT_INIT": "0011000000000011" - }, - "attributes": { - "module_not_derived": "00000000000000000000000000000001", - "src": "/usr/local/bin/../share/yosys/ice40/cells_map.v:22.34-23.52" - }, - "port_directions": { - "I0": "input", - "I1": "input", - "I2": "input", - "I3": "input", - "O": "output" - }, - "connections": { - "I0": [ "0" ], - "I1": [ 351 ], - "I2": [ 345 ], - "I3": [ 350 ], - "O": [ 524 ] - } - }, - "rx_09_fifo.full_o_SB_DFFSR_Q_D_SB_LUT4_O_I1_SB_LUT4_O_I0_SB_LUT4_O_2": { - "hide_name": 0, - "type": "SB_LUT4", - "parameters": { - "LUT_INIT": "1111000000001111" - }, - "attributes": { - "module_not_derived": "00000000000000000000000000000001", - "src": "/usr/local/bin/../share/yosys/ice40/cells_map.v:17.34-18.52" - }, - "port_directions": { - "I0": "input", - "I1": "input", - "I2": "input", - "I3": "input", - "O": "output" - }, - "connections": { - "I0": [ "0" ], - "I1": [ "0" ], - "I2": [ 360 ], - "I3": [ 348 ], - "O": [ 518 ] - } - }, - "rx_09_fifo.full_o_SB_DFFSR_Q_D_SB_LUT4_O_I1_SB_LUT4_O_I0_SB_LUT4_O_I0_SB_LUT4_O": { - "hide_name": 0, - "type": "SB_LUT4", - "parameters": { - "LUT_INIT": "1111000000001111" - }, - "attributes": { - "module_not_derived": "00000000000000000000000000000001", - "src": "/usr/local/bin/../share/yosys/ice40/cells_map.v:17.34-18.52" - }, - "port_directions": { - "I0": "input", - "I1": "input", - "I2": "input", - "I3": "input", - "O": "output" - }, - "connections": { - "I0": [ "0" ], - "I1": [ "0" ], - "I2": [ 525 ], - "I3": [ 346 ], - "O": [ 522 ] + "I0": [ 331 ], + "I1": [ 313 ], + "I2": [ 316 ], + "I3": [ 330 ], + "O": [ 481 ] } }, "rx_09_fifo.full_o_SB_LUT4_I3": { @@ -17425,11 +16780,11 @@ "O": "output" }, "connections": { - "I0": [ 327 ], - "I1": [ 526 ], - "I2": [ 520 ], - "I3": [ 329 ], - "O": [ 527 ] + "I0": [ 301 ], + "I1": [ 483 ], + "I2": [ 322 ], + "I3": [ 302 ], + "O": [ 484 ] } }, "rx_09_fifo.full_o_SB_LUT4_I3_O_SB_LUT4_I3": { @@ -17450,11 +16805,11 @@ "O": "output" }, "connections": { - "I0": [ 525 ], - "I1": [ 528 ], - "I2": [ 529 ], - "I3": [ 527 ], - "O": [ 530 ] + "I0": [ 334 ], + "I1": [ 485 ], + "I2": [ 486 ], + "I3": [ 484 ], + "O": [ 487 ] } }, "rx_09_fifo.full_o_SB_LUT4_I3_O_SB_LUT4_I3_O_SB_LUT4_I0": { @@ -17475,11 +16830,11 @@ "O": "output" }, "connections": { - "I0": [ 531 ], - "I1": [ 530 ], - "I2": [ 532 ], - "I3": [ 533 ], - "O": [ 515 ] + "I0": [ 488 ], + "I1": [ 489 ], + "I2": [ 490 ], + "I3": [ 487 ], + "O": [ 482 ] } }, "rx_09_fifo.full_o_SB_LUT4_I3_O_SB_LUT4_I3_O_SB_LUT4_O": { @@ -17500,11 +16855,11 @@ "O": "output" }, "connections": { - "I0": [ 351 ], - "I1": [ 534 ], - "I2": [ 344 ], - "I3": [ 535 ], - "O": [ 531 ] + "I0": [ 331 ], + "I1": [ 491 ], + "I2": [ 335 ], + "I3": [ 492 ], + "O": [ 489 ] } }, "rx_09_fifo.full_o_SB_LUT4_I3_O_SB_LUT4_I3_O_SB_LUT4_O_1": { @@ -17525,11 +16880,11 @@ "O": "output" }, "connections": { - "I0": [ 517 ], - "I1": [ 536 ], - "I2": [ 537 ], - "I3": [ 352 ], - "O": [ 533 ] + "I0": [ 326 ], + "I1": [ 493 ], + "I2": [ 494 ], + "I3": [ 303 ], + "O": [ 488 ] } }, "rx_09_fifo.full_o_SB_LUT4_I3_O_SB_LUT4_I3_O_SB_LUT4_O_2": { @@ -17550,11 +16905,11 @@ "O": "output" }, "connections": { - "I0": [ 523 ], - "I1": [ 538 ], - "I2": [ 539 ], - "I3": [ 347 ], - "O": [ 532 ] + "I0": [ 495 ], + "I1": [ 321 ], + "I2": [ 329 ], + "I3": [ 496 ], + "O": [ 490 ] } }, "rx_09_fifo.ram256x16_i_inst": { @@ -17583,7 +16938,7 @@ "attributes": { "hdlname": "rx_09_fifo ram256x16_i_inst", "module_not_derived": "00000000000000000000000000000001", - "src": "top.v:260.17-271.5|complex_fifo.v:105.3-116.22" + "src": "top.v:259.17-270.5|complex_fifo.v:105.3-116.22" }, "port_directions": { "MASK": "input", @@ -17600,16 +16955,16 @@ }, "connections": { "MASK": [ "1", "1", "1", "1", "1", "1", "1", "1", "1", "1", "1", "1", "1", "1", "1", "1" ], - "RADDR": [ 232, 240, 237, 238, 235, 236, 212, 243, "0", "0", "0" ], - "RCLK": [ 89 ], + "RADDR": [ 497, 498, 499, 500, 501, 502, 503, 504, "0", "0", "0" ], + "RCLK": [ 94 ], "RCLKE": [ "1" ], - "RDATA": [ 540, 541, 542, 543, 544, 545, 546, 547, 548, 549, 550, 551, 552, 553, 554, 555 ], - "RE": [ 556 ], - "WADDR": [ 350, 345, 364, 361, 358, 356, 354, 557, "0", "0", "0" ], - "WCLK": [ 200 ], + "RDATA": [ 505, 506, 507, 508, 509, 510, 511, 512, 513, 514, 515, 516, 517, 518, 519, 520 ], + "RE": [ 521 ], + "WADDR": [ 328, 320, 319, 317, 314, 311, 308, 522, "0", "0", "0" ], + "WCLK": [ 202 ], "WCLKE": [ "1" ], - "WDATA": [ 275, 273, 271, 269, 267, 265, 315, 313, 311, 309, 307, 305, 303, 285, 263, 261 ], - "WE": [ 327 ] + "WDATA": [ 240, 238, 236, 234, 232, 230, 280, 278, 276, 274, 272, 270, 268, 250, 228, 226 ], + "WE": [ 301 ] } }, "rx_09_fifo.ram256x16_q_inst": { @@ -17638,7 +16993,7 @@ "attributes": { "hdlname": "rx_09_fifo ram256x16_q_inst", "module_not_derived": "00000000000000000000000000000001", - "src": "top.v:260.17-271.5|complex_fifo.v:137.3-148.22" + "src": "top.v:259.17-270.5|complex_fifo.v:137.3-148.22" }, "port_directions": { "MASK": "input", @@ -17655,16 +17010,16 @@ }, "connections": { "MASK": [ "1", "1", "1", "1", "1", "1", "1", "1", "1", "1", "1", "1", "1", "1", "1", "1" ], - "RADDR": [ 232, 240, 237, 238, 235, 236, 212, 243, "0", "0", "0" ], - "RCLK": [ 89 ], + "RADDR": [ 497, 498, 499, 500, 501, 502, 503, 504, "0", "0", "0" ], + "RCLK": [ 94 ], "RCLKE": [ "1" ], - "RDATA": [ 68, 558, 559, 560, 561, 562, 563, 564, 565, 566, 567, 568, 569, 570, 571, 572 ], - "RE": [ 556 ], - "WADDR": [ 350, 345, 364, 361, 358, 356, 354, 557, "0", "0", "0" ], - "WCLK": [ 200 ], + "RDATA": [ 73, 523, 524, 525, 526, 527, 528, 529, 530, 531, 532, 533, 534, 535, 536, 537 ], + "RE": [ 521 ], + "WADDR": [ 328, 320, 319, 317, 314, 311, 308, 522, "0", "0", "0" ], + "WCLK": [ 202 ], "WCLKE": [ "1" ], - "WDATA": [ 301, 299, 22, 23, 24, 25, 297, 295, 293, 291, 289, 287, 283, 281, 279, 277 ], - "WE": [ 327 ] + "WDATA": [ 266, 264, 22, 23, 24, 25, 262, 260, 258, 256, 254, 252, 248, 246, 244, 242 ], + "WE": [ 301 ] } }, "rx_09_fifo.rd_addr_SB_DFFESR_Q": { @@ -17674,7 +17029,7 @@ }, "attributes": { "module_not_derived": "00000000000000000000000000000001", - "src": "top.v:260.17-271.5|complex_fifo.v:61.1-69.4|/usr/local/bin/../share/yosys/ice40/ff_map.v:24.66-24.119" + "src": "top.v:259.17-270.5|complex_fifo.v:61.1-69.4|/usr/local/bin/../share/yosys/ice40/ff_map.v:24.66-24.119" }, "port_directions": { "C": "input", @@ -17684,11 +17039,11 @@ "R": "input" }, "connections": { - "C": [ 89 ], - "D": [ 226 ], - "E": [ 573 ], - "Q": [ 212 ], - "R": [ 93 ] + "C": [ 94 ], + "D": [ 538 ], + "E": [ 539 ], + "Q": [ 503 ], + "R": [ 56 ] } }, "rx_09_fifo.rd_addr_SB_DFFESR_Q_1": { @@ -17698,7 +17053,7 @@ }, "attributes": { "module_not_derived": "00000000000000000000000000000001", - "src": "top.v:260.17-271.5|complex_fifo.v:61.1-69.4|/usr/local/bin/../share/yosys/ice40/ff_map.v:24.66-24.119" + "src": "top.v:259.17-270.5|complex_fifo.v:61.1-69.4|/usr/local/bin/../share/yosys/ice40/ff_map.v:24.66-24.119" }, "port_directions": { "C": "input", @@ -17708,11 +17063,11 @@ "R": "input" }, "connections": { - "C": [ 89 ], - "D": [ 224 ], - "E": [ 573 ], - "Q": [ 236 ], - "R": [ 93 ] + "C": [ 94 ], + "D": [ 540 ], + "E": [ 539 ], + "Q": [ 502 ], + "R": [ 56 ] } }, "rx_09_fifo.rd_addr_SB_DFFESR_Q_2": { @@ -17722,7 +17077,7 @@ }, "attributes": { "module_not_derived": "00000000000000000000000000000001", - "src": "top.v:260.17-271.5|complex_fifo.v:61.1-69.4|/usr/local/bin/../share/yosys/ice40/ff_map.v:24.66-24.119" + "src": "top.v:259.17-270.5|complex_fifo.v:61.1-69.4|/usr/local/bin/../share/yosys/ice40/ff_map.v:24.66-24.119" }, "port_directions": { "C": "input", @@ -17732,11 +17087,11 @@ "R": "input" }, "connections": { - "C": [ 89 ], - "D": [ 219 ], - "E": [ 573 ], - "Q": [ 235 ], - "R": [ 93 ] + "C": [ 94 ], + "D": [ 541 ], + "E": [ 539 ], + "Q": [ 501 ], + "R": [ 56 ] } }, "rx_09_fifo.rd_addr_SB_DFFESR_Q_3": { @@ -17746,7 +17101,7 @@ }, "attributes": { "module_not_derived": "00000000000000000000000000000001", - "src": "top.v:260.17-271.5|complex_fifo.v:61.1-69.4|/usr/local/bin/../share/yosys/ice40/ff_map.v:24.66-24.119" + "src": "top.v:259.17-270.5|complex_fifo.v:61.1-69.4|/usr/local/bin/../share/yosys/ice40/ff_map.v:24.66-24.119" }, "port_directions": { "C": "input", @@ -17756,11 +17111,11 @@ "R": "input" }, "connections": { - "C": [ 89 ], - "D": [ 228 ], - "E": [ 573 ], - "Q": [ 238 ], - "R": [ 93 ] + "C": [ 94 ], + "D": [ 542 ], + "E": [ 539 ], + "Q": [ 500 ], + "R": [ 56 ] } }, "rx_09_fifo.rd_addr_SB_DFFESR_Q_4": { @@ -17770,7 +17125,7 @@ }, "attributes": { "module_not_derived": "00000000000000000000000000000001", - "src": "top.v:260.17-271.5|complex_fifo.v:61.1-69.4|/usr/local/bin/../share/yosys/ice40/ff_map.v:24.66-24.119" + "src": "top.v:259.17-270.5|complex_fifo.v:61.1-69.4|/usr/local/bin/../share/yosys/ice40/ff_map.v:24.66-24.119" }, "port_directions": { "C": "input", @@ -17780,11 +17135,11 @@ "R": "input" }, "connections": { - "C": [ 89 ], - "D": [ 231 ], - "E": [ 573 ], - "Q": [ 237 ], - "R": [ 93 ] + "C": [ 94 ], + "D": [ 543 ], + "E": [ 539 ], + "Q": [ 499 ], + "R": [ 56 ] } }, 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], + "D": [ 580 ], + "E": [ 539 ], + "Q": [ 581 ], + "R": [ 56 ] } }, "rx_09_fifo.rd_addr_gray_SB_DFFESR_Q_6_D_SB_LUT4_O": { @@ -18198,9 +17928,9 @@ "connections": { "I0": [ "0" ], "I1": [ "0" ], - "I2": [ 230 ], - "I3": [ 231 ], - "O": [ 588 ] + "I2": [ 544 ], + "I3": [ 543 ], + "O": [ 580 ] } }, "rx_09_fifo.rd_addr_gray_SB_DFFESR_Q_7": { @@ -18210,7 +17940,7 @@ }, "attributes": { "module_not_derived": "00000000000000000000000000000001", - "src": "top.v:260.17-271.5|complex_fifo.v:61.1-69.4|/usr/local/bin/../share/yosys/ice40/ff_map.v:24.66-24.119" + "src": "top.v:259.17-270.5|complex_fifo.v:61.1-69.4|/usr/local/bin/../share/yosys/ice40/ff_map.v:24.66-24.119" }, "port_directions": { "C": "input", @@ -18220,11 +17950,11 @@ "R": "input" }, "connections": { - "C": [ 89 ], - "D": [ 590 ], - "E": [ 573 ], - "Q": [ 591 ], - "R": [ 93 ] + "C": [ 94 ], + "D": [ 582 ], + "E": [ 539 ], + "Q": [ 583 ], + "R": [ 56 ] } }, "rx_09_fifo.rd_addr_gray_SB_DFFESR_Q_7_D_SB_LUT4_O": { @@ -18247,9 +17977,9 @@ "connections": { "I0": [ "0" ], "I1": [ "0" ], - "I2": [ 232 ], - "I3": [ 230 ], - "O": [ 590 ] + "I2": [ 497 ], + "I3": [ 544 ], + "O": [ 582 ] } }, "rx_09_fifo.rd_addr_gray_SB_LUT4_I2": { @@ -18260,7 +17990,7 @@ }, "attributes": { "module_not_derived": "00000000000000000000000000000001", - "src": "top.v:260.17-271.5|complex_fifo.v:66.14-66.28|/usr/local/bin/../share/yosys/ice40/arith_map.v:62.5-70.4|/usr/local/bin/../share/yosys/ice40/cells_map.v:26.33-27.52" + "src": "top.v:259.17-270.5|complex_fifo.v:66.14-66.28|/usr/local/bin/../share/yosys/ice40/arith_map.v:62.5-70.4|/usr/local/bin/../share/yosys/ice40/cells_map.v:26.33-27.52" }, "port_directions": { "I0": "input", @@ -18272,9 +18002,9 @@ "connections": { "I0": [ "0" ], "I1": [ "0" ], - "I2": [ 243 ], - "I3": [ 592 ], - "O": [ 575 ] + "I2": [ 504 ], + "I3": [ 584 ], + "O": [ 546 ] } }, "rx_09_fifo.rd_addr_gray_SB_LUT4_I2_I3_SB_CARRY_CO": { @@ -18283,7 +18013,7 @@ "parameters": { }, "attributes": { - "src": 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} }, "rx_09_fifo.rd_addr_gray_SB_LUT4_I2_I3_SB_CARRY_CO_2": { @@ -18325,7 +18055,7 @@ "parameters": { }, "attributes": { - "src": "top.v:260.17-271.5|complex_fifo.v:66.14-66.28|/usr/local/bin/../share/yosys/ice40/arith_map.v:62.5-70.4" + "src": "top.v:259.17-270.5|complex_fifo.v:66.14-66.28|/usr/local/bin/../share/yosys/ice40/arith_map.v:62.5-70.4" }, "port_directions": { "CI": "input", @@ -18334,10 +18064,10 @@ "I1": "input" }, "connections": { - "CI": [ 595 ], - "CO": [ 594 ], + "CI": [ 587 ], + "CO": [ 586 ], "I0": [ "0" ], - "I1": [ 235 ] + "I1": [ 501 ] } }, "rx_09_fifo.rd_addr_gray_SB_LUT4_I2_I3_SB_CARRY_CO_3": { @@ -18346,7 +18076,7 @@ "parameters": { }, "attributes": { - "src": "top.v:260.17-271.5|complex_fifo.v:66.14-66.28|/usr/local/bin/../share/yosys/ice40/arith_map.v:62.5-70.4" + "src": "top.v:259.17-270.5|complex_fifo.v:66.14-66.28|/usr/local/bin/../share/yosys/ice40/arith_map.v:62.5-70.4" }, "port_directions": { "CI": "input", @@ -18355,10 +18085,10 @@ "I1": "input" }, "connections": { - "CI": [ 596 ], - "CO": [ 595 ], + "CI": [ 588 ], + "CO": [ 587 ], "I0": [ "0" ], - "I1": [ 238 ] + "I1": [ 500 ] } }, "rx_09_fifo.rd_addr_gray_SB_LUT4_I2_I3_SB_CARRY_CO_4": { @@ -18367,7 +18097,7 @@ "parameters": { }, "attributes": { - "src": "top.v:260.17-271.5|complex_fifo.v:66.14-66.28|/usr/local/bin/../share/yosys/ice40/arith_map.v:62.5-70.4" + "src": "top.v:259.17-270.5|complex_fifo.v:66.14-66.28|/usr/local/bin/../share/yosys/ice40/arith_map.v:62.5-70.4" }, "port_directions": { "CI": "input", @@ -18376,10 +18106,10 @@ "I1": "input" }, "connections": { - "CI": [ 597 ], - "CO": [ 596 ], + "CI": [ 589 ], + "CO": [ 588 ], "I0": [ "0" ], - "I1": [ 237 ] + "I1": [ 499 ] } }, "rx_09_fifo.rd_addr_gray_SB_LUT4_I2_I3_SB_CARRY_CO_5": { @@ -18388,7 +18118,7 @@ "parameters": { }, "attributes": { - "src": "top.v:260.17-271.5|complex_fifo.v:66.14-66.28|/usr/local/bin/../share/yosys/ice40/arith_map.v:62.5-70.4" + "src": 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], + "I3": [ 585 ], + "O": [ 538 ] } }, "rx_09_fifo.rd_addr_gray_SB_LUT4_I2_O_SB_LUT4_O_1": { @@ -18436,7 +18166,7 @@ }, "attributes": { "module_not_derived": "00000000000000000000000000000001", - "src": "top.v:260.17-271.5|complex_fifo.v:66.14-66.28|/usr/local/bin/../share/yosys/ice40/arith_map.v:62.5-70.4|/usr/local/bin/../share/yosys/ice40/cells_map.v:26.33-27.52" + "src": "top.v:259.17-270.5|complex_fifo.v:66.14-66.28|/usr/local/bin/../share/yosys/ice40/arith_map.v:62.5-70.4|/usr/local/bin/../share/yosys/ice40/cells_map.v:26.33-27.52" }, "port_directions": { "I0": "input", @@ -18448,9 +18178,9 @@ "connections": { "I0": [ "0" ], "I1": [ "0" ], - "I2": [ 236 ], - "I3": [ 594 ], - "O": [ 224 ] + "I2": [ 502 ], + "I3": [ 586 ], + "O": [ 540 ] } }, "rx_09_fifo.rd_addr_gray_SB_LUT4_I2_O_SB_LUT4_O_2": { @@ -18461,7 +18191,7 @@ }, "attributes": { "module_not_derived": "00000000000000000000000000000001", - "src": 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545 ] } }, "rx_09_fifo.rd_addr_gray_wr_SB_DFF_Q": { @@ -18585,7 +18315,7 @@ }, "attributes": { "module_not_derived": "00000000000000000000000000000001", - "src": "top.v:260.17-271.5|complex_fifo.v:48.1-51.4|/usr/local/bin/../share/yosys/ice40/ff_map.v:2.51-2.90" + "src": "top.v:259.17-270.5|complex_fifo.v:48.1-51.4|/usr/local/bin/../share/yosys/ice40/ff_map.v:2.51-2.90" }, "port_directions": { "C": "input", @@ -18593,9 +18323,9 @@ "Q": "output" }, "connections": { - "C": [ 200 ], - "D": [ 243 ], - "Q": [ 598 ] + "C": [ 202 ], + "D": [ 504 ], + "Q": [ 590 ] } }, "rx_09_fifo.rd_addr_gray_wr_SB_DFF_Q_1": { @@ -18605,7 +18335,7 @@ }, "attributes": { "module_not_derived": "00000000000000000000000000000001", - "src": "top.v:260.17-271.5|complex_fifo.v:48.1-51.4|/usr/local/bin/../share/yosys/ice40/ff_map.v:2.51-2.90" + "src": "top.v:259.17-270.5|complex_fifo.v:48.1-51.4|/usr/local/bin/../share/yosys/ice40/ff_map.v:2.51-2.90" }, "port_directions": { "C": "input", @@ -18613,9 +18343,9 @@ "Q": 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"top.v:259.17-270.5|complex_fifo.v:48.1-51.4|/usr/local/bin/../share/yosys/ice40/ff_map.v:2.51-2.90" }, "port_directions": { "C": "input", @@ -18653,9 +18383,9 @@ "Q": "output" }, "connections": { - "C": [ 200 ], - "D": [ 583 ], - "Q": [ 601 ] + "C": [ 202 ], + "D": [ 574 ], + "Q": [ 593 ] } }, "rx_09_fifo.rd_addr_gray_wr_SB_DFF_Q_4": { @@ -18665,7 +18395,7 @@ }, "attributes": { "module_not_derived": "00000000000000000000000000000001", - "src": "top.v:260.17-271.5|complex_fifo.v:48.1-51.4|/usr/local/bin/../share/yosys/ice40/ff_map.v:2.51-2.90" + "src": "top.v:259.17-270.5|complex_fifo.v:48.1-51.4|/usr/local/bin/../share/yosys/ice40/ff_map.v:2.51-2.90" }, "port_directions": { "C": "input", @@ -18673,9 +18403,9 @@ "Q": "output" }, "connections": { - "C": [ 200 ], - "D": [ 585 ], - "Q": [ 602 ] + "C": [ 202 ], + "D": [ 577 ], + "Q": [ 594 ] } }, "rx_09_fifo.rd_addr_gray_wr_SB_DFF_Q_5": { @@ -18685,7 +18415,7 @@ }, "attributes": { "module_not_derived": "00000000000000000000000000000001", - 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"rx_09_fifo.rd_addr_gray_wr_SB_DFF_Q_7": { @@ -18725,7 +18455,7 @@ }, "attributes": { "module_not_derived": "00000000000000000000000000000001", - "src": "top.v:260.17-271.5|complex_fifo.v:48.1-51.4|/usr/local/bin/../share/yosys/ice40/ff_map.v:2.51-2.90" + "src": "top.v:259.17-270.5|complex_fifo.v:48.1-51.4|/usr/local/bin/../share/yosys/ice40/ff_map.v:2.51-2.90" }, "port_directions": { "C": "input", @@ -18733,9 +18463,9 @@ "Q": "output" }, "connections": { - "C": [ 200 ], - "D": [ 591 ], - "Q": [ 605 ] + "C": [ 202 ], + "D": [ 583 ], + "Q": [ 597 ] } }, "rx_09_fifo.rd_addr_gray_wr_r_SB_DFF_Q": { @@ -18745,7 +18475,7 @@ }, "attributes": { "module_not_derived": "00000000000000000000000000000001", - "src": "top.v:260.17-271.5|complex_fifo.v:48.1-51.4|/usr/local/bin/../share/yosys/ice40/ff_map.v:2.51-2.90" + "src": "top.v:259.17-270.5|complex_fifo.v:48.1-51.4|/usr/local/bin/../share/yosys/ice40/ff_map.v:2.51-2.90" }, "port_directions": { "C": "input", @@ -18753,9 +18483,9 @@ "Q": "output" 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], - "D": [ 536 ], - "E": [ 343 ], - "Q": [ 613 ], - "R": [ 93 ] + "C": [ 202 ], + "D": [ 491 ], + "E": [ 307 ], + "Q": [ 605 ], + "R": [ 56 ] } }, "rx_09_fifo.wr_addr_gray_SB_DFFESR_Q_3_D_SB_LUT4_O": { @@ -19182,9 +18912,9 @@ "connections": { "I0": [ "0" ], "I1": [ "0" ], - "I2": [ 608 ], - "I3": [ 607 ], - "O": [ 536 ] + "I2": [ 599 ], + "I3": [ 598 ], + "O": [ 492 ] } }, "rx_09_fifo.wr_addr_gray_SB_DFFESR_Q_3_D_SB_LUT4_O_1": { @@ -19207,9 +18937,9 @@ "connections": { "I0": [ "0" ], "I1": [ "0" ], - "I2": [ 526 ], - "I3": [ 606 ], - "O": [ 537 ] + "I2": [ 486 ], + "I3": [ 599 ], + "O": [ 491 ] } }, "rx_09_fifo.wr_addr_gray_SB_DFFESR_Q_4": { @@ -19219,7 +18949,7 @@ }, "attributes": { "module_not_derived": "00000000000000000000000000000001", - "src": "top.v:260.17-271.5|complex_fifo.v:37.1-45.4|/usr/local/bin/../share/yosys/ice40/ff_map.v:24.66-24.119" + "src": "top.v:259.17-270.5|complex_fifo.v:37.1-45.4|/usr/local/bin/../share/yosys/ice40/ff_map.v:24.66-24.119" }, "port_directions": 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] } }, "rx_09_fifo.wr_addr_gray_SB_LUT4_I2_1_I3_SB_CARRY_CO_5": { @@ -19594,7 +19324,7 @@ "parameters": { }, "attributes": { - "src": "top.v:260.17-271.5|complex_fifo.v:42.14-42.28|/usr/local/bin/../share/yosys/ice40/arith_map.v:62.5-70.4" + "src": "top.v:259.17-270.5|complex_fifo.v:42.14-42.28|/usr/local/bin/../share/yosys/ice40/arith_map.v:62.5-70.4" }, "port_directions": { "CI": "input", @@ -19603,10 +19333,10 @@ "I1": "input" }, "connections": { - "CI": [ 350 ], - "CO": [ 625 ], + "CI": [ 328 ], + "CO": [ 617 ], "I0": [ "0" ], - "I1": [ 345 ] + "I1": [ 320 ] } }, "rx_09_fifo.wr_addr_gray_SB_LUT4_I2_1_O_SB_LUT4_O": { @@ -19617,7 +19347,7 @@ }, "attributes": { "module_not_derived": "00000000000000000000000000000001", - "src": "top.v:260.17-271.5|complex_fifo.v:42.14-42.28|/usr/local/bin/../share/yosys/ice40/arith_map.v:62.5-70.4|/usr/local/bin/../share/yosys/ice40/cells_map.v:26.33-27.52" + "src": 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+ "I3": [ 426 ], + "O": [ 669 ] } }, - "rx_24_fifo.full_o_SB_LUT4_I0_I1_SB_LUT4_O": { + "rx_24_fifo.full_o_SB_LUT4_I3_O_SB_LUT4_I1": { "hide_name": 0, "type": "SB_LUT4", "parameters": { - "LUT_INIT": "0100001010000001" + "LUT_INIT": "1001000000000000" }, "attributes": { "module_not_derived": "00000000000000000000000000000001", @@ -20421,14 +20401,64 @@ "O": "output" }, "connections": { - "I0": [ 464 ], - "I1": [ 652 ], - "I2": [ 465 ], - "I3": [ 653 ], - "O": [ 649 ] + "I0": [ 444 ], + "I1": [ 670 ], + "I2": [ 669 ], + "I3": [ 671 ], + "O": [ 663 ] } }, - "rx_24_fifo.full_o_SB_LUT4_I0_I1_SB_LUT4_O_1": { + "rx_24_fifo.full_o_SB_LUT4_I3_O_SB_LUT4_I1_O_SB_LUT4_O": { + "hide_name": 0, + "type": "SB_LUT4", + "parameters": { + "LUT_INIT": "1001000000001001" + }, + "attributes": { + "module_not_derived": "00000000000000000000000000000001", + "src": "/usr/local/bin/../share/yosys/ice40/cells_map.v:26.33-27.52" + }, + "port_directions": { + "I0": "input", + "I1": "input", + "I2": "input", + "I3": "input", + "O": "output" + }, + "connections": { + "I0": [ 661 ], + "I1": [ 672 ], + "I2": [ 673 ], + "I3": [ 442 ], + "O": [ 662 ] + } + }, + "rx_24_fifo.full_o_SB_LUT4_I3_O_SB_LUT4_I1_O_SB_LUT4_O_1": { + "hide_name": 0, + "type": "SB_LUT4", + "parameters": { + "LUT_INIT": "1001000000001001" + }, + "attributes": { + "module_not_derived": "00000000000000000000000000000001", + "src": "/usr/local/bin/../share/yosys/ice40/cells_map.v:26.33-27.52" + }, + "port_directions": { + "I0": "input", + "I1": "input", + "I2": "input", + "I3": "input", + "O": "output" + }, + "connections": { + "I0": [ 674 ], + "I1": [ 435 ], + "I2": [ 667 ], + "I3": [ 675 ], + "O": [ 665 ] + } + }, + "rx_24_fifo.full_o_SB_LUT4_I3_O_SB_LUT4_I1_O_SB_LUT4_O_2": { "hide_name": 0, "type": "SB_LUT4", "parameters": { @@ -20447,13 +20477,13 @@ }, "connections": { "I0": [ "0" ], - "I1": [ 476 ], - "I2": [ 654 ], - "I3": [ 655 ], - "O": [ 651 ] + "I1": [ 433 ], + "I2": [ 676 ], + "I3": [ 677 ], + "O": [ 664 ] } }, - "rx_24_fifo.full_o_SB_LUT4_I0_I1_SB_LUT4_O_2": { + "rx_24_fifo.full_o_SB_LUT4_I3_O_SB_LUT4_O": { "hide_name": 0, "type": "SB_LUT4", "parameters": { @@ -20472,21 +20502,21 @@ }, "connections": { "I0": [ "0" ], - "I1": [ 477 ], - "I2": [ 656 ], - "I3": [ 653 ], - "O": [ 650 ] + "I1": [ 439 ], + "I2": [ 678 ], + "I3": [ 679 ], + "O": [ 671 ] } }, - "rx_24_fifo.full_o_SB_LUT4_I0_O_SB_LUT4_O": { + "rx_24_fifo.full_o_SB_LUT4_I3_O_SB_LUT4_O_1": { "hide_name": 0, "type": "SB_LUT4", "parameters": { - "LUT_INIT": "1001000000001001" + "LUT_INIT": "0000111111110000" }, "attributes": { "module_not_derived": "00000000000000000000000000000001", - "src": "/usr/local/bin/../share/yosys/ice40/cells_map.v:26.33-27.52" + "src": "/usr/local/bin/../share/yosys/ice40/cells_map.v:17.34-18.52" }, "port_directions": { "I0": "input", @@ -20496,36 +20526,11 @@ "O": "output" }, "connections": { - "I0": [ 648 ], - "I1": [ 657 ], - "I2": [ 658 ], - "I3": [ 468 ], - "O": [ 457 ] - } - }, - "rx_24_fifo.full_o_SB_LUT4_I0_O_SB_LUT4_O_1": { - "hide_name": 0, - "type": "SB_LUT4", - "parameters": { - "LUT_INIT": "1001000000001001" - }, - "attributes": { - "module_not_derived": "00000000000000000000000000000001", - "src": "/usr/local/bin/../share/yosys/ice40/cells_map.v:26.33-27.52" - }, - "port_directions": { - "I0": "input", - "I1": "input", - "I2": "input", - "I3": "input", - "O": "output" - }, - "connections": { - "I0": [ 646 ], - "I1": [ 659 ], - "I2": [ 660 ], - "I3": [ 472 ], - "O": [ 458 ] + "I0": [ "0" ], + "I1": [ "0" ], + "I2": [ 679 ], + "I3": [ 676 ], + "O": [ 670 ] } }, "rx_24_fifo.ram256x16_i_inst": { @@ -20554,7 +20559,7 @@ "attributes": { "hdlname": "rx_24_fifo ram256x16_i_inst", "module_not_derived": "00000000000000000000000000000001", - "src": "top.v:284.17-295.5|complex_fifo.v:105.3-116.22" + "src": "top.v:283.17-294.5|complex_fifo.v:105.3-116.22" }, "port_directions": { "MASK": "input", @@ -20571,16 +20576,16 @@ }, "connections": { "MASK": [ "1", "1", "1", "1", "1", "1", "1", "1", "1", "1", "1", "1", "1", "1", "1", "1" ], - "RADDR": [ 661, 662, 663, 664, 665, 666, 667, 640, "0", "0", "0" ], - "RCLK": [ 89 ], + "RADDR": [ 654, 647, 644, 640, 641, 651, 650, 634, "0", "0", "0" ], + "RCLK": [ 94 ], "RCLKE": [ "1" ], - "RDATA": [ 668, 669, 670, 671, 672, 673, 674, 675, 676, 677, 678, 679, 680, 681, 682, 683 ], - "RE": [ 641 ], - "WADDR": [ 647, 487, 486, 484, 482, 480, 478, 684, "0", "0", "0" ], - "WCLK": [ 200 ], + "RDATA": [ 680, 681, 682, 683, 684, 685, 686, 687, 688, 689, 690, 691, 692, 693, 694, 695 ], + "RE": [ 58 ], + "WADDR": [ 666, 454, 453, 451, 449, 447, 445, 696, "0", "0", "0" ], + "WCLK": [ 202 ], "WCLKE": [ "1" ], - "WDATA": [ 384, 382, 380, 378, 376, 374, 432, 430, 428, 426, 424, 422, 416, 394, 372, 370 ], - "WE": [ 444 ] + "WDATA": [ 356, 354, 352, 350, 348, 346, 404, 402, 400, 398, 396, 394, 388, 366, 344, 342 ], + "WE": [ 425 ] } }, "rx_24_fifo.ram256x16_q_inst": { @@ -20609,7 +20614,7 @@ "attributes": { "hdlname": "rx_24_fifo ram256x16_q_inst", "module_not_derived": "00000000000000000000000000000001", - "src": "top.v:284.17-295.5|complex_fifo.v:137.3-148.22" + "src": "top.v:283.17-294.5|complex_fifo.v:137.3-148.22" }, "port_directions": { "MASK": "input", @@ -20626,16 +20631,16 @@ }, "connections": { "MASK": [ "1", "1", "1", "1", "1", "1", "1", "1", "1", "1", "1", "1", "1", "1", "1", "1" ], - "RADDR": [ 661, 662, 663, 664, 665, 666, 667, 640, "0", "0", "0" ], - "RCLK": [ 89 ], + "RADDR": [ 654, 647, 644, 640, 641, 651, 650, 634, "0", "0", "0" ], + "RCLK": [ 94 ], "RCLKE": [ "1" ], - "RDATA": [ 71, 685, 686, 687, 688, 689, 690, 691, 692, 693, 694, 695, 696, 697, 698, 699 ], - "RE": [ 641 ], - "WADDR": [ 647, 487, 486, 484, 482, 480, 478, 684, "0", "0", "0" ], - "WCLK": [ 200 ], + "RDATA": [ 76, 697, 698, 699, 700, 701, 702, 703, 704, 705, 706, 707, 708, 709, 710, 711 ], + "RE": [ 58 ], + "WADDR": [ 666, 454, 453, 451, 449, 447, 445, 696, "0", "0", "0" ], + "WCLK": [ 202 ], "WCLKE": [ "1" ], - "WDATA": [ 420, 418, 414, 412, 410, 408, 406, 404, 402, 400, 398, 396, 392, 390, 388, 386 ], - "WE": [ 444 ] + "WDATA": [ 392, 390, 386, 384, 382, 380, 378, 376, 374, 372, 370, 368, 364, 362, 360, 358 ], + "WE": [ 425 ] } }, "rx_24_fifo.rd_addr_SB_DFFESR_Q": { @@ -20645,7 +20650,7 @@ }, "attributes": { "module_not_derived": "00000000000000000000000000000001", - "src": "top.v:284.17-295.5|complex_fifo.v:61.1-69.4|/usr/local/bin/../share/yosys/ice40/ff_map.v:24.66-24.119" + "src": "top.v:283.17-294.5|complex_fifo.v:61.1-69.4|/usr/local/bin/../share/yosys/ice40/ff_map.v:24.66-24.119" }, "port_directions": { "C": "input", @@ -20655,11 +20660,11 @@ "R": "input" }, "connections": { - "C": [ 89 ], - "D": [ 700 ], - "E": [ 701 ], - "Q": [ 667 ], - "R": [ 93 ] + "C": [ 94 ], + "D": [ 712 ], + "E": [ 713 ], + "Q": [ 650 ], + "R": [ 56 ] } }, "rx_24_fifo.rd_addr_SB_DFFESR_Q_1": { @@ -20669,7 +20674,7 @@ }, "attributes": { "module_not_derived": "00000000000000000000000000000001", - "src": "top.v:284.17-295.5|complex_fifo.v:61.1-69.4|/usr/local/bin/../share/yosys/ice40/ff_map.v:24.66-24.119" + "src": "top.v:283.17-294.5|complex_fifo.v:61.1-69.4|/usr/local/bin/../share/yosys/ice40/ff_map.v:24.66-24.119" }, "port_directions": { "C": "input", @@ -20679,11 +20684,11 @@ "R": "input" }, "connections": { - "C": [ 89 ], - "D": [ 702 ], - "E": [ 701 ], - "Q": [ 666 ], - "R": [ 93 ] + "C": [ 94 ], + "D": [ 714 ], + "E": [ 713 ], + "Q": [ 651 ], + "R": [ 56 ] } }, "rx_24_fifo.rd_addr_SB_DFFESR_Q_2": { @@ -20693,7 +20698,7 @@ }, "attributes": { "module_not_derived": "00000000000000000000000000000001", - "src": "top.v:284.17-295.5|complex_fifo.v:61.1-69.4|/usr/local/bin/../share/yosys/ice40/ff_map.v:24.66-24.119" + "src": "top.v:283.17-294.5|complex_fifo.v:61.1-69.4|/usr/local/bin/../share/yosys/ice40/ff_map.v:24.66-24.119" }, "port_directions": { "C": "input", @@ -20703,11 +20708,11 @@ "R": "input" }, "connections": { - "C": [ 89 ], - "D": [ 703 ], - "E": [ 701 ], - "Q": [ 665 ], - "R": [ 93 ] + "C": [ 94 ], + "D": [ 715 ], + "E": [ 713 ], + "Q": [ 641 ], + "R": [ 56 ] } }, "rx_24_fifo.rd_addr_SB_DFFESR_Q_3": { @@ -20717,7 +20722,7 @@ }, "attributes": { "module_not_derived": "00000000000000000000000000000001", - "src": "top.v:284.17-295.5|complex_fifo.v:61.1-69.4|/usr/local/bin/../share/yosys/ice40/ff_map.v:24.66-24.119" + "src": "top.v:283.17-294.5|complex_fifo.v:61.1-69.4|/usr/local/bin/../share/yosys/ice40/ff_map.v:24.66-24.119" }, "port_directions": { "C": "input", @@ -20727,11 +20732,11 @@ "R": "input" }, "connections": { - "C": [ 89 ], - "D": [ 704 ], - "E": [ 701 ], - "Q": [ 664 ], - "R": [ 93 ] + "C": [ 94 ], + "D": [ 716 ], + "E": [ 713 ], + "Q": [ 640 ], + "R": [ 56 ] } }, "rx_24_fifo.rd_addr_SB_DFFESR_Q_4": { @@ -20741,7 +20746,7 @@ }, "attributes": { "module_not_derived": "00000000000000000000000000000001", - "src": "top.v:284.17-295.5|complex_fifo.v:61.1-69.4|/usr/local/bin/../share/yosys/ice40/ff_map.v:24.66-24.119" + "src": "top.v:283.17-294.5|complex_fifo.v:61.1-69.4|/usr/local/bin/../share/yosys/ice40/ff_map.v:24.66-24.119" }, "port_directions": { "C": "input", @@ -20751,11 +20756,11 @@ "R": "input" }, "connections": { - "C": [ 89 ], - "D": [ 705 ], - "E": [ 701 ], - "Q": [ 663 ], - "R": [ 93 ] + "C": [ 94 ], + "D": [ 717 ], + "E": [ 713 ], + "Q": [ 644 ], + "R": [ 56 ] } }, "rx_24_fifo.rd_addr_SB_DFFESR_Q_5": { @@ -20765,7 +20770,7 @@ }, "attributes": { "module_not_derived": "00000000000000000000000000000001", - "src": "top.v:284.17-295.5|complex_fifo.v:61.1-69.4|/usr/local/bin/../share/yosys/ice40/ff_map.v:24.66-24.119" + "src": "top.v:283.17-294.5|complex_fifo.v:61.1-69.4|/usr/local/bin/../share/yosys/ice40/ff_map.v:24.66-24.119" }, "port_directions": { "C": "input", @@ -20775,11 +20780,11 @@ "R": "input" }, "connections": { - "C": [ 89 ], - "D": [ 706 ], - "E": [ 701 ], - "Q": [ 662 ], - "R": [ 93 ] + "C": [ 94 ], + "D": [ 718 ], + "E": [ 713 ], + "Q": [ 647 ], + "R": [ 56 ] } }, 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], - "O": [ 653 ] + "I2": [ 445 ], + "I3": [ 763 ], + "O": [ 677 ] } }, - "rx_24_fifo.wr_addr_gray_SB_LUT4_I2_1_O_SB_LUT4_O_1": { + "rx_24_fifo.wr_addr_gray_SB_LUT4_I2_O_SB_LUT4_O_1": { "hide_name": 0, "type": "SB_LUT4", "parameters": { @@ -22913,7 +22648,7 @@ }, "attributes": { "module_not_derived": "00000000000000000000000000000001", - "src": "top.v:284.17-295.5|complex_fifo.v:42.14-42.28|/usr/local/bin/../share/yosys/ice40/arith_map.v:62.5-70.4|/usr/local/bin/../share/yosys/ice40/cells_map.v:26.33-27.52" + "src": "top.v:283.17-294.5|complex_fifo.v:42.14-42.28|/usr/local/bin/../share/yosys/ice40/arith_map.v:62.5-70.4|/usr/local/bin/../share/yosys/ice40/cells_map.v:26.33-27.52" }, "port_directions": { "I0": "input", @@ -22925,12 +22660,12 @@ "connections": { "I0": [ "0" ], "I1": [ "0" ], - "I2": [ 480 ], - "I3": [ 771 ], - "O": [ 656 ] + "I2": [ 447 ], + "I3": [ 764 ], + "O": [ 676 ] } }, - "rx_24_fifo.wr_addr_gray_SB_LUT4_I2_1_O_SB_LUT4_O_2": { + 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} }, "rx_24_fifo.wr_addr_gray_rd_r_SB_DFF_Q_1": { @@ -23347,7 +22977,7 @@ }, "attributes": { "module_not_derived": "00000000000000000000000000000001", - "src": "top.v:284.17-295.5|complex_fifo.v:72.1-75.4|/usr/local/bin/../share/yosys/ice40/ff_map.v:2.51-2.90" + "src": "top.v:283.17-294.5|complex_fifo.v:72.1-75.4|/usr/local/bin/../share/yosys/ice40/ff_map.v:2.51-2.90" }, "port_directions": { "C": "input", @@ -23355,9 +22985,9 @@ "Q": "output" }, "connections": { - "C": [ 89 ], - "D": [ 776 ], - "Q": [ 738 ] + "C": [ 94 ], + "D": [ 769 ], + "Q": [ 652 ] } }, "rx_24_fifo.wr_addr_gray_rd_r_SB_DFF_Q_2": { @@ -23367,7 +22997,7 @@ }, "attributes": { "module_not_derived": "00000000000000000000000000000001", - "src": "top.v:284.17-295.5|complex_fifo.v:72.1-75.4|/usr/local/bin/../share/yosys/ice40/ff_map.v:2.51-2.90" + "src": "top.v:283.17-294.5|complex_fifo.v:72.1-75.4|/usr/local/bin/../share/yosys/ice40/ff_map.v:2.51-2.90" }, "port_directions": { "C": "input", @@ -23375,9 +23005,9 @@ "Q": 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[ 866 ], - "Q": [ 173 ] + "C": [ 94 ], + "D": [ 853 ], + "E": [ 857 ], + "Q": [ 175 ] } }, "spi_if_ins.o_data_in_SB_DFFE_Q_2": { @@ -26320,10 +25921,10 @@ "Q": "output" }, "connections": { - "C": [ 89 ], - "D": [ 863 ], - "E": [ 866 ], - "Q": [ 175 ] + "C": [ 94 ], + "D": [ 854 ], + "E": [ 857 ], + "Q": [ 177 ] } }, "spi_if_ins.o_data_in_SB_DFFE_Q_3": { @@ -26342,10 +25943,10 @@ "Q": "output" }, "connections": { - "C": [ 89 ], - "D": [ 867 ], - "E": [ 866 ], - "Q": [ 177 ] + "C": [ 94 ], + "D": [ 858 ], + "E": [ 857 ], + "Q": [ 179 ] } }, "spi_if_ins.o_data_in_SB_DFFE_Q_4": { @@ -26364,10 +25965,10 @@ "Q": "output" }, "connections": { - "C": [ 89 ], - "D": [ 868 ], - "E": [ 866 ], - "Q": [ 178 ] + "C": [ 94 ], + "D": [ 859 ], + "E": [ 857 ], + "Q": [ 180 ] } }, "spi_if_ins.o_data_in_SB_DFFE_Q_5": { @@ -26386,10 +25987,10 @@ "Q": "output" }, "connections": { - "C": [ 89 ], - "D": [ 869 ], - "E": [ 866 ], - "Q": [ 110 ] + "C": [ 94 ], + "D": [ 860 ], + "E": [ 857 ], + "Q": [ 181 ] } }, "spi_if_ins.o_data_in_SB_DFFE_Q_6": { @@ -26408,10 +26009,10 @@ "Q": "output" }, "connections": { - "C": [ 89 ], - "D": [ 870 ], - "E": [ 866 ], - "Q": [ 90 ] + "C": [ 94 ], + "D": [ 861 ], + "E": [ 857 ], + "Q": [ 95 ] } }, "spi_if_ins.o_data_in_SB_DFFE_Q_7": { @@ -26430,35 +26031,10 @@ "Q": "output" }, "connections": { - "C": [ 89 ], - "D": [ 871 ], - "E": [ 866 ], - "Q": [ 94 ] - } - }, - "spi_if_ins.o_data_in_SB_DFFE_Q_E_SB_LUT4_O": { - "hide_name": 0, - "type": "SB_LUT4", - "parameters": { - "LUT_INIT": "0100000000000000" - }, - "attributes": { - "module_not_derived": "00000000000000000000000000000001", - "src": "/usr/local/bin/../share/yosys/ice40/cells_map.v:26.33-27.52" - }, - "port_directions": { - "I0": "input", - "I1": "input", - "I2": "input", - "I3": "input", - "O": "output" - }, - "connections": { - "I0": [ 872 ], - "I1": [ 873 ], - "I2": [ 874 ], - "I3": [ 875 ], - "O": [ 866 ] + "C": [ 94 ], + "D": [ 862 ], + "E": [ 857 ], + "Q": [ 98 ] } }, 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}, "connections": { - "C": [ 89 ], - "D": [ 867 ], - "E": [ 103 ], - "Q": [ 197 ] + "C": [ 94 ], + "D": [ 858 ], + "E": [ 107 ], + "Q": [ 871 ] } }, "spi_if_ins.o_ioc_SB_DFFE_Q_1": { @@ -26623,10 +26299,10 @@ "Q": "output" }, "connections": { - "C": [ 89 ], - "D": [ 868 ], - "E": [ 103 ], - "Q": [ 198 ] + "C": [ 94 ], + "D": [ 859 ], + "E": [ 107 ], + "Q": [ 872 ] } }, "spi_if_ins.o_ioc_SB_DFFE_Q_2": { @@ -26645,10 +26321,10 @@ "Q": "output" }, "connections": { - "C": [ 89 ], - "D": [ 869 ], - "E": [ 103 ], - "Q": [ 165 ] + "C": [ 94 ], + "D": [ 860 ], + "E": [ 107 ], + "Q": [ 166 ] } }, "spi_if_ins.o_ioc_SB_DFFE_Q_3": { @@ -26667,10 +26343,10 @@ "Q": "output" }, "connections": { - "C": [ 89 ], - "D": [ 870 ], - "E": [ 103 ], - "Q": [ 166 ] + "C": [ 94 ], + "D": [ 861 ], + "E": [ 107 ], + "Q": [ 116 ] } }, "spi_if_ins.o_ioc_SB_DFFE_Q_4": { @@ -26689,10 +26365,10 @@ "Q": "output" }, "connections": { - "C": [ 89 ], - "D": [ 871 ], - "E": [ 103 ], - "Q": [ 116 ] + "C": [ 94 ], + "D": [ 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- "I0": [ 873 ], - "I1": [ 872 ], - "I2": [ 874 ], - "I3": [ 875 ], - "O": [ 882 ] + "I0": [ 870 ], + "I1": [ 868 ], + "I2": [ 875 ], + "I3": [ 876 ], + "O": [ 873 ] } }, "spi_if_ins.o_load_cmd_SB_LUT4_I2": { @@ -26838,17 +26439,17 @@ }, "connections": { "I0": [ "0" ], - "I1": [ 878 ], - "I2": [ 883 ], - "I3": [ 104 ], - "O": [ 120 ] + "I1": [ 865 ], + "I2": [ 874 ], + "I3": [ 108 ], + "O": [ 118 ] } }, - "spi_if_ins.o_load_cmd_SB_LUT4_I2_O_SB_LUT4_O": { + "spi_if_ins.o_load_cmd_SB_LUT4_I2_O_SB_LUT4_I2": { "hide_name": 0, "type": "SB_LUT4", "parameters": { - "LUT_INIT": "0011000000000000" + "LUT_INIT": "1111111100110000" }, "attributes": { "module_not_derived": "00000000000000000000000000000001", @@ -26863,21 +26464,21 @@ }, "connections": { "I0": [ "0" ], - "I1": [ 116 ], - "I2": [ 107 ], - "I3": [ 166 ], - "O": [ 48 ] + "I1": [ 112 ], + "I2": [ 118 ], + "I3": [ 56 ], + "O": [ 96 ] } }, - "spi_if_ins.o_load_cmd_SB_LUT4_I2_O_SB_LUT4_O_I2_SB_LUT4_I1": { + "spi_if_ins.o_load_cmd_SB_LUT4_I2_O_SB_LUT4_I3": { "hide_name": 0, "type": "SB_LUT4", "parameters": { - "LUT_INIT": "0011111111111111" + "LUT_INIT": "0000111100000000" }, "attributes": { "module_not_derived": "00000000000000000000000000000001", - "src": "/usr/local/bin/../share/yosys/ice40/cells_map.v:22.34-23.52" + "src": "/usr/local/bin/../share/yosys/ice40/cells_map.v:17.34-18.52" }, "port_directions": { "I0": "input", @@ -26888,21 +26489,21 @@ }, "connections": { "I0": [ "0" ], - "I1": [ 107 ], - "I2": [ 116 ], - "I3": [ 166 ], - "O": [ 124 ] + "I1": [ "0" ], + "I2": [ 56 ], + "I3": [ 118 ], + "O": [ 877 ] } }, - "spi_if_ins.o_load_cmd_SB_LUT4_I2_O_SB_LUT4_O_I2_SB_LUT4_I3": { + "spi_if_ins.o_load_cmd_SB_LUT4_I2_O_SB_LUT4_I3_O_SB_LUT4_I2": { "hide_name": 0, "type": "SB_LUT4", "parameters": { - "LUT_INIT": "1100111111111111" + "LUT_INIT": "1111000000000000" }, "attributes": { "module_not_derived": "00000000000000000000000000000001", - "src": "/usr/local/bin/../share/yosys/ice40/cells_map.v:22.34-23.52" + "src": "/usr/local/bin/../share/yosys/ice40/cells_map.v:17.34-18.52" }, "port_directions": { "I0": "input", @@ -26913,21 +26514,21 @@ }, "connections": { "I0": [ "0" ], - "I1": [ 166 ], - "I2": [ 116 ], - "I3": [ 107 ], - "O": [ 113 ] + "I1": [ "0" ], + "I2": [ 127 ], + "I3": [ 877 ], + "O": [ 187 ] } }, - "spi_if_ins.o_load_cmd_SB_LUT4_I2_O_SB_LUT4_O_I2_SB_LUT4_O": { + "spi_if_ins.o_load_cmd_SB_LUT4_I2_O_SB_LUT4_I3_O_SB_LUT4_I3": { "hide_name": 0, "type": "SB_LUT4", "parameters": { - "LUT_INIT": "0000000000000011" + "LUT_INIT": "0000111100000000" }, "attributes": { "module_not_derived": "00000000000000000000000000000001", - "src": "/usr/local/bin/../share/yosys/ice40/cells_map.v:22.34-23.52" + "src": "/usr/local/bin/../share/yosys/ice40/cells_map.v:17.34-18.52" }, "port_directions": { "I0": "input", @@ -26938,10 +26539,35 @@ }, "connections": { "I0": [ "0" ], - "I1": [ 165 ], - "I2": [ 197 ], - "I3": [ 198 ], - "O": [ 107 ] + "I1": [ "0" ], + "I2": [ 117 ], + "I3": [ 877 ], + "O": [ 173 ] + } + }, + "spi_if_ins.o_load_cmd_SB_LUT4_I2_O_SB_LUT4_I3_O_SB_LUT4_O": { + "hide_name": 0, + "type": "SB_LUT4", + "parameters": { + "LUT_INIT": "1111000000000000" + }, + "attributes": { + "module_not_derived": "00000000000000000000000000000001", + "src": "/usr/local/bin/../share/yosys/ice40/cells_map.v:17.34-18.52" + }, + "port_directions": { + "I0": "input", + "I1": "input", + "I2": "input", + "I3": "input", + "O": "output" + }, + "connections": { + "I0": [ "0" ], + "I1": [ "0" ], + "I2": [ 121 ], + "I3": [ 115 ], + "O": [ 127 ] } }, "spi_if_ins.r_tx_byte_SB_DFFE_Q": { @@ -26960,10 +26586,10 @@ "Q": "output" }, "connections": { - "C": [ 89 ], - "D": [ 509 ], - "E": [ 885 ], - "Q": [ 886 ] + "C": [ 94 ], + "D": [ 476 ], + "E": [ 878 ], + "Q": [ 879 ] } }, "spi_if_ins.r_tx_byte_SB_DFFE_Q_1": { @@ -26982,10 +26608,10 @@ "Q": "output" }, "connections": { - "C": [ 89 ], - "D": [ 506 ], - "E": [ 885 ], - "Q": [ 887 ] + "C": [ 94 ], + "D": [ 473 ], + "E": [ 878 ], + "Q": [ 880 ] } }, "spi_if_ins.r_tx_byte_SB_DFFE_Q_2": { @@ -27004,10 +26630,10 @@ "Q": "output" }, "connections": { - "C": [ 89 ], - "D": [ 504 ], - "E": [ 885 ], - "Q": [ 888 ] + "C": [ 94 ], + "D": [ 471 ], + "E": [ 878 ], + "Q": [ 881 ] } }, "spi_if_ins.r_tx_byte_SB_DFFE_Q_3": { @@ -27026,10 +26652,10 @@ "Q": "output" }, "connections": { - "C": [ 89 ], - "D": [ 502 ], - "E": [ 885 ], - "Q": [ 889 ] + "C": [ 94 ], + "D": [ 469 ], + "E": [ 878 ], + "Q": [ 882 ] } }, "spi_if_ins.r_tx_byte_SB_DFFE_Q_4": { @@ -27048,10 +26674,10 @@ "Q": "output" }, "connections": { - "C": [ 89 ], - "D": [ 500 ], - "E": [ 885 ], - "Q": [ 890 ] + "C": [ 94 ], + "D": [ 467 ], + "E": [ 878 ], + "Q": [ 883 ] } }, "spi_if_ins.r_tx_byte_SB_DFFE_Q_5": { @@ -27070,10 +26696,10 @@ "Q": "output" }, "connections": { - "C": [ 89 ], - "D": [ 498 ], - "E": [ 885 ], - "Q": [ 891 ] + "C": [ 94 ], + "D": [ 465 ], + "E": [ 878 ], + "Q": [ 884 ] } }, "spi_if_ins.r_tx_byte_SB_DFFE_Q_6": { @@ -27092,10 +26718,10 @@ "Q": "output" }, "connections": { - "C": [ 89 ], - "D": [ 495 ], - "E": [ 885 ], - "Q": [ 892 ] + "C": [ 94 ], + "D": [ 462 ], + "E": [ 878 ], + "Q": [ 885 ] } }, "spi_if_ins.r_tx_byte_SB_DFFE_Q_7": { @@ -27114,10 +26740,10 @@ "Q": "output" }, "connections": { - "C": [ 89 ], - "D": [ 511 ], - "E": [ 885 ], - "Q": [ 893 ] + "C": [ 94 ], + "D": [ 478 ], + "E": [ 878 ], + "Q": [ 886 ] } }, "spi_if_ins.r_tx_data_valid_SB_DFFESR_Q": { @@ -27137,11 +26763,11 @@ "R": "input" }, "connections": { - "C": [ 89 ], - "D": [ 894 ], - "E": [ 895 ], - "Q": [ 896 ], - "R": [ 873 ] + "C": [ 94 ], + "D": [ 887 ], + "E": [ 888 ], + "Q": [ 889 ], + "R": [ 870 ] } }, "spi_if_ins.r_tx_data_valid_SB_DFFESR_Q_D_SB_LUT4_I3": { @@ -27164,9 +26790,9 @@ "connections": { "I0": [ "0" ], "I1": [ "0" ], - "I2": [ 873 ], - "I3": [ 894 ], - "O": [ 885 ] + "I2": [ 870 ], + "I3": [ 887 ], + "O": [ 878 ] } }, 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], - "I2": [ 440 ], - "I3": [ 408 ], - "O": [ 403 ] + "I2": [ 412 ], + "I3": [ 380 ], + "O": [ 375 ] } }, "w_lvds_rx_24_d1_SB_LUT4_I3_O_SB_LUT4_O_25": { @@ -30908,9 +30759,9 @@ "connections": { "I0": [ "0" ], "I1": [ "0" ], - "I2": [ 440 ], - "I3": [ 410 ], - "O": [ 405 ] + "I2": [ 412 ], + "I3": [ 382 ], + "O": [ 377 ] } }, "w_lvds_rx_24_d1_SB_LUT4_I3_O_SB_LUT4_O_26": { @@ -30933,9 +30784,9 @@ "connections": { "I0": [ "0" ], "I1": [ "0" ], - "I2": [ 440 ], - "I3": [ 412 ], - "O": [ 407 ] + "I2": [ 412 ], + "I3": [ 384 ], + "O": [ 379 ] } }, "w_lvds_rx_24_d1_SB_LUT4_I3_O_SB_LUT4_O_27": { @@ -30958,9 +30809,9 @@ "connections": { "I0": [ "0" ], "I1": [ "0" ], - "I2": [ 440 ], - "I3": [ 414 ], - "O": [ 409 ] + "I2": [ 412 ], + "I3": [ 386 ], + "O": [ 381 ] } }, "w_lvds_rx_24_d1_SB_LUT4_I3_O_SB_LUT4_O_28": { @@ -30983,9 +30834,9 @@ "connections": { "I0": [ "0" ], "I1": [ "0" ], - "I2": [ 440 ], - "I3": [ 418 ], - "O": [ 411 ] + "I2": [ 412 ], + "I3": [ 390 ], + "O": [ 383 ] } }, "w_lvds_rx_24_d1_SB_LUT4_I3_O_SB_LUT4_O_29": { @@ -31008,9 +30859,9 @@ "connections": { "I0": [ "0" ], "I1": [ "0" ], - "I2": [ 440 ], - "I3": [ 420 ], - "O": [ 413 ] + "I2": [ 412 ], + "I3": [ 392 ], + "O": [ 385 ] } }, "w_lvds_rx_24_d1_SB_LUT4_I3_O_SB_LUT4_O_3": { @@ -31033,9 +30884,9 @@ "connections": { "I0": [ "0" ], "I1": [ "0" ], - "I2": [ 440 ], - "I3": [ 424 ], - "O": [ 415 ] + "I2": [ 412 ], + "I3": [ 396 ], + "O": [ 387 ] } }, "w_lvds_rx_24_d1_SB_LUT4_I3_O_SB_LUT4_O_4": { @@ -31058,9 +30909,9 @@ "connections": { "I0": [ "0" ], "I1": [ "0" ], - "I2": [ 440 ], - "I3": [ 426 ], - "O": [ 421 ] + "I2": [ 412 ], + "I3": [ 398 ], + "O": [ 393 ] } }, "w_lvds_rx_24_d1_SB_LUT4_I3_O_SB_LUT4_O_5": { @@ -31083,9 +30934,9 @@ "connections": { "I0": [ "0" ], "I1": [ "0" ], - "I2": [ 440 ], - "I3": [ 428 ], - "O": [ 423 ] + "I2": [ 412 ], + "I3": [ 400 ], + "O": [ 395 ] } }, "w_lvds_rx_24_d1_SB_LUT4_I3_O_SB_LUT4_O_6": { @@ -31108,9 +30959,9 @@ "connections": { "I0": [ "0" ], "I1": [ "0" ], - "I2": [ 440 ], - "I3": [ 430 ], - "O": [ 425 ] + "I2": [ 412 ], + "I3": [ 402 ], + "O": [ 397 ] } }, "w_lvds_rx_24_d1_SB_LUT4_I3_O_SB_LUT4_O_7": { @@ -31133,9 +30984,9 @@ "connections": { "I0": [ "0" ], "I1": [ "0" ], - "I2": [ 440 ], - "I3": [ 432 ], - "O": [ 427 ] + "I2": [ 412 ], + "I3": [ 404 ], + "O": [ 399 ] } }, "w_lvds_rx_24_d1_SB_LUT4_I3_O_SB_LUT4_O_8": { @@ -31158,9 +31009,9 @@ "connections": { "I0": [ "0" ], "I1": [ "0" ], - "I2": [ 440 ], - "I3": [ 374 ], - "O": [ 429 ] + "I2": [ 412 ], + "I3": [ 346 ], + "O": [ 401 ] } }, "w_lvds_rx_24_d1_SB_LUT4_I3_O_SB_LUT4_O_9": { @@ -31183,9 +31034,9 @@ "connections": { "I0": [ "0" ], "I1": [ "0" ], - "I2": [ 440 ], - "I3": [ 376 ], - "O": [ 431 ] + "I2": [ 412 ], + "I3": [ 348 ], + "O": [ 403 ] } }, "w_smi_read_req_SB_LUT4_O": { @@ -31208,9 +31059,9 @@ "connections": { "I0": [ "0" ], "I1": [ "0" ], - "I2": [ 57 ], + "I2": [ 68 ], "I3": [ 20 ], - "O": [ 199 ] + "O": [ 201 ] } } }, @@ -31224,7 +31075,7 @@ }, "i_button_SB_LUT4_I3_O": { "hide_name": 0, - "bits": [ 49, 164 ], + "bits": [ 164, 154, 47, 165 ], "attributes": { "force_downto": "00000000000000000000000000000001", "src": "/usr/local/bin/../share/yosys/ice40/cells_map.v:6.21-6.22" @@ -31237,6 +31088,14 @@ "src": "top.v:39.19-39.27" } }, + "i_config_SB_LUT4_I3_I2": { + "hide_name": 0, + "bits": [ 112, 99, 46, 26 ], + "attributes": { + "force_downto": "00000000000000000000000000000001", + "src": "/usr/local/bin/../share/yosys/ice40/cells_map.v:6.21-6.22" + } + }, "i_glob_clock": { "hide_name": 0, "bits": [ 2 ], @@ -31288,7 +31147,31 @@ }, "i_smi_a1_SB_LUT4_I1_O": { "hide_name": 0, - "bits": [ 53, 58, 65, 50 ], + "bits": [ 54, 55, 50, 56 ], + "attributes": { + "force_downto": "00000000000000000000000000000001", + "src": "/usr/local/bin/../share/yosys/ice40/cells_map.v:6.21-6.22" + } + }, + "i_smi_a1_SB_LUT4_I1_O_SB_LUT4_I0_O": { + "hide_name": 0, + "bits": [ 53, 54, 56 ], + "attributes": { + "force_downto": "00000000000000000000000000000001", + "src": "/usr/local/bin/../share/yosys/ice40/cells_map.v:6.21-6.22" + } + }, + "i_smi_a1_SB_LUT4_I1_O_SB_LUT4_I3_O": { + "hide_name": 0, + "bits": [ 60, 59, 61, 62 ], + "attributes": { + "force_downto": "00000000000000000000000000000001", + "src": "/usr/local/bin/../share/yosys/ice40/cells_map.v:6.21-6.22" + } + }, + "i_smi_a1_SB_LUT4_I1_O_SB_LUT4_O_I0": { + "hide_name": 0, + "bits": [ 64, 21, 51, 52 ], "attributes": { "force_downto": "00000000000000000000000000000001", "src": "/usr/local/bin/../share/yosys/ice40/cells_map.v:6.21-6.22" @@ -31296,42 +31179,26 @@ }, "i_smi_a1_SB_LUT4_I1_O_SB_LUT4_O_I2": { "hide_name": 0, - "bits": [ "1", "1", "1", 61, 59, 51 ], + "bits": [ "1", "1", "1", 71, 69, 51 ], "attributes": { "force_downto": "00000000000000000000000000000001", - "src": "top.v:297.13-327.5|smi_ctrl.v:139.25-139.39|/usr/local/bin/../share/yosys/ice40/arith_map.v:37.23-37.25" + "src": "top.v:296.13-326.5|smi_ctrl.v:139.25-139.39|/usr/local/bin/../share/yosys/ice40/arith_map.v:37.23-37.25" } }, "i_smi_a1_SB_LUT4_I1_O_SB_LUT4_O_I2_SB_CARRY_CO_CI": { "hide_name": 0, - "bits": [ "1", "1", "1", "1", 61, 59 ], + "bits": [ "1", "1", "1", "1", 71, 69 ], "attributes": { "force_downto": "00000000000000000000000000000001", - "src": "top.v:297.13-327.5|smi_ctrl.v:139.25-139.39|/usr/local/bin/../share/yosys/ice40/arith_map.v:51.21-51.22" + "src": "top.v:296.13-326.5|smi_ctrl.v:139.25-139.39|/usr/local/bin/../share/yosys/ice40/arith_map.v:51.21-51.22" } }, "i_smi_a1_SB_LUT4_I1_O_SB_LUT4_O_I2_SB_CARRY_CO_I1": { "hide_name": 0, - "bits": [ "1", "1", "1", 61, 62, 60 ], + "bits": [ "1", "1", "1", 71, 72, 70 ], "attributes": { "force_downto": "00000000000000000000000000000001", - "src": "top.v:297.13-327.5|smi_ctrl.v:139.25-139.39|/usr/local/bin/../share/yosys/ice40/arith_map.v:49.21-49.23" - } - }, - "i_smi_a1_SB_LUT4_I1_O_SB_LUT4_O_I2_SB_LUT4_I0_I1": { - "hide_name": 0, - "bits": [ "1", "1", "1", "1", 62, 63 ], - "attributes": { - "force_downto": "00000000000000000000000000000001", - "src": "top.v:297.13-327.5|smi_ctrl.v:132.25-132.39|/usr/local/bin/../share/yosys/ice40/arith_map.v:37.23-37.25" - } - }, - "i_smi_a1_SB_LUT4_I1_O_SB_LUT4_O_I2_SB_LUT4_I0_O": { - "hide_name": 0, - "bits": [ 64, 66, 93 ], - "attributes": { - "force_downto": "00000000000000000000000000000001", - "src": "/usr/local/bin/../share/yosys/ice40/cells_map.v:6.21-6.22" + "src": "top.v:296.13-326.5|smi_ctrl.v:139.25-139.39|/usr/local/bin/../share/yosys/ice40/arith_map.v:49.21-49.23" } }, "i_smi_a2": { @@ -31343,7 +31210,7 @@ }, "i_smi_a2_SB_LUT4_I1_O": { "hide_name": 0, - "bits": [ 81, 77, 65, 67 ], + "bits": [ 54, 88, 62, 56 ], "attributes": { "force_downto": "00000000000000000000000000000001", "src": "/usr/local/bin/../share/yosys/ice40/cells_map.v:6.21-6.22" @@ -31351,52 +31218,70 @@ }, "i_smi_a2_SB_LUT4_I1_O_SB_LUT4_I3_1_I2": { "hide_name": 0, - "bits": [ 61, 75, 72, 976 ], + "bits": [ 71, 80, 77, 970 ], "attributes": { "force_downto": "00000000000000000000000000000001", - "src": "top.v:297.13-327.5|smi_ctrl.v:132.55-132.69|/usr/local/bin/../share/yosys/ice40/arith_map.v:33.26-33.27", + "src": "top.v:296.13-326.5|smi_ctrl.v:132.55-132.69|/usr/local/bin/../share/yosys/ice40/arith_map.v:33.26-33.27", "unused_bits": "3" } }, "i_smi_a2_SB_LUT4_I1_O_SB_LUT4_I3_1_I2_SB_LUT4_O_I3": { "hide_name": 0, - "bits": [ "1", 56, 74, 977 ], + "bits": [ "1", 67, 79, 971 ], "attributes": { "force_downto": "00000000000000000000000000000001", - "src": "top.v:297.13-327.5|smi_ctrl.v:132.55-132.69|/usr/local/bin/../share/yosys/ice40/arith_map.v:51.21-51.22", + "src": "top.v:296.13-326.5|smi_ctrl.v:132.55-132.69|/usr/local/bin/../share/yosys/ice40/arith_map.v:51.21-51.22", "unused_bits": "3" } }, - "i_smi_a2_SB_LUT4_I1_O_SB_LUT4_O_I3": { + "i_smi_a2_SB_LUT4_I1_O_SB_LUT4_I3_I2": { "hide_name": 0, - "bits": [ "1", "1", "1", 84, 82, 76 ], + "bits": [ 91, 85, 74, 972 ], "attributes": { "force_downto": "00000000000000000000000000000001", - "src": "top.v:297.13-327.5|smi_ctrl.v:118.25-118.39|/usr/local/bin/../share/yosys/ice40/arith_map.v:37.23-37.25" + "src": "top.v:296.13-326.5|smi_ctrl.v:111.55-111.69|/usr/local/bin/../share/yosys/ice40/arith_map.v:33.26-33.27", + "unused_bits": "3" } }, - "i_smi_a2_SB_LUT4_I1_O_SB_LUT4_O_I3_SB_CARRY_CO_CI": { + "i_smi_a2_SB_LUT4_I1_O_SB_LUT4_I3_I2_SB_LUT4_O_I3": { "hide_name": 0, - "bits": [ "1", "1", "1", "1", 84, 82 ], + "bits": [ "1", 84, 82, 973 ], "attributes": { "force_downto": "00000000000000000000000000000001", - "src": "top.v:297.13-327.5|smi_ctrl.v:118.25-118.39|/usr/local/bin/../share/yosys/ice40/arith_map.v:51.21-51.22" + "src": "top.v:296.13-326.5|smi_ctrl.v:111.55-111.69|/usr/local/bin/../share/yosys/ice40/arith_map.v:51.21-51.22", + "unused_bits": "3" } }, - "i_smi_a2_SB_LUT4_I1_O_SB_LUT4_O_I3_SB_CARRY_CO_I1": { + "i_smi_a2_SB_LUT4_I1_O_SB_LUT4_O_I0": { "hide_name": 0, - "bits": [ "1", "1", "1", 84, 85, 83 ], + "bits": [ 86, 21, 87, 52 ], "attributes": { "force_downto": "00000000000000000000000000000001", - "src": "top.v:297.13-327.5|smi_ctrl.v:118.25-118.39|/usr/local/bin/../share/yosys/ice40/arith_map.v:49.21-49.23" + "src": "/usr/local/bin/../share/yosys/ice40/cells_map.v:6.21-6.22" } }, - "i_smi_a2_SB_LUT4_I1_O_SB_LUT4_O_I3_SB_LUT4_I0_I1": { + "i_smi_a2_SB_LUT4_I1_O_SB_LUT4_O_I2": { "hide_name": 0, - "bits": [ "1", "1", "1", "1", 85, 86 ], + "bits": [ "1", "1", "1", 91, 89, 87 ], "attributes": { "force_downto": "00000000000000000000000000000001", - "src": "top.v:297.13-327.5|smi_ctrl.v:111.25-111.39|/usr/local/bin/../share/yosys/ice40/arith_map.v:37.23-37.25" + "src": "top.v:296.13-326.5|smi_ctrl.v:118.25-118.39|/usr/local/bin/../share/yosys/ice40/arith_map.v:37.23-37.25" + } + }, + "i_smi_a2_SB_LUT4_I1_O_SB_LUT4_O_I2_SB_CARRY_CO_CI": { + "hide_name": 0, + "bits": [ "1", "1", "1", "1", 91, 89 ], + "attributes": { + "force_downto": "00000000000000000000000000000001", + "src": "top.v:296.13-326.5|smi_ctrl.v:118.25-118.39|/usr/local/bin/../share/yosys/ice40/arith_map.v:51.21-51.22" + } + }, + "i_smi_a2_SB_LUT4_I1_O_SB_LUT4_O_I2_SB_CARRY_CO_I1": { + "hide_name": 0, + "bits": [ "1", "1", "1", 91, 92, 90 ], + "attributes": { + "force_downto": "00000000000000000000000000000001", + "src": "top.v:296.13-326.5|smi_ctrl.v:118.25-118.39|/usr/local/bin/../share/yosys/ice40/arith_map.v:49.21-49.23" } }, "i_smi_a3": { @@ -31429,34 +31314,34 @@ }, "i_ss_SB_LUT4_I3_O": { "hide_name": 0, - "bits": [ 88 ], + "bits": [ 93 ], "attributes": { } }, "int_miso": { "hide_name": 0, - "bits": [ 492 ], + "bits": [ 459 ], "attributes": { "src": "top.v:110.9-110.17" } }, "io_ctrl_ins.debug_mode": { "hide_name": 0, - "bits": [ 95, 92 ], + "bits": [ 99, 97 ], "attributes": { "hdlname": "io_ctrl_ins debug_mode", - "src": "top.v:128.12-157.5|io_ctrl.v:68.17-68.27" + "src": "top.v:128.12-156.5|io_ctrl.v:67.17-67.27" } }, "io_ctrl_ins.debug_mode_SB_LUT4_I0_O": { "hide_name": 0, - "bits": [ 98 ], + "bits": [ 102 ], "attributes": { } }, "io_ctrl_ins.debug_mode_SB_LUT4_I2_O": { "hide_name": 0, - "bits": [ 101, 97, 188, 99 ], + "bits": [ 105, 101, 190, 103 ], "attributes": { "force_downto": "00000000000000000000000000000001", "src": "/usr/local/bin/../share/yosys/ice40/cells_map.v:6.21-6.22" @@ -31467,7 +31352,7 @@ "bits": [ 17 ], "attributes": { "hdlname": "io_ctrl_ins i_button", - "src": "top.v:128.12-157.5|io_ctrl.v:14.29-14.37" + "src": "top.v:128.12-156.5|io_ctrl.v:14.29-14.37" } }, "io_ctrl_ins.i_config": { @@ -31475,95 +31360,71 @@ "bits": [ 13, 14, 15, 16 ], "attributes": { "hdlname": "io_ctrl_ins i_config", - "src": "top.v:128.12-157.5|io_ctrl.v:15.29-15.37" + "src": "top.v:128.12-156.5|io_ctrl.v:15.29-15.37" } }, "io_ctrl_ins.i_cs": { "hide_name": 0, - "bits": [ 104 ], + "bits": [ 108 ], "attributes": { "hdlname": "io_ctrl_ins i_cs", - "src": "top.v:128.12-157.5|io_ctrl.v:9.29-9.33" - } - }, - "io_ctrl_ins.i_cs_SB_LUT4_I3_O": { - "hide_name": 0, - "bits": [ 108, 878 ], - "attributes": { - "force_downto": "00000000000000000000000000000001", - "src": "/usr/local/bin/../share/yosys/ice40/cells_map.v:6.21-6.22" + "src": "top.v:128.12-156.5|io_ctrl.v:9.29-9.33" } }, "io_ctrl_ins.i_data_in": { "hide_name": 0, - "bits": [ 94, 90, 110, 178, 177, 175, 173, 170 ], + "bits": [ 98, 95, 181, 180, 179, 177, 175, 172 ], "attributes": { "hdlname": "io_ctrl_ins i_data_in", - "src": "top.v:128.12-157.5|io_ctrl.v:7.29-7.38" + "src": "top.v:128.12-156.5|io_ctrl.v:7.29-7.38" } }, "io_ctrl_ins.i_fetch_cmd": { "hide_name": 0, - "bits": [ 878 ], + "bits": [ 865 ], "attributes": { "hdlname": "io_ctrl_ins i_fetch_cmd", - "src": "top.v:128.12-157.5|io_ctrl.v:10.29-10.40" + "src": "top.v:128.12-156.5|io_ctrl.v:10.29-10.40" } }, "io_ctrl_ins.i_ioc": { "hide_name": 0, - "bits": [ 116, 166, 165, 198, 197 ], + "bits": [ 115, 116, 166, 872, 871 ], "attributes": { "hdlname": "io_ctrl_ins i_ioc", - "src": "top.v:128.12-157.5|io_ctrl.v:6.29-6.34" + "src": "top.v:128.12-156.5|io_ctrl.v:6.29-6.34" } }, "io_ctrl_ins.i_load_cmd": { "hide_name": 0, - "bits": [ 883 ], + "bits": [ 874 ], "attributes": { "hdlname": "io_ctrl_ins i_load_cmd", - "src": "top.v:128.12-157.5|io_ctrl.v:11.29-11.39" + "src": "top.v:128.12-156.5|io_ctrl.v:11.29-11.39" } }, "io_ctrl_ins.i_reset": { "hide_name": 0, - "bits": [ 93 ], + "bits": [ 56 ], "attributes": { "hdlname": "io_ctrl_ins i_reset", - "src": "top.v:128.12-157.5|io_ctrl.v:3.29-3.36" + "src": "top.v:128.12-156.5|io_ctrl.v:3.29-3.36" } }, "io_ctrl_ins.i_sys_clk": { "hide_name": 0, - "bits": [ 89 ], + "bits": [ 94 ], "attributes": { "hdlname": "io_ctrl_ins i_sys_clk", - "src": "top.v:128.12-157.5|io_ctrl.v:4.29-4.38" + "src": "top.v:128.12-156.5|io_ctrl.v:4.29-4.38" } }, "io_ctrl_ins.i_sys_clk_SB_DFF_Q_D": { "hide_name": 0, - "bits": [ 109, "x" ], + "bits": [ 110, "x" ], "attributes": { "force_downto": "00000000000000000000000000000001", - "src": "top.v:170.20-170.33|/usr/local/bin/../share/yosys/techmap.v:270.23-270.24" - } - }, - "io_ctrl_ins.ldo2v8_state": { - "hide_name": 0, - "bits": [ 112 ], - "attributes": { - "hdlname": "io_ctrl_ins ldo2v8_state", - "src": "top.v:128.12-157.5|io_ctrl.v:72.17-72.29" - } - }, - "io_ctrl_ins.ldo2v8_state_SB_LUT4_I3_O": { - "hide_name": 0, - "bits": [ 141, 124, 117, 114 ], - "attributes": { - "force_downto": "00000000000000000000000000000001", - "src": "/usr/local/bin/../share/yosys/ice40/cells_map.v:6.21-6.22" + "src": "top.v:169.20-169.33|/usr/local/bin/../share/yosys/techmap.v:270.23-270.24" } }, "io_ctrl_ins.led0_state": { @@ -31571,12 +31432,12 @@ "bits": [ 26 ], "attributes": { "hdlname": "io_ctrl_ins led0_state", - "src": "top.v:128.12-157.5|io_ctrl.v:73.17-73.27" + "src": "top.v:128.12-156.5|io_ctrl.v:71.17-71.27" } }, "io_ctrl_ins.led0_state_SB_LUT4_I3_O": { "hide_name": 0, - "bits": [ 169, 124, 135, 119 ], + "bits": [ 171, 117, 134, 113 ], "attributes": { "force_downto": "00000000000000000000000000000001", "src": "/usr/local/bin/../share/yosys/ice40/cells_map.v:6.21-6.22" @@ -31587,7 +31448,7 @@ "bits": [ 27 ], "attributes": { "hdlname": "io_ctrl_ins led1_state", - "src": "top.v:128.12-157.5|io_ctrl.v:74.17-74.27" + "src": "top.v:128.12-156.5|io_ctrl.v:72.17-72.27" } }, "io_ctrl_ins.led1_state_SB_DFFESR_Q_E": { @@ -31596,9 +31457,9 @@ "attributes": { } }, - "io_ctrl_ins.led1_state_SB_LUT4_I0_I2": { + "io_ctrl_ins.led1_state_SB_LUT4_I3_O": { "hide_name": 0, - "bits": [ 27, 48, 121, 122 ], + "bits": [ 167, 117, 122, 119 ], "attributes": { "force_downto": "00000000000000000000000000000001", "src": "/usr/local/bin/../share/yosys/ice40/cells_map.v:6.21-6.22" @@ -31609,14 +31470,14 @@ "bits": [ 8 ], "attributes": { "hdlname": "io_ctrl_ins lna_rx_shutdown_state", - "src": "top.v:128.12-157.5|io_ctrl.v:81.17-81.38" + "src": "top.v:128.12-156.5|io_ctrl.v:79.17-79.38" } }, "io_ctrl_ins.lna_rx_shutdown_state_SB_DFFE_Q_D": { "hide_name": 0, - "bits": [ 127 ], + "bits": [ 123 ], "attributes": { - "src": "top.v:128.12-157.5|io_ctrl.v:224.5-319.8" + "src": "top.v:128.12-156.5|io_ctrl.v:207.5-302.8" } }, "io_ctrl_ins.lna_tx_shutdown_state": { @@ -31624,37 +31485,37 @@ "bits": [ 9 ], "attributes": { "hdlname": "io_ctrl_ins lna_tx_shutdown_state", - "src": "top.v:128.12-157.5|io_ctrl.v:82.17-82.38" + "src": "top.v:128.12-156.5|io_ctrl.v:80.17-80.38" } }, "io_ctrl_ins.lna_tx_shutdown_state_SB_DFFE_Q_D": { "hide_name": 0, - "bits": [ 130 ], + "bits": [ 125 ], "attributes": { - "src": "top.v:128.12-157.5|io_ctrl.v:224.5-319.8" + "src": "top.v:128.12-156.5|io_ctrl.v:207.5-302.8" } }, "io_ctrl_ins.mixer_en_state": { "hide_name": 0, - "bits": [ 133 ], + "bits": [ 131 ], "attributes": { "hdlname": "io_ctrl_ins mixer_en_state", - "src": "top.v:128.12-157.5|io_ctrl.v:78.17-78.31" + "src": "top.v:128.12-156.5|io_ctrl.v:76.17-76.31" } }, "io_ctrl_ins.mixer_en_state_SB_DFFE_Q_D": { "hide_name": 0, - "bits": [ 132 ], + "bits": [ 130 ], "attributes": { - "src": "top.v:128.12-157.5|io_ctrl.v:224.5-319.8" + "src": "top.v:128.12-156.5|io_ctrl.v:207.5-302.8" } }, "io_ctrl_ins.o_data_out": { "hide_name": 0, - "bits": [ 168, 137, 140, 143, 148, 154, 159, 163 ], + "bits": [ 170, 137, 151, 140, 145, 158, 161, 163 ], "attributes": { "hdlname": "io_ctrl_ins o_data_out", - "src": "top.v:128.12-157.5|io_ctrl.v:8.29-8.39" + "src": "top.v:128.12-156.5|io_ctrl.v:8.29-8.39" } }, "io_ctrl_ins.o_data_out_SB_DFFESR_Q_1_D": { @@ -31662,39 +31523,59 @@ "bits": [ 139 ], "attributes": { "force_downto": "00000000000000000000000000000001", - "src": "top.v:128.12-157.5|io_ctrl.v:137.21-177.28|io_ctrl.v:0.0-0.0|/usr/local/bin/../share/yosys/techmap.v:578.19-578.22" + "src": "top.v:128.12-156.5|io_ctrl.v:122.21-161.28|io_ctrl.v:0.0-0.0|/usr/local/bin/../share/yosys/techmap.v:578.19-578.22" } }, "io_ctrl_ins.o_data_out_SB_DFFESR_Q_2_D": { "hide_name": 0, - "bits": [ 142 ], + "bits": [ 144 ], "attributes": { "force_downto": "00000000000000000000000000000001", - "src": "top.v:128.12-157.5|io_ctrl.v:137.21-177.28|io_ctrl.v:0.0-0.0|/usr/local/bin/../share/yosys/techmap.v:578.19-578.22" + "src": "top.v:128.12-156.5|io_ctrl.v:122.21-161.28|io_ctrl.v:0.0-0.0|/usr/local/bin/../share/yosys/techmap.v:578.19-578.22" } }, "io_ctrl_ins.o_data_out_SB_DFFESR_Q_3_D": { "hide_name": 0, - "bits": [ 147 ], + "bits": [ 149 ], "attributes": { "force_downto": "00000000000000000000000000000001", - "src": "top.v:128.12-157.5|io_ctrl.v:137.21-177.28|io_ctrl.v:0.0-0.0|/usr/local/bin/../share/yosys/techmap.v:578.19-578.22" + "src": "top.v:128.12-156.5|io_ctrl.v:122.21-161.28|io_ctrl.v:0.0-0.0|/usr/local/bin/../share/yosys/techmap.v:578.19-578.22" + } + }, + "io_ctrl_ins.o_data_out_SB_DFFESR_Q_3_D_SB_LUT4_O_I2": { + "hide_name": 0, + "bits": [ 153, 129 ], + "attributes": { + "force_downto": "00000000000000000000000000000001", + "src": "/usr/local/bin/../share/yosys/ice40/cells_map.v:6.21-6.22" + } + }, + "io_ctrl_ins.o_data_out_SB_DFFESR_Q_3_E": { + "hide_name": 0, + "bits": [ 150 ], + "attributes": { + } + }, + "io_ctrl_ins.o_data_out_SB_DFFESR_Q_3_R": { + "hide_name": 0, + "bits": [ 152 ], + "attributes": { } }, "io_ctrl_ins.o_data_out_SB_DFFESR_Q_4_D": { "hide_name": 0, - "bits": [ 152 ], + "bits": [ 156 ], "attributes": { "force_downto": "00000000000000000000000000000001", - "src": "top.v:128.12-157.5|io_ctrl.v:137.21-177.28|io_ctrl.v:0.0-0.0|/usr/local/bin/../share/yosys/techmap.v:578.19-578.22" + "src": "top.v:128.12-156.5|io_ctrl.v:122.21-161.28|io_ctrl.v:0.0-0.0|/usr/local/bin/../share/yosys/techmap.v:578.19-578.22" } }, "io_ctrl_ins.o_data_out_SB_DFFESR_Q_5_D": { "hide_name": 0, - "bits": [ 158 ], + "bits": [ 160 ], "attributes": { "force_downto": "00000000000000000000000000000001", - "src": "top.v:128.12-157.5|io_ctrl.v:137.21-177.28|io_ctrl.v:0.0-0.0|/usr/local/bin/../share/yosys/techmap.v:578.19-578.22" + "src": "top.v:128.12-156.5|io_ctrl.v:122.21-161.28|io_ctrl.v:0.0-0.0|/usr/local/bin/../share/yosys/techmap.v:578.19-578.22" } }, "io_ctrl_ins.o_data_out_SB_DFFESR_Q_6_D": { @@ -31702,18 +31583,18 @@ "bits": [ 162 ], "attributes": { "force_downto": "00000000000000000000000000000001", - "src": "top.v:128.12-157.5|io_ctrl.v:137.21-177.28|io_ctrl.v:0.0-0.0|/usr/local/bin/../share/yosys/techmap.v:578.19-578.22" + "src": "top.v:128.12-156.5|io_ctrl.v:122.21-161.28|io_ctrl.v:0.0-0.0|/usr/local/bin/../share/yosys/techmap.v:578.19-578.22" } }, "io_ctrl_ins.o_data_out_SB_DFFESR_Q_6_E": { "hide_name": 0, - "bits": [ 153 ], + "bits": [ 157 ], "attributes": { } }, "io_ctrl_ins.o_data_out_SB_DFFESR_Q_6_R": { "hide_name": 0, - "bits": [ 113, 155 ], + "bits": [ 115, 114, 159 ], "attributes": { "force_downto": "00000000000000000000000000000001", "src": "/usr/local/bin/../share/yosys/ice40/cells_map.v:6.21-6.22" @@ -31721,15 +31602,15 @@ }, "io_ctrl_ins.o_data_out_SB_DFFESR_Q_D": { "hide_name": 0, - "bits": [ 123 ], + "bits": [ 135 ], "attributes": { "force_downto": "00000000000000000000000000000001", - "src": "top.v:128.12-157.5|io_ctrl.v:137.21-177.28|io_ctrl.v:0.0-0.0|/usr/local/bin/../share/yosys/techmap.v:578.19-578.22" + "src": "top.v:128.12-156.5|io_ctrl.v:122.21-161.28|io_ctrl.v:0.0-0.0|/usr/local/bin/../share/yosys/techmap.v:578.19-578.22" } }, "io_ctrl_ins.o_data_out_SB_DFFESR_Q_E": { "hide_name": 0, - "bits": [ 165, 166, 116, 136 ], + "bits": [ 166, 116, 115, 136 ], "attributes": { "force_downto": "00000000000000000000000000000001", "src": "/usr/local/bin/../share/yosys/ice40/cells_map.v:6.21-6.22" @@ -31743,18 +31624,10 @@ }, "io_ctrl_ins.o_data_out_SB_DFFESS_Q_D": { "hide_name": 0, - "bits": [ 167 ], + "bits": [ 169 ], "attributes": { "force_downto": "00000000000000000000000000000001", - "src": "top.v:128.12-157.5|io_ctrl.v:137.21-177.28|io_ctrl.v:0.0-0.0|/usr/local/bin/../share/yosys/techmap.v:578.19-578.22" - } - }, - "io_ctrl_ins.o_ldo_2v8_en": { - "hide_name": 0, - "bits": [ 112 ], - "attributes": { - "hdlname": "io_ctrl_ins o_ldo_2v8_en", - "src": "top.v:128.12-157.5|io_ctrl.v:16.29-16.41" + "src": "top.v:128.12-156.5|io_ctrl.v:122.21-161.28|io_ctrl.v:0.0-0.0|/usr/local/bin/../share/yosys/techmap.v:578.19-578.22" } }, "io_ctrl_ins.o_led0": { @@ -31762,7 +31635,7 @@ "bits": [ 26 ], "attributes": { "hdlname": "io_ctrl_ins o_led0", - "src": "top.v:128.12-157.5|io_ctrl.v:17.29-17.35" + "src": "top.v:128.12-156.5|io_ctrl.v:16.29-16.35" } }, "io_ctrl_ins.o_led1": { @@ -31770,7 +31643,7 @@ "bits": [ 27 ], "attributes": { "hdlname": "io_ctrl_ins o_led1", - "src": "top.v:128.12-157.5|io_ctrl.v:18.29-18.35" + "src": "top.v:128.12-156.5|io_ctrl.v:17.29-17.35" } }, "io_ctrl_ins.o_mixer_en": { @@ -31778,7 +31651,7 @@ "bits": [ "1" ], "attributes": { "hdlname": "io_ctrl_ins o_mixer_en", - "src": "top.v:128.12-157.5|io_ctrl.v:30.29-30.39" + "src": "top.v:128.12-156.5|io_ctrl.v:29.29-29.39" } }, "io_ctrl_ins.o_mixer_fm": { @@ -31786,15 +31659,15 @@ "bits": [ "0" ], "attributes": { "hdlname": "io_ctrl_ins o_mixer_fm", - "src": "top.v:128.12-157.5|io_ctrl.v:22.29-22.39" + "src": "top.v:128.12-156.5|io_ctrl.v:21.29-21.39" } }, "io_ctrl_ins.o_pmod": { "hide_name": 0, - "bits": [ 118, 126, 115, 184, 183, 182, 181, 46 ], + "bits": [ 133, 120, 155, 186, 185, 184, 183, 164 ], "attributes": { "hdlname": "io_ctrl_ins o_pmod", - "src": "top.v:128.12-157.5|io_ctrl.v:19.29-19.35" + "src": "top.v:128.12-156.5|io_ctrl.v:18.29-18.35" } }, "io_ctrl_ins.o_rx_h_tx_l": { @@ -31802,7 +31675,7 @@ "bits": [ 3 ], "attributes": { "hdlname": "io_ctrl_ins o_rx_h_tx_l", - "src": "top.v:128.12-157.5|io_ctrl.v:23.29-23.40" + "src": "top.v:128.12-156.5|io_ctrl.v:22.29-22.40" } }, "io_ctrl_ins.o_rx_h_tx_l_b": { @@ -31810,7 +31683,7 @@ "bits": [ 4 ], "attributes": { "hdlname": "io_ctrl_ins o_rx_h_tx_l_b", - "src": "top.v:128.12-157.5|io_ctrl.v:24.29-24.42" + "src": "top.v:128.12-156.5|io_ctrl.v:23.29-23.42" } }, "io_ctrl_ins.o_shdn_rx_lna": { @@ -31818,7 +31691,7 @@ "bits": [ 8 ], "attributes": { "hdlname": "io_ctrl_ins o_shdn_rx_lna", - "src": "top.v:128.12-157.5|io_ctrl.v:29.29-29.42" + "src": "top.v:128.12-156.5|io_ctrl.v:28.29-28.42" } }, "io_ctrl_ins.o_shdn_tx_lna": { @@ -31826,7 +31699,7 @@ "bits": [ 9 ], "attributes": { "hdlname": "io_ctrl_ins o_shdn_tx_lna", - "src": "top.v:128.12-157.5|io_ctrl.v:28.29-28.42" + "src": "top.v:128.12-156.5|io_ctrl.v:27.29-27.42" } }, "io_ctrl_ins.o_tr_vc1": { @@ -31834,7 +31707,7 @@ "bits": [ 5 ], "attributes": { "hdlname": "io_ctrl_ins o_tr_vc1", - "src": "top.v:128.12-157.5|io_ctrl.v:25.29-25.37" + "src": "top.v:128.12-156.5|io_ctrl.v:24.29-24.37" } }, "io_ctrl_ins.o_tr_vc1_b": { @@ -31842,7 +31715,7 @@ "bits": [ 6 ], "attributes": { "hdlname": "io_ctrl_ins o_tr_vc1_b", - "src": "top.v:128.12-157.5|io_ctrl.v:26.29-26.39" + "src": "top.v:128.12-156.5|io_ctrl.v:25.29-25.39" } }, "io_ctrl_ins.o_tr_vc2": { @@ -31850,70 +31723,56 @@ "bits": [ 7 ], "attributes": { "hdlname": "io_ctrl_ins o_tr_vc2", - "src": "top.v:128.12-157.5|io_ctrl.v:27.29-27.37" + "src": "top.v:128.12-156.5|io_ctrl.v:26.29-26.37" } }, "io_ctrl_ins.pmod_dir_state": { "hide_name": 0, - "bits": [ 169, 125, 141, 144, 149, 176, 174, 172 ], + "bits": [ 171, 167, 128, 141, 146, 178, 176, 174 ], "attributes": { "hdlname": "io_ctrl_ins pmod_dir_state", - "src": "top.v:128.12-157.5|io_ctrl.v:75.17-75.31" + "src": "top.v:128.12-156.5|io_ctrl.v:73.17-73.31" } }, "io_ctrl_ins.pmod_dir_state_SB_DFFE_Q_E": { "hide_name": 0, - "bits": [ 171 ], + "bits": [ 173 ], "attributes": { } }, "io_ctrl_ins.pmod_state": { "hide_name": 0, - "bits": [ 118, 126, 115, 184, 183, 182, 181, 46 ], + "bits": [ 133, 120, 155, 186, 185, 184, 183, 164 ], "attributes": { "hdlname": "io_ctrl_ins pmod_state", - "src": "top.v:128.12-157.5|io_ctrl.v:76.17-76.27" + "src": "top.v:128.12-156.5|io_ctrl.v:74.17-74.27" } }, "io_ctrl_ins.pmod_state_SB_DFFE_Q_E": { "hide_name": 0, - "bits": [ 180 ], + "bits": [ 182 ], "attributes": { } }, - "io_ctrl_ins.pmod_state_SB_DFFE_Q_E_SB_LUT4_O_I3": { - "hide_name": 0, - "bits": [ 47, 179 ], - "attributes": { - "force_downto": "00000000000000000000000000000001", - "src": "/usr/local/bin/../share/yosys/ice40/cells_map.v:6.21-6.22" - } - }, "io_ctrl_ins.rf_mode": { "hide_name": 0, - "bits": [ 100, 97, 96 ], + "bits": [ 104, 101, 100 ], "attributes": { "hdlname": "io_ctrl_ins rf_mode", - "src": "top.v:128.12-157.5|io_ctrl.v:69.17-69.24" - } - }, - "io_ctrl_ins.rf_mode_SB_DFFESR_Q_E": { - "hide_name": 0, - "bits": [ 91 ], - "attributes": { + "src": "top.v:128.12-156.5|io_ctrl.v:68.17-68.24" } }, "io_ctrl_ins.rf_pin_state": { "hide_name": 0, - "bits": [ 134, 128, 131, 190, 189, 188, 187, 186 ], + "bits": [ 132, 124, 126, 192, 191, 190, 189, 188 ], "attributes": { "hdlname": "io_ctrl_ins rf_pin_state", - "src": "top.v:128.12-157.5|io_ctrl.v:77.17-77.29" + "src": "top.v:128.12-156.5|io_ctrl.v:75.17-75.29" } }, "io_ctrl_ins.rf_pin_state_SB_DFFE_Q_E": { "hide_name": 0, - "bits": [ 185 ], + "bits": [ 187 ], "attributes": { } }, @@ -31922,19 +31781,19 @@ "bits": [ 4 ], "attributes": { "hdlname": "io_ctrl_ins rx_h_b_state", - "src": "top.v:128.12-157.5|io_ctrl.v:84.17-84.29" + "src": "top.v:128.12-156.5|io_ctrl.v:82.17-82.29" } }, "io_ctrl_ins.rx_h_b_state_SB_DFFE_Q_D": { "hide_name": 0, - "bits": [ 191 ], + "bits": [ 193 ], "attributes": { - "src": "top.v:128.12-157.5|io_ctrl.v:224.5-319.8" + "src": "top.v:128.12-156.5|io_ctrl.v:207.5-302.8" } }, - "io_ctrl_ins.rx_h_b_state_SB_LUT4_I0_O": { + "io_ctrl_ins.rx_h_b_state_SB_LUT4_I0_I2": { "hide_name": 0, - "bits": [ 160, 161 ], + "bits": [ 4, 127, 49, 195 ], "attributes": { "force_downto": "00000000000000000000000000000001", "src": "/usr/local/bin/../share/yosys/ice40/cells_map.v:6.21-6.22" @@ -31945,19 +31804,19 @@ "bits": [ 3 ], "attributes": { "hdlname": "io_ctrl_ins rx_h_state", - "src": "top.v:128.12-157.5|io_ctrl.v:83.17-83.27" + "src": "top.v:128.12-156.5|io_ctrl.v:81.17-81.27" } }, "io_ctrl_ins.rx_h_state_SB_DFFE_Q_D": { "hide_name": 0, - "bits": [ 193 ], + "bits": [ 196 ], "attributes": { - "src": "top.v:128.12-157.5|io_ctrl.v:224.5-319.8" + "src": "top.v:128.12-156.5|io_ctrl.v:207.5-302.8" } }, "io_ctrl_ins.rx_h_state_SB_DFFE_Q_D_SB_LUT4_O_I3": { "hide_name": 0, - "bits": [ 186, 99, 192 ], + "bits": [ 188, 103, 194 ], "attributes": { "force_downto": "00000000000000000000000000000001", "src": "/usr/local/bin/../share/yosys/ice40/cells_map.v:6.21-6.22" @@ -31968,19 +31827,19 @@ "bits": [ 6 ], "attributes": { "hdlname": "io_ctrl_ins tr_vc_1_b_state", - "src": "top.v:128.12-157.5|io_ctrl.v:86.17-86.32" + "src": "top.v:128.12-156.5|io_ctrl.v:84.17-84.32" } }, "io_ctrl_ins.tr_vc_1_b_state_SB_DFFE_Q_D": { "hide_name": 0, - "bits": [ 194 ], + "bits": [ 197 ], "attributes": { - "src": "top.v:128.12-157.5|io_ctrl.v:224.5-319.8" + "src": "top.v:128.12-156.5|io_ctrl.v:207.5-302.8" } }, "io_ctrl_ins.tr_vc_1_b_state_SB_LUT4_I1_O": { "hide_name": 0, - "bits": [ 149, 124, 150, 151 ], + "bits": [ 146, 117, 147, 148 ], "attributes": { "force_downto": "00000000000000000000000000000001", "src": "/usr/local/bin/../share/yosys/ice40/cells_map.v:6.21-6.22" @@ -31991,19 +31850,19 @@ "bits": [ 5 ], "attributes": { "hdlname": "io_ctrl_ins tr_vc_1_state", - "src": "top.v:128.12-157.5|io_ctrl.v:85.17-85.30" + "src": "top.v:128.12-156.5|io_ctrl.v:83.17-83.30" } }, "io_ctrl_ins.tr_vc_1_state_SB_DFFE_Q_D": { "hide_name": 0, - "bits": [ 195 ], + "bits": [ 198 ], "attributes": { - "src": "top.v:128.12-157.5|io_ctrl.v:224.5-319.8" + "src": "top.v:128.12-156.5|io_ctrl.v:207.5-302.8" } }, - "io_ctrl_ins.tr_vc_1_state_SB_LUT4_I0_O": { + "io_ctrl_ins.tr_vc_1_state_SB_LUT4_I0_I2": { "hide_name": 0, - "bits": [ 156, 157 ], + "bits": [ 5, 127, 48, 199 ], "attributes": { "force_downto": "00000000000000000000000000000001", "src": "/usr/local/bin/../share/yosys/ice40/cells_map.v:6.21-6.22" @@ -32014,43 +31873,19 @@ "bits": [ 7 ], "attributes": { "hdlname": "io_ctrl_ins tr_vc_2_state", - "src": "top.v:128.12-157.5|io_ctrl.v:87.17-87.30" + "src": "top.v:128.12-156.5|io_ctrl.v:85.17-85.30" } }, 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"attributes": { + "force_downto": "00000000000000000000000000000001", + "src": "/usr/local/bin/../share/yosys/ice40/cells_map.v:6.21-6.22" + } + }, "rx_24_fifo.full_o": { "hide_name": 0, - "bits": [ 446 ], + "bits": [ 426 ], "attributes": { "hdlname": "rx_24_fifo full_o", - "src": "top.v:284.17-295.5|complex_fifo.v:16.17-16.23" + "src": "top.v:283.17-294.5|complex_fifo.v:16.17-16.23" } }, "rx_24_fifo.full_o_SB_DFFSR_Q_D": { "hide_name": 0, - "bits": [ 643 ], + "bits": [ 657 ], "attributes": { } }, "rx_24_fifo.full_o_SB_DFFSR_Q_D_SB_LUT4_O_I1": { "hide_name": 0, - "bits": [ 644, 463, 459 ], + "bits": [ 658, 430, 659 ], "attributes": { "force_downto": "00000000000000000000000000000001", "src": "/usr/local/bin/../share/yosys/ice40/cells_map.v:6.21-6.22" @@ -33150,23 +32987,23 @@ }, "rx_24_fifo.full_o_SB_DFFSR_Q_D_SB_LUT4_O_I1_SB_LUT4_O_I0": { "hide_name": 0, - "bits": [ 645, 646, 473, 487 ], + "bits": [ 660, 661, 443, 454 ], "attributes": { "force_downto": "00000000000000000000000000000001", "src": "/usr/local/bin/../share/yosys/ice40/cells_map.v:6.21-6.22" } }, - "rx_24_fifo.full_o_SB_LUT4_I0_I1": { + "rx_24_fifo.full_o_SB_LUT4_I3_O": { "hide_name": 0, - "bits": [ 446, 649, 650, 651 ], + "bits": [ 444, 670, 669, 671 ], "attributes": { "force_downto": "00000000000000000000000000000001", "src": "/usr/local/bin/../share/yosys/ice40/cells_map.v:6.21-6.22" } }, - "rx_24_fifo.full_o_SB_LUT4_I0_O": { + "rx_24_fifo.full_o_SB_LUT4_I3_O_SB_LUT4_I1_O": { "hide_name": 0, - "bits": [ 444, 456, 457, 458 ], + "bits": [ 662, 663, 664, 665 ], "attributes": { "force_downto": "00000000000000000000000000000001", "src": "/usr/local/bin/../share/yosys/ice40/cells_map.v:6.21-6.22" @@ -33174,23 +33011,23 @@ }, "rx_24_fifo.rd_addr": { "hide_name": 0, - "bits": [ 661, 662, 663, 664, 665, 666, 667, 640 ], + "bits": [ 654, 647, 644, 640, 641, 651, 650, 634 ], "attributes": { "hdlname": "rx_24_fifo rd_addr", - "src": "top.v:284.17-295.5|complex_fifo.v:24.22-24.29" + "src": "top.v:283.17-294.5|complex_fifo.v:24.22-24.29" } }, "rx_24_fifo.rd_addr_gray": { "hide_name": 0, - "bits": [ 722, 720, 718, 716, 714, 712, 710, 640 ], + "bits": [ 734, 732, 730, 728, 726, 724, 722, 634 ], "attributes": { "hdlname": "rx_24_fifo rd_addr_gray", - "src": "top.v:284.17-295.5|complex_fifo.v:25.22-25.34" + "src": "top.v:283.17-294.5|complex_fifo.v:25.22-25.34" } }, "rx_24_fifo.rd_addr_gray_SB_DFFESR_Q_3_D": { "hide_name": 0, - "bits": [ 727, 713, 711, 729 ], + "bits": [ 653, 725, 649, 723 ], "attributes": { "force_downto": "00000000000000000000000000000001", "src": "/usr/local/bin/../share/yosys/ice40/cells_map.v:6.21-6.22" @@ -33198,21 +33035,14 @@ }, "rx_24_fifo.rd_addr_gray_SB_DFFESR_Q_4_D": { "hide_name": 0, - "bits": [ 715 ], + "bits": [ 727 ], "attributes": { - "src": "top.v:284.17-295.5|complex_fifo.v:33.8-33.47" + "src": "top.v:283.17-294.5|complex_fifo.v:33.8-33.47" } }, "rx_24_fifo.rd_addr_gray_SB_DFFESR_Q_5_D": { "hide_name": 0, - "bits": [ 717 ], - "attributes": { - "src": "top.v:284.17-295.5|complex_fifo.v:33.8-33.47" - } - }, - "rx_24_fifo.rd_addr_gray_SB_DFFESR_Q_6_D": { - "hide_name": 0, - "bits": [ 737, 719, 738, 709 ], + "bits": [ 721, 652, 645, 729 ], "attributes": { "force_downto": "00000000000000000000000000000001", "src": "/usr/local/bin/../share/yosys/ice40/cells_map.v:6.21-6.22" @@ -33220,63 +33050,7 @@ }, "rx_24_fifo.rd_addr_gray_SB_DFFESR_Q_7_D": { "hide_name": 0, - "bits": [ 723, 721 ], - "attributes": { - "force_downto": "00000000000000000000000000000001", - "src": "/usr/local/bin/../share/yosys/ice40/cells_map.v:6.21-6.22" - } - }, - "rx_24_fifo.rd_addr_gray_SB_DFFESR_Q_7_D_SB_LUT4_I3_O": { - "hide_name": 0, - "bits": [ 635, 636, 637, 638 ], - "attributes": { - "force_downto": "00000000000000000000000000000001", - "src": "/usr/local/bin/../share/yosys/ice40/cells_map.v:6.21-6.22" - } - }, - "rx_24_fifo.rd_addr_gray_SB_DFFESR_Q_7_D_SB_LUT4_I3_O_SB_LUT4_O_1_I3": { - "hide_name": 0, - "bits": [ 727, 665, 666, 728 ], - "attributes": { - "force_downto": "00000000000000000000000000000001", - "src": "/usr/local/bin/../share/yosys/ice40/cells_map.v:6.21-6.22" - } - }, - "rx_24_fifo.rd_addr_gray_SB_DFFESR_Q_7_D_SB_LUT4_I3_O_SB_LUT4_O_2_I0": { - "hide_name": 0, - "bits": [ 730, 731, 732, 733 ], - "attributes": { - "force_downto": "00000000000000000000000000000001", - "src": "/usr/local/bin/../share/yosys/ice40/cells_map.v:6.21-6.22" - } - }, - "rx_24_fifo.rd_addr_gray_SB_DFFESR_Q_7_D_SB_LUT4_I3_O_SB_LUT4_O_2_I0_SB_LUT4_O_1_I3": { - "hide_name": 0, - "bits": [ 734, 705, 704, 735 ], - "attributes": { - "force_downto": "00000000000000000000000000000001", - "src": "/usr/local/bin/../share/yosys/ice40/cells_map.v:6.21-6.22" - } - }, - "rx_24_fifo.rd_addr_gray_SB_DFFESR_Q_7_D_SB_LUT4_I3_O_SB_LUT4_O_I0": { - "hide_name": 0, - "bits": [ 642, 724, 725, 726 ], - "attributes": { - "force_downto": "00000000000000000000000000000001", - "src": "/usr/local/bin/../share/yosys/ice40/cells_map.v:6.21-6.22" - } - }, - "rx_24_fifo.rd_addr_gray_SB_DFFESR_Q_7_D_SB_LUT4_I3_O_SB_LUT4_O_I0_SB_LUT4_O_1_I0": { - "hide_name": 0, - "bits": [ 739, 662, 737, 663 ], - "attributes": { - "force_downto": "00000000000000000000000000000001", - "src": "/usr/local/bin/../share/yosys/ice40/cells_map.v:6.21-6.22" - } - }, - "rx_24_fifo.rd_addr_gray_SB_DFFESR_Q_7_D_SB_LUT4_I3_O_SB_LUT4_O_I0_SB_LUT4_O_2_I0": { - "hide_name": 0, - "bits": [ 740, 664, 736, 665 ], + "bits": [ 656, 733, 731, 646 ], "attributes": { "force_downto": "00000000000000000000000000000001", "src": "/usr/local/bin/../share/yosys/ice40/cells_map.v:6.21-6.22" @@ -33284,108 +33058,101 @@ }, "rx_24_fifo.rd_addr_gray_SB_LUT4_I2_I3": { "hide_name": 0, - "bits": [ "0", 661, 746, 745, 744, 743, 742, 741 ], + "bits": [ "0", 654, 740, 739, 738, 737, 736, 735 ], "attributes": { "force_downto": "00000000000000000000000000000001", - "src": "top.v:284.17-295.5|complex_fifo.v:66.14-66.28|/usr/local/bin/../share/yosys/ice40/arith_map.v:51.21-51.22" + "src": "top.v:283.17-294.5|complex_fifo.v:66.14-66.28|/usr/local/bin/../share/yosys/ice40/arith_map.v:51.21-51.22" } }, "rx_24_fifo.rd_addr_gray_SB_LUT4_I2_O": { "hide_name": 0, - "bits": [ 707, 706, 705, 704, 703, 702, 700, 708 ], + "bits": [ 719, 718, 717, 716, 715, 714, 712, 720 ], "attributes": { "force_downto": "00000000000000000000000000000001", - "src": "top.v:284.17-295.5|complex_fifo.v:66.14-66.28|/usr/local/bin/../share/yosys/ice40/arith_map.v:33.26-33.27" + "src": "top.v:283.17-294.5|complex_fifo.v:66.14-66.28|/usr/local/bin/../share/yosys/ice40/arith_map.v:33.26-33.27" } }, "rx_24_fifo.rd_addr_gray_wr": { "hide_name": 0, - "bits": [ 754, 753, 752, 751, 750, 749, 748, 747 ], + "bits": [ 748, 747, 746, 745, 744, 743, 742, 741 ], "attributes": { "hdlname": "rx_24_fifo rd_addr_gray_wr", - "src": "top.v:284.17-295.5|complex_fifo.v:26.22-26.37" + "src": "top.v:283.17-294.5|complex_fifo.v:26.22-26.37" } }, "rx_24_fifo.rd_addr_gray_wr_r": { "hide_name": 0, - "bits": [ 648, 646, 472, 476, 468, 477, 464, 465 ], + "bits": [ 667, 661, 442, 439, 444, 433, 435, 436 ], "attributes": { "hdlname": "rx_24_fifo rd_addr_gray_wr_r", - "src": "top.v:284.17-295.5|complex_fifo.v:27.22-27.39" + "src": "top.v:283.17-294.5|complex_fifo.v:27.22-27.39" } }, "rx_24_fifo.rd_clk_i": { "hide_name": 0, - "bits": [ 89 ], + "bits": [ 94 ], "attributes": { "hdlname": "rx_24_fifo rd_clk_i", - "src": "top.v:284.17-295.5|complex_fifo.v:12.29-12.37" + "src": "top.v:283.17-294.5|complex_fifo.v:12.29-12.37" } }, "rx_24_fifo.rd_data_o": { "hide_name": 0, - "bits": [ 71, 685, 686, 687, 688, 689, 690, 691, 692, 693, 694, 695, 696, 697, 698, 699, 668, 669, 670, 671, 672, 673, 674, 675, 676, 677, 678, 679, 680, 681, 682, 683 ], + "bits": [ 76, 697, 698, 699, 700, 701, 702, 703, 704, 705, 706, 707, 708, 709, 710, 711, 680, 681, 682, 683, 684, 685, 686, 687, 688, 689, 690, 691, 692, 693, 694, 695 ], "attributes": { "hdlname": "rx_24_fifo rd_data_o", - "src": "top.v:284.17-295.5|complex_fifo.v:14.33-14.42" + "src": "top.v:283.17-294.5|complex_fifo.v:14.33-14.42" } }, "rx_24_fifo.rd_en_i": { "hide_name": 0, - "bits": [ 641 ], + "bits": [ 58 ], "attributes": { "hdlname": "rx_24_fifo rd_en_i", - "src": "top.v:284.17-295.5|complex_fifo.v:13.29-13.36" + "src": "top.v:283.17-294.5|complex_fifo.v:13.29-13.36" } }, "rx_24_fifo.rd_rst_i": { "hide_name": 0, - "bits": [ 93 ], + "bits": [ 56 ], "attributes": { "hdlname": "rx_24_fifo rd_rst_i", - "src": "top.v:284.17-295.5|complex_fifo.v:11.29-11.37" + "src": "top.v:283.17-294.5|complex_fifo.v:11.29-11.37" } }, "rx_24_fifo.wr_addr": { "hide_name": 0, - "bits": [ 647, 487, 486, 484, 482, 480, 478, 684 ], + "bits": [ 666, 454, 453, 451, 449, 447, 445, 696 ], "attributes": { "hdlname": "rx_24_fifo wr_addr", - "src": "top.v:284.17-295.5|complex_fifo.v:20.22-20.29" + "src": "top.v:283.17-294.5|complex_fifo.v:20.22-20.29" } }, "rx_24_fifo.wr_addr_gray": { "hide_name": 0, - "bits": [ 767, 766, 765, 764, 762, 761, 759, 684 ], + "bits": [ 760, 759, 758, 757, 755, 754, 752, 696 ], "attributes": { "hdlname": "rx_24_fifo wr_addr_gray", - "src": "top.v:284.17-295.5|complex_fifo.v:21.22-21.34" - } - }, - "rx_24_fifo.wr_addr_gray_SB_DFFESR_Q_1_D": { - "hide_name": 0, - "bits": [ 758 ], - "attributes": { - "src": "top.v:284.17-295.5|complex_fifo.v:33.8-33.47" + "src": "top.v:283.17-294.5|complex_fifo.v:21.22-21.34" } }, "rx_24_fifo.wr_addr_gray_SB_DFFESR_Q_2_D": { "hide_name": 0, - "bits": [ 760 ], + "bits": [ 753 ], "attributes": { - "src": "top.v:284.17-295.5|complex_fifo.v:33.8-33.47" + "src": "top.v:283.17-294.5|complex_fifo.v:33.8-33.47" } }, "rx_24_fifo.wr_addr_gray_SB_DFFESR_Q_4_D": { "hide_name": 0, - "bits": [ 763 ], + "bits": [ 756 ], "attributes": { - "src": "top.v:284.17-295.5|complex_fifo.v:33.8-33.47" + "src": "top.v:283.17-294.5|complex_fifo.v:33.8-33.47" } }, "rx_24_fifo.wr_addr_gray_SB_DFFESR_Q_6_D": { "hide_name": 0, - "bits": [ 646, 659, 660, 472 ], + "bits": [ 661, 672, 673, 442 ], "attributes": { "force_downto": "00000000000000000000000000000001", "src": "/usr/local/bin/../share/yosys/ice40/cells_map.v:6.21-6.22" @@ -33393,7 +33160,7 @@ }, "rx_24_fifo.wr_addr_gray_SB_DFFESR_Q_7_D": { "hide_name": 0, - "bits": [ 648, 657, 658, 468 ], + "bits": [ 674, 435, 667, 675 ], "attributes": { "force_downto": "00000000000000000000000000000001", "src": "/usr/local/bin/../share/yosys/ice40/cells_map.v:6.21-6.22" @@ -33401,98 +33168,98 @@ }, "rx_24_fifo.wr_addr_gray_SB_LUT4_I2_1_I3": { "hide_name": 0, - "bits": [ "0", 647, 774, 773, 772, 771, 770, 769 ], + "bits": [ "0", 454, 452, 450, 448, 446, 762 ], "attributes": { "force_downto": "00000000000000000000000000000001", - "src": "top.v:284.17-295.5|complex_fifo.v:42.14-42.28|/usr/local/bin/../share/yosys/ice40/arith_map.v:51.21-51.22" - } - }, - "rx_24_fifo.wr_addr_gray_SB_LUT4_I2_1_O": { - "hide_name": 0, - "bits": [ 757, 756, 755, 654, 655, 656, 653, 652 ], - "attributes": { - "force_downto": "00000000000000000000000000000001", - "src": "top.v:284.17-295.5|complex_fifo.v:42.14-42.28|/usr/local/bin/../share/yosys/ice40/arith_map.v:33.26-33.27" + "src": "top.v:283.17-294.5|complex_fifo.v:57.23-57.34|/usr/local/bin/../share/yosys/ice40/arith_map.v:51.21-51.22" } }, "rx_24_fifo.wr_addr_gray_SB_LUT4_I2_I3": { "hide_name": 0, - "bits": [ "0", 487, 485, 483, 481, 479, 768 ], + "bits": [ "0", 666, 767, 766, 765, 764, 763, 761 ], "attributes": { "force_downto": "00000000000000000000000000000001", - "src": "top.v:284.17-295.5|complex_fifo.v:57.23-57.34|/usr/local/bin/../share/yosys/ice40/arith_map.v:51.21-51.22" + "src": "top.v:283.17-294.5|complex_fifo.v:42.14-42.28|/usr/local/bin/../share/yosys/ice40/arith_map.v:51.21-51.22" + } + }, + "rx_24_fifo.wr_addr_gray_SB_LUT4_I2_O": { + "hide_name": 0, + "bits": [ 751, 750, 749, 678, 679, 676, 677, 668 ], + "attributes": { + "force_downto": "00000000000000000000000000000001", + "src": "top.v:283.17-294.5|complex_fifo.v:42.14-42.28|/usr/local/bin/../share/yosys/ice40/arith_map.v:33.26-33.27" } }, "rx_24_fifo.wr_addr_gray_rd": { "hide_name": 0, - "bits": [ 782, 781, 780, 779, 778, 777, 776, 775 ], + "bits": [ 775, 774, 773, 772, 771, 770, 769, 768 ], "attributes": { "hdlname": "rx_24_fifo wr_addr_gray_rd", - "src": "top.v:284.17-295.5|complex_fifo.v:22.22-22.37" + "src": "top.v:283.17-294.5|complex_fifo.v:22.22-22.37" } }, "rx_24_fifo.wr_addr_gray_rd_r": { "hide_name": 0, - "bits": [ 723, 737, 734, 736, 727, 729, 738, 639 ], + "bits": [ 656, 646, 645, 639, 653, 649, 652, 632 ], "attributes": { "hdlname": "rx_24_fifo wr_addr_gray_rd_r", - "src": "top.v:284.17-295.5|complex_fifo.v:23.22-23.39" + "src": "top.v:283.17-294.5|complex_fifo.v:23.22-23.39" } }, "rx_24_fifo.wr_clk_i": { "hide_name": 0, - "bits": [ 200 ], + "bits": [ 202 ], "attributes": { "hdlname": "rx_24_fifo wr_clk_i", - "src": "top.v:284.17-295.5|complex_fifo.v:7.29-7.37" + "src": "top.v:283.17-294.5|complex_fifo.v:7.29-7.37" } }, "rx_24_fifo.wr_data_i": { "hide_name": 0, - "bits": [ 420, 418, 414, 412, 410, 408, 406, 404, 402, 400, 398, 396, 392, 390, 388, 386, 384, 382, 380, 378, 376, 374, 432, 430, 428, 426, 424, 422, 416, 394, 372, 370 ], + "bits": [ 392, 390, 386, 384, 382, 380, 378, 376, 374, 372, 370, 368, 364, 362, 360, 358, 356, 354, 352, 350, 348, 346, 404, 402, 400, 398, 396, 394, 388, 366, 344, 342 ], "attributes": { "hdlname": "rx_24_fifo wr_data_i", - "src": "top.v:284.17-295.5|complex_fifo.v:9.33-9.42" + "src": "top.v:283.17-294.5|complex_fifo.v:9.33-9.42" } }, "rx_24_fifo.wr_en_i": { "hide_name": 0, - "bits": [ 444 ], + "bits": [ 425 ], "attributes": { "hdlname": "rx_24_fifo wr_en_i", - "src": "top.v:284.17-295.5|complex_fifo.v:8.29-8.36" + "src": "top.v:283.17-294.5|complex_fifo.v:8.29-8.36" } }, "rx_24_fifo.wr_rst_i": { "hide_name": 0, - "bits": [ 93 ], + "bits": [ 56 ], "attributes": { "hdlname": "rx_24_fifo wr_rst_i", - "src": "top.v:284.17-295.5|complex_fifo.v:6.29-6.37" + "src": "top.v:283.17-294.5|complex_fifo.v:6.29-6.37" } }, "smi_ctrl_ins.i_cs": { "hide_name": 0, - "bits": [ 784 ], + "bits": [ 777 ], "attributes": { "hdlname": "smi_ctrl_ins i_cs", - "src": "top.v:297.13-327.5|smi_ctrl.v:9.29-9.33" + "src": "top.v:296.13-326.5|smi_ctrl.v:9.29-9.33" } }, "smi_ctrl_ins.i_data_in": { "hide_name": 0, - "bits": [ 94, 90, 110, 178, 177, 175, 173, 170 ], + "bits": [ 98, 95, 181, 180, 179, 177, 175, 172 ], "attributes": { "hdlname": "smi_ctrl_ins i_data_in", - "src": "top.v:297.13-327.5|smi_ctrl.v:7.29-7.38" + "src": "top.v:296.13-326.5|smi_ctrl.v:7.29-7.38" } }, "smi_ctrl_ins.i_fetch_cmd": { "hide_name": 0, - "bits": [ 878 ], + "bits": [ 865 ], "attributes": { "hdlname": "smi_ctrl_ins i_fetch_cmd", - "src": "top.v:297.13-327.5|smi_ctrl.v:10.29-10.40" + "src": "top.v:296.13-326.5|smi_ctrl.v:10.29-10.40" } }, "smi_ctrl_ins.i_fifo_09_empty": { @@ -33500,71 +33267,71 @@ "bits": [ 20 ], "attributes": { "hdlname": "smi_ctrl_ins i_fifo_09_empty", - "src": "top.v:297.13-327.5|smi_ctrl.v:17.29-17.44" + "src": "top.v:296.13-326.5|smi_ctrl.v:17.29-17.44" } }, "smi_ctrl_ins.i_fifo_09_full": { "hide_name": 0, - "bits": [ 329 ], + "bits": [ 302 ], "attributes": { "hdlname": "smi_ctrl_ins i_fifo_09_full", - "src": "top.v:297.13-327.5|smi_ctrl.v:16.29-16.43" + "src": "top.v:296.13-326.5|smi_ctrl.v:16.29-16.43" } }, "smi_ctrl_ins.i_fifo_09_pulled_data": { "hide_name": 0, - "bits": [ 68, 558, 559, 560, 561, 562, 563, 564, 565, 566, 567, 568, 569, 570, 571, 572, 540, 541, 542, 543, 544, 545, 546, 547, 548, 549, 550, 551, 552, 553, 554, 555 ], + "bits": [ 73, 523, 524, 525, 526, 527, 528, 529, 530, 531, 532, 533, 534, 535, 536, 537, 505, 506, 507, 508, 509, 510, 511, 512, 513, 514, 515, 516, 517, 518, 519, 520 ], "attributes": { "hdlname": "smi_ctrl_ins i_fifo_09_pulled_data", - "src": "top.v:297.13-327.5|smi_ctrl.v:15.29-15.50" + "src": "top.v:296.13-326.5|smi_ctrl.v:15.29-15.50" } }, "smi_ctrl_ins.i_fifo_24_empty": { "hide_name": 0, - "bits": [ 57 ], + "bits": [ 68 ], "attributes": { "hdlname": "smi_ctrl_ins i_fifo_24_empty", - "src": "top.v:297.13-327.5|smi_ctrl.v:23.29-23.44" + "src": "top.v:296.13-326.5|smi_ctrl.v:23.29-23.44" } }, "smi_ctrl_ins.i_fifo_24_full": { "hide_name": 0, - "bits": [ 446 ], + "bits": [ 426 ], "attributes": { "hdlname": "smi_ctrl_ins i_fifo_24_full", - "src": "top.v:297.13-327.5|smi_ctrl.v:22.29-22.43" + "src": "top.v:296.13-326.5|smi_ctrl.v:22.29-22.43" } }, "smi_ctrl_ins.i_fifo_24_pulled_data": { "hide_name": 0, - "bits": [ 71, 685, 686, 687, 688, 689, 690, 691, 692, 693, 694, 695, 696, 697, 698, 699, 668, 669, 670, 671, 672, 673, 674, 675, 676, 677, 678, 679, 680, 681, 682, 683 ], + "bits": [ 76, 697, 698, 699, 700, 701, 702, 703, 704, 705, 706, 707, 708, 709, 710, 711, 680, 681, 682, 683, 684, 685, 686, 687, 688, 689, 690, 691, 692, 693, 694, 695 ], "attributes": { "hdlname": "smi_ctrl_ins i_fifo_24_pulled_data", - "src": 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"top.v:297.13-327.5|smi_ctrl.v:26.29-26.36" + "src": "top.v:296.13-326.5|smi_ctrl.v:26.29-26.36" } }, "smi_ctrl_ins.i_smi_data_in": { @@ -33580,7 +33347,7 @@ "bits": [ 32, 33, 34, 35, 36, 37, 38, 39 ], "attributes": { "hdlname": "smi_ctrl_ins i_smi_data_in", - "src": "top.v:297.13-327.5|smi_ctrl.v:30.29-30.42" + "src": "top.v:296.13-326.5|smi_ctrl.v:30.29-30.42" } }, "smi_ctrl_ins.i_smi_soe_se": { @@ -33588,7 +33355,7 @@ "bits": [ 21 ], "attributes": { "hdlname": "smi_ctrl_ins i_smi_soe_se", - "src": "top.v:297.13-327.5|smi_ctrl.v:27.29-27.41" + "src": "top.v:296.13-326.5|smi_ctrl.v:27.29-27.41" } }, "smi_ctrl_ins.i_smi_swe_srw": { @@ -33596,180 +33363,146 @@ "bits": [ 31 ], "attributes": { "hdlname": "smi_ctrl_ins i_smi_swe_srw", - "src": "top.v:297.13-327.5|smi_ctrl.v:28.29-28.42", + "src": "top.v:296.13-326.5|smi_ctrl.v:28.29-28.42", "unused_bits": "0 " } }, "smi_ctrl_ins.i_sys_clk": { "hide_name": 0, - "bits": [ 89 ], + "bits": [ 94 ], "attributes": { "hdlname": "smi_ctrl_ins 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{ "hide_name": 0, - "bits": [ 791 ], + "bits": [ 783 ], "attributes": { } }, "smi_ctrl_ins.int_cnt_24": { "hide_name": 0, - "bits": [ "0", "0", "0", 56, 54, 55 ], + "bits": [ "0", "0", "0", 67, 65, 66 ], "attributes": { "hdlname": "smi_ctrl_ins int_cnt_24", - "src": "top.v:297.13-327.5|smi_ctrl.v:93.15-93.25" + "src": "top.v:296.13-326.5|smi_ctrl.v:93.15-93.25" } }, "smi_ctrl_ins.int_cnt_24_SB_DFFESR_Q_1_D": { "hide_name": 0, - "bits": [ 794 ], + "bits": [ 786 ], "attributes": { } }, "smi_ctrl_ins.int_cnt_24_SB_DFFESR_Q_D": { "hide_name": 0, - "bits": [ 792 ], + "bits": [ 784 ], "attributes": { } }, "smi_ctrl_ins.int_cnt_24_SB_DFFESR_Q_E": { "hide_name": 0, - "bits": [ 793 ], + "bits": [ 785 ], "attributes": { } }, "smi_ctrl_ins.int_cnt_24_SB_DFFESS_Q_D": { "hide_name": 0, - "bits": [ 795 ], + "bits": [ 788 ], "attributes": { } }, "smi_ctrl_ins.o_data_out": { "hide_name": 0, - "bits": [ 800, 799, 798, 797, "0", "0", "0", "0" ], + "bits": [ 793, 792, 791, 790, "0", "0", "0", "0" ], "attributes": { "hdlname": "smi_ctrl_ins o_data_out", - "src": "top.v:297.13-327.5|smi_ctrl.v:8.29-8.39" + "src": "top.v:296.13-326.5|smi_ctrl.v:8.29-8.39" } }, "smi_ctrl_ins.o_data_out_SB_DFFESS_Q_E": { "hide_name": 0, - "bits": [ 796 ], + "bits": [ 789 ], "attributes": { } }, - "smi_ctrl_ins.o_data_out_SB_LUT4_I0_2_O": { + "smi_ctrl_ins.o_data_out_SB_LUT4_I2_I3": { "hide_name": 0, - "bits": [ 1002, 493, 497, 499, 501, 503, 505, 508 ], - "attributes": { - "force_downto": "00000000000000000000000000000001", - "src": "top.v:0.0-0.0|top.v:172.7-178.14|/usr/local/bin/../share/yosys/techmap.v:578.19-578.22", - "unused_bits": "0 " - } - }, - "smi_ctrl_ins.o_data_out_SB_LUT4_I1_O": { - "hide_name": 0, - "bits": [ 507, 140, 804 ], + "bits": [ 795, 791, 797 ], "attributes": { "force_downto": "00000000000000000000000000000001", "src": "/usr/local/bin/../share/yosys/ice40/cells_map.v:6.21-6.22" } }, + "smi_ctrl_ins.o_data_out_SB_LUT4_I2_O": { + "hide_name": 0, + "bits": [ 996, 460, 464, 466, 468, 470, 472, 475 ], + "attributes": { + "force_downto": "00000000000000000000000000000001", + "src": "top.v:0.0-0.0|top.v:171.7-177.14|/usr/local/bin/../share/yosys/techmap.v:578.19-578.22", + "unused_bits": "0 " + } + }, "smi_ctrl_ins.o_fifo_09_pull": { "hide_name": 0, - "bits": [ 556 ], + "bits": [ 521 ], "attributes": { "hdlname": "smi_ctrl_ins o_fifo_09_pull", - "src": "top.v:297.13-327.5|smi_ctrl.v:14.29-14.43" + "src": "top.v:296.13-326.5|smi_ctrl.v:14.29-14.43" } }, "smi_ctrl_ins.o_fifo_24_pull": { "hide_name": 0, - "bits": [ 641 ], + "bits": [ 58 ], "attributes": { "hdlname": "smi_ctrl_ins o_fifo_24_pull", - "src": "top.v:297.13-327.5|smi_ctrl.v:20.29-20.43" + "src": "top.v:296.13-326.5|smi_ctrl.v:20.29-20.43" } }, "smi_ctrl_ins.o_smi_data_out": { "hide_name": 0, - "bits": [ 32, 254, 253, 252, 251, 250, 249, 248 ], + "bits": [ 32, 219, 218, 217, 216, 215, 214, 213 ], "attributes": { "hdlname": "smi_ctrl_ins o_smi_data_out", - "src": "top.v:297.13-327.5|smi_ctrl.v:29.29-29.43" + "src": "top.v:296.13-326.5|smi_ctrl.v:29.29-29.43" } }, "smi_ctrl_ins.o_smi_data_out_SB_DFFE_Q_1_D": { "hide_name": 0, - "bits": [ 808 ], + "bits": [ 800 ], "attributes": { } }, "smi_ctrl_ins.o_smi_data_out_SB_DFFE_Q_1_D_SB_LUT4_O_I1": { "hide_name": 0, - "bits": [ 69, 809, 70, 810 ], + "bits": [ 74, 801, 75, 802 ], "attributes": { "force_downto": "00000000000000000000000000000001", "src": "/usr/local/bin/../share/yosys/ice40/cells_map.v:6.21-6.22" @@ -33777,7 +33510,7 @@ }, "smi_ctrl_ins.o_smi_data_out_SB_DFFE_Q_1_D_SB_LUT4_O_I1_SB_LUT4_O_1_I1": { "hide_name": 0, - "bits": [ 72, 812, 813, 73 ], + "bits": [ 77, 804, 805, 78 ], "attributes": { "force_downto": "00000000000000000000000000000001", "src": "/usr/local/bin/../share/yosys/ice40/cells_map.v:6.21-6.22" @@ -33785,7 +33518,7 @@ }, "smi_ctrl_ins.o_smi_data_out_SB_DFFE_Q_1_D_SB_LUT4_O_I1_SB_LUT4_O_I3": { "hide_name": 0, - "bits": [ 571, 554, 80, 811 ], + "bits": [ 536, 519, 84, 803 ], "attributes": { "force_downto": "00000000000000000000000000000001", "src": "/usr/local/bin/../share/yosys/ice40/cells_map.v:6.21-6.22" @@ -33793,13 +33526,13 @@ }, "smi_ctrl_ins.o_smi_data_out_SB_DFFE_Q_2_D": { "hide_name": 0, - "bits": [ 814 ], + "bits": [ 806 ], "attributes": { } }, "smi_ctrl_ins.o_smi_data_out_SB_DFFE_Q_2_D_SB_LUT4_O_I1": { "hide_name": 0, - "bits": [ 69, 815, 70, 816 ], + "bits": [ 74, 807, 75, 808 ], "attributes": { "force_downto": "00000000000000000000000000000001", "src": "/usr/local/bin/../share/yosys/ice40/cells_map.v:6.21-6.22" @@ -33807,7 +33540,7 @@ }, "smi_ctrl_ins.o_smi_data_out_SB_DFFE_Q_2_D_SB_LUT4_O_I1_SB_LUT4_O_1_I1": { "hide_name": 0, - "bits": [ 72, 818, 819, 73 ], + "bits": [ 77, 810, 811, 78 ], "attributes": { "force_downto": "00000000000000000000000000000001", "src": "/usr/local/bin/../share/yosys/ice40/cells_map.v:6.21-6.22" @@ -33815,7 +33548,7 @@ }, "smi_ctrl_ins.o_smi_data_out_SB_DFFE_Q_2_D_SB_LUT4_O_I1_SB_LUT4_O_I3": { "hide_name": 0, - "bits": [ 570, 553, 80, 817 ], + "bits": [ 535, 518, 84, 809 ], "attributes": { "force_downto": "00000000000000000000000000000001", "src": "/usr/local/bin/../share/yosys/ice40/cells_map.v:6.21-6.22" @@ -33823,13 +33556,21 @@ }, "smi_ctrl_ins.o_smi_data_out_SB_DFFE_Q_3_D": { "hide_name": 0, - "bits": [ 820 ], + "bits": [ 812 ], "attributes": { } }, "smi_ctrl_ins.o_smi_data_out_SB_DFFE_Q_3_D_SB_LUT4_O_I1": { "hide_name": 0, - "bits": [ 69, 821, 70, 822 ], + "bits": [ 74, 813, 75, 814 ], + "attributes": { + "force_downto": "00000000000000000000000000000001", + "src": "/usr/local/bin/../share/yosys/ice40/cells_map.v:6.21-6.22" + } + }, + "smi_ctrl_ins.o_smi_data_out_SB_DFFE_Q_3_D_SB_LUT4_O_I1_SB_LUT4_O_1_I1": { + "hide_name": 0, + "bits": [ 77, 816, 817, 78 ], "attributes": { "force_downto": "00000000000000000000000000000001", "src": "/usr/local/bin/../share/yosys/ice40/cells_map.v:6.21-6.22" @@ -33837,7 +33578,7 @@ }, "smi_ctrl_ins.o_smi_data_out_SB_DFFE_Q_3_D_SB_LUT4_O_I1_SB_LUT4_O_I3": { "hide_name": 0, - "bits": [ 569, 552, 80, 823 ], + "bits": [ 534, 517, 84, 815 ], "attributes": { "force_downto": "00000000000000000000000000000001", "src": "/usr/local/bin/../share/yosys/ice40/cells_map.v:6.21-6.22" @@ -33845,49 +33586,49 @@ }, "smi_ctrl_ins.o_smi_data_out_SB_DFFE_Q_4_D": { "hide_name": 0, - "bits": [ 826 ], + "bits": [ 818 ], "attributes": { } }, + "smi_ctrl_ins.o_smi_data_out_SB_DFFE_Q_4_D_SB_LUT4_O_I1": { + "hide_name": 0, + "bits": [ 74, 819, 75, 820 ], + "attributes": { + "force_downto": "00000000000000000000000000000001", + "src": "/usr/local/bin/../share/yosys/ice40/cells_map.v:6.21-6.22" + } + }, + "smi_ctrl_ins.o_smi_data_out_SB_DFFE_Q_4_D_SB_LUT4_O_I1_SB_LUT4_O_1_I1": { + "hide_name": 0, + "bits": [ 77, 822, 823, 78 ], + "attributes": { + "force_downto": "00000000000000000000000000000001", + "src": "/usr/local/bin/../share/yosys/ice40/cells_map.v:6.21-6.22" + } + }, + "smi_ctrl_ins.o_smi_data_out_SB_DFFE_Q_4_D_SB_LUT4_O_I1_SB_LUT4_O_I3": { + "hide_name": 0, + "bits": [ 533, 516, 84, 821 ], + "attributes": { + "force_downto": "00000000000000000000000000000001", + "src": "/usr/local/bin/../share/yosys/ice40/cells_map.v:6.21-6.22" + } + }, "smi_ctrl_ins.o_smi_data_out_SB_DFFE_Q_5_D": { "hide_name": 0, - "bits": [ 829 ], + "bits": [ 824 ], "attributes": { } }, - "smi_ctrl_ins.o_smi_data_out_SB_DFFE_Q_5_D_SB_LUT4_O_I1": { - "hide_name": 0, - "bits": [ 69, 830, 70, 831 ], - "attributes": { - "force_downto": "00000000000000000000000000000001", - "src": "/usr/local/bin/../share/yosys/ice40/cells_map.v:6.21-6.22" - } - }, - "smi_ctrl_ins.o_smi_data_out_SB_DFFE_Q_5_D_SB_LUT4_O_I1_SB_LUT4_O_1_I1": { - "hide_name": 0, - "bits": [ 72, 833, 834, 73 ], - "attributes": { - "force_downto": "00000000000000000000000000000001", - "src": "/usr/local/bin/../share/yosys/ice40/cells_map.v:6.21-6.22" - } - }, - "smi_ctrl_ins.o_smi_data_out_SB_DFFE_Q_5_D_SB_LUT4_O_I1_SB_LUT4_O_I3": { - "hide_name": 0, - "bits": [ 567, 550, 80, 832 ], - "attributes": { - "force_downto": "00000000000000000000000000000001", - "src": "/usr/local/bin/../share/yosys/ice40/cells_map.v:6.21-6.22" - } - }, "smi_ctrl_ins.o_smi_data_out_SB_DFFE_Q_6_D": { "hide_name": 0, - "bits": [ 835 ], + "bits": [ 827 ], "attributes": { } }, "smi_ctrl_ins.o_smi_data_out_SB_DFFE_Q_6_D_SB_LUT4_O_I1": { "hide_name": 0, - "bits": [ 69, 836, 70, 837 ], + "bits": [ 74, 828, 75, 829 ], "attributes": { "force_downto": "00000000000000000000000000000001", "src": "/usr/local/bin/../share/yosys/ice40/cells_map.v:6.21-6.22" @@ -33895,7 +33636,7 @@ }, "smi_ctrl_ins.o_smi_data_out_SB_DFFE_Q_6_D_SB_LUT4_O_I1_SB_LUT4_O_1_I1": { "hide_name": 0, - "bits": [ 72, 839, 840, 73 ], + "bits": [ 77, 831, 832, 78 ], "attributes": { "force_downto": "00000000000000000000000000000001", "src": "/usr/local/bin/../share/yosys/ice40/cells_map.v:6.21-6.22" @@ -33903,7 +33644,7 @@ }, "smi_ctrl_ins.o_smi_data_out_SB_DFFE_Q_6_D_SB_LUT4_O_I1_SB_LUT4_O_I3": { "hide_name": 0, - "bits": [ 566, 549, 80, 838 ], + "bits": [ 531, 514, 84, 830 ], "attributes": { "force_downto": "00000000000000000000000000000001", "src": "/usr/local/bin/../share/yosys/ice40/cells_map.v:6.21-6.22" @@ -33911,13 +33652,13 @@ }, "smi_ctrl_ins.o_smi_data_out_SB_DFFE_Q_7_D": { "hide_name": 0, - "bits": [ 841 ], + "bits": [ 833 ], "attributes": { } }, "smi_ctrl_ins.o_smi_data_out_SB_DFFE_Q_7_D_SB_LUT4_O_I0": { "hide_name": 0, - "bits": [ 842, 843, 844, 67 ], + "bits": [ 834, 835, 836, 62 ], "attributes": { "force_downto": "00000000000000000000000000000001", "src": "/usr/local/bin/../share/yosys/ice40/cells_map.v:6.21-6.22" @@ -33925,7 +33666,7 @@ }, "smi_ctrl_ins.o_smi_data_out_SB_DFFE_Q_7_D_SB_LUT4_O_I0_SB_LUT4_O_I3": { "hide_name": 0, - "bits": [ 692, 676, 56, 845 ], + "bits": [ 704, 688, 67, 837 ], "attributes": { "force_downto": "00000000000000000000000000000001", "src": "/usr/local/bin/../share/yosys/ice40/cells_map.v:6.21-6.22" @@ -33933,13 +33674,13 @@ }, "smi_ctrl_ins.o_smi_data_out_SB_DFFE_Q_D": { "hide_name": 0, - "bits": [ 806 ], + "bits": [ 799 ], "attributes": { } }, "smi_ctrl_ins.o_smi_data_out_SB_DFFE_Q_D_SB_LUT4_O_I1": { "hide_name": 0, - "bits": [ 69, 846, 70, 847 ], + "bits": [ 74, 838, 75, 839 ], "attributes": { "force_downto": "00000000000000000000000000000001", "src": "/usr/local/bin/../share/yosys/ice40/cells_map.v:6.21-6.22" @@ -33947,7 +33688,7 @@ }, "smi_ctrl_ins.o_smi_data_out_SB_DFFE_Q_D_SB_LUT4_O_I1_SB_LUT4_O_1_I1": { "hide_name": 0, - "bits": [ 72, 849, 850, 73 ], + "bits": [ 77, 841, 842, 78 ], "attributes": { "force_downto": "00000000000000000000000000000001", "src": "/usr/local/bin/../share/yosys/ice40/cells_map.v:6.21-6.22" @@ -33955,7 +33696,7 @@ }, "smi_ctrl_ins.o_smi_data_out_SB_DFFE_Q_D_SB_LUT4_O_I1_SB_LUT4_O_1_I3": { "hide_name": 0, - "bits": [ 72, 824, 825, 73 ], + "bits": [ 77, 844, 843, 78 ], "attributes": { "force_downto": "00000000000000000000000000000001", "src": "/usr/local/bin/../share/yosys/ice40/cells_map.v:6.21-6.22" @@ -33963,7 +33704,7 @@ }, "smi_ctrl_ins.o_smi_data_out_SB_DFFE_Q_D_SB_LUT4_O_I1_SB_LUT4_O_I3": { "hide_name": 0, - "bits": [ 572, 555, 80, 848 ], + "bits": [ 537, 520, 84, 840 ], "attributes": { "force_downto": "00000000000000000000000000000001", "src": "/usr/local/bin/../share/yosys/ice40/cells_map.v:6.21-6.22" @@ -33971,15 +33712,7 @@ }, "smi_ctrl_ins.o_smi_data_out_SB_DFFE_Q_D_SB_LUT4_O_I2": { "hide_name": 0, - "bits": [ 69, 827, 70, 828 ], - "attributes": { - "force_downto": "00000000000000000000000000000001", - "src": "/usr/local/bin/../share/yosys/ice40/cells_map.v:6.21-6.22" - } - }, - "smi_ctrl_ins.o_smi_data_out_SB_DFFE_Q_D_SB_LUT4_O_I2_SB_LUT4_O_1_I1": { - "hide_name": 0, - "bits": [ 72, 852, 853, 73 ], + "bits": [ 74, 825, 75, 826 ], "attributes": { "force_downto": "00000000000000000000000000000001", "src": "/usr/local/bin/../share/yosys/ice40/cells_map.v:6.21-6.22" @@ -33987,18 +33720,24 @@ }, "smi_ctrl_ins.o_smi_data_out_SB_DFFE_Q_D_SB_LUT4_O_I2_SB_LUT4_O_I3": { "hide_name": 0, - "bits": [ 568, 551, 80, 851 ], + "bits": [ 532, 515, 84, 845 ], "attributes": { "force_downto": "00000000000000000000000000000001", "src": "/usr/local/bin/../share/yosys/ice40/cells_map.v:6.21-6.22" } }, + "smi_ctrl_ins.o_smi_data_out_SB_DFFE_Q_E": { + "hide_name": 0, + "bits": [ 63 ], + "attributes": { + } + }, "smi_ctrl_ins.o_smi_read_req": { "hide_name": 0, - "bits": [ 199 ], + "bits": [ 201 ], "attributes": { "hdlname": "smi_ctrl_ins o_smi_read_req", - "src": "top.v:297.13-327.5|smi_ctrl.v:31.29-31.43" + "src": "top.v:296.13-326.5|smi_ctrl.v:31.29-31.43" } }, "smi_ctrl_ins.o_smi_write_req": { @@ -34006,7 +33745,7 @@ "bits": [ "x" ], "attributes": { "hdlname": "smi_ctrl_ins o_smi_write_req", - "src": "top.v:297.13-327.5|smi_ctrl.v:32.29-32.44" + "src": "top.v:296.13-326.5|smi_ctrl.v:32.29-32.44" } }, "smi_ctrl_ins.o_smi_writing": { @@ -34014,96 +33753,108 @@ "bits": [ 30 ], "attributes": { "hdlname": "smi_ctrl_ins o_smi_writing", - "src": "top.v:297.13-327.5|smi_ctrl.v:33.29-33.42" + "src": "top.v:296.13-326.5|smi_ctrl.v:33.29-33.42" } }, "smi_ctrl_ins.r_fifo_09_pull": { "hide_name": 0, - "bits": [ 556 ], + "bits": [ 521 ], "attributes": { "hdlname": "smi_ctrl_ins r_fifo_09_pull", - "src": "top.v:297.13-327.5|smi_ctrl.v:94.9-94.23" + "src": "top.v:296.13-326.5|smi_ctrl.v:94.9-94.23" + } + }, + "smi_ctrl_ins.r_fifo_09_pull_SB_DFFESR_Q_D": { + "hide_name": 0, + "bits": [ 846 ], + "attributes": { } }, "smi_ctrl_ins.r_fifo_09_pull_SB_DFFESR_Q_E": { "hide_name": 0, - "bits": [ 854 ], - "attributes": { - } - }, - "smi_ctrl_ins.r_fifo_09_pull_SB_LUT4_I2_O": { - "hide_name": 0, - "bits": [ 245, 227, 246, 247 ], + "bits": [ 56, 781, 782 ], "attributes": { "force_downto": "00000000000000000000000000000001", "src": "/usr/local/bin/../share/yosys/ice40/cells_map.v:6.21-6.22" } }, + "smi_ctrl_ins.r_fifo_09_pull_SB_DFFESR_Q_E_SB_LUT4_O_I1": { + "hide_name": 0, + "bits": [ "1", "1", "1", "1", 92, 847 ], + "attributes": { + "force_downto": "00000000000000000000000000000001", + "src": "top.v:296.13-326.5|smi_ctrl.v:111.25-111.39|/usr/local/bin/../share/yosys/ice40/arith_map.v:37.23-37.25" + } + }, "smi_ctrl_ins.r_fifo_09_pull_SB_LUT4_I3_1_O": { "hide_name": 0, - "bits": [ 573 ], + "bits": [ 539 ], "attributes": { } }, "smi_ctrl_ins.r_fifo_24_pull": { "hide_name": 0, - "bits": [ 641 ], + "bits": [ 58 ], "attributes": { "hdlname": "smi_ctrl_ins r_fifo_24_pull", - "src": "top.v:297.13-327.5|smi_ctrl.v:95.9-95.23" + "src": "top.v:296.13-326.5|smi_ctrl.v:95.9-95.23" } }, "smi_ctrl_ins.r_fifo_24_pull_SB_DFFESR_Q_D": { "hide_name": 0, - "bits": [ 855 ], + "bits": [ 848 ], "attributes": { } }, "smi_ctrl_ins.r_fifo_24_pull_SB_DFFESR_Q_E": { "hide_name": 0, - "bits": [ 856 ], - "attributes": { - } - }, - "smi_ctrl_ins.r_fifo_24_pull_SB_LUT4_I1_O": { - "hide_name": 0, - "bits": [ 857, 21, 52, 858 ], + "bits": [ 56, 787, 57 ], "attributes": { "force_downto": "00000000000000000000000000000001", "src": "/usr/local/bin/../share/yosys/ice40/cells_map.v:6.21-6.22" } }, - "smi_ctrl_ins.r_fifo_24_pull_SB_LUT4_I1_O_SB_LUT4_I0_O": { + "smi_ctrl_ins.r_fifo_24_pull_SB_DFFESR_Q_E_SB_LUT4_O_I1": { "hide_name": 0, - "bits": [ 67, 50, 859 ], + "bits": [ "1", "1", "1", "1", 72, 849 ], "attributes": { "force_downto": "00000000000000000000000000000001", - "src": "/usr/local/bin/../share/yosys/ice40/cells_map.v:6.21-6.22" - } - }, - "smi_ctrl_ins.r_fifo_24_pull_SB_LUT4_I1_O_SB_LUT4_I0_O_SB_LUT4_I3_O": { - "hide_name": 0, - "bits": [ 807 ], - "attributes": { + "src": "top.v:296.13-326.5|smi_ctrl.v:132.25-132.39|/usr/local/bin/../share/yosys/ice40/arith_map.v:37.23-37.25" } }, "smi_ctrl_ins.r_fifo_24_pull_SB_LUT4_I3_1_O": { "hide_name": 0, - "bits": [ 701 ], + "bits": [ 713 ], "attributes": { } }, + "smi_ctrl_ins.r_fifo_24_pull_SB_LUT4_I3_O": { + "hide_name": 0, + "bits": [ 639, 716, 715, 850 ], + "attributes": { + "force_downto": "00000000000000000000000000000001", + "src": "/usr/local/bin/../share/yosys/ice40/cells_map.v:6.21-6.22" + } + }, + "smi_ctrl_ins.r_fifo_24_pull_SB_LUT4_I3_O_SB_LUT4_I3_O": { + "hide_name": 0, + "bits": [ 635, 636, 637, 638 ], + "attributes": { + "force_downto": "00000000000000000000000000000001", + "src": "/usr/local/bin/../share/yosys/ice40/cells_map.v:6.21-6.22" + } + }, "smi_ctrl_ins.r_last_soe": { "hide_name": 0, "bits": [ 52 ], "attributes": { "hdlname": "smi_ctrl_ins r_last_soe", - "src": "top.v:297.13-327.5|smi_ctrl.v:91.9-91.19" + "src": "top.v:296.13-326.5|smi_ctrl.v:91.9-91.19" } }, "spi_if_ins.i_data_out": { "hide_name": 0, - "bits": [ 511, 495, 498, 500, 502, 504, 506, 509 ], + "bits": [ 478, 462, 465, 467, 469, 471, 473, 476 ], "attributes": { "hdlname": "spi_if_ins i_data_out", "src": "top.v:92.11-108.5|spi_if.v:10.29-10.39" @@ -34111,7 +33862,7 @@ }, "spi_if_ins.i_rst_b": { "hide_name": 0, - "bits": [ 93 ], + "bits": [ 56 ], "attributes": { "hdlname": "spi_if_ins i_rst_b", "src": "top.v:92.11-108.5|spi_if.v:5.29-5.36" @@ -34143,7 +33894,7 @@ }, "spi_if_ins.i_sys_clk": { "hide_name": 0, - "bits": [ 89 ], + "bits": [ 94 ], "attributes": { "hdlname": "spi_if_ins i_sys_clk", "src": "top.v:92.11-108.5|spi_if.v:6.29-6.38" @@ -34151,7 +33902,7 @@ }, "spi_if_ins.o_cs": { "hide_name": 0, - "bits": [ 864, 104, 784, 861 ], + "bits": [ 855, 108, 777, 852 ], "attributes": { "hdlname": "spi_if_ins o_cs", "src": "top.v:92.11-108.5|spi_if.v:11.29-11.33" @@ -34159,7 +33910,7 @@ }, "spi_if_ins.o_cs_SB_DFFESR_Q_D": { "hide_name": 0, - "bits": [ "0", "0", "0", 860, "0", "0", 783, "0", "0", 102, "0", "0" ], + "bits": [ "0", "0", "0", 851, "0", "0", 776, "0", "0", 106, "0", "0" ], "attributes": { "force_downto": "00000000000000000000000000000001", "src": "top.v:92.11-108.5|spi_if.v:65.21-70.28|spi_if.v:0.0-0.0|/usr/local/bin/../share/yosys/techmap.v:583.28-583.35" @@ -34167,24 +33918,16 @@ }, "spi_if_ins.o_cs_SB_DFFESR_Q_R": { "hide_name": 0, - "bits": [ 105, 1003, 1004, 1005 ], + "bits": [ 109, 997, 998, 999 ], "attributes": { "force_downto": "00000000000000000000000000000001", "src": "top.v:92.11-108.5|spi_if.v:65.21-70.28|spi_if.v:0.0-0.0|/usr/local/bin/../share/yosys/techmap.v:575.21-575.22", "unused_bits": "1 2 3" } }, - "spi_if_ins.o_cs_SB_LUT4_I2_1_O": { - "hide_name": 0, - "bits": [ 800, 802, 507, 168 ], - "attributes": { - "force_downto": "00000000000000000000000000000001", - "src": "/usr/local/bin/../share/yosys/ice40/cells_map.v:6.21-6.22" - } - }, "spi_if_ins.o_cs_SB_LUT4_I2_2_O": { "hide_name": 0, - "bits": [ 959, 496, 805, 803 ], + "bits": [ 952, 463, 798, 796 ], "attributes": { "force_downto": "00000000000000000000000000000001", "src": "/usr/local/bin/../share/yosys/ice40/cells_map.v:6.21-6.22" @@ -34192,7 +33935,7 @@ }, "spi_if_ins.o_cs_SB_LUT4_I2_O": { "hide_name": 0, - "bits": [ 798, 802, 805 ], + "bits": [ 792, 795, 474, 137 ], "attributes": { "force_downto": "00000000000000000000000000000001", "src": "/usr/local/bin/../share/yosys/ice40/cells_map.v:6.21-6.22" @@ -34200,13 +33943,13 @@ }, "spi_if_ins.o_cs_SB_LUT4_I3_1_O": { "hide_name": 0, - "bits": [ 494 ], + "bits": [ 461 ], "attributes": { } }, "spi_if_ins.o_data_in": { "hide_name": 0, - "bits": [ 94, 90, 110, 178, 177, 175, 173, 170 ], + "bits": [ 98, 95, 181, 180, 179, 177, 175, 172 ], "attributes": { "hdlname": "spi_if_ins o_data_in", "src": "top.v:92.11-108.5|spi_if.v:9.29-9.38" @@ -34214,13 +33957,13 @@ }, "spi_if_ins.o_data_in_SB_DFFE_Q_E": { "hide_name": 0, - "bits": [ 866 ], + "bits": [ 857 ], "attributes": { } }, "spi_if_ins.o_fetch_cmd": { "hide_name": 0, - "bits": [ 878 ], + "bits": [ 865 ], "attributes": { "hdlname": "spi_if_ins o_fetch_cmd", "src": "top.v:92.11-108.5|spi_if.v:12.29-12.40" @@ -34228,19 +33971,27 @@ }, "spi_if_ins.o_fetch_cmd_SB_DFFESR_Q_D": { "hide_name": 0, - "bits": [ 876 ], + "bits": [ 863 ], "attributes": { } }, "spi_if_ins.o_fetch_cmd_SB_DFFESR_Q_E": { "hide_name": 0, - "bits": [ 877 ], + "bits": [ 864 ], "attributes": { } }, "spi_if_ins.o_fetch_cmd_SB_LUT4_I3_1_O": { "hide_name": 0, - "bits": [ 107, 801 ], + "bits": [ 114, 794 ], + "attributes": { + "force_downto": "00000000000000000000000000000001", + "src": "/usr/local/bin/../share/yosys/ice40/cells_map.v:6.21-6.22" + } + }, + "spi_if_ins.o_fetch_cmd_SB_LUT4_I3_O": { + "hide_name": 0, + "bits": [ 121, 114, 168 ], "attributes": { "force_downto": "00000000000000000000000000000001", "src": "/usr/local/bin/../share/yosys/ice40/cells_map.v:6.21-6.22" @@ -34248,53 +33999,51 @@ }, "spi_if_ins.o_ioc": { "hide_name": 0, - "bits": [ 116, 166, 165, 198, 197 ], + "bits": [ 115, 116, 166, 872, 871 ], "attributes": { "hdlname": "spi_if_ins o_ioc", "src": "top.v:92.11-108.5|spi_if.v:8.29-8.34" } }, + "spi_if_ins.o_ioc_SB_DFFE_Q_E": { + "hide_name": 0, + "bits": [ 870, 890, 107 ], + "attributes": { + "force_downto": "00000000000000000000000000000001", + "src": "/usr/local/bin/../share/yosys/ice40/cells_map.v:6.21-6.22" + } + }, "spi_if_ins.o_load_cmd": { "hide_name": 0, - "bits": [ 883 ], + "bits": [ 874 ], "attributes": { "hdlname": "spi_if_ins o_load_cmd", "src": "top.v:92.11-108.5|spi_if.v:13.29-13.39" } }, - "spi_if_ins.o_load_cmd_SB_DFFESR_Q_D": { - "hide_name": 0, - "bits": [ 880, 872 ], - "attributes": { - "force_downto": "00000000000000000000000000000001", - "src": "/usr/local/bin/../share/yosys/ice40/cells_map.v:6.21-6.22" - } - }, - "spi_if_ins.o_load_cmd_SB_DFFESR_Q_D_SB_LUT4_I1_O": { - "hide_name": 0, - "bits": [ 865, 103, 881 ], - "attributes": { - "force_downto": "00000000000000000000000000000001", - "src": "/usr/local/bin/../share/yosys/ice40/cells_map.v:6.21-6.22" - } - }, "spi_if_ins.o_load_cmd_SB_DFFESR_Q_E": { "hide_name": 0, - "bits": [ 882 ], + "bits": [ 873 ], "attributes": { } }, "spi_if_ins.o_load_cmd_SB_LUT4_I2_O": { "hide_name": 0, - "bits": [ 120, 48, 93 ], + "bits": [ 56, 118 ], "attributes": { "force_downto": "00000000000000000000000000000001", "src": "/usr/local/bin/../share/yosys/ice40/cells_map.v:6.21-6.22" } }, - "spi_if_ins.o_load_cmd_SB_LUT4_I2_O_SB_LUT4_O_I2": { + "spi_if_ins.o_load_cmd_SB_LUT4_I2_O_SB_LUT4_I2_O": { "hide_name": 0, - "bits": [ 116, 107, 166 ], + "bits": [ 96 ], + "attributes": { + } + }, + "spi_if_ins.o_load_cmd_SB_LUT4_I2_O_SB_LUT4_I3_O": { + "hide_name": 0, + "bits": [ 127, 877 ], "attributes": { "force_downto": "00000000000000000000000000000001", "src": "/usr/local/bin/../share/yosys/ice40/cells_map.v:6.21-6.22" @@ -34302,7 +34051,7 @@ }, "spi_if_ins.o_spi_miso": { "hide_name": 0, - "bits": [ 492 ], + "bits": [ 459 ], "attributes": { "hdlname": "spi_if_ins o_spi_miso", "src": "top.v:92.11-108.5|spi_if.v:17.29-17.39" @@ -34310,7 +34059,7 @@ }, "spi_if_ins.r_tx_byte": { "hide_name": 0, - "bits": [ 893, 892, 891, 890, 889, 888, 887, 886 ], + "bits": [ 886, 885, 884, 883, 882, 881, 880, 879 ], "attributes": { "hdlname": "spi_if_ins r_tx_byte", "src": "top.v:92.11-108.5|spi_if.v:32.17-32.26" @@ -34318,7 +34067,7 @@ }, "spi_if_ins.r_tx_data_valid": { "hide_name": 0, - "bits": [ 896 ], + "bits": [ 889 ], "attributes": { "hdlname": "spi_if_ins r_tx_data_valid", "src": "top.v:92.11-108.5|spi_if.v:31.17-31.32" @@ -34326,7 +34075,7 @@ }, "spi_if_ins.r_tx_data_valid_SB_DFFESR_Q_D": { "hide_name": 0, - "bits": [ 873, 894 ], + "bits": [ 870, 887 ], "attributes": { "force_downto": "00000000000000000000000000000001", "src": "/usr/local/bin/../share/yosys/ice40/cells_map.v:6.21-6.22" @@ -34334,35 +34083,19 @@ }, "spi_if_ins.r_tx_data_valid_SB_DFFESR_Q_D_SB_LUT4_I3_O": { "hide_name": 0, - "bits": [ 885 ], + "bits": [ 878 ], "attributes": { } }, "spi_if_ins.r_tx_data_valid_SB_DFFESR_Q_E": { "hide_name": 0, - "bits": [ 895 ], + "bits": [ 888 ], "attributes": { } }, "spi_if_ins.r_tx_data_valid_SB_LUT4_I3_O": { "hide_name": 0, - "bits": [ 886, 902, 897 ], - "attributes": { - "force_downto": "00000000000000000000000000000001", - "src": "/usr/local/bin/../share/yosys/ice40/cells_map.v:6.21-6.22" - } - }, - "spi_if_ins.r_tx_data_valid_SB_LUT4_I3_O_SB_LUT4_O_I0": { - "hide_name": 0, - "bits": [ 898, 899, 900, 901 ], - "attributes": { - "force_downto": "00000000000000000000000000000001", - "src": "/usr/local/bin/../share/yosys/ice40/cells_map.v:6.21-6.22" - } - }, - "spi_if_ins.r_tx_data_valid_SB_LUT4_I3_O_SB_LUT4_O_I0_SB_LUT4_O_I3": { - "hide_name": 0, - "bits": [ 903, 904, 905, 906 ], + "bits": [ 893, 892, 891 ], "attributes": { "force_downto": "00000000000000000000000000000001", "src": "/usr/local/bin/../share/yosys/ice40/cells_map.v:6.21-6.22" @@ -34370,7 +34103,7 @@ }, "spi_if_ins.spi.SCKr": { "hide_name": 0, - "bits": [ 916, 914, 915 ], + "bits": [ 894, 892, 893 ], "attributes": { "hdlname": "spi_if_ins spi SCKr", "src": "top.v:92.11-108.5|spi_slave.v:62.13-62.17|spi_if.v:42.15-54.6" @@ -34378,7 +34111,7 @@ }, "spi_if_ins.spi.SCKr_SB_LUT4_I0_O": { "hide_name": 0, - "bits": [ 901, 917, 897 ], + "bits": [ 913, 897, 891 ], "attributes": { "force_downto": "00000000000000000000000000000001", "src": "/usr/local/bin/../share/yosys/ice40/cells_map.v:6.21-6.22" @@ -34410,7 +34143,7 @@ }, "spi_if_ins.spi.i_sys_clk": { "hide_name": 0, - "bits": [ 89 ], + "bits": [ 94 ], "attributes": { "hdlname": "spi_if_ins spi i_sys_clk", "src": "top.v:92.11-108.5|spi_slave.v:5.23-5.32|spi_if.v:42.15-54.6" @@ -34418,7 +34151,7 @@ }, "spi_if_ins.spi.i_tx_byte": { "hide_name": 0, - "bits": [ 893, 892, 891, 890, 889, 888, 887, 886 ], + "bits": [ 886, 885, 884, 883, 882, 881, 880, 879 ], "attributes": { "hdlname": "spi_if_ins spi i_tx_byte", "src": "top.v:92.11-108.5|spi_slave.v:9.23-9.32|spi_if.v:42.15-54.6" @@ -34426,7 +34159,7 @@ }, "spi_if_ins.spi.i_tx_data_valid": { "hide_name": 0, - "bits": [ 896 ], + "bits": [ 889 ], "attributes": { "hdlname": "spi_if_ins spi i_tx_data_valid", "src": "top.v:92.11-108.5|spi_slave.v:8.23-8.38|spi_if.v:42.15-54.6" @@ -34434,7 +34167,7 @@ }, "spi_if_ins.spi.o_rx_byte": { "hide_name": 0, - "bits": [ 871, 870, 869, 868, 867, 863, 862, 865 ], + "bits": [ 862, 861, 860, 859, 858, 854, 853, 856 ], "attributes": { "hdlname": "spi_if_ins spi o_rx_byte", "src": "top.v:92.11-108.5|spi_slave.v:7.23-7.32|spi_if.v:42.15-54.6" @@ -34442,7 +34175,7 @@ }, "spi_if_ins.spi.o_rx_data_valid": { "hide_name": 0, - "bits": [ 873 ], + "bits": [ 870 ], "attributes": { "hdlname": "spi_if_ins spi o_rx_data_valid", "src": "top.v:92.11-108.5|spi_slave.v:6.23-6.38|spi_if.v:42.15-54.6" @@ -34450,7 +34183,7 @@ }, "spi_if_ins.spi.o_spi_miso": { "hide_name": 0, - "bits": [ 492 ], + "bits": [ 459 ], "attributes": { "hdlname": "spi_if_ins spi o_spi_miso", "src": "top.v:92.11-108.5|spi_slave.v:13.23-13.33|spi_if.v:42.15-54.6" @@ -34458,20 +34191,44 @@ }, "spi_if_ins.spi.o_spi_miso_SB_DFFE_Q_D": { "hide_name": 0, - "bits": [ 927 ], + "bits": [ 907 ], "attributes": { "src": "top.v:92.11-108.5|spi_slave.v:69.3-86.6|spi_if.v:42.15-54.6" } }, + "spi_if_ins.spi.o_spi_miso_SB_DFFE_Q_D_SB_LUT4_O_I2": { + "hide_name": 0, + "bits": [ 879, 909, 891 ], + "attributes": { + "force_downto": "00000000000000000000000000000001", + "src": "/usr/local/bin/../share/yosys/ice40/cells_map.v:6.21-6.22" + } + }, + "spi_if_ins.spi.o_spi_miso_SB_DFFE_Q_D_SB_LUT4_O_I2_SB_LUT4_O_I0": { + "hide_name": 0, + "bits": [ 910, 911, 912, 913 ], + "attributes": { + "force_downto": "00000000000000000000000000000001", + "src": "/usr/local/bin/../share/yosys/ice40/cells_map.v:6.21-6.22" + } + }, + "spi_if_ins.spi.o_spi_miso_SB_DFFE_Q_D_SB_LUT4_O_I2_SB_LUT4_O_I0_SB_LUT4_O_I3": { + "hide_name": 0, + "bits": [ 914, 915, 895, 916 ], + "attributes": { + "force_downto": "00000000000000000000000000000001", + "src": "/usr/local/bin/../share/yosys/ice40/cells_map.v:6.21-6.22" + } + }, "spi_if_ins.spi.o_spi_miso_SB_DFFE_Q_E": { "hide_name": 0, - "bits": [ 928 ], + "bits": [ 908 ], "attributes": { } }, "spi_if_ins.spi.r2_rx_done": { "hide_name": 0, - "bits": [ 930 ], + "bits": [ 924 ], "attributes": { "hdlname": "spi_if_ins spi r2_rx_done", "src": "top.v:92.11-108.5|spi_slave.v:22.7-22.17|spi_if.v:42.15-54.6" @@ -34479,7 +34236,7 @@ }, "spi_if_ins.spi.r3_rx_done": { "hide_name": 0, - "bits": [ 931 ], + "bits": [ 925 ], "attributes": { "hdlname": "spi_if_ins spi r3_rx_done", "src": "top.v:92.11-108.5|spi_slave.v:23.7-23.17|spi_if.v:42.15-54.6" @@ -34487,14 +34244,14 @@ }, "spi_if_ins.spi.r3_rx_done_SB_LUT4_I2_O": { "hide_name": 0, - "bits": [ 919 ], + "bits": [ 899 ], "attributes": { "src": "top.v:92.11-108.5|spi_slave.v:48.3-60.6|spi_if.v:42.15-54.6" } }, "spi_if_ins.spi.r_rx_bit_count": { "hide_name": 0, - "bits": [ 937, 935, 933 ], + "bits": [ 931, 929, 927 ], "attributes": { "hdlname": "spi_if_ins spi r_rx_bit_count", "src": "top.v:92.11-108.5|spi_slave.v:17.13-17.27|spi_if.v:42.15-54.6" @@ -34502,7 +34259,7 @@ }, "spi_if_ins.spi.r_rx_bit_count_SB_DFFR_Q_2_D": { "hide_name": 0, - "bits": [ 936, 935, 933 ], + "bits": [ 930, 929, 927 ], "attributes": { "force_downto": "00000000000000000000000000000001", "src": "top.v:92.11-108.5|spi_slave.v:34.25-34.43|spi_if.v:42.15-54.6|/usr/local/bin/../share/yosys/ice40/arith_map.v:33.23-33.24" @@ -34510,7 +34267,7 @@ }, "spi_if_ins.spi.r_rx_bit_count_SB_DFFR_Q_D": { "hide_name": 0, - "bits": [ 936, 934, 932 ], + "bits": [ 930, 928, 926 ], "attributes": { "force_downto": "00000000000000000000000000000001", "src": "top.v:92.11-108.5|spi_slave.v:34.25-34.43|spi_if.v:42.15-54.6|/usr/local/bin/../share/yosys/ice40/arith_map.v:33.26-33.27" @@ -34518,7 +34275,7 @@ }, "spi_if_ins.spi.r_rx_bit_count_SB_DFFR_Q_D_SB_LUT4_O_I3": { "hide_name": 0, - "bits": [ "0", 937, 938 ], + "bits": [ "0", 931, 932 ], "attributes": { "force_downto": "00000000000000000000000000000001", "src": "top.v:92.11-108.5|spi_slave.v:34.25-34.43|spi_if.v:42.15-54.6|/usr/local/bin/../share/yosys/ice40/arith_map.v:51.21-51.22" @@ -34526,7 +34283,7 @@ }, "spi_if_ins.spi.r_rx_byte": { "hide_name": 0, - "bits": [ 926, 925, 924, 923, 922, 921, 920, 918 ], + "bits": [ 906, 905, 904, 903, 902, 901, 900, 898 ], "attributes": { "hdlname": "spi_if_ins spi r_rx_byte", "src": "top.v:92.11-108.5|spi_slave.v:20.13-20.22|spi_if.v:42.15-54.6" @@ -34534,7 +34291,7 @@ }, "spi_if_ins.spi.r_rx_done": { "hide_name": 0, - "bits": [ 929 ], + "bits": [ 923 ], "attributes": { "hdlname": "spi_if_ins spi r_rx_done", "src": "top.v:92.11-108.5|spi_slave.v:21.7-21.16|spi_if.v:42.15-54.6" @@ -34542,7 +34299,7 @@ }, "spi_if_ins.spi.r_rx_done_SB_DFFER_Q_D": { "hide_name": 0, - "bits": [ 44, 947 ], + "bits": [ 44, 941 ], "attributes": { "force_downto": "00000000000000000000000000000001", "src": "/usr/local/bin/../share/yosys/ice40/cells_map.v:6.21-6.22" @@ -34550,19 +34307,19 @@ }, "spi_if_ins.spi.r_rx_done_SB_DFFER_Q_D_SB_LUT4_I3_O": { "hide_name": 0, - "bits": [ 940 ], + "bits": [ 934 ], "attributes": { } }, "spi_if_ins.spi.r_rx_done_SB_DFFER_Q_E": { "hide_name": 0, - "bits": [ 948 ], + "bits": [ 942 ], "attributes": { } }, "spi_if_ins.spi.r_temp_rx_byte": { "hide_name": 0, - "bits": [ 946, 945, 944, 943, 942, 941, 939, "x" ], + "bits": [ 940, 939, 938, 937, 936, 935, 933, "x" ], "attributes": { "hdlname": "spi_if_ins spi r_temp_rx_byte", "src": "top.v:92.11-108.5|spi_slave.v:19.13-19.27|spi_if.v:42.15-54.6" @@ -34570,7 +34327,7 @@ }, "spi_if_ins.spi.r_tx_bit_count": { "hide_name": 0, - "bits": [ 905, 901, 909 ], + "bits": [ 895, 913, 896 ], "attributes": { "hdlname": "spi_if_ins spi r_tx_bit_count", "src": "top.v:92.11-108.5|spi_slave.v:18.13-18.27|spi_if.v:42.15-54.6" @@ -34578,7 +34335,7 @@ }, "spi_if_ins.spi.r_tx_bit_count_SB_DFFESR_Q_D": { "hide_name": 0, - "bits": [ 949, 953, 952 ], + "bits": [ 943, 947, 946 ], "attributes": { "force_downto": "00000000000000000000000000000001", "src": "top.v:92.11-108.5|spi_slave.v:77.27-77.45|spi_if.v:42.15-54.6|/usr/local/bin/../share/yosys/ice40/arith_map.v:33.26-33.27" @@ -34586,7 +34343,7 @@ }, "spi_if_ins.spi.r_tx_bit_count_SB_DFFESR_Q_D_SB_LUT4_O_I3": { "hide_name": 0, - "bits": [ "1", 905, 951 ], + "bits": [ "1", 895, 945 ], "attributes": { "force_downto": "00000000000000000000000000000001", "src": "top.v:92.11-108.5|spi_slave.v:77.27-77.45|spi_if.v:42.15-54.6|/usr/local/bin/../share/yosys/ice40/arith_map.v:51.21-51.22" @@ -34594,13 +34351,13 @@ }, "spi_if_ins.spi.r_tx_bit_count_SB_DFFESR_Q_R": { "hide_name": 0, - "bits": [ 950 ], + "bits": [ 944 ], "attributes": { } }, "spi_if_ins.spi.r_tx_byte": { "hide_name": 0, - "bits": [ 903, 912, 907, 910, 904, 913, 908, 911 ], + "bits": [ 914, 921, 917, 919, 915, 922, 918, 920 ], "attributes": { "hdlname": "spi_if_ins spi r_tx_byte", "src": "top.v:92.11-108.5|spi_slave.v:24.13-24.22|spi_if.v:42.15-54.6" @@ -34608,13 +34365,13 @@ }, "spi_if_ins.spi.r_tx_byte_SB_DFFESR_Q_E": { "hide_name": 0, - "bits": [ 954 ], + "bits": [ 948 ], "attributes": { } }, "spi_if_ins.state_if": { "hide_name": 0, - "bits": [ 874, 875, 872 ], + "bits": [ 875, 876, 868 ], "attributes": { "hdlname": "spi_if_ins state_if", "src": "top.v:92.11-108.5|spi_if.v:28.17-28.25" @@ -34622,13 +34379,13 @@ }, "spi_if_ins.state_if_SB_DFFESR_Q_1_R": { "hide_name": 0, - "bits": [ 879 ], + "bits": [ 866 ], "attributes": { } }, "spi_if_ins.state_if_SB_DFFESR_Q_D": { "hide_name": 0, - "bits": [ 956, 865, 884, 873 ], + "bits": [ 950, 856, 890, 870 ], "attributes": { "force_downto": "00000000000000000000000000000001", "src": "/usr/local/bin/../share/yosys/ice40/cells_map.v:6.21-6.22" @@ -34636,20 +34393,21 @@ }, "spi_if_ins.state_if_SB_DFFE_Q_D": { "hide_name": 0, - "bits": [ 957 ], + "bits": [ 867, 869, 870 ], "attributes": { - "src": "top.v:92.11-108.5|spi_if.v:56.5-111.8" + "force_downto": "00000000000000000000000000000001", + "src": "/usr/local/bin/../share/yosys/ice40/cells_map.v:6.21-6.22" } }, "spi_if_ins.state_if_SB_DFFE_Q_E": { "hide_name": 0, - "bits": [ 955 ], + "bits": [ 949 ], "attributes": { } }, "spi_if_ins.w_rx_data": { "hide_name": 0, - "bits": [ 871, 870, 869, 868, 867, 863, 862, 865 ], + "bits": [ 862, 861, 860, 859, 858, 854, 853, 856 ], "attributes": { "hdlname": "spi_if_ins w_rx_data", "src": "top.v:92.11-108.5|spi_if.v:30.17-30.26" @@ -34657,7 +34415,7 @@ }, "spi_if_ins.w_rx_data_valid": { "hide_name": 0, - "bits": [ 873 ], + "bits": [ 870 ], "attributes": { "hdlname": "spi_if_ins w_rx_data_valid", "src": "top.v:92.11-108.5|spi_if.v:29.17-29.32" @@ -34665,7 +34423,7 @@ }, "sys_ctrl_ins.i_cs": { "hide_name": 0, - "bits": [ 864 ], + "bits": [ 855 ], "attributes": { "hdlname": "sys_ctrl_ins i_cs", "src": "top.v:113.13-126.5|sys_ctrl.v:9.29-9.33" @@ -34673,7 +34431,7 @@ }, "sys_ctrl_ins.i_data_in": { "hide_name": 0, - "bits": [ 94, 90, 110, 178, 177, 175, 173, 170 ], + "bits": [ 98, 95, 181, 180, 179, 177, 175, 172 ], "attributes": { "hdlname": "sys_ctrl_ins i_data_in", "src": "top.v:113.13-126.5|sys_ctrl.v:7.29-7.38" @@ -34689,7 +34447,7 @@ }, "sys_ctrl_ins.i_fetch_cmd": { "hide_name": 0, - "bits": [ 878 ], + "bits": [ 865 ], "attributes": { "hdlname": "sys_ctrl_ins i_fetch_cmd", "src": "top.v:113.13-126.5|sys_ctrl.v:10.29-10.40" @@ -34697,7 +34455,7 @@ }, "sys_ctrl_ins.i_ioc": { "hide_name": 0, - "bits": [ 116, 166, 165, 198, 197 ], + "bits": [ 115, 116, 166, 872, 871 ], "attributes": { "hdlname": "sys_ctrl_ins i_ioc", "src": "top.v:113.13-126.5|sys_ctrl.v:6.29-6.34" @@ -34705,7 +34463,7 @@ }, "sys_ctrl_ins.i_load_cmd": { "hide_name": 0, - "bits": [ 883 ], + "bits": [ 874 ], "attributes": { "hdlname": "sys_ctrl_ins i_load_cmd", "src": "top.v:113.13-126.5|sys_ctrl.v:11.29-11.39" @@ -34721,7 +34479,7 @@ }, "sys_ctrl_ins.i_sys_clk": { "hide_name": 0, - "bits": [ 89 ], + "bits": [ 94 ], "attributes": { "hdlname": "sys_ctrl_ins i_sys_clk", "src": "top.v:113.13-126.5|sys_ctrl.v:4.29-4.38" @@ -34729,7 +34487,7 @@ }, "sys_ctrl_ins.o_data_out": { "hide_name": 0, - "bits": [ 959, "0", "0", "0", "0", "0", "0", "0" ], + "bits": [ 952, "0", "0", "0", "0", "0", "0", "0" ], "attributes": { "hdlname": "sys_ctrl_ins o_data_out", "src": "top.v:113.13-126.5|sys_ctrl.v:8.29-8.39" @@ -34737,13 +34495,21 @@ }, "sys_ctrl_ins.o_data_out_SB_DFFE_Q_E": { "hide_name": 0, - "bits": [ 958 ], + "bits": [ 951 ], "attributes": { } }, + "sys_ctrl_ins.o_data_out_SB_LUT4_I0_I2": { + "hide_name": 0, + "bits": [ 151, 474, 798 ], + "attributes": { + "force_downto": "00000000000000000000000000000001", + "src": "/usr/local/bin/../share/yosys/ice40/cells_map.v:6.21-6.22" + } + }, "sys_ctrl_ins.o_soft_reset": { "hide_name": 0, - "bits": [ 93 ], + "bits": [ 56 ], "attributes": { "hdlname": "sys_ctrl_ins o_soft_reset", "src": "top.v:113.13-126.5|sys_ctrl.v:13.29-13.41" @@ -34751,13 +34517,13 @@ }, "sys_ctrl_ins.o_soft_reset_SB_DFFESS_Q_E": { "hide_name": 0, - "bits": [ 960 ], + "bits": [ 953 ], "attributes": { } }, "sys_ctrl_ins.o_soft_reset_SB_DFFESS_Q_S": { "hide_name": 0, - "bits": [ 961 ], + "bits": [ 954 ], "attributes": { "force_downto": "00000000000000000000000000000001", "src": "top.v:113.13-126.5|sys_ctrl.v:72.17-72.36|/usr/local/bin/../share/yosys/cmp2lut.v:24.22-24.23" @@ -34765,7 +34531,7 @@ }, "sys_ctrl_ins.reset_cmd": { "hide_name": 0, - "bits": [ 962 ], + "bits": [ 955 ], "attributes": { "hdlname": "sys_ctrl_ins reset_cmd", "src": "top.v:113.13-126.5|sys_ctrl.v:35.9-35.18" @@ -34773,19 +34539,27 @@ }, "sys_ctrl_ins.reset_cmd_SB_DFFESR_Q_E": { "hide_name": 0, - "bits": [ 967 ], + "bits": [ 960 ], "attributes": { } }, + "sys_ctrl_ins.reset_cmd_SB_DFFESR_Q_E_SB_LUT4_O_I2": { + "hide_name": 0, + "bits": [ 117, 178, 154, 184 ], + "attributes": { + "force_downto": "00000000000000000000000000000001", + "src": "/usr/local/bin/../share/yosys/ice40/cells_map.v:6.21-6.22" + } + }, "sys_ctrl_ins.reset_cmd_SB_DFFESR_Q_R": { "hide_name": 0, - "bits": [ 968 ], + "bits": [ 961 ], "attributes": { } }, "sys_ctrl_ins.reset_count": { "hide_name": 0, - "bits": [ 966, 964, 965, 963 ], + "bits": [ 959, 957, 958, 956 ], "attributes": { "hdlname": "sys_ctrl_ins reset_count", "src": "top.v:113.13-126.5|sys_ctrl.v:34.15-34.26" @@ -34793,31 +34567,31 @@ }, "sys_ctrl_ins.reset_count_SB_DFFESR_Q_1_D": { "hide_name": 0, - "bits": [ 971 ], + "bits": [ 964 ], "attributes": { } }, "sys_ctrl_ins.reset_count_SB_DFFESR_Q_2_D": { "hide_name": 0, - "bits": [ 973 ], + "bits": [ 966 ], "attributes": { } }, "sys_ctrl_ins.reset_count_SB_DFFESR_Q_3_D": { "hide_name": 0, - "bits": [ 974 ], + "bits": [ 967 ], "attributes": { } }, "sys_ctrl_ins.reset_count_SB_DFFESR_Q_D": { "hide_name": 0, - "bits": [ 970 ], + "bits": [ 963 ], "attributes": { } }, "sys_ctrl_ins.reset_count_SB_DFFESR_Q_D_SB_LUT4_O_I3": { "hide_name": 0, - "bits": [ "0", 966, 972, 975 ], + "bits": [ "0", 959, 965, 968 ], "attributes": { "force_downto": "00000000000000000000000000000001", "src": "top.v:113.13-126.5|sys_ctrl.v:73.32-73.50|/usr/local/bin/../share/yosys/ice40/arith_map.v:51.21-51.22" @@ -34825,69 +34599,69 @@ }, "sys_ctrl_ins.reset_count_SB_DFFESR_Q_E": { "hide_name": 0, - "bits": [ 969 ], + "bits": [ 962 ], "attributes": { } }, "w_clock_spi": { "hide_name": 0, - "bits": [ 89 ], + "bits": [ 94 ], "attributes": { "src": "top.v:66.16-66.27" } }, "w_clock_sys": { "hide_name": 0, - "bits": [ 89 ], + "bits": [ 94 ], "attributes": { "src": "top.v:67.16-67.27" } }, "w_cs": { "hide_name": 0, - "bits": [ 864, 104, 784, 861 ], + "bits": [ 855, 108, 777, 852 ], "attributes": { "src": "top.v:71.16-71.20" } }, "w_fetch": { "hide_name": 0, - "bits": [ 878 ], + "bits": [ 865 ], "attributes": { "src": "top.v:72.16-72.23" } }, "w_ioc": { "hide_name": 0, - "bits": [ 116, 166, 165, 198, 197 ], + "bits": [ 115, 116, 166, 872, 871 ], "attributes": { "src": "top.v:68.16-68.21" } }, "w_load": { "hide_name": 0, - "bits": [ 883 ], + "bits": [ 874 ], "attributes": { "src": "top.v:73.16-73.22" } }, "w_lvds_rx_09_d0": { "hide_name": 0, - "bits": [ 255 ], + "bits": [ 220 ], "attributes": { - "src": "top.v:228.9-228.24" + "src": "top.v:227.9-227.24" } }, "w_lvds_rx_09_d1": { "hide_name": 0, - "bits": [ 256 ], + "bits": [ 221 ], "attributes": { - "src": "top.v:229.9-229.24" + "src": "top.v:228.9-228.24" } }, "w_lvds_rx_09_d1_SB_LUT4_I0_O": { "hide_name": 0, - "bits": [ 93, 366 ], + "bits": [ 56, 337 ], "attributes": { "force_downto": "00000000000000000000000000000001", "src": "/usr/local/bin/../share/yosys/ice40/cells_map.v:6.21-6.22" @@ -34895,35 +34669,35 @@ }, "w_lvds_rx_09_d1_SB_LUT4_I0_O_SB_LUT4_I3_O": { "hide_name": 0, - "bits": [ 202 ], + "bits": [ 204 ], "attributes": { } }, "w_lvds_rx_09_d1_SB_LUT4_I3_O": { "hide_name": 0, - "bits": [ 300, 298, 205, 204, 203, 201, 296, 294, 292, 290, 288, 286, 282, 280, 278, 276, 274, 272, 270, 268, 266, 264, 314, 312, 310, 308, 306, 304, 302, 284, 262, 260 ], + "bits": [ 265, 263, 207, 206, 205, 203, 261, 259, 257, 255, 253, 251, 247, 245, 243, 241, 239, 237, 235, 233, 231, 229, 279, 277, 275, 273, 271, 269, 267, 249, 227, 225 ], "attributes": { "force_downto": "00000000000000000000000000000001", - "src": "top.v:249.12-258.5|lvds_rx.v:47.13-78.20|lvds_rx.v:0.0-0.0|/usr/local/bin/../share/yosys/techmap.v:575.21-575.22" + "src": "top.v:248.12-257.5|lvds_rx.v:47.13-78.20|lvds_rx.v:0.0-0.0|/usr/local/bin/../share/yosys/techmap.v:575.21-575.22" } }, "w_lvds_rx_24_d0": { "hide_name": 0, - "bits": [ 257 ], + "bits": [ 222 ], "attributes": { - "src": "top.v:230.9-230.24" + "src": "top.v:229.9-229.24" } }, "w_lvds_rx_24_d1": { "hide_name": 0, - "bits": [ 258 ], + "bits": [ 223 ], "attributes": { - "src": "top.v:231.9-231.24" + "src": "top.v:230.9-230.24" } }, "w_lvds_rx_24_d1_SB_LUT4_I0_O": { "hide_name": 0, - "bits": [ 93, 490 ], + "bits": [ 457, 458, 56 ], "attributes": { "force_downto": "00000000000000000000000000000001", "src": "/usr/local/bin/../share/yosys/ice40/cells_map.v:6.21-6.22" @@ -34931,21 +34705,37 @@ }, "w_lvds_rx_24_d1_SB_LUT4_I0_O_SB_LUT4_I3_O": { "hide_name": 0, - "bits": [ 369 ], + "bits": [ 341 ], "attributes": { } }, + "w_lvds_rx_24_d1_SB_LUT4_I0_O_SB_LUT4_O_I2": { + "hide_name": 0, + "bits": [ 413, 411, 969, 414 ], + "attributes": { + "force_downto": "00000000000000000000000000000001", + "src": "/usr/local/bin/../share/yosys/ice40/cells_map.v:6.21-6.22" + } + }, + "w_lvds_rx_24_d1_SB_LUT4_I0_O_SB_LUT4_O_I2_SB_LUT4_I0_O": { + "hide_name": 0, + "bits": [ 420, 421, 408, 422 ], + "attributes": { + "force_downto": "00000000000000000000000000000001", + "src": "/usr/local/bin/../share/yosys/ice40/cells_map.v:6.21-6.22" + } + }, "w_lvds_rx_24_d1_SB_LUT4_I3_O": { "hide_name": 0, - "bits": [ 419, 417, 413, 411, 409, 407, 405, 403, 401, 399, 397, 395, 391, 389, 387, 385, 383, 381, 379, 377, 375, 373, 431, 429, 427, 425, 423, 421, 415, 393, 371, 368 ], + "bits": [ 391, 389, 385, 383, 381, 379, 377, 375, 373, 371, 369, 367, 363, 361, 359, 357, 355, 353, 351, 349, 347, 345, 403, 401, 399, 397, 395, 393, 387, 365, 343, 340 ], "attributes": { "force_downto": "00000000000000000000000000000001", - "src": "top.v:273.12-282.5|lvds_rx.v:47.13-78.20|lvds_rx.v:0.0-0.0|/usr/local/bin/../share/yosys/techmap.v:575.21-575.22" + "src": "top.v:272.12-281.5|lvds_rx.v:47.13-78.20|lvds_rx.v:0.0-0.0|/usr/local/bin/../share/yosys/techmap.v:575.21-575.22" } }, "w_rx_09_fifo_data": { "hide_name": 0, - "bits": [ 301, 299, 22, 23, 24, 25 ], + "bits": [ 266, 264, 22, 23, 24, 25 ], "attributes": { } }, @@ -34953,96 +34743,96 @@ "hide_name": 0, "bits": [ 20 ], "attributes": { - "src": "top.v:234.9-234.27" + "src": "top.v:233.9-233.27" } }, "w_rx_09_fifo_full": { "hide_name": 0, - "bits": [ 329 ], + "bits": [ 302 ], "attributes": { - "src": "top.v:233.9-233.26" + "src": "top.v:232.9-232.26" } }, "w_rx_09_fifo_pull": { "hide_name": 0, - "bits": [ 556 ], + "bits": [ 521 ], "attributes": { - "src": "top.v:238.9-238.26" + "src": "top.v:237.9-237.26" } }, "w_rx_09_fifo_pulled_data": { "hide_name": 0, - "bits": [ 68, 558, 559, 560, 561, 562, 563, 564, 565, 566, 567, 568, 569, 570, 571, 572, 540, 541, 542, 543, 544, 545, 546, 547, 548, 549, 550, 551, 552, 553, 554, 555 ], + "bits": [ 73, 523, 524, 525, 526, 527, 528, 529, 530, 531, 532, 533, 534, 535, 536, 537, 505, 506, 507, 508, 509, 510, 511, 512, 513, 514, 515, 516, 517, 518, 519, 520 ], "attributes": { - "src": "top.v:239.16-239.40" + "src": "top.v:238.16-238.40" } }, "w_rx_09_fifo_push": { "hide_name": 0, - "bits": [ 327 ], + "bits": [ 301 ], "attributes": { - "src": "top.v:236.9-236.26" + "src": "top.v:235.9-235.26" } }, "w_rx_09_fifo_write_clk": { "hide_name": 0, - "bits": [ 200 ], + "bits": [ 202 ], "attributes": { - "src": "top.v:235.9-235.31" + "src": "top.v:234.9-234.31" } }, "w_rx_24_fifo_data": { "hide_name": 0, - "bits": [ 420, 418, 414, 412, 410, 408, 406, 404, 402, 400, 398, 396, 392, 390, 388, 386, 384, 382, 380, 378, 376, 374, 432, 430, 428, 426, 424, 422, 416, 394, 372, 370 ], + "bits": [ 392, 390, 386, 384, 382, 380, 378, 376, 374, 372, 370, 368, 364, 362, 360, 358, 356, 354, 352, 350, 348, 346, 404, 402, 400, 398, 396, 394, 388, 366, 344, 342 ], "attributes": { - "src": "top.v:245.16-245.33" + "src": "top.v:244.16-244.33" } }, "w_rx_24_fifo_empty": { "hide_name": 0, - "bits": [ 57 ], + "bits": [ 68 ], "attributes": { - "src": "top.v:242.9-242.27" + "src": "top.v:241.9-241.27" } }, "w_rx_24_fifo_full": { "hide_name": 0, - "bits": [ 446 ], + "bits": [ 426 ], "attributes": { - "src": "top.v:241.9-241.26" + "src": "top.v:240.9-240.26" } }, "w_rx_24_fifo_pull": { "hide_name": 0, - "bits": [ 641 ], + "bits": [ 58 ], "attributes": { - "src": "top.v:246.9-246.26" + "src": "top.v:245.9-245.26" } }, "w_rx_24_fifo_pulled_data": { "hide_name": 0, - "bits": [ 71, 685, 686, 687, 688, 689, 690, 691, 692, 693, 694, 695, 696, 697, 698, 699, 668, 669, 670, 671, 672, 673, 674, 675, 676, 677, 678, 679, 680, 681, 682, 683 ], + "bits": [ 76, 697, 698, 699, 700, 701, 702, 703, 704, 705, 706, 707, 708, 709, 710, 711, 680, 681, 682, 683, 684, 685, 686, 687, 688, 689, 690, 691, 692, 693, 694, 695 ], "attributes": { - "src": "top.v:247.16-247.40" + "src": "top.v:246.16-246.40" } }, "w_rx_24_fifo_push": { "hide_name": 0, - "bits": [ 444 ], + "bits": [ 425 ], "attributes": { - "src": "top.v:244.9-244.26" + "src": "top.v:243.9-243.26" } }, "w_rx_24_fifo_write_clk": { "hide_name": 0, - "bits": [ 200 ], + "bits": [ 202 ], "attributes": { - "src": "top.v:243.9-243.31" + "src": "top.v:242.9-242.31" } }, "w_rx_data": { "hide_name": 0, - "bits": [ 94, 90, 110, 178, 177, 175, 173, 170 ], + "bits": [ 98, 95, 181, 180, 179, 177, 175, 172 ], "attributes": { "src": "top.v:69.16-69.25" } @@ -35051,67 +34841,67 @@ "hide_name": 0, "bits": [ 28, 29, 30 ], "attributes": { - "src": "top.v:329.15-329.25" + "src": "top.v:328.15-328.25" } }, "w_smi_data_input": { "hide_name": 0, "bits": [ 32, 33, 34, 35, 36, 37, 38, 39 ], "attributes": { - "src": "top.v:331.15-331.31" + "src": "top.v:330.15-330.31" } }, "w_smi_data_output": { "hide_name": 0, - "bits": [ 32, 254, 253, 252, 251, 250, 249, 248 ], + "bits": [ 32, 219, 218, 217, 216, 215, 214, 213 ], "attributes": { - "src": "top.v:330.15-330.32" + "src": "top.v:329.15-329.32" } }, "w_smi_read_req": { "hide_name": 0, - "bits": [ 199 ], + "bits": [ 201 ], "attributes": { - "src": "top.v:332.9-332.23" + "src": "top.v:331.9-331.23" } }, "w_smi_write_req": { "hide_name": 0, "bits": [ "x" ], "attributes": { - "src": "top.v:333.9-333.24" + "src": "top.v:332.9-332.24" } }, "w_smi_writing": { "hide_name": 0, "bits": [ 30 ], "attributes": { - "src": "top.v:334.9-334.22" + "src": "top.v:333.9-333.22" } }, "w_soft_reset": { "hide_name": 0, - "bits": [ 93 ], + "bits": [ 56 ], "attributes": { "src": "top.v:75.16-75.28" } }, "w_tx_data_io": { "hide_name": 0, - "bits": [ 168, 137, 140, 143, 148, 154, 159, 163 ], + "bits": [ 170, 137, 151, 140, 145, 158, 161, 163 ], "attributes": { "src": "top.v:78.16-78.28" } }, "w_tx_data_smi": { "hide_name": 0, - "bits": [ 800, 799, 798, 797 ], + "bits": [ 793, 792, 791, 790 ], "attributes": { } }, "w_tx_data_sys": { "hide_name": 0, - "bits": [ 959, "0", "0", "0", "0", "0", "0", "0" ], + "bits": [ 952, "0", "0", "0", "0", "0", "0", "0" ], "attributes": { "src": "top.v:77.16-77.29" } diff --git a/firmware/top.v b/firmware/top.v index 00a0331..b30d83c 100644 --- a/firmware/top.v +++ b/firmware/top.v @@ -139,7 +139,6 @@ module top( /// Digital interfaces .i_button (i_button), .i_config (i_config), - .o_ldo_2v8_en (o_ldo_2v8_en), .o_led0 (o_led0), .o_led1 (o_led1), .o_pmod (), diff --git a/software/libcariboulite/build/test/fpgacomm b/software/libcariboulite/build/test/fpgacomm index 7e70d8a2c8aa025be4472b8259780ec3761063ab..3e3743ce1cc1fa86e4300503d8fa11abdf35b1a6 100755 GIT binary patch delta 8208 zcmb`MeOy-6mdE!xhetp~9~1%t142?$1VXQprf|`#=G?&ROIR3CHfp|r3W=l6LnD^= zsv({9=%|5%CT5P>^Kg&1V34bh)YZbMNDi6l!?CoPNnTj!hyH=mh5@AGl9_jm2J z*WP>WwfEWQ*wohJbX$-0QPj6Ay3%nyQiw}sAD#`GM`vGIH6wN7pZ+K8KZmwnpLVIV zs?zPDgTB<@p6}mIblg3^Tcxjm!$S@cG)jo$?y%lZ`#TsLw8DrayRw7vx4)U!?++Tm_%!E!~QSP1?*-Yfo z;-U|e$9*F@9^j6SajD3*KT^(=+J7Qv>jtEAcHz+xoP`Z4Sb~&} zss!W}TU0S*n<{d_=fP>nBfyj03!k5>#B!6b>?VbF6AzjcK;9z33v-`c@!Y zXUhjreH^OJw^VTqj$UT_zU6f1SQnerFrzSsj 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