From ef5f3ae6bf8bb4be3566cd03e274439c2cb18e74 Mon Sep 17 00:00:00 2001 From: meexmachina Date: Fri, 3 Sep 2021 11:19:28 +0300 Subject: [PATCH] smi lvds check --- firmware/lvds_rx.v | 12 +- firmware/top.asc | 12734 ++++++++-------- firmware/top.bin | Bin 32220 -> 32220 bytes firmware/top.json | 11167 +++++++------- firmware/top.v | 19 +- .../src/at86rf215/build/test_at86rf215 | Bin 232204 -> 232204 bytes .../src/at86rf215/test_at86rf215.c | 2 +- 7 files changed, 11990 insertions(+), 11944 deletions(-) diff --git a/firmware/lvds_rx.v b/firmware/lvds_rx.v index ce0e120..8a865db 100644 --- a/firmware/lvds_rx.v +++ b/firmware/lvds_rx.v @@ -14,7 +14,7 @@ module lvds_rx localparam state_idle = 3'b00, state_i_phase = 3'b01, - state_q_phase = 3'b10; + state_q_phase = 3'b11; // Modem sync symbols localparam @@ -39,12 +39,11 @@ module lvds_rx end // Global Assignments - assign o_fifo_push = r_push; - //assign o_fifo_data = r_data; + //assign o_fifo_push = r_push; assign o_fifo_write_clk = i_ddr_clk; // Main Process - always @(negedge i_ddr_clk) + always @(posedge i_ddr_clk) begin if (i_reset) begin r_state_if = state_idle; @@ -53,9 +52,10 @@ module lvds_rx r_data = 0; r_cnt = 0; end else begin + o_fifo_push <= r_push; case (r_state_if) state_idle: begin - if (i_ddr_data == 2'b10 ) begin + if (i_ddr_data == modem_i_sync ) begin r_state_if <= state_i_phase; r_data[31:2] <= 0; r_data[1:0] <= r_cnt[3:2]; @@ -71,7 +71,7 @@ module lvds_rx state_i_phase: begin if (r_phase_count == 3'b000) begin - if (i_ddr_data == 2'b01 ) begin + if (i_ddr_data == modem_q_sync ) begin r_phase_count <= 3'b110; r_state_if <= state_q_phase; r_data <= {r_data[29:0], r_cnt[1:0]}; diff --git a/firmware/top.asc b/firmware/top.asc index d210dd7..264d564 100644 --- a/firmware/top.asc +++ b/firmware/top.asc @@ -59,17 +59,17 @@ 000000000000000000 000000000000000000 000000000000000001 -000010000000010010 -000010010000010000 +000000000000110010 +000000000000110000 001100000000000000 -000000000001100000 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lvds_rx_09_inst.r_data[10] +.sym 53 lvds_rx_09_inst.r_data[14] +.sym 54 lvds_rx_09_inst.r_data[24] +.sym 177 w_rx_09_fifo_data[10] +.sym 178 w_rx_09_fifo_data[18] +.sym 179 w_rx_09_fifo_data[12] +.sym 181 w_rx_09_fifo_data[22] +.sym 183 w_rx_09_fifo_data[16] +.sym 212 lvds_rx_09_inst.o_debug_state[0] +.sym 296 w_rx_09_fifo_data[14] +.sym 322 w_rx_09_fifo_data[18] +.sym 324 w_rx_09_fifo_data[16] +.sym 326 w_rx_09_fifo_pulled_data[1] +.sym 335 i_smi_a1_SB_LUT4_I1_O +.sym 366 w_rx_09_fifo_data[10] +.sym 405 w_rx_09_fifo_data[9] +.sym 406 w_rx_09_fifo_data[11] +.sym 407 w_rx_09_fifo_data[17] +.sym 408 w_rx_09_fifo_data[15] +.sym 409 w_rx_09_fifo_data[7] +.sym 411 w_rx_09_fifo_data[13] +.sym 413 smi_ctrl_ins.o_smi_data_out_SB_DFFNE_Q_D_SB_LUT4_O_3_I3[3] +.sym 519 lvds_rx_09_inst.r_data[17] +.sym 520 lvds_rx_09_inst.r_data[15] +.sym 521 lvds_rx_09_inst.r_data[11] +.sym 522 lvds_rx_09_inst.r_data[13] +.sym 524 lvds_rx_09_inst.r_data[9] +.sym 525 lvds_rx_09_inst.r_data[7] +.sym 595 w_smi_data_output[6] +.sym 749 r_counter +.sym 830 r_counter +.sym 847 r_counter +.sym 944 lvds_rx_09_inst.r_push_SB_LUT4_I3_O +.sym 966 lvds_rx_09_inst.r_push_SB_LUT4_I3_O +.sym 1007 i_smi_a3$SB_IO_IN +.sym 1032 lvds_rx_09_inst.r_push_SB_LUT4_I3_O +.sym 1054 i_smi_a3$SB_IO_IN .sym 1173 $io_pmod[2]$iobuf_i .sym 1174 $io_pmod[1]$iobuf_i .sym 1183 $PACKER_VCC_NET .sym 1184 io_pmod[0]$SB_IO_IN_$glb_clk -.sym 1199 $PACKER_VCC_NET +.sym 1191 $PACKER_VCC_NET +.sym 1207 $PACKER_VCC_NET .sym 1210 $io_pmod[2]$iobuf_i +.sym 1211 spi_if_ins.o_cs_SB_DFFESR_Q_R[0] .sym 1222 $io_pmod[1]$iobuf_i -.sym 1277 $PACKER_VCC_NET -.sym 1287 lvds_clock +.sym 1287 $io_pmod[0]$iobuf_i .sym 1297 $PACKER_VCC_NET -.sym 1313 $PACKER_VCC_NET -.sym 1362 $PACKER_VCC_NET -.sym 2063 lvds_rx_09_inst.r_data[7] -.sym 2064 lvds_rx_09_inst.r_data[11] -.sym 2067 lvds_rx_09_inst.r_data[6] -.sym 2069 lvds_rx_09_inst.r_data[9] -.sym 2070 lvds_rx_09_inst.r_data[4] -.sym 2145 lvds_rx_09_inst.r_state_if_SB_DFFNESR_Q_E_SB_LUT4_O_I2[1] -.sym 2234 w_rx_09_fifo_data[7] -.sym 2235 w_rx_09_fifo_data[4] -.sym 2238 w_rx_09_fifo_data[9] -.sym 2239 w_rx_09_fifo_data[15] -.sym 2240 w_rx_09_fifo_data[11] -.sym 2241 w_rx_09_fifo_data[13] -.sym 2246 lvds_rx_09_inst.r_data[2] -.sym 2257 lvds_rx_09_inst.r_data[5] -.sym 2266 lvds_rx_09_inst.r_data[17] -.sym 2296 lvds_rx_09_inst.r_data[11] -.sym 2298 lvds_rx_09_inst.r_data[15] -.sym 2306 lvds_rx_09_inst.r_state_if_SB_DFFNESR_Q_E_SB_LUT4_O_I2[1] -.sym 2317 lvds_rx_09_inst.r_data[13] -.sym 2320 lvds_rx_09_inst.r_data[15] -.sym 2323 lvds_rx_09_inst.r_state_if_SB_DFFNESR_Q_E_SB_LUT4_O_I2[1] -.sym 2338 lvds_rx_09_inst.r_state_if_SB_DFFNESR_Q_E_SB_LUT4_O_I2[1] -.sym 2340 lvds_rx_09_inst.r_data[13] -.sym 2356 lvds_rx_09_inst.r_data[11] -.sym 2357 lvds_rx_09_inst.r_state_if_SB_DFFNESR_Q_E_SB_LUT4_O_I2[1] -.sym 2366 lvds_rx_09_inst.r_phase_count_SB_LUT4_O_I3_SB_DFFNESR_Q_E_SB_LUT4_O_I2_SB_LUT4_I1_O_$glb_ce +.sym 1310 $PACKER_VCC_NET +.sym 1324 $io_pmod[0]$iobuf_i +.sym 1336 $PACKER_VCC_NET +.sym 1510 i_smi_a3$SB_IO_IN +.sym 1879 lvds_rx_09_inst.r_data[6] +.sym 1880 lvds_rx_09_inst.r_data[4] +.sym 1881 lvds_rx_09_inst.r_data[30] +.sym 1883 lvds_rx_09_inst.r_data[8] +.sym 1884 lvds_rx_09_inst.r_data[28] +.sym 1886 lvds_rx_09_inst.r_data[26] +.sym 2063 w_rx_09_fifo_data[8] +.sym 2064 w_rx_09_fifo_data[4] +.sym 2065 w_rx_09_fifo_data[26] +.sym 2066 w_rx_09_fifo_data[28] +.sym 2067 w_rx_09_fifo_data[20] +.sym 2068 w_rx_09_fifo_data[30] +.sym 2069 w_rx_09_fifo_data[24] +.sym 2070 w_rx_09_fifo_data[6] +.sym 2100 lvds_rx_09_inst.o_debug_state[0] +.sym 2123 w_rx_09_fifo_data[24] +.sym 2143 lvds_rx_09_inst.r_data[14] +.sym 2156 lvds_rx_09_inst.r_data[8] +.sym 2163 lvds_rx_09_inst.r_data[20] +.sym 2166 lvds_rx_09_inst.o_debug_state[0] +.sym 2170 lvds_rx_09_inst.r_data[16] +.sym 2172 lvds_rx_09_inst.r_data[22] +.sym 2173 lvds_rx_09_inst.r_data[10] +.sym 2176 lvds_rx_09_inst.r_data[12] +.sym 2177 lvds_rx_09_inst.r_data[18] +.sym 2182 lvds_rx_09_inst.r_data[14] +.sym 2186 lvds_rx_09_inst.r_data[10] +.sym 2188 lvds_rx_09_inst.o_debug_state[0] +.sym 2192 lvds_rx_09_inst.r_data[16] +.sym 2193 lvds_rx_09_inst.o_debug_state[0] +.sym 2198 lvds_rx_09_inst.r_data[14] +.sym 2200 lvds_rx_09_inst.o_debug_state[0] +.sym 2203 lvds_rx_09_inst.o_debug_state[0] +.sym 2204 lvds_rx_09_inst.r_data[18] +.sym 2211 lvds_rx_09_inst.r_data[20] +.sym 2212 lvds_rx_09_inst.o_debug_state[0] +.sym 2217 lvds_rx_09_inst.o_debug_state[0] +.sym 2218 lvds_rx_09_inst.r_data[8] +.sym 2222 lvds_rx_09_inst.o_debug_state[0] +.sym 2224 lvds_rx_09_inst.r_data[12] +.sym 2227 lvds_rx_09_inst.o_debug_state[0] +.sym 2230 lvds_rx_09_inst.r_data[22] +.sym 2231 lvds_rx_09_inst.r_state_if_SB_DFFESR_Q_E_SB_LUT4_O_I0_SB_LUT4_I0_O_$glb_ce +.sym 2232 io_pmod[0]$SB_IO_IN_$glb_clk +.sym 2233 w_soft_reset_$glb_sr +.sym 2236 w_smi_data_output[7] +.sym 2237 w_smi_data_output[2] +.sym 2238 w_smi_data_output[1] +.sym 2241 w_smi_data_output[3] +.sym 2270 w_rx_09_fifo_data[13] +.sym 2287 lvds_rx_09_inst.r_data[12] +.sym 2289 lvds_rx_09_inst.r_data[16] +.sym 2291 lvds_rx_09_inst.r_data[22] +.sym 2292 lvds_rx_09_inst.r_data[10] +.sym 2296 lvds_rx_09_inst.r_data[18] +.sym 2323 lvds_rx_09_inst.r_data[10] +.sym 2329 lvds_rx_09_inst.r_data[18] +.sym 2334 lvds_rx_09_inst.r_data[12] +.sym 2346 lvds_rx_09_inst.r_data[22] +.sym 2358 lvds_rx_09_inst.r_data[16] +.sym 2366 lvds_rx_09_inst.r_push_SB_LUT4_I3_O_$glb_ce .sym 2367 io_pmod[0]$SB_IO_IN_$glb_clk -.sym 2368 w_soft_reset_$glb_sr -.sym 2369 w_rx_09_fifo_data[30] -.sym 2370 w_rx_09_fifo_data[18] -.sym 2371 w_rx_09_fifo_data[29] -.sym 2372 w_rx_09_fifo_data[24] -.sym 2374 w_rx_09_fifo_data[20] -.sym 2375 w_rx_09_fifo_data[17] -.sym 2376 w_rx_09_fifo_data[22] -.sym 2377 w_rx_09_fifo_pulled_data[6] -.sym 2385 w_rx_09_fifo_pulled_data[5] -.sym 2389 w_rx_09_fifo_pulled_data[7] -.sym 2424 lvds_rx_09_inst.r_data[16] -.sym 2436 lvds_rx_09_inst.r_state_if_SB_DFFNESR_Q_E_SB_LUT4_O_I2[1] -.sym 2438 lvds_rx_09_inst.r_data[18] -.sym 2440 lvds_rx_09_inst.r_data[24] -.sym 2449 lvds_rx_09_inst.r_data[22] -.sym 2451 lvds_rx_09_inst.r_data[20] -.sym 2455 lvds_rx_09_inst.r_data[16] -.sym 2456 lvds_rx_09_inst.r_state_if_SB_DFFNESR_Q_E_SB_LUT4_O_I2[1] -.sym 2468 lvds_rx_09_inst.r_state_if_SB_DFFNESR_Q_E_SB_LUT4_O_I2[1] -.sym 2469 lvds_rx_09_inst.r_data[22] -.sym 2475 lvds_rx_09_inst.r_state_if_SB_DFFNESR_Q_E_SB_LUT4_O_I2[1] -.sym 2476 lvds_rx_09_inst.r_data[20] -.sym 2485 lvds_rx_09_inst.r_state_if_SB_DFFNESR_Q_E_SB_LUT4_O_I2[1] -.sym 2486 lvds_rx_09_inst.r_data[18] -.sym 2491 lvds_rx_09_inst.r_data[24] -.sym 2492 lvds_rx_09_inst.r_state_if_SB_DFFNESR_Q_E_SB_LUT4_O_I2[1] -.sym 2501 lvds_rx_09_inst.r_phase_count_SB_LUT4_O_I3_SB_DFFNESR_Q_E_SB_LUT4_O_I2_SB_LUT4_I1_O_$glb_ce +.sym 2369 w_rx_09_fifo_data[17] +.sym 2370 smi_ctrl_ins.o_smi_data_out_SB_DFFNE_Q_D_SB_LUT4_O_5_I3[3] +.sym 2371 smi_ctrl_ins.o_smi_data_out_SB_DFFNE_Q_D_SB_LUT4_O_4_I3[3] +.sym 2372 smi_ctrl_ins.o_smi_data_out_SB_DFFNE_Q_D_SB_LUT4_O_1_I3[3] +.sym 2373 smi_ctrl_ins.o_smi_data_out_SB_DFFNE_Q_D_SB_LUT4_O_I3[3] +.sym 2374 smi_ctrl_ins.int_cnt_09[3] +.sym 2375 smi_ctrl_ins.o_smi_data_out_SB_DFFNE_Q_D_SB_LUT4_O_3_I3[3] +.sym 2376 smi_ctrl_ins.o_smi_data_out_SB_DFFNE_Q_D_SB_LUT4_O_2_I3[3] +.sym 2391 w_rx_09_fifo_data[22] +.sym 2392 w_smi_data_output[7] +.sym 2393 lvds_rx_09_inst.o_debug_state[0] +.sym 2394 w_rx_09_fifo_data[12] +.sym 2395 w_rx_09_fifo_data[14] +.sym 2396 smi_ctrl_ins.int_cnt_09[3] +.sym 2398 w_rx_09_fifo_data[9] +.sym 2404 w_rx_09_fifo_data[15] +.sym 2434 lvds_rx_09_inst.r_data[14] +.sym 2487 lvds_rx_09_inst.r_data[14] +.sym 2501 lvds_rx_09_inst.r_push_SB_LUT4_I3_O_$glb_ce .sym 2502 io_pmod[0]$SB_IO_IN_$glb_clk -.sym 2503 w_soft_reset_$glb_sr -.sym 2505 lvds_rx_09_inst.r_data[19] -.sym 2506 lvds_rx_09_inst.r_data[30] -.sym 2507 lvds_rx_09_inst.r_data[29] -.sym 2509 lvds_rx_09_inst.r_data[28] -.sym 2510 lvds_rx_09_inst.r_data[31] -.sym 2511 lvds_rx_09_inst.r_data[27] -.sym 2518 lvds_rx_09_inst.r_data[16] -.sym 2639 w_rx_09_fifo_data[21] -.sym 2640 w_rx_09_fifo_data[23] -.sym 2641 w_rx_09_fifo_data[31] -.sym 2643 w_rx_09_fifo_data[19] -.sym 2644 w_rx_09_fifo_data[25] -.sym 2645 w_rx_09_fifo_data[28] -.sym 2646 w_rx_09_fifo_data[27] -.sym 2653 w_rx_09_fifo_pulled_data[17] -.sym 2654 lvds_rx_09_inst.r_state_if_SB_DFFNESR_Q_E_SB_LUT4_O_I2[1] -.sym 2656 i_smi_a2$SB_IO_IN -.sym 2686 i_smi_a2$SB_IO_IN -.sym 2696 lvds_rx_09_inst.r_data[21] -.sym 2701 lvds_rx_09_inst.r_data[19] -.sym 2716 lvds_rx_09_inst.r_state_if_SB_DFFNESR_Q_E_SB_LUT4_O_I2[1] -.sym 2717 lvds_rx_09_inst.r_data[23] -.sym 2726 lvds_rx_09_inst.r_state_if_SB_DFFNESR_Q_E_SB_LUT4_O_I2[1] -.sym 2727 lvds_rx_09_inst.r_data[23] -.sym 2731 lvds_rx_09_inst.r_state_if_SB_DFFNESR_Q_E_SB_LUT4_O_I2[1] -.sym 2732 lvds_rx_09_inst.r_data[21] -.sym 2750 lvds_rx_09_inst.r_state_if_SB_DFFNESR_Q_E_SB_LUT4_O_I2[1] -.sym 2751 lvds_rx_09_inst.r_data[19] -.sym 2771 lvds_rx_09_inst.r_phase_count_SB_LUT4_O_I3_SB_DFFNESR_Q_E_SB_LUT4_O_I2_SB_LUT4_I1_O_$glb_ce +.sym 2505 w_smi_data_output[5] +.sym 2506 w_rx_09_fifo_data[11] +.sym 2507 w_rx_09_fifo_pulled_data[15] +.sym 2509 smi_ctrl_ins.o_smi_data_out_SB_DFFNE_Q_D_SB_LUT4_O_7_I3[3] +.sym 2510 smi_ctrl_ins.o_smi_data_out_SB_DFFNE_Q_D_SB_LUT4_O_6_I3[3] +.sym 2511 w_smi_data_output[6] +.sym 2523 w_rx_09_fifo_data[27] +.sym 2524 w_rx_09_fifo_data[31] +.sym 2530 i_smi_a1_SB_LUT4_I1_O +.sym 2535 i_smi_a2_SB_LUT4_I0_O +.sym 2539 w_smi_data_output[5] +.sym 2558 lvds_rx_09_inst.r_data[15] +.sym 2560 lvds_rx_09_inst.r_data[13] +.sym 2562 lvds_rx_09_inst.r_data[9] +.sym 2563 lvds_rx_09_inst.r_data[7] +.sym 2565 lvds_rx_09_inst.r_data[17] +.sym 2567 lvds_rx_09_inst.r_data[11] +.sym 2593 lvds_rx_09_inst.r_data[9] +.sym 2598 lvds_rx_09_inst.r_data[11] +.sym 2605 lvds_rx_09_inst.r_data[17] +.sym 2610 lvds_rx_09_inst.r_data[15] +.sym 2616 lvds_rx_09_inst.r_data[7] +.sym 2629 lvds_rx_09_inst.r_data[13] +.sym 2636 lvds_rx_09_inst.r_push_SB_LUT4_I3_O_$glb_ce +.sym 2637 io_pmod[0]$SB_IO_IN_$glb_clk +.sym 2644 smi_ctrl_ins.int_cnt_09[4] +.sym 2661 w_rx_09_fifo_data[7] +.sym 2693 lvds_rx_09_inst.r_data[15] +.sym 2699 lvds_rx_09_inst.r_data[5] +.sym 2701 lvds_rx_09_inst.o_debug_state[0] +.sym 2702 lvds_rx_09_inst.r_data[11] +.sym 2703 lvds_rx_09_inst.r_data[13] +.sym 2706 lvds_rx_09_inst.r_data[7] +.sym 2713 lvds_rx_09_inst.r_data[9] +.sym 2726 lvds_rx_09_inst.r_data[15] +.sym 2727 lvds_rx_09_inst.o_debug_state[0] +.sym 2732 lvds_rx_09_inst.o_debug_state[0] +.sym 2734 lvds_rx_09_inst.r_data[13] +.sym 2737 lvds_rx_09_inst.o_debug_state[0] +.sym 2738 lvds_rx_09_inst.r_data[9] +.sym 2743 lvds_rx_09_inst.r_data[11] +.sym 2744 lvds_rx_09_inst.o_debug_state[0] +.sym 2755 lvds_rx_09_inst.r_data[7] +.sym 2756 lvds_rx_09_inst.o_debug_state[0] +.sym 2761 lvds_rx_09_inst.o_debug_state[0] +.sym 2762 lvds_rx_09_inst.r_data[5] +.sym 2771 lvds_rx_09_inst.r_state_if_SB_DFFESR_Q_E_SB_LUT4_O_I0_SB_LUT4_I0_O_$glb_ce .sym 2772 io_pmod[0]$SB_IO_IN_$glb_clk .sym 2773 w_soft_reset_$glb_sr +.sym 2780 w_rx_09_fifo_data[5] +.sym 2786 lvds_rx_09_inst.r_data[17] +.sym 2787 w_rx_09_fifo_data[13] +.sym 2789 rx_09_fifo.rd_addr[1] +.sym 2795 lvds_rx_09_inst.r_data[5] +.sym 2917 i_smi_a2$SB_IO_IN .sym 2920 i_smi_a2$SB_IO_IN +.sym 2942 lvds_rx_09_inst.r_data[5] +.sym 2973 r_counter +.sym 3016 r_counter +.sym 3042 i_glob_clock$SB_IO_IN_$glb_clk +.sym 3464 sys_ctrl_ins.reset_cmd_SB_DFFESR_Q_R +.sym 3507 $PACKER_VCC_NET +.sym 3567 $PACKER_VCC_NET .sym 4138 i_smi_a2$SB_IO_IN -.sym 4404 lvds_rx_09_inst.r_state_if_SB_DFFNESR_Q_E_SB_LUT4_O_I2[1] +.sym 4283 lvds_rx_09_inst.o_debug_state[0] +.sym 4287 lvds_rx_09_inst.r_data[6] +.sym 4290 lvds_rx_09_inst.r_data[2] +.sym 4296 lvds_rx_09_inst.r_data[4] +.sym 4300 lvds_rx_09_inst.r_data[28] +.sym 4302 lvds_rx_09_inst.r_data[26] +.sym 4310 lvds_rx_09_inst.r_data[24] +.sym 4312 lvds_rx_09_inst.o_debug_state[0] +.sym 4313 lvds_rx_09_inst.r_data[4] +.sym 4319 lvds_rx_09_inst.r_data[2] +.sym 4321 lvds_rx_09_inst.o_debug_state[0] +.sym 4326 lvds_rx_09_inst.o_debug_state[0] +.sym 4327 lvds_rx_09_inst.r_data[28] +.sym 4336 lvds_rx_09_inst.o_debug_state[0] +.sym 4337 lvds_rx_09_inst.r_data[6] +.sym 4342 lvds_rx_09_inst.r_data[26] +.sym 4343 lvds_rx_09_inst.o_debug_state[0] +.sym 4355 lvds_rx_09_inst.o_debug_state[0] +.sym 4357 lvds_rx_09_inst.r_data[24] +.sym 4358 lvds_rx_09_inst.r_state_if_SB_DFFESR_Q_E_SB_LUT4_O_I0_SB_LUT4_I0_O_$glb_ce +.sym 4359 io_pmod[0]$SB_IO_IN_$glb_clk +.sym 4360 w_soft_reset_$glb_sr +.sym 4382 lvds_rx_09_inst.r_data[2] .sym 4407 i_smi_a3$SB_IO_IN -.sym 4449 lvds_rx_09_inst.r_data[4] -.sym 4454 lvds_rx_09_inst.r_data[5] -.sym 4455 lvds_rx_09_inst.r_data[2] -.sym 4461 lvds_rx_09_inst.r_state_if_SB_DFFNESR_Q_E_SB_LUT4_O_I2[1] -.sym 4464 lvds_rx_09_inst.r_data[9] -.sym 4466 lvds_rx_09_inst.r_data[7] -.sym 4476 lvds_rx_09_inst.r_state_if_SB_DFFNESR_Q_E_SB_LUT4_O_I2[1] -.sym 4478 lvds_rx_09_inst.r_data[5] -.sym 4481 lvds_rx_09_inst.r_state_if_SB_DFFNESR_Q_E_SB_LUT4_O_I2[1] -.sym 4482 lvds_rx_09_inst.r_data[9] -.sym 4500 lvds_rx_09_inst.r_state_if_SB_DFFNESR_Q_E_SB_LUT4_O_I2[1] -.sym 4502 lvds_rx_09_inst.r_data[4] -.sym 4512 lvds_rx_09_inst.r_data[7] -.sym 4514 lvds_rx_09_inst.r_state_if_SB_DFFNESR_Q_E_SB_LUT4_O_I2[1] -.sym 4517 lvds_rx_09_inst.r_state_if_SB_DFFNESR_Q_E_SB_LUT4_O_I2[1] -.sym 4518 lvds_rx_09_inst.r_data[2] -.sym 4521 lvds_rx_09_inst.r_phase_count_SB_LUT4_O_I3_SB_DFFNESR_Q_E_SB_LUT4_O_I2_SB_LUT4_I1_O_$glb_ce +.sym 4410 w_rx_09_fifo_data[8] +.sym 4413 w_rx_09_fifo_data[4] +.sym 4416 w_rx_09_fifo_pulled_data[7] +.sym 4419 w_rx_09_fifo_data[20] +.sym 4420 w_rx_09_fifo_pulled_data[14] +.sym 4421 w_rx_09_fifo_data[30] +.sym 4422 w_rx_09_fifo_pulled_data[13] +.sym 4443 lvds_rx_09_inst.r_data[4] +.sym 4444 lvds_rx_09_inst.r_data[30] +.sym 4445 lvds_rx_09_inst.r_data[20] +.sym 4449 lvds_rx_09_inst.r_data[26] +.sym 4450 lvds_rx_09_inst.r_data[6] +.sym 4454 lvds_rx_09_inst.r_data[8] +.sym 4455 lvds_rx_09_inst.r_data[28] +.sym 4457 lvds_rx_09_inst.r_data[24] +.sym 4476 lvds_rx_09_inst.r_data[8] +.sym 4483 lvds_rx_09_inst.r_data[4] +.sym 4490 lvds_rx_09_inst.r_data[26] +.sym 4494 lvds_rx_09_inst.r_data[28] +.sym 4500 lvds_rx_09_inst.r_data[20] +.sym 4506 lvds_rx_09_inst.r_data[30] +.sym 4511 lvds_rx_09_inst.r_data[24] +.sym 4519 lvds_rx_09_inst.r_data[6] +.sym 4521 lvds_rx_09_inst.r_push_SB_LUT4_I3_O_$glb_ce .sym 4522 io_pmod[0]$SB_IO_IN_$glb_clk -.sym 4523 w_soft_reset_$glb_sr -.sym 4524 w_rx_09_fifo_pulled_data[0] -.sym 4525 w_rx_09_fifo_pulled_data[1] -.sym 4526 w_rx_09_fifo_pulled_data[2] -.sym 4527 w_rx_09_fifo_pulled_data[3] -.sym 4528 w_rx_09_fifo_pulled_data[4] -.sym 4529 w_rx_09_fifo_pulled_data[5] -.sym 4530 w_rx_09_fifo_pulled_data[6] -.sym 4531 w_rx_09_fifo_pulled_data[7] -.sym 4546 lvds_rx_09_inst.r_data[6] -.sym 4558 i_smi_a3$SB_IO_IN -.sym 4559 rx_09_fifo.wr_addr[4] -.sym 4565 lvds_rx_09_inst.r_data[7] -.sym 4566 lvds_rx_09_inst.r_data[11] -.sym 4571 lvds_rx_09_inst.r_data[13] -.sym 4572 lvds_rx_09_inst.r_data[4] -.sym 4576 lvds_rx_09_inst.r_data[15] -.sym 4579 lvds_rx_09_inst.r_data[9] -.sym 4598 lvds_rx_09_inst.r_data[7] -.sym 4606 lvds_rx_09_inst.r_data[4] -.sym 4623 lvds_rx_09_inst.r_data[9] -.sym 4629 lvds_rx_09_inst.r_data[15] -.sym 4635 lvds_rx_09_inst.r_data[11] -.sym 4641 lvds_rx_09_inst.r_data[13] -.sym 4644 lvds_rx_09_inst.o_fifo_data_SB_DFFNE_Q_E_$glb_ce -.sym 4645 io_pmod[0]$SB_IO_IN_$glb_clk -.sym 4647 w_rx_09_fifo_pulled_data[8] -.sym 4648 w_rx_09_fifo_pulled_data[9] -.sym 4649 w_rx_09_fifo_pulled_data[10] -.sym 4650 w_rx_09_fifo_pulled_data[11] -.sym 4651 w_rx_09_fifo_pulled_data[12] -.sym 4652 w_rx_09_fifo_pulled_data[13] -.sym 4653 w_rx_09_fifo_pulled_data[14] -.sym 4654 w_rx_09_fifo_pulled_data[15] -.sym 4656 rx_09_fifo.wr_addr[0] -.sym 4662 w_rx_09_fifo_pulled_data[3] -.sym 4667 io_pmod[3]$SB_IO_IN +.sym 4524 w_rx_09_fifo_pulled_data[16] +.sym 4525 w_rx_09_fifo_pulled_data[17] +.sym 4526 w_rx_09_fifo_pulled_data[18] +.sym 4527 w_rx_09_fifo_pulled_data[19] +.sym 4528 w_rx_09_fifo_pulled_data[20] +.sym 4529 w_rx_09_fifo_pulled_data[21] +.sym 4530 w_rx_09_fifo_pulled_data[22] +.sym 4531 w_rx_09_fifo_pulled_data[23] +.sym 4542 lvds_rx_09_inst.o_debug_state[0] +.sym 4548 rx_09_fifo.wr_addr[2] +.sym 4549 w_rx_09_fifo_data[26] +.sym 4551 w_rx_09_fifo_data[28] +.sym 4553 w_rx_09_fifo_pulled_data[2] +.sym 4554 w_smi_data_output[3] +.sym 4555 w_rx_09_fifo_pulled_data[3] +.sym 4559 w_rx_09_fifo_data[6] +.sym 4567 smi_ctrl_ins.o_smi_data_out_SB_DFFNE_Q_D_SB_LUT4_O_4_I3[3] +.sym 4569 smi_ctrl_ins.o_smi_data_out_SB_DFFNE_Q_D_SB_LUT4_O_I3[3] +.sym 4570 smi_ctrl_ins.int_cnt_09[3] +.sym 4574 smi_ctrl_ins.o_smi_data_out_SB_DFFNE_Q_D_SB_LUT4_O_5_I3[3] +.sym 4577 w_rx_09_fifo_pulled_data[2] +.sym 4578 smi_ctrl_ins.int_cnt_09[3] +.sym 4579 w_rx_09_fifo_pulled_data[3] +.sym 4582 w_rx_09_fifo_pulled_data[7] +.sym 4583 i_smi_a1_SB_LUT4_I1_O +.sym 4584 w_rx_09_fifo_pulled_data[1] +.sym 4586 smi_ctrl_ins.o_smi_data_out_SB_DFFNE_Q_D_SB_LUT4_O_6_I3[3] +.sym 4588 w_rx_09_fifo_pulled_data[23] +.sym 4590 w_rx_09_fifo_pulled_data[17] +.sym 4591 w_rx_09_fifo_pulled_data[18] +.sym 4592 w_rx_09_fifo_pulled_data[19] +.sym 4610 smi_ctrl_ins.int_cnt_09[3] +.sym 4611 w_rx_09_fifo_pulled_data[23] +.sym 4612 smi_ctrl_ins.o_smi_data_out_SB_DFFNE_Q_D_SB_LUT4_O_I3[3] +.sym 4613 w_rx_09_fifo_pulled_data[7] +.sym 4616 w_rx_09_fifo_pulled_data[18] +.sym 4617 smi_ctrl_ins.o_smi_data_out_SB_DFFNE_Q_D_SB_LUT4_O_5_I3[3] +.sym 4618 w_rx_09_fifo_pulled_data[2] +.sym 4619 smi_ctrl_ins.int_cnt_09[3] +.sym 4622 smi_ctrl_ins.int_cnt_09[3] +.sym 4623 w_rx_09_fifo_pulled_data[1] +.sym 4624 w_rx_09_fifo_pulled_data[17] +.sym 4625 smi_ctrl_ins.o_smi_data_out_SB_DFFNE_Q_D_SB_LUT4_O_6_I3[3] +.sym 4640 w_rx_09_fifo_pulled_data[3] +.sym 4641 smi_ctrl_ins.o_smi_data_out_SB_DFFNE_Q_D_SB_LUT4_O_4_I3[3] +.sym 4642 smi_ctrl_ins.int_cnt_09[3] +.sym 4643 w_rx_09_fifo_pulled_data[19] +.sym 4644 i_smi_a1_SB_LUT4_I1_O +.sym 4645 smi_ctrl_ins.soe_and_reset_$glb_clk +.sym 4647 w_rx_09_fifo_pulled_data[24] +.sym 4648 w_rx_09_fifo_pulled_data[25] +.sym 4649 w_rx_09_fifo_pulled_data[26] +.sym 4650 w_rx_09_fifo_pulled_data[27] +.sym 4651 w_rx_09_fifo_pulled_data[28] +.sym 4652 w_rx_09_fifo_pulled_data[29] +.sym 4653 w_rx_09_fifo_pulled_data[30] +.sym 4654 w_rx_09_fifo_pulled_data[31] +.sym 4659 rx_09_fifo.wr_addr[7] +.sym 4661 w_smi_data_output[5] +.sym 4667 w_smi_data_output[2] +.sym 4668 io_pmod[3]$SB_IO_IN +.sym 4669 w_smi_data_output[1] .sym 4670 io_pmod[3]$SB_IO_IN -.sym 4673 rx_09_fifo.wr_addr[6] -.sym 4674 rx_09_fifo.wr_addr[2] -.sym 4679 w_rx_09_fifo_data[30] -.sym 4681 w_rx_09_fifo_data[25] -.sym 4690 lvds_rx_09_inst.r_data[30] -.sym 4691 lvds_rx_09_inst.r_data[29] -.sym 4693 lvds_rx_09_inst.r_data[20] -.sym 4696 lvds_rx_09_inst.r_data[18] -.sym 4698 lvds_rx_09_inst.r_data[24] -.sym 4699 lvds_rx_09_inst.r_data[22] -.sym 4712 lvds_rx_09_inst.r_data[17] -.sym 4723 lvds_rx_09_inst.r_data[30] -.sym 4729 lvds_rx_09_inst.r_data[18] -.sym 4736 lvds_rx_09_inst.r_data[29] -.sym 4739 lvds_rx_09_inst.r_data[24] -.sym 4751 lvds_rx_09_inst.r_data[20] -.sym 4760 lvds_rx_09_inst.r_data[17] -.sym 4766 lvds_rx_09_inst.r_data[22] -.sym 4767 lvds_rx_09_inst.o_fifo_data_SB_DFFNE_Q_E_$glb_ce -.sym 4768 io_pmod[0]$SB_IO_IN_$glb_clk -.sym 4770 w_rx_09_fifo_pulled_data[16] -.sym 4771 w_rx_09_fifo_pulled_data[17] -.sym 4772 w_rx_09_fifo_pulled_data[18] -.sym 4773 w_rx_09_fifo_pulled_data[19] -.sym 4774 w_rx_09_fifo_pulled_data[20] -.sym 4775 w_rx_09_fifo_pulled_data[21] -.sym 4776 w_rx_09_fifo_pulled_data[22] -.sym 4777 w_rx_09_fifo_pulled_data[23] +.sym 4671 i_smi_a3$SB_IO_IN +.sym 4672 smi_ctrl_ins.o_smi_data_out_SB_DFFNE_Q_D_SB_LUT4_O_6_I3[3] +.sym 4673 w_rx_09_fifo_data[3] +.sym 4674 w_rx_09_fifo_data[21] +.sym 4676 w_rx_09_fifo_pulled_data[10] +.sym 4677 w_rx_09_fifo_pulled_data[21] +.sym 4678 w_rx_09_fifo_data[19] +.sym 4679 w_rx_09_fifo_pulled_data[22] +.sym 4680 w_rx_09_fifo_pulled_data[12] +.sym 4681 smi_ctrl_ins.int_cnt_09[4] +.sym 4682 rx_09_fifo.wr_addr[5] +.sym 4688 smi_ctrl_ins.int_cnt_09[4] +.sym 4691 w_rx_09_fifo_pulled_data[12] +.sym 4693 smi_ctrl_ins.int_cnt_09[3] +.sym 4696 w_rx_09_fifo_pulled_data[14] +.sym 4698 w_rx_09_fifo_pulled_data[13] +.sym 4699 w_rx_09_fifo_pulled_data[15] +.sym 4700 w_rx_09_fifo_pulled_data[10] +.sym 4701 smi_ctrl_ins.int_cnt_09[3] +.sym 4706 w_rx_09_fifo_pulled_data[26] +.sym 4707 w_rx_09_fifo_pulled_data[27] +.sym 4708 w_rx_09_fifo_pulled_data[28] +.sym 4710 w_rx_09_fifo_pulled_data[30] +.sym 4711 w_rx_09_fifo_pulled_data[31] +.sym 4714 w_rx_09_fifo_data[17] +.sym 4715 i_smi_a2_SB_LUT4_I0_O +.sym 4717 w_rx_09_fifo_pulled_data[29] +.sym 4718 w_rx_09_fifo_pulled_data[11] +.sym 4724 w_rx_09_fifo_data[17] +.sym 4727 w_rx_09_fifo_pulled_data[10] +.sym 4728 smi_ctrl_ins.int_cnt_09[4] +.sym 4729 smi_ctrl_ins.int_cnt_09[3] +.sym 4730 w_rx_09_fifo_pulled_data[26] +.sym 4733 smi_ctrl_ins.int_cnt_09[4] +.sym 4734 w_rx_09_fifo_pulled_data[11] +.sym 4735 smi_ctrl_ins.int_cnt_09[3] +.sym 4736 w_rx_09_fifo_pulled_data[27] +.sym 4739 w_rx_09_fifo_pulled_data[14] +.sym 4740 smi_ctrl_ins.int_cnt_09[4] +.sym 4741 smi_ctrl_ins.int_cnt_09[3] +.sym 4742 w_rx_09_fifo_pulled_data[30] +.sym 4745 smi_ctrl_ins.int_cnt_09[4] +.sym 4746 w_rx_09_fifo_pulled_data[31] +.sym 4747 w_rx_09_fifo_pulled_data[15] +.sym 4748 smi_ctrl_ins.int_cnt_09[3] +.sym 4751 smi_ctrl_ins.int_cnt_09[3] +.sym 4757 smi_ctrl_ins.int_cnt_09[4] +.sym 4758 smi_ctrl_ins.int_cnt_09[3] +.sym 4759 w_rx_09_fifo_pulled_data[28] +.sym 4760 w_rx_09_fifo_pulled_data[12] +.sym 4763 w_rx_09_fifo_pulled_data[13] +.sym 4764 smi_ctrl_ins.int_cnt_09[4] +.sym 4765 smi_ctrl_ins.int_cnt_09[3] +.sym 4766 w_rx_09_fifo_pulled_data[29] +.sym 4767 i_smi_a2_SB_LUT4_I0_O +.sym 4768 smi_ctrl_ins.soe_and_reset_$glb_clk +.sym 4769 w_soft_reset_$glb_sr +.sym 4770 w_rx_09_fifo_pulled_data[0] +.sym 4771 w_rx_09_fifo_pulled_data[1] +.sym 4772 w_rx_09_fifo_pulled_data[2] +.sym 4773 w_rx_09_fifo_pulled_data[3] +.sym 4774 w_rx_09_fifo_pulled_data[4] +.sym 4775 w_rx_09_fifo_pulled_data[5] +.sym 4776 w_rx_09_fifo_pulled_data[6] +.sym 4777 w_rx_09_fifo_pulled_data[7] .sym 4782 io_pmod[4]$SB_IO_IN -.sym 4783 w_rx_09_fifo_pulled_data[14] -.sym 4787 rx_09_fifo.rd_addr[1] -.sym 4789 w_rx_09_fifo_pulled_data[8] -.sym 4790 io_pmod[4]$SB_IO_IN -.sym 4795 w_rx_09_fifo_data[29] -.sym 4797 w_rx_09_fifo_data[24] -.sym 4799 w_rx_09_fifo_pulled_data[22] +.sym 4784 smi_ctrl_ins.int_cnt_09[3] +.sym 4788 w_rx_09_fifo_data[24] +.sym 4791 io_pmod[4]$SB_IO_IN +.sym 4794 rx_09_fifo.rd_addr[0] +.sym 4795 w_rx_09_fifo_data[8] +.sym 4796 io_pmod_SB_DFFSS_Q_D_SB_LUT4_O_I0_SB_LUT4_O_I0_SB_LUT4_O_2_I1[1] +.sym 4797 w_rx_09_fifo_data[4] +.sym 4801 w_rx_09_fifo_pulled_data[7] +.sym 4802 io_pmod_SB_DFFSS_Q_D_SB_LUT4_O_I0_SB_LUT4_O_I0_SB_LUT4_O_1_I2[3] +.sym 4804 w_rx_09_fifo_pulled_data[11] .sym 4805 i_smi_a3$SB_IO_IN -.sym 4814 lvds_rx_09_inst.r_data[29] -.sym 4817 lvds_rx_09_inst.r_state_if_SB_DFFNESR_Q_E_SB_LUT4_O_I2[1] -.sym 4820 lvds_rx_09_inst.r_data[17] -.sym 4824 lvds_rx_09_inst.r_data[28] -.sym 4827 lvds_rx_09_inst.r_data[25] -.sym 4834 lvds_rx_09_inst.r_data[27] -.sym 4841 lvds_rx_09_inst.r_data[26] -.sym 4851 lvds_rx_09_inst.r_data[17] -.sym 4853 lvds_rx_09_inst.r_state_if_SB_DFFNESR_Q_E_SB_LUT4_O_I2[1] -.sym 4856 lvds_rx_09_inst.r_state_if_SB_DFFNESR_Q_E_SB_LUT4_O_I2[1] -.sym 4858 lvds_rx_09_inst.r_data[28] -.sym 4862 lvds_rx_09_inst.r_data[27] -.sym 4865 lvds_rx_09_inst.r_state_if_SB_DFFNESR_Q_E_SB_LUT4_O_I2[1] -.sym 4876 lvds_rx_09_inst.r_data[26] -.sym 4877 lvds_rx_09_inst.r_state_if_SB_DFFNESR_Q_E_SB_LUT4_O_I2[1] -.sym 4882 lvds_rx_09_inst.r_state_if_SB_DFFNESR_Q_E_SB_LUT4_O_I2[1] -.sym 4883 lvds_rx_09_inst.r_data[29] -.sym 4887 lvds_rx_09_inst.r_data[25] -.sym 4889 lvds_rx_09_inst.r_state_if_SB_DFFNESR_Q_E_SB_LUT4_O_I2[1] -.sym 4890 lvds_rx_09_inst.r_phase_count_SB_LUT4_O_I3_SB_DFFNESR_Q_E_SB_LUT4_O_I2_SB_LUT4_I1_O_$glb_ce -.sym 4891 io_pmod[0]$SB_IO_IN_$glb_clk -.sym 4892 w_soft_reset_$glb_sr -.sym 4893 w_rx_09_fifo_pulled_data[24] -.sym 4894 w_rx_09_fifo_pulled_data[25] -.sym 4895 w_rx_09_fifo_pulled_data[26] -.sym 4896 w_rx_09_fifo_pulled_data[27] -.sym 4897 w_rx_09_fifo_pulled_data[28] -.sym 4898 w_rx_09_fifo_pulled_data[29] -.sym 4899 w_rx_09_fifo_pulled_data[30] -.sym 4900 w_rx_09_fifo_pulled_data[31] +.sym 4811 w_rx_09_fifo_pulled_data[24] +.sym 4812 w_rx_09_fifo_pulled_data[25] +.sym 4816 smi_ctrl_ins.int_cnt_09[3] +.sym 4820 w_rx_09_fifo_data[11] +.sym 4822 smi_ctrl_ins.o_smi_data_out_SB_DFFNE_Q_D_SB_LUT4_O_1_I3[3] +.sym 4824 smi_ctrl_ins.int_cnt_09[4] +.sym 4826 smi_ctrl_ins.o_smi_data_out_SB_DFFNE_Q_D_SB_LUT4_O_2_I3[3] +.sym 4833 w_rx_09_fifo_pulled_data[6] +.sym 4835 w_rx_09_fifo_pulled_data[8] +.sym 4836 w_rx_09_fifo_pulled_data[9] +.sym 4837 w_rx_09_fifo_pulled_data[21] +.sym 4838 i_smi_a1_SB_LUT4_I1_O +.sym 4839 w_rx_09_fifo_pulled_data[22] +.sym 4840 w_rx_09_fifo_pulled_data[5] +.sym 4842 w_rx_09_fifo_pulled_data[15] +.sym 4850 w_rx_09_fifo_pulled_data[21] +.sym 4851 w_rx_09_fifo_pulled_data[5] +.sym 4852 smi_ctrl_ins.int_cnt_09[3] +.sym 4853 smi_ctrl_ins.o_smi_data_out_SB_DFFNE_Q_D_SB_LUT4_O_2_I3[3] +.sym 4858 w_rx_09_fifo_data[11] +.sym 4863 w_rx_09_fifo_pulled_data[15] +.sym 4874 w_rx_09_fifo_pulled_data[8] +.sym 4875 w_rx_09_fifo_pulled_data[24] +.sym 4876 smi_ctrl_ins.int_cnt_09[3] +.sym 4877 smi_ctrl_ins.int_cnt_09[4] +.sym 4880 w_rx_09_fifo_pulled_data[9] +.sym 4881 w_rx_09_fifo_pulled_data[25] +.sym 4882 smi_ctrl_ins.int_cnt_09[4] +.sym 4883 smi_ctrl_ins.int_cnt_09[3] +.sym 4886 w_rx_09_fifo_pulled_data[22] +.sym 4887 smi_ctrl_ins.o_smi_data_out_SB_DFFNE_Q_D_SB_LUT4_O_1_I3[3] +.sym 4888 smi_ctrl_ins.int_cnt_09[3] +.sym 4889 w_rx_09_fifo_pulled_data[6] +.sym 4890 i_smi_a1_SB_LUT4_I1_O +.sym 4891 smi_ctrl_ins.soe_and_reset_$glb_clk +.sym 4893 w_rx_09_fifo_pulled_data[8] +.sym 4894 w_rx_09_fifo_pulled_data[9] +.sym 4895 w_rx_09_fifo_pulled_data[10] +.sym 4896 w_rx_09_fifo_pulled_data[11] +.sym 4897 w_rx_09_fifo_pulled_data[12] +.sym 4898 w_rx_09_fifo_pulled_data[13] +.sym 4899 w_rx_09_fifo_pulled_data[14] +.sym 4900 w_rx_09_fifo_pulled_data[15] .sym 4906 io_pmod[3]$SB_IO_IN -.sym 4908 w_rx_09_fifo_pulled_data[19] -.sym 4910 i_smi_a2_SB_LUT4_I0_O -.sym 4911 i_smi_a2_SB_LUT4_I0_O .sym 4914 io_pmod[3]$SB_IO_IN -.sym 4916 w_rx_09_fifo_pulled_data[18] -.sym 4920 io_pmod[4]$SB_IO_IN -.sym 4934 lvds_rx_09_inst.r_data[25] -.sym 4935 lvds_rx_09_inst.r_data[23] -.sym 4939 lvds_rx_09_inst.r_data[28] -.sym 4940 lvds_rx_09_inst.r_data[31] -.sym 4941 lvds_rx_09_inst.r_data[27] -.sym 4943 lvds_rx_09_inst.r_data[19] -.sym 4946 lvds_rx_09_inst.r_data[21] -.sym 4970 lvds_rx_09_inst.r_data[21] -.sym 4973 lvds_rx_09_inst.r_data[23] -.sym 4979 lvds_rx_09_inst.r_data[31] -.sym 4993 lvds_rx_09_inst.r_data[19] -.sym 4998 lvds_rx_09_inst.r_data[25] -.sym 5004 lvds_rx_09_inst.r_data[28] -.sym 5009 lvds_rx_09_inst.r_data[27] -.sym 5013 lvds_rx_09_inst.o_fifo_data_SB_DFFNE_Q_E_$glb_ce -.sym 5014 io_pmod[0]$SB_IO_IN_$glb_clk -.sym 5028 rx_09_fifo.rd_addr[7] -.sym 5033 io_pmod_SB_DFFSS_Q_D_SB_LUT4_O_I0_SB_LUT4_O_I0_SB_LUT4_O_3_I2[3] -.sym 5035 rx_09_fifo.rd_addr[4] -.sym 5039 io_pmod[4]$SB_IO_IN -.sym 5049 i_smi_a3$SB_IO_IN -.sym 5278 spi_if_ins.state_if[1] -.sym 5651 spi_if_ins.o_data_in_SB_DFFE_Q_E +.sym 4915 rx_09_fifo.rd_addr[7] +.sym 4916 rx_09_fifo.wr_addr[3] +.sym 4918 w_rx_09_fifo_data[5] +.sym 4919 smi_ctrl_ins.int_cnt_09[4] +.sym 4920 w_rx_09_fifo_pulled_data[13] +.sym 4922 w_rx_09_fifo_pulled_data[14] +.sym 4924 smi_ctrl_ins.o_smi_data_out_SB_DFFNE_Q_D_SB_LUT4_O_7_I3[3] +.sym 4936 smi_ctrl_ins.int_cnt_09[3] +.sym 4945 i_smi_a2_SB_LUT4_I0_O +.sym 4955 smi_ctrl_ins.int_cnt_09[4] +.sym 4997 smi_ctrl_ins.int_cnt_09[4] +.sym 5000 smi_ctrl_ins.int_cnt_09[3] +.sym 5013 i_smi_a2_SB_LUT4_I0_O +.sym 5014 smi_ctrl_ins.soe_and_reset_$glb_clk +.sym 5015 w_soft_reset_$glb_sr +.sym 5028 io_pmod[4]$SB_IO_IN +.sym 5029 lvds_rx_09_inst.o_debug_state[0] +.sym 5030 w_rx_09_fifo_data[15] +.sym 5032 lvds_rx_09_inst.r_data[5] +.sym 5033 w_rx_09_fifo_data[14] +.sym 5034 w_rx_09_fifo_data[9] +.sym 5036 w_rx_09_fifo_data[12] +.sym 5037 io_pmod[4]$SB_IO_IN +.sym 5086 lvds_rx_09_inst.r_data[5] +.sym 5126 lvds_rx_09_inst.r_data[5] +.sym 5136 lvds_rx_09_inst.r_push_SB_LUT4_I3_O_$glb_ce +.sym 5137 io_pmod[0]$SB_IO_IN_$glb_clk +.sym 5153 i_smi_a1_SB_LUT4_I1_O +.sym 5159 i_smi_a2_SB_LUT4_I0_O +.sym 5163 i_smi_a3$SB_IO_IN +.sym 5276 rx_09_fifo.rd_addr_gray[4] +.sym 5285 sys_ctrl_ins.reset_count_SB_DFFESR_Q_E +.sym 5394 spi_if_ins.spi.r_tx_bit_count_SB_DFFESR_Q_R +.sym 5402 spi_if_ins.spi.r3_rx_done_SB_LUT4_I2_O +.sym 5407 lvds_rx_09_inst.r_push_SB_LUT4_I3_O +.sym 5525 spi_if_ins.spi.r_rx_byte_SB_DFFE_Q_E +.sym 5659 i_smi_a3$SB_IO_IN +.sym 6151 i_smi_a3$SB_IO_IN .sym 6246 i_smi_a3$SB_IO_IN -.sym 6255 o_shdn_tx_lna$SB_IO_OUT -.sym 6284 o_shdn_tx_lna$SB_IO_OUT +.sym 6264 o_shdn_tx_lna$SB_IO_OUT +.sym 6281 o_shdn_tx_lna$SB_IO_OUT .sym 6294 o_shdn_tx_lna$SB_IO_OUT -.sym 6310 o_shdn_tx_lna$SB_IO_OUT -.sym 6346 lvds_rx_09_inst.r_data[5] -.sym 6349 lvds_rx_09_inst.r_data[3] -.sym 6350 io_smi_data[6]$SB_IO_OUT +.sym 6307 o_shdn_tx_lna$SB_IO_OUT +.sym 6347 lvds_rx_09_inst.r_data[27] +.sym 6350 lvds_rx_09_inst.r_data[25] +.sym 6351 lvds_rx_09_inst.r_data[31] +.sym 6353 lvds_rx_09_inst.r_data[29] .sym 6378 i_smi_a3$SB_IO_IN -.sym 6422 w_rx_09_fifo_data[12] -.sym 6423 w_rx_09_fifo_pulled_data[0] -.sym 6425 w_rx_09_fifo_data[6] -.sym 6426 w_rx_09_fifo_data[10] -.sym 6427 w_rx_09_fifo_data[8] -.sym 6428 w_rx_09_fifo_data[14] -.sym 6429 w_rx_09_fifo_data[5] -.sym 6467 i_smi_a3$SB_IO_IN -.sym 6472 lvds_rx_09_inst.r_state_if_SB_DFFNESR_Q_E_SB_LUT4_O_I2[1] -.sym 6481 w_rx_09_fifo_data[12] -.sym 6498 w_rx_09_fifo_pulled_data[2] -.sym 6507 w_rx_09_fifo_data[12] -.sym 6508 lvds_rx_09_inst.r_data[3] -.sym 6512 rx_09_fifo.wr_addr[2] -.sym 6513 lvds_rx_09_inst.r_data[26] -.sym 6515 lvds_rx_09_inst.r_data[2] -.sym 6560 w_rx_09_fifo_data[0] -.sym 6563 w_rx_09_fifo_data[3] -.sym 6565 w_rx_09_fifo_data[1] -.sym 6567 w_rx_09_fifo_data[2] -.sym 6605 lvds_rx_09_inst.r_state_if_SB_DFFNESR_Q_E_SB_LUT4_O_I2[1] -.sym 6606 rx_09_fifo.wr_addr[2] -.sym 6607 rx_09_fifo.wr_addr[6] -.sym 6614 w_rx_09_fifo_pulled_data[16] -.sym 6618 w_rx_09_fifo_data[10] -.sym 6620 w_rx_09_fifo_data[8] -.sym 6622 w_rx_09_fifo_data[14] -.sym 6630 w_rx_09_fifo_data[7] -.sym 6631 w_rx_09_fifo_data[4] -.sym 6632 rx_09_fifo.wr_addr[0] -.sym 6633 w_rx_09_fifo_data[6] +.sym 6422 w_rx_09_fifo_data[25] +.sym 6423 w_rx_09_fifo_data[29] +.sym 6424 io_smi_data[7]$SB_IO_OUT +.sym 6425 w_rx_09_fifo_data[2] +.sym 6426 w_rx_09_fifo_data[31] +.sym 6428 w_rx_09_fifo_data[27] +.sym 6429 w_rx_09_fifo_data[23] +.sym 6464 w_smi_data_output[3] +.sym 6473 rx_09_fifo.wr_addr[2] +.sym 6480 lvds_rx_09_inst.o_debug_state[0] +.sym 6497 lvds_rx_09_inst.r_data[23] +.sym 6508 i_smi_a1_SB_LUT4_I1_O +.sym 6514 io_smi_data[0]$SB_IO_OUT +.sym 6516 w_rx_09_fifo_data[25] +.sym 6518 w_rx_09_fifo_data[29] +.sym 6560 rx_09_fifo.rd_addr[4] +.sym 6561 rx_09_fifo.rd_addr_gray[1] +.sym 6562 io_pmod_SB_DFFSS_Q_D_SB_LUT4_O_I0_SB_LUT4_O_I0_SB_LUT4_O_1_I2[3] +.sym 6563 io_smi_data[1]$SB_IO_OUT +.sym 6564 io_smi_data[5]$SB_IO_OUT +.sym 6565 rx_09_fifo.rd_addr[1] +.sym 6566 rx_09_fifo.rd_addr[0] +.sym 6567 io_pmod_SB_DFFSS_Q_D_SB_LUT4_O_I0_SB_LUT4_O_I0_SB_LUT4_O_2_I1[1] +.sym 6602 rx_09_fifo.rd_addr_gray_wr_r[3] +.sym 6604 rx_09_fifo.wr_addr[5] +.sym 6610 i_smi_a3$SB_IO_IN +.sym 6614 rx_09_fifo.wr_addr[3] +.sym 6615 rx_09_fifo.wr_addr[0] +.sym 6616 rx_09_fifo.wr_addr[4] +.sym 6617 rx_09_fifo.rd_addr[1] +.sym 6618 rx_09_fifo.wr_addr[6] +.sym 6620 rx_09_fifo.wr_addr[0] +.sym 6621 w_smi_data_output[6] +.sym 6622 i_smi_a3$SB_IO_IN +.sym 6630 rx_09_fifo.wr_addr[0] +.sym 6631 rx_09_fifo.wr_addr[3] +.sym 6632 io_pmod[3]$SB_IO_IN .sym 6634 io_pmod[3]$SB_IO_IN -.sym 6638 rx_09_fifo.wr_addr[7] -.sym 6640 rx_09_fifo.wr_addr[5] -.sym 6641 io_pmod[3]$SB_IO_IN -.sym 6642 io_pmod_SB_DFFSR_Q_D_SB_LUT4_O_I2_SB_LUT4_O_1_I0_SB_LUT4_O_2_I0[3] +.sym 6635 rx_09_fifo.wr_addr[7] +.sym 6636 rx_09_fifo.wr_addr[2] +.sym 6638 rx_09_fifo.wr_addr[5] +.sym 6641 rx_09_fifo.wr_addr[4] +.sym 6642 w_rx_09_fifo_data[20] .sym 6643 rx_09_fifo.wr_addr[6] -.sym 6644 rx_09_fifo.wr_addr[3] -.sym 6645 w_rx_09_fifo_data[5] -.sym 6648 rx_09_fifo.wr_addr[4] -.sym 6653 w_rx_09_fifo_data[2] -.sym 6654 w_rx_09_fifo_data[0] -.sym 6655 rx_09_fifo.wr_addr[2] -.sym 6657 w_rx_09_fifo_data[3] -.sym 6659 w_rx_09_fifo_data[1] -.sym 6662 smi_ctrl_ins.o_smi_data_out_SB_DFFNE_Q_D_SB_LUT4_O_I3[3] -.sym 6663 smi_ctrl_ins.o_smi_data_out_SB_DFFNE_Q_D_SB_LUT4_O_2_I3[3] -.sym 6664 smi_ctrl_ins.o_smi_data_out_SB_DFFNE_Q_D_SB_LUT4_O_4_I3[3] -.sym 6665 w_rx_09_fifo_data[16] -.sym 6666 smi_ctrl_ins.o_smi_data_out_SB_DFFNE_Q_D_SB_LUT4_O_3_I3[3] -.sym 6667 smi_ctrl_ins.o_smi_data_out_SB_DFFNE_Q_D_SB_LUT4_O_6_I3[3] -.sym 6668 smi_ctrl_ins.o_smi_data_out_SB_DFFNE_Q_D_SB_LUT4_O_5_I3[3] -.sym 6669 w_rx_09_fifo_data[26] +.sym 6644 w_rx_09_fifo_data[18] +.sym 6645 w_rx_09_fifo_data[23] +.sym 6646 w_rx_09_fifo_data[17] +.sym 6654 w_rx_09_fifo_data[22] +.sym 6656 io_pmod_SB_DFFSR_Q_D_SB_LUT4_O_I0_SB_LUT4_O_I2_SB_LUT4_O_I1_SB_LUT4_O_I3[1] +.sym 6657 w_rx_09_fifo_data[19] +.sym 6658 w_rx_09_fifo_data[16] +.sym 6661 w_rx_09_fifo_data[21] +.sym 6664 rx_09_fifo.rd_addr_gray_SB_DFFESR_Q_6_D[0] +.sym 6665 io_smi_data[0]$SB_IO_OUT +.sym 6666 io_smi_data[6]$SB_IO_OUT +.sym 6669 w_smi_data_output[4] .sym 6678 rx_09_fifo.wr_addr[0] -.sym 6679 io_pmod_SB_DFFSR_Q_D_SB_LUT4_O_I2_SB_LUT4_O_1_I0_SB_LUT4_O_2_I0[3] +.sym 6679 io_pmod_SB_DFFSR_Q_D_SB_LUT4_O_I0_SB_LUT4_O_I2_SB_LUT4_O_I1_SB_LUT4_O_I3[1] .sym 6681 rx_09_fifo.wr_addr[2] .sym 6682 rx_09_fifo.wr_addr[3] .sym 6683 rx_09_fifo.wr_addr[4] @@ -4860,107 +5058,102 @@ .sym 6686 rx_09_fifo.wr_addr[7] .sym 6689 io_pmod[0]$SB_IO_IN_$glb_clk .sym 6690 io_pmod[3]$SB_IO_IN -.sym 6691 w_rx_09_fifo_data[0] -.sym 6692 w_rx_09_fifo_data[1] -.sym 6693 w_rx_09_fifo_data[2] -.sym 6694 w_rx_09_fifo_data[3] -.sym 6695 w_rx_09_fifo_data[4] -.sym 6696 w_rx_09_fifo_data[5] -.sym 6697 w_rx_09_fifo_data[6] -.sym 6698 w_rx_09_fifo_data[7] +.sym 6691 w_rx_09_fifo_data[16] +.sym 6692 w_rx_09_fifo_data[17] +.sym 6693 w_rx_09_fifo_data[18] +.sym 6694 w_rx_09_fifo_data[19] +.sym 6695 w_rx_09_fifo_data[20] +.sym 6696 w_rx_09_fifo_data[21] +.sym 6697 w_rx_09_fifo_data[22] +.sym 6698 w_rx_09_fifo_data[23] .sym 6699 io_pmod[3]$SB_IO_IN -.sym 6700 w_rx_09_fifo_pulled_data[4] +.sym 6705 rx_09_fifo.rd_addr[0] .sym 6706 i_smi_a3$SB_IO_IN -.sym 6708 w_rx_09_fifo_pulled_data[1] -.sym 6710 io_pmod_SB_DFFSR_Q_D_SB_LUT4_O_I2_SB_LUT4_O_1_I0_SB_LUT4_O_2_I0[3] +.sym 6709 io_pmod_SB_DFFSS_Q_D_SB_LUT4_O_I0_SB_LUT4_O_I0_SB_LUT4_O_2_I1[1] .sym 6711 rx_09_fifo.wr_addr[6] -.sym 6712 rx_09_fifo.wr_addr[3] -.sym 6714 lvds_rx_09_inst.r_state_if_SB_DFFNESR_Q_E_SB_LUT4_O_I2[1] -.sym 6715 w_rx_09_fifo_pulled_data[22] -.sym 6717 rx_09_fifo.rd_addr[2] -.sym 6718 w_rx_09_fifo_pulled_data[25] -.sym 6720 w_rx_09_fifo_pulled_data[26] -.sym 6721 io_pmod_SB_DFFSS_Q_D_SB_LUT4_O_I0_SB_LUT4_O_I0_SB_LUT4_O_3_I2[3] -.sym 6722 w_rx_09_fifo_pulled_data[27] -.sym 6723 rx_09_fifo.rd_addr[0] -.sym 6724 w_rx_09_fifo_pulled_data[28] -.sym 6725 rx_09_fifo.rd_addr[7] -.sym 6726 w_rx_09_fifo_pulled_data[29] -.sym 6727 rx_09_fifo.rd_addr[3] -.sym 6732 rx_09_fifo.rd_addr[2] -.sym 6733 rx_09_fifo.rd_addr[3] -.sym 6735 rx_09_fifo.rd_addr[7] -.sym 6736 io_pmod_SB_DFFSS_Q_D_SB_LUT4_O_I0_SB_LUT4_O_I0_SB_LUT4_O_3_I2[3] +.sym 6712 rx_09_fifo.wr_addr[2] +.sym 6714 rx_09_fifo.wr_addr[5] +.sym 6715 io_pmod_SB_DFFSS_Q_D_SB_LUT4_O_I0_SB_LUT4_O_I0_SB_LUT4_O_1_I2[3] +.sym 6717 w_rx_09_fifo_data[2] +.sym 6722 io_pmod_SB_DFFSR_Q_D_SB_LUT4_O_I0_SB_LUT4_O_I2_SB_LUT4_O_I1_SB_LUT4_O_I3[1] +.sym 6723 rx_09_fifo.rd_addr_SB_DFFESR_Q_E +.sym 6724 w_rx_09_fifo_data[0] +.sym 6732 rx_09_fifo.rd_addr[4] +.sym 6733 w_rx_09_fifo_data[24] +.sym 6734 io_pmod[4]$SB_IO_IN +.sym 6735 w_rx_09_fifo_data[30] +.sym 6737 w_rx_09_fifo_data[26] .sym 6738 rx_09_fifo.rd_addr[0] -.sym 6740 w_rx_09_fifo_data[12] -.sym 6743 io_pmod[4]$SB_IO_IN +.sym 6739 w_rx_09_fifo_data[28] +.sym 6742 io_pmod_SB_DFFSS_Q_D_SB_LUT4_O_I0_SB_LUT4_O_I0_SB_LUT4_O_1_I2[3] .sym 6745 io_pmod[4]$SB_IO_IN -.sym 6746 rx_09_fifo.rd_addr[1] -.sym 6750 rx_09_fifo.rd_addr[4] -.sym 6752 w_rx_09_fifo_data[9] -.sym 6754 w_rx_09_fifo_data[11] -.sym 6755 rx_09_fifo.rd_addr[5] -.sym 6756 w_rx_09_fifo_data[10] -.sym 6758 w_rx_09_fifo_data[8] -.sym 6760 w_rx_09_fifo_data[14] -.sym 6761 w_rx_09_fifo_data[15] -.sym 6763 w_rx_09_fifo_data[13] -.sym 6764 io_pmod_SB_DFFSS_Q_D_SB_LUT4_O_I0_SB_LUT4_O_I0_SB_LUT4_O_I0[2] -.sym 6765 smi_ctrl_ins.int_cnt_09[4] -.sym 6766 rx_09_fifo.rd_addr[4] -.sym 6767 smi_ctrl_ins.int_cnt_09[3] -.sym 6769 i_smi_a1_SB_LUT4_I1_O -.sym 6770 i_smi_a2_SB_LUT4_I0_O -.sym 6771 rx_09_fifo.rd_addr[5] +.sym 6747 io_pmod_SB_DFFSS_Q_D_SB_LUT4_O_I0_SB_LUT4_O_I0_SB_LUT4_O_2_I1[1] +.sym 6748 w_rx_09_fifo_data[25] +.sym 6749 io_pmod_SB_DFFSS_Q_D_SB_LUT4_O_I0_SB_LUT4_O_1_I0[1] +.sym 6750 w_rx_09_fifo_data[29] +.sym 6754 w_rx_09_fifo_data[31] +.sym 6755 rx_09_fifo.rd_addr[1] +.sym 6756 rx_09_fifo.rd_addr[7] +.sym 6759 io_pmod_SB_DFFSS_Q_D_SB_LUT4_O_I0_SB_LUT4_O_1_I0[3] +.sym 6761 w_rx_09_fifo_data[27] +.sym 6764 rx_09_fifo.rd_addr[7] +.sym 6765 io_pmod_SB_DFFSS_Q_D_SB_LUT4_O_I0_SB_LUT4_O_1_I0[1] +.sym 6766 rx_09_fifo.rd_addr_gray[6] +.sym 6767 io_pmod_SB_DFFSS_Q_D_SB_LUT4_O_I0_SB_LUT4_O_1_I0[3] +.sym 6768 rx_09_fifo.rd_addr_gray[2] +.sym 6769 rx_09_fifo.rd_addr_gray[0] +.sym 6770 rx_09_fifo.rd_addr_gray[3] +.sym 6771 rx_09_fifo.rd_addr_gray[5] .sym 6780 rx_09_fifo.rd_addr[0] .sym 6781 rx_09_fifo.rd_addr[1] -.sym 6783 rx_09_fifo.rd_addr[2] -.sym 6784 rx_09_fifo.rd_addr[3] +.sym 6783 io_pmod_SB_DFFSS_Q_D_SB_LUT4_O_I0_SB_LUT4_O_I0_SB_LUT4_O_2_I1[1] +.sym 6784 io_pmod_SB_DFFSS_Q_D_SB_LUT4_O_I0_SB_LUT4_O_I0_SB_LUT4_O_1_I2[3] .sym 6785 rx_09_fifo.rd_addr[4] -.sym 6786 rx_09_fifo.rd_addr[5] -.sym 6787 io_pmod_SB_DFFSS_Q_D_SB_LUT4_O_I0_SB_LUT4_O_I0_SB_LUT4_O_3_I2[3] +.sym 6786 io_pmod_SB_DFFSS_Q_D_SB_LUT4_O_I0_SB_LUT4_O_1_I0[1] +.sym 6787 io_pmod_SB_DFFSS_Q_D_SB_LUT4_O_I0_SB_LUT4_O_1_I0[3] .sym 6788 rx_09_fifo.rd_addr[7] .sym 6791 w_clock_sys .sym 6792 io_pmod[4]$SB_IO_IN .sym 6793 io_pmod[4]$SB_IO_IN -.sym 6794 w_rx_09_fifo_data[10] -.sym 6795 w_rx_09_fifo_data[11] -.sym 6796 w_rx_09_fifo_data[12] -.sym 6797 w_rx_09_fifo_data[13] -.sym 6798 w_rx_09_fifo_data[14] -.sym 6799 w_rx_09_fifo_data[15] -.sym 6800 w_rx_09_fifo_data[8] -.sym 6801 w_rx_09_fifo_data[9] -.sym 6816 io_pmod[4]$SB_IO_IN -.sym 6818 w_rx_09_fifo_pulled_data[20] -.sym 6820 w_rx_09_fifo_pulled_data[21] -.sym 6822 rx_09_fifo.wr_addr[7] -.sym 6824 w_rx_09_fifo_pulled_data[23] -.sym 6828 w_rx_09_fifo_data[26] -.sym 6835 rx_09_fifo.wr_addr[3] +.sym 6794 w_rx_09_fifo_data[26] +.sym 6795 w_rx_09_fifo_data[27] +.sym 6796 w_rx_09_fifo_data[28] +.sym 6797 w_rx_09_fifo_data[29] +.sym 6798 w_rx_09_fifo_data[30] +.sym 6799 w_rx_09_fifo_data[31] +.sym 6800 w_rx_09_fifo_data[24] +.sym 6801 w_rx_09_fifo_data[25] +.sym 6809 smi_ctrl_ins.o_smi_data_out_SB_DFFNE_Q_D_SB_LUT4_O_7_I3[3] +.sym 6818 lvds_rx_09_inst.r_data[23] +.sym 6821 i_smi_a1_SB_LUT4_I1_O +.sym 6822 w_rx_09_fifo_data[10] +.sym 6825 rx_09_fifo.rd_addr[4] +.sym 6828 w_rx_09_fifo_pulled_data[1] +.sym 6834 w_rx_09_fifo_data[1] .sym 6836 io_pmod[3]$SB_IO_IN -.sym 6837 w_rx_09_fifo_data[16] +.sym 6837 rx_09_fifo.wr_addr[7] .sym 6838 io_pmod[3]$SB_IO_IN -.sym 6839 rx_09_fifo.wr_addr[7] -.sym 6840 rx_09_fifo.wr_addr[6] -.sym 6842 io_pmod_SB_DFFSR_Q_D_SB_LUT4_O_I2_SB_LUT4_O_1_I0_SB_LUT4_O_2_I0[3] -.sym 6844 rx_09_fifo.wr_addr[5] -.sym 6845 rx_09_fifo.wr_addr[0] -.sym 6847 rx_09_fifo.wr_addr[4] -.sym 6849 rx_09_fifo.wr_addr[2] -.sym 6850 w_rx_09_fifo_data[21] -.sym 6851 w_rx_09_fifo_data[18] -.sym 6854 w_rx_09_fifo_data[19] -.sym 6855 w_rx_09_fifo_data[20] -.sym 6856 w_rx_09_fifo_data[17] -.sym 6857 w_rx_09_fifo_data[22] -.sym 6859 w_rx_09_fifo_data[23] -.sym 6866 rx_09_fifo.rd_addr[2] -.sym 6869 rx_09_fifo.rd_addr[0] -.sym 6870 rx_09_fifo.rd_addr[7] -.sym 6871 rx_09_fifo.rd_addr[3] +.sym 6840 w_rx_09_fifo_data[3] +.sym 6841 rx_09_fifo.wr_addr[5] +.sym 6842 io_pmod_SB_DFFSR_Q_D_SB_LUT4_O_I0_SB_LUT4_O_I2_SB_LUT4_O_I1_SB_LUT4_O_I3[1] +.sym 6843 rx_09_fifo.wr_addr[2] +.sym 6844 w_rx_09_fifo_data[6] +.sym 6845 rx_09_fifo.wr_addr[4] +.sym 6846 rx_09_fifo.wr_addr[3] +.sym 6847 rx_09_fifo.wr_addr[6] +.sym 6849 rx_09_fifo.wr_addr[0] +.sym 6850 w_rx_09_fifo_data[7] +.sym 6855 w_rx_09_fifo_data[2] +.sym 6860 w_rx_09_fifo_data[4] +.sym 6862 w_rx_09_fifo_data[0] +.sym 6863 w_rx_09_fifo_data[5] +.sym 6866 lvds_rx_09_inst.r_data[21] +.sym 6869 rx_09_fifo.rd_addr_SB_DFFESR_Q_E +.sym 6871 lvds_rx_09_inst.r_data[5] +.sym 6872 lvds_rx_09_inst.r_data[23] +.sym 6873 lvds_rx_09_inst.r_data[19] .sym 6882 rx_09_fifo.wr_addr[0] -.sym 6883 io_pmod_SB_DFFSR_Q_D_SB_LUT4_O_I2_SB_LUT4_O_1_I0_SB_LUT4_O_2_I0[3] +.sym 6883 io_pmod_SB_DFFSR_Q_D_SB_LUT4_O_I0_SB_LUT4_O_I2_SB_LUT4_O_I1_SB_LUT4_O_I3[1] .sym 6885 rx_09_fifo.wr_addr[2] .sym 6886 rx_09_fifo.wr_addr[3] .sym 6887 rx_09_fifo.wr_addr[4] @@ -4969,3514 +5162,3302 @@ .sym 6890 rx_09_fifo.wr_addr[7] .sym 6893 io_pmod[0]$SB_IO_IN_$glb_clk .sym 6894 io_pmod[3]$SB_IO_IN -.sym 6895 w_rx_09_fifo_data[16] -.sym 6896 w_rx_09_fifo_data[17] -.sym 6897 w_rx_09_fifo_data[18] -.sym 6898 w_rx_09_fifo_data[19] -.sym 6899 w_rx_09_fifo_data[20] -.sym 6900 w_rx_09_fifo_data[21] -.sym 6901 w_rx_09_fifo_data[22] -.sym 6902 w_rx_09_fifo_data[23] +.sym 6895 w_rx_09_fifo_data[0] +.sym 6896 w_rx_09_fifo_data[1] +.sym 6897 w_rx_09_fifo_data[2] +.sym 6898 w_rx_09_fifo_data[3] +.sym 6899 w_rx_09_fifo_data[4] +.sym 6900 w_rx_09_fifo_data[5] +.sym 6901 w_rx_09_fifo_data[6] +.sym 6902 w_rx_09_fifo_data[7] .sym 6903 io_pmod[3]$SB_IO_IN -.sym 6904 i_smi_a3$SB_IO_IN .sym 6907 i_smi_a3$SB_IO_IN -.sym 6912 rx_09_fifo.wr_addr[5] -.sym 6913 rx_09_fifo.wr_addr[0] -.sym 6915 rx_09_fifo.wr_addr[4] -.sym 6917 rx_09_fifo.rd_addr_gray_SB_DFFESR_Q_5_D[0] -.sym 6918 io_pmod_SB_DFFSR_Q_D_SB_LUT4_O_I2_SB_LUT4_O_1_I0_SB_LUT4_O_2_I0[3] -.sym 6919 rx_09_fifo.wr_addr[3] -.sym 6924 w_rx_09_fifo_pulled_data[30] -.sym 6926 w_rx_09_fifo_pulled_data[31] -.sym 6928 w_rx_09_fifo_pulled_data[24] -.sym 6936 rx_09_fifo.rd_addr[4] -.sym 6937 w_rx_09_fifo_data[30] -.sym 6938 w_rx_09_fifo_data[31] -.sym 6940 io_pmod[4]$SB_IO_IN -.sym 6942 io_pmod_SB_DFFSS_Q_D_SB_LUT4_O_I0_SB_LUT4_O_I0_SB_LUT4_O_3_I2[3] -.sym 6943 w_rx_09_fifo_data[24] -.sym 6946 rx_09_fifo.rd_addr[1] -.sym 6947 w_rx_09_fifo_data[25] -.sym 6948 rx_09_fifo.rd_addr[5] -.sym 6949 w_rx_09_fifo_data[29] -.sym 6950 w_rx_09_fifo_data[28] -.sym 6951 w_rx_09_fifo_data[27] -.sym 6952 rx_09_fifo.rd_addr[2] -.sym 6954 io_pmod[4]$SB_IO_IN -.sym 6957 rx_09_fifo.rd_addr[3] -.sym 6963 rx_09_fifo.rd_addr[0] -.sym 6964 rx_09_fifo.rd_addr[7] -.sym 6966 w_rx_09_fifo_data[26] -.sym 6968 spi_if_ins.state_if[0] -.sym 6970 sys_ctrl_ins.reset_count_SB_DFFESR_Q_E -.sym 6972 spi_if_ins.state_if_SB_DFFESR_Q_D[0] +.sym 6908 io_pmod_SB_DFFSR_Q_D_SB_LUT4_O_I0_SB_LUT4_O_I2_SB_LUT4_O_I1_SB_LUT4_O_I3[1] +.sym 6911 rx_09_fifo.wr_addr[7] +.sym 6913 rx_09_fifo.rd_addr_gray[5] +.sym 6918 w_rx_09_fifo_data[1] +.sym 6920 rx_09_fifo.rd_addr_gray[6] +.sym 6926 i_smi_a1_SB_LUT4_I1_O +.sym 6937 io_pmod_SB_DFFSS_Q_D_SB_LUT4_O_I0_SB_LUT4_O_1_I0[1] +.sym 6938 io_pmod[4]$SB_IO_IN +.sym 6939 w_rx_09_fifo_data[12] +.sym 6940 rx_09_fifo.rd_addr[0] +.sym 6941 w_rx_09_fifo_data[8] +.sym 6942 io_pmod_SB_DFFSS_Q_D_SB_LUT4_O_I0_SB_LUT4_O_I0_SB_LUT4_O_2_I1[1] +.sym 6944 rx_09_fifo.rd_addr[7] +.sym 6945 w_rx_09_fifo_data[9] +.sym 6947 io_pmod_SB_DFFSS_Q_D_SB_LUT4_O_I0_SB_LUT4_O_1_I0[3] +.sym 6948 io_pmod_SB_DFFSS_Q_D_SB_LUT4_O_I0_SB_LUT4_O_I0_SB_LUT4_O_1_I2[3] +.sym 6949 io_pmod[4]$SB_IO_IN +.sym 6950 w_rx_09_fifo_data[14] +.sym 6951 w_rx_09_fifo_data[15] +.sym 6954 w_rx_09_fifo_data[11] +.sym 6955 rx_09_fifo.rd_addr[1] +.sym 6960 w_rx_09_fifo_data[10] +.sym 6961 w_rx_09_fifo_data[13] +.sym 6963 rx_09_fifo.rd_addr[4] +.sym 6969 i_smi_a1_SB_LUT4_I1_O +.sym 6971 rx_09_fifo.rd_addr_gray_wr_r[6] +.sym 6973 rx_09_fifo.rd_addr_gray_wr[6] +.sym 6975 i_smi_a2_SB_LUT4_I0_O .sym 6984 rx_09_fifo.rd_addr[0] .sym 6985 rx_09_fifo.rd_addr[1] -.sym 6987 rx_09_fifo.rd_addr[2] -.sym 6988 rx_09_fifo.rd_addr[3] +.sym 6987 io_pmod_SB_DFFSS_Q_D_SB_LUT4_O_I0_SB_LUT4_O_I0_SB_LUT4_O_2_I1[1] +.sym 6988 io_pmod_SB_DFFSS_Q_D_SB_LUT4_O_I0_SB_LUT4_O_I0_SB_LUT4_O_1_I2[3] .sym 6989 rx_09_fifo.rd_addr[4] -.sym 6990 rx_09_fifo.rd_addr[5] -.sym 6991 io_pmod_SB_DFFSS_Q_D_SB_LUT4_O_I0_SB_LUT4_O_I0_SB_LUT4_O_3_I2[3] +.sym 6990 io_pmod_SB_DFFSS_Q_D_SB_LUT4_O_I0_SB_LUT4_O_1_I0[1] +.sym 6991 io_pmod_SB_DFFSS_Q_D_SB_LUT4_O_I0_SB_LUT4_O_1_I0[3] .sym 6992 rx_09_fifo.rd_addr[7] .sym 6995 w_clock_sys .sym 6996 io_pmod[4]$SB_IO_IN .sym 6997 io_pmod[4]$SB_IO_IN -.sym 6998 w_rx_09_fifo_data[26] -.sym 6999 w_rx_09_fifo_data[27] -.sym 7000 w_rx_09_fifo_data[28] -.sym 7001 w_rx_09_fifo_data[29] -.sym 7002 w_rx_09_fifo_data[30] -.sym 7003 w_rx_09_fifo_data[31] -.sym 7004 w_rx_09_fifo_data[24] -.sym 7005 w_rx_09_fifo_data[25] -.sym 7014 rx_09_fifo.rd_addr[1] -.sym 7016 rx_09_fifo.rd_addr[5] -.sym 7017 lvds_rx_09_inst.r_state_if_SB_DFFNESR_Q_E_SB_LUT4_O_I2[1] -.sym 7019 rx_09_fifo.rd_addr_SB_DFFESR_Q_E -.sym 7072 spi_if_ins.state_if_SB_DFFE_Q_E -.sym 7075 spi_if_ins.state_if[1] -.sym 7077 spi_if_ins.state_if_SB_DFFESR_Q_R -.sym 7132 spi_if_ins.o_load_cmd_SB_DFFESR_Q_D[1] -.sym 7172 w_load -.sym 7175 spi_if_ins.o_load_cmd_SB_DFFESR_Q_E -.sym 7216 spi_if_ins.o_load_cmd_SB_DFFESR_Q_D[1] -.sym 7219 smi_ctrl_ins.soe_and_reset -.sym 7222 spi_if_ins.o_load_cmd_SB_DFFESR_Q_D_SB_LUT4_I2_O[0] -.sym 7225 spi_if_ins.o_load_cmd_SB_DFFESR_Q_D_SB_LUT4_I2_O_SB_LUT4_I3_O[1] -.sym 7226 spi_if_ins.state_if_SB_DFFE_Q_E -.sym 7232 sys_ctrl_ins.reset_cmd_SB_DFFESR_Q_E -.sym 7235 w_load -.sym 7236 spi_if_ins.state_if_SB_DFFESR_Q_R -.sym 7278 sys_ctrl_ins.reset_cmd_SB_DFFESR_Q_R -.sym 7280 sys_ctrl_ins.reset_cmd -.sym 7327 spi_if_ins.o_load_cmd_SB_DFFESR_Q_D_SB_LUT4_I2_O[0] -.sym 7377 sys_ctrl_ins.reset_cmd_SB_DFFESR_Q_E -.sym 7378 io_ctrl_ins.pmod_dir_state[2] -.sym 7414 $PACKER_VCC_NET -.sym 7481 w_rx_data[4] -.sym 7484 w_rx_data[3] -.sym 7527 w_cs[0] -.sym 7528 spi_if_ins.o_cs_SB_LUT4_I3_1_O -.sym 7542 w_rx_data[1] -.sym 7580 io_ctrl_ins.led1_state_SB_LUT4_I3_O[0] -.sym 7583 io_ctrl_ins.pmod_dir_state[6] -.sym 7584 io_ctrl_ins.pmod_dir_state[3] -.sym 7587 io_ctrl_ins.pmod_dir_state[4] -.sym 7618 spi_if_ins.w_rx_data[3] -.sym 7623 w_rx_data[3] -.sym 7631 spi_if_ins.w_rx_data[4] -.sym 7632 $PACKER_VCC_NET -.sym 7685 io_ctrl_ins.o_pmod[6] -.sym 7686 io_ctrl_ins.o_pmod[2] -.sym 7687 io_ctrl_ins.o_pmod[1] -.sym 7689 io_ctrl_ins.o_pmod[3] -.sym 7822 spi_if_ins.o_load_cmd_SB_LUT4_I2_O_SB_LUT4_I3_O_SB_LUT4_I3_O -.sym 7835 spi_if_ins.o_load_cmd_SB_LUT4_I2_O_SB_LUT4_I2_O -.sym 8027 o_led0$SB_IO_OUT +.sym 6998 w_rx_09_fifo_data[10] +.sym 6999 w_rx_09_fifo_data[11] +.sym 7000 w_rx_09_fifo_data[12] +.sym 7001 w_rx_09_fifo_data[13] +.sym 7002 w_rx_09_fifo_data[14] +.sym 7003 w_rx_09_fifo_data[15] +.sym 7004 w_rx_09_fifo_data[8] +.sym 7005 w_rx_09_fifo_data[9] +.sym 7007 lvds_rx_09_inst.o_debug_state[0] +.sym 7012 w_rx_09_fifo_data[3] +.sym 7014 w_rx_09_fifo_data[21] +.sym 7018 w_rx_09_fifo_data[19] +.sym 7022 i_smi_a3$SB_IO_IN +.sym 7071 rx_09_fifo.rd_addr_gray[4] +.sym 7114 i_smi_a3$SB_IO_IN +.sym 7118 i_smi_a1$SB_IO_IN +.sym 7177 spi_if_ins.o_ioc_SB_DFFE_Q_E[0] +.sym 7219 smi_ctrl_ins.int_cnt_09[4] +.sym 7237 sys_ctrl_ins.reset_cmd_SB_DFFESR_Q_E +.sym 7280 spi_if_ins.spi.r_rx_byte[7] +.sym 7382 sys_ctrl_ins.reset_cmd +.sym 7383 sys_ctrl_ins.reset_cmd_SB_DFFESR_Q_R +.sym 7432 io_ctrl_ins.led0_state_SB_LUT4_I3_O[1] +.sym 7480 w_tx_data_sys[0] +.sym 7481 sys_ctrl_ins.o_data_out_SB_DFFE_Q_E +.sym 7632 io_ctrl_ins.o_data_out_SB_DFFESR_Q_R +.sym 7688 io_ctrl_ins.o_pmod[1] +.sym 7826 w_rx_data[2] .sym 8093 io_smi_data[6]$SB_IO_OUT -.sym 8106 io_smi_data[6]$SB_IO_OUT -.sym 8118 io_smi_data[0]$SB_IO_OUT -.sym 8119 io_smi_data[5]$SB_IO_OUT -.sym 8121 io_smi_data[2]$SB_IO_OUT -.sym 8123 io_smi_data[1]$SB_IO_OUT -.sym 8164 w_smi_data_output[6] -.sym 8171 lvds_rx_09_inst.r_state_if_SB_DFFNESR_Q_E_SB_LUT4_O_I2[1] -.sym 8174 i_smi_a3$SB_IO_IN -.sym 8177 lvds_rx_09_inst.r_data[1] -.sym 8179 lvds_rx_09_inst.r_data[3] -.sym 8195 lvds_rx_09_inst.r_state_if_SB_DFFNESR_Q_E_SB_LUT4_O_I2[1] -.sym 8196 lvds_rx_09_inst.r_data[3] -.sym 8213 lvds_rx_09_inst.r_data[1] -.sym 8214 lvds_rx_09_inst.r_state_if_SB_DFFNESR_Q_E_SB_LUT4_O_I2[1] -.sym 8219 w_smi_data_output[6] -.sym 8220 i_smi_a3$SB_IO_IN -.sym 8239 lvds_rx_09_inst.r_phase_count_SB_LUT4_O_I3_SB_DFFNESR_Q_E_SB_LUT4_O_I2_SB_LUT4_I1_O_$glb_ce +.sym 8117 io_smi_data[6]$SB_IO_OUT +.sym 8121 lvds_rx_09_inst.r_data[2] +.sym 8125 io_smi_data[7]$SB_IO_OUT +.sym 8133 io_smi_data[6]$SB_IO_OUT +.sym 8135 rx_09_fifo.rd_addr_SB_DFFESR_Q_E +.sym 8153 io_smi_data[0]$SB_IO_OUT +.sym 8164 lvds_rx_09_inst.o_debug_state[0] +.sym 8172 lvds_rx_09_inst.r_data[25] +.sym 8183 lvds_rx_09_inst.r_data[29] +.sym 8185 lvds_rx_09_inst.r_data[27] +.sym 8188 lvds_rx_09_inst.r_data[23] +.sym 8201 lvds_rx_09_inst.r_data[25] +.sym 8202 lvds_rx_09_inst.o_debug_state[0] +.sym 8217 lvds_rx_09_inst.o_debug_state[0] +.sym 8220 lvds_rx_09_inst.r_data[23] +.sym 8223 lvds_rx_09_inst.r_data[29] +.sym 8226 lvds_rx_09_inst.o_debug_state[0] +.sym 8236 lvds_rx_09_inst.o_debug_state[0] +.sym 8238 lvds_rx_09_inst.r_data[27] +.sym 8239 lvds_rx_09_inst.r_state_if_SB_DFFESR_Q_E_SB_LUT4_O_I0_SB_LUT4_I0_O_$glb_ce .sym 8240 io_pmod[0]$SB_IO_IN_$glb_clk .sym 8241 w_soft_reset_$glb_sr -.sym 8247 lvds_rx_09_inst.r_data[16] -.sym 8249 lvds_rx_09_inst.r_data[12] -.sym 8251 lvds_rx_09_inst.r_data[14] -.sym 8252 lvds_rx_09_inst.r_data[8] -.sym 8253 lvds_rx_09_inst.r_data[10] -.sym 8259 w_rx_09_fifo_pulled_data[16] -.sym 8279 lvds_rx_09_inst.r_data[5] -.sym 8288 lvds_rx_09_inst.r_data[1] -.sym 8289 w_smi_data_output[5] -.sym 8291 w_smi_data_output[6] -.sym 8294 w_smi_data_output[1] -.sym 8298 w_smi_data_output[2] -.sym 8306 lvds_rx_09_inst.r_data[0] -.sym 8312 lvds_rx_09_inst.r_data[16] -.sym 8317 lvds_rx_09_inst.r_data[1] -.sym 8331 lvds_rx_09_inst.r_data[5] -.sym 8339 w_rx_09_fifo_pulled_data[0] -.sym 8342 lvds_rx_09_inst.r_data[12] -.sym 8346 lvds_rx_09_inst.r_data[10] -.sym 8347 lvds_rx_09_inst.r_data[6] -.sym 8352 lvds_rx_09_inst.r_data[14] -.sym 8353 lvds_rx_09_inst.r_data[8] -.sym 8357 lvds_rx_09_inst.r_data[12] -.sym 8365 w_rx_09_fifo_pulled_data[0] -.sym 8376 lvds_rx_09_inst.r_data[6] -.sym 8381 lvds_rx_09_inst.r_data[10] -.sym 8386 lvds_rx_09_inst.r_data[8] -.sym 8392 lvds_rx_09_inst.r_data[14] -.sym 8400 lvds_rx_09_inst.r_data[5] -.sym 8402 lvds_rx_09_inst.o_fifo_data_SB_DFFNE_Q_E_$glb_ce +.sym 8246 io_smi_data[2]$SB_IO_OUT +.sym 8247 io_smi_data[4]$SB_IO_OUT +.sym 8249 rx_09_fifo.rd_addr_gray_wr[3] +.sym 8250 rx_09_fifo.rd_addr_gray_wr_r[3] +.sym 8252 io_pmod_SB_DFFSR_Q_D_SB_LUT4_O_I0_SB_LUT4_O_2_I1_SB_LUT4_O_I2[0] +.sym 8259 rx_09_fifo.wr_addr[3] +.sym 8263 rx_09_fifo.wr_addr[4] +.sym 8265 rx_09_fifo.wr_addr[6] +.sym 8275 io_smi_data[2]$SB_IO_OUT +.sym 8284 lvds_rx_09_inst.o_debug_state[0] +.sym 8285 lvds_rx_09_inst.r_data[0] +.sym 8295 io_smi_data[1]$SB_IO_OUT +.sym 8297 w_smi_data_output[7] +.sym 8300 w_rx_09_fifo_data[31] +.sym 8305 w_rx_09_fifo_data[27] +.sym 8324 lvds_rx_09_inst.r_data[27] +.sym 8326 i_smi_a3$SB_IO_IN +.sym 8328 lvds_rx_09_inst.r_data[31] +.sym 8330 lvds_rx_09_inst.r_data[29] +.sym 8332 lvds_rx_09_inst.r_data[23] +.sym 8334 lvds_rx_09_inst.r_data[2] +.sym 8335 lvds_rx_09_inst.r_data[25] +.sym 8351 w_smi_data_output[7] +.sym 8359 lvds_rx_09_inst.r_data[25] +.sym 8362 lvds_rx_09_inst.r_data[29] +.sym 8369 i_smi_a3$SB_IO_IN +.sym 8371 w_smi_data_output[7] +.sym 8377 lvds_rx_09_inst.r_data[2] +.sym 8381 lvds_rx_09_inst.r_data[31] +.sym 8393 lvds_rx_09_inst.r_data[27] +.sym 8401 lvds_rx_09_inst.r_data[23] +.sym 8402 lvds_rx_09_inst.r_push_SB_LUT4_I3_O_$glb_ce .sym 8403 io_pmod[0]$SB_IO_IN_$glb_clk -.sym 8406 w_smi_data_output[5] -.sym 8407 w_smi_data_output[6] -.sym 8408 w_smi_data_output[1] -.sym 8409 w_smi_data_output[3] -.sym 8410 w_smi_data_output[2] -.sym 8411 w_smi_data_output[4] -.sym 8412 w_smi_data_output[7] -.sym 8431 smi_ctrl_ins.int_cnt_09[4] -.sym 8434 w_rx_09_fifo_pulled_data[17] -.sym 8435 smi_ctrl_ins.int_cnt_09[3] -.sym 8439 i_smi_a1_SB_LUT4_I1_O -.sym 8455 lvds_rx_09_inst.r_data[1] -.sym 8458 lvds_rx_09_inst.r_data[2] -.sym 8460 lvds_rx_09_inst.r_data[3] -.sym 8471 lvds_rx_09_inst.r_data[0] -.sym 8481 lvds_rx_09_inst.r_data[0] -.sym 8497 lvds_rx_09_inst.r_data[3] -.sym 8510 lvds_rx_09_inst.r_data[1] -.sym 8521 lvds_rx_09_inst.r_data[2] -.sym 8525 lvds_rx_09_inst.o_fifo_data_SB_DFFNE_Q_E_$glb_ce -.sym 8526 io_pmod[0]$SB_IO_IN_$glb_clk -.sym 8528 smi_ctrl_ins.o_smi_data_out_SB_DFFNE_Q_D_SB_LUT4_O_1_I3[3] -.sym 8529 rx_09_fifo.rd_addr_gray_wr_r[6] -.sym 8530 smi_ctrl_ins.o_smi_data_out_SB_DFFNE_Q_D_SB_LUT4_O_7_I3[3] -.sym 8531 rx_09_fifo.rd_addr_gray_wr[6] -.sym 8532 io_pmod_SB_DFFSS_Q_D_SB_LUT4_O_I0_SB_LUT4_O_I0_SB_LUT4_O_I0[3] -.sym 8533 rx_09_fifo.rd_addr_gray_wr[4] -.sym 8534 rx_09_fifo.rd_addr_gray_wr[3] -.sym 8538 spi_if_ins.state_if_SB_DFFESR_Q_R -.sym 8541 w_rx_09_fifo_pulled_data[20] -.sym 8543 w_rx_09_fifo_pulled_data[2] -.sym 8547 rx_09_fifo.wr_addr[7] -.sym 8549 w_rx_09_fifo_pulled_data[23] -.sym 8550 w_rx_09_fifo_pulled_data[21] +.sym 8405 io_pmod_SB_DFFSS_Q_D_SB_LUT4_O_I0_SB_LUT4_O_I0_SB_LUT4_O_1_I2[0] +.sym 8406 io_pmod_SB_DFFSS_Q_D_SB_LUT4_O_I0_SB_LUT4_O_I0_SB_LUT4_O_1_I2[1] +.sym 8407 io_pmod_SB_DFFSS_Q_D_SB_LUT4_O_I0_SB_LUT4_O_I0[2] +.sym 8408 io_pmod_SB_DFFSS_Q_D_SB_LUT4_O_I0_SB_LUT4_O_1_I0[0] +.sym 8409 io_pmod_SB_DFFSS_Q_D_SB_LUT4_O_I0_SB_LUT4_O_I0[1] +.sym 8410 io_pmod_SB_DFFSS_Q_D_SB_LUT4_O_I0[2] +.sym 8411 io_pmod_SB_DFFSS_Q_D_SB_LUT4_O_I0_SB_LUT4_O_I0_SB_LUT4_O_1_I2[2] +.sym 8412 io_pmod_SB_DFFSS_Q_D_SB_LUT4_O_I0_SB_LUT4_O_I0[0] +.sym 8415 spi_if_ins.o_ioc_SB_DFFE_Q_E[0] +.sym 8418 io_pmod_SB_DFFSR_Q_D_SB_LUT4_O_I0_SB_LUT4_O_2_I1_SB_LUT4_O_I2[0] +.sym 8425 w_rx_09_fifo_data[2] +.sym 8426 io_pmod_SB_DFFSR_Q_D_SB_LUT4_O_I0_SB_LUT4_O_I2_SB_LUT4_O_I1_SB_LUT4_O_I3[1] +.sym 8427 lvds_rx_09_inst.o_debug_state[0] +.sym 8431 io_pmod_SB_DFFSS_Q_D_SB_LUT4_O_I0_SB_LUT4_O_1_I0[1] +.sym 8432 w_smi_data_output[4] +.sym 8433 rx_09_fifo.rd_addr[0] +.sym 8435 io_pmod_SB_DFFSS_Q_D_SB_LUT4_O_I0_SB_LUT4_O_1_I0[3] +.sym 8436 rx_09_fifo.rd_addr_gray_wr[2] +.sym 8456 rx_09_fifo.rd_addr_gray_SB_DFFESR_Q_6_D[0] +.sym 8460 rx_09_fifo.rd_addr[0] +.sym 8461 i_smi_a3$SB_IO_IN +.sym 8463 rx_09_fifo.rd_addr_gray_SB_LUT4_I2_O[1] +.sym 8464 rx_09_fifo.rd_addr_gray_SB_LUT4_I2_O[2] +.sym 8465 rx_09_fifo.rd_addr_gray_SB_LUT4_I2_O[3] +.sym 8470 w_smi_data_output[1] +.sym 8472 w_smi_data_output[5] +.sym 8473 rx_09_fifo.rd_addr_SB_DFFESR_Q_E +.sym 8474 rx_09_fifo.rd_addr_gray_SB_LUT4_I2_O[4] +.sym 8480 rx_09_fifo.rd_addr_gray_SB_LUT4_I2_O[4] +.sym 8487 rx_09_fifo.rd_addr_gray_SB_DFFESR_Q_6_D[0] +.sym 8494 rx_09_fifo.rd_addr_gray_SB_LUT4_I2_O[3] +.sym 8498 i_smi_a3$SB_IO_IN +.sym 8499 w_smi_data_output[1] +.sym 8503 i_smi_a3$SB_IO_IN +.sym 8504 w_smi_data_output[5] +.sym 8509 rx_09_fifo.rd_addr_gray_SB_LUT4_I2_O[1] +.sym 8518 rx_09_fifo.rd_addr[0] +.sym 8522 rx_09_fifo.rd_addr_gray_SB_LUT4_I2_O[2] +.sym 8525 rx_09_fifo.rd_addr_SB_DFFESR_Q_E +.sym 8526 w_clock_sys +.sym 8527 w_soft_reset_$glb_sr +.sym 8529 rx_09_fifo.rd_addr_gray_SB_LUT4_I2_O[1] +.sym 8530 rx_09_fifo.rd_addr_gray_SB_LUT4_I2_O[2] +.sym 8531 rx_09_fifo.rd_addr_gray_SB_LUT4_I2_O[3] +.sym 8532 rx_09_fifo.rd_addr_gray_SB_LUT4_I2_O[4] +.sym 8533 rx_09_fifo.rd_addr_gray_SB_LUT4_I2_O[5] +.sym 8534 rx_09_fifo.rd_addr_gray_SB_LUT4_I2_O[6] +.sym 8535 rx_09_fifo.rd_addr_gray_SB_LUT4_I2_O[7] +.sym 8540 rx_09_fifo.rd_addr[4] +.sym 8544 rx_09_fifo.rd_addr_gray[1] +.sym 8550 io_smi_data[5]$SB_IO_OUT +.sym 8552 io_pmod[5]$SB_IO_IN .sym 8553 rx_09_fifo.rd_addr_gray[3] -.sym 8555 rx_09_fifo.rd_addr_gray[6] -.sym 8558 rx_09_fifo.rd_addr[0] -.sym 8563 rx_09_fifo.rd_addr[1] -.sym 8569 w_rx_09_fifo_pulled_data[31] -.sym 8570 smi_ctrl_ins.int_cnt_09[4] -.sym 8572 smi_ctrl_ins.int_cnt_09[3] -.sym 8573 w_rx_09_fifo_pulled_data[12] -.sym 8576 lvds_rx_09_inst.r_data[26] -.sym 8578 w_rx_09_fifo_pulled_data[9] -.sym 8579 w_rx_09_fifo_pulled_data[10] -.sym 8580 w_rx_09_fifo_pulled_data[11] -.sym 8582 w_rx_09_fifo_pulled_data[13] -.sym 8584 w_rx_09_fifo_pulled_data[15] -.sym 8587 lvds_rx_09_inst.r_data[16] -.sym 8588 w_rx_09_fifo_pulled_data[25] -.sym 8591 smi_ctrl_ins.int_cnt_09[4] -.sym 8594 w_rx_09_fifo_pulled_data[28] -.sym 8596 w_rx_09_fifo_pulled_data[29] -.sym 8598 w_rx_09_fifo_pulled_data[26] -.sym 8600 w_rx_09_fifo_pulled_data[27] -.sym 8602 w_rx_09_fifo_pulled_data[15] -.sym 8603 smi_ctrl_ins.int_cnt_09[4] -.sym 8604 w_rx_09_fifo_pulled_data[31] -.sym 8605 smi_ctrl_ins.int_cnt_09[3] -.sym 8608 smi_ctrl_ins.int_cnt_09[4] -.sym 8609 w_rx_09_fifo_pulled_data[29] -.sym 8610 smi_ctrl_ins.int_cnt_09[3] -.sym 8611 w_rx_09_fifo_pulled_data[13] -.sym 8614 w_rx_09_fifo_pulled_data[27] -.sym 8615 smi_ctrl_ins.int_cnt_09[4] -.sym 8616 w_rx_09_fifo_pulled_data[11] -.sym 8617 smi_ctrl_ins.int_cnt_09[3] -.sym 8623 lvds_rx_09_inst.r_data[16] -.sym 8626 w_rx_09_fifo_pulled_data[28] -.sym 8627 smi_ctrl_ins.int_cnt_09[4] -.sym 8628 w_rx_09_fifo_pulled_data[12] -.sym 8629 smi_ctrl_ins.int_cnt_09[3] -.sym 8632 w_rx_09_fifo_pulled_data[25] -.sym 8633 smi_ctrl_ins.int_cnt_09[4] -.sym 8634 smi_ctrl_ins.int_cnt_09[3] -.sym 8635 w_rx_09_fifo_pulled_data[9] -.sym 8638 smi_ctrl_ins.int_cnt_09[4] -.sym 8639 smi_ctrl_ins.int_cnt_09[3] -.sym 8640 w_rx_09_fifo_pulled_data[26] -.sym 8641 w_rx_09_fifo_pulled_data[10] -.sym 8644 lvds_rx_09_inst.r_data[26] -.sym 8648 lvds_rx_09_inst.o_fifo_data_SB_DFFNE_Q_E_$glb_ce -.sym 8649 io_pmod[0]$SB_IO_IN_$glb_clk -.sym 8651 io_pmod_SB_DFFSS_Q_D_SB_LUT4_O_I0[0] -.sym 8652 $io_pmod[4]$iobuf_i -.sym 8653 $io_pmod[5]$iobuf_i -.sym 8654 io_pmod_SB_DFFSS_Q_D_SB_LUT4_O_I0_SB_LUT4_O_I0_SB_LUT4_O_I0[0] -.sym 8655 smi_ctrl_ins.r_fifo_09_pull_1 -.sym 8656 io_pmod_SB_DFFSS_Q_D_SB_LUT4_O_I0_SB_LUT4_O_I0[0] -.sym 8657 io_pmod_SB_DFFSS_Q_D_SB_LUT4_O_I0_SB_LUT4_O_I0[2] -.sym 8658 smi_ctrl_ins.r_fifo_09_pull -.sym 8663 w_rx_09_fifo_pulled_data[31] -.sym 8667 w_rx_09_fifo_pulled_data[24] -.sym 8669 rx_09_fifo.wr_addr[2] -.sym 8670 w_rx_09_fifo_pulled_data[30] -.sym 8672 rx_09_fifo.rd_addr_gray_wr_r[6] -.sym 8674 lvds_rx_09_inst.r_data[2] -.sym 8694 rx_09_fifo.rd_addr_gray_SB_DFFESR_Q_5_D[0] -.sym 8695 i_smi_a3$SB_IO_IN -.sym 8700 rx_09_fifo.rd_addr[2] -.sym 8701 smi_ctrl_ins.int_cnt_09[4] -.sym 8702 w_soft_reset -.sym 8703 i_smi_a1$SB_IO_IN -.sym 8705 rx_09_fifo.rd_addr[3] -.sym 8711 smi_ctrl_ins.int_cnt_09[3] -.sym 8714 i_smi_a2$SB_IO_IN -.sym 8719 i_smi_a2_SB_LUT4_I0_O -.sym 8720 rx_09_fifo.rd_addr[4] -.sym 8722 rx_09_fifo.rd_addr[5] -.sym 8725 rx_09_fifo.rd_addr_gray_SB_DFFESR_Q_5_D[0] -.sym 8727 rx_09_fifo.rd_addr[3] -.sym 8728 rx_09_fifo.rd_addr[2] -.sym 8732 smi_ctrl_ins.int_cnt_09[4] -.sym 8733 smi_ctrl_ins.int_cnt_09[3] -.sym 8738 rx_09_fifo.rd_addr[4] -.sym 8745 smi_ctrl_ins.int_cnt_09[3] -.sym 8755 w_soft_reset -.sym 8756 i_smi_a1$SB_IO_IN -.sym 8757 i_smi_a3$SB_IO_IN -.sym 8758 i_smi_a2$SB_IO_IN -.sym 8761 i_smi_a1$SB_IO_IN -.sym 8762 i_smi_a3$SB_IO_IN -.sym 8763 i_smi_a2$SB_IO_IN -.sym 8764 w_soft_reset -.sym 8769 rx_09_fifo.rd_addr[5] -.sym 8771 i_smi_a2_SB_LUT4_I0_O -.sym 8772 smi_ctrl_ins.soe_and_reset_$glb_clk +.sym 8559 rx_09_fifo.rd_addr[1] +.sym 8572 w_smi_data_output[6] +.sym 8577 smi_ctrl_ins.o_smi_data_out_SB_DFFNE_Q_D_SB_LUT4_O_3_I3[3] +.sym 8580 i_smi_a1_SB_LUT4_I1_O +.sym 8581 i_smi_a3$SB_IO_IN +.sym 8583 smi_ctrl_ins.o_smi_data_out_SB_DFFNE_Q_D_SB_LUT4_O_7_I3[3] +.sym 8585 w_rx_09_fifo_pulled_data[16] +.sym 8586 rx_09_fifo.rd_addr_gray_SB_LUT4_I2_O[1] +.sym 8587 smi_ctrl_ins.int_cnt_09[3] +.sym 8589 w_rx_09_fifo_pulled_data[20] +.sym 8593 w_rx_09_fifo_pulled_data[0] +.sym 8595 rx_09_fifo.rd_addr_gray_SB_LUT4_I2_O[2] +.sym 8597 w_rx_09_fifo_pulled_data[4] +.sym 8615 rx_09_fifo.rd_addr_gray_SB_LUT4_I2_O[1] +.sym 8617 rx_09_fifo.rd_addr_gray_SB_LUT4_I2_O[2] +.sym 8620 smi_ctrl_ins.o_smi_data_out_SB_DFFNE_Q_D_SB_LUT4_O_7_I3[3] +.sym 8621 smi_ctrl_ins.int_cnt_09[3] +.sym 8622 w_rx_09_fifo_pulled_data[0] +.sym 8623 w_rx_09_fifo_pulled_data[16] +.sym 8627 i_smi_a3$SB_IO_IN +.sym 8629 w_smi_data_output[6] +.sym 8644 smi_ctrl_ins.o_smi_data_out_SB_DFFNE_Q_D_SB_LUT4_O_3_I3[3] +.sym 8645 smi_ctrl_ins.int_cnt_09[3] +.sym 8646 w_rx_09_fifo_pulled_data[4] +.sym 8647 w_rx_09_fifo_pulled_data[20] +.sym 8648 i_smi_a1_SB_LUT4_I1_O +.sym 8649 smi_ctrl_ins.soe_and_reset_$glb_clk +.sym 8651 rx_09_fifo.rd_addr_gray_SB_DFFESR_Q_6_D[2] +.sym 8652 rx_09_fifo.rd_addr_gray_SB_DFFESR_Q_7_D[1] +.sym 8653 rx_09_fifo.rd_addr_gray_SB_DFFESR_Q_4_D[1] +.sym 8654 rx_09_fifo.rd_addr_gray_wr[2] +.sym 8655 rx_09_fifo.rd_addr_gray_SB_DFFESR_Q_7_D[2] +.sym 8656 rx_09_fifo.rd_addr_gray_SB_DFFESR_Q_5_D[1] +.sym 8657 rx_09_fifo.rd_addr_gray_SB_DFFESR_Q_7_D[3] +.sym 8658 rx_09_fifo.rd_addr_gray_SB_DFFESR_Q_4_D[3] +.sym 8677 w_soft_reset +.sym 8678 io_pmod_SB_DFFSS_Q_D_SB_LUT4_O_I0_SB_LUT4_O_I0_SB_LUT4_O_1_I2[1] +.sym 8681 rx_09_fifo.rd_addr_gray_wr_r[6] +.sym 8682 $PACKER_VCC_NET +.sym 8698 rx_09_fifo.rd_addr_gray_SB_LUT4_I2_O[6] +.sym 8699 rx_09_fifo.rd_addr_gray_SB_LUT4_I2_O[7] +.sym 8703 rx_09_fifo.rd_addr_SB_DFFESR_Q_E +.sym 8705 rx_09_fifo.rd_addr_gray_SB_LUT4_I2_O[5] +.sym 8710 rx_09_fifo.rd_addr_gray_SB_DFFESR_Q_4_D[1] +.sym 8713 rx_09_fifo.rd_addr_gray_SB_DFFESR_Q_5_D[1] +.sym 8716 rx_09_fifo.rd_addr_gray_SB_DFFESR_Q_6_D[2] +.sym 8717 rx_09_fifo.rd_addr_gray_SB_DFFESR_Q_7_D[1] +.sym 8726 rx_09_fifo.rd_addr_gray_SB_LUT4_I2_O[7] +.sym 8734 rx_09_fifo.rd_addr_gray_SB_LUT4_I2_O[5] +.sym 8738 rx_09_fifo.rd_addr_gray_SB_LUT4_I2_O[7] +.sym 8739 rx_09_fifo.rd_addr_gray_SB_LUT4_I2_O[6] +.sym 8744 rx_09_fifo.rd_addr_gray_SB_LUT4_I2_O[6] +.sym 8752 rx_09_fifo.rd_addr_gray_SB_DFFESR_Q_5_D[1] +.sym 8758 rx_09_fifo.rd_addr_gray_SB_DFFESR_Q_7_D[1] +.sym 8761 rx_09_fifo.rd_addr_gray_SB_DFFESR_Q_4_D[1] +.sym 8769 rx_09_fifo.rd_addr_gray_SB_DFFESR_Q_6_D[2] +.sym 8771 rx_09_fifo.rd_addr_SB_DFFESR_Q_E +.sym 8772 w_clock_sys .sym 8773 w_soft_reset_$glb_sr -.sym 8774 rx_09_fifo.rd_addr_gray[3] -.sym 8775 rx_09_fifo.rd_addr_gray[6] -.sym 8776 rx_09_fifo.rd_addr_gray[4] -.sym 8777 io_pmod_SB_DFFSS_Q_D_SB_LUT4_O_I0_SB_LUT4_O_I0_SB_LUT4_O_3_I2[3] -.sym 8778 rx_09_fifo.rd_addr[4] -.sym 8779 rx_09_fifo.rd_addr[1] -.sym 8780 rx_09_fifo.rd_addr[5] -.sym 8781 io_pmod_SB_DFFSS_Q_D_SB_LUT4_O_I0[1] -.sym 8790 w_soft_reset -.sym 8795 $io_pmod[4]$iobuf_i -.sym 8798 rx_09_fifo.rd_addr[7] -.sym 8800 spi_if_ins.o_load_cmd_SB_DFFESR_Q_D_SB_LUT4_I2_O[1] -.sym 8803 spi_if_ins.state_if[0] -.sym 8817 rx_09_fifo.rd_addr_SB_DFFESR_Q_E -.sym 8833 rx_09_fifo.rd_addr_gray_SB_LUT4_I2_O[2] -.sym 8834 rx_09_fifo.rd_addr[0] -.sym 8842 rx_09_fifo.rd_addr_gray_SB_LUT4_I2_O[3] -.sym 8846 rx_09_fifo.rd_addr_gray_SB_LUT4_I2_O[7] -.sym 8848 rx_09_fifo.rd_addr_gray_SB_LUT4_I2_O[2] -.sym 8866 rx_09_fifo.rd_addr[0] -.sym 8872 rx_09_fifo.rd_addr_gray_SB_LUT4_I2_O[7] -.sym 8879 rx_09_fifo.rd_addr_gray_SB_LUT4_I2_O[3] -.sym 8894 rx_09_fifo.rd_addr_SB_DFFESR_Q_E -.sym 8895 w_clock_sys +.sym 8774 io_pmod_SB_DFFSS_Q_D_SB_LUT4_O_I0[0] +.sym 8775 w_rx_09_fifo_data[3] +.sym 8776 io_pmod_SB_DFFSS_Q_D_SB_LUT4_O_I0[1] +.sym 8779 w_rx_09_fifo_data[21] +.sym 8781 w_rx_09_fifo_data[19] +.sym 8786 rx_09_fifo.rd_addr[7] +.sym 8788 rx_09_fifo.rd_addr_gray[0] +.sym 8790 rx_09_fifo.wr_addr_SB_DFFESR_Q_E +.sym 8794 rx_09_fifo.wr_addr[7] +.sym 8795 rx_09_fifo.wr_addr[0] +.sym 8798 io_pmod[4]$SB_IO_IN +.sym 8808 rx_09_fifo.rd_addr_gray_SB_DFFESR_Q_4_D[3] +.sym 8817 lvds_rx_09_inst.o_debug_state[0] +.sym 8818 lvds_rx_09_inst.r_data[3] +.sym 8823 lvds_rx_09_inst.r_data[21] +.sym 8824 io_pmod[4]$SB_IO_IN +.sym 8830 lvds_rx_09_inst.r_data[19] +.sym 8836 lvds_rx_09_inst.r_data[17] +.sym 8837 w_soft_reset +.sym 8848 lvds_rx_09_inst.r_data[19] +.sym 8850 lvds_rx_09_inst.o_debug_state[0] +.sym 8867 w_soft_reset +.sym 8869 io_pmod[4]$SB_IO_IN +.sym 8878 lvds_rx_09_inst.r_data[3] +.sym 8879 lvds_rx_09_inst.o_debug_state[0] +.sym 8885 lvds_rx_09_inst.r_data[21] +.sym 8886 lvds_rx_09_inst.o_debug_state[0] +.sym 8892 lvds_rx_09_inst.r_data[17] +.sym 8893 lvds_rx_09_inst.o_debug_state[0] +.sym 8894 lvds_rx_09_inst.r_state_if_SB_DFFESR_Q_E_SB_LUT4_O_I0_SB_LUT4_I0_O_$glb_ce +.sym 8895 io_pmod[0]$SB_IO_IN_$glb_clk .sym 8896 w_soft_reset_$glb_sr -.sym 8898 rx_09_fifo.rd_addr_gray_SB_LUT4_I2_O[1] -.sym 8899 rx_09_fifo.rd_addr_gray_SB_LUT4_I2_O[2] -.sym 8900 rx_09_fifo.rd_addr_gray_SB_LUT4_I2_O[3] -.sym 8901 rx_09_fifo.rd_addr_gray_SB_LUT4_I2_O[4] -.sym 8902 rx_09_fifo.rd_addr_gray_SB_LUT4_I2_O[5] -.sym 8903 rx_09_fifo.rd_addr_gray_SB_LUT4_I2_O[6] -.sym 8904 rx_09_fifo.rd_addr_gray_SB_LUT4_I2_O[7] -.sym 8912 io_pmod_SB_DFFSS_Q_D_SB_LUT4_O_I0_SB_LUT4_O_I0_SB_LUT4_O_3_I2[3] -.sym 8914 io_pmod_SB_DFFSS_Q_D_SB_LUT4_O_I0[1] -.sym 8924 spi_if_ins.state_if_SB_DFFESR_Q_R -.sym 8929 spi_if_ins.state_if[0] -.sym 8930 spi_if_ins.o_data_in_SB_DFFE_Q_E -.sym 8940 spi_if_ins.state_if_SB_DFFE_Q_E -.sym 8942 spi_if_ins.state_if_SB_DFFESR_Q_R -.sym 8943 spi_if_ins.state_if[1] -.sym 8946 spi_if_ins.state_if[0] -.sym 8947 spi_if_ins.o_load_cmd_SB_DFFESR_Q_D_SB_LUT4_I2_O[0] -.sym 8958 spi_if_ins.state_if_SB_DFFESR_Q_D[0] -.sym 8966 sys_ctrl_ins.reset_count_SB_DFFESR_Q_E -.sym 8971 spi_if_ins.state_if_SB_DFFESR_Q_D[0] -.sym 8986 sys_ctrl_ins.reset_count_SB_DFFESR_Q_E -.sym 8995 spi_if_ins.o_load_cmd_SB_DFFESR_Q_D_SB_LUT4_I2_O[0] -.sym 8996 spi_if_ins.state_if[1] -.sym 8998 spi_if_ins.state_if[0] -.sym 9017 spi_if_ins.state_if_SB_DFFE_Q_E -.sym 9018 w_clock_sys -.sym 9019 spi_if_ins.state_if_SB_DFFESR_Q_R +.sym 8899 w_tx_data_smi[1] +.sym 8904 w_tx_data_smi[0] +.sym 8912 lvds_rx_09_inst.r_data[3] +.sym 8920 w_rx_09_fifo_data[0] +.sym 8939 i_smi_a1$SB_IO_IN +.sym 8942 rx_09_fifo.rd_addr_gray[6] +.sym 8945 i_smi_a2$SB_IO_IN +.sym 8949 w_soft_reset +.sym 8953 i_smi_a3$SB_IO_IN +.sym 8967 rx_09_fifo.rd_addr_gray_wr[6] +.sym 8977 i_smi_a1$SB_IO_IN +.sym 8978 i_smi_a3$SB_IO_IN +.sym 8979 i_smi_a2$SB_IO_IN +.sym 8980 w_soft_reset +.sym 8992 rx_09_fifo.rd_addr_gray_wr[6] +.sym 9004 rx_09_fifo.rd_addr_gray[6] +.sym 9013 i_smi_a2$SB_IO_IN +.sym 9014 i_smi_a3$SB_IO_IN +.sym 9015 i_smi_a1$SB_IO_IN +.sym 9016 w_soft_reset +.sym 9018 io_pmod[0]$SB_IO_IN_$glb_clk .sym 9022 sys_ctrl_ins.reset_count[2] .sym 9023 sys_ctrl_ins.reset_count[3] -.sym 9024 sys_ctrl_ins.reset_count_SB_DFFESR_Q_E +.sym 9024 sys_ctrl_ins.reset_count[1] .sym 9025 sys_ctrl_ins.reset_count[0] -.sym 9026 spi_if_ins.o_load_cmd_SB_DFFESR_Q_D[0] -.sym 9027 sys_ctrl_ins.reset_count[1] -.sym 9032 spi_if_ins.state_if[0] -.sym 9038 spi_if_ins.state_if_SB_DFFESR_Q_R -.sym 9040 spi_if_ins.state_if_SB_DFFE_Q_E -.sym 9043 spi_if_ins.o_load_cmd_SB_DFFESR_Q_D_SB_LUT4_I2_O[0] -.sym 9048 w_cs[0] -.sym 9049 spi_if_ins.o_load_cmd_SB_DFFESR_Q_D[1] -.sym 9061 spi_if_ins.state_if[0] -.sym 9064 spi_if_ins.o_load_cmd_SB_DFFESR_Q_D_SB_LUT4_I2_O[0] -.sym 9065 spi_if_ins.o_load_cmd_SB_DFFESR_Q_D_SB_LUT4_I2_O_SB_LUT4_I3_O[1] -.sym 9068 spi_if_ins.o_load_cmd_SB_DFFESR_Q_D[1] -.sym 9072 spi_if_ins.o_load_cmd_SB_DFFESR_Q_D_SB_LUT4_I2_O[1] -.sym 9073 spi_if_ins.state_if_SB_DFFESR_Q_D[0] -.sym 9074 spi_if_ins.state_if[1] -.sym 9078 spi_if_ins.o_load_cmd_SB_DFFESR_Q_D[1] -.sym 9079 spi_if_ins.state_if_SB_DFFE_Q_E -.sym 9106 spi_if_ins.state_if[1] -.sym 9107 spi_if_ins.o_load_cmd_SB_DFFESR_Q_D[1] -.sym 9108 spi_if_ins.state_if[0] -.sym 9109 spi_if_ins.o_load_cmd_SB_DFFESR_Q_D_SB_LUT4_I2_O[0] -.sym 9124 spi_if_ins.o_load_cmd_SB_DFFESR_Q_D[1] -.sym 9125 spi_if_ins.o_load_cmd_SB_DFFESR_Q_D_SB_LUT4_I2_O_SB_LUT4_I3_O[1] -.sym 9126 spi_if_ins.state_if_SB_DFFESR_Q_D[0] -.sym 9127 spi_if_ins.o_load_cmd_SB_DFFESR_Q_D_SB_LUT4_I2_O[1] -.sym 9136 spi_if_ins.o_load_cmd_SB_DFFESR_Q_D[1] -.sym 9140 spi_if_ins.state_if_SB_DFFE_Q_E +.sym 9026 sys_ctrl_ins.reset_count_SB_DFFESR_Q_E +.sym 9027 sys_ctrl_ins.o_soft_reset_SB_DFFESS_Q_S +.sym 9033 io_ctrl_ins.o_data_out_SB_DFFESR_Q_3_R[0] +.sym 9044 io_pmod[5]$SB_IO_IN +.sym 9054 w_tx_data_smi[0] +.sym 9079 rx_09_fifo.rd_addr_SB_DFFESR_Q_E +.sym 9080 rx_09_fifo.rd_addr_gray_SB_DFFESR_Q_4_D[3] +.sym 9100 rx_09_fifo.rd_addr_gray_SB_DFFESR_Q_4_D[3] +.sym 9140 rx_09_fifo.rd_addr_SB_DFFESR_Q_E .sym 9141 w_clock_sys -.sym 9143 w_cs[1] -.sym 9144 w_cs[2] -.sym 9145 sys_ctrl_ins.o_soft_reset_SB_DFFESS_Q_S -.sym 9146 w_cs[3] -.sym 9147 spi_if_ins.o_data_in_SB_DFFE_Q_E -.sym 9149 spi_if_ins.o_load_cmd_SB_LUT4_I2_O[1] -.sym 9150 sys_ctrl_ins.reset_cmd -.sym 9157 spi_if_ins.state_if[1] -.sym 9168 sys_ctrl_ins.reset_cmd -.sym 9178 spi_if_ins.o_load_cmd_SB_LUT4_I2_O_SB_LUT4_I3_O_SB_LUT4_I3_1_O -.sym 9188 spi_if_ins.o_load_cmd_SB_DFFESR_Q_D_SB_LUT4_I2_O[0] -.sym 9190 spi_if_ins.o_load_cmd_SB_DFFESR_Q_D[0] -.sym 9196 spi_if_ins.o_load_cmd_SB_DFFESR_Q_D[1] -.sym 9197 spi_if_ins.state_if[1] -.sym 9201 spi_if_ins.state_if[0] -.sym 9211 spi_if_ins.o_load_cmd_SB_DFFESR_Q_E -.sym 9213 spi_if_ins.state_if_SB_DFFESR_Q_R -.sym 9219 spi_if_ins.o_load_cmd_SB_DFFESR_Q_D[0] -.sym 9235 spi_if_ins.o_load_cmd_SB_DFFESR_Q_D[1] -.sym 9236 spi_if_ins.state_if[1] -.sym 9237 spi_if_ins.state_if[0] -.sym 9238 spi_if_ins.o_load_cmd_SB_DFFESR_Q_D_SB_LUT4_I2_O[0] -.sym 9263 spi_if_ins.o_load_cmd_SB_DFFESR_Q_E +.sym 9142 w_soft_reset_$glb_sr +.sym 9143 r_tx_data[2] +.sym 9146 spi_if_ins.o_ioc_SB_DFFE_Q_E[0] +.sym 9149 r_tx_data[1] +.sym 9167 w_tx_data_io[0] +.sym 9170 w_tx_data_io[1] +.sym 9171 sys_ctrl_ins.reset_cmd_SB_DFFESR_Q_R +.sym 9174 smi_ctrl_ins.o_data_out_SB_DFFESS_Q_E +.sym 9175 $PACKER_VCC_NET +.sym 9177 sys_ctrl_ins.o_soft_reset_SB_DFFESS_Q_S +.sym 9198 spi_if_ins.spi.r_rx_byte[7] +.sym 9211 spi_if_ins.spi.r3_rx_done_SB_LUT4_I2_O +.sym 9247 spi_if_ins.spi.r_rx_byte[7] +.sym 9263 spi_if_ins.spi.r3_rx_done_SB_LUT4_I2_O .sym 9264 w_clock_sys -.sym 9265 spi_if_ins.state_if_SB_DFFESR_Q_R -.sym 9266 smi_ctrl_ins.o_data_out_SB_LUT4_I0_O[2] -.sym 9267 smi_ctrl_ins.o_data_out_SB_LUT4_I0_I1[2] -.sym 9268 r_tx_data[1] -.sym 9269 r_tx_data[7] -.sym 9270 r_tx_data[5] -.sym 9271 smi_ctrl_ins.o_data_out_SB_LUT4_I0_I1[1] -.sym 9272 r_tx_data[2] -.sym 9273 w_fetch -.sym 9280 spi_if_ins.o_load_cmd_SB_DFFESR_Q_D_SB_LUT4_I2_O[0] -.sym 9286 spi_if_ins.spi.r_tx_byte_SB_DFFESR_Q_E -.sym 9290 w_tx_data_io[5] -.sym 9291 io_ctrl_ins.o_data_out_SB_DFFESS_Q_S -.sym 9294 spi_if_ins.o_data_in_SB_DFFE_Q_E -.sym 9301 spi_if_ins.o_data_in_SB_DFFE_Q_E -.sym 9309 sys_ctrl_ins.reset_cmd_SB_DFFESR_Q_E -.sym 9311 sys_ctrl_ins.reset_cmd_SB_DFFESR_Q_R -.sym 9318 $PACKER_VCC_NET -.sym 9320 w_cs[0] -.sym 9366 w_cs[0] -.sym 9378 $PACKER_VCC_NET -.sym 9386 sys_ctrl_ins.reset_cmd_SB_DFFESR_Q_E +.sym 9268 w_cs[0] +.sym 9269 spi_if_ins.o_cs_SB_LUT4_I3_O +.sym 9273 smi_ctrl_ins.o_data_out_SB_LUT4_I0_O[3] +.sym 9279 r_tx_data[1] +.sym 9280 spi_if_ins.o_ioc_SB_DFFE_Q_E[0] +.sym 9291 sys_ctrl_ins.reset_cmd +.sym 9312 spi_if_ins.spi.r_temp_rx_byte[6] +.sym 9334 spi_if_ins.spi.r_rx_byte_SB_DFFE_Q_E +.sym 9377 spi_if_ins.spi.r_temp_rx_byte[6] +.sym 9386 spi_if_ins.spi.r_rx_byte_SB_DFFE_Q_E .sym 9387 w_clock_sys -.sym 9388 sys_ctrl_ins.reset_cmd_SB_DFFESR_Q_R -.sym 9392 w_tx_data_io[1] -.sym 9401 smi_ctrl_ins.o_data_out_SB_LUT4_I0_O[1] -.sym 9403 spi_if_ins.o_cs_SB_LUT4_I3_1_O -.sym 9407 w_tx_data_io[7] -.sym 9412 spi_if_ins.o_load_cmd_SB_DFFESR_Q_D[1] -.sym 9413 io_ctrl_ins.led1_state_SB_LUT4_I3_O[0] -.sym 9418 i_button_SB_LUT4_I3_O[1] -.sym 9419 spi_if_ins.o_load_cmd_SB_DFFESR_Q_D_SB_LUT4_I2_O_SB_LUT4_I3_O[2] -.sym 9423 spi_if_ins.o_data_in_SB_DFFE_Q_E -.sym 9430 w_cs[0] -.sym 9438 w_load -.sym 9442 i_button_SB_LUT4_I3_O[1] -.sym 9445 w_fetch -.sym 9448 spi_if_ins.o_load_cmd_SB_LUT4_I2_O_SB_LUT4_I3_O_SB_LUT4_I3_1_O -.sym 9452 w_rx_data[2] -.sym 9469 w_load -.sym 9470 w_cs[0] -.sym 9471 i_button_SB_LUT4_I3_O[1] -.sym 9472 w_fetch -.sym 9477 w_rx_data[2] -.sym 9509 spi_if_ins.o_load_cmd_SB_LUT4_I2_O_SB_LUT4_I3_O_SB_LUT4_I3_1_O +.sym 9389 sys_ctrl_ins.reset_cmd_SB_DFFESR_Q_E +.sym 9391 r_tx_data[0] +.sym 9392 smi_ctrl_ins.o_data_out_SB_DFFESS_Q_E +.sym 9393 smi_ctrl_ins.o_data_out_SB_DFFESS_Q_E_SB_LUT4_O_I3[1] +.sym 9394 sys_ctrl_ins.o_data_out_SB_DFFE_Q_E +.sym 9402 spi_if_ins.o_ioc_SB_DFFE_Q_E[1] +.sym 9408 spi_if_ins.spi.r_temp_rx_byte[6] +.sym 9410 spi_if_ins.o_ioc_SB_DFFE_Q_E[1] +.sym 9413 w_ioc[0] +.sym 9422 i_button_SB_LUT4_I3_O[1] +.sym 9432 sys_ctrl_ins.reset_cmd_SB_DFFESR_Q_E +.sym 9440 w_cs[0] +.sym 9443 sys_ctrl_ins.reset_cmd_SB_DFFESR_Q_R +.sym 9447 $PACKER_VCC_NET +.sym 9502 $PACKER_VCC_NET +.sym 9505 w_cs[0] +.sym 9509 sys_ctrl_ins.reset_cmd_SB_DFFESR_Q_E .sym 9510 w_clock_sys -.sym 9513 w_ioc[4] -.sym 9514 spi_if_ins.o_load_cmd_SB_LUT4_I2_O_SB_LUT4_I3_O_SB_LUT4_I3_1_O -.sym 9515 w_ioc[3] -.sym 9516 w_ioc[2] -.sym 9517 spi_if_ins.o_load_cmd_SB_LUT4_I2_O_SB_LUT4_I3_O_SB_LUT4_I3_1_O -.sym 9528 sys_ctrl_ins.reset_cmd_SB_DFFESR_Q_E -.sym 9535 $PACKER_VCC_NET -.sym 9537 io_ctrl_ins.pmod_dir_state[2] -.sym 9538 w_rx_data[2] -.sym 9539 io_ctrl_ins.pmod_dir_state[4] -.sym 9541 io_ctrl_ins.led1_state_SB_LUT4_I3_O[2] -.sym 9545 w_tx_data_io[2] -.sym 9546 spi_if_ins.w_rx_data[5] -.sym 9555 spi_if_ins.w_rx_data[4] -.sym 9564 spi_if_ins.w_rx_data[3] -.sym 9571 spi_if_ins.o_data_in_SB_DFFE_Q_E -.sym 9607 spi_if_ins.w_rx_data[4] -.sym 9624 spi_if_ins.w_rx_data[3] -.sym 9632 spi_if_ins.o_data_in_SB_DFFE_Q_E +.sym 9511 sys_ctrl_ins.reset_cmd_SB_DFFESR_Q_R +.sym 9512 io_ctrl_ins.o_data_out_SB_DFFESR_Q_R +.sym 9514 w_ioc[4] +.sym 9515 w_ioc[2] +.sym 9517 w_ioc[3] +.sym 9518 w_ioc[0] +.sym 9519 w_ioc[1] +.sym 9531 sys_ctrl_ins.reset_cmd_SB_DFFESR_Q_E +.sym 9533 w_load +.sym 9535 r_tx_data[0] +.sym 9541 w_rx_data[1] +.sym 9543 w_ioc[1] +.sym 9546 spi_if_ins.o_data_in_SB_DFFE_Q_E +.sym 9558 sys_ctrl_ins.o_data_out_SB_DFFE_Q_E +.sym 9559 io_ctrl_ins.led0_state_SB_LUT4_I3_O[1] +.sym 9580 sys_ctrl_ins.o_data_out_SB_DFFE_Q_E +.sym 9600 io_ctrl_ins.led0_state_SB_LUT4_I3_O[1] +.sym 9606 sys_ctrl_ins.o_data_out_SB_DFFE_Q_E +.sym 9632 sys_ctrl_ins.o_data_out_SB_DFFE_Q_E .sym 9633 w_clock_sys -.sym 9636 w_rx_data[6] -.sym 9637 i_button_SB_LUT4_I3_O[1] -.sym 9638 w_rx_data[5] -.sym 9639 w_rx_data[0] -.sym 9641 w_rx_data[7] -.sym 9642 w_rx_data[2] -.sym 9655 w_rx_data[4] -.sym 9656 io_ctrl_ins.o_data_out_SB_DFFESR_Q_3_R[1] -.sym 9662 w_rx_data[4] -.sym 9664 w_rx_data[7] -.sym 9665 spi_if_ins.o_load_cmd_SB_LUT4_I2_O_SB_LUT4_I3_O_SB_LUT4_I3_1_O -.sym 9668 w_rx_data[3] -.sym 9678 spi_if_ins.o_load_cmd_SB_LUT4_I2_O_SB_LUT4_I3_O_SB_LUT4_I3_1_O -.sym 9682 w_rx_data[3] -.sym 9687 w_rx_data[4] -.sym 9690 w_rx_data[1] -.sym 9693 w_rx_data[6] -.sym 9710 w_rx_data[1] -.sym 9727 w_rx_data[6] -.sym 9733 w_rx_data[3] -.sym 9752 w_rx_data[4] -.sym 9755 spi_if_ins.o_load_cmd_SB_LUT4_I2_O_SB_LUT4_I3_O_SB_LUT4_I3_1_O -.sym 9756 w_clock_sys -.sym 9760 io_ctrl_ins.led1_state_SB_LUT4_I3_O[2] -.sym 9762 w_tx_data_io[2] -.sym 9763 io_ctrl_ins.o_data_out_SB_DFFESR_Q_D_SB_LUT4_O_I2[0] -.sym 9764 spi_if_ins.o_load_cmd_SB_LUT4_I2_O_SB_LUT4_I3_O_SB_LUT4_I3_O -.sym 9765 io_ctrl_ins.rx_h_b_state_SB_LUT4_I0_I2[3] -.sym 9771 w_rx_data[7] -.sym 9773 w_rx_data[5] -.sym 9780 io_ctrl_ins.pmod_dir_state[3] -.sym 9781 i_button_SB_LUT4_I3_O[1] -.sym 9784 w_rx_data[5] -.sym 9808 w_rx_data[6] +.sym 9635 io_ctrl_ins.pmod_dir_state[3] +.sym 9636 io_ctrl_ins.led0_state_SB_LUT4_I3_O[0] +.sym 9637 io_ctrl_ins.led1_state_SB_LUT4_I3_O[0] +.sym 9638 spi_if_ins.o_load_cmd_SB_LUT4_I2_O_SB_LUT4_I3_O_SB_LUT4_I3_O +.sym 9639 i_button_SB_LUT4_I3_O[1] +.sym 9641 io_ctrl_ins.o_data_out_SB_DFFESR_Q_D_SB_LUT4_O_I2[0] +.sym 9642 io_ctrl_ins.tr_vc_2_state_SB_LUT4_I1_I3[1] +.sym 9649 spi_if_ins.w_rx_data[2] +.sym 9653 spi_if_ins.o_load_cmd_SB_LUT4_I2_O_SB_LUT4_I3_O_SB_LUT4_I3_1_O +.sym 9654 io_ctrl_ins.o_data_out_SB_DFFESS_Q_E[2] +.sym 9656 spi_if_ins.w_rx_data[4] +.sym 9657 spi_if_ins.w_rx_data[1] +.sym 9666 w_tx_data_io[1] +.sym 9667 w_ioc[0] +.sym 9668 io_ctrl_ins.pmod_dir_state[3] +.sym 9669 spi_if_ins.w_rx_data[1] +.sym 9670 w_tx_data_io[0] +.sym 9760 w_rx_data[1] +.sym 9761 w_rx_data[0] +.sym 9762 w_rx_data[2] +.sym 9772 io_ctrl_ins.led0_state_SB_LUT4_I3_O[1] +.sym 9775 io_ctrl_ins.tr_vc_2_state_SB_LUT4_I1_I3[1] +.sym 9776 spi_if_ins.o_load_cmd_SB_LUT4_I2_O_SB_LUT4_I3_O_SB_LUT4_I3_O +.sym 9789 io_ctrl_ins.o_data_out_SB_DFFESS_Q_E[2] .sym 9810 spi_if_ins.o_load_cmd_SB_LUT4_I2_O_SB_LUT4_I3_O_SB_LUT4_I3_O -.sym 9813 w_rx_data[1] -.sym 9814 w_rx_data[2] -.sym 9828 w_rx_data[3] -.sym 9851 w_rx_data[6] -.sym 9858 w_rx_data[2] -.sym 9864 w_rx_data[1] -.sym 9875 w_rx_data[3] +.sym 9825 w_rx_data[1] +.sym 9869 w_rx_data[1] .sym 9878 spi_if_ins.o_load_cmd_SB_LUT4_I2_O_SB_LUT4_I3_O_SB_LUT4_I3_O .sym 9879 w_clock_sys -.sym 9881 io_ctrl_ins.o_pmod[0] -.sym 9882 io_ctrl_ins.o_pmod[5] -.sym 9886 i_button_SB_LUT4_I3_O[0] -.sym 9887 io_ctrl_ins.o_pmod[4] -.sym 9901 w_rx_data[1] -.sym 9905 io_ctrl_ins.o_data_out_SB_DFFESR_Q_R -.sym 9916 io_ctrl_ins.o_pmod[3] -.sym 10017 io_ctrl_ins.o_pmod[4] -.sym 10025 io_ctrl_ins.o_pmod[5] -.sym 10138 o_shdn_rx_lna$SB_IO_OUT -.sym 10169 o_shdn_rx_lna$SB_IO_OUT +.sym 9884 w_tx_data_io[1] +.sym 9885 io_ctrl_ins.led1_state_SB_LUT4_I3_O[2] +.sym 9886 w_tx_data_io[0] +.sym 9887 w_tx_data_io[3] +.sym 9890 spi_if_ins.o_ioc_SB_DFFE_Q_E[0] +.sym 9896 w_rx_data[0] +.sym 9897 w_rx_data[5] +.sym 9902 spi_if_ins.o_load_cmd_SB_LUT4_I2_O_SB_LUT4_I3_O_SB_LUT4_I3_2_O +.sym 10017 io_ctrl_ins.led0_state_SB_LUT4_I3_O[2] +.sym 10018 io_ctrl_ins.tr_vc_2_state_SB_LUT4_I1_O[2] +.sym 10025 io_ctrl_ins.debug_mode_SB_LUT4_I0_O +.sym 10036 io_ctrl_ins.o_data_out_SB_DFFESS_Q_S +.sym 10146 o_shdn_rx_lna$SB_IO_OUT +.sym 10167 o_shdn_rx_lna$SB_IO_OUT .sym 10172 o_shdn_rx_lna$SB_IO_OUT -.sym 10187 o_shdn_rx_lna$SB_IO_OUT +.sym 10185 o_shdn_rx_lna$SB_IO_OUT .sym 10201 io_smi_data[2]$SB_IO_OUT .sym 10204 io_smi_data[1]$SB_IO_OUT -.sym 10215 io_smi_data[1]$SB_IO_OUT -.sym 10221 io_smi_data[2]$SB_IO_OUT -.sym 10226 rx_09_fifo.rd_addr_gray_wr_r[4] -.sym 10230 io_pmod_SB_DFFSR_Q_D_SB_LUT4_O_I2_SB_LUT4_O_1_I0_SB_LUT4_O_2_I0[1] -.sym 10272 w_rx_09_fifo_pulled_data[16] -.sym 10276 smi_ctrl_ins.int_cnt_09[3] -.sym 10279 i_smi_a1_SB_LUT4_I1_O -.sym 10286 w_smi_data_output[5] -.sym 10292 smi_ctrl_ins.o_smi_data_out_SB_DFFNE_Q_D_SB_LUT4_O_7_I3[3] -.sym 10293 w_rx_09_fifo_pulled_data[0] -.sym 10294 w_smi_data_output[2] -.sym 10295 i_smi_a3$SB_IO_IN -.sym 10298 w_smi_data_output[1] -.sym 10301 w_rx_09_fifo_pulled_data[16] -.sym 10302 smi_ctrl_ins.o_smi_data_out_SB_DFFNE_Q_D_SB_LUT4_O_7_I3[3] -.sym 10303 w_rx_09_fifo_pulled_data[0] -.sym 10304 smi_ctrl_ins.int_cnt_09[3] -.sym 10308 w_smi_data_output[5] -.sym 10310 i_smi_a3$SB_IO_IN -.sym 10320 i_smi_a3$SB_IO_IN -.sym 10321 w_smi_data_output[2] -.sym 10331 w_smi_data_output[1] -.sym 10334 i_smi_a3$SB_IO_IN -.sym 10347 i_smi_a1_SB_LUT4_I1_O -.sym 10348 smi_ctrl_ins.soe_and_reset_$glb_clk -.sym 10356 io_pmod_SB_DFFSR_Q_D_SB_LUT4_O_I2_SB_LUT4_O_1_I0_SB_LUT4_O_3_I3[1] -.sym 10357 io_pmod_SB_DFFSR_Q_D_SB_LUT4_O_I2_SB_LUT4_O_1_I0_SB_LUT4_O_3_I3[2] -.sym 10358 io_pmod_SB_DFFSR_Q_D_SB_LUT4_O_I2_SB_LUT4_O_1_I0_SB_LUT4_O_1_I0[1] -.sym 10359 io_pmod_SB_DFFSR_Q_D_SB_LUT4_O_I2_SB_LUT4_O_1_I0_SB_LUT4_O_1_I0[3] -.sym 10360 io_pmod_SB_DFFSR_Q_D_SB_LUT4_O_I2_SB_LUT4_O_1_I0_SB_LUT4_O_I2[6] -.sym 10361 io_pmod_SB_DFFSR_Q_D_SB_LUT4_O_I2_SB_LUT4_O_1_I0[0] -.sym 10366 smi_ctrl_ins.int_cnt_09[3] -.sym 10369 i_smi_a1_SB_LUT4_I1_O -.sym 10372 lvds_rx_09_inst.r_data[1] -.sym 10399 io_smi_data[7]$SB_IO_OUT -.sym 10401 io_smi_data[5]$SB_IO_OUT -.sym 10405 lvds_rx_09_inst.r_phase_count_SB_LUT4_O_I3_SB_DFFNESR_Q_E_SB_LUT4_O_I2_SB_LUT4_I1_O -.sym 10410 rx_09_fifo.rd_addr_gray_wr_r[6] -.sym 10413 smi_ctrl_ins.o_smi_data_out_SB_DFFNE_Q_D_SB_LUT4_O_7_I3[3] -.sym 10419 rx_09_fifo.rd_addr_gray_wr[4] -.sym 10434 lvds_rx_09_inst.r_data[12] -.sym 10437 lvds_rx_09_inst.r_data[8] -.sym 10446 lvds_rx_09_inst.r_data[10] -.sym 10450 lvds_rx_09_inst.r_state_if_SB_DFFNESR_Q_E_SB_LUT4_O_I2[1] -.sym 10452 lvds_rx_09_inst.r_data[6] -.sym 10460 lvds_rx_09_inst.r_data[14] -.sym 10470 lvds_rx_09_inst.r_state_if_SB_DFFNESR_Q_E_SB_LUT4_O_I2[1] -.sym 10471 lvds_rx_09_inst.r_data[14] -.sym 10482 lvds_rx_09_inst.r_state_if_SB_DFFNESR_Q_E_SB_LUT4_O_I2[1] -.sym 10483 lvds_rx_09_inst.r_data[10] -.sym 10494 lvds_rx_09_inst.r_state_if_SB_DFFNESR_Q_E_SB_LUT4_O_I2[1] -.sym 10496 lvds_rx_09_inst.r_data[12] -.sym 10501 lvds_rx_09_inst.r_data[6] -.sym 10503 lvds_rx_09_inst.r_state_if_SB_DFFNESR_Q_E_SB_LUT4_O_I2[1] -.sym 10506 lvds_rx_09_inst.r_state_if_SB_DFFNESR_Q_E_SB_LUT4_O_I2[1] -.sym 10507 lvds_rx_09_inst.r_data[8] -.sym 10510 lvds_rx_09_inst.r_phase_count_SB_LUT4_O_I3_SB_DFFNESR_Q_E_SB_LUT4_O_I2_SB_LUT4_I1_O_$glb_ce +.sym 10217 io_smi_data[1]$SB_IO_OUT +.sym 10223 io_smi_data[2]$SB_IO_OUT +.sym 10227 io_smi_data[3]$SB_IO_OUT +.sym 10228 rx_09_fifo.wr_addr_gray_rd[3] +.sym 10273 lvds_rx_09_inst.o_debug_state[0] +.sym 10274 lvds_rx_09_inst.r_data[0] +.sym 10286 io_smi_data[7]$SB_IO_OUT +.sym 10321 lvds_rx_09_inst.o_debug_state[0] +.sym 10322 lvds_rx_09_inst.r_data[0] +.sym 10346 io_smi_data[7]$SB_IO_OUT +.sym 10347 lvds_rx_09_inst.r_state_if_SB_DFFESR_Q_E_SB_LUT4_O_I0_SB_LUT4_I0_O_$glb_ce +.sym 10348 io_pmod[0]$SB_IO_IN_$glb_clk +.sym 10349 w_soft_reset_$glb_sr +.sym 10355 io_pmod_SB_DFFSR_Q_D_SB_LUT4_O_I0_SB_LUT4_O_2_I1_SB_LUT4_O_I2[1] +.sym 10356 io_pmod_SB_DFFSR_Q_D_SB_LUT4_O_I0_SB_LUT4_O_2_I1_SB_LUT4_O_I2[3] +.sym 10357 io_pmod_SB_DFFSR_Q_D_SB_LUT4_O_I0_SB_LUT4_O_I2_SB_LUT4_O_I1[3] +.sym 10358 io_pmod_SB_DFFSR_Q_D_SB_LUT4_O_I0_SB_LUT4_O_I2_SB_LUT4_O_I1[4] +.sym 10359 io_pmod_SB_DFFSR_Q_D_SB_LUT4_O_I0_SB_LUT4_O_I2_SB_LUT4_O_I1[5] +.sym 10360 io_pmod_SB_DFFSR_Q_D_SB_LUT4_O_I0_SB_LUT4_O_I2_SB_LUT4_O_I1[6] +.sym 10361 rx_09_fifo.rd_addr_gray_SB_DFFESR_Q_4_D[0] +.sym 10387 lvds_rx_09_inst.r_state_if_SB_DFFESR_Q_E_SB_LUT4_O_I0_SB_LUT4_I0_O +.sym 10395 w_smi_data_output[2] +.sym 10406 rx_09_fifo.wr_addr_gray_rd[2] +.sym 10407 io_pmod_SB_DFFSS_Q_D_SB_LUT4_O_I0[2] +.sym 10409 rx_09_fifo.rd_addr_gray[4] +.sym 10431 rx_09_fifo.rd_addr_gray[3] +.sym 10450 rx_09_fifo.rd_addr_gray_wr[3] +.sym 10452 w_smi_data_output[2] +.sym 10458 rx_09_fifo.rd_addr_gray_wr[2] +.sym 10461 i_smi_a3$SB_IO_IN +.sym 10462 w_smi_data_output[4] +.sym 10465 w_smi_data_output[2] +.sym 10467 i_smi_a3$SB_IO_IN +.sym 10471 w_smi_data_output[4] +.sym 10472 i_smi_a3$SB_IO_IN +.sym 10483 rx_09_fifo.rd_addr_gray[3] +.sym 10489 rx_09_fifo.rd_addr_gray_wr[3] +.sym 10502 rx_09_fifo.rd_addr_gray_wr[2] .sym 10511 io_pmod[0]$SB_IO_IN_$glb_clk -.sym 10512 w_soft_reset_$glb_sr -.sym 10515 io_smi_data[7]$SB_IO_OUT -.sym 10516 rx_09_fifo.wr_addr_gray_rd[2] -.sym 10518 io_pmod_SB_DFFSS_Q_D_SB_LUT4_O_I0_SB_LUT4_O_I0_SB_LUT4_O_3_I2[0] -.sym 10519 io_smi_data[4]$SB_IO_OUT -.sym 10531 lvds_rx_09_inst.r_data[2] -.sym 10537 w_smi_data_output[3] -.sym 10539 w_rx_09_fifo_pulled_data[18] -.sym 10540 io_pmod_SB_DFFSS_Q_D_SB_LUT4_O_I0_SB_LUT4_O_I0_SB_LUT4_O_3_I2[0] -.sym 10541 w_rx_09_fifo_pulled_data[19] -.sym 10545 rx_09_fifo.rd_addr_gray_SB_DFFESR_Q_6_D[2] -.sym 10554 smi_ctrl_ins.o_smi_data_out_SB_DFFNE_Q_D_SB_LUT4_O_1_I3[3] -.sym 10555 w_rx_09_fifo_pulled_data[7] -.sym 10556 w_rx_09_fifo_pulled_data[5] -.sym 10558 w_rx_09_fifo_pulled_data[20] -.sym 10559 w_rx_09_fifo_pulled_data[19] -.sym 10560 w_rx_09_fifo_pulled_data[2] -.sym 10562 w_rx_09_fifo_pulled_data[6] -.sym 10564 w_rx_09_fifo_pulled_data[23] -.sym 10565 w_rx_09_fifo_pulled_data[18] -.sym 10566 w_rx_09_fifo_pulled_data[4] -.sym 10567 w_rx_09_fifo_pulled_data[21] -.sym 10570 smi_ctrl_ins.o_smi_data_out_SB_DFFNE_Q_D_SB_LUT4_O_I3[3] -.sym 10571 smi_ctrl_ins.o_smi_data_out_SB_DFFNE_Q_D_SB_LUT4_O_2_I3[3] -.sym 10572 smi_ctrl_ins.o_smi_data_out_SB_DFFNE_Q_D_SB_LUT4_O_4_I3[3] -.sym 10574 w_rx_09_fifo_pulled_data[17] -.sym 10576 w_rx_09_fifo_pulled_data[3] -.sym 10577 smi_ctrl_ins.int_cnt_09[3] -.sym 10579 w_rx_09_fifo_pulled_data[22] -.sym 10580 w_rx_09_fifo_pulled_data[1] -.sym 10581 i_smi_a1_SB_LUT4_I1_O -.sym 10582 smi_ctrl_ins.o_smi_data_out_SB_DFFNE_Q_D_SB_LUT4_O_3_I3[3] -.sym 10583 smi_ctrl_ins.o_smi_data_out_SB_DFFNE_Q_D_SB_LUT4_O_6_I3[3] -.sym 10584 smi_ctrl_ins.o_smi_data_out_SB_DFFNE_Q_D_SB_LUT4_O_5_I3[3] -.sym 10585 smi_ctrl_ins.int_cnt_09[3] -.sym 10593 smi_ctrl_ins.o_smi_data_out_SB_DFFNE_Q_D_SB_LUT4_O_2_I3[3] -.sym 10594 w_rx_09_fifo_pulled_data[5] -.sym 10595 smi_ctrl_ins.int_cnt_09[3] -.sym 10596 w_rx_09_fifo_pulled_data[21] -.sym 10599 w_rx_09_fifo_pulled_data[22] -.sym 10600 smi_ctrl_ins.int_cnt_09[3] -.sym 10601 smi_ctrl_ins.o_smi_data_out_SB_DFFNE_Q_D_SB_LUT4_O_1_I3[3] -.sym 10602 w_rx_09_fifo_pulled_data[6] -.sym 10605 smi_ctrl_ins.int_cnt_09[3] -.sym 10606 smi_ctrl_ins.o_smi_data_out_SB_DFFNE_Q_D_SB_LUT4_O_6_I3[3] -.sym 10607 w_rx_09_fifo_pulled_data[1] -.sym 10608 w_rx_09_fifo_pulled_data[17] -.sym 10611 smi_ctrl_ins.o_smi_data_out_SB_DFFNE_Q_D_SB_LUT4_O_4_I3[3] -.sym 10612 w_rx_09_fifo_pulled_data[19] -.sym 10613 w_rx_09_fifo_pulled_data[3] -.sym 10614 smi_ctrl_ins.int_cnt_09[3] -.sym 10617 smi_ctrl_ins.o_smi_data_out_SB_DFFNE_Q_D_SB_LUT4_O_5_I3[3] -.sym 10618 w_rx_09_fifo_pulled_data[18] -.sym 10619 smi_ctrl_ins.int_cnt_09[3] -.sym 10620 w_rx_09_fifo_pulled_data[2] -.sym 10623 w_rx_09_fifo_pulled_data[20] -.sym 10624 smi_ctrl_ins.o_smi_data_out_SB_DFFNE_Q_D_SB_LUT4_O_3_I3[3] -.sym 10625 smi_ctrl_ins.int_cnt_09[3] -.sym 10626 w_rx_09_fifo_pulled_data[4] -.sym 10629 w_rx_09_fifo_pulled_data[23] -.sym 10630 smi_ctrl_ins.o_smi_data_out_SB_DFFNE_Q_D_SB_LUT4_O_I3[3] -.sym 10631 w_rx_09_fifo_pulled_data[7] -.sym 10632 smi_ctrl_ins.int_cnt_09[3] -.sym 10633 i_smi_a1_SB_LUT4_I1_O -.sym 10634 smi_ctrl_ins.soe_and_reset_$glb_clk -.sym 10636 rx_09_fifo.rd_addr_gray_wr_r[2] -.sym 10637 rx_09_fifo.rd_addr_gray_wr[2] -.sym 10638 io_pmod_SB_DFFSR_Q_D_SB_LUT4_O_I2_SB_LUT4_O_1_I0_SB_LUT4_O_3_I3[0] -.sym 10642 rx_09_fifo.rd_addr_gray_wr[7] -.sym 10643 rx_09_fifo.rd_addr_gray_wr_r[7] -.sym 10644 rx_09_fifo.wr_addr_gray_rd[6] -.sym 10649 io_smi_data[4]$SB_IO_OUT -.sym 10650 w_rx_09_fifo_pulled_data[5] -.sym 10658 lvds_rx_09_inst.r_data[1] -.sym 10659 w_rx_09_fifo_pulled_data[7] -.sym 10662 rx_09_fifo.wr_addr_gray_rd[2] -.sym 10664 rx_09_fifo.rd_addr_gray[4] -.sym 10666 io_pmod_SB_DFFSS_Q_D_SB_LUT4_O_I0_SB_LUT4_O_I0_SB_LUT4_O_3_I2[0] -.sym 10667 rx_09_fifo.rd_addr[7] -.sym 10670 io_pmod[5]$SB_IO_IN -.sym 10671 spi_if_ins.o_load_cmd_SB_DFFESR_Q_D_SB_LUT4_I2_O_SB_LUT4_I3_O[2] -.sym 10684 w_rx_09_fifo_pulled_data[24] -.sym 10685 w_rx_09_fifo_pulled_data[30] -.sym 10690 rx_09_fifo.rd_addr_gray[4] -.sym 10693 rx_09_fifo.rd_addr_gray[3] -.sym 10694 smi_ctrl_ins.int_cnt_09[4] -.sym 10695 rx_09_fifo.rd_addr[1] -.sym 10696 rx_09_fifo.rd_addr_gray_wr[6] -.sym 10697 w_rx_09_fifo_pulled_data[14] -.sym 10700 rx_09_fifo.rd_addr[0] -.sym 10701 w_rx_09_fifo_pulled_data[8] -.sym 10702 smi_ctrl_ins.int_cnt_09[4] -.sym 10703 rx_09_fifo.rd_addr_gray[6] -.sym 10704 smi_ctrl_ins.int_cnt_09[3] -.sym 10705 io_pmod_SB_DFFSS_Q_D_SB_LUT4_O_I0[2] -.sym 10710 w_rx_09_fifo_pulled_data[14] -.sym 10711 smi_ctrl_ins.int_cnt_09[4] -.sym 10712 smi_ctrl_ins.int_cnt_09[3] -.sym 10713 w_rx_09_fifo_pulled_data[30] -.sym 10716 rx_09_fifo.rd_addr_gray_wr[6] -.sym 10722 smi_ctrl_ins.int_cnt_09[4] -.sym 10723 w_rx_09_fifo_pulled_data[24] -.sym 10724 smi_ctrl_ins.int_cnt_09[3] -.sym 10725 w_rx_09_fifo_pulled_data[8] -.sym 10730 rx_09_fifo.rd_addr_gray[6] -.sym 10734 rx_09_fifo.rd_addr[1] -.sym 10735 io_pmod_SB_DFFSS_Q_D_SB_LUT4_O_I0[2] -.sym 10737 rx_09_fifo.rd_addr[0] -.sym 10741 rx_09_fifo.rd_addr_gray[4] -.sym 10748 rx_09_fifo.rd_addr_gray[3] -.sym 10757 io_pmod[0]$SB_IO_IN_$glb_clk -.sym 10759 io_pmod_SB_DFFSS_Q_D_SB_LUT4_O_I0_SB_LUT4_O_I0[1] -.sym 10760 io_pmod_SB_DFFSS_Q_D_SB_LUT4_O_I0_SB_LUT4_O_I0_SB_LUT4_O_3_I2[2] -.sym 10762 rx_09_fifo.rd_addr_gray_SB_DFFESR_Q_5_D[2] -.sym 10763 io_pmod_SB_DFFSS_Q_D_SB_LUT4_O_I0[2] -.sym 10764 rx_09_fifo.rd_addr_gray_SB_DFFESR_Q_5_D[0] -.sym 10765 io_pmod_SB_DFFSS_Q_D_SB_LUT4_O_I0_SB_LUT4_O_I0_SB_LUT4_O_I0[1] -.sym 10766 io_pmod_SB_DFFSS_Q_D_SB_LUT4_O_I0_SB_LUT4_O_I0[3] -.sym 10774 lvds_rx_09_inst.r_data[0] -.sym 10779 rx_09_fifo.rd_addr[7] -.sym 10782 io_pmod_SB_DFFSR_Q_D_SB_LUT4_O_I2_SB_LUT4_O_1_I0_SB_LUT4_O_3_I3[0] -.sym 10785 smi_ctrl_ins.o_data_out_SB_DFFESS_Q_E -.sym 10787 w_cs[0] -.sym 10791 lvds_rx_09_inst.r_phase_count_SB_LUT4_O_I3_SB_DFFNESR_Q_E_SB_LUT4_O_I2_SB_LUT4_I1_O -.sym 10800 io_pmod_SB_DFFSS_Q_D_SB_LUT4_O_I0[0] -.sym 10803 io_pmod_SB_DFFSS_Q_D_SB_LUT4_O_I0_SB_LUT4_O_I0_SB_LUT4_O_I0[0] -.sym 10804 io_pmod_SB_DFFSS_Q_D_SB_LUT4_O_I0_SB_LUT4_O_I0_SB_LUT4_O_I0[3] -.sym 10806 io_pmod_SB_DFFSS_Q_D_SB_LUT4_O_I0_SB_LUT4_O_I0[2] -.sym 10808 io_pmod_SB_DFFSS_Q_D_SB_LUT4_O_I0_SB_LUT4_O_I0_SB_LUT4_O_I0[2] -.sym 10809 smi_ctrl_ins.int_cnt_09[4] -.sym 10811 smi_ctrl_ins.int_cnt_09[3] -.sym 10812 rx_09_fifo.rd_addr[4] -.sym 10813 rx_09_fifo.rd_addr[1] -.sym 10815 io_pmod_SB_DFFSS_Q_D_SB_LUT4_O_I0[1] -.sym 10816 rx_09_fifo.rd_addr[2] -.sym 10817 rx_09_fifo.rd_addr_gray_SB_DFFESR_Q_6_D[2] -.sym 10819 rx_09_fifo.rd_addr_gray_SB_DFFESR_Q_5_D[2] -.sym 10820 smi_ctrl_ins.r_fifo_09_pull_1 -.sym 10821 io_pmod_SB_DFFSS_Q_D_SB_LUT4_O_I0_SB_LUT4_O_I0[0] -.sym 10822 io_pmod_SB_DFFSS_Q_D_SB_LUT4_O_I0_SB_LUT4_O_I0_SB_LUT4_O_I0[1] -.sym 10823 smi_ctrl_ins.r_fifo_09_pull -.sym 10824 io_pmod_SB_DFFSS_Q_D_SB_LUT4_O_I0_SB_LUT4_O_I0[1] -.sym 10826 io_pmod_SB_DFFSS_Q_D_SB_LUT4_O_I0[3] -.sym 10828 io_pmod_SB_DFFSS_Q_D_SB_LUT4_O_I0[2] -.sym 10829 rx_09_fifo.rd_addr[3] -.sym 10830 io_pmod[5]$SB_IO_IN -.sym 10831 io_pmod_SB_DFFSS_Q_D_SB_LUT4_O_I0_SB_LUT4_O_I0[3] -.sym 10833 io_pmod_SB_DFFSS_Q_D_SB_LUT4_O_I0_SB_LUT4_O_I0[2] -.sym 10834 io_pmod_SB_DFFSS_Q_D_SB_LUT4_O_I0_SB_LUT4_O_I0[0] -.sym 10835 io_pmod_SB_DFFSS_Q_D_SB_LUT4_O_I0_SB_LUT4_O_I0[3] -.sym 10836 io_pmod_SB_DFFSS_Q_D_SB_LUT4_O_I0_SB_LUT4_O_I0[1] -.sym 10839 smi_ctrl_ins.r_fifo_09_pull -.sym 10841 io_pmod[5]$SB_IO_IN -.sym 10842 smi_ctrl_ins.r_fifo_09_pull_1 -.sym 10845 io_pmod_SB_DFFSS_Q_D_SB_LUT4_O_I0[1] -.sym 10846 io_pmod_SB_DFFSS_Q_D_SB_LUT4_O_I0[3] -.sym 10847 io_pmod_SB_DFFSS_Q_D_SB_LUT4_O_I0[0] -.sym 10848 io_pmod_SB_DFFSS_Q_D_SB_LUT4_O_I0[2] -.sym 10851 rx_09_fifo.rd_addr[4] -.sym 10853 rx_09_fifo.rd_addr_gray_SB_DFFESR_Q_5_D[2] -.sym 10854 rx_09_fifo.rd_addr[3] -.sym 10858 smi_ctrl_ins.r_fifo_09_pull -.sym 10863 rx_09_fifo.rd_addr_gray_SB_DFFESR_Q_6_D[2] -.sym 10864 rx_09_fifo.rd_addr[1] -.sym 10865 io_pmod[5]$SB_IO_IN -.sym 10866 rx_09_fifo.rd_addr[2] -.sym 10869 io_pmod_SB_DFFSS_Q_D_SB_LUT4_O_I0_SB_LUT4_O_I0_SB_LUT4_O_I0[3] -.sym 10870 io_pmod_SB_DFFSS_Q_D_SB_LUT4_O_I0_SB_LUT4_O_I0_SB_LUT4_O_I0[2] -.sym 10871 io_pmod_SB_DFFSS_Q_D_SB_LUT4_O_I0_SB_LUT4_O_I0_SB_LUT4_O_I0[1] -.sym 10872 io_pmod_SB_DFFSS_Q_D_SB_LUT4_O_I0_SB_LUT4_O_I0_SB_LUT4_O_I0[0] -.sym 10876 smi_ctrl_ins.int_cnt_09[3] -.sym 10877 io_pmod[5]$SB_IO_IN -.sym 10878 smi_ctrl_ins.int_cnt_09[4] -.sym 10880 w_clock_sys -.sym 10881 w_soft_reset_$glb_sr -.sym 10882 w_cs[0] -.sym 10883 rx_09_fifo.rd_addr_gray_SB_DFFESR_Q_6_D_SB_LUT4_I0_O[0] -.sym 10884 io_pmod_SB_DFFSS_Q_D_SB_LUT4_O_I0[3] -.sym 10885 rx_09_fifo.rd_addr_gray_SB_DFFESR_Q_6_D[3] -.sym 10886 rx_09_fifo.rd_addr_gray_SB_DFFESR_Q_6_D_SB_LUT4_I0_O[3] -.sym 10887 rx_09_fifo.rd_addr_gray_SB_DFFESR_Q_5_D[1] -.sym 10888 rx_09_fifo.rd_addr_gray_SB_DFFESR_Q_6_D[0] -.sym 10889 rx_09_fifo.rd_addr_gray_SB_DFFESR_Q_6_D_SB_LUT4_I0_O[1] -.sym 10900 $io_pmod[5]$iobuf_i -.sym 10904 lvds_rx_09_inst.r_state_if_SB_DFFNESR_Q_E_SB_LUT4_O_I2[1] -.sym 10907 io_pmod[4]$SB_IO_IN -.sym 10908 rx_09_fifo.rd_addr[1] -.sym 10915 spi_if_ins.state_if[1] -.sym 10924 rx_09_fifo.rd_addr_gray_SB_LUT4_I2_O[1] -.sym 10926 rx_09_fifo.rd_addr[0] -.sym 10927 rx_09_fifo.rd_addr_gray_SB_LUT4_I2_O[4] -.sym 10929 rx_09_fifo.rd_addr_gray_SB_LUT4_I2_O[6] -.sym 10930 rx_09_fifo.rd_addr_gray_SB_LUT4_I2_O[7] -.sym 10936 rx_09_fifo.rd_addr_gray_SB_LUT4_I2_O[5] -.sym 10941 rx_09_fifo.rd_addr_SB_DFFESR_Q_E -.sym 10942 rx_09_fifo.rd_addr_gray_SB_DFFESR_Q_5_D[3] -.sym 10957 rx_09_fifo.rd_addr_gray_SB_DFFESR_Q_5_D[3] -.sym 10964 rx_09_fifo.rd_addr_gray_SB_LUT4_I2_O[7] -.sym 10965 rx_09_fifo.rd_addr_gray_SB_LUT4_I2_O[6] -.sym 10968 rx_09_fifo.rd_addr_gray_SB_LUT4_I2_O[5] -.sym 10970 rx_09_fifo.rd_addr_gray_SB_LUT4_I2_O[4] -.sym 10977 rx_09_fifo.rd_addr_gray_SB_LUT4_I2_O[6] -.sym 10980 rx_09_fifo.rd_addr_gray_SB_LUT4_I2_O[4] -.sym 10988 rx_09_fifo.rd_addr_gray_SB_LUT4_I2_O[1] -.sym 10992 rx_09_fifo.rd_addr_gray_SB_LUT4_I2_O[5] -.sym 10998 rx_09_fifo.rd_addr[0] -.sym 11000 rx_09_fifo.rd_addr_gray_SB_LUT4_I2_O[1] -.sym 11002 rx_09_fifo.rd_addr_SB_DFFESR_Q_E -.sym 11003 w_clock_sys -.sym 11004 w_soft_reset_$glb_sr -.sym 11005 spi_if_ins.o_load_cmd_SB_DFFESR_Q_D_SB_LUT4_I2_O_SB_LUT4_I3_O[1] -.sym 11007 rx_09_fifo.rd_addr_SB_DFFESR_Q_E -.sym 11008 rx_09_fifo.rd_addr_gray_SB_DFFESR_Q_5_D[3] -.sym 11009 w_tx_data_smi[1] -.sym 11012 w_tx_data_smi[0] -.sym 11024 w_cs[0] -.sym 11049 io_pmod_SB_DFFSS_Q_D_SB_LUT4_O_I0_SB_LUT4_O_I0_SB_LUT4_O_3_I2[3] -.sym 11050 rx_09_fifo.rd_addr[4] -.sym 11051 rx_09_fifo.rd_addr[1] -.sym 11052 rx_09_fifo.rd_addr[5] -.sym 11062 rx_09_fifo.rd_addr[2] -.sym 11067 rx_09_fifo.rd_addr[3] -.sym 11073 rx_09_fifo.rd_addr[0] -.sym 11074 rx_09_fifo.rd_addr[7] -.sym 11078 $nextpnr_ICESTORM_LC_3$O -.sym 11081 rx_09_fifo.rd_addr[0] -.sym 11084 rx_09_fifo.rd_addr_gray_SB_LUT4_I2_I3[2] -.sym 11087 rx_09_fifo.rd_addr[1] -.sym 11088 rx_09_fifo.rd_addr[0] -.sym 11090 rx_09_fifo.rd_addr_gray_SB_LUT4_I2_I3[3] -.sym 11093 rx_09_fifo.rd_addr[2] -.sym 11094 rx_09_fifo.rd_addr_gray_SB_LUT4_I2_I3[2] -.sym 11096 rx_09_fifo.rd_addr_gray_SB_LUT4_I2_I3[4] -.sym 11099 rx_09_fifo.rd_addr[3] -.sym 11100 rx_09_fifo.rd_addr_gray_SB_LUT4_I2_I3[3] -.sym 11102 rx_09_fifo.rd_addr_gray_SB_LUT4_I2_I3[5] -.sym 11105 rx_09_fifo.rd_addr[4] -.sym 11106 rx_09_fifo.rd_addr_gray_SB_LUT4_I2_I3[4] -.sym 11108 rx_09_fifo.rd_addr_gray_SB_LUT4_I2_I3[6] -.sym 11110 rx_09_fifo.rd_addr[5] -.sym 11112 rx_09_fifo.rd_addr_gray_SB_LUT4_I2_I3[5] -.sym 11114 rx_09_fifo.rd_addr_gray_SB_LUT4_I2_I3[7] -.sym 11116 io_pmod_SB_DFFSS_Q_D_SB_LUT4_O_I0_SB_LUT4_O_I0_SB_LUT4_O_3_I2[3] -.sym 11118 rx_09_fifo.rd_addr_gray_SB_LUT4_I2_I3[6] -.sym 11121 rx_09_fifo.rd_addr[7] -.sym 11124 rx_09_fifo.rd_addr_gray_SB_LUT4_I2_I3[7] -.sym 11128 spi_if_ins.r_tx_data_valid_SB_DFFESR_Q_E +.sym 10513 io_pmod_SB_DFFSR_Q_D_SB_LUT4_O_I0_SB_LUT4_O_I2_SB_LUT4_O_I3[0] +.sym 10514 rx_09_fifo.rd_addr_gray_wr[1] +.sym 10515 rx_09_fifo.rd_addr_gray_wr_r[7] +.sym 10516 io_pmod_SB_DFFSR_Q_D_SB_LUT4_O_I0_SB_LUT4_O_1_I2[1] +.sym 10517 rx_09_fifo.rd_addr_gray_wr[7] +.sym 10519 io_pmod_SB_DFFSR_Q_D_SB_LUT4_O_I0_SB_LUT4_O_I2_SB_LUT4_O_I3[3] +.sym 10520 rx_09_fifo.rd_addr_gray_wr[4] +.sym 10525 rx_09_fifo.rd_addr_gray[3] +.sym 10529 io_smi_data[4]$SB_IO_OUT +.sym 10530 lvds_rx_09_inst.o_debug_state[0] +.sym 10533 lvds_rx_09_inst.r_data[0] +.sym 10535 rx_09_fifo.rd_addr_gray_wr_r[3] +.sym 10538 rx_09_fifo.wr_addr_gray_SB_LUT4_I2_O[7] +.sym 10545 rx_09_fifo.wr_addr[3] +.sym 10546 rx_09_fifo.rd_addr[7] +.sym 10547 rx_09_fifo.rd_addr_gray_SB_DFFESR_Q_4_D[0] +.sym 10554 rx_09_fifo.rd_addr[4] +.sym 10556 io_pmod_SB_DFFSS_Q_D_SB_LUT4_O_I0_SB_LUT4_O_I0_SB_LUT4_O_1_I2[3] +.sym 10560 rx_09_fifo.rd_addr[0] +.sym 10561 rx_09_fifo.rd_addr_gray_SB_DFFESR_Q_4_D[0] +.sym 10562 io_pmod_SB_DFFSS_Q_D_SB_LUT4_O_I0_SB_LUT4_O_I0_SB_LUT4_O_1_I2[0] +.sym 10567 rx_09_fifo.rd_addr[1] +.sym 10569 io_pmod_SB_DFFSS_Q_D_SB_LUT4_O_I0_SB_LUT4_O_I0_SB_LUT4_O_2_I1[1] +.sym 10572 rx_09_fifo.wr_addr_gray_rd[2] +.sym 10573 io_pmod_SB_DFFSS_Q_D_SB_LUT4_O_I0_SB_LUT4_O_1_I0[1] +.sym 10574 io_pmod[5]$SB_IO_IN +.sym 10575 io_pmod_SB_DFFSS_Q_D_SB_LUT4_O_I0_SB_LUT4_O_1_I0[2] +.sym 10577 rx_09_fifo.rd_addr_gray_SB_DFFESR_Q_6_D[1] +.sym 10578 rx_09_fifo.rd_addr_gray_SB_DFFESR_Q_4_D[2] +.sym 10579 io_pmod_SB_DFFSS_Q_D_SB_LUT4_O_I0_SB_LUT4_O_I0_SB_LUT4_O_1_I2[1] +.sym 10581 io_pmod_SB_DFFSS_Q_D_SB_LUT4_O_I0_SB_LUT4_O_1_I0[0] +.sym 10582 rx_09_fifo.rd_addr_gray_SB_DFFESR_Q_7_D[0] +.sym 10584 io_pmod_SB_DFFSS_Q_D_SB_LUT4_O_I0_SB_LUT4_O_I0_SB_LUT4_O_1_I2[2] +.sym 10585 io_pmod_SB_DFFSS_Q_D_SB_LUT4_O_I0_SB_LUT4_O_1_I0[3] +.sym 10588 rx_09_fifo.rd_addr_gray_SB_DFFESR_Q_6_D[1] +.sym 10589 rx_09_fifo.rd_addr[1] +.sym 10594 rx_09_fifo.wr_addr_gray_rd[2] +.sym 10599 io_pmod_SB_DFFSS_Q_D_SB_LUT4_O_I0_SB_LUT4_O_I0_SB_LUT4_O_1_I2[3] +.sym 10600 io_pmod_SB_DFFSS_Q_D_SB_LUT4_O_I0_SB_LUT4_O_I0_SB_LUT4_O_1_I2[0] +.sym 10601 io_pmod_SB_DFFSS_Q_D_SB_LUT4_O_I0_SB_LUT4_O_I0_SB_LUT4_O_1_I2[1] +.sym 10602 io_pmod_SB_DFFSS_Q_D_SB_LUT4_O_I0_SB_LUT4_O_I0_SB_LUT4_O_1_I2[2] +.sym 10606 rx_09_fifo.rd_addr[4] +.sym 10607 rx_09_fifo.rd_addr_gray_SB_DFFESR_Q_4_D[2] +.sym 10611 io_pmod_SB_DFFSS_Q_D_SB_LUT4_O_I0_SB_LUT4_O_I0_SB_LUT4_O_2_I1[1] +.sym 10613 io_pmod[5]$SB_IO_IN +.sym 10614 io_pmod_SB_DFFSS_Q_D_SB_LUT4_O_I0_SB_LUT4_O_I0_SB_LUT4_O_1_I2[0] +.sym 10617 io_pmod_SB_DFFSS_Q_D_SB_LUT4_O_I0_SB_LUT4_O_1_I0[2] +.sym 10618 io_pmod_SB_DFFSS_Q_D_SB_LUT4_O_I0_SB_LUT4_O_1_I0[3] +.sym 10619 io_pmod_SB_DFFSS_Q_D_SB_LUT4_O_I0_SB_LUT4_O_1_I0[1] +.sym 10620 io_pmod_SB_DFFSS_Q_D_SB_LUT4_O_I0_SB_LUT4_O_1_I0[0] +.sym 10623 rx_09_fifo.rd_addr[4] +.sym 10624 rx_09_fifo.rd_addr_gray_SB_DFFESR_Q_4_D[0] +.sym 10630 rx_09_fifo.rd_addr[1] +.sym 10631 rx_09_fifo.rd_addr_gray_SB_DFFESR_Q_7_D[0] +.sym 10632 rx_09_fifo.rd_addr[0] +.sym 10634 w_clock_sys +.sym 10636 rx_09_fifo.rd_addr_gray_SB_DFFESR_Q_4_D[2] +.sym 10637 io_pmod_SB_DFFSS_Q_D_SB_LUT4_O_I0[3] +.sym 10638 rx_09_fifo.wr_addr_gray_rd[0] +.sym 10639 rx_09_fifo.wr_addr_gray_rd[4] +.sym 10640 rx_09_fifo.rd_addr_gray_SB_DFFESR_Q_7_D[0] +.sym 10641 io_pmod_SB_DFFSS_Q_D_SB_LUT4_O_I0_SB_LUT4_O_1_I0[2] +.sym 10642 rx_09_fifo.wr_addr_gray_rd[1] +.sym 10643 rx_09_fifo.rd_addr_gray_SB_DFFESR_Q_6_D[1] +.sym 10648 rx_09_fifo.rd_addr_gray_wr_r[6] +.sym 10651 io_pmod_SB_DFFSR_Q_D_SB_LUT4_O_I0_SB_LUT4_O_1_I2[1] +.sym 10652 io_pmod_SB_DFFSS_Q_D_SB_LUT4_O_I0_SB_LUT4_O_I0_SB_LUT4_O_1_I2[1] +.sym 10656 $PACKER_VCC_NET +.sym 10657 rx_09_fifo.rd_addr_gray_wr_r[6] +.sym 10659 rx_09_fifo.rd_addr_gray_wr_r[7] +.sym 10662 rx_09_fifo.wr_addr[7] +.sym 10666 rx_09_fifo.wr_addr_gray_SB_DFFESR_Q_4_D[2] +.sym 10669 lvds_rx_09_inst.r_state_if_SB_DFFESR_Q_E_SB_LUT4_O_I0_SB_LUT4_I0_O +.sym 10671 lvds_rx_09_inst.o_debug_state[0] +.sym 10693 rx_09_fifo.rd_addr[4] +.sym 10695 io_pmod_SB_DFFSS_Q_D_SB_LUT4_O_I0_SB_LUT4_O_I0_SB_LUT4_O_1_I2[3] +.sym 10698 rx_09_fifo.rd_addr[1] +.sym 10699 rx_09_fifo.rd_addr[0] +.sym 10701 rx_09_fifo.rd_addr[7] +.sym 10702 io_pmod_SB_DFFSS_Q_D_SB_LUT4_O_I0_SB_LUT4_O_1_I0[1] +.sym 10704 io_pmod_SB_DFFSS_Q_D_SB_LUT4_O_I0_SB_LUT4_O_1_I0[3] +.sym 10708 io_pmod_SB_DFFSS_Q_D_SB_LUT4_O_I0_SB_LUT4_O_I0_SB_LUT4_O_2_I1[1] +.sym 10709 $nextpnr_ICESTORM_LC_3$O +.sym 10712 rx_09_fifo.rd_addr[0] +.sym 10715 rx_09_fifo.rd_addr_gray_SB_LUT4_I2_I3[2] +.sym 10718 rx_09_fifo.rd_addr[1] +.sym 10719 rx_09_fifo.rd_addr[0] +.sym 10721 rx_09_fifo.rd_addr_gray_SB_LUT4_I2_I3[3] +.sym 10724 io_pmod_SB_DFFSS_Q_D_SB_LUT4_O_I0_SB_LUT4_O_I0_SB_LUT4_O_2_I1[1] +.sym 10725 rx_09_fifo.rd_addr_gray_SB_LUT4_I2_I3[2] +.sym 10727 rx_09_fifo.rd_addr_gray_SB_LUT4_I2_I3[4] +.sym 10729 io_pmod_SB_DFFSS_Q_D_SB_LUT4_O_I0_SB_LUT4_O_I0_SB_LUT4_O_1_I2[3] +.sym 10731 rx_09_fifo.rd_addr_gray_SB_LUT4_I2_I3[3] +.sym 10733 rx_09_fifo.rd_addr_gray_SB_LUT4_I2_I3[5] +.sym 10736 rx_09_fifo.rd_addr[4] +.sym 10737 rx_09_fifo.rd_addr_gray_SB_LUT4_I2_I3[4] +.sym 10739 rx_09_fifo.rd_addr_gray_SB_LUT4_I2_I3[6] +.sym 10741 io_pmod_SB_DFFSS_Q_D_SB_LUT4_O_I0_SB_LUT4_O_1_I0[1] +.sym 10743 rx_09_fifo.rd_addr_gray_SB_LUT4_I2_I3[5] +.sym 10745 rx_09_fifo.rd_addr_gray_SB_LUT4_I2_I3[7] +.sym 10748 io_pmod_SB_DFFSS_Q_D_SB_LUT4_O_I0_SB_LUT4_O_1_I0[3] +.sym 10749 rx_09_fifo.rd_addr_gray_SB_LUT4_I2_I3[6] +.sym 10754 rx_09_fifo.rd_addr[7] +.sym 10755 rx_09_fifo.rd_addr_gray_SB_LUT4_I2_I3[7] +.sym 10762 rx_09_fifo.wr_addr_gray[4] +.sym 10763 rx_09_fifo.wr_addr_gray[6] +.sym 10764 rx_09_fifo.rd_addr_gray_SB_DFFESR_Q_5_D[3] +.sym 10765 io_pmod_SB_DFFSS_Q_D_SB_LUT4_O_I0_SB_LUT4_O_I0[3] +.sym 10766 rx_09_fifo.wr_addr[7] +.sym 10772 io_pmod[4]$SB_IO_IN +.sym 10783 rx_09_fifo.wr_addr_gray_rd[5] +.sym 10786 io_pmod_SB_DFFSS_Q_D_SB_LUT4_O_I0[2] +.sym 10787 rx_09_fifo.rd_addr_gray_SB_DFFESR_Q_7_D[0] +.sym 10790 rx_09_fifo.wr_addr[7] +.sym 10800 rx_09_fifo.rd_addr_gray_SB_DFFESR_Q_4_D[2] +.sym 10801 rx_09_fifo.rd_addr_gray_SB_LUT4_I2_O[1] +.sym 10802 rx_09_fifo.rd_addr_gray_SB_LUT4_I2_O[2] +.sym 10803 rx_09_fifo.rd_addr_gray_SB_LUT4_I2_O[3] +.sym 10804 rx_09_fifo.rd_addr_gray[2] +.sym 10805 rx_09_fifo.rd_addr_gray_SB_LUT4_I2_O[5] +.sym 10806 rx_09_fifo.rd_addr_gray_SB_LUT4_I2_O[6] +.sym 10807 rx_09_fifo.rd_addr_gray_SB_DFFESR_Q_6_D[1] +.sym 10810 rx_09_fifo.rd_addr_gray_SB_DFFESR_Q_4_D[1] +.sym 10811 rx_09_fifo.rd_addr[0] +.sym 10812 rx_09_fifo.rd_addr_gray_SB_LUT4_I2_O[4] +.sym 10813 io_pmod_SB_DFFSS_Q_D_SB_LUT4_O_I0_SB_LUT4_O_1_I0[2] +.sym 10815 rx_09_fifo.rd_addr_gray_SB_DFFESR_Q_4_D[3] +.sym 10816 rx_09_fifo.rd_addr_gray_SB_DFFESR_Q_6_D[2] +.sym 10819 rx_09_fifo.rd_addr_gray_SB_DFFESR_Q_4_D[0] +.sym 10826 rx_09_fifo.rd_addr_gray_SB_DFFESR_Q_6_D[0] +.sym 10833 rx_09_fifo.rd_addr_gray_SB_LUT4_I2_O[6] +.sym 10834 rx_09_fifo.rd_addr_gray_SB_LUT4_I2_O[5] +.sym 10841 rx_09_fifo.rd_addr_gray_SB_LUT4_I2_O[1] +.sym 10842 rx_09_fifo.rd_addr[0] +.sym 10846 rx_09_fifo.rd_addr_gray_SB_LUT4_I2_O[4] +.sym 10848 rx_09_fifo.rd_addr_gray_SB_LUT4_I2_O[3] +.sym 10854 rx_09_fifo.rd_addr_gray[2] +.sym 10857 io_pmod_SB_DFFSS_Q_D_SB_LUT4_O_I0_SB_LUT4_O_1_I0[2] +.sym 10858 rx_09_fifo.rd_addr_gray_SB_DFFESR_Q_6_D[1] +.sym 10859 rx_09_fifo.rd_addr_gray_SB_DFFESR_Q_6_D[2] +.sym 10860 rx_09_fifo.rd_addr_gray_SB_DFFESR_Q_6_D[0] +.sym 10865 rx_09_fifo.rd_addr_gray_SB_LUT4_I2_O[3] +.sym 10866 rx_09_fifo.rd_addr_gray_SB_LUT4_I2_O[2] +.sym 10869 rx_09_fifo.rd_addr_gray_SB_DFFESR_Q_4_D[2] +.sym 10870 rx_09_fifo.rd_addr_gray_SB_DFFESR_Q_4_D[0] +.sym 10871 rx_09_fifo.rd_addr_gray_SB_DFFESR_Q_4_D[3] +.sym 10872 rx_09_fifo.rd_addr_gray_SB_DFFESR_Q_4_D[1] +.sym 10875 rx_09_fifo.rd_addr_gray_SB_LUT4_I2_O[5] +.sym 10877 rx_09_fifo.rd_addr_gray_SB_LUT4_I2_O[4] +.sym 10880 io_pmod[0]$SB_IO_IN_$glb_clk +.sym 10883 rx_09_fifo.wr_addr_gray_rd_r[6] +.sym 10884 rx_09_fifo.wr_addr_gray_rd[6] +.sym 10885 rx_09_fifo.wr_addr_gray_rd[7] +.sym 10886 lvds_rx_09_inst.r_state_if_SB_DFFESR_Q_E_SB_LUT4_O_I0_SB_LUT4_I0_O +.sym 10887 rx_09_fifo.wr_addr_gray_rd_r[7] +.sym 10894 rx_09_fifo.wr_addr_SB_DFFESR_Q_E +.sym 10895 io_pmod_SB_DFFSS_Q_D_SB_LUT4_O_I0_SB_LUT4_O_1_I0[3] +.sym 10897 rx_09_fifo.rd_addr[0] +.sym 10908 sys_ctrl_ins.reset_count_SB_DFFESR_Q_E +.sym 10911 rx_09_fifo.rd_addr_gray[4] +.sym 10915 io_pmod_SB_DFFSS_Q_D_SB_LUT4_O_I0[3] +.sym 10917 smi_ctrl_ins.int_cnt_09[3] +.sym 10928 rx_09_fifo.rd_addr_gray_SB_DFFESR_Q_5_D[3] +.sym 10929 rx_09_fifo.rd_addr_gray_SB_DFFESR_Q_7_D[3] +.sym 10930 io_pmod_SB_DFFSS_Q_D_SB_LUT4_O_I0_SB_LUT4_O_I0_SB_LUT4_O_1_I2[1] +.sym 10931 lvds_rx_09_inst.r_data[21] +.sym 10932 rx_09_fifo.rd_addr_gray_SB_DFFESR_Q_7_D[1] +.sym 10935 rx_09_fifo.rd_addr_gray_SB_DFFESR_Q_7_D[2] +.sym 10936 rx_09_fifo.rd_addr_gray_SB_DFFESR_Q_5_D[1] +.sym 10937 lvds_rx_09_inst.r_data[3] +.sym 10938 lvds_rx_09_inst.r_data[19] +.sym 10947 rx_09_fifo.rd_addr_gray_SB_DFFESR_Q_7_D[0] +.sym 10948 io_pmod[4]$SB_IO_IN +.sym 10956 rx_09_fifo.rd_addr_gray_SB_DFFESR_Q_7_D[3] +.sym 10957 rx_09_fifo.rd_addr_gray_SB_DFFESR_Q_7_D[2] +.sym 10958 rx_09_fifo.rd_addr_gray_SB_DFFESR_Q_7_D[1] +.sym 10959 rx_09_fifo.rd_addr_gray_SB_DFFESR_Q_7_D[0] +.sym 10964 lvds_rx_09_inst.r_data[3] +.sym 10968 io_pmod[4]$SB_IO_IN +.sym 10969 rx_09_fifo.rd_addr_gray_SB_DFFESR_Q_5_D[3] +.sym 10970 rx_09_fifo.rd_addr_gray_SB_DFFESR_Q_5_D[1] +.sym 10971 io_pmod_SB_DFFSS_Q_D_SB_LUT4_O_I0_SB_LUT4_O_I0_SB_LUT4_O_1_I2[1] +.sym 10986 lvds_rx_09_inst.r_data[21] +.sym 11001 lvds_rx_09_inst.r_data[19] +.sym 11002 lvds_rx_09_inst.r_push_SB_LUT4_I3_O_$glb_ce +.sym 11003 io_pmod[0]$SB_IO_IN_$glb_clk +.sym 11005 lvds_rx_09_inst.r_push_SB_LUT4_I3_O +.sym 11007 sys_ctrl_ins.o_soft_reset_SB_DFFESS_Q_E +.sym 11010 $io_pmod[5]$iobuf_i +.sym 11012 smi_ctrl_ins.r_fifo_09_pull +.sym 11018 io_pmod[5]$SB_IO_IN +.sym 11028 lvds_rx_09_inst.r_state_if_SB_DFFESR_Q_E_SB_LUT4_O_I0[0] +.sym 11031 spi_if_ins.o_cs_SB_LUT4_I3_O +.sym 11033 smi_ctrl_ins.o_data_out_SB_LUT4_I0_O[1] +.sym 11035 spi_if_ins.state_if_SB_DFFE_Q_E +.sym 11038 lvds_rx_09_inst.r_push_SB_LUT4_I3_O +.sym 11050 io_ctrl_ins.o_data_out_SB_DFFESR_Q_3_R[0] +.sym 11054 io_pmod[6]$SB_IO_IN +.sym 11057 smi_ctrl_ins.o_data_out_SB_DFFESS_Q_E +.sym 11074 io_pmod[5]$SB_IO_IN +.sym 11094 io_pmod[6]$SB_IO_IN +.sym 11123 io_pmod[5]$SB_IO_IN +.sym 11125 smi_ctrl_ins.o_data_out_SB_DFFESS_Q_E +.sym 11126 w_clock_sys +.sym 11127 io_ctrl_ins.o_data_out_SB_DFFESR_Q_3_R[0] .sym 11129 sys_ctrl_ins.o_soft_reset_SB_DFFESS_Q_E -.sym 11132 spi_if_ins.r_tx_data_valid_SB_DFFESR_Q_D[1] -.sym 11133 spi_if_ins.spi.r_tx_byte[2] -.sym 11134 spi_if_ins.o_fetch_cmd_SB_DFFESR_Q_E -.sym 11135 spi_if_ins.o_load_cmd_SB_DFFESR_Q_D_SB_LUT4_I2_O[2] -.sym 11153 spi_if_ins.o_load_cmd_SB_LUT4_I2_O[1] -.sym 11156 w_tx_data_smi[1] -.sym 11157 spi_if_ins.w_rx_data[6] -.sym 11158 spi_if_ins.o_load_cmd_SB_DFFESR_Q_D_SB_LUT4_I2_O_SB_LUT4_I3_O[2] -.sym 11162 spi_if_ins.w_rx_data[5] -.sym 11163 io_pmod[5]$SB_IO_IN -.sym 11171 sys_ctrl_ins.o_soft_reset_SB_DFFESS_Q_S -.sym 11174 spi_if_ins.state_if[1] -.sym 11176 sys_ctrl_ins.reset_count[1] -.sym 11179 sys_ctrl_ins.o_soft_reset_SB_DFFESS_Q_S -.sym 11182 sys_ctrl_ins.reset_count[0] -.sym 11185 spi_if_ins.state_if[0] -.sym 11187 sys_ctrl_ins.reset_count_SB_DFFESR_Q_E -.sym 11190 sys_ctrl_ins.reset_cmd -.sym 11195 sys_ctrl_ins.reset_count[2] -.sym 11196 sys_ctrl_ins.reset_count[3] -.sym 11198 sys_ctrl_ins.reset_cmd +.sym 11134 spi_if_ins.state_if[0] +.sym 11140 io_pmod[6]$SB_IO_IN +.sym 11142 w_soft_reset +.sym 11143 smi_ctrl_ins.o_data_out_SB_DFFESS_Q_E +.sym 11146 sys_ctrl_ins.o_soft_reset_SB_DFFESS_Q_S +.sym 11153 w_tx_data_smi[1] +.sym 11154 io_pmod[5]$SB_IO_IN +.sym 11171 sys_ctrl_ins.reset_count[2] +.sym 11172 sys_ctrl_ins.reset_count[3] +.sym 11173 sys_ctrl_ins.reset_count[1] +.sym 11174 sys_ctrl_ins.reset_count[0] +.sym 11180 sys_ctrl_ins.reset_count_SB_DFFESR_Q_E +.sym 11182 sys_ctrl_ins.reset_cmd +.sym 11184 sys_ctrl_ins.o_soft_reset_SB_DFFESS_Q_S .sym 11201 $nextpnr_ICESTORM_LC_7$O -.sym 11204 sys_ctrl_ins.reset_count[0] +.sym 11203 sys_ctrl_ins.reset_count[0] .sym 11207 sys_ctrl_ins.reset_count_SB_DFFESR_Q_D_SB_LUT4_O_I3[2] -.sym 11210 sys_ctrl_ins.reset_count[1] +.sym 11209 sys_ctrl_ins.reset_count[1] .sym 11213 sys_ctrl_ins.reset_count_SB_DFFESR_Q_D_SB_LUT4_O_I3[3] .sym 11214 sys_ctrl_ins.o_soft_reset_SB_DFFESS_Q_S -.sym 11215 sys_ctrl_ins.reset_count[2] +.sym 11216 sys_ctrl_ins.reset_count[2] .sym 11217 sys_ctrl_ins.reset_count_SB_DFFESR_Q_D_SB_LUT4_O_I3[2] -.sym 11221 sys_ctrl_ins.reset_count[3] -.sym 11222 sys_ctrl_ins.o_soft_reset_SB_DFFESS_Q_S +.sym 11220 sys_ctrl_ins.reset_count[3] +.sym 11221 sys_ctrl_ins.o_soft_reset_SB_DFFESS_Q_S .sym 11223 sys_ctrl_ins.reset_count_SB_DFFESR_Q_D_SB_LUT4_O_I3[3] -.sym 11227 sys_ctrl_ins.reset_cmd -.sym 11229 sys_ctrl_ins.o_soft_reset_SB_DFFESS_Q_S -.sym 11233 sys_ctrl_ins.reset_count[0] -.sym 11239 spi_if_ins.state_if[1] -.sym 11240 spi_if_ins.state_if[0] -.sym 11244 sys_ctrl_ins.reset_count[1] -.sym 11245 sys_ctrl_ins.reset_count[0] -.sym 11246 sys_ctrl_ins.o_soft_reset_SB_DFFESS_Q_S +.sym 11226 sys_ctrl_ins.o_soft_reset_SB_DFFESS_Q_S +.sym 11227 sys_ctrl_ins.reset_count[0] +.sym 11228 sys_ctrl_ins.reset_count[1] +.sym 11232 sys_ctrl_ins.reset_count[0] +.sym 11238 sys_ctrl_ins.reset_cmd +.sym 11240 sys_ctrl_ins.o_soft_reset_SB_DFFESS_Q_S +.sym 11244 sys_ctrl_ins.reset_count[0] +.sym 11245 sys_ctrl_ins.reset_count[2] +.sym 11246 sys_ctrl_ins.reset_count[3] +.sym 11247 sys_ctrl_ins.reset_count[1] .sym 11248 sys_ctrl_ins.reset_count_SB_DFFESR_Q_E .sym 11249 w_clock_sys .sym 11250 sys_ctrl_ins.reset_cmd -.sym 11252 spi_if_ins.o_load_cmd_SB_DFFESR_Q_D_SB_LUT4_I2_O_SB_LUT4_I3_O[2] -.sym 11253 w_fetch -.sym 11255 spi_if_ins.o_load_cmd_SB_DFFESR_Q_D_SB_LUT4_I2_O[3] -.sym 11256 spi_if_ins.o_cs_SB_DFFESR_Q_R[0] -.sym 11258 spi_if_ins.o_fetch_cmd_SB_LUT4_I3_O[2] -.sym 11262 spi_if_ins.o_load_cmd_SB_LUT4_I2_O_SB_LUT4_I3_O_SB_LUT4_I3_O -.sym 11263 spi_if_ins.r_tx_data_valid_SB_LUT4_I3_1_O[2] -.sym 11268 spi_if_ins.o_load_cmd_SB_DFFESR_Q_D_SB_LUT4_I2_O[1] -.sym 11269 spi_if_ins.state_if[0] -.sym 11270 spi_if_ins.r_tx_data_valid_SB_DFFESR_Q_E -.sym 11275 spi_if_ins.o_data_in_SB_DFFE_Q_E -.sym 11276 smi_ctrl_ins.o_data_out_SB_DFFESS_Q_E -.sym 11277 spi_if_ins.r_tx_byte[2] -.sym 11279 spi_if_ins.r_tx_data_valid_SB_DFFESR_Q_D[1] -.sym 11284 w_cs[0] -.sym 11285 w_cs[2] -.sym 11286 spi_if_ins.o_load_cmd_SB_DFFESR_Q_D_SB_LUT4_I2_O_SB_LUT4_I3_O[2] -.sym 11292 w_load -.sym 11293 spi_if_ins.o_load_cmd_SB_DFFESR_Q_D[1] -.sym 11294 sys_ctrl_ins.reset_count[2] -.sym 11295 sys_ctrl_ins.reset_count[3] -.sym 11299 sys_ctrl_ins.reset_count[1] -.sym 11300 w_cs[1] -.sym 11301 spi_if_ins.state_if[0] -.sym 11305 sys_ctrl_ins.reset_count[0] -.sym 11307 spi_if_ins.o_load_cmd_SB_DFFESR_Q_D_SB_LUT4_I2_O[0] -.sym 11310 spi_if_ins.o_load_cmd_SB_DFFESR_Q_D_SB_LUT4_I2_O_SB_LUT4_I3_O[2] -.sym 11313 spi_if_ins.state_if[1] -.sym 11314 sys_ctrl_ins.reset_cmd -.sym 11317 spi_if_ins.w_rx_data[6] -.sym 11318 w_fetch -.sym 11321 spi_if_ins.o_cs_SB_DFFESR_Q_R[0] -.sym 11322 spi_if_ins.w_rx_data[5] -.sym 11325 spi_if_ins.w_rx_data[6] -.sym 11328 spi_if_ins.w_rx_data[5] -.sym 11332 spi_if_ins.w_rx_data[6] -.sym 11333 spi_if_ins.w_rx_data[5] -.sym 11337 sys_ctrl_ins.reset_count[0] -.sym 11338 sys_ctrl_ins.reset_count[3] -.sym 11339 sys_ctrl_ins.reset_count[2] -.sym 11340 sys_ctrl_ins.reset_count[1] -.sym 11343 spi_if_ins.w_rx_data[5] -.sym 11346 spi_if_ins.w_rx_data[6] -.sym 11349 spi_if_ins.o_load_cmd_SB_DFFESR_Q_D_SB_LUT4_I2_O[0] -.sym 11350 spi_if_ins.o_load_cmd_SB_DFFESR_Q_D[1] -.sym 11351 spi_if_ins.state_if[0] -.sym 11352 spi_if_ins.state_if[1] -.sym 11362 w_cs[1] -.sym 11363 w_load -.sym 11364 w_fetch -.sym 11370 sys_ctrl_ins.reset_cmd -.sym 11371 spi_if_ins.o_load_cmd_SB_DFFESR_Q_D_SB_LUT4_I2_O_SB_LUT4_I3_O[2] +.sym 11252 spi_if_ins.state_if_SB_DFFE_Q_E +.sym 11253 spi_if_ins.state_if[1] +.sym 11254 spi_if_ins.state_if_SB_DFFE_Q_E +.sym 11255 spi_if_ins.o_load_cmd_SB_DFFESR_Q_D[0] +.sym 11256 spi_if_ins.state_if_SB_DFFESR_Q_D[0] +.sym 11270 sys_ctrl_ins.reset_cmd +.sym 11271 $PACKER_GND_NET +.sym 11275 w_soft_reset +.sym 11281 w_soft_reset +.sym 11282 smi_ctrl_ins.o_data_out_SB_DFFESS_Q_E_SB_LUT4_O_I3[0] +.sym 11285 spi_if_ins.o_cs_SB_DFFESR_Q_R[0] +.sym 11297 spi_if_ins.o_ioc_SB_DFFE_Q_E[0] +.sym 11303 spi_if_ins.o_cs_SB_LUT4_I3_O +.sym 11305 smi_ctrl_ins.o_data_out_SB_LUT4_I0_O[1] +.sym 11309 smi_ctrl_ins.o_data_out_SB_LUT4_I0_I1[2] +.sym 11310 w_tx_data_io[1] +.sym 11311 smi_ctrl_ins.o_data_out_SB_LUT4_I0_I1[1] +.sym 11313 w_tx_data_smi[1] +.sym 11314 smi_ctrl_ins.o_data_out_SB_LUT4_I0_O[2] +.sym 11317 smi_ctrl_ins.o_data_out_SB_LUT4_I0_I1[2] +.sym 11319 w_tx_data_io[2] +.sym 11325 w_tx_data_io[2] +.sym 11327 smi_ctrl_ins.o_data_out_SB_LUT4_I0_O[2] +.sym 11328 smi_ctrl_ins.o_data_out_SB_LUT4_I0_I1[2] +.sym 11343 spi_if_ins.o_ioc_SB_DFFE_Q_E[0] +.sym 11361 smi_ctrl_ins.o_data_out_SB_LUT4_I0_I1[2] +.sym 11362 w_tx_data_smi[1] +.sym 11363 w_tx_data_io[1] +.sym 11364 smi_ctrl_ins.o_data_out_SB_LUT4_I0_I1[1] +.sym 11371 spi_if_ins.o_cs_SB_LUT4_I3_O .sym 11372 w_clock_sys -.sym 11373 spi_if_ins.o_cs_SB_DFFESR_Q_R[0] -.sym 11374 spi_if_ins.r_tx_byte[7] -.sym 11375 spi_if_ins.o_cs_SB_LUT4_I3_1_O -.sym 11376 spi_if_ins.r_tx_byte[5] -.sym 11377 spi_if_ins.r_tx_data_valid_SB_DFFESR_Q_D_SB_LUT4_I3_O -.sym 11378 smi_ctrl_ins.o_data_out_SB_LUT4_I0_O[1] -.sym 11379 spi_if_ins.r_tx_byte[0] -.sym 11380 spi_if_ins.r_tx_byte[1] -.sym 11381 spi_if_ins.r_tx_byte[2] -.sym 11395 spi_if_ins.o_load_cmd_SB_DFFESR_Q_D_SB_LUT4_I2_O_SB_LUT4_I3_O[2] -.sym 11396 spi_if_ins.state_if_SB_DFFESR_Q_R -.sym 11398 w_fetch -.sym 11399 sys_ctrl_ins.o_soft_reset_SB_DFFESS_Q_S -.sym 11400 w_soft_reset -.sym 11407 spi_if_ins.o_load_cmd_SB_LUT4_I2_O[1] -.sym 11408 spi_if_ins.o_fetch_cmd_SB_LUT4_I3_O[2] -.sym 11409 spi_if_ins.o_cs_SB_LUT4_I3_1_O -.sym 11415 w_tx_data_io[2] -.sym 11416 w_tx_data_io[7] -.sym 11417 w_fetch -.sym 11418 w_cs[3] -.sym 11420 smi_ctrl_ins.o_data_out_SB_LUT4_I0_I1[1] -.sym 11423 w_cs[1] -.sym 11424 w_cs[2] -.sym 11426 w_tx_data_io[1] -.sym 11428 w_tx_data_smi[1] -.sym 11431 smi_ctrl_ins.o_data_out_SB_LUT4_I0_O[2] +.sym 11373 smi_ctrl_ins.o_data_out_SB_LUT4_I0_O[1] +.sym 11374 spi_if_ins.o_data_in_SB_DFFE_Q_E +.sym 11375 smi_ctrl_ins.o_data_out_SB_LUT4_I0_I1[2] +.sym 11376 spi_if_ins.o_ioc_SB_DFFE_Q_E[2] +.sym 11377 smi_ctrl_ins.o_data_out_SB_LUT4_I0_I1[1] +.sym 11378 w_fetch +.sym 11381 spi_if_ins.o_fetch_cmd_SB_DFFESR_Q_E +.sym 11386 r_tx_data[2] +.sym 11398 spi_if_ins.w_rx_data[0] +.sym 11400 smi_ctrl_ins.o_data_out_SB_LUT4_I0_O[2] +.sym 11405 w_tx_data_io[2] +.sym 11407 spi_if_ins.o_data_in_SB_DFFE_Q_E +.sym 11417 spi_if_ins.o_ioc_SB_DFFE_Q_E[1] +.sym 11419 w_tx_data_io[0] +.sym 11426 w_tx_data_smi[0] .sym 11432 smi_ctrl_ins.o_data_out_SB_LUT4_I0_I1[2] -.sym 11433 spi_if_ins.o_cs_SB_LUT4_I3_1_O -.sym 11435 smi_ctrl_ins.o_data_out_SB_LUT4_I0_O[1] -.sym 11440 w_tx_data_io[5] -.sym 11444 w_cs[0] -.sym 11448 w_cs[0] -.sym 11449 w_cs[1] -.sym 11450 w_cs[2] -.sym 11451 w_cs[3] -.sym 11454 w_cs[3] -.sym 11455 w_cs[0] -.sym 11456 w_cs[1] -.sym 11457 w_cs[2] -.sym 11460 w_tx_data_smi[1] -.sym 11461 smi_ctrl_ins.o_data_out_SB_LUT4_I0_I1[1] -.sym 11462 w_tx_data_io[1] -.sym 11463 smi_ctrl_ins.o_data_out_SB_LUT4_I0_I1[2] -.sym 11466 w_tx_data_io[7] -.sym 11468 smi_ctrl_ins.o_data_out_SB_LUT4_I0_I1[2] -.sym 11469 smi_ctrl_ins.o_data_out_SB_LUT4_I0_O[2] -.sym 11472 smi_ctrl_ins.o_data_out_SB_LUT4_I0_O[2] -.sym 11474 w_tx_data_io[5] -.sym 11475 smi_ctrl_ins.o_data_out_SB_LUT4_I0_I1[2] -.sym 11478 w_cs[1] -.sym 11479 w_cs[0] -.sym 11480 w_cs[3] -.sym 11481 w_cs[2] -.sym 11484 w_tx_data_io[2] -.sym 11486 smi_ctrl_ins.o_data_out_SB_LUT4_I0_O[2] -.sym 11487 smi_ctrl_ins.o_data_out_SB_LUT4_I0_I1[2] -.sym 11493 w_fetch -.sym 11494 spi_if_ins.o_cs_SB_LUT4_I3_1_O +.sym 11434 smi_ctrl_ins.o_data_out_SB_LUT4_I0_I1[1] +.sym 11443 spi_if_ins.o_cs_SB_LUT4_I3_O +.sym 11445 spi_if_ins.o_cs_SB_DFFESR_Q_R[0] +.sym 11463 spi_if_ins.o_cs_SB_DFFESR_Q_R[0] +.sym 11466 spi_if_ins.o_cs_SB_LUT4_I3_O +.sym 11490 smi_ctrl_ins.o_data_out_SB_LUT4_I0_I1[1] +.sym 11491 w_tx_data_smi[0] +.sym 11492 smi_ctrl_ins.o_data_out_SB_LUT4_I0_I1[2] +.sym 11493 w_tx_data_io[0] +.sym 11494 spi_if_ins.o_ioc_SB_DFFE_Q_E[1] .sym 11495 w_clock_sys -.sym 11496 smi_ctrl_ins.o_data_out_SB_LUT4_I0_O[1] -.sym 11497 smi_ctrl_ins.o_data_out_SB_DFFESS_Q_E -.sym 11499 smi_ctrl_ins.o_data_out_SB_DFFESS_Q_E_SB_LUT4_O_I3[1] -.sym 11500 r_tx_data[0] -.sym 11502 smi_ctrl_ins.o_data_out_SB_LUT4_I0_O[3] -.sym 11512 spi_if_ins.w_rx_data[5] -.sym 11513 smi_ctrl_ins.o_data_out_SB_LUT4_I0_I1[2] -.sym 11515 spi_if_ins.o_load_cmd_SB_DFFESR_Q_D[1] -.sym 11516 spi_if_ins.r_tx_byte[7] -.sym 11519 w_tx_data_io[2] -.sym 11521 o_led1$SB_IO_OUT -.sym 11526 io_ctrl_ins.led0_state_SB_LUT4_I3_O[1] -.sym 11529 spi_if_ins.o_fetch_cmd_SB_LUT4_I3_O_SB_LUT4_I3_O[0] -.sym 11550 io_ctrl_ins.led0_state_SB_LUT4_I3_O[1] -.sym 11551 io_ctrl_ins.o_data_out_SB_DFFESS_Q_S -.sym 11555 io_ctrl_ins.led1_state_SB_LUT4_I3_O[0] -.sym 11556 spi_if_ins.o_fetch_cmd_SB_LUT4_I3_O_SB_LUT4_I3_O[0] -.sym 11558 io_ctrl_ins.led1_state_SB_LUT4_I3_O[3] -.sym 11563 io_ctrl_ins.led1_state_SB_LUT4_I3_O[2] -.sym 11589 io_ctrl_ins.led0_state_SB_LUT4_I3_O[1] -.sym 11590 io_ctrl_ins.led1_state_SB_LUT4_I3_O[2] -.sym 11591 io_ctrl_ins.led1_state_SB_LUT4_I3_O[0] -.sym 11592 io_ctrl_ins.led1_state_SB_LUT4_I3_O[3] -.sym 11617 spi_if_ins.o_fetch_cmd_SB_LUT4_I3_O_SB_LUT4_I3_O[0] +.sym 11497 w_cs[2] +.sym 11498 w_cs[1] +.sym 11499 spi_if_ins.o_load_cmd_SB_LUT4_I2_O[1] +.sym 11500 w_cs[3] +.sym 11501 spi_if_ins.o_cs_SB_LUT4_I3_O +.sym 11502 smi_ctrl_ins.o_data_out_SB_LUT4_I0_O[1] +.sym 11503 spi_if_ins.o_fetch_cmd_SB_LUT4_I3_O[2] +.sym 11504 smi_ctrl_ins.o_data_out_SB_LUT4_I0_O[2] +.sym 11510 spi_if_ins.r_tx_data_valid_SB_LUT4_I3_1_O +.sym 11516 spi_if_ins.o_data_in_SB_DFFE_Q_E +.sym 11522 spi_if_ins.o_cs_SB_LUT4_I3_O +.sym 11524 smi_ctrl_ins.o_data_out_SB_LUT4_I0_O[1] +.sym 11540 w_cs[0] +.sym 11542 w_fetch +.sym 11545 w_ioc[1] +.sym 11547 w_soft_reset +.sym 11548 w_load +.sym 11549 spi_if_ins.o_cs_SB_LUT4_I3_O +.sym 11550 w_fetch +.sym 11552 smi_ctrl_ins.o_data_out_SB_DFFESS_Q_E_SB_LUT4_O_I3[0] +.sym 11553 smi_ctrl_ins.o_data_out_SB_LUT4_I0_O[3] +.sym 11554 w_cs[2] +.sym 11556 w_tx_data_sys[0] +.sym 11559 smi_ctrl_ins.o_data_out_SB_LUT4_I0_O[1] +.sym 11561 smi_ctrl_ins.o_data_out_SB_LUT4_I0_O[2] +.sym 11562 i_button_SB_LUT4_I3_O[1] +.sym 11566 smi_ctrl_ins.o_data_out_SB_DFFESS_Q_E_SB_LUT4_O_I3[1] +.sym 11571 w_cs[0] +.sym 11572 w_load +.sym 11573 w_fetch +.sym 11574 i_button_SB_LUT4_I3_O[1] +.sym 11583 w_tx_data_sys[0] +.sym 11584 smi_ctrl_ins.o_data_out_SB_LUT4_I0_O[1] +.sym 11585 smi_ctrl_ins.o_data_out_SB_LUT4_I0_O[3] +.sym 11586 smi_ctrl_ins.o_data_out_SB_LUT4_I0_O[2] +.sym 11589 smi_ctrl_ins.o_data_out_SB_DFFESS_Q_E_SB_LUT4_O_I3[0] +.sym 11591 smi_ctrl_ins.o_data_out_SB_DFFESS_Q_E_SB_LUT4_O_I3[1] +.sym 11595 w_soft_reset +.sym 11596 w_fetch +.sym 11597 w_cs[2] +.sym 11598 w_ioc[1] +.sym 11601 smi_ctrl_ins.o_data_out_SB_DFFESS_Q_E_SB_LUT4_O_I3[0] +.sym 11603 w_fetch +.sym 11604 w_cs[0] +.sym 11617 spi_if_ins.o_cs_SB_LUT4_I3_O .sym 11618 w_clock_sys -.sym 11619 io_ctrl_ins.o_data_out_SB_DFFESS_Q_S -.sym 11620 spi_if_ins.w_rx_data[0] -.sym 11622 spi_if_ins.o_fetch_cmd_SB_LUT4_I3_O_SB_LUT4_I3_O[0] -.sym 11624 spi_if_ins.w_rx_data[2] -.sym 11625 spi_if_ins.w_rx_data[4] -.sym 11626 smi_ctrl_ins.o_data_out_SB_DFFESS_Q_E_SB_LUT4_O_I3[0] -.sym 11627 io_ctrl_ins.tr_vc_2_state_SB_LUT4_I1_I3[3] -.sym 11644 io_ctrl_ins.led1_state_SB_LUT4_I3_O[3] -.sym 11645 spi_if_ins.o_load_cmd_SB_LUT4_I2_O[1] -.sym 11646 w_ioc[1] -.sym 11647 w_rx_data[2] -.sym 11648 w_tx_data_io[0] -.sym 11649 spi_if_ins.w_rx_data[6] -.sym 11650 spi_if_ins.o_load_cmd_SB_DFFESR_Q_D_SB_LUT4_I2_O_SB_LUT4_I3_O[2] -.sym 11651 w_rx_data[6] -.sym 11653 spi_if_ins.o_load_cmd_SB_DFFESR_Q_D_SB_LUT4_I2_O[1] -.sym 11655 spi_if_ins.o_load_cmd_SB_LUT4_I2_O_SB_LUT4_I2_O -.sym 11663 spi_if_ins.o_load_cmd_SB_DFFESR_Q_D_SB_LUT4_I2_O_SB_LUT4_I3_O[2] -.sym 11669 spi_if_ins.w_rx_data[3] -.sym 11681 spi_if_ins.o_load_cmd_SB_LUT4_I2_O_SB_LUT4_I3_O[1] -.sym 11682 spi_if_ins.w_rx_data[4] -.sym 11687 io_ctrl_ins.led0_state_SB_LUT4_I3_O[1] -.sym 11689 spi_if_ins.w_rx_data[2] -.sym 11690 spi_if_ins.o_load_cmd_SB_LUT4_I2_O_SB_LUT4_I3_O_SB_LUT4_I3_1_O -.sym 11702 spi_if_ins.w_rx_data[4] -.sym 11708 spi_if_ins.o_load_cmd_SB_LUT4_I2_O_SB_LUT4_I3_O_SB_LUT4_I3_1_O -.sym 11712 spi_if_ins.w_rx_data[3] -.sym 11719 spi_if_ins.w_rx_data[2] -.sym 11726 io_ctrl_ins.led0_state_SB_LUT4_I3_O[1] -.sym 11727 spi_if_ins.o_load_cmd_SB_LUT4_I2_O_SB_LUT4_I3_O[1] -.sym 11740 spi_if_ins.o_load_cmd_SB_DFFESR_Q_D_SB_LUT4_I2_O_SB_LUT4_I3_O[2] +.sym 11621 io_ctrl_ins.o_data_out_SB_DFFESR_Q_E +.sym 11623 w_tx_data_io[2] +.sym 11624 spi_if_ins.o_load_cmd_SB_LUT4_I2_O_SB_LUT4_I3_O[1] +.sym 11626 spi_if_ins.o_load_cmd_SB_LUT4_I2_O_SB_LUT4_I3_O_SB_LUT4_I3_1_O +.sym 11633 spi_if_ins.w_rx_data[6] +.sym 11635 spi_if_ins.w_rx_data[1] +.sym 11637 smi_ctrl_ins.o_data_out_SB_LUT4_I0_O[2] +.sym 11644 spi_if_ins.o_load_cmd_SB_LUT4_I2_O_SB_LUT4_I3_O_SB_LUT4_I3_O +.sym 11646 spi_if_ins.o_ioc_SB_DFFE_Q_E[1] +.sym 11647 io_ctrl_ins.tr_vc_2_state_SB_LUT4_I1_I3[1] +.sym 11648 w_ioc[0] +.sym 11650 io_ctrl_ins.led1_state_SB_DFFESR_Q_E +.sym 11661 spi_if_ins.w_rx_data[3] +.sym 11666 spi_if_ins.w_rx_data[1] +.sym 11668 io_ctrl_ins.tr_vc_2_state_SB_LUT4_I1_I3[1] +.sym 11670 spi_if_ins.w_rx_data[0] +.sym 11671 spi_if_ins.w_rx_data[4] +.sym 11672 spi_if_ins.o_ioc_SB_DFFE_Q_E[1] +.sym 11675 w_ioc[0] +.sym 11676 spi_if_ins.w_rx_data[2] +.sym 11692 smi_ctrl_ins.o_data_out_SB_DFFESS_Q_E_SB_LUT4_O_I3[0] +.sym 11694 smi_ctrl_ins.o_data_out_SB_DFFESS_Q_E_SB_LUT4_O_I3[0] +.sym 11695 io_ctrl_ins.tr_vc_2_state_SB_LUT4_I1_I3[1] +.sym 11697 w_ioc[0] +.sym 11709 spi_if_ins.w_rx_data[4] +.sym 11713 spi_if_ins.w_rx_data[2] +.sym 11725 spi_if_ins.w_rx_data[3] +.sym 11732 spi_if_ins.w_rx_data[0] +.sym 11736 spi_if_ins.w_rx_data[1] +.sym 11740 spi_if_ins.o_ioc_SB_DFFE_Q_E[1] .sym 11741 w_clock_sys -.sym 11743 io_ctrl_ins.o_data_out_SB_DFFESR_Q_E -.sym 11744 io_ctrl_ins.o_data_out_SB_DFFESR_Q_R -.sym 11745 io_ctrl_ins.led0_state_SB_LUT4_I3_O[1] -.sym 11746 w_ioc[0] -.sym 11747 spi_if_ins.o_load_cmd_SB_LUT4_I2_O_SB_LUT4_I3_O[1] -.sym 11749 io_ctrl_ins.led1_state_SB_LUT4_I3_O[3] -.sym 11750 w_ioc[1] -.sym 11755 spi_if_ins.spi.r_rx_byte[4] -.sym 11756 w_tx_data_io[5] -.sym 11757 spi_if_ins.o_load_cmd_SB_LUT4_I2_O_SB_LUT4_I3_O_SB_LUT4_I3_1_O -.sym 11760 io_ctrl_ins.tr_vc_2_state_SB_LUT4_I1_I3[3] -.sym 11762 spi_if_ins.o_data_in_SB_DFFE_Q_E -.sym 11764 io_ctrl_ins.o_data_out_SB_DFFESS_Q_S -.sym 11765 spi_if_ins.w_rx_data[3] -.sym 11766 spi_if_ins.o_fetch_cmd_SB_LUT4_I3_O_SB_LUT4_I3_O[0] -.sym 11767 w_rx_data[0] -.sym 11768 spi_if_ins.spi.r_rx_byte[2] -.sym 11770 io_ctrl_ins.debug_mode[1] -.sym 11773 w_rx_data[2] -.sym 11774 spi_if_ins.o_data_in_SB_DFFE_Q_E -.sym 11777 io_ctrl_ins.tr_vc_2_state_SB_LUT4_I1_I3[3] -.sym 11784 spi_if_ins.w_rx_data[0] -.sym 11791 io_ctrl_ins.tr_vc_2_state_SB_LUT4_I1_I3[3] -.sym 11795 spi_if_ins.o_data_in_SB_DFFE_Q_E -.sym 11796 spi_if_ins.w_rx_data[2] -.sym 11798 spi_if_ins.w_rx_data[5] -.sym 11809 spi_if_ins.w_rx_data[6] -.sym 11811 w_ioc[0] -.sym 11813 spi_if_ins.o_load_cmd_SB_DFFESR_Q_D_SB_LUT4_I2_O[1] -.sym 11826 spi_if_ins.w_rx_data[6] -.sym 11831 w_ioc[0] -.sym 11832 io_ctrl_ins.tr_vc_2_state_SB_LUT4_I1_I3[3] -.sym 11835 spi_if_ins.w_rx_data[5] -.sym 11843 spi_if_ins.w_rx_data[0] -.sym 11855 spi_if_ins.o_load_cmd_SB_DFFESR_Q_D_SB_LUT4_I2_O[1] -.sym 11859 spi_if_ins.w_rx_data[2] -.sym 11863 spi_if_ins.o_data_in_SB_DFFE_Q_E +.sym 11743 io_ctrl_ins.tr_vc_1_b_state_SB_LUT4_I1_O[2] +.sym 11744 io_ctrl_ins.led0_state_SB_LUT4_I3_O[1] +.sym 11745 o_led1$SB_IO_OUT +.sym 11746 io_ctrl_ins.o_data_out_SB_DFFESR_Q_D_SB_LUT4_O_I2[2] +.sym 11747 io_ctrl_ins.o_data_out_SB_DFFESR_Q_D_SB_LUT4_O_I2[3] +.sym 11748 o_led0$SB_IO_OUT +.sym 11749 spi_if_ins.o_load_cmd_SB_LUT4_I2_O_SB_LUT4_I3_O_SB_LUT4_I3_O +.sym 11750 smi_ctrl_ins.o_data_out_SB_DFFESS_Q_E_SB_LUT4_O_I3[0] +.sym 11751 spi_if_ins.w_rx_data[3] +.sym 11755 io_ctrl_ins.o_data_out_SB_DFFESS_Q_E[2] +.sym 11767 w_soft_reset +.sym 11769 w_soft_reset +.sym 11770 spi_if_ins.w_rx_data[2] +.sym 11772 spi_if_ins.w_rx_data[5] +.sym 11773 io_ctrl_ins.tr_vc_2_state_SB_LUT4_I1_I3[1] +.sym 11774 smi_ctrl_ins.o_data_out_SB_DFFESS_Q_E_SB_LUT4_O_I3[0] +.sym 11775 spi_if_ins.o_load_cmd_SB_LUT4_I2_O_SB_LUT4_I3_O_SB_LUT4_I3_1_O +.sym 11776 w_rx_data[1] +.sym 11777 io_ctrl_ins.led0_state_SB_LUT4_I3_O[0] +.sym 11778 io_ctrl_ins.led0_state_SB_LUT4_I3_O[1] +.sym 11785 w_rx_data[1] +.sym 11786 spi_if_ins.o_load_cmd_SB_LUT4_I2_O_SB_LUT4_I3_O_SB_LUT4_I3_1_O +.sym 11787 w_ioc[2] +.sym 11790 w_ioc[0] +.sym 11794 w_ioc[4] +.sym 11795 w_rx_data[0] +.sym 11796 w_rx_data[2] +.sym 11797 w_ioc[3] +.sym 11799 w_ioc[1] +.sym 11803 w_rx_data[3] +.sym 11806 spi_if_ins.o_load_cmd_SB_LUT4_I2_O_SB_LUT4_I3_O_SB_LUT4_I3_O +.sym 11815 io_ctrl_ins.tr_vc_2_state_SB_LUT4_I1_I3[1] +.sym 11820 w_rx_data[3] +.sym 11826 w_rx_data[0] +.sym 11830 w_rx_data[1] +.sym 11836 spi_if_ins.o_load_cmd_SB_LUT4_I2_O_SB_LUT4_I3_O_SB_LUT4_I3_O +.sym 11841 io_ctrl_ins.tr_vc_2_state_SB_LUT4_I1_I3[1] +.sym 11843 w_ioc[0] +.sym 11856 w_rx_data[2] +.sym 11859 w_ioc[2] +.sym 11860 w_ioc[3] +.sym 11861 w_ioc[4] +.sym 11862 w_ioc[1] +.sym 11863 spi_if_ins.o_load_cmd_SB_LUT4_I2_O_SB_LUT4_I3_O_SB_LUT4_I3_1_O .sym 11864 w_clock_sys -.sym 11871 spi_if_ins.o_load_cmd_SB_LUT4_I2_O_SB_LUT4_I2_O -.sym 11872 io_ctrl_ins.o_data_out_SB_DFFESR_Q_D_SB_LUT4_O_I2[1] -.sym 11873 w_rx_data[1] -.sym 11880 io_ctrl_ins.o_pmod[3] -.sym 11884 i_button_SB_LUT4_I3_O[1] -.sym 11887 io_ctrl_ins.o_data_out_SB_DFFESR_Q_R -.sym 11888 w_rx_data[0] -.sym 11895 w_rx_data[0] -.sym 11896 io_ctrl_ins.rx_h_b_state_SB_LUT4_I0_I2[3] -.sym 11897 w_soft_reset -.sym 11900 spi_if_ins.o_load_cmd_SB_LUT4_I2_O[1] -.sym 11909 i_button_SB_LUT4_I3_O[1] -.sym 11910 w_ioc[0] -.sym 11911 io_ctrl_ins.o_pmod[2] -.sym 11912 io_ctrl_ins.o_data_out_SB_DFFESR_Q_D_SB_LUT4_O_I2[0] -.sym 11915 io_ctrl_ins.pmod_dir_state[2] -.sym 11917 io_ctrl_ins.led0_state_SB_LUT4_I3_O[1] -.sym 11918 io_ctrl_ins.o_pmod[6] -.sym 11919 spi_if_ins.o_load_cmd_SB_LUT4_I2_O_SB_LUT4_I3_O[1] -.sym 11920 io_ctrl_ins.o_pmod[1] -.sym 11926 io_ctrl_ins.pmod_dir_state[6] -.sym 11927 io_ctrl_ins.o_data_out_SB_DFFESR_Q_R -.sym 11929 io_ctrl_ins.o_data_out_SB_DFFESR_Q_D_SB_LUT4_O_I2[1] -.sym 11934 io_ctrl_ins.o_data_out_SB_DFFESR_Q_E -.sym 11937 io_ctrl_ins.tr_vc_2_state_SB_LUT4_I1_I3[3] -.sym 11938 o_shdn_rx_lna$SB_IO_OUT -.sym 11952 io_ctrl_ins.o_pmod[1] -.sym 11953 w_ioc[0] -.sym 11954 o_shdn_rx_lna$SB_IO_OUT -.sym 11955 io_ctrl_ins.tr_vc_2_state_SB_LUT4_I1_I3[3] -.sym 11964 io_ctrl_ins.o_data_out_SB_DFFESR_Q_D_SB_LUT4_O_I2[1] -.sym 11965 io_ctrl_ins.o_data_out_SB_DFFESR_Q_D_SB_LUT4_O_I2[0] -.sym 11970 io_ctrl_ins.led0_state_SB_LUT4_I3_O[1] -.sym 11971 i_button_SB_LUT4_I3_O[1] -.sym 11972 io_ctrl_ins.pmod_dir_state[2] -.sym 11973 io_ctrl_ins.o_pmod[2] -.sym 11977 spi_if_ins.o_load_cmd_SB_LUT4_I2_O_SB_LUT4_I3_O[1] -.sym 11978 i_button_SB_LUT4_I3_O[1] -.sym 11982 io_ctrl_ins.pmod_dir_state[6] -.sym 11983 i_button_SB_LUT4_I3_O[1] -.sym 11984 io_ctrl_ins.led0_state_SB_LUT4_I3_O[1] -.sym 11985 io_ctrl_ins.o_pmod[6] -.sym 11986 io_ctrl_ins.o_data_out_SB_DFFESR_Q_E +.sym 11866 w_rx_data[7] +.sym 11867 io_ctrl_ins.led1_state_SB_DFFESR_Q_E +.sym 11868 io_ctrl_ins.o_data_out_SB_DFFESS_Q_S +.sym 11869 w_rx_data[3] +.sym 11870 w_rx_data[4] +.sym 11871 w_rx_data[5] +.sym 11872 io_ctrl_ins.o_data_out_SB_DFFESR_Q_3_R[1] +.sym 11873 w_rx_data[6] +.sym 11887 w_ioc[0] +.sym 11888 i_button_SB_LUT4_I3_O[1] +.sym 11889 io_ctrl_ins.o_data_out_SB_DFFESR_Q_3_E +.sym 11890 spi_if_ins.w_rx_data[0] +.sym 11891 io_ctrl_ins.led1_state_SB_LUT4_I3_O[0] +.sym 11896 o_led0$SB_IO_OUT +.sym 11897 o_shdn_rx_lna$SB_IO_OUT +.sym 11900 spi_if_ins.o_data_in_SB_DFFE_Q_E +.sym 11908 spi_if_ins.w_rx_data[0] +.sym 11918 spi_if_ins.o_data_in_SB_DFFE_Q_E +.sym 11921 spi_if_ins.w_rx_data[1] +.sym 11930 spi_if_ins.w_rx_data[2] +.sym 11953 spi_if_ins.w_rx_data[1] +.sym 11960 spi_if_ins.w_rx_data[0] +.sym 11967 spi_if_ins.w_rx_data[2] +.sym 11986 spi_if_ins.o_data_in_SB_DFFE_Q_E .sym 11987 w_clock_sys -.sym 11988 io_ctrl_ins.o_data_out_SB_DFFESR_Q_R -.sym 11989 io_ctrl_ins.led1_state_SB_DFFESR_Q_E -.sym 11990 io_ctrl_ins.debug_mode[1] -.sym 11996 o_shdn_rx_lna$SB_IO_OUT -.sym 12011 io_ctrl_ins.pmod_dir_state[4] -.sym 12013 o_led1$SB_IO_OUT -.sym 12020 io_ctrl_ins.o_data_out_SB_DFFESR_Q_E -.sym 12023 w_rx_data[1] -.sym 12034 w_rx_data[7] -.sym 12039 w_rx_data[0] -.sym 12040 w_rx_data[4] -.sym 12044 w_rx_data[5] -.sym 12057 spi_if_ins.o_load_cmd_SB_LUT4_I2_O_SB_LUT4_I3_O_SB_LUT4_I3_O -.sym 12065 w_rx_data[0] -.sym 12069 w_rx_data[5] -.sym 12096 w_rx_data[7] -.sym 12102 w_rx_data[4] -.sym 12109 spi_if_ins.o_load_cmd_SB_LUT4_I2_O_SB_LUT4_I3_O_SB_LUT4_I3_O +.sym 11989 io_ctrl_ins.led0_state_SB_LUT4_I3_O[3] +.sym 11990 io_ctrl_ins.debug_mode[0] +.sym 11991 io_ctrl_ins.led1_state_SB_LUT4_I3_O[3] +.sym 11992 io_ctrl_ins.debug_mode_SB_LUT4_I2_O[0] +.sym 11993 io_ctrl_ins.debug_mode[1] +.sym 11994 io_ctrl_ins.debug_mode_SB_LUT4_I2_O[1] +.sym 11995 io_ctrl_ins.tr_vc_2_state_SB_LUT4_I1_O[3] +.sym 11996 spi_if_ins.o_load_cmd_SB_LUT4_I2_O_SB_LUT4_I2_O +.sym 12001 spi_if_ins.w_rx_data[6] +.sym 12002 spi_if_ins.w_rx_data[3] +.sym 12009 w_ioc[1] +.sym 12012 io_ctrl_ins.o_data_out_SB_DFFESS_Q_S +.sym 12017 w_tx_data_io[3] +.sym 12031 w_ioc[0] +.sym 12034 io_ctrl_ins.led1_state_SB_LUT4_I3_O[2] +.sym 12037 io_ctrl_ins.tr_vc_2_state_SB_LUT4_I1_O[2] +.sym 12038 io_ctrl_ins.pmod_dir_state[3] +.sym 12041 io_ctrl_ins.o_data_out_SB_DFFESS_Q_E[2] +.sym 12042 io_ctrl_ins.led0_state_SB_LUT4_I3_O[2] +.sym 12045 io_ctrl_ins.tr_vc_2_state_SB_LUT4_I1_I3[1] +.sym 12046 io_ctrl_ins.led0_state_SB_LUT4_I3_O[3] +.sym 12048 io_ctrl_ins.led0_state_SB_LUT4_I3_O[1] +.sym 12049 io_ctrl_ins.led0_state_SB_LUT4_I3_O[0] +.sym 12050 io_ctrl_ins.o_data_out_SB_DFFESS_Q_S +.sym 12051 io_ctrl_ins.led1_state_SB_LUT4_I3_O[0] +.sym 12052 io_ctrl_ins.tr_vc_2_state_SB_LUT4_I1_O[3] +.sym 12056 io_ctrl_ins.led1_state_SB_LUT4_I3_O[3] +.sym 12057 o_shdn_rx_lna$SB_IO_OUT +.sym 12060 io_ctrl_ins.o_pmod[1] +.sym 12081 io_ctrl_ins.led1_state_SB_LUT4_I3_O[3] +.sym 12082 io_ctrl_ins.led0_state_SB_LUT4_I3_O[1] +.sym 12083 io_ctrl_ins.led1_state_SB_LUT4_I3_O[0] +.sym 12084 io_ctrl_ins.led1_state_SB_LUT4_I3_O[2] +.sym 12087 io_ctrl_ins.tr_vc_2_state_SB_LUT4_I1_I3[1] +.sym 12088 w_ioc[0] +.sym 12089 o_shdn_rx_lna$SB_IO_OUT +.sym 12090 io_ctrl_ins.o_pmod[1] +.sym 12093 io_ctrl_ins.led0_state_SB_LUT4_I3_O[0] +.sym 12094 io_ctrl_ins.led0_state_SB_LUT4_I3_O[3] +.sym 12095 io_ctrl_ins.led0_state_SB_LUT4_I3_O[2] +.sym 12096 io_ctrl_ins.led0_state_SB_LUT4_I3_O[1] +.sym 12099 io_ctrl_ins.led0_state_SB_LUT4_I3_O[1] +.sym 12100 io_ctrl_ins.pmod_dir_state[3] +.sym 12101 io_ctrl_ins.tr_vc_2_state_SB_LUT4_I1_O[3] +.sym 12102 io_ctrl_ins.tr_vc_2_state_SB_LUT4_I1_O[2] +.sym 12109 io_ctrl_ins.o_data_out_SB_DFFESS_Q_E[2] .sym 12110 w_clock_sys -.sym 12114 o_led0$SB_IO_OUT -.sym 12118 o_led1$SB_IO_OUT -.sym 12124 io_ctrl_ins.o_pmod[0] -.sym 12126 i_button_SB_LUT4_I3_O[0] -.sym 12128 w_rx_data[3] -.sym 12130 io_ctrl_ins.rx_h_state_SB_DFFE_Q_E -.sym 12143 spi_if_ins.o_load_cmd_SB_LUT4_I2_O_SB_LUT4_I2_O -.sym 12262 io_ctrl_ins.led1_state_SB_DFFESR_Q_E -.sym 12309 lvds_rx_09_inst.r_phase_count_SB_LUT4_O_I3_SB_DFFNESR_Q_E_SB_LUT4_O_I2_SB_LUT4_I1_O +.sym 12111 io_ctrl_ins.o_data_out_SB_DFFESS_Q_S +.sym 12114 io_ctrl_ins.debug_mode_SB_LUT4_I0_O +.sym 12115 spi_if_ins.o_load_cmd_SB_LUT4_I2_O_SB_LUT4_I2_O +.sym 12116 io_ctrl_ins.debug_mode_SB_LUT4_I2_O[2] +.sym 12129 w_ioc[0] +.sym 12146 spi_if_ins.o_load_cmd_SB_LUT4_I2_O_SB_LUT4_I2_O +.sym 12265 w_soft_reset +.sym 12309 lvds_rx_09_inst.r_state_if_SB_DFFESR_Q_E_SB_LUT4_O_I0_SB_LUT4_I0_O .sym 12310 io_smi_data[0]$SB_IO_OUT .sym 12313 io_smi_data[7]$SB_IO_OUT -.sym 12319 io_smi_data[0]$SB_IO_OUT -.sym 12320 lvds_rx_09_inst.r_phase_count_SB_LUT4_O_I3_SB_DFFNESR_Q_E_SB_LUT4_O_I2_SB_LUT4_I1_O -.sym 12331 io_smi_data[7]$SB_IO_OUT -.sym 12335 io_pmod_SB_DFFSR_Q_D_SB_LUT4_O_I2_SB_LUT4_O_1_I0_SB_LUT4_O_3_I3[3] -.sym 12336 rx_09_fifo.rd_addr_gray_wr[1] -.sym 12337 io_pmod_SB_DFFSR_Q_D_SB_LUT4_O_I2_SB_LUT4_O_1_I0_SB_LUT4_O_1_I0[0] -.sym 12339 io_pmod_SB_DFFSR_Q_D_SB_LUT4_O_I2[1] -.sym 12340 io_pmod_SB_DFFSR_Q_D_SB_LUT4_O_I2_SB_LUT4_O_1_I0[2] -.sym 12341 io_pmod_SB_DFFSR_Q_D_SB_LUT4_O_I2_SB_LUT4_O_1_I0[1] -.sym 12342 io_smi_data[3]$SB_IO_OUT -.sym 12402 rx_09_fifo.rd_addr_gray_wr[1] -.sym 12407 rx_09_fifo.rd_addr_gray_wr[4] -.sym 12411 rx_09_fifo.rd_addr_gray_wr[4] -.sym 12436 rx_09_fifo.rd_addr_gray_wr[1] -.sym 12457 io_pmod[0]$SB_IO_IN_$glb_clk -.sym 12463 rx_09_fifo.wr_addr[6] -.sym 12464 rx_09_fifo.wr_addr[2] -.sym 12465 rx_09_fifo.wr_addr_gray[2] -.sym 12466 io_pmod_SB_DFFSR_Q_D_SB_LUT4_O_I2_SB_LUT4_O_1_I0_SB_LUT4_O_2_I0[3] -.sym 12467 rx_09_fifo.wr_addr[4] -.sym 12468 rx_09_fifo.wr_addr_SB_DFFESR_Q_E -.sym 12469 rx_09_fifo.wr_addr[3] -.sym 12470 io_pmod_SB_DFFSR_Q_D_SB_LUT4_O_I2_SB_LUT4_O_1_I0[3] -.sym 12471 io_pmod_SB_DFFSR_Q_D_SB_LUT4_O_I2_SB_LUT4_O_1_I0_SB_LUT4_O_2_I0[1] -.sym 12475 rx_09_fifo.rd_addr_gray_wr_r[4] -.sym 12476 w_smi_data_output[3] -.sym 12480 io_smi_data[5]$SB_IO_OUT -.sym 12494 rx_09_fifo.wr_addr[2] -.sym 12497 rx_09_fifo.rd_addr_gray_wr_r[7] -.sym 12503 rx_09_fifo.wr_addr_SB_DFFESR_Q_E -.sym 12505 rx_09_fifo.wr_addr[3] +.sym 12320 lvds_rx_09_inst.r_state_if_SB_DFFESR_Q_E_SB_LUT4_O_I0_SB_LUT4_I0_O +.sym 12326 io_smi_data[7]$SB_IO_OUT +.sym 12330 io_smi_data[0]$SB_IO_OUT +.sym 12335 rx_09_fifo.wr_addr[5] +.sym 12336 rx_09_fifo.wr_addr[2] +.sym 12337 rx_09_fifo.wr_addr[3] +.sym 12338 rx_09_fifo.wr_addr[4] +.sym 12339 rx_09_fifo.wr_addr[6] +.sym 12340 rx_09_fifo.wr_addr_gray[3] +.sym 12389 i_smi_a3$SB_IO_IN +.sym 12398 w_smi_data_output[3] +.sym 12406 rx_09_fifo.wr_addr_gray[3] +.sym 12416 i_smi_a3$SB_IO_IN +.sym 12418 w_smi_data_output[3] +.sym 12422 rx_09_fifo.wr_addr_gray[3] +.sym 12457 w_clock_sys +.sym 12463 rx_09_fifo.wr_addr_gray_SB_DFFESR_Q_4_D[1] +.sym 12464 rx_09_fifo.wr_addr_gray_SB_DFFESR_Q_4_D[2] +.sym 12465 rx_09_fifo.wr_addr_gray_SB_DFFESR_Q_7_D[1] +.sym 12466 io_pmod_SB_DFFSR_Q_D_SB_LUT4_O_I0_SB_LUT4_O_2_I1_SB_LUT4_O_I2[2] +.sym 12467 io_pmod_SB_DFFSR_Q_D_SB_LUT4_O_I0_SB_LUT4_O_2_I1[1] +.sym 12468 io_pmod_SB_DFFSR_Q_D_SB_LUT4_O_I0_SB_LUT4_O_I2_SB_LUT4_O_I1_SB_LUT4_O_I3[1] +.sym 12469 io_pmod_SB_DFFSR_Q_D_SB_LUT4_O_I0_SB_LUT4_O_I2[1] +.sym 12470 rx_09_fifo.wr_addr_gray_SB_DFFESR_Q_5_D_SB_LUT4_I2_O[1] +.sym 12483 rx_09_fifo.wr_addr_gray_SB_LUT4_I2_O[7] +.sym 12486 rx_09_fifo.wr_addr[3] +.sym 12489 smi_ctrl_ins.soe_and_reset +.sym 12490 rx_09_fifo.wr_addr_SB_DFFESR_Q_E +.sym 12495 rx_09_fifo.wr_addr[5] +.sym 12499 rx_09_fifo.wr_addr[2] +.sym 12504 rx_09_fifo.wr_addr[6] .sym 12508 i_smi_a3$SB_IO_IN -.sym 12509 rx_09_fifo.wr_addr[6] -.sym 12514 rx_09_fifo.rd_addr_gray[1] -.sym 12516 io_pmod_SB_DFFSR_Q_D_SB_LUT4_O_I2_SB_LUT4_O_1_I0_SB_LUT4_O_2_I0[3] -.sym 12517 rx_09_fifo.rd_addr_gray_wr_r[2] -.sym 12522 io_pmod_SB_DFFSR_Q_D_SB_LUT4_O_I2_SB_LUT4_O_1_I0_SB_LUT4_O_3_I3[0] -.sym 12545 io_pmod_SB_DFFSR_Q_D_SB_LUT4_O_I2_SB_LUT4_O_1_I0_SB_LUT4_O_1_I0[3] -.sym 12554 io_pmod_SB_DFFSR_Q_D_SB_LUT4_O_I2_SB_LUT4_O_1_I0_SB_LUT4_O_I2[6] -.sym 12555 rx_09_fifo.rd_addr_gray_wr_r[7] -.sym 12557 rx_09_fifo.wr_addr[2] -.sym 12559 io_pmod_SB_DFFSR_Q_D_SB_LUT4_O_I2_SB_LUT4_O_1_I0_SB_LUT4_O_2_I0[3] -.sym 12560 rx_09_fifo.wr_addr[4] -.sym 12564 rx_09_fifo.wr_addr[6] -.sym 12567 rx_09_fifo.rd_addr_gray_wr_r[6] -.sym 12568 rx_09_fifo.wr_addr[7] -.sym 12569 rx_09_fifo.wr_addr[5] -.sym 12570 rx_09_fifo.wr_addr[3] +.sym 12513 rx_09_fifo.wr_addr[5] +.sym 12515 rx_09_fifo.wr_addr[2] +.sym 12540 rx_09_fifo.wr_addr[5] +.sym 12542 rx_09_fifo.wr_addr[3] +.sym 12543 rx_09_fifo.wr_addr[4] +.sym 12549 rx_09_fifo.wr_addr[2] +.sym 12550 rx_09_fifo.wr_addr_gray_rd[3] +.sym 12551 rx_09_fifo.wr_addr[7] +.sym 12552 rx_09_fifo.wr_addr[6] +.sym 12569 io_pmod_SB_DFFSR_Q_D_SB_LUT4_O_I0_SB_LUT4_O_I2_SB_LUT4_O_I1_SB_LUT4_O_I3[1] .sym 12572 $nextpnr_ICESTORM_LC_0$O -.sym 12574 io_pmod_SB_DFFSR_Q_D_SB_LUT4_O_I2_SB_LUT4_O_1_I0_SB_LUT4_O_2_I0[3] -.sym 12578 io_pmod_SB_DFFSR_Q_D_SB_LUT4_O_I2_SB_LUT4_O_1_I0_SB_LUT4_O_I2_SB_LUT4_O_I3[2] -.sym 12581 rx_09_fifo.wr_addr[2] -.sym 12584 io_pmod_SB_DFFSR_Q_D_SB_LUT4_O_I2_SB_LUT4_O_1_I0_SB_LUT4_O_I2_SB_LUT4_O_I3[3] -.sym 12586 rx_09_fifo.wr_addr[3] -.sym 12588 io_pmod_SB_DFFSR_Q_D_SB_LUT4_O_I2_SB_LUT4_O_1_I0_SB_LUT4_O_I2_SB_LUT4_O_I3[2] -.sym 12590 io_pmod_SB_DFFSR_Q_D_SB_LUT4_O_I2_SB_LUT4_O_1_I0_SB_LUT4_O_I2_SB_LUT4_O_I3[4] -.sym 12592 rx_09_fifo.wr_addr[4] -.sym 12594 io_pmod_SB_DFFSR_Q_D_SB_LUT4_O_I2_SB_LUT4_O_1_I0_SB_LUT4_O_I2_SB_LUT4_O_I3[3] -.sym 12596 io_pmod_SB_DFFSR_Q_D_SB_LUT4_O_I2_SB_LUT4_O_1_I0_SB_LUT4_O_I2_SB_LUT4_O_I3[5] +.sym 12575 io_pmod_SB_DFFSR_Q_D_SB_LUT4_O_I0_SB_LUT4_O_I2_SB_LUT4_O_I1_SB_LUT4_O_I3[1] +.sym 12578 io_pmod_SB_DFFSR_Q_D_SB_LUT4_O_I0_SB_LUT4_O_I2_SB_LUT4_O_I1_SB_LUT4_O_I3[2] +.sym 12580 rx_09_fifo.wr_addr[2] +.sym 12582 io_pmod_SB_DFFSR_Q_D_SB_LUT4_O_I0_SB_LUT4_O_I2_SB_LUT4_O_I1_SB_LUT4_O_I3[1] +.sym 12584 io_pmod_SB_DFFSR_Q_D_SB_LUT4_O_I0_SB_LUT4_O_I2_SB_LUT4_O_I1_SB_LUT4_O_I3[3] +.sym 12587 rx_09_fifo.wr_addr[3] +.sym 12588 io_pmod_SB_DFFSR_Q_D_SB_LUT4_O_I0_SB_LUT4_O_I2_SB_LUT4_O_I1_SB_LUT4_O_I3[2] +.sym 12590 io_pmod_SB_DFFSR_Q_D_SB_LUT4_O_I0_SB_LUT4_O_I2_SB_LUT4_O_I1_SB_LUT4_O_I3[4] +.sym 12593 rx_09_fifo.wr_addr[4] +.sym 12594 io_pmod_SB_DFFSR_Q_D_SB_LUT4_O_I0_SB_LUT4_O_I2_SB_LUT4_O_I1_SB_LUT4_O_I3[3] +.sym 12596 io_pmod_SB_DFFSR_Q_D_SB_LUT4_O_I0_SB_LUT4_O_I2_SB_LUT4_O_I1_SB_LUT4_O_I3[5] .sym 12599 rx_09_fifo.wr_addr[5] -.sym 12600 io_pmod_SB_DFFSR_Q_D_SB_LUT4_O_I2_SB_LUT4_O_1_I0_SB_LUT4_O_I2_SB_LUT4_O_I3[4] -.sym 12602 io_pmod_SB_DFFSR_Q_D_SB_LUT4_O_I2_SB_LUT4_O_1_I0_SB_LUT4_O_I2_SB_LUT4_O_I3[6] +.sym 12600 io_pmod_SB_DFFSR_Q_D_SB_LUT4_O_I0_SB_LUT4_O_I2_SB_LUT4_O_I1_SB_LUT4_O_I3[4] +.sym 12602 io_pmod_SB_DFFSR_Q_D_SB_LUT4_O_I0_SB_LUT4_O_I2_SB_LUT4_O_I1_SB_LUT4_O_I3[6] .sym 12605 rx_09_fifo.wr_addr[6] -.sym 12606 io_pmod_SB_DFFSR_Q_D_SB_LUT4_O_I2_SB_LUT4_O_1_I0_SB_LUT4_O_I2_SB_LUT4_O_I3[5] -.sym 12610 rx_09_fifo.wr_addr[7] -.sym 12612 io_pmod_SB_DFFSR_Q_D_SB_LUT4_O_I2_SB_LUT4_O_1_I0_SB_LUT4_O_I2_SB_LUT4_O_I3[6] -.sym 12615 io_pmod_SB_DFFSR_Q_D_SB_LUT4_O_I2_SB_LUT4_O_1_I0_SB_LUT4_O_1_I0[3] -.sym 12616 rx_09_fifo.rd_addr_gray_wr_r[6] -.sym 12617 io_pmod_SB_DFFSR_Q_D_SB_LUT4_O_I2_SB_LUT4_O_1_I0_SB_LUT4_O_I2[6] -.sym 12618 rx_09_fifo.rd_addr_gray_wr_r[7] -.sym 12622 rx_09_fifo.wr_addr_gray_SB_DFFESR_Q_7_D[3] -.sym 12623 rx_09_fifo.wr_addr[0] -.sym 12624 rx_09_fifo.wr_addr_gray[0] -.sym 12626 rx_09_fifo.wr_addr[7] -.sym 12627 rx_09_fifo.wr_addr[5] -.sym 12628 rx_09_fifo.wr_addr_gray[5] -.sym 12629 rx_09_fifo.wr_addr_gray[3] -.sym 12632 w_tx_data_smi[0] -.sym 12633 spi_if_ins.o_fetch_cmd_SB_DFFESR_Q_E -.sym 12647 lvds_rx_09_inst.r_state_if_SB_DFFNESR_Q_E_SB_LUT4_O_I2[1] -.sym 12648 io_pmod_SB_DFFSR_Q_D_SB_LUT4_O_I2_SB_LUT4_O_1_I0_SB_LUT4_O_2_I0[3] -.sym 12649 rx_09_fifo.wr_addr[5] -.sym 12650 rx_09_fifo.wr_addr[4] -.sym 12654 rx_09_fifo.wr_addr[3] -.sym 12657 rx_09_fifo.wr_addr[0] -.sym 12666 rx_09_fifo.wr_addr_gray_rd[6] -.sym 12670 w_smi_data_output[7] -.sym 12673 rx_09_fifo.wr_addr_gray[2] -.sym 12677 w_smi_data_output[4] -.sym 12694 i_smi_a3$SB_IO_IN -.sym 12710 i_smi_a3$SB_IO_IN -.sym 12711 w_smi_data_output[7] -.sym 12716 rx_09_fifo.wr_addr_gray[2] -.sym 12726 rx_09_fifo.wr_addr_gray_rd[6] -.sym 12732 i_smi_a3$SB_IO_IN -.sym 12733 w_smi_data_output[4] -.sym 12743 w_clock_sys -.sym 12745 rx_09_fifo.wr_addr_gray_rd[5] -.sym 12746 rx_09_fifo.wr_addr_gray_rd[3] -.sym 12747 rx_09_fifo.wr_addr_gray_rd[0] -.sym 12752 rx_09_fifo.wr_addr_gray_rd[7] -.sym 12764 rx_09_fifo.wr_addr_gray_SB_DFFESR_Q_4_D[1] +.sym 12606 io_pmod_SB_DFFSR_Q_D_SB_LUT4_O_I0_SB_LUT4_O_I2_SB_LUT4_O_I1_SB_LUT4_O_I3[5] +.sym 12609 rx_09_fifo.wr_addr[7] +.sym 12612 io_pmod_SB_DFFSR_Q_D_SB_LUT4_O_I0_SB_LUT4_O_I2_SB_LUT4_O_I1_SB_LUT4_O_I3[6] +.sym 12617 rx_09_fifo.wr_addr_gray_rd[3] +.sym 12620 w_clock_sys +.sym 12622 rx_09_fifo.wr_addr_gray[1] +.sym 12623 rx_09_fifo.wr_addr_gray[0] +.sym 12624 io_pmod_SB_DFFSR_Q_D_SB_LUT4_O_I0[2] +.sym 12625 io_pmod_SB_DFFSR_Q_D_SB_LUT4_O_I0_SB_LUT4_O_1_I2[2] +.sym 12627 io_pmod_SB_DFFSR_Q_D_SB_LUT4_O_I0_SB_LUT4_O_I2_SB_LUT4_O_1_I2[2] +.sym 12628 io_pmod_SB_DFFSR_Q_D_SB_LUT4_O_I0_SB_LUT4_O_2_I1[0] +.sym 12629 io_pmod_SB_DFFSR_Q_D_SB_LUT4_O_I0_SB_LUT4_O_I2[0] +.sym 12639 rx_09_fifo.wr_addr[7] +.sym 12643 rx_09_fifo.wr_addr_gray_SB_DFFESR_Q_4_D[2] +.sym 12649 smi_ctrl_ins.soe_and_reset +.sym 12652 io_pmod_SB_DFFSR_Q_D_SB_LUT4_O_I0_SB_LUT4_O_I2_SB_LUT4_O_I1_SB_LUT4_O_I3[1] +.sym 12654 rx_09_fifo.rd_addr_gray[5] +.sym 12655 rx_09_fifo.wr_addr_SB_DFFESR_Q_E +.sym 12656 rx_09_fifo.wr_addr_gray_SB_DFFESR_Q_5_D_SB_LUT4_I2_O[1] +.sym 12657 lvds_rx_09_inst.r_state_if_SB_DFFESR_Q_E_SB_LUT4_O_I2_SB_LUT4_I1_O[0] +.sym 12664 rx_09_fifo.rd_addr_gray_wr[1] +.sym 12668 rx_09_fifo.rd_addr_gray[4] +.sym 12670 rx_09_fifo.rd_addr_gray_wr[4] +.sym 12673 rx_09_fifo.rd_addr_gray_wr_r[6] +.sym 12675 rx_09_fifo.rd_addr_gray_wr[7] +.sym 12676 io_pmod_SB_DFFSR_Q_D_SB_LUT4_O_I0_SB_LUT4_O_I2_SB_LUT4_O_I1[5] +.sym 12677 io_pmod_SB_DFFSR_Q_D_SB_LUT4_O_I0_SB_LUT4_O_I2_SB_LUT4_O_I1[6] +.sym 12681 rx_09_fifo.rd_addr_gray_wr_r[7] +.sym 12687 rx_09_fifo.rd_addr[7] +.sym 12689 rx_09_fifo.rd_addr_gray[1] +.sym 12697 rx_09_fifo.rd_addr_gray_wr[4] +.sym 12704 rx_09_fifo.rd_addr_gray[1] +.sym 12709 rx_09_fifo.rd_addr_gray_wr[7] +.sym 12716 rx_09_fifo.rd_addr_gray_wr[1] +.sym 12723 rx_09_fifo.rd_addr[7] +.sym 12732 rx_09_fifo.rd_addr_gray_wr_r[7] +.sym 12733 io_pmod_SB_DFFSR_Q_D_SB_LUT4_O_I0_SB_LUT4_O_I2_SB_LUT4_O_I1[6] +.sym 12734 io_pmod_SB_DFFSR_Q_D_SB_LUT4_O_I0_SB_LUT4_O_I2_SB_LUT4_O_I1[5] +.sym 12735 rx_09_fifo.rd_addr_gray_wr_r[6] +.sym 12738 rx_09_fifo.rd_addr_gray[4] +.sym 12743 io_pmod[0]$SB_IO_IN_$glb_clk +.sym 12746 rx_09_fifo.rd_addr_gray_wr_r[5] +.sym 12747 rx_09_fifo.rd_addr_gray_wr_r[0] +.sym 12749 rx_09_fifo.rd_addr_gray_wr[5] +.sym 12750 rx_09_fifo.rd_addr_gray_wr[0] +.sym 12760 io_pmod[3]$SB_IO_IN +.sym 12764 rx_09_fifo.wr_addr_gray_rd[2] .sym 12765 io_pmod[3]$SB_IO_IN -.sym 12768 io_pmod[3]$SB_IO_IN -.sym 12772 w_soft_reset -.sym 12773 lvds_rx_09_inst.r_state_if_SB_DFFNESR_Q_E_SB_LUT4_O_I2[1] -.sym 12775 rx_09_fifo.rd_addr_gray_wr_r[7] -.sym 12776 rx_09_fifo.wr_addr_SB_DFFESR_Q_E -.sym 12777 rx_09_fifo.rd_addr_gray_wr_r[2] -.sym 12789 rx_09_fifo.rd_addr[7] -.sym 12792 rx_09_fifo.rd_addr_gray_wr[7] -.sym 12800 rx_09_fifo.rd_addr_gray_wr[3] -.sym 12808 rx_09_fifo.rd_addr_gray[2] -.sym 12811 rx_09_fifo.rd_addr_gray_wr[2] -.sym 12819 rx_09_fifo.rd_addr_gray_wr[2] -.sym 12828 rx_09_fifo.rd_addr_gray[2] -.sym 12832 rx_09_fifo.rd_addr_gray_wr[3] -.sym 12856 rx_09_fifo.rd_addr[7] -.sym 12862 rx_09_fifo.rd_addr_gray_wr[7] -.sym 12866 io_pmod[0]$SB_IO_IN_$glb_clk -.sym 12868 lvds_rx_09_inst.r_state_if_SB_DFFNESR_Q_E_SB_LUT4_O_I2[1] -.sym 12869 io_pmod_SB_DFFSS_Q_D_SB_LUT4_O_I0_SB_LUT4_O_I0_SB_LUT4_O_3_I2[1] -.sym 12870 rx_09_fifo.rd_addr_gray_SB_DFFESR_Q_6_D[2] -.sym 12871 rx_09_fifo.rd_addr_gray_SB_DFFESR_Q_6_D[1] -.sym 12872 rx_09_fifo.wr_addr_gray_rd_r[4] -.sym 12880 io_pmod[4]$SB_IO_IN -.sym 12885 io_pmod[4]$SB_IO_IN -.sym 12892 rx_09_fifo.rd_addr_gray[1] -.sym 12894 rx_09_fifo.rd_addr_gray[2] -.sym 12896 io_ctrl_ins.o_data_out_SB_DFFESR_Q_3_R[0] -.sym 12897 w_cs[0] -.sym 12901 lvds_rx_09_inst.r_state_if_SB_DFFNESR_Q_E_SB_LUT4_O_I2[1] -.sym 12910 rx_09_fifo.wr_addr_gray_rd[3] -.sym 12911 rx_09_fifo.wr_addr_gray_rd[0] -.sym 12912 rx_09_fifo.rd_addr[7] -.sym 12918 io_pmod_SB_DFFSS_Q_D_SB_LUT4_O_I0_SB_LUT4_O_I0_SB_LUT4_O_3_I2[2] -.sym 12919 io_pmod_SB_DFFSS_Q_D_SB_LUT4_O_I0_SB_LUT4_O_I0_SB_LUT4_O_3_I2[0] -.sym 12923 rx_09_fifo.wr_addr_gray_rd[2] -.sym 12926 io_pmod_SB_DFFSS_Q_D_SB_LUT4_O_I0_SB_LUT4_O_I0_SB_LUT4_O_3_I2[1] -.sym 12928 rx_09_fifo.rd_addr_gray_SB_DFFESR_Q_6_D[1] -.sym 12929 rx_09_fifo.wr_addr_gray_rd_r[4] -.sym 12934 io_pmod_SB_DFFSS_Q_D_SB_LUT4_O_I0_SB_LUT4_O_I0_SB_LUT4_O_3_I2[1] -.sym 12936 io_pmod_SB_DFFSS_Q_D_SB_LUT4_O_I0_SB_LUT4_O_I0_SB_LUT4_O_3_I2[3] -.sym 12937 rx_09_fifo.rd_addr[4] -.sym 12939 rx_09_fifo.rd_addr[5] -.sym 12942 io_pmod_SB_DFFSS_Q_D_SB_LUT4_O_I0_SB_LUT4_O_I0_SB_LUT4_O_3_I2[3] -.sym 12943 rx_09_fifo.rd_addr[7] -.sym 12944 io_pmod_SB_DFFSS_Q_D_SB_LUT4_O_I0_SB_LUT4_O_I0_SB_LUT4_O_3_I2[1] -.sym 12945 io_pmod_SB_DFFSS_Q_D_SB_LUT4_O_I0_SB_LUT4_O_I0_SB_LUT4_O_3_I2[0] -.sym 12948 rx_09_fifo.rd_addr[5] -.sym 12950 rx_09_fifo.rd_addr_gray_SB_DFFESR_Q_6_D[1] -.sym 12962 rx_09_fifo.wr_addr_gray_rd[3] -.sym 12966 rx_09_fifo.wr_addr_gray_rd[0] -.sym 12972 rx_09_fifo.wr_addr_gray_rd[2] -.sym 12978 rx_09_fifo.wr_addr_gray_rd_r[4] -.sym 12979 rx_09_fifo.rd_addr[4] -.sym 12981 rx_09_fifo.rd_addr[5] -.sym 12984 io_pmod_SB_DFFSS_Q_D_SB_LUT4_O_I0_SB_LUT4_O_I0_SB_LUT4_O_3_I2[1] -.sym 12985 io_pmod_SB_DFFSS_Q_D_SB_LUT4_O_I0_SB_LUT4_O_I0_SB_LUT4_O_3_I2[3] -.sym 12986 io_pmod_SB_DFFSS_Q_D_SB_LUT4_O_I0_SB_LUT4_O_I0_SB_LUT4_O_3_I2[0] -.sym 12987 io_pmod_SB_DFFSS_Q_D_SB_LUT4_O_I0_SB_LUT4_O_I0_SB_LUT4_O_3_I2[2] -.sym 12989 w_clock_sys -.sym 12991 rx_09_fifo.rd_addr_gray[0] -.sym 12992 rx_09_fifo.rd_addr_gray_SB_DFFESR_Q_6_D_SB_LUT4_I0_O[2] -.sym 12993 rx_09_fifo.rd_addr_SB_DFFESR_Q_E -.sym 12995 rx_09_fifo.rd_addr_gray[5] -.sym 12997 rx_09_fifo.rd_addr_gray[1] -.sym 12998 rx_09_fifo.rd_addr_gray[2] +.sym 12766 rx_09_fifo.wr_addr_gray_rd[5] +.sym 12770 rx_09_fifo.rd_addr_gray_wr_r[3] +.sym 12788 rx_09_fifo.wr_addr_gray_rd[0] +.sym 12789 rx_09_fifo.wr_addr_gray_rd[4] +.sym 12792 io_pmod_SB_DFFSS_Q_D_SB_LUT4_O_I0_SB_LUT4_O_I0[3] +.sym 12794 rx_09_fifo.wr_addr_gray[1] +.sym 12795 rx_09_fifo.wr_addr_gray[0] +.sym 12797 rx_09_fifo.wr_addr_gray[4] +.sym 12806 rx_09_fifo.wr_addr_gray_rd[5] +.sym 12808 rx_09_fifo.wr_addr_gray_rd[1] +.sym 12812 io_pmod_SB_DFFSS_Q_D_SB_LUT4_O_I0_SB_LUT4_O_I0[2] +.sym 12814 io_pmod_SB_DFFSS_Q_D_SB_LUT4_O_I0_SB_LUT4_O_I0[1] +.sym 12817 io_pmod_SB_DFFSS_Q_D_SB_LUT4_O_I0_SB_LUT4_O_I0[0] +.sym 12820 rx_09_fifo.wr_addr_gray_rd[4] +.sym 12825 io_pmod_SB_DFFSS_Q_D_SB_LUT4_O_I0_SB_LUT4_O_I0[2] +.sym 12826 io_pmod_SB_DFFSS_Q_D_SB_LUT4_O_I0_SB_LUT4_O_I0[3] +.sym 12827 io_pmod_SB_DFFSS_Q_D_SB_LUT4_O_I0_SB_LUT4_O_I0[1] +.sym 12828 io_pmod_SB_DFFSS_Q_D_SB_LUT4_O_I0_SB_LUT4_O_I0[0] +.sym 12831 rx_09_fifo.wr_addr_gray[0] +.sym 12838 rx_09_fifo.wr_addr_gray[4] +.sym 12845 rx_09_fifo.wr_addr_gray_rd[0] +.sym 12852 rx_09_fifo.wr_addr_gray_rd[5] +.sym 12858 rx_09_fifo.wr_addr_gray[1] +.sym 12862 rx_09_fifo.wr_addr_gray_rd[1] +.sym 12866 w_clock_sys +.sym 12869 lvds_rx_09_inst.r_cnt[1] +.sym 12870 lvds_rx_09_inst.r_cnt[2] +.sym 12871 lvds_rx_09_inst.r_cnt[3] +.sym 12872 rx_09_fifo.wr_addr_SB_DFFESR_Q_E +.sym 12875 lvds_rx_09_inst.r_cnt[0] +.sym 12884 io_pmod_SB_DFFSS_Q_D_SB_LUT4_O_I0[3] +.sym 12886 io_pmod[4]$SB_IO_IN +.sym 12895 w_soft_reset +.sym 12910 rx_09_fifo.wr_addr_gray_rd_r[6] +.sym 12914 rx_09_fifo.wr_addr_gray_rd_r[7] +.sym 12917 rx_09_fifo.wr_addr_gray_SB_LUT4_I2_O[7] +.sym 12918 rx_09_fifo.wr_addr_gray_rd_r[6] +.sym 12919 rx_09_fifo.wr_addr_gray_SB_DFFESR_Q_4_D[2] +.sym 12921 io_pmod_SB_DFFSS_Q_D_SB_LUT4_O_I0_SB_LUT4_O_1_I0[3] +.sym 12922 rx_09_fifo.wr_addr_gray_rd_r[7] +.sym 12927 rx_09_fifo.wr_addr_SB_DFFESR_Q_E +.sym 12928 rx_09_fifo.wr_addr_gray_SB_DFFESR_Q_5_D_SB_LUT4_I2_O[1] +.sym 12931 rx_09_fifo.rd_addr_gray_SB_LUT4_I2_O[6] +.sym 12933 rx_09_fifo.rd_addr[7] +.sym 12940 rx_09_fifo.rd_addr_gray_SB_LUT4_I2_O[7] +.sym 12962 rx_09_fifo.wr_addr_gray_SB_DFFESR_Q_4_D[2] +.sym 12969 rx_09_fifo.wr_addr_gray_SB_DFFESR_Q_5_D_SB_LUT4_I2_O[1] +.sym 12972 rx_09_fifo.wr_addr_gray_rd_r[7] +.sym 12973 rx_09_fifo.rd_addr_gray_SB_LUT4_I2_O[7] +.sym 12974 rx_09_fifo.wr_addr_gray_rd_r[6] +.sym 12975 rx_09_fifo.rd_addr_gray_SB_LUT4_I2_O[6] +.sym 12978 rx_09_fifo.wr_addr_gray_rd_r[6] +.sym 12979 rx_09_fifo.rd_addr[7] +.sym 12980 rx_09_fifo.wr_addr_gray_rd_r[7] +.sym 12981 io_pmod_SB_DFFSS_Q_D_SB_LUT4_O_I0_SB_LUT4_O_1_I0[3] +.sym 12984 rx_09_fifo.wr_addr_gray_SB_LUT4_I2_O[7] +.sym 12988 rx_09_fifo.wr_addr_SB_DFFESR_Q_E +.sym 12989 io_pmod[0]$SB_IO_IN_$glb_clk +.sym 12990 w_soft_reset_$glb_sr +.sym 12991 lvds_rx_09_inst.r_state_if_SB_DFFESR_Q_E_SB_LUT4_O_I2[0] +.sym 12992 lvds_rx_09_inst.r_push_SB_DFFESR_Q_E +.sym 12993 lvds_rx_09_inst.r_state_if_SB_DFFESR_Q_E +.sym 12994 lvds_rx_09_inst.r_state_if_SB_DFFESR_Q_E_SB_LUT4_O_I0[2] +.sym 12995 lvds_rx_09_inst.r_state_if_SB_DFFESR_Q_E_SB_LUT4_O_I2_SB_LUT4_I0_O +.sym 12996 lvds_rx_09_inst.r_state_if_SB_DFFESR_Q_E_SB_LUT4_O_I2_SB_LUT4_I1_O[0] +.sym 12998 lvds_rx_09_inst.r_push .sym 13004 io_pmod[3]$SB_IO_IN .sym 13009 io_pmod[3]$SB_IO_IN -.sym 13012 i_smi_a2_SB_LUT4_I0_O -.sym 13014 rx_09_fifo.rd_addr_gray_SB_DFFESR_Q_6_D[2] -.sym 13015 spi_if_ins.o_load_cmd_SB_DFFESR_Q_D_SB_LUT4_I2_O[0] -.sym 13016 spi_if_ins.o_load_cmd_SB_DFFESR_Q_D[1] -.sym 13020 spi_if_ins.o_load_cmd_SB_DFFESR_Q_D_SB_LUT4_I2_O_SB_LUT4_I3_O[1] -.sym 13023 w_cs[0] -.sym 13033 io_pmod_SB_DFFSS_Q_D_SB_LUT4_O_I0_SB_LUT4_O_I0_SB_LUT4_O_3_I2[1] -.sym 13034 spi_if_ins.o_load_cmd_SB_DFFESR_Q_D_SB_LUT4_I2_O_SB_LUT4_I3_O[2] -.sym 13035 rx_09_fifo.rd_addr_gray_SB_DFFESR_Q_5_D[2] -.sym 13041 rx_09_fifo.rd_addr_gray_SB_DFFESR_Q_6_D_SB_LUT4_I0_O[0] -.sym 13043 rx_09_fifo.rd_addr_gray_SB_DFFESR_Q_5_D[3] -.sym 13044 rx_09_fifo.wr_addr_gray_rd_r[4] -.sym 13045 rx_09_fifo.rd_addr_gray_SB_DFFESR_Q_5_D[0] -.sym 13047 io_pmod_SB_DFFSS_Q_D_SB_LUT4_O_I0_SB_LUT4_O_I0_SB_LUT4_O_3_I2[0] -.sym 13049 rx_09_fifo.rd_addr_gray_SB_DFFESR_Q_6_D_SB_LUT4_I0_O[2] -.sym 13051 rx_09_fifo.rd_addr_gray_SB_LUT4_I2_O[3] -.sym 13052 rx_09_fifo.rd_addr_gray_SB_LUT4_I2_O[4] -.sym 13053 rx_09_fifo.rd_addr_gray_SB_DFFESR_Q_5_D[1] -.sym 13054 rx_09_fifo.rd_addr_gray_SB_LUT4_I2_O[6] -.sym 13055 rx_09_fifo.rd_addr_gray_SB_LUT4_I2_O[7] -.sym 13056 io_pmod[4]$SB_IO_IN -.sym 13057 rx_09_fifo.rd_addr_gray_SB_LUT4_I2_O[1] -.sym 13058 rx_09_fifo.rd_addr_gray_SB_LUT4_I2_O[2] -.sym 13060 rx_09_fifo.rd_addr_gray_SB_DFFESR_Q_6_D_SB_LUT4_I0_O[3] -.sym 13061 rx_09_fifo.rd_addr_gray_SB_LUT4_I2_O[5] -.sym 13062 spi_if_ins.o_cs_SB_DFFESR_Q_R[0] -.sym 13063 rx_09_fifo.rd_addr_gray_SB_DFFESR_Q_6_D_SB_LUT4_I0_O[1] -.sym 13066 spi_if_ins.o_cs_SB_DFFESR_Q_R[0] -.sym 13071 rx_09_fifo.wr_addr_gray_rd_r[4] -.sym 13072 rx_09_fifo.rd_addr_gray_SB_LUT4_I2_O[5] -.sym 13073 io_pmod[4]$SB_IO_IN -.sym 13074 rx_09_fifo.rd_addr_gray_SB_LUT4_I2_O[4] -.sym 13077 rx_09_fifo.rd_addr_gray_SB_DFFESR_Q_6_D_SB_LUT4_I0_O[0] -.sym 13078 rx_09_fifo.rd_addr_gray_SB_DFFESR_Q_6_D_SB_LUT4_I0_O[3] -.sym 13079 rx_09_fifo.rd_addr_gray_SB_DFFESR_Q_6_D_SB_LUT4_I0_O[1] -.sym 13080 rx_09_fifo.rd_addr_gray_SB_DFFESR_Q_6_D_SB_LUT4_I0_O[2] -.sym 13085 rx_09_fifo.rd_addr_gray_SB_LUT4_I2_O[2] -.sym 13086 rx_09_fifo.rd_addr_gray_SB_LUT4_I2_O[1] -.sym 13089 rx_09_fifo.rd_addr_gray_SB_DFFESR_Q_5_D[0] -.sym 13090 rx_09_fifo.rd_addr_gray_SB_DFFESR_Q_5_D[1] -.sym 13091 rx_09_fifo.rd_addr_gray_SB_DFFESR_Q_5_D[3] -.sym 13092 rx_09_fifo.rd_addr_gray_SB_DFFESR_Q_5_D[2] -.sym 13095 rx_09_fifo.rd_addr_gray_SB_LUT4_I2_O[2] -.sym 13097 rx_09_fifo.rd_addr_gray_SB_LUT4_I2_O[3] -.sym 13101 rx_09_fifo.rd_addr_gray_SB_LUT4_I2_O[6] -.sym 13103 rx_09_fifo.rd_addr_gray_SB_LUT4_I2_O[5] -.sym 13107 io_pmod_SB_DFFSS_Q_D_SB_LUT4_O_I0_SB_LUT4_O_I0_SB_LUT4_O_3_I2[1] -.sym 13108 rx_09_fifo.rd_addr_gray_SB_LUT4_I2_O[6] -.sym 13109 rx_09_fifo.rd_addr_gray_SB_LUT4_I2_O[7] -.sym 13110 io_pmod_SB_DFFSS_Q_D_SB_LUT4_O_I0_SB_LUT4_O_I0_SB_LUT4_O_3_I2[0] -.sym 13111 spi_if_ins.o_load_cmd_SB_DFFESR_Q_D_SB_LUT4_I2_O_SB_LUT4_I3_O[2] +.sym 13018 smi_ctrl_ins.r_fifo_09_pull +.sym 13023 smi_ctrl_ins.int_cnt_09[4] +.sym 13035 rx_09_fifo.wr_addr_gray_rd[7] +.sym 13036 rx_09_fifo.wr_addr_gray[6] +.sym 13039 rx_09_fifo.wr_addr[7] +.sym 13044 lvds_rx_09_inst.r_state_if_SB_DFFESR_Q_E_SB_LUT4_O_I0[0] +.sym 13051 lvds_rx_09_inst.r_state_if_SB_DFFESR_Q_E_SB_LUT4_O_I0[1] +.sym 13057 w_soft_reset +.sym 13058 rx_09_fifo.wr_addr_gray_rd[6] +.sym 13059 lvds_rx_09_inst.r_state_if_SB_DFFESR_Q_E_SB_LUT4_O_I0[2] +.sym 13071 rx_09_fifo.wr_addr_gray_rd[6] +.sym 13079 rx_09_fifo.wr_addr_gray[6] +.sym 13083 rx_09_fifo.wr_addr[7] +.sym 13089 lvds_rx_09_inst.r_state_if_SB_DFFESR_Q_E_SB_LUT4_O_I0[2] +.sym 13090 lvds_rx_09_inst.r_state_if_SB_DFFESR_Q_E_SB_LUT4_O_I0[1] +.sym 13091 w_soft_reset +.sym 13092 lvds_rx_09_inst.r_state_if_SB_DFFESR_Q_E_SB_LUT4_O_I0[0] +.sym 13095 rx_09_fifo.wr_addr_gray_rd[7] .sym 13112 w_clock_sys -.sym 13119 lvds_rx_09_inst.o_fifo_data_SB_DFFNE_Q_E -.sym 13120 spi_if_ins.o_load_cmd_SB_DFFESR_Q_D_SB_LUT4_I2_O[0] -.sym 13129 io_pmod[5]$SB_IO_IN -.sym 13132 io_pmod[5]$SB_IO_IN -.sym 13137 io_pmod[4]$SB_IO_IN -.sym 13143 spi_if_ins.o_load_cmd_SB_DFFESR_Q_D_SB_LUT4_I2_O[0] -.sym 13148 spi_if_ins.o_cs_SB_DFFESR_Q_R[0] -.sym 13155 io_pmod[6]$SB_IO_IN -.sym 13158 rx_09_fifo.rd_addr_gray_SB_LUT4_I2_O[3] -.sym 13159 rx_09_fifo.rd_addr_gray_SB_LUT4_I2_O[4] -.sym 13160 spi_if_ins.state_if[1] -.sym 13165 rx_09_fifo.rd_addr_SB_DFFESR_Q_E -.sym 13166 smi_ctrl_ins.o_data_out_SB_DFFESS_Q_E -.sym 13168 io_ctrl_ins.o_data_out_SB_DFFESR_Q_3_R[0] -.sym 13171 spi_if_ins.state_if[0] -.sym 13178 io_pmod[5]$SB_IO_IN -.sym 13185 spi_if_ins.o_load_cmd_SB_DFFESR_Q_D_SB_LUT4_I2_O[0] -.sym 13188 spi_if_ins.state_if[0] -.sym 13189 spi_if_ins.state_if[1] -.sym 13191 spi_if_ins.o_load_cmd_SB_DFFESR_Q_D_SB_LUT4_I2_O[0] -.sym 13203 rx_09_fifo.rd_addr_SB_DFFESR_Q_E -.sym 13206 rx_09_fifo.rd_addr_gray_SB_LUT4_I2_O[3] -.sym 13207 rx_09_fifo.rd_addr_gray_SB_LUT4_I2_O[4] -.sym 13214 io_pmod[6]$SB_IO_IN -.sym 13230 io_pmod[5]$SB_IO_IN -.sym 13234 smi_ctrl_ins.o_data_out_SB_DFFESS_Q_E +.sym 13115 w_soft_reset +.sym 13117 lvds_rx_09_inst.r_state_if_SB_DFFESR_Q_E_SB_LUT4_O_I0[1] +.sym 13128 lvds_rx_09_inst.o_debug_state[0] +.sym 13131 io_pmod[5]$SB_IO_IN +.sym 13132 io_pmod[4]$SB_IO_IN +.sym 13144 lvds_rx_09_inst.r_state_if_SB_DFFESR_Q_E_SB_LUT4_O_I2_SB_LUT4_I1_O[0] +.sym 13149 w_soft_reset +.sym 13160 io_pmod_SB_DFFSS_Q_D_SB_LUT4_O_I0[3] +.sym 13162 smi_ctrl_ins.int_cnt_09[3] +.sym 13164 sys_ctrl_ins.o_soft_reset_SB_DFFESS_Q_E +.sym 13165 io_pmod_SB_DFFSS_Q_D_SB_LUT4_O_I0[2] +.sym 13170 lvds_rx_09_inst.r_push +.sym 13171 io_pmod_SB_DFFSS_Q_D_SB_LUT4_O_I0[0] +.sym 13172 w_soft_reset +.sym 13173 io_pmod_SB_DFFSS_Q_D_SB_LUT4_O_I0[1] +.sym 13177 io_pmod[5]$SB_IO_IN +.sym 13182 lvds_rx_09_inst.r_state_if_SB_DFFESR_Q_E_SB_LUT4_O_I0[1] +.sym 13183 smi_ctrl_ins.int_cnt_09[4] +.sym 13188 lvds_rx_09_inst.r_push +.sym 13190 lvds_rx_09_inst.r_state_if_SB_DFFESR_Q_E_SB_LUT4_O_I0[1] +.sym 13191 w_soft_reset +.sym 13200 sys_ctrl_ins.o_soft_reset_SB_DFFESS_Q_E +.sym 13218 io_pmod_SB_DFFSS_Q_D_SB_LUT4_O_I0[3] +.sym 13219 io_pmod_SB_DFFSS_Q_D_SB_LUT4_O_I0[1] +.sym 13220 io_pmod_SB_DFFSS_Q_D_SB_LUT4_O_I0[2] +.sym 13221 io_pmod_SB_DFFSS_Q_D_SB_LUT4_O_I0[0] +.sym 13230 smi_ctrl_ins.int_cnt_09[4] +.sym 13232 smi_ctrl_ins.int_cnt_09[3] +.sym 13233 io_pmod[5]$SB_IO_IN .sym 13235 w_clock_sys -.sym 13236 io_ctrl_ins.o_data_out_SB_DFFESR_Q_3_R[0] -.sym 13237 spi_if_ins.r_tx_data_valid_SB_LUT4_I3_1_O_SB_LUT4_O_I0[0] -.sym 13238 spi_if_ins.spi.r_tx_byte_SB_DFFESR_Q_E -.sym 13239 spi_if_ins.r_tx_data_valid_SB_LUT4_I3_1_O[1] -.sym 13240 spi_if_ins.r_tx_data_valid_SB_LUT4_I3_1_O_SB_LUT4_O_I0_SB_LUT4_O_2_I0[0] -.sym 13242 spi_if_ins.r_tx_data_valid_SB_LUT4_I3_1_O_SB_LUT4_O_I0[1] -.sym 13243 spi_if_ins.r_tx_data_valid_SB_LUT4_I3_1_O_SB_LUT4_O_I0[3] -.sym 13244 w_soft_reset -.sym 13245 io_pmod[6]$SB_IO_IN -.sym 13254 io_pmod[3]$SB_IO_IN -.sym 13255 lvds_rx_09_inst.r_phase_count_SB_LUT4_O_I3_SB_DFFNESR_Q_E_SB_LUT4_O_I2_SB_LUT4_I1_O -.sym 13266 spi_if_ins.r_tx_byte[4] -.sym 13268 w_soft_reset -.sym 13271 sys_ctrl_ins.o_soft_reset_SB_DFFESS_Q_E -.sym 13272 spi_if_ins.spi.r_tx_byte_SB_DFFESR_Q_E -.sym 13279 spi_if_ins.o_load_cmd_SB_DFFESR_Q_D_SB_LUT4_I2_O_SB_LUT4_I3_O[2] -.sym 13284 spi_if_ins.o_load_cmd_SB_DFFESR_Q_D_SB_LUT4_I2_O[0] -.sym 13286 spi_if_ins.o_load_cmd_SB_DFFESR_Q_D_SB_LUT4_I2_O_SB_LUT4_I3_O[1] -.sym 13287 spi_if_ins.state_if[0] -.sym 13290 spi_if_ins.o_load_cmd_SB_DFFESR_Q_D_SB_LUT4_I2_O[3] -.sym 13291 spi_if_ins.r_tx_data_valid_SB_LUT4_I3_1_O[2] -.sym 13292 spi_if_ins.o_load_cmd_SB_DFFESR_Q_D_SB_LUT4_I2_O[1] -.sym 13296 spi_if_ins.spi.r_tx_byte_SB_DFFESR_Q_E -.sym 13298 spi_if_ins.o_load_cmd_SB_DFFESR_Q_D[1] -.sym 13301 sys_ctrl_ins.reset_cmd -.sym 13304 spi_if_ins.state_if[1] -.sym 13308 spi_if_ins.r_tx_byte[2] -.sym 13309 spi_if_ins.o_load_cmd_SB_DFFESR_Q_D_SB_LUT4_I2_O[2] -.sym 13311 spi_if_ins.o_load_cmd_SB_DFFESR_Q_D[1] -.sym 13312 spi_if_ins.o_load_cmd_SB_DFFESR_Q_D_SB_LUT4_I2_O_SB_LUT4_I3_O[2] -.sym 13314 spi_if_ins.o_load_cmd_SB_DFFESR_Q_D_SB_LUT4_I2_O_SB_LUT4_I3_O[1] -.sym 13319 sys_ctrl_ins.reset_cmd -.sym 13335 spi_if_ins.o_load_cmd_SB_DFFESR_Q_D_SB_LUT4_I2_O[0] -.sym 13337 spi_if_ins.state_if[0] -.sym 13338 spi_if_ins.state_if[1] -.sym 13343 spi_if_ins.r_tx_byte[2] -.sym 13347 spi_if_ins.o_load_cmd_SB_DFFESR_Q_D_SB_LUT4_I2_O[2] -.sym 13348 spi_if_ins.o_load_cmd_SB_DFFESR_Q_D_SB_LUT4_I2_O[3] -.sym 13349 spi_if_ins.o_load_cmd_SB_DFFESR_Q_D_SB_LUT4_I2_O[0] -.sym 13350 spi_if_ins.o_load_cmd_SB_DFFESR_Q_D_SB_LUT4_I2_O[1] -.sym 13355 spi_if_ins.o_load_cmd_SB_DFFESR_Q_D_SB_LUT4_I2_O_SB_LUT4_I3_O[1] -.sym 13356 spi_if_ins.o_load_cmd_SB_DFFESR_Q_D[1] -.sym 13357 spi_if_ins.spi.r_tx_byte_SB_DFFESR_Q_E +.sym 13236 w_soft_reset_$glb_sr +.sym 13237 spi_if_ins.o_load_cmd_SB_DFFESR_Q_D[2] +.sym 13244 $PACKER_GND_NET +.sym 13258 w_soft_reset +.sym 13265 spi_if_ins.state_if[0] +.sym 13268 $io_pmod[5]$iobuf_i +.sym 13270 spi_if_ins.o_load_cmd_SB_DFFESR_Q_D[2] +.sym 13278 sys_ctrl_ins.reset_cmd +.sym 13280 spi_if_ins.state_if_SB_DFFE_Q_E +.sym 13291 spi_if_ins.state_if_SB_DFFESR_Q_D[0] +.sym 13307 spi_if_ins.state_if_SB_DFFESR_Q_R +.sym 13318 sys_ctrl_ins.reset_cmd +.sym 13349 spi_if_ins.state_if_SB_DFFESR_Q_D[0] +.sym 13357 spi_if_ins.state_if_SB_DFFE_Q_E .sym 13358 w_clock_sys -.sym 13359 spi_if_ins.r_tx_data_valid_SB_LUT4_I3_1_O[2] -.sym 13360 spi_if_ins.r_tx_data_valid_SB_LUT4_I3_1_O_SB_LUT4_O_I0_SB_LUT4_O_2_I0[1] -.sym 13361 spi_if_ins.spi.r_tx_byte[6] -.sym 13362 spi_if_ins.spi.r_tx_byte[3] -.sym 13363 spi_if_ins.spi.r_tx_byte[7] -.sym 13364 spi_if_ins.spi.r_tx_byte[5] -.sym 13365 spi_if_ins.spi.r_tx_byte[1] -.sym 13366 spi_if_ins.spi.r_tx_byte[0] -.sym 13367 spi_if_ins.spi.r_tx_byte[4] -.sym 13372 sys_ctrl_ins.o_soft_reset_SB_DFFESS_Q_S -.sym 13374 spi_if_ins.spi.r_tx_byte[2] -.sym 13377 w_soft_reset -.sym 13382 spi_if_ins.r_tx_data_valid_SB_DFFESR_Q_D[1] -.sym 13383 $PACKER_GND_NET -.sym 13384 spi_if_ins.o_load_cmd_SB_DFFESR_Q_D[1] -.sym 13385 w_cs[0] -.sym 13388 io_ctrl_ins.o_data_out_SB_DFFESR_Q_3_R[0] -.sym 13391 spi_if_ins.o_cs_SB_LUT4_I3_1_O -.sym 13394 w_soft_reset -.sym 13409 w_cs[1] -.sym 13410 spi_if_ins.w_rx_data[6] -.sym 13411 w_fetch -.sym 13413 spi_if_ins.o_load_cmd_SB_DFFESR_Q_D_SB_LUT4_I2_O[0] -.sym 13414 spi_if_ins.state_if_SB_DFFESR_Q_R -.sym 13415 spi_if_ins.w_rx_data[5] -.sym 13416 w_soft_reset -.sym 13423 spi_if_ins.o_load_cmd_SB_DFFESR_Q_D[1] -.sym 13428 spi_if_ins.o_fetch_cmd_SB_DFFESR_Q_E -.sym 13429 spi_if_ins.o_load_cmd_SB_DFFESR_Q_D_SB_LUT4_I2_O[3] -.sym 13431 spi_if_ins.o_load_cmd_SB_DFFESR_Q_D[0] -.sym 13440 spi_if_ins.o_load_cmd_SB_DFFESR_Q_D_SB_LUT4_I2_O[3] -.sym 13442 spi_if_ins.o_load_cmd_SB_DFFESR_Q_D_SB_LUT4_I2_O[0] -.sym 13447 spi_if_ins.o_load_cmd_SB_DFFESR_Q_D[0] -.sym 13449 spi_if_ins.o_load_cmd_SB_DFFESR_Q_D_SB_LUT4_I2_O[0] -.sym 13458 spi_if_ins.o_load_cmd_SB_DFFESR_Q_D[1] -.sym 13461 spi_if_ins.o_load_cmd_SB_DFFESR_Q_D[0] -.sym 13464 spi_if_ins.w_rx_data[5] -.sym 13467 spi_if_ins.w_rx_data[6] -.sym 13476 w_cs[1] -.sym 13477 w_soft_reset -.sym 13478 w_fetch -.sym 13480 spi_if_ins.o_fetch_cmd_SB_DFFESR_Q_E +.sym 13359 spi_if_ins.state_if_SB_DFFESR_Q_R +.sym 13360 spi_if_ins.state_if_SB_DFFESR_Q_R +.sym 13361 spi_if_ins.spi.r_tx_bit_count_SB_DFFESR_Q_R +.sym 13362 spi_if_ins.spi.r_tx_byte[1] +.sym 13363 spi_if_ins.spi.r_tx_byte_SB_DFFESR_Q_E +.sym 13364 spi_if_ins.o_load_cmd_SB_DFFESR_Q_D[1] +.sym 13366 spi_if_ins.spi.r_tx_byte[5] +.sym 13367 spi_if_ins.spi.o_spi_miso_SB_DFFE_Q_D_SB_LUT4_O_I2_SB_LUT4_O_I0_SB_LUT4_O_I3[3] +.sym 13376 spi_if_ins.spi.r_rx_done_SB_DFFESR_Q_E +.sym 13381 spi_if_ins.spi.r3_rx_done_SB_LUT4_I2_O +.sym 13393 spi_if_ins.state_if_SB_DFFESR_Q_R +.sym 13395 i_smi_a1$SB_IO_IN +.sym 13401 spi_if_ins.o_load_cmd_SB_DFFESR_Q_D[2] +.sym 13403 spi_if_ins.state_if_SB_DFFE_Q_E +.sym 13405 spi_if_ins.o_load_cmd_SB_DFFESR_Q_D[0] +.sym 13406 spi_if_ins.state_if_SB_DFFESR_Q_D[0] +.sym 13407 spi_if_ins.state_if[0] +.sym 13409 spi_if_ins.o_load_cmd_SB_DFFESR_Q_D[2] +.sym 13410 spi_if_ins.state_if_SB_DFFE_Q_E +.sym 13419 spi_if_ins.o_ioc_SB_DFFE_Q_E[0] +.sym 13427 spi_if_ins.state_if[1] +.sym 13431 spi_if_ins.state_if[2] +.sym 13440 spi_if_ins.state_if[1] +.sym 13441 spi_if_ins.o_load_cmd_SB_DFFESR_Q_D[2] +.sym 13442 spi_if_ins.state_if[2] +.sym 13443 spi_if_ins.state_if[0] +.sym 13446 spi_if_ins.o_load_cmd_SB_DFFESR_Q_D[0] +.sym 13447 spi_if_ins.state_if_SB_DFFESR_Q_D[0] +.sym 13448 spi_if_ins.o_ioc_SB_DFFE_Q_E[0] +.sym 13449 spi_if_ins.o_load_cmd_SB_DFFESR_Q_D[2] +.sym 13453 spi_if_ins.state_if_SB_DFFE_Q_E +.sym 13459 spi_if_ins.state_if[2] +.sym 13460 spi_if_ins.state_if[0] +.sym 13461 spi_if_ins.state_if[1] +.sym 13464 spi_if_ins.state_if[2] +.sym 13465 spi_if_ins.state_if[0] +.sym 13466 spi_if_ins.state_if[1] +.sym 13480 spi_if_ins.state_if_SB_DFFE_Q_E .sym 13481 w_clock_sys -.sym 13482 spi_if_ins.state_if_SB_DFFESR_Q_R -.sym 13483 $PACKER_VCC_NET -.sym 13484 spi_if_ins.spi.r2_rx_done -.sym 13487 spi_if_ins.spi.r3_rx_done_SB_LUT4_I2_O -.sym 13488 spi_if_ins.spi.r3_rx_done -.sym 13489 spi_if_ins.o_load_cmd_SB_DFFESR_Q_D[1] -.sym 13508 w_fetch -.sym 13512 spi_if_ins.o_load_cmd_SB_DFFESR_Q_D[1] -.sym 13515 w_cs[0] -.sym 13516 $PACKER_VCC_NET -.sym 13527 r_tx_data[0] -.sym 13528 r_tx_data[5] -.sym 13530 r_tx_data[2] -.sym 13532 spi_if_ins.r_tx_data_valid_SB_DFFESR_Q_D[1] -.sym 13534 r_tx_data[1] -.sym 13535 r_tx_data[7] -.sym 13537 w_cs[0] -.sym 13540 w_cs[1] -.sym 13541 w_cs[2] -.sym 13543 w_cs[3] -.sym 13546 spi_if_ins.o_load_cmd_SB_DFFESR_Q_D[1] -.sym 13551 spi_if_ins.r_tx_data_valid_SB_DFFESR_Q_D_SB_LUT4_I3_O -.sym 13557 r_tx_data[7] -.sym 13563 w_cs[2] -.sym 13564 w_cs[0] -.sym 13565 w_cs[3] -.sym 13566 w_cs[1] -.sym 13571 r_tx_data[5] -.sym 13575 spi_if_ins.r_tx_data_valid_SB_DFFESR_Q_D[1] -.sym 13576 spi_if_ins.o_load_cmd_SB_DFFESR_Q_D[1] -.sym 13581 w_cs[0] -.sym 13582 w_cs[2] -.sym 13583 w_cs[1] -.sym 13584 w_cs[3] -.sym 13589 r_tx_data[0] -.sym 13596 r_tx_data[1] -.sym 13602 r_tx_data[2] -.sym 13603 spi_if_ins.r_tx_data_valid_SB_DFFESR_Q_D_SB_LUT4_I3_O +.sym 13483 spi_if_ins.r_tx_data_valid_SB_DFFESR_Q_E +.sym 13485 spi_if_ins.o_ioc_SB_DFFE_Q_E[1] +.sym 13486 spi_if_ins.o_fetch_cmd_SB_DFFESR_Q_E +.sym 13487 spi_if_ins.r_tx_data_valid_SB_DFFESR_Q_D[1] +.sym 13489 spi_if_ins.state_if[2] +.sym 13490 spi_if_ins.o_load_cmd_SB_DFFESR_Q_E +.sym 13494 spi_if_ins.o_load_cmd_SB_LUT4_I2_O[1] +.sym 13499 spi_if_ins.state_if_SB_DFFE_Q_E +.sym 13504 spi_if_ins.spi.r3_rx_done_SB_LUT4_I2_O +.sym 13506 spi_if_ins.r_tx_data_valid_SB_LUT4_I3_1_O +.sym 13514 spi_if_ins.o_load_cmd_SB_DFFESR_Q_E +.sym 13516 spi_if_ins.o_load_cmd_SB_LUT4_I2_O[1] +.sym 13525 w_cs[1] +.sym 13526 w_cs[0] +.sym 13527 w_cs[3] +.sym 13528 spi_if_ins.o_load_cmd_SB_DFFESR_Q_D[1] +.sym 13532 w_cs[2] +.sym 13533 w_cs[1] +.sym 13534 spi_if_ins.state_if[1] +.sym 13535 w_cs[3] +.sym 13536 spi_if_ins.o_load_cmd_SB_DFFESR_Q_D[0] +.sym 13537 spi_if_ins.state_if[0] +.sym 13540 spi_if_ins.o_load_cmd_SB_DFFESR_Q_D[2] +.sym 13542 spi_if_ins.o_ioc_SB_DFFE_Q_E[1] +.sym 13543 spi_if_ins.o_ioc_SB_DFFE_Q_E[0] +.sym 13550 spi_if_ins.o_ioc_SB_DFFE_Q_E[2] +.sym 13551 spi_if_ins.o_fetch_cmd_SB_DFFESR_Q_E +.sym 13553 spi_if_ins.state_if_SB_DFFESR_Q_R +.sym 13554 spi_if_ins.state_if[2] +.sym 13557 spi_if_ins.o_load_cmd_SB_DFFESR_Q_D[2] +.sym 13558 spi_if_ins.state_if[1] +.sym 13559 spi_if_ins.state_if[0] +.sym 13560 spi_if_ins.state_if[2] +.sym 13563 w_cs[1] +.sym 13564 w_cs[3] +.sym 13565 w_cs[2] +.sym 13566 w_cs[0] +.sym 13569 spi_if_ins.o_load_cmd_SB_DFFESR_Q_D[2] +.sym 13571 spi_if_ins.o_load_cmd_SB_DFFESR_Q_D[1] +.sym 13572 spi_if_ins.o_load_cmd_SB_DFFESR_Q_D[0] +.sym 13575 w_cs[2] +.sym 13576 w_cs[0] +.sym 13577 w_cs[3] +.sym 13578 w_cs[1] +.sym 13581 spi_if_ins.o_load_cmd_SB_DFFESR_Q_D[1] +.sym 13584 spi_if_ins.state_if[2] +.sym 13599 spi_if_ins.o_ioc_SB_DFFE_Q_E[2] +.sym 13601 spi_if_ins.o_ioc_SB_DFFE_Q_E[0] +.sym 13602 spi_if_ins.o_ioc_SB_DFFE_Q_E[1] +.sym 13603 spi_if_ins.o_fetch_cmd_SB_DFFESR_Q_E .sym 13604 w_clock_sys -.sym 13606 sys_ctrl_ins.o_data_out_SB_DFFE_Q_E -.sym 13608 w_tx_data_sys[0] -.sym 13624 spi_if_ins.w_rx_data[6] -.sym 13626 spi_if_ins.w_rx_data[5] -.sym 13628 spi_if_ins.o_load_cmd_SB_DFFESR_Q_D_SB_LUT4_I2_O[1] -.sym 13629 spi_if_ins.spi.r_rx_done -.sym 13633 spi_if_ins.r_tx_data_valid_SB_DFFESR_Q_D_SB_LUT4_I3_O -.sym 13637 spi_if_ins.r_tx_byte[3] -.sym 13639 spi_if_ins.r_tx_byte[6] -.sym 13649 smi_ctrl_ins.o_data_out_SB_DFFESS_Q_E_SB_LUT4_O_I3[1] -.sym 13650 w_cs[2] -.sym 13651 w_fetch -.sym 13659 smi_ctrl_ins.o_data_out_SB_LUT4_I0_O[1] -.sym 13661 smi_ctrl_ins.o_data_out_SB_DFFESS_Q_E_SB_LUT4_O_I3[0] -.sym 13663 smi_ctrl_ins.o_data_out_SB_LUT4_I0_O[2] -.sym 13665 w_tx_data_sys[0] -.sym 13666 w_soft_reset -.sym 13668 smi_ctrl_ins.o_data_out_SB_LUT4_I0_O[3] -.sym 13669 w_ioc[1] -.sym 13671 w_tx_data_io[0] -.sym 13672 smi_ctrl_ins.o_data_out_SB_LUT4_I0_I1[2] -.sym 13674 spi_if_ins.o_cs_SB_LUT4_I3_1_O -.sym 13676 smi_ctrl_ins.o_data_out_SB_LUT4_I0_I1[1] -.sym 13677 w_tx_data_smi[0] -.sym 13680 smi_ctrl_ins.o_data_out_SB_DFFESS_Q_E_SB_LUT4_O_I3[1] -.sym 13681 smi_ctrl_ins.o_data_out_SB_DFFESS_Q_E_SB_LUT4_O_I3[0] -.sym 13692 w_ioc[1] -.sym 13693 w_soft_reset -.sym 13694 w_fetch -.sym 13695 w_cs[2] -.sym 13698 smi_ctrl_ins.o_data_out_SB_LUT4_I0_O[3] -.sym 13699 w_tx_data_sys[0] -.sym 13700 smi_ctrl_ins.o_data_out_SB_LUT4_I0_O[1] -.sym 13701 smi_ctrl_ins.o_data_out_SB_LUT4_I0_O[2] -.sym 13710 w_tx_data_smi[0] -.sym 13711 smi_ctrl_ins.o_data_out_SB_LUT4_I0_I1[1] -.sym 13712 w_tx_data_io[0] -.sym 13713 smi_ctrl_ins.o_data_out_SB_LUT4_I0_I1[2] -.sym 13726 spi_if_ins.o_cs_SB_LUT4_I3_1_O +.sym 13605 spi_if_ins.state_if_SB_DFFESR_Q_R +.sym 13609 spi_if_ins.o_cs_SB_DFFESR_Q_R[0] +.sym 13611 w_load +.sym 13622 smi_ctrl_ins.o_data_out_SB_LUT4_I0_I1[2] +.sym 13623 spi_if_ins.spi.r_rx_byte_SB_DFFE_Q_E +.sym 13629 spi_if_ins.o_ioc_SB_DFFE_Q_E[1] +.sym 13630 w_soft_reset +.sym 13634 o_shdn_tx_lna$SB_IO_OUT +.sym 13637 io_ctrl_ins.o_data_out_SB_DFFESR_Q_E +.sym 13647 spi_if_ins.w_rx_data[5] +.sym 13649 spi_if_ins.o_ioc_SB_DFFE_Q_E[1] +.sym 13651 spi_if_ins.w_rx_data[6] +.sym 13659 w_fetch +.sym 13660 spi_if_ins.o_cs_SB_DFFESR_Q_R[0] +.sym 13662 w_soft_reset +.sym 13663 w_cs[2] +.sym 13666 w_cs[3] +.sym 13672 w_cs[1] +.sym 13673 w_cs[0] +.sym 13676 w_load +.sym 13680 spi_if_ins.w_rx_data[5] +.sym 13682 spi_if_ins.w_rx_data[6] +.sym 13687 spi_if_ins.w_rx_data[5] +.sym 13689 spi_if_ins.w_rx_data[6] +.sym 13692 w_load +.sym 13694 w_cs[1] +.sym 13695 w_fetch +.sym 13699 spi_if_ins.w_rx_data[5] +.sym 13701 spi_if_ins.w_rx_data[6] +.sym 13704 w_cs[1] +.sym 13705 w_cs[0] +.sym 13706 w_cs[2] +.sym 13707 w_cs[3] +.sym 13710 w_cs[3] +.sym 13711 w_cs[2] +.sym 13712 w_cs[0] +.sym 13713 w_cs[1] +.sym 13716 w_soft_reset +.sym 13718 w_cs[1] +.sym 13719 w_fetch +.sym 13722 w_cs[3] +.sym 13723 w_cs[2] +.sym 13724 w_cs[0] +.sym 13725 w_cs[1] +.sym 13726 spi_if_ins.o_ioc_SB_DFFE_Q_E[1] .sym 13727 w_clock_sys -.sym 13729 spi_if_ins.w_rx_data[3] -.sym 13732 spi_if_ins.o_load_cmd_SB_LUT4_I2_O_SB_LUT4_I3_O_SB_LUT4_I3_1_O -.sym 13734 io_ctrl_ins.o_data_out_SB_DFFESR_Q_3_R[1] -.sym 13735 spi_if_ins.w_rx_data[1] -.sym 13736 io_ctrl_ins.o_data_out_SB_DFFESR_Q_3_E -.sym 13741 spi_if_ins.spi.r_rx_byte[2] -.sym 13753 spi_if_ins.r_tx_byte[4] -.sym 13756 spi_if_ins.spi.r3_rx_done_SB_LUT4_I2_O -.sym 13758 spi_if_ins.w_rx_data[1] -.sym 13761 w_soft_reset -.sym 13762 io_ctrl_ins.led0_state_SB_LUT4_I3_O[1] -.sym 13772 spi_if_ins.spi.r3_rx_done_SB_LUT4_I2_O -.sym 13773 w_ioc[3] -.sym 13774 w_ioc[2] +.sym 13728 spi_if_ins.o_cs_SB_DFFESR_Q_R[0] +.sym 13729 io_ctrl_ins.pmod_dir_state[7] +.sym 13730 io_ctrl_ins.pmod_dir_state[5] +.sym 13731 io_ctrl_ins.pmod_dir_state[6] +.sym 13733 io_ctrl_ins.o_data_out_SB_DFFESS_Q_E[2] +.sym 13735 io_ctrl_ins.pmod_dir_state[4] +.sym 13736 io_ctrl_ins.rx_h_b_state_SB_LUT4_I3_O[3] +.sym 13737 spi_if_ins.w_rx_data[5] +.sym 13744 spi_if_ins.o_cs_SB_DFFESR_Q_R[0] +.sym 13747 spi_if_ins.w_rx_data[5] +.sym 13751 spi_if_ins.w_rx_data[2] +.sym 13753 spi_if_ins.o_load_cmd_SB_LUT4_I2_O_SB_LUT4_I3_O[1] +.sym 13754 w_rx_data[2] +.sym 13758 io_ctrl_ins.tr_vc_1_b_state_SB_LUT4_I1_O[2] +.sym 13760 io_ctrl_ins.led0_state_SB_LUT4_I3_O[1] +.sym 13761 io_ctrl_ins.o_pmod[4] +.sym 13763 w_rx_data[5] +.sym 13772 spi_if_ins.o_load_cmd_SB_LUT4_I2_O[1] +.sym 13773 io_ctrl_ins.o_data_out_SB_DFFESR_Q_D_SB_LUT4_O_I2[2] +.sym 13774 io_ctrl_ins.o_data_out_SB_DFFESR_Q_D_SB_LUT4_O_I2[3] +.sym 13776 w_ioc[0] .sym 13777 w_ioc[1] -.sym 13779 w_ioc[4] -.sym 13780 spi_if_ins.spi.r_rx_byte[0] -.sym 13781 spi_if_ins.o_fetch_cmd_SB_LUT4_I3_O[2] -.sym 13782 w_ioc[2] -.sym 13783 spi_if_ins.spi.r_rx_byte[4] -.sym 13785 io_ctrl_ins.tr_vc_2_state_SB_LUT4_I1_I3[3] -.sym 13799 spi_if_ins.spi.r_rx_byte[2] -.sym 13800 smi_ctrl_ins.o_data_out_SB_DFFESS_Q_E_SB_LUT4_O_I3[0] -.sym 13804 spi_if_ins.spi.r_rx_byte[0] -.sym 13815 spi_if_ins.o_fetch_cmd_SB_LUT4_I3_O[2] -.sym 13817 io_ctrl_ins.tr_vc_2_state_SB_LUT4_I1_I3[3] -.sym 13818 smi_ctrl_ins.o_data_out_SB_DFFESS_Q_E_SB_LUT4_O_I3[0] -.sym 13827 spi_if_ins.spi.r_rx_byte[2] -.sym 13836 spi_if_ins.spi.r_rx_byte[4] -.sym 13839 w_ioc[4] -.sym 13840 w_ioc[3] -.sym 13842 w_ioc[2] -.sym 13845 w_ioc[3] -.sym 13846 w_ioc[2] -.sym 13847 w_ioc[1] -.sym 13848 w_ioc[4] -.sym 13849 spi_if_ins.spi.r3_rx_done_SB_LUT4_I2_O +.sym 13779 io_ctrl_ins.led0_state_SB_LUT4_I3_O[1] +.sym 13782 spi_if_ins.o_load_cmd_SB_LUT4_I2_O_SB_LUT4_I3_O[1] +.sym 13790 w_soft_reset +.sym 13797 io_ctrl_ins.o_data_out_SB_DFFESR_Q_E +.sym 13798 io_ctrl_ins.o_data_out_SB_DFFESS_Q_E[2] +.sym 13799 io_ctrl_ins.o_data_out_SB_DFFESR_Q_R +.sym 13800 io_ctrl_ins.o_data_out_SB_DFFESR_Q_D_SB_LUT4_O_I2[0] +.sym 13809 w_ioc[1] +.sym 13811 io_ctrl_ins.o_data_out_SB_DFFESS_Q_E[2] +.sym 13812 w_ioc[0] +.sym 13821 io_ctrl_ins.o_data_out_SB_DFFESR_Q_D_SB_LUT4_O_I2[0] +.sym 13822 io_ctrl_ins.o_data_out_SB_DFFESR_Q_D_SB_LUT4_O_I2[3] +.sym 13823 io_ctrl_ins.o_data_out_SB_DFFESR_Q_D_SB_LUT4_O_I2[2] +.sym 13824 io_ctrl_ins.led0_state_SB_LUT4_I3_O[1] +.sym 13827 w_soft_reset +.sym 13829 spi_if_ins.o_load_cmd_SB_LUT4_I2_O[1] +.sym 13840 spi_if_ins.o_load_cmd_SB_LUT4_I2_O_SB_LUT4_I3_O[1] +.sym 13841 io_ctrl_ins.led0_state_SB_LUT4_I3_O[1] +.sym 13849 io_ctrl_ins.o_data_out_SB_DFFESR_Q_E .sym 13850 w_clock_sys -.sym 13853 sys_ctrl_ins.o_data_out_SB_DFFE_Q_E_SB_LUT4_O_I1_SB_LUT4_I2_O[2] -.sym 13854 i_button_SB_LUT4_I3_O[3] -.sym 13855 spi_if_ins.r_tx_byte[3] -.sym 13856 spi_if_ins.r_tx_byte[6] -.sym 13857 io_ctrl_ins.o_data_out_SB_DFFESR_Q_3_R[0] -.sym 13858 spi_if_ins.r_tx_byte[4] -.sym 13859 io_ctrl_ins.rx_h_b_state_SB_LUT4_I0_I2[1] -.sym 13868 spi_if_ins.spi.r_rx_byte[0] -.sym 13869 io_ctrl_ins.o_data_out_SB_DFFESR_Q_3_E -.sym 13879 io_ctrl_ins.o_data_out_SB_DFFESR_Q_3_R[0] -.sym 13886 w_soft_reset -.sym 13887 sys_ctrl_ins.o_data_out_SB_DFFE_Q_E_SB_LUT4_O_I1_SB_LUT4_I2_O[2] -.sym 13895 spi_if_ins.o_load_cmd_SB_DFFESR_Q_D_SB_LUT4_I2_O_SB_LUT4_I3_O[2] -.sym 13898 spi_if_ins.o_load_cmd_SB_LUT4_I2_O[1] -.sym 13899 spi_if_ins.w_rx_data[1] -.sym 13901 spi_if_ins.w_rx_data[0] -.sym 13902 o_led1$SB_IO_OUT -.sym 13903 spi_if_ins.o_fetch_cmd_SB_LUT4_I3_O_SB_LUT4_I3_O[0] -.sym 13904 w_ioc[0] -.sym 13907 smi_ctrl_ins.o_data_out_SB_DFFESS_Q_E_SB_LUT4_O_I3[0] -.sym 13908 io_ctrl_ins.tr_vc_2_state_SB_LUT4_I1_I3[3] -.sym 13910 sys_ctrl_ins.o_data_out_SB_DFFE_Q_E_SB_LUT4_O_I1_SB_LUT4_I2_O[2] -.sym 13911 io_ctrl_ins.debug_mode[1] -.sym 13914 io_ctrl_ins.o_data_out_SB_DFFESR_Q_3_R[0] -.sym 13921 w_soft_reset +.sym 13851 io_ctrl_ins.o_data_out_SB_DFFESR_Q_R +.sym 13852 i_button_SB_LUT4_I3_O[3] +.sym 13853 io_ctrl_ins.o_pmod[5] +.sym 13854 io_ctrl_ins.o_pmod[4] +.sym 13855 sys_ctrl_ins.o_data_out_SB_DFFE_Q_D[2] +.sym 13856 io_ctrl_ins.tr_vc_1_state_SB_LUT4_I3_O[3] +.sym 13858 i_button_SB_LUT4_I3_O[0] +.sym 13859 io_ctrl_ins.o_pmod[2] +.sym 13865 spi_if_ins.w_rx_data[0] +.sym 13879 w_rx_data[6] +.sym 13881 w_rx_data[7] +.sym 13882 spi_if_ins.w_rx_data[4] +.sym 13886 io_ctrl_ins.debug_mode_SB_LUT4_I2_O[1] +.sym 13893 io_ctrl_ins.debug_mode_SB_LUT4_I2_O[1] +.sym 13895 io_ctrl_ins.led1_state_SB_DFFESR_Q_E +.sym 13897 i_button_SB_LUT4_I3_O[1] +.sym 13900 io_ctrl_ins.tr_vc_2_state_SB_LUT4_I1_I3[1] +.sym 13902 o_tr_vc1_b$SB_IO_OUT +.sym 13905 spi_if_ins.o_load_cmd_SB_LUT4_I2_O_SB_LUT4_I3_O[1] +.sym 13906 o_shdn_tx_lna$SB_IO_OUT +.sym 13908 smi_ctrl_ins.o_data_out_SB_DFFESS_Q_E_SB_LUT4_O_I3[0] +.sym 13911 w_rx_data[1] +.sym 13912 w_ioc[2] +.sym 13915 w_ioc[0] +.sym 13916 io_ctrl_ins.o_pmod[2] +.sym 13917 io_ctrl_ins.o_data_out_SB_DFFESR_Q_3_R[0] +.sym 13919 w_ioc[4] +.sym 13920 w_rx_data[0] +.sym 13921 io_ctrl_ins.o_pmod[4] +.sym 13922 w_ioc[3] +.sym 13923 w_ioc[0] .sym 13924 w_ioc[1] -.sym 13926 w_ioc[1] -.sym 13927 spi_if_ins.o_fetch_cmd_SB_LUT4_I3_O_SB_LUT4_I3_O[0] +.sym 13926 o_tr_vc1_b$SB_IO_OUT +.sym 13927 io_ctrl_ins.tr_vc_2_state_SB_LUT4_I1_I3[1] .sym 13928 w_ioc[0] -.sym 13933 w_ioc[0] -.sym 13934 smi_ctrl_ins.o_data_out_SB_DFFESS_Q_E_SB_LUT4_O_I3[0] -.sym 13935 io_ctrl_ins.tr_vc_2_state_SB_LUT4_I1_I3[3] -.sym 13938 w_ioc[0] -.sym 13939 smi_ctrl_ins.o_data_out_SB_DFFESS_Q_E_SB_LUT4_O_I3[0] -.sym 13940 w_ioc[1] -.sym 13944 spi_if_ins.w_rx_data[0] -.sym 13951 w_soft_reset -.sym 13953 spi_if_ins.o_load_cmd_SB_LUT4_I2_O[1] -.sym 13962 o_led1$SB_IO_OUT -.sym 13963 io_ctrl_ins.o_data_out_SB_DFFESR_Q_3_R[0] -.sym 13964 io_ctrl_ins.debug_mode[1] -.sym 13965 sys_ctrl_ins.o_data_out_SB_DFFE_Q_E_SB_LUT4_O_I1_SB_LUT4_I2_O[2] -.sym 13969 spi_if_ins.w_rx_data[1] -.sym 13972 spi_if_ins.o_load_cmd_SB_DFFESR_Q_D_SB_LUT4_I2_O_SB_LUT4_I3_O[2] +.sym 13929 io_ctrl_ins.o_pmod[4] +.sym 13933 smi_ctrl_ins.o_data_out_SB_DFFESS_Q_E_SB_LUT4_O_I3[0] +.sym 13934 w_ioc[0] +.sym 13935 w_ioc[1] +.sym 13938 w_rx_data[1] +.sym 13944 io_ctrl_ins.o_data_out_SB_DFFESR_Q_3_R[0] +.sym 13945 io_ctrl_ins.debug_mode_SB_LUT4_I2_O[1] +.sym 13950 o_shdn_tx_lna$SB_IO_OUT +.sym 13951 io_ctrl_ins.o_pmod[2] +.sym 13952 w_ioc[0] +.sym 13953 io_ctrl_ins.tr_vc_2_state_SB_LUT4_I1_I3[1] +.sym 13959 w_rx_data[0] +.sym 13964 i_button_SB_LUT4_I3_O[1] +.sym 13965 spi_if_ins.o_load_cmd_SB_LUT4_I2_O_SB_LUT4_I3_O[1] +.sym 13968 w_ioc[2] +.sym 13970 w_ioc[4] +.sym 13971 w_ioc[3] +.sym 13972 io_ctrl_ins.led1_state_SB_DFFESR_Q_E .sym 13973 w_clock_sys -.sym 13976 io_ctrl_ins.rf_pin_state[1] -.sym 13977 spi_if_ins.o_load_cmd_SB_LUT4_I2_O_SB_LUT4_I3_O_SB_LUT4_I3_2_O -.sym 13978 w_ioc[0] -.sym 13979 io_ctrl_ins.rf_pin_state[2] -.sym 13981 io_ctrl_ins.rf_pin_state[6] -.sym 13982 w_ioc[0] -.sym 13987 io_ctrl_ins.o_data_out_SB_DFFESR_Q_E -.sym 13988 o_rx_h_tx_l$SB_IO_OUT -.sym 13993 io_ctrl_ins.led0_state_SB_LUT4_I3_O[1] -.sym 13995 w_ioc[0] -.sym 13998 spi_if_ins.o_fetch_cmd_SB_LUT4_I3_O_SB_LUT4_I3_O[0] -.sym 13999 io_ctrl_ins.rx_h_state_SB_DFFE_Q_E -.sym 14000 o_shdn_tx_lna$SB_IO_OUT -.sym 14006 w_rx_data[3] -.sym 14010 io_ctrl_ins.rf_pin_state[1] -.sym 14016 spi_if_ins.o_load_cmd_SB_LUT4_I2_O[1] -.sym 14021 io_ctrl_ins.o_data_out_SB_DFFESR_Q_3_R[0] -.sym 14024 o_shdn_tx_lna$SB_IO_OUT -.sym 14027 spi_if_ins.o_data_in_SB_DFFE_Q_E -.sym 14028 spi_if_ins.w_rx_data[1] -.sym 14031 io_ctrl_ins.rx_h_b_state_SB_LUT4_I0_I2[1] -.sym 14032 io_ctrl_ins.rf_mode[0] -.sym 14046 w_soft_reset -.sym 14079 io_ctrl_ins.o_data_out_SB_DFFESR_Q_3_R[0] -.sym 14080 spi_if_ins.o_load_cmd_SB_LUT4_I2_O[1] -.sym 14081 w_soft_reset -.sym 14085 io_ctrl_ins.rf_mode[0] -.sym 14086 o_shdn_tx_lna$SB_IO_OUT -.sym 14087 io_ctrl_ins.rx_h_b_state_SB_LUT4_I0_I2[1] -.sym 14088 io_ctrl_ins.o_data_out_SB_DFFESR_Q_3_R[0] -.sym 14093 spi_if_ins.w_rx_data[1] +.sym 13974 w_soft_reset_$glb_sr +.sym 13975 io_ctrl_ins.o_data_out_SB_DFFESR_Q_3_R[0] +.sym 13976 w_rx_data[4] +.sym 13977 io_ctrl_ins.o_pmod[3] +.sym 13978 io_ctrl_ins.tr_vc_2_state_SB_LUT4_I1_O[2] +.sym 13979 io_ctrl_ins.o_pmod[0] +.sym 13980 spi_if_ins.o_load_cmd_SB_LUT4_I2_O_SB_LUT4_I3_O_SB_LUT4_I3_2_O +.sym 13981 sys_ctrl_ins.o_data_out_SB_DFFE_Q_E_SB_LUT4_O_I1_SB_LUT4_I3_O[2] +.sym 13982 io_ctrl_ins.o_pmod[6] +.sym 13993 o_led1$SB_IO_OUT +.sym 13994 w_tx_data_io[3] +.sym 13995 spi_if_ins.o_cs_SB_LUT4_I3_O +.sym 13996 o_tr_vc1$SB_IO_OUT +.sym 13997 smi_ctrl_ins.o_data_out_SB_LUT4_I0_O[1] +.sym 13998 o_tr_vc1_b$SB_IO_OUT +.sym 13999 w_rx_data[4] +.sym 14000 o_led1$SB_IO_OUT +.sym 14006 o_led0$SB_IO_OUT +.sym 14008 o_tr_vc2$SB_IO_OUT +.sym 14009 spi_if_ins.o_load_cmd_SB_LUT4_I2_O[1] +.sym 14017 spi_if_ins.w_rx_data[5] +.sym 14019 w_ioc[1] +.sym 14021 spi_if_ins.w_rx_data[6] +.sym 14022 w_soft_reset +.sym 14028 spi_if_ins.w_rx_data[3] +.sym 14029 spi_if_ins.o_ioc_SB_DFFE_Q_E[0] +.sym 14030 io_ctrl_ins.o_data_out_SB_DFFESR_Q_3_R[1] +.sym 14031 smi_ctrl_ins.o_data_out_SB_DFFESS_Q_E_SB_LUT4_O_I3[0] +.sym 14039 spi_if_ins.o_load_cmd_SB_LUT4_I2_O[1] +.sym 14040 io_ctrl_ins.o_data_out_SB_DFFESR_Q_3_R[0] +.sym 14042 spi_if_ins.w_rx_data[4] +.sym 14043 spi_if_ins.o_data_in_SB_DFFE_Q_E +.sym 14046 sys_ctrl_ins.o_data_out_SB_DFFE_Q_E_SB_LUT4_O_I1_SB_LUT4_I3_O[2] +.sym 14047 io_ctrl_ins.tr_vc_2_state_SB_LUT4_I1_I3[1] +.sym 14051 spi_if_ins.o_ioc_SB_DFFE_Q_E[0] +.sym 14055 sys_ctrl_ins.o_data_out_SB_DFFE_Q_E_SB_LUT4_O_I1_SB_LUT4_I3_O[2] +.sym 14056 w_soft_reset +.sym 14057 spi_if_ins.o_load_cmd_SB_LUT4_I2_O[1] +.sym 14062 io_ctrl_ins.o_data_out_SB_DFFESR_Q_3_R[1] +.sym 14064 io_ctrl_ins.o_data_out_SB_DFFESR_Q_3_R[0] +.sym 14069 spi_if_ins.w_rx_data[3] +.sym 14076 spi_if_ins.w_rx_data[4] +.sym 14079 spi_if_ins.w_rx_data[5] +.sym 14085 smi_ctrl_ins.o_data_out_SB_DFFESS_Q_E_SB_LUT4_O_I3[0] +.sym 14087 io_ctrl_ins.tr_vc_2_state_SB_LUT4_I1_I3[1] +.sym 14088 w_ioc[1] +.sym 14093 spi_if_ins.w_rx_data[6] .sym 14095 spi_if_ins.o_data_in_SB_DFFE_Q_E .sym 14096 w_clock_sys -.sym 14098 io_ctrl_ins.rf_mode[0] -.sym 14099 io_ctrl_ins.debug_mode[0] -.sym 14101 io_ctrl_ins.debug_mode_SB_LUT4_I2_O[1] -.sym 14102 o_led0$SB_IO_OUT -.sym 14103 io_ctrl_ins.rf_mode[2] -.sym 14104 io_ctrl_ins.rx_h_state_SB_DFFE_Q_E -.sym 14105 io_ctrl_ins.debug_mode_SB_LUT4_I2_O[3] -.sym 14115 i_config[0]$SB_IO_IN -.sym 14117 w_tx_data_io[0] -.sym 14118 w_rx_data[6] -.sym 14120 w_rx_data[2] -.sym 14126 io_ctrl_ins.rf_pin_state[2] -.sym 14145 spi_if_ins.o_load_cmd_SB_LUT4_I2_O[1] -.sym 14154 w_rx_data[1] -.sym 14157 sys_ctrl_ins.o_data_out_SB_DFFE_Q_E_SB_LUT4_O_I1_SB_LUT4_I2_O[2] -.sym 14158 w_soft_reset -.sym 14166 spi_if_ins.o_load_cmd_SB_LUT4_I2_O_SB_LUT4_I2_O -.sym 14170 o_shdn_rx_lna$SB_IO_OUT -.sym 14172 sys_ctrl_ins.o_data_out_SB_DFFE_Q_E_SB_LUT4_O_I1_SB_LUT4_I2_O[2] -.sym 14173 w_soft_reset -.sym 14174 spi_if_ins.o_load_cmd_SB_LUT4_I2_O[1] -.sym 14179 w_rx_data[1] -.sym 14215 o_shdn_rx_lna$SB_IO_OUT +.sym 14098 io_ctrl_ins.rf_pin_state[3] +.sym 14099 io_ctrl_ins.rf_pin_state[0] +.sym 14100 io_ctrl_ins.led0_state_SB_LUT4_I3_O[2] +.sym 14101 io_ctrl_ins.rf_pin_state[2] +.sym 14102 io_ctrl_ins.rf_pin_state[1] +.sym 14103 io_ctrl_ins.debug_mode_SB_LUT4_I0_O +.sym 14104 io_ctrl_ins.debug_mode_SB_LUT4_I2_O[3] +.sym 14105 io_ctrl_ins.tr_vc_1_state_SB_DFFE_Q_D_SB_LUT4_O_I3[2] +.sym 14113 w_ioc[0] +.sym 14114 io_ctrl_ins.led1_state_SB_DFFESR_Q_E +.sym 14116 io_ctrl_ins.o_data_out_SB_DFFESS_Q_S +.sym 14119 spi_if_ins.o_load_cmd_SB_LUT4_I2_O_SB_LUT4_I3_O_SB_LUT4_I3_O +.sym 14120 io_ctrl_ins.tr_vc_2_state_SB_LUT4_I1_I3[1] +.sym 14125 w_rx_data[3] +.sym 14126 o_shdn_tx_lna$SB_IO_OUT +.sym 14131 io_ctrl_ins.o_data_out_SB_DFFESR_Q_3_R[1] +.sym 14141 i_config[0]$SB_IO_IN +.sym 14143 w_rx_data[4] +.sym 14145 sys_ctrl_ins.o_data_out_SB_DFFE_Q_E_SB_LUT4_O_I1_SB_LUT4_I3_O[2] +.sym 14147 io_ctrl_ins.o_data_out_SB_DFFESR_Q_3_R[0] +.sym 14148 w_soft_reset +.sym 14149 o_led0$SB_IO_OUT +.sym 14150 spi_if_ins.o_load_cmd_SB_LUT4_I2_O_SB_LUT4_I2_O +.sym 14151 io_ctrl_ins.debug_mode_SB_LUT4_I2_O[2] +.sym 14157 w_rx_data[1] +.sym 14158 w_rx_data[0] +.sym 14159 io_ctrl_ins.debug_mode[1] +.sym 14160 o_led1$SB_IO_OUT +.sym 14164 io_ctrl_ins.debug_mode[0] +.sym 14167 w_rx_data[2] +.sym 14169 spi_if_ins.o_load_cmd_SB_LUT4_I2_O[1] +.sym 14172 sys_ctrl_ins.o_data_out_SB_DFFE_Q_E_SB_LUT4_O_I1_SB_LUT4_I3_O[2] +.sym 14173 io_ctrl_ins.o_data_out_SB_DFFESR_Q_3_R[0] +.sym 14174 io_ctrl_ins.debug_mode[0] +.sym 14175 o_led0$SB_IO_OUT +.sym 14178 w_rx_data[0] +.sym 14184 io_ctrl_ins.debug_mode[1] +.sym 14185 o_led1$SB_IO_OUT +.sym 14186 sys_ctrl_ins.o_data_out_SB_DFFE_Q_E_SB_LUT4_O_I1_SB_LUT4_I3_O[2] +.sym 14187 io_ctrl_ins.o_data_out_SB_DFFESR_Q_3_R[0] +.sym 14191 w_rx_data[4] +.sym 14196 w_rx_data[1] +.sym 14202 w_rx_data[2] +.sym 14208 sys_ctrl_ins.o_data_out_SB_DFFE_Q_E_SB_LUT4_O_I1_SB_LUT4_I3_O[2] +.sym 14209 io_ctrl_ins.debug_mode_SB_LUT4_I2_O[2] +.sym 14210 i_config[0]$SB_IO_IN +.sym 14211 io_ctrl_ins.o_data_out_SB_DFFESR_Q_3_R[0] +.sym 14214 spi_if_ins.o_load_cmd_SB_LUT4_I2_O[1] +.sym 14215 w_soft_reset +.sym 14216 io_ctrl_ins.o_data_out_SB_DFFESR_Q_3_R[0] .sym 14218 spi_if_ins.o_load_cmd_SB_LUT4_I2_O_SB_LUT4_I2_O .sym 14219 w_clock_sys .sym 14220 w_soft_reset_$glb_sr .sym 14221 o_shdn_tx_lna$SB_IO_OUT -.sym 14228 o_shdn_rx_lna$SB_IO_OUT -.sym 14233 io_ctrl_ins.led1_state_SB_DFFESR_Q_E -.sym 14234 w_rx_data[0] -.sym 14238 io_ctrl_ins.debug_mode_SB_LUT4_I2_O[3] -.sym 14242 w_rx_data[2] -.sym 14251 spi_if_ins.o_load_cmd_SB_LUT4_I2_O_SB_LUT4_I2_O -.sym 14274 w_rx_data[0] -.sym 14276 w_rx_data[1] -.sym 14289 io_ctrl_ins.led1_state_SB_DFFESR_Q_E -.sym 14310 w_rx_data[0] -.sym 14334 w_rx_data[1] -.sym 14341 io_ctrl_ins.led1_state_SB_DFFESR_Q_E +.sym 14222 io_ctrl_ins.rx_h_state_SB_DFFE_Q_D_SB_LUT4_O_I3[2] +.sym 14223 io_ctrl_ins.mixer_en_state +.sym 14225 o_tr_vc2$SB_IO_OUT +.sym 14227 o_shdn_rx_lna$SB_IO_OUT +.sym 14234 io_ctrl_ins.debug_mode_SB_LUT4_I2_O[3] +.sym 14235 i_config[0]$SB_IO_IN +.sym 14237 w_rx_data[1] +.sym 14238 io_ctrl_ins.tr_vc_1_state_SB_DFFE_Q_D_SB_LUT4_O_I3[2] +.sym 14241 io_ctrl_ins.debug_mode_SB_LUT4_I2_O[0] +.sym 14242 io_ctrl_ins.tr_vc_2_state_SB_LUT4_I1_I3[1] +.sym 14246 w_rx_data[2] +.sym 14275 io_ctrl_ins.debug_mode_SB_LUT4_I0_O +.sym 14277 spi_if_ins.o_load_cmd_SB_LUT4_I2_O_SB_LUT4_I2_O +.sym 14285 w_rx_data[3] +.sym 14289 spi_if_ins.o_load_cmd_SB_LUT4_I2_O_SB_LUT4_I2_O +.sym 14307 io_ctrl_ins.debug_mode_SB_LUT4_I0_O +.sym 14314 spi_if_ins.o_load_cmd_SB_LUT4_I2_O_SB_LUT4_I2_O +.sym 14320 w_rx_data[3] +.sym 14341 spi_if_ins.o_load_cmd_SB_LUT4_I2_O_SB_LUT4_I2_O .sym 14342 w_clock_sys .sym 14343 w_soft_reset_$glb_sr .sym 14344 i_smi_a1$SB_IO_IN +.sym 14353 o_shdn_rx_lna$SB_IO_OUT +.sym 14358 o_rx_h_tx_l_b$SB_IO_OUT .sym 14359 o_shdn_tx_lna$SB_IO_OUT -.sym 14361 io_ctrl_ins.rx_h_b_state_SB_LUT4_I0_I2[3] -.sym 14384 w_soft_reset .sym 14388 w_soft_reset -.sym 14410 w_soft_reset -.sym 14414 o_led1$SB_IO_OUT -.sym 14418 r_counter +.sym 14401 w_soft_reset +.sym 14418 smi_ctrl_ins.soe_and_reset .sym 14419 io_smi_data[3]$SB_IO_OUT -.sym 14436 r_counter -.sym 14443 io_smi_data[3]$SB_IO_OUT -.sym 14444 r_counter -.sym 14445 io_pmod_SB_DFFSR_Q_D_SB_LUT4_O_I2_SB_LUT4_O_I0[0] -.sym 14450 io_pmod_SB_DFFSR_Q_D_SB_LUT4_O_I2_SB_LUT4_O_1_I0_SB_LUT4_O_2_I0[2] -.sym 14467 lvds_rx_09_inst.o_fifo_data_SB_DFFNE_Q_E +.sym 14437 io_smi_data[3]$SB_IO_OUT +.sym 14438 smi_ctrl_ins.soe_and_reset +.sym 14445 rx_09_fifo.wr_addr_gray_SB_LUT4_I2_O[1] +.sym 14446 rx_09_fifo.wr_addr_gray_SB_LUT4_I2_O[2] +.sym 14447 rx_09_fifo.wr_addr_gray_SB_LUT4_I2_O[3] +.sym 14448 rx_09_fifo.wr_addr_gray_SB_LUT4_I2_O[4] +.sym 14449 rx_09_fifo.wr_addr_gray_SB_LUT4_I2_O[5] +.sym 14450 rx_09_fifo.wr_addr_gray_SB_LUT4_I2_O[6] +.sym 14451 rx_09_fifo.wr_addr_gray_SB_LUT4_I2_O[7] .sym 14476 i_smi_a3$SB_IO_IN -.sym 14486 rx_09_fifo.rd_addr_gray_wr_r[4] -.sym 14490 w_smi_data_output[3] -.sym 14494 io_pmod_SB_DFFSR_Q_D_SB_LUT4_O_I2_SB_LUT4_O_1_I0_SB_LUT4_O_3_I3[3] -.sym 14497 io_pmod_SB_DFFSR_Q_D_SB_LUT4_O_I2_SB_LUT4_O_1_I0_SB_LUT4_O_2_I0[3] -.sym 14498 io_pmod_SB_DFFSR_Q_D_SB_LUT4_O_I2_SB_LUT4_O_1_I0_SB_LUT4_O_2_I0[1] -.sym 14499 io_pmod_SB_DFFSR_Q_D_SB_LUT4_O_I2_SB_LUT4_O_1_I0[2] -.sym 14500 io_pmod_SB_DFFSR_Q_D_SB_LUT4_O_I2_SB_LUT4_O_1_I0_SB_LUT4_O_2_I0[0] -.sym 14501 io_pmod_SB_DFFSR_Q_D_SB_LUT4_O_I2_SB_LUT4_O_1_I0[3] -.sym 14504 io_pmod_SB_DFFSR_Q_D_SB_LUT4_O_I2_SB_LUT4_O_1_I0_SB_LUT4_O_3_I3[1] -.sym 14506 i_smi_a3$SB_IO_IN -.sym 14508 io_pmod_SB_DFFSR_Q_D_SB_LUT4_O_I2_SB_LUT4_O_1_I0_SB_LUT4_O_2_I0[2] -.sym 14509 io_pmod_SB_DFFSR_Q_D_SB_LUT4_O_I2_SB_LUT4_O_1_I0[0] -.sym 14510 io_pmod_SB_DFFSR_Q_D_SB_LUT4_O_I2_SB_LUT4_O_1_I0_SB_LUT4_O_3_I3[0] -.sym 14511 rx_09_fifo.rd_addr_gray[1] -.sym 14513 io_pmod_SB_DFFSR_Q_D_SB_LUT4_O_I2_SB_LUT4_O_1_I0_SB_LUT4_O_3_I3[2] -.sym 14514 rx_09_fifo.rd_addr_gray_wr_r[2] -.sym 14516 io_pmod_SB_DFFSR_Q_D_SB_LUT4_O_I2_SB_LUT4_O_1_I0[1] -.sym 14519 io_pmod_SB_DFFSR_Q_D_SB_LUT4_O_I2_SB_LUT4_O_1_I0_SB_LUT4_O_2_I0[2] -.sym 14520 rx_09_fifo.rd_addr_gray_wr_r[2] -.sym 14521 io_pmod_SB_DFFSR_Q_D_SB_LUT4_O_I2_SB_LUT4_O_1_I0_SB_LUT4_O_3_I3[1] -.sym 14528 rx_09_fifo.rd_addr_gray[1] -.sym 14531 rx_09_fifo.rd_addr_gray_wr_r[4] -.sym 14533 io_pmod_SB_DFFSR_Q_D_SB_LUT4_O_I2_SB_LUT4_O_1_I0_SB_LUT4_O_3_I3[2] -.sym 14543 io_pmod_SB_DFFSR_Q_D_SB_LUT4_O_I2_SB_LUT4_O_1_I0[3] -.sym 14544 io_pmod_SB_DFFSR_Q_D_SB_LUT4_O_I2_SB_LUT4_O_1_I0[0] -.sym 14545 io_pmod_SB_DFFSR_Q_D_SB_LUT4_O_I2_SB_LUT4_O_1_I0[2] -.sym 14546 io_pmod_SB_DFFSR_Q_D_SB_LUT4_O_I2_SB_LUT4_O_1_I0[1] -.sym 14549 io_pmod_SB_DFFSR_Q_D_SB_LUT4_O_I2_SB_LUT4_O_1_I0_SB_LUT4_O_2_I0[0] -.sym 14550 io_pmod_SB_DFFSR_Q_D_SB_LUT4_O_I2_SB_LUT4_O_1_I0_SB_LUT4_O_2_I0[2] -.sym 14551 io_pmod_SB_DFFSR_Q_D_SB_LUT4_O_I2_SB_LUT4_O_1_I0_SB_LUT4_O_2_I0[1] -.sym 14552 io_pmod_SB_DFFSR_Q_D_SB_LUT4_O_I2_SB_LUT4_O_1_I0_SB_LUT4_O_2_I0[3] -.sym 14555 io_pmod_SB_DFFSR_Q_D_SB_LUT4_O_I2_SB_LUT4_O_1_I0_SB_LUT4_O_3_I3[1] -.sym 14556 io_pmod_SB_DFFSR_Q_D_SB_LUT4_O_I2_SB_LUT4_O_1_I0_SB_LUT4_O_3_I3[0] -.sym 14557 io_pmod_SB_DFFSR_Q_D_SB_LUT4_O_I2_SB_LUT4_O_1_I0_SB_LUT4_O_3_I3[2] -.sym 14558 io_pmod_SB_DFFSR_Q_D_SB_LUT4_O_I2_SB_LUT4_O_1_I0_SB_LUT4_O_3_I3[3] -.sym 14562 w_smi_data_output[3] -.sym 14564 i_smi_a3$SB_IO_IN +.sym 14494 rx_09_fifo.wr_addr_gray_SB_DFFESR_Q_4_D[1] +.sym 14497 rx_09_fifo.wr_addr_SB_DFFESR_Q_E +.sym 14512 rx_09_fifo.wr_addr_gray_SB_LUT4_I2_O[2] +.sym 14513 rx_09_fifo.wr_addr_gray_SB_LUT4_I2_O[3] +.sym 14514 rx_09_fifo.wr_addr_gray_SB_LUT4_I2_O[4] +.sym 14515 rx_09_fifo.wr_addr_gray_SB_LUT4_I2_O[5] +.sym 14516 rx_09_fifo.wr_addr_gray_SB_LUT4_I2_O[6] +.sym 14519 rx_09_fifo.wr_addr_gray_SB_LUT4_I2_O[5] +.sym 14527 rx_09_fifo.wr_addr_gray_SB_LUT4_I2_O[2] +.sym 14531 rx_09_fifo.wr_addr_gray_SB_LUT4_I2_O[3] +.sym 14537 rx_09_fifo.wr_addr_gray_SB_LUT4_I2_O[4] +.sym 14544 rx_09_fifo.wr_addr_gray_SB_LUT4_I2_O[6] +.sym 14551 rx_09_fifo.wr_addr_gray_SB_DFFESR_Q_4_D[1] +.sym 14565 rx_09_fifo.wr_addr_SB_DFFESR_Q_E .sym 14566 io_pmod[0]$SB_IO_IN_$glb_clk -.sym 14572 rx_09_fifo.wr_addr_gray_SB_DFFESR_Q_7_D[0] -.sym 14573 rx_09_fifo.wr_addr_gray_SB_DFFESR_Q_6_D[1] -.sym 14574 $io_pmod[6]$iobuf_i -.sym 14575 io_pmod_SB_DFFSR_Q_D_SB_LUT4_O_I2_SB_LUT4_O_I0_SB_LUT4_O_I3[3] -.sym 14576 io_pmod_SB_DFFSR_Q_D_SB_LUT4_O_I2_SB_LUT4_O_I0[3] -.sym 14577 io_pmod_SB_DFFSR_Q_D_SB_LUT4_O_I2_SB_LUT4_O_I0[2] -.sym 14578 io_pmod_SB_DFFSR_Q_D_SB_LUT4_O_I2[2] -.sym 14579 io_pmod_SB_DFFSR_Q_D_SB_LUT4_O_I2_SB_LUT4_O_I0[1] -.sym 14620 io_pmod[3]$SB_IO_IN -.sym 14626 rx_09_fifo.rd_addr_gray_wr_r[6] -.sym 14628 rx_09_fifo.wr_addr_SB_DFFESR_Q_E -.sym 14637 rx_09_fifo.wr_addr[2] -.sym 14640 io_pmod_SB_DFFSR_Q_D_SB_LUT4_O_I2_SB_LUT4_O_1_I0_SB_LUT4_O_2_I0[0] -.sym 14651 io_pmod_SB_DFFSR_Q_D_SB_LUT4_O_I2_SB_LUT4_O_1_I0_SB_LUT4_O_1_I0[0] -.sym 14659 w_soft_reset -.sym 14660 rx_09_fifo.wr_addr_SB_DFFESR_Q_E -.sym 14661 io_pmod_SB_DFFSR_Q_D_SB_LUT4_O_I2_SB_LUT4_O_1_I0_SB_LUT4_O_1_I0[1] -.sym 14662 io_pmod_SB_DFFSR_Q_D_SB_LUT4_O_I2_SB_LUT4_O_1_I0_SB_LUT4_O_1_I0[3] -.sym 14666 rx_09_fifo.wr_addr_gray_SB_LUT4_I2_O[1] -.sym 14667 rx_09_fifo.wr_addr_gray_SB_LUT4_I2_O[2] -.sym 14668 rx_09_fifo.wr_addr_gray_SB_LUT4_I2_O[3] -.sym 14671 io_pmod_SB_DFFSR_Q_D_SB_LUT4_O_I2_SB_LUT4_O_I0_SB_LUT4_O_I3[2] -.sym 14672 io_pmod_SB_DFFSR_Q_D_SB_LUT4_O_I2_SB_LUT4_O_1_I0_SB_LUT4_O_1_I0[2] -.sym 14673 rx_09_fifo.wr_addr_gray_SB_DFFESR_Q_7_D[0] -.sym 14676 io_pmod[3]$SB_IO_IN -.sym 14677 rx_09_fifo.wr_addr_gray_SB_LUT4_I2_O[4] -.sym 14682 io_pmod_SB_DFFSR_Q_D_SB_LUT4_O_I2_SB_LUT4_O_I0_SB_LUT4_O_I3[2] -.sym 14689 rx_09_fifo.wr_addr_gray_SB_LUT4_I2_O[2] -.sym 14697 rx_09_fifo.wr_addr_gray_SB_DFFESR_Q_7_D[0] -.sym 14700 rx_09_fifo.wr_addr_gray_SB_LUT4_I2_O[1] -.sym 14709 rx_09_fifo.wr_addr_gray_SB_LUT4_I2_O[4] -.sym 14712 w_soft_reset -.sym 14715 io_pmod[3]$SB_IO_IN -.sym 14721 rx_09_fifo.wr_addr_gray_SB_LUT4_I2_O[3] -.sym 14724 io_pmod_SB_DFFSR_Q_D_SB_LUT4_O_I2_SB_LUT4_O_1_I0_SB_LUT4_O_1_I0[1] -.sym 14725 io_pmod_SB_DFFSR_Q_D_SB_LUT4_O_I2_SB_LUT4_O_1_I0_SB_LUT4_O_1_I0[3] -.sym 14726 io_pmod_SB_DFFSR_Q_D_SB_LUT4_O_I2_SB_LUT4_O_1_I0_SB_LUT4_O_1_I0[2] -.sym 14727 io_pmod_SB_DFFSR_Q_D_SB_LUT4_O_I2_SB_LUT4_O_1_I0_SB_LUT4_O_1_I0[0] +.sym 14567 w_soft_reset_$glb_sr +.sym 14572 rx_09_fifo.wr_addr_gray_SB_DFFESR_Q_5_D_SB_LUT4_I2_O[0] +.sym 14573 rx_09_fifo.wr_addr_gray_SB_DFFESR_Q_5_D[0] +.sym 14574 io_pmod_SB_DFFSR_Q_D_SB_LUT4_O_I0_SB_LUT4_O_1_I2[0] +.sym 14575 rx_09_fifo.wr_addr_gray_SB_DFFESR_Q_7_D[0] +.sym 14576 rx_09_fifo.wr_addr_gray_SB_DFFESR_Q_7_D[3] +.sym 14577 rx_09_fifo.wr_addr[0] +.sym 14578 rx_09_fifo.wr_addr_gray_SB_DFFESR_Q_6_D[2] +.sym 14579 rx_09_fifo.wr_addr_gray[2] +.sym 14620 rx_09_fifo.wr_addr_SB_DFFESR_Q_E +.sym 14622 rx_09_fifo.wr_addr_gray_SB_DFFESR_Q_7_D[1] +.sym 14628 rx_09_fifo.rd_addr_gray_wr_r[5] +.sym 14650 rx_09_fifo.wr_addr_gray_SB_LUT4_I2_O[1] +.sym 14652 io_pmod_SB_DFFSR_Q_D_SB_LUT4_O_I0_SB_LUT4_O_I2_SB_LUT4_O_I1[3] +.sym 14654 io_pmod_SB_DFFSR_Q_D_SB_LUT4_O_I0_SB_LUT4_O_I2_SB_LUT4_O_1_I2[2] +.sym 14655 rx_09_fifo.wr_addr_gray_SB_LUT4_I2_O[6] +.sym 14656 rx_09_fifo.wr_addr_gray_SB_LUT4_I2_O[7] +.sym 14658 io_pmod_SB_DFFSR_Q_D_SB_LUT4_O_I0_SB_LUT4_O_2_I1_SB_LUT4_O_I2[1] +.sym 14659 io_pmod_SB_DFFSR_Q_D_SB_LUT4_O_I0_SB_LUT4_O_2_I1_SB_LUT4_O_I2[3] +.sym 14660 rx_09_fifo.wr_addr_gray_SB_LUT4_I2_O[3] +.sym 14661 rx_09_fifo.wr_addr_gray_SB_LUT4_I2_O[4] +.sym 14662 rx_09_fifo.wr_addr_gray_SB_LUT4_I2_O[5] +.sym 14665 rx_09_fifo.rd_addr_gray_wr_r[3] +.sym 14668 io_pmod_SB_DFFSR_Q_D_SB_LUT4_O_I0_SB_LUT4_O_2_I1_SB_LUT4_O_I2[2] +.sym 14669 io_pmod_SB_DFFSR_Q_D_SB_LUT4_O_I0_SB_LUT4_O_2_I1_SB_LUT4_O_I2[0] +.sym 14670 rx_09_fifo.wr_addr[0] +.sym 14676 rx_09_fifo.wr_addr_SB_DFFESR_Q_E +.sym 14682 rx_09_fifo.wr_addr_gray_SB_LUT4_I2_O[3] +.sym 14685 rx_09_fifo.wr_addr_gray_SB_LUT4_I2_O[4] +.sym 14689 rx_09_fifo.wr_addr_gray_SB_LUT4_I2_O[5] +.sym 14690 rx_09_fifo.wr_addr_gray_SB_LUT4_I2_O[4] +.sym 14695 rx_09_fifo.wr_addr_gray_SB_LUT4_I2_O[1] +.sym 14697 rx_09_fifo.wr_addr[0] +.sym 14700 io_pmod_SB_DFFSR_Q_D_SB_LUT4_O_I0_SB_LUT4_O_I2_SB_LUT4_O_I1[3] +.sym 14703 rx_09_fifo.rd_addr_gray_wr_r[3] +.sym 14706 io_pmod_SB_DFFSR_Q_D_SB_LUT4_O_I0_SB_LUT4_O_2_I1_SB_LUT4_O_I2[1] +.sym 14707 io_pmod_SB_DFFSR_Q_D_SB_LUT4_O_I0_SB_LUT4_O_2_I1_SB_LUT4_O_I2[2] +.sym 14708 io_pmod_SB_DFFSR_Q_D_SB_LUT4_O_I0_SB_LUT4_O_2_I1_SB_LUT4_O_I2[0] +.sym 14709 io_pmod_SB_DFFSR_Q_D_SB_LUT4_O_I0_SB_LUT4_O_2_I1_SB_LUT4_O_I2[3] +.sym 14712 rx_09_fifo.wr_addr_gray_SB_LUT4_I2_O[1] +.sym 14718 io_pmod_SB_DFFSR_Q_D_SB_LUT4_O_I0_SB_LUT4_O_2_I1_SB_LUT4_O_I2[1] +.sym 14719 io_pmod_SB_DFFSR_Q_D_SB_LUT4_O_I0_SB_LUT4_O_I2_SB_LUT4_O_1_I2[2] +.sym 14720 io_pmod_SB_DFFSR_Q_D_SB_LUT4_O_I0_SB_LUT4_O_2_I1_SB_LUT4_O_I2[0] +.sym 14721 io_pmod_SB_DFFSR_Q_D_SB_LUT4_O_I0_SB_LUT4_O_2_I1_SB_LUT4_O_I2[3] +.sym 14726 rx_09_fifo.wr_addr_gray_SB_LUT4_I2_O[7] +.sym 14727 rx_09_fifo.wr_addr_gray_SB_LUT4_I2_O[6] .sym 14728 rx_09_fifo.wr_addr_SB_DFFESR_Q_E .sym 14729 io_pmod[0]$SB_IO_IN_$glb_clk .sym 14730 w_soft_reset_$glb_sr -.sym 14732 rx_09_fifo.wr_addr_gray_SB_LUT4_I2_O[1] -.sym 14733 rx_09_fifo.wr_addr_gray_SB_LUT4_I2_O[2] -.sym 14734 rx_09_fifo.wr_addr_gray_SB_LUT4_I2_O[3] -.sym 14735 rx_09_fifo.wr_addr_gray_SB_LUT4_I2_O[4] -.sym 14736 io_pmod_SB_DFFSR_Q_D_SB_LUT4_O_I2_SB_LUT4_O_I0_SB_LUT4_O_I3[1] -.sym 14737 io_pmod_SB_DFFSR_Q_D_SB_LUT4_O_I2_SB_LUT4_O_I0_SB_LUT4_O_I3[2] -.sym 14738 rx_09_fifo.wr_addr_gray_SB_LUT4_I2_O[7] -.sym 14743 rx_09_fifo.wr_addr[6] -.sym 14745 rx_09_fifo.wr_addr_SB_DFFESR_Q_E -.sym 14747 w_soft_reset -.sym 14752 rx_09_fifo.rd_addr_gray_wr_r[7] -.sym 14754 rx_09_fifo.rd_addr_gray_wr_r[2] -.sym 14757 io_pmod_SB_DFFSR_Q_D_SB_LUT4_O_I2_SB_LUT4_O_1_I0_SB_LUT4_O_2_I0[0] -.sym 14758 io_pmod_SB_DFFSR_Q_D_SB_LUT4_O_I2_SB_LUT4_O_1_I0_SB_LUT4_O_1_I0[2] +.sym 14731 io_pmod_SB_DFFSR_Q_D_SB_LUT4_O_I0[0] +.sym 14732 rx_09_fifo.wr_addr_gray_SB_DFFESR_Q_5_D_SB_LUT4_I2_O[3] +.sym 14733 $io_pmod[6]$iobuf_i +.sym 14734 io_pmod_SB_DFFSR_Q_D_SB_LUT4_O_I0[1] +.sym 14735 io_pmod_SB_DFFSR_Q_D_SB_LUT4_O_I0[3] +.sym 14737 io_pmod_SB_DFFSR_Q_D_SB_LUT4_O_I0_SB_LUT4_O_1_I2[3] +.sym 14738 io_pmod_SB_DFFSR_Q_D_SB_LUT4_O_I0_SB_LUT4_O_2_I1[2] +.sym 14756 rx_09_fifo.wr_addr[7] +.sym 14760 rx_09_fifo.rd_addr_gray[0] +.sym 14761 rx_09_fifo.wr_addr[0] +.sym 14763 rx_09_fifo.wr_addr_SB_DFFESR_Q_E .sym 14772 rx_09_fifo.wr_addr_gray_SB_DFFESR_Q_4_D[1] -.sym 14780 rx_09_fifo.wr_addr_gray_SB_DFFESR_Q_7_D[3] -.sym 14781 rx_09_fifo.wr_addr[0] -.sym 14789 rx_09_fifo.wr_addr_gray_SB_LUT4_I2_O[1] -.sym 14799 rx_09_fifo.wr_addr_SB_DFFESR_Q_E -.sym 14801 io_pmod_SB_DFFSR_Q_D_SB_LUT4_O_I2_SB_LUT4_O_I0_SB_LUT4_O_I3[1] -.sym 14802 io_pmod_SB_DFFSR_Q_D_SB_LUT4_O_I2_SB_LUT4_O_I0_SB_LUT4_O_I3[2] -.sym 14803 rx_09_fifo.wr_addr_gray_SB_LUT4_I2_O[7] -.sym 14805 rx_09_fifo.wr_addr[0] -.sym 14806 rx_09_fifo.wr_addr_gray_SB_LUT4_I2_O[1] -.sym 14812 rx_09_fifo.wr_addr[0] -.sym 14820 rx_09_fifo.wr_addr_gray_SB_DFFESR_Q_7_D[3] -.sym 14829 rx_09_fifo.wr_addr_gray_SB_LUT4_I2_O[7] -.sym 14838 io_pmod_SB_DFFSR_Q_D_SB_LUT4_O_I2_SB_LUT4_O_I0_SB_LUT4_O_I3[1] -.sym 14841 io_pmod_SB_DFFSR_Q_D_SB_LUT4_O_I2_SB_LUT4_O_I0_SB_LUT4_O_I3[1] -.sym 14842 io_pmod_SB_DFFSR_Q_D_SB_LUT4_O_I2_SB_LUT4_O_I0_SB_LUT4_O_I3[2] -.sym 14848 rx_09_fifo.wr_addr_gray_SB_DFFESR_Q_4_D[1] +.sym 14773 rx_09_fifo.wr_addr_gray_SB_DFFESR_Q_4_D[2] +.sym 14774 rx_09_fifo.wr_addr_SB_DFFESR_Q_E +.sym 14775 io_pmod_SB_DFFSR_Q_D_SB_LUT4_O_I0_SB_LUT4_O_1_I2[1] +.sym 14778 io_pmod_SB_DFFSR_Q_D_SB_LUT4_O_I0_SB_LUT4_O_I2_SB_LUT4_O_I3[3] +.sym 14780 io_pmod_SB_DFFSR_Q_D_SB_LUT4_O_I0_SB_LUT4_O_I2_SB_LUT4_O_I3[0] +.sym 14781 rx_09_fifo.rd_addr_gray_wr_r[5] +.sym 14782 io_pmod_SB_DFFSR_Q_D_SB_LUT4_O_I0_SB_LUT4_O_1_I2[0] +.sym 14783 io_pmod[3]$SB_IO_IN +.sym 14785 io_pmod_SB_DFFSR_Q_D_SB_LUT4_O_I0_SB_LUT4_O_I2_SB_LUT4_O_I1_SB_LUT4_O_I3[1] +.sym 14786 io_pmod_SB_DFFSR_Q_D_SB_LUT4_O_I0_SB_LUT4_O_I2[1] +.sym 14788 rx_09_fifo.wr_addr_gray_SB_DFFESR_Q_7_D[1] +.sym 14793 io_pmod_SB_DFFSR_Q_D_SB_LUT4_O_I0_SB_LUT4_O_I2_SB_LUT4_O_I1[5] +.sym 14795 io_pmod_SB_DFFSR_Q_D_SB_LUT4_O_I0_SB_LUT4_O_I2[0] +.sym 14799 io_pmod_SB_DFFSR_Q_D_SB_LUT4_O_I0_SB_LUT4_O_I2_SB_LUT4_O_I1[3] +.sym 14800 io_pmod_SB_DFFSR_Q_D_SB_LUT4_O_I0_SB_LUT4_O_I2_SB_LUT4_O_I1[4] +.sym 14801 rx_09_fifo.rd_addr_gray_wr_r[3] +.sym 14808 io_pmod_SB_DFFSR_Q_D_SB_LUT4_O_I0_SB_LUT4_O_1_I2[0] +.sym 14814 rx_09_fifo.wr_addr_gray_SB_DFFESR_Q_7_D[1] +.sym 14818 io_pmod_SB_DFFSR_Q_D_SB_LUT4_O_I0_SB_LUT4_O_I2[1] +.sym 14820 io_pmod_SB_DFFSR_Q_D_SB_LUT4_O_I0_SB_LUT4_O_I2[0] +.sym 14823 io_pmod_SB_DFFSR_Q_D_SB_LUT4_O_I0_SB_LUT4_O_I2_SB_LUT4_O_I3[0] +.sym 14824 rx_09_fifo.wr_addr_gray_SB_DFFESR_Q_4_D[1] +.sym 14825 rx_09_fifo.wr_addr_gray_SB_DFFESR_Q_4_D[2] +.sym 14826 rx_09_fifo.rd_addr_gray_wr_r[3] +.sym 14835 io_pmod_SB_DFFSR_Q_D_SB_LUT4_O_I0_SB_LUT4_O_1_I2[1] +.sym 14838 io_pmod_SB_DFFSR_Q_D_SB_LUT4_O_I0_SB_LUT4_O_I2_SB_LUT4_O_I1_SB_LUT4_O_I3[1] +.sym 14841 io_pmod[3]$SB_IO_IN +.sym 14842 io_pmod_SB_DFFSR_Q_D_SB_LUT4_O_I0_SB_LUT4_O_I2_SB_LUT4_O_I1[5] +.sym 14843 rx_09_fifo.rd_addr_gray_wr_r[5] +.sym 14844 io_pmod_SB_DFFSR_Q_D_SB_LUT4_O_I0_SB_LUT4_O_I2_SB_LUT4_O_I1[4] +.sym 14847 io_pmod_SB_DFFSR_Q_D_SB_LUT4_O_I0_SB_LUT4_O_I2_SB_LUT4_O_I3[0] +.sym 14848 io_pmod_SB_DFFSR_Q_D_SB_LUT4_O_I0_SB_LUT4_O_I2_SB_LUT4_O_I3[3] +.sym 14849 io_pmod_SB_DFFSR_Q_D_SB_LUT4_O_I0_SB_LUT4_O_I2_SB_LUT4_O_I1[4] +.sym 14850 io_pmod_SB_DFFSR_Q_D_SB_LUT4_O_I0_SB_LUT4_O_I2_SB_LUT4_O_I1[3] .sym 14851 rx_09_fifo.wr_addr_SB_DFFESR_Q_E .sym 14852 io_pmod[0]$SB_IO_IN_$glb_clk .sym 14853 w_soft_reset_$glb_sr -.sym 14855 lvds_rx_09_inst.r_cnt[1] -.sym 14856 lvds_rx_09_inst.r_cnt[2] -.sym 14857 lvds_rx_09_inst.r_cnt[3] -.sym 14858 rx_09_fifo.wr_addr_gray_rd[4] -.sym 14859 rx_09_fifo.wr_addr_gray_rd[1] -.sym 14860 lvds_rx_09_inst.r_cnt[0] -.sym 14861 io_pmod_SB_DFFSR_Q_D_SB_LUT4_O_I2_SB_LUT4_O_1_I0_SB_LUT4_O_2_I0[0] -.sym 14868 i_smi_a3$SB_IO_IN -.sym 14899 rx_09_fifo.wr_addr[7] -.sym 14905 rx_09_fifo.wr_addr_gray[0] -.sym 14909 rx_09_fifo.wr_addr_gray[5] -.sym 14910 rx_09_fifo.wr_addr_gray[3] -.sym 14931 rx_09_fifo.wr_addr_gray[5] -.sym 14937 rx_09_fifo.wr_addr_gray[3] -.sym 14943 rx_09_fifo.wr_addr_gray[0] -.sym 14971 rx_09_fifo.wr_addr[7] -.sym 14975 w_clock_sys -.sym 14978 io_pmod_SB_DFFSR_Q_D_SB_LUT4_O_I2_SB_LUT4_O_1_I0_SB_LUT4_O_1_I0[2] -.sym 14979 lvds_rx_09_inst.r_cnt_SB_DFFNESR_Q_E -.sym 14980 rx_09_fifo.rd_addr_gray_wr[0] -.sym 14982 rx_09_fifo.rd_addr_gray_wr_r[0] -.sym 14983 rx_09_fifo.rd_addr_gray_wr[5] -.sym 14999 io_pmod[4]$SB_IO_IN -.sym 15009 io_pmod[2]$SB_IO_IN -.sym 15023 rx_09_fifo.wr_addr_gray_rd[1] -.sym 15026 rx_09_fifo.wr_addr_gray_rd[5] -.sym 15030 rx_09_fifo.wr_addr_gray_rd[4] -.sym 15033 rx_09_fifo.wr_addr_gray_rd[7] -.sym 15034 lvds_rx_09_inst.o_debug_state[1] -.sym 15041 lvds_rx_09_inst.o_debug_state[0] -.sym 15051 lvds_rx_09_inst.o_debug_state[1] -.sym 15052 lvds_rx_09_inst.o_debug_state[0] -.sym 15058 rx_09_fifo.wr_addr_gray_rd[7] -.sym 15064 rx_09_fifo.wr_addr_gray_rd[1] -.sym 15071 rx_09_fifo.wr_addr_gray_rd[5] -.sym 15076 rx_09_fifo.wr_addr_gray_rd[4] -.sym 15098 w_clock_sys -.sym 15100 lvds_rx_09_inst.o_debug_state[1] -.sym 15101 lvds_rx_09_inst.r_state_if_SB_DFFNESR_Q_E -.sym 15106 lvds_rx_09_inst.r_state_if_SB_DFFNESR_Q_E_SB_LUT4_O_I2[2] -.sym 15107 lvds_rx_09_inst.o_debug_state[0] -.sym 15111 i_smi_a1$SB_IO_IN -.sym 15118 lvds_rx_09_inst.r_phase_count_SB_LUT4_O_I3_SB_DFFNESR_Q_E +.sym 14860 w_rx_09_fifo_data[0] +.sym 14867 i_smi_a3$SB_IO_IN +.sym 14868 rx_09_fifo.wr_addr[2] +.sym 14881 lvds_rx_09_inst.o_debug_state[0] +.sym 14883 w_rx_09_fifo_data[0] +.sym 14888 lvds_rx_09_inst.r_data[3] +.sym 14899 rx_09_fifo.rd_addr_gray[5] +.sym 14915 rx_09_fifo.rd_addr_gray_wr[5] +.sym 14920 rx_09_fifo.rd_addr_gray[0] +.sym 14924 rx_09_fifo.rd_addr_gray_wr[0] +.sym 14937 rx_09_fifo.rd_addr_gray_wr[5] +.sym 14942 rx_09_fifo.rd_addr_gray_wr[0] +.sym 14954 rx_09_fifo.rd_addr_gray[5] +.sym 14959 rx_09_fifo.rd_addr_gray[0] +.sym 14975 io_pmod[0]$SB_IO_IN_$glb_clk +.sym 14977 lvds_rx_09_inst.r_data_SB_DFFESR_Q_31_D_SB_LUT4_O_I2[1] +.sym 14980 lvds_rx_09_inst.r_data[3] +.sym 14981 lvds_rx_09_inst.r_data_SB_DFFESR_Q_31_D_SB_LUT4_O_1_I2[1] +.sym 14982 lvds_rx_09_inst.r_data[1] +.sym 14983 lvds_rx_09_inst.r_data[0] +.sym 14988 spi_if_ins.o_load_cmd_SB_DFFESR_Q_D[2] +.sym 14993 smi_ctrl_ins.r_fifo_09_pull +.sym 15001 rx_09_fifo.wr_addr_SB_DFFESR_Q_E +.sym 15004 lvds_rx_09_inst.r_push +.sym 15008 lvds_rx_09_inst.r_data_SB_DFFESR_Q_31_D_SB_LUT4_O_I2_SB_LUT4_O_I3[3] +.sym 15009 io_pmod[6]$SB_IO_IN +.sym 15019 lvds_rx_09_inst.r_cnt[1] +.sym 15020 lvds_rx_09_inst.r_state_if_SB_DFFESR_Q_E_SB_LUT4_O_I2_SB_LUT4_I1_O[0] +.sym 15021 lvds_rx_09_inst.r_cnt[3] +.sym 15025 lvds_rx_09_inst.r_cnt[0] +.sym 15027 io_pmod[3]$SB_IO_IN +.sym 15033 lvds_rx_09_inst.r_cnt[0] +.sym 15036 w_soft_reset +.sym 15044 lvds_rx_09_inst.r_cnt[2] +.sym 15050 $nextpnr_ICESTORM_LC_1$O +.sym 15052 lvds_rx_09_inst.r_cnt[0] +.sym 15056 lvds_rx_09_inst.r_cnt_SB_DFFESR_Q_D_SB_LUT4_O_2_I3[2] +.sym 15059 lvds_rx_09_inst.r_cnt[1] +.sym 15060 lvds_rx_09_inst.r_cnt[0] +.sym 15062 lvds_rx_09_inst.r_cnt_SB_DFFESR_Q_D_SB_LUT4_O_2_I3[3] +.sym 15064 lvds_rx_09_inst.r_cnt[2] +.sym 15066 lvds_rx_09_inst.r_cnt_SB_DFFESR_Q_D_SB_LUT4_O_2_I3[2] +.sym 15069 lvds_rx_09_inst.r_cnt[3] +.sym 15072 lvds_rx_09_inst.r_cnt_SB_DFFESR_Q_D_SB_LUT4_O_2_I3[3] +.sym 15075 w_soft_reset +.sym 15077 io_pmod[3]$SB_IO_IN +.sym 15096 lvds_rx_09_inst.r_cnt[0] +.sym 15097 lvds_rx_09_inst.r_state_if_SB_DFFESR_Q_E_SB_LUT4_O_I2_SB_LUT4_I1_O[0] +.sym 15098 io_pmod[0]$SB_IO_IN_$glb_clk +.sym 15099 w_soft_reset_$glb_sr +.sym 15100 lvds_rx_09_inst.r_state_if_SB_DFFESR_Q_D[1] +.sym 15101 lvds_rx_09_inst.o_debug_state[0] +.sym 15103 lvds_rx_09_inst.r_state_if_SB_DFFESR_Q_E_SB_LUT4_O_I2_SB_LUT4_I0_O +.sym 15104 lvds_rx_09_inst.r_state_if_SB_DFFESR_Q_D_SB_LUT4_O_I2[1] +.sym 15105 lvds_rx_09_inst.o_debug_state[1] +.sym 15106 lvds_rx_09_inst.r_state_if_SB_DFFESR_Q_E_SB_LUT4_O_I0[0] +.sym 15111 spi_if_ins.state_if_SB_DFFESR_Q_R +.sym 15116 smi_ctrl_ins.soe_and_reset +.sym 15122 w_rx_09_fifo_data[1] +.sym 15124 spi_if_ins.o_load_cmd_SB_DFFESR_Q_D[2] .sym 15127 i_ss$SB_IO_IN -.sym 15135 spi_if_ins.r_tx_data_valid_SB_LUT4_I3_O -.sym 15143 rx_09_fifo.rd_addr_SB_DFFESR_Q_E -.sym 15144 rx_09_fifo.rd_addr_gray_SB_DFFESR_Q_6_D[3] -.sym 15146 rx_09_fifo.rd_addr_gray_SB_DFFESR_Q_5_D[1] -.sym 15147 rx_09_fifo.rd_addr_gray_SB_DFFESR_Q_6_D[0] -.sym 15151 rx_09_fifo.rd_addr_gray_SB_DFFESR_Q_6_D[2] -.sym 15152 rx_09_fifo.rd_addr_gray_SB_DFFESR_Q_6_D[1] -.sym 15153 io_pmod[4]$SB_IO_IN -.sym 15163 io_pmod_SB_DFFSS_Q_D_SB_LUT4_O_I0[1] -.sym 15164 w_soft_reset -.sym 15174 io_pmod_SB_DFFSS_Q_D_SB_LUT4_O_I0[1] -.sym 15180 rx_09_fifo.rd_addr_gray_SB_DFFESR_Q_6_D[3] -.sym 15181 rx_09_fifo.rd_addr_gray_SB_DFFESR_Q_6_D[1] -.sym 15182 rx_09_fifo.rd_addr_gray_SB_DFFESR_Q_6_D[2] -.sym 15183 rx_09_fifo.rd_addr_gray_SB_DFFESR_Q_6_D[0] -.sym 15187 io_pmod[4]$SB_IO_IN -.sym 15189 w_soft_reset -.sym 15198 rx_09_fifo.rd_addr_gray_SB_DFFESR_Q_6_D[0] -.sym 15211 rx_09_fifo.rd_addr_gray_SB_DFFESR_Q_6_D[3] -.sym 15218 rx_09_fifo.rd_addr_gray_SB_DFFESR_Q_5_D[1] -.sym 15220 rx_09_fifo.rd_addr_SB_DFFESR_Q_E -.sym 15221 w_clock_sys +.sym 15142 w_soft_reset +.sym 15143 lvds_rx_09_inst.r_push_SB_DFFESR_Q_E +.sym 15150 w_soft_reset +.sym 15152 lvds_rx_09_inst.r_state_if_SB_DFFESR_Q_E_SB_LUT4_O_I0[1] +.sym 15154 lvds_rx_09_inst.r_state_if_SB_DFFESR_Q_E_SB_LUT4_O_I2_SB_LUT4_I1_O[0] +.sym 15157 lvds_rx_09_inst.r_state_if_SB_DFFESR_Q_E_SB_LUT4_O_I2[0] +.sym 15158 lvds_rx_09_inst.o_debug_state[0] +.sym 15160 lvds_rx_09_inst.r_state_if_SB_DFFESR_Q_E_SB_LUT4_O_I0[2] +.sym 15161 lvds_rx_09_inst.r_state_if_SB_DFFESR_Q_D_SB_LUT4_O_I2[1] +.sym 15162 lvds_rx_09_inst.o_debug_state[1] +.sym 15168 lvds_rx_09_inst.r_data_SB_DFFESR_Q_31_D_SB_LUT4_O_I2_SB_LUT4_O_I3[3] +.sym 15169 io_pmod[6]$SB_IO_IN +.sym 15170 lvds_rx_09_inst.o_debug_state[1] +.sym 15171 lvds_rx_09_inst.r_state_if_SB_DFFESR_Q_E_SB_LUT4_O_I0[0] +.sym 15175 lvds_rx_09_inst.o_debug_state[0] +.sym 15176 lvds_rx_09_inst.r_data_SB_DFFESR_Q_31_D_SB_LUT4_O_I2_SB_LUT4_O_I3[3] +.sym 15181 lvds_rx_09_inst.r_state_if_SB_DFFESR_Q_E_SB_LUT4_O_I0[1] +.sym 15183 lvds_rx_09_inst.r_state_if_SB_DFFESR_Q_E_SB_LUT4_O_I2_SB_LUT4_I1_O[0] +.sym 15186 lvds_rx_09_inst.r_state_if_SB_DFFESR_Q_E_SB_LUT4_O_I0[1] +.sym 15187 w_soft_reset +.sym 15188 lvds_rx_09_inst.r_state_if_SB_DFFESR_Q_E_SB_LUT4_O_I2[0] +.sym 15189 lvds_rx_09_inst.r_state_if_SB_DFFESR_Q_E_SB_LUT4_O_I0[0] +.sym 15192 lvds_rx_09_inst.o_debug_state[1] +.sym 15193 lvds_rx_09_inst.r_data_SB_DFFESR_Q_31_D_SB_LUT4_O_I2_SB_LUT4_O_I3[3] +.sym 15194 lvds_rx_09_inst.o_debug_state[0] +.sym 15195 lvds_rx_09_inst.r_state_if_SB_DFFESR_Q_D_SB_LUT4_O_I2[1] +.sym 15198 w_soft_reset +.sym 15199 lvds_rx_09_inst.o_debug_state[1] +.sym 15200 lvds_rx_09_inst.r_state_if_SB_DFFESR_Q_E_SB_LUT4_O_I2[0] +.sym 15201 lvds_rx_09_inst.r_state_if_SB_DFFESR_Q_E_SB_LUT4_O_I0[2] +.sym 15205 w_soft_reset +.sym 15206 lvds_rx_09_inst.o_debug_state[1] +.sym 15207 lvds_rx_09_inst.r_state_if_SB_DFFESR_Q_E_SB_LUT4_O_I2[0] +.sym 15216 io_pmod[6]$SB_IO_IN +.sym 15218 lvds_rx_09_inst.o_debug_state[0] +.sym 15219 lvds_rx_09_inst.o_debug_state[1] +.sym 15220 lvds_rx_09_inst.r_push_SB_DFFESR_Q_E +.sym 15221 io_pmod[0]$SB_IO_IN_$glb_clk .sym 15222 w_soft_reset_$glb_sr -.sym 15223 spi_if_ins.r_tx_data_valid_SB_LUT4_I3_I2[2] -.sym 15224 spi_if_ins.spi.r_tx_byte_SB_DFFESR_Q_E_SB_LUT4_O_I2[1] -.sym 15226 i_ss_SB_LUT4_I1_O[1] -.sym 15227 spi_if_ins.spi.SCKr[2] -.sym 15228 lvds_rx_09_inst.r_phase_count_SB_LUT4_O_I3_SB_DFFNESR_Q_E_SB_LUT4_O_I2[0] -.sym 15229 lvds_rx_09_inst.r_phase_count_SB_LUT4_O_I3_SB_DFFNESR_Q_E_SB_LUT4_O_I2_SB_LUT4_I1_O -.sym 15230 spi_if_ins.spi.SCKr[1] -.sym 15240 lvds_rx_09_inst.o_debug_state[0] -.sym 15241 rx_09_fifo.rd_addr_SB_DFFESR_Q_E -.sym 15242 lvds_rx_09_inst.o_debug_state[1] -.sym 15244 lvds_rx_09_inst.r_state_if_SB_DFFNESR_Q_E -.sym 15250 w_soft_reset -.sym 15251 spi_if_ins.o_load_cmd_SB_DFFESR_Q_D_SB_LUT4_I2_O[0] -.sym 15254 spi_if_ins.spi.r_tx_byte_SB_DFFESR_Q_E -.sym 15264 lvds_rx_09_inst.o_debug_state[1] -.sym 15271 w_soft_reset -.sym 15272 spi_if_ins.o_load_cmd_SB_DFFESR_Q_D_SB_LUT4_I2_O_SB_LUT4_I3_O[1] -.sym 15277 spi_if_ins.o_load_cmd_SB_DFFESR_Q_D[1] -.sym 15278 io_pmod[3]$SB_IO_IN -.sym 15279 lvds_rx_09_inst.o_debug_state[0] -.sym 15291 spi_if_ins.state_if_SB_DFFE_Q_E -.sym 15327 w_soft_reset -.sym 15328 lvds_rx_09_inst.o_debug_state[1] -.sym 15329 io_pmod[3]$SB_IO_IN -.sym 15330 lvds_rx_09_inst.o_debug_state[0] -.sym 15334 spi_if_ins.o_load_cmd_SB_DFFESR_Q_D_SB_LUT4_I2_O_SB_LUT4_I3_O[1] -.sym 15343 spi_if_ins.state_if_SB_DFFE_Q_E +.sym 15224 lvds_rx_09_inst.r_phase_count_SB_LUT4_O_1_I3[1] +.sym 15225 lvds_rx_09_inst.r_phase_count_SB_LUT4_O_1_I3[2] +.sym 15226 lvds_rx_09_inst.r_data_SB_DFFESR_Q_31_D_SB_LUT4_O_I2_SB_LUT4_O_I3[3] +.sym 15227 lvds_rx_09_inst.r_phase_count_SB_LUT4_O_I3[2] +.sym 15228 lvds_rx_09_inst.r_phase_count_SB_LUT4_O_1_I3[0] +.sym 15229 lvds_rx_09_inst.r_phase_count[0] +.sym 15230 lvds_rx_09_inst.r_phase_count_SB_LUT4_O_I3[1] +.sym 15239 lvds_rx_09_inst.r_push_SB_DFFESR_Q_E +.sym 15243 $io_pmod[5]$iobuf_i +.sym 15249 spi_if_ins.spi.r_tx_byte_SB_DFFESR_Q_E_SB_LUT4_O_I2[1] +.sym 15257 w_soft_reset +.sym 15258 spi_if_ins.r_tx_data_valid_SB_LUT4_I3_O +.sym 15265 lvds_rx_09_inst.o_debug_state[0] +.sym 15266 sys_ctrl_ins.o_soft_reset_SB_DFFESS_Q_E +.sym 15277 lvds_rx_09_inst.o_debug_state[1] +.sym 15279 $PACKER_GND_NET +.sym 15284 sys_ctrl_ins.o_soft_reset_SB_DFFESS_Q_S +.sym 15306 $PACKER_GND_NET +.sym 15315 lvds_rx_09_inst.o_debug_state[0] +.sym 15316 lvds_rx_09_inst.o_debug_state[1] +.sym 15343 sys_ctrl_ins.o_soft_reset_SB_DFFESS_Q_E .sym 15344 w_clock_sys -.sym 15345 spi_if_ins.o_load_cmd_SB_DFFESR_Q_D[1] -.sym 15348 spi_if_ins.spi.r_tx_bit_count[2] -.sym 15349 spi_if_ins.r_tx_data_valid_SB_LUT4_I3_1_O[2] -.sym 15350 spi_if_ins.r_tx_data_valid_SB_LUT4_I3_1_O_SB_LUT4_O_I0_SB_LUT4_O_2_I0[3] -.sym 15351 spi_if_ins.r_tx_data_valid_SB_LUT4_I3_O -.sym 15352 spi_if_ins.spi.r_tx_bit_count_SB_DFFESR_Q_R -.sym 15353 spi_if_ins.r_tx_data_valid_SB_LUT4_I3_1_O_SB_LUT4_O_I0[2] -.sym 15376 w_soft_reset -.sym 15387 spi_if_ins.r_tx_data_valid_SB_LUT4_I3_1_O_SB_LUT4_O_I0_SB_LUT4_O_2_I0[1] -.sym 15388 spi_if_ins.spi.r_tx_byte[6] -.sym 15390 spi_if_ins.r_tx_data_valid_SB_LUT4_I3_1_O_SB_LUT4_O_I0_SB_LUT4_O_2_I0[0] -.sym 15391 spi_if_ins.spi.r_tx_byte[5] -.sym 15392 spi_if_ins.spi.r_tx_byte[1] -.sym 15395 spi_if_ins.r_tx_data_valid_SB_LUT4_I3_1_O_SB_LUT4_O_I0[0] -.sym 15396 spi_if_ins.spi.r_tx_byte_SB_DFFESR_Q_E_SB_LUT4_O_I2[1] -.sym 15397 spi_if_ins.spi.r_tx_byte[3] -.sym 15398 spi_if_ins.spi.r_tx_byte[7] -.sym 15399 $PACKER_GND_NET -.sym 15400 sys_ctrl_ins.o_soft_reset_SB_DFFESS_Q_S -.sym 15402 spi_if_ins.spi.r_tx_byte[2] -.sym 15405 spi_if_ins.spi.r_tx_bit_count[2] -.sym 15406 spi_if_ins.r_tx_data_valid_SB_LUT4_I3_1_O[2] -.sym 15414 sys_ctrl_ins.o_soft_reset_SB_DFFESS_Q_E -.sym 15415 spi_if_ins.r_tx_data_valid_SB_LUT4_I3_1_O_SB_LUT4_O_I0_SB_LUT4_O_2_I0[3] -.sym 15416 spi_if_ins.r_tx_data_valid_SB_LUT4_I3_1_O_SB_LUT4_O_I0[1] -.sym 15417 spi_if_ins.r_tx_data_valid_SB_LUT4_I3_1_O_SB_LUT4_O_I0[3] -.sym 15418 spi_if_ins.r_tx_data_valid_SB_LUT4_I3_1_O_SB_LUT4_O_I0[2] -.sym 15420 spi_if_ins.spi.r_tx_byte[7] -.sym 15421 spi_if_ins.r_tx_data_valid_SB_LUT4_I3_1_O_SB_LUT4_O_I0_SB_LUT4_O_2_I0[3] -.sym 15422 spi_if_ins.spi.r_tx_bit_count[2] -.sym 15423 spi_if_ins.spi.r_tx_byte[3] -.sym 15427 spi_if_ins.r_tx_data_valid_SB_LUT4_I3_1_O_SB_LUT4_O_I0[2] -.sym 15428 spi_if_ins.r_tx_data_valid_SB_LUT4_I3_1_O[2] -.sym 15429 spi_if_ins.spi.r_tx_byte_SB_DFFESR_Q_E_SB_LUT4_O_I2[1] -.sym 15432 spi_if_ins.r_tx_data_valid_SB_LUT4_I3_1_O_SB_LUT4_O_I0[1] -.sym 15433 spi_if_ins.r_tx_data_valid_SB_LUT4_I3_1_O_SB_LUT4_O_I0[3] -.sym 15434 spi_if_ins.r_tx_data_valid_SB_LUT4_I3_1_O_SB_LUT4_O_I0[2] -.sym 15435 spi_if_ins.r_tx_data_valid_SB_LUT4_I3_1_O_SB_LUT4_O_I0[0] -.sym 15438 spi_if_ins.spi.r_tx_byte[1] -.sym 15439 spi_if_ins.spi.r_tx_byte[5] -.sym 15441 spi_if_ins.spi.r_tx_bit_count[2] -.sym 15450 spi_if_ins.r_tx_data_valid_SB_LUT4_I3_1_O_SB_LUT4_O_I0_SB_LUT4_O_2_I0[3] -.sym 15451 spi_if_ins.spi.r_tx_bit_count[2] -.sym 15452 spi_if_ins.spi.r_tx_byte[6] -.sym 15453 spi_if_ins.spi.r_tx_byte[2] -.sym 15456 spi_if_ins.r_tx_data_valid_SB_LUT4_I3_1_O_SB_LUT4_O_I0_SB_LUT4_O_2_I0[1] -.sym 15457 spi_if_ins.r_tx_data_valid_SB_LUT4_I3_1_O_SB_LUT4_O_I0_SB_LUT4_O_2_I0[3] -.sym 15458 spi_if_ins.r_tx_data_valid_SB_LUT4_I3_1_O_SB_LUT4_O_I0[2] -.sym 15459 spi_if_ins.r_tx_data_valid_SB_LUT4_I3_1_O_SB_LUT4_O_I0_SB_LUT4_O_2_I0[0] -.sym 15462 $PACKER_GND_NET -.sym 15466 sys_ctrl_ins.o_soft_reset_SB_DFFESS_Q_E +.sym 15345 sys_ctrl_ins.o_soft_reset_SB_DFFESS_Q_S +.sym 15347 spi_if_ins.spi.r_rx_done +.sym 15348 spi_if_ins.r_tx_data_valid_SB_LUT4_I3_I2[2] +.sym 15351 spi_if_ins.spi.r_rx_done_SB_DFFESR_Q_E +.sym 15353 spi_if_ins.spi.r_tx_byte_SB_DFFESR_Q_E_SB_LUT4_O_I2[1] +.sym 15397 spi_if_ins.spi.r3_rx_done_SB_LUT4_I2_O +.sym 15421 spi_if_ins.spi.r3_rx_done_SB_LUT4_I2_O .sym 15467 w_clock_sys -.sym 15468 sys_ctrl_ins.o_soft_reset_SB_DFFESS_Q_S -.sym 15474 spi_if_ins.r_tx_data_valid_SB_LUT4_I3_1_O[2] -.sym 15475 int_miso -.sym 15482 spi_if_ins.spi.r_tx_bit_count_SB_DFFESR_Q_R -.sym 15490 smi_ctrl_ins.soe_and_reset -.sym 15494 spi_if_ins.o_load_cmd_SB_DFFESR_Q_D[1] -.sym 15498 $PACKER_VCC_NET -.sym 15511 spi_if_ins.r_tx_byte[4] -.sym 15512 spi_if_ins.spi.r_tx_bit_count[2] -.sym 15519 spi_if_ins.r_tx_byte[6] -.sym 15521 spi_if_ins.r_tx_byte[3] -.sym 15526 spi_if_ins.r_tx_byte[7] -.sym 15531 spi_if_ins.r_tx_byte[0] -.sym 15532 spi_if_ins.spi.r_tx_byte[0] -.sym 15533 spi_if_ins.spi.r_tx_byte[4] -.sym 15536 spi_if_ins.r_tx_byte[5] -.sym 15537 spi_if_ins.spi.r_tx_byte_SB_DFFESR_Q_E -.sym 15539 spi_if_ins.r_tx_data_valid_SB_LUT4_I3_1_O[2] -.sym 15540 spi_if_ins.r_tx_byte[1] -.sym 15543 spi_if_ins.spi.r_tx_byte[0] -.sym 15544 spi_if_ins.spi.r_tx_byte[4] -.sym 15545 spi_if_ins.spi.r_tx_bit_count[2] -.sym 15550 spi_if_ins.r_tx_byte[6] -.sym 15557 spi_if_ins.r_tx_byte[3] -.sym 15562 spi_if_ins.r_tx_byte[7] -.sym 15568 spi_if_ins.r_tx_byte[5] -.sym 15575 spi_if_ins.r_tx_byte[1] -.sym 15582 spi_if_ins.r_tx_byte[0] -.sym 15587 spi_if_ins.r_tx_byte[4] +.sym 15471 spi_if_ins.spi.r_tx_bit_count[2] +.sym 15472 spi_if_ins.spi.o_spi_miso_SB_DFFE_Q_D_SB_LUT4_O_I2_SB_LUT4_O_I0[3] +.sym 15473 spi_if_ins.spi.o_spi_miso_SB_DFFE_Q_D_SB_LUT4_O_I2_SB_LUT4_O_I0[2] +.sym 15474 spi_if_ins.spi.r_tx_byte_SB_DFFESR_Q_E +.sym 15475 spi_if_ins.spi.o_spi_miso_SB_DFFE_Q_D_SB_LUT4_O_I2[1] +.sym 15476 spi_if_ins.spi.o_spi_miso_SB_DFFE_Q_D_SB_LUT4_O_I2_SB_LUT4_O_I0_SB_LUT4_O_I3[2] +.sym 15481 spi_if_ins.o_load_cmd_SB_DFFESR_Q_D[2] +.sym 15495 spi_if_ins.spi.r3_rx_done_SB_LUT4_I2_O +.sym 15496 spi_if_ins.spi.r_tx_byte_SB_DFFESR_Q_E +.sym 15499 io_ctrl_ins.o_data_out_SB_DFFESR_Q_3_R[0] +.sym 15504 spi_if_ins.r_tx_data_valid_SB_DFFESR_Q_D_SB_LUT4_I3_O +.sym 15512 spi_if_ins.spi.r_tx_byte_SB_DFFESR_Q_E +.sym 15514 spi_if_ins.r_tx_data_valid_SB_LUT4_I3_1_O +.sym 15518 spi_if_ins.o_load_cmd_SB_DFFESR_Q_D[2] +.sym 15520 spi_if_ins.state_if[1] +.sym 15522 spi_if_ins.r_tx_data_valid_SB_LUT4_I3_1_O +.sym 15528 spi_if_ins.spi.r_tx_byte[1] +.sym 15531 spi_if_ins.r_tx_byte[5] +.sym 15532 spi_if_ins.state_if[0] +.sym 15533 spi_if_ins.r_tx_byte[1] +.sym 15536 spi_if_ins.spi.r_tx_bit_count[2] +.sym 15539 spi_if_ins.spi.r_tx_byte_SB_DFFESR_Q_E +.sym 15540 spi_if_ins.spi.r_tx_byte[5] +.sym 15541 spi_if_ins.spi.o_spi_miso_SB_DFFE_Q_D_SB_LUT4_O_I2_SB_LUT4_O_I0_SB_LUT4_O_I3[2] +.sym 15546 spi_if_ins.o_load_cmd_SB_DFFESR_Q_D[2] +.sym 15549 spi_if_ins.r_tx_data_valid_SB_LUT4_I3_1_O +.sym 15558 spi_if_ins.r_tx_byte[1] +.sym 15562 spi_if_ins.spi.r_tx_byte_SB_DFFESR_Q_E +.sym 15569 spi_if_ins.state_if[0] +.sym 15570 spi_if_ins.state_if[1] +.sym 15582 spi_if_ins.r_tx_byte[5] +.sym 15585 spi_if_ins.spi.r_tx_bit_count[2] +.sym 15586 spi_if_ins.spi.o_spi_miso_SB_DFFE_Q_D_SB_LUT4_O_I2_SB_LUT4_O_I0_SB_LUT4_O_I3[2] +.sym 15587 spi_if_ins.spi.r_tx_byte[5] +.sym 15588 spi_if_ins.spi.r_tx_byte[1] .sym 15589 spi_if_ins.spi.r_tx_byte_SB_DFFESR_Q_E .sym 15590 w_clock_sys -.sym 15591 spi_if_ins.r_tx_data_valid_SB_LUT4_I3_1_O[2] -.sym 15592 spi_if_ins.o_load_cmd_SB_DFFESR_Q_D_SB_LUT4_I2_O[1] -.sym 15594 spi_if_ins.spi.r_rx_byte_SB_DFFE_Q_E -.sym 15598 spi_if_ins.w_rx_data[6] -.sym 15599 spi_if_ins.w_rx_data[5] -.sym 15603 io_ctrl_ins.rx_h_state_SB_DFFE_Q_E -.sym 15605 spi_if_ins.r_tx_byte[6] -.sym 15607 spi_if_ins.r_tx_byte[3] -.sym 15623 spi_if_ins.r_tx_data_valid_SB_LUT4_I3_O -.sym 15638 spi_if_ins.spi.r3_rx_done -.sym 15642 spi_if_ins.spi.r2_rx_done -.sym 15645 spi_if_ins.spi.r_rx_done -.sym 15661 spi_if_ins.spi.r3_rx_done_SB_LUT4_I2_O -.sym 15672 spi_if_ins.spi.r_rx_done -.sym 15690 spi_if_ins.spi.r2_rx_done -.sym 15691 spi_if_ins.spi.r3_rx_done -.sym 15699 spi_if_ins.spi.r2_rx_done -.sym 15703 spi_if_ins.spi.r3_rx_done_SB_LUT4_I2_O +.sym 15591 spi_if_ins.r_tx_data_valid_SB_LUT4_I3_1_O +.sym 15592 spi_if_ins.spi.r_tx_byte[7] +.sym 15593 spi_if_ins.spi.o_spi_miso_SB_DFFE_Q_D_SB_LUT4_O_I2_SB_LUT4_O_I0[1] +.sym 15594 spi_if_ins.spi.r_tx_byte[6] +.sym 15595 spi_if_ins.spi.o_spi_miso_SB_DFFE_Q_D_SB_LUT4_O_I2_SB_LUT4_O_I0_SB_LUT4_O_I3[1] +.sym 15596 spi_if_ins.spi.o_spi_miso_SB_DFFE_Q_D_SB_LUT4_O_I2_SB_LUT4_O_I0_SB_LUT4_O_I3[0] +.sym 15597 spi_if_ins.spi.r_tx_byte[3] +.sym 15598 spi_if_ins.spi.r_tx_byte[2] +.sym 15599 spi_if_ins.spi.o_spi_miso_SB_DFFE_Q_D_SB_LUT4_O_I2_SB_LUT4_O_I0[0] +.sym 15603 i_smi_a1$SB_IO_IN +.sym 15609 $PACKER_VCC_NET +.sym 15617 spi_if_ins.r_tx_byte[5] +.sym 15618 spi_if_ins.w_rx_data[1] +.sym 15619 spi_if_ins.r_tx_byte[1] +.sym 15620 spi_if_ins.w_rx_data[2] +.sym 15621 spi_if_ins.o_load_cmd_SB_DFFESR_Q_D[1] +.sym 15622 spi_if_ins.w_rx_data[4] +.sym 15623 spi_if_ins.r_tx_byte[6] +.sym 15624 spi_if_ins.o_load_cmd_SB_DFFESR_Q_D[2] +.sym 15625 spi_if_ins.r_tx_byte[3] +.sym 15627 spi_if_ins.o_load_cmd_SB_LUT4_I2_O_SB_LUT4_I3_O_SB_LUT4_I3_1_O +.sym 15635 spi_if_ins.o_ioc_SB_DFFE_Q_E[1] +.sym 15637 spi_if_ins.o_load_cmd_SB_DFFESR_Q_D[1] +.sym 15638 spi_if_ins.state_if[0] +.sym 15640 spi_if_ins.o_fetch_cmd_SB_DFFESR_Q_E +.sym 15641 spi_if_ins.o_load_cmd_SB_DFFESR_Q_D[2] +.sym 15651 spi_if_ins.state_if[1] +.sym 15653 spi_if_ins.o_load_cmd_SB_DFFESR_Q_D[2] +.sym 15655 spi_if_ins.state_if[2] +.sym 15659 spi_if_ins.state_if[1] +.sym 15660 spi_if_ins.state_if_SB_DFFE_Q_E +.sym 15661 spi_if_ins.o_load_cmd_SB_DFFESR_Q_D[0] +.sym 15666 spi_if_ins.o_ioc_SB_DFFE_Q_E[1] +.sym 15667 spi_if_ins.o_load_cmd_SB_DFFESR_Q_D[2] +.sym 15669 spi_if_ins.o_load_cmd_SB_DFFESR_Q_D[0] +.sym 15678 spi_if_ins.o_load_cmd_SB_DFFESR_Q_D[1] +.sym 15679 spi_if_ins.o_load_cmd_SB_DFFESR_Q_D[2] +.sym 15680 spi_if_ins.state_if[2] +.sym 15684 spi_if_ins.o_fetch_cmd_SB_DFFESR_Q_E +.sym 15690 spi_if_ins.state_if[2] +.sym 15691 spi_if_ins.state_if[1] +.sym 15693 spi_if_ins.state_if[0] +.sym 15703 spi_if_ins.o_load_cmd_SB_DFFESR_Q_D[0] +.sym 15708 spi_if_ins.state_if[0] +.sym 15709 spi_if_ins.state_if[2] +.sym 15710 spi_if_ins.o_load_cmd_SB_DFFESR_Q_D[2] +.sym 15711 spi_if_ins.state_if[1] +.sym 15712 spi_if_ins.state_if_SB_DFFE_Q_E .sym 15713 w_clock_sys -.sym 15719 spi_if_ins.spi.r_rx_byte[2] -.sym 15720 spi_if_ins.spi.r_rx_byte[1] -.sym 15721 spi_if_ins.spi.r_rx_byte[5] -.sym 15722 spi_if_ins.spi.r_rx_byte[3] -.sym 15723 spi_if_ins.spi.r3_rx_done_SB_LUT4_I2_O -.sym 15727 $PACKER_VCC_NET -.sym 15737 spi_if_ins.spi.r3_rx_done_SB_LUT4_I2_O -.sym 15741 i_button_SB_LUT4_I3_O[1] -.sym 15747 sys_ctrl_ins.o_data_out_SB_DFFE_Q_E -.sym 15758 sys_ctrl_ins.o_data_out_SB_DFFE_Q_E -.sym 15760 w_cs[0] -.sym 15761 w_fetch -.sym 15785 io_ctrl_ins.led0_state_SB_LUT4_I3_O[1] -.sym 15786 smi_ctrl_ins.o_data_out_SB_DFFESS_Q_E_SB_LUT4_O_I3[0] -.sym 15789 w_cs[0] -.sym 15790 smi_ctrl_ins.o_data_out_SB_DFFESS_Q_E_SB_LUT4_O_I3[0] -.sym 15792 w_fetch -.sym 15803 io_ctrl_ins.led0_state_SB_LUT4_I3_O[1] -.sym 15835 sys_ctrl_ins.o_data_out_SB_DFFE_Q_E +.sym 15714 spi_if_ins.o_load_cmd_SB_DFFESR_Q_D[2] +.sym 15715 spi_if_ins.w_rx_data[2] +.sym 15716 spi_if_ins.w_rx_data[4] +.sym 15717 spi_if_ins.w_rx_data[6] +.sym 15720 spi_if_ins.r_tx_data_valid_SB_DFFESR_Q_D_SB_LUT4_I3_O +.sym 15721 spi_if_ins.w_rx_data[5] +.sym 15722 spi_if_ins.w_rx_data[1] +.sym 15727 spi_if_ins.r_tx_data_valid_SB_DFFESR_Q_E +.sym 15737 spi_if_ins.r_tx_data_valid_SB_DFFESR_Q_D[1] +.sym 15739 spi_if_ins.r_tx_byte[2] +.sym 15741 io_ctrl_ins.tr_vc_2_state_SB_LUT4_I1_I3[1] +.sym 15746 r_tx_data[1] +.sym 15747 o_rx_h_tx_l_b$SB_IO_OUT +.sym 15750 spi_if_ins.o_load_cmd_SB_LUT4_I2_O_SB_LUT4_I3_O_SB_LUT4_I3_O +.sym 15767 spi_if_ins.o_load_cmd_SB_DFFESR_Q_E +.sym 15776 spi_if_ins.state_if_SB_DFFESR_Q_R +.sym 15781 spi_if_ins.o_load_cmd_SB_DFFESR_Q_D[1] +.sym 15782 spi_if_ins.w_rx_data[6] +.sym 15786 spi_if_ins.w_rx_data[5] +.sym 15807 spi_if_ins.w_rx_data[5] +.sym 15809 spi_if_ins.w_rx_data[6] +.sym 15822 spi_if_ins.o_load_cmd_SB_DFFESR_Q_D[1] +.sym 15835 spi_if_ins.o_load_cmd_SB_DFFESR_Q_E .sym 15836 w_clock_sys -.sym 15840 w_tx_data_io[5] -.sym 15843 io_ctrl_ins.o_data_out_SB_DFFESS_Q_S -.sym 15844 w_tx_data_io[7] -.sym 15864 spi_if_ins.o_cs_SB_LUT4_I3_1_O -.sym 15865 io_ctrl_ins.o_data_out_SB_DFFESS_Q_S -.sym 15866 smi_ctrl_ins.o_data_out_SB_LUT4_I0_O[1] -.sym 15867 w_tx_data_io[7] -.sym 15869 sys_ctrl_ins.o_data_out_SB_DFFE_Q_E_SB_LUT4_O_I1_SB_LUT4_I2_O[2] -.sym 15870 i_button$SB_IO_IN -.sym 15873 io_ctrl_ins.tr_vc_1_state_SB_LUT4_I3_O[2] -.sym 15884 io_ctrl_ins.o_data_out_SB_DFFESR_Q_3_R[0] -.sym 15886 io_ctrl_ins.tr_vc_2_state_SB_LUT4_I1_I3[3] -.sym 15889 spi_if_ins.o_fetch_cmd_SB_LUT4_I3_O_SB_LUT4_I3_O[0] -.sym 15892 spi_if_ins.spi.r_rx_byte[1] -.sym 15893 smi_ctrl_ins.o_data_out_SB_DFFESS_Q_E_SB_LUT4_O_I3[0] -.sym 15894 spi_if_ins.spi.r_rx_byte[3] -.sym 15897 spi_if_ins.spi.r3_rx_done_SB_LUT4_I2_O -.sym 15905 spi_if_ins.o_load_cmd_SB_LUT4_I2_O_SB_LUT4_I3_O_SB_LUT4_I3_1_O -.sym 15910 w_ioc[1] -.sym 15912 spi_if_ins.spi.r_rx_byte[3] -.sym 15930 spi_if_ins.o_load_cmd_SB_LUT4_I2_O_SB_LUT4_I3_O_SB_LUT4_I3_1_O -.sym 15942 smi_ctrl_ins.o_data_out_SB_DFFESS_Q_E_SB_LUT4_O_I3[0] -.sym 15944 io_ctrl_ins.tr_vc_2_state_SB_LUT4_I1_I3[3] -.sym 15945 w_ioc[1] -.sym 15948 spi_if_ins.spi.r_rx_byte[1] -.sym 15954 io_ctrl_ins.o_data_out_SB_DFFESR_Q_3_R[0] -.sym 15956 spi_if_ins.o_fetch_cmd_SB_LUT4_I3_O_SB_LUT4_I3_O[0] -.sym 15958 spi_if_ins.spi.r3_rx_done_SB_LUT4_I2_O +.sym 15837 spi_if_ins.state_if_SB_DFFESR_Q_R +.sym 15838 spi_if_ins.r_tx_byte[5] +.sym 15839 spi_if_ins.r_tx_byte[1] +.sym 15840 spi_if_ins.r_tx_byte[0] +.sym 15841 spi_if_ins.r_tx_byte[6] +.sym 15842 spi_if_ins.r_tx_byte[3] +.sym 15843 spi_if_ins.r_tx_byte[7] +.sym 15844 spi_if_ins.r_tx_byte[2] +.sym 15845 spi_if_ins.r_tx_byte[4] +.sym 15859 spi_if_ins.w_rx_data[4] +.sym 15890 sys_ctrl_ins.o_data_out_SB_DFFE_Q_D[2] +.sym 15893 w_rx_data[4] +.sym 15896 w_rx_data[7] +.sym 15897 spi_if_ins.o_load_cmd_SB_LUT4_I2_O_SB_LUT4_I3_O_SB_LUT4_I3_1_O +.sym 15898 w_rx_data[5] +.sym 15901 io_ctrl_ins.tr_vc_2_state_SB_LUT4_I1_I3[1] +.sym 15902 w_rx_data[6] +.sym 15904 io_ctrl_ins.led0_state_SB_LUT4_I3_O[1] +.sym 15905 io_ctrl_ins.pmod_dir_state[6] +.sym 15907 o_rx_h_tx_l_b$SB_IO_OUT +.sym 15909 spi_if_ins.o_fetch_cmd_SB_LUT4_I3_O[2] +.sym 15910 smi_ctrl_ins.o_data_out_SB_DFFESS_Q_E_SB_LUT4_O_I3[0] +.sym 15915 w_rx_data[7] +.sym 15918 w_rx_data[5] +.sym 15925 w_rx_data[6] +.sym 15936 io_ctrl_ins.tr_vc_2_state_SB_LUT4_I1_I3[1] +.sym 15938 smi_ctrl_ins.o_data_out_SB_DFFESS_Q_E_SB_LUT4_O_I3[0] +.sym 15939 spi_if_ins.o_fetch_cmd_SB_LUT4_I3_O[2] +.sym 15951 w_rx_data[4] +.sym 15954 io_ctrl_ins.pmod_dir_state[6] +.sym 15955 sys_ctrl_ins.o_data_out_SB_DFFE_Q_D[2] +.sym 15956 o_rx_h_tx_l_b$SB_IO_OUT +.sym 15957 io_ctrl_ins.led0_state_SB_LUT4_I3_O[1] +.sym 15958 spi_if_ins.o_load_cmd_SB_LUT4_I2_O_SB_LUT4_I3_O_SB_LUT4_I3_1_O .sym 15959 w_clock_sys -.sym 15962 io_ctrl_ins.pmod_dir_state[5] -.sym 15964 i_button_SB_LUT4_I3_O[2] -.sym 15965 io_ctrl_ins.pmod_dir_state[7] -.sym 15966 io_ctrl_ins.tr_vc_1_state_SB_LUT4_I3_O[3] -.sym 15967 io_ctrl_ins.tr_vc_2_state_SB_LUT4_I1_O[2] -.sym 15968 io_ctrl_ins.led0_state_SB_LUT4_I3_O[0] -.sym 15971 lvds_rx_09_inst.o_fifo_data_SB_DFFNE_Q_E -.sym 15985 io_ctrl_ins.o_pmod[5] -.sym 15986 io_ctrl_ins.rf_pin_state[6] -.sym 16004 spi_if_ins.r_tx_data_valid_SB_DFFESR_Q_D_SB_LUT4_I3_O -.sym 16009 w_ioc[1] -.sym 16012 io_ctrl_ins.led0_state_SB_LUT4_I3_O[1] -.sym 16013 w_ioc[0] -.sym 16014 o_rx_h_tx_l$SB_IO_OUT -.sym 16017 io_ctrl_ins.rx_h_b_state_SB_LUT4_I0_I2[1] -.sym 16018 r_tx_data[3] -.sym 16022 io_ctrl_ins.pmod_dir_state[7] -.sym 16024 smi_ctrl_ins.o_data_out_SB_DFFESS_Q_E_SB_LUT4_O_I3[0] -.sym 16025 io_ctrl_ins.tr_vc_2_state_SB_LUT4_I1_I3[3] -.sym 16030 r_tx_data[4] -.sym 16033 r_tx_data[6] -.sym 16042 w_ioc[0] -.sym 16043 w_ioc[1] -.sym 16044 smi_ctrl_ins.o_data_out_SB_DFFESS_Q_E_SB_LUT4_O_I3[0] -.sym 16047 io_ctrl_ins.pmod_dir_state[7] -.sym 16048 o_rx_h_tx_l$SB_IO_OUT -.sym 16049 io_ctrl_ins.rx_h_b_state_SB_LUT4_I0_I2[1] -.sym 16050 io_ctrl_ins.led0_state_SB_LUT4_I3_O[1] -.sym 16056 r_tx_data[3] -.sym 16059 r_tx_data[6] -.sym 16066 smi_ctrl_ins.o_data_out_SB_DFFESS_Q_E_SB_LUT4_O_I3[0] -.sym 16067 w_ioc[1] -.sym 16068 w_ioc[0] -.sym 16072 r_tx_data[4] -.sym 16077 io_ctrl_ins.tr_vc_2_state_SB_LUT4_I1_I3[3] -.sym 16080 w_ioc[0] -.sym 16081 spi_if_ins.r_tx_data_valid_SB_DFFESR_Q_D_SB_LUT4_I3_O +.sym 15963 io_ctrl_ins.tr_vc_1_state_SB_LUT4_I3_O[2] +.sym 15964 w_tx_data_io[5] +.sym 15965 w_tx_data_io[6] +.sym 15967 io_ctrl_ins.o_data_out_SB_DFFESR_Q_3_E +.sym 15968 w_tx_data_io[7] +.sym 15981 w_rx_data[4] +.sym 15988 r_tx_data[0] +.sym 15990 io_ctrl_ins.o_data_out_SB_DFFESR_Q_3_R[0] +.sym 15992 spi_if_ins.r_tx_data_valid_SB_DFFESR_Q_D_SB_LUT4_I3_O +.sym 15994 io_ctrl_ins.pmod_dir_state[4] +.sym 15996 io_ctrl_ins.tr_vc_2_state_SB_LUT4_I1_O[2] +.sym 16002 io_ctrl_ins.pmod_dir_state[7] +.sym 16003 io_ctrl_ins.led0_state_SB_LUT4_I3_O[1] +.sym 16004 o_tr_vc1$SB_IO_OUT +.sym 16005 sys_ctrl_ins.o_data_out_SB_DFFE_Q_D[2] +.sym 16011 io_ctrl_ins.pmod_dir_state[5] +.sym 16015 w_rx_data[2] +.sym 16018 w_rx_data[7] +.sym 16020 spi_if_ins.o_load_cmd_SB_LUT4_I2_O_SB_LUT4_I3_O_SB_LUT4_I3_O +.sym 16024 io_ctrl_ins.tr_vc_2_state_SB_LUT4_I1_I3[1] +.sym 16027 o_rx_h_tx_l$SB_IO_OUT +.sym 16030 w_rx_data[4] +.sym 16031 w_rx_data[5] +.sym 16033 w_ioc[0] +.sym 16035 o_rx_h_tx_l$SB_IO_OUT +.sym 16036 io_ctrl_ins.led0_state_SB_LUT4_I3_O[1] +.sym 16037 io_ctrl_ins.pmod_dir_state[7] +.sym 16038 sys_ctrl_ins.o_data_out_SB_DFFE_Q_D[2] +.sym 16042 w_rx_data[5] +.sym 16050 w_rx_data[4] +.sym 16054 w_ioc[0] +.sym 16056 io_ctrl_ins.tr_vc_2_state_SB_LUT4_I1_I3[1] +.sym 16059 io_ctrl_ins.pmod_dir_state[5] +.sym 16060 io_ctrl_ins.led0_state_SB_LUT4_I3_O[1] +.sym 16061 o_tr_vc1$SB_IO_OUT +.sym 16062 sys_ctrl_ins.o_data_out_SB_DFFE_Q_D[2] +.sym 16071 w_rx_data[7] +.sym 16080 w_rx_data[2] +.sym 16081 spi_if_ins.o_load_cmd_SB_LUT4_I2_O_SB_LUT4_I3_O_SB_LUT4_I3_O .sym 16082 w_clock_sys -.sym 16084 r_tx_data[3] -.sym 16085 io_ctrl_ins.o_data_out_SB_DFFESR_Q_3_R[0] -.sym 16086 io_ctrl_ins.led0_state_SB_LUT4_I3_O[3] -.sym 16087 io_ctrl_ins.rx_h_b_state_SB_LUT4_I0_I2[2] -.sym 16088 r_tx_data[4] -.sym 16089 io_ctrl_ins.tr_vc_1_state_SB_LUT4_I3_O[2] -.sym 16090 io_ctrl_ins.tr_vc_2_state_SB_LUT4_I1_O[3] -.sym 16091 r_tx_data[6] -.sym 16109 io_ctrl_ins.o_data_out_SB_DFFESR_Q_3_R[1] -.sym 16118 w_rx_data[4] -.sym 16119 io_ctrl_ins.rx_h_b_state_SB_LUT4_I0_I2[1] -.sym 16128 w_rx_data[6] -.sym 16130 w_rx_data[2] -.sym 16132 w_rx_data[1] -.sym 16140 io_ctrl_ins.rx_h_b_state_SB_LUT4_I0_I2[1] -.sym 16143 spi_if_ins.o_load_cmd_SB_LUT4_I2_O_SB_LUT4_I3_O_SB_LUT4_I3_2_O -.sym 16145 spi_if_ins.o_load_cmd_SB_LUT4_I2_O_SB_LUT4_I3_O[1] -.sym 16152 w_ioc[0] -.sym 16164 w_rx_data[1] -.sym 16170 io_ctrl_ins.rx_h_b_state_SB_LUT4_I0_I2[1] -.sym 16172 spi_if_ins.o_load_cmd_SB_LUT4_I2_O_SB_LUT4_I3_O[1] -.sym 16179 w_ioc[0] -.sym 16183 w_rx_data[2] -.sym 16195 w_rx_data[6] -.sym 16203 w_ioc[0] -.sym 16204 spi_if_ins.o_load_cmd_SB_LUT4_I2_O_SB_LUT4_I3_O_SB_LUT4_I3_2_O +.sym 16087 spi_if_ins.o_load_cmd_SB_LUT4_I2_O_SB_LUT4_I3_O_SB_LUT4_I3_2_O +.sym 16088 w_tx_data_io[4] +.sym 16089 i_button_SB_LUT4_I3_O[2] +.sym 16091 io_ctrl_ins.rx_h_b_state_SB_LUT4_I3_O[2] +.sym 16106 io_ctrl_ins.o_data_out_SB_DFFESR_Q_3_R[1] +.sym 16113 o_rx_h_tx_l$SB_IO_OUT +.sym 16119 io_ctrl_ins.o_data_out_SB_DFFESS_Q_E[2] +.sym 16126 spi_if_ins.o_load_cmd_SB_LUT4_I2_O_SB_LUT4_I3_O[1] +.sym 16127 spi_if_ins.o_load_cmd_SB_LUT4_I2_O_SB_LUT4_I3_O_SB_LUT4_I3_O +.sym 16128 w_rx_data[3] +.sym 16129 w_rx_data[4] +.sym 16130 io_ctrl_ins.tr_vc_2_state_SB_LUT4_I1_I3[1] +.sym 16131 w_ioc[0] +.sym 16136 sys_ctrl_ins.o_data_out_SB_DFFE_Q_D[2] +.sym 16140 w_rx_data[6] +.sym 16143 io_ctrl_ins.o_pmod[3] +.sym 16147 w_rx_data[0] +.sym 16149 o_tr_vc2$SB_IO_OUT +.sym 16155 w_ioc[1] +.sym 16156 smi_ctrl_ins.o_data_out_SB_DFFESS_Q_E_SB_LUT4_O_I3[0] +.sym 16158 smi_ctrl_ins.o_data_out_SB_DFFESS_Q_E_SB_LUT4_O_I3[0] +.sym 16160 w_ioc[0] +.sym 16161 w_ioc[1] +.sym 16167 w_rx_data[4] +.sym 16173 w_rx_data[3] +.sym 16176 io_ctrl_ins.tr_vc_2_state_SB_LUT4_I1_I3[1] +.sym 16177 w_ioc[0] +.sym 16178 o_tr_vc2$SB_IO_OUT +.sym 16179 io_ctrl_ins.o_pmod[3] +.sym 16184 w_rx_data[0] +.sym 16188 spi_if_ins.o_load_cmd_SB_LUT4_I2_O_SB_LUT4_I3_O[1] +.sym 16189 sys_ctrl_ins.o_data_out_SB_DFFE_Q_D[2] +.sym 16194 w_ioc[0] +.sym 16195 w_ioc[1] +.sym 16196 smi_ctrl_ins.o_data_out_SB_DFFESS_Q_E_SB_LUT4_O_I3[0] +.sym 16203 w_rx_data[6] +.sym 16204 spi_if_ins.o_load_cmd_SB_LUT4_I2_O_SB_LUT4_I3_O_SB_LUT4_I3_O .sym 16205 w_clock_sys -.sym 16207 io_ctrl_ins.rx_h_state_SB_DFFE_Q_D_SB_LUT4_O_I3[2] -.sym 16208 io_ctrl_ins.rf_pin_state[3] -.sym 16209 io_ctrl_ins.rf_pin_state[7] -.sym 16210 io_ctrl_ins.tr_vc_1_b_state_SB_LUT4_I1_O[2] -.sym 16211 io_ctrl_ins.rf_pin_state[4] -.sym 16212 io_ctrl_ins.debug_mode_SB_LUT4_I2_O[2] -.sym 16213 io_ctrl_ins.rf_pin_state[0] -.sym 16214 io_ctrl_ins.led0_state_SB_LUT4_I3_O[2] -.sym 16223 io_ctrl_ins.led0_state_SB_LUT4_I3_O[1] -.sym 16236 w_rx_data[5] -.sym 16238 w_rx_data[7] -.sym 16240 i_config[3]$SB_IO_IN -.sym 16249 io_ctrl_ins.debug_mode[1] -.sym 16251 io_ctrl_ins.debug_mode_SB_LUT4_I2_O[1] -.sym 16252 w_rx_data[0] -.sym 16257 io_ctrl_ins.debug_mode[1] -.sym 16258 w_rx_data[2] -.sym 16259 w_rx_data[3] -.sym 16266 spi_if_ins.o_load_cmd_SB_LUT4_I2_O_SB_LUT4_I2_O -.sym 16273 io_ctrl_ins.debug_mode[0] -.sym 16274 o_led0$SB_IO_OUT -.sym 16277 io_ctrl_ins.rf_mode[2] -.sym 16278 w_rx_data[4] -.sym 16282 w_rx_data[2] -.sym 16288 w_rx_data[0] -.sym 16302 w_rx_data[3] -.sym 16306 o_led0$SB_IO_OUT -.sym 16311 w_rx_data[4] -.sym 16317 io_ctrl_ins.debug_mode[0] -.sym 16318 io_ctrl_ins.debug_mode[1] -.sym 16319 io_ctrl_ins.rf_mode[2] -.sym 16320 io_ctrl_ins.debug_mode_SB_LUT4_I2_O[1] -.sym 16324 io_ctrl_ins.debug_mode[1] -.sym 16326 io_ctrl_ins.debug_mode[0] -.sym 16327 spi_if_ins.o_load_cmd_SB_LUT4_I2_O_SB_LUT4_I2_O +.sym 16207 io_ctrl_ins.rf_pin_state[4] +.sym 16209 io_ctrl_ins.rf_pin_state[6] +.sym 16211 io_ctrl_ins.rf_pin_state[7] +.sym 16212 io_ctrl_ins.rf_pin_state[5] +.sym 16214 io_ctrl_ins.tr_vc_1_b_state_SB_LUT4_I1_O[3] +.sym 16221 io_ctrl_ins.tr_vc_1_b_state_SB_LUT4_I1_O[2] +.sym 16227 io_ctrl_ins.led0_state_SB_LUT4_I3_O[1] +.sym 16231 o_rx_h_tx_l_b$SB_IO_OUT +.sym 16232 i_config[3]$SB_IO_IN +.sym 16236 i_button$SB_IO_IN +.sym 16239 o_rx_h_tx_l$SB_IO_OUT +.sym 16249 io_ctrl_ins.debug_mode[0] +.sym 16250 io_ctrl_ins.tr_vc_2_state_SB_LUT4_I1_I3[1] +.sym 16251 io_ctrl_ins.debug_mode_SB_LUT4_I2_O[0] +.sym 16252 io_ctrl_ins.o_pmod[0] +.sym 16255 w_rx_data[1] +.sym 16257 io_ctrl_ins.debug_mode[0] +.sym 16258 io_ctrl_ins.mixer_en_state +.sym 16259 spi_if_ins.o_load_cmd_SB_LUT4_I2_O_SB_LUT4_I3_O_SB_LUT4_I3_2_O +.sym 16260 io_ctrl_ins.debug_mode[1] +.sym 16261 io_ctrl_ins.debug_mode_SB_LUT4_I2_O[1] +.sym 16262 io_ctrl_ins.debug_mode_SB_LUT4_I2_O[3] +.sym 16267 w_ioc[0] +.sym 16268 io_ctrl_ins.debug_mode_SB_LUT4_I2_O[2] +.sym 16269 w_rx_data[2] +.sym 16275 w_rx_data[3] +.sym 16278 w_rx_data[0] +.sym 16283 w_rx_data[3] +.sym 16289 w_rx_data[0] +.sym 16293 io_ctrl_ins.o_pmod[0] +.sym 16294 io_ctrl_ins.mixer_en_state +.sym 16295 io_ctrl_ins.tr_vc_2_state_SB_LUT4_I1_I3[1] +.sym 16296 w_ioc[0] +.sym 16299 w_rx_data[2] +.sym 16306 w_rx_data[1] +.sym 16311 io_ctrl_ins.debug_mode_SB_LUT4_I2_O[0] +.sym 16312 io_ctrl_ins.debug_mode_SB_LUT4_I2_O[2] +.sym 16313 io_ctrl_ins.debug_mode[1] +.sym 16314 io_ctrl_ins.debug_mode[0] +.sym 16318 io_ctrl_ins.debug_mode[0] +.sym 16320 io_ctrl_ins.debug_mode[1] +.sym 16323 io_ctrl_ins.debug_mode_SB_LUT4_I2_O[3] +.sym 16324 io_ctrl_ins.debug_mode_SB_LUT4_I2_O[1] +.sym 16325 io_ctrl_ins.debug_mode_SB_LUT4_I2_O[0] +.sym 16326 io_ctrl_ins.debug_mode_SB_LUT4_I2_O[2] +.sym 16327 spi_if_ins.o_load_cmd_SB_LUT4_I2_O_SB_LUT4_I3_O_SB_LUT4_I3_2_O .sym 16328 w_clock_sys -.sym 16329 w_soft_reset_$glb_sr -.sym 16334 io_ctrl_ins.mixer_en_state -.sym 16342 io_ctrl_ins.rf_mode[0] -.sym 16344 io_ctrl_ins.rf_mode[2] -.sym 16350 io_ctrl_ins.debug_mode_SB_LUT4_I2_O[1] -.sym 16361 io_ctrl_ins.rf_mode[2] -.sym 16362 i_button$SB_IO_IN -.sym 16373 io_ctrl_ins.rf_pin_state[1] -.sym 16374 io_ctrl_ins.debug_mode_SB_LUT4_I2_O[1] -.sym 16376 io_ctrl_ins.rf_mode[2] -.sym 16379 io_ctrl_ins.rf_pin_state[2] -.sym 16382 io_ctrl_ins.debug_mode_SB_LUT4_I2_O[1] -.sym 16386 io_ctrl_ins.debug_mode_SB_LUT4_I2_O[3] -.sym 16398 io_ctrl_ins.rx_h_state_SB_DFFE_Q_E -.sym 16404 io_ctrl_ins.debug_mode_SB_LUT4_I2_O[1] -.sym 16405 io_ctrl_ins.rf_mode[2] -.sym 16406 io_ctrl_ins.debug_mode_SB_LUT4_I2_O[3] -.sym 16407 io_ctrl_ins.rf_pin_state[2] -.sym 16447 io_ctrl_ins.rf_pin_state[1] -.sym 16448 io_ctrl_ins.debug_mode_SB_LUT4_I2_O[1] -.sym 16449 io_ctrl_ins.debug_mode_SB_LUT4_I2_O[3] -.sym 16450 io_ctrl_ins.rx_h_state_SB_DFFE_Q_E +.sym 16332 o_rx_h_tx_l$SB_IO_OUT +.sym 16336 o_rx_h_tx_l_b$SB_IO_OUT +.sym 16344 io_ctrl_ins.debug_mode_SB_LUT4_I0_O +.sym 16346 w_rx_data[6] +.sym 16348 w_rx_data[7] +.sym 16354 o_tr_vc2$SB_IO_OUT +.sym 16357 w_rx_data[5] +.sym 16360 spi_if_ins.o_load_cmd_SB_LUT4_I2_O_SB_LUT4_I3_O_SB_LUT4_I3_2_O +.sym 16364 w_rx_data[0] +.sym 16372 io_ctrl_ins.rf_pin_state[0] +.sym 16373 io_ctrl_ins.debug_mode_SB_LUT4_I0_O +.sym 16374 io_ctrl_ins.rf_pin_state[2] +.sym 16375 io_ctrl_ins.debug_mode_SB_LUT4_I2_O[2] +.sym 16379 io_ctrl_ins.rf_pin_state[3] +.sym 16383 io_ctrl_ins.rf_pin_state[1] +.sym 16385 io_ctrl_ins.debug_mode_SB_LUT4_I2_O[3] +.sym 16390 io_ctrl_ins.debug_mode_SB_LUT4_I2_O[0] +.sym 16398 io_ctrl_ins.debug_mode_SB_LUT4_I2_O[0] +.sym 16400 io_ctrl_ins.debug_mode_SB_LUT4_I2_O[1] +.sym 16404 io_ctrl_ins.debug_mode_SB_LUT4_I2_O[0] +.sym 16405 io_ctrl_ins.rf_pin_state[2] +.sym 16406 io_ctrl_ins.debug_mode_SB_LUT4_I2_O[2] +.sym 16407 io_ctrl_ins.debug_mode_SB_LUT4_I2_O[3] +.sym 16410 io_ctrl_ins.debug_mode_SB_LUT4_I2_O[3] +.sym 16411 io_ctrl_ins.debug_mode_SB_LUT4_I2_O[2] +.sym 16412 io_ctrl_ins.debug_mode_SB_LUT4_I2_O[0] +.sym 16413 io_ctrl_ins.debug_mode_SB_LUT4_I2_O[1] +.sym 16416 io_ctrl_ins.debug_mode_SB_LUT4_I2_O[2] +.sym 16417 io_ctrl_ins.rf_pin_state[0] +.sym 16418 io_ctrl_ins.debug_mode_SB_LUT4_I2_O[0] +.sym 16419 io_ctrl_ins.debug_mode_SB_LUT4_I2_O[3] +.sym 16428 io_ctrl_ins.debug_mode_SB_LUT4_I2_O[2] +.sym 16429 io_ctrl_ins.rf_pin_state[3] +.sym 16430 io_ctrl_ins.debug_mode_SB_LUT4_I2_O[0] +.sym 16431 io_ctrl_ins.debug_mode_SB_LUT4_I2_O[3] +.sym 16440 io_ctrl_ins.debug_mode_SB_LUT4_I2_O[2] +.sym 16441 io_ctrl_ins.rf_pin_state[1] +.sym 16443 io_ctrl_ins.debug_mode_SB_LUT4_I2_O[3] +.sym 16450 io_ctrl_ins.debug_mode_SB_LUT4_I0_O .sym 16451 w_clock_sys .sym 16453 i_config[3]$SB_IO_IN .sym 16455 i_button$SB_IO_IN -.sym 16467 o_led0$SB_IO_OUT -.sym 16470 io_ctrl_ins.rx_h_state_SB_DFFE_Q_E -.sym 16497 lvds_rx_09_inst.o_fifo_data_SB_DFFNE_Q_E -.sym 16521 lvds_rx_09_inst.o_fifo_data_SB_DFFNE_Q_E -.sym 16596 rx_09_fifo.wr_addr_gray_SB_DFFESR_Q_6_D[1] -.sym 16599 io_pmod_SB_DFFSR_Q_D_SB_LUT4_O_I2_SB_LUT4_O_1_I0_SB_LUT4_O_2_I0[1] -.sym 16611 rx_09_fifo.rd_addr_gray_wr_r[4] -.sym 16612 rx_09_fifo.wr_addr[2] -.sym 16616 rx_09_fifo.wr_addr_gray_SB_DFFESR_Q_6_D[3] -.sym 16619 r_counter -.sym 16622 io_pmod_SB_DFFSR_Q_D_SB_LUT4_O_I2_SB_LUT4_O_1_I0_SB_LUT4_O_2_I0[3] -.sym 16629 r_counter -.sym 16634 rx_09_fifo.wr_addr_gray_SB_DFFESR_Q_6_D[1] -.sym 16635 rx_09_fifo.rd_addr_gray_wr_r[4] -.sym 16636 rx_09_fifo.wr_addr_gray_SB_DFFESR_Q_6_D[3] -.sym 16637 io_pmod_SB_DFFSR_Q_D_SB_LUT4_O_I2_SB_LUT4_O_1_I0_SB_LUT4_O_2_I0[1] -.sym 16665 rx_09_fifo.wr_addr[2] -.sym 16666 io_pmod_SB_DFFSR_Q_D_SB_LUT4_O_I2_SB_LUT4_O_1_I0_SB_LUT4_O_2_I0[3] -.sym 16675 i_glob_clock$SB_IO_IN_$glb_clk -.sym 16681 rx_09_fifo.wr_addr_gray[1] -.sym 16684 rx_09_fifo.wr_addr_gray[4] -.sym 16686 rx_09_fifo.wr_addr_gray_SB_DFFESR_Q_6_D[3] -.sym 16687 rx_09_fifo.wr_addr_gray[6] -.sym 16727 io_pmod[6]$SB_IO_IN -.sym 16729 io_pmod[3]$SB_IO_IN -.sym 16730 io_smi_data[4]$SB_IO_OUT -.sym 16737 io_pmod_SB_DFFSR_Q_D_SB_LUT4_O_I2_SB_LUT4_O_1_I0_SB_LUT4_O_3_I3[0] +.sym 16469 o_led0$SB_IO_OUT +.sym 16479 io_ctrl_ins.debug_mode_SB_LUT4_I0_O +.sym 16595 rx_09_fifo.wr_addr[5] +.sym 16598 rx_09_fifo.wr_addr[4] +.sym 16603 rx_09_fifo.wr_addr[7] +.sym 16604 rx_09_fifo.wr_addr[2] +.sym 16605 rx_09_fifo.wr_addr[3] +.sym 16607 rx_09_fifo.wr_addr[6] +.sym 16608 rx_09_fifo.wr_addr[0] +.sym 16616 io_pmod_SB_DFFSR_Q_D_SB_LUT4_O_I0_SB_LUT4_O_I2_SB_LUT4_O_I1_SB_LUT4_O_I3[1] +.sym 16627 $nextpnr_ICESTORM_LC_4$O +.sym 16630 rx_09_fifo.wr_addr[0] +.sym 16633 rx_09_fifo.wr_addr_gray_SB_LUT4_I2_I3[2] +.sym 16636 io_pmod_SB_DFFSR_Q_D_SB_LUT4_O_I0_SB_LUT4_O_I2_SB_LUT4_O_I1_SB_LUT4_O_I3[1] +.sym 16637 rx_09_fifo.wr_addr[0] +.sym 16639 rx_09_fifo.wr_addr_gray_SB_LUT4_I2_I3[3] +.sym 16642 rx_09_fifo.wr_addr[2] +.sym 16643 rx_09_fifo.wr_addr_gray_SB_LUT4_I2_I3[2] +.sym 16645 rx_09_fifo.wr_addr_gray_SB_LUT4_I2_I3[4] +.sym 16648 rx_09_fifo.wr_addr[3] +.sym 16649 rx_09_fifo.wr_addr_gray_SB_LUT4_I2_I3[3] +.sym 16651 rx_09_fifo.wr_addr_gray_SB_LUT4_I2_I3[5] +.sym 16653 rx_09_fifo.wr_addr[4] +.sym 16655 rx_09_fifo.wr_addr_gray_SB_LUT4_I2_I3[4] +.sym 16657 rx_09_fifo.wr_addr_gray_SB_LUT4_I2_I3[6] +.sym 16659 rx_09_fifo.wr_addr[5] +.sym 16661 rx_09_fifo.wr_addr_gray_SB_LUT4_I2_I3[5] +.sym 16663 rx_09_fifo.wr_addr_gray_SB_LUT4_I2_I3[7] +.sym 16665 rx_09_fifo.wr_addr[6] +.sym 16667 rx_09_fifo.wr_addr_gray_SB_LUT4_I2_I3[6] +.sym 16670 rx_09_fifo.wr_addr[7] +.sym 16673 rx_09_fifo.wr_addr_gray_SB_LUT4_I2_I3[7] +.sym 16686 rx_09_fifo.wr_addr_gray[5] +.sym 16693 rx_09_fifo.wr_addr[7] +.sym 16719 io_smi_data[4]$SB_IO_OUT +.sym 16722 io_pmod[6]$SB_IO_IN +.sym 16723 io_pmod[3]$SB_IO_IN +.sym 16725 rx_09_fifo.rd_addr_gray_wr_r[7] .sym 16759 rx_09_fifo.wr_addr_gray_SB_LUT4_I2_O[1] -.sym 16760 rx_09_fifo.rd_addr_gray_wr_r[7] .sym 16761 rx_09_fifo.wr_addr_gray_SB_LUT4_I2_O[3] -.sym 16762 rx_09_fifo.rd_addr_gray_wr_r[2] -.sym 16763 io_pmod_SB_DFFSR_Q_D_SB_LUT4_O_I2_SB_LUT4_O_I0[2] .sym 16765 rx_09_fifo.wr_addr_gray_SB_LUT4_I2_O[7] -.sym 16766 rx_09_fifo.wr_addr_gray_SB_DFFESR_Q_7_D[0] -.sym 16767 io_pmod_SB_DFFSR_Q_D_SB_LUT4_O_I2_SB_LUT4_O_I0[0] +.sym 16767 rx_09_fifo.wr_addr_gray_SB_DFFESR_Q_5_D[0] .sym 16768 rx_09_fifo.wr_addr_gray_SB_LUT4_I2_O[2] -.sym 16769 io_pmod_SB_DFFSR_Q_D_SB_LUT4_O_I2_SB_LUT4_O_1_I0_SB_LUT4_O_3_I3[0] -.sym 16770 io_pmod_SB_DFFSR_Q_D_SB_LUT4_O_I2_SB_LUT4_O_I0[3] -.sym 16771 io_pmod_SB_DFFSR_Q_D_SB_LUT4_O_I2_SB_LUT4_O_I0_SB_LUT4_O_I3[1] -.sym 16772 io_pmod_SB_DFFSR_Q_D_SB_LUT4_O_I2_SB_LUT4_O_I0_SB_LUT4_O_I3[2] -.sym 16773 io_pmod_SB_DFFSR_Q_D_SB_LUT4_O_I2_SB_LUT4_O_I0[1] -.sym 16774 rx_09_fifo.wr_addr_gray_SB_DFFESR_Q_7_D[3] -.sym 16775 rx_09_fifo.rd_addr_gray_wr_r[6] -.sym 16777 io_pmod_SB_DFFSR_Q_D_SB_LUT4_O_I2_SB_LUT4_O_I0_SB_LUT4_O_I3[3] -.sym 16778 rx_09_fifo.wr_addr_gray_SB_DFFESR_Q_4_D[1] -.sym 16780 io_pmod_SB_DFFSR_Q_D_SB_LUT4_O_I2[2] -.sym 16781 rx_09_fifo.wr_addr_gray_SB_DFFESR_Q_4_D[2] -.sym 16782 io_pmod[6]$SB_IO_IN -.sym 16785 io_pmod[3]$SB_IO_IN -.sym 16786 io_pmod_SB_DFFSR_Q_D_SB_LUT4_O_I2[1] -.sym 16788 rx_09_fifo.rd_addr_gray_wr_r[0] -.sym 16789 io_pmod_SB_DFFSR_Q_D_SB_LUT4_O_I2_SB_LUT4_O_1_I0_SB_LUT4_O_1_I0[2] -.sym 16792 rx_09_fifo.wr_addr_gray_SB_LUT4_I2_O[2] -.sym 16794 rx_09_fifo.wr_addr_gray_SB_LUT4_I2_O[3] -.sym 16797 rx_09_fifo.wr_addr_gray_SB_LUT4_I2_O[1] -.sym 16799 rx_09_fifo.wr_addr_gray_SB_LUT4_I2_O[2] -.sym 16803 io_pmod[3]$SB_IO_IN -.sym 16804 io_pmod_SB_DFFSR_Q_D_SB_LUT4_O_I2[1] -.sym 16805 io_pmod_SB_DFFSR_Q_D_SB_LUT4_O_I2[2] -.sym 16809 rx_09_fifo.wr_addr_gray_SB_LUT4_I2_O[7] -.sym 16810 rx_09_fifo.rd_addr_gray_wr_r[7] -.sym 16811 io_pmod[6]$SB_IO_IN -.sym 16812 io_pmod[3]$SB_IO_IN -.sym 16815 io_pmod_SB_DFFSR_Q_D_SB_LUT4_O_I2_SB_LUT4_O_I0_SB_LUT4_O_I3[1] -.sym 16816 io_pmod_SB_DFFSR_Q_D_SB_LUT4_O_I2_SB_LUT4_O_I0_SB_LUT4_O_I3[2] -.sym 16817 io_pmod_SB_DFFSR_Q_D_SB_LUT4_O_I2_SB_LUT4_O_1_I0_SB_LUT4_O_1_I0[2] -.sym 16818 io_pmod_SB_DFFSR_Q_D_SB_LUT4_O_I2_SB_LUT4_O_I0_SB_LUT4_O_I3[3] -.sym 16821 rx_09_fifo.wr_addr_gray_SB_DFFESR_Q_4_D[2] -.sym 16822 io_pmod_SB_DFFSR_Q_D_SB_LUT4_O_I2_SB_LUT4_O_1_I0_SB_LUT4_O_3_I3[0] -.sym 16823 rx_09_fifo.rd_addr_gray_wr_r[6] -.sym 16824 rx_09_fifo.wr_addr_gray_SB_DFFESR_Q_4_D[1] -.sym 16827 io_pmod_SB_DFFSR_Q_D_SB_LUT4_O_I2_SB_LUT4_O_I0[0] -.sym 16828 io_pmod_SB_DFFSR_Q_D_SB_LUT4_O_I2_SB_LUT4_O_I0[3] -.sym 16829 io_pmod_SB_DFFSR_Q_D_SB_LUT4_O_I2_SB_LUT4_O_I0[1] -.sym 16830 io_pmod_SB_DFFSR_Q_D_SB_LUT4_O_I2_SB_LUT4_O_I0[2] -.sym 16833 rx_09_fifo.rd_addr_gray_wr_r[0] -.sym 16834 rx_09_fifo.wr_addr_gray_SB_DFFESR_Q_7_D[3] -.sym 16835 rx_09_fifo.wr_addr_gray_SB_DFFESR_Q_7_D[0] -.sym 16836 rx_09_fifo.rd_addr_gray_wr_r[2] +.sym 16770 io_pmod_SB_DFFSR_Q_D_SB_LUT4_O_I0_SB_LUT4_O_2_I1_SB_LUT4_O_I2[0] +.sym 16771 rx_09_fifo.wr_addr_gray_SB_LUT4_I2_O[5] +.sym 16772 rx_09_fifo.wr_addr_gray_SB_LUT4_I2_O[6] +.sym 16777 rx_09_fifo.rd_addr_gray_wr_r[5] +.sym 16778 io_pmod[3]$SB_IO_IN +.sym 16779 io_pmod[6]$SB_IO_IN +.sym 16780 rx_09_fifo.rd_addr_gray_wr_r[7] +.sym 16785 rx_09_fifo.wr_addr_SB_DFFESR_Q_E +.sym 16787 rx_09_fifo.wr_addr[0] +.sym 16791 rx_09_fifo.wr_addr_gray_SB_DFFESR_Q_5_D[0] +.sym 16792 io_pmod_SB_DFFSR_Q_D_SB_LUT4_O_I0_SB_LUT4_O_2_I1_SB_LUT4_O_I2[0] +.sym 16797 rx_09_fifo.wr_addr_gray_SB_LUT4_I2_O[2] +.sym 16799 rx_09_fifo.wr_addr_gray_SB_LUT4_I2_O[3] +.sym 16804 rx_09_fifo.wr_addr_gray_SB_LUT4_I2_O[1] +.sym 16806 rx_09_fifo.wr_addr_gray_SB_LUT4_I2_O[2] +.sym 16809 rx_09_fifo.wr_addr_gray_SB_LUT4_I2_O[6] +.sym 16810 rx_09_fifo.wr_addr_gray_SB_LUT4_I2_O[5] +.sym 16811 rx_09_fifo.rd_addr_gray_wr_r[5] +.sym 16815 rx_09_fifo.rd_addr_gray_wr_r[7] +.sym 16816 io_pmod[6]$SB_IO_IN +.sym 16817 io_pmod[3]$SB_IO_IN +.sym 16818 rx_09_fifo.wr_addr_gray_SB_LUT4_I2_O[7] +.sym 16822 rx_09_fifo.wr_addr[0] +.sym 16827 rx_09_fifo.wr_addr_gray_SB_LUT4_I2_O[5] +.sym 16828 rx_09_fifo.wr_addr_gray_SB_LUT4_I2_O[6] +.sym 16834 rx_09_fifo.wr_addr_gray_SB_DFFESR_Q_5_D[0] +.sym 16837 rx_09_fifo.wr_addr_SB_DFFESR_Q_E .sym 16838 io_pmod[0]$SB_IO_IN_$glb_clk .sym 16839 w_soft_reset_$glb_sr -.sym 16840 rx_09_fifo.wr_addr_gray_rd[6] -.sym 16842 rx_09_fifo.wr_addr_gray_rd[1] -.sym 16843 rx_09_fifo.wr_addr_gray_rd[4] -.sym 16844 rx_09_fifo.wr_addr_gray_SB_DFFESR_Q_4_D[1] -.sym 16847 rx_09_fifo.wr_addr_gray_SB_DFFESR_Q_4_D[2] -.sym 16865 $io_pmod[6]$iobuf_i -.sym 16867 lvds_rx_09_inst.r_state_if_SB_DFFNESR_Q_E_SB_LUT4_O_I2[1] -.sym 16874 rx_09_fifo.rd_addr_gray_wr_r[0] -.sym 16875 lvds_rx_09_inst.r_data[1] -.sym 16890 rx_09_fifo.wr_addr[0] -.sym 16893 rx_09_fifo.wr_addr[7] -.sym 16894 rx_09_fifo.wr_addr[5] -.sym 16900 io_pmod_SB_DFFSR_Q_D_SB_LUT4_O_I2_SB_LUT4_O_1_I0_SB_LUT4_O_2_I0[3] -.sym 16901 rx_09_fifo.wr_addr[4] -.sym 16905 rx_09_fifo.wr_addr[6] -.sym 16906 rx_09_fifo.wr_addr[2] -.sym 16911 rx_09_fifo.wr_addr[3] -.sym 16913 $nextpnr_ICESTORM_LC_4$O -.sym 16916 rx_09_fifo.wr_addr[0] -.sym 16919 rx_09_fifo.wr_addr_gray_SB_LUT4_I2_I3[2] -.sym 16922 io_pmod_SB_DFFSR_Q_D_SB_LUT4_O_I2_SB_LUT4_O_1_I0_SB_LUT4_O_2_I0[3] -.sym 16923 rx_09_fifo.wr_addr[0] -.sym 16925 rx_09_fifo.wr_addr_gray_SB_LUT4_I2_I3[3] -.sym 16928 rx_09_fifo.wr_addr[2] -.sym 16929 rx_09_fifo.wr_addr_gray_SB_LUT4_I2_I3[2] -.sym 16931 rx_09_fifo.wr_addr_gray_SB_LUT4_I2_I3[4] -.sym 16934 rx_09_fifo.wr_addr[3] -.sym 16935 rx_09_fifo.wr_addr_gray_SB_LUT4_I2_I3[3] -.sym 16937 rx_09_fifo.wr_addr_gray_SB_LUT4_I2_I3[5] -.sym 16940 rx_09_fifo.wr_addr[4] -.sym 16941 rx_09_fifo.wr_addr_gray_SB_LUT4_I2_I3[4] -.sym 16943 rx_09_fifo.wr_addr_gray_SB_LUT4_I2_I3[6] -.sym 16945 rx_09_fifo.wr_addr[5] -.sym 16947 rx_09_fifo.wr_addr_gray_SB_LUT4_I2_I3[5] -.sym 16949 rx_09_fifo.wr_addr_gray_SB_LUT4_I2_I3[7] -.sym 16951 rx_09_fifo.wr_addr[6] -.sym 16953 rx_09_fifo.wr_addr_gray_SB_LUT4_I2_I3[6] -.sym 16958 rx_09_fifo.wr_addr[7] -.sym 16959 rx_09_fifo.wr_addr_gray_SB_LUT4_I2_I3[7] -.sym 16969 lvds_rx_09_inst.r_data[2] -.sym 16976 io_pmod[3]$SB_IO_IN -.sym 16992 lvds_rx_09_inst.r_data[2] -.sym 17005 lvds_rx_09_inst.r_cnt[1] -.sym 17006 lvds_rx_09_inst.r_cnt_SB_DFFNESR_Q_E -.sym 17007 lvds_rx_09_inst.r_cnt[3] -.sym 17009 rx_09_fifo.rd_addr_gray_wr_r[0] -.sym 17010 lvds_rx_09_inst.r_cnt[0] -.sym 17014 rx_09_fifo.wr_addr_gray_rd[1] -.sym 17015 rx_09_fifo.wr_addr_gray_rd[4] -.sym 17021 rx_09_fifo.wr_addr[0] -.sym 17022 lvds_rx_09_inst.r_cnt[2] -.sym 17036 $nextpnr_ICESTORM_LC_1$O -.sym 17039 lvds_rx_09_inst.r_cnt[0] -.sym 17042 lvds_rx_09_inst.r_cnt_SB_DFFNESR_Q_D_SB_LUT4_O_I3[2] -.sym 17045 lvds_rx_09_inst.r_cnt[1] -.sym 17046 lvds_rx_09_inst.r_cnt[0] -.sym 17048 lvds_rx_09_inst.r_cnt_SB_DFFNESR_Q_D_SB_LUT4_O_I3[3] -.sym 17051 lvds_rx_09_inst.r_cnt[2] -.sym 17052 lvds_rx_09_inst.r_cnt_SB_DFFNESR_Q_D_SB_LUT4_O_I3[2] -.sym 17057 lvds_rx_09_inst.r_cnt[3] -.sym 17058 lvds_rx_09_inst.r_cnt_SB_DFFNESR_Q_D_SB_LUT4_O_I3[3] -.sym 17063 rx_09_fifo.wr_addr_gray_rd[4] -.sym 17067 rx_09_fifo.wr_addr_gray_rd[1] -.sym 17073 lvds_rx_09_inst.r_cnt[0] -.sym 17079 rx_09_fifo.wr_addr[0] -.sym 17081 rx_09_fifo.rd_addr_gray_wr_r[0] -.sym 17083 lvds_rx_09_inst.r_cnt_SB_DFFNESR_Q_E +.sym 16844 rx_09_fifo.wr_addr_gray_rd[2] +.sym 16845 rx_09_fifo.wr_addr_gray_rd[5] +.sym 16858 io_pmod_SB_DFFSR_Q_D_SB_LUT4_O_I0_SB_LUT4_O_2_I1_SB_LUT4_O_I2[0] +.sym 16871 rx_09_fifo.wr_addr_SB_DFFESR_Q_E +.sym 16881 rx_09_fifo.wr_addr_gray_SB_DFFESR_Q_5_D_SB_LUT4_I2_O[0] +.sym 16883 io_pmod_SB_DFFSR_Q_D_SB_LUT4_O_I0[2] +.sym 16884 rx_09_fifo.wr_addr_gray_SB_DFFESR_Q_7_D[0] +.sym 16885 rx_09_fifo.wr_addr_gray_SB_DFFESR_Q_7_D[3] +.sym 16886 rx_09_fifo.wr_addr[0] +.sym 16887 rx_09_fifo.wr_addr_gray_SB_DFFESR_Q_6_D[2] +.sym 16889 io_pmod_SB_DFFSR_Q_D_SB_LUT4_O_I0[0] +.sym 16891 io_pmod_SB_DFFSR_Q_D_SB_LUT4_O_I0_SB_LUT4_O_1_I2[0] +.sym 16892 io_pmod_SB_DFFSR_Q_D_SB_LUT4_O_I0_SB_LUT4_O_1_I2[2] +.sym 16895 io_pmod_SB_DFFSR_Q_D_SB_LUT4_O_I0_SB_LUT4_O_2_I1[0] +.sym 16896 io_pmod_SB_DFFSR_Q_D_SB_LUT4_O_I0_SB_LUT4_O_2_I1[2] +.sym 16898 rx_09_fifo.wr_addr_gray_SB_DFFESR_Q_5_D_SB_LUT4_I2_O[3] +.sym 16899 rx_09_fifo.rd_addr_gray_wr_r[0] +.sym 16900 io_pmod_SB_DFFSR_Q_D_SB_LUT4_O_I0[1] +.sym 16901 io_pmod_SB_DFFSR_Q_D_SB_LUT4_O_I0[3] +.sym 16902 io_pmod_SB_DFFSR_Q_D_SB_LUT4_O_I0_SB_LUT4_O_I2_SB_LUT4_O_I1_SB_LUT4_O_I3[1] +.sym 16903 io_pmod_SB_DFFSR_Q_D_SB_LUT4_O_I0_SB_LUT4_O_1_I2[3] +.sym 16904 rx_09_fifo.wr_addr_gray_SB_DFFESR_Q_5_D_SB_LUT4_I2_O[1] +.sym 16906 rx_09_fifo.rd_addr_gray_wr_r[5] +.sym 16907 rx_09_fifo.wr_addr_gray_SB_DFFESR_Q_7_D[1] +.sym 16909 io_pmod_SB_DFFSR_Q_D_SB_LUT4_O_I0_SB_LUT4_O_2_I1[1] +.sym 16910 rx_09_fifo.rd_addr_gray_wr_r[6] +.sym 16911 io_pmod_SB_DFFSR_Q_D_SB_LUT4_O_I0_SB_LUT4_O_1_I2[1] +.sym 16914 rx_09_fifo.rd_addr_gray_wr_r[6] +.sym 16915 rx_09_fifo.wr_addr_gray_SB_DFFESR_Q_5_D_SB_LUT4_I2_O[1] +.sym 16916 rx_09_fifo.wr_addr_gray_SB_DFFESR_Q_5_D_SB_LUT4_I2_O[0] +.sym 16917 rx_09_fifo.wr_addr_gray_SB_DFFESR_Q_5_D_SB_LUT4_I2_O[3] +.sym 16920 rx_09_fifo.wr_addr_gray_SB_DFFESR_Q_7_D[1] +.sym 16921 rx_09_fifo.wr_addr_gray_SB_DFFESR_Q_7_D[3] +.sym 16922 rx_09_fifo.wr_addr_gray_SB_DFFESR_Q_7_D[0] +.sym 16923 rx_09_fifo.rd_addr_gray_wr_r[0] +.sym 16926 io_pmod_SB_DFFSR_Q_D_SB_LUT4_O_I0[2] +.sym 16927 io_pmod_SB_DFFSR_Q_D_SB_LUT4_O_I0[1] +.sym 16928 io_pmod_SB_DFFSR_Q_D_SB_LUT4_O_I0[3] +.sym 16929 io_pmod_SB_DFFSR_Q_D_SB_LUT4_O_I0[0] +.sym 16932 io_pmod_SB_DFFSR_Q_D_SB_LUT4_O_I0_SB_LUT4_O_1_I2[0] +.sym 16933 io_pmod_SB_DFFSR_Q_D_SB_LUT4_O_I0_SB_LUT4_O_1_I2[2] +.sym 16934 io_pmod_SB_DFFSR_Q_D_SB_LUT4_O_I0_SB_LUT4_O_1_I2[1] +.sym 16935 io_pmod_SB_DFFSR_Q_D_SB_LUT4_O_I0_SB_LUT4_O_1_I2[3] +.sym 16938 io_pmod_SB_DFFSR_Q_D_SB_LUT4_O_I0_SB_LUT4_O_2_I1[2] +.sym 16939 io_pmod_SB_DFFSR_Q_D_SB_LUT4_O_I0_SB_LUT4_O_2_I1[0] +.sym 16941 io_pmod_SB_DFFSR_Q_D_SB_LUT4_O_I0_SB_LUT4_O_2_I1[1] +.sym 16950 rx_09_fifo.wr_addr_gray_SB_DFFESR_Q_6_D[2] +.sym 16951 io_pmod_SB_DFFSR_Q_D_SB_LUT4_O_I0_SB_LUT4_O_1_I2[1] +.sym 16952 rx_09_fifo.rd_addr_gray_wr_r[5] +.sym 16953 io_pmod_SB_DFFSR_Q_D_SB_LUT4_O_I0_SB_LUT4_O_1_I2[0] +.sym 16956 rx_09_fifo.wr_addr[0] +.sym 16957 rx_09_fifo.rd_addr_gray_wr_r[0] +.sym 16958 io_pmod_SB_DFFSR_Q_D_SB_LUT4_O_I0_SB_LUT4_O_I2_SB_LUT4_O_I1_SB_LUT4_O_I3[1] +.sym 16961 io_pmod[0]$SB_IO_IN_$glb_clk +.sym 16962 w_soft_reset_$glb_sr +.sym 16976 rx_09_fifo.wr_addr_SB_DFFESR_Q_E +.sym 16978 io_smi_data[5]$SB_IO_OUT +.sym 16981 $io_pmod[6]$iobuf_i +.sym 16988 lvds_rx_09_inst.r_data[0] +.sym 16989 lvds_rx_09_inst.o_debug_state[0] +.sym 16995 i_smi_soe_se$rename$0 +.sym 17018 lvds_rx_09_inst.r_data[0] +.sym 17076 lvds_rx_09_inst.r_data[0] +.sym 17083 lvds_rx_09_inst.r_push_SB_LUT4_I3_O_$glb_ce .sym 17084 io_pmod[0]$SB_IO_IN_$glb_clk -.sym 17085 w_soft_reset_$glb_sr -.sym 17086 lvds_rx_09_inst.r_data_SB_DFFNESR_Q_31_D_SB_LUT4_O_I0[0] -.sym 17089 lvds_rx_09_inst.r_phase_count_SB_LUT4_O_I3_SB_DFFNESR_Q_E_SB_LUT4_O_I0[0] -.sym 17090 lvds_rx_09_inst.r_data[0] -.sym 17091 lvds_rx_09_inst.r_data[1] -.sym 17092 lvds_rx_09_inst.r_phase_count_SB_LUT4_O_I3_SB_DFFNESR_Q_E -.sym 17093 lvds_rx_09_inst.r_data_SB_DFFNESR_Q_31_D_SB_LUT4_O_1_I0[0] -.sym 17099 lvds_rx_09_inst.r_data[2] +.sym 17086 w_rx_09_fifo_data[1] +.sym 17091 smi_ctrl_ins.soe_and_reset .sym 17102 i_ss$SB_IO_IN -.sym 17110 int_miso +.sym 17110 io_pmod[2]$SB_IO_IN .sym 17111 io_pmod[1]$SB_IO_IN -.sym 17113 lvds_rx_09_inst.r_data[1] -.sym 17114 io_pmod[1]$SB_IO_IN -.sym 17120 spi_if_ins.spi.SCKr[0] -.sym 17121 io_pmod[3]$SB_IO_IN -.sym 17127 lvds_rx_09_inst.o_debug_state[1] -.sym 17137 w_soft_reset -.sym 17138 rx_09_fifo.rd_addr_gray_wr[0] -.sym 17143 rx_09_fifo.rd_addr_gray[0] -.sym 17146 lvds_rx_09_inst.r_phase_count_SB_LUT4_O_I3_SB_DFFNESR_Q_E_SB_LUT4_O_I0[0] -.sym 17147 rx_09_fifo.rd_addr_gray[5] -.sym 17157 rx_09_fifo.rd_addr_gray_wr[5] -.sym 17166 rx_09_fifo.rd_addr_gray_wr[5] -.sym 17172 lvds_rx_09_inst.o_debug_state[1] -.sym 17173 w_soft_reset -.sym 17175 lvds_rx_09_inst.r_phase_count_SB_LUT4_O_I3_SB_DFFNESR_Q_E_SB_LUT4_O_I0[0] -.sym 17181 rx_09_fifo.rd_addr_gray[0] -.sym 17191 rx_09_fifo.rd_addr_gray_wr[0] -.sym 17196 rx_09_fifo.rd_addr_gray[5] +.sym 17115 $PACKER_VCC_NET +.sym 17121 io_pmod[2]$SB_IO_IN +.sym 17127 lvds_rx_09_inst.r_data_SB_DFFESR_Q_31_D_SB_LUT4_O_I2[1] +.sym 17128 lvds_rx_09_inst.o_debug_state[0] +.sym 17132 lvds_rx_09_inst.o_debug_state[1] +.sym 17135 io_pmod[1]$SB_IO_IN +.sym 17136 lvds_rx_09_inst.r_cnt[1] +.sym 17137 lvds_rx_09_inst.r_cnt[2] +.sym 17138 lvds_rx_09_inst.r_cnt[3] +.sym 17140 lvds_rx_09_inst.o_debug_state[1] +.sym 17142 lvds_rx_09_inst.r_cnt[0] +.sym 17145 io_pmod[2]$SB_IO_IN +.sym 17147 lvds_rx_09_inst.r_data_SB_DFFESR_Q_31_D_SB_LUT4_O_1_I2[1] +.sym 17148 lvds_rx_09_inst.r_data[1] +.sym 17157 lvds_rx_09_inst.r_data_SB_DFFESR_Q_31_D_SB_LUT4_O_I2_SB_LUT4_O_I3[3] +.sym 17160 lvds_rx_09_inst.o_debug_state[1] +.sym 17161 lvds_rx_09_inst.r_data_SB_DFFESR_Q_31_D_SB_LUT4_O_I2_SB_LUT4_O_I3[3] +.sym 17162 lvds_rx_09_inst.r_cnt[1] +.sym 17163 io_pmod[1]$SB_IO_IN +.sym 17178 lvds_rx_09_inst.o_debug_state[0] +.sym 17180 lvds_rx_09_inst.r_data[1] +.sym 17184 lvds_rx_09_inst.r_cnt[0] +.sym 17185 lvds_rx_09_inst.o_debug_state[1] +.sym 17186 io_pmod[2]$SB_IO_IN +.sym 17187 lvds_rx_09_inst.r_data_SB_DFFESR_Q_31_D_SB_LUT4_O_I2_SB_LUT4_O_I3[3] +.sym 17191 lvds_rx_09_inst.r_data_SB_DFFESR_Q_31_D_SB_LUT4_O_I2[1] +.sym 17192 lvds_rx_09_inst.o_debug_state[0] +.sym 17193 lvds_rx_09_inst.r_cnt[3] +.sym 17197 lvds_rx_09_inst.o_debug_state[0] +.sym 17198 lvds_rx_09_inst.r_data_SB_DFFESR_Q_31_D_SB_LUT4_O_1_I2[1] +.sym 17199 lvds_rx_09_inst.r_cnt[2] +.sym 17206 lvds_rx_09_inst.r_state_if_SB_DFFESR_Q_E_SB_LUT4_O_I0_SB_LUT4_I0_O_$glb_ce .sym 17207 io_pmod[0]$SB_IO_IN_$glb_clk -.sym 17211 lvds_rx_09_inst.r_phase_count_SB_LUT4_O_I3_SB_DFFNESR_Q_E_SB_LUT4_O_I0[2] -.sym 17212 lvds_rx_09_inst.r_phase_count_SB_LUT4_O_I3_SB_DFFNESR_Q_E_SB_LUT4_O_I2_SB_LUT4_O_1_I2[0] -.sym 17225 w_soft_reset -.sym 17230 $io_pmod[4]$iobuf_i -.sym 17237 lvds_rx_09_inst.r_data[0] -.sym 17238 spi_if_ins.r_tx_data_valid_SB_LUT4_I3_I2[2] -.sym 17239 spi_if_ins.r_tx_data_valid_SB_LUT4_I3_1_O[2] -.sym 17240 spi_if_ins.r_tx_data_valid_SB_DFFESR_Q_E -.sym 17252 lvds_rx_09_inst.r_state_if_SB_DFFNESR_Q_E -.sym 17254 io_pmod[2]$SB_IO_IN -.sym 17256 lvds_rx_09_inst.r_state_if_SB_DFFNESR_Q_E_SB_LUT4_O_I2[2] -.sym 17258 lvds_rx_09_inst.o_debug_state[1] -.sym 17262 lvds_rx_09_inst.r_phase_count_SB_LUT4_O_I3_SB_LUT4_I2_O[3] -.sym 17266 lvds_rx_09_inst.r_state_if_SB_DFFNESR_Q_E_SB_LUT4_O_I2[1] -.sym 17273 w_soft_reset -.sym 17274 io_pmod[1]$SB_IO_IN -.sym 17281 lvds_rx_09_inst.o_debug_state[0] -.sym 17283 io_pmod[2]$SB_IO_IN -.sym 17284 io_pmod[1]$SB_IO_IN -.sym 17285 lvds_rx_09_inst.o_debug_state[0] -.sym 17286 lvds_rx_09_inst.o_debug_state[1] -.sym 17289 lvds_rx_09_inst.r_phase_count_SB_LUT4_O_I3_SB_LUT4_I2_O[3] -.sym 17290 lvds_rx_09_inst.r_state_if_SB_DFFNESR_Q_E_SB_LUT4_O_I2[2] -.sym 17291 w_soft_reset -.sym 17292 lvds_rx_09_inst.r_state_if_SB_DFFNESR_Q_E_SB_LUT4_O_I2[1] -.sym 17319 lvds_rx_09_inst.o_debug_state[0] -.sym 17320 io_pmod[1]$SB_IO_IN -.sym 17321 io_pmod[2]$SB_IO_IN -.sym 17322 lvds_rx_09_inst.o_debug_state[1] -.sym 17326 lvds_rx_09_inst.r_state_if_SB_DFFNESR_Q_E_SB_LUT4_O_I2[1] -.sym 17329 lvds_rx_09_inst.r_state_if_SB_DFFNESR_Q_E +.sym 17208 w_soft_reset_$glb_sr +.sym 17227 w_soft_reset +.sym 17250 lvds_rx_09_inst.r_state_if_SB_DFFESR_Q_D[1] +.sym 17251 lvds_rx_09_inst.o_debug_state[0] +.sym 17252 lvds_rx_09_inst.r_state_if_SB_DFFESR_Q_E +.sym 17262 lvds_rx_09_inst.r_state_if_SB_DFFESR_Q_E_SB_LUT4_O_I2_SB_LUT4_I0_O +.sym 17270 io_pmod[2]$SB_IO_IN +.sym 17271 io_pmod[1]$SB_IO_IN +.sym 17278 lvds_rx_09_inst.r_state_if_SB_DFFESR_Q_D_SB_LUT4_O_I2[1] +.sym 17279 lvds_rx_09_inst.o_debug_state[1] +.sym 17283 lvds_rx_09_inst.o_debug_state[1] +.sym 17284 lvds_rx_09_inst.o_debug_state[0] +.sym 17286 lvds_rx_09_inst.r_state_if_SB_DFFESR_Q_D_SB_LUT4_O_I2[1] +.sym 17289 lvds_rx_09_inst.o_debug_state[0] +.sym 17290 lvds_rx_09_inst.r_state_if_SB_DFFESR_Q_D[1] +.sym 17303 lvds_rx_09_inst.r_state_if_SB_DFFESR_Q_E_SB_LUT4_O_I2_SB_LUT4_I0_O +.sym 17308 io_pmod[1]$SB_IO_IN +.sym 17309 io_pmod[2]$SB_IO_IN +.sym 17314 lvds_rx_09_inst.r_state_if_SB_DFFESR_Q_D[1] +.sym 17319 io_pmod[2]$SB_IO_IN +.sym 17322 io_pmod[1]$SB_IO_IN +.sym 17329 lvds_rx_09_inst.r_state_if_SB_DFFESR_Q_E .sym 17330 io_pmod[0]$SB_IO_IN_$glb_clk .sym 17331 w_soft_reset_$glb_sr -.sym 17333 spi_if_ins.r_tx_data_valid -.sym 17344 w_soft_reset -.sym 17350 lvds_rx_09_inst.r_phase_count_SB_LUT4_O_I3_SB_LUT4_I2_O[3] -.sym 17364 spi_if_ins.r_tx_data_valid_SB_LUT4_I3_I2[2] -.sym 17373 lvds_rx_09_inst.o_debug_state[1] -.sym 17375 spi_if_ins.spi.r_tx_bit_count[2] -.sym 17377 spi_if_ins.r_tx_data_valid_SB_LUT4_I3_1_O_SB_LUT4_O_I0_SB_LUT4_O_2_I0[3] -.sym 17378 lvds_rx_09_inst.r_phase_count_SB_LUT4_O_I3_SB_DFFNESR_Q_E_SB_LUT4_O_I2[0] -.sym 17380 lvds_rx_09_inst.o_debug_state[0] -.sym 17383 lvds_rx_09_inst.r_phase_count_SB_LUT4_O_I3_SB_DFFNESR_Q_E_SB_LUT4_O_I0[2] -.sym 17385 io_pmod[2]$SB_IO_IN -.sym 17386 io_pmod[1]$SB_IO_IN -.sym 17388 i_ss$SB_IO_IN -.sym 17392 spi_if_ins.spi.SCKr[0] -.sym 17396 spi_if_ins.spi.SCKr[1] -.sym 17401 spi_if_ins.spi.SCKr[2] -.sym 17404 w_soft_reset -.sym 17406 i_ss$SB_IO_IN -.sym 17407 spi_if_ins.spi.SCKr[1] -.sym 17409 spi_if_ins.spi.SCKr[2] -.sym 17412 spi_if_ins.spi.SCKr[1] -.sym 17413 spi_if_ins.r_tx_data_valid_SB_LUT4_I3_1_O_SB_LUT4_O_I0_SB_LUT4_O_2_I0[3] -.sym 17414 spi_if_ins.spi.SCKr[2] -.sym 17415 spi_if_ins.spi.r_tx_bit_count[2] -.sym 17424 spi_if_ins.spi.SCKr[1] -.sym 17426 spi_if_ins.spi.SCKr[2] -.sym 17427 i_ss$SB_IO_IN -.sym 17433 spi_if_ins.spi.SCKr[1] -.sym 17436 lvds_rx_09_inst.o_debug_state[0] -.sym 17437 lvds_rx_09_inst.o_debug_state[1] -.sym 17438 io_pmod[2]$SB_IO_IN -.sym 17439 io_pmod[1]$SB_IO_IN -.sym 17442 w_soft_reset -.sym 17443 lvds_rx_09_inst.r_phase_count_SB_LUT4_O_I3_SB_DFFNESR_Q_E_SB_LUT4_O_I2[0] -.sym 17445 lvds_rx_09_inst.r_phase_count_SB_LUT4_O_I3_SB_DFFNESR_Q_E_SB_LUT4_O_I0[2] -.sym 17448 spi_if_ins.spi.SCKr[0] -.sym 17453 w_clock_sys +.sym 17332 spi_if_ins.spi.SCKr[1] +.sym 17333 spi_if_ins.spi.r2_rx_done +.sym 17334 spi_if_ins.spi.SCKr[0] +.sym 17335 spi_if_ins.spi.r3_rx_done +.sym 17337 lvds_rx_09_inst.r_phase_count[1] +.sym 17338 spi_if_ins.spi.SCKr[2] +.sym 17339 spi_if_ins.spi.r3_rx_done_SB_LUT4_I2_O +.sym 17363 spi_if_ins.spi.r3_rx_done_SB_LUT4_I2_O +.sym 17374 lvds_rx_09_inst.r_phase_count_SB_LUT4_O_1_I3[1] +.sym 17377 lvds_rx_09_inst.r_phase_count_SB_LUT4_O_I3[2] +.sym 17378 lvds_rx_09_inst.o_debug_state[1] +.sym 17379 lvds_rx_09_inst.r_phase_count[0] +.sym 17382 lvds_rx_09_inst.o_debug_state[0] +.sym 17383 lvds_rx_09_inst.r_phase_count_SB_LUT4_O_1_I3[2] +.sym 17384 lvds_rx_09_inst.r_state_if_SB_DFFESR_Q_E_SB_LUT4_O_I2_SB_LUT4_I0_O +.sym 17385 $PACKER_VCC_NET +.sym 17387 lvds_rx_09_inst.r_phase_count[0] +.sym 17394 lvds_rx_09_inst.r_phase_count_SB_LUT4_O_1_I3[0] +.sym 17396 lvds_rx_09_inst.r_phase_count_SB_LUT4_O_I3[1] +.sym 17400 lvds_rx_09_inst.r_data_SB_DFFESR_Q_31_D_SB_LUT4_O_I2_SB_LUT4_O_I3[3] +.sym 17402 lvds_rx_09_inst.r_phase_count[1] +.sym 17405 $nextpnr_ICESTORM_LC_2$O +.sym 17407 lvds_rx_09_inst.r_phase_count[0] +.sym 17411 lvds_rx_09_inst.r_phase_count_SB_CARRY_CI_CO[2] +.sym 17413 lvds_rx_09_inst.r_phase_count[1] +.sym 17414 $PACKER_VCC_NET +.sym 17415 lvds_rx_09_inst.r_phase_count[0] +.sym 17419 $PACKER_VCC_NET +.sym 17420 lvds_rx_09_inst.r_phase_count_SB_LUT4_O_I3[2] +.sym 17421 lvds_rx_09_inst.r_phase_count_SB_CARRY_CI_CO[2] +.sym 17424 lvds_rx_09_inst.r_phase_count_SB_LUT4_O_I3[1] +.sym 17425 lvds_rx_09_inst.r_phase_count_SB_LUT4_O_I3[2] +.sym 17426 lvds_rx_09_inst.r_phase_count_SB_LUT4_O_1_I3[0] +.sym 17430 lvds_rx_09_inst.o_debug_state[0] +.sym 17431 lvds_rx_09_inst.o_debug_state[1] +.sym 17432 lvds_rx_09_inst.r_data_SB_DFFESR_Q_31_D_SB_LUT4_O_I2_SB_LUT4_O_I3[3] +.sym 17433 lvds_rx_09_inst.r_phase_count_SB_LUT4_O_1_I3[2] +.sym 17436 lvds_rx_09_inst.r_phase_count_SB_LUT4_O_1_I3[0] +.sym 17437 lvds_rx_09_inst.r_data_SB_DFFESR_Q_31_D_SB_LUT4_O_I2_SB_LUT4_O_I3[3] +.sym 17438 lvds_rx_09_inst.o_debug_state[1] +.sym 17439 lvds_rx_09_inst.o_debug_state[0] +.sym 17443 lvds_rx_09_inst.r_phase_count_SB_LUT4_O_1_I3[0] +.sym 17448 lvds_rx_09_inst.r_phase_count_SB_LUT4_O_1_I3[1] +.sym 17449 lvds_rx_09_inst.r_data_SB_DFFESR_Q_31_D_SB_LUT4_O_I2_SB_LUT4_O_I3[3] +.sym 17450 lvds_rx_09_inst.o_debug_state[1] +.sym 17451 lvds_rx_09_inst.o_debug_state[0] +.sym 17452 lvds_rx_09_inst.r_state_if_SB_DFFESR_Q_E_SB_LUT4_O_I2_SB_LUT4_I0_O +.sym 17453 io_pmod[0]$SB_IO_IN_$glb_clk +.sym 17454 w_soft_reset_$glb_sr .sym 17457 spi_if_ins.spi.r_rx_bit_count[2] -.sym 17458 spi_if_ins.spi.r_rx_bit_count[1] -.sym 17461 spi_if_ins.spi.r_rx_bit_count[0] -.sym 17467 spi_if_ins.o_load_cmd_SB_DFFESR_Q_D[1] -.sym 17473 io_pmod[2]$SB_IO_IN -.sym 17478 $PACKER_VCC_NET -.sym 17480 i_ss$SB_IO_IN -.sym 17482 i_ss_SB_LUT4_I1_O[1] -.sym 17489 spi_if_ins.r_tx_byte[7] -.sym 17496 spi_if_ins.r_tx_data_valid_SB_LUT4_I3_I2[2] -.sym 17497 spi_if_ins.r_tx_data_valid -.sym 17498 spi_if_ins.r_tx_data_valid_SB_LUT4_I3_O -.sym 17500 spi_if_ins.spi.r_tx_bit_count_SB_DFFESR_Q_R +.sym 17458 spi_if_ins.spi.r_rx_bit_count[0] +.sym 17459 i_ss_SB_LUT4_I1_O[0] +.sym 17460 spi_if_ins.r_tx_data_valid_SB_LUT4_I3_I2[1] +.sym 17461 i_ss_SB_LUT4_I1_O[1] +.sym 17462 spi_if_ins.spi.r_rx_bit_count[1] +.sym 17467 i_sck$SB_IO_IN +.sym 17472 spi_if_ins.spi.r3_rx_done_SB_LUT4_I2_O +.sym 17473 io_pmod[6]$SB_IO_IN +.sym 17477 lvds_rx_09_inst.r_push +.sym 17479 spi_if_ins.r_tx_data_valid_SB_LUT4_I3_1_O +.sym 17484 i_ss_SB_LUT4_I1_O[1] +.sym 17485 spi_if_ins.r_tx_data_valid +.sym 17496 spi_if_ins.spi.SCKr[1] +.sym 17498 spi_if_ins.spi.r_tx_bit_count[2] +.sym 17503 spi_if_ins.spi.o_spi_miso_SB_DFFE_Q_D_SB_LUT4_O_I2_SB_LUT4_O_I0_SB_LUT4_O_I3[2] .sym 17506 i_ss$SB_IO_IN -.sym 17507 spi_if_ins.r_tx_data_valid_SB_LUT4_I3_1_O[2] -.sym 17511 spi_if_ins.r_tx_data_valid_SB_LUT4_I3_1_O_SB_LUT4_O_I0[2] -.sym 17513 $PACKER_VCC_NET -.sym 17521 $PACKER_VCC_NET -.sym 17522 spi_if_ins.spi.r_tx_bit_count[2] -.sym 17524 spi_if_ins.r_tx_data_valid_SB_LUT4_I3_1_O_SB_LUT4_O_I0_SB_LUT4_O_2_I0[3] -.sym 17528 $nextpnr_ICESTORM_LC_6$O -.sym 17530 spi_if_ins.r_tx_data_valid_SB_LUT4_I3_1_O_SB_LUT4_O_I0_SB_LUT4_O_2_I0[3] -.sym 17534 spi_if_ins.spi.r_tx_bit_count_SB_DFFESR_Q_D_SB_LUT4_O_I3[2] -.sym 17536 spi_if_ins.r_tx_data_valid_SB_LUT4_I3_1_O_SB_LUT4_O_I0[2] -.sym 17537 $PACKER_VCC_NET -.sym 17541 $PACKER_VCC_NET -.sym 17542 spi_if_ins.spi.r_tx_bit_count[2] -.sym 17544 spi_if_ins.spi.r_tx_bit_count_SB_DFFESR_Q_D_SB_LUT4_O_I3[2] -.sym 17547 spi_if_ins.r_tx_data_valid -.sym 17549 i_ss$SB_IO_IN -.sym 17554 spi_if_ins.r_tx_data_valid_SB_LUT4_I3_1_O_SB_LUT4_O_I0_SB_LUT4_O_2_I0[3] -.sym 17560 spi_if_ins.r_tx_data_valid_SB_LUT4_I3_I2[2] -.sym 17561 spi_if_ins.r_tx_data_valid -.sym 17565 spi_if_ins.r_tx_data_valid_SB_LUT4_I3_1_O[2] -.sym 17572 $PACKER_VCC_NET -.sym 17573 spi_if_ins.r_tx_data_valid_SB_LUT4_I3_1_O_SB_LUT4_O_I0_SB_LUT4_O_2_I0[3] -.sym 17574 spi_if_ins.r_tx_data_valid_SB_LUT4_I3_1_O_SB_LUT4_O_I0[2] -.sym 17575 spi_if_ins.r_tx_data_valid_SB_LUT4_I3_O +.sym 17509 i_ss$SB_IO_IN +.sym 17510 spi_if_ins.spi.SCKr[2] +.sym 17514 spi_if_ins.spi.r_rx_done_SB_DFFESR_Q_E +.sym 17516 i_ss_SB_LUT4_I1_O[0] +.sym 17522 spi_if_ins.r_tx_data_valid_SB_LUT4_I3_I2[2] +.sym 17525 spi_if_ins.r_tx_data_valid_SB_LUT4_I3_I2[1] +.sym 17536 i_ss_SB_LUT4_I1_O[0] +.sym 17542 spi_if_ins.spi.SCKr[2] +.sym 17543 spi_if_ins.spi.SCKr[1] +.sym 17544 i_ss$SB_IO_IN +.sym 17559 spi_if_ins.r_tx_data_valid_SB_LUT4_I3_I2[2] +.sym 17560 spi_if_ins.r_tx_data_valid_SB_LUT4_I3_I2[1] +.sym 17561 i_ss$SB_IO_IN +.sym 17571 spi_if_ins.spi.SCKr[2] +.sym 17572 spi_if_ins.spi.SCKr[1] +.sym 17573 spi_if_ins.spi.o_spi_miso_SB_DFFE_Q_D_SB_LUT4_O_I2_SB_LUT4_O_I0_SB_LUT4_O_I3[2] +.sym 17574 spi_if_ins.spi.r_tx_bit_count[2] +.sym 17575 spi_if_ins.spi.r_rx_done_SB_DFFESR_Q_E .sym 17576 w_clock_sys -.sym 17577 spi_if_ins.spi.r_tx_bit_count_SB_DFFESR_Q_R -.sym 17578 spi_if_ins.spi.r_rx_done -.sym 17579 spi_if_ins.spi.r_rx_done_SB_DFFESR_Q_E -.sym 17583 spi_if_ins.r_tx_data_valid_SB_LUT4_I3_I2[1] -.sym 17584 i_ss_SB_LUT4_I1_O[0] -.sym 17590 i_ss$SB_IO_IN -.sym 17592 spi_if_ins.r_tx_data_valid_SB_LUT4_I3_O -.sym 17606 int_miso -.sym 17622 spi_if_ins.r_tx_data_valid_SB_LUT4_I3_1_O[2] -.sym 17637 spi_if_ins.r_tx_data_valid_SB_LUT4_I3_1_O[1] -.sym 17646 spi_if_ins.r_tx_data_valid_SB_LUT4_I3_O -.sym 17649 spi_if_ins.r_tx_byte[7] -.sym 17682 spi_if_ins.r_tx_data_valid_SB_LUT4_I3_1_O[2] -.sym 17689 spi_if_ins.r_tx_data_valid_SB_LUT4_I3_1_O[2] -.sym 17690 spi_if_ins.r_tx_data_valid_SB_LUT4_I3_1_O[1] -.sym 17691 spi_if_ins.r_tx_byte[7] +.sym 17577 i_ss$SB_IO_IN +.sym 17578 spi_if_ins.r_tx_data_valid_SB_LUT4_I3_O +.sym 17579 int_miso +.sym 17581 spi_if_ins.spi.r_rx_byte_SB_DFFE_Q_E +.sym 17584 spi_if_ins.r_tx_data_valid_SB_LUT4_I3_1_O +.sym 17594 i_ss$SB_IO_IN +.sym 17597 i_ss$SB_IO_IN +.sym 17601 i_ss$SB_IO_IN +.sym 17613 io_pmod[2]$SB_IO_IN +.sym 17621 spi_if_ins.r_tx_data_valid_SB_LUT4_I3_O +.sym 17622 spi_if_ins.spi.r_tx_byte_SB_DFFESR_Q_E_SB_LUT4_O_I2[1] +.sym 17625 $PACKER_VCC_NET +.sym 17626 spi_if_ins.spi.o_spi_miso_SB_DFFE_Q_D_SB_LUT4_O_I2_SB_LUT4_O_I0[0] +.sym 17628 spi_if_ins.spi.o_spi_miso_SB_DFFE_Q_D_SB_LUT4_O_I2_SB_LUT4_O_I0[1] +.sym 17629 spi_if_ins.spi.r_tx_bit_count[2] +.sym 17630 spi_if_ins.spi.o_spi_miso_SB_DFFE_Q_D_SB_LUT4_O_I2_SB_LUT4_O_I0_SB_LUT4_O_I3[1] +.sym 17631 spi_if_ins.spi.o_spi_miso_SB_DFFE_Q_D_SB_LUT4_O_I2_SB_LUT4_O_I0_SB_LUT4_O_I3[0] +.sym 17632 spi_if_ins.spi.r_tx_bit_count_SB_DFFESR_Q_R +.sym 17633 $PACKER_VCC_NET +.sym 17634 spi_if_ins.spi.o_spi_miso_SB_DFFE_Q_D_SB_LUT4_O_I2_SB_LUT4_O_I0_SB_LUT4_O_I3[3] +.sym 17638 spi_if_ins.spi.o_spi_miso_SB_DFFE_Q_D_SB_LUT4_O_I2_SB_LUT4_O_I0[3] +.sym 17639 spi_if_ins.spi.o_spi_miso_SB_DFFE_Q_D_SB_LUT4_O_I2_SB_LUT4_O_I0[2] +.sym 17642 spi_if_ins.spi.o_spi_miso_SB_DFFE_Q_D_SB_LUT4_O_I2_SB_LUT4_O_I0_SB_LUT4_O_I3[2] +.sym 17646 spi_if_ins.spi.o_spi_miso_SB_DFFE_Q_D_SB_LUT4_O_I2_SB_LUT4_O_I0[3] +.sym 17649 spi_if_ins.r_tx_data_valid_SB_LUT4_I3_1_O +.sym 17651 $nextpnr_ICESTORM_LC_6$O +.sym 17653 spi_if_ins.spi.o_spi_miso_SB_DFFE_Q_D_SB_LUT4_O_I2_SB_LUT4_O_I0_SB_LUT4_O_I3[2] +.sym 17657 spi_if_ins.spi.r_tx_bit_count_SB_DFFESR_Q_D_SB_LUT4_O_I3[2] +.sym 17659 spi_if_ins.spi.o_spi_miso_SB_DFFE_Q_D_SB_LUT4_O_I2_SB_LUT4_O_I0[3] +.sym 17660 $PACKER_VCC_NET +.sym 17665 spi_if_ins.spi.r_tx_bit_count[2] +.sym 17666 $PACKER_VCC_NET +.sym 17667 spi_if_ins.spi.r_tx_bit_count_SB_DFFESR_Q_D_SB_LUT4_O_I3[2] +.sym 17670 spi_if_ins.spi.o_spi_miso_SB_DFFE_Q_D_SB_LUT4_O_I2_SB_LUT4_O_I0[3] +.sym 17672 spi_if_ins.spi.o_spi_miso_SB_DFFE_Q_D_SB_LUT4_O_I2_SB_LUT4_O_I0_SB_LUT4_O_I3[2] +.sym 17673 $PACKER_VCC_NET +.sym 17676 spi_if_ins.spi.o_spi_miso_SB_DFFE_Q_D_SB_LUT4_O_I2_SB_LUT4_O_I0_SB_LUT4_O_I3[1] +.sym 17677 spi_if_ins.spi.o_spi_miso_SB_DFFE_Q_D_SB_LUT4_O_I2_SB_LUT4_O_I0_SB_LUT4_O_I3[2] +.sym 17678 spi_if_ins.spi.o_spi_miso_SB_DFFE_Q_D_SB_LUT4_O_I2_SB_LUT4_O_I0_SB_LUT4_O_I3[3] +.sym 17679 spi_if_ins.spi.o_spi_miso_SB_DFFE_Q_D_SB_LUT4_O_I2_SB_LUT4_O_I0_SB_LUT4_O_I3[0] +.sym 17682 spi_if_ins.spi.r_tx_byte_SB_DFFESR_Q_E_SB_LUT4_O_I2[1] +.sym 17683 spi_if_ins.spi.o_spi_miso_SB_DFFE_Q_D_SB_LUT4_O_I2_SB_LUT4_O_I0[3] +.sym 17684 spi_if_ins.r_tx_data_valid_SB_LUT4_I3_1_O +.sym 17688 spi_if_ins.spi.o_spi_miso_SB_DFFE_Q_D_SB_LUT4_O_I2_SB_LUT4_O_I0[1] +.sym 17689 spi_if_ins.spi.o_spi_miso_SB_DFFE_Q_D_SB_LUT4_O_I2_SB_LUT4_O_I0[3] +.sym 17690 spi_if_ins.spi.o_spi_miso_SB_DFFE_Q_D_SB_LUT4_O_I2_SB_LUT4_O_I0[2] +.sym 17691 spi_if_ins.spi.o_spi_miso_SB_DFFE_Q_D_SB_LUT4_O_I2_SB_LUT4_O_I0[0] +.sym 17694 spi_if_ins.spi.o_spi_miso_SB_DFFE_Q_D_SB_LUT4_O_I2_SB_LUT4_O_I0_SB_LUT4_O_I3[2] .sym 17698 spi_if_ins.r_tx_data_valid_SB_LUT4_I3_O .sym 17699 w_clock_sys +.sym 17700 spi_if_ins.spi.r_tx_bit_count_SB_DFFESR_Q_R .sym 17701 spi_if_ins.spi.r_temp_rx_byte[6] -.sym 17702 spi_if_ins.spi.r_temp_rx_byte[1] -.sym 17704 spi_if_ins.spi.r_temp_rx_byte[2] -.sym 17705 spi_if_ins.spi.r_temp_rx_byte[4] +.sym 17702 spi_if_ins.spi.r_temp_rx_byte[3] +.sym 17703 spi_if_ins.spi.r_temp_rx_byte[1] +.sym 17704 spi_if_ins.spi.r_temp_rx_byte[0] +.sym 17705 spi_if_ins.spi.r_temp_rx_byte[2] .sym 17706 spi_if_ins.spi.r_temp_rx_byte[5] -.sym 17707 spi_if_ins.spi.r_temp_rx_byte[0] -.sym 17708 spi_if_ins.spi.r_temp_rx_byte[3] +.sym 17707 spi_if_ins.spi.r_temp_rx_byte[4] .sym 17717 i_ss$SB_IO_IN -.sym 17722 spi_if_ins.spi.r_rx_done_SB_DFFESR_Q_E -.sym 17731 spi_if_ins.spi.r_rx_byte[4] -.sym 17732 i_mosi$SB_IO_IN -.sym 17733 spi_if_ins.o_load_cmd_SB_DFFESR_Q_D_SB_LUT4_I2_O[1] -.sym 17748 spi_if_ins.spi.r_rx_byte[5] -.sym 17752 i_ss_SB_LUT4_I1_O[1] -.sym 17753 spi_if_ins.spi.r3_rx_done_SB_LUT4_I2_O -.sym 17756 i_ss_SB_LUT4_I1_O[0] -.sym 17770 spi_if_ins.spi.r_rx_byte[7] -.sym 17771 spi_if_ins.spi.r_rx_byte[6] -.sym 17776 spi_if_ins.spi.r_rx_byte[7] -.sym 17788 i_ss_SB_LUT4_I1_O[1] -.sym 17790 i_ss_SB_LUT4_I1_O[0] -.sym 17811 spi_if_ins.spi.r_rx_byte[6] -.sym 17820 spi_if_ins.spi.r_rx_byte[5] -.sym 17821 spi_if_ins.spi.r3_rx_done_SB_LUT4_I2_O +.sym 17720 spi_if_ins.r_tx_data_valid_SB_LUT4_I3_O +.sym 17726 i_mosi$SB_IO_IN +.sym 17729 spi_if_ins.r_tx_byte[0] +.sym 17735 spi_if_ins.r_tx_byte[7] +.sym 17744 spi_if_ins.spi.r_tx_byte[6] +.sym 17747 spi_if_ins.r_tx_byte[0] +.sym 17750 spi_if_ins.spi.r_tx_byte[7] +.sym 17752 spi_if_ins.spi.r_tx_bit_count[2] +.sym 17757 spi_if_ins.spi.o_spi_miso_SB_DFFE_Q_D_SB_LUT4_O_I2_SB_LUT4_O_I0_SB_LUT4_O_I3[2] +.sym 17758 spi_if_ins.r_tx_byte[3] +.sym 17761 spi_if_ins.r_tx_byte[7] +.sym 17762 spi_if_ins.r_tx_data_valid_SB_LUT4_I3_1_O +.sym 17764 spi_if_ins.r_tx_byte[6] +.sym 17765 spi_if_ins.r_tx_byte[4] +.sym 17769 spi_if_ins.spi.r_tx_byte_SB_DFFESR_Q_E +.sym 17770 spi_if_ins.r_tx_byte[2] +.sym 17771 spi_if_ins.spi.r_tx_byte[3] +.sym 17772 spi_if_ins.spi.r_tx_byte[2] +.sym 17776 spi_if_ins.r_tx_byte[7] +.sym 17781 spi_if_ins.spi.r_tx_byte[2] +.sym 17782 spi_if_ins.spi.o_spi_miso_SB_DFFE_Q_D_SB_LUT4_O_I2_SB_LUT4_O_I0_SB_LUT4_O_I3[2] +.sym 17783 spi_if_ins.spi.r_tx_bit_count[2] +.sym 17784 spi_if_ins.spi.r_tx_byte[6] +.sym 17787 spi_if_ins.r_tx_byte[6] +.sym 17795 spi_if_ins.r_tx_byte[4] +.sym 17802 spi_if_ins.r_tx_byte[0] +.sym 17806 spi_if_ins.r_tx_byte[3] +.sym 17812 spi_if_ins.r_tx_byte[2] +.sym 17817 spi_if_ins.spi.r_tx_byte[7] +.sym 17818 spi_if_ins.spi.r_tx_byte[3] +.sym 17819 spi_if_ins.spi.r_tx_bit_count[2] +.sym 17820 spi_if_ins.spi.o_spi_miso_SB_DFFE_Q_D_SB_LUT4_O_I2_SB_LUT4_O_I0_SB_LUT4_O_I3[2] +.sym 17821 spi_if_ins.spi.r_tx_byte_SB_DFFESR_Q_E .sym 17822 w_clock_sys -.sym 17825 spi_if_ins.spi.r_rx_byte[4] -.sym 17828 spi_if_ins.spi.r_rx_byte[7] -.sym 17829 spi_if_ins.spi.r_rx_byte[6] +.sym 17823 spi_if_ins.r_tx_data_valid_SB_LUT4_I3_1_O +.sym 17825 spi_if_ins.spi.r_rx_byte[3] +.sym 17826 spi_if_ins.spi.r_rx_byte[4] +.sym 17827 spi_if_ins.spi.r_rx_byte[6] +.sym 17828 spi_if_ins.spi.r_rx_byte[1] +.sym 17829 spi_if_ins.spi.r_rx_byte[5] +.sym 17830 spi_if_ins.spi.r_rx_byte[2] .sym 17831 spi_if_ins.spi.r_rx_byte[0] -.sym 17859 i_button_SB_LUT4_I3_O[1] -.sym 17867 spi_if_ins.spi.r_rx_byte_SB_DFFE_Q_E -.sym 17869 spi_if_ins.spi.r_temp_rx_byte[4] -.sym 17874 spi_if_ins.spi.r_temp_rx_byte[1] -.sym 17876 spi_if_ins.spi.r_temp_rx_byte[2] -.sym 17879 spi_if_ins.spi.r_temp_rx_byte[0] -.sym 17924 spi_if_ins.spi.r_temp_rx_byte[1] -.sym 17928 spi_if_ins.spi.r_temp_rx_byte[0] -.sym 17936 spi_if_ins.spi.r_temp_rx_byte[4] -.sym 17941 spi_if_ins.spi.r_temp_rx_byte[2] -.sym 17944 spi_if_ins.spi.r_rx_byte_SB_DFFE_Q_E +.sym 17842 spi_if_ins.o_ioc_SB_DFFE_Q_E[1] +.sym 17843 spi_if_ins.spi.r_temp_rx_byte[6] +.sym 17849 r_tx_data[2] +.sym 17850 io_ctrl_ins.o_data_out_SB_DFFESR_Q_3_E +.sym 17851 spi_if_ins.r_tx_byte[4] +.sym 17855 spi_if_ins.spi.r3_rx_done_SB_LUT4_I2_O +.sym 17869 spi_if_ins.o_load_cmd_SB_DFFESR_Q_D[2] +.sym 17876 spi_if_ins.spi.r3_rx_done_SB_LUT4_I2_O +.sym 17884 spi_if_ins.spi.r_rx_byte[6] +.sym 17885 spi_if_ins.r_tx_data_valid_SB_DFFESR_Q_D[1] +.sym 17887 spi_if_ins.spi.r_rx_byte[2] +.sym 17891 spi_if_ins.spi.r_rx_byte[4] +.sym 17893 spi_if_ins.spi.r_rx_byte[1] +.sym 17894 spi_if_ins.spi.r_rx_byte[5] +.sym 17900 spi_if_ins.spi.r_rx_byte[2] +.sym 17904 spi_if_ins.spi.r_rx_byte[4] +.sym 17911 spi_if_ins.spi.r_rx_byte[6] +.sym 17929 spi_if_ins.r_tx_data_valid_SB_DFFESR_Q_D[1] +.sym 17931 spi_if_ins.o_load_cmd_SB_DFFESR_Q_D[2] +.sym 17934 spi_if_ins.spi.r_rx_byte[5] +.sym 17940 spi_if_ins.spi.r_rx_byte[1] +.sym 17944 spi_if_ins.spi.r3_rx_done_SB_LUT4_I2_O .sym 17945 w_clock_sys -.sym 17948 $PACKER_GND_NET -.sym 17971 i_config[1]$SB_IO_IN -.sym 17976 i_config[2]$SB_IO_IN -.sym 17977 smi_ctrl_ins.o_data_out_SB_LUT4_I0_I1[2] -.sym 17979 o_tr_vc2$SB_IO_OUT -.sym 17991 i_button_SB_LUT4_I3_O[2] -.sym 17993 io_ctrl_ins.tr_vc_1_state_SB_LUT4_I3_O[3] -.sym 18001 io_ctrl_ins.o_data_out_SB_DFFESR_Q_3_R[1] -.sym 18002 i_button_SB_LUT4_I3_O[1] -.sym 18006 i_button_SB_LUT4_I3_O[3] -.sym 18008 io_ctrl_ins.o_pmod[5] -.sym 18013 i_button_SB_LUT4_I3_O[0] -.sym 18014 io_ctrl_ins.tr_vc_1_state_SB_LUT4_I3_O[2] -.sym 18015 io_ctrl_ins.o_data_out_SB_DFFESR_Q_3_E -.sym 18017 io_ctrl_ins.o_data_out_SB_DFFESR_Q_3_R[0] -.sym 18019 i_button_SB_LUT4_I3_O[1] -.sym 18033 i_button_SB_LUT4_I3_O[1] -.sym 18034 io_ctrl_ins.tr_vc_1_state_SB_LUT4_I3_O[2] -.sym 18035 io_ctrl_ins.o_pmod[5] -.sym 18036 io_ctrl_ins.tr_vc_1_state_SB_LUT4_I3_O[3] -.sym 18052 io_ctrl_ins.o_data_out_SB_DFFESR_Q_3_R[1] -.sym 18054 io_ctrl_ins.o_data_out_SB_DFFESR_Q_3_R[0] -.sym 18057 i_button_SB_LUT4_I3_O[3] -.sym 18058 i_button_SB_LUT4_I3_O[1] -.sym 18059 i_button_SB_LUT4_I3_O[0] -.sym 18060 i_button_SB_LUT4_I3_O[2] -.sym 18067 io_ctrl_ins.o_data_out_SB_DFFESR_Q_3_E +.sym 17947 spi_if_ins.w_rx_data[3] +.sym 17949 spi_if_ins.w_rx_data[0] +.sym 17972 spi_if_ins.w_rx_data[6] +.sym 17979 i_config[2]$SB_IO_IN +.sym 17980 spi_if_ins.w_rx_data[3] +.sym 17999 r_tx_data[1] +.sym 18007 r_tx_data[4] +.sym 18009 r_tx_data[2] +.sym 18013 r_tx_data[7] +.sym 18015 spi_if_ins.r_tx_data_valid_SB_DFFESR_Q_D_SB_LUT4_I3_O +.sym 18016 r_tx_data[3] +.sym 18017 r_tx_data[6] +.sym 18018 r_tx_data[5] +.sym 18019 r_tx_data[0] +.sym 18022 r_tx_data[5] +.sym 18030 r_tx_data[1] +.sym 18035 r_tx_data[0] +.sym 18040 r_tx_data[6] +.sym 18048 r_tx_data[3] +.sym 18052 r_tx_data[7] +.sym 18058 r_tx_data[2] +.sym 18063 r_tx_data[4] +.sym 18067 spi_if_ins.r_tx_data_valid_SB_DFFESR_Q_D_SB_LUT4_I3_O .sym 18068 w_clock_sys -.sym 18069 io_ctrl_ins.o_data_out_SB_DFFESR_Q_3_R[1] -.sym 18077 w_tx_data_io[3] -.sym 18095 o_tr_vc1$SB_IO_OUT -.sym 18099 i_button_SB_LUT4_I3_O[0] -.sym 18105 io_ctrl_ins.rx_h_state_SB_DFFE_Q_E -.sym 18112 sys_ctrl_ins.o_data_out_SB_DFFE_Q_E_SB_LUT4_O_I1_SB_LUT4_I2_O[2] -.sym 18115 i_button$SB_IO_IN -.sym 18118 io_ctrl_ins.rx_h_b_state_SB_LUT4_I0_I2[1] -.sym 18119 o_tr_vc1$SB_IO_OUT -.sym 18120 w_rx_data[7] -.sym 18121 w_rx_data[5] -.sym 18131 io_ctrl_ins.led0_state_SB_LUT4_I3_O[1] -.sym 18132 w_rx_data[0] -.sym 18133 io_ctrl_ins.tr_vc_2_state_SB_LUT4_I1_I3[3] -.sym 18136 io_ctrl_ins.pmod_dir_state[5] -.sym 18138 spi_if_ins.o_load_cmd_SB_LUT4_I2_O_SB_LUT4_I3_O_SB_LUT4_I3_1_O -.sym 18139 o_tr_vc2$SB_IO_OUT -.sym 18141 w_ioc[0] -.sym 18142 io_ctrl_ins.o_pmod[3] -.sym 18152 w_rx_data[5] -.sym 18164 sys_ctrl_ins.o_data_out_SB_DFFE_Q_E_SB_LUT4_O_I1_SB_LUT4_I2_O[2] -.sym 18165 i_button$SB_IO_IN -.sym 18170 w_rx_data[7] -.sym 18174 io_ctrl_ins.rx_h_b_state_SB_LUT4_I0_I2[1] -.sym 18175 io_ctrl_ins.led0_state_SB_LUT4_I3_O[1] -.sym 18176 o_tr_vc1$SB_IO_OUT -.sym 18177 io_ctrl_ins.pmod_dir_state[5] -.sym 18180 io_ctrl_ins.tr_vc_2_state_SB_LUT4_I1_I3[3] -.sym 18181 w_ioc[0] -.sym 18182 io_ctrl_ins.o_pmod[3] -.sym 18183 o_tr_vc2$SB_IO_OUT -.sym 18188 w_rx_data[0] -.sym 18190 spi_if_ins.o_load_cmd_SB_LUT4_I2_O_SB_LUT4_I3_O_SB_LUT4_I3_1_O +.sym 18071 r_tx_data[7] +.sym 18073 r_tx_data[4] +.sym 18074 r_tx_data[3] +.sym 18075 r_tx_data[6] +.sym 18076 r_tx_data[5] +.sym 18096 smi_ctrl_ins.o_data_out_SB_LUT4_I0_O[2] +.sym 18111 i_button_SB_LUT4_I3_O[3] +.sym 18115 io_ctrl_ins.tr_vc_1_state_SB_LUT4_I3_O[3] +.sym 18116 i_button_SB_LUT4_I3_O[2] +.sym 18117 i_button_SB_LUT4_I3_O[0] +.sym 18120 io_ctrl_ins.o_pmod[5] +.sym 18121 io_ctrl_ins.tr_vc_1_state_SB_LUT4_I3_O[2] +.sym 18122 io_ctrl_ins.o_data_out_SB_DFFESR_Q_3_E +.sym 18124 io_ctrl_ins.o_data_out_SB_DFFESR_Q_3_R[1] +.sym 18126 io_ctrl_ins.rx_h_b_state_SB_LUT4_I3_O[2] +.sym 18127 io_ctrl_ins.o_data_out_SB_DFFESR_Q_3_R[0] +.sym 18131 io_ctrl_ins.o_data_out_SB_DFFESS_Q_E[2] +.sym 18132 i_button_SB_LUT4_I3_O[1] +.sym 18134 io_ctrl_ins.o_pmod[6] +.sym 18139 i_config[2]$SB_IO_IN +.sym 18141 sys_ctrl_ins.o_data_out_SB_DFFE_Q_E_SB_LUT4_O_I1_SB_LUT4_I3_O[2] +.sym 18142 io_ctrl_ins.rx_h_b_state_SB_LUT4_I3_O[3] +.sym 18157 sys_ctrl_ins.o_data_out_SB_DFFE_Q_E_SB_LUT4_O_I1_SB_LUT4_I3_O[2] +.sym 18159 i_config[2]$SB_IO_IN +.sym 18162 io_ctrl_ins.tr_vc_1_state_SB_LUT4_I3_O[2] +.sym 18163 io_ctrl_ins.tr_vc_1_state_SB_LUT4_I3_O[3] +.sym 18164 i_button_SB_LUT4_I3_O[1] +.sym 18165 io_ctrl_ins.o_pmod[5] +.sym 18168 io_ctrl_ins.rx_h_b_state_SB_LUT4_I3_O[3] +.sym 18169 i_button_SB_LUT4_I3_O[1] +.sym 18170 io_ctrl_ins.rx_h_b_state_SB_LUT4_I3_O[2] +.sym 18171 io_ctrl_ins.o_pmod[6] +.sym 18180 io_ctrl_ins.o_data_out_SB_DFFESR_Q_3_R[0] +.sym 18182 io_ctrl_ins.o_data_out_SB_DFFESS_Q_E[2] +.sym 18186 i_button_SB_LUT4_I3_O[2] +.sym 18187 i_button_SB_LUT4_I3_O[3] +.sym 18188 i_button_SB_LUT4_I3_O[1] +.sym 18189 i_button_SB_LUT4_I3_O[0] +.sym 18190 io_ctrl_ins.o_data_out_SB_DFFESR_Q_3_E .sym 18191 w_clock_sys -.sym 18195 w_tx_data_io[4] -.sym 18196 io_ctrl_ins.tr_vc_1_b_state_SB_LUT4_I1_O[3] -.sym 18197 w_tx_data_io[0] -.sym 18206 w_rx_data[7] -.sym 18209 w_rx_data[5] -.sym 18215 io_ctrl_ins.pmod_dir_state[3] -.sym 18219 io_ctrl_ins.tr_vc_2_state_SB_LUT4_I1_I3[3] -.sym 18220 spi_if_ins.o_fetch_cmd_SB_LUT4_I3_O_SB_LUT4_I3_O[0] -.sym 18241 w_tx_data_io[3] -.sym 18245 spi_if_ins.o_cs_SB_LUT4_I3_1_O -.sym 18246 i_config[2]$SB_IO_IN -.sym 18247 smi_ctrl_ins.o_data_out_SB_LUT4_I0_O[1] -.sym 18249 smi_ctrl_ins.o_data_out_SB_LUT4_I0_I1[2] -.sym 18251 io_ctrl_ins.debug_mode[0] -.sym 18252 w_tx_data_io[4] -.sym 18253 io_ctrl_ins.debug_mode_SB_LUT4_I2_O[1] -.sym 18254 o_led0$SB_IO_OUT -.sym 18255 io_ctrl_ins.o_data_out_SB_DFFESR_Q_3_R[0] -.sym 18259 sys_ctrl_ins.o_data_out_SB_DFFE_Q_E_SB_LUT4_O_I1_SB_LUT4_I2_O[2] -.sym 18260 w_tx_data_io[6] -.sym 18261 i_config[0]$SB_IO_IN +.sym 18192 io_ctrl_ins.o_data_out_SB_DFFESR_Q_3_R[1] +.sym 18216 o_rx_h_tx_l$SB_IO_OUT +.sym 18239 io_ctrl_ins.pmod_dir_state[4] +.sym 18240 sys_ctrl_ins.o_data_out_SB_DFFE_Q_E_SB_LUT4_O_I1_SB_LUT4_I3_O[2] +.sym 18241 io_ctrl_ins.tr_vc_1_b_state_SB_LUT4_I1_O[2] +.sym 18245 io_ctrl_ins.led0_state_SB_LUT4_I3_O[1] +.sym 18247 spi_if_ins.o_load_cmd_SB_LUT4_I2_O_SB_LUT4_I3_O_SB_LUT4_I3_2_O +.sym 18249 io_ctrl_ins.tr_vc_1_b_state_SB_LUT4_I1_O[3] +.sym 18251 i_button$SB_IO_IN +.sym 18252 io_ctrl_ins.o_data_out_SB_DFFESS_Q_E[2] +.sym 18254 io_ctrl_ins.o_data_out_SB_DFFESS_Q_S .sym 18263 i_config[3]$SB_IO_IN -.sym 18267 smi_ctrl_ins.o_data_out_SB_LUT4_I0_I1[2] -.sym 18270 w_tx_data_io[3] -.sym 18275 io_ctrl_ins.o_data_out_SB_DFFESR_Q_3_R[0] -.sym 18279 sys_ctrl_ins.o_data_out_SB_DFFE_Q_E_SB_LUT4_O_I1_SB_LUT4_I2_O[2] -.sym 18280 io_ctrl_ins.o_data_out_SB_DFFESR_Q_3_R[0] -.sym 18281 o_led0$SB_IO_OUT -.sym 18282 io_ctrl_ins.debug_mode[0] -.sym 18286 sys_ctrl_ins.o_data_out_SB_DFFE_Q_E_SB_LUT4_O_I1_SB_LUT4_I2_O[2] -.sym 18288 i_config[3]$SB_IO_IN -.sym 18291 w_tx_data_io[4] -.sym 18293 smi_ctrl_ins.o_data_out_SB_LUT4_I0_I1[2] -.sym 18297 i_config[2]$SB_IO_IN -.sym 18300 sys_ctrl_ins.o_data_out_SB_DFFE_Q_E_SB_LUT4_O_I1_SB_LUT4_I2_O[2] -.sym 18303 i_config[0]$SB_IO_IN -.sym 18304 io_ctrl_ins.o_data_out_SB_DFFESR_Q_3_R[0] -.sym 18305 sys_ctrl_ins.o_data_out_SB_DFFE_Q_E_SB_LUT4_O_I1_SB_LUT4_I2_O[2] -.sym 18306 io_ctrl_ins.debug_mode_SB_LUT4_I2_O[1] -.sym 18311 w_tx_data_io[6] -.sym 18312 smi_ctrl_ins.o_data_out_SB_LUT4_I0_I1[2] -.sym 18313 spi_if_ins.o_cs_SB_LUT4_I3_1_O +.sym 18288 spi_if_ins.o_load_cmd_SB_LUT4_I2_O_SB_LUT4_I3_O_SB_LUT4_I3_2_O +.sym 18291 io_ctrl_ins.led0_state_SB_LUT4_I3_O[1] +.sym 18292 io_ctrl_ins.pmod_dir_state[4] +.sym 18293 io_ctrl_ins.tr_vc_1_b_state_SB_LUT4_I1_O[3] +.sym 18294 io_ctrl_ins.tr_vc_1_b_state_SB_LUT4_I1_O[2] +.sym 18297 i_button$SB_IO_IN +.sym 18300 sys_ctrl_ins.o_data_out_SB_DFFE_Q_E_SB_LUT4_O_I1_SB_LUT4_I3_O[2] +.sym 18310 i_config[3]$SB_IO_IN +.sym 18312 sys_ctrl_ins.o_data_out_SB_DFFE_Q_E_SB_LUT4_O_I1_SB_LUT4_I3_O[2] +.sym 18313 io_ctrl_ins.o_data_out_SB_DFFESS_Q_E[2] .sym 18314 w_clock_sys -.sym 18315 smi_ctrl_ins.o_data_out_SB_LUT4_I0_O[1] -.sym 18316 o_tr_vc1$SB_IO_OUT -.sym 18318 o_rx_h_tx_l_b$SB_IO_OUT -.sym 18319 io_ctrl_ins.debug_mode_SB_LUT4_I2_O[0] -.sym 18320 o_rx_h_tx_l$SB_IO_OUT +.sym 18315 io_ctrl_ins.o_data_out_SB_DFFESS_Q_S +.sym 18320 o_tr_vc1$SB_IO_OUT .sym 18321 o_tr_vc1_b$SB_IO_OUT -.sym 18322 o_tr_vc2$SB_IO_OUT -.sym 18328 sys_ctrl_ins.o_data_out_SB_DFFE_Q_E_SB_LUT4_O_I1_SB_LUT4_I2_O[2] -.sym 18336 io_ctrl_ins.rf_mode[2] -.sym 18338 io_ctrl_ins.o_data_out_SB_DFFESS_Q_S -.sym 18343 io_ctrl_ins.rx_h_b_state_SB_LUT4_I0_I2[2] -.sym 18346 w_tx_data_io[6] -.sym 18358 io_ctrl_ins.o_pmod[4] -.sym 18362 io_ctrl_ins.rf_mode[2] -.sym 18363 w_rx_data[4] -.sym 18365 io_ctrl_ins.rf_mode[0] -.sym 18368 io_ctrl_ins.debug_mode_SB_LUT4_I2_O[1] -.sym 18369 io_ctrl_ins.mixer_en_state -.sym 18372 io_ctrl_ins.debug_mode_SB_LUT4_I2_O[3] +.sym 18336 o_tr_vc2$SB_IO_OUT +.sym 18349 i_config[1]$SB_IO_IN +.sym 18366 w_rx_data[7] +.sym 18372 w_rx_data[6] +.sym 18373 i_config[1]$SB_IO_IN .sym 18375 spi_if_ins.o_load_cmd_SB_LUT4_I2_O_SB_LUT4_I3_O_SB_LUT4_I3_2_O -.sym 18377 w_rx_data[5] -.sym 18378 o_tr_vc1_b$SB_IO_OUT -.sym 18379 io_ctrl_ins.tr_vc_2_state_SB_LUT4_I1_I3[3] -.sym 18380 w_ioc[0] -.sym 18382 w_rx_data[0] -.sym 18384 w_ioc[0] -.sym 18386 io_ctrl_ins.o_pmod[0] -.sym 18387 w_rx_data[7] -.sym 18388 w_rx_data[3] -.sym 18390 io_ctrl_ins.debug_mode_SB_LUT4_I2_O[1] -.sym 18391 io_ctrl_ins.rf_mode[2] -.sym 18392 io_ctrl_ins.debug_mode_SB_LUT4_I2_O[3] -.sym 18393 io_ctrl_ins.rf_mode[0] -.sym 18399 w_rx_data[3] -.sym 18405 w_rx_data[7] -.sym 18408 io_ctrl_ins.o_pmod[4] -.sym 18409 w_ioc[0] -.sym 18410 o_tr_vc1_b$SB_IO_OUT -.sym 18411 io_ctrl_ins.tr_vc_2_state_SB_LUT4_I1_I3[3] -.sym 18416 w_rx_data[4] +.sym 18379 io_ctrl_ins.debug_mode_SB_LUT4_I2_O[0] +.sym 18381 io_ctrl_ins.o_data_out_SB_DFFESR_Q_3_R[0] +.sym 18382 w_rx_data[4] +.sym 18387 sys_ctrl_ins.o_data_out_SB_DFFE_Q_E_SB_LUT4_O_I1_SB_LUT4_I3_O[2] +.sym 18388 w_rx_data[5] +.sym 18390 w_rx_data[4] +.sym 18402 w_rx_data[6] +.sym 18416 w_rx_data[7] .sym 18421 w_rx_data[5] -.sym 18426 w_rx_data[0] -.sym 18432 w_ioc[0] -.sym 18433 io_ctrl_ins.o_pmod[0] -.sym 18434 io_ctrl_ins.mixer_en_state -.sym 18435 io_ctrl_ins.tr_vc_2_state_SB_LUT4_I1_I3[3] +.sym 18432 sys_ctrl_ins.o_data_out_SB_DFFE_Q_E_SB_LUT4_O_I1_SB_LUT4_I3_O[2] +.sym 18433 i_config[1]$SB_IO_IN +.sym 18434 io_ctrl_ins.o_data_out_SB_DFFESR_Q_3_R[0] +.sym 18435 io_ctrl_ins.debug_mode_SB_LUT4_I2_O[0] .sym 18436 spi_if_ins.o_load_cmd_SB_LUT4_I2_O_SB_LUT4_I3_O_SB_LUT4_I3_2_O .sym 18437 w_clock_sys -.sym 18440 w_tx_data_io[6] -.sym 18451 io_ctrl_ins.rf_pin_state[6] -.sym 18452 io_ctrl_ins.o_pmod[4] -.sym 18463 i_config[2]$SB_IO_IN -.sym 18467 i_config[1]$SB_IO_IN -.sym 18471 o_tr_vc2$SB_IO_OUT -.sym 18482 io_ctrl_ins.rx_h_state_SB_DFFE_Q_E -.sym 18494 io_ctrl_ins.rf_pin_state[0] -.sym 18501 io_ctrl_ins.rf_mode[2] -.sym 18507 io_ctrl_ins.debug_mode_SB_LUT4_I2_O[1] -.sym 18511 io_ctrl_ins.debug_mode_SB_LUT4_I2_O[3] -.sym 18537 io_ctrl_ins.debug_mode_SB_LUT4_I2_O[1] -.sym 18538 io_ctrl_ins.rf_pin_state[0] -.sym 18539 io_ctrl_ins.debug_mode_SB_LUT4_I2_O[3] -.sym 18540 io_ctrl_ins.rf_mode[2] -.sym 18559 io_ctrl_ins.rx_h_state_SB_DFFE_Q_E +.sym 18471 i_config[2]$SB_IO_IN +.sym 18481 io_ctrl_ins.rx_h_state_SB_DFFE_Q_D_SB_LUT4_O_I3[2] +.sym 18482 io_ctrl_ins.rf_pin_state[6] +.sym 18484 io_ctrl_ins.rf_pin_state[7] +.sym 18498 io_ctrl_ins.debug_mode_SB_LUT4_I0_O +.sym 18502 io_ctrl_ins.debug_mode_SB_LUT4_I2_O[3] +.sym 18525 io_ctrl_ins.debug_mode_SB_LUT4_I2_O[3] +.sym 18526 io_ctrl_ins.rx_h_state_SB_DFFE_Q_D_SB_LUT4_O_I3[2] +.sym 18527 io_ctrl_ins.rf_pin_state[7] +.sym 18549 io_ctrl_ins.rf_pin_state[6] +.sym 18550 io_ctrl_ins.rx_h_state_SB_DFFE_Q_D_SB_LUT4_O_I3[2] +.sym 18551 io_ctrl_ins.debug_mode_SB_LUT4_I2_O[3] +.sym 18559 io_ctrl_ins.debug_mode_SB_LUT4_I0_O .sym 18560 w_clock_sys .sym 18562 i_config[1]$SB_IO_IN .sym 18564 i_config[2]$SB_IO_IN -.sym 18570 io_ctrl_ins.o_data_out_SB_DFFESR_Q_3_R[1] -.sym 18576 io_ctrl_ins.rx_h_b_state_SB_LUT4_I0_I2[1] .sym 18636 io_smi_data[4]$SB_IO_OUT .sym 18641 i_smi_a3$SB_IO_IN .sym 18645 i_smi_a3$SB_IO_IN -.sym 18660 io_smi_data[4]$SB_IO_OUT -.sym 18693 $io_pmod[7]$iobuf_i +.sym 18658 io_smi_data[4]$SB_IO_OUT +.sym 18684 spi_if_ins.spi.r_rx_byte_SB_DFFE_Q_E +.sym 18693 io_pmod[3]$SB_IO_IN .sym 18695 i_mosi$SB_IO_IN .sym 18785 $io_pmod[7]$iobuf_i -.sym 18860 io_smi_data[5]$SB_IO_OUT -.sym 18867 rx_09_fifo.wr_addr_gray_SB_DFFESR_Q_6_D[1] -.sym 18871 rx_09_fifo.wr_addr_gray_SB_DFFESR_Q_6_D[3] -.sym 18881 rx_09_fifo.wr_addr_gray_SB_DFFESR_Q_4_D[2] -.sym 18884 rx_09_fifo.wr_addr_SB_DFFESR_Q_E -.sym 18887 io_pmod_SB_DFFSR_Q_D_SB_LUT4_O_I2_SB_LUT4_O_I0_SB_LUT4_O_I3[1] -.sym 18894 rx_09_fifo.wr_addr_gray_SB_LUT4_I2_O[4] -.sym 18900 rx_09_fifo.wr_addr_gray_SB_DFFESR_Q_6_D[1] -.sym 18917 rx_09_fifo.wr_addr_gray_SB_DFFESR_Q_6_D[3] -.sym 18929 rx_09_fifo.wr_addr_gray_SB_LUT4_I2_O[4] -.sym 18931 io_pmod_SB_DFFSR_Q_D_SB_LUT4_O_I2_SB_LUT4_O_I0_SB_LUT4_O_I3[1] -.sym 18935 rx_09_fifo.wr_addr_gray_SB_DFFESR_Q_4_D[2] +.sym 18872 rx_09_fifo.wr_addr_gray_SB_DFFESR_Q_6_D[2] +.sym 18893 rx_09_fifo.wr_addr_SB_DFFESR_Q_E +.sym 18930 rx_09_fifo.wr_addr_gray_SB_DFFESR_Q_6_D[2] .sym 18945 rx_09_fifo.wr_addr_SB_DFFESR_Q_E .sym 18946 io_pmod[0]$SB_IO_IN_$glb_clk .sym 18947 w_soft_reset_$glb_sr -.sym 18992 rx_09_fifo.wr_addr_gray[4] -.sym 18993 rx_09_fifo.wr_addr_gray_SB_LUT4_I2_O[4] -.sym 18995 rx_09_fifo.wr_addr_gray[6] -.sym 18997 rx_09_fifo.wr_addr_gray[1] -.sym 19000 rx_09_fifo.wr_addr_gray_SB_LUT4_I2_O[3] -.sym 19003 io_pmod_SB_DFFSR_Q_D_SB_LUT4_O_I2_SB_LUT4_O_I0_SB_LUT4_O_I3[2] -.sym 19004 rx_09_fifo.wr_addr_gray_SB_LUT4_I2_O[7] -.sym 19022 rx_09_fifo.wr_addr_gray[6] -.sym 19037 rx_09_fifo.wr_addr_gray[1] -.sym 19040 rx_09_fifo.wr_addr_gray[4] -.sym 19046 rx_09_fifo.wr_addr_gray_SB_LUT4_I2_O[4] -.sym 19048 rx_09_fifo.wr_addr_gray_SB_LUT4_I2_O[3] -.sym 19064 io_pmod_SB_DFFSR_Q_D_SB_LUT4_O_I2_SB_LUT4_O_I0_SB_LUT4_O_I3[2] -.sym 19065 rx_09_fifo.wr_addr_gray_SB_LUT4_I2_O[7] +.sym 19002 rx_09_fifo.wr_addr_gray[5] +.sym 19020 rx_09_fifo.wr_addr_gray[2] +.sym 19046 rx_09_fifo.wr_addr_gray[2] +.sym 19053 rx_09_fifo.wr_addr_gray[5] .sym 19069 w_clock_sys .sym 19083 io_pmod[6]$SB_IO_IN -.sym 19091 int_miso -.sym 19124 lvds_rx_09_inst.r_data[0] -.sym 19127 lvds_rx_09_inst.r_state_if_SB_DFFNESR_Q_E_SB_LUT4_O_I2[1] -.sym 19181 lvds_rx_09_inst.r_state_if_SB_DFFNESR_Q_E_SB_LUT4_O_I2[1] -.sym 19182 lvds_rx_09_inst.r_data[0] -.sym 19191 lvds_rx_09_inst.r_phase_count_SB_LUT4_O_I3_SB_DFFNESR_Q_E_SB_LUT4_O_I2_SB_LUT4_I1_O_$glb_ce -.sym 19192 io_pmod[0]$SB_IO_IN_$glb_clk -.sym 19193 w_soft_reset_$glb_sr -.sym 19218 io_pmod[2]$SB_IO_IN +.sym 19085 $PACKER_VCC_NET +.sym 19098 int_miso +.sym 19213 io_pmod[4]$SB_IO_IN .sym 19219 io_pmod[3]$SB_IO_IN -.sym 19235 lvds_rx_09_inst.r_phase_count_SB_LUT4_O_I3_SB_LUT4_I2_O[3] -.sym 19236 io_pmod[2]$SB_IO_IN -.sym 19237 lvds_rx_09_inst.r_phase_count_SB_LUT4_O_I3_SB_DFFNESR_Q_E_SB_LUT4_O_I0[2] -.sym 19242 w_soft_reset -.sym 19243 lvds_rx_09_inst.r_data_SB_DFFNESR_Q_31_D_SB_LUT4_O_I0[0] -.sym 19246 lvds_rx_09_inst.r_phase_count_SB_LUT4_O_I3_SB_DFFNESR_Q_E_SB_LUT4_O_I0[0] -.sym 19250 lvds_rx_09_inst.r_data_SB_DFFNESR_Q_31_D_SB_LUT4_O_1_I0[0] -.sym 19251 lvds_rx_09_inst.o_debug_state[1] -.sym 19252 lvds_rx_09_inst.r_cnt[1] -.sym 19256 io_pmod[1]$SB_IO_IN -.sym 19258 lvds_rx_09_inst.o_debug_state[0] -.sym 19259 lvds_rx_09_inst.o_debug_state[1] -.sym 19261 lvds_rx_09_inst.r_cnt[2] -.sym 19262 lvds_rx_09_inst.r_cnt[3] -.sym 19265 lvds_rx_09_inst.r_cnt[0] -.sym 19268 lvds_rx_09_inst.r_phase_count_SB_LUT4_O_I3_SB_LUT4_I2_O[3] -.sym 19269 io_pmod[2]$SB_IO_IN -.sym 19270 lvds_rx_09_inst.o_debug_state[1] -.sym 19271 lvds_rx_09_inst.r_cnt[1] -.sym 19286 lvds_rx_09_inst.o_debug_state[0] -.sym 19287 lvds_rx_09_inst.r_phase_count_SB_LUT4_O_I3_SB_LUT4_I2_O[3] -.sym 19292 lvds_rx_09_inst.o_debug_state[1] -.sym 19293 lvds_rx_09_inst.r_cnt[2] -.sym 19294 lvds_rx_09_inst.r_data_SB_DFFNESR_Q_31_D_SB_LUT4_O_1_I0[0] -.sym 19295 lvds_rx_09_inst.o_debug_state[0] -.sym 19298 lvds_rx_09_inst.o_debug_state[0] -.sym 19299 lvds_rx_09_inst.r_cnt[3] -.sym 19300 lvds_rx_09_inst.r_data_SB_DFFNESR_Q_31_D_SB_LUT4_O_I0[0] -.sym 19301 lvds_rx_09_inst.o_debug_state[1] -.sym 19304 lvds_rx_09_inst.r_phase_count_SB_LUT4_O_I3_SB_DFFNESR_Q_E_SB_LUT4_O_I0[2] -.sym 19305 w_soft_reset -.sym 19306 lvds_rx_09_inst.r_phase_count_SB_LUT4_O_I3_SB_DFFNESR_Q_E_SB_LUT4_O_I0[0] -.sym 19307 lvds_rx_09_inst.o_debug_state[1] -.sym 19310 lvds_rx_09_inst.r_cnt[0] -.sym 19311 lvds_rx_09_inst.r_phase_count_SB_LUT4_O_I3_SB_LUT4_I2_O[3] -.sym 19312 io_pmod[1]$SB_IO_IN -.sym 19313 lvds_rx_09_inst.o_debug_state[1] -.sym 19314 lvds_rx_09_inst.r_phase_count_SB_LUT4_O_I3_SB_DFFNESR_Q_E_SB_LUT4_O_I2_SB_LUT4_I1_O_$glb_ce +.sym 19222 io_pmod[3]$SB_IO_IN +.sym 19236 w_soft_reset +.sym 19240 lvds_rx_09_inst.r_data[1] +.sym 19247 i_smi_soe_se$rename$0 +.sym 19269 lvds_rx_09_inst.r_data[1] +.sym 19298 i_smi_soe_se$rename$0 +.sym 19300 w_soft_reset +.sym 19314 lvds_rx_09_inst.r_push_SB_LUT4_I3_O_$glb_ce .sym 19315 io_pmod[0]$SB_IO_IN_$glb_clk -.sym 19316 w_soft_reset_$glb_sr -.sym 19329 $io_pmod[5]$iobuf_i -.sym 19337 $io_pmod[6]$iobuf_i -.sym 19339 lvds_rx_09_inst.r_phase_count_SB_LUT4_O_I3_SB_LUT4_I2_O[3] -.sym 19350 spi_if_ins.r_tx_data_valid_SB_DFFESR_Q_D[1] -.sym 19363 io_pmod[1]$SB_IO_IN -.sym 19365 lvds_rx_09_inst.o_debug_state[0] -.sym 19366 lvds_rx_09_inst.o_debug_state[1] -.sym 19367 lvds_rx_09_inst.r_phase_count_SB_LUT4_O_I3_SB_LUT4_I2_O[3] -.sym 19378 io_pmod[2]$SB_IO_IN -.sym 19385 lvds_rx_09_inst.r_phase_count_SB_LUT4_O_I3_SB_DFFNESR_Q_E_SB_LUT4_O_I2_SB_LUT4_O_1_I2[0] -.sym 19403 lvds_rx_09_inst.r_phase_count_SB_LUT4_O_I3_SB_DFFNESR_Q_E_SB_LUT4_O_I2_SB_LUT4_O_1_I2[0] -.sym 19404 lvds_rx_09_inst.o_debug_state[0] -.sym 19409 io_pmod[1]$SB_IO_IN -.sym 19410 lvds_rx_09_inst.r_phase_count_SB_LUT4_O_I3_SB_LUT4_I2_O[3] -.sym 19411 lvds_rx_09_inst.o_debug_state[1] -.sym 19412 io_pmod[2]$SB_IO_IN -.sym 19452 i_ss$SB_IO_IN -.sym 19492 spi_if_ins.r_tx_data_valid_SB_DFFESR_Q_E -.sym 19494 spi_if_ins.o_load_cmd_SB_DFFESR_Q_D[1] -.sym 19510 spi_if_ins.r_tx_data_valid_SB_DFFESR_Q_D[1] -.sym 19521 spi_if_ins.r_tx_data_valid_SB_DFFESR_Q_D[1] -.sym 19560 spi_if_ins.r_tx_data_valid_SB_DFFESR_Q_E +.sym 19344 spi_if_ins.spi.r3_rx_done_SB_LUT4_I2_O +.sym 19459 io_pmod[5]$SB_IO_IN +.sym 19463 i_smi_soe_se$rename$0 +.sym 19470 spi_if_ins.spi.r3_rx_done_SB_LUT4_I2_O +.sym 19483 spi_if_ins.spi.SCKr[0] +.sym 19488 lvds_rx_09_inst.r_phase_count_SB_LUT4_O_I3[1] +.sym 19490 spi_if_ins.spi.r2_rx_done +.sym 19494 i_sck$SB_IO_IN +.sym 19500 spi_if_ins.spi.r3_rx_done +.sym 19505 spi_if_ins.spi.SCKr[1] +.sym 19506 spi_if_ins.spi.r_rx_done +.sym 19514 spi_if_ins.spi.SCKr[0] +.sym 19523 spi_if_ins.spi.r_rx_done +.sym 19526 i_sck$SB_IO_IN +.sym 19533 spi_if_ins.spi.r2_rx_done +.sym 19546 lvds_rx_09_inst.r_phase_count_SB_LUT4_O_I3[1] +.sym 19553 spi_if_ins.spi.SCKr[1] +.sym 19556 spi_if_ins.spi.r3_rx_done +.sym 19557 spi_if_ins.spi.r2_rx_done .sym 19561 w_clock_sys -.sym 19562 spi_if_ins.o_load_cmd_SB_DFFESR_Q_D[1] .sym 19575 io_pmod[1]$SB_IO_IN -.sym 19578 spi_if_ins.spi.SCKr[0] -.sym 19582 io_pmod[3]$SB_IO_IN -.sym 19592 spi_if_ins.spi.r_rx_done +.sym 19581 $io_pmod[3]$iobuf_i +.sym 19586 io_pmod[6]$SB_IO_IN +.sym 19594 int_miso +.sym 19598 spi_if_ins.spi.r_rx_byte_SB_DFFE_Q_E .sym 19606 spi_if_ins.r_tx_data_valid_SB_LUT4_I3_I2[2] -.sym 19614 spi_if_ins.spi.r_rx_bit_count[2] -.sym 19617 i_ss$SB_IO_IN -.sym 19626 spi_if_ins.spi.r_rx_bit_count[0] -.sym 19631 spi_if_ins.spi.r_rx_bit_count[1] +.sym 19608 i_ss$SB_IO_IN +.sym 19610 spi_if_ins.spi.SCKr[2] +.sym 19612 spi_if_ins.spi.SCKr[1] +.sym 19615 spi_if_ins.spi.r_rx_bit_count[0] +.sym 19619 i_ss$SB_IO_IN +.sym 19627 spi_if_ins.spi.r_rx_bit_count[1] +.sym 19630 spi_if_ins.spi.r_rx_bit_count[2] .sym 19636 $nextpnr_ICESTORM_LC_5$O .sym 19639 spi_if_ins.spi.r_rx_bit_count[0] .sym 19642 spi_if_ins.spi.r_rx_bit_count_SB_DFFESR_Q_D_SB_LUT4_O_I3[2] -.sym 19644 spi_if_ins.spi.r_rx_bit_count[1] +.sym 19645 spi_if_ins.spi.r_rx_bit_count[1] .sym 19650 spi_if_ins.spi.r_rx_bit_count[2] .sym 19652 spi_if_ins.spi.r_rx_bit_count_SB_DFFESR_Q_D_SB_LUT4_O_I3[2] -.sym 19656 spi_if_ins.spi.r_rx_bit_count[1] .sym 19658 spi_if_ins.spi.r_rx_bit_count[0] -.sym 19675 spi_if_ins.spi.r_rx_bit_count[0] +.sym 19662 spi_if_ins.spi.r_rx_bit_count[1] +.sym 19663 spi_if_ins.spi.r_rx_bit_count[0] +.sym 19664 spi_if_ins.spi.r_rx_bit_count[2] +.sym 19667 spi_if_ins.spi.r_rx_bit_count[2] +.sym 19669 spi_if_ins.spi.r_rx_bit_count[1] +.sym 19670 spi_if_ins.spi.r_rx_bit_count[0] +.sym 19673 spi_if_ins.spi.SCKr[2] +.sym 19674 spi_if_ins.spi.SCKr[1] +.sym 19675 i_ss$SB_IO_IN +.sym 19680 spi_if_ins.spi.r_rx_bit_count[0] +.sym 19681 spi_if_ins.spi.r_rx_bit_count[1] .sym 19683 spi_if_ins.r_tx_data_valid_SB_LUT4_I3_I2[2] .sym 19684 w_clock_sys .sym 19685 i_ss$SB_IO_IN .sym 19698 i_mosi$SB_IO_IN -.sym 19699 spi_if_ins.r_tx_data_valid_SB_DFFESR_Q_E -.sym 19700 spi_if_ins.r_tx_data_valid_SB_LUT4_I3_I2[2] -.sym 19728 spi_if_ins.r_tx_data_valid_SB_LUT4_I3_I2[2] -.sym 19729 spi_if_ins.spi.r_rx_done_SB_DFFESR_Q_E -.sym 19733 spi_if_ins.spi.r_rx_bit_count[0] -.sym 19737 spi_if_ins.spi.r_rx_bit_count[2] -.sym 19738 spi_if_ins.spi.r_rx_bit_count[1] -.sym 19740 i_ss$SB_IO_IN +.sym 19706 $PACKER_GND_NET +.sym 19718 spi_if_ins.r_tx_data_valid_SB_LUT4_I3_O +.sym 19729 spi_if_ins.r_tx_data_valid_SB_LUT4_I3_O +.sym 19733 i_ss_SB_LUT4_I1_O[1] +.sym 19737 spi_if_ins.r_tx_data_valid +.sym 19739 i_ss_SB_LUT4_I1_O[0] +.sym 19741 spi_if_ins.spi.o_spi_miso_SB_DFFE_Q_D_SB_LUT4_O_I2[1] .sym 19742 i_ss$SB_IO_IN -.sym 19748 spi_if_ins.r_tx_data_valid_SB_LUT4_I3_I2[1] -.sym 19757 i_ss_SB_LUT4_I1_O[0] -.sym 19761 i_ss_SB_LUT4_I1_O[0] -.sym 19766 spi_if_ins.r_tx_data_valid_SB_LUT4_I3_I2[1] -.sym 19768 spi_if_ins.r_tx_data_valid_SB_LUT4_I3_I2[2] -.sym 19769 i_ss$SB_IO_IN -.sym 19790 spi_if_ins.spi.r_rx_bit_count[2] -.sym 19791 spi_if_ins.spi.r_rx_bit_count[0] -.sym 19793 spi_if_ins.spi.r_rx_bit_count[1] -.sym 19796 spi_if_ins.spi.r_rx_bit_count[0] -.sym 19797 spi_if_ins.spi.r_rx_bit_count[2] -.sym 19798 spi_if_ins.spi.r_rx_bit_count[1] -.sym 19806 spi_if_ins.spi.r_rx_done_SB_DFFESR_Q_E +.sym 19745 spi_if_ins.r_tx_data_valid_SB_LUT4_I3_I2[2] +.sym 19749 spi_if_ins.r_tx_data_valid_SB_LUT4_I3_1_O +.sym 19757 spi_if_ins.r_tx_byte[7] +.sym 19762 spi_if_ins.r_tx_data_valid_SB_LUT4_I3_I2[2] +.sym 19763 spi_if_ins.r_tx_data_valid +.sym 19766 spi_if_ins.spi.o_spi_miso_SB_DFFE_Q_D_SB_LUT4_O_I2[1] +.sym 19768 spi_if_ins.r_tx_byte[7] +.sym 19769 spi_if_ins.r_tx_data_valid_SB_LUT4_I3_1_O +.sym 19780 i_ss_SB_LUT4_I1_O[0] +.sym 19781 i_ss_SB_LUT4_I1_O[1] +.sym 19798 i_ss$SB_IO_IN +.sym 19799 spi_if_ins.r_tx_data_valid +.sym 19806 spi_if_ins.r_tx_data_valid_SB_LUT4_I3_O .sym 19807 w_clock_sys -.sym 19808 i_ss$SB_IO_IN -.sym 19835 $PACKER_GND_NET -.sym 19836 spi_if_ins.spi.r_rx_byte[0] +.sym 19851 spi_if_ins.spi.r_temp_rx_byte[3] .sym 19852 i_ss_SB_LUT4_I1_O[1] -.sym 19859 spi_if_ins.spi.r_temp_rx_byte[1] -.sym 19864 spi_if_ins.spi.r_temp_rx_byte[0] -.sym 19869 spi_if_ins.spi.r_temp_rx_byte[2] -.sym 19870 spi_if_ins.spi.r_temp_rx_byte[4] -.sym 19871 spi_if_ins.spi.r_temp_rx_byte[5] -.sym 19872 i_mosi$SB_IO_IN -.sym 19881 spi_if_ins.spi.r_temp_rx_byte[3] -.sym 19884 spi_if_ins.spi.r_temp_rx_byte[5] -.sym 19889 spi_if_ins.spi.r_temp_rx_byte[0] -.sym 19902 spi_if_ins.spi.r_temp_rx_byte[1] -.sym 19909 spi_if_ins.spi.r_temp_rx_byte[3] -.sym 19914 spi_if_ins.spi.r_temp_rx_byte[4] -.sym 19919 i_mosi$SB_IO_IN -.sym 19925 spi_if_ins.spi.r_temp_rx_byte[2] +.sym 19854 spi_if_ins.spi.r_temp_rx_byte[2] +.sym 19856 spi_if_ins.spi.r_temp_rx_byte[4] +.sym 19860 spi_if_ins.spi.r_temp_rx_byte[1] +.sym 19861 spi_if_ins.spi.r_temp_rx_byte[0] +.sym 19863 spi_if_ins.spi.r_temp_rx_byte[5] +.sym 19874 i_mosi$SB_IO_IN +.sym 19883 spi_if_ins.spi.r_temp_rx_byte[5] +.sym 19892 spi_if_ins.spi.r_temp_rx_byte[2] +.sym 19897 spi_if_ins.spi.r_temp_rx_byte[0] +.sym 19901 i_mosi$SB_IO_IN +.sym 19910 spi_if_ins.spi.r_temp_rx_byte[1] +.sym 19916 spi_if_ins.spi.r_temp_rx_byte[4] +.sym 19920 spi_if_ins.spi.r_temp_rx_byte[3] .sym 19929 i_ss_SB_LUT4_I1_O[1] .sym 19930 w_clock_sys -.sym 19958 spi_if_ins.o_fetch_cmd_SB_LUT4_I3_O_SB_LUT4_I3_O[0] -.sym 19973 spi_if_ins.spi.r_temp_rx_byte[6] -.sym 19976 i_mosi$SB_IO_IN +.sym 19946 i_ss_SB_LUT4_I1_O[1] +.sym 19948 spi_if_ins.r_tx_data_valid +.sym 19974 spi_if_ins.spi.r_temp_rx_byte[3] +.sym 19975 spi_if_ins.spi.r_temp_rx_byte[1] +.sym 19976 spi_if_ins.spi.r_temp_rx_byte[0] .sym 19978 spi_if_ins.spi.r_temp_rx_byte[5] -.sym 19988 spi_if_ins.spi.r_temp_rx_byte[3] +.sym 19985 spi_if_ins.spi.r_temp_rx_byte[2] +.sym 19986 i_mosi$SB_IO_IN +.sym 19987 spi_if_ins.spi.r_temp_rx_byte[4] .sym 19991 spi_if_ins.spi.r_rx_byte_SB_DFFE_Q_E -.sym 20013 spi_if_ins.spi.r_temp_rx_byte[3] -.sym 20032 spi_if_ins.spi.r_temp_rx_byte[6] -.sym 20036 spi_if_ins.spi.r_temp_rx_byte[5] -.sym 20050 i_mosi$SB_IO_IN +.sym 20012 spi_if_ins.spi.r_temp_rx_byte[2] +.sym 20019 spi_if_ins.spi.r_temp_rx_byte[3] +.sym 20024 spi_if_ins.spi.r_temp_rx_byte[5] +.sym 20033 spi_if_ins.spi.r_temp_rx_byte[0] +.sym 20038 spi_if_ins.spi.r_temp_rx_byte[4] +.sym 20044 spi_if_ins.spi.r_temp_rx_byte[1] +.sym 20051 i_mosi$SB_IO_IN .sym 20052 spi_if_ins.spi.r_rx_byte_SB_DFFE_Q_E .sym 20053 w_clock_sys -.sym 20194 $PACKER_GND_NET -.sym 20224 io_ctrl_ins.pmod_dir_state[3] -.sym 20225 io_ctrl_ins.tr_vc_2_state_SB_LUT4_I1_O[2] -.sym 20230 spi_if_ins.o_fetch_cmd_SB_LUT4_I3_O_SB_LUT4_I3_O[0] -.sym 20236 io_ctrl_ins.led0_state_SB_LUT4_I3_O[1] -.sym 20241 io_ctrl_ins.tr_vc_2_state_SB_LUT4_I1_O[3] -.sym 20248 io_ctrl_ins.o_data_out_SB_DFFESS_Q_S -.sym 20294 io_ctrl_ins.led0_state_SB_LUT4_I3_O[1] -.sym 20295 io_ctrl_ins.tr_vc_2_state_SB_LUT4_I1_O[3] -.sym 20296 io_ctrl_ins.pmod_dir_state[3] -.sym 20297 io_ctrl_ins.tr_vc_2_state_SB_LUT4_I1_O[2] -.sym 20298 spi_if_ins.o_fetch_cmd_SB_LUT4_I3_O_SB_LUT4_I3_O[0] +.sym 20074 io_pmod[2]$SB_IO_IN +.sym 20085 smi_ctrl_ins.o_data_out_SB_LUT4_I0_I1[2] +.sym 20105 spi_if_ins.spi.r_rx_byte[3] +.sym 20107 spi_if_ins.spi.r3_rx_done_SB_LUT4_I2_O +.sym 20111 spi_if_ins.spi.r_rx_byte[0] +.sym 20131 spi_if_ins.spi.r_rx_byte[3] +.sym 20143 spi_if_ins.spi.r_rx_byte[0] +.sym 20175 spi_if_ins.spi.r3_rx_done_SB_LUT4_I2_O +.sym 20176 w_clock_sys +.sym 20223 w_tx_data_io[6] +.sym 20230 w_tx_data_io[5] +.sym 20234 w_tx_data_io[7] +.sym 20238 smi_ctrl_ins.o_data_out_SB_LUT4_I0_O[2] +.sym 20243 w_tx_data_io[3] +.sym 20245 smi_ctrl_ins.o_data_out_SB_LUT4_I0_I1[2] +.sym 20246 spi_if_ins.o_cs_SB_LUT4_I3_O +.sym 20247 w_tx_data_io[4] +.sym 20248 smi_ctrl_ins.o_data_out_SB_LUT4_I0_O[1] +.sym 20258 smi_ctrl_ins.o_data_out_SB_LUT4_I0_O[2] +.sym 20259 w_tx_data_io[7] +.sym 20260 smi_ctrl_ins.o_data_out_SB_LUT4_I0_I1[2] +.sym 20270 smi_ctrl_ins.o_data_out_SB_LUT4_I0_I1[2] +.sym 20272 w_tx_data_io[4] +.sym 20277 smi_ctrl_ins.o_data_out_SB_LUT4_I0_I1[2] +.sym 20279 w_tx_data_io[3] +.sym 20282 smi_ctrl_ins.o_data_out_SB_LUT4_I0_I1[2] +.sym 20283 w_tx_data_io[6] +.sym 20288 w_tx_data_io[5] +.sym 20289 smi_ctrl_ins.o_data_out_SB_LUT4_I0_I1[2] +.sym 20291 smi_ctrl_ins.o_data_out_SB_LUT4_I0_O[2] +.sym 20298 spi_if_ins.o_cs_SB_LUT4_I3_O .sym 20299 w_clock_sys -.sym 20300 io_ctrl_ins.o_data_out_SB_DFFESS_Q_S -.sym 20327 io_ctrl_ins.o_data_out_SB_DFFESR_Q_3_E -.sym 20342 io_ctrl_ins.pmod_dir_state[4] -.sym 20343 i_config[1]$SB_IO_IN -.sym 20344 io_ctrl_ins.led0_state_SB_LUT4_I3_O[3] -.sym 20347 sys_ctrl_ins.o_data_out_SB_DFFE_Q_E_SB_LUT4_O_I1_SB_LUT4_I2_O[2] -.sym 20351 io_ctrl_ins.o_data_out_SB_DFFESR_Q_3_R[0] -.sym 20353 io_ctrl_ins.rf_mode[2] -.sym 20355 io_ctrl_ins.o_data_out_SB_DFFESS_Q_S -.sym 20360 spi_if_ins.o_fetch_cmd_SB_LUT4_I3_O_SB_LUT4_I3_O[0] -.sym 20361 io_ctrl_ins.tr_vc_1_b_state_SB_LUT4_I1_O[2] -.sym 20365 io_ctrl_ins.led0_state_SB_LUT4_I3_O[2] -.sym 20368 io_ctrl_ins.led0_state_SB_LUT4_I3_O[1] -.sym 20369 io_ctrl_ins.tr_vc_1_b_state_SB_LUT4_I1_O[3] -.sym 20373 io_ctrl_ins.led0_state_SB_LUT4_I3_O[0] -.sym 20387 io_ctrl_ins.tr_vc_1_b_state_SB_LUT4_I1_O[3] -.sym 20388 io_ctrl_ins.led0_state_SB_LUT4_I3_O[1] -.sym 20389 io_ctrl_ins.pmod_dir_state[4] -.sym 20390 io_ctrl_ins.tr_vc_1_b_state_SB_LUT4_I1_O[2] -.sym 20393 sys_ctrl_ins.o_data_out_SB_DFFE_Q_E_SB_LUT4_O_I1_SB_LUT4_I2_O[2] -.sym 20394 io_ctrl_ins.o_data_out_SB_DFFESR_Q_3_R[0] -.sym 20395 i_config[1]$SB_IO_IN -.sym 20396 io_ctrl_ins.rf_mode[2] -.sym 20399 io_ctrl_ins.led0_state_SB_LUT4_I3_O[0] -.sym 20400 io_ctrl_ins.led0_state_SB_LUT4_I3_O[2] -.sym 20401 io_ctrl_ins.led0_state_SB_LUT4_I3_O[3] -.sym 20402 io_ctrl_ins.led0_state_SB_LUT4_I3_O[1] -.sym 20421 spi_if_ins.o_fetch_cmd_SB_LUT4_I3_O_SB_LUT4_I3_O[0] -.sym 20422 w_clock_sys -.sym 20423 io_ctrl_ins.o_data_out_SB_DFFESS_Q_S -.sym 20440 o_tr_vc2$SB_IO_OUT -.sym 20446 io_ctrl_ins.pmod_dir_state[4] -.sym 20448 o_rx_h_tx_l$SB_IO_OUT -.sym 20465 io_ctrl_ins.rx_h_state_SB_DFFE_Q_D_SB_LUT4_O_I3[2] -.sym 20466 io_ctrl_ins.rf_pin_state[3] -.sym 20467 io_ctrl_ins.rx_h_state_SB_DFFE_Q_E -.sym 20468 io_ctrl_ins.debug_mode_SB_LUT4_I2_O[0] -.sym 20469 io_ctrl_ins.rf_pin_state[4] -.sym 20470 io_ctrl_ins.rf_pin_state[6] -.sym 20475 io_ctrl_ins.rf_pin_state[7] -.sym 20478 io_ctrl_ins.debug_mode_SB_LUT4_I2_O[2] -.sym 20483 io_ctrl_ins.rf_mode[2] -.sym 20487 io_ctrl_ins.debug_mode_SB_LUT4_I2_O[1] -.sym 20489 io_ctrl_ins.rf_mode[0] -.sym 20495 io_ctrl_ins.debug_mode_SB_LUT4_I2_O[3] -.sym 20498 io_ctrl_ins.debug_mode_SB_LUT4_I2_O[2] -.sym 20499 io_ctrl_ins.debug_mode_SB_LUT4_I2_O[0] -.sym 20500 io_ctrl_ins.debug_mode_SB_LUT4_I2_O[1] -.sym 20501 io_ctrl_ins.debug_mode_SB_LUT4_I2_O[3] -.sym 20511 io_ctrl_ins.rf_pin_state[6] -.sym 20512 io_ctrl_ins.rx_h_state_SB_DFFE_Q_D_SB_LUT4_O_I3[2] -.sym 20513 io_ctrl_ins.debug_mode_SB_LUT4_I2_O[3] -.sym 20516 io_ctrl_ins.rf_mode[0] -.sym 20517 io_ctrl_ins.rf_mode[2] -.sym 20522 io_ctrl_ins.rx_h_state_SB_DFFE_Q_D_SB_LUT4_O_I3[2] +.sym 20300 smi_ctrl_ins.o_data_out_SB_LUT4_I0_O[1] +.sym 20448 o_tr_vc1$SB_IO_OUT +.sym 20450 o_tr_vc1_b$SB_IO_OUT +.sym 20456 o_led1$SB_IO_OUT +.sym 20473 io_ctrl_ins.rf_pin_state[4] +.sym 20478 io_ctrl_ins.rf_pin_state[5] +.sym 20483 io_ctrl_ins.debug_mode_SB_LUT4_I0_O +.sym 20487 io_ctrl_ins.tr_vc_1_state_SB_DFFE_Q_D_SB_LUT4_O_I3[2] +.sym 20493 io_ctrl_ins.debug_mode_SB_LUT4_I2_O[3] +.sym 20522 io_ctrl_ins.rf_pin_state[5] .sym 20523 io_ctrl_ins.debug_mode_SB_LUT4_I2_O[3] -.sym 20525 io_ctrl_ins.rf_pin_state[7] +.sym 20524 io_ctrl_ins.tr_vc_1_state_SB_DFFE_Q_D_SB_LUT4_O_I3[2] .sym 20528 io_ctrl_ins.debug_mode_SB_LUT4_I2_O[3] -.sym 20529 io_ctrl_ins.debug_mode_SB_LUT4_I2_O[1] -.sym 20530 io_ctrl_ins.debug_mode_SB_LUT4_I2_O[0] -.sym 20531 io_ctrl_ins.rf_pin_state[4] -.sym 20534 io_ctrl_ins.debug_mode_SB_LUT4_I2_O[1] -.sym 20535 io_ctrl_ins.rf_pin_state[3] -.sym 20536 io_ctrl_ins.rf_mode[2] -.sym 20537 io_ctrl_ins.debug_mode_SB_LUT4_I2_O[3] -.sym 20544 io_ctrl_ins.rx_h_state_SB_DFFE_Q_E +.sym 20530 io_ctrl_ins.rf_pin_state[4] +.sym 20531 io_ctrl_ins.tr_vc_1_state_SB_DFFE_Q_D_SB_LUT4_O_I3[2] +.sym 20544 io_ctrl_ins.debug_mode_SB_LUT4_I0_O .sym 20545 w_clock_sys -.sym 20559 o_tr_vc1$SB_IO_OUT .sym 20561 o_tr_vc1_b$SB_IO_OUT -.sym 20565 o_rx_h_tx_l_b$SB_IO_OUT -.sym 20579 i_config[0]$SB_IO_IN -.sym 20590 o_rx_h_tx_l_b$SB_IO_OUT -.sym 20595 io_ctrl_ins.rx_h_b_state_SB_LUT4_I0_I2[2] -.sym 20597 io_ctrl_ins.rx_h_b_state_SB_LUT4_I0_I2[1] -.sym 20599 io_ctrl_ins.o_data_out_SB_DFFESR_Q_3_E -.sym 20601 io_ctrl_ins.o_data_out_SB_DFFESR_Q_3_R[1] -.sym 20614 io_ctrl_ins.rx_h_b_state_SB_LUT4_I0_I2[3] -.sym 20627 io_ctrl_ins.rx_h_b_state_SB_LUT4_I0_I2[3] -.sym 20628 o_rx_h_tx_l_b$SB_IO_OUT -.sym 20629 io_ctrl_ins.rx_h_b_state_SB_LUT4_I0_I2[2] -.sym 20630 io_ctrl_ins.rx_h_b_state_SB_LUT4_I0_I2[1] -.sym 20667 io_ctrl_ins.o_data_out_SB_DFFESR_Q_3_E -.sym 20668 w_clock_sys -.sym 20669 io_ctrl_ins.o_data_out_SB_DFFESR_Q_3_R[1] +.sym 20576 o_tr_vc1$SB_IO_OUT .sym 20672 i_config[0]$SB_IO_IN -.sym 20690 o_led1$SB_IO_OUT +.sym 20695 i_config[0]$SB_IO_IN .sym 20748 io_smi_data[5]$SB_IO_OUT .sym 20755 io_smi_data[5]$SB_IO_OUT -.sym 20774 o_miso_$_TBUF__Y_E -.sym 20805 int_miso +.sym 20770 o_miso_$_TBUF__Y_E +.sym 20802 $io_pmod[7]$iobuf_i +.sym 20803 io_smi_data[5]$SB_IO_OUT .sym 20844 i_mosi$SB_IO_IN -.sym 21049 lvds_rx_09_inst.r_phase_count_SB_LUT4_O_I3_SB_DFFNESR_Q_E -.sym 21087 lvds_rx_09_inst.r_phase_count_SB_LUT4_I1_O[1] -.sym 21088 lvds_rx_09_inst.r_phase_count_SB_LUT4_I1_O[2] -.sym 21092 lvds_rx_09_inst.r_phase_count[0] -.sym 21129 io_pmod[3]$SB_IO_IN -.sym 21148 lvds_rx_09_inst.o_debug_state[0] -.sym 21149 $PACKER_VCC_NET -.sym 21150 lvds_rx_09_inst.o_debug_state[1] -.sym 21188 lvds_rx_09_inst.r_phase_count_SB_LUT4_O_I3_SB_LUT4_I2_O[3] -.sym 21189 lvds_rx_09_inst.r_phase_count_SB_LUT4_O_I3[1] -.sym 21191 lvds_rx_09_inst.r_phase_count_SB_LUT4_O_I3[2] -.sym 21192 lvds_rx_09_inst.r_phase_count_SB_LUT4_I1_O[0] -.sym 21195 lvds_rx_09_inst.r_phase_count[1] -.sym 21230 io_pmod[4]$SB_IO_IN -.sym 21249 io_pmod[6]$SB_IO_IN -.sym 21292 $io_pmod[3]$iobuf_i -.sym 21293 io_pmod_SB_DFFNESR_Q_E -.sym 21295 smi_ctrl_ins.soe_and_reset +.sym 20985 $PACKER_VCC_NET +.sym 21035 int_miso +.sym 21049 $PACKER_VCC_NET +.sym 21087 smi_ctrl_ins.r_fifo_09_pull_1 +.sym 21093 $io_pmod[4]$iobuf_i +.sym 21235 $io_pmod[4]$iobuf_i +.sym 21240 io_pmod[4]$SB_IO_IN .sym 21333 io_pmod[3]$SB_IO_IN -.sym 21347 smi_ctrl_ins.soe_and_reset +.sym 21394 io_pmod_SB_DFFE_Q_E +.sym 21398 $io_pmod[3]$iobuf_i +.sym 21434 io_pmod[5]$SB_IO_IN .sym 21435 io_pmod[4]$SB_IO_IN -.sym 21440 i_smi_soe_se$rename$0 -.sym 21444 io_pmod[5]$SB_IO_IN +.sym 21457 $PACKER_VCC_NET .sym 21536 io_pmod[3]$SB_IO_IN -.sym 21537 io_pmod[2]$SB_IO_IN -.sym 21549 $PACKER_VCC_NET -.sym 22156 o_rx_h_tx_l$SB_IO_OUT +.sym 21545 w_soft_reset +.sym 21703 spi_if_ins.r_tx_data_valid +.sym 21756 spi_if_ins.o_load_cmd_SB_DFFESR_Q_D[2] +.sym 22256 o_tr_vc1$SB_IO_OUT +.sym 22459 o_rx_h_tx_l_b$SB_IO_OUT .sym 22487 o_led1$SB_IO_OUT .sym 22505 o_led1$SB_IO_OUT .sym 22517 int_miso .sym 22519 o_miso_$_TBUF__Y_E -.sym 22538 o_miso_$_TBUF__Y_E -.sym 22541 int_miso -.sym 22576 i_ss$SB_IO_IN +.sym 22534 o_miso_$_TBUF__Y_E +.sym 22535 int_miso +.sym 22565 $PACKER_VCC_NET +.sym 22575 int_miso .sym 22590 i_ss$SB_IO_IN -.sym 22643 i_ss$SB_IO_IN +.sym 22619 i_ss$SB_IO_IN .sym 22666 i_sck$SB_IO_IN .sym 22668 i_ss$SB_IO_IN +.sym 22711 i_sck$SB_IO_IN .sym 22733 i_ss$SB_IO_IN +.sym 22863 $PACKER_VCC_NET .sym 22965 i_smi_a3$SB_IO_IN -.sym 22981 lvds_rx_09_inst.r_phase_count_SB_LUT4_O_I3_SB_LUT4_I2_O[3] -.sym 22996 lvds_rx_09_inst.r_phase_count_SB_LUT4_O_I3[2] -.sym 22997 lvds_rx_09_inst.r_phase_count_SB_LUT4_I1_O[0] -.sym 23000 lvds_rx_09_inst.r_phase_count[1] -.sym 23009 $PACKER_VCC_NET -.sym 23015 lvds_rx_09_inst.r_phase_count[0] -.sym 23023 lvds_rx_09_inst.r_phase_count[0] -.sym 23025 $nextpnr_ICESTORM_LC_2$O -.sym 23027 lvds_rx_09_inst.r_phase_count[0] -.sym 23031 lvds_rx_09_inst.r_phase_count_SB_CARRY_CI_CO[2] -.sym 23033 $PACKER_VCC_NET -.sym 23034 lvds_rx_09_inst.r_phase_count[1] -.sym 23035 lvds_rx_09_inst.r_phase_count[0] -.sym 23038 $PACKER_VCC_NET -.sym 23039 lvds_rx_09_inst.r_phase_count_SB_LUT4_O_I3[2] -.sym 23041 lvds_rx_09_inst.r_phase_count_SB_CARRY_CI_CO[2] -.sym 23062 lvds_rx_09_inst.r_phase_count_SB_LUT4_I1_O[0] -.sym 23094 io_pmod[4]$SB_IO_IN -.sym 23107 $PACKER_VCC_NET -.sym 23108 $io_pmod[3]$iobuf_i -.sym 23117 lvds_rx_09_inst.r_phase_count_SB_LUT4_I1_O[1] -.sym 23118 lvds_rx_09_inst.r_phase_count_SB_LUT4_O_I3_SB_DFFNESR_Q_E -.sym 23119 lvds_rx_09_inst.r_phase_count_SB_LUT4_O_I3[2] -.sym 23120 lvds_rx_09_inst.o_debug_state[0] -.sym 23122 lvds_rx_09_inst.o_debug_state[1] -.sym 23125 lvds_rx_09_inst.r_phase_count_SB_LUT4_O_I3[1] -.sym 23126 lvds_rx_09_inst.r_phase_count_SB_LUT4_I1_O[2] -.sym 23140 lvds_rx_09_inst.r_phase_count_SB_LUT4_O_I3_SB_LUT4_I2_O[3] -.sym 23144 lvds_rx_09_inst.r_phase_count_SB_LUT4_I1_O[0] -.sym 23150 lvds_rx_09_inst.r_phase_count_SB_LUT4_O_I3[2] -.sym 23151 lvds_rx_09_inst.r_phase_count_SB_LUT4_O_I3[1] -.sym 23152 lvds_rx_09_inst.r_phase_count_SB_LUT4_I1_O[0] -.sym 23155 lvds_rx_09_inst.r_phase_count_SB_LUT4_O_I3_SB_LUT4_I2_O[3] -.sym 23156 lvds_rx_09_inst.o_debug_state[1] -.sym 23157 lvds_rx_09_inst.r_phase_count_SB_LUT4_I1_O[1] -.sym 23158 lvds_rx_09_inst.o_debug_state[0] -.sym 23167 lvds_rx_09_inst.r_phase_count_SB_LUT4_I1_O[2] -.sym 23168 lvds_rx_09_inst.o_debug_state[1] -.sym 23169 lvds_rx_09_inst.r_phase_count_SB_LUT4_O_I3_SB_LUT4_I2_O[3] -.sym 23170 lvds_rx_09_inst.o_debug_state[0] -.sym 23173 lvds_rx_09_inst.o_debug_state[0] -.sym 23174 lvds_rx_09_inst.r_phase_count_SB_LUT4_O_I3_SB_LUT4_I2_O[3] -.sym 23175 lvds_rx_09_inst.o_debug_state[1] -.sym 23176 lvds_rx_09_inst.r_phase_count_SB_LUT4_I1_O[0] -.sym 23194 lvds_rx_09_inst.r_phase_count_SB_LUT4_O_I3[1] -.sym 23195 lvds_rx_09_inst.r_phase_count_SB_LUT4_O_I3_SB_DFFNESR_Q_E -.sym 23196 io_pmod[0]$SB_IO_IN_$glb_clk -.sym 23197 w_soft_reset_$glb_sr +.sym 22968 $PACKER_VCC_NET +.sym 22995 smi_ctrl_ins.r_fifo_09_pull +.sym 23010 smi_ctrl_ins.r_fifo_09_pull_1 +.sym 23020 io_pmod[5]$SB_IO_IN +.sym 23035 smi_ctrl_ins.r_fifo_09_pull +.sym 23068 smi_ctrl_ins.r_fifo_09_pull_1 +.sym 23069 io_pmod[5]$SB_IO_IN +.sym 23071 smi_ctrl_ins.r_fifo_09_pull +.sym 23073 w_clock_sys +.sym 23074 w_soft_reset_$glb_sr +.sym 23078 io_pmod[5]$SB_IO_IN +.sym 23089 smi_ctrl_ins.r_fifo_09_pull +.sym 23100 i_sck$SB_IO_IN +.sym 23107 $io_pmod[6]$iobuf_i .sym 23223 i_ss$SB_IO_IN -.sym 23240 i_smi_soe_se$rename$0 -.sym 23242 lvds_rx_09_inst.o_debug_state[0] -.sym 23247 lvds_rx_09_inst.r_phase_count_SB_LUT4_O_I3_SB_LUT4_I2_O[3] -.sym 23248 lvds_rx_09_inst.o_debug_state[1] -.sym 23250 io_pmod[6]$SB_IO_IN -.sym 23266 io_pmod_SB_DFFNESR_Q_E -.sym 23268 w_soft_reset -.sym 23284 io_pmod[6]$SB_IO_IN -.sym 23285 lvds_rx_09_inst.o_debug_state[0] -.sym 23286 lvds_rx_09_inst.o_debug_state[1] -.sym 23290 lvds_rx_09_inst.o_debug_state[0] -.sym 23291 w_soft_reset -.sym 23292 lvds_rx_09_inst.r_phase_count_SB_LUT4_O_I3_SB_LUT4_I2_O[3] -.sym 23293 lvds_rx_09_inst.o_debug_state[1] -.sym 23302 i_smi_soe_se$rename$0 -.sym 23305 w_soft_reset -.sym 23318 io_pmod_SB_DFFNESR_Q_E -.sym 23319 io_pmod[0]$SB_IO_IN_$glb_clk -.sym 23320 w_soft_reset_$glb_sr -.sym 23328 spi_if_ins.spi.SCKr[0] -.sym 23334 lvds_rx_09_inst.o_debug_state[1] -.sym 23336 lvds_rx_09_inst.o_debug_state[0] +.sym 23230 i_ss$SB_IO_IN +.sym 23341 $io_pmod[5]$iobuf_i .sym 23348 i_ss$SB_IO_IN -.sym 23457 io_pmod[6]$SB_IO_IN -.sym 23814 $io_pmod[0]$iobuf_i -.sym 23825 $PACKER_VCC_NET +.sym 23355 $PACKER_VCC_NET +.sym 23364 io_pmod_SB_DFFE_Q_E +.sym 23372 w_soft_reset +.sym 23383 lvds_rx_09_inst.r_push +.sym 23408 w_soft_reset +.sym 23434 lvds_rx_09_inst.r_push +.sym 23441 io_pmod_SB_DFFE_Q_E +.sym 23442 io_pmod[0]$SB_IO_IN_$glb_clk +.sym 23742 spi_if_ins.r_tx_data_valid_SB_DFFESR_Q_E +.sym 23743 spi_if_ins.r_tx_data_valid_SB_DFFESR_Q_D[1] +.sym 23760 spi_if_ins.o_load_cmd_SB_DFFESR_Q_D[2] +.sym 23796 spi_if_ins.r_tx_data_valid_SB_DFFESR_Q_D[1] +.sym 23810 spi_if_ins.r_tx_data_valid_SB_DFFESR_Q_E +.sym 23811 w_clock_sys +.sym 23812 spi_if_ins.o_load_cmd_SB_DFFESR_Q_D[2] +.sym 23830 spi_if_ins.r_tx_data_valid_SB_DFFESR_Q_E +.sym 23831 spi_if_ins.r_tx_data_valid_SB_DFFESR_Q_D[1] .sym 23945 $io_pmod[1]$iobuf_i -.sym 24591 o_led0$SB_IO_OUT +.sym 24590 o_led0$SB_IO_OUT .sym 24596 o_led0$SB_IO_OUT -.sym 24609 o_led0$SB_IO_OUT -.sym 24659 i_sck$SB_IO_IN +.sym 24616 o_led0$SB_IO_OUT .sym 24664 i_ss$SB_IO_IN .sym 25089 io_pmod[4]$SB_IO_IN -.sym 25098 io_pmod[3]$SB_IO_IN -.sym 25101 $PACKER_VCC_NET +.sym 25106 io_smi_data[5]$SB_IO_OUT +.sym 25341 io_pmod[5]$SB_IO_IN +.sym 25370 io_pmod[5]$SB_IO_IN .sym 25399 io_pmod[5]$SB_IO_IN .sym 25401 i_smi_soe_se$rename$0 -.sym 25416 $io_pmod[4]$iobuf_i .sym 25554 io_pmod[3]$SB_IO_IN .sym 25556 io_pmod[6]$SB_IO_IN -.sym 25647 i_sck$SB_IO_IN -.sym 25705 i_sck$SB_IO_IN -.sym 25707 w_clock_sys .sym 25711 i_glob_clock$SB_IO_IN -.sym 25718 io_pmod[2]$SB_IO_IN -.sym 25727 $io_pmod[3]$iobuf_i +.sym 25723 io_pmod[6]$SB_IO_IN +.sym 25728 $io_pmod[6]$iobuf_i .sym 25878 i_glob_clock$SB_IO_IN +.sym 26034 $PACKER_VCC_NET .sym 26174 io_pmod[2]$SB_IO_IN .sym 26176 io_pmod[1]$SB_IO_IN -.sym 26246 $io_pmod[0]$iobuf_i -.sym 26254 $io_pmod[0]$iobuf_i -.sym 26286 $io_pmod[0]$iobuf_i .sym 26329 io_pmod[0]$SB_IO_IN .sym 26333 $io_pmod[2]$iobuf_i -.sym 27246 $io_pmod[4]$iobuf_i +.sym 26488 $io_pmod[0]$iobuf_i +.sym 26658 o_rx_h_tx_l$SB_IO_OUT +.sym 26813 o_tr_vc2$SB_IO_OUT .sym 27275 io_pmod[4]$SB_IO_IN -.sym 27277 i_ss$SB_IO_IN .sym 27283 $PACKER_VCC_NET .sym 27285 i_smi_a3$SB_IO_IN .sym 27293 i_smi_a3$SB_IO_IN -.sym 27299 $PACKER_VCC_NET -.sym 27305 io_pmod[3]$SB_IO_IN +.sym 27296 $PACKER_VCC_NET +.sym 27305 $io_pmod[7]$iobuf_i .sym 27307 io_pmod[6]$SB_IO_IN .sym 27310 $io_pmod[4]$iobuf_i -.sym 27332 $io_pmod[4]$iobuf_i -.sym 27335 $io_pmod[7]$iobuf_i +.sym 27330 $io_pmod[4]$iobuf_i +.sym 27335 io_pmod[3]$SB_IO_IN .sym 27337 i_mosi$SB_IO_IN .sym 27365 io_pmod[3]$SB_IO_IN -.sym 27367 $io_pmod[5]$iobuf_i -.sym 27368 $io_pmod[6]$iobuf_i .sym 27370 $io_pmod[5]$iobuf_i .sym 27373 $io_pmod[7]$iobuf_i -.sym 27385 $io_pmod[5]$iobuf_i -.sym 27387 $io_pmod[7]$iobuf_i -.sym 27397 $PACKER_VCC_NET +.sym 27390 $io_pmod[5]$iobuf_i +.sym 27391 $io_pmod[7]$iobuf_i .sym 27400 $io_pmod[3]$iobuf_i .sym 27403 $io_pmod[6]$iobuf_i -.sym 27409 $io_pmod[3]$iobuf_i -.sym 27412 $io_pmod[6]$iobuf_i -.sym 27425 io_pmod[2]$SB_IO_IN +.sym 27410 $io_pmod[6]$iobuf_i +.sym 27418 $io_pmod[3]$iobuf_i .sym 27427 io_pmod[1]$SB_IO_IN .sym 27429 i_glob_clock$SB_IO_IN .sym 27451 i_glob_clock$SB_IO_IN .sym 27455 io_pmod[0]$SB_IO_IN +.sym 27458 $PACKER_GND_NET .sym 27459 io_pmod[0]$SB_IO_IN .sym 27460 $PACKER_VCC_NET -.sym 27475 $PACKER_VCC_NET .sym 27481 io_pmod[0]$SB_IO_IN +.sym 27482 $PACKER_VCC_NET .sym 27519 $io_pmod[2]$iobuf_i .sym 27522 $io_pmod[1]$iobuf_i .sym 27528 $io_pmod[2]$iobuf_i .sym 27538 $io_pmod[1]$iobuf_i -.sym 27546 o_tr_vc1$SB_IO_OUT .sym 27549 $io_pmod[0]$iobuf_i .sym 27552 $PACKER_GND_NET -.sym 27565 $PACKER_GND_NET -.sym 27567 $io_pmod[0]$iobuf_i +.sym 27558 $io_pmod[0]$iobuf_i +.sym 27561 $PACKER_GND_NET +.sym 27575 o_rx_h_tx_l_b$SB_IO_OUT .sym 27582 o_rx_h_tx_l$SB_IO_OUT -.sym 27602 o_rx_h_tx_l$SB_IO_OUT +.sym 27589 o_rx_h_tx_l$SB_IO_OUT .sym 27605 o_tr_vc1$SB_IO_OUT .sym 27608 o_tr_vc2$SB_IO_OUT -.sym 27620 o_tr_vc1$SB_IO_OUT -.sym 27621 o_tr_vc2$SB_IO_OUT +.sym 27615 o_tr_vc2$SB_IO_OUT +.sym 27618 o_tr_vc1$SB_IO_OUT .sym 27631 o_rx_h_tx_l_b$SB_IO_OUT .sym 27634 o_tr_vc1_b$SB_IO_OUT .sym 27647 o_tr_vc1_b$SB_IO_OUT -.sym 27649 o_rx_h_tx_l_b$SB_IO_OUT -.sym 27748 lvds_rx_09_inst.r_state_if_SB_DFFNESR_Q_E_SB_LUT4_O_I2[1] -.sym 27749 lvds_rx_09_inst.r_data[15] -.sym 27760 lvds_rx_09_inst.r_state_if_SB_DFFNESR_Q_E_SB_LUT4_O_I2[1] -.sym 27761 lvds_rx_09_inst.r_data[13] -.sym 27772 lvds_rx_09_inst.r_state_if_SB_DFFNESR_Q_E_SB_LUT4_O_I2[1] -.sym 27773 lvds_rx_09_inst.r_data[11] -.sym 27780 lvds_rx_09_inst.r_state_if_SB_DFFNESR_Q_E_SB_LUT4_O_I2[1] -.sym 27781 lvds_rx_09_inst.r_data[16] -.sym 27788 lvds_rx_09_inst.r_state_if_SB_DFFNESR_Q_E_SB_LUT4_O_I2[1] -.sym 27789 lvds_rx_09_inst.r_data[22] -.sym 27792 lvds_rx_09_inst.r_state_if_SB_DFFNESR_Q_E_SB_LUT4_O_I2[1] -.sym 27793 lvds_rx_09_inst.r_data[20] -.sym 27800 lvds_rx_09_inst.r_state_if_SB_DFFNESR_Q_E_SB_LUT4_O_I2[1] -.sym 27801 lvds_rx_09_inst.r_data[18] -.sym 27804 lvds_rx_09_inst.r_state_if_SB_DFFNESR_Q_E_SB_LUT4_O_I2[1] -.sym 27805 lvds_rx_09_inst.r_data[24] -.sym 27844 lvds_rx_09_inst.r_state_if_SB_DFFNESR_Q_E_SB_LUT4_O_I2[1] -.sym 27845 lvds_rx_09_inst.r_data[23] -.sym 27848 lvds_rx_09_inst.r_state_if_SB_DFFNESR_Q_E_SB_LUT4_O_I2[1] -.sym 27849 lvds_rx_09_inst.r_data[21] -.sym 27860 lvds_rx_09_inst.r_state_if_SB_DFFNESR_Q_E_SB_LUT4_O_I2[1] -.sym 27861 lvds_rx_09_inst.r_data[19] -.sym 28228 lvds_rx_09_inst.r_state_if_SB_DFFNESR_Q_E_SB_LUT4_O_I2[1] -.sym 28229 lvds_rx_09_inst.r_data[5] -.sym 28232 lvds_rx_09_inst.r_state_if_SB_DFFNESR_Q_E_SB_LUT4_O_I2[1] -.sym 28233 lvds_rx_09_inst.r_data[9] -.sym 28244 lvds_rx_09_inst.r_state_if_SB_DFFNESR_Q_E_SB_LUT4_O_I2[1] -.sym 28245 lvds_rx_09_inst.r_data[4] -.sym 28252 lvds_rx_09_inst.r_state_if_SB_DFFNESR_Q_E_SB_LUT4_O_I2[1] -.sym 28253 lvds_rx_09_inst.r_data[7] -.sym 28256 lvds_rx_09_inst.r_state_if_SB_DFFNESR_Q_E_SB_LUT4_O_I2[1] -.sym 28257 lvds_rx_09_inst.r_data[2] -.sym 28258 lvds_rx_09_inst.r_data[7] -.sym 28262 lvds_rx_09_inst.r_data[4] -.sym 28274 lvds_rx_09_inst.r_data[9] -.sym 28278 lvds_rx_09_inst.r_data[15] -.sym 28282 lvds_rx_09_inst.r_data[11] -.sym 28286 lvds_rx_09_inst.r_data[13] -.sym 28290 lvds_rx_09_inst.r_data[30] -.sym 28294 lvds_rx_09_inst.r_data[18] -.sym 28298 lvds_rx_09_inst.r_data[29] -.sym 28302 lvds_rx_09_inst.r_data[24] -.sym 28310 lvds_rx_09_inst.r_data[20] -.sym 28314 lvds_rx_09_inst.r_data[17] -.sym 28318 lvds_rx_09_inst.r_data[22] -.sym 28328 lvds_rx_09_inst.r_state_if_SB_DFFNESR_Q_E_SB_LUT4_O_I2[1] -.sym 28329 lvds_rx_09_inst.r_data[17] -.sym 28332 lvds_rx_09_inst.r_state_if_SB_DFFNESR_Q_E_SB_LUT4_O_I2[1] -.sym 28333 lvds_rx_09_inst.r_data[28] -.sym 28336 lvds_rx_09_inst.r_state_if_SB_DFFNESR_Q_E_SB_LUT4_O_I2[1] -.sym 28337 lvds_rx_09_inst.r_data[27] -.sym 28344 lvds_rx_09_inst.r_state_if_SB_DFFNESR_Q_E_SB_LUT4_O_I2[1] -.sym 28345 lvds_rx_09_inst.r_data[26] -.sym 28348 lvds_rx_09_inst.r_state_if_SB_DFFNESR_Q_E_SB_LUT4_O_I2[1] -.sym 28349 lvds_rx_09_inst.r_data[29] -.sym 28352 lvds_rx_09_inst.r_state_if_SB_DFFNESR_Q_E_SB_LUT4_O_I2[1] -.sym 28353 lvds_rx_09_inst.r_data[25] -.sym 28354 lvds_rx_09_inst.r_data[21] -.sym 28358 lvds_rx_09_inst.r_data[23] -.sym 28362 lvds_rx_09_inst.r_data[31] -.sym 28370 lvds_rx_09_inst.r_data[19] -.sym 28374 lvds_rx_09_inst.r_data[25] -.sym 28378 lvds_rx_09_inst.r_data[28] -.sym 28382 lvds_rx_09_inst.r_data[27] -.sym 28708 lvds_rx_09_inst.r_state_if_SB_DFFNESR_Q_E_SB_LUT4_O_I2[1] -.sym 28709 lvds_rx_09_inst.r_data[3] -.sym 28720 lvds_rx_09_inst.r_state_if_SB_DFFNESR_Q_E_SB_LUT4_O_I2[1] -.sym 28721 lvds_rx_09_inst.r_data[1] -.sym 28724 i_smi_a3$SB_IO_IN -.sym 28725 w_smi_data_output[6] -.sym 28738 lvds_rx_09_inst.r_data[12] -.sym 28745 w_rx_09_fifo_pulled_data[0] -.sym 28750 lvds_rx_09_inst.r_data[6] -.sym 28754 lvds_rx_09_inst.r_data[10] -.sym 28758 lvds_rx_09_inst.r_data[8] -.sym 28762 lvds_rx_09_inst.r_data[14] -.sym 28766 lvds_rx_09_inst.r_data[5] -.sym 28770 lvds_rx_09_inst.r_data[0] -.sym 28782 lvds_rx_09_inst.r_data[3] -.sym 28790 lvds_rx_09_inst.r_data[1] -.sym 28798 lvds_rx_09_inst.r_data[2] -.sym 28802 w_rx_09_fifo_pulled_data[15] -.sym 28803 w_rx_09_fifo_pulled_data[31] -.sym 28804 smi_ctrl_ins.int_cnt_09[3] -.sym 28805 smi_ctrl_ins.int_cnt_09[4] -.sym 28806 w_rx_09_fifo_pulled_data[13] -.sym 28807 w_rx_09_fifo_pulled_data[29] -.sym 28808 smi_ctrl_ins.int_cnt_09[3] -.sym 28809 smi_ctrl_ins.int_cnt_09[4] -.sym 28810 w_rx_09_fifo_pulled_data[11] -.sym 28811 w_rx_09_fifo_pulled_data[27] -.sym 28812 smi_ctrl_ins.int_cnt_09[3] -.sym 28813 smi_ctrl_ins.int_cnt_09[4] -.sym 28814 lvds_rx_09_inst.r_data[16] -.sym 28818 w_rx_09_fifo_pulled_data[12] -.sym 28819 w_rx_09_fifo_pulled_data[28] -.sym 28820 smi_ctrl_ins.int_cnt_09[3] -.sym 28821 smi_ctrl_ins.int_cnt_09[4] -.sym 28822 w_rx_09_fifo_pulled_data[9] -.sym 28823 w_rx_09_fifo_pulled_data[25] -.sym 28824 smi_ctrl_ins.int_cnt_09[3] -.sym 28825 smi_ctrl_ins.int_cnt_09[4] -.sym 28826 w_rx_09_fifo_pulled_data[10] -.sym 28827 w_rx_09_fifo_pulled_data[26] -.sym 28828 smi_ctrl_ins.int_cnt_09[3] -.sym 28829 smi_ctrl_ins.int_cnt_09[4] -.sym 28830 lvds_rx_09_inst.r_data[26] -.sym 28835 rx_09_fifo.rd_addr_gray_SB_DFFESR_Q_5_D[0] -.sym 28836 rx_09_fifo.rd_addr[2] -.sym 28837 rx_09_fifo.rd_addr[3] -.sym 28840 smi_ctrl_ins.int_cnt_09[3] -.sym 28841 smi_ctrl_ins.int_cnt_09[4] -.sym 28845 rx_09_fifo.rd_addr[4] -.sym 28849 smi_ctrl_ins.int_cnt_09[3] -.sym 28854 w_soft_reset -.sym 28855 i_smi_a1$SB_IO_IN -.sym 28856 i_smi_a2$SB_IO_IN -.sym 28857 i_smi_a3$SB_IO_IN -.sym 28858 i_smi_a2$SB_IO_IN -.sym 28859 i_smi_a1$SB_IO_IN -.sym 28860 i_smi_a3$SB_IO_IN -.sym 28861 w_soft_reset -.sym 28865 rx_09_fifo.rd_addr[5] -.sym 28866 rx_09_fifo.rd_addr_gray_SB_LUT4_I2_O[2] -.sym 28881 rx_09_fifo.rd_addr[0] -.sym 28882 rx_09_fifo.rd_addr_gray_SB_LUT4_I2_O[7] -.sym 28886 rx_09_fifo.rd_addr_gray_SB_LUT4_I2_O[3] -.sym 28898 spi_if_ins.state_if_SB_DFFESR_Q_D[0] -.sym 28909 sys_ctrl_ins.reset_count_SB_DFFESR_Q_E -.sym 28915 spi_if_ins.state_if[0] -.sym 28916 spi_if_ins.state_if[1] -.sym 28917 spi_if_ins.o_load_cmd_SB_DFFESR_Q_D_SB_LUT4_I2_O[0] -.sym 28938 spi_if_ins.o_load_cmd_SB_DFFESR_Q_D_SB_LUT4_I2_O[0] -.sym 28939 spi_if_ins.o_load_cmd_SB_DFFESR_Q_D[1] -.sym 28940 spi_if_ins.state_if[0] -.sym 28941 spi_if_ins.state_if[1] -.sym 28950 spi_if_ins.state_if_SB_DFFESR_Q_D[0] -.sym 28951 spi_if_ins.o_load_cmd_SB_DFFESR_Q_D_SB_LUT4_I2_O[1] -.sym 28952 spi_if_ins.o_load_cmd_SB_DFFESR_Q_D_SB_LUT4_I2_O_SB_LUT4_I3_O[1] -.sym 28953 spi_if_ins.o_load_cmd_SB_DFFESR_Q_D[1] -.sym 28961 spi_if_ins.o_load_cmd_SB_DFFESR_Q_D[1] -.sym 28962 spi_if_ins.o_load_cmd_SB_DFFESR_Q_D[0] -.sym 28974 spi_if_ins.o_load_cmd_SB_DFFESR_Q_D[1] -.sym 28975 spi_if_ins.o_load_cmd_SB_DFFESR_Q_D_SB_LUT4_I2_O[0] -.sym 28976 spi_if_ins.state_if[1] -.sym 28977 spi_if_ins.state_if[0] -.sym 29013 w_cs[0] -.sym 29018 $PACKER_VCC_NET -.sym 29030 w_fetch -.sym 29031 w_load -.sym 29032 i_button_SB_LUT4_I3_O[1] -.sym 29033 w_cs[0] -.sym 29034 w_rx_data[2] -.sym 29070 spi_if_ins.w_rx_data[4] -.sym 29082 spi_if_ins.w_rx_data[3] -.sym 29090 w_rx_data[1] -.sym 29102 w_rx_data[6] -.sym 29106 w_rx_data[3] -.sym 29118 w_rx_data[4] -.sym 29134 w_rx_data[6] -.sym 29138 w_rx_data[2] -.sym 29142 w_rx_data[1] -.sym 29150 w_rx_data[3] -.sym 29218 w_rx_09_fifo_pulled_data[0] -.sym 29219 w_rx_09_fifo_pulled_data[16] -.sym 29220 smi_ctrl_ins.int_cnt_09[3] -.sym 29221 smi_ctrl_ins.o_smi_data_out_SB_DFFNE_Q_D_SB_LUT4_O_7_I3[3] -.sym 29224 i_smi_a3$SB_IO_IN -.sym 29225 w_smi_data_output[5] -.sym 29232 i_smi_a3$SB_IO_IN -.sym 29233 w_smi_data_output[2] -.sym 29240 i_smi_a3$SB_IO_IN -.sym 29241 w_smi_data_output[1] -.sym 29256 lvds_rx_09_inst.r_state_if_SB_DFFNESR_Q_E_SB_LUT4_O_I2[1] -.sym 29257 lvds_rx_09_inst.r_data[14] -.sym 29264 lvds_rx_09_inst.r_state_if_SB_DFFNESR_Q_E_SB_LUT4_O_I2[1] -.sym 29265 lvds_rx_09_inst.r_data[10] -.sym 29272 lvds_rx_09_inst.r_state_if_SB_DFFNESR_Q_E_SB_LUT4_O_I2[1] -.sym 29273 lvds_rx_09_inst.r_data[12] -.sym 29276 lvds_rx_09_inst.r_state_if_SB_DFFNESR_Q_E_SB_LUT4_O_I2[1] -.sym 29277 lvds_rx_09_inst.r_data[6] -.sym 29280 lvds_rx_09_inst.r_state_if_SB_DFFNESR_Q_E_SB_LUT4_O_I2[1] -.sym 29281 lvds_rx_09_inst.r_data[8] -.sym 29286 w_rx_09_fifo_pulled_data[5] -.sym 29287 w_rx_09_fifo_pulled_data[21] -.sym 29288 smi_ctrl_ins.int_cnt_09[3] -.sym 29289 smi_ctrl_ins.o_smi_data_out_SB_DFFNE_Q_D_SB_LUT4_O_2_I3[3] -.sym 29290 w_rx_09_fifo_pulled_data[6] -.sym 29291 w_rx_09_fifo_pulled_data[22] -.sym 29292 smi_ctrl_ins.int_cnt_09[3] -.sym 29293 smi_ctrl_ins.o_smi_data_out_SB_DFFNE_Q_D_SB_LUT4_O_1_I3[3] -.sym 29294 w_rx_09_fifo_pulled_data[1] -.sym 29295 w_rx_09_fifo_pulled_data[17] -.sym 29296 smi_ctrl_ins.int_cnt_09[3] -.sym 29297 smi_ctrl_ins.o_smi_data_out_SB_DFFNE_Q_D_SB_LUT4_O_6_I3[3] -.sym 29298 w_rx_09_fifo_pulled_data[3] -.sym 29299 w_rx_09_fifo_pulled_data[19] -.sym 29300 smi_ctrl_ins.int_cnt_09[3] -.sym 29301 smi_ctrl_ins.o_smi_data_out_SB_DFFNE_Q_D_SB_LUT4_O_4_I3[3] -.sym 29302 w_rx_09_fifo_pulled_data[2] -.sym 29303 w_rx_09_fifo_pulled_data[18] -.sym 29304 smi_ctrl_ins.int_cnt_09[3] -.sym 29305 smi_ctrl_ins.o_smi_data_out_SB_DFFNE_Q_D_SB_LUT4_O_5_I3[3] -.sym 29306 w_rx_09_fifo_pulled_data[4] -.sym 29307 w_rx_09_fifo_pulled_data[20] -.sym 29308 smi_ctrl_ins.int_cnt_09[3] -.sym 29309 smi_ctrl_ins.o_smi_data_out_SB_DFFNE_Q_D_SB_LUT4_O_3_I3[3] -.sym 29310 w_rx_09_fifo_pulled_data[7] -.sym 29311 w_rx_09_fifo_pulled_data[23] -.sym 29312 smi_ctrl_ins.int_cnt_09[3] -.sym 29313 smi_ctrl_ins.o_smi_data_out_SB_DFFNE_Q_D_SB_LUT4_O_I3[3] -.sym 29314 w_rx_09_fifo_pulled_data[14] -.sym 29315 w_rx_09_fifo_pulled_data[30] -.sym 29316 smi_ctrl_ins.int_cnt_09[3] -.sym 29317 smi_ctrl_ins.int_cnt_09[4] -.sym 29318 rx_09_fifo.rd_addr_gray_wr[6] -.sym 29322 w_rx_09_fifo_pulled_data[8] -.sym 29323 w_rx_09_fifo_pulled_data[24] -.sym 29324 smi_ctrl_ins.int_cnt_09[3] -.sym 29325 smi_ctrl_ins.int_cnt_09[4] -.sym 29326 rx_09_fifo.rd_addr_gray[6] -.sym 29331 rx_09_fifo.rd_addr[0] -.sym 29332 io_pmod_SB_DFFSS_Q_D_SB_LUT4_O_I0[2] -.sym 29333 rx_09_fifo.rd_addr[1] -.sym 29334 rx_09_fifo.rd_addr_gray[4] -.sym 29338 rx_09_fifo.rd_addr_gray[3] -.sym 29346 io_pmod_SB_DFFSS_Q_D_SB_LUT4_O_I0_SB_LUT4_O_I0[0] -.sym 29347 io_pmod_SB_DFFSS_Q_D_SB_LUT4_O_I0_SB_LUT4_O_I0[1] -.sym 29348 io_pmod_SB_DFFSS_Q_D_SB_LUT4_O_I0_SB_LUT4_O_I0[2] -.sym 29349 io_pmod_SB_DFFSS_Q_D_SB_LUT4_O_I0_SB_LUT4_O_I0[3] -.sym 29351 smi_ctrl_ins.r_fifo_09_pull_1 -.sym 29352 io_pmod[5]$SB_IO_IN -.sym 29353 smi_ctrl_ins.r_fifo_09_pull -.sym 29354 io_pmod_SB_DFFSS_Q_D_SB_LUT4_O_I0[0] -.sym 29355 io_pmod_SB_DFFSS_Q_D_SB_LUT4_O_I0[1] -.sym 29356 io_pmod_SB_DFFSS_Q_D_SB_LUT4_O_I0[2] -.sym 29357 io_pmod_SB_DFFSS_Q_D_SB_LUT4_O_I0[3] -.sym 29359 rx_09_fifo.rd_addr_gray_SB_DFFESR_Q_5_D[2] -.sym 29360 rx_09_fifo.rd_addr[3] -.sym 29361 rx_09_fifo.rd_addr[4] -.sym 29362 smi_ctrl_ins.r_fifo_09_pull -.sym 29366 rx_09_fifo.rd_addr_gray_SB_DFFESR_Q_6_D[2] -.sym 29367 rx_09_fifo.rd_addr[1] -.sym 29368 rx_09_fifo.rd_addr[2] -.sym 29369 io_pmod[5]$SB_IO_IN -.sym 29370 io_pmod_SB_DFFSS_Q_D_SB_LUT4_O_I0_SB_LUT4_O_I0_SB_LUT4_O_I0[0] -.sym 29371 io_pmod_SB_DFFSS_Q_D_SB_LUT4_O_I0_SB_LUT4_O_I0_SB_LUT4_O_I0[1] -.sym 29372 io_pmod_SB_DFFSS_Q_D_SB_LUT4_O_I0_SB_LUT4_O_I0_SB_LUT4_O_I0[2] -.sym 29373 io_pmod_SB_DFFSS_Q_D_SB_LUT4_O_I0_SB_LUT4_O_I0_SB_LUT4_O_I0[3] -.sym 29375 io_pmod[5]$SB_IO_IN -.sym 29376 smi_ctrl_ins.int_cnt_09[4] -.sym 29377 smi_ctrl_ins.int_cnt_09[3] -.sym 29378 rx_09_fifo.rd_addr_gray_SB_DFFESR_Q_5_D[3] -.sym 29384 rx_09_fifo.rd_addr_gray_SB_LUT4_I2_O[7] -.sym 29385 rx_09_fifo.rd_addr_gray_SB_LUT4_I2_O[6] -.sym 29388 rx_09_fifo.rd_addr_gray_SB_LUT4_I2_O[4] -.sym 29389 rx_09_fifo.rd_addr_gray_SB_LUT4_I2_O[5] -.sym 29390 rx_09_fifo.rd_addr_gray_SB_LUT4_I2_O[6] -.sym 29394 rx_09_fifo.rd_addr_gray_SB_LUT4_I2_O[4] -.sym 29398 rx_09_fifo.rd_addr_gray_SB_LUT4_I2_O[1] -.sym 29402 rx_09_fifo.rd_addr_gray_SB_LUT4_I2_O[5] -.sym 29408 rx_09_fifo.rd_addr[0] -.sym 29409 rx_09_fifo.rd_addr_gray_SB_LUT4_I2_O[1] -.sym 29411 rx_09_fifo.rd_addr[0] -.sym 29416 rx_09_fifo.rd_addr[1] -.sym 29417 rx_09_fifo.rd_addr[0] -.sym 29420 rx_09_fifo.rd_addr[2] -.sym 29421 rx_09_fifo.rd_addr_gray_SB_LUT4_I2_I3[2] -.sym 29424 rx_09_fifo.rd_addr[3] -.sym 29425 rx_09_fifo.rd_addr_gray_SB_LUT4_I2_I3[3] -.sym 29428 rx_09_fifo.rd_addr[4] -.sym 29429 rx_09_fifo.rd_addr_gray_SB_LUT4_I2_I3[4] -.sym 29432 rx_09_fifo.rd_addr[5] -.sym 29433 rx_09_fifo.rd_addr_gray_SB_LUT4_I2_I3[5] -.sym 29436 io_pmod_SB_DFFSS_Q_D_SB_LUT4_O_I0_SB_LUT4_O_I0_SB_LUT4_O_3_I2[3] -.sym 29437 rx_09_fifo.rd_addr_gray_SB_LUT4_I2_I3[6] -.sym 29440 rx_09_fifo.rd_addr[7] -.sym 29441 rx_09_fifo.rd_addr_gray_SB_LUT4_I2_I3[7] +.sym 27653 o_rx_h_tx_l_b$SB_IO_OUT +.sym 27716 lvds_rx_09_inst.o_debug_state[0] +.sym 27717 lvds_rx_09_inst.r_data[10] +.sym 27720 lvds_rx_09_inst.o_debug_state[0] +.sym 27721 lvds_rx_09_inst.r_data[16] +.sym 27724 lvds_rx_09_inst.o_debug_state[0] +.sym 27725 lvds_rx_09_inst.r_data[14] +.sym 27728 lvds_rx_09_inst.o_debug_state[0] +.sym 27729 lvds_rx_09_inst.r_data[18] +.sym 27732 lvds_rx_09_inst.o_debug_state[0] +.sym 27733 lvds_rx_09_inst.r_data[20] +.sym 27736 lvds_rx_09_inst.o_debug_state[0] +.sym 27737 lvds_rx_09_inst.r_data[8] +.sym 27740 lvds_rx_09_inst.o_debug_state[0] +.sym 27741 lvds_rx_09_inst.r_data[12] +.sym 27744 lvds_rx_09_inst.o_debug_state[0] +.sym 27745 lvds_rx_09_inst.r_data[22] +.sym 27746 lvds_rx_09_inst.r_data[10] +.sym 27750 lvds_rx_09_inst.r_data[18] +.sym 27754 lvds_rx_09_inst.r_data[12] +.sym 27762 lvds_rx_09_inst.r_data[22] +.sym 27770 lvds_rx_09_inst.r_data[16] +.sym 27798 lvds_rx_09_inst.r_data[14] +.sym 27810 lvds_rx_09_inst.r_data[9] +.sym 27814 lvds_rx_09_inst.r_data[11] +.sym 27818 lvds_rx_09_inst.r_data[17] +.sym 27822 lvds_rx_09_inst.r_data[15] +.sym 27826 lvds_rx_09_inst.r_data[7] +.sym 27834 lvds_rx_09_inst.r_data[13] +.sym 27844 lvds_rx_09_inst.o_debug_state[0] +.sym 27845 lvds_rx_09_inst.r_data[15] +.sym 27848 lvds_rx_09_inst.o_debug_state[0] +.sym 27849 lvds_rx_09_inst.r_data[13] +.sym 27852 lvds_rx_09_inst.o_debug_state[0] +.sym 27853 lvds_rx_09_inst.r_data[9] +.sym 27856 lvds_rx_09_inst.o_debug_state[0] +.sym 27857 lvds_rx_09_inst.r_data[11] +.sym 27864 lvds_rx_09_inst.o_debug_state[0] +.sym 27865 lvds_rx_09_inst.r_data[7] +.sym 27868 lvds_rx_09_inst.o_debug_state[0] +.sym 27869 lvds_rx_09_inst.r_data[5] +.sym 27921 r_counter +.sym 28057 $PACKER_VCC_NET +.sym 28196 lvds_rx_09_inst.o_debug_state[0] +.sym 28197 lvds_rx_09_inst.r_data[4] +.sym 28200 lvds_rx_09_inst.o_debug_state[0] +.sym 28201 lvds_rx_09_inst.r_data[2] +.sym 28204 lvds_rx_09_inst.o_debug_state[0] +.sym 28205 lvds_rx_09_inst.r_data[28] +.sym 28212 lvds_rx_09_inst.o_debug_state[0] +.sym 28213 lvds_rx_09_inst.r_data[6] +.sym 28216 lvds_rx_09_inst.o_debug_state[0] +.sym 28217 lvds_rx_09_inst.r_data[26] +.sym 28224 lvds_rx_09_inst.o_debug_state[0] +.sym 28225 lvds_rx_09_inst.r_data[24] +.sym 28226 lvds_rx_09_inst.r_data[8] +.sym 28230 lvds_rx_09_inst.r_data[4] +.sym 28234 lvds_rx_09_inst.r_data[26] +.sym 28238 lvds_rx_09_inst.r_data[28] +.sym 28242 lvds_rx_09_inst.r_data[20] +.sym 28246 lvds_rx_09_inst.r_data[30] +.sym 28250 lvds_rx_09_inst.r_data[24] +.sym 28254 lvds_rx_09_inst.r_data[6] +.sym 28266 w_rx_09_fifo_pulled_data[7] +.sym 28267 w_rx_09_fifo_pulled_data[23] +.sym 28268 smi_ctrl_ins.int_cnt_09[3] +.sym 28269 smi_ctrl_ins.o_smi_data_out_SB_DFFNE_Q_D_SB_LUT4_O_I3[3] +.sym 28270 w_rx_09_fifo_pulled_data[2] +.sym 28271 w_rx_09_fifo_pulled_data[18] +.sym 28272 smi_ctrl_ins.int_cnt_09[3] +.sym 28273 smi_ctrl_ins.o_smi_data_out_SB_DFFNE_Q_D_SB_LUT4_O_5_I3[3] +.sym 28274 w_rx_09_fifo_pulled_data[1] +.sym 28275 w_rx_09_fifo_pulled_data[17] +.sym 28276 smi_ctrl_ins.int_cnt_09[3] +.sym 28277 smi_ctrl_ins.o_smi_data_out_SB_DFFNE_Q_D_SB_LUT4_O_6_I3[3] +.sym 28286 w_rx_09_fifo_pulled_data[3] +.sym 28287 w_rx_09_fifo_pulled_data[19] +.sym 28288 smi_ctrl_ins.int_cnt_09[3] +.sym 28289 smi_ctrl_ins.o_smi_data_out_SB_DFFNE_Q_D_SB_LUT4_O_4_I3[3] +.sym 28293 w_rx_09_fifo_data[17] +.sym 28294 w_rx_09_fifo_pulled_data[10] +.sym 28295 w_rx_09_fifo_pulled_data[26] +.sym 28296 smi_ctrl_ins.int_cnt_09[3] +.sym 28297 smi_ctrl_ins.int_cnt_09[4] +.sym 28298 w_rx_09_fifo_pulled_data[11] +.sym 28299 w_rx_09_fifo_pulled_data[27] +.sym 28300 smi_ctrl_ins.int_cnt_09[3] +.sym 28301 smi_ctrl_ins.int_cnt_09[4] +.sym 28302 w_rx_09_fifo_pulled_data[14] +.sym 28303 w_rx_09_fifo_pulled_data[30] +.sym 28304 smi_ctrl_ins.int_cnt_09[3] +.sym 28305 smi_ctrl_ins.int_cnt_09[4] +.sym 28306 w_rx_09_fifo_pulled_data[15] +.sym 28307 w_rx_09_fifo_pulled_data[31] +.sym 28308 smi_ctrl_ins.int_cnt_09[3] +.sym 28309 smi_ctrl_ins.int_cnt_09[4] +.sym 28313 smi_ctrl_ins.int_cnt_09[3] +.sym 28314 w_rx_09_fifo_pulled_data[12] +.sym 28315 w_rx_09_fifo_pulled_data[28] +.sym 28316 smi_ctrl_ins.int_cnt_09[3] +.sym 28317 smi_ctrl_ins.int_cnt_09[4] +.sym 28318 w_rx_09_fifo_pulled_data[13] +.sym 28319 w_rx_09_fifo_pulled_data[29] +.sym 28320 smi_ctrl_ins.int_cnt_09[3] +.sym 28321 smi_ctrl_ins.int_cnt_09[4] +.sym 28326 w_rx_09_fifo_pulled_data[5] +.sym 28327 w_rx_09_fifo_pulled_data[21] +.sym 28328 smi_ctrl_ins.int_cnt_09[3] +.sym 28329 smi_ctrl_ins.o_smi_data_out_SB_DFFNE_Q_D_SB_LUT4_O_2_I3[3] +.sym 28333 w_rx_09_fifo_data[11] +.sym 28337 w_rx_09_fifo_pulled_data[15] +.sym 28342 w_rx_09_fifo_pulled_data[8] +.sym 28343 w_rx_09_fifo_pulled_data[24] +.sym 28344 smi_ctrl_ins.int_cnt_09[3] +.sym 28345 smi_ctrl_ins.int_cnt_09[4] +.sym 28346 w_rx_09_fifo_pulled_data[9] +.sym 28347 w_rx_09_fifo_pulled_data[25] +.sym 28348 smi_ctrl_ins.int_cnt_09[3] +.sym 28349 smi_ctrl_ins.int_cnt_09[4] +.sym 28350 w_rx_09_fifo_pulled_data[6] +.sym 28351 w_rx_09_fifo_pulled_data[22] +.sym 28352 smi_ctrl_ins.int_cnt_09[3] +.sym 28353 smi_ctrl_ins.o_smi_data_out_SB_DFFNE_Q_D_SB_LUT4_O_1_I3[3] +.sym 28376 smi_ctrl_ins.int_cnt_09[3] +.sym 28377 smi_ctrl_ins.int_cnt_09[4] +.sym 28410 lvds_rx_09_inst.r_data[5] +.sym 28712 lvds_rx_09_inst.o_debug_state[0] +.sym 28713 lvds_rx_09_inst.r_data[25] +.sym 28724 lvds_rx_09_inst.o_debug_state[0] +.sym 28725 lvds_rx_09_inst.r_data[23] +.sym 28728 lvds_rx_09_inst.o_debug_state[0] +.sym 28729 lvds_rx_09_inst.r_data[29] +.sym 28736 lvds_rx_09_inst.o_debug_state[0] +.sym 28737 lvds_rx_09_inst.r_data[27] +.sym 28738 lvds_rx_09_inst.r_data[25] +.sym 28742 lvds_rx_09_inst.r_data[29] +.sym 28748 i_smi_a3$SB_IO_IN +.sym 28749 w_smi_data_output[7] +.sym 28750 lvds_rx_09_inst.r_data[2] +.sym 28754 lvds_rx_09_inst.r_data[31] +.sym 28762 lvds_rx_09_inst.r_data[27] +.sym 28766 lvds_rx_09_inst.r_data[23] +.sym 28770 rx_09_fifo.rd_addr_gray_SB_LUT4_I2_O[4] +.sym 28774 rx_09_fifo.rd_addr_gray_SB_DFFESR_Q_6_D[0] +.sym 28778 rx_09_fifo.rd_addr_gray_SB_LUT4_I2_O[3] +.sym 28784 i_smi_a3$SB_IO_IN +.sym 28785 w_smi_data_output[1] +.sym 28788 i_smi_a3$SB_IO_IN +.sym 28789 w_smi_data_output[5] +.sym 28790 rx_09_fifo.rd_addr_gray_SB_LUT4_I2_O[1] +.sym 28797 rx_09_fifo.rd_addr[0] +.sym 28798 rx_09_fifo.rd_addr_gray_SB_LUT4_I2_O[2] +.sym 28812 rx_09_fifo.rd_addr_gray_SB_LUT4_I2_O[1] +.sym 28813 rx_09_fifo.rd_addr_gray_SB_LUT4_I2_O[2] +.sym 28814 w_rx_09_fifo_pulled_data[0] +.sym 28815 w_rx_09_fifo_pulled_data[16] +.sym 28816 smi_ctrl_ins.int_cnt_09[3] +.sym 28817 smi_ctrl_ins.o_smi_data_out_SB_DFFNE_Q_D_SB_LUT4_O_7_I3[3] +.sym 28820 i_smi_a3$SB_IO_IN +.sym 28821 w_smi_data_output[6] +.sym 28830 w_rx_09_fifo_pulled_data[4] +.sym 28831 w_rx_09_fifo_pulled_data[20] +.sym 28832 smi_ctrl_ins.int_cnt_09[3] +.sym 28833 smi_ctrl_ins.o_smi_data_out_SB_DFFNE_Q_D_SB_LUT4_O_3_I3[3] +.sym 28834 rx_09_fifo.rd_addr_gray_SB_LUT4_I2_O[7] +.sym 28838 rx_09_fifo.rd_addr_gray_SB_LUT4_I2_O[5] +.sym 28844 rx_09_fifo.rd_addr_gray_SB_LUT4_I2_O[7] +.sym 28845 rx_09_fifo.rd_addr_gray_SB_LUT4_I2_O[6] +.sym 28846 rx_09_fifo.rd_addr_gray_SB_LUT4_I2_O[6] +.sym 28850 rx_09_fifo.rd_addr_gray_SB_DFFESR_Q_5_D[1] +.sym 28854 rx_09_fifo.rd_addr_gray_SB_DFFESR_Q_7_D[1] +.sym 28858 rx_09_fifo.rd_addr_gray_SB_DFFESR_Q_4_D[1] +.sym 28862 rx_09_fifo.rd_addr_gray_SB_DFFESR_Q_6_D[2] +.sym 28868 lvds_rx_09_inst.o_debug_state[0] +.sym 28869 lvds_rx_09_inst.r_data[19] +.sym 28880 io_pmod[4]$SB_IO_IN +.sym 28881 w_soft_reset +.sym 28888 lvds_rx_09_inst.o_debug_state[0] +.sym 28889 lvds_rx_09_inst.r_data[3] +.sym 28892 lvds_rx_09_inst.o_debug_state[0] +.sym 28893 lvds_rx_09_inst.r_data[21] +.sym 28896 lvds_rx_09_inst.o_debug_state[0] +.sym 28897 lvds_rx_09_inst.r_data[17] +.sym 28902 w_soft_reset +.sym 28903 i_smi_a1$SB_IO_IN +.sym 28904 i_smi_a2$SB_IO_IN +.sym 28905 i_smi_a3$SB_IO_IN +.sym 28910 rx_09_fifo.rd_addr_gray_wr[6] +.sym 28918 rx_09_fifo.rd_addr_gray[6] +.sym 28926 i_smi_a2$SB_IO_IN +.sym 28927 i_smi_a1$SB_IO_IN +.sym 28928 i_smi_a3$SB_IO_IN +.sym 28929 w_soft_reset +.sym 28934 rx_09_fifo.rd_addr_gray_SB_DFFESR_Q_4_D[3] +.sym 28982 spi_if_ins.spi.r_rx_byte[7] +.sym 29018 spi_if_ins.spi.r_temp_rx_byte[6] +.sym 29050 $PACKER_VCC_NET +.sym 29057 w_cs[0] +.sym 29066 io_ctrl_ins.led0_state_SB_LUT4_I3_O[1] +.sym 29073 sys_ctrl_ins.o_data_out_SB_DFFE_Q_E +.sym 29146 w_rx_data[1] +.sym 29232 lvds_rx_09_inst.o_debug_state[0] +.sym 29233 lvds_rx_09_inst.r_data[0] +.sym 29249 io_smi_data[7]$SB_IO_OUT +.sym 29252 i_smi_a3$SB_IO_IN +.sym 29253 w_smi_data_output[2] +.sym 29256 i_smi_a3$SB_IO_IN +.sym 29257 w_smi_data_output[4] +.sym 29262 rx_09_fifo.rd_addr_gray[3] +.sym 29266 rx_09_fifo.rd_addr_gray_wr[3] +.sym 29274 rx_09_fifo.rd_addr_gray_wr[2] +.sym 29284 rx_09_fifo.rd_addr_gray_SB_DFFESR_Q_6_D[1] +.sym 29285 rx_09_fifo.rd_addr[1] +.sym 29286 rx_09_fifo.wr_addr_gray_rd[2] +.sym 29290 io_pmod_SB_DFFSS_Q_D_SB_LUT4_O_I0_SB_LUT4_O_I0_SB_LUT4_O_1_I2[0] +.sym 29291 io_pmod_SB_DFFSS_Q_D_SB_LUT4_O_I0_SB_LUT4_O_I0_SB_LUT4_O_1_I2[1] +.sym 29292 io_pmod_SB_DFFSS_Q_D_SB_LUT4_O_I0_SB_LUT4_O_I0_SB_LUT4_O_1_I2[2] +.sym 29293 io_pmod_SB_DFFSS_Q_D_SB_LUT4_O_I0_SB_LUT4_O_I0_SB_LUT4_O_1_I2[3] +.sym 29296 rx_09_fifo.rd_addr_gray_SB_DFFESR_Q_4_D[2] +.sym 29297 rx_09_fifo.rd_addr[4] +.sym 29299 io_pmod_SB_DFFSS_Q_D_SB_LUT4_O_I0_SB_LUT4_O_I0_SB_LUT4_O_1_I2[0] +.sym 29300 io_pmod_SB_DFFSS_Q_D_SB_LUT4_O_I0_SB_LUT4_O_I0_SB_LUT4_O_2_I1[1] +.sym 29301 io_pmod[5]$SB_IO_IN +.sym 29302 io_pmod_SB_DFFSS_Q_D_SB_LUT4_O_I0_SB_LUT4_O_1_I0[0] +.sym 29303 io_pmod_SB_DFFSS_Q_D_SB_LUT4_O_I0_SB_LUT4_O_1_I0[1] +.sym 29304 io_pmod_SB_DFFSS_Q_D_SB_LUT4_O_I0_SB_LUT4_O_1_I0[2] +.sym 29305 io_pmod_SB_DFFSS_Q_D_SB_LUT4_O_I0_SB_LUT4_O_1_I0[3] +.sym 29308 rx_09_fifo.rd_addr_gray_SB_DFFESR_Q_4_D[0] +.sym 29309 rx_09_fifo.rd_addr[4] +.sym 29311 rx_09_fifo.rd_addr[0] +.sym 29312 rx_09_fifo.rd_addr_gray_SB_DFFESR_Q_7_D[0] +.sym 29313 rx_09_fifo.rd_addr[1] +.sym 29315 rx_09_fifo.rd_addr[0] +.sym 29320 rx_09_fifo.rd_addr[1] +.sym 29321 rx_09_fifo.rd_addr[0] +.sym 29324 io_pmod_SB_DFFSS_Q_D_SB_LUT4_O_I0_SB_LUT4_O_I0_SB_LUT4_O_2_I1[1] +.sym 29325 rx_09_fifo.rd_addr_gray_SB_LUT4_I2_I3[2] +.sym 29328 io_pmod_SB_DFFSS_Q_D_SB_LUT4_O_I0_SB_LUT4_O_I0_SB_LUT4_O_1_I2[3] +.sym 29329 rx_09_fifo.rd_addr_gray_SB_LUT4_I2_I3[3] +.sym 29332 rx_09_fifo.rd_addr[4] +.sym 29333 rx_09_fifo.rd_addr_gray_SB_LUT4_I2_I3[4] +.sym 29336 io_pmod_SB_DFFSS_Q_D_SB_LUT4_O_I0_SB_LUT4_O_1_I0[1] +.sym 29337 rx_09_fifo.rd_addr_gray_SB_LUT4_I2_I3[5] +.sym 29340 io_pmod_SB_DFFSS_Q_D_SB_LUT4_O_I0_SB_LUT4_O_1_I0[3] +.sym 29341 rx_09_fifo.rd_addr_gray_SB_LUT4_I2_I3[6] +.sym 29344 rx_09_fifo.rd_addr[7] +.sym 29345 rx_09_fifo.rd_addr_gray_SB_LUT4_I2_I3[7] +.sym 29348 rx_09_fifo.rd_addr_gray_SB_LUT4_I2_O[5] +.sym 29349 rx_09_fifo.rd_addr_gray_SB_LUT4_I2_O[6] +.sym 29352 rx_09_fifo.rd_addr[0] +.sym 29353 rx_09_fifo.rd_addr_gray_SB_LUT4_I2_O[1] +.sym 29356 rx_09_fifo.rd_addr_gray_SB_LUT4_I2_O[3] +.sym 29357 rx_09_fifo.rd_addr_gray_SB_LUT4_I2_O[4] +.sym 29358 rx_09_fifo.rd_addr_gray[2] +.sym 29362 rx_09_fifo.rd_addr_gray_SB_DFFESR_Q_6_D[0] +.sym 29363 rx_09_fifo.rd_addr_gray_SB_DFFESR_Q_6_D[1] +.sym 29364 rx_09_fifo.rd_addr_gray_SB_DFFESR_Q_6_D[2] +.sym 29365 io_pmod_SB_DFFSS_Q_D_SB_LUT4_O_I0_SB_LUT4_O_1_I0[2] +.sym 29368 rx_09_fifo.rd_addr_gray_SB_LUT4_I2_O[2] +.sym 29369 rx_09_fifo.rd_addr_gray_SB_LUT4_I2_O[3] +.sym 29370 rx_09_fifo.rd_addr_gray_SB_DFFESR_Q_4_D[0] +.sym 29371 rx_09_fifo.rd_addr_gray_SB_DFFESR_Q_4_D[1] +.sym 29372 rx_09_fifo.rd_addr_gray_SB_DFFESR_Q_4_D[2] +.sym 29373 rx_09_fifo.rd_addr_gray_SB_DFFESR_Q_4_D[3] +.sym 29376 rx_09_fifo.rd_addr_gray_SB_LUT4_I2_O[4] +.sym 29377 rx_09_fifo.rd_addr_gray_SB_LUT4_I2_O[5] +.sym 29378 rx_09_fifo.rd_addr_gray_SB_DFFESR_Q_7_D[0] +.sym 29379 rx_09_fifo.rd_addr_gray_SB_DFFESR_Q_7_D[1] +.sym 29380 rx_09_fifo.rd_addr_gray_SB_DFFESR_Q_7_D[2] +.sym 29381 rx_09_fifo.rd_addr_gray_SB_DFFESR_Q_7_D[3] +.sym 29382 lvds_rx_09_inst.r_data[3] +.sym 29386 io_pmod_SB_DFFSS_Q_D_SB_LUT4_O_I0_SB_LUT4_O_I0_SB_LUT4_O_1_I2[1] +.sym 29387 rx_09_fifo.rd_addr_gray_SB_DFFESR_Q_5_D[1] +.sym 29388 io_pmod[4]$SB_IO_IN +.sym 29389 rx_09_fifo.rd_addr_gray_SB_DFFESR_Q_5_D[3] +.sym 29398 lvds_rx_09_inst.r_data[21] +.sym 29406 lvds_rx_09_inst.r_data[19] +.sym 29418 io_pmod[6]$SB_IO_IN +.sym 29438 io_pmod[5]$SB_IO_IN .sym 29443 sys_ctrl_ins.reset_count[0] .sym 29448 sys_ctrl_ins.reset_count[1] .sym 29450 sys_ctrl_ins.o_soft_reset_SB_DFFESS_Q_S @@ -8485,761 +8466,758 @@ .sym 29454 sys_ctrl_ins.o_soft_reset_SB_DFFESS_Q_S .sym 29456 sys_ctrl_ins.reset_count[3] .sym 29457 sys_ctrl_ins.reset_count_SB_DFFESR_Q_D_SB_LUT4_O_I3[3] -.sym 29460 sys_ctrl_ins.o_soft_reset_SB_DFFESS_Q_S -.sym 29461 sys_ctrl_ins.reset_cmd +.sym 29458 sys_ctrl_ins.o_soft_reset_SB_DFFESS_Q_S +.sym 29460 sys_ctrl_ins.reset_count[1] +.sym 29461 sys_ctrl_ins.reset_count[0] .sym 29465 sys_ctrl_ins.reset_count[0] -.sym 29468 spi_if_ins.state_if[0] -.sym 29469 spi_if_ins.state_if[1] -.sym 29470 sys_ctrl_ins.o_soft_reset_SB_DFFESS_Q_S -.sym 29472 sys_ctrl_ins.reset_count[1] +.sym 29468 sys_ctrl_ins.o_soft_reset_SB_DFFESS_Q_S +.sym 29469 sys_ctrl_ins.reset_cmd +.sym 29470 sys_ctrl_ins.reset_count[3] +.sym 29471 sys_ctrl_ins.reset_count[1] +.sym 29472 sys_ctrl_ins.reset_count[2] .sym 29473 sys_ctrl_ins.reset_count[0] -.sym 29476 spi_if_ins.w_rx_data[6] -.sym 29477 spi_if_ins.w_rx_data[5] -.sym 29480 spi_if_ins.w_rx_data[5] -.sym 29481 spi_if_ins.w_rx_data[6] -.sym 29482 sys_ctrl_ins.reset_count[1] -.sym 29483 sys_ctrl_ins.reset_count[3] -.sym 29484 sys_ctrl_ins.reset_count[2] -.sym 29485 sys_ctrl_ins.reset_count[0] -.sym 29488 spi_if_ins.w_rx_data[5] -.sym 29489 spi_if_ins.w_rx_data[6] -.sym 29490 spi_if_ins.o_load_cmd_SB_DFFESR_Q_D_SB_LUT4_I2_O[0] -.sym 29491 spi_if_ins.state_if[0] -.sym 29492 spi_if_ins.state_if[1] -.sym 29493 spi_if_ins.o_load_cmd_SB_DFFESR_Q_D[1] -.sym 29499 w_fetch -.sym 29500 w_load -.sym 29501 w_cs[1] -.sym 29505 sys_ctrl_ins.reset_cmd -.sym 29506 w_cs[0] -.sym 29507 w_cs[1] -.sym 29508 w_cs[2] -.sym 29509 w_cs[3] -.sym 29510 w_cs[0] -.sym 29511 w_cs[2] -.sym 29512 w_cs[3] -.sym 29513 w_cs[1] -.sym 29514 w_tx_data_smi[1] -.sym 29515 smi_ctrl_ins.o_data_out_SB_LUT4_I0_I1[1] -.sym 29516 smi_ctrl_ins.o_data_out_SB_LUT4_I0_I1[2] -.sym 29517 w_tx_data_io[1] -.sym 29519 smi_ctrl_ins.o_data_out_SB_LUT4_I0_I1[2] -.sym 29520 w_tx_data_io[7] -.sym 29521 smi_ctrl_ins.o_data_out_SB_LUT4_I0_O[2] -.sym 29523 smi_ctrl_ins.o_data_out_SB_LUT4_I0_I1[2] -.sym 29524 w_tx_data_io[5] -.sym 29525 smi_ctrl_ins.o_data_out_SB_LUT4_I0_O[2] -.sym 29526 w_cs[0] -.sym 29527 w_cs[1] -.sym 29528 w_cs[3] -.sym 29529 w_cs[2] -.sym 29531 smi_ctrl_ins.o_data_out_SB_LUT4_I0_I1[2] -.sym 29532 w_tx_data_io[2] -.sym 29533 smi_ctrl_ins.o_data_out_SB_LUT4_I0_O[2] -.sym 29537 w_fetch -.sym 29550 io_ctrl_ins.led1_state_SB_LUT4_I3_O[0] -.sym 29551 io_ctrl_ins.led0_state_SB_LUT4_I3_O[1] -.sym 29552 io_ctrl_ins.led1_state_SB_LUT4_I3_O[2] -.sym 29553 io_ctrl_ins.led1_state_SB_LUT4_I3_O[3] -.sym 29574 spi_if_ins.w_rx_data[4] -.sym 29581 spi_if_ins.o_load_cmd_SB_LUT4_I2_O_SB_LUT4_I3_O_SB_LUT4_I3_1_O -.sym 29582 spi_if_ins.w_rx_data[3] -.sym 29586 spi_if_ins.w_rx_data[2] -.sym 29592 io_ctrl_ins.led0_state_SB_LUT4_I3_O[1] -.sym 29593 spi_if_ins.o_load_cmd_SB_LUT4_I2_O_SB_LUT4_I3_O[1] -.sym 29606 spi_if_ins.w_rx_data[6] -.sym 29612 w_ioc[0] -.sym 29613 io_ctrl_ins.tr_vc_2_state_SB_LUT4_I1_I3[3] -.sym 29614 spi_if_ins.w_rx_data[5] -.sym 29618 spi_if_ins.w_rx_data[0] -.sym 29626 spi_if_ins.o_load_cmd_SB_DFFESR_Q_D_SB_LUT4_I2_O[1] -.sym 29630 spi_if_ins.w_rx_data[2] -.sym 29642 io_ctrl_ins.o_pmod[1] -.sym 29643 o_shdn_rx_lna$SB_IO_OUT -.sym 29644 w_ioc[0] -.sym 29645 io_ctrl_ins.tr_vc_2_state_SB_LUT4_I1_I3[3] -.sym 29652 io_ctrl_ins.o_data_out_SB_DFFESR_Q_D_SB_LUT4_O_I2[0] -.sym 29653 io_ctrl_ins.o_data_out_SB_DFFESR_Q_D_SB_LUT4_O_I2[1] -.sym 29654 io_ctrl_ins.led0_state_SB_LUT4_I3_O[1] -.sym 29655 io_ctrl_ins.pmod_dir_state[2] -.sym 29656 i_button_SB_LUT4_I3_O[1] -.sym 29657 io_ctrl_ins.o_pmod[2] -.sym 29660 i_button_SB_LUT4_I3_O[1] -.sym 29661 spi_if_ins.o_load_cmd_SB_LUT4_I2_O_SB_LUT4_I3_O[1] -.sym 29662 io_ctrl_ins.led0_state_SB_LUT4_I3_O[1] -.sym 29663 io_ctrl_ins.pmod_dir_state[6] -.sym 29664 i_button_SB_LUT4_I3_O[1] -.sym 29665 io_ctrl_ins.o_pmod[6] -.sym 29666 w_rx_data[0] -.sym 29670 w_rx_data[5] -.sym 29686 w_rx_data[7] -.sym 29690 w_rx_data[4] -.sym 29730 rx_09_fifo.rd_addr_gray_wr[4] -.sym 29746 rx_09_fifo.rd_addr_gray_wr[1] -.sym 29763 io_pmod_SB_DFFSR_Q_D_SB_LUT4_O_I2_SB_LUT4_O_1_I0_SB_LUT4_O_2_I0[3] +.sym 29475 smi_ctrl_ins.o_data_out_SB_LUT4_I0_I1[2] +.sym 29476 w_tx_data_io[2] +.sym 29477 smi_ctrl_ins.o_data_out_SB_LUT4_I0_O[2] +.sym 29489 spi_if_ins.o_ioc_SB_DFFE_Q_E[0] +.sym 29498 w_tx_data_smi[1] +.sym 29499 smi_ctrl_ins.o_data_out_SB_LUT4_I0_I1[1] +.sym 29500 smi_ctrl_ins.o_data_out_SB_LUT4_I0_I1[2] +.sym 29501 w_tx_data_io[1] +.sym 29514 spi_if_ins.o_cs_SB_DFFESR_Q_R[0] +.sym 29521 spi_if_ins.o_cs_SB_LUT4_I3_O +.sym 29534 w_tx_data_smi[0] +.sym 29535 smi_ctrl_ins.o_data_out_SB_LUT4_I0_I1[1] +.sym 29536 smi_ctrl_ins.o_data_out_SB_LUT4_I0_I1[2] +.sym 29537 w_tx_data_io[0] +.sym 29538 w_fetch +.sym 29539 w_load +.sym 29540 i_button_SB_LUT4_I3_O[1] +.sym 29541 w_cs[0] +.sym 29546 w_tx_data_sys[0] +.sym 29547 smi_ctrl_ins.o_data_out_SB_LUT4_I0_O[1] +.sym 29548 smi_ctrl_ins.o_data_out_SB_LUT4_I0_O[2] +.sym 29549 smi_ctrl_ins.o_data_out_SB_LUT4_I0_O[3] +.sym 29552 smi_ctrl_ins.o_data_out_SB_DFFESS_Q_E_SB_LUT4_O_I3[0] +.sym 29553 smi_ctrl_ins.o_data_out_SB_DFFESS_Q_E_SB_LUT4_O_I3[1] +.sym 29554 w_soft_reset +.sym 29555 w_ioc[1] +.sym 29556 w_cs[2] +.sym 29557 w_fetch +.sym 29559 smi_ctrl_ins.o_data_out_SB_DFFESS_Q_E_SB_LUT4_O_I3[0] +.sym 29560 w_cs[0] +.sym 29561 w_fetch +.sym 29571 w_ioc[0] +.sym 29572 smi_ctrl_ins.o_data_out_SB_DFFESS_Q_E_SB_LUT4_O_I3[0] +.sym 29573 io_ctrl_ins.tr_vc_2_state_SB_LUT4_I1_I3[1] +.sym 29578 spi_if_ins.w_rx_data[4] +.sym 29582 spi_if_ins.w_rx_data[2] +.sym 29590 spi_if_ins.w_rx_data[3] +.sym 29594 spi_if_ins.w_rx_data[0] +.sym 29598 spi_if_ins.w_rx_data[1] +.sym 29602 w_rx_data[3] +.sym 29606 w_rx_data[0] +.sym 29610 w_rx_data[1] +.sym 29617 spi_if_ins.o_load_cmd_SB_LUT4_I2_O_SB_LUT4_I3_O_SB_LUT4_I3_O +.sym 29620 w_ioc[0] +.sym 29621 io_ctrl_ins.tr_vc_2_state_SB_LUT4_I1_I3[1] +.sym 29626 w_rx_data[2] +.sym 29630 w_ioc[1] +.sym 29631 w_ioc[4] +.sym 29632 w_ioc[3] +.sym 29633 w_ioc[2] +.sym 29642 spi_if_ins.w_rx_data[1] +.sym 29646 spi_if_ins.w_rx_data[0] +.sym 29650 spi_if_ins.w_rx_data[2] +.sym 29678 io_ctrl_ins.led1_state_SB_LUT4_I3_O[0] +.sym 29679 io_ctrl_ins.led0_state_SB_LUT4_I3_O[1] +.sym 29680 io_ctrl_ins.led1_state_SB_LUT4_I3_O[2] +.sym 29681 io_ctrl_ins.led1_state_SB_LUT4_I3_O[3] +.sym 29682 io_ctrl_ins.o_pmod[1] +.sym 29683 o_shdn_rx_lna$SB_IO_OUT +.sym 29684 w_ioc[0] +.sym 29685 io_ctrl_ins.tr_vc_2_state_SB_LUT4_I1_I3[1] +.sym 29686 io_ctrl_ins.led0_state_SB_LUT4_I3_O[0] +.sym 29687 io_ctrl_ins.led0_state_SB_LUT4_I3_O[1] +.sym 29688 io_ctrl_ins.led0_state_SB_LUT4_I3_O[2] +.sym 29689 io_ctrl_ins.led0_state_SB_LUT4_I3_O[3] +.sym 29690 io_ctrl_ins.pmod_dir_state[3] +.sym 29691 io_ctrl_ins.led0_state_SB_LUT4_I3_O[1] +.sym 29692 io_ctrl_ins.tr_vc_2_state_SB_LUT4_I1_O[2] +.sym 29693 io_ctrl_ins.tr_vc_2_state_SB_LUT4_I1_O[3] +.sym 29736 i_smi_a3$SB_IO_IN +.sym 29737 w_smi_data_output[3] +.sym 29738 rx_09_fifo.wr_addr_gray[3] +.sym 29763 io_pmod_SB_DFFSR_Q_D_SB_LUT4_O_I0_SB_LUT4_O_I2_SB_LUT4_O_I1_SB_LUT4_O_I3[1] .sym 29768 rx_09_fifo.wr_addr[2] +.sym 29769 io_pmod_SB_DFFSR_Q_D_SB_LUT4_O_I0_SB_LUT4_O_I2_SB_LUT4_O_I1_SB_LUT4_O_I3[1] .sym 29772 rx_09_fifo.wr_addr[3] -.sym 29773 io_pmod_SB_DFFSR_Q_D_SB_LUT4_O_I2_SB_LUT4_O_1_I0_SB_LUT4_O_I2_SB_LUT4_O_I3[2] +.sym 29773 io_pmod_SB_DFFSR_Q_D_SB_LUT4_O_I0_SB_LUT4_O_I2_SB_LUT4_O_I1_SB_LUT4_O_I3[2] .sym 29776 rx_09_fifo.wr_addr[4] -.sym 29777 io_pmod_SB_DFFSR_Q_D_SB_LUT4_O_I2_SB_LUT4_O_1_I0_SB_LUT4_O_I2_SB_LUT4_O_I3[3] +.sym 29777 io_pmod_SB_DFFSR_Q_D_SB_LUT4_O_I0_SB_LUT4_O_I2_SB_LUT4_O_I1_SB_LUT4_O_I3[3] .sym 29780 rx_09_fifo.wr_addr[5] -.sym 29781 io_pmod_SB_DFFSR_Q_D_SB_LUT4_O_I2_SB_LUT4_O_1_I0_SB_LUT4_O_I2_SB_LUT4_O_I3[4] +.sym 29781 io_pmod_SB_DFFSR_Q_D_SB_LUT4_O_I0_SB_LUT4_O_I2_SB_LUT4_O_I1_SB_LUT4_O_I3[4] .sym 29784 rx_09_fifo.wr_addr[6] -.sym 29785 io_pmod_SB_DFFSR_Q_D_SB_LUT4_O_I2_SB_LUT4_O_1_I0_SB_LUT4_O_I2_SB_LUT4_O_I3[5] +.sym 29785 io_pmod_SB_DFFSR_Q_D_SB_LUT4_O_I0_SB_LUT4_O_I2_SB_LUT4_O_I1_SB_LUT4_O_I3[5] .sym 29788 rx_09_fifo.wr_addr[7] -.sym 29789 io_pmod_SB_DFFSR_Q_D_SB_LUT4_O_I2_SB_LUT4_O_1_I0_SB_LUT4_O_I2_SB_LUT4_O_I3[6] -.sym 29790 rx_09_fifo.rd_addr_gray_wr_r[6] -.sym 29791 rx_09_fifo.rd_addr_gray_wr_r[7] -.sym 29792 io_pmod_SB_DFFSR_Q_D_SB_LUT4_O_I2_SB_LUT4_O_1_I0_SB_LUT4_O_I2[6] -.sym 29793 io_pmod_SB_DFFSR_Q_D_SB_LUT4_O_I2_SB_LUT4_O_1_I0_SB_LUT4_O_1_I0[3] -.sym 29804 i_smi_a3$SB_IO_IN -.sym 29805 w_smi_data_output[7] -.sym 29806 rx_09_fifo.wr_addr_gray[2] -.sym 29814 rx_09_fifo.wr_addr_gray_rd[6] -.sym 29820 i_smi_a3$SB_IO_IN -.sym 29821 w_smi_data_output[4] -.sym 29826 rx_09_fifo.rd_addr_gray_wr[2] -.sym 29830 rx_09_fifo.rd_addr_gray[2] -.sym 29834 rx_09_fifo.rd_addr_gray_wr[3] -.sym 29850 rx_09_fifo.rd_addr[7] -.sym 29854 rx_09_fifo.rd_addr_gray_wr[7] -.sym 29858 io_pmod_SB_DFFSS_Q_D_SB_LUT4_O_I0_SB_LUT4_O_I0_SB_LUT4_O_3_I2[1] -.sym 29859 io_pmod_SB_DFFSS_Q_D_SB_LUT4_O_I0_SB_LUT4_O_I0_SB_LUT4_O_3_I2[0] -.sym 29860 io_pmod_SB_DFFSS_Q_D_SB_LUT4_O_I0_SB_LUT4_O_I0_SB_LUT4_O_3_I2[3] -.sym 29861 rx_09_fifo.rd_addr[7] -.sym 29864 rx_09_fifo.rd_addr_gray_SB_DFFESR_Q_6_D[1] -.sym 29865 rx_09_fifo.rd_addr[5] -.sym 29870 rx_09_fifo.wr_addr_gray_rd[3] -.sym 29874 rx_09_fifo.wr_addr_gray_rd[0] -.sym 29878 rx_09_fifo.wr_addr_gray_rd[2] -.sym 29883 rx_09_fifo.wr_addr_gray_rd_r[4] -.sym 29884 rx_09_fifo.rd_addr[4] -.sym 29885 rx_09_fifo.rd_addr[5] -.sym 29886 io_pmod_SB_DFFSS_Q_D_SB_LUT4_O_I0_SB_LUT4_O_I0_SB_LUT4_O_3_I2[0] -.sym 29887 io_pmod_SB_DFFSS_Q_D_SB_LUT4_O_I0_SB_LUT4_O_I0_SB_LUT4_O_3_I2[1] -.sym 29888 io_pmod_SB_DFFSS_Q_D_SB_LUT4_O_I0_SB_LUT4_O_I0_SB_LUT4_O_3_I2[2] -.sym 29889 io_pmod_SB_DFFSS_Q_D_SB_LUT4_O_I0_SB_LUT4_O_I0_SB_LUT4_O_3_I2[3] -.sym 29890 spi_if_ins.o_cs_SB_DFFESR_Q_R[0] -.sym 29894 rx_09_fifo.wr_addr_gray_rd_r[4] -.sym 29895 rx_09_fifo.rd_addr_gray_SB_LUT4_I2_O[4] -.sym 29896 rx_09_fifo.rd_addr_gray_SB_LUT4_I2_O[5] -.sym 29897 io_pmod[4]$SB_IO_IN -.sym 29898 rx_09_fifo.rd_addr_gray_SB_DFFESR_Q_6_D_SB_LUT4_I0_O[0] -.sym 29899 rx_09_fifo.rd_addr_gray_SB_DFFESR_Q_6_D_SB_LUT4_I0_O[1] -.sym 29900 rx_09_fifo.rd_addr_gray_SB_DFFESR_Q_6_D_SB_LUT4_I0_O[2] -.sym 29901 rx_09_fifo.rd_addr_gray_SB_DFFESR_Q_6_D_SB_LUT4_I0_O[3] -.sym 29904 rx_09_fifo.rd_addr_gray_SB_LUT4_I2_O[1] -.sym 29905 rx_09_fifo.rd_addr_gray_SB_LUT4_I2_O[2] -.sym 29906 rx_09_fifo.rd_addr_gray_SB_DFFESR_Q_5_D[0] -.sym 29907 rx_09_fifo.rd_addr_gray_SB_DFFESR_Q_5_D[1] -.sym 29908 rx_09_fifo.rd_addr_gray_SB_DFFESR_Q_5_D[2] -.sym 29909 rx_09_fifo.rd_addr_gray_SB_DFFESR_Q_5_D[3] -.sym 29912 rx_09_fifo.rd_addr_gray_SB_LUT4_I2_O[2] -.sym 29913 rx_09_fifo.rd_addr_gray_SB_LUT4_I2_O[3] -.sym 29916 rx_09_fifo.rd_addr_gray_SB_LUT4_I2_O[5] -.sym 29917 rx_09_fifo.rd_addr_gray_SB_LUT4_I2_O[6] -.sym 29918 io_pmod_SB_DFFSS_Q_D_SB_LUT4_O_I0_SB_LUT4_O_I0_SB_LUT4_O_3_I2[0] -.sym 29919 io_pmod_SB_DFFSS_Q_D_SB_LUT4_O_I0_SB_LUT4_O_I0_SB_LUT4_O_3_I2[1] -.sym 29920 rx_09_fifo.rd_addr_gray_SB_LUT4_I2_O[7] -.sym 29921 rx_09_fifo.rd_addr_gray_SB_LUT4_I2_O[6] -.sym 29923 spi_if_ins.state_if[1] -.sym 29924 spi_if_ins.o_load_cmd_SB_DFFESR_Q_D_SB_LUT4_I2_O[0] -.sym 29925 spi_if_ins.state_if[0] -.sym 29933 rx_09_fifo.rd_addr_SB_DFFESR_Q_E -.sym 29936 rx_09_fifo.rd_addr_gray_SB_LUT4_I2_O[3] -.sym 29937 rx_09_fifo.rd_addr_gray_SB_LUT4_I2_O[4] -.sym 29938 io_pmod[6]$SB_IO_IN -.sym 29950 io_pmod[5]$SB_IO_IN -.sym 29955 spi_if_ins.o_load_cmd_SB_DFFESR_Q_D[1] -.sym 29956 spi_if_ins.o_load_cmd_SB_DFFESR_Q_D_SB_LUT4_I2_O_SB_LUT4_I3_O[1] -.sym 29957 spi_if_ins.o_load_cmd_SB_DFFESR_Q_D_SB_LUT4_I2_O_SB_LUT4_I3_O[2] +.sym 29789 io_pmod_SB_DFFSR_Q_D_SB_LUT4_O_I0_SB_LUT4_O_I2_SB_LUT4_O_I1_SB_LUT4_O_I3[6] +.sym 29790 rx_09_fifo.wr_addr_gray_rd[3] +.sym 29794 rx_09_fifo.rd_addr_gray_wr[4] +.sym 29798 rx_09_fifo.rd_addr_gray[1] +.sym 29802 rx_09_fifo.rd_addr_gray_wr[7] +.sym 29806 rx_09_fifo.rd_addr_gray_wr[1] +.sym 29810 rx_09_fifo.rd_addr[7] +.sym 29818 rx_09_fifo.rd_addr_gray_wr_r[6] +.sym 29819 rx_09_fifo.rd_addr_gray_wr_r[7] +.sym 29820 io_pmod_SB_DFFSR_Q_D_SB_LUT4_O_I0_SB_LUT4_O_I2_SB_LUT4_O_I1[6] +.sym 29821 io_pmod_SB_DFFSR_Q_D_SB_LUT4_O_I0_SB_LUT4_O_I2_SB_LUT4_O_I1[5] +.sym 29822 rx_09_fifo.rd_addr_gray[4] +.sym 29826 rx_09_fifo.wr_addr_gray_rd[4] +.sym 29830 io_pmod_SB_DFFSS_Q_D_SB_LUT4_O_I0_SB_LUT4_O_I0[0] +.sym 29831 io_pmod_SB_DFFSS_Q_D_SB_LUT4_O_I0_SB_LUT4_O_I0[1] +.sym 29832 io_pmod_SB_DFFSS_Q_D_SB_LUT4_O_I0_SB_LUT4_O_I0[2] +.sym 29833 io_pmod_SB_DFFSS_Q_D_SB_LUT4_O_I0_SB_LUT4_O_I0[3] +.sym 29834 rx_09_fifo.wr_addr_gray[0] +.sym 29838 rx_09_fifo.wr_addr_gray[4] +.sym 29842 rx_09_fifo.wr_addr_gray_rd[0] +.sym 29846 rx_09_fifo.wr_addr_gray_rd[5] +.sym 29850 rx_09_fifo.wr_addr_gray[1] +.sym 29854 rx_09_fifo.wr_addr_gray_rd[1] +.sym 29870 rx_09_fifo.wr_addr_gray_SB_DFFESR_Q_4_D[2] +.sym 29874 rx_09_fifo.wr_addr_gray_SB_DFFESR_Q_5_D_SB_LUT4_I2_O[1] +.sym 29878 rx_09_fifo.wr_addr_gray_rd_r[6] +.sym 29879 rx_09_fifo.wr_addr_gray_rd_r[7] +.sym 29880 rx_09_fifo.rd_addr_gray_SB_LUT4_I2_O[7] +.sym 29881 rx_09_fifo.rd_addr_gray_SB_LUT4_I2_O[6] +.sym 29882 rx_09_fifo.wr_addr_gray_rd_r[6] +.sym 29883 rx_09_fifo.rd_addr[7] +.sym 29884 rx_09_fifo.wr_addr_gray_rd_r[7] +.sym 29885 io_pmod_SB_DFFSS_Q_D_SB_LUT4_O_I0_SB_LUT4_O_1_I0[3] +.sym 29886 rx_09_fifo.wr_addr_gray_SB_LUT4_I2_O[7] +.sym 29894 rx_09_fifo.wr_addr_gray_rd[6] +.sym 29898 rx_09_fifo.wr_addr_gray[6] +.sym 29902 rx_09_fifo.wr_addr[7] +.sym 29906 lvds_rx_09_inst.r_state_if_SB_DFFESR_Q_E_SB_LUT4_O_I0[0] +.sym 29907 lvds_rx_09_inst.r_state_if_SB_DFFESR_Q_E_SB_LUT4_O_I0[1] +.sym 29908 lvds_rx_09_inst.r_state_if_SB_DFFESR_Q_E_SB_LUT4_O_I0[2] +.sym 29909 w_soft_reset +.sym 29910 rx_09_fifo.wr_addr_gray_rd[7] +.sym 29923 w_soft_reset +.sym 29924 lvds_rx_09_inst.r_state_if_SB_DFFESR_Q_E_SB_LUT4_O_I0[1] +.sym 29925 lvds_rx_09_inst.r_push +.sym 29933 sys_ctrl_ins.o_soft_reset_SB_DFFESS_Q_E +.sym 29942 io_pmod_SB_DFFSS_Q_D_SB_LUT4_O_I0[0] +.sym 29943 io_pmod_SB_DFFSS_Q_D_SB_LUT4_O_I0[1] +.sym 29944 io_pmod_SB_DFFSS_Q_D_SB_LUT4_O_I0[2] +.sym 29945 io_pmod_SB_DFFSS_Q_D_SB_LUT4_O_I0[3] +.sym 29951 io_pmod[5]$SB_IO_IN +.sym 29952 smi_ctrl_ins.int_cnt_09[4] +.sym 29953 smi_ctrl_ins.int_cnt_09[3] .sym 29961 sys_ctrl_ins.reset_cmd -.sym 29971 spi_if_ins.state_if[0] -.sym 29972 spi_if_ins.o_load_cmd_SB_DFFESR_Q_D_SB_LUT4_I2_O[0] -.sym 29973 spi_if_ins.state_if[1] -.sym 29974 spi_if_ins.r_tx_byte[2] -.sym 29978 spi_if_ins.o_load_cmd_SB_DFFESR_Q_D_SB_LUT4_I2_O[0] -.sym 29979 spi_if_ins.o_load_cmd_SB_DFFESR_Q_D_SB_LUT4_I2_O[1] -.sym 29980 spi_if_ins.o_load_cmd_SB_DFFESR_Q_D_SB_LUT4_I2_O[2] -.sym 29981 spi_if_ins.o_load_cmd_SB_DFFESR_Q_D_SB_LUT4_I2_O[3] -.sym 29984 spi_if_ins.o_load_cmd_SB_DFFESR_Q_D_SB_LUT4_I2_O_SB_LUT4_I3_O[1] -.sym 29985 spi_if_ins.o_load_cmd_SB_DFFESR_Q_D[1] -.sym 29992 spi_if_ins.o_load_cmd_SB_DFFESR_Q_D_SB_LUT4_I2_O[0] -.sym 29993 spi_if_ins.o_load_cmd_SB_DFFESR_Q_D_SB_LUT4_I2_O[3] +.sym 29978 spi_if_ins.state_if_SB_DFFESR_Q_D[0] +.sym 29990 spi_if_ins.state_if[2] +.sym 29991 spi_if_ins.o_load_cmd_SB_DFFESR_Q_D[2] +.sym 29992 spi_if_ins.state_if[0] +.sym 29993 spi_if_ins.state_if[1] +.sym 29994 spi_if_ins.state_if_SB_DFFESR_Q_D[0] +.sym 29995 spi_if_ins.o_ioc_SB_DFFE_Q_E[0] .sym 29996 spi_if_ins.o_load_cmd_SB_DFFESR_Q_D[0] -.sym 29997 spi_if_ins.o_load_cmd_SB_DFFESR_Q_D_SB_LUT4_I2_O[0] -.sym 30004 spi_if_ins.o_load_cmd_SB_DFFESR_Q_D[0] -.sym 30005 spi_if_ins.o_load_cmd_SB_DFFESR_Q_D[1] -.sym 30008 spi_if_ins.w_rx_data[5] -.sym 30009 spi_if_ins.w_rx_data[6] -.sym 30015 w_soft_reset -.sym 30016 w_cs[1] -.sym 30017 w_fetch -.sym 30018 r_tx_data[7] +.sym 29997 spi_if_ins.o_load_cmd_SB_DFFESR_Q_D[2] +.sym 30001 spi_if_ins.state_if_SB_DFFE_Q_E +.sym 30003 spi_if_ins.state_if[2] +.sym 30004 spi_if_ins.state_if[1] +.sym 30005 spi_if_ins.state_if[0] +.sym 30007 spi_if_ins.state_if[2] +.sym 30008 spi_if_ins.state_if[0] +.sym 30009 spi_if_ins.state_if[1] +.sym 30018 spi_if_ins.state_if[2] +.sym 30019 spi_if_ins.o_load_cmd_SB_DFFESR_Q_D[2] +.sym 30020 spi_if_ins.state_if[0] +.sym 30021 spi_if_ins.state_if[1] .sym 30022 w_cs[0] -.sym 30023 w_cs[1] -.sym 30024 w_cs[2] -.sym 30025 w_cs[3] -.sym 30026 r_tx_data[5] -.sym 30032 spi_if_ins.o_load_cmd_SB_DFFESR_Q_D[1] -.sym 30033 spi_if_ins.r_tx_data_valid_SB_DFFESR_Q_D[1] -.sym 30034 w_cs[1] -.sym 30035 w_cs[2] -.sym 30036 w_cs[3] -.sym 30037 w_cs[0] -.sym 30038 r_tx_data[0] -.sym 30042 r_tx_data[1] -.sym 30046 r_tx_data[2] -.sym 30052 smi_ctrl_ins.o_data_out_SB_DFFESS_Q_E_SB_LUT4_O_I3[0] -.sym 30053 smi_ctrl_ins.o_data_out_SB_DFFESS_Q_E_SB_LUT4_O_I3[1] -.sym 30058 w_soft_reset -.sym 30059 w_ioc[1] -.sym 30060 w_cs[2] -.sym 30061 w_fetch -.sym 30062 w_tx_data_sys[0] -.sym 30063 smi_ctrl_ins.o_data_out_SB_LUT4_I0_O[1] -.sym 30064 smi_ctrl_ins.o_data_out_SB_LUT4_I0_O[2] -.sym 30065 smi_ctrl_ins.o_data_out_SB_LUT4_I0_O[3] -.sym 30070 w_tx_data_smi[0] -.sym 30071 smi_ctrl_ins.o_data_out_SB_LUT4_I0_I1[1] -.sym 30072 smi_ctrl_ins.o_data_out_SB_LUT4_I0_I1[2] -.sym 30073 w_tx_data_io[0] -.sym 30082 spi_if_ins.spi.r_rx_byte[0] -.sym 30091 io_ctrl_ins.tr_vc_2_state_SB_LUT4_I1_I3[3] -.sym 30092 smi_ctrl_ins.o_data_out_SB_DFFESS_Q_E_SB_LUT4_O_I3[0] -.sym 30093 spi_if_ins.o_fetch_cmd_SB_LUT4_I3_O[2] -.sym 30098 spi_if_ins.spi.r_rx_byte[2] -.sym 30102 spi_if_ins.spi.r_rx_byte[4] -.sym 30107 w_ioc[2] -.sym 30108 w_ioc[4] -.sym 30109 w_ioc[3] -.sym 30110 w_ioc[1] -.sym 30111 w_ioc[4] -.sym 30112 w_ioc[3] -.sym 30113 w_ioc[2] -.sym 30115 w_ioc[1] +.sym 30023 w_cs[2] +.sym 30024 w_cs[3] +.sym 30025 w_cs[1] +.sym 30027 spi_if_ins.o_load_cmd_SB_DFFESR_Q_D[0] +.sym 30028 spi_if_ins.o_load_cmd_SB_DFFESR_Q_D[1] +.sym 30029 spi_if_ins.o_load_cmd_SB_DFFESR_Q_D[2] +.sym 30030 w_cs[0] +.sym 30031 w_cs[1] +.sym 30032 w_cs[3] +.sym 30033 w_cs[2] +.sym 30036 spi_if_ins.o_load_cmd_SB_DFFESR_Q_D[1] +.sym 30037 spi_if_ins.state_if[2] +.sym 30047 spi_if_ins.o_ioc_SB_DFFE_Q_E[0] +.sym 30048 spi_if_ins.o_ioc_SB_DFFE_Q_E[1] +.sym 30049 spi_if_ins.o_ioc_SB_DFFE_Q_E[2] +.sym 30052 spi_if_ins.w_rx_data[5] +.sym 30053 spi_if_ins.w_rx_data[6] +.sym 30056 spi_if_ins.w_rx_data[6] +.sym 30057 spi_if_ins.w_rx_data[5] +.sym 30059 w_fetch +.sym 30060 w_load +.sym 30061 w_cs[1] +.sym 30064 spi_if_ins.w_rx_data[5] +.sym 30065 spi_if_ins.w_rx_data[6] +.sym 30066 w_cs[0] +.sym 30067 w_cs[1] +.sym 30068 w_cs[2] +.sym 30069 w_cs[3] +.sym 30070 w_cs[1] +.sym 30071 w_cs[2] +.sym 30072 w_cs[3] +.sym 30073 w_cs[0] +.sym 30075 w_soft_reset +.sym 30076 w_cs[1] +.sym 30077 w_fetch +.sym 30078 w_cs[0] +.sym 30079 w_cs[1] +.sym 30080 w_cs[2] +.sym 30081 w_cs[3] +.sym 30087 w_ioc[0] +.sym 30088 w_ioc[1] +.sym 30089 io_ctrl_ins.o_data_out_SB_DFFESS_Q_E[2] +.sym 30094 io_ctrl_ins.o_data_out_SB_DFFESR_Q_D_SB_LUT4_O_I2[0] +.sym 30095 io_ctrl_ins.led0_state_SB_LUT4_I3_O[1] +.sym 30096 io_ctrl_ins.o_data_out_SB_DFFESR_Q_D_SB_LUT4_O_I2[2] +.sym 30097 io_ctrl_ins.o_data_out_SB_DFFESR_Q_D_SB_LUT4_O_I2[3] +.sym 30100 w_soft_reset +.sym 30101 spi_if_ins.o_load_cmd_SB_LUT4_I2_O[1] +.sym 30108 io_ctrl_ins.led0_state_SB_LUT4_I3_O[1] +.sym 30109 spi_if_ins.o_load_cmd_SB_LUT4_I2_O_SB_LUT4_I3_O[1] +.sym 30114 io_ctrl_ins.o_pmod[4] +.sym 30115 o_tr_vc1_b$SB_IO_OUT .sym 30116 w_ioc[0] -.sym 30117 spi_if_ins.o_fetch_cmd_SB_LUT4_I3_O_SB_LUT4_I3_O[0] -.sym 30119 w_ioc[0] -.sym 30120 smi_ctrl_ins.o_data_out_SB_DFFESS_Q_E_SB_LUT4_O_I3[0] -.sym 30121 io_ctrl_ins.tr_vc_2_state_SB_LUT4_I1_I3[3] -.sym 30123 smi_ctrl_ins.o_data_out_SB_DFFESS_Q_E_SB_LUT4_O_I3[0] -.sym 30124 w_ioc[0] -.sym 30125 w_ioc[1] -.sym 30126 spi_if_ins.w_rx_data[0] -.sym 30132 w_soft_reset -.sym 30133 spi_if_ins.o_load_cmd_SB_LUT4_I2_O[1] -.sym 30138 io_ctrl_ins.o_data_out_SB_DFFESR_Q_3_R[0] -.sym 30139 io_ctrl_ins.debug_mode[1] -.sym 30140 sys_ctrl_ins.o_data_out_SB_DFFE_Q_E_SB_LUT4_O_I1_SB_LUT4_I2_O[2] -.sym 30141 o_led1$SB_IO_OUT -.sym 30142 spi_if_ins.w_rx_data[1] -.sym 30167 io_ctrl_ins.o_data_out_SB_DFFESR_Q_3_R[0] -.sym 30168 spi_if_ins.o_load_cmd_SB_LUT4_I2_O[1] -.sym 30169 w_soft_reset -.sym 30170 io_ctrl_ins.rx_h_b_state_SB_LUT4_I0_I2[1] -.sym 30171 o_shdn_tx_lna$SB_IO_OUT -.sym 30172 io_ctrl_ins.o_data_out_SB_DFFESR_Q_3_R[0] -.sym 30173 io_ctrl_ins.rf_mode[0] -.sym 30174 spi_if_ins.w_rx_data[1] -.sym 30179 spi_if_ins.o_load_cmd_SB_LUT4_I2_O[1] -.sym 30180 sys_ctrl_ins.o_data_out_SB_DFFE_Q_E_SB_LUT4_O_I1_SB_LUT4_I2_O[2] -.sym 30181 w_soft_reset -.sym 30182 w_rx_data[1] -.sym 30209 o_shdn_rx_lna$SB_IO_OUT -.sym 30218 w_rx_data[0] -.sym 30234 w_rx_data[1] -.sym 30243 rx_09_fifo.rd_addr_gray_wr_r[2] -.sym 30244 io_pmod_SB_DFFSR_Q_D_SB_LUT4_O_I2_SB_LUT4_O_1_I0_SB_LUT4_O_2_I0[2] -.sym 30245 io_pmod_SB_DFFSR_Q_D_SB_LUT4_O_I2_SB_LUT4_O_1_I0_SB_LUT4_O_3_I3[1] -.sym 30246 rx_09_fifo.rd_addr_gray[1] -.sym 30252 rx_09_fifo.rd_addr_gray_wr_r[4] -.sym 30253 io_pmod_SB_DFFSR_Q_D_SB_LUT4_O_I2_SB_LUT4_O_1_I0_SB_LUT4_O_3_I3[2] -.sym 30258 io_pmod_SB_DFFSR_Q_D_SB_LUT4_O_I2_SB_LUT4_O_1_I0[0] -.sym 30259 io_pmod_SB_DFFSR_Q_D_SB_LUT4_O_I2_SB_LUT4_O_1_I0[1] -.sym 30260 io_pmod_SB_DFFSR_Q_D_SB_LUT4_O_I2_SB_LUT4_O_1_I0[2] -.sym 30261 io_pmod_SB_DFFSR_Q_D_SB_LUT4_O_I2_SB_LUT4_O_1_I0[3] -.sym 30262 io_pmod_SB_DFFSR_Q_D_SB_LUT4_O_I2_SB_LUT4_O_1_I0_SB_LUT4_O_2_I0[0] -.sym 30263 io_pmod_SB_DFFSR_Q_D_SB_LUT4_O_I2_SB_LUT4_O_1_I0_SB_LUT4_O_2_I0[1] -.sym 30264 io_pmod_SB_DFFSR_Q_D_SB_LUT4_O_I2_SB_LUT4_O_1_I0_SB_LUT4_O_2_I0[2] -.sym 30265 io_pmod_SB_DFFSR_Q_D_SB_LUT4_O_I2_SB_LUT4_O_1_I0_SB_LUT4_O_2_I0[3] -.sym 30266 io_pmod_SB_DFFSR_Q_D_SB_LUT4_O_I2_SB_LUT4_O_1_I0_SB_LUT4_O_3_I3[0] -.sym 30267 io_pmod_SB_DFFSR_Q_D_SB_LUT4_O_I2_SB_LUT4_O_1_I0_SB_LUT4_O_3_I3[1] -.sym 30268 io_pmod_SB_DFFSR_Q_D_SB_LUT4_O_I2_SB_LUT4_O_1_I0_SB_LUT4_O_3_I3[2] -.sym 30269 io_pmod_SB_DFFSR_Q_D_SB_LUT4_O_I2_SB_LUT4_O_1_I0_SB_LUT4_O_3_I3[3] -.sym 30272 i_smi_a3$SB_IO_IN -.sym 30273 w_smi_data_output[3] -.sym 30274 io_pmod_SB_DFFSR_Q_D_SB_LUT4_O_I2_SB_LUT4_O_I0_SB_LUT4_O_I3[2] -.sym 30278 rx_09_fifo.wr_addr_gray_SB_LUT4_I2_O[2] -.sym 30282 rx_09_fifo.wr_addr_gray_SB_DFFESR_Q_7_D[0] -.sym 30286 rx_09_fifo.wr_addr_gray_SB_LUT4_I2_O[1] -.sym 30290 rx_09_fifo.wr_addr_gray_SB_LUT4_I2_O[4] -.sym 30296 w_soft_reset -.sym 30297 io_pmod[3]$SB_IO_IN -.sym 30298 rx_09_fifo.wr_addr_gray_SB_LUT4_I2_O[3] -.sym 30302 io_pmod_SB_DFFSR_Q_D_SB_LUT4_O_I2_SB_LUT4_O_1_I0_SB_LUT4_O_1_I0[0] -.sym 30303 io_pmod_SB_DFFSR_Q_D_SB_LUT4_O_I2_SB_LUT4_O_1_I0_SB_LUT4_O_1_I0[1] -.sym 30304 io_pmod_SB_DFFSR_Q_D_SB_LUT4_O_I2_SB_LUT4_O_1_I0_SB_LUT4_O_1_I0[2] -.sym 30305 io_pmod_SB_DFFSR_Q_D_SB_LUT4_O_I2_SB_LUT4_O_1_I0_SB_LUT4_O_1_I0[3] -.sym 30308 rx_09_fifo.wr_addr[0] -.sym 30309 rx_09_fifo.wr_addr_gray_SB_LUT4_I2_O[1] -.sym 30313 rx_09_fifo.wr_addr[0] -.sym 30314 rx_09_fifo.wr_addr_gray_SB_DFFESR_Q_7_D[3] -.sym 30322 rx_09_fifo.wr_addr_gray_SB_LUT4_I2_O[7] -.sym 30326 io_pmod_SB_DFFSR_Q_D_SB_LUT4_O_I2_SB_LUT4_O_I0_SB_LUT4_O_I3[1] -.sym 30332 io_pmod_SB_DFFSR_Q_D_SB_LUT4_O_I2_SB_LUT4_O_I0_SB_LUT4_O_I3[1] -.sym 30333 io_pmod_SB_DFFSR_Q_D_SB_LUT4_O_I2_SB_LUT4_O_I0_SB_LUT4_O_I3[2] -.sym 30334 rx_09_fifo.wr_addr_gray_SB_DFFESR_Q_4_D[1] -.sym 30338 rx_09_fifo.wr_addr_gray[5] -.sym 30342 rx_09_fifo.wr_addr_gray[3] -.sym 30346 rx_09_fifo.wr_addr_gray[0] -.sym 30366 rx_09_fifo.wr_addr[7] -.sym 30372 lvds_rx_09_inst.o_debug_state[1] -.sym 30373 lvds_rx_09_inst.o_debug_state[0] -.sym 30374 rx_09_fifo.wr_addr_gray_rd[7] -.sym 30378 rx_09_fifo.wr_addr_gray_rd[1] -.sym 30382 rx_09_fifo.wr_addr_gray_rd[5] -.sym 30386 rx_09_fifo.wr_addr_gray_rd[4] -.sym 30402 io_pmod_SB_DFFSS_Q_D_SB_LUT4_O_I0[1] -.sym 30406 rx_09_fifo.rd_addr_gray_SB_DFFESR_Q_6_D[0] -.sym 30407 rx_09_fifo.rd_addr_gray_SB_DFFESR_Q_6_D[1] -.sym 30408 rx_09_fifo.rd_addr_gray_SB_DFFESR_Q_6_D[2] -.sym 30409 rx_09_fifo.rd_addr_gray_SB_DFFESR_Q_6_D[3] -.sym 30412 io_pmod[4]$SB_IO_IN +.sym 30117 io_ctrl_ins.tr_vc_2_state_SB_LUT4_I1_I3[1] +.sym 30119 smi_ctrl_ins.o_data_out_SB_DFFESS_Q_E_SB_LUT4_O_I3[0] +.sym 30120 w_ioc[1] +.sym 30121 w_ioc[0] +.sym 30122 w_rx_data[1] +.sym 30128 io_ctrl_ins.o_data_out_SB_DFFESR_Q_3_R[0] +.sym 30129 io_ctrl_ins.debug_mode_SB_LUT4_I2_O[1] +.sym 30130 io_ctrl_ins.o_pmod[2] +.sym 30131 o_shdn_tx_lna$SB_IO_OUT +.sym 30132 w_ioc[0] +.sym 30133 io_ctrl_ins.tr_vc_2_state_SB_LUT4_I1_I3[1] +.sym 30134 w_rx_data[0] +.sym 30140 i_button_SB_LUT4_I3_O[1] +.sym 30141 spi_if_ins.o_load_cmd_SB_LUT4_I2_O_SB_LUT4_I3_O[1] +.sym 30143 w_ioc[2] +.sym 30144 w_ioc[4] +.sym 30145 w_ioc[3] +.sym 30146 spi_if_ins.o_ioc_SB_DFFE_Q_E[0] +.sym 30151 spi_if_ins.o_load_cmd_SB_LUT4_I2_O[1] +.sym 30152 sys_ctrl_ins.o_data_out_SB_DFFE_Q_E_SB_LUT4_O_I1_SB_LUT4_I3_O[2] +.sym 30153 w_soft_reset +.sym 30156 io_ctrl_ins.o_data_out_SB_DFFESR_Q_3_R[0] +.sym 30157 io_ctrl_ins.o_data_out_SB_DFFESR_Q_3_R[1] +.sym 30158 spi_if_ins.w_rx_data[3] +.sym 30162 spi_if_ins.w_rx_data[4] +.sym 30166 spi_if_ins.w_rx_data[5] +.sym 30171 w_ioc[1] +.sym 30172 smi_ctrl_ins.o_data_out_SB_DFFESS_Q_E_SB_LUT4_O_I3[0] +.sym 30173 io_ctrl_ins.tr_vc_2_state_SB_LUT4_I1_I3[1] +.sym 30174 spi_if_ins.w_rx_data[6] +.sym 30178 io_ctrl_ins.o_data_out_SB_DFFESR_Q_3_R[0] +.sym 30179 io_ctrl_ins.debug_mode[0] +.sym 30180 sys_ctrl_ins.o_data_out_SB_DFFE_Q_E_SB_LUT4_O_I1_SB_LUT4_I3_O[2] +.sym 30181 o_led0$SB_IO_OUT +.sym 30182 w_rx_data[0] +.sym 30186 io_ctrl_ins.o_data_out_SB_DFFESR_Q_3_R[0] +.sym 30187 io_ctrl_ins.debug_mode[1] +.sym 30188 sys_ctrl_ins.o_data_out_SB_DFFE_Q_E_SB_LUT4_O_I1_SB_LUT4_I3_O[2] +.sym 30189 o_led1$SB_IO_OUT +.sym 30190 w_rx_data[4] +.sym 30194 w_rx_data[1] +.sym 30198 w_rx_data[2] +.sym 30202 io_ctrl_ins.o_data_out_SB_DFFESR_Q_3_R[0] +.sym 30203 io_ctrl_ins.debug_mode_SB_LUT4_I2_O[2] +.sym 30204 sys_ctrl_ins.o_data_out_SB_DFFE_Q_E_SB_LUT4_O_I1_SB_LUT4_I3_O[2] +.sym 30205 i_config[0]$SB_IO_IN +.sym 30207 io_ctrl_ins.o_data_out_SB_DFFESR_Q_3_R[0] +.sym 30208 spi_if_ins.o_load_cmd_SB_LUT4_I2_O[1] +.sym 30209 w_soft_reset +.sym 30221 io_ctrl_ins.debug_mode_SB_LUT4_I0_O +.sym 30225 spi_if_ins.o_load_cmd_SB_LUT4_I2_O_SB_LUT4_I2_O +.sym 30226 w_rx_data[3] +.sym 30242 rx_09_fifo.wr_addr_gray_SB_LUT4_I2_O[5] +.sym 30246 rx_09_fifo.wr_addr_gray_SB_LUT4_I2_O[2] +.sym 30250 rx_09_fifo.wr_addr_gray_SB_LUT4_I2_O[3] +.sym 30254 rx_09_fifo.wr_addr_gray_SB_LUT4_I2_O[4] +.sym 30258 rx_09_fifo.wr_addr_gray_SB_LUT4_I2_O[6] +.sym 30262 rx_09_fifo.wr_addr_gray_SB_DFFESR_Q_4_D[1] +.sym 30276 rx_09_fifo.wr_addr_gray_SB_LUT4_I2_O[3] +.sym 30277 rx_09_fifo.wr_addr_gray_SB_LUT4_I2_O[4] +.sym 30280 rx_09_fifo.wr_addr_gray_SB_LUT4_I2_O[4] +.sym 30281 rx_09_fifo.wr_addr_gray_SB_LUT4_I2_O[5] +.sym 30284 rx_09_fifo.wr_addr[0] +.sym 30285 rx_09_fifo.wr_addr_gray_SB_LUT4_I2_O[1] +.sym 30288 rx_09_fifo.rd_addr_gray_wr_r[3] +.sym 30289 io_pmod_SB_DFFSR_Q_D_SB_LUT4_O_I0_SB_LUT4_O_I2_SB_LUT4_O_I1[3] +.sym 30290 io_pmod_SB_DFFSR_Q_D_SB_LUT4_O_I0_SB_LUT4_O_2_I1_SB_LUT4_O_I2[0] +.sym 30291 io_pmod_SB_DFFSR_Q_D_SB_LUT4_O_I0_SB_LUT4_O_2_I1_SB_LUT4_O_I2[1] +.sym 30292 io_pmod_SB_DFFSR_Q_D_SB_LUT4_O_I0_SB_LUT4_O_2_I1_SB_LUT4_O_I2[2] +.sym 30293 io_pmod_SB_DFFSR_Q_D_SB_LUT4_O_I0_SB_LUT4_O_2_I1_SB_LUT4_O_I2[3] +.sym 30294 rx_09_fifo.wr_addr_gray_SB_LUT4_I2_O[1] +.sym 30298 io_pmod_SB_DFFSR_Q_D_SB_LUT4_O_I0_SB_LUT4_O_2_I1_SB_LUT4_O_I2[0] +.sym 30299 io_pmod_SB_DFFSR_Q_D_SB_LUT4_O_I0_SB_LUT4_O_2_I1_SB_LUT4_O_I2[3] +.sym 30300 io_pmod_SB_DFFSR_Q_D_SB_LUT4_O_I0_SB_LUT4_O_I2_SB_LUT4_O_1_I2[2] +.sym 30301 io_pmod_SB_DFFSR_Q_D_SB_LUT4_O_I0_SB_LUT4_O_2_I1_SB_LUT4_O_I2[1] +.sym 30304 rx_09_fifo.wr_addr_gray_SB_LUT4_I2_O[7] +.sym 30305 rx_09_fifo.wr_addr_gray_SB_LUT4_I2_O[6] +.sym 30306 io_pmod_SB_DFFSR_Q_D_SB_LUT4_O_I0_SB_LUT4_O_1_I2[0] +.sym 30310 rx_09_fifo.wr_addr_gray_SB_DFFESR_Q_7_D[1] +.sym 30316 io_pmod_SB_DFFSR_Q_D_SB_LUT4_O_I0_SB_LUT4_O_I2[0] +.sym 30317 io_pmod_SB_DFFSR_Q_D_SB_LUT4_O_I0_SB_LUT4_O_I2[1] +.sym 30318 rx_09_fifo.rd_addr_gray_wr_r[3] +.sym 30319 rx_09_fifo.wr_addr_gray_SB_DFFESR_Q_4_D[1] +.sym 30320 rx_09_fifo.wr_addr_gray_SB_DFFESR_Q_4_D[2] +.sym 30321 io_pmod_SB_DFFSR_Q_D_SB_LUT4_O_I0_SB_LUT4_O_I2_SB_LUT4_O_I3[0] +.sym 30328 io_pmod_SB_DFFSR_Q_D_SB_LUT4_O_I0_SB_LUT4_O_I2_SB_LUT4_O_I1_SB_LUT4_O_I3[1] +.sym 30329 io_pmod_SB_DFFSR_Q_D_SB_LUT4_O_I0_SB_LUT4_O_1_I2[1] +.sym 30330 rx_09_fifo.rd_addr_gray_wr_r[5] +.sym 30331 io_pmod_SB_DFFSR_Q_D_SB_LUT4_O_I0_SB_LUT4_O_I2_SB_LUT4_O_I1[4] +.sym 30332 io_pmod_SB_DFFSR_Q_D_SB_LUT4_O_I0_SB_LUT4_O_I2_SB_LUT4_O_I1[5] +.sym 30333 io_pmod[3]$SB_IO_IN +.sym 30334 io_pmod_SB_DFFSR_Q_D_SB_LUT4_O_I0_SB_LUT4_O_I2_SB_LUT4_O_I3[0] +.sym 30335 io_pmod_SB_DFFSR_Q_D_SB_LUT4_O_I0_SB_LUT4_O_I2_SB_LUT4_O_I1[3] +.sym 30336 io_pmod_SB_DFFSR_Q_D_SB_LUT4_O_I0_SB_LUT4_O_I2_SB_LUT4_O_I1[4] +.sym 30337 io_pmod_SB_DFFSR_Q_D_SB_LUT4_O_I0_SB_LUT4_O_I2_SB_LUT4_O_I3[3] +.sym 30342 rx_09_fifo.rd_addr_gray_wr[5] +.sym 30346 rx_09_fifo.rd_addr_gray_wr[0] +.sym 30354 rx_09_fifo.rd_addr_gray[5] +.sym 30358 rx_09_fifo.rd_addr_gray[0] +.sym 30371 lvds_rx_09_inst.r_cnt[0] +.sym 30376 lvds_rx_09_inst.r_cnt[1] +.sym 30377 lvds_rx_09_inst.r_cnt[0] +.sym 30380 lvds_rx_09_inst.r_cnt[2] +.sym 30381 lvds_rx_09_inst.r_cnt_SB_DFFESR_Q_D_SB_LUT4_O_2_I3[2] +.sym 30384 lvds_rx_09_inst.r_cnt[3] +.sym 30385 lvds_rx_09_inst.r_cnt_SB_DFFESR_Q_D_SB_LUT4_O_2_I3[3] +.sym 30388 w_soft_reset +.sym 30389 io_pmod[3]$SB_IO_IN +.sym 30401 lvds_rx_09_inst.r_cnt[0] +.sym 30404 lvds_rx_09_inst.r_data_SB_DFFESR_Q_31_D_SB_LUT4_O_I2_SB_LUT4_O_I3[3] +.sym 30405 lvds_rx_09_inst.o_debug_state[0] +.sym 30408 lvds_rx_09_inst.r_state_if_SB_DFFESR_Q_E_SB_LUT4_O_I2_SB_LUT4_I1_O[0] +.sym 30409 lvds_rx_09_inst.r_state_if_SB_DFFESR_Q_E_SB_LUT4_O_I0[1] +.sym 30410 lvds_rx_09_inst.r_state_if_SB_DFFESR_Q_E_SB_LUT4_O_I0[0] +.sym 30411 lvds_rx_09_inst.r_state_if_SB_DFFESR_Q_E_SB_LUT4_O_I0[1] +.sym 30412 lvds_rx_09_inst.r_state_if_SB_DFFESR_Q_E_SB_LUT4_O_I2[0] .sym 30413 w_soft_reset -.sym 30418 rx_09_fifo.rd_addr_gray_SB_DFFESR_Q_6_D[0] -.sym 30426 rx_09_fifo.rd_addr_gray_SB_DFFESR_Q_6_D[3] -.sym 30430 rx_09_fifo.rd_addr_gray_SB_DFFESR_Q_5_D[1] -.sym 30454 w_soft_reset -.sym 30455 lvds_rx_09_inst.o_debug_state[1] -.sym 30456 lvds_rx_09_inst.o_debug_state[0] -.sym 30457 io_pmod[3]$SB_IO_IN -.sym 30458 spi_if_ins.o_load_cmd_SB_DFFESR_Q_D_SB_LUT4_I2_O_SB_LUT4_I3_O[1] -.sym 30466 spi_if_ins.spi.r_tx_byte[3] -.sym 30467 spi_if_ins.spi.r_tx_byte[7] -.sym 30468 spi_if_ins.spi.r_tx_bit_count[2] -.sym 30469 spi_if_ins.r_tx_data_valid_SB_LUT4_I3_1_O_SB_LUT4_O_I0_SB_LUT4_O_2_I0[3] -.sym 30471 spi_if_ins.r_tx_data_valid_SB_LUT4_I3_1_O_SB_LUT4_O_I0[2] -.sym 30472 spi_if_ins.spi.r_tx_byte_SB_DFFESR_Q_E_SB_LUT4_O_I2[1] -.sym 30473 spi_if_ins.r_tx_data_valid_SB_LUT4_I3_1_O[2] -.sym 30474 spi_if_ins.r_tx_data_valid_SB_LUT4_I3_1_O_SB_LUT4_O_I0[0] -.sym 30475 spi_if_ins.r_tx_data_valid_SB_LUT4_I3_1_O_SB_LUT4_O_I0[1] -.sym 30476 spi_if_ins.r_tx_data_valid_SB_LUT4_I3_1_O_SB_LUT4_O_I0[2] -.sym 30477 spi_if_ins.r_tx_data_valid_SB_LUT4_I3_1_O_SB_LUT4_O_I0[3] -.sym 30479 spi_if_ins.spi.r_tx_byte[1] -.sym 30480 spi_if_ins.spi.r_tx_byte[5] -.sym 30481 spi_if_ins.spi.r_tx_bit_count[2] -.sym 30486 spi_if_ins.spi.r_tx_byte[2] -.sym 30487 spi_if_ins.spi.r_tx_byte[6] -.sym 30488 spi_if_ins.r_tx_data_valid_SB_LUT4_I3_1_O_SB_LUT4_O_I0_SB_LUT4_O_2_I0[3] -.sym 30489 spi_if_ins.spi.r_tx_bit_count[2] -.sym 30490 spi_if_ins.r_tx_data_valid_SB_LUT4_I3_1_O_SB_LUT4_O_I0_SB_LUT4_O_2_I0[0] -.sym 30491 spi_if_ins.r_tx_data_valid_SB_LUT4_I3_1_O_SB_LUT4_O_I0_SB_LUT4_O_2_I0[1] -.sym 30492 spi_if_ins.r_tx_data_valid_SB_LUT4_I3_1_O_SB_LUT4_O_I0[2] -.sym 30493 spi_if_ins.r_tx_data_valid_SB_LUT4_I3_1_O_SB_LUT4_O_I0_SB_LUT4_O_2_I0[3] -.sym 30494 $PACKER_GND_NET -.sym 30499 spi_if_ins.spi.r_tx_byte[0] -.sym 30500 spi_if_ins.spi.r_tx_byte[4] -.sym 30501 spi_if_ins.spi.r_tx_bit_count[2] -.sym 30502 spi_if_ins.r_tx_byte[6] -.sym 30506 spi_if_ins.r_tx_byte[3] -.sym 30510 spi_if_ins.r_tx_byte[7] -.sym 30514 spi_if_ins.r_tx_byte[5] -.sym 30518 spi_if_ins.r_tx_byte[1] -.sym 30522 spi_if_ins.r_tx_byte[0] -.sym 30526 spi_if_ins.r_tx_byte[4] -.sym 30534 spi_if_ins.spi.r_rx_done -.sym 30548 spi_if_ins.spi.r3_rx_done -.sym 30549 spi_if_ins.spi.r2_rx_done -.sym 30550 spi_if_ins.spi.r2_rx_done -.sym 30554 spi_if_ins.spi.r3_rx_done_SB_LUT4_I2_O -.sym 30563 smi_ctrl_ins.o_data_out_SB_DFFESS_Q_E_SB_LUT4_O_I3[0] -.sym 30564 w_cs[0] -.sym 30565 w_fetch -.sym 30570 io_ctrl_ins.led0_state_SB_LUT4_I3_O[1] -.sym 30594 spi_if_ins.spi.r_rx_byte[3] -.sym 30609 spi_if_ins.o_load_cmd_SB_LUT4_I2_O_SB_LUT4_I3_O_SB_LUT4_I3_1_O -.sym 30615 w_ioc[1] -.sym 30616 smi_ctrl_ins.o_data_out_SB_DFFESS_Q_E_SB_LUT4_O_I3[0] -.sym 30617 io_ctrl_ins.tr_vc_2_state_SB_LUT4_I1_I3[3] -.sym 30618 spi_if_ins.spi.r_rx_byte[1] -.sym 30624 spi_if_ins.o_fetch_cmd_SB_LUT4_I3_O_SB_LUT4_I3_O[0] -.sym 30625 io_ctrl_ins.o_data_out_SB_DFFESR_Q_3_R[0] -.sym 30631 w_ioc[0] -.sym 30632 smi_ctrl_ins.o_data_out_SB_DFFESS_Q_E_SB_LUT4_O_I3[0] -.sym 30633 w_ioc[1] -.sym 30634 io_ctrl_ins.led0_state_SB_LUT4_I3_O[1] -.sym 30635 io_ctrl_ins.pmod_dir_state[7] -.sym 30636 io_ctrl_ins.rx_h_b_state_SB_LUT4_I0_I2[1] -.sym 30637 o_rx_h_tx_l$SB_IO_OUT -.sym 30638 r_tx_data[3] -.sym 30642 r_tx_data[6] -.sym 30647 w_ioc[1] -.sym 30648 w_ioc[0] -.sym 30649 smi_ctrl_ins.o_data_out_SB_DFFESS_Q_E_SB_LUT4_O_I3[0] -.sym 30650 r_tx_data[4] -.sym 30656 io_ctrl_ins.tr_vc_2_state_SB_LUT4_I1_I3[3] -.sym 30657 w_ioc[0] -.sym 30662 w_rx_data[1] -.sym 30668 io_ctrl_ins.rx_h_b_state_SB_LUT4_I0_I2[1] -.sym 30669 spi_if_ins.o_load_cmd_SB_LUT4_I2_O_SB_LUT4_I3_O[1] -.sym 30673 w_ioc[0] -.sym 30674 w_rx_data[2] -.sym 30682 w_rx_data[6] -.sym 30689 w_ioc[0] -.sym 30690 w_rx_data[2] +.sym 30414 lvds_rx_09_inst.r_state_if_SB_DFFESR_Q_D_SB_LUT4_O_I2[1] +.sym 30415 lvds_rx_09_inst.r_data_SB_DFFESR_Q_31_D_SB_LUT4_O_I2_SB_LUT4_O_I3[3] +.sym 30416 lvds_rx_09_inst.o_debug_state[1] +.sym 30417 lvds_rx_09_inst.o_debug_state[0] +.sym 30418 lvds_rx_09_inst.r_state_if_SB_DFFESR_Q_E_SB_LUT4_O_I2[0] +.sym 30419 lvds_rx_09_inst.o_debug_state[1] +.sym 30420 lvds_rx_09_inst.r_state_if_SB_DFFESR_Q_E_SB_LUT4_O_I0[2] +.sym 30421 w_soft_reset +.sym 30423 lvds_rx_09_inst.r_state_if_SB_DFFESR_Q_E_SB_LUT4_O_I2[0] +.sym 30424 lvds_rx_09_inst.o_debug_state[1] +.sym 30425 w_soft_reset +.sym 30431 io_pmod[6]$SB_IO_IN +.sym 30432 lvds_rx_09_inst.o_debug_state[0] +.sym 30433 lvds_rx_09_inst.o_debug_state[1] +.sym 30438 $PACKER_GND_NET +.sym 30448 lvds_rx_09_inst.o_debug_state[1] +.sym 30449 lvds_rx_09_inst.o_debug_state[0] +.sym 30466 spi_if_ins.spi.r3_rx_done_SB_LUT4_I2_O +.sym 30501 spi_if_ins.o_load_cmd_SB_DFFESR_Q_D[2] +.sym 30505 spi_if_ins.r_tx_data_valid_SB_LUT4_I3_1_O +.sym 30506 spi_if_ins.r_tx_byte[1] +.sym 30513 spi_if_ins.spi.r_tx_byte_SB_DFFESR_Q_E +.sym 30516 spi_if_ins.state_if[0] +.sym 30517 spi_if_ins.state_if[1] +.sym 30522 spi_if_ins.r_tx_byte[5] +.sym 30526 spi_if_ins.spi.r_tx_byte[1] +.sym 30527 spi_if_ins.spi.r_tx_byte[5] +.sym 30528 spi_if_ins.spi.o_spi_miso_SB_DFFE_Q_D_SB_LUT4_O_I2_SB_LUT4_O_I0_SB_LUT4_O_I3[2] +.sym 30529 spi_if_ins.spi.r_tx_bit_count[2] +.sym 30531 spi_if_ins.o_load_cmd_SB_DFFESR_Q_D[2] +.sym 30532 spi_if_ins.o_load_cmd_SB_DFFESR_Q_D[0] +.sym 30533 spi_if_ins.o_ioc_SB_DFFE_Q_E[1] +.sym 30539 spi_if_ins.o_load_cmd_SB_DFFESR_Q_D[1] +.sym 30540 spi_if_ins.state_if[2] +.sym 30541 spi_if_ins.o_load_cmd_SB_DFFESR_Q_D[2] +.sym 30545 spi_if_ins.o_fetch_cmd_SB_DFFESR_Q_E +.sym 30547 spi_if_ins.state_if[2] +.sym 30548 spi_if_ins.state_if[0] +.sym 30549 spi_if_ins.state_if[1] +.sym 30554 spi_if_ins.o_load_cmd_SB_DFFESR_Q_D[0] +.sym 30558 spi_if_ins.o_load_cmd_SB_DFFESR_Q_D[2] +.sym 30559 spi_if_ins.state_if[2] +.sym 30560 spi_if_ins.state_if[0] +.sym 30561 spi_if_ins.state_if[1] +.sym 30576 spi_if_ins.w_rx_data[5] +.sym 30577 spi_if_ins.w_rx_data[6] +.sym 30582 spi_if_ins.o_load_cmd_SB_DFFESR_Q_D[1] +.sym 30594 w_rx_data[7] +.sym 30598 w_rx_data[5] +.sym 30602 w_rx_data[6] +.sym 30611 io_ctrl_ins.tr_vc_2_state_SB_LUT4_I1_I3[1] +.sym 30612 smi_ctrl_ins.o_data_out_SB_DFFESS_Q_E_SB_LUT4_O_I3[0] +.sym 30613 spi_if_ins.o_fetch_cmd_SB_LUT4_I3_O[2] +.sym 30618 w_rx_data[4] +.sym 30622 io_ctrl_ins.led0_state_SB_LUT4_I3_O[1] +.sym 30623 io_ctrl_ins.pmod_dir_state[6] +.sym 30624 sys_ctrl_ins.o_data_out_SB_DFFE_Q_D[2] +.sym 30625 o_rx_h_tx_l_b$SB_IO_OUT +.sym 30626 io_ctrl_ins.led0_state_SB_LUT4_I3_O[1] +.sym 30627 io_ctrl_ins.pmod_dir_state[7] +.sym 30628 sys_ctrl_ins.o_data_out_SB_DFFE_Q_D[2] +.sym 30629 o_rx_h_tx_l$SB_IO_OUT +.sym 30630 w_rx_data[5] +.sym 30634 w_rx_data[4] +.sym 30640 io_ctrl_ins.tr_vc_2_state_SB_LUT4_I1_I3[1] +.sym 30641 w_ioc[0] +.sym 30642 io_ctrl_ins.led0_state_SB_LUT4_I3_O[1] +.sym 30643 io_ctrl_ins.pmod_dir_state[5] +.sym 30644 sys_ctrl_ins.o_data_out_SB_DFFE_Q_D[2] +.sym 30645 o_tr_vc1$SB_IO_OUT +.sym 30650 w_rx_data[7] +.sym 30654 w_rx_data[2] +.sym 30659 w_ioc[1] +.sym 30660 smi_ctrl_ins.o_data_out_SB_DFFESS_Q_E_SB_LUT4_O_I3[0] +.sym 30661 w_ioc[0] +.sym 30665 w_rx_data[4] +.sym 30666 w_rx_data[3] +.sym 30670 io_ctrl_ins.o_pmod[3] +.sym 30671 o_tr_vc2$SB_IO_OUT +.sym 30672 w_ioc[0] +.sym 30673 io_ctrl_ins.tr_vc_2_state_SB_LUT4_I1_I3[1] +.sym 30674 w_rx_data[0] +.sym 30680 sys_ctrl_ins.o_data_out_SB_DFFE_Q_D[2] +.sym 30681 spi_if_ins.o_load_cmd_SB_LUT4_I2_O_SB_LUT4_I3_O[1] +.sym 30683 w_ioc[0] +.sym 30684 w_ioc[1] +.sym 30685 smi_ctrl_ins.o_data_out_SB_DFFESS_Q_E_SB_LUT4_O_I3[0] +.sym 30686 w_rx_data[6] +.sym 30690 w_rx_data[3] .sym 30694 w_rx_data[0] -.sym 30702 w_rx_data[3] -.sym 30709 o_led0$SB_IO_OUT -.sym 30710 w_rx_data[4] -.sym 30714 io_ctrl_ins.debug_mode[0] -.sym 30715 io_ctrl_ins.debug_mode_SB_LUT4_I2_O[1] -.sym 30716 io_ctrl_ins.rf_mode[2] +.sym 30698 io_ctrl_ins.o_pmod[0] +.sym 30699 io_ctrl_ins.mixer_en_state +.sym 30700 w_ioc[0] +.sym 30701 io_ctrl_ins.tr_vc_2_state_SB_LUT4_I1_I3[1] +.sym 30702 w_rx_data[2] +.sym 30706 w_rx_data[1] +.sym 30710 io_ctrl_ins.debug_mode[0] +.sym 30711 io_ctrl_ins.debug_mode_SB_LUT4_I2_O[2] +.sym 30712 io_ctrl_ins.debug_mode_SB_LUT4_I2_O[0] +.sym 30713 io_ctrl_ins.debug_mode[1] +.sym 30716 io_ctrl_ins.debug_mode[0] .sym 30717 io_ctrl_ins.debug_mode[1] -.sym 30720 io_ctrl_ins.debug_mode[0] -.sym 30721 io_ctrl_ins.debug_mode[1] -.sym 30722 io_ctrl_ins.debug_mode_SB_LUT4_I2_O[1] -.sym 30723 io_ctrl_ins.rf_mode[2] +.sym 30718 io_ctrl_ins.debug_mode_SB_LUT4_I2_O[0] +.sym 30719 io_ctrl_ins.debug_mode_SB_LUT4_I2_O[1] +.sym 30720 io_ctrl_ins.debug_mode_SB_LUT4_I2_O[2] +.sym 30721 io_ctrl_ins.debug_mode_SB_LUT4_I2_O[3] +.sym 30722 io_ctrl_ins.debug_mode_SB_LUT4_I2_O[2] +.sym 30723 io_ctrl_ins.debug_mode_SB_LUT4_I2_O[0] .sym 30724 io_ctrl_ins.rf_pin_state[2] .sym 30725 io_ctrl_ins.debug_mode_SB_LUT4_I2_O[3] -.sym 30751 io_ctrl_ins.rf_pin_state[1] -.sym 30752 io_ctrl_ins.debug_mode_SB_LUT4_I2_O[1] -.sym 30753 io_ctrl_ins.debug_mode_SB_LUT4_I2_O[3] -.sym 30757 r_counter -.sym 30758 io_pmod_SB_DFFSR_Q_D_SB_LUT4_O_I2_SB_LUT4_O_1_I0_SB_LUT4_O_2_I0[1] -.sym 30759 rx_09_fifo.wr_addr_gray_SB_DFFESR_Q_6_D[1] -.sym 30760 rx_09_fifo.rd_addr_gray_wr_r[4] -.sym 30761 rx_09_fifo.wr_addr_gray_SB_DFFESR_Q_6_D[3] -.sym 30780 rx_09_fifo.wr_addr[2] -.sym 30781 io_pmod_SB_DFFSR_Q_D_SB_LUT4_O_I2_SB_LUT4_O_1_I0_SB_LUT4_O_2_I0[3] -.sym 30788 rx_09_fifo.wr_addr_gray_SB_LUT4_I2_O[2] -.sym 30789 rx_09_fifo.wr_addr_gray_SB_LUT4_I2_O[3] -.sym 30792 rx_09_fifo.wr_addr_gray_SB_LUT4_I2_O[1] -.sym 30793 rx_09_fifo.wr_addr_gray_SB_LUT4_I2_O[2] -.sym 30795 io_pmod[3]$SB_IO_IN -.sym 30796 io_pmod_SB_DFFSR_Q_D_SB_LUT4_O_I2[1] -.sym 30797 io_pmod_SB_DFFSR_Q_D_SB_LUT4_O_I2[2] -.sym 30798 io_pmod[3]$SB_IO_IN -.sym 30799 rx_09_fifo.wr_addr_gray_SB_LUT4_I2_O[7] -.sym 30800 rx_09_fifo.rd_addr_gray_wr_r[7] -.sym 30801 io_pmod[6]$SB_IO_IN -.sym 30802 io_pmod_SB_DFFSR_Q_D_SB_LUT4_O_I2_SB_LUT4_O_1_I0_SB_LUT4_O_1_I0[2] -.sym 30803 io_pmod_SB_DFFSR_Q_D_SB_LUT4_O_I2_SB_LUT4_O_I0_SB_LUT4_O_I3[1] -.sym 30804 io_pmod_SB_DFFSR_Q_D_SB_LUT4_O_I2_SB_LUT4_O_I0_SB_LUT4_O_I3[2] -.sym 30805 io_pmod_SB_DFFSR_Q_D_SB_LUT4_O_I2_SB_LUT4_O_I0_SB_LUT4_O_I3[3] -.sym 30806 io_pmod_SB_DFFSR_Q_D_SB_LUT4_O_I2_SB_LUT4_O_1_I0_SB_LUT4_O_3_I3[0] -.sym 30807 rx_09_fifo.wr_addr_gray_SB_DFFESR_Q_4_D[1] -.sym 30808 rx_09_fifo.wr_addr_gray_SB_DFFESR_Q_4_D[2] -.sym 30809 rx_09_fifo.rd_addr_gray_wr_r[6] -.sym 30810 io_pmod_SB_DFFSR_Q_D_SB_LUT4_O_I2_SB_LUT4_O_I0[0] -.sym 30811 io_pmod_SB_DFFSR_Q_D_SB_LUT4_O_I2_SB_LUT4_O_I0[1] -.sym 30812 io_pmod_SB_DFFSR_Q_D_SB_LUT4_O_I2_SB_LUT4_O_I0[2] -.sym 30813 io_pmod_SB_DFFSR_Q_D_SB_LUT4_O_I2_SB_LUT4_O_I0[3] -.sym 30814 rx_09_fifo.wr_addr_gray_SB_DFFESR_Q_7_D[0] -.sym 30815 rx_09_fifo.rd_addr_gray_wr_r[2] -.sym 30816 rx_09_fifo.rd_addr_gray_wr_r[0] -.sym 30817 rx_09_fifo.wr_addr_gray_SB_DFFESR_Q_7_D[3] -.sym 30819 rx_09_fifo.wr_addr[0] -.sym 30824 io_pmod_SB_DFFSR_Q_D_SB_LUT4_O_I2_SB_LUT4_O_1_I0_SB_LUT4_O_2_I0[3] -.sym 30825 rx_09_fifo.wr_addr[0] -.sym 30828 rx_09_fifo.wr_addr[2] -.sym 30829 rx_09_fifo.wr_addr_gray_SB_LUT4_I2_I3[2] -.sym 30832 rx_09_fifo.wr_addr[3] -.sym 30833 rx_09_fifo.wr_addr_gray_SB_LUT4_I2_I3[3] -.sym 30836 rx_09_fifo.wr_addr[4] -.sym 30837 rx_09_fifo.wr_addr_gray_SB_LUT4_I2_I3[4] -.sym 30840 rx_09_fifo.wr_addr[5] -.sym 30841 rx_09_fifo.wr_addr_gray_SB_LUT4_I2_I3[5] -.sym 30844 rx_09_fifo.wr_addr[6] -.sym 30845 rx_09_fifo.wr_addr_gray_SB_LUT4_I2_I3[6] -.sym 30848 rx_09_fifo.wr_addr[7] -.sym 30849 rx_09_fifo.wr_addr_gray_SB_LUT4_I2_I3[7] -.sym 30851 lvds_rx_09_inst.r_cnt[0] -.sym 30856 lvds_rx_09_inst.r_cnt[1] -.sym 30857 lvds_rx_09_inst.r_cnt[0] -.sym 30860 lvds_rx_09_inst.r_cnt[2] -.sym 30861 lvds_rx_09_inst.r_cnt_SB_DFFNESR_Q_D_SB_LUT4_O_I3[2] -.sym 30864 lvds_rx_09_inst.r_cnt[3] -.sym 30865 lvds_rx_09_inst.r_cnt_SB_DFFNESR_Q_D_SB_LUT4_O_I3[3] -.sym 30869 rx_09_fifo.wr_addr_gray_rd[4] -.sym 30873 rx_09_fifo.wr_addr_gray_rd[1] -.sym 30877 lvds_rx_09_inst.r_cnt[0] -.sym 30880 rx_09_fifo.wr_addr[0] -.sym 30881 rx_09_fifo.rd_addr_gray_wr_r[0] -.sym 30886 rx_09_fifo.rd_addr_gray_wr[5] -.sym 30891 lvds_rx_09_inst.r_phase_count_SB_LUT4_O_I3_SB_DFFNESR_Q_E_SB_LUT4_O_I0[0] -.sym 30892 lvds_rx_09_inst.o_debug_state[1] -.sym 30893 w_soft_reset -.sym 30894 rx_09_fifo.rd_addr_gray[0] -.sym 30902 rx_09_fifo.rd_addr_gray_wr[0] -.sym 30906 rx_09_fifo.rd_addr_gray[5] -.sym 30914 lvds_rx_09_inst.o_debug_state[1] -.sym 30915 io_pmod[2]$SB_IO_IN -.sym 30916 io_pmod[1]$SB_IO_IN +.sym 30726 io_ctrl_ins.debug_mode_SB_LUT4_I2_O[3] +.sym 30727 io_ctrl_ins.debug_mode_SB_LUT4_I2_O[0] +.sym 30728 io_ctrl_ins.debug_mode_SB_LUT4_I2_O[1] +.sym 30729 io_ctrl_ins.debug_mode_SB_LUT4_I2_O[2] +.sym 30730 io_ctrl_ins.rf_pin_state[0] +.sym 30731 io_ctrl_ins.debug_mode_SB_LUT4_I2_O[0] +.sym 30732 io_ctrl_ins.debug_mode_SB_LUT4_I2_O[2] +.sym 30733 io_ctrl_ins.debug_mode_SB_LUT4_I2_O[3] +.sym 30738 io_ctrl_ins.rf_pin_state[3] +.sym 30739 io_ctrl_ins.debug_mode_SB_LUT4_I2_O[0] +.sym 30740 io_ctrl_ins.debug_mode_SB_LUT4_I2_O[2] +.sym 30741 io_ctrl_ins.debug_mode_SB_LUT4_I2_O[3] +.sym 30747 io_ctrl_ins.rf_pin_state[1] +.sym 30748 io_ctrl_ins.debug_mode_SB_LUT4_I2_O[2] +.sym 30749 io_ctrl_ins.debug_mode_SB_LUT4_I2_O[3] +.sym 30755 rx_09_fifo.wr_addr[0] +.sym 30760 io_pmod_SB_DFFSR_Q_D_SB_LUT4_O_I0_SB_LUT4_O_I2_SB_LUT4_O_I1_SB_LUT4_O_I3[1] +.sym 30761 rx_09_fifo.wr_addr[0] +.sym 30764 rx_09_fifo.wr_addr[2] +.sym 30765 rx_09_fifo.wr_addr_gray_SB_LUT4_I2_I3[2] +.sym 30768 rx_09_fifo.wr_addr[3] +.sym 30769 rx_09_fifo.wr_addr_gray_SB_LUT4_I2_I3[3] +.sym 30772 rx_09_fifo.wr_addr[4] +.sym 30773 rx_09_fifo.wr_addr_gray_SB_LUT4_I2_I3[4] +.sym 30776 rx_09_fifo.wr_addr[5] +.sym 30777 rx_09_fifo.wr_addr_gray_SB_LUT4_I2_I3[5] +.sym 30780 rx_09_fifo.wr_addr[6] +.sym 30781 rx_09_fifo.wr_addr_gray_SB_LUT4_I2_I3[6] +.sym 30784 rx_09_fifo.wr_addr[7] +.sym 30785 rx_09_fifo.wr_addr_gray_SB_LUT4_I2_I3[7] +.sym 30788 rx_09_fifo.wr_addr_gray_SB_DFFESR_Q_5_D[0] +.sym 30789 io_pmod_SB_DFFSR_Q_D_SB_LUT4_O_I0_SB_LUT4_O_2_I1_SB_LUT4_O_I2[0] +.sym 30792 rx_09_fifo.wr_addr_gray_SB_LUT4_I2_O[2] +.sym 30793 rx_09_fifo.wr_addr_gray_SB_LUT4_I2_O[3] +.sym 30796 rx_09_fifo.wr_addr_gray_SB_LUT4_I2_O[1] +.sym 30797 rx_09_fifo.wr_addr_gray_SB_LUT4_I2_O[2] +.sym 30799 rx_09_fifo.rd_addr_gray_wr_r[5] +.sym 30800 rx_09_fifo.wr_addr_gray_SB_LUT4_I2_O[5] +.sym 30801 rx_09_fifo.wr_addr_gray_SB_LUT4_I2_O[6] +.sym 30802 io_pmod[3]$SB_IO_IN +.sym 30803 rx_09_fifo.wr_addr_gray_SB_LUT4_I2_O[7] +.sym 30804 rx_09_fifo.rd_addr_gray_wr_r[7] +.sym 30805 io_pmod[6]$SB_IO_IN +.sym 30809 rx_09_fifo.wr_addr[0] +.sym 30812 rx_09_fifo.wr_addr_gray_SB_LUT4_I2_O[5] +.sym 30813 rx_09_fifo.wr_addr_gray_SB_LUT4_I2_O[6] +.sym 30814 rx_09_fifo.wr_addr_gray_SB_DFFESR_Q_5_D[0] +.sym 30818 rx_09_fifo.wr_addr_gray_SB_DFFESR_Q_5_D_SB_LUT4_I2_O[0] +.sym 30819 rx_09_fifo.wr_addr_gray_SB_DFFESR_Q_5_D_SB_LUT4_I2_O[1] +.sym 30820 rx_09_fifo.rd_addr_gray_wr_r[6] +.sym 30821 rx_09_fifo.wr_addr_gray_SB_DFFESR_Q_5_D_SB_LUT4_I2_O[3] +.sym 30822 rx_09_fifo.wr_addr_gray_SB_DFFESR_Q_7_D[0] +.sym 30823 rx_09_fifo.wr_addr_gray_SB_DFFESR_Q_7_D[1] +.sym 30824 rx_09_fifo.rd_addr_gray_wr_r[0] +.sym 30825 rx_09_fifo.wr_addr_gray_SB_DFFESR_Q_7_D[3] +.sym 30826 io_pmod_SB_DFFSR_Q_D_SB_LUT4_O_I0[0] +.sym 30827 io_pmod_SB_DFFSR_Q_D_SB_LUT4_O_I0[1] +.sym 30828 io_pmod_SB_DFFSR_Q_D_SB_LUT4_O_I0[2] +.sym 30829 io_pmod_SB_DFFSR_Q_D_SB_LUT4_O_I0[3] +.sym 30830 io_pmod_SB_DFFSR_Q_D_SB_LUT4_O_I0_SB_LUT4_O_1_I2[0] +.sym 30831 io_pmod_SB_DFFSR_Q_D_SB_LUT4_O_I0_SB_LUT4_O_1_I2[1] +.sym 30832 io_pmod_SB_DFFSR_Q_D_SB_LUT4_O_I0_SB_LUT4_O_1_I2[2] +.sym 30833 io_pmod_SB_DFFSR_Q_D_SB_LUT4_O_I0_SB_LUT4_O_1_I2[3] +.sym 30835 io_pmod_SB_DFFSR_Q_D_SB_LUT4_O_I0_SB_LUT4_O_2_I1[0] +.sym 30836 io_pmod_SB_DFFSR_Q_D_SB_LUT4_O_I0_SB_LUT4_O_2_I1[1] +.sym 30837 io_pmod_SB_DFFSR_Q_D_SB_LUT4_O_I0_SB_LUT4_O_2_I1[2] +.sym 30842 io_pmod_SB_DFFSR_Q_D_SB_LUT4_O_I0_SB_LUT4_O_1_I2[1] +.sym 30843 io_pmod_SB_DFFSR_Q_D_SB_LUT4_O_I0_SB_LUT4_O_1_I2[0] +.sym 30844 rx_09_fifo.wr_addr_gray_SB_DFFESR_Q_6_D[2] +.sym 30845 rx_09_fifo.rd_addr_gray_wr_r[5] +.sym 30847 rx_09_fifo.wr_addr[0] +.sym 30848 io_pmod_SB_DFFSR_Q_D_SB_LUT4_O_I0_SB_LUT4_O_I2_SB_LUT4_O_I1_SB_LUT4_O_I3[1] +.sym 30849 rx_09_fifo.rd_addr_gray_wr_r[0] +.sym 30874 lvds_rx_09_inst.r_data[0] +.sym 30882 lvds_rx_09_inst.r_cnt[1] +.sym 30883 io_pmod[1]$SB_IO_IN +.sym 30884 lvds_rx_09_inst.o_debug_state[1] +.sym 30885 lvds_rx_09_inst.r_data_SB_DFFESR_Q_31_D_SB_LUT4_O_I2_SB_LUT4_O_I3[3] +.sym 30896 lvds_rx_09_inst.o_debug_state[0] +.sym 30897 lvds_rx_09_inst.r_data[1] +.sym 30898 lvds_rx_09_inst.r_cnt[0] +.sym 30899 io_pmod[2]$SB_IO_IN +.sym 30900 lvds_rx_09_inst.o_debug_state[1] +.sym 30901 lvds_rx_09_inst.r_data_SB_DFFESR_Q_31_D_SB_LUT4_O_I2_SB_LUT4_O_I3[3] +.sym 30903 lvds_rx_09_inst.r_cnt[3] +.sym 30904 lvds_rx_09_inst.r_data_SB_DFFESR_Q_31_D_SB_LUT4_O_I2[1] +.sym 30905 lvds_rx_09_inst.o_debug_state[0] +.sym 30907 lvds_rx_09_inst.r_cnt[2] +.sym 30908 lvds_rx_09_inst.r_data_SB_DFFESR_Q_31_D_SB_LUT4_O_1_I2[1] +.sym 30909 lvds_rx_09_inst.o_debug_state[0] +.sym 30915 lvds_rx_09_inst.o_debug_state[1] +.sym 30916 lvds_rx_09_inst.r_state_if_SB_DFFESR_Q_D_SB_LUT4_O_I2[1] .sym 30917 lvds_rx_09_inst.o_debug_state[0] -.sym 30918 lvds_rx_09_inst.r_phase_count_SB_LUT4_O_I3_SB_LUT4_I2_O[3] -.sym 30919 lvds_rx_09_inst.r_state_if_SB_DFFNESR_Q_E_SB_LUT4_O_I2[1] -.sym 30920 lvds_rx_09_inst.r_state_if_SB_DFFNESR_Q_E_SB_LUT4_O_I2[2] -.sym 30921 w_soft_reset -.sym 30938 lvds_rx_09_inst.o_debug_state[1] -.sym 30939 lvds_rx_09_inst.o_debug_state[0] -.sym 30940 io_pmod[1]$SB_IO_IN -.sym 30941 io_pmod[2]$SB_IO_IN -.sym 30942 lvds_rx_09_inst.r_state_if_SB_DFFNESR_Q_E_SB_LUT4_O_I2[1] -.sym 30947 spi_if_ins.spi.SCKr[2] -.sym 30948 spi_if_ins.spi.SCKr[1] -.sym 30949 i_ss$SB_IO_IN -.sym 30950 spi_if_ins.spi.SCKr[2] -.sym 30951 spi_if_ins.r_tx_data_valid_SB_LUT4_I3_1_O_SB_LUT4_O_I0_SB_LUT4_O_2_I0[3] -.sym 30952 spi_if_ins.spi.r_tx_bit_count[2] -.sym 30953 spi_if_ins.spi.SCKr[1] -.sym 30959 i_ss$SB_IO_IN -.sym 30960 spi_if_ins.spi.SCKr[2] -.sym 30961 spi_if_ins.spi.SCKr[1] -.sym 30962 spi_if_ins.spi.SCKr[1] -.sym 30966 io_pmod[2]$SB_IO_IN -.sym 30967 io_pmod[1]$SB_IO_IN -.sym 30968 lvds_rx_09_inst.o_debug_state[1] +.sym 30920 lvds_rx_09_inst.r_state_if_SB_DFFESR_Q_D[1] +.sym 30921 lvds_rx_09_inst.o_debug_state[0] +.sym 30929 lvds_rx_09_inst.r_state_if_SB_DFFESR_Q_E_SB_LUT4_O_I2_SB_LUT4_I0_O +.sym 30932 io_pmod[1]$SB_IO_IN +.sym 30933 io_pmod[2]$SB_IO_IN +.sym 30934 lvds_rx_09_inst.r_state_if_SB_DFFESR_Q_D[1] +.sym 30940 io_pmod[2]$SB_IO_IN +.sym 30941 io_pmod[1]$SB_IO_IN +.sym 30947 lvds_rx_09_inst.r_phase_count[0] +.sym 30951 lvds_rx_09_inst.r_phase_count[1] +.sym 30952 $PACKER_VCC_NET +.sym 30953 lvds_rx_09_inst.r_phase_count[0] +.sym 30954 lvds_rx_09_inst.r_phase_count_SB_LUT4_O_I3[2] +.sym 30956 $PACKER_VCC_NET +.sym 30957 lvds_rx_09_inst.r_phase_count_SB_CARRY_CI_CO[2] +.sym 30959 lvds_rx_09_inst.r_phase_count_SB_LUT4_O_1_I3[0] +.sym 30960 lvds_rx_09_inst.r_phase_count_SB_LUT4_O_I3[1] +.sym 30961 lvds_rx_09_inst.r_phase_count_SB_LUT4_O_I3[2] +.sym 30962 lvds_rx_09_inst.o_debug_state[1] +.sym 30963 lvds_rx_09_inst.r_data_SB_DFFESR_Q_31_D_SB_LUT4_O_I2_SB_LUT4_O_I3[3] +.sym 30964 lvds_rx_09_inst.r_phase_count_SB_LUT4_O_1_I3[2] +.sym 30965 lvds_rx_09_inst.o_debug_state[0] +.sym 30966 lvds_rx_09_inst.o_debug_state[1] +.sym 30967 lvds_rx_09_inst.r_data_SB_DFFESR_Q_31_D_SB_LUT4_O_I2_SB_LUT4_O_I3[3] +.sym 30968 lvds_rx_09_inst.r_phase_count_SB_LUT4_O_1_I3[0] .sym 30969 lvds_rx_09_inst.o_debug_state[0] -.sym 30971 lvds_rx_09_inst.r_phase_count_SB_LUT4_O_I3_SB_DFFNESR_Q_E_SB_LUT4_O_I2[0] -.sym 30972 lvds_rx_09_inst.r_phase_count_SB_LUT4_O_I3_SB_DFFNESR_Q_E_SB_LUT4_O_I0[2] -.sym 30973 w_soft_reset -.sym 30974 spi_if_ins.spi.SCKr[0] -.sym 30979 spi_if_ins.r_tx_data_valid_SB_LUT4_I3_1_O_SB_LUT4_O_I0_SB_LUT4_O_2_I0[3] -.sym 30983 spi_if_ins.r_tx_data_valid_SB_LUT4_I3_1_O_SB_LUT4_O_I0[2] -.sym 30984 $PACKER_VCC_NET -.sym 30987 spi_if_ins.spi.r_tx_bit_count[2] -.sym 30988 $PACKER_VCC_NET -.sym 30989 spi_if_ins.spi.r_tx_bit_count_SB_DFFESR_Q_D_SB_LUT4_O_I3[2] -.sym 30992 i_ss$SB_IO_IN -.sym 30993 spi_if_ins.r_tx_data_valid -.sym 30997 spi_if_ins.r_tx_data_valid_SB_LUT4_I3_1_O_SB_LUT4_O_I0_SB_LUT4_O_2_I0[3] -.sym 31000 spi_if_ins.r_tx_data_valid_SB_LUT4_I3_I2[2] -.sym 31001 spi_if_ins.r_tx_data_valid -.sym 31005 spi_if_ins.r_tx_data_valid_SB_LUT4_I3_1_O[2] -.sym 31007 spi_if_ins.r_tx_data_valid_SB_LUT4_I3_1_O_SB_LUT4_O_I0[2] -.sym 31008 $PACKER_VCC_NET -.sym 31009 spi_if_ins.r_tx_data_valid_SB_LUT4_I3_1_O_SB_LUT4_O_I0_SB_LUT4_O_2_I0[3] -.sym 31033 spi_if_ins.r_tx_data_valid_SB_LUT4_I3_1_O[2] -.sym 31035 spi_if_ins.r_tx_byte[7] -.sym 31036 spi_if_ins.r_tx_data_valid_SB_LUT4_I3_1_O[1] -.sym 31037 spi_if_ins.r_tx_data_valid_SB_LUT4_I3_1_O[2] -.sym 31042 spi_if_ins.spi.r_rx_byte[7] -.sym 31052 i_ss_SB_LUT4_I1_O[0] -.sym 31053 i_ss_SB_LUT4_I1_O[1] -.sym 31066 spi_if_ins.spi.r_rx_byte[6] -.sym 31070 spi_if_ins.spi.r_rx_byte[5] -.sym 31090 spi_if_ins.spi.r_temp_rx_byte[1] -.sym 31094 spi_if_ins.spi.r_temp_rx_byte[0] -.sym 31098 spi_if_ins.spi.r_temp_rx_byte[4] -.sym 31102 spi_if_ins.spi.r_temp_rx_byte[2] -.sym 31114 io_ctrl_ins.o_pmod[5] -.sym 31115 i_button_SB_LUT4_I3_O[1] -.sym 31116 io_ctrl_ins.tr_vc_1_state_SB_LUT4_I3_O[2] -.sym 31117 io_ctrl_ins.tr_vc_1_state_SB_LUT4_I3_O[3] -.sym 31128 io_ctrl_ins.o_data_out_SB_DFFESR_Q_3_R[0] -.sym 31129 io_ctrl_ins.o_data_out_SB_DFFESR_Q_3_R[1] -.sym 31130 i_button_SB_LUT4_I3_O[0] -.sym 31131 i_button_SB_LUT4_I3_O[1] -.sym 31132 i_button_SB_LUT4_I3_O[2] -.sym 31133 i_button_SB_LUT4_I3_O[3] -.sym 31142 w_rx_data[5] -.sym 31152 sys_ctrl_ins.o_data_out_SB_DFFE_Q_E_SB_LUT4_O_I1_SB_LUT4_I2_O[2] -.sym 31153 i_button$SB_IO_IN -.sym 31154 w_rx_data[7] -.sym 31158 io_ctrl_ins.led0_state_SB_LUT4_I3_O[1] -.sym 31159 io_ctrl_ins.pmod_dir_state[5] -.sym 31160 io_ctrl_ins.rx_h_b_state_SB_LUT4_I0_I2[1] -.sym 31161 o_tr_vc1$SB_IO_OUT -.sym 31162 io_ctrl_ins.o_pmod[3] -.sym 31163 o_tr_vc2$SB_IO_OUT -.sym 31164 w_ioc[0] -.sym 31165 io_ctrl_ins.tr_vc_2_state_SB_LUT4_I1_I3[3] -.sym 31166 w_rx_data[0] -.sym 31172 smi_ctrl_ins.o_data_out_SB_LUT4_I0_I1[2] -.sym 31173 w_tx_data_io[3] -.sym 31177 io_ctrl_ins.o_data_out_SB_DFFESR_Q_3_R[0] -.sym 31178 io_ctrl_ins.o_data_out_SB_DFFESR_Q_3_R[0] -.sym 31179 io_ctrl_ins.debug_mode[0] -.sym 31180 sys_ctrl_ins.o_data_out_SB_DFFE_Q_E_SB_LUT4_O_I1_SB_LUT4_I2_O[2] -.sym 31181 o_led0$SB_IO_OUT -.sym 31184 sys_ctrl_ins.o_data_out_SB_DFFE_Q_E_SB_LUT4_O_I1_SB_LUT4_I2_O[2] -.sym 31185 i_config[3]$SB_IO_IN -.sym 31188 smi_ctrl_ins.o_data_out_SB_LUT4_I0_I1[2] -.sym 31189 w_tx_data_io[4] -.sym 31192 sys_ctrl_ins.o_data_out_SB_DFFE_Q_E_SB_LUT4_O_I1_SB_LUT4_I2_O[2] -.sym 31193 i_config[2]$SB_IO_IN -.sym 31194 io_ctrl_ins.o_data_out_SB_DFFESR_Q_3_R[0] -.sym 31195 io_ctrl_ins.debug_mode_SB_LUT4_I2_O[1] -.sym 31196 sys_ctrl_ins.o_data_out_SB_DFFE_Q_E_SB_LUT4_O_I1_SB_LUT4_I2_O[2] -.sym 31197 i_config[0]$SB_IO_IN -.sym 31200 smi_ctrl_ins.o_data_out_SB_LUT4_I0_I1[2] -.sym 31201 w_tx_data_io[6] -.sym 31202 io_ctrl_ins.debug_mode_SB_LUT4_I2_O[3] -.sym 31203 io_ctrl_ins.rf_mode[0] -.sym 31204 io_ctrl_ins.rf_mode[2] -.sym 31205 io_ctrl_ins.debug_mode_SB_LUT4_I2_O[1] -.sym 31206 w_rx_data[3] -.sym 31210 w_rx_data[7] -.sym 31214 io_ctrl_ins.o_pmod[4] -.sym 31215 o_tr_vc1_b$SB_IO_OUT -.sym 31216 w_ioc[0] -.sym 31217 io_ctrl_ins.tr_vc_2_state_SB_LUT4_I1_I3[3] -.sym 31218 w_rx_data[4] +.sym 30973 lvds_rx_09_inst.r_phase_count_SB_LUT4_O_1_I3[0] +.sym 30974 lvds_rx_09_inst.o_debug_state[1] +.sym 30975 lvds_rx_09_inst.r_data_SB_DFFESR_Q_31_D_SB_LUT4_O_I2_SB_LUT4_O_I3[3] +.sym 30976 lvds_rx_09_inst.r_phase_count_SB_LUT4_O_1_I3[1] +.sym 30977 lvds_rx_09_inst.o_debug_state[0] +.sym 30982 i_ss_SB_LUT4_I1_O[0] +.sym 30987 spi_if_ins.spi.SCKr[2] +.sym 30988 spi_if_ins.spi.SCKr[1] +.sym 30989 i_ss$SB_IO_IN +.sym 30999 i_ss$SB_IO_IN +.sym 31000 spi_if_ins.r_tx_data_valid_SB_LUT4_I3_I2[1] +.sym 31001 spi_if_ins.r_tx_data_valid_SB_LUT4_I3_I2[2] +.sym 31006 spi_if_ins.spi.SCKr[2] +.sym 31007 spi_if_ins.spi.o_spi_miso_SB_DFFE_Q_D_SB_LUT4_O_I2_SB_LUT4_O_I0_SB_LUT4_O_I3[2] +.sym 31008 spi_if_ins.spi.r_tx_bit_count[2] +.sym 31009 spi_if_ins.spi.SCKr[1] +.sym 31011 spi_if_ins.spi.o_spi_miso_SB_DFFE_Q_D_SB_LUT4_O_I2_SB_LUT4_O_I0_SB_LUT4_O_I3[2] +.sym 31015 spi_if_ins.spi.o_spi_miso_SB_DFFE_Q_D_SB_LUT4_O_I2_SB_LUT4_O_I0[3] +.sym 31016 $PACKER_VCC_NET +.sym 31019 spi_if_ins.spi.r_tx_bit_count[2] +.sym 31020 $PACKER_VCC_NET +.sym 31021 spi_if_ins.spi.r_tx_bit_count_SB_DFFESR_Q_D_SB_LUT4_O_I3[2] +.sym 31023 spi_if_ins.spi.o_spi_miso_SB_DFFE_Q_D_SB_LUT4_O_I2_SB_LUT4_O_I0[3] +.sym 31024 $PACKER_VCC_NET +.sym 31025 spi_if_ins.spi.o_spi_miso_SB_DFFE_Q_D_SB_LUT4_O_I2_SB_LUT4_O_I0_SB_LUT4_O_I3[2] +.sym 31026 spi_if_ins.spi.o_spi_miso_SB_DFFE_Q_D_SB_LUT4_O_I2_SB_LUT4_O_I0_SB_LUT4_O_I3[0] +.sym 31027 spi_if_ins.spi.o_spi_miso_SB_DFFE_Q_D_SB_LUT4_O_I2_SB_LUT4_O_I0_SB_LUT4_O_I3[1] +.sym 31028 spi_if_ins.spi.o_spi_miso_SB_DFFE_Q_D_SB_LUT4_O_I2_SB_LUT4_O_I0_SB_LUT4_O_I3[2] +.sym 31029 spi_if_ins.spi.o_spi_miso_SB_DFFE_Q_D_SB_LUT4_O_I2_SB_LUT4_O_I0_SB_LUT4_O_I3[3] +.sym 31031 spi_if_ins.spi.o_spi_miso_SB_DFFE_Q_D_SB_LUT4_O_I2_SB_LUT4_O_I0[3] +.sym 31032 spi_if_ins.spi.r_tx_byte_SB_DFFESR_Q_E_SB_LUT4_O_I2[1] +.sym 31033 spi_if_ins.r_tx_data_valid_SB_LUT4_I3_1_O +.sym 31034 spi_if_ins.spi.o_spi_miso_SB_DFFE_Q_D_SB_LUT4_O_I2_SB_LUT4_O_I0[0] +.sym 31035 spi_if_ins.spi.o_spi_miso_SB_DFFE_Q_D_SB_LUT4_O_I2_SB_LUT4_O_I0[1] +.sym 31036 spi_if_ins.spi.o_spi_miso_SB_DFFE_Q_D_SB_LUT4_O_I2_SB_LUT4_O_I0[2] +.sym 31037 spi_if_ins.spi.o_spi_miso_SB_DFFE_Q_D_SB_LUT4_O_I2_SB_LUT4_O_I0[3] +.sym 31041 spi_if_ins.spi.o_spi_miso_SB_DFFE_Q_D_SB_LUT4_O_I2_SB_LUT4_O_I0_SB_LUT4_O_I3[2] +.sym 31042 spi_if_ins.r_tx_byte[7] +.sym 31046 spi_if_ins.spi.r_tx_byte[2] +.sym 31047 spi_if_ins.spi.r_tx_byte[6] +.sym 31048 spi_if_ins.spi.o_spi_miso_SB_DFFE_Q_D_SB_LUT4_O_I2_SB_LUT4_O_I0_SB_LUT4_O_I3[2] +.sym 31049 spi_if_ins.spi.r_tx_bit_count[2] +.sym 31050 spi_if_ins.r_tx_byte[6] +.sym 31054 spi_if_ins.r_tx_byte[4] +.sym 31058 spi_if_ins.r_tx_byte[0] +.sym 31062 spi_if_ins.r_tx_byte[3] +.sym 31066 spi_if_ins.r_tx_byte[2] +.sym 31070 spi_if_ins.spi.r_tx_byte[3] +.sym 31071 spi_if_ins.spi.r_tx_byte[7] +.sym 31072 spi_if_ins.spi.r_tx_bit_count[2] +.sym 31073 spi_if_ins.spi.o_spi_miso_SB_DFFE_Q_D_SB_LUT4_O_I2_SB_LUT4_O_I0_SB_LUT4_O_I3[2] +.sym 31074 spi_if_ins.spi.r_rx_byte[2] +.sym 31078 spi_if_ins.spi.r_rx_byte[4] +.sym 31082 spi_if_ins.spi.r_rx_byte[6] +.sym 31096 spi_if_ins.o_load_cmd_SB_DFFESR_Q_D[2] +.sym 31097 spi_if_ins.r_tx_data_valid_SB_DFFESR_Q_D[1] +.sym 31098 spi_if_ins.spi.r_rx_byte[5] +.sym 31102 spi_if_ins.spi.r_rx_byte[1] +.sym 31106 r_tx_data[5] +.sym 31110 r_tx_data[1] +.sym 31114 r_tx_data[0] +.sym 31118 r_tx_data[6] +.sym 31122 r_tx_data[3] +.sym 31126 r_tx_data[7] +.sym 31130 r_tx_data[2] +.sym 31134 r_tx_data[4] +.sym 31148 sys_ctrl_ins.o_data_out_SB_DFFE_Q_E_SB_LUT4_O_I1_SB_LUT4_I3_O[2] +.sym 31149 i_config[2]$SB_IO_IN +.sym 31150 io_ctrl_ins.o_pmod[5] +.sym 31151 i_button_SB_LUT4_I3_O[1] +.sym 31152 io_ctrl_ins.tr_vc_1_state_SB_LUT4_I3_O[2] +.sym 31153 io_ctrl_ins.tr_vc_1_state_SB_LUT4_I3_O[3] +.sym 31154 io_ctrl_ins.o_pmod[6] +.sym 31155 i_button_SB_LUT4_I3_O[1] +.sym 31156 io_ctrl_ins.rx_h_b_state_SB_LUT4_I3_O[2] +.sym 31157 io_ctrl_ins.rx_h_b_state_SB_LUT4_I3_O[3] +.sym 31164 io_ctrl_ins.o_data_out_SB_DFFESS_Q_E[2] +.sym 31165 io_ctrl_ins.o_data_out_SB_DFFESR_Q_3_R[0] +.sym 31166 i_button_SB_LUT4_I3_O[0] +.sym 31167 i_button_SB_LUT4_I3_O[1] +.sym 31168 i_button_SB_LUT4_I3_O[2] +.sym 31169 i_button_SB_LUT4_I3_O[3] +.sym 31185 spi_if_ins.o_load_cmd_SB_LUT4_I2_O_SB_LUT4_I3_O_SB_LUT4_I3_2_O +.sym 31186 io_ctrl_ins.pmod_dir_state[4] +.sym 31187 io_ctrl_ins.led0_state_SB_LUT4_I3_O[1] +.sym 31188 io_ctrl_ins.tr_vc_1_b_state_SB_LUT4_I1_O[2] +.sym 31189 io_ctrl_ins.tr_vc_1_b_state_SB_LUT4_I1_O[3] +.sym 31192 sys_ctrl_ins.o_data_out_SB_DFFE_Q_E_SB_LUT4_O_I1_SB_LUT4_I3_O[2] +.sym 31193 i_button$SB_IO_IN +.sym 31200 sys_ctrl_ins.o_data_out_SB_DFFE_Q_E_SB_LUT4_O_I1_SB_LUT4_I3_O[2] +.sym 31201 i_config[3]$SB_IO_IN +.sym 31202 w_rx_data[4] +.sym 31210 w_rx_data[6] +.sym 31218 w_rx_data[7] .sym 31222 w_rx_data[5] -.sym 31226 w_rx_data[0] -.sym 31230 io_ctrl_ins.o_pmod[0] -.sym 31231 io_ctrl_ins.mixer_en_state -.sym 31232 w_ioc[0] -.sym 31233 io_ctrl_ins.tr_vc_2_state_SB_LUT4_I1_I3[3] -.sym 31250 io_ctrl_ins.rf_pin_state[0] -.sym 31251 io_ctrl_ins.rf_mode[2] -.sym 31252 io_ctrl_ins.debug_mode_SB_LUT4_I2_O[1] -.sym 31253 io_ctrl_ins.debug_mode_SB_LUT4_I2_O[3] -.sym 31298 rx_09_fifo.wr_addr_gray_SB_DFFESR_Q_6_D[1] -.sym 31310 rx_09_fifo.wr_addr_gray_SB_DFFESR_Q_6_D[3] -.sym 31320 rx_09_fifo.wr_addr_gray_SB_LUT4_I2_O[4] -.sym 31321 io_pmod_SB_DFFSR_Q_D_SB_LUT4_O_I2_SB_LUT4_O_I0_SB_LUT4_O_I3[1] -.sym 31322 rx_09_fifo.wr_addr_gray_SB_DFFESR_Q_4_D[2] -.sym 31330 rx_09_fifo.wr_addr_gray[6] -.sym 31338 rx_09_fifo.wr_addr_gray[1] -.sym 31342 rx_09_fifo.wr_addr_gray[4] -.sym 31348 rx_09_fifo.wr_addr_gray_SB_LUT4_I2_O[3] -.sym 31349 rx_09_fifo.wr_addr_gray_SB_LUT4_I2_O[4] -.sym 31360 rx_09_fifo.wr_addr_gray_SB_LUT4_I2_O[7] -.sym 31361 io_pmod_SB_DFFSR_Q_D_SB_LUT4_O_I2_SB_LUT4_O_I0_SB_LUT4_O_I3[2] -.sym 31388 lvds_rx_09_inst.r_state_if_SB_DFFNESR_Q_E_SB_LUT4_O_I2[1] -.sym 31389 lvds_rx_09_inst.r_data[0] -.sym 31394 lvds_rx_09_inst.r_cnt[1] -.sym 31395 io_pmod[2]$SB_IO_IN -.sym 31396 lvds_rx_09_inst.o_debug_state[1] -.sym 31397 lvds_rx_09_inst.r_phase_count_SB_LUT4_O_I3_SB_LUT4_I2_O[3] -.sym 31408 lvds_rx_09_inst.o_debug_state[0] -.sym 31409 lvds_rx_09_inst.r_phase_count_SB_LUT4_O_I3_SB_LUT4_I2_O[3] -.sym 31410 lvds_rx_09_inst.r_data_SB_DFFNESR_Q_31_D_SB_LUT4_O_1_I0[0] -.sym 31411 lvds_rx_09_inst.r_cnt[2] -.sym 31412 lvds_rx_09_inst.o_debug_state[1] -.sym 31413 lvds_rx_09_inst.o_debug_state[0] -.sym 31414 lvds_rx_09_inst.r_data_SB_DFFNESR_Q_31_D_SB_LUT4_O_I0[0] -.sym 31415 lvds_rx_09_inst.r_cnt[3] -.sym 31416 lvds_rx_09_inst.o_debug_state[1] -.sym 31417 lvds_rx_09_inst.o_debug_state[0] -.sym 31418 lvds_rx_09_inst.r_phase_count_SB_LUT4_O_I3_SB_DFFNESR_Q_E_SB_LUT4_O_I0[0] -.sym 31419 lvds_rx_09_inst.o_debug_state[1] -.sym 31420 lvds_rx_09_inst.r_phase_count_SB_LUT4_O_I3_SB_DFFNESR_Q_E_SB_LUT4_O_I0[2] -.sym 31421 w_soft_reset -.sym 31422 lvds_rx_09_inst.r_cnt[0] -.sym 31423 io_pmod[1]$SB_IO_IN -.sym 31424 lvds_rx_09_inst.o_debug_state[1] -.sym 31425 lvds_rx_09_inst.r_phase_count_SB_LUT4_O_I3_SB_LUT4_I2_O[3] -.sym 31436 lvds_rx_09_inst.r_phase_count_SB_LUT4_O_I3_SB_DFFNESR_Q_E_SB_LUT4_O_I2_SB_LUT4_O_1_I2[0] -.sym 31437 lvds_rx_09_inst.o_debug_state[0] -.sym 31438 io_pmod[2]$SB_IO_IN -.sym 31439 io_pmod[1]$SB_IO_IN -.sym 31440 lvds_rx_09_inst.r_phase_count_SB_LUT4_O_I3_SB_LUT4_I2_O[3] -.sym 31441 lvds_rx_09_inst.o_debug_state[1] -.sym 31462 spi_if_ins.r_tx_data_valid_SB_DFFESR_Q_D[1] +.sym 31230 io_ctrl_ins.o_data_out_SB_DFFESR_Q_3_R[0] +.sym 31231 io_ctrl_ins.debug_mode_SB_LUT4_I2_O[0] +.sym 31232 sys_ctrl_ins.o_data_out_SB_DFFE_Q_E_SB_LUT4_O_I1_SB_LUT4_I3_O[2] +.sym 31233 i_config[1]$SB_IO_IN +.sym 31243 io_ctrl_ins.rf_pin_state[7] +.sym 31244 io_ctrl_ins.debug_mode_SB_LUT4_I2_O[3] +.sym 31245 io_ctrl_ins.rx_h_state_SB_DFFE_Q_D_SB_LUT4_O_I3[2] +.sym 31259 io_ctrl_ins.debug_mode_SB_LUT4_I2_O[3] +.sym 31260 io_ctrl_ins.rf_pin_state[6] +.sym 31261 io_ctrl_ins.rx_h_state_SB_DFFE_Q_D_SB_LUT4_O_I3[2] +.sym 31318 rx_09_fifo.wr_addr_gray_SB_DFFESR_Q_6_D[2] +.sym 31346 rx_09_fifo.wr_addr_gray[2] +.sym 31350 rx_09_fifo.wr_addr_gray[5] +.sym 31394 lvds_rx_09_inst.r_data[1] +.sym 31416 w_soft_reset +.sym 31417 i_smi_soe_se$rename$0 +.sym 31458 spi_if_ins.spi.SCKr[0] +.sym 31462 spi_if_ins.spi.r_rx_done +.sym 31466 i_sck$SB_IO_IN +.sym 31470 spi_if_ins.spi.r2_rx_done +.sym 31481 lvds_rx_09_inst.r_phase_count_SB_LUT4_O_I3[1] +.sym 31482 spi_if_ins.spi.SCKr[1] +.sym 31488 spi_if_ins.spi.r3_rx_done +.sym 31489 spi_if_ins.spi.r2_rx_done .sym 31491 spi_if_ins.spi.r_rx_bit_count[0] .sym 31496 spi_if_ins.spi.r_rx_bit_count[1] .sym 31500 spi_if_ins.spi.r_rx_bit_count[2] .sym 31501 spi_if_ins.spi.r_rx_bit_count_SB_DFFESR_Q_D_SB_LUT4_O_I3[2] -.sym 31504 spi_if_ins.spi.r_rx_bit_count[1] .sym 31505 spi_if_ins.spi.r_rx_bit_count[0] -.sym 31517 spi_if_ins.spi.r_rx_bit_count[0] -.sym 31522 i_ss_SB_LUT4_I1_O[0] -.sym 31527 i_ss$SB_IO_IN -.sym 31528 spi_if_ins.r_tx_data_valid_SB_LUT4_I3_I2[1] -.sym 31529 spi_if_ins.r_tx_data_valid_SB_LUT4_I3_I2[2] -.sym 31543 spi_if_ins.spi.r_rx_bit_count[0] -.sym 31544 spi_if_ins.spi.r_rx_bit_count[2] -.sym 31545 spi_if_ins.spi.r_rx_bit_count[1] -.sym 31547 spi_if_ins.spi.r_rx_bit_count[0] -.sym 31548 spi_if_ins.spi.r_rx_bit_count[2] -.sym 31549 spi_if_ins.spi.r_rx_bit_count[1] +.sym 31507 spi_if_ins.spi.r_rx_bit_count[0] +.sym 31508 spi_if_ins.spi.r_rx_bit_count[2] +.sym 31509 spi_if_ins.spi.r_rx_bit_count[1] +.sym 31511 spi_if_ins.spi.r_rx_bit_count[0] +.sym 31512 spi_if_ins.spi.r_rx_bit_count[2] +.sym 31513 spi_if_ins.spi.r_rx_bit_count[1] +.sym 31515 i_ss$SB_IO_IN +.sym 31516 spi_if_ins.spi.SCKr[2] +.sym 31517 spi_if_ins.spi.SCKr[1] +.sym 31520 spi_if_ins.spi.r_rx_bit_count[1] +.sym 31521 spi_if_ins.spi.r_rx_bit_count[0] +.sym 31524 spi_if_ins.r_tx_data_valid_SB_LUT4_I3_I2[2] +.sym 31525 spi_if_ins.r_tx_data_valid +.sym 31527 spi_if_ins.r_tx_byte[7] +.sym 31528 spi_if_ins.spi.o_spi_miso_SB_DFFE_Q_D_SB_LUT4_O_I2[1] +.sym 31529 spi_if_ins.r_tx_data_valid_SB_LUT4_I3_1_O +.sym 31536 i_ss_SB_LUT4_I1_O[0] +.sym 31537 i_ss_SB_LUT4_I1_O[1] +.sym 31548 i_ss$SB_IO_IN +.sym 31549 spi_if_ins.r_tx_data_valid .sym 31554 spi_if_ins.spi.r_temp_rx_byte[5] -.sym 31558 spi_if_ins.spi.r_temp_rx_byte[0] -.sym 31566 spi_if_ins.spi.r_temp_rx_byte[1] -.sym 31570 spi_if_ins.spi.r_temp_rx_byte[3] +.sym 31558 spi_if_ins.spi.r_temp_rx_byte[2] +.sym 31562 spi_if_ins.spi.r_temp_rx_byte[0] +.sym 31566 i_mosi$SB_IO_IN +.sym 31570 spi_if_ins.spi.r_temp_rx_byte[1] .sym 31574 spi_if_ins.spi.r_temp_rx_byte[4] -.sym 31578 i_mosi$SB_IO_IN -.sym 31582 spi_if_ins.spi.r_temp_rx_byte[2] -.sym 31590 spi_if_ins.spi.r_temp_rx_byte[3] -.sym 31602 spi_if_ins.spi.r_temp_rx_byte[6] -.sym 31606 spi_if_ins.spi.r_temp_rx_byte[5] +.sym 31578 spi_if_ins.spi.r_temp_rx_byte[3] +.sym 31590 spi_if_ins.spi.r_temp_rx_byte[2] +.sym 31594 spi_if_ins.spi.r_temp_rx_byte[3] +.sym 31598 spi_if_ins.spi.r_temp_rx_byte[5] +.sym 31602 spi_if_ins.spi.r_temp_rx_byte[0] +.sym 31606 spi_if_ins.spi.r_temp_rx_byte[4] +.sym 31610 spi_if_ins.spi.r_temp_rx_byte[1] .sym 31614 i_mosi$SB_IO_IN -.sym 31678 io_ctrl_ins.pmod_dir_state[3] -.sym 31679 io_ctrl_ins.led0_state_SB_LUT4_I3_O[1] -.sym 31680 io_ctrl_ins.tr_vc_2_state_SB_LUT4_I1_O[2] -.sym 31681 io_ctrl_ins.tr_vc_2_state_SB_LUT4_I1_O[3] -.sym 31690 io_ctrl_ins.pmod_dir_state[4] -.sym 31691 io_ctrl_ins.led0_state_SB_LUT4_I3_O[1] -.sym 31692 io_ctrl_ins.tr_vc_1_b_state_SB_LUT4_I1_O[2] -.sym 31693 io_ctrl_ins.tr_vc_1_b_state_SB_LUT4_I1_O[3] -.sym 31694 io_ctrl_ins.o_data_out_SB_DFFESR_Q_3_R[0] -.sym 31695 io_ctrl_ins.rf_mode[2] -.sym 31696 sys_ctrl_ins.o_data_out_SB_DFFE_Q_E_SB_LUT4_O_I1_SB_LUT4_I2_O[2] -.sym 31697 i_config[1]$SB_IO_IN -.sym 31698 io_ctrl_ins.led0_state_SB_LUT4_I3_O[0] -.sym 31699 io_ctrl_ins.led0_state_SB_LUT4_I3_O[1] -.sym 31700 io_ctrl_ins.led0_state_SB_LUT4_I3_O[2] -.sym 31701 io_ctrl_ins.led0_state_SB_LUT4_I3_O[3] -.sym 31714 io_ctrl_ins.debug_mode_SB_LUT4_I2_O[0] -.sym 31715 io_ctrl_ins.debug_mode_SB_LUT4_I2_O[1] -.sym 31716 io_ctrl_ins.debug_mode_SB_LUT4_I2_O[2] -.sym 31717 io_ctrl_ins.debug_mode_SB_LUT4_I2_O[3] -.sym 31723 io_ctrl_ins.debug_mode_SB_LUT4_I2_O[3] -.sym 31724 io_ctrl_ins.rf_pin_state[6] -.sym 31725 io_ctrl_ins.rx_h_state_SB_DFFE_Q_D_SB_LUT4_O_I3[2] -.sym 31728 io_ctrl_ins.rf_mode[0] -.sym 31729 io_ctrl_ins.rf_mode[2] -.sym 31731 io_ctrl_ins.rf_pin_state[7] +.sym 31618 spi_if_ins.spi.r_rx_byte[3] +.sym 31626 spi_if_ins.spi.r_rx_byte[0] +.sym 31655 smi_ctrl_ins.o_data_out_SB_LUT4_I0_I1[2] +.sym 31656 w_tx_data_io[7] +.sym 31657 smi_ctrl_ins.o_data_out_SB_LUT4_I0_O[2] +.sym 31664 smi_ctrl_ins.o_data_out_SB_LUT4_I0_I1[2] +.sym 31665 w_tx_data_io[4] +.sym 31668 smi_ctrl_ins.o_data_out_SB_LUT4_I0_I1[2] +.sym 31669 w_tx_data_io[3] +.sym 31672 smi_ctrl_ins.o_data_out_SB_LUT4_I0_I1[2] +.sym 31673 w_tx_data_io[6] +.sym 31675 smi_ctrl_ins.o_data_out_SB_LUT4_I0_I1[2] +.sym 31676 w_tx_data_io[5] +.sym 31677 smi_ctrl_ins.o_data_out_SB_LUT4_I0_O[2] +.sym 31731 io_ctrl_ins.rf_pin_state[5] .sym 31732 io_ctrl_ins.debug_mode_SB_LUT4_I2_O[3] -.sym 31733 io_ctrl_ins.rx_h_state_SB_DFFE_Q_D_SB_LUT4_O_I3[2] -.sym 31734 io_ctrl_ins.debug_mode_SB_LUT4_I2_O[0] -.sym 31735 io_ctrl_ins.debug_mode_SB_LUT4_I2_O[1] +.sym 31733 io_ctrl_ins.tr_vc_1_state_SB_DFFE_Q_D_SB_LUT4_O_I3[2] +.sym 31735 io_ctrl_ins.debug_mode_SB_LUT4_I2_O[3] .sym 31736 io_ctrl_ins.rf_pin_state[4] -.sym 31737 io_ctrl_ins.debug_mode_SB_LUT4_I2_O[3] -.sym 31738 io_ctrl_ins.rf_pin_state[3] -.sym 31739 io_ctrl_ins.rf_mode[2] -.sym 31740 io_ctrl_ins.debug_mode_SB_LUT4_I2_O[1] -.sym 31741 io_ctrl_ins.debug_mode_SB_LUT4_I2_O[3] -.sym 31750 o_rx_h_tx_l_b$SB_IO_OUT -.sym 31751 io_ctrl_ins.rx_h_b_state_SB_LUT4_I0_I2[1] -.sym 31752 io_ctrl_ins.rx_h_b_state_SB_LUT4_I0_I2[2] -.sym 31753 io_ctrl_ins.rx_h_b_state_SB_LUT4_I0_I2[3] -.sym 31797 i_ss$SB_IO_IN -.sym 31875 lvds_rx_09_inst.r_phase_count[0] -.sym 31879 lvds_rx_09_inst.r_phase_count[1] -.sym 31880 $PACKER_VCC_NET -.sym 31881 lvds_rx_09_inst.r_phase_count[0] -.sym 31882 lvds_rx_09_inst.r_phase_count_SB_LUT4_O_I3[2] -.sym 31884 $PACKER_VCC_NET -.sym 31885 lvds_rx_09_inst.r_phase_count_SB_CARRY_CI_CO[2] -.sym 31901 lvds_rx_09_inst.r_phase_count_SB_LUT4_I1_O[0] -.sym 31907 lvds_rx_09_inst.r_phase_count_SB_LUT4_I1_O[0] -.sym 31908 lvds_rx_09_inst.r_phase_count_SB_LUT4_O_I3[1] -.sym 31909 lvds_rx_09_inst.r_phase_count_SB_LUT4_O_I3[2] -.sym 31910 lvds_rx_09_inst.r_phase_count_SB_LUT4_O_I3_SB_LUT4_I2_O[3] -.sym 31911 lvds_rx_09_inst.r_phase_count_SB_LUT4_I1_O[1] -.sym 31912 lvds_rx_09_inst.o_debug_state[1] -.sym 31913 lvds_rx_09_inst.o_debug_state[0] -.sym 31918 lvds_rx_09_inst.r_phase_count_SB_LUT4_O_I3_SB_LUT4_I2_O[3] -.sym 31919 lvds_rx_09_inst.r_phase_count_SB_LUT4_I1_O[2] -.sym 31920 lvds_rx_09_inst.o_debug_state[1] -.sym 31921 lvds_rx_09_inst.o_debug_state[0] -.sym 31922 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a/firmware/top.json b/firmware/top.json index bc4e283..6dc2460 100644 --- a/firmware/top.json +++ b/firmware/top.json @@ -2904,8 +2904,9 @@ }, "SB_DFFNESR": { "attributes": { - "abc9_flop": "00000000000000000000000000000001", "blackbox": "00000000000000000000000000000001", + "abc9_flop": "00000000000000000000000000000001", + "cells_not_processed": "00000000000000000000000000000001", "src": "/usr/local/bin/../share/yosys/ice40/cells_sim.v:1155.1-1208.10" }, "ports": { @@ -9649,7 +9650,7 @@ "top": { "attributes": { "top": "00000000000000000000000000000001", - "src": "top.v:8.1-371.10" + "src": "top.v:8.1-374.10" }, "ports": { "i_glob_clock": { @@ -9815,31 +9816,6 @@ "O": [ 47 ] } }, - "i_config_SB_LUT4_I3": { - "hide_name": 0, - "type": "SB_LUT4", - "parameters": { - "LUT_INIT": "1111000000000000" - }, - "attributes": { - "module_not_derived": "00000000000000000000000000000001", - "src": "/usr/local/bin/../share/yosys/ice40/cells_map.v:17.34-18.52" - }, - "port_directions": { - "I0": "input", - "I1": "input", - "I2": "input", - "I3": "input", - "O": "output" - }, - "connections": { - "I0": [ "0" ], - "I1": [ "0" ], - "I2": [ 46 ], - "I3": [ 16 ], - "O": [ 48 ] - } - }, "i_smi_a1_SB_LUT4_I1": { "hide_name": 0, "type": "SB_LUT4", @@ -9858,11 +9834,11 @@ "O": "output" }, "connections": { - "I0": [ 49 ], + "I0": [ 48 ], "I1": [ 28 ], "I2": [ 29 ], "I3": [ 30 ], - "O": [ 50 ] + "O": [ 49 ] } }, "i_smi_a2_SB_LUT4_I0": { @@ -9886,8 +9862,8 @@ "I0": [ 29 ], "I1": [ 28 ], "I2": [ 30 ], - "I3": [ 49 ], - "O": [ 51 ] + "I3": [ 48 ], + "O": [ 50 ] } }, "i_ss_SB_LUT4_I1": { @@ -9910,9 +9886,9 @@ "connections": { "I0": [ "0" ], "I1": [ 44 ], - "I2": [ 52 ], - "I3": [ 53 ], - "O": [ 54 ] + "I2": [ 51 ], + "I3": [ 52 ], + "O": [ 53 ] } }, "i_ss_SB_LUT4_I1_O_SB_LUT4_O": { @@ -9934,35 +9910,10 @@ }, "connections": { "I0": [ "0" ], - "I1": [ 55 ], - "I2": [ 56 ], - "I3": [ 57 ], - "O": [ 58 ] - } - }, - "i_ss_SB_LUT4_I3": { - "hide_name": 0, - "type": "SB_LUT4", - "parameters": { - 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], - "I3": [ 78 ], - "O": [ 135 ] + "I0": [ 136 ], + "I1": [ 120 ], + "I2": [ 91 ], + "I3": [ 74 ], + "O": [ 134 ] + } + }, + "io_ctrl_ins.o_data_out_SB_DFFESS_Q_E_SB_LUT4_O": { + "hide_name": 0, + "type": "SB_LUT4", + "parameters": { + "LUT_INIT": "1111110000000000" + }, + "attributes": { + "module_not_derived": "00000000000000000000000000000001", + "src": "/usr/local/bin/../share/yosys/ice40/cells_map.v:22.34-23.52" + }, + "port_directions": { + "I0": "input", + "I1": "input", + "I2": "input", + "I3": "input", + "O": "output" + }, + "connections": { + "I0": [ "0" ], + "I1": [ 79 ], + "I2": [ 115 ], + "I3": [ 137 ], + "O": [ 113 ] } }, "io_ctrl_ins.o_data_out_SB_DFFESS_Q_S_SB_LUT4_O": { @@ -10988,9 +10939,9 @@ "connections": { "I0": [ "0" ], "I1": [ "0" ], - "I2": [ 77 ], - "I3": [ 106 ], - "O": [ 120 ] + "I2": [ 73 ], + "I3": [ 99 ], + "O": [ 118 ] } }, "io_ctrl_ins.pmod_dir_state_SB_DFFE_Q": { @@ -11009,7 +10960,7 @@ "Q": "output" }, "connections": { - "C": [ 60 ], + "C": [ 58 ], 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{ @@ -12532,7 +12531,7 @@ }, "attributes": { "module_not_derived": "00000000000000000000000000000001", - "src": "top.v:275.17-286.5|complex_fifo.v:57.23-57.34|/usr/local/bin/../share/yosys/ice40/arith_map.v:62.5-70.4|/usr/local/bin/../share/yosys/ice40/cells_map.v:26.33-27.52" + "src": "top.v:277.17-288.5|complex_fifo.v:57.23-57.34|/usr/local/bin/../share/yosys/ice40/arith_map.v:62.5-70.4|/usr/local/bin/../share/yosys/ice40/cells_map.v:26.33-27.52" }, "port_directions": { "I0": "input", @@ -12546,10 +12545,10 @@ "I1": [ "0" ], "I2": [ 205 ], "I3": [ 206 ], - "O": [ 187 ] + "O": [ 195 ] } }, - "io_pmod_SB_DFFSR_Q_D_SB_LUT4_O_I2_SB_LUT4_O_1_I0_SB_LUT4_O_I2_SB_LUT4_O_2": { + "io_pmod_SB_DFFSR_Q_D_SB_LUT4_O_I0_SB_LUT4_O_I2_SB_LUT4_O_I1_SB_LUT4_O_2": { "hide_name": 0, "type": "SB_LUT4", "parameters": { @@ -12557,7 +12556,7 @@ }, "attributes": { "module_not_derived": "00000000000000000000000000000001", - "src": "top.v:275.17-286.5|complex_fifo.v:57.23-57.34|/usr/local/bin/../share/yosys/ice40/arith_map.v:62.5-70.4|/usr/local/bin/../share/yosys/ice40/cells_map.v:26.33-27.52" + "src": "top.v:277.17-288.5|complex_fifo.v:57.23-57.34|/usr/local/bin/../share/yosys/ice40/arith_map.v:62.5-70.4|/usr/local/bin/../share/yosys/ice40/cells_map.v:26.33-27.52" }, "port_directions": { "I0": "input", @@ -12571,10 +12570,10 @@ "I1": [ "0" ], "I2": [ 207 ], "I3": [ 208 ], - "O": [ 189 ] + "O": [ 194 ] } }, - "io_pmod_SB_DFFSR_Q_D_SB_LUT4_O_I2_SB_LUT4_O_1_I0_SB_LUT4_O_I2_SB_LUT4_O_3": { + "io_pmod_SB_DFFSR_Q_D_SB_LUT4_O_I0_SB_LUT4_O_I2_SB_LUT4_O_I1_SB_LUT4_O_3": { "hide_name": 0, "type": "SB_LUT4", "parameters": { @@ -12582,7 +12581,7 @@ }, "attributes": { "module_not_derived": "00000000000000000000000000000001", - "src": "top.v:275.17-286.5|complex_fifo.v:57.23-57.34|/usr/local/bin/../share/yosys/ice40/arith_map.v:62.5-70.4|/usr/local/bin/../share/yosys/ice40/cells_map.v:26.33-27.52" + "src": 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"I0": "input", @@ -12621,10 +12620,10 @@ "I1": [ "0" ], "I2": [ 211 ], "I3": [ 212 ], - "O": [ 200 ] + "O": [ 193 ] } }, - "io_pmod_SB_DFFSR_Q_D_SB_LUT4_O_I2_SB_LUT4_O_1_I0_SB_LUT4_O_I2_SB_LUT4_O_5": { + "io_pmod_SB_DFFSR_Q_D_SB_LUT4_O_I0_SB_LUT4_O_I2_SB_LUT4_O_I1_SB_LUT4_O_5": { "hide_name": 0, "type": "SB_LUT4", "parameters": { @@ -12632,7 +12631,7 @@ }, "attributes": { "module_not_derived": "00000000000000000000000000000001", - "src": "top.v:275.17-286.5|complex_fifo.v:57.23-57.34|/usr/local/bin/../share/yosys/ice40/arith_map.v:62.5-70.4|/usr/local/bin/../share/yosys/ice40/cells_map.v:26.33-27.52" + "src": "top.v:277.17-288.5|complex_fifo.v:57.23-57.34|/usr/local/bin/../share/yosys/ice40/arith_map.v:62.5-70.4|/usr/local/bin/../share/yosys/ice40/cells_map.v:26.33-27.52" }, "port_directions": { "I0": "input", @@ -12645,17 +12644,17 @@ "I0": [ "0" ], "I1": [ "0" ], "I2": [ 213 ], - "I3": [ 196 ], - "O": [ 195 ] + "I3": [ 197 ], + "O": [ 191 ] } }, - "io_pmod_SB_DFFSR_Q_D_SB_LUT4_O_I2_SB_LUT4_O_1_I0_SB_LUT4_O_I2_SB_LUT4_O_I3_SB_CARRY_CO": { + "io_pmod_SB_DFFSR_Q_D_SB_LUT4_O_I0_SB_LUT4_O_I2_SB_LUT4_O_I1_SB_LUT4_O_I3_SB_CARRY_CO": { "hide_name": 0, "type": "SB_CARRY", "parameters": { }, "attributes": { - "src": "top.v:275.17-286.5|complex_fifo.v:57.23-57.34|/usr/local/bin/../share/yosys/ice40/arith_map.v:62.5-70.4" + "src": "top.v:277.17-288.5|complex_fifo.v:57.23-57.34|/usr/local/bin/../share/yosys/ice40/arith_map.v:62.5-70.4" }, "port_directions": { "CI": "input", @@ -12665,18 +12664,18 @@ }, "connections": { "CI": [ 206 ], - "CO": [ 204 ], + "CO": [ 203 ], "I0": [ "0" ], "I1": [ 205 ] } }, - "io_pmod_SB_DFFSR_Q_D_SB_LUT4_O_I2_SB_LUT4_O_1_I0_SB_LUT4_O_I2_SB_LUT4_O_I3_SB_CARRY_CO_1": { + "io_pmod_SB_DFFSR_Q_D_SB_LUT4_O_I0_SB_LUT4_O_I2_SB_LUT4_O_I1_SB_LUT4_O_I3_SB_CARRY_CO_1": { "hide_name": 0, "type": "SB_CARRY", "parameters": { }, "attributes": { - "src": "top.v:275.17-286.5|complex_fifo.v:57.23-57.34|/usr/local/bin/../share/yosys/ice40/arith_map.v:62.5-70.4" + "src": "top.v:277.17-288.5|complex_fifo.v:57.23-57.34|/usr/local/bin/../share/yosys/ice40/arith_map.v:62.5-70.4" }, "port_directions": { "CI": "input", @@ -12691,13 +12690,13 @@ "I1": [ 207 ] } }, - "io_pmod_SB_DFFSR_Q_D_SB_LUT4_O_I2_SB_LUT4_O_1_I0_SB_LUT4_O_I2_SB_LUT4_O_I3_SB_CARRY_CO_2": { + "io_pmod_SB_DFFSR_Q_D_SB_LUT4_O_I0_SB_LUT4_O_I2_SB_LUT4_O_I1_SB_LUT4_O_I3_SB_CARRY_CO_2": { "hide_name": 0, "type": "SB_CARRY", "parameters": { }, "attributes": { - "src": "top.v:275.17-286.5|complex_fifo.v:57.23-57.34|/usr/local/bin/../share/yosys/ice40/arith_map.v:62.5-70.4" + "src": "top.v:277.17-288.5|complex_fifo.v:57.23-57.34|/usr/local/bin/../share/yosys/ice40/arith_map.v:62.5-70.4" }, "port_directions": { "CI": "input", @@ -12712,13 +12711,13 @@ "I1": [ 209 ] } }, - "io_pmod_SB_DFFSR_Q_D_SB_LUT4_O_I2_SB_LUT4_O_1_I0_SB_LUT4_O_I2_SB_LUT4_O_I3_SB_CARRY_CO_3": { + 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], + "I3": [ 233 ], + "O": [ 218 ] + } + }, + "io_pmod_SB_DFFSS_Q_D_SB_LUT4_O_I0_SB_LUT4_O_3": { + "hide_name": 0, + "type": "SB_LUT4", + "parameters": { + "LUT_INIT": "1001000000000000" + }, + "attributes": { + "module_not_derived": "00000000000000000000000000000001", + "src": "/usr/local/bin/../share/yosys/ice40/cells_map.v:26.33-27.52" + }, + "port_directions": { + "I0": "input", + "I1": "input", + "I2": "input", + "I3": "input", + "O": "output" + }, + "connections": { + "I0": [ 234 ], + "I1": [ 235 ], + "I2": [ 236 ], + "I3": [ 237 ], + "O": [ 217 ] + } + }, + "io_pmod_SB_DFFSS_Q_D_SB_LUT4_O_I0_SB_LUT4_O_I0_SB_LUT4_O": { + "hide_name": 0, + "type": "SB_LUT4", + "parameters": { + "LUT_INIT": "0100001010000001" + }, + "attributes": { + "module_not_derived": "00000000000000000000000000000001", + "src": "/usr/local/bin/../share/yosys/ice40/cells_map.v:26.33-27.52" + }, + "port_directions": { + "I0": "input", + "I1": "input", + "I2": "input", + "I3": "input", + "O": "output" + }, + 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- }, - "port_directions": { - "I0": "input", - "I1": "input", - "I2": "input", - "I3": "input", - "O": "output" - }, - "connections": { - "I0": [ "0" ], - "I1": [ "0" ], - "I2": [ 171 ], - "I3": [ 170 ], - "O": [ 343 ] - } - }, "o_miso_$_TBUF__Y": { "hide_name": 0, "type": "$_TBUF_", @@ -16633,8 +16638,8 @@ "Y": "output" }, "connections": { - "A": [ 393 ], - "E": [ 394 ], + "A": [ 394 ], + "E": [ 395 ], "Y": [ 45 ] } }, @@ -16660,7 +16665,7 @@ "I1": [ "0" ], "I2": [ "0" ], "I3": [ 44 ], - "O": [ 394 ] + "O": [ 395 ] } }, "o_smi_read_req_$_TBUF__Y": { @@ -16669,7 +16674,7 @@ "parameters": { }, "attributes": { - "src": "top.v:358.28-358.63" + "src": "top.v:360.28-360.63" }, "port_directions": { "A": "input", @@ -16688,7 +16693,7 @@ "parameters": { }, "attributes": { - "src": "top.v:357.29-357.65" + "src": "top.v:359.29-359.65" }, "port_directions": { "A": "input", @@ -16717,8 +16722,8 @@ }, "connections": { "C": [ 2 ], - "D": [ 395 ], - "Q": [ 396 ] + "D": [ 396 ], + "Q": [ 397 ] } }, "r_counter_SB_DFF_Q_D_SB_LUT4_O": { @@ -16742,8 +16747,8 @@ "I0": [ "0" ], "I1": [ "0" ], "I2": [ "0" ], - "I3": [ 396 ], - "O": [ 395 ] + "I3": [ 397 ], + "O": [ 396 ] } }, "r_tx_data_SB_DFFESR_Q": { @@ -16763,11 +16768,11 @@ "R": "input" }, "connections": { - "C": [ 60 ], - "D": [ 397 ], - "E": [ 398 ], - "Q": [ 399 ], - "R": [ 400 ] + "C": [ 58 ], + "D": [ 398 ], + "E": [ 399 ], + "Q": [ 400 ], + "R": [ 401 ] } }, "r_tx_data_SB_DFFESR_Q_1": { @@ -16787,11 +16792,11 @@ "R": "input" }, "connections": { - "C": [ 60 ], - "D": [ 401 ], - "E": [ 398 ], - "Q": [ 402 ], - "R": [ 400 ] + "C": [ 58 ], + "D": [ 402 ], + "E": [ 399 ], + "Q": [ 403 ], + "R": [ 401 ] } }, "r_tx_data_SB_DFFESR_Q_2": { @@ -16811,11 +16816,11 @@ "R": "input" }, "connections": { - "C": [ 60 ], - "D": [ 403 ], - "E": [ 398 ], - "Q": [ 404 ], - "R": [ 400 ] + "C": [ 58 ], + "D": [ 404 ], + "E": [ 399 ], + "Q": [ 405 ], + "R": [ 401 ] } }, "r_tx_data_SB_DFFESR_Q_3": { @@ -16835,11 +16840,11 @@ "R": "input" }, "connections": { - "C": [ 60 ], - "D": [ 405 ], - "E": [ 398 ], - "Q": [ 406 ], - "R": [ 400 ] + "C": [ 58 ], + "D": [ 406 ], + "E": [ 399 ], + "Q": [ 407 ], + "R": [ 401 ] } }, "r_tx_data_SB_DFFESR_Q_4": { @@ -16859,11 +16864,11 @@ "R": "input" }, "connections": { - "C": [ 60 ], - "D": [ 407 ], - "E": [ 398 ], - "Q": [ 408 ], - "R": [ 400 ] + "C": [ 58 ], + "D": [ 408 ], + "E": [ 399 ], + "Q": [ 409 ], + "R": [ 401 ] } }, "r_tx_data_SB_DFFESR_Q_5": { @@ -16883,11 +16888,11 @@ "R": "input" }, "connections": { - "C": [ 60 ], - "D": [ 409 ], - "E": [ 398 ], - "Q": [ 410 ], - "R": [ 400 ] + "C": [ 58 ], + "D": [ 410 ], + "E": [ 399 ], + "Q": [ 411 ], + "R": [ 401 ] } }, "r_tx_data_SB_DFFESR_Q_5_D_SB_LUT4_O": { @@ -16910,9 +16915,9 @@ "connections": { "I0": [ "0" ], "I1": [ "0" ], - "I2": [ 411 ], - "I3": [ 112 ], - "O": [ 409 ] + "I2": [ 412 ], + "I3": [ 105 ], + "O": [ 410 ] } }, "r_tx_data_SB_DFFESR_Q_5_D_SB_LUT4_O_1": { @@ -16935,9 +16940,9 @@ "connections": { "I0": [ "0" ], "I1": [ "0" ], - "I2": [ 411 ], - "I3": [ 128 ], - "O": [ 405 ] + "I2": [ 412 ], + "I3": [ 127 ], + "O": [ 406 ] } }, "r_tx_data_SB_DFFESR_Q_5_D_SB_LUT4_O_2": { @@ -16960,9 +16965,9 @@ "connections": { "I0": [ "0" ], "I1": [ "0" ], - "I2": [ 411 ], - "I3": [ 123 ], - "O": [ 403 ] + "I2": [ 412 ], + "I3": [ 122 ], + "O": [ 404 ] } }, "r_tx_data_SB_DFFESR_Q_6": { @@ -16982,11 +16987,11 @@ "R": "input" }, "connections": { - "C": [ 60 ], - "D": [ 412 ], - "E": [ 398 ], - "Q": [ 413 ], - "R": [ 400 ] + "C": [ 58 ], + "D": [ 413 ], + "E": [ 399 ], + "Q": [ 414 ], + "R": [ 401 ] } }, "r_tx_data_SB_DFFE_Q": { @@ -17005,10 +17010,10 @@ "Q": "output" }, "connections": { - "C": [ 60 ], - "D": [ 414 ], - "E": [ 398 ], - "Q": [ 415 ] + "C": [ 58 ], + "D": [ 415 ], + "E": [ 399 ], + "Q": [ 416 ] } }, "rx_09_fifo.ram256x16_i_inst": { @@ -17037,7 +17042,7 @@ "attributes": { "hdlname": "rx_09_fifo ram256x16_i_inst", "module_not_derived": "00000000000000000000000000000001", - "src": "top.v:275.17-286.5|complex_fifo.v:105.3-116.22" + "src": "top.v:277.17-288.5|complex_fifo.v:105.3-116.22" }, "port_directions": { "MASK": "input", @@ -17054,15 +17059,15 @@ }, "connections": { "MASK": [ "0", "0", "0", "0", "0", "0", "0", "0", "0", "0", "0", "0", "0", "0", "0", "0" ], - "RADDR": [ 231, 242, 243, 248, 250, 246, 239, 240, "0", "0", "0" ], - "RCLK": [ 60 ], + "RADDR": [ 248, 247, 245, 243, 230, 226, 228, 239, "0", "0", "0" ], + "RCLK": [ 58 ], "RCLKE": [ 22 ], - "RDATA": [ 416, 417, 418, 419, 420, 421, 422, 423, 424, 425, 426, 427, 428, 429, 430, 431 ], + "RDATA": [ 417, 418, 419, 420, 421, 422, 423, 424, 425, 426, 427, 428, 429, 430, 431, 432 ], "RE": [ 22 ], - "WADDR": [ 197, 196, 213, 211, 209, 207, 205, 203, "0", "0", "0" ], + "WADDR": [ 196, 197, 213, 211, 209, 207, 205, 202, "0", "0", "0" ], "WCLK": [ 18 ], "WCLKE": [ 21 ], - "WDATA": [ 278, 276, 274, 272, 270, 268, 326, 324, 322, 320, 318, 316, 310, 288, 266, 264 ], + "WDATA": [ 274, 272, 270, 268, 266, 264, 322, 320, 318, 316, 314, 312, 306, 284, 262, 260 ], "WE": [ 21 ] } }, @@ -17092,7 +17097,7 @@ "attributes": { "hdlname": "rx_09_fifo ram256x16_q_inst", "module_not_derived": "00000000000000000000000000000001", - "src": "top.v:275.17-286.5|complex_fifo.v:137.3-148.22" + "src": "top.v:277.17-288.5|complex_fifo.v:137.3-148.22" }, "port_directions": { "MASK": "input", @@ -17109,15 +17114,15 @@ }, "connections": { "MASK": [ "0", "0", "0", "0", "0", "0", "0", "0", "0", "0", "0", "0", "0", "0", "0", "0" ], - "RADDR": [ 231, 242, 243, 248, 250, 246, 239, 240, "0", "0", "0" ], - "RCLK": [ 60 ], + "RADDR": [ 248, 247, 245, 243, 230, 226, 228, 239, "0", "0", "0" ], + "RCLK": [ 58 ], "RCLKE": [ 22 ], - "RDATA": [ 432, 433, 434, 435, 436, 437, 438, 439, 440, 441, 442, 443, 444, 445, 446, 447 ], + "RDATA": [ 433, 434, 435, 436, 437, 438, 439, 440, 441, 442, 443, 444, 445, 446, 447, 448 ], "RE": [ 22 ], - "WADDR": [ 197, 196, 213, 211, 209, 207, 205, 203, "0", "0", "0" ], + "WADDR": [ 196, 197, 213, 211, 209, 207, 205, 202, "0", "0", "0" ], "WCLK": [ 18 ], "WCLKE": [ 21 ], - "WDATA": [ 314, 312, 308, 306, 304, 302, 300, 298, 296, 294, 292, 290, 286, 284, 282, 280 ], + "WDATA": [ 310, 308, 304, 302, 300, 298, 296, 294, 292, 290, 288, 286, 282, 280, 278, 276 ], "WE": [ 21 ] } }, @@ -17128,7 +17133,7 @@ }, "attributes": { "module_not_derived": "00000000000000000000000000000001", - "src": "top.v:275.17-286.5|complex_fifo.v:61.1-69.4|/usr/local/bin/../share/yosys/ice40/ff_map.v:24.66-24.119" + "src": "top.v:277.17-288.5|complex_fifo.v:61.1-69.4|/usr/local/bin/../share/yosys/ice40/ff_map.v:24.66-24.119" }, "port_directions": { "C": "input", @@ -17138,11 +17143,11 @@ "R": "input" }, "connections": { - "C": [ 60 ], - "D": [ 448 ], - "E": [ 449 ], - "Q": [ 239 ], - "R": [ 49 ] + "C": [ 58 ], + "D": [ 449 ], + "E": [ 450 ], + "Q": [ 228 ], + "R": [ 48 ] } }, "rx_09_fifo.rd_addr_SB_DFFESR_Q_1": { @@ -17152,7 +17157,7 @@ }, "attributes": { "module_not_derived": "00000000000000000000000000000001", - "src": "top.v:275.17-286.5|complex_fifo.v:61.1-69.4|/usr/local/bin/../share/yosys/ice40/ff_map.v:24.66-24.119" + "src": "top.v:277.17-288.5|complex_fifo.v:61.1-69.4|/usr/local/bin/../share/yosys/ice40/ff_map.v:24.66-24.119" }, "port_directions": { "C": "input", @@ -17162,11 +17167,11 @@ "R": "input" }, "connections": { - "C": [ 60 ], - "D": [ 450 ], - "E": [ 449 ], - "Q": [ 246 ], - "R": [ 49 ] + "C": [ 58 ], + "D": [ 451 ], + "E": [ 450 ], + "Q": [ 226 ], + "R": [ 48 ] } }, "rx_09_fifo.rd_addr_SB_DFFESR_Q_2": { @@ -17176,7 +17181,7 @@ }, "attributes": { "module_not_derived": "00000000000000000000000000000001", - "src": "top.v:275.17-286.5|complex_fifo.v:61.1-69.4|/usr/local/bin/../share/yosys/ice40/ff_map.v:24.66-24.119" + "src": "top.v:277.17-288.5|complex_fifo.v:61.1-69.4|/usr/local/bin/../share/yosys/ice40/ff_map.v:24.66-24.119" }, "port_directions": { "C": "input", @@ -17186,11 +17191,11 @@ "R": "input" }, "connections": { - "C": [ 60 ], - "D": [ 451 ], - "E": [ 449 ], - "Q": [ 250 ], - "R": [ 49 ] + "C": [ 58 ], + "D": [ 452 ], + "E": [ 450 ], + "Q": [ 230 ], + "R": [ 48 ] } }, "rx_09_fifo.rd_addr_SB_DFFESR_Q_3": { @@ -17200,7 +17205,7 @@ }, "attributes": { "module_not_derived": "00000000000000000000000000000001", - "src": "top.v:275.17-286.5|complex_fifo.v:61.1-69.4|/usr/local/bin/../share/yosys/ice40/ff_map.v:24.66-24.119" + "src": "top.v:277.17-288.5|complex_fifo.v:61.1-69.4|/usr/local/bin/../share/yosys/ice40/ff_map.v:24.66-24.119" }, "port_directions": { "C": "input", @@ -17210,11 +17215,11 @@ "R": "input" }, "connections": { - "C": [ 60 ], - "D": [ 452 ], - "E": [ 449 ], - "Q": [ 248 ], - "R": [ 49 ] + "C": [ 58 ], + "D": [ 453 ], + "E": [ 450 ], + "Q": [ 243 ], + "R": [ 48 ] } }, "rx_09_fifo.rd_addr_SB_DFFESR_Q_4": { @@ -17224,7 +17229,7 @@ }, "attributes": { "module_not_derived": "00000000000000000000000000000001", - "src": "top.v:275.17-286.5|complex_fifo.v:61.1-69.4|/usr/local/bin/../share/yosys/ice40/ff_map.v:24.66-24.119" + "src": "top.v:277.17-288.5|complex_fifo.v:61.1-69.4|/usr/local/bin/../share/yosys/ice40/ff_map.v:24.66-24.119" }, "port_directions": { "C": "input", @@ -17234,11 +17239,11 @@ "R": "input" }, "connections": { - "C": [ 60 ], - "D": [ 453 ], - "E": [ 449 ], - "Q": [ 243 ], - "R": [ 49 ] + "C": [ 58 ], + "D": [ 454 ], + "E": [ 450 ], + "Q": [ 245 ], + "R": [ 48 ] } }, "rx_09_fifo.rd_addr_SB_DFFESR_Q_5": { @@ -17248,7 +17253,7 @@ }, "attributes": { "module_not_derived": "00000000000000000000000000000001", - "src": "top.v:275.17-286.5|complex_fifo.v:61.1-69.4|/usr/local/bin/../share/yosys/ice40/ff_map.v:24.66-24.119" + "src": "top.v:277.17-288.5|complex_fifo.v:61.1-69.4|/usr/local/bin/../share/yosys/ice40/ff_map.v:24.66-24.119" }, "port_directions": { "C": "input", @@ -17258,11 +17263,11 @@ "R": "input" }, "connections": { - "C": [ 60 ], - "D": [ 232 ], - "E": [ 449 ], - "Q": [ 242 ], - "R": [ 49 ] + "C": [ 58 ], + "D": [ 455 ], + "E": [ 450 ], + "Q": [ 247 ], + "R": [ 48 ] } }, "rx_09_fifo.rd_addr_SB_DFFESR_Q_6": { @@ -17272,7 +17277,7 @@ }, "attributes": { "module_not_derived": "00000000000000000000000000000001", - "src": "top.v:275.17-286.5|complex_fifo.v:61.1-69.4|/usr/local/bin/../share/yosys/ice40/ff_map.v:24.66-24.119" + "src": "top.v:277.17-288.5|complex_fifo.v:61.1-69.4|/usr/local/bin/../share/yosys/ice40/ff_map.v:24.66-24.119" }, "port_directions": { "C": "input", @@ -17282,11 +17287,11 @@ "R": "input" }, "connections": { - "C": [ 60 ], - "D": [ 454 ], - "E": [ 449 ], - "Q": [ 231 ], - "R": [ 49 ] + "C": [ 58 ], + "D": [ 456 ], + "E": [ 450 ], + "Q": [ 248 ], + "R": [ 48 ] } }, "rx_09_fifo.rd_addr_SB_DFFESR_Q_E_SB_LUT4_O": { @@ -17310,8 +17315,8 @@ "I0": [ "0" ], "I1": [ "0" ], "I2": [ 22 ], - "I3": [ 49 ], - "O": [ 449 ] + "I3": [ 48 ], + "O": [ 450 ] } }, "rx_09_fifo.rd_addr_gray_SB_DFFESR_Q": { @@ -17321,7 +17326,7 @@ }, "attributes": { "module_not_derived": "00000000000000000000000000000001", - "src": "top.v:275.17-286.5|complex_fifo.v:61.1-69.4|/usr/local/bin/../share/yosys/ice40/ff_map.v:24.66-24.119" + "src": "top.v:277.17-288.5|complex_fifo.v:61.1-69.4|/usr/local/bin/../share/yosys/ice40/ff_map.v:24.66-24.119" }, "port_directions": { "C": "input", @@ -17331,11 +17336,11 @@ "R": "input" }, "connections": { - "C": [ 60 ], - "D": [ 455 ], - "E": [ 449 ], - "Q": [ 240 ], - "R": [ 49 ] + "C": [ 58 ], + "D": [ 457 ], + "E": [ 450 ], + "Q": [ 239 ], + "R": [ 48 ] } }, "rx_09_fifo.rd_addr_gray_SB_DFFESR_Q_1": { @@ -17345,7 +17350,7 @@ }, "attributes": { "module_not_derived": "00000000000000000000000000000001", - "src": "top.v:275.17-286.5|complex_fifo.v:61.1-69.4|/usr/local/bin/../share/yosys/ice40/ff_map.v:24.66-24.119" + "src": "top.v:277.17-288.5|complex_fifo.v:61.1-69.4|/usr/local/bin/../share/yosys/ice40/ff_map.v:24.66-24.119" }, "port_directions": { "C": "input", @@ -17355,11 +17360,11 @@ "R": "input" }, "connections": { - "C": [ 60 ], - "D": [ 456 ], - "E": [ 449 ], - "Q": [ 457 ], - "R": [ 49 ] + "C": [ 58 ], + "D": [ 458 ], + "E": [ 450 ], + "Q": [ 459 ], + "R": [ 48 ] } }, "rx_09_fifo.rd_addr_gray_SB_DFFESR_Q_1_D_SB_LUT4_O": { @@ -17382,9 +17387,9 @@ "connections": { "I0": [ "0" ], "I1": [ "0" ], - "I2": [ 455 ], - "I3": [ 448 ], - "O": [ 456 ] + "I2": [ 457 ], + "I3": [ 449 ], + "O": [ 458 ] } }, "rx_09_fifo.rd_addr_gray_SB_DFFESR_Q_2": { @@ -17394,7 +17399,7 @@ }, "attributes": { "module_not_derived": "00000000000000000000000000000001", - "src": "top.v:275.17-286.5|complex_fifo.v:61.1-69.4|/usr/local/bin/../share/yosys/ice40/ff_map.v:24.66-24.119" + "src": "top.v:277.17-288.5|complex_fifo.v:61.1-69.4|/usr/local/bin/../share/yosys/ice40/ff_map.v:24.66-24.119" }, "port_directions": { "C": "input", @@ -17404,11 +17409,11 @@ "R": "input" }, "connections": { - "C": [ 60 ], - "D": [ 458 ], - "E": [ 449 ], - "Q": [ 459 ], - "R": [ 49 ] + "C": [ 58 ], + "D": [ 460 ], + "E": [ 450 ], + "Q": [ 461 ], + "R": [ 48 ] } }, "rx_09_fifo.rd_addr_gray_SB_DFFESR_Q_3": { @@ -17418,7 +17423,7 @@ }, "attributes": { "module_not_derived": "00000000000000000000000000000001", - "src": "top.v:275.17-286.5|complex_fifo.v:61.1-69.4|/usr/local/bin/../share/yosys/ice40/ff_map.v:24.66-24.119" + "src": "top.v:277.17-288.5|complex_fifo.v:61.1-69.4|/usr/local/bin/../share/yosys/ice40/ff_map.v:24.66-24.119" }, "port_directions": { "C": "input", @@ -17428,36 +17433,11 @@ "R": "input" }, "connections": { - "C": [ 60 ], - "D": [ 460 ], - "E": [ 449 ], - "Q": [ 461 ], - "R": [ 49 ] - } - }, - "rx_09_fifo.rd_addr_gray_SB_DFFESR_Q_3_D_SB_LUT4_O": { - "hide_name": 0, - "type": "SB_LUT4", - "parameters": { - "LUT_INIT": "0000111111110000" - }, - "attributes": { - "module_not_derived": "00000000000000000000000000000001", - "src": "/usr/local/bin/../share/yosys/ice40/cells_map.v:17.34-18.52" - }, - "port_directions": { - "I0": "input", - "I1": "input", - "I2": "input", - "I3": "input", - "O": "output" - }, - "connections": { - "I0": [ "0" ], - "I1": [ "0" ], - "I2": [ 451 ], - "I3": [ 450 ], - "O": [ 460 ] + "C": [ 58 ], + "D": [ 462 ], + "E": [ 450 ], + "Q": [ 463 ], + "R": [ 48 ] } }, "rx_09_fifo.rd_addr_gray_SB_DFFESR_Q_4": { @@ -17467,7 +17447,7 @@ }, "attributes": { "module_not_derived": "00000000000000000000000000000001", - "src": "top.v:275.17-286.5|complex_fifo.v:61.1-69.4|/usr/local/bin/../share/yosys/ice40/ff_map.v:24.66-24.119" + "src": "top.v:277.17-288.5|complex_fifo.v:61.1-69.4|/usr/local/bin/../share/yosys/ice40/ff_map.v:24.66-24.119" }, "port_directions": { "C": "input", @@ -17477,63 +17457,14 @@ "R": "input" }, "connections": { - "C": [ 60 ], - "D": [ 462 ], - "E": [ 449 ], - "Q": [ 463 ], - "R": [ 49 ] - } - }, - "rx_09_fifo.rd_addr_gray_SB_DFFESR_Q_5": { - "hide_name": 0, - "type": "SB_DFFESR", - "parameters": { - }, - "attributes": { - "module_not_derived": "00000000000000000000000000000001", - "src": "top.v:275.17-286.5|complex_fifo.v:61.1-69.4|/usr/local/bin/../share/yosys/ice40/ff_map.v:24.66-24.119" - }, - "port_directions": { - "C": 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"port_directions": { "CI": "input", @@ -17901,10 +17885,31 @@ "I1": "input" }, "connections": { - "CI": [ 231 ], + "CI": [ 475 ], "CO": [ 474 ], "I0": [ "0" ], - "I1": [ 242 ] + "I1": [ 245 ] + } + }, + "rx_09_fifo.rd_addr_gray_SB_LUT4_I2_I3_SB_CARRY_CO_5": { + "hide_name": 0, + "type": "SB_CARRY", + "parameters": { + }, + "attributes": { + "src": "top.v:277.17-288.5|complex_fifo.v:66.14-66.28|/usr/local/bin/../share/yosys/ice40/arith_map.v:62.5-70.4" + }, + "port_directions": { + "CI": "input", + "CO": "output", + "I0": "input", + "I1": "input" + }, + "connections": { + "CI": [ 248 ], + "CO": [ 475 ], + "I0": [ "0" ], + "I1": [ 247 ] } }, "rx_09_fifo.rd_addr_gray_SB_LUT4_I2_O_SB_LUT4_O": { @@ -17915,7 +17920,7 @@ }, "attributes": { "module_not_derived": "00000000000000000000000000000001", - "src": "top.v:275.17-286.5|complex_fifo.v:66.14-66.28|/usr/local/bin/../share/yosys/ice40/arith_map.v:62.5-70.4|/usr/local/bin/../share/yosys/ice40/cells_map.v:26.33-27.52" + "src": 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}, - "connections": { - "I0": [ 532 ], - "I1": [ 74 ], - "I2": [ 518 ], - "I3": [ 533 ], - "O": [ 531 ] - } - }, - "spi_if_ins.o_cs_SB_LUT4_I3_1": { "hide_name": 0, "type": "SB_LUT4", "parameters": { @@ -20940,11 +20995,11 @@ "O": "output" }, "connections": { - "I0": [ 532 ], - "I1": [ 74 ], - "I2": [ 518 ], - "I3": [ 533 ], - "O": [ 398 ] + "I0": [ 536 ], + "I1": [ 70 ], + "I2": [ 522 ], + "I3": [ 537 ], + "O": [ 399 ] } }, "spi_if_ins.o_data_in_SB_DFFE_Q": { @@ -20963,9 +21018,9 @@ "Q": "output" }, "connections": { - "C": [ 60 ], - "D": [ 554 ], - "E": [ 555 ], + "C": [ 58 ], + "D": [ 558 ], + "E": [ 559 ], "Q": [ 138 ] } }, @@ -20985,9 +21040,9 @@ "Q": "output" }, "connections": { - "C": [ 60 ], - "D": [ 552 ], - "E": [ 555 ], + "C": [ 58 ], + "D": [ 556 ], + "E": [ 559 ], "Q": [ 141 ] } }, @@ -21007,9 +21062,9 @@ "Q": "output" }, "connections": { - "C": [ 60 ], - "D": [ 553 ], - "E": [ 555 ], + "C": [ 58 ], + "D": [ 557 ], + "E": [ 559 ], "Q": [ 143 ] } }, @@ -21029,9 +21084,9 @@ "Q": "output" }, "connections": { - "C": [ 60 ], - "D": [ 556 ], - "E": [ 555 ], + "C": [ 58 ], + "D": [ 560 ], + "E": [ 559 ], "Q": [ 145 ] } }, @@ -21051,9 +21106,9 @@ "Q": "output" }, "connections": { - "C": [ 60 ], - "D": [ 557 ], - "E": [ 555 ], + "C": [ 58 ], + "D": [ 561 ], + "E": [ 559 ], "Q": [ 146 ] } }, @@ -21073,9 +21128,9 @@ "Q": "output" }, "connections": { - "C": [ 60 ], - "D": [ 558 ], - "E": [ 555 ], + "C": [ 58 ], + "D": [ 562 ], + "E": [ 559 ], "Q": [ 147 ] } }, @@ -21095,10 +21150,10 @@ "Q": "output" }, "connections": { - "C": [ 60 ], - "D": [ 559 ], - "E": [ 555 ], - "Q": [ 61 ] + "C": [ 58 ], + "D": [ 563 ], + "E": [ 559 ], + "Q": [ 59 ] } }, "spi_if_ins.o_data_in_SB_DFFE_Q_7": { @@ -21117,10 +21172,10 @@ "Q": "output" }, "connections": { - "C": [ 60 ], - "D": [ 560 ], - "E": [ 555 ], - "Q": [ 64 ] + "C": [ 58 ], + "D": [ 564 ], + "E": [ 559 ], + "Q": [ 62 ] } }, "spi_if_ins.o_data_in_SB_DFFE_Q_E_SB_LUT4_O": { @@ -21141,11 +21196,11 @@ "O": "output" }, "connections": { - "I0": [ 561 ], - "I1": [ 562 ], - "I2": [ 563 ], - "I3": [ 564 ], - "O": [ 555 ] + "I0": [ 565 ], + "I1": [ 566 ], + "I2": [ 567 ], + "I3": [ 568 ], + "O": [ 559 ] } }, "spi_if_ins.o_fetch_cmd_SB_DFFESR_Q": { @@ -21165,11 +21220,11 @@ "R": "input" }, "connections": { - "C": [ 60 ], - "D": [ 565 ], - "E": [ 566 ], - "Q": [ 528 ], - "R": [ 567 ] + "C": [ 58 ], + "D": [ 569 ], + "E": [ 570 ], + "Q": [ 532 ], + "R": [ 571 ] } }, "spi_if_ins.o_fetch_cmd_SB_DFFESR_Q_D_SB_LUT4_O": { @@ -21192,20 +21247,20 @@ "connections": { "I0": [ "0" ], "I1": [ "0" ], - "I2": [ 568 ], - "I3": [ 561 ], - "O": [ 565 ] + "I2": [ 572 ], + "I3": [ 565 ], + "O": [ 569 ] } }, "spi_if_ins.o_fetch_cmd_SB_DFFESR_Q_E_SB_LUT4_O": { "hide_name": 0, "type": "SB_LUT4", "parameters": { - "LUT_INIT": "1011101111110000" + "LUT_INIT": "0011111100000000" }, "attributes": { "module_not_derived": "00000000000000000000000000000001", - "src": "/usr/local/bin/../share/yosys/ice40/cells_map.v:26.33-27.52" + "src": "/usr/local/bin/../share/yosys/ice40/cells_map.v:22.34-23.52" }, "port_directions": { "I0": "input", @@ -21215,11 +21270,11 @@ "O": "output" }, "connections": { - "I0": [ 561 ], - "I1": [ 554 ], - "I2": [ 569 ], - "I3": [ 570 ], - "O": [ 566 ] + "I0": [ "0" ], + "I1": [ 558 ], + "I2": [ 69 ], + "I3": [ 573 ], + "O": [ 570 ] } }, "spi_if_ins.o_fetch_cmd_SB_LUT4_I3": { @@ -21241,35 +21296,10 @@ }, "connections": { "I0": [ "0" ], - "I1": [ 49 ], - "I2": [ 74 ], - "I3": [ 528 ], - "O": [ 571 ] - } - }, - "spi_if_ins.o_fetch_cmd_SB_LUT4_I3_O_SB_LUT4_I3": { - "hide_name": 0, - "type": "SB_LUT4", - "parameters": { - "LUT_INIT": "1111110000000000" - }, - "attributes": { - "module_not_derived": "00000000000000000000000000000001", - "src": "/usr/local/bin/../share/yosys/ice40/cells_map.v:22.34-23.52" - }, - "port_directions": { - "I0": "input", - "I1": "input", - "I2": "input", - "I3": "input", - "O": "output" - }, - "connections": { - "I0": [ "0" ], - "I1": [ 83 ], - "I2": [ 85 ], - "I3": [ 571 ], - "O": [ 117 ] + "I1": [ 48 ], + "I2": [ 70 ], + "I3": [ 532 ], + "O": [ 137 ] } }, "spi_if_ins.o_ioc_SB_DFFE_Q": { @@ -21288,9 +21318,9 @@ "Q": "output" }, "connections": { - "C": [ 60 ], - "D": [ 556 ], - "E": [ 73 ], + "C": [ 58 ], + "D": [ 560 ], + "E": [ 69 ], "Q": [ 165 ] } }, @@ -21310,9 +21340,9 @@ "Q": "output" }, "connections": { - "C": [ 60 ], - "D": [ 557 ], - "E": [ 73 ], + "C": [ 58 ], + "D": [ 561 ], + "E": [ 69 ], "Q": [ 166 ] } }, @@ -21332,9 +21362,9 @@ "Q": "output" }, "connections": { - "C": [ 60 ], - "D": [ 558 ], - "E": [ 73 ], + "C": [ 58 ], + "D": [ 562 ], + "E": [ 69 ], "Q": [ 167 ] } }, @@ -21354,10 +21384,10 @@ "Q": "output" }, "connections": { - "C": [ 60 ], - "D": [ 559 ], - "E": [ 73 ], - "Q": [ 86 ] + "C": [ 58 ], + "D": [ 563 ], + "E": [ 69 ], + "Q": [ 114 ] } }, "spi_if_ins.o_ioc_SB_DFFE_Q_4": { @@ -21376,10 +21406,10 @@ "Q": "output" }, "connections": { - "C": [ 60 ], - "D": [ 560 ], - "E": [ 73 ], - "Q": [ 82 ] + "C": [ 58 ], + "D": [ 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"spi_if_ins.o_load_cmd_SB_DFFESR_Q_D_SB_LUT4_I2_O_SB_LUT4_I3": { + "spi_if_ins.o_load_cmd_SB_DFFESR_Q_D_SB_LUT4_I1_1": { "hide_name": 0, "type": "SB_LUT4", "parameters": { - "LUT_INIT": "0000111100000000" + "LUT_INIT": "0000111100110011" }, "attributes": { "module_not_derived": "00000000000000000000000000000001", - "src": "/usr/local/bin/../share/yosys/ice40/cells_map.v:17.34-18.52" + "src": "/usr/local/bin/../share/yosys/ice40/cells_map.v:22.34-23.52" }, "port_directions": { "I0": "input", @@ -21450,38 +21480,38 @@ }, "connections": { "I0": [ "0" ], - "I1": [ "0" ], - "I2": [ 561 ], - "I3": [ 570 ], - "O": [ 73 ] - } - }, - "spi_if_ins.o_load_cmd_SB_DFFESR_Q_D_SB_LUT4_I2_O_SB_LUT4_O": { - "hide_name": 0, - "type": "SB_LUT4", - "parameters": { - "LUT_INIT": "0000000000001111" - }, - "attributes": { - "module_not_derived": "00000000000000000000000000000001", - "src": "/usr/local/bin/../share/yosys/ice40/cells_map.v:17.34-18.52" - }, - "port_directions": { - "I0": "input", - "I1": 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"spi_if_ins.spi.r3_rx_done_SB_DFF_Q": { @@ -22519,9 +22549,9 @@ "Q": "output" }, "connections": { - "C": [ 60 ], - "D": [ 620 ], - "Q": [ 621 ] + "C": [ 58 ], + "D": [ 622 ], + "Q": [ 623 ] } }, "spi_if_ins.spi.r3_rx_done_SB_LUT4_I2": { @@ -22544,9 +22574,9 @@ "connections": { "I0": [ "0" ], "I1": [ "0" ], - "I2": [ 621 ], - "I3": [ 620 ], - "O": [ 610 ] + "I2": [ 623 ], + "I3": [ 622 ], + "O": [ 596 ] } }, "spi_if_ins.spi.r_rx_bit_count_SB_DFFESR_Q": { @@ -22566,10 +22596,10 @@ "R": "input" }, "connections": { - "C": [ 60 ], - "D": [ 622 ], - "E": [ 59 ], - "Q": [ 56 ], + "C": [ 58 ], + "D": [ 624 ], + "E": [ 590 ], + "Q": [ 55 ], "R": [ 44 ] } }, @@ -22590,10 +22620,10 @@ "R": "input" }, "connections": { - "C": [ 60 ], - "D": [ 623 ], - "E": [ 59 ], - "Q": [ 57 ], + "C": [ 58 ], + "D": [ 625 ], + "E": [ 590 ], + "Q": [ 56 ], "R": [ 44 ] } }, @@ -22614,10 +22644,10 @@ "R": "input" }, "connections": { - "C": [ 60 ], - "D": [ 624 ], - "E": [ 59 ], - "Q": [ 55 ], + "C": [ 58 ], + "D": [ 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], + "D": [ 633 ], + "E": [ 629 ], + "Q": [ 600 ] } }, "spi_if_ins.spi.r_rx_byte_SB_DFFE_Q_5": { @@ -22843,10 +22873,10 @@ "Q": "output" }, "connections": { - "C": [ 60 ], - "D": [ 632 ], - "E": [ 627 ], - "Q": [ 615 ] + "C": [ 58 ], + "D": [ 634 ], + "E": [ 629 ], + "Q": [ 601 ] } }, "spi_if_ins.spi.r_rx_byte_SB_DFFE_Q_6": { @@ -22865,10 +22895,10 @@ "Q": "output" }, "connections": { - "C": [ 60 ], - "D": [ 633 ], - "E": [ 627 ], - "Q": [ 616 ] + "C": [ 58 ], + "D": [ 635 ], + "E": [ 629 ], + "Q": [ 602 ] } }, "spi_if_ins.spi.r_rx_byte_SB_DFFE_Q_7": { @@ -22887,10 +22917,10 @@ "Q": "output" }, "connections": { - "C": [ 60 ], + "C": [ 58 ], "D": [ 42 ], - "E": [ 627 ], - "Q": [ 617 ] + "E": [ 629 ], + "Q": [ 603 ] } }, "spi_if_ins.spi.r_rx_byte_SB_DFFE_Q_E_SB_LUT4_O": { @@ -22913,9 +22943,9 @@ "connections": { "I0": [ "0" ], "I1": [ "0" ], - "I2": [ 58 ], - "I3": [ 54 ], - "O": [ 627 ] + "I2": [ 57 ], + "I3": [ 53 ], + "O": [ 629 ] } }, "spi_if_ins.spi.r_rx_done_SB_DFFESR_Q": { @@ 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] + "C": [ 58 ], + "D": [ 632 ], + "E": [ 53 ], + "Q": [ 631 ] } }, "spi_if_ins.spi.r_temp_rx_byte_SB_DFFE_Q_3": { @@ -23049,10 +23079,10 @@ "Q": "output" }, "connections": { - "C": [ 60 ], - "D": [ 631 ], - "E": [ 54 ], - "Q": [ 630 ] + "C": [ 58 ], + "D": [ 633 ], + "E": [ 53 ], + "Q": [ 632 ] } }, "spi_if_ins.spi.r_temp_rx_byte_SB_DFFE_Q_4": { @@ -23071,10 +23101,10 @@ "Q": "output" }, "connections": { - "C": [ 60 ], - "D": [ 632 ], - "E": [ 54 ], - "Q": [ 631 ] + "C": [ 58 ], + "D": [ 634 ], + "E": [ 53 ], + "Q": [ 633 ] } }, "spi_if_ins.spi.r_temp_rx_byte_SB_DFFE_Q_5": { @@ -23093,10 +23123,10 @@ "Q": "output" }, "connections": { - "C": [ 60 ], - "D": [ 633 ], - "E": [ 54 ], - "Q": [ 632 ] + "C": [ 58 ], + "D": [ 635 ], + "E": [ 53 ], + "Q": [ 634 ] } }, "spi_if_ins.spi.r_temp_rx_byte_SB_DFFE_Q_6": { @@ -23115,10 +23145,10 @@ "Q": "output" }, "connections": { - "C": [ 60 ], + "C": [ 58 ], "D": [ 42 ], - "E": [ 54 ], - "Q": [ 633 ] + "E": [ 53 ], + "Q": [ 635 ] } }, "spi_if_ins.spi.r_tx_bit_count_SB_DFFESR_Q": { @@ -23138,11 +23168,11 @@ "R": "input" }, "connections": { - "C": [ 60 ], - "D": [ 635 ], - "E": [ 588 ], - "Q": [ 597 ], - "R": [ 636 ] + "C": [ 58 ], + "D": [ 637 ], + "E": [ 591 ], + "Q": [ 612 ], + "R": [ 638 ] } }, "spi_if_ins.spi.r_tx_bit_count_SB_DFFESR_Q_D_SB_LUT4_O": { @@ -23164,10 +23194,10 @@ }, "connections": { "I0": [ "0" ], - "I1": [ 598 ], + "I1": [ 616 ], "I2": [ "1" ], - "I3": [ 637 ], - "O": [ 638 ] + "I3": [ 639 ], + "O": [ 640 ] } }, "spi_if_ins.spi.r_tx_bit_count_SB_DFFESR_Q_D_SB_LUT4_O_1": { @@ -23189,10 +23219,10 @@ }, "connections": { "I0": [ "0" ], - "I1": [ 592 ], + "I1": [ 609 ], "I2": [ "1" ], - "I3": [ 597 ], - "O": [ 639 ] + "I3": [ 612 ], + "O": [ 641 ] } }, "spi_if_ins.spi.r_tx_bit_count_SB_DFFESR_Q_D_SB_LUT4_O_2": { @@ -23216,8 +23246,8 @@ "I0": [ "0" ], "I1": [ "0" ], "I2": [ "0" ], - "I3": [ 597 ], - "O": [ 635 ] + "I3": [ 612 ], + "O": [ 637 ] } }, "spi_if_ins.spi.r_tx_bit_count_SB_DFFESR_Q_D_SB_LUT4_O_I3_SB_CARRY_CO": { @@ -23235,9 +23265,9 @@ "I1": "input" }, "connections": { - "CI": [ 597 ], - "CO": [ 637 ], - "I0": [ 592 ], + "CI": [ 612 ], + "CO": [ 639 ], + "I0": [ 609 ], "I1": [ "1" ] } }, @@ -23262,8 +23292,8 @@ "I0": [ "0" ], "I1": [ "0" ], "I2": [ "0" ], - "I3": [ 589 ], - "O": [ 636 ] + "I3": [ 592 ], + "O": [ 638 ] } }, "spi_if_ins.spi.r_tx_bit_count_SB_DFFESS_Q": { @@ -23283,11 +23313,11 @@ "S": "input" }, "connections": { - "C": [ 60 ], - "D": [ 638 ], - "E": [ 588 ], - "Q": [ 598 ], - "S": [ 636 ] + "C": [ 58 ], + "D": [ 640 ], + "E": [ 591 ], + "Q": [ 616 ], + "S": [ 638 ] } }, "spi_if_ins.spi.r_tx_bit_count_SB_DFFESS_Q_1": { @@ -23307,11 +23337,11 @@ "S": "input" }, "connections": { - "C": [ 60 ], - "D": [ 639 ], - "E": [ 588 ], - "Q": [ 592 ], - "S": [ 636 ] + "C": [ 58 ], + "D": [ 641 ], + "E": [ 591 ], + "Q": [ 609 ], + "S": [ 638 ] } }, "spi_if_ins.spi.r_tx_byte_SB_DFFESR_Q": { @@ -23331,11 +23361,11 @@ "R": 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"spi_if_ins.spi.r_tx_byte_SB_DFFESR_Q_4": { @@ -23427,11 +23457,11 @@ "R": "input" }, "connections": { - "C": [ 60 ], - "D": [ 581 ], - "E": [ 640 ], - "Q": [ 599 ], - "R": [ 589 ] + "C": [ 58 ], + "D": [ 583 ], + "E": [ 642 ], + "Q": [ 617 ], + "R": [ 592 ] } }, "spi_if_ins.spi.r_tx_byte_SB_DFFESR_Q_5": { @@ -23451,11 +23481,11 @@ "R": "input" }, "connections": { - "C": [ 60 ], - "D": [ 582 ], - "E": [ 640 ], - "Q": [ 595 ], - "R": [ 589 ] + "C": [ 58 ], + "D": [ 584 ], + "E": [ 642 ], + "Q": [ 614 ], + "R": [ 592 ] } }, "spi_if_ins.spi.r_tx_byte_SB_DFFESR_Q_6": { @@ -23475,11 +23505,11 @@ "R": "input" }, "connections": { - "C": [ 60 ], - "D": [ 583 ], - "E": [ 640 ], - "Q": [ 603 ], - "R": [ 589 ] + "C": [ 58 ], + "D": [ 585 ], + "E": [ 642 ], + "Q": [ 619 ], + "R": [ 592 ] } }, "spi_if_ins.spi.r_tx_byte_SB_DFFESR_Q_7": { @@ -23499,11 +23529,11 @@ "R": "input" }, "connections": { - "C": [ 60 ], - "D": [ 584 ], - "E": [ 640 ], - "Q": [ 605 ], - "R": [ 589 ] + "C": [ 58 ], + "D": [ 586 ], + "E": [ 642 ], + "Q": [ 610 ], + "R": [ 592 ] } }, "spi_if_ins.spi.r_tx_byte_SB_DFFESR_Q_E_SB_LUT4_O": { @@ -23525,10 +23555,10 @@ }, "connections": { "I0": [ "0" ], - "I1": [ 592 ], - "I2": [ 641 ], - "I3": [ 589 ], - "O": [ 640 ] + "I1": [ 609 ], + "I2": [ 643 ], + "I3": [ 592 ], + "O": [ 642 ] } }, "spi_if_ins.spi.r_tx_byte_SB_DFFESR_Q_E_SB_LUT4_O_I2_SB_LUT4_O": { @@ -23549,11 +23579,11 @@ "O": "output" }, "connections": { - "I0": [ 52 ], - "I1": [ 597 ], - "I2": [ 598 ], - "I3": [ 53 ], - "O": [ 641 ] + "I0": [ 51 ], + "I1": [ 612 ], + "I2": [ 616 ], + "I3": [ 52 ], + "O": [ 643 ] } }, "spi_if_ins.state_if_SB_DFFESR_Q": { @@ -23573,11 +23603,11 @@ "R": "input" }, "connections": { - "C": [ 60 ], - "D": [ 642 ], - "E": [ 643 ], - "Q": [ 562 ], - "R": [ 567 ] + "C": [ 58 ], + "D": [ 644 ], + "E": [ 645 ], + "Q": [ 567 ], + "R": [ 571 ] } }, "spi_if_ins.state_if_SB_DFFESR_Q_1": { @@ -23597,18 +23627,18 @@ "R": "input" }, "connections": { - "C": [ 60 ], - "D": [ 574 ], - "E": [ 643 ], - "Q": [ 561 ], - "R": [ 564 ] + "C": [ 58 ], + "D": [ 576 ], + "E": [ 645 ], + "Q": [ 565 ], + "R": [ 566 ] } }, "spi_if_ins.state_if_SB_DFFESR_Q_D_SB_LUT4_O": { "hide_name": 0, "type": "SB_LUT4", "parameters": { - "LUT_INIT": "1111110000111111" + "LUT_INIT": "1100111111110011" }, "attributes": { "module_not_derived": "00000000000000000000000000000001", @@ -23623,35 +23653,10 @@ }, "connections": { "I0": [ "0" ], - "I1": [ 562 ], - "I2": [ 563 ], - "I3": [ 561 ], - "O": [ 642 ] - } - }, - "spi_if_ins.state_if_SB_DFFESR_Q_D_SB_LUT4_O_1": { - "hide_name": 0, - "type": "SB_LUT4", - "parameters": { - "LUT_INIT": "1111110011111111" - }, - "attributes": { - "module_not_derived": "00000000000000000000000000000001", - "src": "/usr/local/bin/../share/yosys/ice40/cells_map.v:22.34-23.52" - }, - "port_directions": { - "I0": "input", - "I1": "input", - "I2": "input", - "I3": "input", - "O": "output" - }, - "connections": { - "I0": [ "0" ], - "I1": [ 563 ], - "I2": [ 561 ], - "I3": [ 562 ], - "O": [ 574 ] + "I1": [ 565 ], + "I2": [ 567 ], + "I3": [ 568 ], + "O": [ 644 ] } }, "spi_if_ins.state_if_SB_DFFESR_Q_R_SB_LUT4_O": { @@ -23675,8 +23680,8 @@ "I0": [ "0" ], "I1": [ "0" ], "I2": [ "0" ], - "I3": [ 564 ], - "O": [ 567 ] + "I3": [ 566 ], + "O": [ 571 ] } }, "spi_if_ins.state_if_SB_DFFE_Q": { @@ -23695,10 +23700,10 @@ "Q": "output" }, "connections": { - "C": [ 60 ], - "D": [ 644 ], - "E": [ 643 ], - "Q": [ 563 ] + "C": [ 58 ], + "D": [ 646 ], + "E": [ 645 ], + "Q": [ 568 ] } }, "spi_if_ins.state_if_SB_DFFE_Q_D_SB_LUT4_O": { @@ -23719,11 +23724,11 @@ "O": "output" }, "connections": { - "I0": [ 642 ], - "I1": [ 554 ], - "I2": [ 574 ], - "I3": [ 564 ], - "O": [ 644 ] + "I0": [ 644 ], + "I1": [ 558 ], + "I2": [ 576 ], + "I3": [ 566 ], + "O": [ 646 ] } }, "spi_if_ins.state_if_SB_DFFE_Q_E_SB_LUT4_O": { @@ -23744,11 +23749,11 @@ "O": "output" }, "connections": { - "I0": [ 561 ], - "I1": [ 564 ], - "I2": [ 562 ], - "I3": [ 563 ], - "O": [ 643 ] + "I0": [ 565 ], + "I1": [ 566 ], + "I2": [ 567 ], + "I3": [ 568 ], + "O": [ 645 ] } }, "sys_clk_buffer": { @@ -23765,8 +23770,8 @@ "USER_SIGNAL_TO_GLOBAL_BUFFER": "input" }, "connections": { - "GLOBAL_BUFFER_OUTPUT": [ 60 ], - "USER_SIGNAL_TO_GLOBAL_BUFFER": [ 396 ] + "GLOBAL_BUFFER_OUTPUT": [ 58 ], + "USER_SIGNAL_TO_GLOBAL_BUFFER": [ 397 ] } }, "sys_ctrl_ins.i_cs_SB_DFFE_Q": { @@ -23785,10 +23790,10 @@ "Q": "output" }, "connections": { - "C": [ 60 ], - "D": [ 75 ], - "E": [ 73 ], - "Q": [ 532 ] + "C": [ 58 ], + "D": [ 71 ], + "E": [ 69 ], + "Q": [ 536 ] } }, "sys_ctrl_ins.o_data_out_SB_DFFE_Q": { @@ -23807,10 +23812,35 @@ "Q": "output" }, "connections": { - "C": [ 60 ], - "D": [ 87 ], - "E": [ 645 ], - "Q": [ 646 ] + "C": [ 58 ], + "D": [ 120 ], + "E": [ 647 ], + "Q": [ 648 ] + } + }, + "sys_ctrl_ins.o_data_out_SB_DFFE_Q_D_SB_LUT4_O": { + "hide_name": 0, + "type": "SB_LUT4", + "parameters": { + "LUT_INIT": "1111000000000000" + }, + "attributes": { + "module_not_derived": "00000000000000000000000000000001", + "src": "/usr/local/bin/../share/yosys/ice40/cells_map.v:17.34-18.52" + }, + "port_directions": { + "I0": "input", + "I1": "input", + "I2": "input", + "I3": "input", + "O": "output" + }, + "connections": { + "I0": [ "0" ], + "I1": [ "0" ], + "I2": [ 79 ], + "I3": [ 78 ], + "O": [ 159 ] } }, "sys_ctrl_ins.o_data_out_SB_DFFE_Q_E_SB_LUT4_O": { @@ -23832,17 +23862,17 @@ }, "connections": { "I0": [ "0" ], - "I1": [ 85 ], - "I2": [ 532 ], - "I3": [ 528 ], - "O": [ 645 ] + "I1": [ 115 ], + "I2": [ 536 ], + "I3": [ 532 ], + "O": [ 647 ] } }, - "sys_ctrl_ins.o_data_out_SB_DFFE_Q_E_SB_LUT4_O_I1_SB_LUT4_I2": { + "sys_ctrl_ins.o_data_out_SB_DFFE_Q_E_SB_LUT4_O_I1_SB_LUT4_I1": { "hide_name": 0, "type": "SB_LUT4", "parameters": { - "LUT_INIT": "0011000000000000" + "LUT_INIT": "0011111111111111" }, "attributes": { "module_not_derived": "00000000000000000000000000000001", @@ -23857,13 +23887,13 @@ }, "connections": { "I0": [ "0" ], - "I1": [ 82 ], - "I2": [ 85 ], - "I3": [ 86 ], - "O": [ 46 ] + "I1": [ 115 ], + "I2": [ 114 ], + "I3": [ 78 ], + "O": [ 120 ] } }, - "sys_ctrl_ins.o_data_out_SB_DFFE_Q_E_SB_LUT4_O_I1_SB_LUT4_I3": { + "sys_ctrl_ins.o_data_out_SB_DFFE_Q_E_SB_LUT4_O_I1_SB_LUT4_I2": { "hide_name": 0, "type": "SB_LUT4", "parameters": { @@ -23882,10 +23912,35 @@ }, "connections": { "I0": [ "0" ], - "I1": [ 86 ], - "I2": [ 82 ], - "I3": [ 85 ], - "O": [ 77 ] + "I1": [ 114 ], + "I2": [ 115 ], + "I3": [ 78 ], + "O": [ 73 ] + } + }, + "sys_ctrl_ins.o_data_out_SB_DFFE_Q_E_SB_LUT4_O_I1_SB_LUT4_I3": { + "hide_name": 0, + "type": "SB_LUT4", + "parameters": { + "LUT_INIT": "0011000000000000" + }, + "attributes": { + "module_not_derived": "00000000000000000000000000000001", + "src": "/usr/local/bin/../share/yosys/ice40/cells_map.v:22.34-23.52" + }, + "port_directions": { + "I0": "input", + "I1": "input", + "I2": "input", + "I3": "input", + "O": "output" + }, + "connections": { + "I0": [ "0" ], + "I1": [ 78 ], + "I2": [ 114 ], + "I3": [ 115 ], + "O": [ 46 ] } }, "sys_ctrl_ins.o_data_out_SB_DFFE_Q_E_SB_LUT4_O_I1_SB_LUT4_O": { @@ -23910,7 +23965,7 @@ "I1": [ 167 ], "I2": [ 165 ], "I3": [ 166 ], - "O": [ 85 ] + "O": [ 115 ] } }, "sys_ctrl_ins.o_data_out_SB_LUT4_I0": { @@ -23931,11 +23986,11 @@ "O": "output" }, "connections": { - "I0": [ 646 ], - "I1": [ 400 ], - "I2": [ 531 ], - "I3": [ 530 ], - "O": [ 414 ] + "I0": [ 648 ], + "I1": [ 401 ], + "I2": [ 535 ], + "I3": [ 534 ], + "O": [ 415 ] } }, "sys_ctrl_ins.o_soft_reset_SB_DFFESS_Q": { @@ -23955,11 +24010,11 @@ "S": "input" }, "connections": { - "C": [ 60 ], + "C": [ 58 ], "D": [ "0" ], - "E": [ 647 ], - "Q": [ 49 ], - "S": [ 648 ] + "E": [ 649 ], + "Q": [ 48 ], + "S": [ 650 ] } }, "sys_ctrl_ins.o_soft_reset_SB_DFFESS_Q_E_SB_LUT4_O": { @@ -23983,8 +24038,8 @@ "I0": [ "0" ], "I1": [ "0" ], "I2": [ "0" ], - "I3": [ 649 ], - "O": [ 647 ] + "I3": [ 651 ], + "O": [ 649 ] } }, "sys_ctrl_ins.o_soft_reset_SB_DFFESS_Q_S_SB_LUT4_O": { @@ -24005,11 +24060,11 @@ "O": "output" }, "connections": { - "I0": [ 650 ], - "I1": [ 651 ], - "I2": [ 652 ], - "I3": [ 653 ], - "O": [ 648 ] + "I0": [ 652 ], + "I1": [ 653 ], + "I2": [ 654 ], + "I3": [ 655 ], + "O": [ 650 ] } }, "sys_ctrl_ins.reset_cmd_SB_DFFESR_Q": { @@ -24029,11 +24084,11 @@ "R": "input" }, "connections": { - "C": [ 60 ], + "C": [ 58 ], "D": [ "1" ], - "E": [ 654 ], - "Q": [ 649 ], - "R": [ 655 ] + "E": [ 656 ], + "Q": [ 651 ], + "R": [ 657 ] } }, "sys_ctrl_ins.reset_cmd_SB_DFFESR_Q_E_SB_LUT4_O": { @@ -24054,11 +24109,11 @@ "O": "output" }, "connections": { - "I0": [ 528 ], - "I1": [ 573 ], - "I2": [ 108 ], - "I3": [ 532 ], - "O": [ 654 ] + "I0": [ 532 ], + "I1": [ 575 ], + "I2": [ 101 ], + "I3": [ 536 ], + "O": [ 656 ] } }, "sys_ctrl_ins.reset_cmd_SB_DFFESR_Q_R_SB_LUT4_O": { @@ -24082,8 +24137,33 @@ "I0": [ "0" ], "I1": [ "0" ], "I2": [ "0" ], - "I3": [ 532 ], - "O": [ 655 ] + "I3": [ 536 ], + "O": [ 657 ] + } + }, + "sys_ctrl_ins.reset_cmd_SB_LUT4_I3": { + "hide_name": 0, + "type": "SB_LUT4", + "parameters": { + "LUT_INIT": "1111111111110000" + }, + "attributes": { + "module_not_derived": "00000000000000000000000000000001", + "src": "/usr/local/bin/../share/yosys/ice40/cells_map.v:17.34-18.52" + }, + "port_directions": { + "I0": "input", + "I1": "input", + "I2": "input", + "I3": "input", + "O": "output" + }, + "connections": { + "I0": [ "0" ], + "I1": [ "0" ], + "I2": [ 650 ], + "I3": [ 651 ], + "O": [ 658 ] } }, "sys_ctrl_ins.reset_count_SB_DFFESR_Q": { @@ -24103,11 +24183,11 @@ "R": "input" }, "connections": { - "C": [ 60 ], - "D": [ 656 ], - "E": [ 657 ], - "Q": [ 651 ], - "R": [ 649 ] + "C": [ 58 ], + "D": [ 659 ], + "E": [ 658 ], + "Q": [ 652 ], + "R": [ 651 ] } }, "sys_ctrl_ins.reset_count_SB_DFFESR_Q_1": { @@ -24127,11 +24207,11 @@ "R": "input" }, "connections": { - "C": [ 60 ], - "D": [ 658 ], - "E": [ 657 ], - "Q": [ 652 ], - "R": [ 649 ] + "C": [ 58 ], + "D": [ 660 ], + "E": [ 658 ], + "Q": [ 654 ], + "R": [ 651 ] } }, "sys_ctrl_ins.reset_count_SB_DFFESR_Q_1_D_SB_LUT4_O": { @@ -24152,11 +24232,11 @@ "O": "output" }, "connections": { - "I0": [ 648 ], + "I0": [ 650 ], "I1": [ "0" ], - "I2": [ 652 ], - "I3": [ 659 ], - "O": [ 658 ] + "I2": [ 654 ], + "I3": [ 661 ], + "O": [ 660 ] } }, "sys_ctrl_ins.reset_count_SB_DFFESR_Q_2": { @@ -24176,11 +24256,11 @@ "R": "input" }, "connections": { - "C": [ 60 ], - "D": [ 660 ], - "E": [ 657 ], - "Q": [ 650 ], - "R": [ 649 ] + "C": [ 58 ], + "D": [ 662 ], + "E": [ 658 ], + "Q": [ 653 ], + "R": [ 651 ] } }, "sys_ctrl_ins.reset_count_SB_DFFESR_Q_2_D_SB_LUT4_O": { @@ -24201,11 +24281,11 @@ "O": "output" }, "connections": { - "I0": [ 648 ], + "I0": [ 650 ], "I1": [ "0" ], - "I2": [ 650 ], - "I3": [ 653 ], - "O": [ 660 ] + "I2": [ 653 ], + "I3": [ 655 ], + "O": [ 662 ] } }, "sys_ctrl_ins.reset_count_SB_DFFESR_Q_3": { @@ -24225,11 +24305,11 @@ "R": "input" }, "connections": { - "C": [ 60 ], - "D": [ 661 ], - "E": [ 657 ], - "Q": [ 653 ], - "R": [ 649 ] + "C": [ 58 ], + "D": [ 663 ], + "E": [ 658 ], + "Q": [ 655 ], + "R": [ 651 ] } }, "sys_ctrl_ins.reset_count_SB_DFFESR_Q_3_D_SB_LUT4_O": { @@ -24253,8 +24333,8 @@ "I0": [ "0" ], "I1": [ "0" ], "I2": [ "0" ], - "I3": [ 653 ], - "O": [ 661 ] + "I3": [ 655 ], + "O": [ 663 ] } }, "sys_ctrl_ins.reset_count_SB_DFFESR_Q_D_SB_LUT4_O": { @@ -24275,11 +24355,11 @@ "O": "output" }, "connections": { - "I0": [ 648 ], + "I0": [ 650 ], "I1": [ "0" ], - "I2": [ 651 ], - "I3": [ 662 ], - "O": [ 656 ] + "I2": [ 652 ], + "I3": [ 664 ], + "O": [ 659 ] } }, "sys_ctrl_ins.reset_count_SB_DFFESR_Q_D_SB_LUT4_O_I3_SB_CARRY_CO": { @@ -24297,10 +24377,10 @@ "I1": "input" }, "connections": { - "CI": [ 659 ], - "CO": [ 662 ], + "CI": [ 661 ], + "CO": [ 664 ], "I0": [ "0" ], - "I1": [ 652 ] + "I1": [ 654 ] } }, "sys_ctrl_ins.reset_count_SB_DFFESR_Q_D_SB_LUT4_O_I3_SB_CARRY_CO_1": { @@ -24318,35 +24398,10 @@ "I1": "input" }, "connections": { - "CI": [ 653 ], - "CO": [ 659 ], + "CI": [ 655 ], + "CO": [ 661 ], "I0": [ "0" ], - "I1": [ 650 ] - } - }, - "sys_ctrl_ins.reset_count_SB_DFFESR_Q_E_SB_LUT4_O": { - "hide_name": 0, - "type": "SB_LUT4", - "parameters": { - "LUT_INIT": "1111111111110000" - }, - "attributes": { - "module_not_derived": "00000000000000000000000000000001", - "src": "/usr/local/bin/../share/yosys/ice40/cells_map.v:17.34-18.52" - }, - "port_directions": { - "I0": "input", - "I1": "input", - "I2": "input", - "I3": "input", - "O": "output" - }, - "connections": { - "I0": [ "0" ], - "I1": [ "0" ], - "I2": [ 648 ], - "I3": [ 649 ], - "O": [ 657 ] + "I1": [ 653 ] } } }, @@ -24360,7 +24415,7 @@ }, "i_button_SB_LUT4_I3_O": { "hide_name": 0, - "bits": [ 115, 108, 47, 116 ], + "bits": [ 111, 101, 47, 112 ], "attributes": { "force_downto": "00000000000000000000000000000001", "src": "/usr/local/bin/../share/yosys/ice40/cells_map.v:6.21-6.22" @@ -24424,7 +24479,7 @@ }, "i_smi_a1_SB_LUT4_I1_O": { "hide_name": 0, - "bits": [ 50 ], + "bits": [ 49 ], "attributes": { } }, @@ -24437,7 +24492,7 @@ }, "i_smi_a2_SB_LUT4_I0_O": { "hide_name": 0, - "bits": [ 51 ], + "bits": [ 50 ], "attributes": { } }, @@ -24471,7 +24526,7 @@ }, "i_ss_SB_LUT4_I1_O": { "hide_name": 0, - "bits": [ 58, 54 ], + "bits": [ 57, 53 ], "attributes": { "force_downto": "00000000000000000000000000000001", "src": "/usr/local/bin/../share/yosys/ice40/cells_map.v:6.21-6.22" @@ -24479,22 +24534,28 @@ }, "int_miso": { "hide_name": 0, - "bits": [ 393 ], + "bits": [ 394 ], "attributes": { "src": "top.v:110.9-110.17" } }, "io_ctrl_ins.debug_mode": { "hide_name": 0, - "bits": [ 65, 63 ], + "bits": [ 63, 61 ], "attributes": { "hdlname": "io_ctrl_ins debug_mode", "src": "top.v:128.12-156.5|io_ctrl.v:67.17-67.27" } }, + "io_ctrl_ins.debug_mode_SB_LUT4_I0_O": { + "hide_name": 0, + "bits": [ 66 ], + "attributes": { + } + }, "io_ctrl_ins.debug_mode_SB_LUT4_I2_O": { "hide_name": 0, - "bits": [ 71, 66, 155, 69 ], + "bits": [ 65, 133, 64, 67 ], "attributes": { "force_downto": "00000000000000000000000000000001", "src": "/usr/local/bin/../share/yosys/ice40/cells_map.v:6.21-6.22" @@ -24518,7 +24579,7 @@ }, "io_ctrl_ins.i_cs": { "hide_name": 0, - "bits": [ 74 ], + "bits": [ 70 ], "attributes": { "hdlname": "io_ctrl_ins i_cs", "src": "top.v:128.12-156.5|io_ctrl.v:9.29-9.33" @@ -24526,7 +24587,7 @@ }, "io_ctrl_ins.i_data_in": { "hide_name": 0, - "bits": [ 64, 61, 147, 146, 145, 143, 141, 138 ], + "bits": [ 62, 59, 147, 146, 145, 143, 141, 138 ], "attributes": { "hdlname": "io_ctrl_ins i_data_in", "src": "top.v:128.12-156.5|io_ctrl.v:7.29-7.38" @@ -24534,7 +24595,7 @@ }, "io_ctrl_ins.i_fetch_cmd": { "hide_name": 0, - "bits": [ 528 ], + "bits": [ 532 ], "attributes": { "hdlname": "io_ctrl_ins i_fetch_cmd", "src": "top.v:128.12-156.5|io_ctrl.v:10.29-10.40" @@ -24542,7 +24603,7 @@ }, "io_ctrl_ins.i_ioc": { "hide_name": 0, - "bits": [ 82, 86, 167, 166, 165 ], + "bits": [ 78, 114, 167, 166, 165 ], "attributes": { "hdlname": "io_ctrl_ins i_ioc", "src": "top.v:128.12-156.5|io_ctrl.v:6.29-6.34" @@ -24550,7 +24611,7 @@ }, "io_ctrl_ins.i_load_cmd": { "hide_name": 0, - "bits": [ 573 ], + "bits": [ 575 ], "attributes": { "hdlname": "io_ctrl_ins i_load_cmd", "src": "top.v:128.12-156.5|io_ctrl.v:11.29-11.39" @@ -24558,7 +24619,7 @@ }, "io_ctrl_ins.i_reset": { "hide_name": 0, - "bits": [ 49 ], + "bits": [ 48 ], "attributes": { "hdlname": "io_ctrl_ins i_reset", "src": "top.v:128.12-156.5|io_ctrl.v:3.29-3.36" @@ -24566,7 +24627,7 @@ }, "io_ctrl_ins.i_sys_clk": { "hide_name": 0, - "bits": [ 60 ], + "bits": [ 58 ], "attributes": { "hdlname": "io_ctrl_ins i_sys_clk", "src": "top.v:128.12-156.5|io_ctrl.v:4.29-4.38" @@ -24582,7 +24643,7 @@ }, "io_ctrl_ins.led0_state_SB_LUT4_I3_O": { "hide_name": 0, - "bits": [ 137, 87, 98, 78 ], + "bits": [ 136, 120, 91, 74 ], "attributes": { "force_downto": "00000000000000000000000000000001", "src": "/usr/local/bin/../share/yosys/ice40/cells_map.v:6.21-6.22" @@ -24598,13 +24659,13 @@ }, "io_ctrl_ins.led1_state_SB_DFFESR_Q_E": { "hide_name": 0, - "bits": [ 76 ], + "bits": [ 72 ], "attributes": { } }, "io_ctrl_ins.led1_state_SB_LUT4_I3_O": { "hide_name": 0, - "bits": [ 121, 87, 84, 80 ], + "bits": [ 119, 120, 80, 76 ], "attributes": { "force_downto": "00000000000000000000000000000001", "src": "/usr/local/bin/../share/yosys/ice40/cells_map.v:6.21-6.22" @@ -24620,7 +24681,7 @@ }, "io_ctrl_ins.lna_rx_shutdown_state_SB_DFFE_Q_D": { "hide_name": 0, - "bits": [ 88 ], + "bits": [ 81 ], "attributes": { "src": "top.v:128.12-156.5|io_ctrl.v:207.5-302.8" } @@ -24635,14 +24696,14 @@ }, "io_ctrl_ins.lna_tx_shutdown_state_SB_DFFE_Q_D": { "hide_name": 0, - "bits": [ 90 ], + "bits": [ 83 ], "attributes": { "src": "top.v:128.12-156.5|io_ctrl.v:207.5-302.8" } }, "io_ctrl_ins.mixer_en_state": { "hide_name": 0, - "bits": [ 95 ], + "bits": [ 88 ], "attributes": { "hdlname": "io_ctrl_ins mixer_en_state", "src": "top.v:128.12-156.5|io_ctrl.v:76.17-76.31" @@ -24650,14 +24711,14 @@ }, "io_ctrl_ins.mixer_en_state_SB_DFFE_Q_D": { "hide_name": 0, - "bits": [ 94 ], + "bits": [ 87 ], "attributes": { "src": "top.v:128.12-156.5|io_ctrl.v:207.5-302.8" } }, "io_ctrl_ins.o_data_out": { "hide_name": 0, - "bits": [ 136, 119, 101, 123, 128, 105, 112, 114 ], + "bits": [ 135, 117, 94, 122, 127, 98, 105, 110 ], "attributes": { "hdlname": "io_ctrl_ins o_data_out", "src": "top.v:128.12-156.5|io_ctrl.v:8.29-8.39" @@ -24665,7 +24726,7 @@ }, "io_ctrl_ins.o_data_out_SB_DFFESR_Q_1_D": { "hide_name": 0, - "bits": [ 103 ], + "bits": [ 96 ], "attributes": { "force_downto": "00000000000000000000000000000001", "src": "top.v:128.12-156.5|io_ctrl.v:122.21-161.28|io_ctrl.v:0.0-0.0|/usr/local/bin/../share/yosys/techmap.v:578.19-578.22" @@ -24673,7 +24734,7 @@ }, "io_ctrl_ins.o_data_out_SB_DFFESR_Q_2_D": { "hide_name": 0, - "bits": [ 111 ], + "bits": [ 104 ], "attributes": { "force_downto": "00000000000000000000000000000001", "src": "top.v:128.12-156.5|io_ctrl.v:122.21-161.28|io_ctrl.v:0.0-0.0|/usr/local/bin/../share/yosys/techmap.v:578.19-578.22" @@ -24681,7 +24742,7 @@ }, "io_ctrl_ins.o_data_out_SB_DFFESR_Q_3_D": { "hide_name": 0, - "bits": [ 113 ], + "bits": [ 109 ], "attributes": { "force_downto": "00000000000000000000000000000001", "src": "top.v:128.12-156.5|io_ctrl.v:122.21-161.28|io_ctrl.v:0.0-0.0|/usr/local/bin/../share/yosys/techmap.v:578.19-578.22" @@ -24689,13 +24750,13 @@ }, "io_ctrl_ins.o_data_out_SB_DFFESR_Q_3_E": { "hide_name": 0, - "bits": [ 104 ], + "bits": [ 97 ], "attributes": { } }, "io_ctrl_ins.o_data_out_SB_DFFESR_Q_3_R": { "hide_name": 0, - "bits": [ 77, 106 ], + "bits": [ 73, 99 ], "attributes": { "force_downto": "00000000000000000000000000000001", "src": "/usr/local/bin/../share/yosys/ice40/cells_map.v:6.21-6.22" @@ -24703,7 +24764,7 @@ }, "io_ctrl_ins.o_data_out_SB_DFFESR_Q_4_D": { "hide_name": 0, - "bits": [ 118 ], + "bits": [ 116 ], "attributes": { "force_downto": "00000000000000000000000000000001", "src": "top.v:128.12-156.5|io_ctrl.v:122.21-161.28|io_ctrl.v:0.0-0.0|/usr/local/bin/../share/yosys/techmap.v:578.19-578.22" @@ -24711,7 +24772,7 @@ }, "io_ctrl_ins.o_data_out_SB_DFFESR_Q_5_D": { "hide_name": 0, - "bits": [ 122 ], + "bits": [ 121 ], "attributes": { "force_downto": "00000000000000000000000000000001", "src": "top.v:128.12-156.5|io_ctrl.v:122.21-161.28|io_ctrl.v:0.0-0.0|/usr/local/bin/../share/yosys/techmap.v:578.19-578.22" @@ -24719,7 +24780,7 @@ }, "io_ctrl_ins.o_data_out_SB_DFFESR_Q_6_D": { "hide_name": 0, - "bits": [ 127 ], + "bits": [ 126 ], "attributes": { "force_downto": "00000000000000000000000000000001", "src": "top.v:128.12-156.5|io_ctrl.v:122.21-161.28|io_ctrl.v:0.0-0.0|/usr/local/bin/../share/yosys/techmap.v:578.19-578.22" @@ -24727,7 +24788,7 @@ }, "io_ctrl_ins.o_data_out_SB_DFFESR_Q_D": { "hide_name": 0, - "bits": [ 99 ], + "bits": [ 92 ], "attributes": { "force_downto": "00000000000000000000000000000001", "src": "top.v:128.12-156.5|io_ctrl.v:122.21-161.28|io_ctrl.v:0.0-0.0|/usr/local/bin/../share/yosys/techmap.v:578.19-578.22" @@ -24735,7 +24796,7 @@ }, "io_ctrl_ins.o_data_out_SB_DFFESR_Q_D_SB_LUT4_O_I2": { "hide_name": 0, - "bits": [ 132, 93 ], + "bits": [ 131, 120, 132, 86 ], "attributes": { "force_downto": "00000000000000000000000000000001", "src": "/usr/local/bin/../share/yosys/ice40/cells_map.v:6.21-6.22" @@ -24743,27 +24804,35 @@ }, "io_ctrl_ins.o_data_out_SB_DFFESR_Q_E": { "hide_name": 0, - "bits": [ 100 ], + "bits": [ 93 ], "attributes": { } }, "io_ctrl_ins.o_data_out_SB_DFFESR_Q_R": { "hide_name": 0, - "bits": [ 102 ], + "bits": [ 95 ], "attributes": { } }, "io_ctrl_ins.o_data_out_SB_DFFESS_Q_D": { "hide_name": 0, - "bits": [ 135 ], + "bits": [ 134 ], "attributes": { "force_downto": "00000000000000000000000000000001", "src": "top.v:128.12-156.5|io_ctrl.v:122.21-161.28|io_ctrl.v:0.0-0.0|/usr/local/bin/../share/yosys/techmap.v:578.19-578.22" } }, + "io_ctrl_ins.o_data_out_SB_DFFESS_Q_E": { + "hide_name": 0, + "bits": [ 78, 114, 113 ], + "attributes": { + "force_downto": "00000000000000000000000000000001", + "src": "/usr/local/bin/../share/yosys/ice40/cells_map.v:6.21-6.22" + } + }, "io_ctrl_ins.o_data_out_SB_DFFESS_Q_S": { "hide_name": 0, - "bits": [ 120 ], + "bits": [ 118 ], "attributes": { } }, @@ -24801,7 +24870,7 @@ }, "io_ctrl_ins.o_pmod": { "hide_name": 0, - "bits": [ 97, 81, 134, 151, 150, 107, 149, 115 ], + "bits": [ 90, 77, 85, 150, 149, 100, 106, 111 ], "attributes": { "hdlname": "io_ctrl_ins o_pmod", "src": "top.v:128.12-156.5|io_ctrl.v:18.29-18.35" @@ -24865,7 +24934,7 @@ }, "io_ctrl_ins.pmod_dir_state": { "hide_name": 0, - "bits": [ 137, 121, 133, 124, 129, 144, 142, 140 ], + "bits": [ 136, 119, 131, 123, 128, 144, 142, 140 ], "attributes": { "hdlname": "io_ctrl_ins pmod_dir_state", "src": "top.v:128.12-156.5|io_ctrl.v:73.17-73.31" @@ -24873,7 +24942,7 @@ }, "io_ctrl_ins.pmod_state": { "hide_name": 0, - "bits": [ 97, 81, 134, 151, 150, 107, 149, 115 ], + "bits": [ 90, 77, 85, 150, 149, 100, 106, 111 ], "attributes": { "hdlname": "io_ctrl_ins pmod_state", "src": "top.v:128.12-156.5|io_ctrl.v:74.17-74.27" @@ -24881,7 +24950,7 @@ }, "io_ctrl_ins.rf_mode": { "hide_name": 0, - "bits": [ 70, 66, 67 ], + "bits": [ 133, 64, 65 ], "attributes": { "hdlname": "io_ctrl_ins rf_mode", "src": "top.v:128.12-156.5|io_ctrl.v:68.17-68.24" @@ -24889,7 +24958,7 @@ }, "io_ctrl_ins.rf_pin_state": { "hide_name": 0, - "bits": [ 96, 89, 91, 157, 156, 155, 154, 153 ], + "bits": [ 89, 82, 84, 156, 155, 154, 153, 152 ], "attributes": { "hdlname": "io_ctrl_ins rf_pin_state", "src": "top.v:128.12-156.5|io_ctrl.v:75.17-75.29" @@ -24905,14 +24974,14 @@ }, "io_ctrl_ins.rx_h_b_state_SB_DFFE_Q_D": { "hide_name": 0, - "bits": [ 158 ], + "bits": [ 157 ], "attributes": { "src": "top.v:128.12-156.5|io_ctrl.v:207.5-302.8" } }, - "io_ctrl_ins.rx_h_b_state_SB_LUT4_I0_I2": { + "io_ctrl_ins.rx_h_b_state_SB_LUT4_I3_O": { "hide_name": 0, - "bits": [ 4, 92, 48, 160 ], + "bits": [ 106, 101, 107, 108 ], "attributes": { "force_downto": "00000000000000000000000000000001", "src": "/usr/local/bin/../share/yosys/ice40/cells_map.v:6.21-6.22" @@ -24928,28 +24997,14 @@ }, "io_ctrl_ins.rx_h_state_SB_DFFE_Q_D": { "hide_name": 0, - "bits": [ 161 ], + "bits": [ 160 ], "attributes": { "src": "top.v:128.12-156.5|io_ctrl.v:207.5-302.8" } }, "io_ctrl_ins.rx_h_state_SB_DFFE_Q_D_SB_LUT4_O_I3": { "hide_name": 0, - "bits": [ 153, 69, 159 ], - "attributes": { - "force_downto": "00000000000000000000000000000001", - "src": "/usr/local/bin/../share/yosys/ice40/cells_map.v:6.21-6.22" - } - }, - "io_ctrl_ins.rx_h_state_SB_DFFE_Q_E": { - "hide_name": 0, - "bits": [ 68 ], - "attributes": { - } - }, - "io_ctrl_ins.rx_h_state_SB_LUT4_I3_I2": { - "hide_name": 0, - "bits": [ 87, 144, 92, 5 ], + "bits": [ 152, 67, 158 ], "attributes": { "force_downto": "00000000000000000000000000000001", "src": "/usr/local/bin/../share/yosys/ice40/cells_map.v:6.21-6.22" @@ -24965,14 +25020,14 @@ }, "io_ctrl_ins.tr_vc_1_b_state_SB_DFFE_Q_D": { "hide_name": 0, - "bits": [ 162 ], + "bits": [ 161 ], "attributes": { "src": "top.v:128.12-156.5|io_ctrl.v:207.5-302.8" } }, "io_ctrl_ins.tr_vc_1_b_state_SB_LUT4_I1_O": { "hide_name": 0, - "bits": [ 129, 87, 130, 131 ], + "bits": [ 128, 120, 129, 130 ], "attributes": { "force_downto": "00000000000000000000000000000001", "src": "/usr/local/bin/../share/yosys/ice40/cells_map.v:6.21-6.22" @@ -24993,9 +25048,17 @@ "src": "top.v:128.12-156.5|io_ctrl.v:207.5-302.8" } }, + "io_ctrl_ins.tr_vc_1_state_SB_DFFE_Q_D_SB_LUT4_O_I3": { + "hide_name": 0, + "bits": [ 67, 155, 162 ], + "attributes": { + "force_downto": "00000000000000000000000000000001", + "src": "/usr/local/bin/../share/yosys/ice40/cells_map.v:6.21-6.22" + } + }, "io_ctrl_ins.tr_vc_1_state_SB_LUT4_I3_O": { "hide_name": 0, - "bits": [ 107, 108, 109, 110 ], + "bits": [ 100, 101, 102, 103 ], "attributes": { "force_downto": "00000000000000000000000000000001", "src": "/usr/local/bin/../share/yosys/ice40/cells_map.v:6.21-6.22" @@ -25018,7 +25081,7 @@ }, "io_ctrl_ins.tr_vc_2_state_SB_LUT4_I1_I3": { "hide_name": 0, - "bits": [ 81, 8, 82, 83 ], + "bits": [ 78, 79 ], "attributes": { "force_downto": "00000000000000000000000000000001", "src": "/usr/local/bin/../share/yosys/ice40/cells_map.v:6.21-6.22" @@ -25026,7 +25089,7 @@ }, "io_ctrl_ins.tr_vc_2_state_SB_LUT4_I1_O": { "hide_name": 0, - "bits": [ 124, 87, 125, 126 ], + "bits": [ 123, 120, 124, 125 ], "attributes": { "force_downto": "00000000000000000000000000000001", "src": "/usr/local/bin/../share/yosys/ice40/cells_map.v:6.21-6.22" @@ -25039,13 +25102,7 @@ "src": "top.v:41.19-41.26" } }, - "io_pmod_SB_DFFNESR_Q_D": { - "hide_name": 0, - "bits": [ 168 ], - "attributes": { - } - }, - "io_pmod_SB_DFFNESR_Q_E": { + "io_pmod_SB_DFFE_Q_E": { "hide_name": 0, "bits": [ 169 ], "attributes": { @@ -25053,78 +25110,78 @@ }, "io_pmod_SB_DFFSR_Q_D": { "hide_name": 0, - "bits": [ 173 ], + "bits": [ 170 ], "attributes": { } }, - "io_pmod_SB_DFFSR_Q_D_SB_LUT4_O_I2": { + "io_pmod_SB_DFFSR_Q_D_SB_LUT4_O_I0": { "hide_name": 0, - "bits": [ 21, 174, 175 ], + "bits": [ 171, 172, 173, 174 ], "attributes": { "force_downto": "00000000000000000000000000000001", "src": "/usr/local/bin/../share/yosys/ice40/cells_map.v:6.21-6.22" } }, - "io_pmod_SB_DFFSR_Q_D_SB_LUT4_O_I2_SB_LUT4_O_1_I0": { + "io_pmod_SB_DFFSR_Q_D_SB_LUT4_O_I0_SB_LUT4_O_1_I2": { "hide_name": 0, - "bits": [ 180, 181, 182, 183 ], + "bits": [ 177, 178, 179, 180 ], "attributes": { "force_downto": "00000000000000000000000000000001", "src": "/usr/local/bin/../share/yosys/ice40/cells_map.v:6.21-6.22" } }, - "io_pmod_SB_DFFSR_Q_D_SB_LUT4_O_I2_SB_LUT4_O_1_I0_SB_LUT4_O_1_I0": { + "io_pmod_SB_DFFSR_Q_D_SB_LUT4_O_I0_SB_LUT4_O_2_I1": { "hide_name": 0, - "bits": [ 188, 189, 190, 187 ], + "bits": [ 187, 188, 189 ], "attributes": { "force_downto": "00000000000000000000000000000001", "src": "/usr/local/bin/../share/yosys/ice40/cells_map.v:6.21-6.22" } }, - "io_pmod_SB_DFFSR_Q_D_SB_LUT4_O_I2_SB_LUT4_O_1_I0_SB_LUT4_O_2_I0": { + "io_pmod_SB_DFFSR_Q_D_SB_LUT4_O_I0_SB_LUT4_O_2_I1_SB_LUT4_O_I2": { "hide_name": 0, - "bits": [ 193, 194, 195, 196 ], + "bits": [ 190, 191, 192, 193 ], "attributes": { "force_downto": "00000000000000000000000000000001", "src": "/usr/local/bin/../share/yosys/ice40/cells_map.v:6.21-6.22" } }, - "io_pmod_SB_DFFSR_Q_D_SB_LUT4_O_I2_SB_LUT4_O_1_I0_SB_LUT4_O_3_I3": { + "io_pmod_SB_DFFSR_Q_D_SB_LUT4_O_I0_SB_LUT4_O_I2": { "hide_name": 0, - "bits": [ 199, 200, 192, 201 ], + "bits": [ 175, 176 ], "attributes": { "force_downto": "00000000000000000000000000000001", "src": "/usr/local/bin/../share/yosys/ice40/cells_map.v:6.21-6.22" } }, - "io_pmod_SB_DFFSR_Q_D_SB_LUT4_O_I2_SB_LUT4_O_1_I0_SB_LUT4_O_I2": { + "io_pmod_SB_DFFSR_Q_D_SB_LUT4_O_I0_SB_LUT4_O_I2_SB_LUT4_O_1_I2": { "hide_name": 0, - "bits": [ 663, 195, 200, 192, 189, 187, 186 ], + "bits": [ 190, 193, 201, 191 ], "attributes": { "force_downto": "00000000000000000000000000000001", - "src": "top.v:275.17-286.5|complex_fifo.v:57.23-57.34|/usr/local/bin/../share/yosys/ice40/arith_map.v:33.26-33.27", + "src": "/usr/local/bin/../share/yosys/ice40/cells_map.v:6.21-6.22" + } + }, + "io_pmod_SB_DFFSR_Q_D_SB_LUT4_O_I0_SB_LUT4_O_I2_SB_LUT4_O_I1": { + "hide_name": 0, + "bits": [ 665, 191, 193, 199, 194, 195, 204 ], + "attributes": { + "force_downto": "00000000000000000000000000000001", + "src": "top.v:277.17-288.5|complex_fifo.v:57.23-57.34|/usr/local/bin/../share/yosys/ice40/arith_map.v:33.26-33.27", "unused_bits": "0 " } }, - "io_pmod_SB_DFFSR_Q_D_SB_LUT4_O_I2_SB_LUT4_O_1_I0_SB_LUT4_O_I2_SB_LUT4_O_I3": { + "io_pmod_SB_DFFSR_Q_D_SB_LUT4_O_I0_SB_LUT4_O_I2_SB_LUT4_O_I1_SB_LUT4_O_I3": { "hide_name": 0, - "bits": [ "0", 196, 212, 210, 208, 206, 204 ], + "bits": [ "0", 197, 212, 210, 208, 206, 203 ], "attributes": { "force_downto": "00000000000000000000000000000001", - "src": "top.v:275.17-286.5|complex_fifo.v:57.23-57.34|/usr/local/bin/../share/yosys/ice40/arith_map.v:51.21-51.22" + "src": "top.v:277.17-288.5|complex_fifo.v:57.23-57.34|/usr/local/bin/../share/yosys/ice40/arith_map.v:51.21-51.22" } }, - "io_pmod_SB_DFFSR_Q_D_SB_LUT4_O_I2_SB_LUT4_O_I0": { + "io_pmod_SB_DFFSR_Q_D_SB_LUT4_O_I0_SB_LUT4_O_I2_SB_LUT4_O_I3": { "hide_name": 0, - "bits": [ 176, 177, 178, 179 ], - "attributes": { - "force_downto": "00000000000000000000000000000001", - "src": "/usr/local/bin/../share/yosys/ice40/cells_map.v:6.21-6.22" - } - }, - "io_pmod_SB_DFFSR_Q_D_SB_LUT4_O_I2_SB_LUT4_O_I0_SB_LUT4_O_I3": { - "hide_name": 0, - "bits": [ 190, 214, 215, 216 ], + "bits": [ 184, 199, 194, 200 ], "attributes": { "force_downto": "00000000000000000000000000000001", "src": "/usr/local/bin/../share/yosys/ice40/cells_map.v:6.21-6.22" @@ -25132,13 +25189,21 @@ }, "io_pmod_SB_DFFSS_Q_D": { "hide_name": 0, - "bits": [ 218 ], + "bits": [ 216 ], "attributes": { } }, "io_pmod_SB_DFFSS_Q_D_SB_LUT4_O_I0": { "hide_name": 0, - "bits": [ 219, 220, 221, 222 ], + "bits": [ 217, 218, 219, 220 ], + "attributes": { + "force_downto": "00000000000000000000000000000001", + "src": "/usr/local/bin/../share/yosys/ice40/cells_map.v:6.21-6.22" + } + }, + "io_pmod_SB_DFFSS_Q_D_SB_LUT4_O_I0_SB_LUT4_O_1_I0": { + "hide_name": 0, + "bits": [ 225, 226, 227, 228 ], "attributes": { "force_downto": "00000000000000000000000000000001", "src": "/usr/local/bin/../share/yosys/ice40/cells_map.v:6.21-6.22" @@ -25146,23 +25211,23 @@ }, "io_pmod_SB_DFFSS_Q_D_SB_LUT4_O_I0_SB_LUT4_O_I0": { "hide_name": 0, - "bits": [ 223, 224, 225, 226 ], + "bits": [ 221, 222, 223, 224 ], "attributes": { "force_downto": "00000000000000000000000000000001", "src": "/usr/local/bin/../share/yosys/ice40/cells_map.v:6.21-6.22" } }, - "io_pmod_SB_DFFSS_Q_D_SB_LUT4_O_I0_SB_LUT4_O_I0_SB_LUT4_O_3_I2": { + "io_pmod_SB_DFFSS_Q_D_SB_LUT4_O_I0_SB_LUT4_O_I0_SB_LUT4_O_1_I2": { "hide_name": 0, - "bits": [ 238, 237, 244, 239 ], + "bits": [ 241, 231, 242, 243 ], "attributes": { "force_downto": "00000000000000000000000000000001", "src": "/usr/local/bin/../share/yosys/ice40/cells_map.v:6.21-6.22" } }, - "io_pmod_SB_DFFSS_Q_D_SB_LUT4_O_I0_SB_LUT4_O_I0_SB_LUT4_O_I0": { + "io_pmod_SB_DFFSS_Q_D_SB_LUT4_O_I0_SB_LUT4_O_I0_SB_LUT4_O_2_I1": { "hide_name": 0, - "bits": [ 233, 234, 235, 236 ], + "bits": [ 241, 245, 23 ], "attributes": { "force_downto": "00000000000000000000000000000001", "src": "/usr/local/bin/../share/yosys/ice40/cells_map.v:6.21-6.22" @@ -25177,7 +25242,7 @@ }, "lvds_clock": { "hide_name": 0, - "bits": [ 261 ], + "bits": [ 18 ], "attributes": { "src": "top.v:192.9-192.19" } @@ -25194,15 +25259,15 @@ "bits": [ 18 ], "attributes": { "hdlname": "lvds_rx_09_inst i_ddr_clk", - "src": "top.v:260.12-270.5|lvds_rx.v:4.29-4.38" + "src": "top.v:262.12-272.5|lvds_rx.v:4.29-4.38" } }, "lvds_rx_09_inst.i_ddr_data": { "hide_name": 0, - "bits": [ 19, 20 ], + "bits": [ 20, 19 ], "attributes": { "hdlname": "lvds_rx_09_inst i_ddr_data", - "src": "top.v:260.12-270.5|lvds_rx.v:5.29-5.39" + "src": "top.v:262.12-272.5|lvds_rx.v:5.29-5.39" } }, "lvds_rx_09_inst.i_fifo_full": { @@ -25210,37 +25275,31 @@ "bits": [ 24 ], "attributes": { "hdlname": "lvds_rx_09_inst i_fifo_full", - "src": "top.v:260.12-270.5|lvds_rx.v:7.29-7.40" + "src": "top.v:262.12-272.5|lvds_rx.v:7.29-7.40" } }, "lvds_rx_09_inst.i_reset": { "hide_name": 0, - "bits": [ 49 ], + "bits": [ 48 ], "attributes": { "hdlname": "lvds_rx_09_inst i_reset", - "src": "top.v:260.12-270.5|lvds_rx.v:3.29-3.36" + "src": "top.v:262.12-272.5|lvds_rx.v:3.29-3.36" } }, "lvds_rx_09_inst.o_debug_state": { "hide_name": 0, - "bits": [ 170, 171 ], + "bits": [ 338, 364 ], "attributes": { "hdlname": "lvds_rx_09_inst o_debug_state", - "src": "top.v:260.12-270.5|lvds_rx.v:11.29-11.42" + "src": "top.v:262.12-272.5|lvds_rx.v:11.29-11.42" } }, "lvds_rx_09_inst.o_fifo_data": { "hide_name": 0, - "bits": [ 314, 312, 308, 306, 304, 302, 300, 298, 296, 294, 292, 290, 286, 284, 282, 280, 278, 276, 274, 272, 270, 268, 326, 324, 322, 320, 318, 316, 310, 288, 266, 264 ], + "bits": [ 310, 308, 304, 302, 300, 298, 296, 294, 292, 290, 288, 286, 282, 280, 278, 276, 274, 272, 270, 268, 266, 264, 322, 320, 318, 316, 314, 312, 306, 284, 262, 260 ], "attributes": { "hdlname": "lvds_rx_09_inst o_fifo_data", - "src": "top.v:260.12-270.5|lvds_rx.v:10.29-10.40" - } - }, - "lvds_rx_09_inst.o_fifo_data_SB_DFFNE_Q_E": { - "hide_name": 0, - "bits": [ 263 ], - "attributes": { + "src": "top.v:262.12-272.5|lvds_rx.v:10.29-10.40" } }, "lvds_rx_09_inst.o_fifo_push": { @@ -25248,7 +25307,7 @@ "bits": [ 21 ], "attributes": { "hdlname": "lvds_rx_09_inst o_fifo_push", - "src": "top.v:260.12-270.5|lvds_rx.v:9.29-9.40" + "src": "top.v:262.12-272.5|lvds_rx.v:9.29-9.40" } }, "lvds_rx_09_inst.o_fifo_write_clk": { @@ -25256,257 +25315,259 @@ "bits": [ 18 ], "attributes": { "hdlname": "lvds_rx_09_inst o_fifo_write_clk", - "src": "top.v:260.12-270.5|lvds_rx.v:8.29-8.45" + "src": "top.v:262.12-272.5|lvds_rx.v:8.29-8.45" } }, "lvds_rx_09_inst.r_cnt": { "hide_name": 0, - "bits": [ 335, 333, 331, 329 ], + "bits": [ 331, 329, 327, 325 ], "attributes": { "hdlname": "lvds_rx_09_inst r_cnt", - "src": "top.v:260.12-270.5|lvds_rx.v:29.17-29.22" + "src": "top.v:262.12-272.5|lvds_rx.v:29.17-29.22" } }, - "lvds_rx_09_inst.r_cnt_SB_DFFNESR_Q_D": { + "lvds_rx_09_inst.r_cnt_SB_DFFESR_Q_D": { "hide_name": 0, - "bits": [ 334, 332, 330, 327 ], + "bits": [ 330, 328, 326, 323 ], "attributes": { "force_downto": "00000000000000000000000000000001", - "src": "top.v:260.12-270.5|lvds_rx.v:93.34-93.43|/usr/local/bin/../share/yosys/ice40/arith_map.v:33.26-33.27" + "src": "top.v:262.12-272.5|lvds_rx.v:93.34-93.43|/usr/local/bin/../share/yosys/ice40/arith_map.v:33.26-33.27" } }, - "lvds_rx_09_inst.r_cnt_SB_DFFNESR_Q_D_SB_LUT4_O_I3": { + "lvds_rx_09_inst.r_cnt_SB_DFFESR_Q_D_SB_LUT4_O_2_I3": { "hide_name": 0, - "bits": [ "0", 335, 337, 336 ], + "bits": [ "0", 331, 333, 332 ], "attributes": { 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"bits": [ "0", "0", "0", "0", "0", "0", "0", "0", 665, "0", 665, "0", "0", 665, "0", 665, 666, 667, "0", "0", "0", "0", "0", "0", 668, 669, 670, 403, 405, 671, 409, 672 ], + "bits": [ "0", "0", "0", "0", "0", "0", "0", "0", 667, "0", 667, "0", "0", 667, "0", 667, 668, 669, "0", "0", "0", "0", "0", "0", 670, 671, 672, 404, 406, 673, 410, 674 ], "attributes": { "force_downto": "00000000000000000000000000000001", "src": "top.v:0.0-0.0|top.v:179.7-185.14|/usr/local/bin/../share/yosys/techmap.v:583.28-583.35", @@ -25820,7 +25883,7 @@ }, "r_tx_data_SB_DFFE_Q_D": { "hide_name": 0, - "bits": [ 414, 673, 674, 675, 676, 677, 678, 679 ], + "bits": [ 415, 675, 676, 677, 678, 679, 680, 681 ], "attributes": { "force_downto": "00000000000000000000000000000001", "src": "top.v:0.0-0.0|top.v:179.7-185.14|/usr/local/bin/../share/yosys/techmap.v:575.21-575.22", @@ -25832,7 +25895,7 @@ "bits": [ 23 ], "attributes": { "hdlname": "rx_09_fifo empty_o", - "src": "top.v:275.17-286.5|complex_fifo.v:17.17-17.24" + "src": "top.v:277.17-288.5|complex_fifo.v:17.17-17.24" } }, "rx_09_fifo.full_o": { @@ -25840,48 +25903,49 @@ "bits": [ 24 ], "attributes": { "hdlname": "rx_09_fifo full_o", - "src": "top.v:275.17-286.5|complex_fifo.v:16.17-16.23" + "src": "top.v:277.17-288.5|complex_fifo.v:16.17-16.23" } }, "rx_09_fifo.rd_addr": { "hide_name": 0, - "bits": [ 231, 242, 243, 248, 250, 246, 239, 240 ], + "bits": [ 248, 247, 245, 243, 230, 226, 228, 239 ], "attributes": { "hdlname": "rx_09_fifo rd_addr", - "src": "top.v:275.17-286.5|complex_fifo.v:24.22-24.29" + "src": "top.v:277.17-288.5|complex_fifo.v:24.22-24.29" } }, "rx_09_fifo.rd_addr_SB_DFFESR_Q_E": { "hide_name": 0, - "bits": [ 449 ], + "bits": [ 450 ], "attributes": { } }, "rx_09_fifo.rd_addr_gray": { "hide_name": 0, - "bits": [ 468, 467, 465, 463, 461, 459, 457, 240 ], + "bits": [ 469, 468, 466, 465, 463, 461, 459, 239 ], "attributes": { "hdlname": "rx_09_fifo rd_addr_gray", - "src": "top.v:275.17-286.5|complex_fifo.v:25.22-25.34" + "src": "top.v:277.17-288.5|complex_fifo.v:25.22-25.34" } }, "rx_09_fifo.rd_addr_gray_SB_DFFESR_Q_1_D": { "hide_name": 0, - "bits": [ 456 ], + "bits": [ 458 ], "attributes": { - "src": "top.v:275.17-286.5|complex_fifo.v:33.8-33.47" + "src": "top.v:277.17-288.5|complex_fifo.v:33.8-33.47" } }, - "rx_09_fifo.rd_addr_gray_SB_DFFESR_Q_3_D": { + "rx_09_fifo.rd_addr_gray_SB_DFFESR_Q_4_D": { "hide_name": 0, - "bits": [ 460 ], + "bits": [ 244, 464, 229, 462 ], "attributes": { - "src": "top.v:275.17-286.5|complex_fifo.v:33.8-33.47" + "force_downto": "00000000000000000000000000000001", + "src": "/usr/local/bin/../share/yosys/ice40/cells_map.v:6.21-6.22" } }, "rx_09_fifo.rd_addr_gray_SB_DFFESR_Q_5_D": { "hide_name": 0, - "bits": [ 247, 464, 251, 462 ], + "bits": [ 231, 232, 22, 233 ], "attributes": { "force_downto": "00000000000000000000000000000001", "src": "/usr/local/bin/../share/yosys/ice40/cells_map.v:6.21-6.22" @@ -25889,15 +25953,15 @@ }, "rx_09_fifo.rd_addr_gray_SB_DFFESR_Q_6_D": { "hide_name": 0, - "bits": [ 458, 245, 241, 466 ], + "bits": [ 467, 246, 460, 227 ], "attributes": { "force_downto": "00000000000000000000000000000001", "src": "/usr/local/bin/../share/yosys/ice40/cells_map.v:6.21-6.22" } }, - "rx_09_fifo.rd_addr_gray_SB_DFFESR_Q_6_D_SB_LUT4_I0_O": { + "rx_09_fifo.rd_addr_gray_SB_DFFESR_Q_7_D": { "hide_name": 0, - "bits": [ 227, 228, 229, 230 ], + "bits": [ 234, 235, 236, 237 ], "attributes": { "force_downto": "00000000000000000000000000000001", "src": "/usr/local/bin/../share/yosys/ice40/cells_map.v:6.21-6.22" @@ -25905,50 +25969,50 @@ }, "rx_09_fifo.rd_addr_gray_SB_LUT4_I2_I3": { "hide_name": 0, - "bits": [ "0", 231, 474, 473, 472, 471, 470, 469 ], + "bits": [ "0", 248, 475, 474, 473, 472, 471, 470 ], "attributes": { "force_downto": "00000000000000000000000000000001", - "src": "top.v:275.17-286.5|complex_fifo.v:66.14-66.28|/usr/local/bin/../share/yosys/ice40/arith_map.v:51.21-51.22" + "src": "top.v:277.17-288.5|complex_fifo.v:66.14-66.28|/usr/local/bin/../share/yosys/ice40/arith_map.v:51.21-51.22" } }, "rx_09_fifo.rd_addr_gray_SB_LUT4_I2_O": { "hide_name": 0, - "bits": [ 454, 232, 453, 452, 451, 450, 448, 455 ], + "bits": [ 456, 455, 454, 453, 452, 451, 449, 457 ], "attributes": { "force_downto": "00000000000000000000000000000001", - "src": "top.v:275.17-286.5|complex_fifo.v:66.14-66.28|/usr/local/bin/../share/yosys/ice40/arith_map.v:33.26-33.27" + "src": "top.v:277.17-288.5|complex_fifo.v:66.14-66.28|/usr/local/bin/../share/yosys/ice40/arith_map.v:33.26-33.27" } }, "rx_09_fifo.rd_addr_gray_wr": { "hide_name": 0, - "bits": [ 482, 481, 480, 479, 478, 477, 476, 475 ], + "bits": [ 483, 482, 481, 480, 479, 478, 477, 476 ], "attributes": { "hdlname": "rx_09_fifo rd_addr_gray_wr", - "src": "top.v:275.17-286.5|complex_fifo.v:26.22-26.37" + "src": "top.v:277.17-288.5|complex_fifo.v:26.22-26.37" } }, "rx_09_fifo.rd_addr_gray_wr_r": { "hide_name": 0, - "bits": [ 198, 194, 202, 199, 191, 190, 184, 185 ], + "bits": [ 198, 178, 190, 181, 184, 186, 214, 215 ], "attributes": { "hdlname": "rx_09_fifo rd_addr_gray_wr_r", - "src": "top.v:275.17-286.5|complex_fifo.v:27.22-27.39" + "src": "top.v:277.17-288.5|complex_fifo.v:27.22-27.39" } }, "rx_09_fifo.rd_clk_i": { "hide_name": 0, - "bits": [ 60 ], + "bits": [ 58 ], "attributes": { "hdlname": "rx_09_fifo rd_clk_i", - "src": "top.v:275.17-286.5|complex_fifo.v:12.29-12.37" + "src": "top.v:277.17-288.5|complex_fifo.v:12.29-12.37" } }, "rx_09_fifo.rd_data_o": { "hide_name": 0, - "bits": [ 432, 433, 434, 435, 436, 437, 438, 439, 440, 441, 442, 443, 444, 445, 446, 447, 416, 417, 418, 419, 420, 421, 422, 423, 424, 425, 426, 427, 428, 429, 430, 431 ], + "bits": [ 433, 434, 435, 436, 437, 438, 439, 440, 441, 442, 443, 444, 445, 446, 447, 448, 417, 418, 419, 420, 421, 422, 423, 424, 425, 426, 427, 428, 429, 430, 431, 432 ], "attributes": { "hdlname": "rx_09_fifo rd_data_o", - "src": "top.v:275.17-286.5|complex_fifo.v:14.33-14.42" + "src": "top.v:277.17-288.5|complex_fifo.v:14.33-14.42" } }, "rx_09_fifo.rd_en_i": { @@ -25956,49 +26020,58 @@ "bits": [ 22 ], "attributes": { "hdlname": "rx_09_fifo rd_en_i", - "src": "top.v:275.17-286.5|complex_fifo.v:13.29-13.36" + "src": "top.v:277.17-288.5|complex_fifo.v:13.29-13.36" } }, "rx_09_fifo.rd_rst_i": { "hide_name": 0, - "bits": [ 49 ], + "bits": [ 48 ], "attributes": { "hdlname": "rx_09_fifo rd_rst_i", - "src": "top.v:275.17-286.5|complex_fifo.v:11.29-11.37" + "src": "top.v:277.17-288.5|complex_fifo.v:11.29-11.37" } }, "rx_09_fifo.wr_addr": { "hide_name": 0, - "bits": [ 197, 196, 213, 211, 209, 207, 205, 203 ], + "bits": [ 196, 197, 213, 211, 209, 207, 205, 202 ], "attributes": { "hdlname": "rx_09_fifo wr_addr", - "src": "top.v:275.17-286.5|complex_fifo.v:20.22-20.29" + "src": "top.v:277.17-288.5|complex_fifo.v:20.22-20.29" } }, "rx_09_fifo.wr_addr_SB_DFFESR_Q_E": { "hide_name": 0, - "bits": [ 483 ], + "bits": [ 485 ], "attributes": { } }, "rx_09_fifo.wr_addr_gray": { "hide_name": 0, - "bits": [ 502, 500, 498, 496, 494, 492, 490, 203 ], + "bits": [ 506, 505, 499, 497, 496, 495, 494, 202 ], "attributes": { "hdlname": "rx_09_fifo wr_addr_gray", - "src": "top.v:275.17-286.5|complex_fifo.v:21.22-21.34" - } - }, - "rx_09_fifo.wr_addr_gray_SB_DFFESR_Q_2_D": { - "hide_name": 0, - "bits": [ 491 ], - "attributes": { - "src": "top.v:275.17-286.5|complex_fifo.v:33.8-33.47" + "src": "top.v:277.17-288.5|complex_fifo.v:21.22-21.34" } }, "rx_09_fifo.wr_addr_gray_SB_DFFESR_Q_4_D": { "hide_name": 0, - "bits": [ 199, 495, 489, 184 ], + "bits": [ 181, 182, 183, 184 ], + "attributes": { + "force_downto": "00000000000000000000000000000001", + "src": "/usr/local/bin/../share/yosys/ice40/cells_map.v:6.21-6.22" + } + }, + "rx_09_fifo.wr_addr_gray_SB_DFFESR_Q_5_D": { + "hide_name": 0, + "bits": [ 498, 190 ], + "attributes": { + "force_downto": "00000000000000000000000000000001", + "src": "/usr/local/bin/../share/yosys/ice40/cells_map.v:6.21-6.22" + } + }, + "rx_09_fifo.wr_addr_gray_SB_DFFESR_Q_5_D_SB_LUT4_I2_O": { + "hide_name": 0, + "bits": [ 500, 493, 214, 501 ], "attributes": { "force_downto": "00000000000000000000000000000001", "src": "/usr/local/bin/../share/yosys/ice40/cells_map.v:6.21-6.22" @@ -26006,7 +26079,7 @@ }, "rx_09_fifo.wr_addr_gray_SB_DFFESR_Q_6_D": { "hide_name": 0, - "bits": [ 194, 499, 191, 493 ], + "bits": [ 178, 177, 185, 186 ], "attributes": { "force_downto": "00000000000000000000000000000001", "src": "/usr/local/bin/../share/yosys/ice40/cells_map.v:6.21-6.22" @@ -26014,7 +26087,7 @@ }, "rx_09_fifo.wr_addr_gray_SB_DFFESR_Q_7_D": { "hide_name": 0, - "bits": [ 497, 202, 198, 501 ], + "bits": [ 502, 503, 198, 504 ], "attributes": { "force_downto": "00000000000000000000000000000001", "src": "/usr/local/bin/../share/yosys/ice40/cells_map.v:6.21-6.22" @@ -26022,34 +26095,34 @@ }, "rx_09_fifo.wr_addr_gray_SB_LUT4_I2_I3": { "hide_name": 0, - "bits": [ "0", 197, 508, 507, 506, 505, 504, 503 ], + "bits": [ "0", 196, 512, 511, 510, 509, 508, 507 ], "attributes": { "force_downto": "00000000000000000000000000000001", - "src": "top.v:275.17-286.5|complex_fifo.v:42.14-42.28|/usr/local/bin/../share/yosys/ice40/arith_map.v:51.21-51.22" + "src": "top.v:277.17-288.5|complex_fifo.v:42.14-42.28|/usr/local/bin/../share/yosys/ice40/arith_map.v:51.21-51.22" } }, "rx_09_fifo.wr_addr_gray_SB_LUT4_I2_O": { "hide_name": 0, - "bits": [ 488, 487, 486, 485, 484, 214, 215, 217 ], + "bits": [ 491, 490, 489, 488, 487, 486, 484, 492 ], "attributes": { "force_downto": "00000000000000000000000000000001", - "src": "top.v:275.17-286.5|complex_fifo.v:42.14-42.28|/usr/local/bin/../share/yosys/ice40/arith_map.v:33.26-33.27" + "src": "top.v:277.17-288.5|complex_fifo.v:42.14-42.28|/usr/local/bin/../share/yosys/ice40/arith_map.v:33.26-33.27" } }, "rx_09_fifo.wr_addr_gray_rd": { "hide_name": 0, - "bits": [ 516, 515, 514, 513, 512, 511, 510, 509 ], + "bits": [ 520, 519, 518, 517, 516, 515, 514, 513 ], "attributes": { "hdlname": "rx_09_fifo wr_addr_gray_rd", - "src": "top.v:275.17-286.5|complex_fifo.v:22.22-22.37" + "src": "top.v:277.17-288.5|complex_fifo.v:22.22-22.37" } }, "rx_09_fifo.wr_addr_gray_rd_r": { "hide_name": 0, - "bits": [ 221, 241, 247, 251, 249, 245, 238, 237 ], + "bits": [ 234, 246, 231, 244, 229, 227, 238, 240 ], "attributes": { "hdlname": "rx_09_fifo wr_addr_gray_rd_r", - "src": "top.v:275.17-286.5|complex_fifo.v:23.22-23.39" + "src": "top.v:277.17-288.5|complex_fifo.v:23.22-23.39" } }, "rx_09_fifo.wr_clk_i": { @@ -26057,15 +26130,15 @@ "bits": [ 18 ], "attributes": { "hdlname": "rx_09_fifo wr_clk_i", - "src": "top.v:275.17-286.5|complex_fifo.v:7.29-7.37" + "src": "top.v:277.17-288.5|complex_fifo.v:7.29-7.37" } }, "rx_09_fifo.wr_data_i": { "hide_name": 0, - "bits": [ 314, 312, 308, 306, 304, 302, 300, 298, 296, 294, 292, 290, 286, 284, 282, 280, 278, 276, 274, 272, 270, 268, 326, 324, 322, 320, 318, 316, 310, 288, 266, 264 ], + "bits": [ 310, 308, 304, 302, 300, 298, 296, 294, 292, 290, 288, 286, 282, 280, 278, 276, 274, 272, 270, 268, 266, 264, 322, 320, 318, 316, 314, 312, 306, 284, 262, 260 ], "attributes": { "hdlname": "rx_09_fifo wr_data_i", - "src": "top.v:275.17-286.5|complex_fifo.v:9.33-9.42" + "src": "top.v:277.17-288.5|complex_fifo.v:9.33-9.42" } }, "rx_09_fifo.wr_en_i": { @@ -26073,39 +26146,39 @@ "bits": [ 21 ], "attributes": { "hdlname": "rx_09_fifo wr_en_i", - "src": "top.v:275.17-286.5|complex_fifo.v:8.29-8.36" + "src": "top.v:277.17-288.5|complex_fifo.v:8.29-8.36" } }, "rx_09_fifo.wr_rst_i": { "hide_name": 0, - "bits": [ 49 ], + "bits": [ 48 ], "attributes": { "hdlname": "rx_09_fifo wr_rst_i", - "src": "top.v:275.17-286.5|complex_fifo.v:6.29-6.37" + "src": "top.v:277.17-288.5|complex_fifo.v:6.29-6.37" } }, "smi_ctrl_ins.i_cs": { "hide_name": 0, - "bits": [ 518 ], + "bits": [ 522 ], "attributes": { "hdlname": "smi_ctrl_ins i_cs", - "src": "top.v:312.13-343.5|smi_ctrl.v:9.29-9.33" + "src": "top.v:314.13-345.5|smi_ctrl.v:9.29-9.33" } }, "smi_ctrl_ins.i_data_in": { "hide_name": 0, - "bits": [ 64, 61, 147, 146, 145, 143, 141, 138 ], + "bits": [ 62, 59, 147, 146, 145, 143, 141, 138 ], "attributes": { "hdlname": "smi_ctrl_ins i_data_in", - "src": "top.v:312.13-343.5|smi_ctrl.v:7.29-7.38" + "src": "top.v:314.13-345.5|smi_ctrl.v:7.29-7.38" } }, "smi_ctrl_ins.i_fetch_cmd": { "hide_name": 0, - "bits": [ 528 ], + "bits": [ 532 ], "attributes": { "hdlname": "smi_ctrl_ins i_fetch_cmd", - "src": "top.v:312.13-343.5|smi_ctrl.v:10.29-10.40" + "src": "top.v:314.13-345.5|smi_ctrl.v:10.29-10.40" } }, "smi_ctrl_ins.i_fifo_09_empty": { @@ -26113,7 +26186,7 @@ "bits": [ 23 ], "attributes": { "hdlname": "smi_ctrl_ins i_fifo_09_empty", - "src": "top.v:312.13-343.5|smi_ctrl.v:17.29-17.44" + "src": "top.v:314.13-345.5|smi_ctrl.v:17.29-17.44" } }, "smi_ctrl_ins.i_fifo_09_full": { @@ -26121,15 +26194,15 @@ "bits": [ 24 ], "attributes": { "hdlname": "smi_ctrl_ins i_fifo_09_full", - "src": "top.v:312.13-343.5|smi_ctrl.v:16.29-16.43" + "src": "top.v:314.13-345.5|smi_ctrl.v:16.29-16.43" } }, "smi_ctrl_ins.i_fifo_09_pulled_data": { "hide_name": 0, - "bits": [ 432, 433, 434, 435, 436, 437, 438, 439, 440, 441, 442, 443, 444, 445, 446, 447, 416, 417, 418, 419, 420, 421, 422, 423, 424, 425, 426, 427, 428, 429, 430, 431 ], + "bits": [ 433, 434, 435, 436, 437, 438, 439, 440, 441, 442, 443, 444, 445, 446, 447, 448, 417, 418, 419, 420, 421, 422, 423, 424, 425, 426, 427, 428, 429, 430, 431, 432 ], "attributes": { "hdlname": "smi_ctrl_ins i_fifo_09_pulled_data", - "src": "top.v:312.13-343.5|smi_ctrl.v:15.29-15.50" + "src": "top.v:314.13-345.5|smi_ctrl.v:15.29-15.50" } }, "smi_ctrl_ins.i_fifo_24_empty": { @@ -26137,7 +26210,7 @@ "bits": [ "x" ], "attributes": { "hdlname": "smi_ctrl_ins i_fifo_24_empty", - "src": "top.v:312.13-343.5|smi_ctrl.v:23.29-23.44" + "src": "top.v:314.13-345.5|smi_ctrl.v:23.29-23.44" } }, "smi_ctrl_ins.i_fifo_24_full": { @@ -26145,7 +26218,7 @@ "bits": [ "x" ], "attributes": { "hdlname": "smi_ctrl_ins i_fifo_24_full", - "src": "top.v:312.13-343.5|smi_ctrl.v:22.29-22.43" + "src": "top.v:314.13-345.5|smi_ctrl.v:22.29-22.43" } }, "smi_ctrl_ins.i_fifo_24_pulled_data": { @@ -26153,31 +26226,31 @@ "bits": [ "x", "x", "x", "x", "x", "x", "x", "x", "x", "x", "x", "x", "x", "x", "x", "x", "x", "x", "x", "x", "x", "x", "x", "x", "x", "x", "x", "x", "x", "x", "x", "x" ], "attributes": { "hdlname": "smi_ctrl_ins i_fifo_24_pulled_data", - "src": "top.v:312.13-343.5|smi_ctrl.v:21.29-21.50" + "src": "top.v:314.13-345.5|smi_ctrl.v:21.29-21.50" } }, "smi_ctrl_ins.i_ioc": { "hide_name": 0, - "bits": [ 82, 86, 167, 166, 165 ], + "bits": [ 78, 114, 167, 166, 165 ], "attributes": { "hdlname": "smi_ctrl_ins i_ioc", - "src": "top.v:312.13-343.5|smi_ctrl.v:6.29-6.34" + "src": "top.v:314.13-345.5|smi_ctrl.v:6.29-6.34" } }, "smi_ctrl_ins.i_load_cmd": { "hide_name": 0, - "bits": [ 573 ], + "bits": [ 575 ], "attributes": { "hdlname": "smi_ctrl_ins i_load_cmd", - "src": "top.v:312.13-343.5|smi_ctrl.v:11.29-11.39" + "src": "top.v:314.13-345.5|smi_ctrl.v:11.29-11.39" } }, "smi_ctrl_ins.i_reset": { "hide_name": 0, - "bits": [ 49 ], + "bits": [ 48 ], "attributes": { "hdlname": "smi_ctrl_ins i_reset", - "src": "top.v:312.13-343.5|smi_ctrl.v:3.29-3.36" + "src": "top.v:314.13-345.5|smi_ctrl.v:3.29-3.36" } }, "smi_ctrl_ins.i_smi_a": { @@ -26185,7 +26258,7 @@ "bits": [ 28, 29, 30 ], "attributes": { "hdlname": "smi_ctrl_ins i_smi_a", - "src": "top.v:312.13-343.5|smi_ctrl.v:26.29-26.36" + "src": "top.v:314.13-345.5|smi_ctrl.v:26.29-26.36" } }, "smi_ctrl_ins.i_smi_data_in": { @@ -26193,7 +26266,7 @@ "bits": [ 32, 33, 34, 35, 36, 37, 38, 39 ], "attributes": { "hdlname": "smi_ctrl_ins i_smi_data_in", - "src": "top.v:312.13-343.5|smi_ctrl.v:30.29-30.42" + "src": "top.v:314.13-345.5|smi_ctrl.v:30.29-30.42" } }, "smi_ctrl_ins.i_smi_soe_se": { @@ -26201,7 +26274,7 @@ "bits": [ 25 ], "attributes": { "hdlname": "smi_ctrl_ins i_smi_soe_se", - "src": "top.v:312.13-343.5|smi_ctrl.v:27.29-27.41" + "src": "top.v:314.13-345.5|smi_ctrl.v:27.29-27.41" } }, "smi_ctrl_ins.i_smi_swe_srw": { @@ -26209,7 +26282,7 @@ "bits": [ 31 ], "attributes": { "hdlname": "smi_ctrl_ins i_smi_swe_srw", - "src": "top.v:312.13-343.5|smi_ctrl.v:28.29-28.42", + "src": "top.v:314.13-345.5|smi_ctrl.v:28.29-28.42", "unused_bits": "0 " } }, @@ -26218,31 +26291,31 @@ "bits": [ "0" ], "attributes": { "hdlname": "smi_ctrl_ins i_smi_test", - "src": "top.v:312.13-343.5|smi_ctrl.v:34.29-34.39" + "src": "top.v:314.13-345.5|smi_ctrl.v:34.29-34.39" } }, "smi_ctrl_ins.i_sys_clk": { "hide_name": 0, - "bits": [ 60 ], + "bits": [ 58 ], "attributes": { "hdlname": "smi_ctrl_ins i_sys_clk", - "src": "top.v:312.13-343.5|smi_ctrl.v:4.29-4.38" + "src": "top.v:314.13-345.5|smi_ctrl.v:4.29-4.38" } }, "smi_ctrl_ins.int_cnt_09": { "hide_name": 0, - "bits": [ "1", "1", "1", 523, 521 ], + "bits": [ "1", "1", "1", 527, 525 ], "attributes": { "hdlname": "smi_ctrl_ins int_cnt_09", - "src": "top.v:312.13-343.5|smi_ctrl.v:92.15-92.25" + "src": "top.v:314.13-345.5|smi_ctrl.v:92.15-92.25" } }, "smi_ctrl_ins.int_cnt_09_SB_DFFNESS_Q_D": { "hide_name": 0, - "bits": [ 522, 520 ], + "bits": [ 526, 524 ], "attributes": { "force_downto": "00000000000000000000000000000001", - "src": "top.v:312.13-343.5|smi_ctrl.v:121.35-121.49|/usr/local/bin/../share/yosys/techmap.v:270.26-270.27" + "src": "top.v:314.13-345.5|smi_ctrl.v:121.35-121.49|/usr/local/bin/../share/yosys/techmap.v:270.26-270.27" } }, "smi_ctrl_ins.int_cnt_24": { @@ -26250,26 +26323,26 @@ "bits": [ "1", "1", "1", "x", "x" ], "attributes": { "hdlname": "smi_ctrl_ins int_cnt_24", - "src": "top.v:312.13-343.5|smi_ctrl.v:93.15-93.25" + "src": "top.v:314.13-345.5|smi_ctrl.v:93.15-93.25" } }, "smi_ctrl_ins.o_data_out": { "hide_name": 0, - "bits": [ 526, 525, "0", "0", "0", "0", "0", "0" ], + "bits": [ 530, 529, "0", "0", "0", "0", "0", "0" ], "attributes": { "hdlname": "smi_ctrl_ins o_data_out", - "src": "top.v:312.13-343.5|smi_ctrl.v:8.29-8.39" + "src": "top.v:314.13-345.5|smi_ctrl.v:8.29-8.39" } }, "smi_ctrl_ins.o_data_out_SB_DFFESS_Q_E": { "hide_name": 0, - "bits": [ 524 ], + "bits": [ 528 ], "attributes": { } }, "smi_ctrl_ins.o_data_out_SB_DFFESS_Q_E_SB_LUT4_O_I3": { "hide_name": 0, - "bits": [ 85, 527 ], + "bits": [ 115, 531 ], "attributes": { "force_downto": "00000000000000000000000000000001", "src": "/usr/local/bin/../share/yosys/ice40/cells_map.v:6.21-6.22" @@ -26277,7 +26350,7 @@ }, "smi_ctrl_ins.o_data_out_SB_LUT4_I0_1_O": { "hide_name": 0, - "bits": [ 680, 397, 401, 403, 405, 407, 409, 412 ], + "bits": [ 682, 398, 402, 404, 406, 408, 410, 413 ], "attributes": { "force_downto": "00000000000000000000000000000001", "src": "top.v:0.0-0.0|top.v:179.7-185.14|/usr/local/bin/../share/yosys/techmap.v:578.19-578.22", @@ -26286,7 +26359,7 @@ }, "smi_ctrl_ins.o_data_out_SB_LUT4_I0_I1": { "hide_name": 0, - "bits": [ 526, 529, 411, 136 ], + "bits": [ 530, 533, 412, 135 ], "attributes": { "force_downto": "00000000000000000000000000000001", "src": "/usr/local/bin/../share/yosys/ice40/cells_map.v:6.21-6.22" @@ -26294,7 +26367,7 @@ }, "smi_ctrl_ins.o_data_out_SB_LUT4_I0_O": { "hide_name": 0, - "bits": [ 646, 400, 531, 530 ], + "bits": [ 648, 401, 535, 534 ], "attributes": { "force_downto": "00000000000000000000000000000001", "src": "/usr/local/bin/../share/yosys/ice40/cells_map.v:6.21-6.22" @@ -26305,28 +26378,28 @@ "bits": [ 22 ], "attributes": { "hdlname": "smi_ctrl_ins o_fifo_09_pull", - "src": "top.v:312.13-343.5|smi_ctrl.v:14.29-14.43" + "src": "top.v:314.13-345.5|smi_ctrl.v:14.29-14.43" } }, "smi_ctrl_ins.o_smi_data_out": { "hide_name": 0, - "bits": [ 32, 260, 259, 258, 257, 256, 255, 254 ], + "bits": [ 32, 257, 256, 255, 254, 253, 252, 251 ], "attributes": { "hdlname": "smi_ctrl_ins o_smi_data_out", - "src": "top.v:312.13-343.5|smi_ctrl.v:29.29-29.43" + "src": "top.v:314.13-345.5|smi_ctrl.v:29.29-29.43" } }, "smi_ctrl_ins.o_smi_data_out_SB_DFFNE_Q_D": { "hide_name": 0, - "bits": [ 541, 540, 539, 538, 537, 536, 535, 534 ], + "bits": [ 545, 544, 543, 542, 541, 540, 539, 538 ], "attributes": { "force_downto": "00000000000000000000000000000001", - "src": "top.v:312.13-343.5|smi_ctrl.v:0.0-0.0|/usr/local/bin/../share/yosys/techmap.v:137.23-137.24" + "src": "top.v:314.13-345.5|smi_ctrl.v:0.0-0.0|/usr/local/bin/../share/yosys/techmap.v:137.23-137.24" } }, "smi_ctrl_ins.o_smi_data_out_SB_DFFNE_Q_D_SB_LUT4_O_1_I3": { "hide_name": 0, - "bits": [ 438, 422, 523, 543 ], + "bits": [ 439, 423, 527, 547 ], "attributes": { "force_downto": "00000000000000000000000000000001", "src": "/usr/local/bin/../share/yosys/ice40/cells_map.v:6.21-6.22" @@ -26334,7 +26407,7 @@ }, "smi_ctrl_ins.o_smi_data_out_SB_DFFNE_Q_D_SB_LUT4_O_2_I3": { "hide_name": 0, - "bits": [ 437, 421, 523, 544 ], + "bits": [ 438, 422, 527, 548 ], "attributes": { "force_downto": "00000000000000000000000000000001", "src": "/usr/local/bin/../share/yosys/ice40/cells_map.v:6.21-6.22" @@ -26342,7 +26415,7 @@ }, "smi_ctrl_ins.o_smi_data_out_SB_DFFNE_Q_D_SB_LUT4_O_3_I3": { "hide_name": 0, - "bits": [ 436, 420, 523, 545 ], + "bits": [ 437, 421, 527, 549 ], "attributes": { "force_downto": "00000000000000000000000000000001", "src": "/usr/local/bin/../share/yosys/ice40/cells_map.v:6.21-6.22" @@ -26350,7 +26423,7 @@ }, "smi_ctrl_ins.o_smi_data_out_SB_DFFNE_Q_D_SB_LUT4_O_4_I3": { "hide_name": 0, - "bits": [ 435, 419, 523, 546 ], + "bits": [ 436, 420, 527, 550 ], "attributes": { "force_downto": "00000000000000000000000000000001", "src": "/usr/local/bin/../share/yosys/ice40/cells_map.v:6.21-6.22" @@ -26358,7 +26431,7 @@ }, "smi_ctrl_ins.o_smi_data_out_SB_DFFNE_Q_D_SB_LUT4_O_5_I3": { "hide_name": 0, - "bits": [ 434, 418, 523, 547 ], + "bits": [ 435, 419, 527, 551 ], "attributes": { "force_downto": "00000000000000000000000000000001", "src": "/usr/local/bin/../share/yosys/ice40/cells_map.v:6.21-6.22" @@ -26366,7 +26439,7 @@ }, "smi_ctrl_ins.o_smi_data_out_SB_DFFNE_Q_D_SB_LUT4_O_6_I3": { "hide_name": 0, - "bits": [ 433, 417, 523, 548 ], + "bits": [ 434, 418, 527, 552 ], "attributes": { "force_downto": "00000000000000000000000000000001", "src": "/usr/local/bin/../share/yosys/ice40/cells_map.v:6.21-6.22" @@ -26374,7 +26447,7 @@ }, "smi_ctrl_ins.o_smi_data_out_SB_DFFNE_Q_D_SB_LUT4_O_7_I3": { "hide_name": 0, - "bits": [ 432, 416, 523, 549 ], + "bits": [ 433, 417, 527, 553 ], "attributes": { "force_downto": "00000000000000000000000000000001", "src": "/usr/local/bin/../share/yosys/ice40/cells_map.v:6.21-6.22" @@ -26382,7 +26455,7 @@ }, "smi_ctrl_ins.o_smi_data_out_SB_DFFNE_Q_D_SB_LUT4_O_I3": { "hide_name": 0, - "bits": [ 439, 423, 523, 542 ], + "bits": [ 440, 424, 527, 546 ], "attributes": { "force_downto": "00000000000000000000000000000001", "src": "/usr/local/bin/../share/yosys/ice40/cells_map.v:6.21-6.22" @@ -26393,7 +26466,7 @@ "bits": [ "1" ], "attributes": { "hdlname": "smi_ctrl_ins o_smi_read_req", - "src": "top.v:312.13-343.5|smi_ctrl.v:31.29-31.43" + "src": "top.v:314.13-345.5|smi_ctrl.v:31.29-31.43" } }, "smi_ctrl_ins.o_smi_write_req": { @@ -26401,7 +26474,7 @@ "bits": [ "x" ], "attributes": { "hdlname": "smi_ctrl_ins o_smi_write_req", - "src": "top.v:312.13-343.5|smi_ctrl.v:32.29-32.44" + "src": "top.v:314.13-345.5|smi_ctrl.v:32.29-32.44" } }, "smi_ctrl_ins.o_smi_writing": { @@ -26409,44 +26482,44 @@ "bits": [ 30 ], "attributes": { "hdlname": "smi_ctrl_ins o_smi_writing", - "src": "top.v:312.13-343.5|smi_ctrl.v:33.29-33.42" + "src": "top.v:314.13-345.5|smi_ctrl.v:33.29-33.42" } }, "smi_ctrl_ins.r_fifo_09_pull": { "hide_name": 0, - "bits": [ 253 ], + "bits": [ 250 ], "attributes": { "hdlname": "smi_ctrl_ins r_fifo_09_pull", - "src": "top.v:312.13-343.5|smi_ctrl.v:94.9-94.23" + "src": "top.v:314.13-345.5|smi_ctrl.v:94.9-94.23" } }, "smi_ctrl_ins.r_fifo_09_pull_1": { "hide_name": 0, - "bits": [ 252 ], + "bits": [ 249 ], "attributes": { "hdlname": "smi_ctrl_ins r_fifo_09_pull_1", - "src": "top.v:312.13-343.5|smi_ctrl.v:95.9-95.25" + "src": "top.v:314.13-345.5|smi_ctrl.v:95.9-95.25" } }, "smi_ctrl_ins.soe_and_reset": { "hide_name": 0, - "bits": [ 519 ], + "bits": [ 523 ], "attributes": { "hdlname": "smi_ctrl_ins soe_and_reset", - "src": "top.v:312.13-343.5|smi_ctrl.v:103.10-103.23" + "src": "top.v:314.13-345.5|smi_ctrl.v:103.10-103.23" } }, "smi_ctrl_ins.w_fifo_09_pull_trigger": { "hide_name": 0, - "bits": [ 550 ], + "bits": [ 554 ], "attributes": { "hdlname": "smi_ctrl_ins w_fifo_09_pull_trigger", - "src": "top.v:312.13-343.5|smi_ctrl.v:96.10-96.32" + "src": "top.v:314.13-345.5|smi_ctrl.v:96.10-96.32" } }, "spi_if_ins.i_data_out": { "hide_name": 0, - "bits": [ 415, 399, 402, 404, 406, 408, 410, 413 ], + "bits": [ 416, 400, 403, 405, 407, 409, 411, 414 ], "attributes": { "hdlname": "spi_if_ins i_data_out", "src": "top.v:92.11-108.5|spi_if.v:10.29-10.39" @@ -26454,7 +26527,7 @@ }, "spi_if_ins.i_rst_b": { "hide_name": 0, - "bits": [ 49 ], + "bits": [ 48 ], "attributes": { "hdlname": "spi_if_ins i_rst_b", "src": "top.v:92.11-108.5|spi_if.v:5.29-5.36" @@ -26486,7 +26559,7 @@ }, "spi_if_ins.i_sys_clk": { "hide_name": 0, - "bits": [ 60 ], + "bits": [ 58 ], "attributes": { "hdlname": "spi_if_ins i_sys_clk", "src": "top.v:92.11-108.5|spi_if.v:6.29-6.38" @@ -26494,7 +26567,7 @@ }, "spi_if_ins.o_cs": { "hide_name": 0, - "bits": [ 532, 74, 518, 533 ], + "bits": [ 536, 70, 522, 537 ], "attributes": { "hdlname": "spi_if_ins o_cs", "src": "top.v:92.11-108.5|spi_if.v:11.29-11.33" @@ -26502,7 +26575,7 @@ }, "spi_if_ins.o_cs_SB_DFFESR_Q_D": { "hide_name": 0, - "bits": [ "0", "0", "0", 551, "0", "0", 517, "0", "0", 72, "0", "0" ], + "bits": [ "0", "0", "0", 555, "0", "0", 521, "0", "0", 68, "0", "0" ], "attributes": { "force_downto": "00000000000000000000000000000001", "src": "top.v:92.11-108.5|spi_if.v:65.21-70.28|spi_if.v:0.0-0.0|/usr/local/bin/../share/yosys/techmap.v:583.28-583.35" @@ -26510,7 +26583,7 @@ }, "spi_if_ins.o_cs_SB_DFFESR_Q_R": { "hide_name": 0, - "bits": [ 75, 681, 682, 683 ], + "bits": [ 71, 683, 684, 685 ], "attributes": { "force_downto": "00000000000000000000000000000001", "src": "top.v:92.11-108.5|spi_if.v:65.21-70.28|spi_if.v:0.0-0.0|/usr/local/bin/../share/yosys/techmap.v:575.21-575.22", @@ -26519,21 +26592,21 @@ }, "spi_if_ins.o_cs_SB_LUT4_I2_O": { "hide_name": 0, - "bits": [ 411, 128 ], + "bits": [ 412, 105 ], "attributes": { "force_downto": "00000000000000000000000000000001", "src": "/usr/local/bin/../share/yosys/ice40/cells_map.v:6.21-6.22" } }, - "spi_if_ins.o_cs_SB_LUT4_I3_1_O": { + "spi_if_ins.o_cs_SB_LUT4_I3_O": { "hide_name": 0, - "bits": [ 398 ], + "bits": [ 399 ], "attributes": { } }, "spi_if_ins.o_data_in": { "hide_name": 0, - "bits": [ 64, 61, 147, 146, 145, 143, 141, 138 ], + "bits": [ 62, 59, 147, 146, 145, 143, 141, 138 ], "attributes": { "hdlname": "spi_if_ins o_data_in", "src": "top.v:92.11-108.5|spi_if.v:9.29-9.38" @@ -26541,13 +26614,13 @@ }, "spi_if_ins.o_data_in_SB_DFFE_Q_E": { "hide_name": 0, - "bits": [ 555 ], + "bits": [ 559 ], "attributes": { } }, "spi_if_ins.o_fetch_cmd": { "hide_name": 0, - "bits": [ 528 ], + "bits": [ 532 ], "attributes": { "hdlname": "spi_if_ins o_fetch_cmd", "src": "top.v:92.11-108.5|spi_if.v:12.29-12.40" @@ -26555,27 +26628,19 @@ }, "spi_if_ins.o_fetch_cmd_SB_DFFESR_Q_D": { "hide_name": 0, - "bits": [ 565 ], + "bits": [ 569 ], "attributes": { } }, "spi_if_ins.o_fetch_cmd_SB_DFFESR_Q_E": { "hide_name": 0, - "bits": [ 566 ], + "bits": [ 570 ], "attributes": { } }, "spi_if_ins.o_fetch_cmd_SB_LUT4_I3_O": { "hide_name": 0, - "bits": [ 83, 85, 571 ], - "attributes": { - "force_downto": "00000000000000000000000000000001", - "src": "/usr/local/bin/../share/yosys/ice40/cells_map.v:6.21-6.22" - } - }, - "spi_if_ins.o_fetch_cmd_SB_LUT4_I3_O_SB_LUT4_I3_O": { - "hide_name": 0, - "bits": [ 117, 77 ], + "bits": [ 79, 115, 137 ], "attributes": { "force_downto": "00000000000000000000000000000001", "src": "/usr/local/bin/../share/yosys/ice40/cells_map.v:6.21-6.22" @@ -26583,15 +26648,23 @@ }, "spi_if_ins.o_ioc": { "hide_name": 0, - "bits": [ 82, 86, 167, 166, 165 ], + "bits": [ 78, 114, 167, 166, 165 ], "attributes": { "hdlname": "spi_if_ins o_ioc", "src": "top.v:92.11-108.5|spi_if.v:8.29-8.34" } }, + "spi_if_ins.o_ioc_SB_DFFE_Q_E": { + "hide_name": 0, + "bits": [ 558, 69, 573 ], + "attributes": { + "force_downto": "00000000000000000000000000000001", + "src": "/usr/local/bin/../share/yosys/ice40/cells_map.v:6.21-6.22" + } + }, "spi_if_ins.o_load_cmd": { "hide_name": 0, - "bits": [ 573 ], + "bits": [ 575 ], "attributes": { "hdlname": "spi_if_ins o_load_cmd", "src": "top.v:92.11-108.5|spi_if.v:13.29-13.39" @@ -26599,23 +26672,7 @@ }, "spi_if_ins.o_load_cmd_SB_DFFESR_Q_D": { "hide_name": 0, - "bits": [ 568, 564 ], - "attributes": { - "force_downto": "00000000000000000000000000000001", - "src": "/usr/local/bin/../share/yosys/ice40/cells_map.v:6.21-6.22" - } - }, - "spi_if_ins.o_load_cmd_SB_DFFESR_Q_D_SB_LUT4_I2_O": { - "hide_name": 0, - "bits": [ 561, 554, 569, 570 ], - "attributes": { - "force_downto": "00000000000000000000000000000001", - "src": "/usr/local/bin/../share/yosys/ice40/cells_map.v:6.21-6.22" - } - }, - "spi_if_ins.o_load_cmd_SB_DFFESR_Q_D_SB_LUT4_I2_O_SB_LUT4_I3_O": { - "hide_name": 0, - "bits": [ 564, 574, 73 ], + "bits": [ 576, 572, 566 ], "attributes": { "force_downto": "00000000000000000000000000000001", "src": "/usr/local/bin/../share/yosys/ice40/cells_map.v:6.21-6.22" @@ -26623,13 +26680,13 @@ }, "spi_if_ins.o_load_cmd_SB_DFFESR_Q_E": { "hide_name": 0, - "bits": [ 572 ], + "bits": [ 574 ], "attributes": { } }, "spi_if_ins.o_load_cmd_SB_LUT4_I2_O": { "hide_name": 0, - "bits": [ 49, 79 ], + "bits": [ 48, 75 ], "attributes": { "force_downto": "00000000000000000000000000000001", "src": "/usr/local/bin/../share/yosys/ice40/cells_map.v:6.21-6.22" @@ -26637,13 +26694,13 @@ }, "spi_if_ins.o_load_cmd_SB_LUT4_I2_O_SB_LUT4_I2_O": { "hide_name": 0, - "bits": [ 62 ], + "bits": [ 60 ], "attributes": { } }, "spi_if_ins.o_load_cmd_SB_LUT4_I2_O_SB_LUT4_I3_O": { "hide_name": 0, - "bits": [ 108, 575 ], + "bits": [ 120, 577 ], "attributes": { "force_downto": "00000000000000000000000000000001", "src": "/usr/local/bin/../share/yosys/ice40/cells_map.v:6.21-6.22" @@ -26657,7 +26714,7 @@ }, "spi_if_ins.o_load_cmd_SB_LUT4_I2_O_SB_LUT4_I3_O_SB_LUT4_I3_2_O": { "hide_name": 0, - "bits": [ 152 ], + "bits": [ 151 ], "attributes": { } }, @@ -26669,7 +26726,7 @@ }, "spi_if_ins.o_spi_miso": { "hide_name": 0, - "bits": [ 393 ], + "bits": [ 394 ], "attributes": { "hdlname": "spi_if_ins o_spi_miso", "src": "top.v:92.11-108.5|spi_if.v:17.29-17.39" @@ -26677,7 +26734,7 @@ }, "spi_if_ins.r_tx_byte": { "hide_name": 0, - "bits": [ 584, 583, 582, 581, 580, 579, 578, 577 ], + "bits": [ 586, 585, 584, 583, 582, 581, 580, 579 ], "attributes": { "hdlname": "spi_if_ins r_tx_byte", "src": "top.v:92.11-108.5|spi_if.v:32.17-32.26" @@ -26685,7 +26742,7 @@ }, "spi_if_ins.r_tx_data_valid": { "hide_name": 0, - "bits": [ 587 ], + "bits": [ 589 ], "attributes": { "hdlname": "spi_if_ins r_tx_data_valid", "src": "top.v:92.11-108.5|spi_if.v:31.17-31.32" @@ -26693,7 +26750,7 @@ }, "spi_if_ins.r_tx_data_valid_SB_DFFESR_Q_D": { "hide_name": 0, - "bits": [ 564, 585 ], + "bits": [ 566, 587 ], "attributes": { "force_downto": "00000000000000000000000000000001", "src": "/usr/local/bin/../share/yosys/ice40/cells_map.v:6.21-6.22" @@ -26701,35 +26758,19 @@ }, "spi_if_ins.r_tx_data_valid_SB_DFFESR_Q_D_SB_LUT4_I3_O": { "hide_name": 0, - "bits": [ 576 ], + "bits": [ 578 ], "attributes": { } }, "spi_if_ins.r_tx_data_valid_SB_DFFESR_Q_E": { "hide_name": 0, - "bits": [ 586 ], + "bits": [ 588 ], "attributes": { } }, "spi_if_ins.r_tx_data_valid_SB_LUT4_I3_1_O": { "hide_name": 0, - "bits": [ 577, 594, 589 ], - "attributes": { - "force_downto": "00000000000000000000000000000001", - "src": "/usr/local/bin/../share/yosys/ice40/cells_map.v:6.21-6.22" - } - }, - "spi_if_ins.r_tx_data_valid_SB_LUT4_I3_1_O_SB_LUT4_O_I0": { - "hide_name": 0, - "bits": [ 590, 591, 592, 593 ], - "attributes": { - "force_downto": "00000000000000000000000000000001", - "src": "/usr/local/bin/../share/yosys/ice40/cells_map.v:6.21-6.22" - } - }, - "spi_if_ins.r_tx_data_valid_SB_LUT4_I3_1_O_SB_LUT4_O_I0_SB_LUT4_O_2_I0": { - "hide_name": 0, - "bits": [ 601, 602, 592, 597 ], + "bits": [ 592 ], "attributes": { "force_downto": "00000000000000000000000000000001", "src": "/usr/local/bin/../share/yosys/ice40/cells_map.v:6.21-6.22" @@ -26737,7 +26778,7 @@ }, "spi_if_ins.r_tx_data_valid_SB_LUT4_I3_I2": { "hide_name": 0, - "bits": [ 44, 607, 59 ], + "bits": [ 44, 593, 590 ], "attributes": { "force_downto": "00000000000000000000000000000001", "src": "/usr/local/bin/../share/yosys/ice40/cells_map.v:6.21-6.22" @@ -26745,13 +26786,13 @@ }, "spi_if_ins.r_tx_data_valid_SB_LUT4_I3_O": { "hide_name": 0, - "bits": [ 588 ], + "bits": [ 591 ], "attributes": { } }, "spi_if_ins.spi.SCKr": { "hide_name": 0, - "bits": [ 608, 53, 52 ], + "bits": [ 594, 52, 51 ], "attributes": { "hdlname": "spi_if_ins spi SCKr", "src": "top.v:92.11-108.5|spi_slave.v:80.13-80.17|spi_if.v:42.15-54.6" @@ -26783,7 +26824,7 @@ }, "spi_if_ins.spi.i_sys_clk": { "hide_name": 0, - "bits": [ 60 ], + "bits": [ 58 ], "attributes": { "hdlname": "spi_if_ins spi i_sys_clk", "src": "top.v:92.11-108.5|spi_slave.v:5.23-5.32|spi_if.v:42.15-54.6" @@ -26791,7 +26832,7 @@ }, "spi_if_ins.spi.i_tx_byte": { "hide_name": 0, - "bits": [ 584, 583, 582, 581, 580, 579, 578, 577 ], + "bits": [ 586, 585, 584, 583, 582, 581, 580, 579 ], "attributes": { "hdlname": "spi_if_ins spi i_tx_byte", "src": "top.v:92.11-108.5|spi_slave.v:9.23-9.32|spi_if.v:42.15-54.6" @@ -26799,7 +26840,7 @@ }, "spi_if_ins.spi.i_tx_data_valid": { "hide_name": 0, - "bits": [ 587 ], + "bits": [ 589 ], "attributes": { "hdlname": "spi_if_ins spi i_tx_data_valid", "src": "top.v:92.11-108.5|spi_slave.v:8.23-8.38|spi_if.v:42.15-54.6" @@ -26807,7 +26848,7 @@ }, "spi_if_ins.spi.o_rx_byte": { "hide_name": 0, - "bits": [ 560, 559, 558, 557, 556, 553, 552, 554 ], + "bits": [ 564, 563, 562, 561, 560, 557, 556, 558 ], "attributes": { "hdlname": "spi_if_ins spi o_rx_byte", "src": "top.v:92.11-108.5|spi_slave.v:7.23-7.32|spi_if.v:42.15-54.6" @@ -26815,7 +26856,7 @@ }, "spi_if_ins.spi.o_rx_data_valid": { "hide_name": 0, - "bits": [ 564 ], + "bits": [ 566 ], "attributes": { "hdlname": "spi_if_ins spi o_rx_data_valid", "src": "top.v:92.11-108.5|spi_slave.v:6.23-6.38|spi_if.v:42.15-54.6" @@ -26823,7 +26864,7 @@ }, "spi_if_ins.spi.o_spi_miso": { "hide_name": 0, - "bits": [ 393 ], + "bits": [ 394 ], "attributes": { "hdlname": "spi_if_ins spi o_spi_miso", "src": "top.v:92.11-108.5|spi_slave.v:13.23-13.33|spi_if.v:42.15-54.6" @@ -26831,14 +26872,38 @@ }, "spi_if_ins.spi.o_spi_miso_SB_DFFE_Q_D": { "hide_name": 0, - "bits": [ 618 ], + "bits": [ 604 ], "attributes": { "src": "top.v:92.11-108.5|spi_slave.v:87.3-104.6|spi_if.v:42.15-54.6" } }, + "spi_if_ins.spi.o_spi_miso_SB_DFFE_Q_D_SB_LUT4_O_I2": { + "hide_name": 0, + "bits": [ 579, 605, 592 ], + "attributes": { + "force_downto": "00000000000000000000000000000001", + "src": "/usr/local/bin/../share/yosys/ice40/cells_map.v:6.21-6.22" + } + }, + "spi_if_ins.spi.o_spi_miso_SB_DFFE_Q_D_SB_LUT4_O_I2_SB_LUT4_O_I0": { + "hide_name": 0, + "bits": [ 606, 607, 608, 609 ], + "attributes": { + "force_downto": "00000000000000000000000000000001", + "src": "/usr/local/bin/../share/yosys/ice40/cells_map.v:6.21-6.22" + } + }, + "spi_if_ins.spi.o_spi_miso_SB_DFFE_Q_D_SB_LUT4_O_I2_SB_LUT4_O_I0_SB_LUT4_O_I3": { + "hide_name": 0, + "bits": [ 610, 611, 612, 613 ], + "attributes": { + "force_downto": "00000000000000000000000000000001", + "src": "/usr/local/bin/../share/yosys/ice40/cells_map.v:6.21-6.22" + } + }, "spi_if_ins.spi.r2_rx_done": { "hide_name": 0, - "bits": [ 620 ], + "bits": [ 622 ], "attributes": { "hdlname": "spi_if_ins spi r2_rx_done", "src": "top.v:92.11-108.5|spi_slave.v:22.7-22.17|spi_if.v:42.15-54.6" @@ -26846,7 +26911,7 @@ }, "spi_if_ins.spi.r3_rx_done": { "hide_name": 0, - "bits": [ 621 ], + "bits": [ 623 ], "attributes": { "hdlname": "spi_if_ins spi r3_rx_done", "src": "top.v:92.11-108.5|spi_slave.v:23.7-23.17|spi_if.v:42.15-54.6" @@ -26854,14 +26919,14 @@ }, "spi_if_ins.spi.r3_rx_done_SB_LUT4_I2_O": { "hide_name": 0, - "bits": [ 610 ], + "bits": [ 596 ], "attributes": { "src": "top.v:92.11-108.5|spi_slave.v:66.3-78.6|spi_if.v:42.15-54.6" } }, "spi_if_ins.spi.r_rx_bit_count": { "hide_name": 0, - "bits": [ 55, 57, 56 ], + "bits": [ 54, 56, 55 ], "attributes": { "hdlname": "spi_if_ins spi r_rx_bit_count", "src": "top.v:92.11-108.5|spi_slave.v:17.13-17.27|spi_if.v:42.15-54.6" @@ -26869,7 +26934,7 @@ }, "spi_if_ins.spi.r_rx_bit_count_SB_DFFESR_Q_2_D": { "hide_name": 0, - "bits": [ 624, 57, 56 ], + "bits": [ 626, 56, 55 ], "attributes": { "force_downto": "00000000000000000000000000000001", "src": "top.v:92.11-108.5|spi_slave.v:52.25-52.43|spi_if.v:42.15-54.6|/usr/local/bin/../share/yosys/ice40/arith_map.v:33.23-33.24" @@ -26877,7 +26942,7 @@ }, "spi_if_ins.spi.r_rx_bit_count_SB_DFFESR_Q_D": { "hide_name": 0, - "bits": [ 624, 623, 622 ], + "bits": [ 626, 625, 624 ], "attributes": { "force_downto": "00000000000000000000000000000001", "src": "top.v:92.11-108.5|spi_slave.v:52.25-52.43|spi_if.v:42.15-54.6|/usr/local/bin/../share/yosys/ice40/arith_map.v:33.26-33.27" @@ -26885,7 +26950,7 @@ }, "spi_if_ins.spi.r_rx_bit_count_SB_DFFESR_Q_D_SB_LUT4_O_I3": { "hide_name": 0, - "bits": [ "0", 55, 625 ], + "bits": [ "0", 54, 627 ], "attributes": { "force_downto": "00000000000000000000000000000001", "src": "top.v:92.11-108.5|spi_slave.v:52.25-52.43|spi_if.v:42.15-54.6|/usr/local/bin/../share/yosys/ice40/arith_map.v:51.21-51.22" @@ -26893,7 +26958,7 @@ }, "spi_if_ins.spi.r_rx_byte": { "hide_name": 0, - "bits": [ 617, 616, 615, 614, 613, 612, 611, 609 ], + "bits": [ 603, 602, 601, 600, 599, 598, 597, 595 ], "attributes": { "hdlname": "spi_if_ins spi r_rx_byte", "src": "top.v:92.11-108.5|spi_slave.v:20.13-20.22|spi_if.v:42.15-54.6" @@ -26901,13 +26966,13 @@ }, "spi_if_ins.spi.r_rx_byte_SB_DFFE_Q_E": { "hide_name": 0, - "bits": [ 627 ], + "bits": [ 629 ], "attributes": { } }, "spi_if_ins.spi.r_rx_done": { "hide_name": 0, - "bits": [ 619 ], + "bits": [ 621 ], "attributes": { "hdlname": "spi_if_ins spi r_rx_done", "src": "top.v:92.11-108.5|spi_slave.v:21.7-21.16|spi_if.v:42.15-54.6" @@ -26915,13 +26980,13 @@ }, "spi_if_ins.spi.r_rx_done_SB_DFFESR_Q_E": { "hide_name": 0, - "bits": [ 634 ], + "bits": [ 636 ], "attributes": { } }, "spi_if_ins.spi.r_temp_rx_byte": { "hide_name": 0, - "bits": [ 633, 632, 631, 630, 629, 628, 626, "x" ], + "bits": [ 635, 634, 633, 632, 631, 630, 628, "x" ], "attributes": { "hdlname": "spi_if_ins spi r_temp_rx_byte", "src": "top.v:92.11-108.5|spi_slave.v:19.13-19.27|spi_if.v:42.15-54.6" @@ -26929,7 +26994,7 @@ }, "spi_if_ins.spi.r_tx_bit_count": { "hide_name": 0, - "bits": [ 597, 592, 598 ], + "bits": [ 612, 609, 616 ], "attributes": { "hdlname": "spi_if_ins spi r_tx_bit_count", "src": "top.v:92.11-108.5|spi_slave.v:18.13-18.27|spi_if.v:42.15-54.6" @@ -26937,7 +27002,7 @@ }, "spi_if_ins.spi.r_tx_bit_count_SB_DFFESR_Q_D": { "hide_name": 0, - "bits": [ 635, 639, 638 ], + "bits": [ 637, 641, 640 ], "attributes": { "force_downto": "00000000000000000000000000000001", "src": "top.v:92.11-108.5|spi_slave.v:95.27-95.45|spi_if.v:42.15-54.6|/usr/local/bin/../share/yosys/ice40/arith_map.v:33.26-33.27" @@ -26945,7 +27010,7 @@ }, "spi_if_ins.spi.r_tx_bit_count_SB_DFFESR_Q_D_SB_LUT4_O_I3": { "hide_name": 0, - "bits": [ "1", 597, 637 ], + "bits": [ "1", 612, 639 ], "attributes": { "force_downto": "00000000000000000000000000000001", "src": "top.v:92.11-108.5|spi_slave.v:95.27-95.45|spi_if.v:42.15-54.6|/usr/local/bin/../share/yosys/ice40/arith_map.v:51.21-51.22" @@ -26953,13 +27018,13 @@ }, "spi_if_ins.spi.r_tx_bit_count_SB_DFFESR_Q_R": { "hide_name": 0, - "bits": [ 636 ], + "bits": [ 638 ], "attributes": { } }, "spi_if_ins.spi.r_tx_byte": { "hide_name": 0, - "bits": [ 605, 603, 595, 599, 606, 604, 596, 600 ], + "bits": [ 610, 619, 614, 617, 611, 620, 615, 618 ], "attributes": { "hdlname": "spi_if_ins spi r_tx_byte", "src": "top.v:92.11-108.5|spi_slave.v:24.13-24.22|spi_if.v:42.15-54.6" @@ -26967,13 +27032,13 @@ }, "spi_if_ins.spi.r_tx_byte_SB_DFFESR_Q_E": { "hide_name": 0, - "bits": [ 640 ], + "bits": [ 642 ], "attributes": { } }, "spi_if_ins.spi.r_tx_byte_SB_DFFESR_Q_E_SB_LUT4_O_I2": { "hide_name": 0, - "bits": [ 592, 641, 589 ], + "bits": [ 609, 643, 592 ], "attributes": { "force_downto": "00000000000000000000000000000001", "src": "/usr/local/bin/../share/yosys/ice40/cells_map.v:6.21-6.22" @@ -26981,7 +27046,7 @@ }, "spi_if_ins.state_if": { "hide_name": 0, - "bits": [ 562, 563, 561 ], + "bits": [ 567, 568, 565 ], "attributes": { "hdlname": "spi_if_ins state_if", "src": "top.v:92.11-108.5|spi_if.v:28.17-28.25" @@ -26989,7 +27054,7 @@ }, "spi_if_ins.state_if_SB_DFFESR_Q_D": { "hide_name": 0, - "bits": [ 642, 554, 574, 564 ], + "bits": [ 644, 558, 576, 566 ], "attributes": { "force_downto": "00000000000000000000000000000001", "src": "/usr/local/bin/../share/yosys/ice40/cells_map.v:6.21-6.22" @@ -26997,26 +27062,26 @@ }, "spi_if_ins.state_if_SB_DFFESR_Q_R": { "hide_name": 0, - "bits": [ 567 ], + "bits": [ 571 ], "attributes": { } }, "spi_if_ins.state_if_SB_DFFE_Q_D": { "hide_name": 0, - "bits": [ 644 ], + "bits": [ 646 ], "attributes": { "src": "top.v:92.11-108.5|spi_if.v:56.5-111.8" } }, "spi_if_ins.state_if_SB_DFFE_Q_E": { "hide_name": 0, - "bits": [ 643 ], + "bits": [ 645 ], "attributes": { } }, "spi_if_ins.w_rx_data": { "hide_name": 0, - "bits": [ 560, 559, 558, 557, 556, 553, 552, 554 ], + "bits": [ 564, 563, 562, 561, 560, 557, 556, 558 ], "attributes": { "hdlname": "spi_if_ins w_rx_data", "src": "top.v:92.11-108.5|spi_if.v:30.17-30.26" @@ -27024,7 +27089,7 @@ }, "spi_if_ins.w_rx_data_valid": { "hide_name": 0, - "bits": [ 564 ], + "bits": [ 566 ], "attributes": { "hdlname": "spi_if_ins w_rx_data_valid", "src": "top.v:92.11-108.5|spi_if.v:29.17-29.32" @@ -27032,7 +27097,7 @@ }, "sys_ctrl_ins.i_cs": { "hide_name": 0, - "bits": [ 532 ], + "bits": [ 536 ], "attributes": { "hdlname": "sys_ctrl_ins i_cs", "src": "top.v:113.13-126.5|sys_ctrl.v:9.29-9.33" @@ -27040,7 +27105,7 @@ }, "sys_ctrl_ins.i_data_in": { "hide_name": 0, - "bits": [ 64, 61, 147, 146, 145, 143, 141, 138 ], + "bits": [ 62, 59, 147, 146, 145, 143, 141, 138 ], "attributes": { "hdlname": "sys_ctrl_ins i_data_in", "src": "top.v:113.13-126.5|sys_ctrl.v:7.29-7.38" @@ -27056,7 +27121,7 @@ }, "sys_ctrl_ins.i_fetch_cmd": { "hide_name": 0, - "bits": [ 528 ], + "bits": [ 532 ], "attributes": { "hdlname": "sys_ctrl_ins i_fetch_cmd", "src": "top.v:113.13-126.5|sys_ctrl.v:10.29-10.40" @@ -27064,7 +27129,7 @@ }, "sys_ctrl_ins.i_ioc": { "hide_name": 0, - "bits": [ 82, 86, 167, 166, 165 ], + "bits": [ 78, 114, 167, 166, 165 ], "attributes": { "hdlname": "sys_ctrl_ins i_ioc", "src": "top.v:113.13-126.5|sys_ctrl.v:6.29-6.34" @@ -27072,7 +27137,7 @@ }, "sys_ctrl_ins.i_load_cmd": { "hide_name": 0, - "bits": [ 573 ], + "bits": [ 575 ], "attributes": { "hdlname": "sys_ctrl_ins i_load_cmd", "src": "top.v:113.13-126.5|sys_ctrl.v:11.29-11.39" @@ -27088,7 +27153,7 @@ }, "sys_ctrl_ins.i_sys_clk": { "hide_name": 0, - "bits": [ 60 ], + "bits": [ 58 ], "attributes": { "hdlname": "sys_ctrl_ins i_sys_clk", "src": "top.v:113.13-126.5|sys_ctrl.v:4.29-4.38" @@ -27096,37 +27161,37 @@ }, "sys_ctrl_ins.o_data_out": { "hide_name": 0, - "bits": [ 646, "0", "0", "0", "0", "0", "0", "0" ], + "bits": [ 648, "0", "0", "0", "0", "0", "0", "0" ], "attributes": { "hdlname": "sys_ctrl_ins o_data_out", "src": "top.v:113.13-126.5|sys_ctrl.v:8.29-8.39" } }, + "sys_ctrl_ins.o_data_out_SB_DFFE_Q_D": { + "hide_name": 0, + "bits": [ 120, 144, 159, 5 ], + "attributes": { + "force_downto": "00000000000000000000000000000001", + "src": "/usr/local/bin/../share/yosys/ice40/cells_map.v:6.21-6.22" + } + }, "sys_ctrl_ins.o_data_out_SB_DFFE_Q_E": { "hide_name": 0, - "bits": [ 645 ], + "bits": [ 647 ], "attributes": { } }, "sys_ctrl_ins.o_data_out_SB_DFFE_Q_E_SB_LUT4_O_I1": { "hide_name": 0, - "bits": [ 86, 82, 85 ], + "bits": [ 114, 115, 78 ], "attributes": { "force_downto": "00000000000000000000000000000001", "src": "/usr/local/bin/../share/yosys/ice40/cells_map.v:6.21-6.22" } }, - "sys_ctrl_ins.o_data_out_SB_DFFE_Q_E_SB_LUT4_O_I1_SB_LUT4_I2_O": { + "sys_ctrl_ins.o_data_out_SB_DFFE_Q_E_SB_LUT4_O_I1_SB_LUT4_I3_O": { "hide_name": 0, - "bits": [ 77, 63, 46, 27 ], - "attributes": { - "force_downto": "00000000000000000000000000000001", - "src": "/usr/local/bin/../share/yosys/ice40/cells_map.v:6.21-6.22" - } - }, - "sys_ctrl_ins.o_data_out_SB_LUT4_I0_I2": { - "hide_name": 0, - "bits": [ 411, 101, 531 ], + "bits": [ 73, 61, 46, 27 ], "attributes": { "force_downto": "00000000000000000000000000000001", "src": "/usr/local/bin/../share/yosys/ice40/cells_map.v:6.21-6.22" @@ -27134,7 +27199,7 @@ }, "sys_ctrl_ins.o_soft_reset": { "hide_name": 0, - "bits": [ 49 ], + "bits": [ 48 ], "attributes": { "hdlname": "sys_ctrl_ins o_soft_reset", "src": "top.v:113.13-126.5|sys_ctrl.v:13.29-13.41" @@ -27142,13 +27207,13 @@ }, "sys_ctrl_ins.o_soft_reset_SB_DFFESS_Q_E": { "hide_name": 0, - "bits": [ 647 ], + "bits": [ 649 ], "attributes": { } }, "sys_ctrl_ins.o_soft_reset_SB_DFFESS_Q_S": { "hide_name": 0, - "bits": [ 648 ], + "bits": [ 650 ], "attributes": { "force_downto": "00000000000000000000000000000001", "src": "top.v:113.13-126.5|sys_ctrl.v:72.17-72.36|/usr/local/bin/../share/yosys/cmp2lut.v:24.22-24.23" @@ -27156,7 +27221,7 @@ }, "sys_ctrl_ins.reset_cmd": { "hide_name": 0, - "bits": [ 649 ], + "bits": [ 651 ], "attributes": { "hdlname": "sys_ctrl_ins reset_cmd", "src": "top.v:113.13-126.5|sys_ctrl.v:35.9-35.18" @@ -27164,19 +27229,19 @@ }, "sys_ctrl_ins.reset_cmd_SB_DFFESR_Q_E": { "hide_name": 0, - "bits": [ 654 ], + "bits": [ 656 ], "attributes": { } }, "sys_ctrl_ins.reset_cmd_SB_DFFESR_Q_R": { "hide_name": 0, - "bits": [ 655 ], + "bits": [ 657 ], "attributes": { } }, "sys_ctrl_ins.reset_count": { "hide_name": 0, - "bits": [ 653, 650, 652, 651 ], + "bits": [ 655, 653, 654, 652 ], "attributes": { "hdlname": "sys_ctrl_ins reset_count", "src": "top.v:113.13-126.5|sys_ctrl.v:34.15-34.26" @@ -27184,31 +27249,31 @@ }, "sys_ctrl_ins.reset_count_SB_DFFESR_Q_1_D": { "hide_name": 0, - "bits": [ 658 ], + "bits": [ 660 ], "attributes": { } }, "sys_ctrl_ins.reset_count_SB_DFFESR_Q_2_D": { "hide_name": 0, - "bits": [ 660 ], + "bits": [ 662 ], "attributes": { } }, "sys_ctrl_ins.reset_count_SB_DFFESR_Q_3_D": { "hide_name": 0, - "bits": [ 661 ], + "bits": [ 663 ], "attributes": { } }, "sys_ctrl_ins.reset_count_SB_DFFESR_Q_D": { "hide_name": 0, - "bits": [ 656 ], + "bits": [ 659 ], "attributes": { } }, "sys_ctrl_ins.reset_count_SB_DFFESR_Q_D_SB_LUT4_O_I3": { "hide_name": 0, - "bits": [ "0", 653, 659, 662 ], + "bits": [ "0", 655, 661, 664 ], "attributes": { "force_downto": "00000000000000000000000000000001", "src": "top.v:113.13-126.5|sys_ctrl.v:73.32-73.50|/usr/local/bin/../share/yosys/ice40/arith_map.v:51.21-51.22" @@ -27216,132 +27281,132 @@ }, "sys_ctrl_ins.reset_count_SB_DFFESR_Q_E": { "hide_name": 0, - "bits": [ 657 ], + "bits": [ 658 ], "attributes": { } }, "w_clock_sys": { "hide_name": 0, - "bits": [ 60 ], + "bits": [ 58 ], "attributes": { "src": "top.v:67.16-67.27" } }, "w_cs": { "hide_name": 0, - "bits": [ 532, 74, 518, 533 ], + "bits": [ 536, 70, 522, 537 ], "attributes": { "src": "top.v:71.16-71.20" } }, "w_fetch": { "hide_name": 0, - "bits": [ 528 ], + "bits": [ 532 ], "attributes": { "src": "top.v:72.16-72.23" } }, "w_ioc": { "hide_name": 0, - "bits": [ 82, 86, 167, 166, 165 ], + "bits": [ 78, 114, 167, 166, 165 ], "attributes": { "src": "top.v:68.16-68.21" } }, "w_load": { "hide_name": 0, - "bits": [ 573 ], + "bits": [ 575 ], "attributes": { "src": "top.v:73.16-73.22" } }, "w_lvds_rx_09_d0": { "hide_name": 0, - "bits": [ 19 ], + "bits": [ 20 ], "attributes": { - "src": "top.v:239.9-239.24" + "src": "top.v:241.9-241.24" } }, "w_lvds_rx_09_d1": { "hide_name": 0, - "bits": [ 20 ], + "bits": [ 19 ], "attributes": { - "src": "top.v:240.9-240.24" + "src": "top.v:242.9-242.24" } }, "w_rx_09_fifo_data": { "hide_name": 0, - "bits": [ 314, 312, 308, 306, 304, 302, 300, 298, 296, 294, 292, 290, 286, 284, 282, 280, 278, 276, 274, 272, 270, 268, 326, 324, 322, 320, 318, 316, 310, 288, 266, 264 ], + "bits": [ 310, 308, 304, 302, 300, 298, 296, 294, 292, 290, 288, 286, 282, 280, 278, 276, 274, 272, 270, 268, 266, 264, 322, 320, 318, 316, 314, 312, 306, 284, 262, 260 ], "attributes": { - "src": "top.v:248.16-248.33" + "src": "top.v:250.16-250.33" } }, "w_rx_09_fifo_empty": { "hide_name": 0, "bits": [ 23 ], "attributes": { - "src": "top.v:245.9-245.27" + "src": "top.v:247.9-247.27" } }, "w_rx_09_fifo_full": { "hide_name": 0, "bits": [ 24 ], "attributes": { - "src": "top.v:244.9-244.26" + "src": "top.v:246.9-246.26" } }, "w_rx_09_fifo_pull": { "hide_name": 0, "bits": [ 22 ], "attributes": { - "src": "top.v:249.9-249.26" + "src": "top.v:251.9-251.26" } }, "w_rx_09_fifo_pulled_data": { "hide_name": 0, - "bits": [ 432, 433, 434, 435, 436, 437, 438, 439, 440, 441, 442, 443, 444, 445, 446, 447, 416, 417, 418, 419, 420, 421, 422, 423, 424, 425, 426, 427, 428, 429, 430, 431 ], + "bits": [ 433, 434, 435, 436, 437, 438, 439, 440, 441, 442, 443, 444, 445, 446, 447, 448, 417, 418, 419, 420, 421, 422, 423, 424, 425, 426, 427, 428, 429, 430, 431, 432 ], "attributes": { - "src": "top.v:250.16-250.40" + "src": "top.v:252.16-252.40" } }, "w_rx_09_fifo_push": { "hide_name": 0, "bits": [ 21 ], "attributes": { - "src": "top.v:247.9-247.26" + "src": "top.v:249.9-249.26" } }, "w_rx_09_fifo_write_clk": { "hide_name": 0, "bits": [ 18 ], "attributes": { - "src": "top.v:246.9-246.31" + "src": "top.v:248.9-248.31" } }, "w_rx_24_fifo_empty": { "hide_name": 0, "bits": [ "x" ], "attributes": { - "src": "top.v:253.9-253.27" + "src": "top.v:255.9-255.27" } }, "w_rx_24_fifo_full": { "hide_name": 0, "bits": [ "x" ], "attributes": { - "src": "top.v:252.9-252.26" + "src": "top.v:254.9-254.26" } }, "w_rx_24_fifo_pulled_data": { "hide_name": 0, "bits": [ "x", "x", "x", "x", "x", "x", "x", "x", "x", "x", "x", "x", "x", "x", "x", "x", "x", "x", "x", "x", "x", "x", "x", "x", "x", "x", "x", "x", "x", "x", "x", "x" ], "attributes": { - "src": "top.v:258.16-258.40" + "src": "top.v:260.16-260.40" } }, "w_rx_data": { "hide_name": 0, - "bits": [ 64, 61, 147, 146, 145, 143, 141, 138 ], + "bits": [ 62, 59, 147, 146, 145, 143, 141, 138 ], "attributes": { "src": "top.v:69.16-69.25" } @@ -27350,74 +27415,74 @@ "hide_name": 0, "bits": [ 28, 29, 30 ], "attributes": { - "src": "top.v:345.15-345.25" + "src": "top.v:347.15-347.25" } }, "w_smi_data_input": { "hide_name": 0, "bits": [ 32, 33, 34, 35, 36, 37, 38, 39 ], "attributes": { - "src": "top.v:347.15-347.31" + "src": "top.v:349.15-349.31" } }, "w_smi_data_output": { "hide_name": 0, - "bits": [ 32, 260, 259, 258, 257, 256, 255, 254 ], + "bits": [ 32, 257, 256, 255, 254, 253, 252, 251 ], "attributes": { - "src": "top.v:346.15-346.32" + "src": "top.v:348.15-348.32" } }, "w_smi_read_req": { "hide_name": 0, "bits": [ "1" ], "attributes": { - "src": "top.v:348.9-348.23" + "src": "top.v:350.9-350.23" } }, "w_smi_test": { "hide_name": 0, "bits": [ "0" ], "attributes": { - "src": "top.v:351.9-351.19" + "src": "top.v:353.9-353.19" } }, "w_smi_write_req": { "hide_name": 0, "bits": [ "x" ], "attributes": { - "src": "top.v:349.9-349.24" + "src": "top.v:351.9-351.24" } }, "w_smi_writing": { "hide_name": 0, "bits": [ 30 ], "attributes": { - "src": "top.v:350.9-350.22" + "src": "top.v:352.9-352.22" } }, "w_soft_reset": { "hide_name": 0, - "bits": [ 49 ], + "bits": [ 48 ], "attributes": { "src": "top.v:75.16-75.28" } }, "w_tx_data_io": { "hide_name": 0, - "bits": [ 136, 119, 101, 123, 128, 105, 112, 114 ], + "bits": [ 135, 117, 94, 122, 127, 98, 105, 110 ], "attributes": { "src": "top.v:78.16-78.28" } }, "w_tx_data_smi": { "hide_name": 0, - "bits": [ 526, 525, "0", "0" ], + "bits": [ 530, 529, "0", "0" ], "attributes": { } }, "w_tx_data_sys": { "hide_name": 0, - "bits": [ 646, "0", "0", "0", "0", "0", "0", "0" ], + "bits": [ 648, "0", "0", "0", "0", "0", "0", "0" ], "attributes": { "src": "top.v:77.16-77.29" } diff --git a/firmware/top.v b/firmware/top.v index 0d44613..a1c4c55 100644 --- a/firmware/top.v +++ b/firmware/top.v @@ -199,10 +199,12 @@ module top( .PACKAGE_PIN(i_iq_rx_clk_p), // Physical connection to 'i_iq_rx_clk_p' .D_IN_0 ( lvds_clock )); // Wire out to 'lvds_clock' - SB_GB lvds_clk_buffer ( // Improve 'lvds_clock' fanout by pushing it into + /*SB_GB lvds_clk_buffer ( // Improve 'lvds_clock' fanout by pushing it into // a global high-fanout buffer .USER_SIGNAL_TO_GLOBAL_BUFFER (lvds_clock), .GLOBAL_BUFFER_OUTPUT(lvds_clock_buf) ); +*/ + assign lvds_clock_buf = lvds_clock; // optional for better fanout: seperate the 09 and the 24 buffers and give them // both a semparate constraint in the pcf file. @@ -212,25 +214,25 @@ module top( .PIN_TYPE(6'b000000), // Input only, DDR mode (sample on both pos edge and // negedge of the input clock) .IO_STANDARD("SB_LVDS_INPUT"),// LVDS standard - .NEG_TRIGGER(1'b0) // The signal is not negated + .NEG_TRIGGER(1'b1) // The signal is not negated ) iq_rx_24 ( .PACKAGE_PIN(i_iq_rx_24_n), // Attention: this is the 'n' input, thus the actual values // will need to be negated (PCB layout constraint) .INPUT_CLK (lvds_clock_buf), // The I/O sampling clock with DDR - .D_IN_0 ( w_lvds_rx_24_d1 ), // the 0 deg data output - .D_IN_1 ( w_lvds_rx_24_d0 ) );// the 180 deg data output + .D_IN_0 ( w_lvds_rx_24_d0 ), // the 0 deg data output + .D_IN_1 ( w_lvds_rx_24_d1 ) );// the 180 deg data output // Differential 0.9GHz I/Q DDR signal SB_IO #( .PIN_TYPE(6'b000000), // Input only, DDR mode (sample on both pos edge and // negedge of the input clock) .IO_STANDARD("SB_LVDS_INPUT"),// LVDS standard - .NEG_TRIGGER(1'b1) // The signal is negated in hardware + .NEG_TRIGGER(1'b0) // The signal is negated in hardware ) iq_rx_09 ( .PACKAGE_PIN(i_iq_rx_09_p), .INPUT_CLK (lvds_clock_buf), // The I/O sampling clock with DDR - .D_IN_0 ( w_lvds_rx_09_d1 ), // the 0 deg data output - .D_IN_1 ( w_lvds_rx_09_d0 ) );// the 180 deg data output + .D_IN_0 ( w_lvds_rx_09_d0 ), // the 0 deg data output + .D_IN_1 ( w_lvds_rx_09_d1 ) );// the 180 deg data output //========================================================================= @@ -359,7 +361,8 @@ module top( // Testing - output the clock signal (positive and negative) to the PMOD assign io_pmod[0] = lvds_clock_buf; - assign io_pmod[2:1] = {w_lvds_rx_09_d1, w_lvds_rx_09_d0}; + assign io_pmod[1] = w_lvds_rx_09_d1; + assign io_pmod[2] = w_lvds_rx_09_d0; assign io_pmod[3] = w_rx_09_fifo_push; assign io_pmod[4] = w_rx_09_fifo_pull; assign io_pmod[5] = w_rx_09_fifo_empty; diff --git a/software/libcariboulite/src/at86rf215/build/test_at86rf215 b/software/libcariboulite/src/at86rf215/build/test_at86rf215 index 2db53f407197c048f0c9d9d874737e9b34c2860c..28484b2d1bee2ff87336088ec29e43223a1b4a81 100755 GIT binary patch delta 84 zcmV-a0IUCumJW=T4zQpB6s%ao@%42Lu*Lm^!i(21peTRl6|=Mf@EHNRv!xqvCKv#~ qpyLBTpy2?(jpYn5py2^fpy2{=py7ioLWe9u0f#I?0=Fze1K>!q^Ch+b delta 63 zcmV-F0Kor@mJW=T4zQpB6a)st@JsUVs++X&$*miuSU9kTv9q)R@EHM^v!xqvCX<{( V9D^`IhcH3`hcH3{w=hBj+(@nQ8y^4w diff --git a/software/libcariboulite/src/at86rf215/test_at86rf215.c b/software/libcariboulite/src/at86rf215/test_at86rf215.c index 2ef0201..96f5fb0 100644 --- a/software/libcariboulite/src/at86rf215/test_at86rf215.c +++ b/software/libcariboulite/src/at86rf215/test_at86rf215.c @@ -112,7 +112,7 @@ void test_at86rf215_sweep_frequencies(at86rf215_st* dev, int test_at86rf215_continues_iq_rx (at86rf215_st* dev, at86rf215_rf_channel_en radio, uint32_t freq_hz, int usec_timeout) { - at86rf215_setup_iq_radio_receive (dev, radio, freq_hz, 0, at86rf215_iq_clock_data_skew_4_906ns); + at86rf215_setup_iq_radio_receive (dev, radio, freq_hz, 0, at86rf215_iq_clock_data_skew_1_906ns); printf("Started I/Q RX session for Radio %d, Freq: %d Hz, timeout: %d usec (0=infinity)\n", radio, freq_hz, usec_timeout);