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updated mixer params

bug_fixes_integration_tx
David Michaeli 2023-02-16 16:29:17 +00:00
rodzic fde23c851a
commit ecfd56782f
3 zmienionych plików z 25 dodań i 16 usunięć
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10
software/libcariboulite/src/caribou_smi/caribou_smi.c
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@ -233,6 +233,7 @@ static int caribou_smi_find_buffer_offset(caribou_smi_st* dev, uint8_t *buffer,
//=========================================================================
static int caribou_smi_rx_data_analyze(caribou_smi_st* dev,
caribou_smi_channel_en channel,
uint8_t* data, size_t data_length,
caribou_smi_sample_complex_int16* samples_out,
caribou_smi_sample_meta* meta_offset)
@ -289,6 +290,13 @@ static int caribou_smi_rx_data_analyze(caribou_smi_st* dev,
if (cmplx_vec[i].i >= (int16_t)0x1000) cmplx_vec[i].i -= (int16_t)0x2000;
if (cmplx_vec[i].q >= (int16_t)0x1000) cmplx_vec[i].q -= (int16_t)0x2000;
// reverse phase in the high channel
if (channel == caribou_smi_channel_2400)
{
cmplx_vec[i].i = cmplx_vec[i].q;
cmplx_vec[i].q = cmplx_vec[i].i;
}
}
}
@ -547,7 +555,7 @@ int caribou_smi_read(caribou_smi_st* dev, caribou_smi_channel_en channel,
}
else
{
int data_affset = caribou_smi_rx_data_analyze(dev, dev->read_temp_buffer, ret, sample_offset, meta_offset);
int data_affset = caribou_smi_rx_data_analyze(dev, channel, dev->read_temp_buffer, ret, sample_offset, meta_offset);
if (data_affset < 0)
{
return -1;

7
software/libcariboulite/src/cariboulite_radio.c
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@ -75,17 +75,17 @@ int cariboulite_radio_ext_ref ( sys_st *sys, cariboulite_ext_ref_freq_en ref)
{
case cariboulite_ext_ref_26mhz:
ZF_LOGD("Setting ext_ref = 26MHz");
at86rf215_set_clock_output(&sys->modem, at86rf215_drive_current_2ma, at86rf215_clock_out_freq_26mhz);
at86rf215_set_clock_output(&sys->modem, at86rf215_drive_current_8ma, at86rf215_clock_out_freq_26mhz);
rffc507x_setup_reference_freq(&sys->mixer, 26e6);
break;
case cariboulite_ext_ref_32mhz:
ZF_LOGD("Setting ext_ref = 32MHz");
at86rf215_set_clock_output(&sys->modem, at86rf215_drive_current_2ma, at86rf215_clock_out_freq_32mhz);
at86rf215_set_clock_output(&sys->modem, at86rf215_drive_current_8ma, at86rf215_clock_out_freq_32mhz);
rffc507x_setup_reference_freq(&sys->mixer, 32e6);
break;
case cariboulite_ext_ref_off:
ZF_LOGD("Setting ext_ref = OFF");
at86rf215_set_clock_output(&sys->modem, at86rf215_drive_current_2ma, at86rf215_clock_out_freq_off);
at86rf215_set_clock_output(&sys->modem, at86rf215_drive_current_8ma, at86rf215_clock_out_freq_off);
default:
return -1;
break;
@ -660,7 +660,6 @@ int cariboulite_radio_set_frequency(cariboulite_radio_state_st* radio,
if (f_rf_mod_32 > 16e6) f_rf_mod_32 = 32e6 - f_rf_mod_32;
if (f_rf_mod_26 > 13e6) f_rf_mod_26 = 26e6 - f_rf_mod_26;
ext_ref_choice = f_rf_mod_32 > f_rf_mod_26 ? cariboulite_ext_ref_32mhz : cariboulite_ext_ref_26mhz;
//ext_ref_choice = cariboulite_ext_ref_26mhz;
cariboulite_radio_ext_ref (radio->sys, ext_ref_choice);
// Decide the conversion direction and IF/RF/LO

24
software/libcariboulite/src/rffc507x/rffc507x.c
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@ -43,7 +43,6 @@
#define LO_MAX 5400
#define LO_MAX_HZ (LO_MAX*1e6)
#define FREQ_ONE_MHZ (1000*1000)
//===========================================================================
// Default register values
@ -93,7 +92,8 @@ static inline void rffc507x_reg_commit(rffc507x_st* dev, uint8_t r)
int rffc507x_regs_commit(rffc507x_st* dev)
{
int r;
for (r = 0; r < RFFC507X_NUM_REGS; r++) {
for (r = 0; r < RFFC507X_NUM_REGS; r++)
{
if ((dev->rffc507x_regs_dirty >> r) & 0x1)
{
rffc507x_reg_commit(dev, r);
@ -120,10 +120,10 @@ int rffc507x_init( rffc507x_st* dev,
dev->io_spi = io_spi;
/* Configure GPIO pins. */
// Configure GPIO pins
io_utils_setup_gpio(dev->reset_pin, io_utils_dir_output, io_utils_pull_up);
/* set to known state */
// set to known state
rffc507x_reset(dev);
dev->io_spi_handle = io_utils_spi_add_chip(dev->io_spi, dev->cs_pin, 5000000, 0, 0,
@ -143,17 +143,19 @@ int rffc507x_init( rffc507x_st* dev,
// interface
set_RFFC507X_ENBL(dev, 0); // The device is disabled
// For the RFFC5072 mixer 2 and register bank PLL2 are normally used
set_RFFC507X_MODE(dev, 1);
// put zeros in freq contol registers
set_RFFC507X_P2VCOSEL(dev, 0);
set_RFFC507X_CTMAX(dev, 127);
set_RFFC507X_CTMIN(dev, 0);
set_RFFC507X_P2CTV(dev, 12);
set_RFFC507X_P1CTV(dev, 12);
//set_RFFC507X_P2VCOSEL(dev, 0);
//set_RFFC507X_CTMAX(dev, 127);
//set_RFFC507X_CTMIN(dev, 0);
//set_RFFC507X_P2CTV(dev, 12);
//set_RFFC507X_P1CTV(dev, 12);
set_RFFC507X_RGBYP(dev, 1);
set_RFFC507X_P2MIXIDD(dev, 4);
set_RFFC507X_P1MIXIDD(dev, 4);
//set_RFFC507X_P2MIXIDD(dev, 4);
//set_RFFC507X_P1MIXIDD(dev, 4);
// Others
set_RFFC507X_LDEN(dev, 1);