kopia lustrzana https://github.com/cariboulabs/cariboulite
update and adapted firmware for tx
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125a843908
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23737
firmware/top.asc
23737
firmware/top.asc
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BIN
firmware/top.bin
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firmware/top.bin
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5661
firmware/top.blif
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firmware/top.blif
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29942
firmware/top.json
29942
firmware/top.json
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@ -149,6 +149,7 @@ module top (
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wire w_debug_fifo_pull;
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wire w_debug_smi_test;
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wire w_debug_lb_tx;
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wire [3:0] tx_sample_gap;
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// IO CTRL
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io_ctrl io_ctrl_ins (
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@ -180,9 +181,6 @@ module top (
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.o_mixer_en(/*o_mixer_en*/)
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);
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assign o_led0 = i_smi_a2;
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assign o_led1 = i_smi_a3;
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//=========================================================================
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// CONBINATORIAL ASSIGNMENTS
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//=========================================================================
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@ -273,8 +271,8 @@ module top (
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) iq_tx_p (
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.PACKAGE_PIN(o_iq_tx_p),
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.OUTPUT_CLK(lvds_clock_buf),
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.D_OUT_0(~w_lvds_tx_d1),
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.D_OUT_1(~w_lvds_tx_d0)
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.D_OUT_0(~w_lvds_tx_d0),
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.D_OUT_1(~w_lvds_tx_d1)
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);
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// Inverting, N-side of pair
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@ -284,8 +282,8 @@ module top (
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) iq_tx_n (
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.PACKAGE_PIN(o_iq_tx_n),
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.OUTPUT_CLK(lvds_clock_buf),
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.D_OUT_0(w_lvds_tx_d1),
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.D_OUT_1(w_lvds_tx_d0)
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.D_OUT_0(w_lvds_tx_d0),
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.D_OUT_1(w_lvds_tx_d1)
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);
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@ -312,11 +310,9 @@ module top (
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wire [31:0] w_rx_24_fifo_data;
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lvds_rx lvds_rx_09_inst (
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.i_rst_b (1'b1/*i_rst_b*/),
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.i_rst_b (i_rst_b),
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.i_ddr_clk(lvds_clock_buf),
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.i_ddr_data({w_lvds_rx_09_d0, w_lvds_rx_09_d1}),
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.i_fifo_full(w_rx_fifo_full),
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.o_fifo_write_clk(w_rx_09_fifo_write_clk),
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.o_fifo_push(w_rx_09_fifo_push),
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@ -327,7 +323,7 @@ module top (
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);
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lvds_rx lvds_rx_24_inst (
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.i_rst_b (1'b1/*i_rst_b*/),
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.i_rst_b (i_rst_b),
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.i_ddr_clk(lvds_clock_buf),
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.i_ddr_data({!w_lvds_rx_24_d0, !w_lvds_rx_24_d1}),
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@ -356,11 +352,11 @@ module top (
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.ADDR_WIDTH(10), // 1024 samples
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.DATA_WIDTH(16), // 2x16 for I and Q
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) rx_fifo (
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.wr_rst_b_i(1'b1/*i_rst_b*/),
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.wr_rst_b_i(i_rst_b),
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.wr_clk_i(w_rx_fifo_write_clk),
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.wr_en_i(w_rx_fifo_push),
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.wr_data_i(w_rx_fifo_data),
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.rd_rst_b_i(1'b1/*i_rst_b*/),
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.rd_rst_b_i(i_rst_b),
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.rd_clk_i(w_clock_sys),
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.rd_en_i(w_rx_fifo_pull),
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.rd_data_o(w_rx_fifo_pulled_data),
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@ -387,6 +383,7 @@ module top (
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.i_sample_gap(tx_sample_gap),
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.i_tx_state(~w_smi_data_direction),
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.i_sync_input(1'b0),
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.i_debug_lb(w_debug_lb_tx),
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.o_tx_state_bit(),
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.o_sync_state_bit(),
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);
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@ -399,20 +396,19 @@ module top (
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wire [31:0] w_tx_fifo_data;
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wire w_tx_fifo_pull;
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wire [31:0] w_tx_fifo_pulled_data;
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wire [3:0] tx_sample_gap;
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complex_fifo #(
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.ADDR_WIDTH(10), // 1024 samples
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.DATA_WIDTH(16), // 2x16 for I and Q
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) tx_fifo (
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// smi clock is writing
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.wr_rst_b_i(1'b1/*i_rst_b*/),
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.wr_rst_b_i(i_rst_b),
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.wr_clk_i(w_tx_fifo_clock),
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.wr_en_i(w_tx_fifo_push),
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.wr_data_i(w_tx_fifo_data),
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// lvds clock is pulling (reading)
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.rd_rst_b_i(1'b1/*i_rst_b*/),
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.rd_rst_b_i(i_rst_b),
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.rd_clk_i(w_tx_fifo_read_clk),
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.rd_en_i(w_tx_fifo_pull),
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.rd_data_o(w_tx_fifo_pulled_data),
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@ -450,7 +446,7 @@ module top (
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.o_smi_read_req(w_smi_read_req),
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.o_smi_write_req(w_smi_write_req),
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.o_channel(/*channel*/),
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.o_dir (w_smi_data_direction),
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.o_dir (/*w_smi_data_direction*/),
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.i_smi_test(1'b0/*w_debug_smi_test*/),
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.o_cond_tx(),
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.o_address_error()
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@ -547,5 +543,7 @@ module top (
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assign o_smi_read_req = (w_smi_data_direction) ? w_smi_read_req : w_smi_write_req;
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assign o_smi_write_req = 1'bZ;
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assign o_led0 = w_smi_data_direction;
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assign o_led1 = channel;
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endmodule // top
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@ -119,7 +119,7 @@ int median(int a[], int n)
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}
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//===================================================================
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int at86rf215_calibrate_device(at86rf215_st* dev, at86rf215_rf_channel_en ch, int* i, int* q)
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int at86rf215_calibrate_device(at86rf215_st* dev, at86rf215_rf_channel_en ch, int* i_val, int* q_val)
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{
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int cal_i[NUM_CAL_STEPS] = {0};
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int cal_q[NUM_CAL_STEPS] = {0};
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@ -101,7 +101,7 @@ typedef struct sys_st_t
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signal_handler_operation_en sig_op;
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// Management
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cariboulite_fpga_versions_st fpga_versions;
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caribou_fpga_versions_st fpga_versions;
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uint8_t fpga_error_status;
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int fpga_config_res_state;
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// Initialization
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Load Diff
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@ -369,6 +369,7 @@ int cariboulite_radio_set_tx_samp_cutoff(cariboulite_radio_state_st* radio,
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at86rf215_radio_sample_rate_en tx_sample_rate,
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at86rf215_radio_f_cut_en tx_cutoff)
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{
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uint8_t sample_gap = 0;
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at86rf215_radio_tx_ctrl_st cfg =
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{
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.pa_ramping_time = at86rf215_radio_tx_pa_ramp_16usec,
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@ -428,7 +429,7 @@ int cariboulite_radio_get_tx_samp_cutoff(cariboulite_radio_state_st* radio,
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default: sample_gap = 0; break;
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}
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hermon_fpga_set_sys_ctrl_tx_sample_gap (&radio->sys->fpga, sample_gap);
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caribou_fpga_set_sys_ctrl_tx_sample_gap (&radio->sys->fpga, sample_gap);
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return 0;
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}
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@ -901,10 +902,11 @@ int cariboulite_radio_activate_channel(cariboulite_radio_state_st* radio,
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{
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// after modem is activated turn on the the smi stream
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smi_stream_state_en smi_state = smi_stream_idle;
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if (radio->smi_channel_id == hermon_smi_channel_900)
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if (radio->smi_channel_id == caribou_smi_channel_900)
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smi_state = smi_stream_rx_channel_0;
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else if (radio->smi_channel_id == hermon_smi_channel_2400)
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else if (radio->smi_channel_id == caribou_smi_channel_2400)
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smi_state = smi_stream_rx_channel_1;
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at86rf215_iq_interface_config_st modem_iq_config = {
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.loopback_enable = radio->tx_loopback_anabled,
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.drv_strength = at86rf215_iq_drive_current_4ma,
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@ -993,14 +995,15 @@ int cariboulite_radio_activate_channel(cariboulite_radio_state_st* radio,
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at86rf215_radio_state_cmd_tx_prep);
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radio->state = at86rf215_radio_state_cmd_tx_prep;
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at86rf215_radio_get_tx_iq_calibration(&radio->sys->modem, GET_MODEM_CH,
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at86rf215_radio_get_tx_iq_calibration(&radio->sys->modem,
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GET_MODEM_CH(radio->type),
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&cal_i, &cal_q);
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//printf(">>>>> CAL_I = %d, CAL_Q = %d\n", cal_i, cal_q);
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// apply the state
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hermon_smi_set_driver_streaming_state(&radio->sys->smi, smi_stream_tx_channel);
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hermon_fpga_set_smi_ctrl_data_direction (&radio->sys->fpga, 0);
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caribou_smi_set_driver_streaming_state(&radio->sys->smi, smi_stream_tx_channel);
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caribou_fpga_set_smi_ctrl_data_direction (&radio->sys->fpga, 0);
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}
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}
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@ -82,6 +82,8 @@ typedef struct
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at86rf215_radio_tx_cut_off_en tx_bw;
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at86rf215_radio_f_cut_en tx_fcut;
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at86rf215_radio_sample_rate_en tx_fs;
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bool tx_loopback_anabled;
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// at86rf215_radio_energy_detection_st rx_energy_detection;
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float rx_energy_detection_value;
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@ -810,7 +810,8 @@ void cariboulite_print_board_info(sys_st *sys, bool log)
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}
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//===========================================================
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cariboulite_radio_state_st* cariboulite_get_radio_handle(sys_st* sys)
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cariboulite_radio_state_st* cariboulite_get_radio_handle(sys_st* sys, cariboulite_channel_en type)
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{
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return &sys->radio;
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if (type == cariboulite_channel_s1g) return &sys->radio_low;
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else return &sys->radio_high;
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}
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@ -275,7 +275,7 @@ int cariboulite_self_test(sys_st* sys, cariboulite_self_test_result_st* res);
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* @param res test-result
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* @return 0 (sucess), -1 (fail)
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*/
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cariboulite_radio_state_st* cariboulite_get_radio_handle(sys_st* sys);
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cariboulite_radio_state_st* cariboulite_get_radio_handle(sys_st* sys, cariboulite_channel_en type);
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#ifdef __cplusplus
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}
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#endif
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@ -83,6 +83,13 @@ public:
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int &flags,
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long long &timeNs,
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const long timeoutUs = 100000);
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int writeStream(SoapySDR::Stream *stream,
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void * const *buffs,
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const size_t numElems,
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int &flags,
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long long &timeNs,
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const long timeoutUs);
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/*******************************************************************
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* Antenna API
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@ -93,6 +93,12 @@ public:
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int ReadSamples(sample_complex_double* buffer, size_t num_elements, long timeout_us);
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int ReadSamples(sample_complex_int8* buffer, size_t num_elements, long timeout_us);
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int ReadSamplesGen(void* buffer, size_t num_elements, long timeout_us);
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int WriteSamples(caribou_smi_sample_complex_int16* buffer, size_t num_elements, long timeout_us);
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int WriteSamples(sample_complex_float* buffer, size_t num_elements, long timeout_us);
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int WriteSamples(sample_complex_double* buffer, size_t num_elements, long timeout_us);
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int WriteSamples(sample_complex_int8* buffer, size_t num_elements, long timeout_us);
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int WriteSamplesGen(void* buffer, size_t num_elements, long timeout_us);
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cariboulite_channel_dir_en getInnerStreamType(void);
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void setInnerStreamType(cariboulite_channel_dir_en dir);
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