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i_smi_a2_SB_LUT4_I1_O_SB_LUT4_I3_1_I2[1] -.sym 783 $PACKER_VCC_NET +.sym 294 i_smi_a1_SB_LUT4_I1_O_SB_LUT4_O_I2_SB_CARRY_CO_I1[5] +.sym 295 smi_ctrl_ins.r_fifo_24_pull_SB_LUT4_I1_O[2] +.sym 296 smi_ctrl_ins.r_fifo_24_pull_SB_DFFESR_Q_E +.sym 297 smi_ctrl_ins.int_cnt_24_SB_DFFESR_Q_E +.sym 298 i_smi_a1_SB_LUT4_I1_O_SB_LUT4_O_I2_SB_LUT4_I0_O[1] +.sym 300 lvds_rx_09_inst.o_fifo_data[22] +.sym 316 lvds_rx_09_inst.o_fifo_data[19] +.sym 321 $PACKER_VCC_NET +.sym 328 w_rx_24_fifo_pull +.sym 405 w_rx_24_fifo_data[10] +.sym 406 w_rx_24_fifo_data[14] +.sym 407 w_rx_24_fifo_data[12] +.sym 408 w_rx_24_fifo_data[11] +.sym 409 w_rx_24_fifo_data[7] +.sym 410 w_rx_24_fifo_data[3] +.sym 411 w_rx_24_fifo_data[9] +.sym 412 w_rx_24_fifo_data[5] +.sym 446 smi_ctrl_ins.int_cnt_24_SB_DFFESR_Q_E +.sym 452 i_smi_a1_SB_LUT4_I1_O_SB_LUT4_O_I2_SB_LUT4_I0_O[2] +.sym 466 i_smi_a1_SB_LUT4_I1_O[3] +.sym 519 w_rx_24_fifo_data[15] +.sym 521 w_rx_24_fifo_data[2] +.sym 523 w_rx_24_fifo_data[13] +.sym 525 w_rx_24_fifo_data[16] +.sym 526 w_rx_24_fifo_data[8] +.sym 528 w_rx_24_fifo_data[3] +.sym 574 w_rx_24_fifo_data[5] +.sym 596 $PACKER_VCC_NET +.sym 600 $PACKER_VCC_NET +.sym 633 w_rx_24_fifo_data[19] +.sym 634 w_rx_24_fifo_data[27] +.sym 635 w_rx_24_fifo_data[21] +.sym 636 w_rx_24_fifo_data[23] +.sym 637 w_rx_24_fifo_data[17] +.sym 639 w_rx_24_fifo_data[25] +.sym 660 w_rx_24_fifo_data[8] +.sym 679 w_rx_24_fifo_data[15] +.sym 747 lvds_rx_09_inst.r_phase_count_SB_LUT4_I1_O[1] +.sym 748 lvds_rx_09_inst.r_phase_count_SB_LUT4_I1_O[2] +.sym 749 lvds_rx_09_inst.r_push_SB_DFFNESR_Q_E_SB_LUT4_O_I1[1] +.sym 752 lvds_rx_09_inst.r_phase_count_SB_LUT4_I1_O[0] +.sym 753 lvds_rx_09_inst.r_phase_count[0] +.sym 775 w_rx_24_fifo_data[19] +.sym 781 w_rx_24_fifo_data[23] .sym 830 lvds_clock -.sym 852 lvds_clock -.sym 860 w_rx_24_fifo_data[19] -.sym 861 w_rx_24_fifo_data[17] -.sym 862 w_rx_24_fifo_data[27] -.sym 863 w_rx_24_fifo_data[21] -.sym 864 w_rx_24_fifo_data[31] -.sym 865 w_rx_24_fifo_data[23] -.sym 866 w_rx_24_fifo_data[29] -.sym 867 w_rx_24_fifo_data[25] -.sym 915 w_rx_24_fifo_data[15] +.sym 845 lvds_clock +.sym 860 lvds_rx_09_inst.r_push_SB_DFFNESR_Q_E_SB_LUT4_O_I1_SB_LUT4_O_I2[0] +.sym 861 w_lvds_rx_09_d1_SB_LUT4_I0_O_SB_LUT4_I3_O +.sym 862 rx_24_fifo.rd_addr_gray_wr_r[2] +.sym 863 lvds_rx_09_inst.r_push_SB_DFFNESR_Q_E_SB_LUT4_O_I1[0] +.sym 864 lvds_rx_09_inst.r_state_if_SB_DFFNESR_Q_E_SB_LUT4_O_I2[1] +.sym 865 lvds_rx_09_inst.r_state_if_SB_DFFNESR_Q_E +.sym 866 rx_24_fifo.rd_addr_gray_wr[2] +.sym 867 lvds_rx_09_inst.r_push_SB_DFFNESR_Q_E_SB_LUT4_O_I1[3] +.sym 893 w_rx_24_fifo_data[20] +.sym 910 lvds_clock .sym 940 lvds_clock .sym 944 w_lvds_rx_09_d1_SB_LUT4_I0_O_SB_LUT4_I3_O -.sym 961 w_lvds_rx_09_d1_SB_LUT4_I0_O_SB_LUT4_I3_O -.sym 974 w_lvds_rx_09_d1_SB_LUT4_I0_O[0] -.sym 976 w_lvds_rx_09_d1_SB_LUT4_I0_O_SB_LUT4_O_I2[2] -.sym 977 w_lvds_rx_09_d1_SB_LUT4_I0_O_SB_LUT4_I3_O -.sym 978 lvds_rx_09_inst.r_state_if_SB_DFFNESR_Q_E -.sym 979 w_lvds_rx_09_d1_SB_LUT4_I0_O_SB_LUT4_O_I2[3] -.sym 1007 rx_24_fifo.rd_addr[5] -.sym 1031 w_rx_24_fifo_data[23] -.sym 1049 w_rx_24_fifo_data[19] -.sym 1051 w_rx_24_fifo_data[17] -.sym 1054 i_smi_a3$SB_IO_IN -.sym 1089 lvds_rx_24_inst.r_push_SB_LUT4_I3_I1[1] -.sym 1090 lvds_rx_24_inst.r_push_SB_LUT4_I3_I1[2] -.sym 1091 lvds_rx_24_inst.r_push_SB_LUT4_I3_I1[3] -.sym 1092 lvds_rx_24_inst.r_push_SB_LUT4_I3_I1[4] -.sym 1093 lvds_rx_24_inst.r_push_SB_LUT4_I3_I1[5] -.sym 1094 lvds_rx_24_inst.r_push_SB_LUT4_I3_I1[6] -.sym 1108 lvds_rx_09_inst.r_state_if_SB_LUT4_I2_O[0] -.sym 1163 w_lvds_rx_09_d1_SB_LUT4_I0_O[1] +.sym 959 w_lvds_rx_09_d1_SB_LUT4_I0_O_SB_LUT4_I3_O +.sym 974 lvds_rx_09_inst.r_push_SB_DFFNESR_Q_E_SB_LUT4_O_I1_SB_LUT4_I0_O_SB_DFFNESR_D_Q[1] +.sym 975 lvds_rx_09_inst.r_phase_count[1] +.sym 976 lvds_rx_09_inst.r_push_SB_DFFNESR_Q_E_SB_LUT4_O_I1_SB_LUT4_I0_O_SB_DFFNESR_D_Q[0] +.sym 977 lvds_rx_24_inst.r_push_SB_LUT4_I0_1_I1[3] +.sym 978 lvds_rx_24_inst.r_push_SB_LUT4_I0_1_I1_SB_LUT4_O_2_I0[0] +.sym 979 lvds_rx_24_inst.r_push_SB_LUT4_I0_1_I1_SB_LUT4_O_1_I3[3] +.sym 980 w_lvds_rx_09_d1_SB_LUT4_I0_O[1] +.sym 981 lvds_rx_24_inst.r_push_SB_LUT4_I0_1_I1[2] +.sym 1010 i_smi_a1_SB_LUT4_I1_O_SB_LUT4_O_I2_SB_LUT4_I0_O[2] +.sym 1031 lvds_rx_09_inst.r_state_if_SB_DFFNESR_Q_E +.sym 1050 rx_24_fifo.wr_addr[5] +.sym 1055 $PACKER_VCC_NET +.sym 1088 rx_24_fifo.full_o_SB_DFFSR_Q_D_SB_LUT4_O_I1[1] +.sym 1089 w_rx_24_fifo_push +.sym 1091 lvds_rx_24_inst.r_state_if_SB_LUT4_I2_O[0] +.sym 1094 lvds_rx_09_inst.r_push_SB_DFFNESR_Q_E_SB_LUT4_O_I1_SB_LUT4_I0_O_SB_DFFNESR_D_E +.sym 1095 rx_24_fifo.full_o_SB_LUT4_I0_I1[3] +.sym 1148 rx_24_fifo.rd_addr_gray_wr_r[5] +.sym 1163 lvds_rx_24_inst.r_push_SB_LUT4_I0_1_I1_SB_LUT4_O_2_I0[1] .sym 1173 w_lvds_rx_09_d0 .sym 1174 w_lvds_rx_09_d1 .sym 1183 $PACKER_VCC_NET .sym 1184 lvds_clock_buf -.sym 1188 $PACKER_VCC_NET -.sym 1202 lvds_rx_24_inst.r_phase_count[1] -.sym 1204 lvds_rx_09_inst.r_push_SB_DFFNESR_Q_E_SB_LUT4_O_I1[1] -.sym 1206 rx_24_fifo.wr_addr[7] -.sym 1234 rx_24_fifo.full_o_SB_LUT4_I0_I1_SB_LUT4_O_2_I2[1] -.sym 1236 w_lvds_rx_09_d1 -.sym 1246 rx_24_fifo.full_o_SB_LUT4_I0_I1_SB_LUT4_O_1_I2[3] +.sym 1196 $PACKER_VCC_NET +.sym 1203 lvds_rx_24_inst.r_push_SB_DFFNESR_Q_E_SB_LUT4_O_I1[1] +.sym 1204 rx_24_fifo.full_o_SB_LUT4_I0_O[1] +.sym 1206 lvds_rx_24_inst.r_push_SB_DFFNESR_Q_E_SB_LUT4_O_I1_SB_LUT4_O_I2[0] +.sym 1208 lvds_rx_24_inst.r_push_SB_DFFNESR_Q_E +.sym 1209 lvds_rx_24_inst.r_state_if_SB_LUT4_I2_O[1] +.sym 1216 lvds_rx_24_inst.r_push_SB_LUT4_I0_1_I1_SB_LUT4_O_2_I0[1] .sym 1253 $PACKER_VCC_NET -.sym 1259 $PACKER_VCC_NET -.sym 1280 w_lvds_rx_09_d0 -.sym 1283 $PACKER_VCC_NET +.sym 1260 w_lvds_rx_09_d0 +.sym 1271 w_lvds_rx_09_d1 +.sym 1279 w_rx_24_fifo_push .sym 1287 lvds_clock .sym 1297 $PACKER_VCC_NET .sym 1313 $PACKER_VCC_NET -.sym 1318 lvds_rx_24_inst.r_phase_count_SB_LUT4_I1_O_SB_DFFNESR_D_Q[2] -.sym 1319 lvds_rx_24_inst.r_state_if_SB_DFFNESR_Q_E_SB_LUT4_O_I0[0] -.sym 1320 lvds_rx_24_inst.r_phase_count_SB_LUT4_I1_O_SB_DFFNESR_D_Q[1] -.sym 1321 lvds_rx_24_inst.r_push_SB_DFFNESR_Q_E_SB_LUT4_O_I1[0] -.sym 1322 lvds_rx_24_inst.r_phase_count_SB_LUT4_I1_O_SB_DFFNESR_D_Q[0] -.sym 1323 lvds_rx_24_inst.r_state_if_SB_DFFNESR_Q_E_SB_LUT4_O_I0_SB_LUT4_I2_O[0] -.sym 1353 rx_24_fifo.wr_addr[7] +.sym 1316 w_rx_24_fifo_data[1] +.sym 1317 lvds_rx_24_inst.r_push_SB_DFFNESR_Q_E_SB_LUT4_O_I1_SB_LUT4_I0_O_SB_DFFNESR_D_E +.sym 1318 lvds_rx_24_inst.r_state_if_SB_DFFNESR_Q_E_SB_LUT4_O_I2[1] +.sym 1319 lvds_rx_24_inst.r_push_SB_DFFNESR_Q_E_SB_LUT4_O_I1[0] +.sym 1320 w_rx_24_fifo_data[0] +.sym 1321 lvds_rx_24_inst.r_state_if_SB_DFFNESR_Q_E +.sym 1322 lvds_rx_24_inst.r_push_SB_DFFNESR_Q_E_SB_LUT4_O_I1_SB_LUT4_O_I2_SB_LUT4_I0_O[0] +.sym 1323 w_lvds_rx_24_d1_SB_LUT4_I0_O[1] +.sym 1357 i_smi_a1_SB_LUT4_I1_O_SB_LUT4_O_I2_SB_LUT4_I0_O[2] +.sym 1360 rx_24_fifo.wr_addr_gray_SB_DFFESR_Q_7_D[1] +.sym 1382 rx_24_fifo.wr_addr_gray_SB_DFFESR_Q_7_D[2] +.sym 1395 rx_24_fifo.rd_addr_gray_wr_r[6] .sym 1401 w_lvds_rx_24_d0 .sym 1402 w_lvds_rx_24_d1 .sym 1411 $PACKER_VCC_NET .sym 1412 lvds_clock_buf .sym 1424 $PACKER_VCC_NET -.sym 1430 lvds_rx_24_inst.r_state_if[1] -.sym 1431 lvds_rx_24_inst.r_state_if_SB_DFFNESR_Q_E -.sym 1432 lvds_rx_24_inst.r_state_if_SB_LUT4_I2_O[0] -.sym 1433 w_lvds_rx_24_d1_SB_LUT4_I0_O[1] -.sym 1434 lvds_rx_24_inst.r_push_SB_DFFNESR_Q_E_SB_LUT4_O_I1[1] -.sym 1435 lvds_rx_24_inst.r_state_if_SB_LUT4_I2_O[1] -.sym 1437 lvds_rx_24_inst.r_phase_count_SB_LUT4_O_I3_SB_DFFNESR_Q_E -.sym 1462 w_lvds_rx_24_d0 -.sym 1474 w_lvds_rx_24_d1 -.sym 1481 $PACKER_VCC_NET -.sym 1506 lvds_rx_24_inst.r_push_SB_LUT4_I3_1_O -.sym 1510 i_smi_a3$SB_IO_IN -.sym 1545 lvds_rx_24_inst.r_phase_count_SB_LUT4_I1_O_SB_DFFNESR_D_Q[3] -.sym 1549 lvds_rx_24_inst.r_push_SB_DFFNESR_Q_E -.sym 1557 w_lvds_rx_24_d1_SB_LUT4_I0_O[1] -.sym 1601 i_smi_a1_SB_LUT4_I1_O[2] -.sym 1880 i_smi_a2_SB_LUT4_I1_O_SB_LUT4_I3_I2[1] -.sym 1881 i_smi_a2_SB_LUT4_I1_O_SB_LUT4_I3_I2[2] -.sym 1882 smi_ctrl_ins.int_cnt_09_SB_DFFESR_Q_E -.sym 1883 smi_ctrl_ins.int_cnt_09[4] -.sym 1884 smi_ctrl_ins.int_cnt_09[5] -.sym 1885 smi_ctrl_ins.int_cnt_09_SB_DFFESR_Q_E_SB_LUT4_O_I1_SB_LUT4_O_I0_SB_LUT4_I3_O[0] -.sym 1886 i_smi_a2_SB_LUT4_I1_O_SB_LUT4_I3_I2_SB_LUT4_O_I3[1] -.sym 1891 i_smi_a1_SB_LUT4_I1_O_SB_LUT4_I1_O[2] -.sym 1894 io_pmod_SB_DFFSS_Q_D_SB_LUT4_O_I0[3] -.sym 1935 i_smi_soe_se$rename$0 -.sym 1936 i_smi_a1_SB_LUT4_I1_O_SB_LUT4_I1_O[2] -.sym 1937 $PACKER_VCC_NET -.sym 1951 io_pmod_SB_DFFSS_Q_D_SB_LUT4_O_I0[3] -.sym 1954 i_smi_a1_SB_LUT4_I1_O_SB_LUT4_I1_O[2] -.sym 1971 smi_ctrl_ins.int_cnt_09_SB_DFFESR_Q_E_SB_LUT4_O_I1_SB_LUT4_O_I1[5] -.sym 1972 smi_ctrl_ins.int_cnt_09_SB_DFFESR_Q_E_SB_LUT4_O_I1_SB_LUT4_O_I0[5] -.sym 1976 smi_ctrl_ins.r_fifo_09_pull_SB_DFFESR_Q_E -.sym 1981 smi_ctrl_ins.int_cnt_09_SB_DFFESR_Q_E_SB_LUT4_O_I1_SB_LUT4_O_I0_SB_CARRY_CO_I1[5] -.sym 1982 smi_ctrl_ins.int_cnt_09_SB_DFFESR_Q_E_SB_LUT4_O_I1_SB_LUT4_O_I0_SB_CARRY_CO_I1[4] -.sym 1983 i_smi_a1_SB_LUT4_I1_O_SB_LUT4_I1_O[2] -.sym 1996 i_smi_soe_se$rename$0 -.sym 1997 smi_ctrl_ins.int_cnt_09[4] -.sym 1998 smi_ctrl_ins.int_cnt_09[5] -.sym 2001 $nextpnr_ICESTORM_LC_19$O -.sym 2004 smi_ctrl_ins.int_cnt_09_SB_DFFESR_Q_E_SB_LUT4_O_I1_SB_LUT4_O_I0_SB_CARRY_CO_I1[4] -.sym 2007 $nextpnr_ICESTORM_LC_20$I3 -.sym 2010 smi_ctrl_ins.int_cnt_09_SB_DFFESR_Q_E_SB_LUT4_O_I1_SB_LUT4_O_I0_SB_CARRY_CO_I1[5] -.sym 2017 $nextpnr_ICESTORM_LC_20$I3 -.sym 2020 smi_ctrl_ins.r_fifo_09_pull_SB_DFFESR_Q_E -.sym 2026 smi_ctrl_ins.int_cnt_09[5] -.sym 2032 smi_ctrl_ins.int_cnt_09[4] -.sym 2038 i_smi_soe_se$rename$0 -.sym 2044 i_smi_a1_SB_LUT4_I1_O_SB_LUT4_I1_O[2] -.sym 2045 i_smi_soe_se$rename$0 -.sym 2046 smi_ctrl_ins.int_cnt_09_SB_DFFESR_Q_E_SB_LUT4_O_I1_SB_LUT4_O_I0[5] -.sym 2047 smi_ctrl_ins.int_cnt_09_SB_DFFESR_Q_E_SB_LUT4_O_I1_SB_LUT4_O_I1[5] -.sym 2049 r_counter[0]_$glb_clk -.sym 2050 i_smi_a1_SB_LUT4_I1_O[2]_$glb_sr -.sym 2063 i_smi_a1_SB_LUT4_I1_O_SB_LUT4_O_I2_SB_LUT4_I0_O_SB_LUT4_O_I1[2] -.sym 2065 smi_ctrl_ins.int_cnt_09_SB_DFFESR_Q_E_SB_LUT4_O_I1[1] -.sym 2066 io_smi_data[2]$SB_IO_OUT -.sym 2067 lvds_rx_09_inst.o_fifo_data[22] -.sym 2068 lvds_rx_09_inst.o_fifo_data[28] -.sym 2069 lvds_rx_09_inst.o_fifo_data[20] -.sym 2070 io_smi_data[1]$SB_IO_OUT -.sym 2080 i_smi_a2_SB_LUT4_I1_O_SB_LUT4_I3_I2_SB_LUT4_O_I3[1] -.sym 2084 i_smi_a2_SB_LUT4_I1_O_SB_LUT4_I3_I2[1] -.sym 2086 io_pmod[2]$SB_IO_IN -.sym 2097 i_smi_a2_SB_LUT4_I1_O_SB_LUT4_I3_I2[1] -.sym 2100 i_smi_a2_SB_LUT4_I1_O_SB_LUT4_I3_I2[2] -.sym 2104 io_pmod_SB_DFFSS_Q_D_SB_LUT4_O_I0[3] -.sym 2111 i_smi_soe_se$rename$0 -.sym 2117 i_smi_a2_SB_LUT4_I1_O_SB_LUT4_I3_I2[2] -.sym 2121 i_smi_a2_SB_LUT4_I1_O_SB_LUT4_I3_I2[2] -.sym 2122 i_smi_a1_SB_LUT4_I1_O[2] -.sym 2127 i_smi_a1_SB_LUT4_I1_O_SB_LUT4_I1_O[2] -.sym 2128 i_smi_a2_SB_LUT4_I1_O_SB_LUT4_I3_I2_SB_LUT4_O_I3[1] -.sym 2129 i_smi_a1_SB_LUT4_I1_O[2] -.sym 2135 i_smi_a2_SB_LUT4_I1_O_SB_LUT4_I3_I2[1] +.sym 1431 lvds_rx_24_inst.r_phase_count_SB_LUT4_I1_O[1] +.sym 1432 lvds_rx_24_inst.r_phase_count_SB_LUT4_I1_O[2] +.sym 1433 lvds_rx_24_inst.r_push_SB_DFFNESR_Q_E_SB_LUT4_O_I1_SB_LUT4_I0_O_SB_DFFNESR_D_Q[1] +.sym 1434 lvds_rx_24_inst.r_phase_count[0] +.sym 1435 lvds_rx_24_inst.r_push_SB_DFFNESR_Q_E_SB_LUT4_O_I1_SB_LUT4_I0_O_SB_DFFNESR_D_Q[0] +.sym 1436 lvds_rx_24_inst.r_push_SB_DFFNESR_Q_E_SB_LUT4_O_I1_SB_LUT4_O_I2[2] +.sym 1437 lvds_rx_24_inst.r_phase_count[1] +.sym 1456 lvds_rx_24_inst.r_push_SB_LUT4_I0_1_I1_SB_LUT4_O_1_I3[0] +.sym 1472 i_smi_a1_SB_LUT4_I1_O_SB_LUT4_O_I2_SB_LUT4_I0_O[2] +.sym 1474 $PACKER_VCC_NET +.sym 1544 w_rx_09_fifo_data[0] +.sym 1550 w_rx_09_fifo_data[1] +.sym 1600 lvds_rx_24_inst.r_push_SB_DFFNESR_Q_E_SB_LUT4_O_I1_SB_LUT4_I0_O_SB_DFFNESR_D_E +.sym 1677 w_rx_09_fifo_data[1] +.sym 1683 w_rx_09_fifo_data[1] +.sym 1879 io_smi_data[0]$SB_IO_OUT +.sym 1880 smi_ctrl_ins.o_smi_data_out_SB_DFFE_Q_1_D_SB_LUT4_O_I1[2] +.sym 1881 w_smi_data_output[4] +.sym 1882 smi_ctrl_ins.o_smi_data_out_SB_DFFE_Q_3_D_SB_LUT4_O_I1_SB_LUT4_O_I3[3] +.sym 1883 w_smi_data_output[3] +.sym 1884 smi_ctrl_ins.o_smi_data_out_SB_DFFE_Q_7_D_SB_LUT4_O_I0[0] +.sym 1885 smi_ctrl_ins.o_smi_data_out_SB_DFFE_Q_3_D_SB_LUT4_O_I1[1] +.sym 1886 io_smi_data[6]$SB_IO_OUT +.sym 1939 i_smi_soe_se$rename$0 +.sym 1943 smi_ctrl_ins.r_fifo_24_pull_SB_DFFESR_Q_E +.sym 1955 i_smi_a1_SB_LUT4_I1_O[2] +.sym 2063 w_smi_data_output[6] +.sym 2064 w_smi_data_output[5] +.sym 2065 w_smi_data_output[7] +.sym 2066 smi_ctrl_ins.r_fifo_24_pull_SB_LUT4_I1_O_SB_LUT4_I0_O_SB_LUT4_I3_O +.sym 2067 smi_ctrl_ins.o_smi_data_out_SB_DFFE_Q_6_D_SB_LUT4_O_I1[1] +.sym 2068 smi_ctrl_ins.o_smi_data_out_SB_DFFE_Q_6_D_SB_LUT4_O_I1_SB_LUT4_O_I3[3] +.sym 2069 w_smi_data_output[1] +.sym 2070 w_smi_data_output[2] +.sym 2074 w_rx_24_fifo_data[1] +.sym 2076 rx_09_fifo.wr_addr[2] +.sym 2079 smi_ctrl_ins.int_cnt_09_SB_DFFESR_Q_D_SB_LUT4_O_I3[2] +.sym 2080 w_rx_09_fifo_data[0] +.sym 2082 smi_ctrl_ins.o_smi_data_out_SB_DFFE_Q_D_SB_LUT4_O_I2[1] +.sym 2084 smi_ctrl_ins.o_smi_data_out_SB_DFFE_Q_7_D_SB_LUT4_O_I0[1] +.sym 2085 smi_ctrl_ins.int_cnt_09_SB_DFFESR_Q_D_SB_LUT4_O_I3[2] +.sym 2086 rx_09_fifo.wr_addr[5] +.sym 2091 smi_ctrl_ins.int_cnt_09_SB_DFFESR_Q_D_SB_LUT4_O_I3[1] +.sym 2092 w_smi_data_output[6] +.sym 2093 smi_ctrl_ins.o_smi_data_out_SB_DFFE_Q_5_D_SB_LUT4_O_I1[1] +.sym 2096 i_smi_a2_SB_LUT4_I1_O[3] +.sym 2098 smi_ctrl_ins.int_cnt_09_SB_DFFESR_Q_D_SB_LUT4_O_I3[1] +.sym 2106 smi_ctrl_ins.o_smi_data_out_SB_DFFE_Q_7_D_SB_LUT4_O_I0[2] +.sym 2114 smi_ctrl_ins.o_smi_data_out_SB_DFFE_Q_5_D_SB_LUT4_O_I1_SB_LUT4_O_1_I1[2] +.sym 2116 smi_ctrl_ins.int_cnt_24_SB_DFFESR_Q_E +.sym 2123 smi_ctrl_ins.o_smi_data_out_SB_DFFE_Q_1_D_SB_LUT4_O_I1_SB_LUT4_O_1_I1[2] +.sym 2124 i_smi_a1_SB_LUT4_I1_O[3] +.sym 2125 smi_ctrl_ins.o_smi_data_out_SB_DFFE_Q_6_D_SB_LUT4_O_I1_SB_LUT4_O_1_I1[2] +.sym 2126 smi_ctrl_ins.r_fifo_24_pull_SB_LUT4_I1_O[2] +.sym 2128 i_smi_a2_SB_LUT4_I1_O_SB_LUT4_I3_1_I2_SB_LUT4_O_I3[1] .sym 2136 w_rx_24_fifo_pull -.sym 2139 i_smi_a1_SB_LUT4_I1_O[0] -.sym 2143 i_smi_a2_SB_LUT4_I1_O_SB_LUT4_I3_I2_SB_LUT4_O_I3[1] -.sym 2153 i_smi_a1_SB_LUT4_I1_O[2] -.sym 2156 smi_ctrl_ins.int_cnt_09_SB_DFFESR_Q_E_SB_LUT4_O_I1_SB_LUT4_O_I0_SB_CARRY_CO_I1[5] -.sym 2157 i_smi_a2_SB_LUT4_I1_O_SB_LUT4_I3_I2[0] -.sym 2158 i_smi_soe_se$rename$0 -.sym 2159 i_smi_a2_SB_LUT4_I1_O_SB_LUT4_I3_I2_SB_LUT4_O_I3[1] -.sym 2160 $PACKER_VCC_NET -.sym 2163 smi_ctrl_ins.r_fifo_09_pull_SB_DFFESR_Q_E -.sym 2165 smi_ctrl_ins.int_cnt_09_SB_DFFESR_Q_E_SB_LUT4_O_I1_SB_LUT4_O_I0_SB_CARRY_CO_I1[4] -.sym 2166 i_smi_a1_SB_LUT4_I1_O_SB_LUT4_I1_O[2] -.sym 2170 smi_ctrl_ins.int_cnt_09_SB_DFFESR_Q_E_SB_LUT4_O_I1[1] -.sym 2172 i_smi_a1_SB_LUT4_I1_O[0] -.sym 2184 $nextpnr_ICESTORM_LC_10$O -.sym 2186 i_smi_a2_SB_LUT4_I1_O_SB_LUT4_I3_I2[0] -.sym 2190 smi_ctrl_ins.int_cnt_09_SB_DFFESR_Q_E_SB_LUT4_O_I1_SB_LUT4_O_I0[4] -.sym 2192 smi_ctrl_ins.int_cnt_09_SB_DFFESR_Q_E_SB_LUT4_O_I1_SB_LUT4_O_I0_SB_CARRY_CO_I1[4] -.sym 2196 $nextpnr_ICESTORM_LC_11$I3 -.sym 2199 smi_ctrl_ins.int_cnt_09_SB_DFFESR_Q_E_SB_LUT4_O_I1_SB_LUT4_O_I0_SB_CARRY_CO_I1[5] -.sym 2202 $nextpnr_ICESTORM_LC_11$COUT -.sym 2205 $PACKER_VCC_NET -.sym 2206 $nextpnr_ICESTORM_LC_11$I3 -.sym 2209 i_smi_soe_se$rename$0 -.sym 2210 i_smi_a1_SB_LUT4_I1_O_SB_LUT4_I1_O[2] -.sym 2212 $nextpnr_ICESTORM_LC_11$COUT -.sym 2215 i_smi_a2_SB_LUT4_I1_O_SB_LUT4_I3_I2_SB_LUT4_O_I3[1] -.sym 2221 i_smi_a1_SB_LUT4_I1_O[0] -.sym 2228 smi_ctrl_ins.int_cnt_09_SB_DFFESR_Q_E_SB_LUT4_O_I1[1] -.sym 2229 i_smi_a1_SB_LUT4_I1_O[2] -.sym 2231 smi_ctrl_ins.r_fifo_09_pull_SB_DFFESR_Q_E -.sym 2232 r_counter[0]_$glb_clk -.sym 2233 i_smi_a1_SB_LUT4_I1_O[2]_$glb_sr -.sym 2234 lvds_rx_09_inst.o_fifo_data[16] -.sym 2235 lvds_rx_09_inst.o_fifo_data[26] -.sym 2236 smi_ctrl_ins.o_smi_data_out_SB_DFFE_Q_7_D_SB_LUT4_O_I0[0] -.sym 2237 lvds_rx_09_inst.o_fifo_data[14] -.sym 2238 smi_ctrl_ins.o_smi_data_out_SB_DFFE_Q_7_D_SB_LUT4_O_I0[1] -.sym 2239 lvds_rx_09_inst.o_fifo_data[24] -.sym 2240 lvds_rx_09_inst.o_fifo_data[30] -.sym 2241 lvds_rx_09_inst.o_fifo_data[18] -.sym 2249 io_smi_data[2]$SB_IO_OUT -.sym 2251 io_smi_data[1]$SB_IO_OUT -.sym 2261 i_smi_a2_SB_LUT4_I1_O_SB_LUT4_I3_I2[1] -.sym 2264 i_smi_a2_SB_LUT4_I1_O_SB_LUT4_I3_I2[2] -.sym 2266 w_smi_data_output[1] -.sym 2267 i_smi_a2_SB_LUT4_I1_O_SB_LUT4_I3_O[2] -.sym 2268 w_smi_data_output[2] -.sym 2273 i_smi_a1_SB_LUT4_I1_O_SB_LUT4_O_I2_SB_LUT4_I0_O[0] +.sym 2138 smi_ctrl_ins.int_cnt_24[5] +.sym 2139 w_rx_09_fifo_pull +.sym 2146 w_rx_09_fifo_data[0] +.sym 2154 smi_ctrl_ins.r_fifo_24_pull_SB_LUT4_I1_O[2] +.sym 2155 i_smi_soe_se$rename$0 +.sym 2156 w_rx_24_fifo_pull +.sym 2164 i_smi_a2_SB_LUT4_I1_O[3] +.sym 2171 i_smi_a2_SB_LUT4_I1_O_SB_LUT4_I3_1_I2_SB_LUT4_O_I3[1] +.sym 2176 w_rx_09_fifo_pull +.sym 2185 smi_ctrl_ins.r_fifo_24_pull_SB_LUT4_I1_O[2] +.sym 2186 i_smi_soe_se$rename$0 +.sym 2191 i_smi_a2_SB_LUT4_I1_O[3] +.sym 2193 w_rx_09_fifo_pull +.sym 2194 w_rx_24_fifo_pull +.sym 2212 i_smi_a2_SB_LUT4_I1_O_SB_LUT4_I3_1_I2_SB_LUT4_O_I3[1] +.sym 2236 i_smi_a2_SB_LUT4_I1_O_SB_LUT4_I3_1_I2[2] +.sym 2237 i_smi_a2_SB_LUT4_I1_O_SB_LUT4_I3_1_I2_SB_LUT4_O_I3[1] +.sym 2238 smi_ctrl_ins.o_smi_data_out_SB_DFFE_Q_6_D_SB_LUT4_O_I1[3] +.sym 2239 smi_ctrl_ins.o_smi_data_out_SB_DFFE_Q_5_D_SB_LUT4_O_I1[3] +.sym 2240 smi_ctrl_ins.r_fifo_24_pull_SB_LUT4_I1_O_SB_LUT4_I0_O[2] +.sym 2241 smi_ctrl_ins.o_smi_data_out_SB_DFFE_Q_1_D_SB_LUT4_O_I1[3] +.sym 2246 i_smi_a1_SB_LUT4_I1_O[2] +.sym 2247 smi_ctrl_ins.o_smi_data_out_SB_DFFE_Q_1_D_SB_LUT4_O_I1[1] +.sym 2251 w_smi_data_output[2] +.sym 2254 lvds_rx_09_inst.o_fifo_data[11] +.sym 2258 smi_ctrl_ins.o_smi_data_out_SB_DFFE_Q_3_D_SB_LUT4_O_I1[3] +.sym 2259 smi_ctrl_ins.int_cnt_24_SB_DFFESR_Q_E +.sym 2260 smi_ctrl_ins.o_smi_data_out_SB_DFFE_Q_D_SB_LUT4_O_I1_SB_LUT4_O_1_I1[2] +.sym 2263 smi_ctrl_ins.o_smi_data_out_SB_DFFE_Q_5_D_SB_LUT4_O_I1_SB_LUT4_O_1_I1[1] +.sym 2268 smi_ctrl_ins.o_smi_data_out_SB_DFFE_Q_D_SB_LUT4_O_I1[3] +.sym 2269 smi_ctrl_ins.o_smi_data_out_SB_DFFE_Q_2_D_SB_LUT4_O_I1[3] +.sym 2270 w_rx_24_fifo_data[9] +.sym 2271 smi_ctrl_ins.r_fifo_24_pull_SB_LUT4_I1_O[2] .sym 2274 w_rx_24_fifo_pull -.sym 2275 lvds_rx_09_inst.o_fifo_data[12] -.sym 2287 i_smi_a1_SB_LUT4_I1_O_SB_LUT4_O_I2[3] -.sym 2289 i_smi_soe_se$rename$0 -.sym 2291 i_smi_a1_SB_LUT4_I1_O_SB_LUT4_O_I2_SB_CARRY_CO_I1[5] -.sym 2298 smi_ctrl_ins.r_fifo_24_pull_SB_DFFESR_Q_E -.sym 2299 i_smi_a1_SB_LUT4_I1_O_SB_LUT4_O_I2_SB_CARRY_CO_I1[4] -.sym 2300 $PACKER_VCC_NET -.sym 2316 i_smi_a1_SB_LUT4_I1_O_SB_LUT4_I1_O[2] +.sym 2289 smi_ctrl_ins.r_fifo_24_pull_SB_DFFESR_Q_E +.sym 2290 $PACKER_VCC_NET +.sym 2291 smi_ctrl_ins.r_fifo_24_pull_SB_LUT4_I1_O[2] +.sym 2293 i_smi_a1_SB_LUT4_I1_O_SB_LUT4_O_I2_SB_CARRY_CO_I1[4] +.sym 2296 i_smi_soe_se$rename$0 +.sym 2297 i_smi_a1_SB_LUT4_I1_O_SB_LUT4_O_I2_SB_LUT4_I0_I1[5] +.sym 2298 i_smi_a1_SB_LUT4_I1_O_SB_LUT4_O_I2_SB_CARRY_CO_I1[5] +.sym 2299 i_smi_a1_SB_LUT4_I1_O_SB_LUT4_O_I2[3] +.sym 2305 smi_ctrl_ins.int_cnt_24[4] +.sym 2306 i_smi_a1_SB_LUT4_I1_O_SB_LUT4_O_I2[5] .sym 2319 $nextpnr_ICESTORM_LC_12$O -.sym 2322 i_smi_a1_SB_LUT4_I1_O_SB_LUT4_O_I2[3] +.sym 2321 i_smi_a1_SB_LUT4_I1_O_SB_LUT4_O_I2[3] .sym 2325 i_smi_a1_SB_LUT4_I1_O_SB_LUT4_O_I2[4] -.sym 2328 i_smi_a1_SB_LUT4_I1_O_SB_LUT4_O_I2_SB_CARRY_CO_I1[4] +.sym 2327 i_smi_a1_SB_LUT4_I1_O_SB_LUT4_O_I2_SB_CARRY_CO_I1[4] .sym 2331 $nextpnr_ICESTORM_LC_13$I3 .sym 2334 i_smi_a1_SB_LUT4_I1_O_SB_LUT4_O_I2_SB_CARRY_CO_I1[5] .sym 2337 $nextpnr_ICESTORM_LC_13$COUT -.sym 2339 $PACKER_VCC_NET +.sym 2340 $PACKER_VCC_NET .sym 2341 $nextpnr_ICESTORM_LC_13$I3 -.sym 2344 i_smi_a1_SB_LUT4_I1_O_SB_LUT4_I1_O[2] +.sym 2344 smi_ctrl_ins.r_fifo_24_pull_SB_LUT4_I1_O[2] .sym 2346 i_smi_soe_se$rename$0 .sym 2347 $nextpnr_ICESTORM_LC_13$COUT +.sym 2351 smi_ctrl_ins.r_fifo_24_pull_SB_LUT4_I1_O[2] +.sym 2352 i_smi_a1_SB_LUT4_I1_O_SB_LUT4_O_I2[5] +.sym 2353 i_smi_soe_se$rename$0 +.sym 2356 smi_ctrl_ins.int_cnt_24[4] +.sym 2362 i_smi_a1_SB_LUT4_I1_O_SB_LUT4_O_I2_SB_LUT4_I0_I1[5] +.sym 2363 i_smi_soe_se$rename$0 +.sym 2364 i_smi_a1_SB_LUT4_I1_O_SB_LUT4_O_I2[5] +.sym 2365 smi_ctrl_ins.r_fifo_24_pull_SB_LUT4_I1_O[2] .sym 2366 smi_ctrl_ins.r_fifo_24_pull_SB_DFFESR_Q_E .sym 2367 r_counter[0]_$glb_clk -.sym 2368 i_smi_a1_SB_LUT4_I1_O[2]_$glb_sr -.sym 2369 smi_ctrl_ins.o_smi_data_out_SB_DFFE_Q_D_SB_LUT4_O_I1[1] -.sym 2370 i_smi_a2_SB_LUT4_I1_O_SB_LUT4_I3_O_SB_LUT4_O_I3[3] -.sym 2371 smi_ctrl_ins.o_smi_data_out_SB_DFFE_Q_3_D_SB_LUT4_O_I1_SB_LUT4_O_I3[3] -.sym 2372 io_smi_data[0]$SB_IO_OUT -.sym 2373 smi_ctrl_ins.o_smi_data_out_SB_DFFE_Q_3_D_SB_LUT4_O_I1[1] -.sym 2374 w_smi_data_output[7] -.sym 2375 w_smi_data_output[5] -.sym 2376 io_smi_data[6]$SB_IO_OUT -.sym 2383 i_smi_soe_se$rename$0 -.sym 2384 $PACKER_VCC_NET -.sym 2385 lvds_rx_09_inst.r_state_if_SB_LUT4_I2_O[0] -.sym 2387 i_smi_a1_SB_LUT4_I1_O_SB_LUT4_I1_O[2] -.sym 2388 $PACKER_VCC_NET -.sym 2391 w_rx_24_fifo_pull -.sym 2394 i_smi_a2_SB_LUT4_I1_O_SB_LUT4_I3_I2[2] -.sym 2395 i_smi_a2_SB_LUT4_I1_O_SB_LUT4_I3_I2[1] -.sym 2396 i_smi_a2_SB_LUT4_I1_O_SB_LUT4_I1_O -.sym 2397 i_smi_a2_SB_LUT4_I1_O_SB_LUT4_I3_I2[2] -.sym 2398 w_rx_24_fifo_pull -.sym 2399 w_rx_09_fifo_pulled_data[9] -.sym 2401 i_smi_a1_SB_LUT4_I1_O_SB_LUT4_O_I2_SB_LUT4_I0_O[1] -.sym 2406 lvds_rx_09_inst.r_state_if_SB_LUT4_I2_O[0] +.sym 2368 i_smi_a1_SB_LUT4_I1_O_SB_LUT4_O_I2_SB_LUT4_I0_O[2]_$glb_sr +.sym 2369 smi_ctrl_ins.o_smi_data_out_SB_DFFE_Q_1_D_SB_LUT4_O_I1_SB_LUT4_O_1_I1[1] +.sym 2370 i_smi_a1_SB_LUT4_I1_O[1] +.sym 2371 smi_ctrl_ins.int_cnt_24[4] +.sym 2372 smi_ctrl_ins.o_smi_data_out_SB_DFFE_Q_D_SB_LUT4_O_I1[3] +.sym 2373 smi_ctrl_ins.o_smi_data_out_SB_DFFE_Q_6_D_SB_LUT4_O_I1_SB_LUT4_O_1_I1[1] +.sym 2374 smi_ctrl_ins.r_fifo_24_pull_SB_LUT4_I1_O[3] +.sym 2375 smi_ctrl_ins.o_smi_data_out_SB_DFFE_Q_3_D_SB_LUT4_O_I1[3] +.sym 2376 smi_ctrl_ins.o_smi_data_out_SB_DFFE_Q_1_D_SB_LUT4_O_I1_SB_LUT4_O_1_I1[3] +.sym 2380 w_rx_09_fifo_data[0] +.sym 2382 i_smi_soe_se$rename$0 +.sym 2392 i_smi_a2_SB_LUT4_I1_O_SB_LUT4_I3_1_I2[2] +.sym 2393 i_smi_a2_SB_LUT4_I1_O_SB_LUT4_I3_1_I2[2] +.sym 2394 i_smi_a2_SB_LUT4_I1_O[1] +.sym 2395 i_smi_a2_SB_LUT4_I1_O_SB_LUT4_I3_1_I2_SB_LUT4_O_I3[1] +.sym 2398 w_rx_24_fifo_data[10] +.sym 2400 w_rx_24_fifo_data[14] +.sym 2402 w_rx_24_fifo_data[12] +.sym 2404 w_rx_24_fifo_data[11] +.sym 2405 w_rx_24_fifo_data[16] .sym 2409 i_smi_soe_se$rename$0 -.sym 2423 i_smi_a1_SB_LUT4_I1_O_SB_LUT4_O_I2_SB_CARRY_CO_I1[5] -.sym 2425 i_smi_a1_SB_LUT4_I1_O_SB_LUT4_O_I2[5] -.sym 2426 i_smi_a1_SB_LUT4_I1_O_SB_LUT4_O_I2_SB_CARRY_CO_I1[4] -.sym 2431 i_smi_a1_SB_LUT4_I1_O_SB_LUT4_I1_O[2] -.sym 2432 i_smi_a1_SB_LUT4_I1_O_SB_LUT4_O_I2_SB_LUT4_I0_I1[5] -.sym 2435 i_smi_a1_SB_LUT4_I1_O[2] -.sym 2437 smi_ctrl_ins.int_cnt_24[4] -.sym 2438 i_smi_soe_se$rename$0 -.sym 2440 i_smi_a1_SB_LUT4_I1_O_SB_LUT4_O_I2_SB_LUT4_I0_O[1] -.sym 2442 lvds_rx_09_inst.o_fifo_data[10] -.sym 2443 lvds_rx_09_inst.r_state_if_SB_LUT4_I2_O[0] +.sym 2410 w_rx_24_fifo_data[21] +.sym 2411 smi_ctrl_ins.r_fifo_24_pull_SB_DFFESR_Q_E +.sym 2412 lvds_rx_24_inst.r_state_if_SB_LUT4_I2_O[0] +.sym 2429 smi_ctrl_ins.int_cnt_24[5] +.sym 2430 i_smi_a1_SB_LUT4_I1_O[2] +.sym 2433 i_smi_a1_SB_LUT4_I1_O_SB_LUT4_O_I2_SB_CARRY_CO_I1[5] +.sym 2435 i_smi_a1_SB_LUT4_I1_O[0] +.sym 2436 i_smi_a1_SB_LUT4_I1_O_SB_LUT4_O_I2_SB_CARRY_CO_I1[4] +.sym 2437 i_smi_a1_SB_LUT4_I1_O_SB_LUT4_O_I2_SB_LUT4_I0_O[0] +.sym 2439 i_smi_a1_SB_LUT4_I1_O[1] +.sym 2444 i_smi_a1_SB_LUT4_I1_O[3] +.sym 2445 i_smi_a1_SB_LUT4_I1_O_SB_LUT4_O_I2_SB_LUT4_I0_O[1] +.sym 2446 i_smi_soe_se$rename$0 +.sym 2449 i_smi_a1_SB_LUT4_I1_O_SB_LUT4_O_I2_SB_LUT4_I0_O[2] .sym 2454 $nextpnr_ICESTORM_LC_17$O -.sym 2457 i_smi_a1_SB_LUT4_I1_O_SB_LUT4_O_I2_SB_CARRY_CO_I1[4] +.sym 2456 i_smi_a1_SB_LUT4_I1_O_SB_LUT4_O_I2_SB_CARRY_CO_I1[4] .sym 2460 $nextpnr_ICESTORM_LC_18$I3 -.sym 2463 i_smi_a1_SB_LUT4_I1_O_SB_LUT4_O_I2_SB_CARRY_CO_I1[5] +.sym 2462 i_smi_a1_SB_LUT4_I1_O_SB_LUT4_O_I2_SB_CARRY_CO_I1[5] .sym 2470 $nextpnr_ICESTORM_LC_18$I3 -.sym 2474 i_smi_a1_SB_LUT4_I1_O_SB_LUT4_O_I2_SB_LUT4_I0_O[1] -.sym 2476 i_smi_a1_SB_LUT4_I1_O[2] -.sym 2481 smi_ctrl_ins.int_cnt_24[4] -.sym 2485 i_smi_a1_SB_LUT4_I1_O_SB_LUT4_O_I2_SB_LUT4_I0_I1[5] -.sym 2486 i_smi_a1_SB_LUT4_I1_O_SB_LUT4_I1_O[2] -.sym 2487 i_smi_a1_SB_LUT4_I1_O_SB_LUT4_O_I2[5] -.sym 2488 i_smi_soe_se$rename$0 -.sym 2493 lvds_rx_09_inst.o_fifo_data[10] -.sym 2494 lvds_rx_09_inst.r_state_if_SB_LUT4_I2_O[0] -.sym 2497 i_smi_a1_SB_LUT4_I1_O_SB_LUT4_O_I2[5] -.sym 2498 i_smi_a1_SB_LUT4_I1_O_SB_LUT4_I1_O[2] -.sym 2500 i_smi_soe_se$rename$0 -.sym 2501 w_lvds_rx_09_d1_SB_LUT4_I0_O_SB_LUT4_I3_O_$glb_ce -.sym 2502 lvds_clock_buf -.sym 2503 i_smi_a1_SB_LUT4_I1_O[2]_$glb_sr -.sym 2504 smi_ctrl_ins.o_smi_data_out_SB_DFFE_Q_4_D_SB_LUT4_O_I1_SB_LUT4_O_I3[3] -.sym 2505 smi_ctrl_ins.o_smi_data_out_SB_DFFE_Q_D_SB_LUT4_O_I1_SB_LUT4_O_I3[3] -.sym 2506 i_smi_a1_SB_LUT4_I1_O_SB_LUT4_O_I2_SB_LUT4_I0_O[1] -.sym 2507 w_smi_data_output[6] -.sym 2508 i_smi_a2_SB_LUT4_I1_O_SB_LUT4_I3_O[2] -.sym 2509 i_smi_a2_SB_LUT4_I1_O_SB_LUT4_I3_O[1] -.sym 2510 w_smi_data_output[4] -.sym 2511 smi_ctrl_ins.o_smi_data_out_SB_DFFE_Q_4_D_SB_LUT4_O_I1[1] -.sym 2518 lvds_rx_09_inst.o_fifo_data[31] -.sym 2521 smi_ctrl_ins.o_smi_data_out_SB_DFFE_Q_2_D_SB_LUT4_O_I1[1] -.sym 2522 io_pmod_SB_DFFSS_Q_D_SB_LUT4_O_I0[3] -.sym 2531 w_rx_24_fifo_data[7] -.sym 2533 w_smi_data_output[4] -.sym 2535 i_smi_a2_SB_LUT4_I1_O[1] -.sym 2536 w_smi_data_output[5] -.sym 2539 smi_ctrl_ins.o_smi_data_out_SB_DFFE_Q_6_D_SB_LUT4_O_I1[3] -.sym 2540 w_rx_24_fifo_data[8] -.sym 2558 i_smi_a2_SB_LUT4_I1_O_SB_LUT4_I3_I2[1] -.sym 2559 i_smi_a2_SB_LUT4_I1_O_SB_LUT4_I1_O -.sym 2560 w_rx_09_fifo_pulled_data[25] -.sym 2563 w_rx_09_fifo_pulled_data[1] -.sym 2564 i_smi_a1_SB_LUT4_I1_O[1] -.sym 2565 smi_ctrl_ins.o_smi_data_out_SB_DFFE_Q_4_D_SB_LUT4_O_I1[3] -.sym 2566 i_smi_a2_SB_LUT4_I1_O_SB_LUT4_I3_I2_SB_LUT4_O_I3[1] -.sym 2567 i_smi_a2_SB_LUT4_I1_O_SB_LUT4_I1_I3[2] -.sym 2568 smi_ctrl_ins.o_smi_data_out_SB_DFFE_Q_6_D_SB_LUT4_O_I1_SB_LUT4_O_I3[3] -.sym 2570 i_smi_a1_SB_LUT4_I1_O[0] -.sym 2571 i_smi_a1_SB_LUT4_I1_O[2] -.sym 2572 i_smi_a2_SB_LUT4_I1_O_SB_LUT4_I3_I2[2] -.sym 2575 smi_ctrl_ins.o_smi_data_out_SB_DFFE_Q_6_D_SB_LUT4_O_I1[3] -.sym 2576 w_rx_09_fifo_pulled_data[17] -.sym 2577 i_smi_a2_SB_LUT4_I1_O[2] -.sym 2578 i_smi_a2_SB_LUT4_I1_O_SB_LUT4_I3_O[1] -.sym 2579 smi_ctrl_ins.o_smi_data_out_SB_DFFE_Q_6_D_SB_LUT4_O_I1[1] -.sym 2580 i_smi_a2_SB_LUT4_I1_O_SB_LUT4_I1_O -.sym 2581 i_smi_a2_SB_LUT4_I1_O_SB_LUT4_I3_I2[2] -.sym 2583 w_rx_09_fifo_pulled_data[9] -.sym 2584 i_smi_a2_SB_LUT4_I1_O_SB_LUT4_I3_O[3] -.sym 2585 i_smi_a2_SB_LUT4_I1_O_SB_LUT4_I3_O[2] -.sym 2586 i_smi_a1_SB_LUT4_I1_O[3] -.sym 2588 smi_ctrl_ins.o_smi_data_out_SB_DFFE_Q_4_D_SB_LUT4_O_I1[1] -.sym 2590 i_smi_a2_SB_LUT4_I1_O_SB_LUT4_I3_I2[2] -.sym 2591 smi_ctrl_ins.o_smi_data_out_SB_DFFE_Q_4_D_SB_LUT4_O_I1[3] -.sym 2592 smi_ctrl_ins.o_smi_data_out_SB_DFFE_Q_4_D_SB_LUT4_O_I1[1] -.sym 2593 i_smi_a2_SB_LUT4_I1_O_SB_LUT4_I3_O[2] -.sym 2596 i_smi_a1_SB_LUT4_I1_O[2] -.sym 2597 i_smi_a1_SB_LUT4_I1_O[0] -.sym 2598 i_smi_a1_SB_LUT4_I1_O[1] -.sym 2599 i_smi_a1_SB_LUT4_I1_O[3] -.sym 2603 i_smi_a2_SB_LUT4_I1_O_SB_LUT4_I1_O -.sym 2608 w_rx_09_fifo_pulled_data[17] -.sym 2609 i_smi_a2_SB_LUT4_I1_O_SB_LUT4_I3_I2_SB_LUT4_O_I3[1] -.sym 2610 i_smi_a2_SB_LUT4_I1_O_SB_LUT4_I3_I2[1] -.sym 2611 w_rx_09_fifo_pulled_data[1] -.sym 2614 smi_ctrl_ins.o_smi_data_out_SB_DFFE_Q_6_D_SB_LUT4_O_I1[1] -.sym 2615 i_smi_a2_SB_LUT4_I1_O_SB_LUT4_I3_O[2] -.sym 2616 smi_ctrl_ins.o_smi_data_out_SB_DFFE_Q_6_D_SB_LUT4_O_I1[3] -.sym 2617 i_smi_a2_SB_LUT4_I1_O_SB_LUT4_I3_I2[2] -.sym 2620 i_smi_a2_SB_LUT4_I1_O_SB_LUT4_I3_O[2] -.sym 2621 i_smi_a2_SB_LUT4_I1_O_SB_LUT4_I3_O[3] -.sym 2622 i_smi_a2_SB_LUT4_I1_O_SB_LUT4_I3_O[1] -.sym 2623 i_smi_a2_SB_LUT4_I1_O_SB_LUT4_I3_I2[2] -.sym 2626 i_smi_a2_SB_LUT4_I1_O_SB_LUT4_I3_I2_SB_LUT4_O_I3[1] -.sym 2627 w_rx_09_fifo_pulled_data[25] -.sym 2628 smi_ctrl_ins.o_smi_data_out_SB_DFFE_Q_6_D_SB_LUT4_O_I1_SB_LUT4_O_I3[3] -.sym 2629 w_rx_09_fifo_pulled_data[9] -.sym 2633 i_smi_a1_SB_LUT4_I1_O[3] -.sym 2634 i_smi_a2_SB_LUT4_I1_O_SB_LUT4_I1_I3[2] -.sym 2635 i_smi_a2_SB_LUT4_I1_O[2] -.sym 2636 i_smi_a2_SB_LUT4_I1_O_SB_LUT4_I1_O -.sym 2637 r_counter[0]_$glb_clk -.sym 2639 smi_ctrl_ins.o_smi_data_out_SB_DFFE_Q_3_D_SB_LUT4_O_I1[3] -.sym 2640 w_rx_24_fifo_data[3] -.sym 2641 smi_ctrl_ins.o_smi_data_out_SB_DFFE_Q_1_D_SB_LUT4_O_I1_SB_LUT4_O_1_I1[1] -.sym 2642 i_smi_a2_SB_LUT4_I1_O_SB_LUT4_I3_O[3] -.sym 2643 w_rx_24_fifo_data[5] -.sym 2644 i_smi_a2_SB_LUT4_I1_O_SB_LUT4_I3_O_SB_LUT4_O_1_I1[1] -.sym 2645 smi_ctrl_ins.o_smi_data_out_SB_DFFE_Q_3_D_SB_LUT4_O_I1_SB_LUT4_O_1_I1[1] -.sym 2646 smi_ctrl_ins.o_smi_data_out_SB_DFFE_Q_1_D_SB_LUT4_O_I1[3] -.sym 2653 i_smi_a1_SB_LUT4_I1_O_SB_LUT4_O_I2_SB_LUT4_I0_O_SB_LUT4_O_I1[1] -.sym 2658 smi_ctrl_ins.o_smi_data_out_SB_DFFE_Q_1_D_SB_LUT4_O_I1[1] -.sym 2659 w_rx_24_fifo_pull -.sym 2660 w_rx_09_fifo_data[1] -.sym 2663 w_rx_24_fifo_pulled_data[14] -.sym 2664 smi_ctrl_ins.o_smi_data_out_SB_DFFE_Q_2_D_SB_LUT4_O_I1[3] -.sym 2665 lvds_rx_09_inst.o_fifo_data[10] -.sym 2666 w_rx_24_fifo_data[11] -.sym 2668 w_rx_24_fifo_data[12] -.sym 2670 w_rx_24_fifo_data[10] -.sym 2672 i_smi_a1_SB_LUT4_I1_O[3] -.sym 2673 rx_24_fifo.wr_addr_gray[6] -.sym 2675 w_rx_24_fifo_data[18] -.sym 2693 i_smi_a1_SB_LUT4_I1_O_SB_LUT4_I1_O[3] -.sym 2697 w_rx_24_fifo_pull -.sym 2699 w_rx_24_fifo_data[7] -.sym 2700 i_smi_soe_se$rename$0 -.sym 2712 w_rx_24_fifo_data[5] -.sym 2714 i_smi_a2_SB_LUT4_I1_O[2] -.sym 2716 lvds_rx_24_inst.r_state_if_SB_LUT4_I2_O[0] -.sym 2719 i_smi_a1_SB_LUT4_I1_O_SB_LUT4_I1_O[2] -.sym 2720 io_pmod_SB_DFFSS_Q_D_SB_LUT4_O_I0[3] -.sym 2721 i_smi_a1_SB_LUT4_I1_O_SB_LUT4_I1_O[0] -.sym 2737 i_smi_a1_SB_LUT4_I1_O_SB_LUT4_I1_O[2] -.sym 2738 i_smi_a1_SB_LUT4_I1_O_SB_LUT4_I1_O[3] -.sym 2739 i_smi_a1_SB_LUT4_I1_O_SB_LUT4_I1_O[0] -.sym 2740 i_smi_soe_se$rename$0 -.sym 2743 lvds_rx_24_inst.r_state_if_SB_LUT4_I2_O[0] -.sym 2745 w_rx_24_fifo_data[7] -.sym 2755 io_pmod_SB_DFFSS_Q_D_SB_LUT4_O_I0[3] -.sym 2757 w_rx_24_fifo_pull -.sym 2758 i_smi_a2_SB_LUT4_I1_O[2] -.sym 2769 lvds_rx_24_inst.r_state_if_SB_LUT4_I2_O[0] -.sym 2770 w_rx_24_fifo_data[5] +.sym 2473 smi_ctrl_ins.int_cnt_24[5] +.sym 2482 i_smi_soe_se$rename$0 +.sym 2485 i_smi_a1_SB_LUT4_I1_O_SB_LUT4_O_I2_SB_LUT4_I0_O[1] +.sym 2488 i_smi_a1_SB_LUT4_I1_O_SB_LUT4_O_I2_SB_LUT4_I0_O[2] +.sym 2491 i_smi_a1_SB_LUT4_I1_O_SB_LUT4_O_I2_SB_LUT4_I0_O[2] +.sym 2493 i_smi_a1_SB_LUT4_I1_O_SB_LUT4_O_I2_SB_LUT4_I0_O[0] +.sym 2494 i_smi_a1_SB_LUT4_I1_O_SB_LUT4_O_I2_SB_LUT4_I0_O[1] +.sym 2497 i_smi_a1_SB_LUT4_I1_O[2] +.sym 2498 i_smi_a1_SB_LUT4_I1_O[3] +.sym 2499 i_smi_a1_SB_LUT4_I1_O[1] +.sym 2500 i_smi_a1_SB_LUT4_I1_O[0] +.sym 2502 r_counter[0]_$glb_clk +.sym 2503 i_smi_a1_SB_LUT4_I1_O_SB_LUT4_O_I2_SB_LUT4_I0_O[2]_$glb_sr +.sym 2504 smi_ctrl_ins.o_smi_data_out_SB_DFFE_Q_D_SB_LUT4_O_I2_SB_LUT4_O_1_I1[1] +.sym 2505 i_smi_a2_SB_LUT4_I1_O_SB_LUT4_I3_1_I2[1] +.sym 2506 smi_ctrl_ins.o_smi_data_out_SB_DFFE_Q_5_D_SB_LUT4_O_I1_SB_LUT4_O_1_I1[1] +.sym 2507 smi_ctrl_ins.o_smi_data_out_SB_DFFE_Q_D_SB_LUT4_O_I1_SB_LUT4_O_1_I3[1] +.sym 2508 smi_ctrl_ins.o_smi_data_out_SB_DFFE_Q_D_SB_LUT4_O_I1_SB_LUT4_O_1_I1[1] +.sym 2509 smi_ctrl_ins.o_smi_data_out_SB_DFFE_Q_2_D_SB_LUT4_O_I1[3] +.sym 2510 smi_ctrl_ins.o_smi_data_out_SB_DFFE_Q_D_SB_LUT4_O_I2[3] +.sym 2511 smi_ctrl_ins.o_smi_data_out_SB_DFFE_Q_2_D_SB_LUT4_O_I1_SB_LUT4_O_1_I1[1] +.sym 2514 lvds_rx_09_inst.r_push_SB_DFFNESR_Q_E_SB_LUT4_O_I1[3] +.sym 2526 smi_ctrl_ins.r_fifo_24_pull_SB_LUT4_I1_O[2] +.sym 2528 smi_ctrl_ins.o_smi_data_out_SB_DFFE_Q_5_D_SB_LUT4_O_I1_SB_LUT4_O_1_I1[2] +.sym 2529 w_rx_24_fifo_data[16] +.sym 2533 i_smi_soe_se$rename$0 +.sym 2534 lvds_rx_24_inst.r_state_if_SB_LUT4_I2_O[0] +.sym 2535 w_rx_24_fifo_empty +.sym 2537 smi_ctrl_ins.int_cnt_24_SB_DFFESR_Q_E +.sym 2538 smi_ctrl_ins.o_smi_data_out_SB_DFFE_Q_7_D_SB_LUT4_O_I0[2] +.sym 2539 i_smi_a2_SB_LUT4_I1_O_SB_LUT4_I3_1_I2[1] +.sym 2540 w_rx_24_fifo_data[25] +.sym 2563 w_rx_24_fifo_data[9] +.sym 2564 w_rx_24_fifo_data[8] +.sym 2567 w_rx_24_fifo_data[12] +.sym 2569 w_rx_24_fifo_data[7] +.sym 2570 w_rx_24_fifo_data[3] +.sym 2572 w_rx_24_fifo_data[5] +.sym 2573 w_rx_24_fifo_data[10] +.sym 2579 lvds_rx_24_inst.r_state_if_SB_LUT4_I2_O[0] +.sym 2581 w_rx_24_fifo_data[1] +.sym 2592 lvds_rx_24_inst.r_state_if_SB_LUT4_I2_O[0] +.sym 2593 w_rx_24_fifo_data[8] +.sym 2596 w_rx_24_fifo_data[12] +.sym 2599 lvds_rx_24_inst.r_state_if_SB_LUT4_I2_O[0] +.sym 2602 lvds_rx_24_inst.r_state_if_SB_LUT4_I2_O[0] +.sym 2604 w_rx_24_fifo_data[10] +.sym 2609 w_rx_24_fifo_data[9] +.sym 2611 lvds_rx_24_inst.r_state_if_SB_LUT4_I2_O[0] +.sym 2614 lvds_rx_24_inst.r_state_if_SB_LUT4_I2_O[0] +.sym 2616 w_rx_24_fifo_data[5] +.sym 2620 w_rx_24_fifo_data[1] +.sym 2623 lvds_rx_24_inst.r_state_if_SB_LUT4_I2_O[0] +.sym 2626 lvds_rx_24_inst.r_state_if_SB_LUT4_I2_O[0] +.sym 2627 w_rx_24_fifo_data[7] +.sym 2633 w_rx_24_fifo_data[3] +.sym 2635 lvds_rx_24_inst.r_state_if_SB_LUT4_I2_O[0] +.sym 2636 w_lvds_rx_24_d1_SB_LUT4_I0_O_SB_LUT4_I3_O_$glb_ce +.sym 2637 lvds_clock_buf +.sym 2638 i_smi_a1_SB_LUT4_I1_O_SB_LUT4_O_I2_SB_LUT4_I0_O[2]_$glb_sr +.sym 2639 smi_ctrl_ins.o_smi_data_out_SB_DFFE_Q_7_D_SB_LUT4_O_I0_SB_LUT4_O_I3[3] +.sym 2640 smi_ctrl_ins.o_smi_data_out_SB_DFFE_Q_D_SB_LUT4_O_I2_SB_LUT4_O_1_I1[2] +.sym 2641 w_rx_24_fifo_data[6] +.sym 2642 smi_ctrl_ins.o_smi_data_out_SB_DFFE_Q_7_D_SB_LUT4_O_I0[2] +.sym 2643 smi_ctrl_ins.o_smi_data_out_SB_DFFE_Q_2_D_SB_LUT4_O_I1_SB_LUT4_O_1_I1[2] +.sym 2644 smi_ctrl_ins.o_smi_data_out_SB_DFFE_Q_D_SB_LUT4_O_I1_SB_LUT4_O_1_I3[2] +.sym 2645 smi_ctrl_ins.o_smi_data_out_SB_DFFE_Q_5_D_SB_LUT4_O_I1_SB_LUT4_O_1_I1[2] +.sym 2646 w_rx_24_fifo_data[4] +.sym 2651 w_rx_24_fifo_pull +.sym 2652 w_rx_24_fifo_data[2] +.sym 2655 smi_ctrl_ins.int_cnt_24[5] +.sym 2657 w_rx_09_fifo_data[0] +.sym 2658 w_rx_09_fifo_pull +.sym 2659 smi_ctrl_ins.r_fifo_09_pull_SB_DFFESR_Q_E +.sym 2661 w_rx_24_fifo_data[7] +.sym 2663 smi_ctrl_ins.o_smi_data_out_SB_DFFE_Q_1_D_SB_LUT4_O_I1_SB_LUT4_O_1_I1[2] +.sym 2665 w_rx_24_fifo_data[20] +.sym 2666 i_smi_a2_SB_LUT4_I1_O_SB_LUT4_I3_1_I2_SB_LUT4_O_I3[1] +.sym 2670 w_rx_24_fifo_data[27] +.sym 2673 i_smi_a1_SB_LUT4_I1_O[3] +.sym 2674 smi_ctrl_ins.o_smi_data_out_SB_DFFE_Q_6_D_SB_LUT4_O_I1_SB_LUT4_O_1_I1[2] +.sym 2675 w_rx_24_fifo_data[2] +.sym 2681 lvds_rx_09_inst.r_push_SB_DFFNESR_Q_E_SB_LUT4_O_I1_SB_LUT4_I0_O_SB_DFFNESR_D_E +.sym 2693 w_rx_24_fifo_data[14] +.sym 2695 lvds_rx_24_inst.r_state_if_SB_LUT4_I2_O[0] +.sym 2703 w_rx_24_fifo_data[11] +.sym 2710 w_rx_24_fifo_data[6] +.sym 2712 w_rx_24_fifo_data[13] +.sym 2713 w_rx_24_fifo_data[0] +.sym 2725 w_rx_24_fifo_data[13] +.sym 2726 lvds_rx_24_inst.r_state_if_SB_LUT4_I2_O[0] +.sym 2738 w_rx_24_fifo_data[0] +.sym 2740 lvds_rx_24_inst.r_state_if_SB_LUT4_I2_O[0] +.sym 2750 lvds_rx_24_inst.r_state_if_SB_LUT4_I2_O[0] +.sym 2751 w_rx_24_fifo_data[11] +.sym 2762 w_rx_24_fifo_data[14] +.sym 2764 lvds_rx_24_inst.r_state_if_SB_LUT4_I2_O[0] +.sym 2767 lvds_rx_24_inst.r_state_if_SB_LUT4_I2_O[0] +.sym 2770 w_rx_24_fifo_data[6] .sym 2771 w_lvds_rx_24_d1_SB_LUT4_I0_O_SB_LUT4_I3_O_$glb_ce .sym 2772 lvds_clock_buf -.sym 2773 i_smi_a1_SB_LUT4_I1_O[2]_$glb_sr -.sym 2775 i_smi_a2_SB_LUT4_I1_O_SB_LUT4_I3_1_O[1] -.sym 2776 lvds_rx_09_inst.o_fifo_data[11] -.sym 2777 lvds_rx_09_inst.o_fifo_data[9] -.sym 2778 lvds_rx_09_inst.o_fifo_data[13] -.sym 2779 smi_ctrl_ins.o_smi_data_out_SB_DFFE_Q_6_D_SB_LUT4_O_I1[3] -.sym 2780 smi_ctrl_ins.o_smi_data_out_SB_DFFE_Q_6_D_SB_LUT4_O_I1_SB_LUT4_O_1_I1[1] -.sym 2781 lvds_rx_09_inst.o_fifo_data[10] -.sym 2786 io_pmod_SB_DFFSS_Q_D_SB_LUT4_O_I0_SB_LUT4_O_I0_SB_LUT4_O_1_I2[3] -.sym 2787 i_smi_a2_SB_LUT4_I1_O_SB_LUT4_I3_1_I2_SB_LUT4_O_I3[1] -.sym 2788 lvds_rx_09_inst.o_fifo_data[12] -.sym 2789 $PACKER_VCC_NET -.sym 2796 i_smi_a1_SB_LUT4_I1_O_SB_LUT4_O_I2_SB_LUT4_I0_O[0] -.sym 2799 rx_24_fifo.rd_addr_gray_wr[7] -.sym 2800 i_smi_a2_SB_LUT4_I1_O[2] -.sym 2804 w_rx_24_fifo_data[0] -.sym 2805 w_rx_24_fifo_data[20] -.sym 2807 smi_ctrl_ins.o_smi_data_out_SB_DFFE_Q_3_D_SB_LUT4_O_I1_SB_LUT4_O_1_I1[2] -.sym 2808 w_rx_24_fifo_data[1] -.sym 2809 w_rx_24_fifo_data[16] -.sym 2810 w_rx_24_fifo_pull -.sym 2818 w_rx_24_fifo_data[27] -.sym 2819 lvds_rx_09_inst.r_state_if_SB_DFFNESR_Q_E -.sym 2827 w_rx_24_fifo_data[12] -.sym 2830 w_rx_24_fifo_data[9] -.sym 2833 w_rx_24_fifo_data[8] -.sym 2839 w_rx_24_fifo_data[4] -.sym 2842 w_rx_24_fifo_data[0] -.sym 2844 w_rx_24_fifo_data[10] -.sym 2845 w_rx_24_fifo_data[2] -.sym 2846 w_rx_24_fifo_data[6] -.sym 2851 lvds_rx_24_inst.r_state_if_SB_LUT4_I2_O[0] -.sym 2861 lvds_rx_24_inst.r_state_if_SB_LUT4_I2_O[0] -.sym 2863 w_rx_24_fifo_data[10] -.sym 2867 w_rx_24_fifo_data[8] -.sym 2868 lvds_rx_24_inst.r_state_if_SB_LUT4_I2_O[0] -.sym 2872 w_rx_24_fifo_data[0] +.sym 2773 i_smi_a1_SB_LUT4_I1_O_SB_LUT4_O_I2_SB_LUT4_I0_O[2]_$glb_sr +.sym 2774 w_rx_24_fifo_data[22] +.sym 2775 w_rx_24_fifo_data[24] +.sym 2776 w_rx_24_fifo_data[28] +.sym 2777 w_rx_24_fifo_data[29] +.sym 2778 w_rx_24_fifo_data[26] +.sym 2779 w_rx_24_fifo_data[18] +.sym 2780 smi_ctrl_ins.o_smi_data_out_SB_DFFE_Q_1_D_SB_LUT4_O_I1_SB_LUT4_O_1_I1[2] +.sym 2781 w_rx_24_fifo_data[30] +.sym 2782 w_rx_24_fifo_data[13] +.sym 2786 smi_ctrl_ins.r_fifo_24_pull_SB_LUT4_I1_O[2] +.sym 2793 w_rx_24_fifo_pull +.sym 2795 w_rx_24_fifo_data[9] +.sym 2799 w_rx_24_fifo_data[0] +.sym 2800 smi_ctrl_ins.o_smi_data_out_SB_DFFE_Q_D_SB_LUT4_O_I1_SB_LUT4_O_1_I1[2] +.sym 2802 lvds_rx_09_inst.r_state_if_SB_LUT4_I2_O[0] +.sym 2803 w_rx_24_fifo_data[1] +.sym 2804 lvds_rx_09_inst.r_state_if_SB_DFFNESR_Q_E +.sym 2807 i_smi_a2_SB_LUT4_I1_O_SB_LUT4_I3_1_I2[1] +.sym 2811 lvds_rx_09_inst.r_push_SB_DFFNESR_Q_E_SB_LUT4_O_I1_SB_LUT4_I0_O_SB_DFFNESR_D_Q[1] +.sym 2813 lvds_rx_09_inst.r_phase_count[1] +.sym 2827 w_rx_24_fifo_data[15] +.sym 2829 w_rx_24_fifo_data[21] +.sym 2830 w_rx_24_fifo_data[23] +.sym 2841 lvds_rx_24_inst.r_state_if_SB_LUT4_I2_O[0] +.sym 2847 w_rx_24_fifo_data[17] +.sym 2849 w_rx_24_fifo_data[25] +.sym 2851 w_rx_24_fifo_data[19] +.sym 2862 w_rx_24_fifo_data[17] +.sym 2863 lvds_rx_24_inst.r_state_if_SB_LUT4_I2_O[0] +.sym 2866 lvds_rx_24_inst.r_state_if_SB_LUT4_I2_O[0] +.sym 2867 w_rx_24_fifo_data[25] .sym 2873 lvds_rx_24_inst.r_state_if_SB_LUT4_I2_O[0] -.sym 2878 w_rx_24_fifo_data[4] +.sym 2875 w_rx_24_fifo_data[19] +.sym 2879 w_rx_24_fifo_data[21] .sym 2880 lvds_rx_24_inst.r_state_if_SB_LUT4_I2_O[0] -.sym 2886 w_rx_24_fifo_data[2] +.sym 2884 w_rx_24_fifo_data[15] .sym 2887 lvds_rx_24_inst.r_state_if_SB_LUT4_I2_O[0] -.sym 2891 w_rx_24_fifo_data[12] -.sym 2892 lvds_rx_24_inst.r_state_if_SB_LUT4_I2_O[0] -.sym 2897 w_rx_24_fifo_data[6] -.sym 2899 lvds_rx_24_inst.r_state_if_SB_LUT4_I2_O[0] -.sym 2902 lvds_rx_24_inst.r_state_if_SB_LUT4_I2_O[0] -.sym 2904 w_rx_24_fifo_data[9] +.sym 2897 lvds_rx_24_inst.r_state_if_SB_LUT4_I2_O[0] +.sym 2899 w_rx_24_fifo_data[23] .sym 2906 w_lvds_rx_24_d1_SB_LUT4_I0_O_SB_LUT4_I3_O_$glb_ce .sym 2907 lvds_clock_buf -.sym 2908 i_smi_a1_SB_LUT4_I1_O[2]_$glb_sr -.sym 2909 smi_ctrl_ins.o_smi_data_out_SB_DFFE_Q_2_D_SB_LUT4_O_I1[3] -.sym 2910 rx_24_fifo.wr_addr_gray_rd_r[6] -.sym 2911 smi_ctrl_ins.o_smi_data_out_SB_DFFE_Q_1_D_SB_LUT4_O_I1_SB_LUT4_O_1_I1[2] -.sym 2912 i_smi_a2_SB_LUT4_I1_O_SB_LUT4_I3_1_O[3] -.sym 2913 w_rx_24_fifo_pull -.sym 2914 w_rx_24_fifo_data[14] -.sym 2915 smi_ctrl_ins.o_smi_data_out_SB_DFFE_Q_6_D_SB_LUT4_O_I1_SB_LUT4_O_1_I1[2] -.sym 2916 rx_24_fifo.wr_addr_gray_rd[6] -.sym 2917 $PACKER_VCC_NET -.sym 2920 $PACKER_VCC_NET -.sym 2921 lvds_rx_09_inst.r_state_if_SB_LUT4_I2_O[0] -.sym 2922 lvds_rx_09_inst.o_fifo_data[7] -.sym 2923 rx_24_fifo.wr_addr[7] -.sym 2927 w_rx_24_fifo_data[2] +.sym 2908 i_smi_a1_SB_LUT4_I1_O_SB_LUT4_O_I2_SB_LUT4_I0_O[2]_$glb_sr +.sym 2909 lvds_rx_09_inst.r_push_SB_DFFNESR_Q_E +.sym 2910 lvds_rx_09_inst.r_push_SB_DFFNESR_Q_E_SB_LUT4_O_I1_SB_LUT4_O_I2[2] +.sym 2913 lvds_rx_09_inst.r_push_SB_DFFNESR_Q_E_SB_LUT4_O_I1_SB_LUT4_O_I2[3] +.sym 2914 smi_ctrl_ins.o_smi_data_out_SB_DFFE_Q_6_D_SB_LUT4_O_I1_SB_LUT4_O_1_I1[2] +.sym 2916 smi_ctrl_ins.o_smi_data_out_SB_DFFE_Q_D_SB_LUT4_O_I1_SB_LUT4_O_1_I1[2] +.sym 2922 w_rx_24_fifo_data[16] +.sym 2923 w_rx_24_fifo_data[21] .sym 2928 i_smi_soe_se$rename$0 -.sym 2929 w_rx_24_fifo_data[6] -.sym 2930 lvds_rx_09_inst.o_fifo_data[8] -.sym 2931 w_rx_24_fifo_data[4] -.sym 2935 i_smi_a2_SB_LUT4_I1_O_SB_LUT4_I3_O_SB_LUT4_O_1_I1[2] -.sym 2936 w_rx_24_fifo_data[25] -.sym 2937 lvds_rx_24_inst.r_state_if_SB_LUT4_I2_O[0] -.sym 2939 w_rx_24_fifo_pull -.sym 2943 w_rx_24_fifo_data[20] -.sym 2949 rx_24_fifo.wr_addr[7] -.sym 2967 lvds_rx_24_inst.r_state_if_SB_LUT4_I2_O[0] -.sym 2973 w_rx_24_fifo_data[16] -.sym 2975 w_rx_24_fifo_data[14] -.sym 2977 w_rx_24_fifo_data[11] -.sym 2978 w_rx_24_fifo_data[13] -.sym 2992 w_rx_24_fifo_data[18] -.sym 2996 lvds_rx_24_inst.r_state_if_SB_LUT4_I2_O[0] -.sym 2997 w_rx_24_fifo_data[11] -.sym 3001 w_rx_24_fifo_data[18] -.sym 3003 lvds_rx_24_inst.r_state_if_SB_LUT4_I2_O[0] -.sym 3014 w_rx_24_fifo_data[14] -.sym 3015 lvds_rx_24_inst.r_state_if_SB_LUT4_I2_O[0] -.sym 3032 lvds_rx_24_inst.r_state_if_SB_LUT4_I2_O[0] -.sym 3033 w_rx_24_fifo_data[16] -.sym 3039 lvds_rx_24_inst.r_state_if_SB_LUT4_I2_O[0] -.sym 3040 w_rx_24_fifo_data[13] -.sym 3041 w_lvds_rx_24_d1_SB_LUT4_I0_O_SB_LUT4_I3_O_$glb_ce +.sym 2929 lvds_rx_24_inst.r_state_if_SB_LUT4_I2_O[0] +.sym 2931 w_rx_24_fifo_data[17] +.sym 2934 lvds_rx_09_inst.r_push_SB_DFFNESR_Q_E_SB_LUT4_O_I1_SB_LUT4_O_I2[3] +.sym 2942 rx_24_fifo.rd_addr_gray_wr_r[2] +.sym 2943 lvds_rx_09_inst.r_phase_count_SB_LUT4_I1_O[1] +.sym 2944 lvds_rx_09_inst.r_push_SB_DFFNESR_Q_E_SB_LUT4_O_I1_SB_LUT4_O_I2[2] +.sym 2947 lvds_rx_09_inst.r_push_SB_DFFNESR_Q_E_SB_LUT4_O_I1[1] +.sym 2952 lvds_rx_24_inst.r_state_if_SB_LUT4_I2_O[0] +.sym 2964 lvds_rx_09_inst.r_push_SB_DFFNESR_Q_E_SB_LUT4_O_I1_SB_LUT4_I0_O_SB_DFFNESR_D_E +.sym 2977 lvds_rx_09_inst.r_phase_count[0] +.sym 2978 lvds_rx_09_inst.r_push_SB_DFFNESR_Q_E_SB_LUT4_O_I1_SB_LUT4_I0_O_SB_DFFNESR_D_Q[1] +.sym 2979 lvds_rx_09_inst.r_push_SB_DFFNESR_Q_E_SB_LUT4_O_I1_SB_LUT4_O_I2[2] +.sym 2982 lvds_rx_09_inst.r_push_SB_DFFNESR_Q_E_SB_LUT4_O_I1_SB_LUT4_O_I2[3] +.sym 2985 lvds_rx_09_inst.r_phase_count[0] +.sym 2986 lvds_rx_09_inst.r_state_if_SB_LUT4_I2_O[0] +.sym 2988 lvds_rx_09_inst.r_phase_count[1] +.sym 2991 $PACKER_VCC_NET +.sym 2992 lvds_rx_09_inst.r_phase_count_SB_LUT4_I1_O[0] +.sym 2994 $nextpnr_ICESTORM_LC_3$O +.sym 2996 lvds_rx_09_inst.r_phase_count[0] +.sym 3000 lvds_rx_09_inst.r_phase_count_SB_CARRY_CI_CO[2] +.sym 3002 $PACKER_VCC_NET +.sym 3003 lvds_rx_09_inst.r_phase_count[1] +.sym 3004 lvds_rx_09_inst.r_phase_count[0] +.sym 3007 $PACKER_VCC_NET +.sym 3009 lvds_rx_09_inst.r_push_SB_DFFNESR_Q_E_SB_LUT4_O_I1_SB_LUT4_I0_O_SB_DFFNESR_D_Q[1] +.sym 3010 lvds_rx_09_inst.r_phase_count_SB_CARRY_CI_CO[2] +.sym 3014 lvds_rx_09_inst.r_push_SB_DFFNESR_Q_E_SB_LUT4_O_I1_SB_LUT4_O_I2[3] +.sym 3015 lvds_rx_09_inst.r_push_SB_DFFNESR_Q_E_SB_LUT4_O_I1_SB_LUT4_O_I2[2] +.sym 3032 lvds_rx_09_inst.r_state_if_SB_LUT4_I2_O[0] +.sym 3034 lvds_rx_09_inst.r_phase_count_SB_LUT4_I1_O[0] +.sym 3037 lvds_rx_09_inst.r_phase_count_SB_LUT4_I1_O[0] +.sym 3041 lvds_rx_09_inst.r_push_SB_DFFNESR_Q_E_SB_LUT4_O_I1_SB_LUT4_I0_O_SB_DFFNESR_D_E .sym 3042 lvds_clock_buf -.sym 3043 i_smi_a1_SB_LUT4_I1_O[2]_$glb_sr -.sym 3044 i_smi_a2_SB_LUT4_I1_O_SB_LUT4_I3_1_O[2] -.sym 3045 rx_24_fifo.rd_addr_gray_wr_r[7] -.sym 3048 smi_ctrl_ins.o_smi_data_out_SB_DFFE_Q_3_D_SB_LUT4_O_I1_SB_LUT4_O_1_I1[2] -.sym 3049 w_rx_24_fifo_data[29] -.sym 3050 w_rx_24_fifo_data[31] -.sym 3051 i_smi_a2_SB_LUT4_I1_O_SB_LUT4_I3_O_SB_LUT4_O_1_I1[2] -.sym 3056 w_rx_24_fifo_data[13] -.sym 3057 i_smi_a2_SB_LUT4_I1_O_SB_LUT4_I3_1_I2[1] -.sym 3059 i_smi_a2_SB_LUT4_I1_O_SB_LUT4_I3_1_O[3] -.sym 3060 i_smi_a2_SB_LUT4_I1_O[1] -.sym 3062 rx_24_fifo.rd_addr[6] -.sym 3065 w_rx_24_fifo_data[8] -.sym 3074 rx_24_fifo.full_o_SB_LUT4_I0_O_SB_LUT4_O_I1[2] -.sym 3077 w_lvds_rx_09_d1_SB_LUT4_I0_O_SB_LUT4_O_I2[2] -.sym 3083 w_lvds_rx_09_d1_SB_LUT4_I0_O_SB_LUT4_O_I2[3] -.sym 3085 lvds_rx_09_inst.r_push_SB_DFFNESR_Q_E_SB_LUT4_O_I1[1] -.sym 3104 w_rx_24_fifo_data[15] -.sym 3107 w_rx_24_fifo_data[27] -.sym 3108 w_rx_24_fifo_data[21] -.sym 3110 w_rx_24_fifo_data[23] -.sym 3113 w_rx_24_fifo_data[19] -.sym 3119 w_rx_24_fifo_data[29] -.sym 3121 lvds_rx_24_inst.r_state_if_SB_LUT4_I2_O[0] -.sym 3122 w_rx_24_fifo_data[17] -.sym 3128 w_rx_24_fifo_data[25] -.sym 3132 w_rx_24_fifo_data[17] -.sym 3133 lvds_rx_24_inst.r_state_if_SB_LUT4_I2_O[0] -.sym 3136 w_rx_24_fifo_data[15] -.sym 3138 lvds_rx_24_inst.r_state_if_SB_LUT4_I2_O[0] -.sym 3142 w_rx_24_fifo_data[25] -.sym 3143 lvds_rx_24_inst.r_state_if_SB_LUT4_I2_O[0] -.sym 3148 lvds_rx_24_inst.r_state_if_SB_LUT4_I2_O[0] -.sym 3149 w_rx_24_fifo_data[19] -.sym 3154 w_rx_24_fifo_data[29] -.sym 3157 lvds_rx_24_inst.r_state_if_SB_LUT4_I2_O[0] -.sym 3160 lvds_rx_24_inst.r_state_if_SB_LUT4_I2_O[0] -.sym 3163 w_rx_24_fifo_data[21] -.sym 3167 w_rx_24_fifo_data[27] -.sym 3169 lvds_rx_24_inst.r_state_if_SB_LUT4_I2_O[0] -.sym 3173 w_rx_24_fifo_data[23] -.sym 3174 lvds_rx_24_inst.r_state_if_SB_LUT4_I2_O[0] -.sym 3176 w_lvds_rx_24_d1_SB_LUT4_I0_O_SB_LUT4_I3_O_$glb_ce +.sym 3043 i_smi_a1_SB_LUT4_I1_O_SB_LUT4_O_I2_SB_LUT4_I0_O[2]_$glb_sr +.sym 3045 lvds_rx_24_inst.r_push_SB_LUT4_I0_1_I1_SB_LUT4_O_I2[1] +.sym 3046 lvds_rx_24_inst.r_push_SB_LUT4_I0_1_I1_SB_LUT4_O_2_I0[2] +.sym 3047 lvds_rx_24_inst.r_push_SB_LUT4_I0_1_I1_SB_LUT4_O_1_I3[1] +.sym 3048 lvds_rx_24_inst.r_push_SB_LUT4_I0_1_I1_SB_LUT4_O_1_I3[2] +.sym 3049 lvds_rx_24_inst.r_push_SB_LUT4_I0_1_I1_SB_LUT4_O_I2[5] +.sym 3050 lvds_rx_24_inst.r_push_SB_LUT4_I0_1_I1_SB_LUT4_O_I2[6] +.sym 3051 spi_if_ins.state_if[0] +.sym 3057 w_rx_24_fifo_data[25] +.sym 3063 lvds_rx_09_inst.r_push_SB_DFFNESR_Q_E +.sym 3065 lvds_rx_09_inst.r_push_SB_DFFNESR_Q_E_SB_LUT4_O_I1_SB_LUT4_O_I2[2] +.sym 3069 lvds_rx_09_inst.r_phase_count_SB_LUT4_I1_O[2] +.sym 3070 w_rx_24_fifo_push +.sym 3071 $PACKER_VCC_NET +.sym 3072 lvds_rx_09_inst.r_push_SB_DFFNESR_Q_E_SB_LUT4_O_I1_SB_LUT4_O_I2[3] +.sym 3074 lvds_rx_24_inst.r_state_if_SB_LUT4_I2_O[0] +.sym 3077 $PACKER_VCC_NET +.sym 3078 lvds_rx_24_inst.r_push_SB_LUT4_I0_1_I1_SB_LUT4_O_1_I3[0] +.sym 3079 w_rx_24_fifo_empty +.sym 3086 lvds_rx_09_inst.r_push_SB_DFFNESR_Q_E_SB_LUT4_O_I1_SB_LUT4_O_I2[2] +.sym 3088 i_smi_a1_SB_LUT4_I1_O_SB_LUT4_O_I2_SB_LUT4_I0_O[2] +.sym 3091 lvds_rx_24_inst.r_state_if_SB_DFFNESR_Q_E +.sym 3097 lvds_rx_09_inst.r_push_SB_DFFNESR_Q_E_SB_LUT4_O_I1_SB_LUT4_I0_O_SB_DFFNESR_D_Q[1] +.sym 3098 lvds_rx_09_inst.r_push_SB_DFFNESR_Q_E_SB_LUT4_O_I1_SB_LUT4_O_I2[2] +.sym 3101 lvds_rx_09_inst.r_push_SB_DFFNESR_Q_E_SB_LUT4_O_I1_SB_LUT4_O_I2[3] +.sym 3103 w_lvds_rx_09_d1_SB_LUT4_I0_O[1] +.sym 3105 rx_24_fifo.rd_addr_gray[2] +.sym 3107 lvds_rx_09_inst.r_push_SB_DFFNESR_Q_E_SB_LUT4_O_I1_SB_LUT4_I0_O_SB_DFFNESR_D_Q[0] +.sym 3111 lvds_rx_09_inst.r_phase_count_SB_LUT4_I1_O[0] +.sym 3113 lvds_rx_09_inst.r_push_SB_DFFNESR_Q_E_SB_LUT4_O_I1_SB_LUT4_O_I2[0] +.sym 3114 i_smi_a1_SB_LUT4_I1_O_SB_LUT4_O_I2_SB_LUT4_I0_O[2] +.sym 3125 lvds_rx_09_inst.r_state_if_SB_DFFNESR_Q_E_SB_LUT4_O_I2[1] +.sym 3127 rx_24_fifo.rd_addr_gray_wr[2] +.sym 3132 lvds_rx_09_inst.r_push_SB_DFFNESR_Q_E_SB_LUT4_O_I1_SB_LUT4_I0_O_SB_DFFNESR_D_Q[1] +.sym 3133 lvds_rx_09_inst.r_push_SB_DFFNESR_Q_E_SB_LUT4_O_I1_SB_LUT4_I0_O_SB_DFFNESR_D_Q[0] +.sym 3138 i_smi_a1_SB_LUT4_I1_O_SB_LUT4_O_I2_SB_LUT4_I0_O[2] +.sym 3139 w_lvds_rx_09_d1_SB_LUT4_I0_O[1] +.sym 3143 rx_24_fifo.rd_addr_gray_wr[2] +.sym 3148 lvds_rx_09_inst.r_phase_count_SB_LUT4_I1_O[0] +.sym 3150 lvds_rx_09_inst.r_push_SB_DFFNESR_Q_E_SB_LUT4_O_I1_SB_LUT4_O_I2[2] +.sym 3151 lvds_rx_09_inst.r_push_SB_DFFNESR_Q_E_SB_LUT4_O_I1_SB_LUT4_O_I2[0] +.sym 3154 lvds_rx_09_inst.r_push_SB_DFFNESR_Q_E_SB_LUT4_O_I1_SB_LUT4_O_I2[3] +.sym 3155 lvds_rx_09_inst.r_push_SB_DFFNESR_Q_E_SB_LUT4_O_I1_SB_LUT4_O_I2[2] +.sym 3156 lvds_rx_09_inst.r_push_SB_DFFNESR_Q_E_SB_LUT4_O_I1_SB_LUT4_O_I2[0] +.sym 3157 lvds_rx_09_inst.r_phase_count_SB_LUT4_I1_O[0] +.sym 3160 lvds_rx_09_inst.r_state_if_SB_DFFNESR_Q_E_SB_LUT4_O_I2[1] +.sym 3162 i_smi_a1_SB_LUT4_I1_O_SB_LUT4_O_I2_SB_LUT4_I0_O[2] +.sym 3163 w_lvds_rx_09_d1_SB_LUT4_I0_O[1] +.sym 3167 rx_24_fifo.rd_addr_gray[2] +.sym 3172 lvds_rx_09_inst.r_phase_count_SB_LUT4_I1_O[0] +.sym 3173 lvds_rx_09_inst.r_push_SB_DFFNESR_Q_E_SB_LUT4_O_I1_SB_LUT4_O_I2[0] +.sym 3174 lvds_rx_09_inst.r_push_SB_DFFNESR_Q_E_SB_LUT4_O_I1_SB_LUT4_O_I2[2] +.sym 3175 lvds_rx_09_inst.r_push_SB_DFFNESR_Q_E_SB_LUT4_O_I1_SB_LUT4_O_I2[3] .sym 3177 lvds_clock_buf -.sym 3178 i_smi_a1_SB_LUT4_I1_O[2]_$glb_sr -.sym 3179 w_rx_24_fifo_data[22] -.sym 3180 rx_24_fifo.full_o_SB_LUT4_I0_O_SB_LUT4_O_I1[2] -.sym 3181 rx_24_fifo.full_o_SB_LUT4_I0_O_SB_LUT4_O_I1_SB_LUT4_O_1_I3[3] -.sym 3182 w_rx_24_fifo_data[30] -.sym 3183 w_rx_24_fifo_data[24] -.sym 3184 w_rx_24_fifo_data[26] -.sym 3185 rx_24_fifo.full_o_SB_LUT4_I0_I1_SB_LUT4_O_I0[1] -.sym 3186 w_rx_24_fifo_data[28] -.sym 3191 i_smi_a2_SB_LUT4_I1_O_SB_LUT4_I3_1_I2_SB_LUT4_O_I3[1] -.sym 3192 w_rx_24_fifo_data[18] -.sym 3197 i_smi_a2_SB_LUT4_I1_O_SB_LUT4_I3_1_I2[1] -.sym 3199 w_rx_24_fifo_data[21] -.sym 3203 i_smi_a1_SB_LUT4_I1_O[2] -.sym 3205 w_lvds_rx_09_d1_SB_LUT4_I0_O_SB_LUT4_O_I2[3] -.sym 3209 rx_24_fifo.wr_addr_gray_SB_LUT4_I2_1_O[1] -.sym 3210 lvds_rx_24_inst.r_push_SB_LUT4_I3_I1[1] -.sym 3211 rx_24_fifo.wr_addr[7] -.sym 3212 rx_24_fifo.wr_addr_gray[6] -.sym 3233 i_smi_a1_SB_LUT4_I1_O[2] -.sym 3234 lvds_rx_09_inst.r_state_if_SB_DFFNESR_Q_E -.sym 3240 w_lvds_rx_09_d1_SB_LUT4_I0_O[1] -.sym 3241 i_smi_a1_SB_LUT4_I1_O[2] -.sym 3245 lvds_rx_09_inst.r_state_if_SB_LUT4_I2_O[0] -.sym 3252 w_lvds_rx_09_d0 -.sym 3253 w_lvds_rx_09_d1 -.sym 3256 w_lvds_rx_09_d1_SB_LUT4_I0_O[0] -.sym 3258 w_lvds_rx_09_d1_SB_LUT4_I0_O_SB_LUT4_O_I2[2] -.sym 3260 lvds_rx_09_inst.r_push_SB_DFFNESR_Q_E_SB_LUT4_O_I1[1] -.sym 3261 w_lvds_rx_09_d1_SB_LUT4_I0_O_SB_LUT4_O_I2[3] -.sym 3265 w_lvds_rx_09_d0 -.sym 3266 w_lvds_rx_09_d1 -.sym 3267 w_lvds_rx_09_d1_SB_LUT4_I0_O_SB_LUT4_O_I2[3] -.sym 3268 w_lvds_rx_09_d1_SB_LUT4_I0_O_SB_LUT4_O_I2[2] -.sym 3280 lvds_rx_09_inst.r_push_SB_DFFNESR_Q_E_SB_LUT4_O_I1[1] -.sym 3283 i_smi_a1_SB_LUT4_I1_O[2] -.sym 3285 w_lvds_rx_09_d1_SB_LUT4_I0_O[0] -.sym 3289 i_smi_a1_SB_LUT4_I1_O[2] -.sym 3290 w_lvds_rx_09_d1_SB_LUT4_I0_O[0] -.sym 3292 w_lvds_rx_09_d1_SB_LUT4_I0_O[1] -.sym 3298 lvds_rx_09_inst.r_state_if_SB_LUT4_I2_O[0] -.sym 3311 lvds_rx_09_inst.r_state_if_SB_DFFNESR_Q_E +.sym 3179 rx_24_fifo.wr_addr[4] +.sym 3180 rx_24_fifo.wr_addr_gray[6] +.sym 3181 rx_24_fifo.full_o_SB_DFFSR_Q_D_SB_LUT4_O_I1_SB_LUT4_O_I0[3] +.sym 3182 lvds_rx_24_inst.r_push_SB_LUT4_I0_1_I1[1] +.sym 3183 rx_24_fifo.wr_addr[6] +.sym 3184 rx_24_fifo.wr_addr[3] +.sym 3185 rx_24_fifo.wr_addr[7] +.sym 3186 rx_24_fifo.wr_addr[2] +.sym 3191 rx_24_fifo.rd_addr_gray[2] +.sym 3192 spi_if_ins.state_if_SB_DFFESR_Q_1_R +.sym 3196 spi_if_ins.state_if[0] +.sym 3201 spi_if_ins.state_if_SB_DFFESR_Q_D[0] +.sym 3214 lvds_rx_24_inst.r_state_if_SB_LUT4_I2_O[0] +.sym 3220 lvds_rx_09_inst.r_push_SB_DFFNESR_Q_E_SB_LUT4_O_I1_SB_LUT4_I0_O_SB_DFFNESR_D_E +.sym 3226 w_rx_24_fifo_push +.sym 3232 lvds_rx_24_inst.r_push_SB_LUT4_I0_1_I1_SB_LUT4_O_2_I0[1] +.sym 3233 lvds_rx_24_inst.r_push_SB_LUT4_I0_1_I1_SB_LUT4_O_I2[1] +.sym 3234 lvds_rx_09_inst.r_push_SB_DFFNESR_Q_E_SB_LUT4_O_I1_SB_LUT4_I0_O_SB_DFFNESR_D_E +.sym 3235 lvds_rx_24_inst.r_push_SB_LUT4_I0_1_I1_SB_LUT4_O_1_I3[1] +.sym 3236 lvds_rx_24_inst.r_push_SB_LUT4_I0_1_I1_SB_LUT4_O_1_I3[2] +.sym 3237 lvds_rx_24_inst.r_push_SB_LUT4_I0_1_I1_SB_LUT4_O_I2[5] +.sym 3238 lvds_rx_09_inst.r_push_SB_DFFNESR_Q_E_SB_LUT4_O_I1[1] +.sym 3239 lvds_rx_09_inst.r_push_SB_DFFNESR_Q_E_SB_LUT4_O_I1[3] +.sym 3240 lvds_rx_09_inst.r_push_SB_DFFNESR_Q_E_SB_LUT4_O_I1_SB_LUT4_O_I2[3] +.sym 3242 lvds_rx_24_inst.r_push_SB_LUT4_I0_1_I1_SB_LUT4_O_2_I0[2] +.sym 3243 lvds_rx_09_inst.r_push_SB_DFFNESR_Q_E_SB_LUT4_O_I1[0] +.sym 3244 lvds_rx_24_inst.r_push_SB_LUT4_I0_1_I1_SB_LUT4_O_1_I3[2] +.sym 3245 lvds_rx_24_inst.r_push_SB_LUT4_I0_1_I1_SB_LUT4_O_1_I3[3] +.sym 3248 rx_24_fifo.rd_addr_gray_wr_r[2] +.sym 3250 lvds_rx_09_inst.r_push_SB_DFFNESR_Q_E_SB_LUT4_O_I1_SB_LUT4_O_I2[2] +.sym 3251 lvds_rx_09_inst.r_phase_count_SB_LUT4_I1_O[1] +.sym 3252 lvds_rx_24_inst.r_push_SB_LUT4_I0_1_I1_SB_LUT4_O_2_I0[0] +.sym 3253 lvds_rx_09_inst.r_phase_count_SB_LUT4_I1_O[2] +.sym 3256 w_lvds_rx_09_d0 +.sym 3257 w_lvds_rx_09_d1 +.sym 3258 lvds_rx_09_inst.r_push_SB_DFFNESR_Q_E_SB_LUT4_O_I1_SB_LUT4_I0_O_SB_DFFNESR_D_Q[0] +.sym 3262 lvds_rx_24_inst.r_push_SB_LUT4_I0_1_I1_SB_LUT4_O_1_I3[0] +.sym 3263 rx_24_fifo.rd_addr_gray_wr_r[5] +.sym 3265 lvds_rx_09_inst.r_push_SB_DFFNESR_Q_E_SB_LUT4_O_I1[1] +.sym 3266 lvds_rx_09_inst.r_push_SB_DFFNESR_Q_E_SB_LUT4_O_I1[3] +.sym 3267 lvds_rx_09_inst.r_push_SB_DFFNESR_Q_E_SB_LUT4_O_I1[0] +.sym 3268 lvds_rx_09_inst.r_phase_count_SB_LUT4_I1_O[2] +.sym 3273 lvds_rx_09_inst.r_push_SB_DFFNESR_Q_E_SB_LUT4_O_I1_SB_LUT4_I0_O_SB_DFFNESR_D_Q[0] +.sym 3277 lvds_rx_09_inst.r_push_SB_DFFNESR_Q_E_SB_LUT4_O_I1[0] +.sym 3278 lvds_rx_09_inst.r_push_SB_DFFNESR_Q_E_SB_LUT4_O_I1[3] +.sym 3279 lvds_rx_09_inst.r_push_SB_DFFNESR_Q_E_SB_LUT4_O_I1[1] +.sym 3280 lvds_rx_09_inst.r_phase_count_SB_LUT4_I1_O[1] +.sym 3283 lvds_rx_24_inst.r_push_SB_LUT4_I0_1_I1_SB_LUT4_O_1_I3[1] +.sym 3284 lvds_rx_24_inst.r_push_SB_LUT4_I0_1_I1_SB_LUT4_O_1_I3[2] +.sym 3285 lvds_rx_24_inst.r_push_SB_LUT4_I0_1_I1_SB_LUT4_O_1_I3[0] +.sym 3286 lvds_rx_24_inst.r_push_SB_LUT4_I0_1_I1_SB_LUT4_O_1_I3[3] +.sym 3290 lvds_rx_24_inst.r_push_SB_LUT4_I0_1_I1_SB_LUT4_O_1_I3[2] +.sym 3291 rx_24_fifo.rd_addr_gray_wr_r[5] +.sym 3292 lvds_rx_24_inst.r_push_SB_LUT4_I0_1_I1_SB_LUT4_O_I2[5] +.sym 3295 lvds_rx_24_inst.r_push_SB_LUT4_I0_1_I1_SB_LUT4_O_I2[1] +.sym 3296 rx_24_fifo.rd_addr_gray_wr_r[2] +.sym 3297 lvds_rx_24_inst.r_push_SB_LUT4_I0_1_I1_SB_LUT4_O_2_I0[2] +.sym 3301 lvds_rx_09_inst.r_push_SB_DFFNESR_Q_E_SB_LUT4_O_I1_SB_LUT4_O_I2[2] +.sym 3302 w_lvds_rx_09_d0 +.sym 3303 w_lvds_rx_09_d1 +.sym 3304 lvds_rx_09_inst.r_push_SB_DFFNESR_Q_E_SB_LUT4_O_I1_SB_LUT4_O_I2[3] +.sym 3307 lvds_rx_24_inst.r_push_SB_LUT4_I0_1_I1_SB_LUT4_O_1_I3[1] +.sym 3308 lvds_rx_24_inst.r_push_SB_LUT4_I0_1_I1_SB_LUT4_O_2_I0[1] +.sym 3309 lvds_rx_24_inst.r_push_SB_LUT4_I0_1_I1_SB_LUT4_O_2_I0[2] +.sym 3310 lvds_rx_24_inst.r_push_SB_LUT4_I0_1_I1_SB_LUT4_O_2_I0[0] +.sym 3311 lvds_rx_09_inst.r_push_SB_DFFNESR_Q_E_SB_LUT4_O_I1_SB_LUT4_I0_O_SB_DFFNESR_D_E .sym 3312 lvds_clock_buf -.sym 3313 i_smi_a1_SB_LUT4_I1_O[2]_$glb_sr +.sym 3313 i_smi_a1_SB_LUT4_I1_O_SB_LUT4_O_I2_SB_LUT4_I0_O[2]_$glb_sr .sym 3315 rx_24_fifo.wr_addr_gray_SB_LUT4_I2_1_O[1] .sym 3316 rx_24_fifo.wr_addr_gray_SB_LUT4_I2_1_O[2] .sym 3317 rx_24_fifo.wr_addr_gray_SB_LUT4_I2_1_O[3] -.sym 3318 rx_24_fifo.full_o_SB_LUT4_I0_I1_SB_LUT4_O_2_I2[1] -.sym 3319 rx_24_fifo.full_o_SB_LUT4_I0_I1_SB_LUT4_O_1_I2[3] +.sym 3318 rx_24_fifo.wr_addr_gray_SB_LUT4_I2_1_O[4] +.sym 3319 rx_24_fifo.wr_addr_gray_SB_LUT4_I2_1_O[5] .sym 3320 rx_24_fifo.wr_addr_gray_SB_LUT4_I2_1_O[6] .sym 3321 rx_24_fifo.wr_addr_gray_SB_LUT4_I2_1_O[7] -.sym 3327 w_rx_24_fifo_pull -.sym 3328 w_lvds_rx_09_d1_SB_LUT4_I0_O_SB_LUT4_O_I2[3] -.sym 3329 rx_24_fifo.full_o_SB_LUT4_I0_O_SB_LUT4_O_I1_SB_LUT4_O_1_I3[0] -.sym 3330 lvds_rx_09_inst.r_state_if_SB_DFFNESR_Q_E -.sym 3331 w_rx_24_fifo_data[27] -.sym 3332 w_lvds_rx_09_d1_SB_LUT4_I0_O_SB_LUT4_O_I2[2] -.sym 3333 rx_24_fifo.rd_addr[7] -.sym 3334 $PACKER_VCC_NET -.sym 3336 rx_24_fifo.rd_addr[6] -.sym 3337 rx_24_fifo.rd_addr_gray_wr_r[6] -.sym 3339 w_lvds_rx_09_d1_SB_LUT4_I0_O_SB_LUT4_O_I2[2] -.sym 3343 w_rx_24_fifo_data[0] -.sym 3344 i_smi_a2_SB_LUT4_I1_O[2] -.sym 3345 w_lvds_rx_09_d1_SB_LUT4_I0_O_SB_LUT4_O_I2[3] -.sym 3347 w_rx_24_fifo_data[1] -.sym 3378 rx_24_fifo.wr_addr[6] -.sym 3379 rx_24_fifo.wr_addr[7] -.sym 3383 rx_24_fifo.wr_addr[3] -.sym 3385 rx_24_fifo.wr_addr[5] -.sym 3386 rx_24_fifo.wr_addr[4] -.sym 3388 rx_24_fifo.full_o_SB_LUT4_I0_O_SB_LUT4_O_I1_SB_LUT4_O_I0[3] -.sym 3390 rx_24_fifo.wr_addr[2] -.sym 3396 rx_24_fifo.full_o_SB_LUT4_I0_O_SB_LUT4_O_I1_SB_LUT4_O_I0[3] -.sym 3399 $nextpnr_ICESTORM_LC_3$O -.sym 3401 rx_24_fifo.full_o_SB_LUT4_I0_O_SB_LUT4_O_I1_SB_LUT4_O_I0[3] -.sym 3405 rx_24_fifo.wr_addr_gray_SB_LUT4_I2_I3[2] -.sym 3408 rx_24_fifo.wr_addr[2] -.sym 3409 rx_24_fifo.full_o_SB_LUT4_I0_O_SB_LUT4_O_I1_SB_LUT4_O_I0[3] -.sym 3411 rx_24_fifo.wr_addr_gray_SB_LUT4_I2_I3[3] -.sym 3414 rx_24_fifo.wr_addr[3] -.sym 3415 rx_24_fifo.wr_addr_gray_SB_LUT4_I2_I3[2] -.sym 3417 rx_24_fifo.wr_addr_gray_SB_LUT4_I2_I3[4] -.sym 3420 rx_24_fifo.wr_addr[4] -.sym 3421 rx_24_fifo.wr_addr_gray_SB_LUT4_I2_I3[3] -.sym 3423 rx_24_fifo.wr_addr_gray_SB_LUT4_I2_I3[5] -.sym 3426 rx_24_fifo.wr_addr[5] -.sym 3427 rx_24_fifo.wr_addr_gray_SB_LUT4_I2_I3[4] -.sym 3429 rx_24_fifo.wr_addr_gray_SB_LUT4_I2_I3[6] -.sym 3431 rx_24_fifo.wr_addr[6] -.sym 3433 rx_24_fifo.wr_addr_gray_SB_LUT4_I2_I3[5] -.sym 3437 rx_24_fifo.wr_addr[7] -.sym 3439 rx_24_fifo.wr_addr_gray_SB_LUT4_I2_I3[6] -.sym 3449 rx_24_fifo.wr_addr[3] -.sym 3451 rx_24_fifo.wr_addr[5] -.sym 3452 rx_24_fifo.wr_addr[4] -.sym 3453 rx_24_fifo.wr_addr_gray[6] -.sym 3454 rx_24_fifo.full_o_SB_LUT4_I0_O_SB_LUT4_O_I1_SB_LUT4_O_I0[3] -.sym 3455 rx_24_fifo.wr_addr[0] -.sym 3456 rx_24_fifo.wr_addr[2] -.sym 3462 rx_24_fifo.wr_addr_gray_SB_LUT4_I2_1_O[6] -.sym 3463 lvds_rx_24_inst.r_push_SB_LUT4_I3_I1[5] -.sym 3466 rx_24_fifo.wr_addr[6] -.sym 3467 lvds_rx_24_inst.r_push_SB_LUT4_I3_I1[2] -.sym 3469 lvds_rx_24_inst.r_push_SB_LUT4_I3_I1[3] -.sym 3471 lvds_rx_24_inst.r_push_SB_LUT4_I3_I1[4] -.sym 3475 lvds_rx_24_inst.r_push_SB_LUT4_I3_1_O -.sym 3477 lvds_rx_24_inst.r_state_if_SB_LUT4_I2_O[0] -.sym 3478 i_smi_a1_SB_LUT4_I1_O[2] -.sym 3484 lvds_rx_09_inst.r_state_if_SB_LUT4_I2_O[0] -.sym 3487 lvds_rx_24_inst.r_phase_count_SB_LUT4_O_I3_SB_DFFNESR_Q_E -.sym 3488 lvds_rx_24_inst.r_phase_count_SB_LUT4_I1_O_SB_DFFNESR_D_Q[3] -.sym 3489 rx_24_fifo.wr_addr[7] -.sym 3506 lvds_rx_24_inst.r_phase_count_SB_LUT4_I1_O_SB_DFFNESR_D_Q[1] -.sym 3513 lvds_rx_24_inst.r_push_SB_LUT4_I3_1_O -.sym 3517 rx_24_fifo.wr_addr_gray_SB_LUT4_I2_1_O[7] -.sym 3523 w_lvds_rx_09_d1_SB_LUT4_I0_O_SB_LUT4_O_I2[2] -.sym 3529 w_lvds_rx_09_d1_SB_LUT4_I0_O_SB_LUT4_O_I2[3] -.sym 3537 lvds_rx_24_inst.r_phase_count_SB_LUT4_I1_O_SB_DFFNESR_D_Q[1] -.sym 3549 w_lvds_rx_09_d1_SB_LUT4_I0_O_SB_LUT4_O_I2[3] -.sym 3550 w_lvds_rx_09_d1_SB_LUT4_I0_O_SB_LUT4_O_I2[2] -.sym 3559 rx_24_fifo.wr_addr_gray_SB_LUT4_I2_1_O[7] -.sym 3581 lvds_rx_24_inst.r_push_SB_LUT4_I3_1_O +.sym 3330 lvds_rx_09_inst.r_push_SB_DFFNESR_Q_E_SB_LUT4_O_I1_SB_LUT4_I0_O_SB_DFFNESR_D_E +.sym 3338 w_rx_24_fifo_data[1] +.sym 3339 rx_24_fifo.wr_addr[0] +.sym 3341 lvds_rx_24_inst.r_push_SB_LUT4_I0_1_I1_SB_LUT4_O_I2[1] +.sym 3342 rx_24_fifo.rd_addr_gray_wr_r[7] +.sym 3346 w_rx_24_fifo_data[0] +.sym 3358 lvds_rx_09_inst.r_push_SB_DFFNESR_Q_E_SB_LUT4_O_I1_SB_LUT4_I0_O_SB_DFFNESR_D_E +.sym 3368 lvds_rx_24_inst.r_push_SB_LUT4_I0_1_I1_SB_LUT4_O_2_I0[1] +.sym 3369 lvds_rx_24_inst.r_push_SB_DFFNESR_Q_E +.sym 3370 lvds_rx_24_inst.r_push_SB_LUT4_I0_1_I1[3] +.sym 3371 i_smi_a1_SB_LUT4_I1_O_SB_LUT4_O_I2_SB_LUT4_I0_O[2] +.sym 3376 lvds_rx_24_inst.r_push_SB_DFFNESR_Q_E_SB_LUT4_O_I1[1] +.sym 3377 lvds_rx_09_inst.r_push_SB_DFFNESR_Q_E_SB_LUT4_O_I1_SB_LUT4_O_I2[2] +.sym 3378 lvds_rx_24_inst.r_push_SB_LUT4_I0_1_I1[1] +.sym 3379 lvds_rx_24_inst.r_push_SB_DFFNESR_Q_E_SB_LUT4_O_I1_SB_LUT4_O_I2[0] +.sym 3380 lvds_rx_09_inst.r_push_SB_DFFNESR_Q_E_SB_LUT4_O_I1_SB_LUT4_O_I2[3] +.sym 3382 lvds_rx_24_inst.r_push_SB_LUT4_I0_1_I1[2] +.sym 3384 w_rx_24_fifo_push +.sym 3386 rx_24_fifo.wr_addr_gray_SB_LUT4_I2_1_O[3] +.sym 3387 rx_24_fifo.wr_addr_gray_SB_LUT4_I2_1_O[4] +.sym 3392 w_rx_24_fifo_full +.sym 3400 lvds_rx_24_inst.r_push_SB_LUT4_I0_1_I1[1] +.sym 3401 w_rx_24_fifo_push +.sym 3402 lvds_rx_24_inst.r_push_SB_LUT4_I0_1_I1[2] +.sym 3403 lvds_rx_24_inst.r_push_SB_LUT4_I0_1_I1[3] +.sym 3406 lvds_rx_24_inst.r_push_SB_DFFNESR_Q_E_SB_LUT4_O_I1_SB_LUT4_O_I2[0] +.sym 3407 w_rx_24_fifo_full +.sym 3409 lvds_rx_24_inst.r_push_SB_DFFNESR_Q_E_SB_LUT4_O_I1[1] +.sym 3420 lvds_rx_24_inst.r_push_SB_DFFNESR_Q_E_SB_LUT4_O_I1_SB_LUT4_O_I2[0] +.sym 3421 lvds_rx_24_inst.r_push_SB_DFFNESR_Q_E_SB_LUT4_O_I1[1] +.sym 3436 lvds_rx_09_inst.r_push_SB_DFFNESR_Q_E_SB_LUT4_O_I1_SB_LUT4_O_I2[3] +.sym 3438 i_smi_a1_SB_LUT4_I1_O_SB_LUT4_O_I2_SB_LUT4_I0_O[2] +.sym 3439 lvds_rx_09_inst.r_push_SB_DFFNESR_Q_E_SB_LUT4_O_I1_SB_LUT4_O_I2[2] +.sym 3442 rx_24_fifo.wr_addr_gray_SB_LUT4_I2_1_O[3] +.sym 3444 lvds_rx_24_inst.r_push_SB_LUT4_I0_1_I1_SB_LUT4_O_2_I0[1] +.sym 3445 rx_24_fifo.wr_addr_gray_SB_LUT4_I2_1_O[4] +.sym 3446 lvds_rx_24_inst.r_push_SB_DFFNESR_Q_E +.sym 3447 lvds_clock_buf +.sym 3448 i_smi_a1_SB_LUT4_I1_O_SB_LUT4_O_I2_SB_LUT4_I0_O[2]_$glb_sr +.sym 3449 rx_24_fifo.full_o_SB_LUT4_I0_I1[1] +.sym 3450 w_rx_24_fifo_full +.sym 3451 rx_24_fifo.wr_addr_gray_SB_DFFESR_Q_6_D[1] +.sym 3452 rx_24_fifo.wr_addr_gray_SB_DFFESR_Q_6_D[2] +.sym 3453 rx_24_fifo.full_o_SB_DFFSR_Q_D_SB_LUT4_O_I1[0] +.sym 3454 rx_24_fifo.wr_addr_gray_SB_DFFESR_Q_7_D[1] +.sym 3455 rx_24_fifo.wr_addr_gray_SB_DFFESR_Q_7_D[2] +.sym 3456 rx_24_fifo.full_o_SB_LUT4_I0_I1[2] +.sym 3462 rx_24_fifo.wr_addr[0] +.sym 3464 rx_24_fifo.wr_addr_gray_SB_LUT4_I2_1_O[3] +.sym 3465 lvds_rx_24_inst.r_push_SB_DFFNESR_Q_E +.sym 3466 rx_24_fifo.wr_addr[5] +.sym 3470 rx_24_fifo.wr_addr[0] +.sym 3476 lvds_rx_24_inst.r_state_if_SB_LUT4_I2_O[0] +.sym 3478 rx_24_fifo.rd_addr_gray_wr_r[5] +.sym 3480 lvds_rx_24_inst.r_push_SB_DFFNESR_Q_E_SB_LUT4_O_I1_SB_LUT4_I0_O_SB_DFFNESR_D_E +.sym 3482 rx_24_fifo.rd_addr_gray_wr_r[2] +.sym 3486 w_lvds_rx_09_d1 +.sym 3493 lvds_rx_24_inst.r_push_SB_DFFNESR_Q_E +.sym 3495 lvds_rx_24_inst.r_state_if_SB_LUT4_I2_O[1] +.sym 3504 lvds_rx_24_inst.r_state_if_SB_DFFNESR_Q_E +.sym 3505 lvds_rx_24_inst.r_push_SB_DFFNESR_Q_E_SB_LUT4_O_I1[0] +.sym 3506 lvds_rx_24_inst.r_push_SB_DFFNESR_Q_E_SB_LUT4_O_I1_SB_LUT4_O_I2[0] +.sym 3509 rx_24_fifo.full_o_SB_LUT4_I0_I1[3] +.sym 3513 lvds_rx_24_inst.r_state_if_SB_LUT4_I2_O[0] +.sym 3517 lvds_rx_24_inst.r_state_if_SB_LUT4_I2_O[1] +.sym 3518 rx_24_fifo.full_o_SB_LUT4_I0_I1[1] +.sym 3519 w_rx_24_fifo_full +.sym 3522 i_smi_a1_SB_LUT4_I1_O_SB_LUT4_O_I2_SB_LUT4_I0_O[2] +.sym 3527 lvds_rx_24_inst.r_push_SB_DFFNESR_Q_E_SB_LUT4_O_I1[1] +.sym 3533 rx_24_fifo.full_o_SB_LUT4_I0_I1[2] +.sym 3542 lvds_rx_24_inst.r_state_if_SB_LUT4_I2_O[0] +.sym 3547 rx_24_fifo.full_o_SB_LUT4_I0_I1[2] +.sym 3548 w_rx_24_fifo_full +.sym 3549 rx_24_fifo.full_o_SB_LUT4_I0_I1[1] +.sym 3550 rx_24_fifo.full_o_SB_LUT4_I0_I1[3] +.sym 3561 lvds_rx_24_inst.r_state_if_SB_LUT4_I2_O[1] +.sym 3571 lvds_rx_24_inst.r_push_SB_DFFNESR_Q_E_SB_LUT4_O_I1[1] +.sym 3572 lvds_rx_24_inst.r_push_SB_DFFNESR_Q_E_SB_LUT4_O_I1[0] +.sym 3573 i_smi_a1_SB_LUT4_I1_O_SB_LUT4_O_I2_SB_LUT4_I0_O[2] +.sym 3578 lvds_rx_24_inst.r_push_SB_DFFNESR_Q_E_SB_LUT4_O_I1[1] +.sym 3580 lvds_rx_24_inst.r_push_SB_DFFNESR_Q_E_SB_LUT4_O_I1_SB_LUT4_O_I2[0] +.sym 3581 lvds_rx_24_inst.r_state_if_SB_DFFNESR_Q_E .sym 3582 lvds_clock_buf -.sym 3583 i_smi_a1_SB_LUT4_I1_O[2]_$glb_sr -.sym 3584 lvds_rx_24_inst.r_phase_count[0] -.sym 3585 w_lvds_rx_09_d1_SB_LUT4_I0_O_SB_LUT4_O_I2_SB_LUT4_I0_O[0] -.sym 3586 w_rx_24_fifo_data[0] -.sym 3588 w_rx_24_fifo_data[1] -.sym 3589 lvds_rx_24_inst.r_state_if_SB_DFFNESR_Q_E_SB_LUT4_O_I0_SB_LUT4_I2_O[2] -.sym 3591 lvds_rx_24_inst.r_push_SB_LUT4_I3_1_O -.sym 3597 rx_24_fifo.wr_addr[0] -.sym 3600 w_lvds_rx_09_d1_SB_LUT4_I0_O_SB_LUT4_O_I2[3] -.sym 3609 lvds_rx_09_inst.r_push_SB_DFFNESR_Q_E_SB_LUT4_O_I1[1] -.sym 3610 lvds_rx_24_inst.r_phase_count_SB_LUT4_I1_O_SB_DFFNESR_D_Q[3] +.sym 3583 i_smi_a1_SB_LUT4_I1_O_SB_LUT4_O_I2_SB_LUT4_I0_O[2]_$glb_sr +.sym 3585 lvds_rx_24_inst.r_phase_count_SB_LUT4_I1_O[0] +.sym 3586 rx_24_fifo.full_o_SB_LUT4_I0_O[3] +.sym 3587 rx_24_fifo.full_o_SB_LUT4_I0_O[2] +.sym 3588 rx_24_fifo.full_o_SB_DFFSR_Q_D_SB_LUT4_O_I1[2] +.sym 3589 lvds_rx_24_inst.r_push_SB_LUT4_I3_O +.sym 3590 rx_24_fifo.full_o_SB_DFFSR_Q_D_SB_LUT4_O_I1_SB_LUT4_O_I0[0] +.sym 3602 i_smi_a1_SB_LUT4_I1_O_SB_LUT4_O_I2_SB_LUT4_I0_O[2] +.sym 3608 w_lvds_rx_09_d0 +.sym 3609 rx_24_fifo.rd_addr_gray_wr[0] +.sym 3610 rx_24_fifo.full_o_SB_DFFSR_Q_D_SB_LUT4_O_I1_SB_LUT4_O_I0[1] .sym 3612 $PACKER_VCC_NET -.sym 3613 w_lvds_rx_09_d1_SB_LUT4_I0_O_SB_LUT4_O_I2[2] -.sym 3618 lvds_rx_24_inst.r_push_SB_DFFNESR_Q_E -.sym 3622 i_smi_a1_SB_LUT4_I1_O[2] -.sym 3626 lvds_rx_24_inst.r_push_SB_DFFNESR_Q_E_SB_LUT4_O_I1[0] -.sym 3639 lvds_rx_24_inst.r_phase_count_SB_LUT4_I1_O_SB_DFFNESR_D_Q[2] -.sym 3641 lvds_rx_24_inst.r_phase_count_SB_LUT4_I1_O_SB_DFFNESR_D_Q[1] -.sym 3642 lvds_rx_24_inst.r_state_if_SB_LUT4_I2_O[1] -.sym 3645 lvds_rx_24_inst.r_phase_count[1] -.sym 3647 lvds_rx_24_inst.r_state_if_SB_LUT4_I2_O[0] -.sym 3653 lvds_rx_24_inst.r_phase_count[0] -.sym 3655 lvds_rx_24_inst.r_phase_count_SB_LUT4_I1_O_SB_DFFNESR_D_Q[3] -.sym 3657 $PACKER_VCC_NET -.sym 3658 lvds_rx_24_inst.r_state_if_SB_DFFNESR_Q_E_SB_LUT4_O_I0_SB_LUT4_I2_O[2] -.sym 3663 lvds_rx_24_inst.r_phase_count_SB_LUT4_I1_O_SB_DFFNESR_D_Q[2] -.sym 3664 lvds_rx_24_inst.r_phase_count_SB_LUT4_O_I3_SB_DFFNESR_Q_E -.sym 3667 lvds_rx_24_inst.r_phase_count_SB_LUT4_I1_O_SB_DFFNESR_D_Q[0] -.sym 3668 lvds_rx_24_inst.r_state_if_SB_DFFNESR_Q_E_SB_LUT4_O_I0_SB_LUT4_I2_O[0] -.sym 3669 $nextpnr_ICESTORM_LC_4$O -.sym 3672 lvds_rx_24_inst.r_phase_count[0] -.sym 3675 lvds_rx_24_inst.r_phase_count_SB_CARRY_CI_CO[2] -.sym 3677 $PACKER_VCC_NET -.sym 3678 lvds_rx_24_inst.r_phase_count[1] -.sym 3682 lvds_rx_24_inst.r_state_if_SB_DFFNESR_Q_E_SB_LUT4_O_I0_SB_LUT4_I2_O[0] -.sym 3683 lvds_rx_24_inst.r_state_if_SB_DFFNESR_Q_E_SB_LUT4_O_I0_SB_LUT4_I2_O[2] -.sym 3684 lvds_rx_24_inst.r_phase_count_SB_LUT4_I1_O_SB_DFFNESR_D_Q[2] -.sym 3685 lvds_rx_24_inst.r_phase_count_SB_CARRY_CI_CO[2] -.sym 3688 lvds_rx_24_inst.r_phase_count_SB_LUT4_I1_O_SB_DFFNESR_D_Q[0] -.sym 3689 lvds_rx_24_inst.r_phase_count_SB_LUT4_I1_O_SB_DFFNESR_D_Q[2] -.sym 3690 lvds_rx_24_inst.r_state_if_SB_LUT4_I2_O[1] -.sym 3691 lvds_rx_24_inst.r_phase_count_SB_LUT4_I1_O_SB_DFFNESR_D_Q[1] -.sym 3694 lvds_rx_24_inst.r_state_if_SB_DFFNESR_Q_E_SB_LUT4_O_I0_SB_LUT4_I2_O[0] -.sym 3695 lvds_rx_24_inst.r_phase_count[1] -.sym 3696 lvds_rx_24_inst.r_phase_count[0] -.sym 3697 lvds_rx_24_inst.r_state_if_SB_DFFNESR_Q_E_SB_LUT4_O_I0_SB_LUT4_I2_O[2] -.sym 3700 lvds_rx_24_inst.r_phase_count_SB_LUT4_I1_O_SB_DFFNESR_D_Q[2] -.sym 3701 lvds_rx_24_inst.r_phase_count_SB_LUT4_I1_O_SB_DFFNESR_D_Q[1] -.sym 3702 lvds_rx_24_inst.r_phase_count_SB_LUT4_I1_O_SB_DFFNESR_D_Q[0] -.sym 3703 lvds_rx_24_inst.r_phase_count_SB_LUT4_I1_O_SB_DFFNESR_D_Q[3] -.sym 3707 lvds_rx_24_inst.r_phase_count_SB_LUT4_I1_O_SB_DFFNESR_D_Q[0] -.sym 3709 lvds_rx_24_inst.r_state_if_SB_LUT4_I2_O[0] -.sym 3712 lvds_rx_24_inst.r_phase_count_SB_LUT4_I1_O_SB_DFFNESR_D_Q[0] -.sym 3713 lvds_rx_24_inst.r_phase_count_SB_LUT4_I1_O_SB_DFFNESR_D_Q[3] -.sym 3714 lvds_rx_24_inst.r_phase_count_SB_LUT4_I1_O_SB_DFFNESR_D_Q[2] -.sym 3715 lvds_rx_24_inst.r_phase_count_SB_LUT4_I1_O_SB_DFFNESR_D_Q[1] -.sym 3716 lvds_rx_24_inst.r_phase_count_SB_LUT4_O_I3_SB_DFFNESR_Q_E +.sym 3613 $PACKER_VCC_NET +.sym 3618 lvds_rx_24_inst.r_push_SB_DFFNESR_Q_E_SB_LUT4_O_I1_SB_LUT4_I0_O_SB_DFFNESR_D_E +.sym 3626 lvds_rx_24_inst.r_state_if_SB_DFFNESR_Q_E +.sym 3638 lvds_rx_24_inst.r_push_SB_DFFNESR_Q_E_SB_LUT4_O_I1[1] +.sym 3641 w_lvds_rx_24_d0 +.sym 3646 lvds_rx_24_inst.r_push_SB_DFFNESR_Q_E_SB_LUT4_O_I1[1] +.sym 3647 lvds_rx_24_inst.r_state_if_SB_DFFNESR_Q_E_SB_LUT4_O_I2[1] +.sym 3649 lvds_rx_24_inst.r_push_SB_DFFNESR_Q_E_SB_LUT4_O_I1_SB_LUT4_O_I2[0] +.sym 3650 w_lvds_rx_24_d1 +.sym 3651 lvds_rx_24_inst.r_push_SB_DFFNESR_Q_E_SB_LUT4_O_I1_SB_LUT4_O_I2[2] +.sym 3659 lvds_rx_24_inst.r_push_SB_DFFNESR_Q_E_SB_LUT4_O_I1_SB_LUT4_O_I2_SB_LUT4_I0_O[0] +.sym 3660 w_lvds_rx_24_d1_SB_LUT4_I0_O[1] +.sym 3662 lvds_rx_24_inst.r_phase_count_SB_LUT4_I1_O[0] +.sym 3668 i_smi_a1_SB_LUT4_I1_O_SB_LUT4_O_I2_SB_LUT4_I0_O[2] +.sym 3670 w_lvds_rx_24_d0 +.sym 3672 lvds_rx_24_inst.r_push_SB_DFFNESR_Q_E_SB_LUT4_O_I1_SB_LUT4_O_I2_SB_LUT4_I0_O[0] +.sym 3677 lvds_rx_24_inst.r_push_SB_DFFNESR_Q_E_SB_LUT4_O_I1[1] +.sym 3678 lvds_rx_24_inst.r_push_SB_DFFNESR_Q_E_SB_LUT4_O_I1_SB_LUT4_O_I2[0] +.sym 3679 i_smi_a1_SB_LUT4_I1_O_SB_LUT4_O_I2_SB_LUT4_I0_O[2] +.sym 3682 lvds_rx_24_inst.r_phase_count_SB_LUT4_I1_O[0] +.sym 3683 lvds_rx_24_inst.r_push_SB_DFFNESR_Q_E_SB_LUT4_O_I1_SB_LUT4_O_I2[2] +.sym 3684 lvds_rx_24_inst.r_push_SB_DFFNESR_Q_E_SB_LUT4_O_I1[1] +.sym 3685 lvds_rx_24_inst.r_push_SB_DFFNESR_Q_E_SB_LUT4_O_I1_SB_LUT4_O_I2[0] +.sym 3688 lvds_rx_24_inst.r_push_SB_DFFNESR_Q_E_SB_LUT4_O_I1_SB_LUT4_O_I2[0] +.sym 3689 lvds_rx_24_inst.r_phase_count_SB_LUT4_I1_O[0] +.sym 3690 lvds_rx_24_inst.r_push_SB_DFFNESR_Q_E_SB_LUT4_O_I1_SB_LUT4_O_I2[2] +.sym 3694 w_lvds_rx_24_d1 +.sym 3696 lvds_rx_24_inst.r_push_SB_DFFNESR_Q_E_SB_LUT4_O_I1_SB_LUT4_O_I2_SB_LUT4_I0_O[0] +.sym 3700 w_lvds_rx_24_d1_SB_LUT4_I0_O[1] +.sym 3702 lvds_rx_24_inst.r_state_if_SB_DFFNESR_Q_E_SB_LUT4_O_I2[1] +.sym 3703 i_smi_a1_SB_LUT4_I1_O_SB_LUT4_O_I2_SB_LUT4_I0_O[2] +.sym 3706 lvds_rx_24_inst.r_push_SB_DFFNESR_Q_E_SB_LUT4_O_I1[1] +.sym 3707 lvds_rx_24_inst.r_push_SB_DFFNESR_Q_E_SB_LUT4_O_I1_SB_LUT4_O_I2[0] +.sym 3708 lvds_rx_24_inst.r_phase_count_SB_LUT4_I1_O[0] +.sym 3709 lvds_rx_24_inst.r_push_SB_DFFNESR_Q_E_SB_LUT4_O_I1_SB_LUT4_O_I2[2] +.sym 3712 lvds_rx_24_inst.r_push_SB_DFFNESR_Q_E_SB_LUT4_O_I1_SB_LUT4_O_I2[0] +.sym 3713 w_lvds_rx_24_d1 +.sym 3714 lvds_rx_24_inst.r_push_SB_DFFNESR_Q_E_SB_LUT4_O_I1[1] +.sym 3715 w_lvds_rx_24_d0 +.sym 3716 w_lvds_rx_24_d1_SB_LUT4_I0_O_SB_LUT4_I3_O_$glb_ce .sym 3717 lvds_clock_buf -.sym 3718 i_smi_a1_SB_LUT4_I1_O[2]_$glb_sr -.sym 3720 lvds_rx_09_inst.r_phase_count_SB_LUT4_I1_O[1] -.sym 3721 lvds_rx_09_inst.r_phase_count_SB_LUT4_I1_O[2] -.sym 3722 w_lvds_rx_09_d1_SB_LUT4_I0_O_SB_LUT4_O_I2[0] -.sym 3723 lvds_rx_09_inst.r_push_SB_DFFNESR_Q_E_SB_LUT4_O_I1_SB_LUT4_I0_O_SB_DFFNESR_D_Q[0] -.sym 3724 lvds_rx_09_inst.r_phase_count[1] -.sym 3725 lvds_rx_09_inst.r_push_SB_DFFNESR_Q_E_SB_LUT4_O_I1_SB_LUT4_I0_O_SB_DFFNESR_D_Q[1] -.sym 3726 w_lvds_rx_09_d1_SB_LUT4_I0_O_SB_LUT4_O_I2[1] -.sym 3745 i_smi_a1_SB_LUT4_I1_O[2] -.sym 3751 w_rx_24_fifo_full -.sym 3753 w_lvds_rx_09_d1_SB_LUT4_I0_O_SB_LUT4_O_I2[3] -.sym 3774 lvds_rx_24_inst.r_state_if_SB_DFFNESR_Q_E -.sym 3775 lvds_rx_24_inst.r_state_if_SB_DFFNESR_Q_E_SB_LUT4_O_I0[0] -.sym 3777 lvds_rx_24_inst.r_push_SB_DFFNESR_Q_E_SB_LUT4_O_I1[0] -.sym 3784 lvds_rx_24_inst.r_push_SB_DFFNESR_Q_E_SB_LUT4_O_I1[1] -.sym 3785 lvds_rx_24_inst.r_state_if_SB_LUT4_I2_O[1] -.sym 3788 lvds_rx_24_inst.r_state_if[1] -.sym 3790 i_smi_a1_SB_LUT4_I1_O[2] -.sym 3797 w_lvds_rx_24_d1 -.sym 3798 lvds_rx_24_inst.r_state_if_SB_LUT4_I2_O[0] -.sym 3799 w_lvds_rx_24_d1_SB_LUT4_I0_O[1] -.sym 3800 w_lvds_rx_24_d0 -.sym 3805 lvds_rx_24_inst.r_state_if_SB_LUT4_I2_O[1] -.sym 3811 lvds_rx_24_inst.r_state_if_SB_DFFNESR_Q_E_SB_LUT4_O_I0[0] -.sym 3812 w_lvds_rx_24_d1_SB_LUT4_I0_O[1] -.sym 3813 lvds_rx_24_inst.r_push_SB_DFFNESR_Q_E_SB_LUT4_O_I1[0] -.sym 3814 i_smi_a1_SB_LUT4_I1_O[2] -.sym 3817 lvds_rx_24_inst.r_state_if[1] -.sym 3818 lvds_rx_24_inst.r_push_SB_DFFNESR_Q_E_SB_LUT4_O_I1[1] -.sym 3823 w_lvds_rx_24_d0 -.sym 3824 lvds_rx_24_inst.r_state_if[1] -.sym 3825 lvds_rx_24_inst.r_push_SB_DFFNESR_Q_E_SB_LUT4_O_I1[1] -.sym 3826 w_lvds_rx_24_d1 -.sym 3830 lvds_rx_24_inst.r_state_if_SB_LUT4_I2_O[0] -.sym 3836 lvds_rx_24_inst.r_state_if[1] -.sym 3837 lvds_rx_24_inst.r_push_SB_DFFNESR_Q_E_SB_LUT4_O_I1[1] -.sym 3847 lvds_rx_24_inst.r_push_SB_DFFNESR_Q_E_SB_LUT4_O_I1[1] -.sym 3848 i_smi_a1_SB_LUT4_I1_O[2] -.sym 3850 lvds_rx_24_inst.r_state_if[1] -.sym 3851 lvds_rx_24_inst.r_state_if_SB_DFFNESR_Q_E +.sym 3718 i_smi_a1_SB_LUT4_I1_O_SB_LUT4_O_I2_SB_LUT4_I0_O[2]_$glb_sr +.sym 3721 rx_24_fifo.rd_addr_gray_wr_r[5] +.sym 3722 rx_24_fifo.rd_addr_gray_wr_r[0] +.sym 3726 rx_24_fifo.full_o_SB_DFFSR_Q_D_SB_LUT4_O_I1_SB_LUT4_O_I0[1] +.sym 3737 w_rx_24_fifo_push +.sym 3738 rx_24_fifo.wr_addr[0] +.sym 3754 w_lvds_rx_24_d1_SB_LUT4_I0_O[1] +.sym 3773 lvds_rx_24_inst.r_phase_count_SB_LUT4_I1_O[0] +.sym 3775 lvds_rx_24_inst.r_push_SB_DFFNESR_Q_E_SB_LUT4_O_I1_SB_LUT4_I0_O_SB_DFFNESR_D_Q[1] +.sym 3778 lvds_rx_24_inst.r_push_SB_DFFNESR_Q_E_SB_LUT4_O_I1_SB_LUT4_O_I2_SB_LUT4_I0_O[0] +.sym 3783 lvds_rx_24_inst.r_push_SB_DFFNESR_Q_E_SB_LUT4_O_I1[0] +.sym 3786 lvds_rx_24_inst.r_state_if_SB_LUT4_I2_O[1] +.sym 3789 lvds_rx_24_inst.r_phase_count_SB_LUT4_I1_O[1] +.sym 3792 lvds_rx_24_inst.r_phase_count[0] +.sym 3796 $PACKER_VCC_NET +.sym 3797 $PACKER_VCC_NET +.sym 3798 lvds_rx_24_inst.r_phase_count_SB_LUT4_I1_O[2] +.sym 3799 lvds_rx_24_inst.r_push_SB_DFFNESR_Q_E_SB_LUT4_O_I1_SB_LUT4_I0_O_SB_DFFNESR_D_E +.sym 3800 lvds_rx_24_inst.r_phase_count[0] +.sym 3801 lvds_rx_24_inst.r_push_SB_DFFNESR_Q_E_SB_LUT4_O_I1_SB_LUT4_I0_O_SB_DFFNESR_D_Q[0] +.sym 3803 lvds_rx_24_inst.r_phase_count[1] +.sym 3804 $nextpnr_ICESTORM_LC_5$O +.sym 3806 lvds_rx_24_inst.r_phase_count[0] +.sym 3810 lvds_rx_24_inst.r_phase_count_SB_CARRY_CI_CO[2] +.sym 3812 lvds_rx_24_inst.r_phase_count[1] +.sym 3813 $PACKER_VCC_NET +.sym 3814 lvds_rx_24_inst.r_phase_count[0] +.sym 3818 lvds_rx_24_inst.r_push_SB_DFFNESR_Q_E_SB_LUT4_O_I1_SB_LUT4_I0_O_SB_DFFNESR_D_Q[1] +.sym 3819 $PACKER_VCC_NET +.sym 3820 lvds_rx_24_inst.r_phase_count_SB_CARRY_CI_CO[2] +.sym 3823 lvds_rx_24_inst.r_state_if_SB_LUT4_I2_O[1] +.sym 3824 lvds_rx_24_inst.r_push_SB_DFFNESR_Q_E_SB_LUT4_O_I1_SB_LUT4_O_I2_SB_LUT4_I0_O[0] +.sym 3825 lvds_rx_24_inst.r_phase_count_SB_LUT4_I1_O[2] +.sym 3826 lvds_rx_24_inst.r_push_SB_DFFNESR_Q_E_SB_LUT4_O_I1[0] +.sym 3830 lvds_rx_24_inst.r_phase_count_SB_LUT4_I1_O[0] +.sym 3835 lvds_rx_24_inst.r_phase_count_SB_LUT4_I1_O[1] +.sym 3836 lvds_rx_24_inst.r_push_SB_DFFNESR_Q_E_SB_LUT4_O_I1[0] +.sym 3837 lvds_rx_24_inst.r_state_if_SB_LUT4_I2_O[1] +.sym 3838 lvds_rx_24_inst.r_push_SB_DFFNESR_Q_E_SB_LUT4_O_I1_SB_LUT4_O_I2_SB_LUT4_I0_O[0] +.sym 3841 lvds_rx_24_inst.r_push_SB_DFFNESR_Q_E_SB_LUT4_O_I1_SB_LUT4_I0_O_SB_DFFNESR_D_Q[0] +.sym 3844 lvds_rx_24_inst.r_push_SB_DFFNESR_Q_E_SB_LUT4_O_I1_SB_LUT4_I0_O_SB_DFFNESR_D_Q[1] +.sym 3848 lvds_rx_24_inst.r_push_SB_DFFNESR_Q_E_SB_LUT4_O_I1_SB_LUT4_I0_O_SB_DFFNESR_D_Q[0] +.sym 3851 lvds_rx_24_inst.r_push_SB_DFFNESR_Q_E_SB_LUT4_O_I1_SB_LUT4_I0_O_SB_DFFNESR_D_E .sym 3852 lvds_clock_buf -.sym 3853 i_smi_a1_SB_LUT4_I1_O[2]_$glb_sr -.sym 3854 lvds_rx_09_inst.r_push_SB_DFFNESR_Q_E_SB_LUT4_O_I1_SB_LUT4_I0_O_SB_DFFNESR_D_E -.sym 3857 lvds_rx_09_inst.r_phase_count[0] -.sym 3859 w_rx_24_fifo_push -.sym 3861 lvds_rx_09_inst.r_push_SB_DFFNESR_Q_E_SB_LUT4_O_I1[0] -.sym 3869 w_lvds_rx_09_d1_SB_LUT4_I0_O_SB_LUT4_O_I2[0] -.sym 3870 lvds_rx_24_inst.r_state_if_SB_DFFNESR_Q_E -.sym 3871 w_lvds_rx_09_d1_SB_LUT4_I0_O_SB_LUT4_O_I2[1] -.sym 3888 i_smi_a2_SB_LUT4_I1_O[2] -.sym 3909 lvds_rx_24_inst.r_push_SB_DFFNESR_Q_E_SB_LUT4_O_I1[0] -.sym 3915 lvds_rx_24_inst.r_state_if[1] -.sym 3919 lvds_rx_24_inst.r_push_SB_DFFNESR_Q_E_SB_LUT4_O_I1[1] -.sym 3921 i_smi_a1_SB_LUT4_I1_O[2] -.sym 3946 lvds_rx_24_inst.r_push_SB_DFFNESR_Q_E_SB_LUT4_O_I1[1] -.sym 3948 lvds_rx_24_inst.r_state_if[1] -.sym 3970 lvds_rx_24_inst.r_push_SB_DFFNESR_Q_E_SB_LUT4_O_I1[1] -.sym 3971 lvds_rx_24_inst.r_push_SB_DFFNESR_Q_E_SB_LUT4_O_I1[0] -.sym 3972 i_smi_a1_SB_LUT4_I1_O[2] -.sym 3989 i_smi_a1_SB_LUT4_I1_O[3] -.sym 3992 i_smi_a2_SB_LUT4_I1_O[2] -.sym 4006 lvds_rx_09_inst.r_push_SB_DFFNESR_Q_E_SB_LUT4_O_I1[0] -.sym 4012 lvds_rx_09_inst.r_push_SB_DFFNESR_Q_E +.sym 3853 i_smi_a1_SB_LUT4_I1_O_SB_LUT4_O_I2_SB_LUT4_I0_O[2]_$glb_sr +.sym 3878 i_smi_a1$SB_IO_IN +.sym 3915 w_lvds_rx_09_d1 +.sym 3916 w_lvds_rx_09_d0 +.sym 3933 lvds_rx_09_inst.r_push_SB_DFFNESR_Q_E_SB_LUT4_O_I1[3] +.sym 3941 w_lvds_rx_09_d1 +.sym 3943 lvds_rx_09_inst.r_push_SB_DFFNESR_Q_E_SB_LUT4_O_I1[3] +.sym 3976 w_lvds_rx_09_d0 +.sym 3977 lvds_rx_09_inst.r_push_SB_DFFNESR_Q_E_SB_LUT4_O_I1[3] +.sym 3986 w_lvds_rx_09_d1_SB_LUT4_I0_O_SB_LUT4_I3_O_$glb_ce +.sym 3987 lvds_clock_buf +.sym 3988 i_smi_a1_SB_LUT4_I1_O_SB_LUT4_O_I2_SB_LUT4_I0_O[2]_$glb_sr +.sym 3990 i_smi_a1_SB_LUT4_I1_O[3] +.sym 3991 i_smi_a2_SB_LUT4_I1_O[3] +.sym 4011 o_shdn_tx_lna$SB_IO_OUT .sym 4138 i_smi_a2$SB_IO_IN -.sym 4146 i_smi_a1_SB_LUT4_I1_O[2] -.sym 4156 i_smi_a1$SB_IO_IN -.sym 4157 o_shdn_tx_lna$SB_IO_OUT -.sym 4250 i_smi_a2_SB_LUT4_I1_O[2] -.sym 4251 i_smi_a2_SB_LUT4_I1_O_SB_LUT4_I3_I2_SB_LUT4_O_I3[1] -.sym 4281 smi_ctrl_ins.int_cnt_09_SB_DFFESR_Q_E_SB_LUT4_O_I1[1] -.sym 4282 $PACKER_VCC_NET -.sym 4283 io_pmod[2]$SB_IO_IN -.sym 4284 smi_ctrl_ins.int_cnt_09[5] -.sym 4285 i_smi_a1_SB_LUT4_I1_O_SB_LUT4_I1_O[2] -.sym 4288 i_smi_a2_SB_LUT4_I1_O_SB_LUT4_I3_I2[1] -.sym 4290 $PACKER_VCC_NET -.sym 4291 smi_ctrl_ins.int_cnt_09[4] -.sym 4294 smi_ctrl_ins.int_cnt_09_SB_DFFESR_Q_E_SB_LUT4_O_I1[0] -.sym 4299 smi_ctrl_ins.int_cnt_09[4] -.sym 4303 i_smi_a1_SB_LUT4_I1_O[2] -.sym 4305 i_smi_a2_SB_LUT4_I1_O_SB_LUT4_I3_I2[2] -.sym 4306 smi_ctrl_ins.int_cnt_09_SB_DFFESR_Q_E -.sym 4309 i_smi_soe_se$rename$0 -.sym 4310 i_smi_a2_SB_LUT4_I1_O_SB_LUT4_I3_I2_SB_LUT4_O_I3[1] -.sym 4311 $nextpnr_ICESTORM_LC_1$O -.sym 4314 i_smi_a2_SB_LUT4_I1_O_SB_LUT4_I3_I2_SB_LUT4_O_I3[1] -.sym 4317 i_smi_a2_SB_LUT4_I1_O_SB_LUT4_I3_I2_SB_LUT4_O_I3[2] -.sym 4319 smi_ctrl_ins.int_cnt_09[4] -.sym 4320 $PACKER_VCC_NET -.sym 4321 i_smi_a2_SB_LUT4_I1_O_SB_LUT4_I3_I2_SB_LUT4_O_I3[1] -.sym 4324 $PACKER_VCC_NET -.sym 4325 smi_ctrl_ins.int_cnt_09[5] -.sym 4327 i_smi_a2_SB_LUT4_I1_O_SB_LUT4_I3_I2_SB_LUT4_O_I3[2] -.sym 4331 smi_ctrl_ins.int_cnt_09_SB_DFFESR_Q_E_SB_LUT4_O_I1[1] -.sym 4332 i_smi_a1_SB_LUT4_I1_O[2] -.sym 4333 smi_ctrl_ins.int_cnt_09_SB_DFFESR_Q_E_SB_LUT4_O_I1[0] -.sym 4336 i_smi_a2_SB_LUT4_I1_O_SB_LUT4_I3_I2[1] -.sym 4338 i_smi_a1_SB_LUT4_I1_O_SB_LUT4_I1_O[2] -.sym 4339 i_smi_soe_se$rename$0 -.sym 4342 i_smi_a2_SB_LUT4_I1_O_SB_LUT4_I3_I2[2] -.sym 4344 i_smi_soe_se$rename$0 -.sym 4345 i_smi_a1_SB_LUT4_I1_O_SB_LUT4_I1_O[2] -.sym 4348 i_smi_a2_SB_LUT4_I1_O_SB_LUT4_I3_I2_SB_LUT4_O_I3[1] -.sym 4349 smi_ctrl_ins.int_cnt_09[4] -.sym 4350 io_pmod[2]$SB_IO_IN -.sym 4351 smi_ctrl_ins.int_cnt_09[5] -.sym 4355 i_smi_a1_SB_LUT4_I1_O_SB_LUT4_I1_O[2] -.sym 4356 i_smi_soe_se$rename$0 -.sym 4357 i_smi_a2_SB_LUT4_I1_O_SB_LUT4_I3_I2_SB_LUT4_O_I3[1] -.sym 4358 smi_ctrl_ins.int_cnt_09_SB_DFFESR_Q_E +.sym 4207 o_shdn_tx_lna$SB_IO_OUT +.sym 4237 w_rx_09_fifo_pulled_data[0] +.sym 4238 w_rx_09_fifo_pulled_data[1] +.sym 4239 w_rx_09_fifo_pulled_data[2] +.sym 4240 w_rx_09_fifo_pulled_data[3] +.sym 4241 w_rx_09_fifo_pulled_data[4] +.sym 4242 w_rx_09_fifo_pulled_data[5] +.sym 4243 w_rx_09_fifo_pulled_data[6] +.sym 4244 w_rx_09_fifo_pulled_data[7] +.sym 4248 i_smi_a2_SB_LUT4_I1_O[3] +.sym 4268 i_smi_a1_SB_LUT4_I1_O[3] +.sym 4279 smi_ctrl_ins.o_smi_data_out_SB_DFFE_Q_D_SB_LUT4_O_I2[1] +.sym 4281 smi_ctrl_ins.o_smi_data_out_SB_DFFE_Q_7_D_SB_LUT4_O_I0[1] +.sym 4282 w_rx_09_fifo_pulled_data[20] +.sym 4283 smi_ctrl_ins.int_cnt_09_SB_DFFESR_Q_D_SB_LUT4_O_I3[1] +.sym 4284 smi_ctrl_ins.int_cnt_09_SB_DFFESR_Q_D_SB_LUT4_O_I3[2] +.sym 4287 w_rx_09_fifo_pulled_data[16] +.sym 4288 smi_ctrl_ins.o_smi_data_out_SB_DFFE_Q_3_D_SB_LUT4_O_I1[3] +.sym 4290 smi_ctrl_ins.r_fifo_24_pull_SB_LUT4_I1_O_SB_LUT4_I0_O_SB_LUT4_I3_O +.sym 4292 w_smi_data_output[6] +.sym 4293 smi_ctrl_ins.o_smi_data_out_SB_DFFE_Q_3_D_SB_LUT4_O_I1[1] +.sym 4294 smi_ctrl_ins.int_cnt_09_SB_DFFESR_Q_D_SB_LUT4_O_I3[2] +.sym 4296 smi_ctrl_ins.o_smi_data_out_SB_DFFE_Q_1_D_SB_LUT4_O_I1[2] +.sym 4297 i_smi_a3$SB_IO_IN +.sym 4298 smi_ctrl_ins.o_smi_data_out_SB_DFFE_Q_3_D_SB_LUT4_O_I1_SB_LUT4_O_I3[3] +.sym 4299 w_rx_09_fifo_pulled_data[12] +.sym 4300 smi_ctrl_ins.o_smi_data_out_SB_DFFE_Q_7_D_SB_LUT4_O_I0[0] +.sym 4301 smi_ctrl_ins.o_smi_data_out_SB_DFFE_Q_D_SB_LUT4_O_I2[3] +.sym 4303 w_rx_09_fifo_pulled_data[0] +.sym 4304 smi_ctrl_ins.o_smi_data_out_SB_DFFE_Q_1_D_SB_LUT4_O_I1[2] +.sym 4305 smi_ctrl_ins.o_smi_data_out_SB_DFFE_Q_7_D_SB_LUT4_O_I0[2] +.sym 4306 i_smi_a2_SB_LUT4_I1_O[3] +.sym 4307 w_rx_09_fifo_pulled_data[4] +.sym 4308 w_rx_09_fifo_pulled_data[28] +.sym 4309 smi_ctrl_ins.int_cnt_09[3] +.sym 4310 smi_ctrl_ins.int_cnt_09[3] +.sym 4312 smi_ctrl_ins.o_smi_data_out_SB_DFFE_Q_7_D_SB_LUT4_O_I0[1] +.sym 4313 smi_ctrl_ins.o_smi_data_out_SB_DFFE_Q_7_D_SB_LUT4_O_I0[2] +.sym 4314 i_smi_a2_SB_LUT4_I1_O[3] +.sym 4315 smi_ctrl_ins.o_smi_data_out_SB_DFFE_Q_7_D_SB_LUT4_O_I0[0] +.sym 4318 w_rx_09_fifo_pulled_data[0] +.sym 4319 smi_ctrl_ins.int_cnt_09_SB_DFFESR_Q_D_SB_LUT4_O_I3[2] +.sym 4321 i_smi_a2_SB_LUT4_I1_O[3] +.sym 4324 smi_ctrl_ins.o_smi_data_out_SB_DFFE_Q_3_D_SB_LUT4_O_I1[3] +.sym 4325 smi_ctrl_ins.o_smi_data_out_SB_DFFE_Q_3_D_SB_LUT4_O_I1[1] +.sym 4326 smi_ctrl_ins.o_smi_data_out_SB_DFFE_Q_1_D_SB_LUT4_O_I1[2] +.sym 4327 smi_ctrl_ins.int_cnt_09_SB_DFFESR_Q_D_SB_LUT4_O_I3[2] +.sym 4330 w_rx_09_fifo_pulled_data[4] +.sym 4331 smi_ctrl_ins.int_cnt_09[3] +.sym 4332 w_rx_09_fifo_pulled_data[20] +.sym 4333 smi_ctrl_ins.int_cnt_09_SB_DFFESR_Q_D_SB_LUT4_O_I3[1] +.sym 4336 smi_ctrl_ins.o_smi_data_out_SB_DFFE_Q_D_SB_LUT4_O_I2[1] +.sym 4337 smi_ctrl_ins.o_smi_data_out_SB_DFFE_Q_1_D_SB_LUT4_O_I1[2] +.sym 4338 smi_ctrl_ins.o_smi_data_out_SB_DFFE_Q_D_SB_LUT4_O_I2[3] +.sym 4339 smi_ctrl_ins.int_cnt_09_SB_DFFESR_Q_D_SB_LUT4_O_I3[2] +.sym 4342 w_rx_09_fifo_pulled_data[0] +.sym 4343 smi_ctrl_ins.int_cnt_09[3] +.sym 4344 w_rx_09_fifo_pulled_data[16] +.sym 4345 smi_ctrl_ins.int_cnt_09_SB_DFFESR_Q_D_SB_LUT4_O_I3[1] +.sym 4348 w_rx_09_fifo_pulled_data[12] +.sym 4349 smi_ctrl_ins.o_smi_data_out_SB_DFFE_Q_3_D_SB_LUT4_O_I1_SB_LUT4_O_I3[3] +.sym 4350 w_rx_09_fifo_pulled_data[28] +.sym 4351 smi_ctrl_ins.int_cnt_09[3] +.sym 4355 i_smi_a3$SB_IO_IN +.sym 4357 w_smi_data_output[6] +.sym 4358 smi_ctrl_ins.r_fifo_24_pull_SB_LUT4_I1_O_SB_LUT4_I0_O_SB_LUT4_I3_O .sym 4359 r_counter[0]_$glb_clk -.sym 4360 i_smi_a1_SB_LUT4_I1_O[2]_$glb_sr -.sym 4381 i_smi_a2_SB_LUT4_I1_O_SB_LUT4_I3_I2[1] -.sym 4382 $PACKER_VCC_NET -.sym 4393 i_smi_a1_SB_LUT4_I1_O_SB_LUT4_O_I2_SB_LUT4_I0_O_SB_LUT4_O_I1[2] -.sym 4407 i_smi_a3$SB_IO_IN -.sym 4418 i_smi_a2_SB_LUT4_I1_O_SB_LUT4_I3_I2[1] -.sym 4419 rx_09_fifo.wr_addr[0] -.sym 4421 lvds_rx_09_inst.o_fifo_data[28] -.sym 4422 w_rx_09_fifo_pulled_data[8] -.sym 4427 rx_09_fifo.wr_addr[2] -.sym 4428 smi_ctrl_ins.o_smi_data_out_SB_DFFE_Q_7_D_SB_LUT4_O_I0[2] -.sym 4431 i_smi_a2_SB_LUT4_I1_O_SB_LUT4_I3_I2_SB_LUT4_O_I3[1] -.sym 4442 i_smi_a1_SB_LUT4_I1_O_SB_LUT4_O_I2_SB_LUT4_I0_O_SB_LUT4_O_I1[2] -.sym 4443 lvds_rx_09_inst.o_fifo_data[26] -.sym 4448 smi_ctrl_ins.int_cnt_09_SB_DFFESR_Q_E_SB_LUT4_O_I1_SB_LUT4_O_I0_SB_LUT4_I3_O[0] -.sym 4453 i_smi_soe_se$rename$0 -.sym 4454 i_smi_a1_SB_LUT4_I1_O[0] -.sym 4456 lvds_rx_09_inst.o_fifo_data[20] -.sym 4457 lvds_rx_09_inst.o_fifo_data[18] -.sym 4460 lvds_rx_09_inst.r_state_if_SB_LUT4_I2_O[0] -.sym 4462 i_smi_a3$SB_IO_IN -.sym 4464 i_smi_a1_SB_LUT4_I1_O_SB_LUT4_I1_O[2] -.sym 4468 i_smi_a2_SB_LUT4_I1_O[2] -.sym 4470 w_smi_data_output[1] -.sym 4472 w_smi_data_output[2] -.sym 4475 i_smi_a1_SB_LUT4_I1_O_SB_LUT4_I1_O[2] -.sym 4477 i_smi_soe_se$rename$0 -.sym 4487 i_smi_a1_SB_LUT4_I1_O_SB_LUT4_O_I2_SB_LUT4_I0_O_SB_LUT4_O_I1[2] -.sym 4488 i_smi_a1_SB_LUT4_I1_O[0] -.sym 4489 smi_ctrl_ins.int_cnt_09_SB_DFFESR_Q_E_SB_LUT4_O_I1_SB_LUT4_O_I0_SB_LUT4_I3_O[0] -.sym 4490 i_smi_a2_SB_LUT4_I1_O[2] -.sym 4493 w_smi_data_output[2] -.sym 4496 i_smi_a3$SB_IO_IN -.sym 4499 lvds_rx_09_inst.r_state_if_SB_LUT4_I2_O[0] -.sym 4500 lvds_rx_09_inst.o_fifo_data[20] -.sym 4507 lvds_rx_09_inst.o_fifo_data[26] -.sym 4508 lvds_rx_09_inst.r_state_if_SB_LUT4_I2_O[0] -.sym 4511 lvds_rx_09_inst.r_state_if_SB_LUT4_I2_O[0] -.sym 4513 lvds_rx_09_inst.o_fifo_data[18] -.sym 4519 w_smi_data_output[1] -.sym 4520 i_smi_a3$SB_IO_IN -.sym 4521 w_lvds_rx_09_d1_SB_LUT4_I0_O_SB_LUT4_I3_O_$glb_ce -.sym 4522 lvds_clock_buf -.sym 4523 i_smi_a1_SB_LUT4_I1_O[2]_$glb_sr +.sym 4365 w_rx_09_fifo_pulled_data[8] +.sym 4366 w_rx_09_fifo_pulled_data[9] +.sym 4367 w_rx_09_fifo_pulled_data[10] +.sym 4368 w_rx_09_fifo_pulled_data[11] +.sym 4369 w_rx_09_fifo_pulled_data[12] +.sym 4370 w_rx_09_fifo_pulled_data[13] +.sym 4371 w_rx_09_fifo_pulled_data[14] +.sym 4372 w_rx_09_fifo_pulled_data[15] +.sym 4377 io_smi_data[0]$SB_IO_OUT +.sym 4378 smi_ctrl_ins.o_smi_data_out_SB_DFFE_Q_3_D_SB_LUT4_O_I1[3] +.sym 4379 rx_09_fifo.wr_addr[0] +.sym 4382 lvds_rx_09_inst.o_fifo_data[6] +.sym 4383 w_smi_data_output[4] +.sym 4387 w_smi_data_output[3] +.sym 4388 io_pmod[4]$SB_IO_IN +.sym 4393 io_pmod_SB_DFFSS_Q_D_SB_LUT4_O_I0_SB_LUT4_O_I0[1] +.sym 4394 io_pmod[7]$SB_IO_IN +.sym 4395 smi_ctrl_ins.o_smi_data_out_SB_DFFE_Q_D_SB_LUT4_O_I2[3] +.sym 4402 w_rx_09_fifo_push +.sym 4403 rx_09_fifo.wr_addr[7] +.sym 4404 smi_ctrl_ins.int_cnt_09[3] +.sym 4405 smi_ctrl_ins.int_cnt_09[3] +.sym 4406 w_rx_09_fifo_pulled_data[16] +.sym 4407 io_pmod_SB_DFFSS_Q_D_SB_LUT4_O_I0_SB_LUT4_O_2_I0[3] +.sym 4409 io_pmod_SB_DFFSS_Q_D_SB_LUT4_O_I0_SB_LUT4_O_3_I2[1] +.sym 4414 io_smi_data[6]$SB_IO_OUT +.sym 4415 w_rx_09_fifo_pulled_data[20] +.sym 4416 $PACKER_VCC_NET +.sym 4417 i_smi_a3$SB_IO_IN +.sym 4418 io_pmod_SB_DFFSS_Q_D_SB_LUT4_O_I0_SB_LUT4_O_3_I2[3] +.sym 4420 rx_09_fifo.wr_addr[4] +.sym 4421 rx_09_fifo.wr_addr[3] +.sym 4422 smi_ctrl_ins.int_cnt_09_SB_DFFESR_Q_D_SB_LUT4_O_I3[2] +.sym 4425 rx_09_fifo.wr_addr[2] +.sym 4426 rx_09_fifo.full_o_SB_DFFSR_Q_D_SB_LUT4_O_I1_SB_LUT4_O_I0_SB_LUT4_O_1_I3[1] +.sym 4427 rx_09_fifo.wr_addr[6] +.sym 4428 smi_ctrl_ins.int_cnt_09_SB_DFFESR_Q_D_SB_LUT4_O_I3[2] +.sym 4429 w_rx_09_fifo_pulled_data[28] +.sym 4430 rx_09_fifo.wr_addr[6] +.sym 4431 smi_ctrl_ins.int_cnt_24_SB_DFFESR_Q_E +.sym 4442 smi_ctrl_ins.o_smi_data_out_SB_DFFE_Q_D_SB_LUT4_O_I1[1] +.sym 4443 w_rx_09_fifo_pulled_data[1] +.sym 4444 smi_ctrl_ins.int_cnt_09_SB_DFFESR_Q_D_SB_LUT4_O_I3[2] +.sym 4445 smi_ctrl_ins.o_smi_data_out_SB_DFFE_Q_5_D_SB_LUT4_O_I1[1] +.sym 4446 smi_ctrl_ins.o_smi_data_out_SB_DFFE_Q_1_D_SB_LUT4_O_I1[1] +.sym 4447 smi_ctrl_ins.o_smi_data_out_SB_DFFE_Q_5_D_SB_LUT4_O_I1[3] +.sym 4448 smi_ctrl_ins.r_fifo_24_pull_SB_LUT4_I1_O_SB_LUT4_I0_O[2] +.sym 4449 smi_ctrl_ins.o_smi_data_out_SB_DFFE_Q_1_D_SB_LUT4_O_I1[3] +.sym 4450 smi_ctrl_ins.o_smi_data_out_SB_DFFE_Q_2_D_SB_LUT4_O_I1[1] +.sym 4451 smi_ctrl_ins.o_smi_data_out_SB_DFFE_Q_1_D_SB_LUT4_O_I1[2] +.sym 4452 smi_ctrl_ins.int_cnt_09_SB_DFFESR_Q_D_SB_LUT4_O_I3[2] +.sym 4454 smi_ctrl_ins.o_smi_data_out_SB_DFFE_Q_6_D_SB_LUT4_O_I1[3] +.sym 4455 smi_ctrl_ins.o_smi_data_out_SB_DFFE_Q_6_D_SB_LUT4_O_I1_SB_LUT4_O_I3[3] +.sym 4456 smi_ctrl_ins.int_cnt_09_SB_DFFESR_Q_D_SB_LUT4_O_I3[1] +.sym 4459 w_rx_09_fifo_pulled_data[9] +.sym 4460 smi_ctrl_ins.int_cnt_09[3] +.sym 4462 smi_ctrl_ins.o_smi_data_out_SB_DFFE_Q_6_D_SB_LUT4_O_I1[1] +.sym 4464 i_smi_a1_SB_LUT4_I1_O[3] +.sym 4466 i_smi_a2_SB_LUT4_I1_O[3] +.sym 4467 w_rx_09_fifo_pulled_data[17] +.sym 4468 w_rx_09_fifo_pulled_data[25] +.sym 4469 smi_ctrl_ins.r_fifo_24_pull_SB_LUT4_I1_O_SB_LUT4_I0_O_SB_LUT4_I3_O +.sym 4472 smi_ctrl_ins.o_smi_data_out_SB_DFFE_Q_D_SB_LUT4_O_I1[3] +.sym 4473 smi_ctrl_ins.o_smi_data_out_SB_DFFE_Q_2_D_SB_LUT4_O_I1[3] +.sym 4475 smi_ctrl_ins.o_smi_data_out_SB_DFFE_Q_1_D_SB_LUT4_O_I1[2] +.sym 4476 smi_ctrl_ins.o_smi_data_out_SB_DFFE_Q_1_D_SB_LUT4_O_I1[3] +.sym 4477 smi_ctrl_ins.o_smi_data_out_SB_DFFE_Q_1_D_SB_LUT4_O_I1[1] +.sym 4478 smi_ctrl_ins.int_cnt_09_SB_DFFESR_Q_D_SB_LUT4_O_I3[2] +.sym 4481 smi_ctrl_ins.o_smi_data_out_SB_DFFE_Q_2_D_SB_LUT4_O_I1[1] +.sym 4482 smi_ctrl_ins.o_smi_data_out_SB_DFFE_Q_1_D_SB_LUT4_O_I1[2] +.sym 4483 smi_ctrl_ins.int_cnt_09_SB_DFFESR_Q_D_SB_LUT4_O_I3[2] +.sym 4484 smi_ctrl_ins.o_smi_data_out_SB_DFFE_Q_2_D_SB_LUT4_O_I1[3] +.sym 4487 smi_ctrl_ins.o_smi_data_out_SB_DFFE_Q_1_D_SB_LUT4_O_I1[2] +.sym 4488 smi_ctrl_ins.int_cnt_09_SB_DFFESR_Q_D_SB_LUT4_O_I3[2] +.sym 4489 smi_ctrl_ins.o_smi_data_out_SB_DFFE_Q_D_SB_LUT4_O_I1[1] +.sym 4490 smi_ctrl_ins.o_smi_data_out_SB_DFFE_Q_D_SB_LUT4_O_I1[3] +.sym 4494 smi_ctrl_ins.r_fifo_24_pull_SB_LUT4_I1_O_SB_LUT4_I0_O[2] +.sym 4495 i_smi_a2_SB_LUT4_I1_O[3] +.sym 4496 i_smi_a1_SB_LUT4_I1_O[3] +.sym 4499 smi_ctrl_ins.int_cnt_09[3] +.sym 4500 w_rx_09_fifo_pulled_data[25] +.sym 4501 smi_ctrl_ins.o_smi_data_out_SB_DFFE_Q_6_D_SB_LUT4_O_I1_SB_LUT4_O_I3[3] +.sym 4502 w_rx_09_fifo_pulled_data[9] +.sym 4505 smi_ctrl_ins.int_cnt_09_SB_DFFESR_Q_D_SB_LUT4_O_I3[1] +.sym 4506 smi_ctrl_ins.int_cnt_09[3] +.sym 4507 w_rx_09_fifo_pulled_data[1] +.sym 4508 w_rx_09_fifo_pulled_data[17] +.sym 4511 smi_ctrl_ins.o_smi_data_out_SB_DFFE_Q_6_D_SB_LUT4_O_I1[1] +.sym 4512 smi_ctrl_ins.int_cnt_09_SB_DFFESR_Q_D_SB_LUT4_O_I3[2] +.sym 4513 smi_ctrl_ins.o_smi_data_out_SB_DFFE_Q_1_D_SB_LUT4_O_I1[2] +.sym 4514 smi_ctrl_ins.o_smi_data_out_SB_DFFE_Q_6_D_SB_LUT4_O_I1[3] +.sym 4517 smi_ctrl_ins.o_smi_data_out_SB_DFFE_Q_5_D_SB_LUT4_O_I1[1] +.sym 4518 smi_ctrl_ins.int_cnt_09_SB_DFFESR_Q_D_SB_LUT4_O_I3[2] +.sym 4519 smi_ctrl_ins.o_smi_data_out_SB_DFFE_Q_5_D_SB_LUT4_O_I1[3] +.sym 4520 smi_ctrl_ins.o_smi_data_out_SB_DFFE_Q_1_D_SB_LUT4_O_I1[2] +.sym 4521 smi_ctrl_ins.r_fifo_24_pull_SB_LUT4_I1_O_SB_LUT4_I0_O_SB_LUT4_I3_O +.sym 4522 r_counter[0]_$glb_clk .sym 4524 w_rx_09_fifo_pulled_data[16] .sym 4525 w_rx_09_fifo_pulled_data[17] .sym 4526 w_rx_09_fifo_pulled_data[18] @@ -5475,544 +5513,492 @@ .sym 4529 w_rx_09_fifo_pulled_data[21] .sym 4530 w_rx_09_fifo_pulled_data[22] .sym 4531 w_rx_09_fifo_pulled_data[23] -.sym 4532 rx_09_fifo.rd_addr_gray_SB_DFFESR_Q_5_D[3] -.sym 4548 rx_09_fifo.full_o_SB_DFFSR_Q_D_SB_LUT4_O_I0_SB_LUT4_O_I2[1] -.sym 4549 w_rx_09_fifo_pulled_data[0] -.sym 4553 w_rx_09_fifo_pulled_data[2] -.sym 4555 w_rx_09_fifo_pulled_data[23] -.sym 4559 w_rx_09_fifo_pulled_data[17] -.sym 4565 w_rx_09_fifo_pulled_data[0] -.sym 4568 lvds_rx_09_inst.o_fifo_data[14] -.sym 4569 lvds_rx_09_inst.o_fifo_data[22] -.sym 4570 lvds_rx_09_inst.o_fifo_data[28] -.sym 4571 i_smi_a2_SB_LUT4_I1_O_SB_LUT4_I3_I2_SB_LUT4_O_I3[1] -.sym 4573 lvds_rx_09_inst.o_fifo_data[16] -.sym 4578 lvds_rx_09_inst.o_fifo_data[24] -.sym 4580 lvds_rx_09_inst.r_state_if_SB_LUT4_I2_O[0] -.sym 4581 w_rx_09_fifo_pulled_data[24] -.sym 4584 i_smi_a2_SB_LUT4_I1_O_SB_LUT4_I3_I2[1] -.sym 4588 w_rx_09_fifo_pulled_data[8] -.sym 4589 w_rx_09_fifo_pulled_data[16] -.sym 4595 lvds_rx_09_inst.o_fifo_data[12] -.sym 4599 lvds_rx_09_inst.o_fifo_data[14] -.sym 4600 lvds_rx_09_inst.r_state_if_SB_LUT4_I2_O[0] -.sym 4605 lvds_rx_09_inst.r_state_if_SB_LUT4_I2_O[0] -.sym 4607 lvds_rx_09_inst.o_fifo_data[24] -.sym 4610 w_rx_09_fifo_pulled_data[0] -.sym 4611 w_rx_09_fifo_pulled_data[16] -.sym 4612 i_smi_a2_SB_LUT4_I1_O_SB_LUT4_I3_I2_SB_LUT4_O_I3[1] -.sym 4613 i_smi_a2_SB_LUT4_I1_O_SB_LUT4_I3_I2[1] -.sym 4617 lvds_rx_09_inst.r_state_if_SB_LUT4_I2_O[0] -.sym 4618 lvds_rx_09_inst.o_fifo_data[12] -.sym 4622 i_smi_a2_SB_LUT4_I1_O_SB_LUT4_I3_I2_SB_LUT4_O_I3[1] -.sym 4623 w_rx_09_fifo_pulled_data[8] -.sym 4624 w_rx_09_fifo_pulled_data[24] -.sym 4625 i_smi_a2_SB_LUT4_I1_O_SB_LUT4_I3_I2[1] -.sym 4629 lvds_rx_09_inst.r_state_if_SB_LUT4_I2_O[0] -.sym 4631 lvds_rx_09_inst.o_fifo_data[22] -.sym 4634 lvds_rx_09_inst.r_state_if_SB_LUT4_I2_O[0] -.sym 4635 lvds_rx_09_inst.o_fifo_data[28] -.sym 4640 lvds_rx_09_inst.o_fifo_data[16] -.sym 4641 lvds_rx_09_inst.r_state_if_SB_LUT4_I2_O[0] -.sym 4644 w_lvds_rx_09_d1_SB_LUT4_I0_O_SB_LUT4_I3_O_$glb_ce -.sym 4645 lvds_clock_buf -.sym 4646 i_smi_a1_SB_LUT4_I1_O[2]_$glb_sr +.sym 4532 smi_ctrl_ins.o_smi_data_out_SB_DFFE_Q_2_D_SB_LUT4_O_I1[1] +.sym 4536 smi_ctrl_ins.o_smi_data_out_SB_DFFE_Q_D_SB_LUT4_O_I1[1] +.sym 4537 smi_ctrl_ins.int_cnt_09_SB_DFFESR_Q_D_SB_LUT4_O_I3[1] +.sym 4538 smi_ctrl_ins.o_smi_data_out_SB_DFFE_Q_5_D_SB_LUT4_O_I1[1] +.sym 4540 w_smi_data_output[5] +.sym 4542 w_smi_data_output[7] +.sym 4543 rx_09_fifo.rd_addr[0] +.sym 4544 lvds_rx_09_inst.o_fifo_data[15] +.sym 4545 lvds_rx_09_inst.o_fifo_data[13] +.sym 4546 lvds_rx_09_inst.o_fifo_data[9] +.sym 4548 lvds_rx_09_inst.o_fifo_data[16] +.sym 4549 w_rx_24_fifo_pulled_data[14] +.sym 4550 i_smi_a1_SB_LUT4_I1_O_SB_LUT4_O_I2_SB_LUT4_I0_O[2] +.sym 4554 w_rx_09_fifo_pulled_data[25] +.sym 4559 smi_ctrl_ins.int_cnt_24[5] +.sym 4565 smi_ctrl_ins.o_smi_data_out_SB_DFFE_Q_1_D_SB_LUT4_O_I1_SB_LUT4_O_1_I1[1] +.sym 4566 smi_ctrl_ins.o_smi_data_out_SB_DFFE_Q_1_D_SB_LUT4_O_I1_SB_LUT4_O_1_I1[2] +.sym 4567 smi_ctrl_ins.int_cnt_24[4] +.sym 4568 smi_ctrl_ins.o_smi_data_out_SB_DFFE_Q_6_D_SB_LUT4_O_I1_SB_LUT4_O_1_I1[2] +.sym 4569 smi_ctrl_ins.o_smi_data_out_SB_DFFE_Q_6_D_SB_LUT4_O_I1_SB_LUT4_O_1_I1[1] +.sym 4570 smi_ctrl_ins.int_cnt_24[5] +.sym 4572 smi_ctrl_ins.o_smi_data_out_SB_DFFE_Q_1_D_SB_LUT4_O_I1_SB_LUT4_O_1_I1[3] +.sym 4574 smi_ctrl_ins.o_smi_data_out_SB_DFFE_Q_5_D_SB_LUT4_O_I1_SB_LUT4_O_1_I1[2] +.sym 4576 smi_ctrl_ins.int_cnt_24_SB_DFFESR_Q_E +.sym 4577 i_smi_soe_se$rename$0 +.sym 4578 smi_ctrl_ins.r_fifo_24_pull_SB_LUT4_I1_O[3] +.sym 4580 $PACKER_VCC_NET +.sym 4582 $PACKER_VCC_NET +.sym 4583 i_smi_a2_SB_LUT4_I1_O_SB_LUT4_I3_1_I2[2] +.sym 4585 smi_ctrl_ins.o_smi_data_out_SB_DFFE_Q_5_D_SB_LUT4_O_I1_SB_LUT4_O_1_I1[1] +.sym 4590 smi_ctrl_ins.r_fifo_24_pull_SB_LUT4_I1_O[0] +.sym 4591 i_smi_a2_SB_LUT4_I1_O_SB_LUT4_I3_1_I2[2] +.sym 4592 i_smi_a2_SB_LUT4_I1_O_SB_LUT4_I3_1_I2_SB_LUT4_O_I3[1] +.sym 4593 smi_ctrl_ins.r_fifo_24_pull_SB_LUT4_I1_O[2] +.sym 4597 $nextpnr_ICESTORM_LC_0$O +.sym 4600 i_smi_a2_SB_LUT4_I1_O_SB_LUT4_I3_1_I2_SB_LUT4_O_I3[1] +.sym 4603 i_smi_a2_SB_LUT4_I1_O_SB_LUT4_I3_1_I2_SB_LUT4_O_I3[2] +.sym 4605 smi_ctrl_ins.int_cnt_24[4] +.sym 4606 $PACKER_VCC_NET +.sym 4611 smi_ctrl_ins.int_cnt_24[5] +.sym 4612 $PACKER_VCC_NET +.sym 4613 i_smi_a2_SB_LUT4_I1_O_SB_LUT4_I3_1_I2_SB_LUT4_O_I3[2] +.sym 4616 smi_ctrl_ins.r_fifo_24_pull_SB_LUT4_I1_O[2] +.sym 4617 i_smi_a2_SB_LUT4_I1_O_SB_LUT4_I3_1_I2_SB_LUT4_O_I3[1] +.sym 4618 i_smi_soe_se$rename$0 +.sym 4622 smi_ctrl_ins.o_smi_data_out_SB_DFFE_Q_6_D_SB_LUT4_O_I1_SB_LUT4_O_1_I1[1] +.sym 4623 smi_ctrl_ins.o_smi_data_out_SB_DFFE_Q_1_D_SB_LUT4_O_I1_SB_LUT4_O_1_I1[3] +.sym 4624 i_smi_a2_SB_LUT4_I1_O_SB_LUT4_I3_1_I2[2] +.sym 4625 smi_ctrl_ins.o_smi_data_out_SB_DFFE_Q_6_D_SB_LUT4_O_I1_SB_LUT4_O_1_I1[2] +.sym 4628 i_smi_a2_SB_LUT4_I1_O_SB_LUT4_I3_1_I2[2] +.sym 4629 smi_ctrl_ins.o_smi_data_out_SB_DFFE_Q_5_D_SB_LUT4_O_I1_SB_LUT4_O_1_I1[1] +.sym 4630 smi_ctrl_ins.o_smi_data_out_SB_DFFE_Q_1_D_SB_LUT4_O_I1_SB_LUT4_O_1_I1[3] +.sym 4631 smi_ctrl_ins.o_smi_data_out_SB_DFFE_Q_5_D_SB_LUT4_O_I1_SB_LUT4_O_1_I1[2] +.sym 4634 smi_ctrl_ins.r_fifo_24_pull_SB_LUT4_I1_O[0] +.sym 4635 i_smi_soe_se$rename$0 +.sym 4636 smi_ctrl_ins.r_fifo_24_pull_SB_LUT4_I1_O[3] +.sym 4637 smi_ctrl_ins.r_fifo_24_pull_SB_LUT4_I1_O[2] +.sym 4640 smi_ctrl_ins.o_smi_data_out_SB_DFFE_Q_1_D_SB_LUT4_O_I1_SB_LUT4_O_1_I1[2] +.sym 4641 smi_ctrl_ins.o_smi_data_out_SB_DFFE_Q_1_D_SB_LUT4_O_I1_SB_LUT4_O_1_I1[1] +.sym 4642 smi_ctrl_ins.o_smi_data_out_SB_DFFE_Q_1_D_SB_LUT4_O_I1_SB_LUT4_O_1_I1[3] +.sym 4643 i_smi_a2_SB_LUT4_I1_O_SB_LUT4_I3_1_I2[2] +.sym 4644 smi_ctrl_ins.int_cnt_24_SB_DFFESR_Q_E +.sym 4645 r_counter[0]_$glb_clk +.sym 4646 i_smi_a1_SB_LUT4_I1_O_SB_LUT4_O_I2_SB_LUT4_I0_O[2]_$glb_sr .sym 4647 w_rx_09_fifo_pulled_data[24] .sym 4648 w_rx_09_fifo_pulled_data[25] -.sym 4649 i_smi_a2_SB_LUT4_I1_O_SB_LUT4_I3_O_SB_LUT4_O_I3[1] +.sym 4649 w_rx_09_fifo_pulled_data[26] .sym 4650 w_rx_09_fifo_pulled_data[27] .sym 4651 w_rx_09_fifo_pulled_data[28] .sym 4652 w_rx_09_fifo_pulled_data[29] .sym 4653 w_rx_09_fifo_pulled_data[30] .sym 4654 w_rx_09_fifo_pulled_data[31] -.sym 4658 lvds_rx_09_inst.r_push_SB_DFFNESR_Q_E_SB_LUT4_O_I1_SB_LUT4_I0_O_SB_DFFNESR_D_E -.sym 4659 rx_09_fifo.wr_addr[6] -.sym 4660 i_smi_soe_se$rename$0 -.sym 4662 rx_09_fifo.wr_addr[7] -.sym 4663 w_smi_data_output[5] -.sym 4664 $PACKER_VCC_NET -.sym 4667 io_pmod_SB_DFFSS_Q_D_SB_LUT4_O_I0[3] -.sym 4668 rx_09_fifo.wr_addr[4] -.sym 4669 rx_09_fifo.wr_addr[3] -.sym 4670 w_smi_data_output[4] -.sym 4671 i_smi_a1_SB_LUT4_I1_O_SB_LUT4_O_I2_SB_LUT4_I0_O_SB_LUT4_O_I1[2] -.sym 4672 io_pmod_SB_DFFSS_Q_D_SB_LUT4_O_I0_SB_LUT4_O_I0_SB_LUT4_O_2_I3[1] -.sym 4673 w_rx_09_fifo_pulled_data[19] -.sym 4674 rx_09_fifo.rd_addr[3] -.sym 4676 io_pmod_SB_DFFSS_Q_D_SB_LUT4_O_I0[3] -.sym 4678 rx_09_fifo.rd_addr[4] -.sym 4680 w_rx_09_fifo_pulled_data[12] -.sym 4681 io_pmod[5]$SB_IO_IN -.sym 4688 smi_ctrl_ins.o_smi_data_out_SB_DFFE_Q_D_SB_LUT4_O_I1[1] -.sym 4689 smi_ctrl_ins.o_smi_data_out_SB_DFFE_Q_D_SB_LUT4_O_I1_SB_LUT4_O_I3[3] -.sym 4690 smi_ctrl_ins.o_smi_data_out_SB_DFFE_Q_7_D_SB_LUT4_O_I0[0] -.sym 4691 w_smi_data_output[6] -.sym 4692 smi_ctrl_ins.o_smi_data_out_SB_DFFE_Q_7_D_SB_LUT4_O_I0[1] -.sym 4693 i_smi_a2_SB_LUT4_I1_O_SB_LUT4_I3_O[2] -.sym 4694 smi_ctrl_ins.o_smi_data_out_SB_DFFE_Q_2_D_SB_LUT4_O_I1[1] -.sym 4695 i_smi_a2_SB_LUT4_I1_O_SB_LUT4_I3_I2[1] -.sym 4696 smi_ctrl_ins.o_smi_data_out_SB_DFFE_Q_2_D_SB_LUT4_O_I1[3] -.sym 4697 i_smi_a2_SB_LUT4_I1_O_SB_LUT4_I3_I2[2] -.sym 4698 w_rx_09_fifo_pulled_data[18] -.sym 4699 i_smi_a2_SB_LUT4_I1_O_SB_LUT4_I3_I2_SB_LUT4_O_I3[1] -.sym 4700 w_rx_09_fifo_pulled_data[20] -.sym 4704 w_rx_09_fifo_pulled_data[12] -.sym 4705 smi_ctrl_ins.o_smi_data_out_SB_DFFE_Q_7_D_SB_LUT4_O_I0[2] -.sym 4706 i_smi_a2_SB_LUT4_I1_O_SB_LUT4_I1_O -.sym 4708 w_rx_09_fifo_pulled_data[4] -.sym 4710 w_rx_09_fifo_pulled_data[15] -.sym 4711 w_rx_09_fifo_pulled_data[31] -.sym 4712 smi_ctrl_ins.o_smi_data_out_SB_DFFE_Q_D_SB_LUT4_O_I1[3] -.sym 4713 w_rx_09_fifo_pulled_data[2] -.sym 4714 smi_ctrl_ins.o_smi_data_out_SB_DFFE_Q_3_D_SB_LUT4_O_I1_SB_LUT4_O_I3[3] -.sym 4716 w_rx_09_fifo_pulled_data[28] -.sym 4718 i_smi_a2_SB_LUT4_I1_O[2] -.sym 4719 i_smi_a3$SB_IO_IN -.sym 4721 i_smi_a2_SB_LUT4_I1_O_SB_LUT4_I3_I2_SB_LUT4_O_I3[1] -.sym 4722 smi_ctrl_ins.o_smi_data_out_SB_DFFE_Q_D_SB_LUT4_O_I1_SB_LUT4_O_I3[3] -.sym 4723 w_rx_09_fifo_pulled_data[15] -.sym 4724 w_rx_09_fifo_pulled_data[31] -.sym 4727 i_smi_a2_SB_LUT4_I1_O_SB_LUT4_I3_I2[1] -.sym 4728 i_smi_a2_SB_LUT4_I1_O_SB_LUT4_I3_I2_SB_LUT4_O_I3[1] -.sym 4729 w_rx_09_fifo_pulled_data[18] -.sym 4730 w_rx_09_fifo_pulled_data[2] -.sym 4733 w_rx_09_fifo_pulled_data[4] -.sym 4734 i_smi_a2_SB_LUT4_I1_O_SB_LUT4_I3_I2[1] -.sym 4735 i_smi_a2_SB_LUT4_I1_O_SB_LUT4_I3_I2_SB_LUT4_O_I3[1] -.sym 4736 w_rx_09_fifo_pulled_data[20] -.sym 4739 smi_ctrl_ins.o_smi_data_out_SB_DFFE_Q_7_D_SB_LUT4_O_I0[2] -.sym 4740 smi_ctrl_ins.o_smi_data_out_SB_DFFE_Q_7_D_SB_LUT4_O_I0[1] -.sym 4741 i_smi_a2_SB_LUT4_I1_O[2] -.sym 4742 smi_ctrl_ins.o_smi_data_out_SB_DFFE_Q_7_D_SB_LUT4_O_I0[0] -.sym 4745 i_smi_a2_SB_LUT4_I1_O_SB_LUT4_I3_I2_SB_LUT4_O_I3[1] -.sym 4746 smi_ctrl_ins.o_smi_data_out_SB_DFFE_Q_3_D_SB_LUT4_O_I1_SB_LUT4_O_I3[3] -.sym 4747 w_rx_09_fifo_pulled_data[12] -.sym 4748 w_rx_09_fifo_pulled_data[28] -.sym 4751 i_smi_a2_SB_LUT4_I1_O_SB_LUT4_I3_O[2] -.sym 4752 smi_ctrl_ins.o_smi_data_out_SB_DFFE_Q_D_SB_LUT4_O_I1[1] -.sym 4753 smi_ctrl_ins.o_smi_data_out_SB_DFFE_Q_D_SB_LUT4_O_I1[3] -.sym 4754 i_smi_a2_SB_LUT4_I1_O_SB_LUT4_I3_I2[2] -.sym 4757 smi_ctrl_ins.o_smi_data_out_SB_DFFE_Q_2_D_SB_LUT4_O_I1[1] -.sym 4758 smi_ctrl_ins.o_smi_data_out_SB_DFFE_Q_2_D_SB_LUT4_O_I1[3] -.sym 4759 i_smi_a2_SB_LUT4_I1_O_SB_LUT4_I3_I2[2] -.sym 4760 i_smi_a2_SB_LUT4_I1_O_SB_LUT4_I3_O[2] -.sym 4765 w_smi_data_output[6] -.sym 4766 i_smi_a3$SB_IO_IN -.sym 4767 i_smi_a2_SB_LUT4_I1_O_SB_LUT4_I1_O +.sym 4655 lvds_rx_09_inst.r_push_SB_LUT4_I3_1_O +.sym 4659 rx_09_fifo.wr_addr[7] +.sym 4661 rx_09_fifo.wr_addr[4] +.sym 4662 lvds_rx_09_inst.o_fifo_data[17] +.sym 4666 smi_ctrl_ins.int_cnt_24[5] +.sym 4667 rx_09_fifo.wr_addr[5] +.sym 4668 $PACKER_VCC_NET +.sym 4669 w_rx_09_fifo_push +.sym 4670 lvds_rx_09_inst.o_fifo_data[21] +.sym 4672 smi_ctrl_ins.o_smi_data_out_SB_DFFE_Q_D_SB_LUT4_O_I2[3] +.sym 4674 w_rx_24_fifo_pulled_data[9] +.sym 4675 rx_24_fifo.wr_addr[6] +.sym 4677 i_smi_a3$SB_IO_IN +.sym 4678 w_rx_09_fifo_push +.sym 4680 rx_24_fifo.full_o_SB_DFFSR_Q_D_SB_LUT4_O_I1_SB_LUT4_O_I0[3] +.sym 4681 smi_ctrl_ins.o_smi_data_out_SB_DFFE_Q_D_SB_LUT4_O_I1_SB_LUT4_O_1_I3[2] +.sym 4688 smi_ctrl_ins.o_smi_data_out_SB_DFFE_Q_D_SB_LUT4_O_I1_SB_LUT4_O_1_I3[2] +.sym 4689 i_smi_a2_SB_LUT4_I1_O_SB_LUT4_I3_1_I2[1] +.sym 4690 i_smi_a2_SB_LUT4_I1_O_SB_LUT4_I3_1_I2[2] +.sym 4691 smi_ctrl_ins.o_smi_data_out_SB_DFFE_Q_D_SB_LUT4_O_I1_SB_LUT4_O_1_I3[1] +.sym 4692 smi_ctrl_ins.r_fifo_24_pull_SB_LUT4_I1_O[2] +.sym 4694 smi_ctrl_ins.o_smi_data_out_SB_DFFE_Q_D_SB_LUT4_O_I1_SB_LUT4_O_1_I1[2] +.sym 4695 i_smi_a1_SB_LUT4_I1_O[3] +.sym 4697 i_smi_a2_SB_LUT4_I1_O_SB_LUT4_I3_1_I2[1] +.sym 4698 w_rx_24_fifo_pulled_data[9] +.sym 4699 i_smi_a2_SB_LUT4_I1_O_SB_LUT4_I3_1_I2_SB_LUT4_O_I3[1] +.sym 4700 smi_ctrl_ins.o_smi_data_out_SB_DFFE_Q_D_SB_LUT4_O_I1_SB_LUT4_O_1_I1[1] +.sym 4704 w_rx_24_fifo_pulled_data[0] +.sym 4705 i_smi_soe_se$rename$0 +.sym 4706 smi_ctrl_ins.int_cnt_24_SB_DFFESR_Q_E +.sym 4707 w_rx_24_fifo_empty +.sym 4709 w_rx_24_fifo_pulled_data[14] +.sym 4710 i_smi_a1_SB_LUT4_I1_O_SB_LUT4_O_I2_SB_LUT4_I0_O[2] +.sym 4711 smi_ctrl_ins.o_smi_data_out_SB_DFFE_Q_1_D_SB_LUT4_O_I1_SB_LUT4_O_1_I1[3] +.sym 4712 i_smi_a2_SB_LUT4_I1_O[1] +.sym 4713 w_rx_24_fifo_pulled_data[1] +.sym 4714 smi_ctrl_ins.int_cnt_24[4] +.sym 4716 i_smi_a2_SB_LUT4_I1_O[3] +.sym 4717 i_smi_a1_SB_LUT4_I1_O[0] +.sym 4718 w_rx_24_fifo_pulled_data[6] +.sym 4719 smi_ctrl_ins.int_cnt_24[5] +.sym 4721 i_smi_a2_SB_LUT4_I1_O_SB_LUT4_I3_1_I2[1] +.sym 4722 w_rx_24_fifo_pulled_data[6] +.sym 4723 i_smi_a2_SB_LUT4_I1_O_SB_LUT4_I3_1_I2_SB_LUT4_O_I3[1] +.sym 4724 w_rx_24_fifo_pulled_data[14] +.sym 4727 w_rx_24_fifo_empty +.sym 4728 smi_ctrl_ins.int_cnt_24[5] +.sym 4729 smi_ctrl_ins.int_cnt_24[4] +.sym 4730 i_smi_a2_SB_LUT4_I1_O_SB_LUT4_I3_1_I2_SB_LUT4_O_I3[1] +.sym 4733 i_smi_a2_SB_LUT4_I1_O_SB_LUT4_I3_1_I2[1] +.sym 4735 smi_ctrl_ins.r_fifo_24_pull_SB_LUT4_I1_O[2] +.sym 4736 i_smi_soe_se$rename$0 +.sym 4739 smi_ctrl_ins.o_smi_data_out_SB_DFFE_Q_1_D_SB_LUT4_O_I1_SB_LUT4_O_1_I1[3] +.sym 4740 smi_ctrl_ins.o_smi_data_out_SB_DFFE_Q_D_SB_LUT4_O_I1_SB_LUT4_O_1_I1[2] +.sym 4741 smi_ctrl_ins.o_smi_data_out_SB_DFFE_Q_D_SB_LUT4_O_I1_SB_LUT4_O_1_I1[1] +.sym 4742 i_smi_a2_SB_LUT4_I1_O_SB_LUT4_I3_1_I2[2] +.sym 4745 w_rx_24_fifo_pulled_data[1] +.sym 4746 i_smi_a2_SB_LUT4_I1_O_SB_LUT4_I3_1_I2[1] +.sym 4747 i_smi_a2_SB_LUT4_I1_O_SB_LUT4_I3_1_I2_SB_LUT4_O_I3[1] +.sym 4748 w_rx_24_fifo_pulled_data[9] +.sym 4751 i_smi_a2_SB_LUT4_I1_O[1] +.sym 4752 i_smi_a1_SB_LUT4_I1_O_SB_LUT4_O_I2_SB_LUT4_I0_O[2] +.sym 4753 i_smi_a1_SB_LUT4_I1_O[3] +.sym 4754 i_smi_a1_SB_LUT4_I1_O[0] +.sym 4757 smi_ctrl_ins.o_smi_data_out_SB_DFFE_Q_D_SB_LUT4_O_I1_SB_LUT4_O_1_I3[2] +.sym 4758 smi_ctrl_ins.o_smi_data_out_SB_DFFE_Q_1_D_SB_LUT4_O_I1_SB_LUT4_O_1_I1[3] +.sym 4759 i_smi_a2_SB_LUT4_I1_O_SB_LUT4_I3_1_I2[2] +.sym 4760 smi_ctrl_ins.o_smi_data_out_SB_DFFE_Q_D_SB_LUT4_O_I1_SB_LUT4_O_1_I3[1] +.sym 4763 i_smi_a2_SB_LUT4_I1_O[3] +.sym 4764 i_smi_a2_SB_LUT4_I1_O_SB_LUT4_I3_1_I2[2] +.sym 4766 w_rx_24_fifo_pulled_data[0] +.sym 4767 smi_ctrl_ins.int_cnt_24_SB_DFFESR_Q_E .sym 4768 r_counter[0]_$glb_clk -.sym 4770 w_rx_09_fifo_pulled_data[0] -.sym 4771 w_rx_09_fifo_pulled_data[1] -.sym 4772 w_rx_09_fifo_pulled_data[2] -.sym 4773 w_rx_09_fifo_pulled_data[3] -.sym 4774 w_rx_09_fifo_pulled_data[4] -.sym 4775 w_rx_09_fifo_pulled_data[5] -.sym 4776 w_rx_09_fifo_pulled_data[6] -.sym 4777 w_rx_09_fifo_pulled_data[7] -.sym 4781 i_smi_a1_SB_LUT4_I1_O[3] -.sym 4782 smi_ctrl_ins.o_smi_data_out_SB_DFFE_Q_2_D_SB_LUT4_O_I1[3] -.sym 4785 i_smi_a2_SB_LUT4_I1_O_SB_LUT4_I3_I2_SB_LUT4_O_I3[1] -.sym 4786 smi_ctrl_ins.r_fifo_09_pull_SB_LUT4_I3_O -.sym 4789 i_smi_a1_SB_LUT4_I1_O[2] -.sym 4790 io_smi_data[0]$SB_IO_OUT -.sym 4791 io_pmod_SB_DFFSS_Q_D_SB_LUT4_O_I0_SB_LUT4_O_I0_SB_LUT4_O_2_I3[1] -.sym 4792 rx_09_fifo.rd_addr[3] -.sym 4794 $PACKER_VCC_NET -.sym 4795 $PACKER_VCC_NET -.sym 4796 w_rx_09_fifo_pulled_data[15] -.sym 4798 w_rx_24_fifo_push -.sym 4799 i_smi_a2_SB_LUT4_I1_O_SB_LUT4_I3_1_I2[1] -.sym 4800 lvds_rx_09_inst.o_fifo_data[9] -.sym 4801 $PACKER_VCC_NET -.sym 4803 lvds_rx_09_inst.o_fifo_data[14] +.sym 4769 i_smi_a1_SB_LUT4_I1_O_SB_LUT4_O_I2_SB_LUT4_I0_O[2]_$glb_sr +.sym 4770 w_rx_24_fifo_pulled_data[0] +.sym 4771 w_rx_24_fifo_pulled_data[1] +.sym 4772 w_rx_24_fifo_pulled_data[2] +.sym 4773 w_rx_24_fifo_pulled_data[3] +.sym 4774 w_rx_24_fifo_pulled_data[4] +.sym 4775 w_rx_24_fifo_pulled_data[5] +.sym 4776 w_rx_24_fifo_pulled_data[6] +.sym 4777 w_rx_24_fifo_pulled_data[7] +.sym 4783 rx_09_fifo.rd_addr[0] +.sym 4784 lvds_rx_09_inst.o_fifo_data[28] +.sym 4785 io_pmod_SB_DFFSS_Q_D_SB_LUT4_O_I0_SB_LUT4_O_I0[1] +.sym 4788 lvds_rx_09_inst.o_fifo_data[24] +.sym 4789 io_pmod_SB_DFFSS_Q_D_SB_LUT4_O_I0_SB_LUT4_O_I2[1] +.sym 4790 io_pmod_SB_DFFSS_Q_D_SB_LUT4_O_I0_SB_LUT4_O_2_I0[3] +.sym 4791 io_pmod_SB_DFFSS_Q_D_SB_LUT4_O_I0_SB_LUT4_O_3_I2[3] +.sym 4794 w_rx_24_fifo_pulled_data[28] +.sym 4795 w_rx_24_fifo_pulled_data[16] +.sym 4796 $PACKER_VCC_NET +.sym 4797 rx_24_fifo.wr_addr[2] +.sym 4798 w_rx_24_fifo_pull +.sym 4799 rx_24_fifo.wr_addr[4] +.sym 4803 lvds_rx_09_inst.o_fifo_data[26] +.sym 4804 io_pmod_SB_DFFSS_Q_D_SB_LUT4_O_I0_SB_LUT4_O_3_I2[1] .sym 4805 i_smi_a3$SB_IO_IN -.sym 4811 smi_ctrl_ins.o_smi_data_out_SB_DFFE_Q_3_D_SB_LUT4_O_I1[3] -.sym 4813 i_smi_a2_SB_LUT4_I1_O_SB_LUT4_I1_O -.sym 4816 i_smi_a2_SB_LUT4_I1_O_SB_LUT4_I3_I2[2] -.sym 4817 i_smi_a2_SB_LUT4_I1_O_SB_LUT4_I3_I2[1] -.sym 4818 i_smi_a1_SB_LUT4_I1_O_SB_LUT4_O_I2_SB_LUT4_I0_O_SB_LUT4_O_I1[1] -.sym 4819 smi_ctrl_ins.o_smi_data_out_SB_DFFE_Q_1_D_SB_LUT4_O_I1[1] -.sym 4820 i_smi_a2_SB_LUT4_I1_O_SB_LUT4_I3_O_SB_LUT4_O_I3[3] -.sym 4821 i_smi_a2_SB_LUT4_I1_O_SB_LUT4_I3_O_SB_LUT4_O_I3[1] -.sym 4822 w_rx_09_fifo_pulled_data[27] -.sym 4823 smi_ctrl_ins.o_smi_data_out_SB_DFFE_Q_3_D_SB_LUT4_O_I1[1] -.sym 4824 i_smi_a2_SB_LUT4_I1_O_SB_LUT4_I3_I2[2] -.sym 4825 w_rx_09_fifo_pulled_data[23] -.sym 4826 smi_ctrl_ins.o_smi_data_out_SB_DFFE_Q_1_D_SB_LUT4_O_I1[3] -.sym 4827 w_rx_09_fifo_pulled_data[0] -.sym 4829 i_smi_a2_SB_LUT4_I1_O_SB_LUT4_I3_O_SB_LUT4_O_I3[0] -.sym 4830 w_rx_09_fifo_pulled_data[3] -.sym 4831 i_smi_a1_SB_LUT4_I1_O_SB_LUT4_O_I2_SB_LUT4_I0_O_SB_LUT4_O_I1[2] -.sym 4832 i_smi_a2_SB_LUT4_I1_O[2] -.sym 4833 w_rx_09_fifo_pulled_data[19] -.sym 4834 i_smi_a1_SB_LUT4_I1_O[1] -.sym 4835 smi_ctrl_ins.o_smi_data_out_SB_DFFE_Q_4_D_SB_LUT4_O_I1_SB_LUT4_O_I3[3] -.sym 4838 w_rx_09_fifo_pulled_data[11] -.sym 4839 i_smi_a2_SB_LUT4_I1_O_SB_LUT4_I3_O[2] -.sym 4840 i_smi_a1_SB_LUT4_I1_O[3] -.sym 4841 i_smi_a2_SB_LUT4_I1_O_SB_LUT4_I3_I2_SB_LUT4_O_I3[1] -.sym 4842 w_rx_09_fifo_pulled_data[7] -.sym 4844 i_smi_a2_SB_LUT4_I1_O_SB_LUT4_I3_I2[1] -.sym 4845 w_rx_09_fifo_pulled_data[3] -.sym 4846 w_rx_09_fifo_pulled_data[19] -.sym 4847 i_smi_a2_SB_LUT4_I1_O_SB_LUT4_I3_I2_SB_LUT4_O_I3[1] -.sym 4850 w_rx_09_fifo_pulled_data[23] -.sym 4851 w_rx_09_fifo_pulled_data[7] -.sym 4852 i_smi_a2_SB_LUT4_I1_O_SB_LUT4_I3_I2_SB_LUT4_O_I3[1] -.sym 4853 i_smi_a2_SB_LUT4_I1_O_SB_LUT4_I3_I2[1] -.sym 4856 i_smi_a1_SB_LUT4_I1_O_SB_LUT4_O_I2_SB_LUT4_I0_O_SB_LUT4_O_I1[2] -.sym 4857 i_smi_a1_SB_LUT4_I1_O_SB_LUT4_O_I2_SB_LUT4_I0_O_SB_LUT4_O_I1[1] -.sym 4858 i_smi_a1_SB_LUT4_I1_O[3] -.sym 4859 i_smi_a1_SB_LUT4_I1_O[1] -.sym 4862 i_smi_a2_SB_LUT4_I1_O_SB_LUT4_I3_O[2] -.sym 4863 smi_ctrl_ins.o_smi_data_out_SB_DFFE_Q_1_D_SB_LUT4_O_I1[3] -.sym 4864 smi_ctrl_ins.o_smi_data_out_SB_DFFE_Q_1_D_SB_LUT4_O_I1[1] -.sym 4865 i_smi_a2_SB_LUT4_I1_O_SB_LUT4_I3_I2[2] -.sym 4868 w_rx_09_fifo_pulled_data[0] -.sym 4869 i_smi_a2_SB_LUT4_I1_O[2] -.sym 4871 i_smi_a2_SB_LUT4_I1_O_SB_LUT4_I3_I2[2] -.sym 4874 i_smi_a2_SB_LUT4_I1_O_SB_LUT4_I3_O_SB_LUT4_O_I3[1] -.sym 4875 i_smi_a2_SB_LUT4_I1_O_SB_LUT4_I3_O_SB_LUT4_O_I3[3] -.sym 4876 i_smi_a2_SB_LUT4_I1_O_SB_LUT4_I3_I2_SB_LUT4_O_I3[1] -.sym 4877 i_smi_a2_SB_LUT4_I1_O_SB_LUT4_I3_O_SB_LUT4_O_I3[0] -.sym 4880 smi_ctrl_ins.o_smi_data_out_SB_DFFE_Q_3_D_SB_LUT4_O_I1[3] -.sym 4881 smi_ctrl_ins.o_smi_data_out_SB_DFFE_Q_3_D_SB_LUT4_O_I1[1] -.sym 4882 i_smi_a2_SB_LUT4_I1_O_SB_LUT4_I3_I2[2] -.sym 4883 i_smi_a2_SB_LUT4_I1_O_SB_LUT4_I3_O[2] -.sym 4886 smi_ctrl_ins.o_smi_data_out_SB_DFFE_Q_4_D_SB_LUT4_O_I1_SB_LUT4_O_I3[3] -.sym 4887 w_rx_09_fifo_pulled_data[11] -.sym 4888 i_smi_a2_SB_LUT4_I1_O_SB_LUT4_I3_I2_SB_LUT4_O_I3[1] -.sym 4889 w_rx_09_fifo_pulled_data[27] -.sym 4890 i_smi_a2_SB_LUT4_I1_O_SB_LUT4_I1_O -.sym 4891 r_counter[0]_$glb_clk -.sym 4893 w_rx_09_fifo_pulled_data[8] -.sym 4894 w_rx_09_fifo_pulled_data[9] -.sym 4895 i_smi_a2_SB_LUT4_I1_O_SB_LUT4_I3_O_SB_LUT4_O_I3[0] -.sym 4896 w_rx_09_fifo_pulled_data[11] -.sym 4897 w_rx_09_fifo_pulled_data[12] -.sym 4898 w_rx_09_fifo_pulled_data[13] -.sym 4899 w_rx_09_fifo_pulled_data[14] -.sym 4900 w_rx_09_fifo_pulled_data[15] -.sym 4905 rx_09_fifo.wr_addr[3] -.sym 4909 i_smi_a2_SB_LUT4_I1_O_SB_LUT4_I1_O -.sym 4911 rx_09_fifo.wr_addr[0] -.sym 4912 rx_09_fifo.wr_addr[4] -.sym 4913 rx_24_fifo.rd_addr_gray_wr[7] -.sym 4914 $PACKER_VCC_NET -.sym 4915 rx_09_fifo.wr_addr[6] -.sym 4916 rx_09_fifo.wr_addr[7] -.sym 4917 smi_ctrl_ins.o_smi_data_out_SB_DFFE_Q_7_D_SB_LUT4_O_I0[2] -.sym 4918 rx_09_fifo.wr_addr[2] -.sym 4919 rx_24_fifo.wr_addr[4] -.sym 4920 rx_24_fifo.full_o_SB_LUT4_I0_O_SB_LUT4_O_I1_SB_LUT4_O_I0[3] -.sym 4921 smi_ctrl_ins.o_smi_data_out_SB_DFFE_Q_1_D_SB_LUT4_O_I1_SB_LUT4_O_1_I1[2] -.sym 4922 w_rx_24_fifo_pulled_data[10] -.sym 4923 i_smi_a2_SB_LUT4_I1_O_SB_LUT4_I3_1_O[3] -.sym 4925 rx_24_fifo.wr_addr[3] -.sym 4926 w_rx_24_fifo_pulled_data[12] -.sym 4935 w_rx_24_fifo_data[3] -.sym 4936 smi_ctrl_ins.o_smi_data_out_SB_DFFE_Q_1_D_SB_LUT4_O_I1_SB_LUT4_O_1_I1[1] -.sym 4937 w_rx_24_fifo_pulled_data[12] -.sym 4938 i_smi_a2_SB_LUT4_I1_O_SB_LUT4_I3_1_I2_SB_LUT4_O_I3[1] -.sym 4939 smi_ctrl_ins.o_smi_data_out_SB_DFFE_Q_1_D_SB_LUT4_O_I1_SB_LUT4_O_1_I1[2] -.sym 4940 smi_ctrl_ins.o_smi_data_out_SB_DFFE_Q_3_D_SB_LUT4_O_I1_SB_LUT4_O_1_I1[1] -.sym 4941 i_smi_a2_SB_LUT4_I1_O_SB_LUT4_I3_1_O[3] -.sym 4942 i_smi_a2_SB_LUT4_I1_O_SB_LUT4_I3_O_SB_LUT4_O_1_I1[2] -.sym 4945 i_smi_a2_SB_LUT4_I1_O[1] -.sym 4946 w_rx_24_fifo_pulled_data[10] -.sym 4947 lvds_rx_24_inst.r_state_if_SB_LUT4_I2_O[0] -.sym 4951 w_rx_24_fifo_pulled_data[14] -.sym 4955 smi_ctrl_ins.o_smi_data_out_SB_DFFE_Q_3_D_SB_LUT4_O_I1_SB_LUT4_O_1_I1[2] -.sym 4956 w_rx_24_fifo_data[1] -.sym 4959 i_smi_a2_SB_LUT4_I1_O_SB_LUT4_I3_1_I2[1] -.sym 4960 w_rx_24_fifo_pulled_data[2] -.sym 4962 w_rx_24_fifo_pulled_data[4] -.sym 4963 i_smi_a2_SB_LUT4_I1_O_SB_LUT4_I3_O_SB_LUT4_O_1_I1[1] -.sym 4964 w_rx_24_fifo_pulled_data[6] -.sym 4967 smi_ctrl_ins.o_smi_data_out_SB_DFFE_Q_3_D_SB_LUT4_O_I1_SB_LUT4_O_1_I1[1] -.sym 4968 smi_ctrl_ins.o_smi_data_out_SB_DFFE_Q_3_D_SB_LUT4_O_I1_SB_LUT4_O_1_I1[2] -.sym 4969 i_smi_a2_SB_LUT4_I1_O[1] -.sym 4970 i_smi_a2_SB_LUT4_I1_O_SB_LUT4_I3_1_O[3] -.sym 4974 w_rx_24_fifo_data[1] -.sym 4976 lvds_rx_24_inst.r_state_if_SB_LUT4_I2_O[0] -.sym 4979 i_smi_a2_SB_LUT4_I1_O_SB_LUT4_I3_1_I2[1] -.sym 4980 w_rx_24_fifo_pulled_data[6] -.sym 4981 i_smi_a2_SB_LUT4_I1_O_SB_LUT4_I3_1_I2_SB_LUT4_O_I3[1] -.sym 4982 w_rx_24_fifo_pulled_data[14] -.sym 4985 i_smi_a2_SB_LUT4_I1_O_SB_LUT4_I3_1_O[3] -.sym 4986 i_smi_a2_SB_LUT4_I1_O[1] -.sym 4987 i_smi_a2_SB_LUT4_I1_O_SB_LUT4_I3_O_SB_LUT4_O_1_I1[2] -.sym 4988 i_smi_a2_SB_LUT4_I1_O_SB_LUT4_I3_O_SB_LUT4_O_1_I1[1] -.sym 4991 lvds_rx_24_inst.r_state_if_SB_LUT4_I2_O[0] -.sym 4992 w_rx_24_fifo_data[3] -.sym 4997 w_rx_24_fifo_pulled_data[2] -.sym 4998 i_smi_a2_SB_LUT4_I1_O_SB_LUT4_I3_1_I2_SB_LUT4_O_I3[1] -.sym 4999 w_rx_24_fifo_pulled_data[10] -.sym 5000 i_smi_a2_SB_LUT4_I1_O_SB_LUT4_I3_1_I2[1] -.sym 5003 i_smi_a2_SB_LUT4_I1_O_SB_LUT4_I3_1_I2_SB_LUT4_O_I3[1] -.sym 5004 w_rx_24_fifo_pulled_data[4] +.sym 4813 smi_ctrl_ins.int_cnt_24[4] +.sym 4814 $PACKER_VCC_NET +.sym 4815 i_smi_a2_SB_LUT4_I1_O_SB_LUT4_I3_1_I2[2] +.sym 4817 i_smi_a2_SB_LUT4_I1_O_SB_LUT4_I3_1_I2_SB_LUT4_O_I3[1] +.sym 4818 smi_ctrl_ins.o_smi_data_out_SB_DFFE_Q_1_D_SB_LUT4_O_I1_SB_LUT4_O_1_I1[3] +.sym 4820 smi_ctrl_ins.o_smi_data_out_SB_DFFE_Q_D_SB_LUT4_O_I2_SB_LUT4_O_1_I1[2] +.sym 4823 smi_ctrl_ins.o_smi_data_out_SB_DFFE_Q_2_D_SB_LUT4_O_I1_SB_LUT4_O_1_I1[2] +.sym 4826 smi_ctrl_ins.o_smi_data_out_SB_DFFE_Q_2_D_SB_LUT4_O_I1_SB_LUT4_O_1_I1[1] +.sym 4828 i_smi_a2_SB_LUT4_I1_O_SB_LUT4_I3_1_I2[1] +.sym 4829 w_rx_24_fifo_pulled_data[2] +.sym 4830 w_rx_24_fifo_pulled_data[3] +.sym 4831 w_rx_24_fifo_pulled_data[12] +.sym 4832 w_rx_24_fifo_pulled_data[13] +.sym 4834 w_rx_24_fifo_pulled_data[7] +.sym 4835 smi_ctrl_ins.o_smi_data_out_SB_DFFE_Q_D_SB_LUT4_O_I2_SB_LUT4_O_1_I1[1] +.sym 4837 w_rx_24_fifo_pulled_data[10] +.sym 4838 w_rx_24_fifo_pulled_data[11] +.sym 4839 w_rx_24_fifo_pulled_data[4] +.sym 4840 w_rx_24_fifo_pulled_data[5] +.sym 4842 w_rx_24_fifo_pulled_data[15] +.sym 4844 i_smi_a2_SB_LUT4_I1_O_SB_LUT4_I3_1_I2_SB_LUT4_O_I3[1] +.sym 4845 i_smi_a2_SB_LUT4_I1_O_SB_LUT4_I3_1_I2[1] +.sym 4846 w_rx_24_fifo_pulled_data[11] +.sym 4847 w_rx_24_fifo_pulled_data[3] +.sym 4850 $PACKER_VCC_NET +.sym 4851 i_smi_a2_SB_LUT4_I1_O_SB_LUT4_I3_1_I2_SB_LUT4_O_I3[1] +.sym 4853 smi_ctrl_ins.int_cnt_24[4] +.sym 4856 w_rx_24_fifo_pulled_data[2] +.sym 4857 i_smi_a2_SB_LUT4_I1_O_SB_LUT4_I3_1_I2[1] +.sym 4858 i_smi_a2_SB_LUT4_I1_O_SB_LUT4_I3_1_I2_SB_LUT4_O_I3[1] +.sym 4859 w_rx_24_fifo_pulled_data[10] +.sym 4862 i_smi_a2_SB_LUT4_I1_O_SB_LUT4_I3_1_I2[1] +.sym 4863 w_rx_24_fifo_pulled_data[12] +.sym 4864 w_rx_24_fifo_pulled_data[4] +.sym 4865 i_smi_a2_SB_LUT4_I1_O_SB_LUT4_I3_1_I2_SB_LUT4_O_I3[1] +.sym 4868 w_rx_24_fifo_pulled_data[15] +.sym 4869 i_smi_a2_SB_LUT4_I1_O_SB_LUT4_I3_1_I2[1] +.sym 4870 i_smi_a2_SB_LUT4_I1_O_SB_LUT4_I3_1_I2_SB_LUT4_O_I3[1] +.sym 4871 w_rx_24_fifo_pulled_data[7] +.sym 4874 smi_ctrl_ins.o_smi_data_out_SB_DFFE_Q_1_D_SB_LUT4_O_I1_SB_LUT4_O_1_I1[3] +.sym 4875 i_smi_a2_SB_LUT4_I1_O_SB_LUT4_I3_1_I2[2] +.sym 4876 smi_ctrl_ins.o_smi_data_out_SB_DFFE_Q_2_D_SB_LUT4_O_I1_SB_LUT4_O_1_I1[2] +.sym 4877 smi_ctrl_ins.o_smi_data_out_SB_DFFE_Q_2_D_SB_LUT4_O_I1_SB_LUT4_O_1_I1[1] +.sym 4880 smi_ctrl_ins.o_smi_data_out_SB_DFFE_Q_D_SB_LUT4_O_I2_SB_LUT4_O_1_I1[2] +.sym 4881 smi_ctrl_ins.o_smi_data_out_SB_DFFE_Q_D_SB_LUT4_O_I2_SB_LUT4_O_1_I1[1] +.sym 4882 i_smi_a2_SB_LUT4_I1_O_SB_LUT4_I3_1_I2[2] +.sym 4883 smi_ctrl_ins.o_smi_data_out_SB_DFFE_Q_1_D_SB_LUT4_O_I1_SB_LUT4_O_1_I1[3] +.sym 4886 w_rx_24_fifo_pulled_data[13] +.sym 4887 i_smi_a2_SB_LUT4_I1_O_SB_LUT4_I3_1_I2_SB_LUT4_O_I3[1] +.sym 4888 i_smi_a2_SB_LUT4_I1_O_SB_LUT4_I3_1_I2[1] +.sym 4889 w_rx_24_fifo_pulled_data[5] +.sym 4893 w_rx_24_fifo_pulled_data[8] +.sym 4894 w_rx_24_fifo_pulled_data[9] +.sym 4895 w_rx_24_fifo_pulled_data[10] +.sym 4896 w_rx_24_fifo_pulled_data[11] +.sym 4897 w_rx_24_fifo_pulled_data[12] +.sym 4898 w_rx_24_fifo_pulled_data[13] +.sym 4899 w_rx_24_fifo_pulled_data[14] +.sym 4900 w_rx_24_fifo_pulled_data[15] +.sym 4903 i_smi_a1_SB_LUT4_I1_O[3] +.sym 4905 w_rx_09_fifo_pull +.sym 4909 i_smi_a2_SB_LUT4_I1_O_SB_LUT4_I3_1_I2[1] +.sym 4911 w_rx_24_fifo_data[1] +.sym 4912 w_rx_24_fifo_data[0] +.sym 4913 smi_ctrl_ins.int_cnt_24_SB_DFFESR_Q_E +.sym 4917 rx_24_fifo.wr_addr[7] +.sym 4918 w_rx_24_fifo_pulled_data[24] +.sym 4922 w_rx_24_fifo_pulled_data[26] +.sym 4924 w_rx_24_fifo_pulled_data[27] +.sym 4926 rx_24_fifo.wr_addr[7] +.sym 4927 rx_24_fifo.wr_addr[3] +.sym 4928 w_rx_24_fifo_pulled_data[29] +.sym 4934 w_rx_24_fifo_pulled_data[0] +.sym 4935 w_rx_24_fifo_pulled_data[29] +.sym 4936 w_rx_24_fifo_data[2] +.sym 4937 i_smi_a2_SB_LUT4_I1_O_SB_LUT4_I3_1_I2_SB_LUT4_O_I3[1] +.sym 4940 w_rx_24_fifo_pulled_data[27] +.sym 4942 w_rx_24_fifo_pulled_data[24] +.sym 4943 i_smi_a2_SB_LUT4_I1_O_SB_LUT4_I3_1_I2[1] +.sym 4944 lvds_rx_24_inst.r_state_if_SB_LUT4_I2_O[0] +.sym 4945 i_smi_a2_SB_LUT4_I1_O_SB_LUT4_I3_1_I2_SB_LUT4_O_I3[1] +.sym 4946 w_rx_24_fifo_pulled_data[26] +.sym 4950 w_rx_24_fifo_pulled_data[8] +.sym 4952 w_rx_24_fifo_pulled_data[18] +.sym 4953 w_rx_24_fifo_pulled_data[19] +.sym 4954 w_rx_24_fifo_pulled_data[28] +.sym 4955 w_rx_24_fifo_pulled_data[16] +.sym 4958 smi_ctrl_ins.o_smi_data_out_SB_DFFE_Q_7_D_SB_LUT4_O_I0_SB_LUT4_O_I3[3] +.sym 4962 w_rx_24_fifo_pulled_data[20] +.sym 4963 w_rx_24_fifo_pulled_data[21] +.sym 4965 w_rx_24_fifo_data[4] +.sym 4967 i_smi_a2_SB_LUT4_I1_O_SB_LUT4_I3_1_I2[1] +.sym 4968 i_smi_a2_SB_LUT4_I1_O_SB_LUT4_I3_1_I2_SB_LUT4_O_I3[1] +.sym 4969 w_rx_24_fifo_pulled_data[0] +.sym 4970 w_rx_24_fifo_pulled_data[16] +.sym 4973 i_smi_a2_SB_LUT4_I1_O_SB_LUT4_I3_1_I2_SB_LUT4_O_I3[1] +.sym 4974 w_rx_24_fifo_pulled_data[27] +.sym 4975 w_rx_24_fifo_pulled_data[19] +.sym 4976 i_smi_a2_SB_LUT4_I1_O_SB_LUT4_I3_1_I2[1] +.sym 4979 w_rx_24_fifo_data[4] +.sym 4982 lvds_rx_24_inst.r_state_if_SB_LUT4_I2_O[0] +.sym 4985 w_rx_24_fifo_pulled_data[24] +.sym 4986 w_rx_24_fifo_pulled_data[8] +.sym 4987 smi_ctrl_ins.o_smi_data_out_SB_DFFE_Q_7_D_SB_LUT4_O_I0_SB_LUT4_O_I3[3] +.sym 4988 i_smi_a2_SB_LUT4_I1_O_SB_LUT4_I3_1_I2_SB_LUT4_O_I3[1] +.sym 4991 i_smi_a2_SB_LUT4_I1_O_SB_LUT4_I3_1_I2[1] +.sym 4992 w_rx_24_fifo_pulled_data[29] +.sym 4993 w_rx_24_fifo_pulled_data[21] +.sym 4994 i_smi_a2_SB_LUT4_I1_O_SB_LUT4_I3_1_I2_SB_LUT4_O_I3[1] +.sym 4997 i_smi_a2_SB_LUT4_I1_O_SB_LUT4_I3_1_I2_SB_LUT4_O_I3[1] +.sym 4998 i_smi_a2_SB_LUT4_I1_O_SB_LUT4_I3_1_I2[1] +.sym 4999 w_rx_24_fifo_pulled_data[20] +.sym 5000 w_rx_24_fifo_pulled_data[28] +.sym 5003 w_rx_24_fifo_pulled_data[18] +.sym 5004 i_smi_a2_SB_LUT4_I1_O_SB_LUT4_I3_1_I2_SB_LUT4_O_I3[1] .sym 5005 i_smi_a2_SB_LUT4_I1_O_SB_LUT4_I3_1_I2[1] -.sym 5006 w_rx_24_fifo_pulled_data[12] -.sym 5009 i_smi_a2_SB_LUT4_I1_O_SB_LUT4_I3_1_O[3] -.sym 5010 smi_ctrl_ins.o_smi_data_out_SB_DFFE_Q_1_D_SB_LUT4_O_I1_SB_LUT4_O_1_I1[1] -.sym 5011 smi_ctrl_ins.o_smi_data_out_SB_DFFE_Q_1_D_SB_LUT4_O_I1_SB_LUT4_O_1_I1[2] -.sym 5012 i_smi_a2_SB_LUT4_I1_O[1] +.sym 5006 w_rx_24_fifo_pulled_data[26] +.sym 5009 lvds_rx_24_inst.r_state_if_SB_LUT4_I2_O[0] +.sym 5012 w_rx_24_fifo_data[2] .sym 5013 w_lvds_rx_24_d1_SB_LUT4_I0_O_SB_LUT4_I3_O_$glb_ce .sym 5014 lvds_clock_buf -.sym 5015 i_smi_a1_SB_LUT4_I1_O[2]_$glb_sr -.sym 5016 i_smi_a2_SB_LUT4_I1_O[0] -.sym 5017 w_rx_24_fifo_pulled_data[1] -.sym 5018 w_rx_24_fifo_pulled_data[2] -.sym 5019 w_rx_24_fifo_pulled_data[3] -.sym 5020 w_rx_24_fifo_pulled_data[4] -.sym 5021 w_rx_24_fifo_pulled_data[5] -.sym 5022 w_rx_24_fifo_pulled_data[6] -.sym 5023 w_rx_24_fifo_pulled_data[7] -.sym 5030 $PACKER_VCC_NET -.sym 5033 i_smi_a1_SB_LUT4_I1_O_SB_LUT4_O_I2_SB_LUT4_I0_O[1] -.sym 5035 lvds_rx_24_inst.r_state_if_SB_LUT4_I2_O[0] -.sym 5037 w_rx_09_fifo_pulled_data[9] -.sym 5038 i_smi_a2_SB_LUT4_I1_O_SB_LUT4_I3_O_SB_LUT4_O_1_I1[2] -.sym 5039 i_smi_a1_SB_LUT4_I1_O[2] -.sym 5041 w_rx_24_fifo_data[1] -.sym 5042 rx_24_fifo.empty_o_SB_LUT4_I3_O_SB_LUT4_O_1_I3[1] -.sym 5044 w_rx_24_fifo_data[0] -.sym 5045 rx_24_fifo.empty_o_SB_LUT4_I3_O_SB_LUT4_O_1_I3[2] -.sym 5046 rx_24_fifo.rd_addr[4] -.sym 5047 rx_24_fifo.wr_addr_gray_rd_r[6] -.sym 5048 rx_24_fifo.empty_o_SB_LUT4_I3_O_SB_LUT4_O_I0[1] -.sym 5049 rx_24_fifo.wr_addr[5] -.sym 5050 rx_24_fifo.wr_addr[5] -.sym 5051 rx_24_fifo.wr_addr[2] -.sym 5059 lvds_rx_09_inst.o_fifo_data[8] -.sym 5060 i_smi_a2_SB_LUT4_I1_O_SB_LUT4_I3_1_O[3] -.sym 5061 lvds_rx_09_inst.o_fifo_data[7] -.sym 5062 lvds_rx_09_inst.r_state_if_SB_LUT4_I2_O[0] -.sym 5063 smi_ctrl_ins.o_smi_data_out_SB_DFFE_Q_6_D_SB_LUT4_O_I1_SB_LUT4_O_1_I1[1] -.sym 5066 i_smi_a2_SB_LUT4_I1_O[1] -.sym 5071 smi_ctrl_ins.o_smi_data_out_SB_DFFE_Q_6_D_SB_LUT4_O_I1_SB_LUT4_O_1_I1[2] -.sym 5072 i_smi_a2_SB_LUT4_I1_O_SB_LUT4_I3_1_I2[1] -.sym 5074 w_rx_24_fifo_pulled_data[9] -.sym 5075 lvds_rx_09_inst.o_fifo_data[11] -.sym 5076 lvds_rx_09_inst.o_fifo_data[9] -.sym 5078 w_rx_24_fifo_pulled_data[13] -.sym 5082 w_rx_24_fifo_pulled_data[1] -.sym 5085 i_smi_a2_SB_LUT4_I1_O_SB_LUT4_I3_1_I2_SB_LUT4_O_I3[1] -.sym 5086 w_rx_24_fifo_pulled_data[5] -.sym 5096 i_smi_a2_SB_LUT4_I1_O_SB_LUT4_I3_1_I2_SB_LUT4_O_I3[1] -.sym 5097 w_rx_24_fifo_pulled_data[5] -.sym 5098 w_rx_24_fifo_pulled_data[13] -.sym 5099 i_smi_a2_SB_LUT4_I1_O_SB_LUT4_I3_1_I2[1] -.sym 5103 lvds_rx_09_inst.r_state_if_SB_LUT4_I2_O[0] -.sym 5105 lvds_rx_09_inst.o_fifo_data[9] -.sym 5108 lvds_rx_09_inst.r_state_if_SB_LUT4_I2_O[0] -.sym 5109 lvds_rx_09_inst.o_fifo_data[7] -.sym 5116 lvds_rx_09_inst.o_fifo_data[11] -.sym 5117 lvds_rx_09_inst.r_state_if_SB_LUT4_I2_O[0] -.sym 5120 i_smi_a2_SB_LUT4_I1_O_SB_LUT4_I3_1_O[3] -.sym 5121 i_smi_a2_SB_LUT4_I1_O[1] -.sym 5122 smi_ctrl_ins.o_smi_data_out_SB_DFFE_Q_6_D_SB_LUT4_O_I1_SB_LUT4_O_1_I1[2] -.sym 5123 smi_ctrl_ins.o_smi_data_out_SB_DFFE_Q_6_D_SB_LUT4_O_I1_SB_LUT4_O_1_I1[1] -.sym 5126 w_rx_24_fifo_pulled_data[1] -.sym 5127 w_rx_24_fifo_pulled_data[9] -.sym 5128 i_smi_a2_SB_LUT4_I1_O_SB_LUT4_I3_1_I2[1] -.sym 5129 i_smi_a2_SB_LUT4_I1_O_SB_LUT4_I3_1_I2_SB_LUT4_O_I3[1] -.sym 5134 lvds_rx_09_inst.r_state_if_SB_LUT4_I2_O[0] -.sym 5135 lvds_rx_09_inst.o_fifo_data[8] -.sym 5136 w_lvds_rx_09_d1_SB_LUT4_I0_O_SB_LUT4_I3_O_$glb_ce +.sym 5015 i_smi_a1_SB_LUT4_I1_O_SB_LUT4_O_I2_SB_LUT4_I0_O[2]_$glb_sr +.sym 5016 w_rx_24_fifo_pulled_data[16] +.sym 5017 w_rx_24_fifo_pulled_data[17] +.sym 5018 w_rx_24_fifo_pulled_data[18] +.sym 5019 w_rx_24_fifo_pulled_data[19] +.sym 5020 w_rx_24_fifo_pulled_data[20] +.sym 5021 w_rx_24_fifo_pulled_data[21] +.sym 5022 w_rx_24_fifo_pulled_data[22] +.sym 5023 w_rx_24_fifo_pulled_data[23] +.sym 5024 i_smi_a2_SB_LUT4_I1_O[3] +.sym 5027 i_smi_a2_SB_LUT4_I1_O[3] +.sym 5028 i_smi_a2_SB_LUT4_I1_O[1] +.sym 5030 w_rx_24_fifo_data[10] +.sym 5033 lvds_rx_09_inst.r_push_SB_DFFNESR_Q_E_SB_LUT4_O_I1_SB_LUT4_O_I2[2] +.sym 5034 w_rx_24_fifo_data[11] +.sym 5035 lvds_rx_09_inst.r_push_SB_DFFNESR_Q_E_SB_LUT4_O_I1_SB_LUT4_O_I2[3] +.sym 5036 w_rx_24_fifo_data[14] +.sym 5038 w_rx_24_fifo_data[12] +.sym 5042 i_smi_a1_SB_LUT4_I1_O_SB_LUT4_O_I2_SB_LUT4_I0_O[2] +.sym 5048 w_rx_24_fifo_pulled_data[14] +.sym 5057 w_rx_24_fifo_data[22] +.sym 5058 w_rx_24_fifo_data[27] +.sym 5064 lvds_rx_24_inst.r_state_if_SB_LUT4_I2_O[0] +.sym 5065 w_rx_24_fifo_data[16] +.sym 5067 i_smi_a2_SB_LUT4_I1_O_SB_LUT4_I3_1_I2[1] +.sym 5071 w_rx_24_fifo_data[20] +.sym 5072 i_smi_a2_SB_LUT4_I1_O_SB_LUT4_I3_1_I2_SB_LUT4_O_I3[1] +.sym 5075 w_rx_24_fifo_data[28] +.sym 5077 w_rx_24_fifo_data[26] +.sym 5079 w_rx_24_fifo_pulled_data[30] +.sym 5082 w_rx_24_fifo_data[24] +.sym 5087 w_rx_24_fifo_pulled_data[22] +.sym 5091 lvds_rx_24_inst.r_state_if_SB_LUT4_I2_O[0] +.sym 5093 w_rx_24_fifo_data[20] +.sym 5096 lvds_rx_24_inst.r_state_if_SB_LUT4_I2_O[0] +.sym 5097 w_rx_24_fifo_data[22] +.sym 5104 w_rx_24_fifo_data[26] +.sym 5105 lvds_rx_24_inst.r_state_if_SB_LUT4_I2_O[0] +.sym 5108 lvds_rx_24_inst.r_state_if_SB_LUT4_I2_O[0] +.sym 5110 w_rx_24_fifo_data[27] +.sym 5115 lvds_rx_24_inst.r_state_if_SB_LUT4_I2_O[0] +.sym 5116 w_rx_24_fifo_data[24] +.sym 5120 lvds_rx_24_inst.r_state_if_SB_LUT4_I2_O[0] +.sym 5122 w_rx_24_fifo_data[16] +.sym 5126 i_smi_a2_SB_LUT4_I1_O_SB_LUT4_I3_1_I2_SB_LUT4_O_I3[1] +.sym 5127 i_smi_a2_SB_LUT4_I1_O_SB_LUT4_I3_1_I2[1] +.sym 5128 w_rx_24_fifo_pulled_data[30] +.sym 5129 w_rx_24_fifo_pulled_data[22] +.sym 5132 lvds_rx_24_inst.r_state_if_SB_LUT4_I2_O[0] +.sym 5135 w_rx_24_fifo_data[28] +.sym 5136 w_lvds_rx_24_d1_SB_LUT4_I0_O_SB_LUT4_I3_O_$glb_ce .sym 5137 lvds_clock_buf -.sym 5138 i_smi_a1_SB_LUT4_I1_O[2]_$glb_sr -.sym 5139 w_rx_24_fifo_pulled_data[8] -.sym 5140 w_rx_24_fifo_pulled_data[9] -.sym 5141 w_rx_24_fifo_pulled_data[10] -.sym 5142 w_rx_24_fifo_pulled_data[11] -.sym 5143 w_rx_24_fifo_pulled_data[12] -.sym 5144 w_rx_24_fifo_pulled_data[13] -.sym 5145 w_rx_24_fifo_pulled_data[14] -.sym 5146 w_rx_24_fifo_pulled_data[15] -.sym 5147 io_pmod[6]$SB_IO_IN -.sym 5149 i_smi_a2_SB_LUT4_I1_O[2] -.sym 5152 i_smi_a2_SB_LUT4_I1_O[1] -.sym 5155 w_rx_24_fifo_data[7] -.sym 5158 $PACKER_VCC_NET -.sym 5161 lvds_rx_09_inst.o_fifo_data[13] -.sym 5164 w_rx_24_fifo_push -.sym 5165 i_smi_a2_SB_LUT4_I1_O_SB_LUT4_I3_1_I2_SB_LUT4_O_I3[1] -.sym 5166 w_rx_24_fifo_pulled_data[25] -.sym 5167 rx_24_fifo.wr_addr[0] -.sym 5171 i_smi_a2_SB_LUT4_I1_O_SB_LUT4_I3_1_I2_SB_LUT4_O_I3[1] -.sym 5172 rx_24_fifo.wr_addr[0] -.sym 5180 i_smi_a2_SB_LUT4_I1_O[0] -.sym 5182 w_rx_24_fifo_pulled_data[25] -.sym 5183 rx_24_fifo.wr_addr_gray[6] -.sym 5187 i_smi_a2_SB_LUT4_I1_O[1] -.sym 5188 i_smi_a2_SB_LUT4_I1_O_SB_LUT4_I3_1_O[2] -.sym 5189 i_smi_a2_SB_LUT4_I1_O_SB_LUT4_I3_1_O[1] -.sym 5191 i_smi_a2_SB_LUT4_I1_O_SB_LUT4_I3_1_I2_SB_LUT4_O_I3[1] -.sym 5192 i_smi_a2_SB_LUT4_I1_O_SB_LUT4_I3_1_I2[1] -.sym 5197 w_rx_24_fifo_pulled_data[17] -.sym 5200 w_rx_24_fifo_pulled_data[30] -.sym 5202 i_smi_a2_SB_LUT4_I1_O[2] -.sym 5203 rx_24_fifo.wr_addr_gray_rd[6] -.sym 5207 i_smi_a2_SB_LUT4_I1_O_SB_LUT4_I3_1_O[3] -.sym 5209 w_rx_24_fifo_data[14] -.sym 5210 w_rx_24_fifo_pulled_data[22] -.sym 5211 w_rx_24_fifo_pull -.sym 5213 i_smi_a2_SB_LUT4_I1_O_SB_LUT4_I3_1_O[1] -.sym 5214 i_smi_a2_SB_LUT4_I1_O[1] -.sym 5215 i_smi_a2_SB_LUT4_I1_O_SB_LUT4_I3_1_O[3] -.sym 5216 i_smi_a2_SB_LUT4_I1_O_SB_LUT4_I3_1_O[2] -.sym 5221 rx_24_fifo.wr_addr_gray_rd[6] -.sym 5225 w_rx_24_fifo_pulled_data[30] -.sym 5226 w_rx_24_fifo_pulled_data[22] -.sym 5227 i_smi_a2_SB_LUT4_I1_O_SB_LUT4_I3_1_I2_SB_LUT4_O_I3[1] -.sym 5228 i_smi_a2_SB_LUT4_I1_O_SB_LUT4_I3_1_I2[1] -.sym 5232 i_smi_a2_SB_LUT4_I1_O[0] -.sym 5233 i_smi_a2_SB_LUT4_I1_O[1] -.sym 5234 i_smi_a2_SB_LUT4_I1_O[2] -.sym 5239 w_rx_24_fifo_pull -.sym 5246 w_rx_24_fifo_data[14] -.sym 5249 w_rx_24_fifo_pulled_data[25] -.sym 5250 w_rx_24_fifo_pulled_data[17] -.sym 5251 i_smi_a2_SB_LUT4_I1_O_SB_LUT4_I3_1_I2_SB_LUT4_O_I3[1] -.sym 5252 i_smi_a2_SB_LUT4_I1_O_SB_LUT4_I3_1_I2[1] -.sym 5257 rx_24_fifo.wr_addr_gray[6] -.sym 5260 r_counter[0]_$glb_clk -.sym 5262 w_rx_24_fifo_pulled_data[16] -.sym 5263 w_rx_24_fifo_pulled_data[17] -.sym 5264 w_rx_24_fifo_pulled_data[18] -.sym 5265 w_rx_24_fifo_pulled_data[19] -.sym 5266 w_rx_24_fifo_pulled_data[20] -.sym 5267 w_rx_24_fifo_pulled_data[21] -.sym 5268 w_rx_24_fifo_pulled_data[22] -.sym 5269 w_rx_24_fifo_pulled_data[23] -.sym 5275 w_rx_24_fifo_pulled_data[14] -.sym 5276 w_rx_24_fifo_data[12] -.sym 5278 rx_24_fifo.wr_addr[7] -.sym 5282 w_rx_24_fifo_data[10] -.sym 5284 w_rx_24_fifo_data[11] -.sym 5286 w_rx_24_fifo_pulled_data[30] -.sym 5289 w_rx_24_fifo_push -.sym 5293 $PACKER_VCC_NET -.sym 5295 $PACKER_VCC_NET -.sym 5308 i_smi_a2_SB_LUT4_I1_O_SB_LUT4_I3_1_I2_SB_LUT4_O_I3[1] -.sym 5309 w_rx_24_fifo_data[29] -.sym 5311 rx_24_fifo.rd_addr_gray_wr[7] -.sym 5312 i_smi_a2_SB_LUT4_I1_O_SB_LUT4_I3_1_I2[1] -.sym 5315 w_rx_24_fifo_data[31] -.sym 5321 w_rx_24_fifo_pulled_data[18] -.sym 5323 w_rx_24_fifo_pulled_data[20] -.sym 5324 w_rx_24_fifo_pulled_data[21] -.sym 5329 w_rx_24_fifo_pulled_data[26] -.sym 5331 w_rx_24_fifo_pulled_data[28] -.sym 5332 w_rx_24_fifo_pulled_data[29] -.sym 5336 w_rx_24_fifo_pulled_data[29] -.sym 5337 i_smi_a2_SB_LUT4_I1_O_SB_LUT4_I3_1_I2_SB_LUT4_O_I3[1] -.sym 5338 i_smi_a2_SB_LUT4_I1_O_SB_LUT4_I3_1_I2[1] -.sym 5339 w_rx_24_fifo_pulled_data[21] -.sym 5342 rx_24_fifo.rd_addr_gray_wr[7] -.sym 5360 w_rx_24_fifo_pulled_data[20] -.sym 5361 i_smi_a2_SB_LUT4_I1_O_SB_LUT4_I3_1_I2_SB_LUT4_O_I3[1] -.sym 5362 i_smi_a2_SB_LUT4_I1_O_SB_LUT4_I3_1_I2[1] -.sym 5363 w_rx_24_fifo_pulled_data[28] -.sym 5367 w_rx_24_fifo_data[29] -.sym 5373 w_rx_24_fifo_data[31] -.sym 5378 w_rx_24_fifo_pulled_data[26] -.sym 5379 w_rx_24_fifo_pulled_data[18] -.sym 5380 i_smi_a2_SB_LUT4_I1_O_SB_LUT4_I3_1_I2_SB_LUT4_O_I3[1] -.sym 5381 i_smi_a2_SB_LUT4_I1_O_SB_LUT4_I3_1_I2[1] -.sym 5383 lvds_clock_buf -.sym 5385 w_rx_24_fifo_pulled_data[24] -.sym 5386 w_rx_24_fifo_pulled_data[25] -.sym 5387 w_rx_24_fifo_pulled_data[26] -.sym 5388 w_rx_24_fifo_pulled_data[27] -.sym 5389 w_rx_24_fifo_pulled_data[28] -.sym 5390 w_rx_24_fifo_pulled_data[29] -.sym 5391 w_rx_24_fifo_pulled_data[30] -.sym 5392 w_rx_24_fifo_pulled_data[31] -.sym 5397 w_rx_24_fifo_data[20] -.sym 5399 w_rx_24_fifo_data[23] -.sym 5401 rx_24_fifo.empty_o_SB_DFFSS_Q_D_SB_LUT4_O_I0[0] -.sym 5403 w_rx_24_fifo_data[16] -.sym 5405 $PACKER_VCC_NET -.sym 5409 rx_24_fifo.wr_addr[3] -.sym 5410 rx_24_fifo.wr_addr_gray_SB_LUT4_I2_1_O[6] -.sym 5413 rx_24_fifo.full_o_SB_LUT4_I0_I1_SB_LUT4_O_I0[1] -.sym 5415 rx_24_fifo.wr_addr[4] -.sym 5416 rx_24_fifo.wr_addr[7] -.sym 5418 rx_24_fifo.wr_addr_gray_SB_LUT4_I2_1_O[2] -.sym 5419 rx_24_fifo.full_o_SB_LUT4_I0_O_SB_LUT4_O_I1_SB_LUT4_O_I0[3] -.sym 5420 rx_24_fifo.wr_addr_gray_SB_LUT4_I2_1_O[3] -.sym 5427 rx_24_fifo.rd_addr_gray_wr_r[7] -.sym 5430 rx_24_fifo.rd_addr_gray_wr_r[6] -.sym 5432 rx_24_fifo.wr_addr_gray_SB_LUT4_I2_1_O[6] -.sym 5437 w_rx_24_fifo_data[20] -.sym 5438 rx_24_fifo.rd_addr_gray_wr_r[6] -.sym 5439 lvds_rx_24_inst.r_state_if_SB_LUT4_I2_O[0] -.sym 5440 rx_24_fifo.full_o_SB_LUT4_I0_O_SB_LUT4_O_I1_SB_LUT4_O_1_I3[0] +.sym 5138 i_smi_a1_SB_LUT4_I1_O_SB_LUT4_O_I2_SB_LUT4_I0_O[2]_$glb_sr +.sym 5139 w_rx_24_fifo_pulled_data[24] +.sym 5140 w_rx_24_fifo_pulled_data[25] +.sym 5141 w_rx_24_fifo_pulled_data[26] +.sym 5142 w_rx_24_fifo_pulled_data[27] +.sym 5143 w_rx_24_fifo_pulled_data[28] +.sym 5144 w_rx_24_fifo_pulled_data[29] +.sym 5145 w_rx_24_fifo_pulled_data[30] +.sym 5146 w_rx_24_fifo_pulled_data[31] +.sym 5153 w_rx_24_fifo_data[18] +.sym 5154 i_smi_soe_se$rename$0 +.sym 5155 $PACKER_VCC_NET +.sym 5159 w_rx_24_fifo_data[29] +.sym 5160 lvds_rx_24_inst.r_state_if_SB_LUT4_I2_O[0] +.sym 5161 w_rx_24_fifo_push +.sym 5167 rx_24_fifo.full_o_SB_DFFSR_Q_D_SB_LUT4_O_I1_SB_LUT4_O_I0[3] +.sym 5171 rx_24_fifo.wr_addr[6] +.sym 5173 i_smi_a3$SB_IO_IN +.sym 5180 lvds_rx_09_inst.r_state_if_SB_LUT4_I2_O[0] +.sym 5182 lvds_rx_09_inst.r_state_if_SB_DFFNESR_Q_E +.sym 5183 lvds_rx_09_inst.r_push_SB_DFFNESR_Q_E_SB_LUT4_O_I1[1] +.sym 5187 w_rx_24_fifo_pulled_data[23] +.sym 5189 w_rx_24_fifo_pulled_data[17] +.sym 5190 i_smi_a2_SB_LUT4_I1_O_SB_LUT4_I3_1_I2_SB_LUT4_O_I3[1] +.sym 5193 i_smi_a2_SB_LUT4_I1_O_SB_LUT4_I3_1_I2[1] +.sym 5197 w_rx_24_fifo_pulled_data[25] +.sym 5199 lvds_rx_09_inst.r_push_SB_DFFNESR_Q_E_SB_LUT4_O_I1[0] +.sym 5200 lvds_rx_09_inst.r_push_SB_DFFNESR_Q_E_SB_LUT4_O_I1_SB_LUT4_O_I2[3] +.sym 5202 i_smi_a1_SB_LUT4_I1_O_SB_LUT4_O_I2_SB_LUT4_I0_O[2] +.sym 5211 w_rx_24_fifo_pulled_data[31] +.sym 5213 lvds_rx_09_inst.r_push_SB_DFFNESR_Q_E_SB_LUT4_O_I1_SB_LUT4_O_I2[3] +.sym 5214 lvds_rx_09_inst.r_push_SB_DFFNESR_Q_E_SB_LUT4_O_I1[0] +.sym 5215 i_smi_a1_SB_LUT4_I1_O_SB_LUT4_O_I2_SB_LUT4_I0_O[2] +.sym 5221 lvds_rx_09_inst.r_push_SB_DFFNESR_Q_E_SB_LUT4_O_I1[1] +.sym 5237 lvds_rx_09_inst.r_state_if_SB_LUT4_I2_O[0] +.sym 5243 w_rx_24_fifo_pulled_data[25] +.sym 5244 i_smi_a2_SB_LUT4_I1_O_SB_LUT4_I3_1_I2[1] +.sym 5245 i_smi_a2_SB_LUT4_I1_O_SB_LUT4_I3_1_I2_SB_LUT4_O_I3[1] +.sym 5246 w_rx_24_fifo_pulled_data[17] +.sym 5255 w_rx_24_fifo_pulled_data[23] +.sym 5256 i_smi_a2_SB_LUT4_I1_O_SB_LUT4_I3_1_I2[1] +.sym 5257 i_smi_a2_SB_LUT4_I1_O_SB_LUT4_I3_1_I2_SB_LUT4_O_I3[1] +.sym 5258 w_rx_24_fifo_pulled_data[31] +.sym 5259 lvds_rx_09_inst.r_state_if_SB_DFFNESR_Q_E +.sym 5260 lvds_clock_buf +.sym 5261 i_smi_a1_SB_LUT4_I1_O_SB_LUT4_O_I2_SB_LUT4_I0_O[2]_$glb_sr +.sym 5274 w_rx_24_fifo_data[27] +.sym 5276 w_rx_24_fifo_data[20] +.sym 5279 lvds_rx_24_inst.r_state_if_SB_LUT4_I2_O[0] +.sym 5281 smi_ctrl_ins.r_fifo_24_pull_SB_LUT4_I3_1_O +.sym 5289 rx_24_fifo.wr_addr[2] +.sym 5290 w_rx_24_fifo_pulled_data[28] +.sym 5291 rx_24_fifo.wr_addr[4] +.sym 5292 spi_if_ins.state_if[0] +.sym 5293 lvds_rx_24_inst.r_push_SB_LUT4_I3_O +.sym 5294 rx_24_fifo.rd_addr_gray_wr_r[6] +.sym 5295 w_rx_24_fifo_pull +.sym 5303 rx_24_fifo.wr_addr[4] +.sym 5305 rx_24_fifo.full_o_SB_DFFSR_Q_D_SB_LUT4_O_I1_SB_LUT4_O_I0[3] +.sym 5307 spi_if_ins.state_if_SB_DFFESR_Q_1_R +.sym 5308 rx_24_fifo.wr_addr[3] +.sym 5310 rx_24_fifo.wr_addr[2] +.sym 5314 spi_if_ins.state_if_SB_DFFE_Q_E +.sym 5315 rx_24_fifo.wr_addr[6] +.sym 5316 spi_if_ins.state_if_SB_DFFESR_Q_D[0] +.sym 5317 rx_24_fifo.wr_addr[7] +.sym 5333 rx_24_fifo.wr_addr[5] +.sym 5335 $nextpnr_ICESTORM_LC_6$O +.sym 5338 rx_24_fifo.full_o_SB_DFFSR_Q_D_SB_LUT4_O_I1_SB_LUT4_O_I0[3] +.sym 5341 rx_24_fifo.wr_addr_gray_SB_LUT4_I2_I3[2] +.sym 5344 rx_24_fifo.wr_addr[2] +.sym 5345 rx_24_fifo.full_o_SB_DFFSR_Q_D_SB_LUT4_O_I1_SB_LUT4_O_I0[3] +.sym 5347 rx_24_fifo.wr_addr_gray_SB_LUT4_I2_I3[3] +.sym 5349 rx_24_fifo.wr_addr[3] +.sym 5351 rx_24_fifo.wr_addr_gray_SB_LUT4_I2_I3[2] +.sym 5353 rx_24_fifo.wr_addr_gray_SB_LUT4_I2_I3[4] +.sym 5355 rx_24_fifo.wr_addr[4] +.sym 5357 rx_24_fifo.wr_addr_gray_SB_LUT4_I2_I3[3] +.sym 5359 rx_24_fifo.wr_addr_gray_SB_LUT4_I2_I3[5] +.sym 5361 rx_24_fifo.wr_addr[5] +.sym 5363 rx_24_fifo.wr_addr_gray_SB_LUT4_I2_I3[4] +.sym 5365 rx_24_fifo.wr_addr_gray_SB_LUT4_I2_I3[6] +.sym 5368 rx_24_fifo.wr_addr[6] +.sym 5369 rx_24_fifo.wr_addr_gray_SB_LUT4_I2_I3[5] +.sym 5373 rx_24_fifo.wr_addr[7] +.sym 5375 rx_24_fifo.wr_addr_gray_SB_LUT4_I2_I3[6] +.sym 5381 spi_if_ins.state_if_SB_DFFESR_Q_D[0] +.sym 5382 spi_if_ins.state_if_SB_DFFE_Q_E +.sym 5383 r_counter[0]_$glb_clk +.sym 5384 spi_if_ins.state_if_SB_DFFESR_Q_1_R +.sym 5397 lvds_rx_09_inst.r_state_if_SB_LUT4_I2_O[0] +.sym 5401 lvds_rx_24_inst.r_push_SB_LUT4_I0_1_I1_SB_LUT4_O_I2[1] +.sym 5402 spi_if_ins.state_if_SB_DFFE_Q_E +.sym 5404 rx_24_fifo.rd_addr_gray_wr_r[7] +.sym 5411 rx_24_fifo.wr_addr[3] +.sym 5413 rx_24_fifo.wr_addr[7] +.sym 5419 rx_24_fifo.wr_addr_gray[6] +.sym 5420 spi_if_ins.state_if[0] +.sym 5427 rx_24_fifo.wr_addr_gray_SB_LUT4_I2_1_O[1] +.sym 5429 rx_24_fifo.wr_addr_gray_SB_LUT4_I2_1_O[3] +.sym 5430 rx_24_fifo.wr_addr_gray_SB_LUT4_I2_1_O[4] +.sym 5432 lvds_rx_24_inst.r_push_SB_LUT4_I0_1_I1_SB_LUT4_O_I2[6] +.sym 5436 rx_24_fifo.wr_addr_gray_SB_LUT4_I2_1_O[2] +.sym 5439 lvds_rx_24_inst.r_push_SB_LUT4_I0_1_I1_SB_LUT4_O_I2[5] +.sym 5440 rx_24_fifo.wr_addr_gray_SB_LUT4_I2_1_O[6] .sym 5441 rx_24_fifo.wr_addr_gray_SB_LUT4_I2_1_O[7] -.sym 5444 rx_24_fifo.full_o_SB_LUT4_I0_O_SB_LUT4_O_I1_SB_LUT4_O_1_I3[3] -.sym 5447 w_rx_24_fifo_data[26] -.sym 5449 w_rx_24_fifo_data[28] -.sym 5450 w_rx_24_fifo_data[22] -.sym 5451 lvds_rx_24_inst.r_push_SB_LUT4_I3_I1[1] -.sym 5452 lvds_rx_24_inst.r_push_SB_LUT4_I3_I1[2] -.sym 5454 w_rx_24_fifo_data[24] -.sym 5455 lvds_rx_24_inst.r_push_SB_LUT4_I3_I1[5] -.sym 5456 lvds_rx_24_inst.r_push_SB_LUT4_I3_I1[6] -.sym 5459 lvds_rx_24_inst.r_state_if_SB_LUT4_I2_O[0] -.sym 5461 w_rx_24_fifo_data[20] -.sym 5465 lvds_rx_24_inst.r_push_SB_LUT4_I3_I1[2] -.sym 5466 lvds_rx_24_inst.r_push_SB_LUT4_I3_I1[1] -.sym 5467 rx_24_fifo.full_o_SB_LUT4_I0_O_SB_LUT4_O_I1_SB_LUT4_O_1_I3[0] -.sym 5468 rx_24_fifo.full_o_SB_LUT4_I0_O_SB_LUT4_O_I1_SB_LUT4_O_1_I3[3] -.sym 5471 rx_24_fifo.rd_addr_gray_wr_r[6] -.sym 5472 rx_24_fifo.rd_addr_gray_wr_r[7] -.sym 5473 lvds_rx_24_inst.r_push_SB_LUT4_I3_I1[5] -.sym 5474 lvds_rx_24_inst.r_push_SB_LUT4_I3_I1[6] -.sym 5477 w_rx_24_fifo_data[28] -.sym 5478 lvds_rx_24_inst.r_state_if_SB_LUT4_I2_O[0] -.sym 5484 w_rx_24_fifo_data[22] -.sym 5485 lvds_rx_24_inst.r_state_if_SB_LUT4_I2_O[0] -.sym 5489 w_rx_24_fifo_data[24] -.sym 5490 lvds_rx_24_inst.r_state_if_SB_LUT4_I2_O[0] -.sym 5495 rx_24_fifo.wr_addr_gray_SB_LUT4_I2_1_O[6] -.sym 5496 rx_24_fifo.rd_addr_gray_wr_r[7] -.sym 5497 rx_24_fifo.wr_addr_gray_SB_LUT4_I2_1_O[7] -.sym 5498 rx_24_fifo.rd_addr_gray_wr_r[6] -.sym 5501 w_rx_24_fifo_data[26] -.sym 5502 lvds_rx_24_inst.r_state_if_SB_LUT4_I2_O[0] -.sym 5505 w_lvds_rx_24_d1_SB_LUT4_I0_O_SB_LUT4_I3_O_$glb_ce +.sym 5450 rx_24_fifo.rd_addr_gray_wr_r[7] +.sym 5453 lvds_rx_24_inst.r_push_SB_LUT4_I3_O +.sym 5454 rx_24_fifo.rd_addr_gray_wr_r[6] +.sym 5461 rx_24_fifo.wr_addr_gray_SB_LUT4_I2_1_O[4] +.sym 5465 rx_24_fifo.wr_addr_gray_SB_LUT4_I2_1_O[6] +.sym 5468 rx_24_fifo.wr_addr_gray_SB_LUT4_I2_1_O[7] +.sym 5472 rx_24_fifo.wr_addr_gray_SB_LUT4_I2_1_O[1] +.sym 5477 rx_24_fifo.rd_addr_gray_wr_r[6] +.sym 5478 lvds_rx_24_inst.r_push_SB_LUT4_I0_1_I1_SB_LUT4_O_I2[6] +.sym 5479 rx_24_fifo.rd_addr_gray_wr_r[7] +.sym 5480 lvds_rx_24_inst.r_push_SB_LUT4_I0_1_I1_SB_LUT4_O_I2[5] +.sym 5484 rx_24_fifo.wr_addr_gray_SB_LUT4_I2_1_O[6] +.sym 5491 rx_24_fifo.wr_addr_gray_SB_LUT4_I2_1_O[3] +.sym 5495 rx_24_fifo.wr_addr_gray_SB_LUT4_I2_1_O[7] +.sym 5501 rx_24_fifo.wr_addr_gray_SB_LUT4_I2_1_O[2] +.sym 5505 lvds_rx_24_inst.r_push_SB_LUT4_I3_O .sym 5506 lvds_clock_buf -.sym 5507 i_smi_a1_SB_LUT4_I1_O[2]_$glb_sr -.sym 5521 w_rx_24_fifo_pull -.sym 5522 lvds_rx_09_inst.r_state_if_SB_LUT4_I2_O[0] -.sym 5523 rx_24_fifo.rd_addr[0] -.sym 5524 w_rx_24_fifo_data[25] -.sym 5525 rx_24_fifo.empty_o_SB_LUT4_I3_O_SB_LUT4_O_1_I3[2] -.sym 5526 rx_24_fifo.empty_o_SB_LUT4_I3_O_SB_LUT4_O_1_I3[1] -.sym 5527 lvds_rx_24_inst.r_state_if_SB_LUT4_I2_O[0] -.sym 5529 rx_24_fifo.rd_addr[5] -.sym 5533 rx_24_fifo.wr_addr[0] -.sym 5534 w_lvds_rx_09_d1_SB_LUT4_I0_O_SB_LUT4_O_I2_SB_LUT4_I0_O[0] -.sym 5535 rx_24_fifo.wr_addr[2] -.sym 5536 w_rx_24_fifo_data[0] -.sym 5537 rx_24_fifo.empty_o_SB_LUT4_I3_O_SB_LUT4_O_I0[1] -.sym 5538 rx_24_fifo.rd_addr[4] -.sym 5540 w_rx_24_fifo_data[1] -.sym 5541 rx_24_fifo.wr_addr[5] -.sym 5542 rx_24_fifo.wr_addr_gray_SB_LUT4_I2_1_O[1] -.sym 5549 rx_24_fifo.wr_addr[3] -.sym 5551 rx_24_fifo.wr_addr[5] -.sym 5554 rx_24_fifo.full_o_SB_LUT4_I0_O_SB_LUT4_O_I1_SB_LUT4_O_I0[3] -.sym 5555 rx_24_fifo.wr_addr[0] -.sym 5560 rx_24_fifo.wr_addr[4] -.sym 5563 rx_24_fifo.wr_addr[6] +.sym 5507 i_smi_a1_SB_LUT4_I1_O_SB_LUT4_O_I2_SB_LUT4_I0_O[2]_$glb_sr +.sym 5532 rx_24_fifo.wr_addr_gray_SB_LUT4_I2_1_O[4] +.sym 5533 rx_24_fifo.full_o_SB_DFFSR_Q_D_SB_LUT4_O_I1_SB_LUT4_O_I0[3] +.sym 5534 rx_24_fifo.wr_addr_gray_SB_LUT4_I2_1_O[5] +.sym 5536 rx_24_fifo.wr_addr_gray_SB_LUT4_I2_1_O[6] +.sym 5541 rx_24_fifo.wr_addr_gray_SB_DFFESR_Q_6_D[1] +.sym 5543 rx_24_fifo.wr_addr_gray_SB_DFFESR_Q_6_D[2] +.sym 5549 rx_24_fifo.wr_addr[4] +.sym 5551 rx_24_fifo.full_o_SB_DFFSR_Q_D_SB_LUT4_O_I1_SB_LUT4_O_I0[3] +.sym 5553 rx_24_fifo.wr_addr[0] +.sym 5555 rx_24_fifo.wr_addr[7] +.sym 5559 rx_24_fifo.wr_addr[0] +.sym 5561 rx_24_fifo.wr_addr[6] +.sym 5562 rx_24_fifo.wr_addr[3] +.sym 5563 rx_24_fifo.wr_addr[5] .sym 5564 rx_24_fifo.wr_addr[2] -.sym 5569 rx_24_fifo.wr_addr[7] -.sym 5581 $nextpnr_ICESTORM_LC_9$O -.sym 5584 rx_24_fifo.wr_addr[0] +.sym 5581 $nextpnr_ICESTORM_LC_10$O +.sym 5583 rx_24_fifo.wr_addr[0] .sym 5587 rx_24_fifo.wr_addr_gray_SB_LUT4_I2_1_I3[2] -.sym 5590 rx_24_fifo.full_o_SB_LUT4_I0_O_SB_LUT4_O_I1_SB_LUT4_O_I0[3] +.sym 5589 rx_24_fifo.full_o_SB_DFFSR_Q_D_SB_LUT4_O_I1_SB_LUT4_O_I0[3] .sym 5591 rx_24_fifo.wr_addr[0] .sym 5593 rx_24_fifo.wr_addr_gray_SB_LUT4_I2_1_I3[3] .sym 5596 rx_24_fifo.wr_addr[2] @@ -6024,228 +6010,305 @@ .sym 5608 rx_24_fifo.wr_addr[4] .sym 5609 rx_24_fifo.wr_addr_gray_SB_LUT4_I2_1_I3[4] .sym 5611 rx_24_fifo.wr_addr_gray_SB_LUT4_I2_1_I3[6] -.sym 5613 rx_24_fifo.wr_addr[5] +.sym 5614 rx_24_fifo.wr_addr[5] .sym 5615 rx_24_fifo.wr_addr_gray_SB_LUT4_I2_1_I3[5] .sym 5617 rx_24_fifo.wr_addr_gray_SB_LUT4_I2_1_I3[7] .sym 5619 rx_24_fifo.wr_addr[6] .sym 5621 rx_24_fifo.wr_addr_gray_SB_LUT4_I2_1_I3[6] .sym 5625 rx_24_fifo.wr_addr[7] .sym 5627 rx_24_fifo.wr_addr_gray_SB_LUT4_I2_1_I3[7] -.sym 5645 rx_24_fifo.full_o_SB_LUT4_I0_I1_SB_LUT4_O_1_I2[3] -.sym 5646 $PACKER_VCC_NET -.sym 5647 rx_24_fifo.wr_addr_gray_SB_LUT4_I2_1_O[1] -.sym 5649 rx_24_fifo.wr_addr_gray_SB_LUT4_I2_1_O[2] -.sym 5651 rx_24_fifo.wr_addr_gray_SB_LUT4_I2_1_O[3] -.sym 5652 rx_24_fifo.full_o_SB_LUT4_I0_O_SB_LUT4_O_I1[2] -.sym 5653 rx_24_fifo.full_o_SB_LUT4_I0_I1_SB_LUT4_O_2_I2[1] -.sym 5656 rx_24_fifo.wr_addr_gray_SB_LUT4_I2_1_O[2] -.sym 5658 rx_24_fifo.wr_addr_gray_SB_LUT4_I2_1_O[3] -.sym 5659 rx_24_fifo.wr_addr[0] -.sym 5663 w_rx_24_fifo_push +.sym 5650 w_rx_24_fifo_empty +.sym 5651 lvds_rx_24_inst.r_push_SB_LUT4_I0_1_I1_SB_LUT4_O_1_I3[0] +.sym 5663 i_smi_a1_SB_LUT4_I1_O_SB_LUT4_O_I2_SB_LUT4_I0_O[2] +.sym 5664 i_smi_a3$SB_IO_IN +.sym 5665 w_rx_24_fifo_full .sym 5673 rx_24_fifo.wr_addr_gray_SB_LUT4_I2_1_O[1] -.sym 5676 rx_24_fifo.full_o_SB_LUT4_I0_I1_SB_LUT4_O_2_I2[1] -.sym 5677 rx_24_fifo.full_o_SB_LUT4_I0_I1_SB_LUT4_O_1_I2[3] -.sym 5678 rx_24_fifo.wr_addr_gray_SB_LUT4_I2_1_O[6] -.sym 5679 rx_24_fifo.wr_addr_gray_SB_LUT4_I2_1_O[7] -.sym 5682 rx_24_fifo.wr_addr_gray_SB_LUT4_I2_1_O[2] +.sym 5674 rx_24_fifo.wr_addr_gray_SB_LUT4_I2_1_O[2] +.sym 5676 rx_24_fifo.wr_addr_gray_SB_LUT4_I2_1_O[4] +.sym 5677 rx_24_fifo.wr_addr[0] +.sym 5678 rx_24_fifo.full_o_SB_DFFSR_Q_D_SB_LUT4_O_I1_SB_LUT4_O_I0[0] +.sym 5679 lvds_rx_24_inst.r_push_SB_LUT4_I0_1_I1_SB_LUT4_O_I2[1] +.sym 5680 rx_24_fifo.rd_addr_gray_wr_r[7] .sym 5683 rx_24_fifo.wr_addr_gray_SB_LUT4_I2_1_O[3] -.sym 5694 rx_24_fifo.wr_addr[0] -.sym 5699 lvds_rx_24_inst.r_push_SB_LUT4_I3_1_O -.sym 5705 rx_24_fifo.wr_addr_gray_SB_LUT4_I2_1_O[3] -.sym 5720 rx_24_fifo.full_o_SB_LUT4_I0_I1_SB_LUT4_O_1_I2[3] -.sym 5724 rx_24_fifo.full_o_SB_LUT4_I0_I1_SB_LUT4_O_2_I2[1] -.sym 5729 rx_24_fifo.wr_addr_gray_SB_LUT4_I2_1_O[6] -.sym 5730 rx_24_fifo.wr_addr_gray_SB_LUT4_I2_1_O[7] -.sym 5737 rx_24_fifo.wr_addr_gray_SB_LUT4_I2_1_O[1] -.sym 5741 rx_24_fifo.wr_addr[0] -.sym 5747 rx_24_fifo.wr_addr_gray_SB_LUT4_I2_1_O[2] -.sym 5751 lvds_rx_24_inst.r_push_SB_LUT4_I3_1_O +.sym 5684 rx_24_fifo.full_o_SB_DFFSR_Q_D_SB_LUT4_O_I1[2] +.sym 5685 rx_24_fifo.wr_addr_gray_SB_LUT4_I2_1_O[5] +.sym 5686 rx_24_fifo.wr_addr_gray_SB_LUT4_I2_1_O[6] +.sym 5687 rx_24_fifo.wr_addr_gray_SB_LUT4_I2_1_O[7] +.sym 5688 rx_24_fifo.full_o_SB_DFFSR_Q_D_SB_LUT4_O_I1[1] +.sym 5692 rx_24_fifo.rd_addr_gray_wr_r[5] +.sym 5693 rx_24_fifo.full_o_SB_DFFSR_Q_D_SB_LUT4_O_I1_SB_LUT4_O_I0[3] +.sym 5694 rx_24_fifo.full_o_SB_DFFSR_Q_D_SB_LUT4_O_I1_SB_LUT4_O_I0[1] +.sym 5697 rx_24_fifo.rd_addr_gray_wr_r[6] +.sym 5700 rx_24_fifo.full_o_SB_DFFSR_Q_D_SB_LUT4_O_I1[0] +.sym 5705 rx_24_fifo.wr_addr_gray_SB_LUT4_I2_1_O[7] +.sym 5706 rx_24_fifo.rd_addr_gray_wr_r[7] +.sym 5707 rx_24_fifo.rd_addr_gray_wr_r[6] +.sym 5708 rx_24_fifo.wr_addr_gray_SB_LUT4_I2_1_O[6] +.sym 5711 rx_24_fifo.full_o_SB_DFFSR_Q_D_SB_LUT4_O_I1[0] +.sym 5713 rx_24_fifo.full_o_SB_DFFSR_Q_D_SB_LUT4_O_I1[2] +.sym 5714 rx_24_fifo.full_o_SB_DFFSR_Q_D_SB_LUT4_O_I1[1] +.sym 5717 rx_24_fifo.wr_addr_gray_SB_LUT4_I2_1_O[2] +.sym 5718 rx_24_fifo.wr_addr_gray_SB_LUT4_I2_1_O[1] +.sym 5724 rx_24_fifo.wr_addr_gray_SB_LUT4_I2_1_O[2] +.sym 5726 rx_24_fifo.wr_addr_gray_SB_LUT4_I2_1_O[3] +.sym 5729 rx_24_fifo.full_o_SB_DFFSR_Q_D_SB_LUT4_O_I1_SB_LUT4_O_I0[0] +.sym 5730 rx_24_fifo.full_o_SB_DFFSR_Q_D_SB_LUT4_O_I1_SB_LUT4_O_I0[3] +.sym 5731 rx_24_fifo.full_o_SB_DFFSR_Q_D_SB_LUT4_O_I1_SB_LUT4_O_I0[1] +.sym 5732 lvds_rx_24_inst.r_push_SB_LUT4_I0_1_I1_SB_LUT4_O_I2[1] +.sym 5735 rx_24_fifo.wr_addr_gray_SB_LUT4_I2_1_O[1] +.sym 5737 rx_24_fifo.wr_addr[0] +.sym 5741 rx_24_fifo.wr_addr_gray_SB_LUT4_I2_1_O[5] +.sym 5743 rx_24_fifo.wr_addr_gray_SB_LUT4_I2_1_O[4] +.sym 5748 rx_24_fifo.wr_addr_gray_SB_LUT4_I2_1_O[5] +.sym 5749 rx_24_fifo.wr_addr_gray_SB_LUT4_I2_1_O[6] +.sym 5750 rx_24_fifo.rd_addr_gray_wr_r[5] .sym 5752 lvds_clock_buf -.sym 5753 i_smi_a1_SB_LUT4_I1_O[2]_$glb_sr -.sym 5766 lvds_rx_24_inst.r_push_SB_LUT4_I3_I1[1] -.sym 5768 rx_24_fifo.full_o_SB_LUT4_I0_O_SB_LUT4_O_I1_SB_LUT4_O_I0[3] -.sym 5771 w_rx_24_fifo_full -.sym 5775 rx_24_fifo.wr_addr_gray_SB_LUT4_I2_1_O[1] -.sym 5776 i_smi_a1_SB_LUT4_I1_O[2] -.sym 5784 lvds_rx_24_inst.r_push_SB_LUT4_I3_1_O -.sym 5788 w_rx_24_fifo_push -.sym 5795 w_rx_24_fifo_push -.sym 5796 i_smi_a1_SB_LUT4_I1_O[2] -.sym 5798 lvds_rx_24_inst.r_state_if_SB_DFFNESR_Q_E_SB_LUT4_O_I0[0] -.sym 5800 lvds_rx_24_inst.r_state_if_SB_DFFNESR_Q_E_SB_LUT4_O_I0_SB_LUT4_I2_O[2] -.sym 5801 w_lvds_rx_09_d1_SB_LUT4_I0_O_SB_LUT4_O_I2[3] -.sym 5802 w_lvds_rx_09_d1_SB_LUT4_I0_O_SB_LUT4_O_I2[1] -.sym 5803 w_lvds_rx_09_d1_SB_LUT4_I0_O_SB_LUT4_O_I2[2] -.sym 5806 w_lvds_rx_09_d1_SB_LUT4_I0_O_SB_LUT4_O_I2[0] -.sym 5809 lvds_rx_24_inst.r_phase_count_SB_LUT4_I1_O_SB_DFFNESR_D_Q[0] -.sym 5813 w_lvds_rx_24_d1 -.sym 5819 w_lvds_rx_24_d0 -.sym 5822 lvds_rx_24_inst.r_phase_count_SB_LUT4_I1_O_SB_DFFNESR_D_Q[3] -.sym 5831 lvds_rx_24_inst.r_phase_count_SB_LUT4_I1_O_SB_DFFNESR_D_Q[0] -.sym 5834 w_lvds_rx_09_d1_SB_LUT4_I0_O_SB_LUT4_O_I2[1] -.sym 5835 w_lvds_rx_09_d1_SB_LUT4_I0_O_SB_LUT4_O_I2[0] -.sym 5836 w_lvds_rx_09_d1_SB_LUT4_I0_O_SB_LUT4_O_I2[2] -.sym 5837 w_lvds_rx_09_d1_SB_LUT4_I0_O_SB_LUT4_O_I2[3] -.sym 5840 w_lvds_rx_24_d1 -.sym 5841 lvds_rx_24_inst.r_state_if_SB_DFFNESR_Q_E_SB_LUT4_O_I0_SB_LUT4_I2_O[2] -.sym 5853 lvds_rx_24_inst.r_state_if_SB_DFFNESR_Q_E_SB_LUT4_O_I0_SB_LUT4_I2_O[2] -.sym 5855 w_lvds_rx_24_d0 -.sym 5859 lvds_rx_24_inst.r_phase_count_SB_LUT4_I1_O_SB_DFFNESR_D_Q[3] -.sym 5860 lvds_rx_24_inst.r_state_if_SB_DFFNESR_Q_E_SB_LUT4_O_I0[0] -.sym 5871 w_rx_24_fifo_push -.sym 5872 i_smi_a1_SB_LUT4_I1_O[2] -.sym 5874 w_lvds_rx_24_d1_SB_LUT4_I0_O_SB_LUT4_I3_O_$glb_ce +.sym 5753 i_smi_a1_SB_LUT4_I1_O_SB_LUT4_O_I2_SB_LUT4_I0_O[2]_$glb_sr +.sym 5780 lvds_rx_24_inst.r_push_SB_LUT4_I3_O +.sym 5795 rx_24_fifo.wr_addr[0] +.sym 5797 rx_24_fifo.wr_addr_gray_SB_DFFESR_Q_6_D[1] +.sym 5798 rx_24_fifo.wr_addr_gray_SB_DFFESR_Q_6_D[2] +.sym 5800 rx_24_fifo.rd_addr_gray_wr_r[2] +.sym 5802 lvds_rx_24_inst.r_state_if_SB_LUT4_I2_O[0] +.sym 5803 lvds_rx_24_inst.r_push_SB_LUT4_I0_1_I1_SB_LUT4_O_1_I3[0] +.sym 5804 w_rx_24_fifo_push +.sym 5806 rx_24_fifo.rd_addr_gray_wr_r[0] +.sym 5808 rx_24_fifo.wr_addr_gray_SB_DFFESR_Q_7_D[1] +.sym 5809 rx_24_fifo.wr_addr_gray_SB_DFFESR_Q_7_D[2] +.sym 5810 rx_24_fifo.full_o_SB_DFFSR_Q_D_SB_LUT4_O_I1_SB_LUT4_O_I0[1] +.sym 5812 lvds_rx_24_inst.r_phase_count_SB_LUT4_I1_O[0] +.sym 5813 rx_24_fifo.full_o_SB_LUT4_I0_O[3] +.sym 5814 rx_24_fifo.full_o_SB_LUT4_I0_O[2] +.sym 5821 rx_24_fifo.full_o_SB_LUT4_I0_O[1] +.sym 5822 lvds_rx_24_inst.r_push_SB_DFFNESR_Q_E_SB_LUT4_O_I1_SB_LUT4_I0_O_SB_DFFNESR_D_E +.sym 5823 i_smi_a1_SB_LUT4_I1_O_SB_LUT4_O_I2_SB_LUT4_I0_O[2] +.sym 5834 lvds_rx_24_inst.r_state_if_SB_LUT4_I2_O[0] +.sym 5836 lvds_rx_24_inst.r_phase_count_SB_LUT4_I1_O[0] +.sym 5840 rx_24_fifo.full_o_SB_DFFSR_Q_D_SB_LUT4_O_I1_SB_LUT4_O_I0[1] +.sym 5841 rx_24_fifo.rd_addr_gray_wr_r[2] +.sym 5842 rx_24_fifo.wr_addr_gray_SB_DFFESR_Q_6_D[1] +.sym 5843 rx_24_fifo.wr_addr_gray_SB_DFFESR_Q_6_D[2] +.sym 5846 lvds_rx_24_inst.r_push_SB_LUT4_I0_1_I1_SB_LUT4_O_1_I3[0] +.sym 5847 rx_24_fifo.wr_addr_gray_SB_DFFESR_Q_7_D[1] +.sym 5848 rx_24_fifo.wr_addr_gray_SB_DFFESR_Q_7_D[2] +.sym 5849 rx_24_fifo.rd_addr_gray_wr_r[0] +.sym 5852 rx_24_fifo.full_o_SB_LUT4_I0_O[3] +.sym 5853 rx_24_fifo.full_o_SB_LUT4_I0_O[1] +.sym 5854 w_rx_24_fifo_push +.sym 5855 rx_24_fifo.full_o_SB_LUT4_I0_O[2] +.sym 5859 w_rx_24_fifo_push +.sym 5860 i_smi_a1_SB_LUT4_I1_O_SB_LUT4_O_I2_SB_LUT4_I0_O[2] +.sym 5864 rx_24_fifo.rd_addr_gray_wr_r[0] +.sym 5866 rx_24_fifo.wr_addr[0] +.sym 5874 lvds_rx_24_inst.r_push_SB_DFFNESR_Q_E_SB_LUT4_O_I1_SB_LUT4_I0_O_SB_DFFNESR_D_E .sym 5875 lvds_clock_buf -.sym 5876 i_smi_a1_SB_LUT4_I1_O[2]_$glb_sr -.sym 5897 $PACKER_VCC_NET -.sym 5918 $PACKER_VCC_NET -.sym 5920 lvds_rx_09_inst.r_state_if_SB_LUT4_I2_O[0] -.sym 5921 lvds_rx_09_inst.r_phase_count[0] -.sym 5922 lvds_rx_09_inst.r_push_SB_DFFNESR_Q_E_SB_LUT4_O_I1_SB_LUT4_I0_O_SB_DFFNESR_D_Q[0] -.sym 5923 lvds_rx_09_inst.r_push_SB_DFFNESR_Q_E_SB_LUT4_O_I1[1] -.sym 5925 lvds_rx_09_inst.r_push_SB_DFFNESR_Q_E_SB_LUT4_O_I1[0] -.sym 5926 $PACKER_VCC_NET -.sym 5927 w_lvds_rx_09_d1_SB_LUT4_I0_O_SB_LUT4_O_I2_SB_LUT4_I0_O[0] -.sym 5929 lvds_rx_09_inst.r_phase_count[0] -.sym 5936 lvds_rx_09_inst.r_phase_count_SB_LUT4_I1_O[2] -.sym 5940 lvds_rx_09_inst.r_push_SB_DFFNESR_Q_E_SB_LUT4_O_I1_SB_LUT4_I0_O_SB_DFFNESR_D_Q[1] -.sym 5943 lvds_rx_09_inst.r_phase_count_SB_LUT4_I1_O[1] -.sym 5945 lvds_rx_09_inst.r_push_SB_DFFNESR_Q_E_SB_LUT4_O_I1_SB_LUT4_I0_O_SB_DFFNESR_D_E -.sym 5947 lvds_rx_09_inst.r_phase_count[1] -.sym 5949 w_lvds_rx_09_d1_SB_LUT4_I0_O_SB_LUT4_O_I2[1] -.sym 5950 $nextpnr_ICESTORM_LC_2$O -.sym 5952 lvds_rx_09_inst.r_phase_count[0] -.sym 5956 lvds_rx_09_inst.r_phase_count_SB_CARRY_CI_CO[2] -.sym 5958 lvds_rx_09_inst.r_phase_count[1] -.sym 5959 $PACKER_VCC_NET -.sym 5960 lvds_rx_09_inst.r_phase_count[0] -.sym 5963 lvds_rx_09_inst.r_push_SB_DFFNESR_Q_E_SB_LUT4_O_I1_SB_LUT4_I0_O_SB_DFFNESR_D_Q[1] -.sym 5965 $PACKER_VCC_NET -.sym 5966 lvds_rx_09_inst.r_phase_count_SB_CARRY_CI_CO[2] -.sym 5970 lvds_rx_09_inst.r_push_SB_DFFNESR_Q_E_SB_LUT4_O_I1_SB_LUT4_I0_O_SB_DFFNESR_D_Q[0] -.sym 5972 lvds_rx_09_inst.r_push_SB_DFFNESR_Q_E_SB_LUT4_O_I1_SB_LUT4_I0_O_SB_DFFNESR_D_Q[1] -.sym 5975 w_lvds_rx_09_d1_SB_LUT4_I0_O_SB_LUT4_O_I2_SB_LUT4_I0_O[0] -.sym 5976 lvds_rx_09_inst.r_push_SB_DFFNESR_Q_E_SB_LUT4_O_I1[0] -.sym 5977 lvds_rx_09_inst.r_phase_count_SB_LUT4_I1_O[1] -.sym 5978 lvds_rx_09_inst.r_push_SB_DFFNESR_Q_E_SB_LUT4_O_I1[1] -.sym 5982 lvds_rx_09_inst.r_push_SB_DFFNESR_Q_E_SB_LUT4_O_I1_SB_LUT4_I0_O_SB_DFFNESR_D_Q[0] -.sym 5987 lvds_rx_09_inst.r_phase_count_SB_LUT4_I1_O[2] -.sym 5988 lvds_rx_09_inst.r_push_SB_DFFNESR_Q_E_SB_LUT4_O_I1[0] -.sym 5989 w_lvds_rx_09_d1_SB_LUT4_I0_O_SB_LUT4_O_I2_SB_LUT4_I0_O[0] -.sym 5990 lvds_rx_09_inst.r_push_SB_DFFNESR_Q_E_SB_LUT4_O_I1[1] -.sym 5994 w_lvds_rx_09_d1_SB_LUT4_I0_O_SB_LUT4_O_I2[1] -.sym 5996 lvds_rx_09_inst.r_state_if_SB_LUT4_I2_O[0] -.sym 5997 lvds_rx_09_inst.r_push_SB_DFFNESR_Q_E_SB_LUT4_O_I1_SB_LUT4_I0_O_SB_DFFNESR_D_E +.sym 5876 i_smi_a1_SB_LUT4_I1_O_SB_LUT4_O_I2_SB_LUT4_I0_O[2]_$glb_sr +.sym 5889 rx_24_fifo.wr_addr[0] +.sym 5891 lvds_rx_24_inst.r_push_SB_LUT4_I3_O +.sym 5920 rx_24_fifo.rd_addr_gray_wr[5] +.sym 5923 rx_24_fifo.rd_addr_gray_wr[0] +.sym 5926 rx_24_fifo.rd_addr_gray_wr[1] +.sym 5965 rx_24_fifo.rd_addr_gray_wr[5] +.sym 5969 rx_24_fifo.rd_addr_gray_wr[0] +.sym 5995 rx_24_fifo.rd_addr_gray_wr[1] .sym 5998 lvds_clock_buf -.sym 5999 i_smi_a1_SB_LUT4_I1_O[2]_$glb_sr -.sym 6018 i_smi_a1_SB_LUT4_I1_O[2] -.sym 6042 lvds_rx_24_inst.r_phase_count_SB_LUT4_I1_O_SB_DFFNESR_D_Q[3] -.sym 6044 w_lvds_rx_09_d1_SB_LUT4_I0_O_SB_LUT4_O_I2[0] -.sym 6045 w_rx_24_fifo_full -.sym 6047 i_smi_a1_SB_LUT4_I1_O[2] -.sym 6048 w_lvds_rx_09_d1_SB_LUT4_I0_O_SB_LUT4_O_I2[1] -.sym 6052 lvds_rx_24_inst.r_push_SB_DFFNESR_Q_E -.sym 6053 w_lvds_rx_09_d1_SB_LUT4_I0_O_SB_LUT4_O_I2[2] -.sym 6055 w_lvds_rx_09_d1_SB_LUT4_I0_O_SB_LUT4_O_I2[3] -.sym 6056 w_lvds_rx_09_d1_SB_LUT4_I0_O_SB_LUT4_O_I2[1] -.sym 6074 i_smi_a1_SB_LUT4_I1_O[2] -.sym 6075 w_lvds_rx_09_d1_SB_LUT4_I0_O_SB_LUT4_O_I2[2] -.sym 6077 w_lvds_rx_09_d1_SB_LUT4_I0_O_SB_LUT4_O_I2[3] -.sym 6094 w_lvds_rx_09_d1_SB_LUT4_I0_O_SB_LUT4_O_I2[1] -.sym 6104 lvds_rx_24_inst.r_phase_count_SB_LUT4_I1_O_SB_DFFNESR_D_Q[3] -.sym 6105 w_rx_24_fifo_full -.sym 6116 w_lvds_rx_09_d1_SB_LUT4_I0_O_SB_LUT4_O_I2[2] -.sym 6118 w_lvds_rx_09_d1_SB_LUT4_I0_O_SB_LUT4_O_I2[0] -.sym 6119 w_lvds_rx_09_d1_SB_LUT4_I0_O_SB_LUT4_O_I2[1] -.sym 6120 lvds_rx_24_inst.r_push_SB_DFFNESR_Q_E -.sym 6121 lvds_clock_buf -.sym 6122 i_smi_a1_SB_LUT4_I1_O[2]_$glb_sr -.sym 6135 o_shdn_tx_lna$SB_IO_OUT -.sym 6141 w_lvds_rx_09_d1_SB_LUT4_I0_O_SB_LUT4_O_I2[2] -.sym 6154 w_rx_24_fifo_push +.sym 6016 rx_24_fifo.rd_addr_gray_wr[5] +.sym 6022 rx_24_fifo.rd_addr_gray_wr[1] +.sym 6144 rx_24_fifo.rd_addr_gray_wr[0] +.sym 6151 i_smi_a3$SB_IO_IN +.sym 6176 i_smi_a1$SB_IO_IN .sym 6180 i_smi_a3$SB_IO_IN -.sym 6184 i_smi_a1$SB_IO_IN .sym 6190 i_smi_a2$SB_IO_IN -.sym 6197 i_smi_a1$SB_IO_IN -.sym 6199 i_smi_a3$SB_IO_IN -.sym 6200 i_smi_a2$SB_IO_IN -.sym 6216 i_smi_a1$SB_IO_IN -.sym 6217 i_smi_a2$SB_IO_IN -.sym 6218 i_smi_a3$SB_IO_IN +.sym 6203 i_smi_a1$SB_IO_IN +.sym 6204 i_smi_a3$SB_IO_IN +.sym 6205 i_smi_a2$SB_IO_IN +.sym 6210 i_smi_a2$SB_IO_IN +.sym 6211 i_smi_a3$SB_IO_IN +.sym 6212 i_smi_a1$SB_IO_IN .sym 6246 i_smi_a3$SB_IO_IN -.sym 6256 i_smi_a1_SB_LUT4_I1_O[2] +.sym 6260 w_lvds_rx_24_d1_SB_LUT4_I0_O[1] .sym 6294 o_shdn_tx_lna$SB_IO_OUT -.sym 6308 o_shdn_tx_lna$SB_IO_OUT +.sym 6312 o_shdn_tx_lna$SB_IO_OUT .sym 6316 i_smi_a1$SB_IO_IN -.sym 6347 rx_09_fifo.rd_addr_gray_SB_LUT4_I2_O[1] -.sym 6348 rx_09_fifo.rd_addr_gray_SB_LUT4_I2_O[2] -.sym 6349 rx_09_fifo.rd_addr_gray_SB_LUT4_I2_O[3] -.sym 6350 rx_09_fifo.rd_addr_gray_SB_DFFESR_Q_7_D_SB_LUT4_I3_O_SB_LUT4_O_I3[1] -.sym 6351 rx_09_fifo.rd_addr_gray_SB_DFFESR_Q_7_D_SB_LUT4_I3_O_SB_LUT4_O_I3[2] -.sym 6352 rx_09_fifo.rd_addr_gray_SB_LUT4_I2_O[6] -.sym 6353 rx_09_fifo.rd_addr_gray_SB_LUT4_I2_O[7] -.sym 6357 w_rx_09_fifo_pulled_data[8] -.sym 6422 rx_09_fifo.rd_addr_gray_wr[4] -.sym 6423 rx_09_fifo.rd_addr_gray_wr_r[0] -.sym 6424 io_smi_data[7]$SB_IO_OUT -.sym 6425 rx_09_fifo.rd_addr_gray_wr_r[7] -.sym 6426 rx_09_fifo.rd_addr_gray_wr[7] -.sym 6427 rx_09_fifo.rd_addr_gray_wr[0] -.sym 6428 rx_09_fifo.rd_addr_gray_SB_DFFESR_Q_5_D[3] -.sym 6468 rx_09_fifo.full_o_SB_DFFSR_Q_D_SB_LUT4_O_I0_SB_LUT4_O_1_I0[2] -.sym 6481 rx_09_fifo.rd_addr[7] -.sym 6512 io_pmod_SB_DFFSS_Q_D_SB_LUT4_O_I0_SB_LUT4_O_I0_SB_LUT4_O_1_I2[1] -.sym 6513 rx_09_fifo.rd_addr_gray_SB_DFFESR_Q_7_D_SB_LUT4_I3_O_SB_LUT4_O_I3[2] -.sym 6514 io_smi_data[6]$SB_IO_OUT -.sym 6516 w_smi_data_output[7] -.sym 6517 rx_09_fifo.rd_addr_gray_SB_LUT4_I2_O[7] -.sym 6560 lvds_rx_09_inst.o_fifo_data[17] -.sym 6561 lvds_rx_09_inst.o_fifo_data[27] -.sym 6562 lvds_rx_09_inst.o_fifo_data[29] +.sym 6346 lvds_rx_09_inst.o_fifo_data[8] +.sym 6347 lvds_rx_09_inst.o_fifo_data[16] +.sym 6348 lvds_rx_09_inst.o_fifo_data[12] +.sym 6349 lvds_rx_09_inst.o_fifo_data[14] +.sym 6350 smi_ctrl_ins.o_smi_data_out_SB_DFFE_Q_D_SB_LUT4_O_I2[1] +.sym 6351 smi_ctrl_ins.o_smi_data_out_SB_DFFE_Q_7_D_SB_LUT4_O_I0[1] +.sym 6352 smi_ctrl_ins.o_smi_data_out_SB_DFFE_Q_D_SB_LUT4_O_I2_SB_LUT4_O_I3[3] +.sym 6353 lvds_rx_09_inst.o_fifo_data[10] +.sym 6372 w_rx_09_fifo_data[1] +.sym 6379 io_smi_data[6]$SB_IO_OUT +.sym 6380 io_pmod[7]$SB_IO_IN +.sym 6386 lvds_rx_09_inst.o_fifo_data[7] +.sym 6390 w_rx_09_fifo_push +.sym 6391 rx_09_fifo.wr_addr[7] +.sym 6394 io_pmod[6]$SB_IO_IN +.sym 6396 $PACKER_VCC_NET +.sym 6397 $PACKER_VCC_NET +.sym 6398 io_pmod[4]$SB_IO_IN +.sym 6399 io_pmod[7]$SB_IO_IN +.sym 6400 lvds_rx_09_inst.o_fifo_data[6] +.sym 6401 rx_09_fifo.wr_addr[0] +.sym 6403 rx_09_fifo.wr_addr[5] +.sym 6405 w_rx_09_fifo_data[0] +.sym 6406 w_rx_09_fifo_data[1] +.sym 6408 rx_09_fifo.wr_addr[6] +.sym 6411 rx_09_fifo.wr_addr[2] +.sym 6412 rx_09_fifo.full_o_SB_DFFSR_Q_D_SB_LUT4_O_I1_SB_LUT4_O_I0_SB_LUT4_O_1_I3[1] +.sym 6413 io_pmod[5]$SB_IO_IN +.sym 6415 rx_09_fifo.wr_addr[4] +.sym 6416 rx_09_fifo.wr_addr[3] +.sym 6422 smi_ctrl_ins.o_smi_data_out_SB_DFFE_Q_5_D_SB_LUT4_O_I1_SB_LUT4_O_I3[3] +.sym 6423 smi_ctrl_ins.o_smi_data_out_SB_DFFE_Q_5_D_SB_LUT4_O_I1[1] +.sym 6424 smi_ctrl_ins.o_smi_data_out_SB_DFFE_Q_1_D_SB_LUT4_O_I1[1] +.sym 6425 smi_ctrl_ins.o_smi_data_out_SB_DFFE_Q_D_SB_LUT4_O_I1_SB_LUT4_O_I3[3] +.sym 6426 smi_ctrl_ins.o_smi_data_out_SB_DFFE_Q_D_SB_LUT4_O_I1[1] +.sym 6427 smi_ctrl_ins.o_smi_data_out_SB_DFFE_Q_1_D_SB_LUT4_O_I1_SB_LUT4_O_I3[3] +.sym 6428 smi_ctrl_ins.o_smi_data_out_SB_DFFE_Q_2_D_SB_LUT4_O_I1[1] +.sym 6429 smi_ctrl_ins.o_smi_data_out_SB_DFFE_Q_2_D_SB_LUT4_O_I1_SB_LUT4_O_I3[3] +.sym 6430 $PACKER_VCC_NET +.sym 6431 $PACKER_VCC_NET +.sym 6432 $PACKER_VCC_NET +.sym 6433 $PACKER_VCC_NET +.sym 6434 $PACKER_VCC_NET +.sym 6435 $PACKER_VCC_NET +.sym 6436 $PACKER_VCC_NET +.sym 6437 $PACKER_VCC_NET +.sym 6438 rx_09_fifo.wr_addr[0] +.sym 6439 rx_09_fifo.full_o_SB_DFFSR_Q_D_SB_LUT4_O_I1_SB_LUT4_O_I0_SB_LUT4_O_1_I3[1] +.sym 6441 rx_09_fifo.wr_addr[2] +.sym 6442 rx_09_fifo.wr_addr[3] +.sym 6443 rx_09_fifo.wr_addr[4] +.sym 6444 rx_09_fifo.wr_addr[5] +.sym 6445 rx_09_fifo.wr_addr[6] +.sym 6446 rx_09_fifo.wr_addr[7] +.sym 6449 lvds_clock_buf +.sym 6450 $PACKER_VCC_NET +.sym 6451 w_rx_09_fifo_data[0] +.sym 6452 w_rx_09_fifo_data[1] +.sym 6453 io_pmod[4]$SB_IO_IN +.sym 6454 io_pmod[5]$SB_IO_IN +.sym 6455 io_pmod[6]$SB_IO_IN +.sym 6456 io_pmod[7]$SB_IO_IN +.sym 6457 lvds_rx_09_inst.o_fifo_data[6] +.sym 6458 lvds_rx_09_inst.o_fifo_data[7] +.sym 6459 w_rx_09_fifo_push +.sym 6460 i_smi_a3$SB_IO_IN +.sym 6463 i_smi_a3$SB_IO_IN +.sym 6464 lvds_rx_09_inst.o_fifo_data[7] +.sym 6473 lvds_rx_09_inst.o_fifo_data[16] +.sym 6474 io_pmod[6]$SB_IO_IN +.sym 6477 w_rx_09_fifo_pulled_data[27] +.sym 6487 io_pmod[5]$SB_IO_IN +.sym 6488 $PACKER_VCC_NET +.sym 6490 w_rx_09_fifo_pulled_data[2] +.sym 6492 smi_ctrl_ins.int_cnt_09[3] +.sym 6494 w_rx_09_fifo_pulled_data[31] +.sym 6496 w_rx_09_fifo_pulled_data[26] +.sym 6497 io_pmod_SB_DFFSS_Q_D_SB_LUT4_O_I0_SB_LUT4_O_I2[1] +.sym 6499 $PACKER_VCC_NET +.sym 6500 $PACKER_VCC_NET +.sym 6501 w_rx_09_fifo_pulled_data[19] +.sym 6505 $PACKER_VCC_NET +.sym 6506 w_rx_09_fifo_pulled_data[24] +.sym 6507 rx_09_fifo.wr_addr[3] +.sym 6512 rx_09_fifo.rd_addr[3] +.sym 6513 io_pmod_SB_DFFSS_Q_D_SB_LUT4_O_I0_SB_LUT4_O_2_I0[2] +.sym 6517 w_rx_09_fifo_pulled_data[29] +.sym 6518 rx_09_fifo.wr_addr[0] +.sym 6528 rx_09_fifo.rd_addr[0] +.sym 6529 io_pmod_SB_DFFSS_Q_D_SB_LUT4_O_I0_SB_LUT4_O_I0[1] +.sym 6530 lvds_rx_09_inst.o_fifo_data[13] +.sym 6531 lvds_rx_09_inst.o_fifo_data[14] +.sym 6532 $PACKER_VCC_NET +.sym 6533 rx_09_fifo.rd_addr[3] +.sym 6534 io_pmod_SB_DFFSS_Q_D_SB_LUT4_O_I0_SB_LUT4_O_3_I2[3] +.sym 6535 lvds_rx_09_inst.o_fifo_data[10] +.sym 6536 lvds_rx_09_inst.o_fifo_data[8] +.sym 6537 io_pmod_SB_DFFSS_Q_D_SB_LUT4_O_I0_SB_LUT4_O_2_I0[2] +.sym 6538 lvds_rx_09_inst.o_fifo_data[12] +.sym 6539 lvds_rx_09_inst.o_fifo_data[15] +.sym 6540 io_pmod_SB_DFFSS_Q_D_SB_LUT4_O_I0_SB_LUT4_O_2_I0[3] +.sym 6541 lvds_rx_09_inst.o_fifo_data[9] +.sym 6542 io_pmod_SB_DFFSS_Q_D_SB_LUT4_O_I0_SB_LUT4_O_3_I2[1] +.sym 6550 lvds_rx_09_inst.o_fifo_data[11] +.sym 6553 io_pmod_SB_DFFSS_Q_D_SB_LUT4_O_I0_SB_LUT4_O_I2[1] +.sym 6555 $PACKER_VCC_NET +.sym 6557 w_rx_09_fifo_pull +.sym 6558 $PACKER_VCC_NET +.sym 6560 lvds_rx_09_inst.o_fifo_data[23] +.sym 6561 lvds_rx_09_inst.o_fifo_data[25] +.sym 6562 lvds_rx_09_inst.o_fifo_data[30] .sym 6563 lvds_rx_09_inst.o_fifo_data[31] -.sym 6564 lvds_rx_09_inst.o_fifo_data[25] -.sym 6565 lvds_rx_09_inst.o_fifo_data[23] -.sym 6566 lvds_rx_09_inst.o_fifo_data[21] -.sym 6567 lvds_rx_09_inst.o_fifo_data[19] -.sym 6598 rx_09_fifo.rd_addr[7] -.sym 6602 rx_09_fifo.rd_addr[4] -.sym 6606 rx_09_fifo.rd_addr[3] -.sym 6610 io_pmod_SB_DFFSS_Q_D_SB_LUT4_O_I0_SB_LUT4_O_I0_SB_LUT4_O_2_I3[1] -.sym 6611 rx_09_fifo.rd_addr_gray_wr_r[0] -.sym 6614 i_smi_a3$SB_IO_IN -.sym 6616 i_smi_a2_SB_LUT4_I1_O_SB_LUT4_I3_I2[1] -.sym 6621 w_rx_09_fifo_pulled_data[25] -.sym 6622 io_pmod_SB_DFFSS_Q_D_SB_LUT4_O_I0_SB_LUT4_O_I0_SB_LUT4_O_1_I2[1] -.sym 6624 w_rx_09_fifo_data[0] -.sym 6625 rx_09_fifo.wr_addr[5] -.sym 6631 rx_09_fifo.wr_addr[5] -.sym 6632 rx_09_fifo.wr_addr[4] -.sym 6634 rx_09_fifo.wr_addr[0] -.sym 6635 rx_09_fifo.wr_addr[3] -.sym 6636 $PACKER_VCC_NET -.sym 6637 lvds_rx_09_inst.o_fifo_data[18] -.sym 6638 lvds_rx_09_inst.o_fifo_data[16] -.sym 6641 rx_09_fifo.wr_addr[2] -.sym 6643 rx_09_fifo.wr_addr[6] -.sym 6644 rx_09_fifo.wr_addr[7] -.sym 6646 lvds_rx_09_inst.o_fifo_data[17] -.sym 6647 rx_09_fifo.full_o_SB_DFFSR_Q_D_SB_LUT4_O_I0_SB_LUT4_O_I2[1] -.sym 6650 w_rx_09_fifo_push -.sym 6651 $PACKER_VCC_NET -.sym 6652 lvds_rx_09_inst.o_fifo_data[21] -.sym 6657 $PACKER_VCC_NET -.sym 6658 lvds_rx_09_inst.o_fifo_data[22] -.sym 6659 lvds_rx_09_inst.o_fifo_data[23] -.sym 6660 lvds_rx_09_inst.o_fifo_data[20] -.sym 6661 lvds_rx_09_inst.o_fifo_data[19] -.sym 6662 rx_09_fifo.rd_addr_gray[1] -.sym 6663 rx_09_fifo.full_o_SB_LUT4_I3_O[3] -.sym 6664 io_pmod_SB_DFFSS_Q_D_SB_LUT4_O_I0_SB_LUT4_O_I0_SB_LUT4_O_1_I2[1] -.sym 6665 smi_ctrl_ins.o_smi_data_out_SB_DFFE_Q_2_D_SB_LUT4_O_I1[1] -.sym 6666 smi_ctrl_ins.o_smi_data_out_SB_DFFE_Q_1_D_SB_LUT4_O_I1_SB_LUT4_O_I3[3] -.sym 6667 smi_ctrl_ins.o_smi_data_out_SB_DFFE_Q_2_D_SB_LUT4_O_I1_SB_LUT4_O_I3[3] -.sym 6668 rx_09_fifo.rd_addr_gray[6] -.sym 6669 io_pmod_SB_DFFSS_Q_D_SB_LUT4_O_I0_SB_LUT4_O_I0_SB_LUT4_O_1_I2[3] +.sym 6564 lvds_rx_09_inst.o_fifo_data[20] +.sym 6565 lvds_rx_09_inst.o_fifo_data[29] +.sym 6566 lvds_rx_09_inst.o_fifo_data[27] +.sym 6567 lvds_rx_09_inst.o_fifo_data[18] +.sym 6568 $PACKER_VCC_NET +.sym 6569 $PACKER_VCC_NET +.sym 6570 $PACKER_VCC_NET +.sym 6571 $PACKER_VCC_NET +.sym 6572 $PACKER_VCC_NET +.sym 6573 $PACKER_VCC_NET +.sym 6574 $PACKER_VCC_NET +.sym 6575 $PACKER_VCC_NET +.sym 6576 rx_09_fifo.rd_addr[0] +.sym 6577 io_pmod_SB_DFFSS_Q_D_SB_LUT4_O_I0_SB_LUT4_O_3_I2[1] +.sym 6579 io_pmod_SB_DFFSS_Q_D_SB_LUT4_O_I0_SB_LUT4_O_3_I2[3] +.sym 6580 rx_09_fifo.rd_addr[3] +.sym 6581 io_pmod_SB_DFFSS_Q_D_SB_LUT4_O_I0_SB_LUT4_O_2_I0[2] +.sym 6582 io_pmod_SB_DFFSS_Q_D_SB_LUT4_O_I0_SB_LUT4_O_2_I0[3] +.sym 6583 io_pmod_SB_DFFSS_Q_D_SB_LUT4_O_I0_SB_LUT4_O_I2[1] +.sym 6584 io_pmod_SB_DFFSS_Q_D_SB_LUT4_O_I0_SB_LUT4_O_I0[1] +.sym 6587 r_counter[0]_$glb_clk +.sym 6588 $PACKER_VCC_NET +.sym 6589 w_rx_09_fifo_pull +.sym 6590 lvds_rx_09_inst.o_fifo_data[10] +.sym 6591 lvds_rx_09_inst.o_fifo_data[11] +.sym 6592 lvds_rx_09_inst.o_fifo_data[12] +.sym 6593 lvds_rx_09_inst.o_fifo_data[13] +.sym 6594 lvds_rx_09_inst.o_fifo_data[14] +.sym 6595 lvds_rx_09_inst.o_fifo_data[15] +.sym 6596 lvds_rx_09_inst.o_fifo_data[8] +.sym 6597 lvds_rx_09_inst.o_fifo_data[9] +.sym 6602 i_smi_a3$SB_IO_IN +.sym 6604 smi_ctrl_ins.int_cnt_09[3] +.sym 6607 rx_09_fifo.wr_addr[7] +.sym 6608 smi_ctrl_ins.int_cnt_09[3] +.sym 6610 smi_ctrl_ins.int_cnt_09[3] +.sym 6612 io_pmod_SB_DFFSS_Q_D_SB_LUT4_O_I0_SB_LUT4_O_I0[1] +.sym 6617 $PACKER_VCC_NET +.sym 6620 rx_24_fifo.wr_addr[0] +.sym 6621 $PACKER_VCC_NET +.sym 6622 rx_09_fifo.rd_addr_gray_wr[0] +.sym 6623 w_rx_09_fifo_pull +.sym 6624 rx_24_fifo.wr_addr[5] +.sym 6625 w_rx_09_fifo_pulled_data[27] +.sym 6630 lvds_rx_09_inst.o_fifo_data[19] +.sym 6632 $PACKER_VCC_NET +.sym 6633 rx_09_fifo.wr_addr[5] +.sym 6634 lvds_rx_09_inst.o_fifo_data[21] +.sym 6635 rx_09_fifo.wr_addr[7] +.sym 6636 lvds_rx_09_inst.o_fifo_data[17] +.sym 6639 rx_09_fifo.wr_addr[2] +.sym 6640 rx_09_fifo.full_o_SB_DFFSR_Q_D_SB_LUT4_O_I1_SB_LUT4_O_I0_SB_LUT4_O_1_I3[1] +.sym 6641 rx_09_fifo.wr_addr[6] +.sym 6642 $PACKER_VCC_NET +.sym 6643 w_rx_09_fifo_push +.sym 6644 lvds_rx_09_inst.o_fifo_data[22] +.sym 6645 rx_09_fifo.wr_addr[4] +.sym 6646 lvds_rx_09_inst.o_fifo_data[23] +.sym 6647 lvds_rx_09_inst.o_fifo_data[16] +.sym 6651 rx_09_fifo.wr_addr[3] +.sym 6653 lvds_rx_09_inst.o_fifo_data[18] +.sym 6658 lvds_rx_09_inst.o_fifo_data[20] +.sym 6661 rx_09_fifo.wr_addr[0] +.sym 6664 smi_ctrl_ins.int_cnt_09_SB_DFFESR_Q_D_SB_LUT4_O_I3[2] +.sym 6665 rx_09_fifo.rd_addr_gray_wr_r[0] +.sym 6667 rx_09_fifo.rd_addr_gray_wr[7] +.sym 6668 lvds_rx_09_inst.r_push_SB_LUT4_I3_O[0] .sym 6670 $PACKER_VCC_NET .sym 6671 $PACKER_VCC_NET .sym 6672 $PACKER_VCC_NET @@ -6255,7 +6318,7 @@ .sym 6676 $PACKER_VCC_NET .sym 6677 $PACKER_VCC_NET .sym 6678 rx_09_fifo.wr_addr[0] -.sym 6679 rx_09_fifo.full_o_SB_DFFSR_Q_D_SB_LUT4_O_I0_SB_LUT4_O_I2[1] +.sym 6679 rx_09_fifo.full_o_SB_DFFSR_Q_D_SB_LUT4_O_I1_SB_LUT4_O_I0_SB_LUT4_O_1_I3[1] .sym 6681 rx_09_fifo.wr_addr[2] .sym 6682 rx_09_fifo.wr_addr[3] .sym 6683 rx_09_fifo.wr_addr[4] @@ -6273,43 +6336,45 @@ .sym 6697 lvds_rx_09_inst.o_fifo_data[22] .sym 6698 lvds_rx_09_inst.o_fifo_data[23] .sym 6699 w_rx_09_fifo_push +.sym 6703 w_rx_09_fifo_data[1] +.sym 6705 io_pmod_SB_DFFSS_Q_D_SB_LUT4_O_I0_SB_LUT4_O_2_I0[3] +.sym 6706 io_pmod_SB_DFFSS_Q_D_SB_LUT4_O_I0_SB_LUT4_O_3_I2[1] +.sym 6708 lvds_rx_09_inst.o_fifo_data[26] .sym 6709 i_smi_a3$SB_IO_IN -.sym 6716 w_rx_09_fifo_push -.sym 6718 rx_09_fifo.rd_addr[0] -.sym 6719 lvds_rx_09_inst.r_state_if_SB_LUT4_I2_O[0] -.sym 6720 io_pmod_SB_DFFSS_Q_D_SB_LUT4_O_I0_SB_LUT4_O_I0_SB_LUT4_O_2_I3[2] -.sym 6721 io_pmod[7]$SB_IO_IN -.sym 6723 rx_09_fifo.rd_addr[7] -.sym 6725 smi_ctrl_ins.int_cnt_24_SB_DFFESR_Q_E -.sym 6726 w_rx_09_fifo_pulled_data[13] -.sym 6734 lvds_rx_09_inst.o_fifo_data[29] -.sym 6735 lvds_rx_09_inst.o_fifo_data[28] -.sym 6736 lvds_rx_09_inst.o_fifo_data[25] -.sym 6737 rx_09_fifo.rd_addr[3] -.sym 6741 lvds_rx_09_inst.o_fifo_data[27] -.sym 6742 io_pmod_SB_DFFSS_Q_D_SB_LUT4_O_I0_SB_LUT4_O_I0_SB_LUT4_O_2_I3[1] -.sym 6743 rx_09_fifo.rd_addr[0] -.sym 6745 io_pmod_SB_DFFSS_Q_D_SB_LUT4_O_I0_SB_LUT4_O_I0_SB_LUT4_O_2_I3[2] -.sym 6746 rx_09_fifo.rd_addr[7] -.sym 6749 lvds_rx_09_inst.o_fifo_data[26] -.sym 6750 lvds_rx_09_inst.o_fifo_data[31] -.sym 6752 io_pmod_SB_DFFSS_Q_D_SB_LUT4_O_I0[3] -.sym 6753 lvds_rx_09_inst.o_fifo_data[24] -.sym 6754 rx_09_fifo.rd_addr[4] -.sym 6758 io_pmod_SB_DFFSS_Q_D_SB_LUT4_O_I0_SB_LUT4_O_I0_SB_LUT4_O_1_I2[1] +.sym 6710 $PACKER_VCC_NET +.sym 6711 io_pmod_SB_DFFSS_Q_D_SB_LUT4_O_I0_SB_LUT4_O_3_I2[1] +.sym 6712 io_pmod_SB_DFFSS_Q_D_SB_LUT4_O_I0_SB_LUT4_O_3_I2[3] +.sym 6715 $PACKER_VCC_NET +.sym 6717 rx_24_fifo.rd_addr[3] +.sym 6720 w_rx_09_fifo_pulled_data[30] +.sym 6721 smi_ctrl_ins.int_cnt_09[5] +.sym 6722 smi_ctrl_ins.int_cnt_09[3] +.sym 6724 smi_ctrl_ins.int_cnt_09[4] +.sym 6727 rx_24_fifo.rd_addr[2] +.sym 6732 io_pmod_SB_DFFSS_Q_D_SB_LUT4_O_I0_SB_LUT4_O_I2[1] +.sym 6733 lvds_rx_09_inst.o_fifo_data[24] +.sym 6734 io_pmod_SB_DFFSS_Q_D_SB_LUT4_O_I0_SB_LUT4_O_3_I2[3] +.sym 6735 io_pmod_SB_DFFSS_Q_D_SB_LUT4_O_I0_SB_LUT4_O_2_I0[3] +.sym 6736 rx_09_fifo.rd_addr[0] +.sym 6738 lvds_rx_09_inst.o_fifo_data[27] +.sym 6739 lvds_rx_09_inst.o_fifo_data[28] +.sym 6741 lvds_rx_09_inst.o_fifo_data[25] +.sym 6742 lvds_rx_09_inst.o_fifo_data[30] +.sym 6743 lvds_rx_09_inst.o_fifo_data[31] +.sym 6744 rx_09_fifo.rd_addr[3] +.sym 6745 lvds_rx_09_inst.o_fifo_data[29] +.sym 6746 io_pmod_SB_DFFSS_Q_D_SB_LUT4_O_I0_SB_LUT4_O_I0[1] +.sym 6747 io_pmod_SB_DFFSS_Q_D_SB_LUT4_O_I0_SB_LUT4_O_2_I0[2] +.sym 6752 w_rx_09_fifo_pull +.sym 6753 lvds_rx_09_inst.o_fifo_data[26] +.sym 6755 $PACKER_VCC_NET .sym 6759 $PACKER_VCC_NET -.sym 6760 $PACKER_VCC_NET -.sym 6761 $PACKER_VCC_NET -.sym 6762 lvds_rx_09_inst.o_fifo_data[30] -.sym 6763 io_pmod_SB_DFFSS_Q_D_SB_LUT4_O_I0_SB_LUT4_O_I0_SB_LUT4_O_1_I2[3] -.sym 6764 rx_09_fifo.rd_addr_gray_wr_r[6] -.sym 6765 rx_09_fifo.rd_addr_gray_wr[1] -.sym 6766 rx_09_fifo.full_o_SB_DFFSR_Q_D_SB_LUT4_O_I0_SB_LUT4_O_I0[1] -.sym 6767 rx_09_fifo.rd_addr_gray_wr_r[2] -.sym 6768 smi_ctrl_ins.o_smi_data_out_SB_DFFE_Q_1_D_SB_LUT4_O_I1[1] -.sym 6769 rx_09_fifo.rd_addr_gray_wr[6] -.sym 6770 rx_09_fifo.rd_addr_gray_wr[2] -.sym 6771 rx_24_fifo.rd_addr_gray_wr[7] +.sym 6762 io_pmod_SB_DFFSS_Q_D_SB_LUT4_O_I0_SB_LUT4_O_3_I2[1] +.sym 6766 i_smi_a2_SB_LUT4_I1_O_SB_LUT4_O_I3_SB_LUT4_I0_I1[5] +.sym 6767 i_smi_a2_SB_LUT4_I1_O_SB_LUT4_O_I3_SB_CARRY_CO_I1[5] +.sym 6768 w_rx_09_fifo_pull +.sym 6770 i_smi_a2_SB_LUT4_I1_O_SB_LUT4_O_I3_SB_CARRY_CO_I1[4] +.sym 6771 rx_09_fifo.full_o_SB_DFFSR_Q_D_SB_LUT4_O_I1_SB_LUT4_O_I0_SB_LUT4_O_1_I3[3] .sym 6772 $PACKER_VCC_NET .sym 6773 $PACKER_VCC_NET .sym 6774 $PACKER_VCC_NET @@ -6319,16 +6384,16 @@ .sym 6778 $PACKER_VCC_NET .sym 6779 $PACKER_VCC_NET .sym 6780 rx_09_fifo.rd_addr[0] -.sym 6781 io_pmod_SB_DFFSS_Q_D_SB_LUT4_O_I0_SB_LUT4_O_I0_SB_LUT4_O_2_I3[1] -.sym 6783 io_pmod_SB_DFFSS_Q_D_SB_LUT4_O_I0_SB_LUT4_O_I0_SB_LUT4_O_2_I3[2] +.sym 6781 io_pmod_SB_DFFSS_Q_D_SB_LUT4_O_I0_SB_LUT4_O_3_I2[1] +.sym 6783 io_pmod_SB_DFFSS_Q_D_SB_LUT4_O_I0_SB_LUT4_O_3_I2[3] .sym 6784 rx_09_fifo.rd_addr[3] -.sym 6785 rx_09_fifo.rd_addr[4] -.sym 6786 io_pmod_SB_DFFSS_Q_D_SB_LUT4_O_I0_SB_LUT4_O_I0_SB_LUT4_O_1_I2[1] -.sym 6787 io_pmod_SB_DFFSS_Q_D_SB_LUT4_O_I0_SB_LUT4_O_I0_SB_LUT4_O_1_I2[3] -.sym 6788 rx_09_fifo.rd_addr[7] +.sym 6785 io_pmod_SB_DFFSS_Q_D_SB_LUT4_O_I0_SB_LUT4_O_2_I0[2] +.sym 6786 io_pmod_SB_DFFSS_Q_D_SB_LUT4_O_I0_SB_LUT4_O_2_I0[3] +.sym 6787 io_pmod_SB_DFFSS_Q_D_SB_LUT4_O_I0_SB_LUT4_O_I2[1] +.sym 6788 io_pmod_SB_DFFSS_Q_D_SB_LUT4_O_I0_SB_LUT4_O_I0[1] .sym 6791 r_counter[0]_$glb_clk .sym 6792 $PACKER_VCC_NET -.sym 6793 io_pmod_SB_DFFSS_Q_D_SB_LUT4_O_I0[3] +.sym 6793 w_rx_09_fifo_pull .sym 6794 lvds_rx_09_inst.o_fifo_data[26] .sym 6795 lvds_rx_09_inst.o_fifo_data[27] .sym 6796 lvds_rx_09_inst.o_fifo_data[28] @@ -6337,42 +6402,42 @@ .sym 6799 lvds_rx_09_inst.o_fifo_data[31] .sym 6800 lvds_rx_09_inst.o_fifo_data[24] .sym 6801 lvds_rx_09_inst.o_fifo_data[25] -.sym 6810 rx_09_fifo.wr_addr_gray[1] -.sym 6812 i_smi_a2_SB_LUT4_I1_O_SB_LUT4_I3_I2_SB_LUT4_O_I3[1] -.sym 6814 rx_09_fifo.wr_addr[2] -.sym 6816 rx_09_fifo.wr_addr[0] -.sym 6821 lvds_rx_09_inst.o_fifo_data[15] -.sym 6823 lvds_rx_09_inst.o_fifo_data[7] -.sym 6824 i_smi_a1_SB_LUT4_I1_O_SB_LUT4_O_I2_SB_CARRY_CO_I1[5] -.sym 6828 i_smi_a1_SB_LUT4_I1_O_SB_LUT4_O_I2[3] -.sym 6834 rx_09_fifo.wr_addr[4] -.sym 6835 rx_09_fifo.full_o_SB_DFFSR_Q_D_SB_LUT4_O_I0_SB_LUT4_O_I2[1] -.sym 6836 $PACKER_VCC_NET -.sym 6837 io_pmod[6]$SB_IO_IN -.sym 6838 lvds_rx_09_inst.o_fifo_data[7] -.sym 6839 rx_09_fifo.wr_addr[3] -.sym 6840 io_pmod[5]$SB_IO_IN -.sym 6842 rx_09_fifo.wr_addr[5] -.sym 6843 rx_09_fifo.wr_addr[0] -.sym 6846 rx_09_fifo.wr_addr[7] -.sym 6847 rx_09_fifo.wr_addr[6] -.sym 6850 $PACKER_VCC_NET -.sym 6851 $PACKER_VCC_NET -.sym 6853 w_rx_09_fifo_data[0] -.sym 6854 w_rx_09_fifo_push -.sym 6858 lvds_rx_09_inst.o_fifo_data[6] -.sym 6859 io_pmod[7]$SB_IO_IN -.sym 6863 rx_09_fifo.wr_addr[2] -.sym 6864 io_pmod[4]$SB_IO_IN -.sym 6865 w_rx_09_fifo_data[1] -.sym 6866 smi_ctrl_ins.o_smi_data_out_SB_DFFE_Q_D_SB_LUT4_O_I1[3] -.sym 6867 i_smi_a1_SB_LUT4_I1_O_SB_LUT4_O_I2_SB_CARRY_CO_I1[5] -.sym 6868 i_smi_a2_SB_LUT4_I1_O_SB_LUT4_I3_1_I2_SB_LUT4_O_I3[1] -.sym 6869 i_smi_a1_SB_LUT4_I1_O_SB_LUT4_O_I2[3] -.sym 6870 smi_ctrl_ins.int_cnt_24_SB_DFFESR_Q_E -.sym 6871 smi_ctrl_ins.int_cnt_24[5] -.sym 6872 smi_ctrl_ins.int_cnt_24[4] -.sym 6873 i_smi_a1_SB_LUT4_I1_O_SB_LUT4_O_I2_SB_LUT4_I0_O_SB_LUT4_O_I1[1] +.sym 6806 rx_09_fifo.wr_addr[4] +.sym 6808 rx_09_fifo.wr_addr[3] +.sym 6809 i_smi_a1_SB_LUT4_I1_O_SB_LUT4_O_I2_SB_LUT4_I0_O[2] +.sym 6810 rx_09_fifo.full_o_SB_DFFSR_Q_D_SB_LUT4_O_I1_SB_LUT4_O_I0_SB_LUT4_O_1_I3[1] +.sym 6812 rx_09_fifo.wr_addr[2] +.sym 6814 rx_09_fifo.wr_addr[6] +.sym 6817 smi_ctrl_ins.int_cnt_09_SB_DFFESR_Q_D_SB_LUT4_O_I3[2] +.sym 6819 w_rx_09_fifo_pulled_data[26] +.sym 6822 $PACKER_VCC_NET +.sym 6823 w_rx_24_fifo_push +.sym 6825 $PACKER_VCC_NET +.sym 6829 w_rx_09_fifo_pulled_data[31] +.sym 6834 rx_24_fifo.wr_addr[6] +.sym 6838 w_rx_24_fifo_push +.sym 6839 rx_24_fifo.full_o_SB_DFFSR_Q_D_SB_LUT4_O_I1_SB_LUT4_O_I0[3] +.sym 6840 w_rx_24_fifo_data[3] +.sym 6842 w_rx_24_fifo_data[0] +.sym 6843 w_rx_24_fifo_data[1] +.sym 6848 $PACKER_VCC_NET +.sym 6849 rx_24_fifo.wr_addr[0] +.sym 6850 w_rx_24_fifo_data[7] +.sym 6851 w_rx_24_fifo_data[2] +.sym 6852 rx_24_fifo.wr_addr[2] +.sym 6853 rx_24_fifo.wr_addr[5] +.sym 6854 rx_24_fifo.wr_addr[4] +.sym 6855 rx_24_fifo.wr_addr[7] +.sym 6856 w_rx_24_fifo_data[5] +.sym 6857 w_rx_24_fifo_data[4] +.sym 6860 w_rx_24_fifo_data[6] +.sym 6861 $PACKER_VCC_NET +.sym 6864 rx_24_fifo.wr_addr[3] +.sym 6869 i_smi_a2_SB_LUT4_I1_O_SB_LUT4_O_I3[5] +.sym 6870 i_smi_a2_SB_LUT4_I1_O[1] +.sym 6871 smi_ctrl_ins.r_fifo_09_pull_SB_DFFESR_Q_E +.sym 6872 smi_ctrl_ins.int_cnt_09_SB_DFFESR_Q_E_SB_LUT4_O_I1[1] +.sym 6873 spi_if_ins.o_load_cmd_SB_DFFESR_Q_D[1] .sym 6874 $PACKER_VCC_NET .sym 6875 $PACKER_VCC_NET .sym 6876 $PACKER_VCC_NET @@ -6381,63 +6446,58 @@ .sym 6879 $PACKER_VCC_NET .sym 6880 $PACKER_VCC_NET .sym 6881 $PACKER_VCC_NET -.sym 6882 rx_09_fifo.wr_addr[0] -.sym 6883 rx_09_fifo.full_o_SB_DFFSR_Q_D_SB_LUT4_O_I0_SB_LUT4_O_I2[1] -.sym 6885 rx_09_fifo.wr_addr[2] -.sym 6886 rx_09_fifo.wr_addr[3] -.sym 6887 rx_09_fifo.wr_addr[4] -.sym 6888 rx_09_fifo.wr_addr[5] -.sym 6889 rx_09_fifo.wr_addr[6] -.sym 6890 rx_09_fifo.wr_addr[7] +.sym 6882 rx_24_fifo.wr_addr[0] +.sym 6883 rx_24_fifo.full_o_SB_DFFSR_Q_D_SB_LUT4_O_I1_SB_LUT4_O_I0[3] +.sym 6885 rx_24_fifo.wr_addr[2] +.sym 6886 rx_24_fifo.wr_addr[3] +.sym 6887 rx_24_fifo.wr_addr[4] +.sym 6888 rx_24_fifo.wr_addr[5] +.sym 6889 rx_24_fifo.wr_addr[6] +.sym 6890 rx_24_fifo.wr_addr[7] .sym 6893 lvds_clock_buf .sym 6894 $PACKER_VCC_NET -.sym 6895 w_rx_09_fifo_data[0] -.sym 6896 w_rx_09_fifo_data[1] -.sym 6897 io_pmod[4]$SB_IO_IN -.sym 6898 io_pmod[5]$SB_IO_IN -.sym 6899 io_pmod[6]$SB_IO_IN -.sym 6900 io_pmod[7]$SB_IO_IN -.sym 6901 lvds_rx_09_inst.o_fifo_data[6] -.sym 6902 lvds_rx_09_inst.o_fifo_data[7] -.sym 6903 w_rx_09_fifo_push +.sym 6895 w_rx_24_fifo_data[0] +.sym 6896 w_rx_24_fifo_data[1] +.sym 6897 w_rx_24_fifo_data[2] +.sym 6898 w_rx_24_fifo_data[3] +.sym 6899 w_rx_24_fifo_data[4] +.sym 6900 w_rx_24_fifo_data[5] +.sym 6901 w_rx_24_fifo_data[6] +.sym 6902 w_rx_24_fifo_data[7] +.sym 6903 w_rx_24_fifo_push .sym 6907 i_smi_a3$SB_IO_IN -.sym 6909 rx_09_fifo.full_o_SB_DFFSR_Q_D_SB_LUT4_O_I0_SB_LUT4_O_I2[1] -.sym 6911 w_smi_data_output[3] -.sym 6913 io_pmod[6]$SB_IO_IN -.sym 6918 rx_09_fifo.wr_addr[5] -.sym 6924 lvds_rx_09_inst.o_fifo_data[6] -.sym 6925 smi_ctrl_ins.int_cnt_24[4] -.sym 6926 io_pmod_SB_DFFSS_Q_D_SB_LUT4_O_I0_SB_LUT4_O_I0_SB_LUT4_O_1_I2[1] -.sym 6929 smi_ctrl_ins.o_smi_data_out_SB_DFFE_Q_D_SB_LUT4_O_I1[3] -.sym 6930 io_pmod[4]$SB_IO_IN -.sym 6931 i_smi_a1_SB_LUT4_I1_O_SB_LUT4_O_I2_SB_CARRY_CO_I1[5] -.sym 6938 lvds_rx_09_inst.o_fifo_data[9] -.sym 6940 io_pmod_SB_DFFSS_Q_D_SB_LUT4_O_I0[3] -.sym 6941 lvds_rx_09_inst.o_fifo_data[14] -.sym 6942 rx_09_fifo.rd_addr[4] -.sym 6943 io_pmod_SB_DFFSS_Q_D_SB_LUT4_O_I0_SB_LUT4_O_I0_SB_LUT4_O_1_I2[1] -.sym 6944 io_pmod_SB_DFFSS_Q_D_SB_LUT4_O_I0_SB_LUT4_O_I0_SB_LUT4_O_2_I3[1] -.sym 6946 rx_09_fifo.rd_addr[3] -.sym 6947 rx_09_fifo.rd_addr[0] -.sym 6948 $PACKER_VCC_NET -.sym 6949 io_pmod_SB_DFFSS_Q_D_SB_LUT4_O_I0_SB_LUT4_O_I0_SB_LUT4_O_2_I3[2] -.sym 6950 rx_09_fifo.rd_addr[7] -.sym 6951 $PACKER_VCC_NET -.sym 6952 io_pmod_SB_DFFSS_Q_D_SB_LUT4_O_I0_SB_LUT4_O_I0_SB_LUT4_O_1_I2[3] -.sym 6954 lvds_rx_09_inst.o_fifo_data[11] -.sym 6956 lvds_rx_09_inst.o_fifo_data[13] -.sym 6957 lvds_rx_09_inst.o_fifo_data[8] -.sym 6959 lvds_rx_09_inst.o_fifo_data[10] -.sym 6961 lvds_rx_09_inst.o_fifo_data[15] -.sym 6962 lvds_rx_09_inst.o_fifo_data[12] +.sym 6910 smi_ctrl_ins.int_cnt_24[5] +.sym 6926 w_rx_24_fifo_data[20] +.sym 6929 rx_24_fifo.rd_addr[4] +.sym 6930 rx_24_fifo.rd_addr[4] +.sym 6931 $PACKER_VCC_NET +.sym 6936 rx_24_fifo.rd_addr[4] +.sym 6939 w_rx_24_fifo_data[14] +.sym 6940 w_rx_24_fifo_data[13] +.sym 6941 w_rx_24_fifo_data[12] +.sym 6942 $PACKER_VCC_NET +.sym 6943 w_rx_24_fifo_data[10] +.sym 6944 rx_24_fifo.rd_addr[3] +.sym 6945 w_rx_24_fifo_data[11] +.sym 6946 w_rx_24_fifo_data[8] +.sym 6947 w_rx_24_fifo_data[15] +.sym 6950 $PACKER_VCC_NET +.sym 6952 rx_24_fifo.rd_addr[0] +.sym 6954 rx_24_fifo.rd_addr[2] +.sym 6957 rx_24_fifo.rd_addr[5] +.sym 6961 rx_24_fifo.rd_addr[6] .sym 6963 $PACKER_VCC_NET -.sym 6968 lvds_rx_09_inst.o_fifo_data[6] -.sym 6969 lvds_rx_09_inst.o_fifo_data[15] -.sym 6970 lvds_rx_09_inst.o_fifo_data[7] -.sym 6972 smi_ctrl_ins.o_smi_data_out_SB_DFFE_Q_D_SB_LUT4_O_I1_SB_LUT4_O_1_I1[1] -.sym 6973 lvds_rx_09_inst.o_fifo_data[8] -.sym 6974 smi_ctrl_ins.o_smi_data_out_SB_DFFE_Q_4_D_SB_LUT4_O_I1_SB_LUT4_O_1_I1[1] -.sym 6975 $io_pmod[5]$iobuf_i +.sym 6964 rx_24_fifo.rd_addr[1] +.sym 6965 w_rx_24_fifo_pull +.sym 6966 rx_24_fifo.rd_addr[7] +.sym 6967 w_rx_24_fifo_data[9] +.sym 6968 rx_24_fifo.rd_addr[0] +.sym 6969 rx_24_fifo.rd_addr[6] +.sym 6971 i_smi_a2_SB_LUT4_I1_O_SB_LUT4_O_I3[3] +.sym 6972 rx_24_fifo.rd_addr[1] +.sym 6973 rx_24_fifo.rd_addr[5] +.sym 6974 rx_24_fifo.rd_addr[7] +.sym 6975 rx_24_fifo.rd_addr_gray[2] .sym 6976 $PACKER_VCC_NET .sym 6977 $PACKER_VCC_NET .sym 6978 $PACKER_VCC_NET @@ -6446,60 +6506,67 @@ .sym 6981 $PACKER_VCC_NET .sym 6982 $PACKER_VCC_NET .sym 6983 $PACKER_VCC_NET -.sym 6984 rx_09_fifo.rd_addr[0] -.sym 6985 io_pmod_SB_DFFSS_Q_D_SB_LUT4_O_I0_SB_LUT4_O_I0_SB_LUT4_O_2_I3[1] -.sym 6987 io_pmod_SB_DFFSS_Q_D_SB_LUT4_O_I0_SB_LUT4_O_I0_SB_LUT4_O_2_I3[2] -.sym 6988 rx_09_fifo.rd_addr[3] -.sym 6989 rx_09_fifo.rd_addr[4] -.sym 6990 io_pmod_SB_DFFSS_Q_D_SB_LUT4_O_I0_SB_LUT4_O_I0_SB_LUT4_O_1_I2[1] -.sym 6991 io_pmod_SB_DFFSS_Q_D_SB_LUT4_O_I0_SB_LUT4_O_I0_SB_LUT4_O_1_I2[3] -.sym 6992 rx_09_fifo.rd_addr[7] +.sym 6984 rx_24_fifo.rd_addr[0] +.sym 6985 rx_24_fifo.rd_addr[1] +.sym 6987 rx_24_fifo.rd_addr[2] +.sym 6988 rx_24_fifo.rd_addr[3] +.sym 6989 rx_24_fifo.rd_addr[4] +.sym 6990 rx_24_fifo.rd_addr[5] +.sym 6991 rx_24_fifo.rd_addr[6] +.sym 6992 rx_24_fifo.rd_addr[7] .sym 6995 r_counter[0]_$glb_clk .sym 6996 $PACKER_VCC_NET -.sym 6997 io_pmod_SB_DFFSS_Q_D_SB_LUT4_O_I0[3] -.sym 6998 lvds_rx_09_inst.o_fifo_data[10] -.sym 6999 lvds_rx_09_inst.o_fifo_data[11] -.sym 7000 lvds_rx_09_inst.o_fifo_data[12] -.sym 7001 lvds_rx_09_inst.o_fifo_data[13] -.sym 7002 lvds_rx_09_inst.o_fifo_data[14] -.sym 7003 lvds_rx_09_inst.o_fifo_data[15] -.sym 7004 lvds_rx_09_inst.o_fifo_data[8] -.sym 7005 lvds_rx_09_inst.o_fifo_data[9] -.sym 7013 io_pmod[5]$SB_IO_IN -.sym 7021 i_smi_a2_SB_LUT4_I1_O_SB_LUT4_I3_1_I2_SB_LUT4_O_I3[1] -.sym 7022 w_rx_24_fifo_data[17] -.sym 7023 smi_ctrl_ins.o_smi_data_out_SB_DFFE_Q_D_SB_LUT4_O_I1_SB_LUT4_O_1_I1[2] -.sym 7026 smi_ctrl_ins.o_smi_data_out_SB_DFFE_Q_4_D_SB_LUT4_O_I1[3] -.sym 7028 rx_24_fifo.rd_addr[5] -.sym 7031 w_rx_09_fifo_data[0] -.sym 7033 w_rx_09_fifo_push -.sym 7042 $PACKER_VCC_NET -.sym 7044 rx_24_fifo.wr_addr[4] -.sym 7045 rx_24_fifo.full_o_SB_LUT4_I0_O_SB_LUT4_O_I1_SB_LUT4_O_I0[3] -.sym 7046 $PACKER_VCC_NET +.sym 6997 w_rx_24_fifo_pull +.sym 6998 w_rx_24_fifo_data[10] +.sym 6999 w_rx_24_fifo_data[11] +.sym 7000 w_rx_24_fifo_data[12] +.sym 7001 w_rx_24_fifo_data[13] +.sym 7002 w_rx_24_fifo_data[14] +.sym 7003 w_rx_24_fifo_data[15] +.sym 7004 w_rx_24_fifo_data[8] +.sym 7005 w_rx_24_fifo_data[9] +.sym 7011 smi_ctrl_ins.int_cnt_09_SB_DFFESR_Q_E_SB_LUT4_O_I1[1] +.sym 7012 i_smi_a1_SB_LUT4_I1_O_SB_LUT4_O_I2_SB_LUT4_I0_O[2] +.sym 7013 w_rx_24_fifo_data[15] +.sym 7018 w_rx_09_fifo_push +.sym 7020 spi_if_ins.r_tx_data_valid_SB_DFFESR_Q_D[0] +.sym 7022 $PACKER_VCC_NET +.sym 7024 rx_24_fifo.wr_addr[5] +.sym 7025 rx_24_fifo.rd_addr[5] +.sym 7026 $PACKER_VCC_NET +.sym 7027 rx_24_fifo.rd_addr_gray_SB_DFFESR_Q_7_D_SB_LUT4_I3_O_SB_LUT4_O_2_I0_SB_LUT4_O_1_I3[1] +.sym 7029 rx_24_fifo.rd_addr_gray_SB_DFFESR_Q_7_D_SB_LUT4_I3_O_SB_LUT4_O_2_I0_SB_LUT4_O_1_I3[2] +.sym 7030 rx_24_fifo.rd_addr[3] +.sym 7032 rx_24_fifo.wr_addr[0] +.sym 7033 rx_24_fifo.rd_addr[6] +.sym 7038 rx_24_fifo.wr_addr[0] +.sym 7040 rx_24_fifo.wr_addr[2] +.sym 7041 rx_24_fifo.wr_addr[5] +.sym 7042 w_rx_24_fifo_data[19] +.sym 7043 w_rx_24_fifo_data[18] +.sym 7045 $PACKER_VCC_NET +.sym 7046 w_rx_24_fifo_data[22] +.sym 7047 rx_24_fifo.wr_addr[4] .sym 7049 $PACKER_VCC_NET -.sym 7050 rx_24_fifo.wr_addr[3] +.sym 7050 rx_24_fifo.wr_addr[7] .sym 7051 w_rx_24_fifo_push -.sym 7053 w_rx_24_fifo_data[7] -.sym 7054 w_rx_24_fifo_data[1] -.sym 7056 rx_24_fifo.wr_addr[2] -.sym 7057 rx_24_fifo.wr_addr[5] -.sym 7058 w_rx_24_fifo_data[5] -.sym 7059 w_rx_24_fifo_data[0] -.sym 7060 rx_24_fifo.wr_addr[6] -.sym 7062 w_rx_24_fifo_data[4] -.sym 7063 w_rx_24_fifo_data[3] -.sym 7064 rx_24_fifo.wr_addr[7] -.sym 7066 w_rx_24_fifo_data[2] -.sym 7067 rx_24_fifo.wr_addr[0] -.sym 7068 w_rx_24_fifo_data[6] -.sym 7070 smi_ctrl_ins.o_smi_data_out_SB_DFFE_Q_4_D_SB_LUT4_O_I1[3] -.sym 7071 rx_24_fifo.wr_addr_gray_rd_r[7] -.sym 7072 smi_ctrl_ins.o_smi_data_out_SB_DFFE_Q_7_D_SB_LUT4_O_I0_SB_LUT4_O_I3[3] -.sym 7074 rx_24_fifo.rd_addr[7] -.sym 7075 rx_24_fifo.wr_addr_gray_rd[7] -.sym 7076 smi_ctrl_ins.o_smi_data_out_SB_DFFE_Q_7_D_SB_LUT4_O_I0[2] -.sym 7077 rx_24_fifo.rd_addr[0] +.sym 7052 rx_24_fifo.wr_addr[3] +.sym 7053 $PACKER_VCC_NET +.sym 7054 w_rx_24_fifo_data[17] +.sym 7055 w_rx_24_fifo_data[16] +.sym 7056 w_rx_24_fifo_data[21] +.sym 7058 rx_24_fifo.wr_addr[6] +.sym 7060 w_rx_24_fifo_data[23] +.sym 7062 rx_24_fifo.full_o_SB_DFFSR_Q_D_SB_LUT4_O_I1_SB_LUT4_O_I0[3] +.sym 7064 w_rx_24_fifo_data[20] +.sym 7070 rx_24_fifo.rd_addr_gray_SB_DFFESR_Q_7_D_SB_LUT4_I3_O_SB_LUT4_O_I0[1] +.sym 7071 rx_24_fifo.rd_addr_gray_SB_DFFESR_Q_7_D_SB_LUT4_I3_O_SB_LUT4_O_I0_SB_LUT4_O_2_I0[2] +.sym 7072 rx_24_fifo.rd_addr_gray_SB_DFFESR_Q_6_D[2] +.sym 7073 rx_24_fifo.wr_addr_gray_rd[7] +.sym 7074 rx_24_fifo.wr_addr_gray_rd[6] +.sym 7075 rx_24_fifo.wr_addr_gray_rd_r[7] +.sym 7076 rx_24_fifo.wr_addr_gray_rd[3] +.sym 7077 rx_24_fifo.rd_addr_gray_SB_DFFESR_Q_7_D_SB_LUT4_I3_O_SB_LUT4_O_I0_SB_LUT4_O_2_I0[0] .sym 7078 $PACKER_VCC_NET .sym 7079 $PACKER_VCC_NET .sym 7080 $PACKER_VCC_NET @@ -6509,7 +6576,7 @@ .sym 7084 $PACKER_VCC_NET .sym 7085 $PACKER_VCC_NET .sym 7086 rx_24_fifo.wr_addr[0] -.sym 7087 rx_24_fifo.full_o_SB_LUT4_I0_O_SB_LUT4_O_I1_SB_LUT4_O_I0[3] +.sym 7087 rx_24_fifo.full_o_SB_DFFSR_Q_D_SB_LUT4_O_I1_SB_LUT4_O_I0[3] .sym 7089 rx_24_fifo.wr_addr[2] .sym 7090 rx_24_fifo.wr_addr[3] .sym 7091 rx_24_fifo.wr_addr[4] @@ -6518,52 +6585,52 @@ .sym 7094 rx_24_fifo.wr_addr[7] .sym 7097 lvds_clock_buf .sym 7098 $PACKER_VCC_NET -.sym 7099 w_rx_24_fifo_data[0] -.sym 7100 w_rx_24_fifo_data[1] -.sym 7101 w_rx_24_fifo_data[2] -.sym 7102 w_rx_24_fifo_data[3] -.sym 7103 w_rx_24_fifo_data[4] -.sym 7104 w_rx_24_fifo_data[5] -.sym 7105 w_rx_24_fifo_data[6] -.sym 7106 w_rx_24_fifo_data[7] +.sym 7099 w_rx_24_fifo_data[16] +.sym 7100 w_rx_24_fifo_data[17] +.sym 7101 w_rx_24_fifo_data[18] +.sym 7102 w_rx_24_fifo_data[19] +.sym 7103 w_rx_24_fifo_data[20] +.sym 7104 w_rx_24_fifo_data[21] +.sym 7105 w_rx_24_fifo_data[22] +.sym 7106 w_rx_24_fifo_data[23] .sym 7107 w_rx_24_fifo_push -.sym 7112 $PACKER_VCC_NET -.sym 7117 $PACKER_VCC_NET -.sym 7118 i_smi_a2_SB_LUT4_I1_O_SB_LUT4_I3_1_I2[1] -.sym 7122 $PACKER_VCC_NET -.sym 7124 w_rx_24_fifo_pulled_data[24] -.sym 7126 rx_24_fifo.wr_addr[6] -.sym 7127 lvds_rx_09_inst.r_state_if_SB_LUT4_I2_O[0] -.sym 7128 w_rx_09_fifo_push -.sym 7129 w_rx_24_fifo_empty -.sym 7134 w_rx_24_fifo_data[9] -.sym 7140 w_rx_24_fifo_data[9] -.sym 7141 rx_24_fifo.empty_o_SB_LUT4_I3_O_SB_LUT4_O_1_I3[2] -.sym 7142 rx_24_fifo.rd_addr[4] -.sym 7143 w_rx_24_fifo_data[10] -.sym 7144 w_rx_24_fifo_pull -.sym 7145 w_rx_24_fifo_data[14] -.sym 7146 rx_24_fifo.empty_o_SB_LUT4_I3_O_SB_LUT4_O_1_I3[1] -.sym 7147 w_rx_24_fifo_data[12] -.sym 7152 rx_24_fifo.empty_o_SB_LUT4_I3_O_SB_LUT4_O_I0[1] -.sym 7153 w_rx_24_fifo_data[11] -.sym 7156 w_rx_24_fifo_data[13] -.sym 7160 rx_24_fifo.rd_addr[6] -.sym 7161 $PACKER_VCC_NET -.sym 7162 w_rx_24_fifo_data[15] -.sym 7163 w_rx_24_fifo_data[8] -.sym 7166 rx_24_fifo.rd_addr[5] -.sym 7167 $PACKER_VCC_NET -.sym 7168 rx_24_fifo.rd_addr[7] -.sym 7169 $PACKER_VCC_NET -.sym 7171 rx_24_fifo.rd_addr[0] -.sym 7172 smi_ctrl_ins.o_smi_data_out_SB_DFFE_Q_D_SB_LUT4_O_I1_SB_LUT4_O_1_I1[2] -.sym 7173 smi_ctrl_ins.r_fifo_24_pull_SB_LUT4_I0_I3[3] -.sym 7174 smi_ctrl_ins.o_smi_data_out_SB_DFFE_Q_4_D_SB_LUT4_O_I1_SB_LUT4_O_1_I1[2] -.sym 7175 w_rx_09_fifo_data[1] -.sym 7176 w_rx_09_fifo_data[0] -.sym 7177 rx_24_fifo.empty_o_SB_DFFSS_Q_D_SB_LUT4_O_I0[0] -.sym 7179 rx_24_fifo.rd_addr_gray_SB_DFFESR_Q_5_D[3] +.sym 7116 rx_24_fifo.wr_addr[2] +.sym 7121 spi_if_ins.state_if[0] +.sym 7123 rx_24_fifo.wr_addr[4] +.sym 7124 rx_24_fifo.rd_addr_gray_SB_LUT4_I2_O[6] +.sym 7125 rx_24_fifo.rd_addr[3] +.sym 7126 rx_24_fifo.rd_addr_gray_SB_LUT4_I2_O[7] +.sym 7127 rx_24_fifo.rd_addr[2] +.sym 7129 rx_24_fifo.wr_addr_gray[3] +.sym 7130 smi_ctrl_ins.int_cnt_09[3] +.sym 7132 rx_24_fifo.rd_addr[7] +.sym 7140 rx_24_fifo.rd_addr[0] +.sym 7142 rx_24_fifo.rd_addr[2] +.sym 7145 rx_24_fifo.rd_addr[5] +.sym 7148 rx_24_fifo.rd_addr[3] +.sym 7149 rx_24_fifo.rd_addr[6] +.sym 7151 w_rx_24_fifo_data[31] +.sym 7152 rx_24_fifo.rd_addr[1] +.sym 7153 w_rx_24_fifo_data[27] +.sym 7154 rx_24_fifo.rd_addr[7] +.sym 7156 rx_24_fifo.rd_addr[4] +.sym 7157 w_rx_24_fifo_data[24] +.sym 7158 $PACKER_VCC_NET +.sym 7160 $PACKER_VCC_NET +.sym 7163 w_rx_24_fifo_data[30] +.sym 7164 $PACKER_VCC_NET +.sym 7165 w_rx_24_fifo_data[25] +.sym 7166 w_rx_24_fifo_data[28] +.sym 7167 w_rx_24_fifo_data[29] +.sym 7168 w_rx_24_fifo_data[26] +.sym 7169 w_rx_24_fifo_pull +.sym 7173 rx_24_fifo.rd_addr_gray_SB_LUT4_I2_O[1] +.sym 7174 rx_24_fifo.rd_addr_gray_SB_DFFESR_Q_7_D_SB_LUT4_I3_O_SB_LUT4_O_2_I0_SB_LUT4_O_1_I3[1] +.sym 7175 rx_24_fifo.rd_addr_gray_SB_DFFESR_Q_7_D_SB_LUT4_I3_O_SB_LUT4_O_2_I0_SB_LUT4_O_1_I3[2] +.sym 7176 rx_24_fifo.rd_addr_gray_SB_LUT4_I2_O[4] +.sym 7177 rx_24_fifo.rd_addr_gray_SB_LUT4_I2_O[5] +.sym 7178 rx_24_fifo.rd_addr_gray_SB_LUT4_I2_O[6] +.sym 7179 rx_24_fifo.rd_addr_gray_SB_LUT4_I2_O[7] .sym 7180 $PACKER_VCC_NET .sym 7181 $PACKER_VCC_NET .sym 7182 $PACKER_VCC_NET @@ -6573,9 +6640,9 @@ .sym 7186 $PACKER_VCC_NET .sym 7187 $PACKER_VCC_NET .sym 7188 rx_24_fifo.rd_addr[0] -.sym 7189 rx_24_fifo.empty_o_SB_LUT4_I3_O_SB_LUT4_O_I0[1] -.sym 7191 rx_24_fifo.empty_o_SB_LUT4_I3_O_SB_LUT4_O_1_I3[1] -.sym 7192 rx_24_fifo.empty_o_SB_LUT4_I3_O_SB_LUT4_O_1_I3[2] +.sym 7189 rx_24_fifo.rd_addr[1] +.sym 7191 rx_24_fifo.rd_addr[2] +.sym 7192 rx_24_fifo.rd_addr[3] .sym 7193 rx_24_fifo.rd_addr[4] .sym 7194 rx_24_fifo.rd_addr[5] .sym 7195 rx_24_fifo.rd_addr[6] @@ -6583,3523 +6650,3497 @@ .sym 7199 r_counter[0]_$glb_clk .sym 7200 $PACKER_VCC_NET .sym 7201 w_rx_24_fifo_pull -.sym 7202 w_rx_24_fifo_data[10] -.sym 7203 w_rx_24_fifo_data[11] -.sym 7204 w_rx_24_fifo_data[12] -.sym 7205 w_rx_24_fifo_data[13] -.sym 7206 w_rx_24_fifo_data[14] -.sym 7207 w_rx_24_fifo_data[15] -.sym 7208 w_rx_24_fifo_data[8] -.sym 7209 w_rx_24_fifo_data[9] -.sym 7215 smi_ctrl_ins.o_smi_data_out_SB_DFFE_Q_7_D_SB_LUT4_O_I0[2] -.sym 7216 spi_if_ins.r_tx_data_valid_SB_DFFESR_Q_D_SB_LUT4_I3_O -.sym 7229 w_lvds_rx_09_d0 -.sym 7231 w_lvds_rx_09_d1 -.sym 7233 rx_24_fifo.wr_addr[6] -.sym 7242 rx_24_fifo.wr_addr[0] -.sym 7243 w_rx_24_fifo_data[16] -.sym 7244 rx_24_fifo.wr_addr[2] -.sym 7245 $PACKER_VCC_NET -.sym 7247 w_rx_24_fifo_data[20] -.sym 7248 rx_24_fifo.wr_addr[6] -.sym 7250 rx_24_fifo.wr_addr[5] -.sym 7251 w_rx_24_fifo_data[17] -.sym 7253 $PACKER_VCC_NET -.sym 7255 w_rx_24_fifo_push -.sym 7257 w_rx_24_fifo_data[23] -.sym 7258 w_rx_24_fifo_data[19] -.sym 7259 w_rx_24_fifo_data[18] -.sym 7260 rx_24_fifo.wr_addr[4] -.sym 7261 rx_24_fifo.wr_addr[7] -.sym 7264 w_rx_24_fifo_data[21] -.sym 7266 w_rx_24_fifo_data[22] -.sym 7270 rx_24_fifo.wr_addr[3] -.sym 7272 rx_24_fifo.full_o_SB_LUT4_I0_O_SB_LUT4_O_I1_SB_LUT4_O_I0[3] -.sym 7274 rx_24_fifo.full_o_SB_LUT4_I0_I1_SB_LUT4_O_1_I2[1] -.sym 7275 lvds_rx_09_inst.r_state_if_SB_LUT4_I2_O[0] -.sym 7276 rx_24_fifo.rd_addr_gray_wr[3] -.sym 7277 rx_24_fifo.rd_addr_gray_wr[4] -.sym 7278 rx_24_fifo.rd_addr_gray_wr[6] -.sym 7279 rx_24_fifo.rd_addr_gray_wr_r[3] -.sym 7280 rx_24_fifo.rd_addr_gray_wr_r[6] -.sym 7281 rx_24_fifo.full_o_SB_LUT4_I0_O_SB_LUT4_O_I1_SB_LUT4_O_1_I3[0] -.sym 7282 $PACKER_VCC_NET -.sym 7283 $PACKER_VCC_NET -.sym 7284 $PACKER_VCC_NET -.sym 7285 $PACKER_VCC_NET -.sym 7286 $PACKER_VCC_NET -.sym 7287 $PACKER_VCC_NET -.sym 7288 $PACKER_VCC_NET -.sym 7289 $PACKER_VCC_NET -.sym 7290 rx_24_fifo.wr_addr[0] -.sym 7291 rx_24_fifo.full_o_SB_LUT4_I0_O_SB_LUT4_O_I1_SB_LUT4_O_I0[3] -.sym 7293 rx_24_fifo.wr_addr[2] -.sym 7294 rx_24_fifo.wr_addr[3] -.sym 7295 rx_24_fifo.wr_addr[4] -.sym 7296 rx_24_fifo.wr_addr[5] -.sym 7297 rx_24_fifo.wr_addr[6] -.sym 7298 rx_24_fifo.wr_addr[7] -.sym 7301 lvds_clock_buf -.sym 7302 $PACKER_VCC_NET -.sym 7303 w_rx_24_fifo_data[16] -.sym 7304 w_rx_24_fifo_data[17] -.sym 7305 w_rx_24_fifo_data[18] -.sym 7306 w_rx_24_fifo_data[19] -.sym 7307 w_rx_24_fifo_data[20] -.sym 7308 w_rx_24_fifo_data[21] -.sym 7309 w_rx_24_fifo_data[22] -.sym 7310 w_rx_24_fifo_data[23] -.sym 7311 w_rx_24_fifo_push -.sym 7316 rx_24_fifo.wr_addr_gray_rd_r[6] -.sym 7319 rx_24_fifo.empty_o_SB_LUT4_I3_O_SB_LUT4_O_1_I3[2] -.sym 7320 rx_24_fifo.wr_addr[2] -.sym 7321 rx_24_fifo.empty_o_SB_LUT4_I3_O_SB_LUT4_O_1_I3[1] -.sym 7322 rx_24_fifo.empty_o_SB_LUT4_I3_O_SB_LUT4_O_I0[1] -.sym 7325 rx_24_fifo.rd_addr[4] -.sym 7326 w_lvds_rx_09_d1_SB_LUT4_I0_O_SB_LUT4_O_I2_SB_LUT4_I0_O[0] -.sym 7347 w_rx_24_fifo_data[30] -.sym 7348 w_rx_24_fifo_pull -.sym 7349 w_rx_24_fifo_data[26] -.sym 7350 rx_24_fifo.rd_addr[0] -.sym 7351 w_rx_24_fifo_data[28] -.sym 7353 rx_24_fifo.empty_o_SB_LUT4_I3_O_SB_LUT4_O_1_I3[1] -.sym 7354 rx_24_fifo.rd_addr[5] -.sym 7355 $PACKER_VCC_NET -.sym 7356 w_rx_24_fifo_data[24] -.sym 7357 $PACKER_VCC_NET -.sym 7358 rx_24_fifo.empty_o_SB_LUT4_I3_O_SB_LUT4_O_1_I3[2] -.sym 7359 w_rx_24_fifo_data[25] -.sym 7360 rx_24_fifo.rd_addr[6] -.sym 7361 rx_24_fifo.empty_o_SB_LUT4_I3_O_SB_LUT4_O_I0[1] -.sym 7362 rx_24_fifo.rd_addr[4] -.sym 7365 rx_24_fifo.rd_addr[7] -.sym 7366 w_rx_24_fifo_data[31] -.sym 7371 w_rx_24_fifo_data[27] -.sym 7373 w_rx_24_fifo_data[29] -.sym 7374 $PACKER_VCC_NET -.sym 7376 rx_24_fifo.full_o_SB_LUT4_I0_O_SB_LUT4_O_1_I0[0] -.sym 7377 rx_24_fifo.full_o_SB_LUT4_I0_O_SB_LUT4_O_I1[0] -.sym 7378 rx_24_fifo.full_o_SB_LUT4_I0_I1_SB_LUT4_O_I0[3] -.sym 7379 rx_24_fifo.wr_addr[6] -.sym 7380 rx_24_fifo.full_o_SB_LUT4_I0_O[1] -.sym 7381 rx_24_fifo.full_o_SB_LUT4_I0_I1_SB_LUT4_O_I0[2] -.sym 7382 rx_24_fifo.wr_addr_gray[5] -.sym 7383 rx_24_fifo.full_o_SB_LUT4_I0_I1_SB_LUT4_O_1_I2[0] -.sym 7384 $PACKER_VCC_NET -.sym 7385 $PACKER_VCC_NET -.sym 7386 $PACKER_VCC_NET -.sym 7387 $PACKER_VCC_NET -.sym 7388 $PACKER_VCC_NET -.sym 7389 $PACKER_VCC_NET -.sym 7390 $PACKER_VCC_NET -.sym 7391 $PACKER_VCC_NET -.sym 7392 rx_24_fifo.rd_addr[0] -.sym 7393 rx_24_fifo.empty_o_SB_LUT4_I3_O_SB_LUT4_O_I0[1] -.sym 7395 rx_24_fifo.empty_o_SB_LUT4_I3_O_SB_LUT4_O_1_I3[1] -.sym 7396 rx_24_fifo.empty_o_SB_LUT4_I3_O_SB_LUT4_O_1_I3[2] -.sym 7397 rx_24_fifo.rd_addr[4] -.sym 7398 rx_24_fifo.rd_addr[5] -.sym 7399 rx_24_fifo.rd_addr[6] -.sym 7400 rx_24_fifo.rd_addr[7] -.sym 7403 r_counter[0]_$glb_clk -.sym 7404 $PACKER_VCC_NET -.sym 7405 w_rx_24_fifo_pull -.sym 7406 w_rx_24_fifo_data[26] -.sym 7407 w_rx_24_fifo_data[27] -.sym 7408 w_rx_24_fifo_data[28] -.sym 7409 w_rx_24_fifo_data[29] -.sym 7410 w_rx_24_fifo_data[30] -.sym 7411 w_rx_24_fifo_data[31] -.sym 7412 w_rx_24_fifo_data[24] -.sym 7413 w_rx_24_fifo_data[25] -.sym 7422 w_rx_24_fifo_push -.sym 7437 lvds_rx_24_inst.r_push_SB_LUT4_I3_1_O -.sym 7478 rx_24_fifo.full_o_SB_LUT4_I0_I1[1] -.sym 7479 rx_24_fifo.wr_addr_gray[3] -.sym 7480 rx_24_fifo.full_o_SB_LUT4_I0_O_SB_LUT4_O_I1[1] -.sym 7481 rx_24_fifo.wr_addr_gray[1] -.sym 7482 rx_24_fifo.wr_addr_gray[0] -.sym 7483 rx_24_fifo.full_o_SB_LUT4_I0_O_SB_LUT4_O_I1_SB_LUT4_O_I0[0] -.sym 7484 rx_24_fifo.wr_addr_gray[4] -.sym 7526 w_rx_24_fifo_push -.sym 7529 lvds_rx_24_inst.r_push_SB_LUT4_I3_1_O -.sym 7534 rx_24_fifo.wr_addr[6] -.sym 7536 w_rx_09_fifo_push -.sym 7542 w_lvds_rx_09_d1_SB_LUT4_I0_O[1] -.sym 7580 rx_24_fifo.full_o_SB_LUT4_I0_I1_SB_LUT4_O_I0[0] -.sym 7581 rx_24_fifo.wr_addr_gray_rd[2] -.sym 7582 rx_24_fifo.wr_addr_gray_rd[0] -.sym 7583 w_lvds_rx_09_d1_SB_LUT4_I0_O[1] -.sym 7585 rx_24_fifo.wr_addr_gray_rd[4] -.sym 7622 rx_24_fifo.wr_addr_gray_SB_LUT4_I2_1_O[6] -.sym 7628 rx_24_fifo.wr_addr_gray_SB_LUT4_I2_1_O[3] -.sym 7629 rx_24_fifo.full_o_SB_LUT4_I0_I1_SB_LUT4_O_I0[1] -.sym 7632 rx_24_fifo.wr_addr_gray_SB_LUT4_I2_1_O[2] -.sym 7635 rx_24_fifo.full_o_SB_LUT4_I0_I1_SB_LUT4_O_2_I2[1] -.sym 7640 rx_24_fifo.full_o_SB_LUT4_I0_I1_SB_LUT4_O_1_I2[3] -.sym 7684 rx_24_fifo.wr_addr_gray[2] -.sym 7727 rx_24_fifo.wr_addr_gray_SB_LUT4_I2_1_O[1] -.sym 7732 rx_24_fifo.wr_addr[0] -.sym 7788 w_rx_09_fifo_push -.sym 7790 lvds_rx_09_inst.r_push_SB_DFFNESR_Q_E -.sym 7826 rx_24_fifo.wr_addr_gray_SB_LUT4_I2_1_O[2] -.sym 7829 sys_ctrl_ins.o_soft_reset_SB_DFFESS_Q_S -.sym 7836 rx_24_fifo.wr_addr_gray_SB_LUT4_I2_1_O[3] -.sym 7845 lvds_rx_24_inst.r_push_SB_LUT4_I3_1_O -.sym 7928 w_rx_09_fifo_full -.sym 7944 w_rx_09_fifo_push -.sym 8037 sys_ctrl_ins.o_soft_reset_SB_DFFESS_Q_E -.sym 8047 o_shdn_rx_lna$SB_IO_OUT +.sym 7202 w_rx_24_fifo_data[26] +.sym 7203 w_rx_24_fifo_data[27] +.sym 7204 w_rx_24_fifo_data[28] +.sym 7205 w_rx_24_fifo_data[29] +.sym 7206 w_rx_24_fifo_data[30] +.sym 7207 w_rx_24_fifo_data[31] +.sym 7208 w_rx_24_fifo_data[24] +.sym 7209 w_rx_24_fifo_data[25] +.sym 7216 rx_24_fifo.wr_addr[7] +.sym 7217 w_rx_24_fifo_data[31] +.sym 7219 spi_if_ins.state_if[0] +.sym 7220 rx_24_fifo.wr_addr_gray[6] +.sym 7221 i_smi_a1_SB_LUT4_I1_O_SB_LUT4_O_I2_SB_LUT4_I0_O[2] +.sym 7226 w_rx_24_fifo_push +.sym 7274 rx_24_fifo.rd_addr_gray_SB_DFFESR_Q_3_D[1] +.sym 7275 rx_24_fifo.rd_addr_gray_SB_DFFESR_Q_3_D[2] +.sym 7276 rx_24_fifo.rd_addr_gray_SB_DFFESR_Q_7_D_SB_LUT4_I3_O_SB_LUT4_O_2_I0_SB_LUT4_O_1_I3[3] +.sym 7280 w_tx_data_smi[3] +.sym 7281 rx_24_fifo.rd_addr_gray_SB_DFFESR_Q_7_D_SB_LUT4_I3_O_SB_LUT4_O_2_I0[0] +.sym 7318 i_smi_a1_SB_LUT4_I1_O_SB_LUT4_O_I2_SB_LUT4_I0_O[2] +.sym 7330 rx_24_fifo.rd_addr_gray_SB_DFFESR_Q_7_D_SB_LUT4_I3_O_SB_LUT4_O_2_I0_SB_LUT4_O_1_I3[2] +.sym 7332 rx_24_fifo.rd_addr_gray_SB_LUT4_I2_O[4] +.sym 7336 rx_24_fifo.rd_addr_gray_wr_r[6] +.sym 7337 rx_24_fifo.rd_addr[4] +.sym 7339 rx_24_fifo.rd_addr_gray_SB_DFFESR_Q_3_D[2] +.sym 7377 rx_24_fifo.rd_addr_gray_wr[3] +.sym 7378 rx_24_fifo.rd_addr_gray_wr_r[6] +.sym 7383 lvds_rx_24_inst.r_push_SB_LUT4_I0_1_I1_SB_LUT4_O_2_I0[1] +.sym 7421 w_rx_24_fifo_full +.sym 7430 rx_24_fifo.rd_addr[3] +.sym 7431 rx_24_fifo.wr_addr[5] +.sym 7433 $PACKER_VCC_NET +.sym 7439 rx_24_fifo.wr_addr[0] +.sym 7479 rx_24_fifo.rd_addr_gray[5] +.sym 7482 rx_24_fifo.rd_addr[4] +.sym 7483 rx_24_fifo.rd_addr[2] +.sym 7484 rx_24_fifo.rd_addr[3] +.sym 7485 rx_24_fifo.rd_addr_gray[3] +.sym 7521 rx_24_fifo.rd_addr_gray_wr[6] +.sym 7531 rx_24_fifo.rd_addr_gray_wr_r[6] +.sym 7532 rx_24_fifo.wr_addr_gray[3] +.sym 7535 rx_24_fifo.rd_addr[2] +.sym 7537 rx_24_fifo.rd_addr[3] +.sym 7542 lvds_rx_24_inst.r_push_SB_LUT4_I0_1_I1_SB_LUT4_O_2_I0[1] +.sym 7543 rx_24_fifo.rd_addr_gray[5] +.sym 7580 rx_24_fifo.wr_addr[5] +.sym 7581 rx_24_fifo.wr_addr_gray[4] +.sym 7582 rx_24_fifo.wr_addr_gray[0] +.sym 7583 rx_24_fifo.wr_addr_gray[1] +.sym 7584 rx_24_fifo.wr_addr[0] +.sym 7585 rx_24_fifo.wr_addr_gray[5] +.sym 7586 rx_24_fifo.wr_addr_gray[3] +.sym 7587 rx_24_fifo.wr_addr_gray[2] +.sym 7632 i_smi_a1_SB_LUT4_I1_O_SB_LUT4_O_I2_SB_LUT4_I0_O[2] +.sym 7687 rx_24_fifo.rd_addr_gray_wr[5] +.sym 7723 i_smi_a3$SB_IO_IN +.sym 7725 rx_24_fifo.wr_addr_gray_SB_LUT4_I2_1_O[4] +.sym 7729 rx_24_fifo.wr_addr_gray_SB_LUT4_I2_1_O[5] +.sym 7730 rx_24_fifo.wr_addr_gray_SB_DFFESR_Q_6_D[2] +.sym 7731 rx_24_fifo.wr_addr_gray_SB_LUT4_I2_1_O[6] +.sym 7733 i_smi_a1_SB_LUT4_I1_O_SB_LUT4_O_I2_SB_LUT4_I0_O[2] +.sym 7734 rx_24_fifo.wr_addr_gray_SB_DFFESR_Q_6_D[1] +.sym 7742 rx_24_fifo.wr_addr_gray_SB_DFFESR_Q_7_D[1] +.sym 7744 rx_24_fifo.wr_addr_gray_SB_DFFESR_Q_7_D[2] +.sym 7832 i_smi_a1_SB_LUT4_I1_O_SB_LUT4_O_I2_SB_LUT4_I0_O[2] .sym 8088 i_smi_a3$SB_IO_IN .sym 8093 io_smi_data[6]$SB_IO_OUT -.sym 8113 io_smi_data[6]$SB_IO_OUT -.sym 8118 rx_09_fifo.rd_addr_gray_SB_DFFESR_Q_7_D_SB_LUT4_I3_O[1] -.sym 8119 rx_09_fifo.rd_addr_gray_SB_DFFESR_Q_7_D_SB_LUT4_I3_O_SB_LUT4_O_I3[3] -.sym 8120 rx_09_fifo.rd_addr_gray_SB_DFFESR_Q_6_D[1] -.sym 8121 rx_09_fifo.rd_addr_gray_SB_DFFESR_Q_5_D[0] -.sym 8122 rx_09_fifo.rd_addr_gray_SB_DFFESR_Q_7_D[3] -.sym 8123 rx_09_fifo.full_o_SB_DFFSR_Q_D_SB_LUT4_O_I0_SB_LUT4_O_1_I0[2] -.sym 8124 io_smi_data[7]$SB_IO_OUT -.sym 8125 rx_09_fifo.rd_addr_gray_SB_DFFESR_Q_6_D[3] -.sym 8130 w_rx_09_fifo_push -.sym 8149 rx_09_fifo.rd_addr_gray_wr_r[7] -.sym 8165 rx_09_fifo.rd_addr[7] -.sym 8173 io_pmod_SB_DFFSS_Q_D_SB_LUT4_O_I0_SB_LUT4_O_I0_SB_LUT4_O_1_I2[3] -.sym 8178 rx_09_fifo.rd_addr[0] -.sym 8179 io_pmod_SB_DFFSS_Q_D_SB_LUT4_O_I0_SB_LUT4_O_I0_SB_LUT4_O_2_I3[2] -.sym 8181 rx_09_fifo.rd_addr[3] -.sym 8183 io_pmod_SB_DFFSS_Q_D_SB_LUT4_O_I0_SB_LUT4_O_I0_SB_LUT4_O_2_I3[1] -.sym 8185 io_pmod_SB_DFFSS_Q_D_SB_LUT4_O_I0_SB_LUT4_O_I0_SB_LUT4_O_1_I2[1] -.sym 8188 rx_09_fifo.rd_addr[4] -.sym 8192 $nextpnr_ICESTORM_LC_6$O -.sym 8195 rx_09_fifo.rd_addr[0] -.sym 8198 rx_09_fifo.rd_addr_gray_SB_LUT4_I2_I3[2] -.sym 8201 io_pmod_SB_DFFSS_Q_D_SB_LUT4_O_I0_SB_LUT4_O_I0_SB_LUT4_O_2_I3[1] -.sym 8202 rx_09_fifo.rd_addr[0] -.sym 8204 rx_09_fifo.rd_addr_gray_SB_LUT4_I2_I3[3] -.sym 8206 io_pmod_SB_DFFSS_Q_D_SB_LUT4_O_I0_SB_LUT4_O_I0_SB_LUT4_O_2_I3[2] -.sym 8208 rx_09_fifo.rd_addr_gray_SB_LUT4_I2_I3[2] -.sym 8210 rx_09_fifo.rd_addr_gray_SB_LUT4_I2_I3[4] -.sym 8213 rx_09_fifo.rd_addr[3] -.sym 8214 rx_09_fifo.rd_addr_gray_SB_LUT4_I2_I3[3] -.sym 8216 rx_09_fifo.rd_addr_gray_SB_LUT4_I2_I3[5] -.sym 8218 rx_09_fifo.rd_addr[4] -.sym 8220 rx_09_fifo.rd_addr_gray_SB_LUT4_I2_I3[4] -.sym 8222 rx_09_fifo.rd_addr_gray_SB_LUT4_I2_I3[6] -.sym 8224 io_pmod_SB_DFFSS_Q_D_SB_LUT4_O_I0_SB_LUT4_O_I0_SB_LUT4_O_1_I2[1] -.sym 8226 rx_09_fifo.rd_addr_gray_SB_LUT4_I2_I3[5] -.sym 8228 rx_09_fifo.rd_addr_gray_SB_LUT4_I2_I3[7] -.sym 8231 io_pmod_SB_DFFSS_Q_D_SB_LUT4_O_I0_SB_LUT4_O_I0_SB_LUT4_O_1_I2[3] -.sym 8232 rx_09_fifo.rd_addr_gray_SB_LUT4_I2_I3[6] -.sym 8237 rx_09_fifo.rd_addr[7] -.sym 8238 rx_09_fifo.rd_addr_gray_SB_LUT4_I2_I3[7] -.sym 8246 rx_09_fifo.rd_addr_gray[0] -.sym 8247 rx_09_fifo.rd_addr_gray[3] -.sym 8248 rx_09_fifo.rd_addr[0] -.sym 8249 io_pmod_SB_DFFSS_Q_D_SB_LUT4_O_I0_SB_LUT4_O_I0_SB_LUT4_O_2_I3[2] -.sym 8250 rx_09_fifo.rd_addr[4] -.sym 8251 rx_09_fifo.rd_addr[3] -.sym 8252 rx_09_fifo.rd_addr_gray[4] -.sym 8253 io_pmod_SB_DFFSS_Q_D_SB_LUT4_O_I0_SB_LUT4_O_I0_SB_LUT4_O_2_I3[1] -.sym 8269 io_pmod_SB_DFFSS_Q_D_SB_LUT4_O_I0_SB_LUT4_O_I0_SB_LUT4_O_1_I2[1] -.sym 8276 rx_09_fifo.rd_addr_gray_wr_r[0] -.sym 8277 rx_09_fifo.rd_addr_gray_SB_LUT4_I2_O[7] -.sym 8283 io_smi_data[1]$SB_IO_OUT -.sym 8285 io_smi_data[2]$SB_IO_OUT -.sym 8298 rx_09_fifo.rd_addr_gray_wr_r[7] -.sym 8300 rx_09_fifo.rd_addr_gray_SB_DFFESR_Q_6_D[1] -.sym 8301 rx_09_fifo.wr_addr[0] -.sym 8310 rx_09_fifo.rd_addr_gray_SB_LUT4_I2_O[6] -.sym 8312 lvds_rx_09_inst.o_fifo_data[31] -.sym 8313 io_pmod_SB_DFFSS_Q_D_SB_LUT4_O_I0_SB_LUT4_O_I0_SB_LUT4_O_1_I2[3] -.sym 8326 rx_09_fifo.rd_addr_gray_SB_LUT4_I2_O[3] -.sym 8328 rx_09_fifo.rd_addr_gray_wr[0] -.sym 8334 rx_09_fifo.rd_addr[7] -.sym 8335 rx_09_fifo.rd_addr_gray_SB_DFFESR_Q_7_D_SB_LUT4_I3_O_SB_LUT4_O_I3[1] -.sym 8339 w_smi_data_output[7] -.sym 8343 i_smi_a3$SB_IO_IN -.sym 8345 rx_09_fifo.rd_addr_gray[4] -.sym 8347 rx_09_fifo.rd_addr_gray[0] -.sym 8351 rx_09_fifo.rd_addr_gray_wr[7] -.sym 8356 rx_09_fifo.rd_addr_gray[4] -.sym 8362 rx_09_fifo.rd_addr_gray_wr[0] -.sym 8368 i_smi_a3$SB_IO_IN -.sym 8370 w_smi_data_output[7] -.sym 8376 rx_09_fifo.rd_addr_gray_wr[7] -.sym 8382 rx_09_fifo.rd_addr[7] -.sym 8388 rx_09_fifo.rd_addr_gray[0] -.sym 8393 rx_09_fifo.rd_addr_gray_SB_LUT4_I2_O[3] -.sym 8395 rx_09_fifo.rd_addr_gray_SB_DFFESR_Q_7_D_SB_LUT4_I3_O_SB_LUT4_O_I3[1] -.sym 8403 lvds_clock_buf -.sym 8406 rx_09_fifo.wr_addr_gray_SB_LUT4_I2_1_O[1] -.sym 8407 rx_09_fifo.wr_addr_gray_SB_LUT4_I2_1_O[2] -.sym 8408 rx_09_fifo.full_o_SB_LUT4_I3_O[1] -.sym 8409 rx_09_fifo.full_o_SB_LUT4_I3_O[2] -.sym 8410 rx_09_fifo.wr_addr_gray_SB_LUT4_I2_1_O[5] -.sym 8411 rx_09_fifo.wr_addr_gray_SB_LUT4_I2_1_O[6] -.sym 8412 rx_09_fifo.wr_addr_gray_SB_LUT4_I2_1_O[7] -.sym 8417 rx_09_fifo.rd_addr[7] -.sym 8420 io_pmod_SB_DFFSS_Q_D_SB_LUT4_O_I0_SB_LUT4_O_I0_SB_LUT4_O_2_I3[2] -.sym 8428 rx_09_fifo.rd_addr[0] -.sym 8431 i_smi_a2_SB_LUT4_I1_O_SB_LUT4_I3_I2_SB_LUT4_O_I3[1] -.sym 8432 io_pmod_SB_DFFSS_Q_D_SB_LUT4_O_I0_SB_LUT4_O_I0_SB_LUT4_O_1_I2[3] -.sym 8435 lvds_rx_09_inst.r_push_SB_LUT4_I3_O -.sym 8438 rx_09_fifo.wr_addr[4] -.sym 8448 lvds_rx_09_inst.o_fifo_data[15] -.sym 8453 lvds_rx_09_inst.o_fifo_data[19] -.sym 8454 lvds_rx_09_inst.o_fifo_data[17] -.sym 8459 lvds_rx_09_inst.o_fifo_data[23] -.sym 8463 lvds_rx_09_inst.o_fifo_data[27] -.sym 8468 lvds_rx_09_inst.o_fifo_data[21] -.sym 8472 lvds_rx_09_inst.o_fifo_data[29] -.sym 8474 lvds_rx_09_inst.o_fifo_data[25] -.sym 8477 lvds_rx_09_inst.r_state_if_SB_LUT4_I2_O[0] -.sym 8479 lvds_rx_09_inst.r_state_if_SB_LUT4_I2_O[0] -.sym 8481 lvds_rx_09_inst.o_fifo_data[15] -.sym 8487 lvds_rx_09_inst.o_fifo_data[25] -.sym 8488 lvds_rx_09_inst.r_state_if_SB_LUT4_I2_O[0] +.sym 8115 io_smi_data[6]$SB_IO_OUT +.sym 8119 lvds_rx_09_inst.o_fifo_data[15] +.sym 8120 lvds_rx_09_inst.o_fifo_data[9] +.sym 8121 lvds_rx_09_inst.o_fifo_data[6] +.sym 8122 lvds_rx_09_inst.o_fifo_data[7] +.sym 8124 lvds_rx_09_inst.o_fifo_data[11] +.sym 8125 lvds_rx_09_inst.o_fifo_data[13] +.sym 8162 lvds_rx_09_inst.o_fifo_data[12] +.sym 8163 lvds_rx_09_inst.o_fifo_data[14] +.sym 8168 lvds_rx_09_inst.o_fifo_data[8] +.sym 8169 w_rx_09_fifo_pulled_data[27] +.sym 8171 w_rx_09_fifo_pulled_data[3] +.sym 8174 smi_ctrl_ins.o_smi_data_out_SB_DFFE_Q_D_SB_LUT4_O_I2_SB_LUT4_O_I3[3] +.sym 8175 smi_ctrl_ins.int_cnt_09[3] +.sym 8179 w_rx_09_fifo_pulled_data[11] +.sym 8180 w_rx_09_fifo_pulled_data[24] +.sym 8181 lvds_rx_09_inst.r_state_if_SB_LUT4_I2_O[0] +.sym 8183 w_rx_09_fifo_pulled_data[19] +.sym 8184 w_rx_09_fifo_pulled_data[8] +.sym 8186 smi_ctrl_ins.int_cnt_09_SB_DFFESR_Q_D_SB_LUT4_O_I3[1] +.sym 8187 lvds_rx_09_inst.o_fifo_data[6] +.sym 8191 lvds_rx_09_inst.o_fifo_data[10] +.sym 8193 lvds_rx_09_inst.o_fifo_data[6] +.sym 8194 lvds_rx_09_inst.r_state_if_SB_LUT4_I2_O[0] +.sym 8199 lvds_rx_09_inst.o_fifo_data[14] +.sym 8201 lvds_rx_09_inst.r_state_if_SB_LUT4_I2_O[0] +.sym 8205 lvds_rx_09_inst.o_fifo_data[10] +.sym 8206 lvds_rx_09_inst.r_state_if_SB_LUT4_I2_O[0] +.sym 8211 lvds_rx_09_inst.r_state_if_SB_LUT4_I2_O[0] +.sym 8214 lvds_rx_09_inst.o_fifo_data[12] +.sym 8217 smi_ctrl_ins.int_cnt_09[3] +.sym 8218 smi_ctrl_ins.o_smi_data_out_SB_DFFE_Q_D_SB_LUT4_O_I2_SB_LUT4_O_I3[3] +.sym 8219 w_rx_09_fifo_pulled_data[27] +.sym 8220 w_rx_09_fifo_pulled_data[11] +.sym 8223 smi_ctrl_ins.int_cnt_09_SB_DFFESR_Q_D_SB_LUT4_O_I3[1] +.sym 8224 smi_ctrl_ins.int_cnt_09[3] +.sym 8225 w_rx_09_fifo_pulled_data[8] +.sym 8226 w_rx_09_fifo_pulled_data[24] +.sym 8229 smi_ctrl_ins.int_cnt_09[3] +.sym 8230 w_rx_09_fifo_pulled_data[19] +.sym 8231 w_rx_09_fifo_pulled_data[3] +.sym 8232 smi_ctrl_ins.int_cnt_09_SB_DFFESR_Q_D_SB_LUT4_O_I3[1] +.sym 8235 lvds_rx_09_inst.r_state_if_SB_LUT4_I2_O[0] +.sym 8237 lvds_rx_09_inst.o_fifo_data[8] +.sym 8239 w_lvds_rx_09_d1_SB_LUT4_I0_O_SB_LUT4_I3_O_$glb_ce +.sym 8240 lvds_clock_buf +.sym 8241 i_smi_a1_SB_LUT4_I1_O_SB_LUT4_O_I2_SB_LUT4_I0_O[2]_$glb_sr +.sym 8246 io_smi_data[2]$SB_IO_OUT +.sym 8247 io_smi_data[1]$SB_IO_OUT +.sym 8248 smi_ctrl_ins.int_cnt_09_SB_DFFESR_Q_D_SB_LUT4_O_I3[1] +.sym 8249 smi_ctrl_ins.r_fifo_09_pull_SB_LUT4_I3_1_O +.sym 8251 io_smi_data[7]$SB_IO_OUT +.sym 8255 rx_09_fifo.rd_addr_gray_wr[4] +.sym 8260 $PACKER_VCC_NET +.sym 8262 $PACKER_VCC_NET +.sym 8263 rx_09_fifo.rd_addr_gray_wr[0] +.sym 8274 lvds_rx_09_inst.o_fifo_data[11] +.sym 8275 lvds_rx_09_inst.r_state_if_SB_LUT4_I2_O[0] +.sym 8277 io_smi_data[1]$SB_IO_OUT +.sym 8278 io_pmod[7]$SB_IO_IN +.sym 8292 io_smi_data[2]$SB_IO_OUT +.sym 8299 lvds_rx_09_inst.o_fifo_data[16] +.sym 8323 w_rx_09_fifo_pulled_data[2] +.sym 8324 smi_ctrl_ins.int_cnt_09[3] +.sym 8325 w_rx_09_fifo_pulled_data[10] +.sym 8328 smi_ctrl_ins.o_smi_data_out_SB_DFFE_Q_1_D_SB_LUT4_O_I1_SB_LUT4_O_I3[3] +.sym 8329 w_rx_09_fifo_pulled_data[14] +.sym 8330 w_rx_09_fifo_pulled_data[15] +.sym 8332 smi_ctrl_ins.int_cnt_09[3] +.sym 8333 w_rx_09_fifo_pulled_data[30] +.sym 8335 w_rx_09_fifo_pulled_data[31] +.sym 8336 w_rx_09_fifo_pulled_data[13] +.sym 8337 w_rx_09_fifo_pulled_data[26] +.sym 8338 smi_ctrl_ins.o_smi_data_out_SB_DFFE_Q_2_D_SB_LUT4_O_I1_SB_LUT4_O_I3[3] +.sym 8339 smi_ctrl_ins.o_smi_data_out_SB_DFFE_Q_5_D_SB_LUT4_O_I1_SB_LUT4_O_I3[3] +.sym 8341 w_rx_09_fifo_pulled_data[18] +.sym 8342 w_rx_09_fifo_pulled_data[29] +.sym 8344 w_rx_09_fifo_pulled_data[21] +.sym 8345 w_rx_09_fifo_pulled_data[22] +.sym 8346 w_rx_09_fifo_pulled_data[23] +.sym 8349 smi_ctrl_ins.int_cnt_09_SB_DFFESR_Q_D_SB_LUT4_O_I3[1] +.sym 8350 smi_ctrl_ins.o_smi_data_out_SB_DFFE_Q_D_SB_LUT4_O_I1_SB_LUT4_O_I3[3] +.sym 8352 w_rx_09_fifo_pulled_data[5] +.sym 8353 w_rx_09_fifo_pulled_data[6] +.sym 8354 w_rx_09_fifo_pulled_data[7] +.sym 8356 w_rx_09_fifo_pulled_data[2] +.sym 8357 smi_ctrl_ins.int_cnt_09[3] +.sym 8358 w_rx_09_fifo_pulled_data[18] +.sym 8359 smi_ctrl_ins.int_cnt_09_SB_DFFESR_Q_D_SB_LUT4_O_I3[1] +.sym 8362 w_rx_09_fifo_pulled_data[26] +.sym 8363 w_rx_09_fifo_pulled_data[10] +.sym 8364 smi_ctrl_ins.int_cnt_09[3] +.sym 8365 smi_ctrl_ins.o_smi_data_out_SB_DFFE_Q_5_D_SB_LUT4_O_I1_SB_LUT4_O_I3[3] +.sym 8368 w_rx_09_fifo_pulled_data[14] +.sym 8369 w_rx_09_fifo_pulled_data[30] +.sym 8370 smi_ctrl_ins.int_cnt_09[3] +.sym 8371 smi_ctrl_ins.o_smi_data_out_SB_DFFE_Q_1_D_SB_LUT4_O_I1_SB_LUT4_O_I3[3] +.sym 8374 smi_ctrl_ins.int_cnt_09_SB_DFFESR_Q_D_SB_LUT4_O_I3[1] +.sym 8375 smi_ctrl_ins.int_cnt_09[3] +.sym 8376 w_rx_09_fifo_pulled_data[23] +.sym 8377 w_rx_09_fifo_pulled_data[7] +.sym 8380 smi_ctrl_ins.o_smi_data_out_SB_DFFE_Q_D_SB_LUT4_O_I1_SB_LUT4_O_I3[3] +.sym 8381 w_rx_09_fifo_pulled_data[15] +.sym 8382 smi_ctrl_ins.int_cnt_09[3] +.sym 8383 w_rx_09_fifo_pulled_data[31] +.sym 8386 smi_ctrl_ins.int_cnt_09_SB_DFFESR_Q_D_SB_LUT4_O_I3[1] +.sym 8387 smi_ctrl_ins.int_cnt_09[3] +.sym 8388 w_rx_09_fifo_pulled_data[6] +.sym 8389 w_rx_09_fifo_pulled_data[22] +.sym 8392 w_rx_09_fifo_pulled_data[13] +.sym 8393 smi_ctrl_ins.int_cnt_09[3] +.sym 8394 smi_ctrl_ins.o_smi_data_out_SB_DFFE_Q_2_D_SB_LUT4_O_I1_SB_LUT4_O_I3[3] +.sym 8395 w_rx_09_fifo_pulled_data[29] +.sym 8398 smi_ctrl_ins.int_cnt_09_SB_DFFESR_Q_D_SB_LUT4_O_I3[1] +.sym 8399 smi_ctrl_ins.int_cnt_09[3] +.sym 8400 w_rx_09_fifo_pulled_data[21] +.sym 8401 w_rx_09_fifo_pulled_data[5] +.sym 8405 lvds_rx_09_inst.o_fifo_data[24] +.sym 8406 lvds_rx_09_inst.o_fifo_data[22] +.sym 8407 lvds_rx_09_inst.o_fifo_data[19] +.sym 8408 lvds_rx_09_inst.o_fifo_data[28] +.sym 8409 rx_09_fifo.wr_addr_gray_SB_DFFESR_Q_4_D[1] +.sym 8410 lvds_rx_09_inst.o_fifo_data[26] +.sym 8411 lvds_rx_09_inst.o_fifo_data[21] +.sym 8412 lvds_rx_09_inst.o_fifo_data[17] +.sym 8418 io_pmod[5]$SB_IO_IN +.sym 8419 w_rx_09_fifo_pulled_data[30] +.sym 8424 smi_ctrl_ins.int_cnt_09[3] +.sym 8426 w_smi_data_output[1] +.sym 8428 smi_ctrl_ins.int_cnt_09[4] +.sym 8429 rx_09_fifo.wr_addr[2] +.sym 8430 lvds_rx_09_inst.r_push_SB_LUT4_I3_O[0] +.sym 8437 rx_09_fifo.wr_addr[5] +.sym 8438 smi_ctrl_ins.int_cnt_09_SB_DFFESR_Q_D_SB_LUT4_O_I3[2] +.sym 8440 rx_09_fifo.rd_addr_gray_wr_r[0] +.sym 8447 lvds_rx_09_inst.o_fifo_data[25] +.sym 8453 lvds_rx_09_inst.o_fifo_data[18] +.sym 8462 lvds_rx_09_inst.o_fifo_data[23] +.sym 8465 lvds_rx_09_inst.o_fifo_data[16] +.sym 8468 lvds_rx_09_inst.o_fifo_data[27] +.sym 8471 lvds_rx_09_inst.r_state_if_SB_LUT4_I2_O[0] +.sym 8473 lvds_rx_09_inst.o_fifo_data[28] +.sym 8475 lvds_rx_09_inst.o_fifo_data[29] +.sym 8476 lvds_rx_09_inst.o_fifo_data[21] +.sym 8480 lvds_rx_09_inst.o_fifo_data[21] +.sym 8481 lvds_rx_09_inst.r_state_if_SB_LUT4_I2_O[0] +.sym 8486 lvds_rx_09_inst.r_state_if_SB_LUT4_I2_O[0] +.sym 8488 lvds_rx_09_inst.o_fifo_data[23] .sym 8491 lvds_rx_09_inst.r_state_if_SB_LUT4_I2_O[0] -.sym 8492 lvds_rx_09_inst.o_fifo_data[27] -.sym 8499 lvds_rx_09_inst.o_fifo_data[29] -.sym 8500 lvds_rx_09_inst.r_state_if_SB_LUT4_I2_O[0] +.sym 8493 lvds_rx_09_inst.o_fifo_data[28] +.sym 8498 lvds_rx_09_inst.r_state_if_SB_LUT4_I2_O[0] +.sym 8500 lvds_rx_09_inst.o_fifo_data[29] .sym 8503 lvds_rx_09_inst.r_state_if_SB_LUT4_I2_O[0] -.sym 8505 lvds_rx_09_inst.o_fifo_data[23] -.sym 8510 lvds_rx_09_inst.o_fifo_data[21] +.sym 8504 lvds_rx_09_inst.o_fifo_data[18] +.sym 8510 lvds_rx_09_inst.o_fifo_data[27] .sym 8512 lvds_rx_09_inst.r_state_if_SB_LUT4_I2_O[0] .sym 8515 lvds_rx_09_inst.r_state_if_SB_LUT4_I2_O[0] -.sym 8516 lvds_rx_09_inst.o_fifo_data[19] -.sym 8521 lvds_rx_09_inst.o_fifo_data[17] +.sym 8516 lvds_rx_09_inst.o_fifo_data[25] .sym 8522 lvds_rx_09_inst.r_state_if_SB_LUT4_I2_O[0] +.sym 8523 lvds_rx_09_inst.o_fifo_data[16] .sym 8525 w_lvds_rx_09_d1_SB_LUT4_I0_O_SB_LUT4_I3_O_$glb_ce .sym 8526 lvds_clock_buf -.sym 8527 i_smi_a1_SB_LUT4_I1_O[2]_$glb_sr +.sym 8527 i_smi_a1_SB_LUT4_I1_O_SB_LUT4_O_I2_SB_LUT4_I0_O[2]_$glb_sr .sym 8528 rx_09_fifo.wr_addr[0] -.sym 8529 rx_09_fifo.wr_addr_gray[4] -.sym 8530 rx_09_fifo.wr_addr[6] -.sym 8531 rx_09_fifo.wr_addr_gray[2] -.sym 8532 rx_09_fifo.wr_addr_gray[0] -.sym 8533 rx_09_fifo.wr_addr_gray[1] -.sym 8534 rx_09_fifo.wr_addr[3] -.sym 8535 rx_09_fifo.wr_addr[2] -.sym 8544 lvds_rx_09_inst.o_fifo_data[15] -.sym 8551 spi_if_ins.spi.r_rx_done_SB_DFFER_Q_D_SB_LUT4_I3_O -.sym 8552 rx_09_fifo.full_o_SB_LUT4_I3_O[0] -.sym 8553 rx_09_fifo.rd_addr_gray[2] -.sym 8554 rx_09_fifo.full_o_SB_LUT4_I3_O[1] -.sym 8556 rx_09_fifo.full_o_SB_LUT4_I3_O[2] -.sym 8558 io_pmod_SB_DFFSS_Q_D_SB_LUT4_O_I0_SB_LUT4_O_I0_SB_LUT4_O_1_I2[3] -.sym 8559 rx_09_fifo.rd_addr_gray_wr_r[0] -.sym 8561 rx_09_fifo.full_o_SB_DFFSR_Q_D_SB_LUT4_O_I0_SB_LUT4_O_I0[1] -.sym 8563 rx_09_fifo.rd_addr_gray_wr_r[2] -.sym 8570 i_smi_a2_SB_LUT4_I1_O_SB_LUT4_I3_I2_SB_LUT4_O_I3[1] -.sym 8574 smi_ctrl_ins.o_smi_data_out_SB_DFFE_Q_2_D_SB_LUT4_O_I1_SB_LUT4_O_I3[3] -.sym 8575 i_smi_a2_SB_LUT4_I1_O_SB_LUT4_I3_I2[1] -.sym 8576 rx_09_fifo.rd_addr_gray_SB_DFFESR_Q_7_D_SB_LUT4_I3_O_SB_LUT4_O_I3[2] -.sym 8578 rx_09_fifo.rd_addr_gray_SB_DFFESR_Q_6_D[1] -.sym 8580 rx_09_fifo.rd_addr_gray_SB_LUT4_I2_O[7] -.sym 8582 w_rx_09_fifo_pulled_data[29] -.sym 8584 rx_09_fifo.wr_addr_gray_SB_LUT4_I2_1_O[7] -.sym 8585 rx_09_fifo.rd_addr_gray_SB_LUT4_I2_O[6] -.sym 8587 smi_ctrl_ins.r_fifo_09_pull_SB_LUT4_I3_O -.sym 8588 w_rx_09_fifo_pulled_data[13] -.sym 8590 w_rx_09_fifo_pulled_data[21] -.sym 8591 w_rx_09_fifo_pulled_data[22] -.sym 8592 w_rx_09_fifo_full -.sym 8595 rx_09_fifo.rd_addr_gray_wr_r[7] -.sym 8596 i_smi_a2_SB_LUT4_I1_O_SB_LUT4_I3_I2_SB_LUT4_O_I3[1] -.sym 8598 w_rx_09_fifo_pulled_data[5] -.sym 8599 w_rx_09_fifo_pulled_data[6] -.sym 8600 w_rx_09_fifo_push -.sym 8602 rx_09_fifo.rd_addr_gray_SB_DFFESR_Q_6_D[1] -.sym 8608 w_rx_09_fifo_full -.sym 8609 rx_09_fifo.wr_addr_gray_SB_LUT4_I2_1_O[7] -.sym 8610 rx_09_fifo.rd_addr_gray_wr_r[7] -.sym 8611 w_rx_09_fifo_push -.sym 8615 rx_09_fifo.rd_addr_gray_SB_DFFESR_Q_7_D_SB_LUT4_I3_O_SB_LUT4_O_I3[2] -.sym 8620 w_rx_09_fifo_pulled_data[13] -.sym 8621 i_smi_a2_SB_LUT4_I1_O_SB_LUT4_I3_I2_SB_LUT4_O_I3[1] -.sym 8622 smi_ctrl_ins.o_smi_data_out_SB_DFFE_Q_2_D_SB_LUT4_O_I1_SB_LUT4_O_I3[3] -.sym 8623 w_rx_09_fifo_pulled_data[29] -.sym 8626 i_smi_a2_SB_LUT4_I1_O_SB_LUT4_I3_I2[1] -.sym 8627 i_smi_a2_SB_LUT4_I1_O_SB_LUT4_I3_I2_SB_LUT4_O_I3[1] -.sym 8628 w_rx_09_fifo_pulled_data[22] -.sym 8629 w_rx_09_fifo_pulled_data[6] -.sym 8632 w_rx_09_fifo_pulled_data[21] -.sym 8633 w_rx_09_fifo_pulled_data[5] -.sym 8634 i_smi_a2_SB_LUT4_I1_O_SB_LUT4_I3_I2_SB_LUT4_O_I3[1] -.sym 8635 i_smi_a2_SB_LUT4_I1_O_SB_LUT4_I3_I2[1] -.sym 8638 rx_09_fifo.rd_addr_gray_SB_LUT4_I2_O[7] -.sym 8640 rx_09_fifo.rd_addr_gray_SB_LUT4_I2_O[6] -.sym 8647 rx_09_fifo.rd_addr_gray_SB_LUT4_I2_O[6] -.sym 8648 smi_ctrl_ins.r_fifo_09_pull_SB_LUT4_I3_O -.sym 8649 r_counter[0]_$glb_clk -.sym 8650 i_smi_a1_SB_LUT4_I1_O[2]_$glb_sr -.sym 8651 rx_09_fifo.wr_addr[5] -.sym 8652 lvds_rx_09_inst.r_push_SB_LUT4_I3_O -.sym 8653 rx_09_fifo.full_o_SB_DFFSR_Q_D_SB_LUT4_O_I0_SB_LUT4_O_I0[0] -.sym 8654 rx_09_fifo.full_o_SB_LUT4_I3_O_SB_LUT4_I3_O[2] -.sym 8655 rx_09_fifo.wr_addr[4] -.sym 8657 rx_09_fifo.wr_addr[7] -.sym 8658 w_rx_09_fifo_full -.sym 8666 io_pmod[4]$SB_IO_IN -.sym 8675 w_rx_24_fifo_pull -.sym 8678 lvds_rx_09_inst.r_state_if_SB_LUT4_I2_O[0] -.sym 8682 rx_09_fifo.rd_addr_gray_wr_r[7] -.sym 8683 i_smi_a1_SB_LUT4_I1_O_SB_LUT4_I1_O[2] -.sym 8684 rx_24_fifo.rd_addr[7] -.sym 8685 rx_09_fifo.wr_addr[2] -.sym 8686 i_smi_soe_se$rename$0 -.sym 8695 rx_24_fifo.rd_addr[7] -.sym 8697 rx_09_fifo.rd_addr_gray_wr[6] -.sym 8698 rx_09_fifo.rd_addr_gray[6] -.sym 8700 rx_09_fifo.rd_addr_gray[1] -.sym 8703 i_smi_a2_SB_LUT4_I1_O_SB_LUT4_I3_I2_SB_LUT4_O_I3[1] -.sym 8704 smi_ctrl_ins.o_smi_data_out_SB_DFFE_Q_1_D_SB_LUT4_O_I1_SB_LUT4_O_I3[3] -.sym 8706 rx_09_fifo.rd_addr_gray_wr[2] -.sym 8713 rx_09_fifo.rd_addr_gray[2] -.sym 8714 w_rx_09_fifo_pulled_data[30] -.sym 8717 rx_09_fifo.rd_addr_gray_wr[1] -.sym 8722 w_rx_09_fifo_pulled_data[14] -.sym 8728 rx_09_fifo.rd_addr_gray_wr[6] -.sym 8733 rx_09_fifo.rd_addr_gray[1] -.sym 8737 rx_09_fifo.rd_addr_gray_wr[1] -.sym 8743 rx_09_fifo.rd_addr_gray_wr[2] -.sym 8749 w_rx_09_fifo_pulled_data[30] -.sym 8750 smi_ctrl_ins.o_smi_data_out_SB_DFFE_Q_1_D_SB_LUT4_O_I1_SB_LUT4_O_I3[3] -.sym 8751 i_smi_a2_SB_LUT4_I1_O_SB_LUT4_I3_I2_SB_LUT4_O_I3[1] -.sym 8752 w_rx_09_fifo_pulled_data[14] -.sym 8758 rx_09_fifo.rd_addr_gray[6] -.sym 8764 rx_09_fifo.rd_addr_gray[2] -.sym 8767 rx_24_fifo.rd_addr[7] -.sym 8772 lvds_clock_buf -.sym 8775 rx_09_fifo.full_o_SB_DFFSR_Q_D_SB_LUT4_O_I0_SB_LUT4_O_1_I1[1] -.sym 8776 rx_09_fifo.full_o_SB_DFFSR_Q_D_SB_LUT4_O_I0_SB_LUT4_O_1_I1[2] -.sym 8777 rx_09_fifo.full_o_SB_DFFSR_Q_D_SB_LUT4_O_I0_SB_LUT4_O_1_I0[1] -.sym 8778 rx_09_fifo.full_o_SB_DFFSR_Q_D_SB_LUT4_O_I0_SB_LUT4_O_1_I0[3] -.sym 8779 rx_09_fifo.full_o_SB_DFFSR_Q_D_SB_LUT4_O_I0_SB_LUT4_O_1_I1[5] -.sym 8780 rx_09_fifo.full_o_SB_DFFSR_Q_D_SB_LUT4_O_I0_SB_LUT4_O_1_I1[6] -.sym 8781 rx_09_fifo.full_o_SB_DFFSR_Q_D_SB_LUT4_O_I0_SB_LUT4_O_I2_SB_LUT4_O_I3[3] -.sym 8786 rx_09_fifo.rd_addr_gray_wr_r[6] -.sym 8788 rx_09_fifo.full_o_SB_DFFSR_Q_D_SB_LUT4_O_I0_SB_LUT4_O_I2_SB_LUT4_O_I3[0] -.sym 8791 w_rx_09_fifo_push -.sym 8792 rx_09_fifo.full_o_SB_DFFSR_Q_D_SB_LUT4_O_I0_SB_LUT4_O_I0[1] -.sym 8793 rx_09_fifo.wr_addr[5] -.sym 8794 rx_09_fifo.rd_addr_gray_wr_r[2] -.sym 8798 i_smi_a2_SB_LUT4_I1_O_SB_LUT4_I3_1_I2[1] -.sym 8802 i_smi_a2_SB_LUT4_I1_O_SB_LUT4_I3_1_O[3] -.sym 8806 i_smi_a2_SB_LUT4_I1_O[1] -.sym 8808 rx_24_fifo.rd_addr[6] -.sym 8817 smi_ctrl_ins.int_cnt_24_SB_DFFESR_Q_E -.sym 8819 smi_ctrl_ins.o_smi_data_out_SB_DFFE_Q_D_SB_LUT4_O_I1_SB_LUT4_O_1_I1[1] -.sym 8820 smi_ctrl_ins.int_cnt_24[5] -.sym 8824 w_rx_24_fifo_empty -.sym 8825 i_smi_a2_SB_LUT4_I1_O_SB_LUT4_I3_1_I2_SB_LUT4_O_I3[1] -.sym 8828 i_smi_a2_SB_LUT4_I1_O_SB_LUT4_I3_1_O[3] -.sym 8832 i_smi_a1_SB_LUT4_I1_O[2] -.sym 8833 i_smi_a2_SB_LUT4_I1_O_SB_LUT4_I3_1_I2_SB_LUT4_O_I3[1] -.sym 8834 i_smi_a1_SB_LUT4_I1_O_SB_LUT4_O_I2_SB_LUT4_I0_O[1] -.sym 8836 smi_ctrl_ins.o_smi_data_out_SB_DFFE_Q_D_SB_LUT4_O_I1_SB_LUT4_O_1_I1[2] -.sym 8837 smi_ctrl_ins.int_cnt_24[4] -.sym 8841 i_smi_a2_SB_LUT4_I1_O[1] -.sym 8843 i_smi_a1_SB_LUT4_I1_O_SB_LUT4_I1_O[2] -.sym 8844 i_smi_a1_SB_LUT4_I1_O_SB_LUT4_O_I2_SB_LUT4_I0_O[0] -.sym 8845 i_smi_a2_SB_LUT4_I1_O_SB_LUT4_I3_1_I2[1] -.sym 8846 i_smi_soe_se$rename$0 -.sym 8848 i_smi_a2_SB_LUT4_I1_O_SB_LUT4_I3_1_O[3] -.sym 8849 smi_ctrl_ins.o_smi_data_out_SB_DFFE_Q_D_SB_LUT4_O_I1_SB_LUT4_O_1_I1[2] -.sym 8850 smi_ctrl_ins.o_smi_data_out_SB_DFFE_Q_D_SB_LUT4_O_I1_SB_LUT4_O_1_I1[1] -.sym 8851 i_smi_a2_SB_LUT4_I1_O[1] -.sym 8856 smi_ctrl_ins.int_cnt_24[5] -.sym 8860 i_smi_soe_se$rename$0 -.sym 8862 i_smi_a2_SB_LUT4_I1_O_SB_LUT4_I3_1_I2_SB_LUT4_O_I3[1] -.sym 8863 i_smi_a1_SB_LUT4_I1_O_SB_LUT4_I1_O[2] -.sym 8869 i_smi_a2_SB_LUT4_I1_O_SB_LUT4_I3_1_I2_SB_LUT4_O_I3[1] -.sym 8872 i_smi_a1_SB_LUT4_I1_O_SB_LUT4_O_I2_SB_LUT4_I0_O[0] -.sym 8873 i_smi_a1_SB_LUT4_I1_O_SB_LUT4_O_I2_SB_LUT4_I0_O[1] -.sym 8875 i_smi_a1_SB_LUT4_I1_O[2] -.sym 8878 i_smi_a2_SB_LUT4_I1_O[1] -.sym 8879 i_smi_soe_se$rename$0 -.sym 8880 i_smi_a1_SB_LUT4_I1_O_SB_LUT4_I1_O[2] -.sym 8884 i_smi_soe_se$rename$0 -.sym 8885 i_smi_a2_SB_LUT4_I1_O_SB_LUT4_I3_1_I2[1] -.sym 8887 i_smi_a1_SB_LUT4_I1_O_SB_LUT4_I1_O[2] -.sym 8890 i_smi_a2_SB_LUT4_I1_O_SB_LUT4_I3_1_I2_SB_LUT4_O_I3[1] -.sym 8891 smi_ctrl_ins.int_cnt_24[4] -.sym 8892 smi_ctrl_ins.int_cnt_24[5] -.sym 8893 w_rx_24_fifo_empty -.sym 8894 smi_ctrl_ins.int_cnt_24_SB_DFFESR_Q_E +.sym 8529 rx_09_fifo.wr_addr[3] +.sym 8530 rx_09_fifo.wr_addr[5] +.sym 8531 rx_09_fifo.wr_addr_gray[3] +.sym 8532 rx_09_fifo.wr_addr[4] +.sym 8533 rx_09_fifo.full_o_SB_DFFSR_Q_D_SB_LUT4_O_I1_SB_LUT4_O_I0_SB_LUT4_O_1_I3[1] +.sym 8534 rx_09_fifo.wr_addr[2] +.sym 8535 rx_09_fifo.wr_addr[6] +.sym 8539 rx_24_fifo.rd_addr[0] +.sym 8543 $PACKER_VCC_NET +.sym 8546 io_pmod_SB_DFFSS_Q_D_SB_LUT4_O_I0_SB_LUT4_O_I2[1] +.sym 8548 $PACKER_VCC_NET +.sym 8552 rx_09_fifo.wr_addr[7] +.sym 8553 i_smi_a1_SB_LUT4_I1_O[2] +.sym 8557 lvds_rx_09_inst.r_state_if_SB_LUT4_I2_O[0] +.sym 8558 i_smi_a2_SB_LUT4_I1_O_SB_LUT4_O_I3[5] +.sym 8571 $PACKER_VCC_NET +.sym 8573 rx_09_fifo.rd_addr_gray_wr[0] +.sym 8579 $PACKER_VCC_NET +.sym 8589 smi_ctrl_ins.int_cnt_09[5] +.sym 8590 rx_09_fifo.rd_addr_gray_wr[7] +.sym 8592 smi_ctrl_ins.int_cnt_09[3] +.sym 8594 smi_ctrl_ins.int_cnt_09[4] +.sym 8596 io_pmod_SB_DFFSS_Q_D_SB_LUT4_O_I0_SB_LUT4_O_I0[1] +.sym 8601 $nextpnr_ICESTORM_LC_11$O +.sym 8603 smi_ctrl_ins.int_cnt_09[3] +.sym 8607 smi_ctrl_ins.int_cnt_09_SB_DFFESR_Q_D_SB_LUT4_O_I3_SB_LUT4_O_I3[2] +.sym 8609 smi_ctrl_ins.int_cnt_09[4] +.sym 8610 $PACKER_VCC_NET +.sym 8614 smi_ctrl_ins.int_cnt_09[5] +.sym 8616 $PACKER_VCC_NET +.sym 8617 smi_ctrl_ins.int_cnt_09_SB_DFFESR_Q_D_SB_LUT4_O_I3_SB_LUT4_O_I3[2] +.sym 8623 rx_09_fifo.rd_addr_gray_wr[0] +.sym 8633 io_pmod_SB_DFFSS_Q_D_SB_LUT4_O_I0_SB_LUT4_O_I0[1] +.sym 8641 rx_09_fifo.rd_addr_gray_wr[7] +.sym 8649 lvds_clock_buf +.sym 8652 lvds_rx_09_inst.r_push_SB_LUT4_I3_O_SB_LUT4_O_I3[1] +.sym 8653 lvds_rx_09_inst.r_push_SB_LUT4_I3_O_SB_LUT4_O_I3[2] +.sym 8654 lvds_rx_09_inst.r_push_SB_LUT4_I3_O_SB_LUT4_O_I3[3] +.sym 8655 lvds_rx_09_inst.r_push_SB_LUT4_I3_O_SB_LUT4_O_I3[4] +.sym 8656 lvds_rx_09_inst.r_push_SB_LUT4_I3_O_SB_LUT4_O_I3[5] +.sym 8657 lvds_rx_09_inst.r_push_SB_LUT4_I3_O[1] +.sym 8658 $io_pmod[4]$iobuf_i +.sym 8665 $PACKER_VCC_NET +.sym 8666 rx_09_fifo.rd_addr[3] +.sym 8667 io_pmod_SB_DFFSS_Q_D_SB_LUT4_O_I0_SB_LUT4_O_2_I0[2] +.sym 8670 rx_09_fifo.wr_addr[0] +.sym 8671 rx_09_fifo.rd_addr_gray_wr_r[0] +.sym 8672 rx_09_fifo.wr_addr[3] +.sym 8675 rx_24_fifo.rd_addr[0] +.sym 8677 rx_24_fifo.rd_addr[6] +.sym 8679 i_smi_soe_se$rename$0 +.sym 8680 io_pmod[2]$SB_IO_IN +.sym 8684 spi_if_ins.state_if_SB_DFFE_Q_E +.sym 8685 rx_24_fifo.rd_addr[5] +.sym 8692 rx_09_fifo.wr_addr[0] +.sym 8695 rx_09_fifo.rd_addr_gray_wr_r[0] +.sym 8696 smi_ctrl_ins.int_cnt_09[4] +.sym 8697 rx_09_fifo.full_o_SB_DFFSR_Q_D_SB_LUT4_O_I1_SB_LUT4_O_I0_SB_LUT4_O_1_I3[1] +.sym 8701 smi_ctrl_ins.int_cnt_09[5] +.sym 8703 i_smi_a2_SB_LUT4_I1_O_SB_LUT4_O_I3_SB_CARRY_CO_I1[5] +.sym 8704 i_smi_a2_SB_LUT4_I1_O[1] +.sym 8719 smi_ctrl_ins.r_fifo_09_pull_SB_DFFESR_Q_E +.sym 8722 i_smi_a2_SB_LUT4_I1_O_SB_LUT4_O_I3_SB_CARRY_CO_I1[4] +.sym 8724 $nextpnr_ICESTORM_LC_19$O +.sym 8726 i_smi_a2_SB_LUT4_I1_O_SB_LUT4_O_I3_SB_CARRY_CO_I1[4] +.sym 8730 $nextpnr_ICESTORM_LC_20$I3 +.sym 8732 i_smi_a2_SB_LUT4_I1_O_SB_LUT4_O_I3_SB_CARRY_CO_I1[5] +.sym 8740 $nextpnr_ICESTORM_LC_20$I3 +.sym 8744 smi_ctrl_ins.int_cnt_09[5] +.sym 8752 i_smi_a2_SB_LUT4_I1_O[1] +.sym 8763 smi_ctrl_ins.int_cnt_09[4] +.sym 8767 rx_09_fifo.full_o_SB_DFFSR_Q_D_SB_LUT4_O_I1_SB_LUT4_O_I0_SB_LUT4_O_1_I3[1] +.sym 8768 rx_09_fifo.wr_addr[0] +.sym 8769 rx_09_fifo.rd_addr_gray_wr_r[0] +.sym 8771 smi_ctrl_ins.r_fifo_09_pull_SB_DFFESR_Q_E +.sym 8772 r_counter[0]_$glb_clk +.sym 8773 i_smi_a1_SB_LUT4_I1_O_SB_LUT4_O_I2_SB_LUT4_I0_O[2]_$glb_sr +.sym 8774 smi_ctrl_ins.int_cnt_09_SB_DFFESR_Q_E_SB_LUT4_O_I1[0] +.sym 8775 i_smi_a2_SB_LUT4_I1_O[0] +.sym 8776 lvds_rx_09_inst.r_state_if_SB_LUT4_I2_O[0] +.sym 8777 rx_09_fifo.full_o_SB_DFFSR_Q_D_SB_LUT4_O_I1_SB_LUT4_O_I0[3] +.sym 8778 rx_09_fifo.full_o_SB_DFFSR_Q_D_SB_LUT4_O_I1_SB_LUT4_O_I0[2] +.sym 8779 rx_09_fifo.full_o_SB_DFFSR_Q_D_SB_LUT4_O_I1_SB_LUT4_O_I0[0] +.sym 8780 rx_09_fifo.full_o_SB_DFFSR_Q_D_SB_LUT4_O_I1[1] +.sym 8781 w_rx_09_fifo_push +.sym 8787 $PACKER_VCC_NET +.sym 8789 $PACKER_VCC_NET +.sym 8791 $io_pmod[4]$iobuf_i +.sym 8792 $PACKER_VCC_NET +.sym 8796 w_rx_09_fifo_pull +.sym 8797 $PACKER_VCC_NET +.sym 8799 spi_if_ins.o_load_cmd_SB_DFFESR_Q_D_SB_LUT4_I1_O[0] +.sym 8801 rx_24_fifo.rd_addr[2] +.sym 8808 lvds_rx_09_inst.r_push_SB_DFFNESR_Q_E +.sym 8815 $PACKER_VCC_NET +.sym 8818 i_smi_a2_SB_LUT4_I1_O_SB_LUT4_O_I3[3] +.sym 8819 i_smi_a2_SB_LUT4_I1_O[1] +.sym 8821 smi_ctrl_ins.int_cnt_09_SB_DFFESR_Q_E_SB_LUT4_O_I1[1] +.sym 8822 i_smi_a1_SB_LUT4_I1_O_SB_LUT4_O_I2_SB_LUT4_I0_O[2] +.sym 8823 i_smi_a1_SB_LUT4_I1_O[2] +.sym 8826 i_smi_a2_SB_LUT4_I1_O_SB_LUT4_O_I3_SB_CARRY_CO_I1[5] +.sym 8827 i_smi_a2_SB_LUT4_I1_O[3] +.sym 8828 spi_if_ins.r_tx_data_valid_SB_DFFESR_Q_D[0] +.sym 8829 i_smi_a2_SB_LUT4_I1_O_SB_LUT4_O_I3_SB_CARRY_CO_I1[4] +.sym 8833 spi_if_ins.state_if_SB_DFFE_Q_E +.sym 8836 spi_if_ins.state_if_SB_DFFESR_Q_D[2] +.sym 8839 i_smi_soe_se$rename$0 +.sym 8840 i_smi_a2_SB_LUT4_I1_O[0] +.sym 8844 smi_ctrl_ins.r_fifo_24_pull_SB_LUT4_I1_O[2] +.sym 8847 $nextpnr_ICESTORM_LC_1$O +.sym 8849 i_smi_a2_SB_LUT4_I1_O_SB_LUT4_O_I3[3] +.sym 8853 i_smi_a2_SB_LUT4_I1_O_SB_LUT4_O_I3[4] +.sym 8856 i_smi_a2_SB_LUT4_I1_O_SB_LUT4_O_I3_SB_CARRY_CO_I1[4] +.sym 8859 $nextpnr_ICESTORM_LC_2$I3 +.sym 8862 i_smi_a2_SB_LUT4_I1_O_SB_LUT4_O_I3_SB_CARRY_CO_I1[5] +.sym 8865 $nextpnr_ICESTORM_LC_2$COUT +.sym 8867 $PACKER_VCC_NET +.sym 8869 $nextpnr_ICESTORM_LC_2$I3 +.sym 8873 i_smi_soe_se$rename$0 +.sym 8874 smi_ctrl_ins.r_fifo_24_pull_SB_LUT4_I1_O[2] +.sym 8875 $nextpnr_ICESTORM_LC_2$COUT +.sym 8878 i_smi_a1_SB_LUT4_I1_O_SB_LUT4_O_I2_SB_LUT4_I0_O[2] +.sym 8881 smi_ctrl_ins.int_cnt_09_SB_DFFESR_Q_E_SB_LUT4_O_I1[1] +.sym 8884 i_smi_a2_SB_LUT4_I1_O[0] +.sym 8885 i_smi_a2_SB_LUT4_I1_O[3] +.sym 8886 i_smi_a2_SB_LUT4_I1_O[1] +.sym 8887 i_smi_a1_SB_LUT4_I1_O[2] +.sym 8892 spi_if_ins.state_if_SB_DFFESR_Q_D[2] +.sym 8894 spi_if_ins.state_if_SB_DFFE_Q_E .sym 8895 r_counter[0]_$glb_clk -.sym 8896 i_smi_a1_SB_LUT4_I1_O[2]_$glb_sr -.sym 8899 i_smi_a2_SB_LUT4_I1_O[1] -.sym 8900 rx_24_fifo.rd_addr[6] -.sym 8901 rx_24_fifo.rd_addr[7] -.sym 8902 rx_24_fifo.rd_addr[0] -.sym 8903 i_smi_a2_SB_LUT4_I1_O_SB_LUT4_I3_1_I2[1] -.sym 8913 smi_ctrl_ins.int_cnt_24_SB_DFFESR_Q_E -.sym 8915 io_pmod[7]$SB_IO_IN -.sym 8918 lvds_rx_09_inst.r_state_if_SB_LUT4_I2_O[0] -.sym 8920 w_rx_24_fifo_empty -.sym 8922 i_smi_a2_SB_LUT4_I1_O_SB_LUT4_I3_1_I2_SB_LUT4_O_I3[1] -.sym 8926 i_smi_a2_SB_LUT4_I1_O_SB_LUT4_I3_1_I2[1] -.sym 8927 w_rx_09_fifo_data[1] -.sym 8931 w_rx_24_fifo_pull -.sym 8932 i_smi_a1_SB_LUT4_I1_O_SB_LUT4_O_I2_SB_LUT4_I0_O_SB_LUT4_O_I1[1] -.sym 8938 lvds_rx_09_inst.o_fifo_data[6] -.sym 8940 i_smi_a2_SB_LUT4_I1_O_SB_LUT4_I3_1_I2_SB_LUT4_O_I3[1] -.sym 8941 w_rx_24_fifo_pulled_data[3] -.sym 8945 w_rx_09_fifo_data[1] -.sym 8948 i_smi_a2_SB_LUT4_I1_O_SB_LUT4_I3_1_I2_SB_LUT4_O_I3[1] -.sym 8950 io_pmod[6]$SB_IO_IN -.sym 8953 w_rx_24_fifo_pulled_data[7] -.sym 8954 lvds_rx_09_inst.o_fifo_data[13] -.sym 8958 io_pmod[7]$SB_IO_IN -.sym 8961 lvds_rx_09_inst.r_state_if_SB_LUT4_I2_O[0] -.sym 8965 w_rx_24_fifo_pulled_data[11] -.sym 8968 i_smi_a2_SB_LUT4_I1_O_SB_LUT4_I3_1_I2[1] -.sym 8969 w_rx_24_fifo_pulled_data[15] -.sym 8972 lvds_rx_09_inst.r_state_if_SB_LUT4_I2_O[0] -.sym 8974 io_pmod[6]$SB_IO_IN -.sym 8977 lvds_rx_09_inst.r_state_if_SB_LUT4_I2_O[0] -.sym 8980 lvds_rx_09_inst.o_fifo_data[13] -.sym 8985 io_pmod[7]$SB_IO_IN -.sym 8986 lvds_rx_09_inst.r_state_if_SB_LUT4_I2_O[0] -.sym 8995 w_rx_24_fifo_pulled_data[15] -.sym 8996 i_smi_a2_SB_LUT4_I1_O_SB_LUT4_I3_1_I2_SB_LUT4_O_I3[1] -.sym 8997 w_rx_24_fifo_pulled_data[7] -.sym 8998 i_smi_a2_SB_LUT4_I1_O_SB_LUT4_I3_1_I2[1] -.sym 9002 lvds_rx_09_inst.o_fifo_data[6] -.sym 9003 lvds_rx_09_inst.r_state_if_SB_LUT4_I2_O[0] -.sym 9007 w_rx_24_fifo_pulled_data[11] -.sym 9008 i_smi_a2_SB_LUT4_I1_O_SB_LUT4_I3_1_I2[1] -.sym 9009 i_smi_a2_SB_LUT4_I1_O_SB_LUT4_I3_1_I2_SB_LUT4_O_I3[1] -.sym 9010 w_rx_24_fifo_pulled_data[3] -.sym 9013 lvds_rx_09_inst.r_state_if_SB_LUT4_I2_O[0] -.sym 9015 w_rx_09_fifo_data[1] -.sym 9017 w_lvds_rx_09_d1_SB_LUT4_I0_O_SB_LUT4_I3_O_$glb_ce -.sym 9018 lvds_clock_buf -.sym 9019 i_smi_a1_SB_LUT4_I1_O[2]_$glb_sr -.sym 9021 rx_24_fifo.rd_addr_gray_SB_LUT4_I2_O[1] -.sym 9022 rx_24_fifo.rd_addr_gray_SB_LUT4_I2_O[2] -.sym 9023 rx_24_fifo.rd_addr_gray_SB_LUT4_I2_O[3] -.sym 9024 rx_24_fifo.empty_o_SB_DFFSS_Q_D_SB_LUT4_O_I0_SB_LUT4_O_I0[1] -.sym 9025 rx_24_fifo.empty_o_SB_DFFSS_Q_D_SB_LUT4_O_I0_SB_LUT4_O_I0[3] -.sym 9026 rx_24_fifo.rd_addr_gray_SB_LUT4_I2_O[6] -.sym 9027 rx_24_fifo.rd_addr_gray_SB_LUT4_I2_O[7] -.sym 9031 w_rx_09_fifo_push -.sym 9044 io_pmod[7]$SB_IO_IN -.sym 9046 rx_24_fifo.rd_addr[6] -.sym 9048 rx_24_fifo.rd_addr[7] -.sym 9050 rx_24_fifo.rd_addr[0] -.sym 9053 w_rx_09_fifo_push -.sym 9055 $io_pmod[5]$iobuf_i -.sym 9063 smi_ctrl_ins.o_smi_data_out_SB_DFFE_Q_4_D_SB_LUT4_O_I1_SB_LUT4_O_1_I1[2] -.sym 9065 rx_24_fifo.rd_addr[7] -.sym 9066 rx_24_fifo.wr_addr_gray_rd[7] -.sym 9067 i_smi_a2_SB_LUT4_I1_O_SB_LUT4_I3_1_I2[1] -.sym 9069 w_rx_24_fifo_pulled_data[8] -.sym 9071 i_smi_a2_SB_LUT4_I1_O[1] -.sym 9074 rx_24_fifo.rd_addr[0] -.sym 9075 smi_ctrl_ins.o_smi_data_out_SB_DFFE_Q_4_D_SB_LUT4_O_I1_SB_LUT4_O_1_I1[1] -.sym 9077 i_smi_a2_SB_LUT4_I1_O[0] -.sym 9079 smi_ctrl_ins.o_smi_data_out_SB_DFFE_Q_7_D_SB_LUT4_O_I0_SB_LUT4_O_I3[3] -.sym 9082 i_smi_a2_SB_LUT4_I1_O_SB_LUT4_I3_1_I2_SB_LUT4_O_I3[1] -.sym 9083 i_smi_a2_SB_LUT4_I1_O_SB_LUT4_I3_1_O[3] -.sym 9085 w_rx_24_fifo_pulled_data[16] -.sym 9086 w_rx_24_fifo_pulled_data[24] -.sym 9087 rx_24_fifo.wr_addr[7] -.sym 9094 smi_ctrl_ins.o_smi_data_out_SB_DFFE_Q_4_D_SB_LUT4_O_I1_SB_LUT4_O_1_I1[2] -.sym 9095 smi_ctrl_ins.o_smi_data_out_SB_DFFE_Q_4_D_SB_LUT4_O_I1_SB_LUT4_O_1_I1[1] -.sym 9096 i_smi_a2_SB_LUT4_I1_O_SB_LUT4_I3_1_O[3] -.sym 9097 i_smi_a2_SB_LUT4_I1_O[1] -.sym 9102 rx_24_fifo.wr_addr_gray_rd[7] -.sym 9106 i_smi_a2_SB_LUT4_I1_O_SB_LUT4_I3_1_I2[1] -.sym 9107 i_smi_a2_SB_LUT4_I1_O_SB_LUT4_I3_1_I2_SB_LUT4_O_I3[1] -.sym 9108 i_smi_a2_SB_LUT4_I1_O[0] -.sym 9109 w_rx_24_fifo_pulled_data[16] -.sym 9120 rx_24_fifo.rd_addr[7] -.sym 9126 rx_24_fifo.wr_addr[7] -.sym 9130 w_rx_24_fifo_pulled_data[24] -.sym 9131 w_rx_24_fifo_pulled_data[8] -.sym 9132 smi_ctrl_ins.o_smi_data_out_SB_DFFE_Q_7_D_SB_LUT4_O_I0_SB_LUT4_O_I3[3] -.sym 9133 i_smi_a2_SB_LUT4_I1_O_SB_LUT4_I3_1_I2_SB_LUT4_O_I3[1] -.sym 9139 rx_24_fifo.rd_addr[0] +.sym 8896 spi_if_ins.r_tx_data_valid_SB_DFFESR_Q_D[0] +.sym 8897 spi_if_ins.state_if_SB_DFFESR_Q_D[0] +.sym 8899 spi_if_ins.state_if_SB_DFFE_Q_E +.sym 8901 spi_if_ins.state_if_SB_DFFE_Q_E +.sym 8902 spi_if_ins.state_if_SB_DFFESR_Q_D[2] +.sym 8904 spi_if_ins.state_if[1] +.sym 8912 smi_ctrl_ins.int_cnt_09[5] +.sym 8918 smi_ctrl_ins.int_cnt_09[3] +.sym 8920 smi_ctrl_ins.int_cnt_09[4] +.sym 8921 rx_24_fifo.rd_addr[1] +.sym 8923 rx_24_fifo.rd_addr_gray_SB_LUT4_I2_O[1] +.sym 8925 w_rx_24_fifo_pull +.sym 8927 rx_24_fifo.rd_addr_gray[2] +.sym 8928 smi_ctrl_ins.r_fifo_09_pull_SB_DFFESR_Q_E +.sym 8929 rx_24_fifo.rd_addr[0] +.sym 8930 spi_if_ins.state_if_SB_DFFESR_Q_D[0] +.sym 8931 rx_24_fifo.rd_addr_gray_SB_LUT4_I2_O[5] +.sym 8932 spi_if_ins.o_load_cmd_SB_DFFESR_Q_D[1] +.sym 8949 rx_24_fifo.rd_addr_gray_SB_LUT4_I2_O[1] +.sym 8954 rx_24_fifo.rd_addr[0] +.sym 8956 smi_ctrl_ins.r_fifo_24_pull_SB_LUT4_I3_1_O +.sym 8957 rx_24_fifo.rd_addr_gray_SB_LUT4_I2_O[5] +.sym 8958 rx_24_fifo.rd_addr_gray_SB_DFFESR_Q_7_D_SB_LUT4_I3_O_SB_LUT4_O_2_I0_SB_LUT4_O_1_I3[1] +.sym 8960 rx_24_fifo.rd_addr_gray_SB_DFFESR_Q_7_D_SB_LUT4_I3_O_SB_LUT4_O_2_I0_SB_LUT4_O_1_I3[2] +.sym 8964 smi_ctrl_ins.int_cnt_09[3] +.sym 8966 rx_24_fifo.rd_addr_gray_SB_LUT4_I2_O[6] +.sym 8968 rx_24_fifo.rd_addr_gray_SB_LUT4_I2_O[7] +.sym 8971 rx_24_fifo.rd_addr[0] +.sym 8979 rx_24_fifo.rd_addr_gray_SB_LUT4_I2_O[6] +.sym 8991 smi_ctrl_ins.int_cnt_09[3] +.sym 8995 rx_24_fifo.rd_addr_gray_SB_LUT4_I2_O[1] +.sym 9003 rx_24_fifo.rd_addr_gray_SB_LUT4_I2_O[5] +.sym 9008 rx_24_fifo.rd_addr_gray_SB_LUT4_I2_O[7] +.sym 9014 rx_24_fifo.rd_addr_gray_SB_DFFESR_Q_7_D_SB_LUT4_I3_O_SB_LUT4_O_2_I0_SB_LUT4_O_1_I3[2] +.sym 9016 rx_24_fifo.rd_addr_gray_SB_DFFESR_Q_7_D_SB_LUT4_I3_O_SB_LUT4_O_2_I0_SB_LUT4_O_1_I3[1] +.sym 9017 smi_ctrl_ins.r_fifo_24_pull_SB_LUT4_I3_1_O +.sym 9018 r_counter[0]_$glb_clk +.sym 9019 i_smi_a1_SB_LUT4_I1_O_SB_LUT4_O_I2_SB_LUT4_I0_O[2]_$glb_sr +.sym 9020 w_fetch +.sym 9021 rx_24_fifo.rd_addr_gray_SB_DFFESR_Q_7_D_SB_LUT4_I3_O_SB_LUT4_O_I0[3] +.sym 9022 smi_ctrl_ins.r_fifo_24_pull_SB_LUT4_I3_1_O +.sym 9023 rx_24_fifo.rd_addr_gray_SB_DFFESR_Q_7_D_SB_LUT4_I3_O_SB_LUT4_O_2_I0[2] +.sym 9024 smi_ctrl_ins.r_fifo_24_pull_SB_LUT4_I3_1_O +.sym 9026 rx_24_fifo.rd_addr_gray_SB_DFFESR_Q_7_D_SB_LUT4_I3_O[0] +.sym 9027 rx_24_fifo.rd_addr_gray_SB_DFFESR_Q_7_D_SB_LUT4_I3_O_SB_LUT4_O_I0[0] +.sym 9045 smi_ctrl_ins.r_fifo_24_pull_SB_LUT4_I3_1_O +.sym 9046 smi_ctrl_ins.o_data_out_SB_DFFESS_Q_E +.sym 9050 rx_24_fifo.rd_addr_gray_SB_DFFESR_Q_7_D_SB_LUT4_I3_O_SB_LUT4_O_2_I0_SB_LUT4_O_1_I3[0] +.sym 9053 rx_24_fifo.rd_addr[7] +.sym 9054 rx_24_fifo.rd_addr_gray_SB_DFFESR_Q_7_D_SB_LUT4_I3_O_SB_LUT4_O_I0_SB_LUT4_O_2_I0[2] +.sym 9062 rx_24_fifo.wr_addr_gray[6] +.sym 9065 rx_24_fifo.wr_addr_gray_rd[6] +.sym 9068 rx_24_fifo.wr_addr[7] +.sym 9070 rx_24_fifo.rd_addr[4] +.sym 9071 rx_24_fifo.rd_addr[2] +.sym 9072 rx_24_fifo.wr_addr_gray_rd[7] +.sym 9073 rx_24_fifo.rd_addr[3] +.sym 9075 rx_24_fifo.wr_addr_gray_rd[3] +.sym 9076 rx_24_fifo.rd_addr_gray_SB_DFFESR_Q_7_D_SB_LUT4_I3_O_SB_LUT4_O_2_I0_SB_LUT4_O_1_I3[0] +.sym 9081 rx_24_fifo.wr_addr_gray[3] +.sym 9084 rx_24_fifo.rd_addr_gray_SB_DFFESR_Q_7_D_SB_LUT4_I3_O_SB_LUT4_O_I0_SB_LUT4_O_2_I0[0] +.sym 9086 rx_24_fifo.rd_addr_gray_SB_DFFESR_Q_7_D_SB_LUT4_I3_O_SB_LUT4_O_I0_SB_LUT4_O_2_I0[2] +.sym 9094 rx_24_fifo.rd_addr_gray_SB_DFFESR_Q_7_D_SB_LUT4_I3_O_SB_LUT4_O_I0_SB_LUT4_O_2_I0[2] +.sym 9095 rx_24_fifo.rd_addr_gray_SB_DFFESR_Q_7_D_SB_LUT4_I3_O_SB_LUT4_O_I0_SB_LUT4_O_2_I0[0] +.sym 9096 rx_24_fifo.rd_addr[4] +.sym 9097 rx_24_fifo.rd_addr[3] +.sym 9102 rx_24_fifo.wr_addr_gray_rd[3] +.sym 9106 rx_24_fifo.wr_addr_gray_rd[6] +.sym 9114 rx_24_fifo.wr_addr[7] +.sym 9119 rx_24_fifo.wr_addr_gray[6] +.sym 9127 rx_24_fifo.wr_addr_gray_rd[7] +.sym 9132 rx_24_fifo.wr_addr_gray[3] +.sym 9136 rx_24_fifo.rd_addr[2] +.sym 9139 rx_24_fifo.rd_addr_gray_SB_DFFESR_Q_7_D_SB_LUT4_I3_O_SB_LUT4_O_2_I0_SB_LUT4_O_1_I3[0] .sym 9141 r_counter[0]_$glb_clk -.sym 9143 rx_24_fifo.rd_addr_gray[5] -.sym 9144 rx_24_fifo.rd_addr_gray[6] -.sym 9145 rx_24_fifo.rd_addr_gray_SB_DFFESR_Q_5_D[1] -.sym 9146 rx_24_fifo.rd_addr_gray[4] -.sym 9147 rx_24_fifo.rd_addr_gray_SB_DFFESR_Q_7_D[1] -.sym 9148 rx_24_fifo.rd_addr_gray_SB_DFFESR_Q_7_D[3] -.sym 9149 rx_24_fifo.empty_o_SB_LUT4_I3_O_SB_LUT4_O_I0[1] -.sym 9150 rx_24_fifo.rd_addr_gray[3] -.sym 9167 w_rx_09_fifo_data[0] -.sym 9174 lvds_rx_09_inst.r_state_if_SB_LUT4_I2_O[0] -.sym 9185 rx_24_fifo.wr_addr_gray_rd_r[7] -.sym 9189 w_lvds_rx_09_d1_SB_LUT4_I0_O_SB_LUT4_O_I2_SB_LUT4_I0_O[0] -.sym 9190 rx_24_fifo.rd_addr_gray_SB_LUT4_I2_O[6] -.sym 9191 rx_24_fifo.rd_addr_gray_SB_LUT4_I2_O[7] -.sym 9192 i_smi_a2_SB_LUT4_I1_O_SB_LUT4_I3_1_I2_SB_LUT4_O_I3[1] -.sym 9193 rx_24_fifo.wr_addr_gray_rd_r[7] -.sym 9195 w_rx_24_fifo_pulled_data[19] -.sym 9196 i_smi_a2_SB_LUT4_I1_O_SB_LUT4_I3_1_I2[1] -.sym 9197 rx_24_fifo.wr_addr_gray_rd_r[6] -.sym 9199 w_rx_24_fifo_pulled_data[23] -.sym 9202 w_lvds_rx_09_d0 -.sym 9203 w_rx_24_fifo_pull -.sym 9204 w_lvds_rx_09_d1 -.sym 9206 rx_24_fifo.rd_addr[6] -.sym 9208 rx_24_fifo.rd_addr[7] -.sym 9209 smi_ctrl_ins.r_fifo_24_pull_SB_LUT4_I0_I3[3] -.sym 9211 w_rx_24_fifo_pulled_data[27] -.sym 9214 smi_ctrl_ins.r_fifo_24_pull_SB_LUT4_I0_I1[0] -.sym 9215 w_rx_24_fifo_pulled_data[31] -.sym 9217 w_rx_24_fifo_pulled_data[23] -.sym 9218 i_smi_a2_SB_LUT4_I1_O_SB_LUT4_I3_1_I2_SB_LUT4_O_I3[1] -.sym 9219 w_rx_24_fifo_pulled_data[31] -.sym 9220 i_smi_a2_SB_LUT4_I1_O_SB_LUT4_I3_1_I2[1] -.sym 9223 rx_24_fifo.rd_addr[7] -.sym 9224 rx_24_fifo.wr_addr_gray_rd_r[6] -.sym 9225 smi_ctrl_ins.r_fifo_24_pull_SB_LUT4_I0_I1[0] -.sym 9226 rx_24_fifo.wr_addr_gray_rd_r[7] -.sym 9229 w_rx_24_fifo_pulled_data[19] -.sym 9230 i_smi_a2_SB_LUT4_I1_O_SB_LUT4_I3_1_I2[1] -.sym 9231 w_rx_24_fifo_pulled_data[27] -.sym 9232 i_smi_a2_SB_LUT4_I1_O_SB_LUT4_I3_1_I2_SB_LUT4_O_I3[1] -.sym 9235 w_lvds_rx_09_d1_SB_LUT4_I0_O_SB_LUT4_O_I2_SB_LUT4_I0_O[0] -.sym 9238 w_lvds_rx_09_d0 -.sym 9241 w_lvds_rx_09_d1 -.sym 9244 w_lvds_rx_09_d1_SB_LUT4_I0_O_SB_LUT4_O_I2_SB_LUT4_I0_O[0] -.sym 9247 w_rx_24_fifo_pull -.sym 9248 rx_24_fifo.rd_addr[6] -.sym 9249 smi_ctrl_ins.r_fifo_24_pull_SB_LUT4_I0_I1[0] -.sym 9250 smi_ctrl_ins.r_fifo_24_pull_SB_LUT4_I0_I3[3] -.sym 9259 rx_24_fifo.wr_addr_gray_rd_r[7] -.sym 9260 rx_24_fifo.wr_addr_gray_rd_r[6] -.sym 9261 rx_24_fifo.rd_addr_gray_SB_LUT4_I2_O[7] -.sym 9262 rx_24_fifo.rd_addr_gray_SB_LUT4_I2_O[6] -.sym 9263 w_lvds_rx_09_d1_SB_LUT4_I0_O_SB_LUT4_I3_O_$glb_ce -.sym 9264 lvds_clock_buf -.sym 9265 i_smi_a1_SB_LUT4_I1_O[2]_$glb_sr -.sym 9266 smi_ctrl_ins.r_fifo_24_pull_SB_LUT4_I1_I2[2] -.sym 9268 rx_24_fifo.empty_o_SB_LUT4_I3_O_SB_LUT4_O_I0[0] -.sym 9269 rx_24_fifo.empty_o_SB_LUT4_I3_O[0] -.sym 9270 rx_24_fifo.rd_addr_gray_SB_DFFESR_Q_5_D[0] -.sym 9271 w_rx_24_fifo_full -.sym 9272 smi_ctrl_ins.r_fifo_24_pull_SB_LUT4_I0_I1[0] -.sym 9273 smi_ctrl_ins.r_fifo_24_pull_SB_LUT4_I1_I2[1] -.sym 9280 rx_24_fifo.rd_addr[5] -.sym 9297 rx_24_fifo.full_o_SB_LUT4_I0_O_SB_LUT4_O_I1_SB_LUT4_O_I0[1] -.sym 9309 rx_24_fifo.rd_addr_gray_wr[3] -.sym 9314 rx_24_fifo.rd_addr_gray[3] -.sym 9316 rx_24_fifo.rd_addr_gray[6] -.sym 9318 rx_24_fifo.rd_addr_gray[4] -.sym 9330 w_lvds_rx_09_d1_SB_LUT4_I0_O_SB_LUT4_O_I2[3] -.sym 9332 w_lvds_rx_09_d1_SB_LUT4_I0_O_SB_LUT4_O_I2[2] -.sym 9334 rx_24_fifo.rd_addr_gray_wr[4] -.sym 9335 rx_24_fifo.rd_addr_gray_wr[6] -.sym 9337 rx_24_fifo.rd_addr_gray_wr[2] -.sym 9342 rx_24_fifo.rd_addr_gray_wr[4] -.sym 9347 w_lvds_rx_09_d1_SB_LUT4_I0_O_SB_LUT4_O_I2[2] -.sym 9348 w_lvds_rx_09_d1_SB_LUT4_I0_O_SB_LUT4_O_I2[3] -.sym 9353 rx_24_fifo.rd_addr_gray[3] -.sym 9359 rx_24_fifo.rd_addr_gray[4] -.sym 9364 rx_24_fifo.rd_addr_gray[6] -.sym 9371 rx_24_fifo.rd_addr_gray_wr[3] -.sym 9377 rx_24_fifo.rd_addr_gray_wr[6] -.sym 9382 rx_24_fifo.rd_addr_gray_wr[2] -.sym 9387 lvds_clock_buf -.sym 9389 rx_24_fifo.full_o_SB_LUT4_I0_I1[3] -.sym 9390 rx_24_fifo.empty_o_SB_LUT4_I3_O_SB_LUT4_O_1_I3[0] -.sym 9391 rx_24_fifo.full_o_SB_LUT4_I0_O[0] -.sym 9392 rx_24_fifo.rd_addr_gray_SB_DFFESR_Q_7_D[0] -.sym 9393 rx_24_fifo.wr_addr_gray_rd_r[5] -.sym 9394 rx_24_fifo.full_o_SB_LUT4_I0_O[3] -.sym 9395 rx_24_fifo.wr_addr_gray_rd[5] -.sym 9396 rx_24_fifo.full_o_SB_LUT4_I0_I1[2] -.sym 9405 spi_if_ins.state_if_SB_DFFE_Q_E -.sym 9406 w_ioc[1] -.sym 9407 w_rx_24_fifo_empty -.sym 9414 rx_24_fifo.rd_addr_gray[5] -.sym 9415 rx_24_fifo.wr_addr_gray_rd[2] -.sym 9417 rx_24_fifo.wr_addr_gray_rd[0] -.sym 9423 rx_24_fifo.rd_addr_gray_wr[2] -.sym 9430 rx_24_fifo.full_o_SB_LUT4_I0_I1_SB_LUT4_O_1_I2[1] -.sym 9432 lvds_rx_24_inst.r_push_SB_LUT4_I3_1_O -.sym 9439 w_rx_24_fifo_push -.sym 9440 rx_24_fifo.full_o_SB_LUT4_I0_O_SB_LUT4_O_I1[1] -.sym 9443 rx_24_fifo.rd_addr_gray_wr_r[3] -.sym 9445 rx_24_fifo.full_o_SB_LUT4_I0_O_SB_LUT4_O_I1_SB_LUT4_O_1_I3[0] -.sym 9447 lvds_rx_24_inst.r_push_SB_LUT4_I3_I1[2] -.sym 9448 rx_24_fifo.wr_addr_gray_SB_LUT4_I2_1_O[1] -.sym 9449 lvds_rx_24_inst.r_push_SB_LUT4_I3_I1[3] -.sym 9450 rx_24_fifo.wr_addr_gray_SB_LUT4_I2_1_O[6] -.sym 9453 rx_24_fifo.full_o_SB_LUT4_I0_O_SB_LUT4_O_I1[2] -.sym 9455 rx_24_fifo.full_o_SB_LUT4_I0_O_SB_LUT4_O_I1[0] -.sym 9456 rx_24_fifo.full_o_SB_LUT4_I0_I1_SB_LUT4_O_1_I2[3] -.sym 9457 rx_24_fifo.full_o_SB_LUT4_I0_O_SB_LUT4_O_I1_SB_LUT4_O_I0[1] -.sym 9458 rx_24_fifo.wr_addr_gray_SB_LUT4_I2_1_O[2] -.sym 9460 rx_24_fifo.wr_addr_gray_SB_LUT4_I2_1_O[3] -.sym 9463 rx_24_fifo.full_o_SB_LUT4_I0_I1_SB_LUT4_O_1_I2[1] -.sym 9464 lvds_rx_24_inst.r_push_SB_LUT4_I3_I1[3] -.sym 9469 lvds_rx_24_inst.r_push_SB_LUT4_I3_I1[2] -.sym 9470 w_rx_24_fifo_push -.sym 9471 lvds_rx_24_inst.r_push_SB_LUT4_I3_I1[3] -.sym 9472 rx_24_fifo.rd_addr_gray_wr_r[3] -.sym 9476 rx_24_fifo.wr_addr_gray_SB_LUT4_I2_1_O[2] -.sym 9477 rx_24_fifo.full_o_SB_LUT4_I0_O_SB_LUT4_O_I1_SB_LUT4_O_1_I3[0] -.sym 9478 rx_24_fifo.wr_addr_gray_SB_LUT4_I2_1_O[3] -.sym 9482 rx_24_fifo.wr_addr_gray_SB_LUT4_I2_1_O[6] -.sym 9487 rx_24_fifo.full_o_SB_LUT4_I0_O_SB_LUT4_O_I1[0] -.sym 9488 rx_24_fifo.full_o_SB_LUT4_I0_O_SB_LUT4_O_I1[2] -.sym 9490 rx_24_fifo.full_o_SB_LUT4_I0_O_SB_LUT4_O_I1[1] -.sym 9494 rx_24_fifo.full_o_SB_LUT4_I0_O_SB_LUT4_O_I1_SB_LUT4_O_I0[1] -.sym 9495 rx_24_fifo.wr_addr_gray_SB_LUT4_I2_1_O[2] -.sym 9496 rx_24_fifo.wr_addr_gray_SB_LUT4_I2_1_O[1] -.sym 9499 rx_24_fifo.wr_addr_gray_SB_LUT4_I2_1_O[6] -.sym 9502 rx_24_fifo.full_o_SB_LUT4_I0_I1_SB_LUT4_O_1_I2[3] -.sym 9506 rx_24_fifo.rd_addr_gray_wr_r[3] -.sym 9507 rx_24_fifo.wr_addr_gray_SB_LUT4_I2_1_O[3] -.sym 9509 lvds_rx_24_inst.r_push_SB_LUT4_I3_1_O +.sym 9143 spi_if_ins.o_load_cmd_SB_DFFESR_Q_E +.sym 9144 rx_24_fifo.rd_addr_gray_SB_DFFESR_Q_7_D_SB_LUT4_I3_O_SB_LUT4_O_I0_SB_LUT4_O_1_I0[0] +.sym 9145 rx_24_fifo.rd_addr_gray_wr[7] +.sym 9147 rx_24_fifo.rd_addr_gray_wr_r[7] +.sym 9148 spi_if_ins.state_if_SB_DFFESR_Q_1_R +.sym 9150 rx_24_fifo.rd_addr_gray_SB_DFFESR_Q_7_D_SB_LUT4_I3_O_SB_LUT4_O_I0[2] +.sym 9156 rx_24_fifo.rd_addr[4] +.sym 9157 w_rx_24_fifo_data[20] +.sym 9162 w_fetch +.sym 9165 spi_if_ins.o_cs_SB_DFFESR_Q_R[0] +.sym 9167 rx_24_fifo.rd_addr[0] +.sym 9168 rx_24_fifo.rd_addr_gray_SB_DFFESR_Q_6_D[2] +.sym 9169 rx_24_fifo.rd_addr[6] +.sym 9176 w_rx_24_fifo_empty +.sym 9177 rx_24_fifo.rd_addr[5] +.sym 9186 rx_24_fifo.rd_addr[6] +.sym 9190 rx_24_fifo.rd_addr[3] +.sym 9193 rx_24_fifo.rd_addr[1] +.sym 9194 rx_24_fifo.rd_addr[5] +.sym 9196 rx_24_fifo.rd_addr[7] +.sym 9201 rx_24_fifo.rd_addr[0] +.sym 9204 rx_24_fifo.rd_addr[0] +.sym 9205 rx_24_fifo.rd_addr[4] +.sym 9214 rx_24_fifo.rd_addr[2] +.sym 9216 $nextpnr_ICESTORM_LC_9$O +.sym 9218 rx_24_fifo.rd_addr[0] +.sym 9222 rx_24_fifo.rd_addr_gray_SB_LUT4_I2_I3[2] +.sym 9224 rx_24_fifo.rd_addr[1] +.sym 9226 rx_24_fifo.rd_addr[0] +.sym 9228 rx_24_fifo.rd_addr_gray_SB_LUT4_I2_I3[3] +.sym 9230 rx_24_fifo.rd_addr[2] +.sym 9232 rx_24_fifo.rd_addr_gray_SB_LUT4_I2_I3[2] +.sym 9234 rx_24_fifo.rd_addr_gray_SB_LUT4_I2_I3[4] +.sym 9236 rx_24_fifo.rd_addr[3] +.sym 9238 rx_24_fifo.rd_addr_gray_SB_LUT4_I2_I3[3] +.sym 9240 rx_24_fifo.rd_addr_gray_SB_LUT4_I2_I3[5] +.sym 9242 rx_24_fifo.rd_addr[4] +.sym 9244 rx_24_fifo.rd_addr_gray_SB_LUT4_I2_I3[4] +.sym 9246 rx_24_fifo.rd_addr_gray_SB_LUT4_I2_I3[6] +.sym 9249 rx_24_fifo.rd_addr[5] +.sym 9250 rx_24_fifo.rd_addr_gray_SB_LUT4_I2_I3[5] +.sym 9252 rx_24_fifo.rd_addr_gray_SB_LUT4_I2_I3[7] +.sym 9255 rx_24_fifo.rd_addr[6] +.sym 9256 rx_24_fifo.rd_addr_gray_SB_LUT4_I2_I3[6] +.sym 9259 rx_24_fifo.rd_addr[7] +.sym 9262 rx_24_fifo.rd_addr_gray_SB_LUT4_I2_I3[7] +.sym 9266 w_load +.sym 9267 rx_24_fifo.rd_addr_gray_SB_DFFESR_Q_7_D_SB_LUT4_I3_O[3] +.sym 9268 rx_24_fifo.rd_addr_gray_SB_DFFESR_Q_7_D[1] +.sym 9269 rx_24_fifo.rd_addr_gray_SB_DFFESR_Q_7_D_SB_LUT4_I3_O_SB_LUT4_O_2_I0[3] +.sym 9271 rx_24_fifo.rd_addr_gray_SB_DFFESR_Q_6_D[1] +.sym 9272 rx_24_fifo.rd_addr_gray_SB_DFFESR_Q_6_D[3] +.sym 9279 spi_if_ins.r_tx_data_valid_SB_DFFESR_Q_D[0] +.sym 9282 $PACKER_VCC_NET +.sym 9286 rx_24_fifo.rd_addr[3] +.sym 9291 rx_24_fifo.rd_addr_gray_SB_DFFESR_Q_7_D_SB_LUT4_I3_O_SB_LUT4_O_2_I0_SB_LUT4_O_1_I3[1] +.sym 9297 rx_24_fifo.rd_addr_gray_SB_DFFESR_Q_6_D[0] +.sym 9298 rx_24_fifo.rd_addr_gray_SB_DFFESR_Q_3_D[1] +.sym 9300 rx_24_fifo.rd_addr[2] +.sym 9301 rx_24_fifo.rd_addr_gray_SB_DFFESR_Q_7_D[0] +.sym 9310 rx_24_fifo.rd_addr_gray_SB_DFFESR_Q_7_D_SB_LUT4_I3_O_SB_LUT4_O_2_I0_SB_LUT4_O_1_I3[2] +.sym 9311 rx_24_fifo.rd_addr_gray_SB_LUT4_I2_O[4] +.sym 9312 rx_24_fifo.rd_addr_gray_SB_LUT4_I2_O[5] +.sym 9313 w_rx_24_fifo_full +.sym 9317 rx_24_fifo.rd_addr_gray_SB_DFFESR_Q_7_D_SB_LUT4_I3_O_SB_LUT4_O_2_I0_SB_LUT4_O_1_I3[1] +.sym 9318 smi_ctrl_ins.o_data_out_SB_DFFESS_Q_E +.sym 9320 io_ctrl_ins.o_data_out_SB_DFFESR_Q_6_R[0] +.sym 9321 rx_24_fifo.rd_addr_gray_SB_LUT4_I2_O[6] +.sym 9325 rx_24_fifo.rd_addr_gray_SB_DFFESR_Q_7_D_SB_LUT4_I3_O_SB_LUT4_O_2_I0_SB_LUT4_O_1_I3[3] +.sym 9326 rx_24_fifo.rd_addr_gray_SB_DFFESR_Q_7_D_SB_LUT4_I3_O_SB_LUT4_O_I0_SB_LUT4_O_2_I0[2] +.sym 9327 rx_24_fifo.rd_addr_gray_SB_DFFESR_Q_7_D_SB_LUT4_I3_O_SB_LUT4_O_2_I0_SB_LUT4_O_1_I3[0] +.sym 9340 rx_24_fifo.rd_addr_gray_SB_LUT4_I2_O[4] +.sym 9343 rx_24_fifo.rd_addr_gray_SB_LUT4_I2_O[5] +.sym 9346 rx_24_fifo.rd_addr_gray_SB_LUT4_I2_O[6] +.sym 9348 rx_24_fifo.rd_addr_gray_SB_LUT4_I2_O[5] +.sym 9352 rx_24_fifo.rd_addr_gray_SB_LUT4_I2_O[4] +.sym 9353 rx_24_fifo.rd_addr_gray_SB_DFFESR_Q_7_D_SB_LUT4_I3_O_SB_LUT4_O_I0_SB_LUT4_O_2_I0[2] +.sym 9378 w_rx_24_fifo_full +.sym 9382 rx_24_fifo.rd_addr_gray_SB_DFFESR_Q_7_D_SB_LUT4_I3_O_SB_LUT4_O_2_I0_SB_LUT4_O_1_I3[1] +.sym 9383 rx_24_fifo.rd_addr_gray_SB_DFFESR_Q_7_D_SB_LUT4_I3_O_SB_LUT4_O_2_I0_SB_LUT4_O_1_I3[3] +.sym 9384 rx_24_fifo.rd_addr_gray_SB_DFFESR_Q_7_D_SB_LUT4_I3_O_SB_LUT4_O_2_I0_SB_LUT4_O_1_I3[2] +.sym 9385 rx_24_fifo.rd_addr_gray_SB_DFFESR_Q_7_D_SB_LUT4_I3_O_SB_LUT4_O_2_I0_SB_LUT4_O_1_I3[0] +.sym 9386 smi_ctrl_ins.o_data_out_SB_DFFESS_Q_E +.sym 9387 r_counter[0]_$glb_clk +.sym 9388 io_ctrl_ins.o_data_out_SB_DFFESR_Q_6_R[0] +.sym 9389 rx_24_fifo.rd_addr_gray_SB_DFFESR_Q_7_D_SB_LUT4_I3_O[2] +.sym 9390 rx_24_fifo.rd_addr_gray_SB_DFFESR_Q_7_D_SB_LUT4_I3_O[1] +.sym 9391 rx_24_fifo.rd_addr_gray_SB_DFFESR_Q_7_D_SB_LUT4_I3_O_SB_LUT4_O_1_I3[3] +.sym 9393 w_rx_24_fifo_empty +.sym 9395 rx_24_fifo.rd_addr_gray_SB_DFFESR_Q_7_D_SB_LUT4_I3_O_SB_LUT4_O_2_I0[1] +.sym 9408 io_ctrl_ins.o_data_out_SB_DFFESR_Q_6_R[0] +.sym 9413 rx_24_fifo.rd_addr_gray_SB_DFFESR_Q_7_D_SB_LUT4_I3_O_SB_LUT4_O_2_I0_SB_LUT4_O_1_I3[0] +.sym 9420 spi_if_ins.o_load_cmd_SB_DFFESR_Q_E +.sym 9422 w_tx_data_smi[3] +.sym 9437 rx_24_fifo.rd_addr_gray[3] +.sym 9442 rx_24_fifo.rd_addr_gray_wr[6] +.sym 9455 rx_24_fifo.rd_addr_gray_wr[3] +.sym 9469 rx_24_fifo.rd_addr_gray[3] +.sym 9476 rx_24_fifo.rd_addr_gray_wr[6] +.sym 9508 rx_24_fifo.rd_addr_gray_wr[3] .sym 9510 lvds_clock_buf -.sym 9511 i_smi_a1_SB_LUT4_I1_O[2]_$glb_sr -.sym 9512 rx_24_fifo.rd_addr_gray_wr[0] -.sym 9513 rx_24_fifo.full_o_SB_LUT4_I0_I1_SB_LUT4_O_1_I2[2] -.sym 9514 rx_24_fifo.rd_addr_gray_wr[5] -.sym 9515 rx_24_fifo.rd_addr_gray_wr[2] -.sym 9518 rx_24_fifo.full_o_SB_LUT4_I0_O_SB_LUT4_O_1_I0[2] -.sym 9519 rx_24_fifo.rd_addr_gray_wr_r[0] -.sym 9536 rx_24_fifo.empty_o_SB_LUT4_I3_O_SB_LUT4_O_I0[2] -.sym 9537 w_rx_09_fifo_push -.sym 9538 w_lvds_rx_09_d1_SB_LUT4_I0_O_SB_LUT4_O_I2[3] -.sym 9540 w_lvds_rx_09_d1_SB_LUT4_I0_O_SB_LUT4_O_I2[0] -.sym 9541 w_lvds_rx_09_d1_SB_LUT4_I0_O_SB_LUT4_O_I2[2] -.sym 9544 w_lvds_rx_09_d1_SB_LUT4_I0_O_SB_LUT4_O_I2[1] -.sym 9553 rx_24_fifo.full_o_SB_LUT4_I0_I1_SB_LUT4_O_I0[1] -.sym 9558 rx_24_fifo.wr_addr_gray_SB_LUT4_I2_1_O[2] -.sym 9561 rx_24_fifo.full_o_SB_LUT4_I0_I1_SB_LUT4_O_I0[0] -.sym 9562 rx_24_fifo.wr_addr_gray_SB_LUT4_I2_1_O[3] -.sym 9563 rx_24_fifo.full_o_SB_LUT4_I0_I1_SB_LUT4_O_I0[3] -.sym 9564 lvds_rx_24_inst.r_push_SB_LUT4_I3_1_O -.sym 9566 rx_24_fifo.full_o_SB_LUT4_I0_I1_SB_LUT4_O_I0[2] -.sym 9567 rx_24_fifo.full_o_SB_LUT4_I0_O_SB_LUT4_O_I1_SB_LUT4_O_I0[1] -.sym 9571 rx_24_fifo.full_o_SB_LUT4_I0_O_SB_LUT4_O_I1_SB_LUT4_O_I0[3] -.sym 9574 rx_24_fifo.full_o_SB_LUT4_I0_I1_SB_LUT4_O_2_I2[1] -.sym 9576 rx_24_fifo.wr_addr_gray_SB_LUT4_I2_1_O[1] -.sym 9577 lvds_rx_24_inst.r_push_SB_LUT4_I3_I1[1] -.sym 9579 rx_24_fifo.full_o_SB_LUT4_I0_I1_SB_LUT4_O_1_I2[3] -.sym 9581 rx_24_fifo.wr_addr[0] -.sym 9582 rx_24_fifo.full_o_SB_LUT4_I0_O_SB_LUT4_O_I1_SB_LUT4_O_I0[0] -.sym 9584 rx_24_fifo.rd_addr_gray_wr_r[0] -.sym 9586 rx_24_fifo.full_o_SB_LUT4_I0_I1_SB_LUT4_O_I0[2] -.sym 9587 rx_24_fifo.full_o_SB_LUT4_I0_I1_SB_LUT4_O_I0[3] -.sym 9588 rx_24_fifo.full_o_SB_LUT4_I0_I1_SB_LUT4_O_I0[1] -.sym 9589 rx_24_fifo.full_o_SB_LUT4_I0_I1_SB_LUT4_O_I0[0] -.sym 9593 rx_24_fifo.wr_addr_gray_SB_LUT4_I2_1_O[3] -.sym 9594 rx_24_fifo.full_o_SB_LUT4_I0_I1_SB_LUT4_O_2_I2[1] -.sym 9598 rx_24_fifo.full_o_SB_LUT4_I0_O_SB_LUT4_O_I1_SB_LUT4_O_I0[3] -.sym 9599 lvds_rx_24_inst.r_push_SB_LUT4_I3_I1[1] -.sym 9600 rx_24_fifo.full_o_SB_LUT4_I0_O_SB_LUT4_O_I1_SB_LUT4_O_I0[0] -.sym 9601 rx_24_fifo.full_o_SB_LUT4_I0_O_SB_LUT4_O_I1_SB_LUT4_O_I0[1] -.sym 9604 rx_24_fifo.wr_addr_gray_SB_LUT4_I2_1_O[1] -.sym 9606 rx_24_fifo.wr_addr_gray_SB_LUT4_I2_1_O[2] -.sym 9611 rx_24_fifo.wr_addr[0] -.sym 9613 rx_24_fifo.wr_addr_gray_SB_LUT4_I2_1_O[1] -.sym 9616 rx_24_fifo.wr_addr[0] -.sym 9617 rx_24_fifo.rd_addr_gray_wr_r[0] -.sym 9623 rx_24_fifo.full_o_SB_LUT4_I0_I1_SB_LUT4_O_1_I2[3] -.sym 9625 rx_24_fifo.full_o_SB_LUT4_I0_I1_SB_LUT4_O_2_I2[1] -.sym 9632 lvds_rx_24_inst.r_push_SB_LUT4_I3_1_O -.sym 9633 lvds_clock_buf -.sym 9634 i_smi_a1_SB_LUT4_I1_O[2]_$glb_sr -.sym 9635 rx_24_fifo.wr_addr_gray_rd[3] -.sym 9637 rx_24_fifo.wr_addr_gray_rd[1] -.sym 9639 rx_24_fifo.wr_addr_gray_rd_r[3] -.sym 9641 rx_24_fifo.empty_o_SB_LUT4_I3_O_SB_LUT4_O_I0[2] -.sym 9642 rx_24_fifo.empty_o_SB_DFFSS_Q_D_SB_LUT4_O_I0_SB_LUT4_O_I0[2] -.sym 9661 lvds_rx_09_inst.r_push_SB_DFFNESR_Q_E -.sym 9678 rx_24_fifo.wr_addr_gray[2] -.sym 9679 rx_24_fifo.wr_addr[0] -.sym 9680 rx_24_fifo.wr_addr_gray[0] -.sym 9682 rx_24_fifo.wr_addr_gray_SB_LUT4_I2_1_O[1] -.sym 9690 rx_24_fifo.wr_addr_gray[4] -.sym 9691 rx_24_fifo.rd_addr_gray_wr_r[0] -.sym 9698 w_lvds_rx_09_d1_SB_LUT4_I0_O_SB_LUT4_O_I2[3] -.sym 9700 w_lvds_rx_09_d1_SB_LUT4_I0_O_SB_LUT4_O_I2[0] -.sym 9701 w_lvds_rx_09_d1_SB_LUT4_I0_O_SB_LUT4_O_I2[2] -.sym 9704 w_lvds_rx_09_d1_SB_LUT4_I0_O_SB_LUT4_O_I2[1] -.sym 9709 rx_24_fifo.wr_addr_gray_SB_LUT4_I2_1_O[1] -.sym 9710 rx_24_fifo.wr_addr[0] -.sym 9711 rx_24_fifo.rd_addr_gray_wr_r[0] -.sym 9718 rx_24_fifo.wr_addr_gray[2] -.sym 9723 rx_24_fifo.wr_addr_gray[0] -.sym 9727 w_lvds_rx_09_d1_SB_LUT4_I0_O_SB_LUT4_O_I2[0] -.sym 9728 w_lvds_rx_09_d1_SB_LUT4_I0_O_SB_LUT4_O_I2[2] -.sym 9729 w_lvds_rx_09_d1_SB_LUT4_I0_O_SB_LUT4_O_I2[1] -.sym 9730 w_lvds_rx_09_d1_SB_LUT4_I0_O_SB_LUT4_O_I2[3] -.sym 9739 rx_24_fifo.wr_addr_gray[4] -.sym 9756 r_counter[0]_$glb_clk -.sym 9761 rx_24_fifo.rd_addr_gray_wr[1] -.sym 9765 rx_24_fifo.full_o_SB_LUT4_I0_O_SB_LUT4_O_I1_SB_LUT4_O_I0[1] -.sym 9773 sys_ctrl_ins.reset_cmd_SB_DFFESR_Q_E -.sym 9783 i_smi_a1_SB_LUT4_I1_O[2] -.sym 9785 w_lvds_rx_09_d1_SB_LUT4_I0_O_SB_LUT4_O_I2[3] -.sym 9789 rx_24_fifo.full_o_SB_LUT4_I0_O_SB_LUT4_O_I1_SB_LUT4_O_I0[1] -.sym 9804 rx_24_fifo.wr_addr_gray_SB_LUT4_I2_1_O[2] -.sym 9812 rx_24_fifo.wr_addr_gray_SB_LUT4_I2_1_O[3] -.sym 9826 lvds_rx_24_inst.r_push_SB_LUT4_I3_1_O -.sym 9844 rx_24_fifo.wr_addr_gray_SB_LUT4_I2_1_O[3] -.sym 9847 rx_24_fifo.wr_addr_gray_SB_LUT4_I2_1_O[2] -.sym 9878 lvds_rx_24_inst.r_push_SB_LUT4_I3_1_O +.sym 9513 rx_24_fifo.rd_addr_gray_SB_DFFESR_Q_3_D[0] +.sym 9514 rx_24_fifo.wr_addr_gray_rd[1] +.sym 9515 rx_24_fifo.rd_addr_gray_SB_DFFESR_Q_6_D[0] +.sym 9516 rx_24_fifo.wr_addr_gray_rd[0] +.sym 9517 rx_24_fifo.rd_addr_gray_SB_DFFESR_Q_7_D[0] +.sym 9518 rx_24_fifo.rd_addr_gray_SB_DFFESR_Q_7_D_SB_LUT4_I3_O_SB_LUT4_O_2_I0_SB_LUT4_O_1_I3[0] +.sym 9519 rx_24_fifo.rd_addr_gray_SB_DFFESR_Q_3_D[3] +.sym 9529 io_ctrl_ins.o_data_out_SB_DFFESR_Q_E[3] +.sym 9538 smi_ctrl_ins.r_fifo_24_pull_SB_LUT4_I3_1_O +.sym 9541 rx_24_fifo.rd_addr_gray_SB_DFFESR_Q_7_D_SB_LUT4_I3_O_SB_LUT4_O_2_I0_SB_LUT4_O_1_I3[0] +.sym 9556 rx_24_fifo.rd_addr_gray_SB_DFFESR_Q_7_D_SB_LUT4_I3_O_SB_LUT4_O_2_I0_SB_LUT4_O_1_I3[2] +.sym 9558 rx_24_fifo.rd_addr_gray_SB_LUT4_I2_O[4] +.sym 9561 rx_24_fifo.rd_addr_gray_SB_DFFESR_Q_7_D_SB_LUT4_I3_O_SB_LUT4_O_2_I0_SB_LUT4_O_1_I3[1] +.sym 9563 rx_24_fifo.rd_addr_gray_SB_DFFESR_Q_3_D[2] +.sym 9564 smi_ctrl_ins.r_fifo_24_pull_SB_LUT4_I3_1_O +.sym 9594 rx_24_fifo.rd_addr_gray_SB_DFFESR_Q_3_D[2] +.sym 9613 rx_24_fifo.rd_addr_gray_SB_LUT4_I2_O[4] +.sym 9618 rx_24_fifo.rd_addr_gray_SB_DFFESR_Q_7_D_SB_LUT4_I3_O_SB_LUT4_O_2_I0_SB_LUT4_O_1_I3[1] +.sym 9625 rx_24_fifo.rd_addr_gray_SB_DFFESR_Q_7_D_SB_LUT4_I3_O_SB_LUT4_O_2_I0_SB_LUT4_O_1_I3[2] +.sym 9628 rx_24_fifo.rd_addr_gray_SB_LUT4_I2_O[4] +.sym 9630 rx_24_fifo.rd_addr_gray_SB_DFFESR_Q_7_D_SB_LUT4_I3_O_SB_LUT4_O_2_I0_SB_LUT4_O_1_I3[2] +.sym 9632 smi_ctrl_ins.r_fifo_24_pull_SB_LUT4_I3_1_O +.sym 9633 r_counter[0]_$glb_clk +.sym 9634 i_smi_a1_SB_LUT4_I1_O_SB_LUT4_O_I2_SB_LUT4_I0_O[2]_$glb_sr +.sym 9635 rx_24_fifo.wr_addr_gray_rd[5] +.sym 9640 rx_24_fifo.wr_addr_gray_rd[4] +.sym 9642 rx_24_fifo.wr_addr_gray_rd[2] +.sym 9659 rx_24_fifo.wr_addr[0] +.sym 9664 rx_24_fifo.wr_addr_gray_SB_LUT4_I2_1_O[3] +.sym 9667 rx_24_fifo.wr_addr[5] +.sym 9680 rx_24_fifo.wr_addr_gray_SB_LUT4_I2_1_O[4] +.sym 9682 rx_24_fifo.wr_addr_gray_SB_LUT4_I2_1_O[5] +.sym 9684 rx_24_fifo.wr_addr_gray_SB_LUT4_I2_1_O[6] +.sym 9685 rx_24_fifo.wr_addr_gray_SB_DFFESR_Q_6_D[2] +.sym 9688 rx_24_fifo.wr_addr_gray_SB_LUT4_I2_1_O[3] +.sym 9689 rx_24_fifo.wr_addr_gray_SB_DFFESR_Q_6_D[1] +.sym 9694 lvds_rx_24_inst.r_push_SB_LUT4_I3_O +.sym 9696 rx_24_fifo.wr_addr[0] +.sym 9702 rx_24_fifo.wr_addr_gray_SB_DFFESR_Q_7_D[1] +.sym 9704 rx_24_fifo.wr_addr_gray_SB_DFFESR_Q_7_D[2] +.sym 9711 rx_24_fifo.wr_addr_gray_SB_LUT4_I2_1_O[5] +.sym 9717 rx_24_fifo.wr_addr_gray_SB_DFFESR_Q_7_D[2] +.sym 9724 rx_24_fifo.wr_addr_gray_SB_DFFESR_Q_7_D[1] +.sym 9730 rx_24_fifo.wr_addr_gray_SB_DFFESR_Q_6_D[1] +.sym 9733 rx_24_fifo.wr_addr[0] +.sym 9741 rx_24_fifo.wr_addr_gray_SB_LUT4_I2_1_O[6] +.sym 9742 rx_24_fifo.wr_addr_gray_SB_LUT4_I2_1_O[5] +.sym 9745 rx_24_fifo.wr_addr_gray_SB_LUT4_I2_1_O[4] +.sym 9746 rx_24_fifo.wr_addr_gray_SB_LUT4_I2_1_O[3] +.sym 9754 rx_24_fifo.wr_addr_gray_SB_DFFESR_Q_6_D[2] +.sym 9755 lvds_rx_24_inst.r_push_SB_LUT4_I3_O +.sym 9756 lvds_clock_buf +.sym 9757 i_smi_a1_SB_LUT4_I1_O_SB_LUT4_O_I2_SB_LUT4_I0_O[2]_$glb_sr +.sym 9793 i_smi_a1_SB_LUT4_I1_O_SB_LUT4_O_I2_SB_LUT4_I0_O[2] +.sym 9801 rx_24_fifo.rd_addr_gray[5] +.sym 9865 rx_24_fifo.rd_addr_gray[5] .sym 9879 lvds_clock_buf -.sym 9880 i_smi_a1_SB_LUT4_I1_O[2]_$glb_sr -.sym 9927 w_rx_09_fifo_full -.sym 9933 lvds_rx_09_inst.r_push_SB_DFFNESR_Q_E -.sym 9942 w_lvds_rx_09_d1_SB_LUT4_I0_O_SB_LUT4_O_I2[2] -.sym 9943 i_smi_a1_SB_LUT4_I1_O[2] -.sym 9944 lvds_rx_09_inst.r_push_SB_DFFNESR_Q_E_SB_LUT4_O_I1[0] -.sym 9945 w_lvds_rx_09_d1_SB_LUT4_I0_O_SB_LUT4_O_I2[3] -.sym 9980 w_rx_09_fifo_full -.sym 9981 w_lvds_rx_09_d1_SB_LUT4_I0_O_SB_LUT4_O_I2[2] -.sym 9982 w_lvds_rx_09_d1_SB_LUT4_I0_O_SB_LUT4_O_I2[3] -.sym 9991 lvds_rx_09_inst.r_push_SB_DFFNESR_Q_E_SB_LUT4_O_I1[0] -.sym 9992 i_smi_a1_SB_LUT4_I1_O[2] -.sym 9994 w_lvds_rx_09_d1_SB_LUT4_I0_O_SB_LUT4_O_I2[3] -.sym 10001 lvds_rx_09_inst.r_push_SB_DFFNESR_Q_E -.sym 10002 lvds_clock_buf -.sym 10003 i_smi_a1_SB_LUT4_I1_O[2]_$glb_sr -.sym 10026 o_shdn_rx_lna$SB_IO_OUT -.sym 10033 w_rx_09_fifo_push +.sym 10138 o_shdn_rx_lna$SB_IO_OUT +.sym 10147 o_shdn_tx_lna$SB_IO_OUT +.sym 10163 o_shdn_rx_lna$SB_IO_OUT .sym 10172 o_shdn_rx_lna$SB_IO_OUT .sym 10181 o_shdn_rx_lna$SB_IO_OUT -.sym 10199 o_ldo_2v8_en$SB_IO_OUT .sym 10201 io_smi_data[2]$SB_IO_OUT .sym 10204 io_smi_data[1]$SB_IO_OUT -.sym 10216 io_smi_data[2]$SB_IO_OUT -.sym 10222 io_smi_data[1]$SB_IO_OUT -.sym 10226 io_pmod_SB_DFFSS_Q_D_SB_LUT4_O_I0_SB_LUT4_O_I0[3] -.sym 10228 rx_09_fifo.wr_addr_gray_rd_r[6] -.sym 10229 io_pmod_SB_DFFSS_Q_D_SB_LUT4_O_I0_SB_LUT4_O_I0[1] -.sym 10230 io_pmod_SB_DFFSS_Q_D_SB_LUT4_O_I0_SB_LUT4_O_I0[0] -.sym 10231 io_pmod_SB_DFFSS_Q_D_SB_LUT4_O_I0_SB_LUT4_O_I0_SB_LUT4_O_1_I2[2] -.sym 10232 rx_09_fifo.wr_addr_gray_rd_r[7] -.sym 10233 io_pmod_SB_DFFSS_Q_D_SB_LUT4_O_I0[1] -.sym 10269 rx_09_fifo.rd_addr_gray_SB_LUT4_I2_O[1] -.sym 10270 rx_09_fifo.rd_addr[0] -.sym 10272 rx_09_fifo.rd_addr_gray_SB_DFFESR_Q_7_D_SB_LUT4_I3_O_SB_LUT4_O_I3[1] -.sym 10273 rx_09_fifo.rd_addr_gray_SB_DFFESR_Q_7_D_SB_LUT4_I3_O_SB_LUT4_O_I3[2] -.sym 10278 rx_09_fifo.rd_addr_gray_SB_LUT4_I2_O[2] -.sym 10279 rx_09_fifo.rd_addr_gray_SB_LUT4_I2_O[3] -.sym 10282 rx_09_fifo.rd_addr_gray_SB_LUT4_I2_O[6] -.sym 10283 rx_09_fifo.rd_addr_gray_SB_LUT4_I2_O[7] -.sym 10285 rx_09_fifo.rd_addr_gray_SB_DFFESR_Q_7_D_SB_LUT4_I3_O_SB_LUT4_O_I3[3] -.sym 10286 io_smi_data[7]$SB_IO_OUT -.sym 10290 rx_09_fifo.wr_addr_gray_rd_r[7] -.sym 10292 rx_09_fifo.rd_addr_gray_wr[4] -.sym 10293 rx_09_fifo.rd_addr_gray_SB_DFFESR_Q_7_D_SB_LUT4_I3_O_SB_LUT4_O_I3[0] -.sym 10294 rx_09_fifo.wr_addr_gray_rd_r[6] -.sym 10301 rx_09_fifo.rd_addr_gray_SB_DFFESR_Q_7_D_SB_LUT4_I3_O_SB_LUT4_O_I3[0] -.sym 10302 rx_09_fifo.rd_addr_gray_SB_DFFESR_Q_7_D_SB_LUT4_I3_O_SB_LUT4_O_I3[3] -.sym 10303 rx_09_fifo.rd_addr_gray_SB_DFFESR_Q_7_D_SB_LUT4_I3_O_SB_LUT4_O_I3[1] -.sym 10304 rx_09_fifo.rd_addr_gray_SB_DFFESR_Q_7_D_SB_LUT4_I3_O_SB_LUT4_O_I3[2] -.sym 10307 rx_09_fifo.wr_addr_gray_rd_r[6] -.sym 10308 rx_09_fifo.rd_addr_gray_SB_LUT4_I2_O[7] -.sym 10309 rx_09_fifo.rd_addr_gray_SB_LUT4_I2_O[6] -.sym 10310 rx_09_fifo.wr_addr_gray_rd_r[7] -.sym 10314 rx_09_fifo.rd_addr_gray_SB_LUT4_I2_O[1] -.sym 10316 rx_09_fifo.rd_addr_gray_SB_LUT4_I2_O[2] -.sym 10321 rx_09_fifo.rd_addr_gray_SB_LUT4_I2_O[2] -.sym 10322 rx_09_fifo.rd_addr_gray_SB_LUT4_I2_O[3] -.sym 10325 rx_09_fifo.rd_addr[0] -.sym 10326 rx_09_fifo.rd_addr_gray_SB_LUT4_I2_O[1] -.sym 10333 rx_09_fifo.rd_addr_gray_wr[4] -.sym 10337 io_smi_data[7]$SB_IO_OUT -.sym 10343 rx_09_fifo.rd_addr_gray_SB_DFFESR_Q_7_D_SB_LUT4_I3_O_SB_LUT4_O_I3[2] -.sym 10345 rx_09_fifo.rd_addr_gray_SB_LUT4_I2_O[6] +.sym 10217 io_smi_data[1]$SB_IO_OUT +.sym 10223 io_smi_data[2]$SB_IO_OUT +.sym 10226 rx_09_fifo.rd_addr_gray_wr_r[5] +.sym 10227 rx_09_fifo.full_o_SB_DFFSR_Q_D_SB_LUT4_O_I1_SB_LUT4_O_I0[1] +.sym 10228 rx_09_fifo.full_o_SB_DFFSR_Q_D_SB_LUT4_O_I1_SB_LUT4_O_I0_SB_LUT4_O_I0[1] +.sym 10229 io_smi_data[3]$SB_IO_OUT +.sym 10230 io_smi_data[4]$SB_IO_OUT +.sym 10232 rx_09_fifo.rd_addr_gray_wr[6] +.sym 10233 rx_09_fifo.rd_addr_gray_wr_r[6] +.sym 10241 lvds_rx_09_inst.r_state_if_SB_LUT4_I2_O[0] +.sym 10268 io_pmod[7]$SB_IO_IN +.sym 10272 lvds_rx_09_inst.o_fifo_data[7] +.sym 10278 lvds_rx_09_inst.o_fifo_data[9] +.sym 10281 lvds_rx_09_inst.r_state_if_SB_LUT4_I2_O[0] +.sym 10289 io_pmod[6]$SB_IO_IN +.sym 10291 lvds_rx_09_inst.o_fifo_data[13] +.sym 10298 lvds_rx_09_inst.o_fifo_data[11] +.sym 10308 lvds_rx_09_inst.r_state_if_SB_LUT4_I2_O[0] +.sym 10309 lvds_rx_09_inst.o_fifo_data[13] +.sym 10313 lvds_rx_09_inst.o_fifo_data[7] +.sym 10315 lvds_rx_09_inst.r_state_if_SB_LUT4_I2_O[0] +.sym 10319 io_pmod[6]$SB_IO_IN +.sym 10320 lvds_rx_09_inst.r_state_if_SB_LUT4_I2_O[0] +.sym 10325 lvds_rx_09_inst.r_state_if_SB_LUT4_I2_O[0] +.sym 10327 io_pmod[7]$SB_IO_IN +.sym 10338 lvds_rx_09_inst.o_fifo_data[9] +.sym 10339 lvds_rx_09_inst.r_state_if_SB_LUT4_I2_O[0] +.sym 10345 lvds_rx_09_inst.o_fifo_data[11] +.sym 10346 lvds_rx_09_inst.r_state_if_SB_LUT4_I2_O[0] +.sym 10347 w_lvds_rx_09_d1_SB_LUT4_I0_O_SB_LUT4_I3_O_$glb_ce .sym 10348 lvds_clock_buf -.sym 10354 rx_09_fifo.rd_addr_gray_SB_DFFESR_Q_7_D_SB_LUT4_I3_O[0] -.sym 10355 rx_09_fifo.rd_addr_gray_SB_DFFESR_Q_7_D_SB_LUT4_I3_O_SB_LUT4_O_I3[0] -.sym 10356 rx_09_fifo.rd_addr_gray_SB_DFFESR_Q_5_D[2] -.sym 10357 rx_09_fifo.rd_addr_gray_SB_DFFESR_Q_7_D_SB_LUT4_I3_O[2] -.sym 10358 rx_09_fifo.rd_addr_gray_SB_DFFESR_Q_7_D_SB_LUT4_I3_O[3] -.sym 10359 io_pmod_SB_DFFSS_Q_D_SB_LUT4_O_I0_SB_LUT4_O_I0_SB_LUT4_O_2_I3[3] -.sym 10360 io_pmod_SB_DFFSS_Q_D_SB_LUT4_O_I0_SB_LUT4_O_I0[2] -.sym 10361 io_pmod_SB_DFFSS_Q_D_SB_LUT4_O_I0[2] -.sym 10364 rx_24_fifo.empty_o_SB_DFFSS_Q_D_SB_LUT4_O_I0_SB_LUT4_O_I0[3] -.sym 10374 io_pmod[2]$SB_IO_IN -.sym 10375 io_pmod_SB_DFFSS_Q_D_SB_LUT4_O_I0_SB_LUT4_O_I0_SB_LUT4_O_1_I2[3] -.sym 10385 rx_09_fifo.rd_addr_gray_SB_DFFESR_Q_6_D[3] -.sym 10389 rx_09_fifo.rd_addr[7] -.sym 10395 rx_09_fifo.wr_addr_gray_rd[7] -.sym 10398 rx_09_fifo.full_o_SB_DFFSR_Q_D_SB_LUT4_O_I0_SB_LUT4_O_1_I0[2] -.sym 10409 io_smi_data[0]$SB_IO_OUT -.sym 10410 rx_09_fifo.rd_addr[3] -.sym 10411 rx_09_fifo.rd_addr_gray_SB_DFFESR_Q_5_D[0] -.sym 10415 io_pmod_SB_DFFSS_Q_D_SB_LUT4_O_I0_SB_LUT4_O_I0_SB_LUT4_O_2_I3[1] -.sym 10417 smi_ctrl_ins.r_fifo_09_pull_SB_LUT4_I3_O -.sym 10419 io_pmod_SB_DFFSS_Q_D_SB_LUT4_O_I0[1] -.sym 10433 rx_09_fifo.rd_addr[0] -.sym 10435 rx_09_fifo.rd_addr_gray_SB_DFFESR_Q_7_D[3] -.sym 10437 rx_09_fifo.rd_addr_gray_SB_DFFESR_Q_5_D[3] -.sym 10448 rx_09_fifo.rd_addr_gray_SB_LUT4_I2_O[1] -.sym 10449 smi_ctrl_ins.r_fifo_09_pull_SB_LUT4_I3_O -.sym 10450 rx_09_fifo.rd_addr_gray_SB_LUT4_I2_O[3] -.sym 10451 rx_09_fifo.rd_addr_gray_SB_DFFESR_Q_7_D_SB_LUT4_I3_O_SB_LUT4_O_I3[1] -.sym 10457 rx_09_fifo.rd_addr_gray_SB_LUT4_I2_O[2] -.sym 10460 rx_09_fifo.rd_addr_gray_SB_DFFESR_Q_7_D_SB_LUT4_I3_O_SB_LUT4_O_I3[2] -.sym 10466 rx_09_fifo.rd_addr_gray_SB_DFFESR_Q_7_D[3] -.sym 10471 rx_09_fifo.rd_addr_gray_SB_DFFESR_Q_5_D[3] -.sym 10476 rx_09_fifo.rd_addr[0] -.sym 10482 rx_09_fifo.rd_addr_gray_SB_LUT4_I2_O[2] -.sym 10488 rx_09_fifo.rd_addr_gray_SB_DFFESR_Q_7_D_SB_LUT4_I3_O_SB_LUT4_O_I3[1] -.sym 10496 rx_09_fifo.rd_addr_gray_SB_LUT4_I2_O[3] -.sym 10500 rx_09_fifo.rd_addr_gray_SB_DFFESR_Q_7_D_SB_LUT4_I3_O_SB_LUT4_O_I3[2] -.sym 10502 rx_09_fifo.rd_addr_gray_SB_DFFESR_Q_7_D_SB_LUT4_I3_O_SB_LUT4_O_I3[1] -.sym 10506 rx_09_fifo.rd_addr_gray_SB_LUT4_I2_O[1] -.sym 10510 smi_ctrl_ins.r_fifo_09_pull_SB_LUT4_I3_O -.sym 10511 r_counter[0]_$glb_clk -.sym 10512 i_smi_a1_SB_LUT4_I1_O[2]_$glb_sr -.sym 10513 rx_09_fifo.wr_addr_gray_rd[7] -.sym 10514 rx_09_fifo.rd_addr_gray_SB_DFFESR_Q_7_D[2] -.sym 10515 smi_ctrl_ins.r_fifo_09_pull_SB_LUT4_I3_O -.sym 10516 rx_09_fifo.wr_addr_gray_rd[2] -.sym 10517 rx_09_fifo.wr_addr_gray_rd[3] -.sym 10518 rx_09_fifo.rd_addr_gray_SB_DFFESR_Q_5_D[1] -.sym 10519 rx_09_fifo.wr_addr_gray_rd[6] -.sym 10520 rx_09_fifo.wr_addr_gray_rd[0] -.sym 10529 rx_09_fifo.rd_addr_gray[3] -.sym 10534 rx_09_fifo.full_o_SB_LUT4_I3_O[0] -.sym 10535 rx_09_fifo.rd_addr_gray_SB_LUT4_I2_O[7] -.sym 10537 rx_09_fifo.wr_addr[5] -.sym 10538 rx_09_fifo.wr_addr[3] -.sym 10539 rx_09_fifo.wr_addr_gray_SB_LUT4_I2_1_O[5] -.sym 10540 io_pmod_SB_DFFSS_Q_D_SB_LUT4_O_I0_SB_LUT4_O_I0_SB_LUT4_O_2_I3[2] +.sym 10349 i_smi_a1_SB_LUT4_I1_O_SB_LUT4_O_I2_SB_LUT4_I0_O[2]_$glb_sr +.sym 10355 rx_09_fifo.wr_addr[7] +.sym 10356 rx_09_fifo.wr_addr_gray[5] +.sym 10359 smi_ctrl_ins.r_fifo_09_pull_SB_LUT4_I3_1_O +.sym 10360 rx_09_fifo.wr_addr_gray[6] +.sym 10361 rx_09_fifo.wr_addr_gray[4] +.sym 10378 io_smi_data[0]$SB_IO_OUT +.sym 10383 io_pmod[6]$SB_IO_IN +.sym 10384 rx_09_fifo.rd_addr_gray_wr_r[6] +.sym 10385 lvds_rx_09_inst.o_fifo_data[13] +.sym 10388 rx_09_fifo.full_o_SB_DFFSR_Q_D_SB_LUT4_O_I1_SB_LUT4_O_I0[1] +.sym 10389 lvds_rx_09_inst.o_fifo_data[15] +.sym 10391 rx_09_fifo.full_o_SB_DFFSR_Q_D_SB_LUT4_O_I1_SB_LUT4_O_I0_SB_LUT4_O_I0[1] +.sym 10392 lvds_rx_09_inst.o_fifo_data[9] +.sym 10393 io_smi_data[7]$SB_IO_OUT +.sym 10403 rx_09_fifo.wr_addr[7] +.sym 10405 $PACKER_VCC_NET +.sym 10406 rx_09_fifo.rd_addr_gray[6] +.sym 10407 lvds_rx_09_inst.o_fifo_data[15] +.sym 10414 lvds_rx_09_inst.o_fifo_data[24] +.sym 10419 io_pmod_SB_DFFSS_Q_D_SB_LUT4_O_I0_SB_LUT4_O_I0[1] +.sym 10420 lvds_rx_09_inst.o_fifo_data[28] +.sym 10431 smi_ctrl_ins.int_cnt_09[3] +.sym 10433 w_smi_data_output[1] +.sym 10435 smi_ctrl_ins.int_cnt_09[4] +.sym 10437 w_smi_data_output[2] +.sym 10448 w_smi_data_output[7] +.sym 10455 i_smi_a3$SB_IO_IN +.sym 10459 $PACKER_VCC_NET +.sym 10460 smi_ctrl_ins.r_fifo_09_pull_SB_LUT4_I3_1_O +.sym 10464 w_smi_data_output[2] +.sym 10467 i_smi_a3$SB_IO_IN +.sym 10470 i_smi_a3$SB_IO_IN +.sym 10471 w_smi_data_output[1] +.sym 10476 smi_ctrl_ins.int_cnt_09[3] +.sym 10477 $PACKER_VCC_NET +.sym 10478 smi_ctrl_ins.int_cnt_09[4] +.sym 10483 smi_ctrl_ins.r_fifo_09_pull_SB_LUT4_I3_1_O +.sym 10494 i_smi_a3$SB_IO_IN +.sym 10496 w_smi_data_output[7] +.sym 10513 lvds_rx_09_inst.r_push_SB_LUT4_I3_1_O +.sym 10514 rx_09_fifo.full_o_SB_LUT4_I3_O_SB_LUT4_I3_O[3] +.sym 10515 rx_09_fifo.full_o_SB_LUT4_I3_O_SB_LUT4_I3_O[2] +.sym 10516 io_pmod_SB_DFFSS_Q_D_SB_LUT4_O_I0_SB_LUT4_O_I0[1] +.sym 10517 rx_09_fifo.wr_addr_gray_SB_DFFESR_Q_3_D[2] +.sym 10518 rx_09_fifo.rd_addr_gray[6] +.sym 10519 rx_09_fifo.wr_addr_gray_SB_DFFESR_Q_3_D[1] +.sym 10520 rx_09_fifo.wr_addr_gray_SB_DFFESR_Q_4_D[2] +.sym 10525 io_pmod[7]$SB_IO_IN +.sym 10533 w_smi_data_output[2] +.sym 10534 rx_09_fifo.wr_addr[7] +.sym 10538 rx_09_fifo.rd_addr_gray_wr_r[5] +.sym 10539 rx_09_fifo.wr_addr_gray_SB_LUT4_I2_1_O[7] .sym 10542 rx_09_fifo.wr_addr[0] -.sym 10543 rx_09_fifo.wr_addr_gray_SB_LUT4_I2_1_O[7] -.sym 10544 rx_09_fifo.wr_addr_gray[3] -.sym 10546 rx_09_fifo.wr_addr[6] -.sym 10547 rx_09_fifo.wr_addr_gray_SB_LUT4_I2_1_O[1] -.sym 10548 rx_09_fifo.wr_addr_gray[6] -.sym 10555 rx_09_fifo.wr_addr[5] -.sym 10560 rx_09_fifo.wr_addr[3] -.sym 10562 rx_09_fifo.wr_addr[0] -.sym 10564 rx_09_fifo.wr_addr[6] -.sym 10567 rx_09_fifo.wr_addr[0] -.sym 10569 rx_09_fifo.wr_addr[2] -.sym 10570 rx_09_fifo.wr_addr[4] -.sym 10575 rx_09_fifo.wr_addr[7] -.sym 10582 rx_09_fifo.full_o_SB_DFFSR_Q_D_SB_LUT4_O_I0_SB_LUT4_O_I2[1] -.sym 10586 $nextpnr_ICESTORM_LC_7$O -.sym 10588 rx_09_fifo.wr_addr[0] -.sym 10592 rx_09_fifo.wr_addr_gray_SB_LUT4_I2_1_I3[2] -.sym 10595 rx_09_fifo.full_o_SB_DFFSR_Q_D_SB_LUT4_O_I0_SB_LUT4_O_I2[1] -.sym 10596 rx_09_fifo.wr_addr[0] -.sym 10598 rx_09_fifo.wr_addr_gray_SB_LUT4_I2_1_I3[3] -.sym 10601 rx_09_fifo.wr_addr[2] -.sym 10602 rx_09_fifo.wr_addr_gray_SB_LUT4_I2_1_I3[2] -.sym 10604 rx_09_fifo.wr_addr_gray_SB_LUT4_I2_1_I3[4] -.sym 10606 rx_09_fifo.wr_addr[3] -.sym 10608 rx_09_fifo.wr_addr_gray_SB_LUT4_I2_1_I3[3] -.sym 10610 rx_09_fifo.wr_addr_gray_SB_LUT4_I2_1_I3[5] -.sym 10613 rx_09_fifo.wr_addr[4] -.sym 10614 rx_09_fifo.wr_addr_gray_SB_LUT4_I2_1_I3[4] -.sym 10616 rx_09_fifo.wr_addr_gray_SB_LUT4_I2_1_I3[6] -.sym 10619 rx_09_fifo.wr_addr[5] -.sym 10620 rx_09_fifo.wr_addr_gray_SB_LUT4_I2_1_I3[5] -.sym 10622 rx_09_fifo.wr_addr_gray_SB_LUT4_I2_1_I3[7] -.sym 10624 rx_09_fifo.wr_addr[6] -.sym 10626 rx_09_fifo.wr_addr_gray_SB_LUT4_I2_1_I3[6] -.sym 10631 rx_09_fifo.wr_addr[7] -.sym 10632 rx_09_fifo.wr_addr_gray_SB_LUT4_I2_1_I3[7] -.sym 10636 io_pmod_SB_DFFSS_Q_D_SB_LUT4_O_I0[0] -.sym 10637 rx_09_fifo.wr_addr_gray_SB_DFFESR_Q_7_D[2] -.sym 10638 rx_09_fifo.wr_addr_gray_SB_DFFESR_Q_2_D[2] -.sym 10639 $io_pmod[2]$iobuf_i -.sym 10640 rx_09_fifo.wr_addr_gray_SB_DFFESR_Q_2_D[1] -.sym 10641 rx_09_fifo.wr_addr_gray_SB_DFFESR_Q_5_D[2] -.sym 10642 rx_09_fifo.wr_addr_gray_SB_DFFESR_Q_7_D[1] -.sym 10643 rx_09_fifo.wr_addr_gray_SB_DFFESR_Q_5_D[1] -.sym 10652 $PACKER_VCC_NET -.sym 10656 io_smi_data[4]$SB_IO_OUT -.sym 10658 $PACKER_VCC_NET -.sym 10660 smi_ctrl_ins.r_fifo_09_pull_SB_LUT4_I3_O -.sym 10661 rx_09_fifo.wr_addr[7] -.sym 10663 rx_09_fifo.full_o_SB_LUT4_I3_O[1] -.sym 10664 rx_09_fifo.wr_addr[3] -.sym 10665 rx_09_fifo.full_o_SB_LUT4_I3_O[2] -.sym 10667 rx_09_fifo.full_o_SB_DFFSR_Q_D_SB_LUT4_O_I0_SB_LUT4_O_I2_SB_LUT4_O_I3[0] -.sym 10668 rx_09_fifo.full_o_SB_DFFSR_Q_D_SB_LUT4_O_I0_SB_LUT4_O_I2[1] -.sym 10669 rx_09_fifo.full_o_SB_LUT4_I3_O[0] -.sym 10670 rx_09_fifo.wr_addr_gray[4] -.sym 10679 lvds_rx_09_inst.r_push_SB_LUT4_I3_O -.sym 10680 rx_09_fifo.full_o_SB_LUT4_I3_O[1] -.sym 10683 rx_09_fifo.wr_addr_gray_SB_LUT4_I2_1_O[6] +.sym 10544 w_rx_09_fifo_pull +.sym 10546 rx_09_fifo.full_o_SB_DFFSR_Q_D_SB_LUT4_O_I1_SB_LUT4_O_I0_SB_LUT4_O_1_I3[0] +.sym 10558 lvds_rx_09_inst.o_fifo_data[20] +.sym 10561 lvds_rx_09_inst.o_fifo_data[17] +.sym 10564 lvds_rx_09_inst.o_fifo_data[19] +.sym 10567 lvds_rx_09_inst.o_fifo_data[26] +.sym 10571 lvds_rx_09_inst.o_fifo_data[22] +.sym 10573 lvds_rx_09_inst.o_fifo_data[15] +.sym 10578 lvds_rx_09_inst.o_fifo_data[24] +.sym 10579 lvds_rx_09_inst.r_state_if_SB_LUT4_I2_O[0] +.sym 10581 rx_09_fifo.full_o_SB_LUT4_I3_O[2] +.sym 10582 rx_09_fifo.wr_addr_gray_SB_LUT4_I2_1_O[4] +.sym 10587 lvds_rx_09_inst.r_state_if_SB_LUT4_I2_O[0] +.sym 10590 lvds_rx_09_inst.o_fifo_data[22] +.sym 10594 lvds_rx_09_inst.o_fifo_data[20] +.sym 10596 lvds_rx_09_inst.r_state_if_SB_LUT4_I2_O[0] +.sym 10599 lvds_rx_09_inst.r_state_if_SB_LUT4_I2_O[0] +.sym 10600 lvds_rx_09_inst.o_fifo_data[17] +.sym 10606 lvds_rx_09_inst.o_fifo_data[26] +.sym 10608 lvds_rx_09_inst.r_state_if_SB_LUT4_I2_O[0] +.sym 10612 rx_09_fifo.wr_addr_gray_SB_LUT4_I2_1_O[4] +.sym 10613 rx_09_fifo.full_o_SB_LUT4_I3_O[2] +.sym 10618 lvds_rx_09_inst.r_state_if_SB_LUT4_I2_O[0] +.sym 10619 lvds_rx_09_inst.o_fifo_data[24] +.sym 10623 lvds_rx_09_inst.r_state_if_SB_LUT4_I2_O[0] +.sym 10624 lvds_rx_09_inst.o_fifo_data[19] +.sym 10629 lvds_rx_09_inst.o_fifo_data[15] +.sym 10632 lvds_rx_09_inst.r_state_if_SB_LUT4_I2_O[0] +.sym 10633 w_lvds_rx_09_d1_SB_LUT4_I0_O_SB_LUT4_I3_O_$glb_ce +.sym 10634 lvds_clock_buf +.sym 10635 i_smi_a1_SB_LUT4_I1_O_SB_LUT4_O_I2_SB_LUT4_I0_O[2]_$glb_sr +.sym 10638 rx_09_fifo.full_o_SB_LUT4_I3_O[1] +.sym 10639 rx_09_fifo.full_o_SB_LUT4_I3_O[2] +.sym 10640 rx_09_fifo.wr_addr_gray_SB_LUT4_I2_1_O[4] +.sym 10641 rx_09_fifo.wr_addr_gray_SB_LUT4_I2_1_O[5] +.sym 10642 rx_09_fifo.wr_addr_gray_SB_LUT4_I2_1_O[6] +.sym 10643 rx_09_fifo.wr_addr_gray_SB_LUT4_I2_1_O[7] +.sym 10650 i_smi_soe_se$rename$0 +.sym 10651 rx_09_fifo.rd_addr_gray_SB_LUT4_I2_O[7] +.sym 10655 i_smi_a2_SB_LUT4_I1_O_SB_LUT4_I3_1_I2[2] +.sym 10662 rx_09_fifo.full_o_SB_DFFSR_Q_D_SB_LUT4_O_I1_SB_LUT4_O_I0_SB_LUT4_O_1_I3[1] +.sym 10666 rx_09_fifo.full_o_SB_DFFSR_Q_D_SB_LUT4_O_I1_SB_LUT4_O_I0[1] +.sym 10667 smi_ctrl_ins.int_cnt_09_SB_DFFESR_Q_D_SB_LUT4_O_I3[1] +.sym 10668 rx_09_fifo.full_o_SB_DFFSR_Q_D_SB_LUT4_O_I1_SB_LUT4_O_I0_SB_LUT4_O_I0[1] +.sym 10670 rx_09_fifo.rd_addr_gray_wr_r[6] +.sym 10671 spi_if_ins.r_tx_data_valid_SB_DFFESR_Q_D_SB_LUT4_I3_O .sym 10685 rx_09_fifo.wr_addr[0] -.sym 10687 rx_09_fifo.wr_addr_gray_SB_LUT4_I2_1_O[2] -.sym 10699 rx_09_fifo.wr_addr_gray_SB_DFFESR_Q_7_D[1] -.sym 10702 rx_09_fifo.wr_addr_gray_SB_DFFESR_Q_7_D[2] -.sym 10706 rx_09_fifo.wr_addr_gray_SB_DFFESR_Q_5_D[2] -.sym 10708 rx_09_fifo.wr_addr_gray_SB_DFFESR_Q_5_D[1] +.sym 10689 rx_09_fifo.wr_addr_gray_SB_DFFESR_Q_4_D[1] +.sym 10695 rx_09_fifo.full_o_SB_LUT4_I3_O[1] +.sym 10696 rx_09_fifo.full_o_SB_LUT4_I3_O[2] +.sym 10697 rx_09_fifo.wr_addr_gray_SB_LUT4_I2_1_O[4] +.sym 10699 rx_09_fifo.wr_addr_gray_SB_LUT4_I2_1_O[6] +.sym 10701 rx_09_fifo.wr_addr_gray_SB_LUT4_I2_1_O[1] +.sym 10704 lvds_rx_09_inst.r_push_SB_LUT4_I3_1_O +.sym 10706 rx_09_fifo.wr_addr_gray_SB_LUT4_I2_1_O[5] .sym 10713 rx_09_fifo.wr_addr[0] -.sym 10717 rx_09_fifo.wr_addr_gray_SB_DFFESR_Q_5_D[2] -.sym 10724 rx_09_fifo.wr_addr_gray_SB_LUT4_I2_1_O[6] -.sym 10731 rx_09_fifo.wr_addr_gray_SB_DFFESR_Q_5_D[1] -.sym 10736 rx_09_fifo.wr_addr_gray_SB_DFFESR_Q_7_D[1] -.sym 10743 rx_09_fifo.wr_addr_gray_SB_DFFESR_Q_7_D[2] -.sym 10749 rx_09_fifo.full_o_SB_LUT4_I3_O[1] -.sym 10752 rx_09_fifo.wr_addr_gray_SB_LUT4_I2_1_O[2] -.sym 10756 lvds_rx_09_inst.r_push_SB_LUT4_I3_O +.sym 10716 rx_09_fifo.full_o_SB_LUT4_I3_O[2] +.sym 10722 rx_09_fifo.wr_addr_gray_SB_LUT4_I2_1_O[5] +.sym 10730 rx_09_fifo.wr_addr_gray_SB_DFFESR_Q_4_D[1] +.sym 10734 rx_09_fifo.wr_addr_gray_SB_LUT4_I2_1_O[4] +.sym 10740 rx_09_fifo.wr_addr_gray_SB_LUT4_I2_1_O[1] +.sym 10746 rx_09_fifo.full_o_SB_LUT4_I3_O[1] +.sym 10753 rx_09_fifo.wr_addr_gray_SB_LUT4_I2_1_O[6] +.sym 10756 lvds_rx_09_inst.r_push_SB_LUT4_I3_1_O .sym 10757 lvds_clock_buf -.sym 10758 i_smi_a1_SB_LUT4_I1_O[2]_$glb_sr -.sym 10759 rx_09_fifo.full_o_SB_DFFSR_Q_D_SB_LUT4_O_I0[3] -.sym 10760 rx_09_fifo.full_o_SB_LUT4_I3_O_SB_LUT4_I3_O[3] -.sym 10761 rx_09_fifo.full_o_SB_DFFSR_Q_D_SB_LUT4_O_I0_SB_LUT4_O_I2[1] -.sym 10762 rx_09_fifo.wr_addr_gray[3] -.sym 10763 rx_09_fifo.wr_addr_gray[5] -.sym 10764 rx_09_fifo.wr_addr_gray[6] -.sym 10765 rx_09_fifo.full_o_SB_LUT4_I3_O_SB_LUT4_I3_O[0] -.sym 10766 rx_09_fifo.full_o_SB_LUT4_I3_O_SB_LUT4_I3_O[1] -.sym 10777 io_pmod_SB_DFFSS_Q_D_SB_LUT4_O_I0[3] -.sym 10783 rx_09_fifo.wr_addr[4] -.sym 10784 rx_09_fifo.wr_addr[6] -.sym 10787 rx_09_fifo.wr_addr[7] -.sym 10790 rx_09_fifo.full_o_SB_DFFSR_Q_D_SB_LUT4_O_I0_SB_LUT4_O_1_I0[2] -.sym 10792 rx_09_fifo.wr_addr[3] -.sym 10793 lvds_rx_09_inst.r_push_SB_LUT4_I3_O -.sym 10800 rx_09_fifo.full_o_SB_LUT4_I3_O[2] -.sym 10802 lvds_rx_09_inst.r_push_SB_LUT4_I3_O -.sym 10803 rx_09_fifo.rd_addr_gray_wr_r[0] -.sym 10806 w_rx_09_fifo_push -.sym 10808 rx_09_fifo.wr_addr[0] -.sym 10811 rx_09_fifo.wr_addr_gray_SB_LUT4_I2_1_O[5] -.sym 10812 rx_09_fifo.full_o_SB_LUT4_I3_O[0] -.sym 10814 rx_09_fifo.full_o_SB_LUT4_I3_O[1] -.sym 10815 rx_09_fifo.wr_addr_gray_SB_LUT4_I2_1_O[7] -.sym 10824 w_rx_09_fifo_full -.sym 10825 rx_09_fifo.full_o_SB_LUT4_I3_O[3] -.sym 10830 i_smi_a1_SB_LUT4_I1_O[2] -.sym 10835 rx_09_fifo.wr_addr_gray_SB_LUT4_I2_1_O[5] -.sym 10840 w_rx_09_fifo_push -.sym 10841 i_smi_a1_SB_LUT4_I1_O[2] -.sym 10846 rx_09_fifo.rd_addr_gray_wr_r[0] -.sym 10848 rx_09_fifo.wr_addr[0] -.sym 10851 rx_09_fifo.full_o_SB_LUT4_I3_O[0] -.sym 10852 rx_09_fifo.full_o_SB_LUT4_I3_O[2] -.sym 10853 rx_09_fifo.full_o_SB_LUT4_I3_O[1] -.sym 10854 rx_09_fifo.full_o_SB_LUT4_I3_O[3] -.sym 10859 rx_09_fifo.full_o_SB_LUT4_I3_O[2] -.sym 10871 rx_09_fifo.wr_addr_gray_SB_LUT4_I2_1_O[7] -.sym 10877 w_rx_09_fifo_full -.sym 10879 lvds_rx_09_inst.r_push_SB_LUT4_I3_O +.sym 10758 i_smi_a1_SB_LUT4_I1_O_SB_LUT4_O_I2_SB_LUT4_I0_O[2]_$glb_sr +.sym 10759 rx_09_fifo.wr_addr_gray_SB_LUT4_I2_1_O[1] +.sym 10760 lvds_rx_09_inst.r_push_SB_LUT4_I3_I0[0] +.sym 10761 rx_09_fifo.full_o_SB_DFFSR_Q_D_SB_LUT4_O_I1[0] +.sym 10762 rx_09_fifo.full_o_SB_LUT4_I3_O[3] +.sym 10763 lvds_rx_09_inst.r_push_SB_LUT4_I3_O[2] +.sym 10764 w_rx_09_fifo_full +.sym 10765 lvds_rx_09_inst.r_push_SB_LUT4_I3_O[3] +.sym 10766 lvds_rx_09_inst.r_push_SB_LUT4_I3_I0[2] +.sym 10767 rx_09_fifo.wr_addr_gray_rd[3] +.sym 10777 smi_ctrl_ins.r_fifo_24_pull_SB_LUT4_I1_O[2] +.sym 10779 rx_09_fifo.wr_addr_gray[3] +.sym 10784 rx_09_fifo.wr_addr[5] +.sym 10786 w_rx_09_fifo_push +.sym 10788 rx_09_fifo.wr_addr[4] +.sym 10790 lvds_rx_09_inst.r_push_SB_LUT4_I3_1_O +.sym 10792 i_smi_soe_se$rename$0 +.sym 10802 lvds_rx_09_inst.r_state_if_SB_LUT4_I2_O[0] +.sym 10804 rx_09_fifo.wr_addr[7] +.sym 10806 rx_09_fifo.wr_addr[2] +.sym 10807 rx_09_fifo.wr_addr[6] +.sym 10809 rx_09_fifo.wr_addr[3] +.sym 10810 rx_09_fifo.wr_addr[5] +.sym 10812 rx_09_fifo.wr_addr[4] +.sym 10813 rx_09_fifo.full_o_SB_DFFSR_Q_D_SB_LUT4_O_I1_SB_LUT4_O_I0_SB_LUT4_O_1_I3[1] +.sym 10815 w_rx_09_fifo_data[0] +.sym 10832 $nextpnr_ICESTORM_LC_4$O +.sym 10835 rx_09_fifo.full_o_SB_DFFSR_Q_D_SB_LUT4_O_I1_SB_LUT4_O_I0_SB_LUT4_O_1_I3[1] +.sym 10838 rx_09_fifo.wr_addr_gray_SB_LUT4_I2_I3[2] +.sym 10840 rx_09_fifo.wr_addr[2] +.sym 10842 rx_09_fifo.full_o_SB_DFFSR_Q_D_SB_LUT4_O_I1_SB_LUT4_O_I0_SB_LUT4_O_1_I3[1] +.sym 10844 rx_09_fifo.wr_addr_gray_SB_LUT4_I2_I3[3] +.sym 10847 rx_09_fifo.wr_addr[3] +.sym 10848 rx_09_fifo.wr_addr_gray_SB_LUT4_I2_I3[2] +.sym 10850 rx_09_fifo.wr_addr_gray_SB_LUT4_I2_I3[4] +.sym 10853 rx_09_fifo.wr_addr[4] +.sym 10854 rx_09_fifo.wr_addr_gray_SB_LUT4_I2_I3[3] +.sym 10856 rx_09_fifo.wr_addr_gray_SB_LUT4_I2_I3[5] +.sym 10858 rx_09_fifo.wr_addr[5] +.sym 10860 rx_09_fifo.wr_addr_gray_SB_LUT4_I2_I3[4] +.sym 10862 rx_09_fifo.wr_addr_gray_SB_LUT4_I2_I3[6] +.sym 10865 rx_09_fifo.wr_addr[6] +.sym 10866 rx_09_fifo.wr_addr_gray_SB_LUT4_I2_I3[5] +.sym 10869 rx_09_fifo.wr_addr[7] +.sym 10872 rx_09_fifo.wr_addr_gray_SB_LUT4_I2_I3[6] +.sym 10876 lvds_rx_09_inst.r_state_if_SB_LUT4_I2_O[0] +.sym 10878 w_rx_09_fifo_data[0] +.sym 10879 w_lvds_rx_09_d1_SB_LUT4_I0_O_SB_LUT4_I3_O_$glb_ce .sym 10880 lvds_clock_buf -.sym 10881 i_smi_a1_SB_LUT4_I1_O[2]_$glb_sr -.sym 10882 w_rx_09_fifo_full -.sym 10883 rx_09_fifo.full_o_SB_DFFSR_Q_D_SB_LUT4_O_I0_SB_LUT4_O_I0[2] -.sym 10884 rx_09_fifo.full_o_SB_DFFSR_Q_D_SB_LUT4_O_I0[0] -.sym 10885 rx_09_fifo.full_o_SB_DFFSR_Q_D_SB_LUT4_O_I0[1] -.sym 10886 rx_09_fifo.full_o_SB_DFFSR_Q_D_SB_LUT4_O_I0_SB_LUT4_O_I2[2] -.sym 10888 rx_09_fifo.full_o_SB_DFFSR_Q_D_SB_LUT4_O_I0_SB_LUT4_O_I2[3] -.sym 10889 rx_09_fifo.full_o_SB_DFFSR_Q_D_SB_LUT4_O_I0_SB_LUT4_O_1_I0[0] -.sym 10898 lvds_rx_09_inst.r_push_SB_LUT4_I3_O -.sym 10916 i_smi_a1_SB_LUT4_I1_O[2] -.sym 10925 rx_09_fifo.full_o_SB_DFFSR_Q_D_SB_LUT4_O_I0_SB_LUT4_O_I2[1] -.sym 10928 rx_09_fifo.full_o_SB_DFFSR_Q_D_SB_LUT4_O_I0_SB_LUT4_O_1_I1[5] -.sym 10929 rx_09_fifo.wr_addr[7] -.sym 10931 rx_09_fifo.wr_addr[5] -.sym 10934 rx_09_fifo.rd_addr_gray_wr_r[7] -.sym 10935 rx_09_fifo.wr_addr[4] -.sym 10936 rx_09_fifo.wr_addr[3] -.sym 10937 rx_09_fifo.wr_addr[2] -.sym 10944 rx_09_fifo.wr_addr[6] -.sym 10945 rx_09_fifo.full_o_SB_DFFSR_Q_D_SB_LUT4_O_I0_SB_LUT4_O_1_I1[6] -.sym 10947 rx_09_fifo.rd_addr_gray_wr_r[6] -.sym 10955 $nextpnr_ICESTORM_LC_5$O -.sym 10958 rx_09_fifo.full_o_SB_DFFSR_Q_D_SB_LUT4_O_I0_SB_LUT4_O_I2[1] -.sym 10961 rx_09_fifo.wr_addr_gray_SB_LUT4_I2_I3[2] -.sym 10964 rx_09_fifo.wr_addr[2] -.sym 10965 rx_09_fifo.full_o_SB_DFFSR_Q_D_SB_LUT4_O_I0_SB_LUT4_O_I2[1] -.sym 10967 rx_09_fifo.wr_addr_gray_SB_LUT4_I2_I3[3] -.sym 10970 rx_09_fifo.wr_addr[3] -.sym 10971 rx_09_fifo.wr_addr_gray_SB_LUT4_I2_I3[2] -.sym 10973 rx_09_fifo.wr_addr_gray_SB_LUT4_I2_I3[4] -.sym 10976 rx_09_fifo.wr_addr[4] -.sym 10977 rx_09_fifo.wr_addr_gray_SB_LUT4_I2_I3[3] -.sym 10979 rx_09_fifo.wr_addr_gray_SB_LUT4_I2_I3[5] -.sym 10981 rx_09_fifo.wr_addr[5] -.sym 10983 rx_09_fifo.wr_addr_gray_SB_LUT4_I2_I3[4] -.sym 10985 rx_09_fifo.wr_addr_gray_SB_LUT4_I2_I3[6] -.sym 10988 rx_09_fifo.wr_addr[6] -.sym 10989 rx_09_fifo.wr_addr_gray_SB_LUT4_I2_I3[5] -.sym 10994 rx_09_fifo.wr_addr[7] -.sym 10995 rx_09_fifo.wr_addr_gray_SB_LUT4_I2_I3[6] -.sym 10998 rx_09_fifo.full_o_SB_DFFSR_Q_D_SB_LUT4_O_I0_SB_LUT4_O_1_I1[5] -.sym 10999 rx_09_fifo.rd_addr_gray_wr_r[7] -.sym 11000 rx_09_fifo.rd_addr_gray_wr_r[6] -.sym 11001 rx_09_fifo.full_o_SB_DFFSR_Q_D_SB_LUT4_O_I0_SB_LUT4_O_1_I1[6] -.sym 11006 smi_ctrl_ins.r_fifo_24_pull_SB_LUT4_I3_O -.sym 11008 $io_pmod[4]$iobuf_i -.sym 11017 rx_09_fifo.rd_addr_gray[2] -.sym 11018 io_pmod[7]$SB_IO_IN -.sym 11019 $io_pmod[5]$iobuf_i -.sym 11020 $PACKER_VCC_NET -.sym 11021 rx_09_fifo.full_o_SB_DFFSR_Q_D_SB_LUT4_O_I0_SB_LUT4_O_I0[1] -.sym 11023 rx_09_fifo.rd_addr_gray_wr_r[2] -.sym 11027 w_rx_09_fifo_push -.sym 11033 rx_24_fifo.wr_addr_gray_rd_r[3] -.sym 11040 smi_ctrl_ins.r_fifo_24_pull_SB_LUT4_I3_O -.sym 11050 $PACKER_VCC_NET -.sym 11051 rx_24_fifo.rd_addr[0] -.sym 11058 $PACKER_VCC_NET -.sym 11060 rx_24_fifo.rd_addr_gray_SB_LUT4_I2_O[6] -.sym 11061 rx_24_fifo.rd_addr_gray_SB_LUT4_I2_O[7] -.sym 11064 smi_ctrl_ins.r_fifo_24_pull_SB_LUT4_I3_O -.sym 11067 smi_ctrl_ins.int_cnt_24[5] -.sym 11068 smi_ctrl_ins.int_cnt_24[4] -.sym 11072 i_smi_a2_SB_LUT4_I1_O_SB_LUT4_I3_1_I2_SB_LUT4_O_I3[1] -.sym 11078 $nextpnr_ICESTORM_LC_0$O -.sym 11080 i_smi_a2_SB_LUT4_I1_O_SB_LUT4_I3_1_I2_SB_LUT4_O_I3[1] -.sym 11084 i_smi_a2_SB_LUT4_I1_O_SB_LUT4_I3_1_I2_SB_LUT4_O_I3[2] -.sym 11086 smi_ctrl_ins.int_cnt_24[4] -.sym 11087 $PACKER_VCC_NET -.sym 11092 smi_ctrl_ins.int_cnt_24[5] -.sym 11093 $PACKER_VCC_NET -.sym 11094 i_smi_a2_SB_LUT4_I1_O_SB_LUT4_I3_1_I2_SB_LUT4_O_I3[2] -.sym 11097 rx_24_fifo.rd_addr_gray_SB_LUT4_I2_O[6] -.sym 11103 rx_24_fifo.rd_addr_gray_SB_LUT4_I2_O[7] -.sym 11111 rx_24_fifo.rd_addr[0] -.sym 11115 smi_ctrl_ins.int_cnt_24[4] -.sym 11116 i_smi_a2_SB_LUT4_I1_O_SB_LUT4_I3_1_I2_SB_LUT4_O_I3[1] -.sym 11118 $PACKER_VCC_NET -.sym 11125 smi_ctrl_ins.r_fifo_24_pull_SB_LUT4_I3_O +.sym 10881 i_smi_a1_SB_LUT4_I1_O_SB_LUT4_O_I2_SB_LUT4_I0_O[2]_$glb_sr +.sym 10883 spi_if_ins.r_tx_byte[0] +.sym 10884 rx_09_fifo.full_o_SB_DFFSR_Q_D_SB_LUT4_O_I1_SB_LUT4_O_I0_SB_LUT4_O_I0[0] +.sym 10885 lvds_rx_09_inst.r_push_SB_LUT4_I3_I0[1] +.sym 10887 smi_ctrl_ins.int_cnt_09_SB_DFFESR_Q_E +.sym 10894 lvds_rx_09_inst.r_push_SB_LUT4_I3_O[0] +.sym 10898 smi_ctrl_ins.int_cnt_24[5] +.sym 10900 rx_09_fifo.rd_addr_gray_wr_r[0] +.sym 10903 w_rx_09_fifo_data[0] +.sym 10923 smi_ctrl_ins.r_fifo_24_pull_SB_LUT4_I1_O[2] +.sym 10924 lvds_rx_09_inst.r_push_SB_LUT4_I3_O_SB_LUT4_O_I3[1] +.sym 10925 lvds_rx_09_inst.r_push_SB_LUT4_I3_O_SB_LUT4_O_I3[2] +.sym 10926 lvds_rx_09_inst.r_push_SB_LUT4_I3_O_SB_LUT4_O_I3[3] +.sym 10927 lvds_rx_09_inst.r_push_SB_LUT4_I3_O_SB_LUT4_O_I3[4] +.sym 10928 rx_09_fifo.full_o_SB_DFFSR_Q_D_SB_LUT4_O_I1_SB_LUT4_O_I0[0] +.sym 10929 smi_ctrl_ins.int_cnt_09[5] +.sym 10930 i_smi_a2_SB_LUT4_I1_O_SB_LUT4_O_I3[5] +.sym 10932 io_pmod[2]$SB_IO_IN +.sym 10933 smi_ctrl_ins.int_cnt_09[3] +.sym 10934 rx_09_fifo.full_o_SB_DFFSR_Q_D_SB_LUT4_O_I1_SB_LUT4_O_I0_SB_LUT4_O_1_I3[1] +.sym 10935 smi_ctrl_ins.int_cnt_09[4] +.sym 10936 w_rx_09_fifo_full +.sym 10938 rx_09_fifo.full_o_SB_DFFSR_Q_D_SB_LUT4_O_I1_SB_LUT4_O_I0[1] +.sym 10940 rx_09_fifo.full_o_SB_DFFSR_Q_D_SB_LUT4_O_I1_SB_LUT4_O_I0_SB_LUT4_O_I0[1] +.sym 10941 rx_09_fifo.full_o_SB_DFFSR_Q_D_SB_LUT4_O_I1_SB_LUT4_O_I0_SB_LUT4_O_I0[0] +.sym 10942 rx_09_fifo.full_o_SB_DFFSR_Q_D_SB_LUT4_O_I1_SB_LUT4_O_I0[3] +.sym 10943 rx_09_fifo.full_o_SB_DFFSR_Q_D_SB_LUT4_O_I1_SB_LUT4_O_I0[2] +.sym 10946 rx_09_fifo.full_o_SB_DFFSR_Q_D_SB_LUT4_O_I1_SB_LUT4_O_I0_SB_LUT4_O_1_I3[3] +.sym 10947 lvds_rx_09_inst.r_push_SB_DFFNESR_Q_E_SB_LUT4_O_I1_SB_LUT4_O_I2[3] +.sym 10948 rx_09_fifo.full_o_SB_DFFSR_Q_D_SB_LUT4_O_I1_SB_LUT4_O_I0_SB_LUT4_O_1_I3[0] +.sym 10949 i_smi_a2_SB_LUT4_I1_O_SB_LUT4_O_I3_SB_LUT4_I0_I1[5] +.sym 10950 lvds_rx_09_inst.r_push_SB_DFFNESR_Q_E +.sym 10952 i_smi_soe_se$rename$0 +.sym 10953 lvds_rx_09_inst.r_push_SB_DFFNESR_Q_E_SB_LUT4_O_I1_SB_LUT4_O_I2[2] +.sym 10956 smi_ctrl_ins.r_fifo_24_pull_SB_LUT4_I1_O[2] +.sym 10957 i_smi_a2_SB_LUT4_I1_O_SB_LUT4_O_I3[5] +.sym 10958 i_smi_soe_se$rename$0 +.sym 10959 i_smi_a2_SB_LUT4_I1_O_SB_LUT4_O_I3_SB_LUT4_I0_I1[5] +.sym 10962 smi_ctrl_ins.int_cnt_09[4] +.sym 10963 io_pmod[2]$SB_IO_IN +.sym 10964 smi_ctrl_ins.int_cnt_09[3] +.sym 10965 smi_ctrl_ins.int_cnt_09[5] +.sym 10969 lvds_rx_09_inst.r_push_SB_DFFNESR_Q_E_SB_LUT4_O_I1_SB_LUT4_O_I2[3] +.sym 10971 lvds_rx_09_inst.r_push_SB_DFFNESR_Q_E_SB_LUT4_O_I1_SB_LUT4_O_I2[2] +.sym 10974 rx_09_fifo.full_o_SB_DFFSR_Q_D_SB_LUT4_O_I1_SB_LUT4_O_I0_SB_LUT4_O_1_I3[3] +.sym 10975 rx_09_fifo.full_o_SB_DFFSR_Q_D_SB_LUT4_O_I1_SB_LUT4_O_I0_SB_LUT4_O_1_I3[0] +.sym 10976 lvds_rx_09_inst.r_push_SB_LUT4_I3_O_SB_LUT4_O_I3[1] +.sym 10977 rx_09_fifo.full_o_SB_DFFSR_Q_D_SB_LUT4_O_I1_SB_LUT4_O_I0_SB_LUT4_O_1_I3[1] +.sym 10981 lvds_rx_09_inst.r_push_SB_LUT4_I3_O_SB_LUT4_O_I3[3] +.sym 10982 lvds_rx_09_inst.r_push_SB_LUT4_I3_O_SB_LUT4_O_I3[4] +.sym 10986 lvds_rx_09_inst.r_push_SB_LUT4_I3_O_SB_LUT4_O_I3[3] +.sym 10987 lvds_rx_09_inst.r_push_SB_LUT4_I3_O_SB_LUT4_O_I3[2] +.sym 10988 rx_09_fifo.full_o_SB_DFFSR_Q_D_SB_LUT4_O_I1_SB_LUT4_O_I0_SB_LUT4_O_I0[1] +.sym 10989 rx_09_fifo.full_o_SB_DFFSR_Q_D_SB_LUT4_O_I1_SB_LUT4_O_I0_SB_LUT4_O_I0[0] +.sym 10992 rx_09_fifo.full_o_SB_DFFSR_Q_D_SB_LUT4_O_I1_SB_LUT4_O_I0[2] +.sym 10993 rx_09_fifo.full_o_SB_DFFSR_Q_D_SB_LUT4_O_I1_SB_LUT4_O_I0[0] +.sym 10994 rx_09_fifo.full_o_SB_DFFSR_Q_D_SB_LUT4_O_I1_SB_LUT4_O_I0[1] +.sym 10995 rx_09_fifo.full_o_SB_DFFSR_Q_D_SB_LUT4_O_I1_SB_LUT4_O_I0[3] +.sym 10998 lvds_rx_09_inst.r_push_SB_DFFNESR_Q_E_SB_LUT4_O_I1_SB_LUT4_O_I2[3] +.sym 10999 w_rx_09_fifo_full +.sym 11000 lvds_rx_09_inst.r_push_SB_DFFNESR_Q_E_SB_LUT4_O_I1_SB_LUT4_O_I2[2] +.sym 11002 lvds_rx_09_inst.r_push_SB_DFFNESR_Q_E +.sym 11003 lvds_clock_buf +.sym 11004 i_smi_a1_SB_LUT4_I1_O_SB_LUT4_O_I2_SB_LUT4_I0_O[2]_$glb_sr +.sym 11005 w_tx_data_smi[1] +.sym 11007 w_tx_data_smi[2] +.sym 11012 w_tx_data_smi[0] +.sym 11017 smi_ctrl_ins.r_fifo_24_pull_SB_LUT4_I1_O[2] +.sym 11022 rx_09_fifo.full_o_SB_LUT4_I3_O[0] +.sym 11023 lvds_rx_09_inst.r_state_if_SB_LUT4_I2_O[0] +.sym 11026 spi_if_ins.r_tx_byte[0] +.sym 11029 spi_if_ins.state_if_SB_DFFE_Q_E +.sym 11030 lvds_rx_09_inst.r_state_if_SB_LUT4_I2_O[0] +.sym 11034 rx_09_fifo.full_o_SB_DFFSR_Q_D_SB_LUT4_O_I1_SB_LUT4_O_I0_SB_LUT4_O_1_I3[0] +.sym 11046 spi_if_ins.r_tx_data_valid_SB_DFFESR_Q_D[0] +.sym 11048 spi_if_ins.state_if_SB_DFFE_Q_E +.sym 11050 spi_if_ins.state_if_SB_DFFE_Q_E +.sym 11051 spi_if_ins.state_if_SB_DFFESR_Q_D[2] +.sym 11053 spi_if_ins.state_if[1] +.sym 11054 spi_if_ins.r_tx_data_valid_SB_DFFESR_Q_D[0] +.sym 11059 spi_if_ins.o_load_cmd_SB_DFFESR_Q_D_SB_LUT4_I1_O[0] +.sym 11062 spi_if_ins.state_if_SB_DFFESR_Q_D[0] +.sym 11069 spi_if_ins.o_load_cmd_SB_DFFESR_Q_D[1] +.sym 11077 spi_if_ins.state_if[0] +.sym 11080 spi_if_ins.o_load_cmd_SB_DFFESR_Q_D[1] +.sym 11081 spi_if_ins.state_if[0] +.sym 11082 spi_if_ins.state_if[1] +.sym 11091 spi_if_ins.state_if_SB_DFFE_Q_E +.sym 11103 spi_if_ins.state_if[0] +.sym 11104 spi_if_ins.o_load_cmd_SB_DFFESR_Q_D[1] +.sym 11105 spi_if_ins.r_tx_data_valid_SB_DFFESR_Q_D[0] +.sym 11106 spi_if_ins.state_if[1] +.sym 11109 spi_if_ins.state_if[1] +.sym 11111 spi_if_ins.o_load_cmd_SB_DFFESR_Q_D[1] +.sym 11112 spi_if_ins.state_if[0] +.sym 11121 spi_if_ins.state_if_SB_DFFESR_Q_D[2] +.sym 11122 spi_if_ins.o_load_cmd_SB_DFFESR_Q_D_SB_LUT4_I1_O[0] +.sym 11123 spi_if_ins.r_tx_data_valid_SB_DFFESR_Q_D[0] +.sym 11124 spi_if_ins.state_if_SB_DFFESR_Q_D[0] +.sym 11125 spi_if_ins.state_if_SB_DFFE_Q_E .sym 11126 r_counter[0]_$glb_clk -.sym 11127 i_smi_a1_SB_LUT4_I1_O[2]_$glb_sr -.sym 11128 w_tx_data_smi[2] -.sym 11129 w_tx_data_smi[1] -.sym 11130 w_tx_data_smi[0] -.sym 11132 w_tx_data_smi[3] -.sym 11135 rx_24_fifo.empty_o_SB_LUT4_I3_O_SB_LUT4_O_1_I3[3] -.sym 11141 w_rx_09_fifo_data[0] -.sym 11143 lvds_rx_09_inst.r_state_if_SB_LUT4_I2_O[0] -.sym 11146 $PACKER_VCC_NET +.sym 11129 w_rx_24_fifo_data[20] +.sym 11130 spi_if_ins.o_cs_SB_LUT4_I2_2_O[3] +.sym 11131 spi_if_ins.o_fetch_cmd_SB_DFFESR_Q_E +.sym 11132 spi_if_ins.r_tx_data_valid_SB_DFFESR_Q_E +.sym 11133 spi_if_ins.o_load_cmd_SB_DFFESR_Q_D_SB_LUT4_I1_O[2] +.sym 11134 spi_if_ins.o_load_cmd_SB_DFFESR_Q_D[0] +.sym 11135 w_rx_24_fifo_data[31] +.sym 11140 spi_if_ins.r_tx_data_valid_SB_DFFESR_Q_D[0] +.sym 11141 w_rx_24_fifo_empty +.sym 11144 spi_if_ins.state_if_SB_DFFE_Q_E +.sym 11146 io_pmod[2]$SB_IO_IN .sym 11147 i_smi_soe_se$rename$0 -.sym 11149 w_rx_24_fifo_pull -.sym 11153 rx_24_fifo.empty_o_SB_LUT4_I3_O_SB_LUT4_O_I0[2] -.sym 11154 rx_24_fifo.empty_o_SB_LUT4_I3_O_SB_LUT4_O_1_I3[2] -.sym 11158 rx_24_fifo.rd_addr[5] -.sym 11159 rx_24_fifo.rd_addr[0] -.sym 11160 i_smi_a1_SB_LUT4_I1_O[2] -.sym 11162 rx_24_fifo.empty_o_SB_LUT4_I3_O_SB_LUT4_O_1_I3[1] -.sym 11174 rx_24_fifo.rd_addr[0] -.sym 11180 rx_24_fifo.rd_addr[6] -.sym 11181 rx_24_fifo.rd_addr[7] -.sym 11182 rx_24_fifo.rd_addr[0] -.sym 11183 rx_24_fifo.empty_o_SB_LUT4_I3_O_SB_LUT4_O_I0[1] -.sym 11194 rx_24_fifo.rd_addr[5] -.sym 11196 rx_24_fifo.empty_o_SB_LUT4_I3_O_SB_LUT4_O_1_I3[1] -.sym 11198 rx_24_fifo.rd_addr[4] -.sym 11200 rx_24_fifo.empty_o_SB_LUT4_I3_O_SB_LUT4_O_1_I3[2] -.sym 11201 $nextpnr_ICESTORM_LC_8$O -.sym 11203 rx_24_fifo.rd_addr[0] -.sym 11207 rx_24_fifo.rd_addr_gray_SB_LUT4_I2_I3[2] -.sym 11210 rx_24_fifo.empty_o_SB_LUT4_I3_O_SB_LUT4_O_I0[1] -.sym 11211 rx_24_fifo.rd_addr[0] -.sym 11213 rx_24_fifo.rd_addr_gray_SB_LUT4_I2_I3[3] -.sym 11216 rx_24_fifo.empty_o_SB_LUT4_I3_O_SB_LUT4_O_1_I3[1] -.sym 11217 rx_24_fifo.rd_addr_gray_SB_LUT4_I2_I3[2] -.sym 11219 rx_24_fifo.rd_addr_gray_SB_LUT4_I2_I3[4] -.sym 11221 rx_24_fifo.empty_o_SB_LUT4_I3_O_SB_LUT4_O_1_I3[2] -.sym 11223 rx_24_fifo.rd_addr_gray_SB_LUT4_I2_I3[3] -.sym 11225 rx_24_fifo.rd_addr_gray_SB_LUT4_I2_I3[5] -.sym 11228 rx_24_fifo.rd_addr[4] -.sym 11229 rx_24_fifo.rd_addr_gray_SB_LUT4_I2_I3[4] -.sym 11231 rx_24_fifo.rd_addr_gray_SB_LUT4_I2_I3[6] -.sym 11233 rx_24_fifo.rd_addr[5] -.sym 11235 rx_24_fifo.rd_addr_gray_SB_LUT4_I2_I3[5] -.sym 11237 rx_24_fifo.rd_addr_gray_SB_LUT4_I2_I3[7] -.sym 11240 rx_24_fifo.rd_addr[6] -.sym 11241 rx_24_fifo.rd_addr_gray_SB_LUT4_I2_I3[6] -.sym 11246 rx_24_fifo.rd_addr[7] -.sym 11247 rx_24_fifo.rd_addr_gray_SB_LUT4_I2_I3[7] -.sym 11252 rx_24_fifo.rd_addr[5] -.sym 11253 rx_24_fifo.empty_o_SB_LUT4_I3_O[2] -.sym 11254 rx_24_fifo.empty_o_SB_LUT4_I3_O_SB_LUT4_O_1_I3[1] -.sym 11255 smi_ctrl_ins.o_data_out_SB_LUT4_I1_O[2] -.sym 11256 rx_24_fifo.rd_addr[4] -.sym 11258 rx_24_fifo.empty_o_SB_LUT4_I3_O_SB_LUT4_O_1_I3[2] -.sym 11265 spi_if_ins.o_cs_SB_LUT4_I3_1_O -.sym 11274 io_ctrl_ins.led0_state_SB_LUT4_I3_I0[0] -.sym 11275 w_rx_24_fifo_empty -.sym 11277 rx_24_fifo.empty_o_SB_LUT4_I3_O_SB_LUT4_O_1_I3[0] -.sym 11278 rx_24_fifo.rd_addr_gray_SB_LUT4_I2_O[3] -.sym 11280 rx_24_fifo.empty_o_SB_DFFSS_Q_D_SB_LUT4_O_I0_SB_LUT4_O_I0[1] -.sym 11282 rx_24_fifo.empty_o_SB_DFFSS_Q_D_SB_LUT4_O_I0_SB_LUT4_O_I0[3] -.sym 11284 rx_24_fifo.rd_addr_gray_SB_LUT4_I2_O[6] -.sym 11285 $PACKER_VCC_NET -.sym 11294 rx_24_fifo.rd_addr_gray_SB_LUT4_I2_O[2] -.sym 11295 rx_24_fifo.rd_addr_gray_SB_LUT4_I2_O[3] -.sym 11297 rx_24_fifo.empty_o_SB_DFFSS_Q_D_SB_LUT4_O_I0_SB_LUT4_O_I0[3] -.sym 11301 rx_24_fifo.rd_addr_gray_SB_LUT4_I2_O[1] -.sym 11302 rx_24_fifo.rd_addr[0] -.sym 11304 rx_24_fifo.empty_o_SB_DFFSS_Q_D_SB_LUT4_O_I0_SB_LUT4_O_I0[1] -.sym 11306 rx_24_fifo.rd_addr_gray_SB_LUT4_I2_O[6] -.sym 11307 rx_24_fifo.rd_addr_gray_SB_LUT4_I2_O[7] -.sym 11310 smi_ctrl_ins.r_fifo_24_pull_SB_LUT4_I3_O -.sym 11326 rx_24_fifo.empty_o_SB_DFFSS_Q_D_SB_LUT4_O_I0_SB_LUT4_O_I0[3] -.sym 11328 rx_24_fifo.rd_addr_gray_SB_LUT4_I2_O[6] -.sym 11333 rx_24_fifo.rd_addr_gray_SB_LUT4_I2_O[6] -.sym 11334 rx_24_fifo.rd_addr_gray_SB_LUT4_I2_O[7] -.sym 11337 rx_24_fifo.rd_addr_gray_SB_LUT4_I2_O[2] -.sym 11340 rx_24_fifo.rd_addr_gray_SB_LUT4_I2_O[3] -.sym 11343 rx_24_fifo.empty_o_SB_DFFSS_Q_D_SB_LUT4_O_I0_SB_LUT4_O_I0[1] -.sym 11345 rx_24_fifo.empty_o_SB_DFFSS_Q_D_SB_LUT4_O_I0_SB_LUT4_O_I0[3] -.sym 11351 rx_24_fifo.rd_addr_gray_SB_LUT4_I2_O[1] -.sym 11352 rx_24_fifo.rd_addr[0] -.sym 11356 rx_24_fifo.rd_addr_gray_SB_LUT4_I2_O[2] -.sym 11358 rx_24_fifo.rd_addr_gray_SB_LUT4_I2_O[1] -.sym 11363 rx_24_fifo.rd_addr_gray_SB_LUT4_I2_O[1] -.sym 11367 rx_24_fifo.rd_addr_gray_SB_LUT4_I2_O[3] -.sym 11369 rx_24_fifo.empty_o_SB_DFFSS_Q_D_SB_LUT4_O_I0_SB_LUT4_O_I0[1] -.sym 11371 smi_ctrl_ins.r_fifo_24_pull_SB_LUT4_I3_O -.sym 11372 r_counter[0]_$glb_clk -.sym 11373 i_smi_a1_SB_LUT4_I1_O[2]_$glb_sr -.sym 11374 rx_24_fifo.empty_o_SB_LUT4_I3_O[1] -.sym 11376 io_ctrl_ins.o_data_out_SB_DFFESR_Q_6_E -.sym 11377 io_ctrl_ins.o_data_out_SB_DFFESR_Q_E[3] -.sym 11378 rx_24_fifo.empty_o_SB_DFFSS_Q_D_SB_LUT4_O_I0[2] -.sym 11379 rx_24_fifo.empty_o_SB_DFFSS_Q_D_SB_LUT4_O_I0[3] -.sym 11380 w_rx_24_fifo_empty -.sym 11381 rx_24_fifo.empty_o_SB_DFFSS_Q_D_SB_LUT4_O_I0[1] -.sym 11386 rx_24_fifo.rd_addr_gray[5] -.sym 11389 spi_if_ins.r_tx_data_valid_SB_DFFESR_Q_D_SB_LUT4_I3_O -.sym 11399 rx_24_fifo.rd_addr_gray_SB_DFFESR_Q_5_D[1] -.sym 11400 w_rx_24_fifo_full -.sym 11402 i_smi_a1_SB_LUT4_I1_O[2] -.sym 11403 rx_24_fifo.rd_addr_gray_SB_DFFESR_Q_7_D[1] -.sym 11405 rx_24_fifo.rd_addr_gray_SB_DFFESR_Q_7_D[3] -.sym 11416 rx_24_fifo.rd_addr[5] -.sym 11417 rx_24_fifo.full_o_SB_LUT4_I0_O[0] -.sym 11418 rx_24_fifo.empty_o_SB_LUT4_I3_O_SB_LUT4_O_1_I3[1] -.sym 11419 rx_24_fifo.wr_addr_gray_rd_r[5] -.sym 11420 rx_24_fifo.full_o_SB_LUT4_I0_O[3] -.sym 11421 rx_24_fifo.empty_o_SB_LUT4_I3_O_SB_LUT4_O_I0[2] -.sym 11422 rx_24_fifo.rd_addr[0] -.sym 11423 rx_24_fifo.empty_o_SB_LUT4_I3_O_SB_LUT4_O_I0[2] -.sym 11424 rx_24_fifo.empty_o_SB_LUT4_I3_O_SB_LUT4_O_1_I3[0] -.sym 11425 rx_24_fifo.rd_addr_gray_SB_DFFESR_Q_5_D[1] -.sym 11426 rx_24_fifo.rd_addr_gray_SB_DFFESR_Q_7_D[0] -.sym 11427 rx_24_fifo.rd_addr_gray_SB_DFFESR_Q_7_D[1] -.sym 11428 rx_24_fifo.rd_addr_gray_SB_DFFESR_Q_7_D[3] -.sym 11429 rx_24_fifo.empty_o_SB_LUT4_I3_O_SB_LUT4_O_I0[1] -.sym 11433 rx_24_fifo.empty_o_SB_LUT4_I3_O_SB_LUT4_O_I0[0] -.sym 11435 rx_24_fifo.full_o_SB_LUT4_I0_O[1] -.sym 11441 w_rx_24_fifo_push -.sym 11443 rx_24_fifo.rd_addr_gray_SB_DFFESR_Q_5_D[0] -.sym 11444 rx_24_fifo.rd_addr_gray_SB_LUT4_I2_O[6] -.sym 11445 rx_24_fifo.empty_o_SB_DFFSS_Q_D_SB_LUT4_O_I0_SB_LUT4_O_I0[3] -.sym 11446 rx_24_fifo.rd_addr_gray_SB_DFFESR_Q_5_D[3] -.sym 11448 rx_24_fifo.rd_addr_gray_SB_DFFESR_Q_5_D[3] -.sym 11449 rx_24_fifo.rd_addr_gray_SB_DFFESR_Q_5_D[1] -.sym 11450 rx_24_fifo.empty_o_SB_LUT4_I3_O_SB_LUT4_O_1_I3[0] -.sym 11451 rx_24_fifo.rd_addr_gray_SB_DFFESR_Q_5_D[0] -.sym 11462 rx_24_fifo.rd_addr_gray_SB_DFFESR_Q_7_D[0] +.sym 11150 spi_if_ins.r_tx_data_valid_SB_LUT4_I3_O[2] +.sym 11151 io_ctrl_ins.o_data_out_SB_DFFESR_Q_6_R[0] +.sym 11158 spi_if_ins.r_tx_data_valid_SB_DFFESR_Q_D_SB_LUT4_I3_O +.sym 11160 w_fetch +.sym 11163 spi_if_ins.state_if[1] +.sym 11169 rx_24_fifo.rd_addr_gray_SB_DFFESR_Q_7_D_SB_LUT4_I3_O_SB_LUT4_O_I0[1] +.sym 11170 rx_24_fifo.rd_addr_gray_SB_DFFESR_Q_7_D_SB_LUT4_I3_O_SB_LUT4_O_I0[3] +.sym 11174 rx_24_fifo.wr_addr_gray_rd_r[7] +.sym 11176 spi_if_ins.o_load_cmd_SB_DFFESR_Q_D[1] +.sym 11177 w_rx_24_fifo_pull +.sym 11179 rx_24_fifo.rd_addr_gray_SB_DFFESR_Q_6_D[2] +.sym 11182 spi_if_ins.state_if_SB_DFFESR_Q_1_R +.sym 11184 rx_24_fifo.rd_addr_gray_SB_DFFESR_Q_7_D_SB_LUT4_I3_O_SB_LUT4_O_I0[2] +.sym 11190 i_smi_a1_SB_LUT4_I1_O_SB_LUT4_O_I2_SB_LUT4_I0_O[2] +.sym 11191 rx_24_fifo.rd_addr[7] +.sym 11192 rx_24_fifo.rd_addr_gray_SB_DFFESR_Q_7_D_SB_LUT4_I3_O_SB_LUT4_O_I0[0] +.sym 11194 rx_24_fifo.rd_addr[6] +.sym 11196 spi_if_ins.o_fetch_cmd_SB_DFFESR_Q_E +.sym 11197 smi_ctrl_ins.r_fifo_24_pull_SB_LUT4_I3_1_O +.sym 11198 w_rx_24_fifo_empty +.sym 11199 spi_if_ins.o_load_cmd_SB_DFFESR_Q_D[0] +.sym 11200 rx_24_fifo.rd_addr_gray_SB_LUT4_I2_O[7] +.sym 11203 spi_if_ins.o_load_cmd_SB_DFFESR_Q_D[1] +.sym 11205 spi_if_ins.o_load_cmd_SB_DFFESR_Q_D[0] +.sym 11208 rx_24_fifo.wr_addr_gray_rd_r[7] +.sym 11209 rx_24_fifo.rd_addr[7] +.sym 11210 rx_24_fifo.rd_addr_gray_SB_DFFESR_Q_6_D[2] +.sym 11211 rx_24_fifo.rd_addr[6] +.sym 11215 smi_ctrl_ins.r_fifo_24_pull_SB_LUT4_I3_1_O +.sym 11220 rx_24_fifo.wr_addr_gray_rd_r[7] +.sym 11222 w_rx_24_fifo_pull +.sym 11223 rx_24_fifo.rd_addr_gray_SB_LUT4_I2_O[7] +.sym 11227 i_smi_a1_SB_LUT4_I1_O_SB_LUT4_O_I2_SB_LUT4_I0_O[2] +.sym 11229 w_rx_24_fifo_pull +.sym 11238 rx_24_fifo.rd_addr_gray_SB_DFFESR_Q_7_D_SB_LUT4_I3_O_SB_LUT4_O_I0[1] +.sym 11239 rx_24_fifo.rd_addr_gray_SB_DFFESR_Q_7_D_SB_LUT4_I3_O_SB_LUT4_O_I0[3] +.sym 11240 rx_24_fifo.rd_addr_gray_SB_DFFESR_Q_7_D_SB_LUT4_I3_O_SB_LUT4_O_I0[2] +.sym 11241 rx_24_fifo.rd_addr_gray_SB_DFFESR_Q_7_D_SB_LUT4_I3_O_SB_LUT4_O_I0[0] +.sym 11244 w_rx_24_fifo_pull +.sym 11245 w_rx_24_fifo_empty +.sym 11246 rx_24_fifo.wr_addr_gray_rd_r[7] +.sym 11247 rx_24_fifo.rd_addr[7] +.sym 11248 spi_if_ins.o_fetch_cmd_SB_DFFESR_Q_E +.sym 11249 r_counter[0]_$glb_clk +.sym 11250 spi_if_ins.state_if_SB_DFFESR_Q_1_R +.sym 11251 r_tx_data[0] +.sym 11252 spi_if_ins.r_tx_data_valid_SB_DFFESR_Q_D_SB_LUT4_I3_O +.sym 11253 spi_if_ins.r_tx_data_valid_SB_DFFESR_Q_E +.sym 11254 spi_if_ins.r_tx_data_valid_SB_DFFESR_Q_D[1] +.sym 11255 spi_if_ins.o_data_in_SB_DFFE_Q_E +.sym 11258 spi_if_ins.o_load_cmd_SB_DFFESR_Q_D_SB_LUT4_I1_O[1] +.sym 11259 lvds_rx_09_inst.r_state_if_SB_LUT4_I2_O[0] +.sym 11263 spi_if_ins.o_load_cmd_SB_DFFESR_Q_D_SB_LUT4_I1_O[0] +.sym 11276 spi_if_ins.o_data_in_SB_DFFE_Q_E +.sym 11278 rx_24_fifo.rd_addr_gray_SB_DFFESR_Q_7_D_SB_LUT4_I3_O_SB_LUT4_O_2_I0[2] +.sym 11282 w_rx_24_fifo_data[29] +.sym 11283 spi_if_ins.o_load_cmd_SB_DFFESR_Q_D[0] +.sym 11284 rx_24_fifo.rd_addr_gray_SB_DFFESR_Q_7_D_SB_LUT4_I3_O[0] +.sym 11286 w_rx_24_fifo_data[18] +.sym 11293 rx_24_fifo.rd_addr[0] +.sym 11294 spi_if_ins.o_load_cmd_SB_DFFESR_Q_D[1] +.sym 11296 spi_if_ins.r_tx_data_valid_SB_DFFESR_Q_D[0] +.sym 11301 rx_24_fifo.rd_addr[1] +.sym 11304 spi_if_ins.r_tx_data_valid_SB_DFFESR_Q_D[0] +.sym 11305 rx_24_fifo.rd_addr[7] +.sym 11306 spi_if_ins.state_if[0] +.sym 11310 rx_24_fifo.rd_addr_gray_wr[7] +.sym 11311 rx_24_fifo.rd_addr_gray_SB_DFFESR_Q_6_D[0] +.sym 11315 rx_24_fifo.rd_addr_gray_SB_DFFESR_Q_7_D[0] +.sym 11317 rx_24_fifo.rd_addr_gray_SB_DFFESR_Q_7_D_SB_LUT4_I3_O_SB_LUT4_O_I0_SB_LUT4_O_1_I0[0] +.sym 11322 rx_24_fifo.rd_addr[2] +.sym 11323 spi_if_ins.state_if[1] +.sym 11325 spi_if_ins.state_if[1] +.sym 11326 spi_if_ins.r_tx_data_valid_SB_DFFESR_Q_D[0] +.sym 11327 spi_if_ins.o_load_cmd_SB_DFFESR_Q_D[1] +.sym 11328 spi_if_ins.state_if[0] +.sym 11331 rx_24_fifo.rd_addr_gray_SB_DFFESR_Q_7_D[0] +.sym 11333 rx_24_fifo.rd_addr[0] +.sym 11337 rx_24_fifo.rd_addr[7] +.sym 11351 rx_24_fifo.rd_addr_gray_wr[7] +.sym 11356 spi_if_ins.r_tx_data_valid_SB_DFFESR_Q_D[0] +.sym 11367 rx_24_fifo.rd_addr[2] +.sym 11368 rx_24_fifo.rd_addr_gray_SB_DFFESR_Q_7_D_SB_LUT4_I3_O_SB_LUT4_O_I0_SB_LUT4_O_1_I0[0] +.sym 11369 rx_24_fifo.rd_addr_gray_SB_DFFESR_Q_6_D[0] +.sym 11370 rx_24_fifo.rd_addr[1] +.sym 11372 lvds_clock_buf +.sym 11377 spi_if_ins.o_load_cmd_SB_DFFESR_Q_D_SB_LUT4_I1_O[1] +.sym 11380 w_tx_data_sys[0] +.sym 11386 spi_if_ins.o_load_cmd_SB_DFFESR_Q_E +.sym 11387 w_tx_data_smi[3] +.sym 11388 spi_if_ins.state_if_SB_DFFESR_Q_1_R +.sym 11392 spi_if_ins.o_load_cmd_SB_DFFESR_Q_D[1] +.sym 11394 spi_if_ins.state_if[0] +.sym 11400 rx_24_fifo.rd_addr_gray_SB_DFFESR_Q_6_D[1] +.sym 11402 rx_24_fifo.rd_addr_gray_SB_DFFESR_Q_6_D[3] +.sym 11406 w_load +.sym 11409 smi_ctrl_ins.r_fifo_24_pull_SB_LUT4_I3_1_O +.sym 11420 rx_24_fifo.rd_addr_gray_SB_DFFESR_Q_6_D[2] +.sym 11421 rx_24_fifo.rd_addr_gray_SB_DFFESR_Q_6_D[3] +.sym 11426 rx_24_fifo.rd_addr_gray_SB_DFFESR_Q_7_D_SB_LUT4_I3_O_SB_LUT4_O_2_I0[3] +.sym 11427 rx_24_fifo.rd_addr[0] +.sym 11428 spi_if_ins.state_if_SB_DFFESR_Q_1_R +.sym 11429 rx_24_fifo.rd_addr_gray_SB_DFFESR_Q_7_D_SB_LUT4_I3_O_SB_LUT4_O_2_I0[1] +.sym 11430 rx_24_fifo.rd_addr_gray_SB_DFFESR_Q_7_D_SB_LUT4_I3_O_SB_LUT4_O_2_I0[0] +.sym 11436 rx_24_fifo.rd_addr_gray_SB_DFFESR_Q_6_D[1] +.sym 11437 rx_24_fifo.rd_addr_gray_SB_DFFESR_Q_6_D[0] +.sym 11438 rx_24_fifo.rd_addr_gray_SB_DFFESR_Q_7_D_SB_LUT4_I3_O_SB_LUT4_O_2_I0[2] +.sym 11440 rx_24_fifo.rd_addr_gray_SB_LUT4_I2_O[1] +.sym 11441 rx_24_fifo.rd_addr_gray_SB_DFFESR_Q_7_D_SB_LUT4_I3_O_SB_LUT4_O_2_I0_SB_LUT4_O_1_I3[1] +.sym 11442 spi_if_ins.o_load_cmd_SB_DFFESR_Q_E +.sym 11443 spi_if_ins.o_load_cmd_SB_DFFESR_Q_D[0] +.sym 11445 rx_24_fifo.rd_addr_gray_SB_LUT4_I2_O[6] +.sym 11446 rx_24_fifo.rd_addr_gray_SB_LUT4_I2_O[7] +.sym 11451 spi_if_ins.o_load_cmd_SB_DFFESR_Q_D[0] +.sym 11454 rx_24_fifo.rd_addr_gray_SB_DFFESR_Q_7_D_SB_LUT4_I3_O_SB_LUT4_O_2_I0[2] +.sym 11455 rx_24_fifo.rd_addr_gray_SB_DFFESR_Q_7_D_SB_LUT4_I3_O_SB_LUT4_O_2_I0[0] +.sym 11456 rx_24_fifo.rd_addr_gray_SB_DFFESR_Q_7_D_SB_LUT4_I3_O_SB_LUT4_O_2_I0[1] +.sym 11457 rx_24_fifo.rd_addr_gray_SB_DFFESR_Q_7_D_SB_LUT4_I3_O_SB_LUT4_O_2_I0[3] +.sym 11460 rx_24_fifo.rd_addr_gray_SB_LUT4_I2_O[1] .sym 11463 rx_24_fifo.rd_addr[0] -.sym 11466 rx_24_fifo.empty_o_SB_LUT4_I3_O_SB_LUT4_O_I0[1] -.sym 11467 rx_24_fifo.empty_o_SB_LUT4_I3_O_SB_LUT4_O_I0[2] -.sym 11468 rx_24_fifo.empty_o_SB_LUT4_I3_O_SB_LUT4_O_1_I3[1] -.sym 11469 rx_24_fifo.empty_o_SB_LUT4_I3_O_SB_LUT4_O_I0[0] -.sym 11472 rx_24_fifo.rd_addr_gray_SB_LUT4_I2_O[6] -.sym 11473 rx_24_fifo.empty_o_SB_DFFSS_Q_D_SB_LUT4_O_I0_SB_LUT4_O_I0[3] -.sym 11474 rx_24_fifo.wr_addr_gray_rd_r[5] -.sym 11478 w_rx_24_fifo_push -.sym 11479 rx_24_fifo.full_o_SB_LUT4_I0_O[1] -.sym 11480 rx_24_fifo.full_o_SB_LUT4_I0_O[3] -.sym 11481 rx_24_fifo.full_o_SB_LUT4_I0_O[0] -.sym 11484 rx_24_fifo.wr_addr_gray_rd_r[5] -.sym 11485 rx_24_fifo.rd_addr[5] -.sym 11490 rx_24_fifo.rd_addr_gray_SB_DFFESR_Q_7_D[1] -.sym 11491 rx_24_fifo.rd_addr_gray_SB_DFFESR_Q_7_D[3] -.sym 11492 rx_24_fifo.empty_o_SB_LUT4_I3_O_SB_LUT4_O_I0[2] -.sym 11493 rx_24_fifo.rd_addr_gray_SB_DFFESR_Q_7_D[0] -.sym 11495 lvds_clock_buf -.sym 11496 i_smi_a1_SB_LUT4_I1_O[2]_$glb_sr -.sym 11500 spi_if_ins.r_tx_byte[1] -.sym 11501 io_ctrl_ins.o_data_out_SB_DFFESR_Q_R -.sym 11502 w_smi_read_req -.sym 11503 rx_24_fifo.empty_o_SB_DFFSS_Q_D_SB_LUT4_O_I0_SB_LUT4_O_I0[0] -.sym 11506 spi_if_ins.o_cs_SB_LUT4_I2_2_O[1] -.sym 11509 w_ioc[0] -.sym 11511 $PACKER_VCC_NET -.sym 11514 w_ioc[2] -.sym 11517 rx_24_fifo.empty_o_SB_LUT4_I3_O_SB_LUT4_O_I0[2] -.sym 11520 w_rx_24_fifo_pull -.sym 11524 rx_24_fifo.empty_o_SB_DFFSS_Q_D_SB_LUT4_O_I0[0] -.sym 11525 sys_ctrl_ins.reset_cmd_SB_DFFESR_Q_R -.sym 11528 smi_ctrl_ins.r_fifo_24_pull_SB_LUT4_I3_O -.sym 11529 rx_24_fifo.wr_addr_gray_rd_r[3] -.sym 11532 w_cs[0] -.sym 11538 rx_24_fifo.full_o_SB_LUT4_I0_O_SB_LUT4_O_1_I0[0] -.sym 11540 lvds_rx_24_inst.r_push_SB_LUT4_I3_I1[5] -.sym 11541 lvds_rx_24_inst.r_push_SB_LUT4_I3_I1[4] -.sym 11543 w_rx_24_fifo_full -.sym 11544 rx_24_fifo.wr_addr_gray[5] -.sym 11545 rx_24_fifo.full_o_SB_LUT4_I0_I1_SB_LUT4_O_1_I2[0] -.sym 11546 rx_24_fifo.full_o_SB_LUT4_I0_I1[3] -.sym 11547 rx_24_fifo.full_o_SB_LUT4_I0_I1_SB_LUT4_O_1_I2[2] -.sym 11552 rx_24_fifo.full_o_SB_LUT4_I0_O_SB_LUT4_O_1_I0[2] -.sym 11553 rx_24_fifo.full_o_SB_LUT4_I0_I1[2] -.sym 11554 rx_24_fifo.full_o_SB_LUT4_I0_I1[1] -.sym 11557 rx_24_fifo.wr_addr_gray_rd[2] -.sym 11559 rx_24_fifo.wr_addr_gray_rd[0] -.sym 11562 rx_24_fifo.full_o_SB_LUT4_I0_I1_SB_LUT4_O_1_I2[1] -.sym 11567 rx_24_fifo.full_o_SB_LUT4_I0_I1_SB_LUT4_O_2_I2[1] -.sym 11568 rx_24_fifo.wr_addr_gray_rd[5] -.sym 11569 rx_24_fifo.full_o_SB_LUT4_I0_I1_SB_LUT4_O_1_I2[3] -.sym 11571 rx_24_fifo.full_o_SB_LUT4_I0_I1_SB_LUT4_O_1_I2[3] -.sym 11572 rx_24_fifo.full_o_SB_LUT4_I0_I1_SB_LUT4_O_1_I2[1] -.sym 11573 rx_24_fifo.full_o_SB_LUT4_I0_I1_SB_LUT4_O_1_I2[2] -.sym 11574 rx_24_fifo.full_o_SB_LUT4_I0_I1_SB_LUT4_O_1_I2[0] -.sym 11577 rx_24_fifo.wr_addr_gray_rd[2] -.sym 11583 rx_24_fifo.full_o_SB_LUT4_I0_O_SB_LUT4_O_1_I0[0] -.sym 11584 rx_24_fifo.full_o_SB_LUT4_I0_O_SB_LUT4_O_1_I0[2] -.sym 11585 lvds_rx_24_inst.r_push_SB_LUT4_I3_I1[5] -.sym 11586 lvds_rx_24_inst.r_push_SB_LUT4_I3_I1[4] -.sym 11589 rx_24_fifo.wr_addr_gray_rd[0] -.sym 11596 rx_24_fifo.wr_addr_gray_rd[5] -.sym 11601 w_rx_24_fifo_full -.sym 11602 rx_24_fifo.full_o_SB_LUT4_I0_I1[1] -.sym 11603 rx_24_fifo.full_o_SB_LUT4_I0_I1[3] -.sym 11604 rx_24_fifo.full_o_SB_LUT4_I0_I1[2] -.sym 11609 rx_24_fifo.wr_addr_gray[5] -.sym 11614 rx_24_fifo.full_o_SB_LUT4_I0_I1_SB_LUT4_O_2_I2[1] -.sym 11615 rx_24_fifo.full_o_SB_LUT4_I0_I1_SB_LUT4_O_1_I2[0] +.sym 11466 rx_24_fifo.rd_addr_gray_SB_DFFESR_Q_6_D[1] +.sym 11467 rx_24_fifo.rd_addr_gray_SB_DFFESR_Q_6_D[3] +.sym 11468 rx_24_fifo.rd_addr_gray_SB_DFFESR_Q_6_D[2] +.sym 11469 rx_24_fifo.rd_addr_gray_SB_DFFESR_Q_6_D[0] +.sym 11480 rx_24_fifo.rd_addr_gray_SB_DFFESR_Q_7_D_SB_LUT4_I3_O_SB_LUT4_O_2_I0_SB_LUT4_O_1_I3[1] +.sym 11481 rx_24_fifo.rd_addr_gray_SB_LUT4_I2_O[1] +.sym 11484 rx_24_fifo.rd_addr_gray_SB_LUT4_I2_O[7] +.sym 11487 rx_24_fifo.rd_addr_gray_SB_LUT4_I2_O[6] +.sym 11494 spi_if_ins.o_load_cmd_SB_DFFESR_Q_E +.sym 11495 r_counter[0]_$glb_clk +.sym 11496 spi_if_ins.state_if_SB_DFFESR_Q_1_R +.sym 11499 rx_24_fifo.rd_addr_gray_wr[6] +.sym 11511 smi_ctrl_ins.o_data_out_SB_DFFESS_Q_E +.sym 11522 rx_24_fifo.rd_addr_gray_SB_DFFESR_Q_7_D[1] +.sym 11538 rx_24_fifo.rd_addr_gray_SB_DFFESR_Q_7_D_SB_LUT4_I3_O[2] +.sym 11539 rx_24_fifo.rd_addr_gray_SB_DFFESR_Q_7_D_SB_LUT4_I3_O[3] +.sym 11540 rx_24_fifo.rd_addr_gray_SB_DFFESR_Q_7_D[1] +.sym 11541 rx_24_fifo.rd_addr[5] +.sym 11545 rx_24_fifo.rd_addr_gray_SB_DFFESR_Q_3_D[3] +.sym 11547 rx_24_fifo.rd_addr_gray_SB_DFFESR_Q_3_D[0] +.sym 11548 rx_24_fifo.rd_addr_gray_SB_DFFESR_Q_7_D_SB_LUT4_I3_O_SB_LUT4_O_1_I3[3] +.sym 11549 rx_24_fifo.rd_addr[6] +.sym 11551 rx_24_fifo.rd_addr_gray_SB_DFFESR_Q_7_D[0] +.sym 11553 rx_24_fifo.rd_addr_gray_SB_DFFESR_Q_3_D[3] +.sym 11554 rx_24_fifo.rd_addr_gray_SB_DFFESR_Q_7_D_SB_LUT4_I3_O[0] +.sym 11555 rx_24_fifo.rd_addr_gray_SB_DFFESR_Q_7_D_SB_LUT4_I3_O[1] +.sym 11558 rx_24_fifo.rd_addr[4] +.sym 11562 rx_24_fifo.rd_addr_gray_SB_DFFESR_Q_3_D[1] +.sym 11563 rx_24_fifo.rd_addr_gray_SB_DFFESR_Q_3_D[2] +.sym 11571 rx_24_fifo.rd_addr_gray_SB_DFFESR_Q_7_D[1] +.sym 11573 rx_24_fifo.rd_addr_gray_SB_DFFESR_Q_7_D[0] +.sym 11577 rx_24_fifo.rd_addr_gray_SB_DFFESR_Q_7_D_SB_LUT4_I3_O_SB_LUT4_O_1_I3[3] +.sym 11578 rx_24_fifo.rd_addr_gray_SB_DFFESR_Q_3_D[0] +.sym 11579 rx_24_fifo.rd_addr[5] +.sym 11580 rx_24_fifo.rd_addr[4] +.sym 11583 rx_24_fifo.rd_addr[6] +.sym 11585 rx_24_fifo.rd_addr_gray_SB_DFFESR_Q_3_D[3] +.sym 11595 rx_24_fifo.rd_addr_gray_SB_DFFESR_Q_7_D_SB_LUT4_I3_O[0] +.sym 11596 rx_24_fifo.rd_addr_gray_SB_DFFESR_Q_7_D_SB_LUT4_I3_O[3] +.sym 11597 rx_24_fifo.rd_addr_gray_SB_DFFESR_Q_7_D_SB_LUT4_I3_O[2] +.sym 11598 rx_24_fifo.rd_addr_gray_SB_DFFESR_Q_7_D_SB_LUT4_I3_O[1] +.sym 11607 rx_24_fifo.rd_addr_gray_SB_DFFESR_Q_3_D[2] +.sym 11608 rx_24_fifo.rd_addr_gray_SB_DFFESR_Q_3_D[3] +.sym 11609 rx_24_fifo.rd_addr_gray_SB_DFFESR_Q_3_D[0] +.sym 11610 rx_24_fifo.rd_addr_gray_SB_DFFESR_Q_3_D[1] .sym 11618 r_counter[0]_$glb_clk -.sym 11621 rx_24_fifo.rd_addr_gray[2] -.sym 11622 rx_24_fifo.rd_addr_gray[1] -.sym 11623 spi_if_ins.o_load_cmd_SB_LUT4_I2_O_SB_LUT4_I2_O -.sym 11624 rx_24_fifo.rd_addr_gray[0] -.sym 11633 io_pmod[2]$SB_IO_IN -.sym 11634 lvds_rx_24_inst.r_push_SB_LUT4_I3_I1[5] -.sym 11635 lvds_rx_24_inst.r_push_SB_LUT4_I3_I1[4] -.sym 11637 i_config[1]$SB_IO_IN -.sym 11645 rx_24_fifo.empty_o_SB_LUT4_I3_O_SB_LUT4_O_I0[2] -.sym 11647 rx_24_fifo.empty_o_SB_DFFSS_Q_D_SB_LUT4_O_I0_SB_LUT4_O_I0[2] -.sym 11653 sys_ctrl_ins.reset_count_SB_DFFESR_Q_E -.sym 11666 rx_24_fifo.rd_addr_gray[5] -.sym 11677 rx_24_fifo.wr_addr_gray_SB_LUT4_I2_1_O[6] -.sym 11679 rx_24_fifo.rd_addr_gray_wr[5] -.sym 11685 rx_24_fifo.rd_addr_gray_wr[0] -.sym 11686 rx_24_fifo.rd_addr_gray[2] -.sym 11689 rx_24_fifo.rd_addr_gray[0] -.sym 11691 rx_24_fifo.full_o_SB_LUT4_I0_O_SB_LUT4_O_1_I0[2] -.sym 11697 rx_24_fifo.rd_addr_gray[0] -.sym 11700 rx_24_fifo.full_o_SB_LUT4_I0_O_SB_LUT4_O_1_I0[2] -.sym 11701 rx_24_fifo.wr_addr_gray_SB_LUT4_I2_1_O[6] -.sym 11707 rx_24_fifo.rd_addr_gray[5] -.sym 11713 rx_24_fifo.rd_addr_gray[2] -.sym 11732 rx_24_fifo.rd_addr_gray_wr[5] -.sym 11736 rx_24_fifo.rd_addr_gray_wr[0] -.sym 11741 lvds_clock_buf -.sym 11743 sys_ctrl_ins.reset_cmd_SB_DFFESR_Q_R -.sym 11747 sys_ctrl_ins.reset_cmd -.sym 11755 spi_if_ins.o_load_cmd_SB_LUT4_I2_O_SB_LUT4_I2_O -.sym 11762 spi_if_ins.state_if_SB_DFFESR_Q_1_R -.sym 11767 rx_24_fifo.rd_addr_gray[1] -.sym 11789 rx_24_fifo.wr_addr_gray_rd[4] -.sym 11792 rx_24_fifo.wr_addr_gray_rd[3] -.sym 11809 rx_24_fifo.wr_addr_gray[3] -.sym 11810 rx_24_fifo.wr_addr_gray_rd[1] -.sym 11811 rx_24_fifo.wr_addr_gray[1] -.sym 11819 rx_24_fifo.wr_addr_gray[3] -.sym 11831 rx_24_fifo.wr_addr_gray[1] -.sym 11844 rx_24_fifo.wr_addr_gray_rd[3] -.sym 11856 rx_24_fifo.wr_addr_gray_rd[1] -.sym 11859 rx_24_fifo.wr_addr_gray_rd[4] +.sym 11619 i_smi_a1_SB_LUT4_I1_O_SB_LUT4_O_I2_SB_LUT4_I0_O[2]_$glb_sr +.sym 11621 rx_24_fifo.rd_addr_gray[1] +.sym 11622 rx_24_fifo.rd_addr_gray[4] +.sym 11624 rx_24_fifo.rd_addr_gray[6] +.sym 11627 rx_24_fifo.rd_addr_gray[0] +.sym 11642 w_rx_24_fifo_empty +.sym 11646 rx_24_fifo.rd_addr_gray_wr[1] +.sym 11663 rx_24_fifo.wr_addr_gray_rd[1] +.sym 11666 rx_24_fifo.wr_addr_gray_rd[4] +.sym 11669 rx_24_fifo.wr_addr_gray_rd[5] +.sym 11676 rx_24_fifo.wr_addr_gray_rd[2] +.sym 11679 rx_24_fifo.wr_addr_gray[0] +.sym 11680 rx_24_fifo.wr_addr_gray[1] +.sym 11689 rx_24_fifo.wr_addr_gray_rd[0] +.sym 11702 rx_24_fifo.wr_addr_gray_rd[4] +.sym 11707 rx_24_fifo.wr_addr_gray[1] +.sym 11715 rx_24_fifo.wr_addr_gray_rd[1] +.sym 11718 rx_24_fifo.wr_addr_gray[0] +.sym 11726 rx_24_fifo.wr_addr_gray_rd[0] +.sym 11732 rx_24_fifo.wr_addr_gray_rd[2] +.sym 11736 rx_24_fifo.wr_addr_gray_rd[5] +.sym 11741 r_counter[0]_$glb_clk +.sym 11746 rx_24_fifo.rd_addr_gray_wr[4] +.sym 11747 lvds_rx_24_inst.r_push_SB_LUT4_I0_1_I1_SB_LUT4_O_1_I3[0] +.sym 11748 rx_24_fifo.rd_addr_gray_wr[0] +.sym 11750 rx_24_fifo.rd_addr_gray_wr[1] +.sym 11752 io_ctrl_ins.o_data_out_SB_DFFESR_Q_6_R[1] +.sym 11760 rx_24_fifo.rd_addr_gray_SB_DFFESR_Q_3_D[1] +.sym 11768 lvds_rx_24_inst.r_push_SB_LUT4_I0_1_I1_SB_LUT4_O_1_I3[0] +.sym 11770 rx_24_fifo.rd_addr_gray_wr[0] +.sym 11785 rx_24_fifo.wr_addr_gray[4] +.sym 11797 rx_24_fifo.wr_addr_gray[5] +.sym 11799 rx_24_fifo.wr_addr_gray[2] +.sym 11817 rx_24_fifo.wr_addr_gray[5] +.sym 11849 rx_24_fifo.wr_addr_gray[4] +.sym 11862 rx_24_fifo.wr_addr_gray[2] .sym 11864 r_counter[0]_$glb_clk -.sym 11868 sys_ctrl_ins.reset_count[2] -.sym 11869 sys_ctrl_ins.reset_count[3] -.sym 11870 sys_ctrl_ins.reset_count_SB_DFFESR_Q_E -.sym 11871 sys_ctrl_ins.reset_count[0] -.sym 11872 sys_ctrl_ins.reset_count[1] -.sym 11873 sys_ctrl_ins.o_soft_reset_SB_DFFESS_Q_S -.sym 11893 i_smi_a1_SB_LUT4_I1_O[2] -.sym 11894 sys_ctrl_ins.reset_cmd -.sym 11926 rx_24_fifo.rd_addr_gray_wr[1] -.sym 11927 rx_24_fifo.rd_addr_gray[1] -.sym 11961 rx_24_fifo.rd_addr_gray[1] -.sym 11984 rx_24_fifo.rd_addr_gray_wr[1] -.sym 11987 lvds_clock_buf -.sym 12113 i_smi_a1_SB_LUT4_I1_O[2] -.sym 12118 sys_ctrl_ins.o_soft_reset_SB_DFFESS_Q_E -.sym 12119 w_lvds_rx_24_d1_SB_LUT4_I0_O_SB_LUT4_I3_O -.sym 12140 $PACKER_GND_NET -.sym 12147 i_smi_a1_SB_LUT4_I1_O[2] -.sym 12252 i_smi_a1_SB_LUT4_I1_O[2] +.sym 11878 io_ctrl_ins.debug_mode_SB_LUT4_I2_O[1] +.sym 12117 w_lvds_rx_24_d1_SB_LUT4_I0_O_SB_LUT4_I3_O +.sym 12124 o_shdn_tx_lna$SB_IO_OUT +.sym 12245 i_smi_a1_SB_LUT4_I1_O_SB_LUT4_O_I2_SB_LUT4_I0_O[2] .sym 12310 io_smi_data[0]$SB_IO_OUT .sym 12313 io_smi_data[7]$SB_IO_OUT -.sym 12332 io_smi_data[0]$SB_IO_OUT +.sym 12319 io_smi_data[0]$SB_IO_OUT .sym 12333 io_smi_data[7]$SB_IO_OUT -.sym 12335 spi_if_ins.spi.SCKr[0] -.sym 12337 io_pmod_SB_DFFSS_Q_D_SB_LUT4_O_I0_SB_LUT4_O_I0_SB_LUT4_O_2_I3[0] -.sym 12366 i_smi_a1_SB_LUT4_I1_O[2] -.sym 12378 rx_09_fifo.rd_addr_gray_SB_DFFESR_Q_7_D_SB_LUT4_I3_O_SB_LUT4_O_I3[0] -.sym 12379 io_pmod_SB_DFFSS_Q_D_SB_LUT4_O_I0_SB_LUT4_O_I0_SB_LUT4_O_1_I2[3] -.sym 12380 io_pmod_SB_DFFSS_Q_D_SB_LUT4_O_I0_SB_LUT4_O_I0[1] -.sym 12383 io_pmod_SB_DFFSS_Q_D_SB_LUT4_O_I0_SB_LUT4_O_I0[2] -.sym 12387 rx_09_fifo.rd_addr_gray_SB_DFFESR_Q_5_D[2] -.sym 12388 rx_09_fifo.rd_addr[7] -.sym 12389 io_pmod_SB_DFFSS_Q_D_SB_LUT4_O_I0_SB_LUT4_O_I0[0] -.sym 12390 io_pmod_SB_DFFSS_Q_D_SB_LUT4_O_I0_SB_LUT4_O_I0_SB_LUT4_O_1_I2[2] -.sym 12393 io_pmod_SB_DFFSS_Q_D_SB_LUT4_O_I0_SB_LUT4_O_I0[3] -.sym 12394 io_pmod_SB_DFFSS_Q_D_SB_LUT4_O_I0_SB_LUT4_O_I0_SB_LUT4_O_1_I2[1] -.sym 12397 rx_09_fifo.rd_addr[4] -.sym 12398 rx_09_fifo.wr_addr_gray_rd[6] -.sym 12401 rx_09_fifo.wr_addr_gray_rd[7] -.sym 12403 rx_09_fifo.wr_addr_gray_rd_r[6] -.sym 12405 io_pmod_SB_DFFSS_Q_D_SB_LUT4_O_I0_SB_LUT4_O_I0_SB_LUT4_O_1_I2[0] -.sym 12406 rx_09_fifo.rd_addr[3] -.sym 12407 rx_09_fifo.wr_addr_gray_rd_r[7] -.sym 12410 io_pmod_SB_DFFSS_Q_D_SB_LUT4_O_I0_SB_LUT4_O_I0_SB_LUT4_O_1_I2[3] -.sym 12411 io_pmod_SB_DFFSS_Q_D_SB_LUT4_O_I0_SB_LUT4_O_I0_SB_LUT4_O_1_I2[1] -.sym 12412 io_pmod_SB_DFFSS_Q_D_SB_LUT4_O_I0_SB_LUT4_O_I0_SB_LUT4_O_1_I2[2] -.sym 12413 io_pmod_SB_DFFSS_Q_D_SB_LUT4_O_I0_SB_LUT4_O_I0_SB_LUT4_O_1_I2[0] -.sym 12425 rx_09_fifo.wr_addr_gray_rd[6] -.sym 12428 rx_09_fifo.wr_addr_gray_rd_r[7] -.sym 12429 rx_09_fifo.rd_addr[7] -.sym 12430 rx_09_fifo.wr_addr_gray_rd_r[6] -.sym 12431 io_pmod_SB_DFFSS_Q_D_SB_LUT4_O_I0_SB_LUT4_O_I0_SB_LUT4_O_1_I2[3] -.sym 12434 rx_09_fifo.rd_addr[4] -.sym 12435 rx_09_fifo.rd_addr_gray_SB_DFFESR_Q_5_D[2] -.sym 12436 rx_09_fifo.rd_addr[3] -.sym 12441 rx_09_fifo.rd_addr[4] -.sym 12442 rx_09_fifo.rd_addr_gray_SB_DFFESR_Q_7_D_SB_LUT4_I3_O_SB_LUT4_O_I3[0] -.sym 12449 rx_09_fifo.wr_addr_gray_rd[7] -.sym 12452 io_pmod_SB_DFFSS_Q_D_SB_LUT4_O_I0_SB_LUT4_O_I0[0] -.sym 12453 io_pmod_SB_DFFSS_Q_D_SB_LUT4_O_I0_SB_LUT4_O_I0[2] -.sym 12454 io_pmod_SB_DFFSS_Q_D_SB_LUT4_O_I0_SB_LUT4_O_I0[1] -.sym 12455 io_pmod_SB_DFFSS_Q_D_SB_LUT4_O_I0_SB_LUT4_O_I0[3] -.sym 12457 r_counter[0]_$glb_clk -.sym 12463 io_smi_data[3]$SB_IO_OUT -.sym 12464 spi_if_ins.r_tx_data_valid_SB_LUT4_I3_O[1] -.sym 12465 rx_09_fifo.wr_addr_gray_rd[1] -.sym 12466 rx_09_fifo.wr_addr_gray_rd[4] -.sym 12467 io_pmod_SB_DFFSS_Q_D_SB_LUT4_O_I0_SB_LUT4_O_I0_SB_LUT4_O_1_I2[0] -.sym 12468 rx_09_fifo.wr_addr_gray_rd[5] -.sym 12469 spi_if_ins.r_tx_data_valid_SB_LUT4_I3_O[0] -.sym 12480 $PACKER_VCC_NET -.sym 12488 i_sck$SB_IO_IN -.sym 12492 io_smi_data[3]$SB_IO_OUT -.sym 12507 i_smi_a3$SB_IO_IN -.sym 12514 rx_09_fifo.wr_addr_gray[5] -.sym 12517 spi_if_ins.spi.r_rx_done_SB_DFFER_Q_D_SB_LUT4_I3_O -.sym 12518 rx_09_fifo.wr_addr_gray_rd[6] -.sym 12520 rx_09_fifo.wr_addr_gray[1] -.sym 12524 io_pmod_SB_DFFSS_Q_D_SB_LUT4_O_I0[2] -.sym 12529 spi_if_ins.r_tx_data_valid_SB_LUT4_I3_O[1] -.sym 12540 rx_09_fifo.rd_addr_gray_SB_DFFESR_Q_5_D[3] -.sym 12541 rx_09_fifo.rd_addr_gray_SB_DFFESR_Q_7_D[2] -.sym 12542 io_pmod_SB_DFFSS_Q_D_SB_LUT4_O_I0_SB_LUT4_O_I0_SB_LUT4_O_2_I3[0] -.sym 12543 io_pmod_SB_DFFSS_Q_D_SB_LUT4_O_I0_SB_LUT4_O_I0_SB_LUT4_O_2_I3[2] -.sym 12544 rx_09_fifo.wr_addr_gray_rd[3] -.sym 12545 rx_09_fifo.rd_addr_gray_SB_DFFESR_Q_5_D[1] -.sym 12548 rx_09_fifo.rd_addr_gray_SB_DFFESR_Q_7_D_SB_LUT4_I3_O[0] -.sym 12549 rx_09_fifo.rd_addr_gray_SB_DFFESR_Q_7_D[2] -.sym 12550 rx_09_fifo.rd_addr[0] -.sym 12551 rx_09_fifo.rd_addr_gray_SB_DFFESR_Q_7_D_SB_LUT4_I3_O[2] -.sym 12552 rx_09_fifo.rd_addr_gray_SB_DFFESR_Q_7_D_SB_LUT4_I3_O[3] -.sym 12553 rx_09_fifo.rd_addr_gray_SB_DFFESR_Q_5_D[1] -.sym 12555 io_pmod_SB_DFFSS_Q_D_SB_LUT4_O_I0_SB_LUT4_O_I0_SB_LUT4_O_2_I3[1] -.sym 12556 rx_09_fifo.rd_addr_gray_SB_DFFESR_Q_7_D_SB_LUT4_I3_O[1] -.sym 12558 rx_09_fifo.rd_addr_gray_SB_DFFESR_Q_5_D[2] -.sym 12559 rx_09_fifo.rd_addr_gray_SB_DFFESR_Q_5_D[0] -.sym 12560 io_pmod_SB_DFFSS_Q_D_SB_LUT4_O_I0_SB_LUT4_O_I0_SB_LUT4_O_1_I2[0] -.sym 12561 io_pmod_SB_DFFSS_Q_D_SB_LUT4_O_I0_SB_LUT4_O_I0_SB_LUT4_O_2_I3[3] -.sym 12563 rx_09_fifo.rd_addr_gray_SB_DFFESR_Q_6_D[3] -.sym 12566 rx_09_fifo.rd_addr_gray_SB_DFFESR_Q_6_D[1] -.sym 12567 rx_09_fifo.wr_addr_gray_rd[4] -.sym 12568 rx_09_fifo.rd_addr_gray_SB_DFFESR_Q_7_D[3] -.sym 12573 rx_09_fifo.rd_addr_gray_SB_DFFESR_Q_5_D[3] -.sym 12574 rx_09_fifo.rd_addr_gray_SB_DFFESR_Q_5_D[0] -.sym 12575 rx_09_fifo.rd_addr_gray_SB_DFFESR_Q_5_D[2] -.sym 12576 rx_09_fifo.rd_addr_gray_SB_DFFESR_Q_5_D[1] -.sym 12580 rx_09_fifo.wr_addr_gray_rd[4] -.sym 12587 rx_09_fifo.wr_addr_gray_rd[3] -.sym 12591 rx_09_fifo.rd_addr_gray_SB_DFFESR_Q_6_D[1] -.sym 12592 io_pmod_SB_DFFSS_Q_D_SB_LUT4_O_I0_SB_LUT4_O_I0_SB_LUT4_O_2_I3[0] -.sym 12593 rx_09_fifo.rd_addr_gray_SB_DFFESR_Q_6_D[3] -.sym 12594 io_pmod_SB_DFFSS_Q_D_SB_LUT4_O_I0_SB_LUT4_O_I0_SB_LUT4_O_1_I2[0] -.sym 12597 rx_09_fifo.rd_addr_gray_SB_DFFESR_Q_5_D[1] -.sym 12598 rx_09_fifo.rd_addr_gray_SB_DFFESR_Q_7_D[3] -.sym 12599 rx_09_fifo.rd_addr_gray_SB_DFFESR_Q_7_D[2] -.sym 12600 rx_09_fifo.rd_addr_gray_SB_DFFESR_Q_5_D[0] -.sym 12603 rx_09_fifo.rd_addr[0] -.sym 12604 io_pmod_SB_DFFSS_Q_D_SB_LUT4_O_I0_SB_LUT4_O_I0_SB_LUT4_O_2_I3[1] -.sym 12605 rx_09_fifo.rd_addr_gray_SB_DFFESR_Q_7_D[2] -.sym 12609 io_pmod_SB_DFFSS_Q_D_SB_LUT4_O_I0_SB_LUT4_O_I0_SB_LUT4_O_2_I3[0] -.sym 12610 io_pmod_SB_DFFSS_Q_D_SB_LUT4_O_I0_SB_LUT4_O_I0_SB_LUT4_O_2_I3[3] -.sym 12611 io_pmod_SB_DFFSS_Q_D_SB_LUT4_O_I0_SB_LUT4_O_I0_SB_LUT4_O_2_I3[1] -.sym 12612 io_pmod_SB_DFFSS_Q_D_SB_LUT4_O_I0_SB_LUT4_O_I0_SB_LUT4_O_2_I3[2] -.sym 12615 rx_09_fifo.rd_addr_gray_SB_DFFESR_Q_7_D_SB_LUT4_I3_O[0] -.sym 12616 rx_09_fifo.rd_addr_gray_SB_DFFESR_Q_7_D_SB_LUT4_I3_O[2] -.sym 12617 rx_09_fifo.rd_addr_gray_SB_DFFESR_Q_7_D_SB_LUT4_I3_O[3] -.sym 12618 rx_09_fifo.rd_addr_gray_SB_DFFESR_Q_7_D_SB_LUT4_I3_O[1] -.sym 12620 r_counter[0]_$glb_clk -.sym 12625 spi_if_ins.spi.r_rx_byte[1] -.sym 12627 io_smi_data[5]$SB_IO_OUT -.sym 12628 spi_if_ins.spi.r_rx_done_SB_DFFER_Q_D_SB_LUT4_I3_O -.sym 12629 io_smi_data[4]$SB_IO_OUT -.sym 12634 rx_09_fifo.full_o_SB_DFFSR_Q_D_SB_LUT4_O_I0_SB_LUT4_O_I2_SB_LUT4_O_I3[0] -.sym 12635 rx_09_fifo.rd_addr[7] -.sym 12637 rx_09_fifo.wr_addr_gray[4] -.sym 12638 rx_09_fifo.full_o_SB_LUT4_I3_O[0] -.sym 12642 smi_ctrl_ins.r_fifo_09_pull_SB_LUT4_I3_O -.sym 12644 rx_09_fifo.rd_addr_gray_SB_DFFESR_Q_6_D[3] -.sym 12647 spi_if_ins.spi.r3_rx_done_SB_LUT4_I2_O -.sym 12649 rx_09_fifo.full_o_SB_DFFSR_Q_D_SB_LUT4_O_I0_SB_LUT4_O_1_I0[2] -.sym 12654 spi_if_ins.r_tx_data_valid_SB_LUT4_I3_O[0] -.sym 12656 w_smi_data_output[3] -.sym 12669 io_pmod_SB_DFFSS_Q_D_SB_LUT4_O_I0[3] -.sym 12681 rx_09_fifo.wr_addr_gray[6] -.sym 12682 rx_09_fifo.wr_addr_gray_rd[2] -.sym 12683 rx_09_fifo.wr_addr_gray[0] -.sym 12684 rx_09_fifo.wr_addr[7] -.sym 12686 rx_09_fifo.wr_addr_gray_rd[0] -.sym 12690 rx_09_fifo.wr_addr_gray[2] -.sym 12692 i_smi_a1_SB_LUT4_I1_O[2] -.sym 12693 rx_09_fifo.wr_addr_gray[3] -.sym 12699 rx_09_fifo.wr_addr[7] -.sym 12702 rx_09_fifo.wr_addr_gray_rd[0] -.sym 12708 i_smi_a1_SB_LUT4_I1_O[2] -.sym 12710 io_pmod_SB_DFFSS_Q_D_SB_LUT4_O_I0[3] -.sym 12717 rx_09_fifo.wr_addr_gray[2] -.sym 12723 rx_09_fifo.wr_addr_gray[3] -.sym 12726 rx_09_fifo.wr_addr_gray_rd[2] -.sym 12734 rx_09_fifo.wr_addr_gray[6] -.sym 12741 rx_09_fifo.wr_addr_gray[0] +.sym 12335 io_pmod_SB_DFFSS_Q_D_SB_LUT4_O_I0_SB_LUT4_O_1_I1_SB_LUT4_O_I0[1] +.sym 12336 io_pmod_SB_DFFSS_Q_D_SB_LUT4_O_I0_SB_LUT4_O_I0[3] +.sym 12337 rx_09_fifo.wr_addr_gray_rd[7] +.sym 12338 io_pmod_SB_DFFSS_Q_D_SB_LUT4_O_I0_SB_LUT4_O_I0[0] +.sym 12340 rx_09_fifo.wr_addr_gray_rd_r[2] +.sym 12342 rx_09_fifo.wr_addr_gray_rd[6] +.sym 12351 r_tx_data[0] +.sym 12361 lvds_rx_09_inst.r_push_SB_LUT4_I3_1_O +.sym 12369 io_pmod[6]$SB_IO_IN +.sym 12384 i_smi_a3$SB_IO_IN +.sym 12386 rx_09_fifo.rd_addr_gray_wr[3] +.sym 12388 w_smi_data_output[3] +.sym 12389 w_smi_data_output[4] +.sym 12390 rx_09_fifo.rd_addr_gray_wr[4] +.sym 12392 rx_09_fifo.rd_addr_gray_wr[5] +.sym 12399 rx_09_fifo.rd_addr_gray_wr[6] +.sym 12403 rx_09_fifo.rd_addr_gray[6] +.sym 12410 rx_09_fifo.rd_addr_gray_wr[5] +.sym 12419 rx_09_fifo.rd_addr_gray_wr[4] +.sym 12422 rx_09_fifo.rd_addr_gray_wr[3] +.sym 12428 i_smi_a3$SB_IO_IN +.sym 12431 w_smi_data_output[3] +.sym 12435 i_smi_a3$SB_IO_IN +.sym 12437 w_smi_data_output[4] +.sym 12447 rx_09_fifo.rd_addr_gray[6] +.sym 12455 rx_09_fifo.rd_addr_gray_wr[6] +.sym 12457 lvds_clock_buf +.sym 12463 rx_09_fifo.wr_addr_gray_rd[5] +.sym 12464 io_pmod_SB_DFFSS_Q_D_SB_LUT4_O_I0_SB_LUT4_O_I2[2] +.sym 12465 rx_09_fifo.wr_addr_gray_rd_r[5] +.sym 12466 io_pmod_SB_DFFSS_Q_D_SB_LUT4_O_I0_SB_LUT4_O_1_I1[2] +.sym 12467 rx_09_fifo.wr_addr_gray_rd_r[0] +.sym 12468 io_pmod_SB_DFFSS_Q_D_SB_LUT4_O_I0_SB_LUT4_O_3_I2[0] +.sym 12469 rx_09_fifo.wr_addr_gray_rd[2] +.sym 12470 rx_09_fifo.wr_addr_gray_rd[4] +.sym 12472 rx_09_fifo.rd_addr_gray_wr[3] +.sym 12475 rx_09_fifo.rd_addr_gray_wr_r[5] +.sym 12476 io_pmod[4]$SB_IO_IN +.sym 12478 w_smi_data_output[3] +.sym 12479 rx_09_fifo.full_o_SB_DFFSR_Q_D_SB_LUT4_O_I1_SB_LUT4_O_I0_SB_LUT4_O_1_I3[0] +.sym 12481 w_smi_data_output[4] +.sym 12484 rx_09_fifo.rd_addr_gray_wr[5] +.sym 12485 io_smi_data[4]$SB_IO_OUT +.sym 12493 rx_09_fifo.wr_addr[7] +.sym 12495 i_smi_a1_SB_LUT4_I1_O_SB_LUT4_O_I2_SB_LUT4_I0_O[2] +.sym 12514 rx_09_fifo.rd_addr_gray_wr_r[5] +.sym 12516 rx_09_fifo.full_o_SB_DFFSR_Q_D_SB_LUT4_O_I1_SB_LUT4_O_I0[1] +.sym 12517 rx_09_fifo.wr_addr_gray_rd_r[3] +.sym 12518 rx_09_fifo.full_o_SB_DFFSR_Q_D_SB_LUT4_O_I1_SB_LUT4_O_I0_SB_LUT4_O_I0[1] +.sym 12519 io_pmod_SB_DFFSS_Q_D_SB_LUT4_O_I0_SB_LUT4_O_I0[0] +.sym 12520 i_smi_a1_SB_LUT4_I1_O_SB_LUT4_O_I2_SB_LUT4_I0_O[2] +.sym 12523 rx_09_fifo.wr_addr_gray_rd[1] +.sym 12524 rx_09_fifo.wr_addr_gray_rd_r[2] +.sym 12528 rx_09_fifo.wr_addr[7] +.sym 12529 rx_09_fifo.rd_addr_gray_wr_r[6] +.sym 12544 rx_09_fifo.wr_addr_gray_SB_DFFESR_Q_3_D[2] +.sym 12546 rx_09_fifo.wr_addr_gray_SB_DFFESR_Q_3_D[1] +.sym 12553 i_smi_a1_SB_LUT4_I1_O_SB_LUT4_O_I2_SB_LUT4_I0_O[2] +.sym 12555 rx_09_fifo.wr_addr_gray_SB_DFFESR_Q_4_D[2] +.sym 12559 w_rx_09_fifo_pull +.sym 12562 rx_09_fifo.wr_addr_gray_SB_LUT4_I2_1_O[7] +.sym 12567 lvds_rx_09_inst.r_push_SB_LUT4_I3_1_O +.sym 12580 rx_09_fifo.wr_addr_gray_SB_LUT4_I2_1_O[7] +.sym 12585 rx_09_fifo.wr_addr_gray_SB_DFFESR_Q_4_D[2] +.sym 12605 w_rx_09_fifo_pull +.sym 12606 i_smi_a1_SB_LUT4_I1_O_SB_LUT4_O_I2_SB_LUT4_I0_O[2] +.sym 12611 rx_09_fifo.wr_addr_gray_SB_DFFESR_Q_3_D[2] +.sym 12618 rx_09_fifo.wr_addr_gray_SB_DFFESR_Q_3_D[1] +.sym 12619 lvds_rx_09_inst.r_push_SB_LUT4_I3_1_O +.sym 12620 lvds_clock_buf +.sym 12621 i_smi_a1_SB_LUT4_I1_O_SB_LUT4_O_I2_SB_LUT4_I0_O[2]_$glb_sr +.sym 12622 rx_09_fifo.rd_addr_gray_SB_DFFESR_Q_1_D[1] +.sym 12623 smi_ctrl_ins.r_fifo_09_pull_SB_LUT4_I2_O[2] +.sym 12624 smi_ctrl_ins.r_fifo_09_pull_SB_LUT4_I2_O[0] +.sym 12625 rx_09_fifo.wr_addr_gray[1] +.sym 12626 rx_09_fifo.wr_addr_gray[2] +.sym 12627 rx_09_fifo.rd_addr_gray_SB_DFFESR_Q_1_D[3] +.sym 12628 io_pmod_SB_DFFSS_Q_D_SB_LUT4_O_I0_SB_LUT4_O_I2[3] +.sym 12629 rx_09_fifo.wr_addr_gray[0] +.sym 12631 io_pmod_SB_DFFSS_Q_D_SB_LUT4_O_I0_SB_LUT4_O_3_I2[0] +.sym 12636 smi_ctrl_ins.r_fifo_09_pull_SB_LUT4_I3_1_O +.sym 12638 rx_09_fifo.rd_addr[0] +.sym 12641 w_smi_data_output[5] +.sym 12647 rx_09_fifo.wr_addr_gray_SB_DFFESR_Q_7_D[1] +.sym 12665 w_rx_09_fifo_push +.sym 12667 rx_09_fifo.wr_addr_gray_SB_DFFESR_Q_4_D[1] +.sym 12668 rx_09_fifo.wr_addr_gray_SB_LUT4_I2_1_O[5] +.sym 12669 rx_09_fifo.wr_addr_gray_SB_LUT4_I2_1_O[6] +.sym 12670 rx_09_fifo.wr_addr_gray_SB_LUT4_I2_1_O[7] +.sym 12675 rx_09_fifo.wr_addr_gray_SB_LUT4_I2_1_O[4] +.sym 12677 rx_09_fifo.rd_addr_gray_SB_LUT4_I2_O[7] +.sym 12678 rx_09_fifo.wr_addr_gray_SB_DFFESR_Q_4_D[2] +.sym 12679 rx_09_fifo.rd_addr_gray_SB_DFFESR_Q_1_D[1] +.sym 12680 rx_09_fifo.rd_addr_gray_wr_r[5] +.sym 12682 rx_09_fifo.full_o_SB_DFFSR_Q_D_SB_LUT4_O_I1_SB_LUT4_O_I0[1] +.sym 12684 rx_09_fifo.full_o_SB_DFFSR_Q_D_SB_LUT4_O_I1_SB_LUT4_O_I0_SB_LUT4_O_I0[1] +.sym 12685 rx_09_fifo.wr_addr_gray_SB_DFFESR_Q_3_D[1] +.sym 12686 i_smi_a1_SB_LUT4_I1_O_SB_LUT4_O_I2_SB_LUT4_I0_O[2] +.sym 12690 smi_ctrl_ins.r_fifo_09_pull_SB_LUT4_I3_1_O +.sym 12691 rx_09_fifo.wr_addr_gray_SB_DFFESR_Q_3_D[2] +.sym 12694 rx_09_fifo.rd_addr_gray_wr_r[6] +.sym 12697 i_smi_a1_SB_LUT4_I1_O_SB_LUT4_O_I2_SB_LUT4_I0_O[2] +.sym 12698 w_rx_09_fifo_push +.sym 12702 rx_09_fifo.wr_addr_gray_SB_DFFESR_Q_3_D[2] +.sym 12703 rx_09_fifo.rd_addr_gray_wr_r[6] +.sym 12704 rx_09_fifo.full_o_SB_DFFSR_Q_D_SB_LUT4_O_I1_SB_LUT4_O_I0[1] +.sym 12705 rx_09_fifo.wr_addr_gray_SB_DFFESR_Q_3_D[1] +.sym 12708 rx_09_fifo.wr_addr_gray_SB_DFFESR_Q_4_D[1] +.sym 12709 rx_09_fifo.full_o_SB_DFFSR_Q_D_SB_LUT4_O_I1_SB_LUT4_O_I0_SB_LUT4_O_I0[1] +.sym 12710 rx_09_fifo.wr_addr_gray_SB_DFFESR_Q_4_D[2] +.sym 12711 rx_09_fifo.rd_addr_gray_wr_r[5] +.sym 12714 rx_09_fifo.rd_addr_gray_SB_LUT4_I2_O[7] +.sym 12722 rx_09_fifo.wr_addr_gray_SB_LUT4_I2_1_O[6] +.sym 12723 rx_09_fifo.wr_addr_gray_SB_LUT4_I2_1_O[7] +.sym 12727 rx_09_fifo.rd_addr_gray_SB_DFFESR_Q_1_D[1] +.sym 12733 rx_09_fifo.wr_addr_gray_SB_LUT4_I2_1_O[5] +.sym 12735 rx_09_fifo.wr_addr_gray_SB_LUT4_I2_1_O[4] +.sym 12738 rx_09_fifo.wr_addr_gray_SB_LUT4_I2_1_O[5] +.sym 12741 rx_09_fifo.wr_addr_gray_SB_LUT4_I2_1_O[6] +.sym 12742 smi_ctrl_ins.r_fifo_09_pull_SB_LUT4_I3_1_O .sym 12743 r_counter[0]_$glb_clk -.sym 12747 spi_if_ins.spi.r_tx_bit_count[2] -.sym 12748 spi_if_ins.spi.r_tx_byte_SB_DFFESR_Q_E -.sym 12749 spi_if_ins.spi.SCKr_SB_LUT4_I0_O[0] -.sym 12750 spi_if_ins.spi.o_spi_miso_SB_DFFE_Q_D_SB_LUT4_O_I2_SB_LUT4_O_I0_SB_LUT4_O_I3[2] -.sym 12751 spi_if_ins.spi.SCKr_SB_LUT4_I0_O[1] -.sym 12752 spi_if_ins.spi.o_spi_miso_SB_DFFE_Q_E -.sym 12757 w_smi_data_output[4] -.sym 12758 i_smi_soe_se$rename$0 -.sym 12762 $PACKER_VCC_NET -.sym 12763 smi_ctrl_ins.r_fifo_09_pull_SB_LUT4_I3_O -.sym 12764 w_smi_data_output[5] -.sym 12765 io_pmod_SB_DFFSS_Q_D_SB_LUT4_O_I0[3] -.sym 12770 rx_09_fifo.rd_addr_gray_wr_r[0] -.sym 12787 io_pmod_SB_DFFSS_Q_D_SB_LUT4_O_I0[3] -.sym 12789 io_pmod_SB_DFFSS_Q_D_SB_LUT4_O_I0[1] -.sym 12791 rx_09_fifo.rd_addr_gray_SB_DFFESR_Q_5_D[1] -.sym 12793 io_pmod_SB_DFFSS_Q_D_SB_LUT4_O_I0_SB_LUT4_O_I0_SB_LUT4_O_2_I3[2] -.sym 12794 rx_09_fifo.wr_addr[0] -.sym 12795 io_pmod[2]$SB_IO_IN -.sym 12797 rx_09_fifo.rd_addr[3] -.sym 12801 io_pmod_SB_DFFSS_Q_D_SB_LUT4_O_I0[2] -.sym 12802 io_pmod_SB_DFFSS_Q_D_SB_LUT4_O_I0[0] -.sym 12805 rx_09_fifo.full_o_SB_LUT4_I3_O[1] -.sym 12806 rx_09_fifo.full_o_SB_LUT4_I3_O[2] -.sym 12807 rx_09_fifo.wr_addr_gray_SB_LUT4_I2_1_O[5] -.sym 12808 rx_09_fifo.wr_addr_gray_SB_LUT4_I2_1_O[6] -.sym 12809 rx_09_fifo.wr_addr_gray_SB_LUT4_I2_1_O[7] -.sym 12811 rx_09_fifo.wr_addr_gray_SB_LUT4_I2_1_O[1] -.sym 12812 rx_09_fifo.wr_addr_gray_SB_LUT4_I2_1_O[2] -.sym 12819 rx_09_fifo.rd_addr[3] -.sym 12820 io_pmod_SB_DFFSS_Q_D_SB_LUT4_O_I0_SB_LUT4_O_I0_SB_LUT4_O_2_I3[2] -.sym 12821 io_pmod[2]$SB_IO_IN -.sym 12822 rx_09_fifo.rd_addr_gray_SB_DFFESR_Q_5_D[1] -.sym 12825 rx_09_fifo.wr_addr_gray_SB_LUT4_I2_1_O[2] -.sym 12828 rx_09_fifo.wr_addr_gray_SB_LUT4_I2_1_O[1] -.sym 12831 rx_09_fifo.wr_addr_gray_SB_LUT4_I2_1_O[6] -.sym 12832 rx_09_fifo.wr_addr_gray_SB_LUT4_I2_1_O[7] -.sym 12837 io_pmod_SB_DFFSS_Q_D_SB_LUT4_O_I0[1] -.sym 12838 io_pmod_SB_DFFSS_Q_D_SB_LUT4_O_I0[0] -.sym 12839 io_pmod_SB_DFFSS_Q_D_SB_LUT4_O_I0[3] -.sym 12840 io_pmod_SB_DFFSS_Q_D_SB_LUT4_O_I0[2] -.sym 12844 rx_09_fifo.wr_addr_gray_SB_LUT4_I2_1_O[5] -.sym 12845 rx_09_fifo.wr_addr_gray_SB_LUT4_I2_1_O[6] -.sym 12849 rx_09_fifo.wr_addr_gray_SB_LUT4_I2_1_O[5] -.sym 12852 rx_09_fifo.full_o_SB_LUT4_I3_O[2] -.sym 12857 rx_09_fifo.wr_addr_gray_SB_LUT4_I2_1_O[1] -.sym 12858 rx_09_fifo.wr_addr[0] -.sym 12861 rx_09_fifo.wr_addr_gray_SB_LUT4_I2_1_O[2] -.sym 12863 rx_09_fifo.full_o_SB_LUT4_I3_O[1] -.sym 12866 r_counter[0]_$glb_clk -.sym 12867 i_smi_a1_SB_LUT4_I1_O[2]_$glb_sr -.sym 12868 spi_if_ins.spi.o_spi_miso_SB_DFFE_Q_D_SB_LUT4_O_I2_SB_LUT4_O_I0[1] -.sym 12869 spi_if_ins.spi.o_spi_miso_SB_DFFE_Q_D_SB_LUT4_O_I2_SB_LUT4_O_I0_SB_LUT4_O_I3[1] -.sym 12870 spi_if_ins.spi.r_tx_byte[6] -.sym 12871 spi_if_ins.spi.r_tx_byte[1] -.sym 12872 spi_if_ins.spi.o_spi_miso_SB_DFFE_Q_D_SB_LUT4_O_I2_SB_LUT4_O_I0[2] -.sym 12873 spi_if_ins.spi.o_spi_miso_SB_DFFE_Q_D_SB_LUT4_O_I2_SB_LUT4_O_I0[0] -.sym 12874 spi_if_ins.spi.o_spi_miso_SB_DFFE_Q_D_SB_LUT4_O_I2[1] -.sym 12875 spi_if_ins.spi.o_spi_miso_SB_DFFE_Q_D_SB_LUT4_O_I2_SB_LUT4_O_I0_SB_LUT4_O_I3[3] -.sym 12885 spi_if_ins.spi.o_spi_miso_SB_DFFE_Q_E -.sym 12888 spi_if_ins.spi.o_spi_miso_SB_DFFE_Q_E -.sym 12889 spi_if_ins.r_tx_data_valid_SB_LUT4_I3_O[2] -.sym 12890 rx_09_fifo.rd_addr_gray_SB_DFFESR_Q_5_D[0] -.sym 12891 io_pmod[2]$SB_IO_IN -.sym 12892 rx_09_fifo.wr_addr_gray[5] -.sym 12893 $PACKER_VCC_NET -.sym 12894 spi_if_ins.r_tx_byte[1] -.sym 12895 $io_pmod[2]$iobuf_i -.sym 12896 $PACKER_VCC_NET -.sym 12897 w_rx_09_fifo_full -.sym 12899 spi_if_ins.r_tx_byte[4] -.sym 12910 rx_09_fifo.full_o_SB_LUT4_I3_O[2] -.sym 12911 rx_09_fifo.wr_addr_gray_SB_DFFESR_Q_2_D[2] -.sym 12912 rx_09_fifo.full_o_SB_LUT4_I3_O_SB_LUT4_I3_O[2] -.sym 12915 rx_09_fifo.full_o_SB_LUT4_I3_O_SB_LUT4_I3_O[0] -.sym 12916 rx_09_fifo.wr_addr_gray_SB_DFFESR_Q_5_D[1] -.sym 12918 rx_09_fifo.wr_addr_gray_SB_DFFESR_Q_7_D[2] -.sym 12919 rx_09_fifo.full_o_SB_DFFSR_Q_D_SB_LUT4_O_I0_SB_LUT4_O_1_I0[2] -.sym 12920 rx_09_fifo.wr_addr_gray_SB_LUT4_I2_1_O[1] -.sym 12921 rx_09_fifo.wr_addr_gray_SB_DFFESR_Q_2_D[1] -.sym 12922 rx_09_fifo.wr_addr_gray_SB_DFFESR_Q_5_D[2] -.sym 12923 rx_09_fifo.wr_addr_gray_SB_DFFESR_Q_7_D[1] -.sym 12924 rx_09_fifo.full_o_SB_LUT4_I3_O[1] -.sym 12925 rx_09_fifo.rd_addr_gray_wr_r[6] -.sym 12926 rx_09_fifo.full_o_SB_LUT4_I3_O_SB_LUT4_I3_O[3] -.sym 12929 rx_09_fifo.full_o_SB_DFFSR_Q_D_SB_LUT4_O_I0_SB_LUT4_O_I0[1] -.sym 12930 rx_09_fifo.rd_addr_gray_wr_r[0] -.sym 12931 rx_09_fifo.rd_addr_gray_wr_r[2] -.sym 12935 rx_09_fifo.full_o_SB_DFFSR_Q_D_SB_LUT4_O_I0_SB_LUT4_O_I2_SB_LUT4_O_I3[0] -.sym 12936 lvds_rx_09_inst.r_push_SB_LUT4_I3_O -.sym 12940 rx_09_fifo.full_o_SB_LUT4_I3_O_SB_LUT4_I3_O[1] -.sym 12942 rx_09_fifo.full_o_SB_LUT4_I3_O_SB_LUT4_I3_O[0] -.sym 12943 rx_09_fifo.full_o_SB_LUT4_I3_O_SB_LUT4_I3_O[2] -.sym 12944 rx_09_fifo.full_o_SB_LUT4_I3_O_SB_LUT4_I3_O[1] -.sym 12945 rx_09_fifo.full_o_SB_LUT4_I3_O_SB_LUT4_I3_O[3] -.sym 12948 rx_09_fifo.full_o_SB_DFFSR_Q_D_SB_LUT4_O_I0_SB_LUT4_O_I2_SB_LUT4_O_I3[0] -.sym 12949 rx_09_fifo.wr_addr_gray_SB_DFFESR_Q_2_D[2] -.sym 12950 rx_09_fifo.wr_addr_gray_SB_DFFESR_Q_2_D[1] -.sym 12951 rx_09_fifo.rd_addr_gray_wr_r[6] -.sym 12954 rx_09_fifo.wr_addr_gray_SB_LUT4_I2_1_O[1] -.sym 12960 rx_09_fifo.full_o_SB_LUT4_I3_O[2] -.sym 12963 rx_09_fifo.full_o_SB_LUT4_I3_O[1] -.sym 12967 rx_09_fifo.wr_addr_gray_SB_DFFESR_Q_2_D[1] -.sym 12975 rx_09_fifo.wr_addr_gray_SB_DFFESR_Q_2_D[2] -.sym 12978 rx_09_fifo.full_o_SB_DFFSR_Q_D_SB_LUT4_O_I0_SB_LUT4_O_I0[1] -.sym 12979 rx_09_fifo.rd_addr_gray_wr_r[0] -.sym 12980 rx_09_fifo.wr_addr_gray_SB_DFFESR_Q_7_D[2] -.sym 12981 rx_09_fifo.wr_addr_gray_SB_DFFESR_Q_7_D[1] -.sym 12984 rx_09_fifo.wr_addr_gray_SB_DFFESR_Q_5_D[1] -.sym 12985 rx_09_fifo.wr_addr_gray_SB_DFFESR_Q_5_D[2] -.sym 12986 rx_09_fifo.full_o_SB_DFFSR_Q_D_SB_LUT4_O_I0_SB_LUT4_O_1_I0[2] -.sym 12987 rx_09_fifo.rd_addr_gray_wr_r[2] -.sym 12988 lvds_rx_09_inst.r_push_SB_LUT4_I3_O +.sym 12744 i_smi_a1_SB_LUT4_I1_O_SB_LUT4_O_I2_SB_LUT4_I0_O[2]_$glb_sr +.sym 12745 rx_09_fifo.wr_addr_gray_rd[0] +.sym 12746 smi_ctrl_ins.r_fifo_09_pull_SB_LUT4_I2_O[3] +.sym 12747 rx_09_fifo.wr_addr_gray_rd[1] +.sym 12748 rx_09_fifo.full_o_SB_DFFSR_Q_D_SB_LUT4_O_I1[2] +.sym 12749 rx_09_fifo.full_o_SB_LUT4_I3_O_SB_LUT4_I3_O[1] +.sym 12750 rx_09_fifo.full_o_SB_LUT4_I3_O_SB_LUT4_I3_O[0] +.sym 12751 rx_09_fifo.wr_addr_gray_rd[3] +.sym 12752 rx_09_fifo.wr_addr_gray_SB_DFFESR_Q_7_D[3] +.sym 12757 lvds_rx_09_inst.r_push_SB_LUT4_I3_1_O +.sym 12760 io_pmod_SB_DFFSS_Q_D_SB_LUT4_O_I0_SB_LUT4_O_3_I2[3] +.sym 12761 w_rx_09_fifo_push +.sym 12763 $PACKER_VCC_NET +.sym 12764 smi_ctrl_ins.int_cnt_24[5] +.sym 12765 io_pmod_SB_DFFSS_Q_D_SB_LUT4_O_I0_SB_LUT4_O_I0[1] +.sym 12772 io_pmod_SB_DFFSS_Q_D_SB_LUT4_O_I0_SB_LUT4_O_I0[1] +.sym 12779 smi_ctrl_ins.int_cnt_09_SB_DFFESR_Q_E +.sym 12780 smi_ctrl_ins.int_cnt_09[3] +.sym 12786 rx_09_fifo.wr_addr[0] +.sym 12790 rx_09_fifo.wr_addr[4] +.sym 12791 rx_09_fifo.full_o_SB_DFFSR_Q_D_SB_LUT4_O_I1_SB_LUT4_O_I0_SB_LUT4_O_1_I3[1] +.sym 12792 rx_09_fifo.wr_addr[2] +.sym 12793 rx_09_fifo.wr_addr[6] +.sym 12795 rx_09_fifo.wr_addr[3] +.sym 12796 rx_09_fifo.wr_addr[5] +.sym 12805 rx_09_fifo.wr_addr[7] +.sym 12818 $nextpnr_ICESTORM_LC_8$O +.sym 12821 rx_09_fifo.wr_addr[0] +.sym 12824 rx_09_fifo.wr_addr_gray_SB_LUT4_I2_1_I3[2] +.sym 12827 rx_09_fifo.full_o_SB_DFFSR_Q_D_SB_LUT4_O_I1_SB_LUT4_O_I0_SB_LUT4_O_1_I3[1] +.sym 12830 rx_09_fifo.wr_addr_gray_SB_LUT4_I2_1_I3[3] +.sym 12833 rx_09_fifo.wr_addr[2] +.sym 12834 rx_09_fifo.wr_addr_gray_SB_LUT4_I2_1_I3[2] +.sym 12836 rx_09_fifo.wr_addr_gray_SB_LUT4_I2_1_I3[4] +.sym 12838 rx_09_fifo.wr_addr[3] +.sym 12840 rx_09_fifo.wr_addr_gray_SB_LUT4_I2_1_I3[3] +.sym 12842 rx_09_fifo.wr_addr_gray_SB_LUT4_I2_1_I3[5] +.sym 12845 rx_09_fifo.wr_addr[4] +.sym 12846 rx_09_fifo.wr_addr_gray_SB_LUT4_I2_1_I3[4] +.sym 12848 rx_09_fifo.wr_addr_gray_SB_LUT4_I2_1_I3[6] +.sym 12851 rx_09_fifo.wr_addr[5] +.sym 12852 rx_09_fifo.wr_addr_gray_SB_LUT4_I2_1_I3[5] +.sym 12854 rx_09_fifo.wr_addr_gray_SB_LUT4_I2_1_I3[7] +.sym 12856 rx_09_fifo.wr_addr[6] +.sym 12858 rx_09_fifo.wr_addr_gray_SB_LUT4_I2_1_I3[6] +.sym 12863 rx_09_fifo.wr_addr[7] +.sym 12864 rx_09_fifo.wr_addr_gray_SB_LUT4_I2_1_I3[7] +.sym 12868 rx_09_fifo.wr_addr_gray_SB_DFFESR_Q_7_D[1] +.sym 12869 spi_if_ins.r_tx_byte[7] +.sym 12870 spi_if_ins.r_tx_byte[3] +.sym 12871 spi_if_ins.r_tx_byte[1] +.sym 12873 spi_if_ins.r_tx_byte[2] +.sym 12875 spi_if_ins.r_tx_byte[5] +.sym 12881 io_pmod[2]$SB_IO_IN +.sym 12882 rx_09_fifo.rd_addr[0] +.sym 12884 spi_if_ins.spi.o_spi_miso_SB_DFFE_Q_E +.sym 12887 io_pmod_SB_DFFSS_Q_D_SB_LUT4_O_I0_SB_LUT4_O_I2[1] +.sym 12888 io_pmod_SB_DFFSS_Q_D_SB_LUT4_O_I0_SB_LUT4_O_2_I0[3] +.sym 12889 io_pmod_SB_DFFSS_Q_D_SB_LUT4_O_I0_SB_LUT4_O_3_I2[3] +.sym 12894 w_rx_09_fifo_full +.sym 12903 smi_ctrl_ins.o_data_out_SB_DFFESS_Q_E +.sym 12909 rx_09_fifo.rd_addr_gray_wr_r[5] +.sym 12910 rx_09_fifo.rd_addr_gray_wr_r[0] +.sym 12912 lvds_rx_09_inst.r_push_SB_LUT4_I3_I0[1] +.sym 12913 lvds_rx_09_inst.r_push_SB_LUT4_I3_O[2] +.sym 12914 lvds_rx_09_inst.r_push_SB_LUT4_I3_O[0] +.sym 12915 lvds_rx_09_inst.r_push_SB_LUT4_I3_O[1] +.sym 12916 rx_09_fifo.wr_addr_gray_SB_LUT4_I2_1_O[7] +.sym 12919 rx_09_fifo.full_o_SB_DFFSR_Q_D_SB_LUT4_O_I1[0] +.sym 12920 rx_09_fifo.full_o_SB_DFFSR_Q_D_SB_LUT4_O_I1[2] +.sym 12921 lvds_rx_09_inst.r_push_SB_LUT4_I3_O_SB_LUT4_O_I3[4] +.sym 12922 lvds_rx_09_inst.r_push_SB_LUT4_I3_O_SB_LUT4_O_I3[5] +.sym 12923 rx_09_fifo.rd_addr_gray_wr_r[6] +.sym 12924 lvds_rx_09_inst.r_push_SB_LUT4_I3_I0[2] +.sym 12925 rx_09_fifo.wr_addr[0] +.sym 12926 lvds_rx_09_inst.r_push_SB_LUT4_I3_I0[0] +.sym 12930 rx_09_fifo.full_o_SB_DFFSR_Q_D_SB_LUT4_O_I1_SB_LUT4_O_I0_SB_LUT4_O_1_I3[1] +.sym 12931 rx_09_fifo.full_o_SB_DFFSR_Q_D_SB_LUT4_O_I1[1] +.sym 12938 w_rx_09_fifo_full +.sym 12939 lvds_rx_09_inst.r_push_SB_LUT4_I3_O[3] +.sym 12940 w_rx_09_fifo_push +.sym 12942 rx_09_fifo.wr_addr[0] +.sym 12945 rx_09_fifo.full_o_SB_DFFSR_Q_D_SB_LUT4_O_I1_SB_LUT4_O_I0_SB_LUT4_O_1_I3[1] +.sym 12948 rx_09_fifo.rd_addr_gray_wr_r[0] +.sym 12950 rx_09_fifo.full_o_SB_DFFSR_Q_D_SB_LUT4_O_I1_SB_LUT4_O_I0_SB_LUT4_O_1_I3[1] +.sym 12951 rx_09_fifo.wr_addr[0] +.sym 12954 lvds_rx_09_inst.r_push_SB_LUT4_I3_O[1] +.sym 12955 lvds_rx_09_inst.r_push_SB_LUT4_I3_O[0] +.sym 12956 lvds_rx_09_inst.r_push_SB_LUT4_I3_O[2] +.sym 12957 lvds_rx_09_inst.r_push_SB_LUT4_I3_O[3] +.sym 12960 rx_09_fifo.wr_addr_gray_SB_LUT4_I2_1_O[7] +.sym 12961 w_rx_09_fifo_push +.sym 12962 lvds_rx_09_inst.r_push_SB_LUT4_I3_O[0] +.sym 12963 w_rx_09_fifo_full +.sym 12966 lvds_rx_09_inst.r_push_SB_LUT4_I3_O_SB_LUT4_O_I3[5] +.sym 12967 rx_09_fifo.rd_addr_gray_wr_r[6] +.sym 12972 rx_09_fifo.full_o_SB_DFFSR_Q_D_SB_LUT4_O_I1[0] +.sym 12973 rx_09_fifo.full_o_SB_DFFSR_Q_D_SB_LUT4_O_I1[1] +.sym 12975 rx_09_fifo.full_o_SB_DFFSR_Q_D_SB_LUT4_O_I1[2] +.sym 12978 w_rx_09_fifo_push +.sym 12979 lvds_rx_09_inst.r_push_SB_LUT4_I3_I0[1] +.sym 12980 lvds_rx_09_inst.r_push_SB_LUT4_I3_I0[2] +.sym 12981 lvds_rx_09_inst.r_push_SB_LUT4_I3_I0[0] +.sym 12984 lvds_rx_09_inst.r_push_SB_LUT4_I3_O_SB_LUT4_O_I3[4] +.sym 12985 rx_09_fifo.rd_addr_gray_wr_r[5] +.sym 12987 lvds_rx_09_inst.r_push_SB_LUT4_I3_O_SB_LUT4_O_I3[5] .sym 12989 lvds_clock_buf -.sym 12990 i_smi_a1_SB_LUT4_I1_O[2]_$glb_sr -.sym 12991 spi_if_ins.spi.r_tx_byte[7] -.sym 12992 spi_if_ins.spi.r_tx_byte[2] -.sym 12993 spi_if_ins.spi.o_spi_miso_SB_DFFE_Q_D_SB_LUT4_O_I2_SB_LUT4_O_I0_SB_LUT4_O_I3[0] -.sym 12994 spi_if_ins.spi.r_tx_byte[5] -.sym 12996 spi_if_ins.spi.r_tx_byte[3] -.sym 13001 i_smi_a1_SB_LUT4_I1_O[2] -.sym 13005 spi_if_ins.w_rx_data[6] -.sym 13009 spi_if_ins.w_rx_data[0] -.sym 13012 $PACKER_VCC_NET -.sym 13015 spi_if_ins.r_tx_byte[6] -.sym 13021 spi_if_ins.r_tx_data_valid_SB_DFFESR_Q_D_SB_LUT4_I3_O -.sym 13023 w_rx_09_fifo_full -.sym 13024 spi_if_ins.r_tx_data_valid_SB_LUT4_I3_O[2] -.sym 13026 $io_pmod[4]$iobuf_i -.sym 13032 rx_09_fifo.full_o_SB_DFFSR_Q_D_SB_LUT4_O_I0[3] -.sym 13033 rx_09_fifo.full_o_SB_DFFSR_Q_D_SB_LUT4_O_I0_SB_LUT4_O_1_I1[1] -.sym 13034 rx_09_fifo.full_o_SB_DFFSR_Q_D_SB_LUT4_O_I0_SB_LUT4_O_I2[1] -.sym 13035 rx_09_fifo.full_o_SB_DFFSR_Q_D_SB_LUT4_O_I0_SB_LUT4_O_1_I0[1] -.sym 13036 rx_09_fifo.full_o_SB_DFFSR_Q_D_SB_LUT4_O_I0_SB_LUT4_O_1_I0[3] -.sym 13037 w_rx_09_fifo_push -.sym 13038 rx_09_fifo.full_o_SB_DFFSR_Q_D_SB_LUT4_O_I0_SB_LUT4_O_I2_SB_LUT4_O_I3[0] -.sym 13039 rx_09_fifo.full_o_SB_DFFSR_Q_D_SB_LUT4_O_I0_SB_LUT4_O_I2_SB_LUT4_O_I3[3] -.sym 13040 rx_09_fifo.full_o_SB_LUT4_I3_O[0] -.sym 13041 rx_09_fifo.rd_addr_gray_wr_r[2] -.sym 13042 rx_09_fifo.full_o_SB_DFFSR_Q_D_SB_LUT4_O_I0_SB_LUT4_O_1_I1[2] -.sym 13043 rx_09_fifo.full_o_SB_DFFSR_Q_D_SB_LUT4_O_I0_SB_LUT4_O_1_I0[2] -.sym 13044 rx_09_fifo.full_o_SB_DFFSR_Q_D_SB_LUT4_O_I0_SB_LUT4_O_1_I0[3] -.sym 13045 rx_09_fifo.full_o_SB_DFFSR_Q_D_SB_LUT4_O_I0_SB_LUT4_O_1_I1[5] -.sym 13046 rx_09_fifo.full_o_SB_DFFSR_Q_D_SB_LUT4_O_I0_SB_LUT4_O_I2[3] -.sym 13047 rx_09_fifo.full_o_SB_DFFSR_Q_D_SB_LUT4_O_I0_SB_LUT4_O_I0[1] -.sym 13049 rx_09_fifo.full_o_SB_DFFSR_Q_D_SB_LUT4_O_I0_SB_LUT4_O_I0[2] -.sym 13050 rx_09_fifo.full_o_SB_DFFSR_Q_D_SB_LUT4_O_I0_SB_LUT4_O_I0[0] -.sym 13055 rx_09_fifo.full_o_SB_DFFSR_Q_D_SB_LUT4_O_I0_SB_LUT4_O_1_I0[0] -.sym 13058 rx_09_fifo.full_o_SB_DFFSR_Q_D_SB_LUT4_O_I0[0] -.sym 13059 rx_09_fifo.full_o_SB_DFFSR_Q_D_SB_LUT4_O_I0[1] -.sym 13060 rx_09_fifo.full_o_SB_DFFSR_Q_D_SB_LUT4_O_I0_SB_LUT4_O_I2[2] -.sym 13065 rx_09_fifo.full_o_SB_DFFSR_Q_D_SB_LUT4_O_I0[3] -.sym 13066 rx_09_fifo.full_o_SB_DFFSR_Q_D_SB_LUT4_O_I0[0] -.sym 13067 rx_09_fifo.full_o_SB_DFFSR_Q_D_SB_LUT4_O_I0[1] -.sym 13068 w_rx_09_fifo_push -.sym 13072 rx_09_fifo.rd_addr_gray_wr_r[2] -.sym 13073 rx_09_fifo.full_o_SB_DFFSR_Q_D_SB_LUT4_O_I0_SB_LUT4_O_1_I1[2] -.sym 13077 rx_09_fifo.full_o_SB_DFFSR_Q_D_SB_LUT4_O_I0_SB_LUT4_O_1_I0[2] -.sym 13078 rx_09_fifo.full_o_SB_DFFSR_Q_D_SB_LUT4_O_I0_SB_LUT4_O_1_I0[0] -.sym 13079 rx_09_fifo.full_o_SB_DFFSR_Q_D_SB_LUT4_O_I0_SB_LUT4_O_1_I0[3] -.sym 13080 rx_09_fifo.full_o_SB_DFFSR_Q_D_SB_LUT4_O_I0_SB_LUT4_O_1_I0[1] -.sym 13083 rx_09_fifo.full_o_SB_DFFSR_Q_D_SB_LUT4_O_I0_SB_LUT4_O_I2[2] -.sym 13084 rx_09_fifo.full_o_SB_DFFSR_Q_D_SB_LUT4_O_I0_SB_LUT4_O_I0[0] -.sym 13085 rx_09_fifo.full_o_SB_DFFSR_Q_D_SB_LUT4_O_I0_SB_LUT4_O_I2[3] -.sym 13086 rx_09_fifo.full_o_SB_DFFSR_Q_D_SB_LUT4_O_I0_SB_LUT4_O_I2[1] -.sym 13089 rx_09_fifo.full_o_SB_DFFSR_Q_D_SB_LUT4_O_I0_SB_LUT4_O_I0[0] -.sym 13090 rx_09_fifo.full_o_SB_DFFSR_Q_D_SB_LUT4_O_I0_SB_LUT4_O_1_I1[1] -.sym 13091 rx_09_fifo.full_o_SB_DFFSR_Q_D_SB_LUT4_O_I0_SB_LUT4_O_I0[1] -.sym 13092 rx_09_fifo.full_o_SB_DFFSR_Q_D_SB_LUT4_O_I0_SB_LUT4_O_I0[2] -.sym 13101 rx_09_fifo.full_o_SB_DFFSR_Q_D_SB_LUT4_O_I0_SB_LUT4_O_1_I1[5] -.sym 13102 rx_09_fifo.full_o_SB_DFFSR_Q_D_SB_LUT4_O_I0_SB_LUT4_O_I2_SB_LUT4_O_I3[3] -.sym 13103 rx_09_fifo.full_o_SB_DFFSR_Q_D_SB_LUT4_O_I0_SB_LUT4_O_I2_SB_LUT4_O_I3[0] -.sym 13104 rx_09_fifo.full_o_SB_DFFSR_Q_D_SB_LUT4_O_I0_SB_LUT4_O_1_I0[3] -.sym 13107 rx_09_fifo.full_o_SB_LUT4_I3_O[0] -.sym 13109 rx_09_fifo.full_o_SB_DFFSR_Q_D_SB_LUT4_O_I0_SB_LUT4_O_1_I1[2] -.sym 13112 lvds_clock_buf -.sym 13113 i_smi_a1_SB_LUT4_I1_O[2]_$glb_sr -.sym 13115 spi_if_ins.r_tx_byte[0] -.sym 13117 io_ctrl_ins.i_cs_SB_LUT4_I3_I0[0] -.sym 13118 spi_if_ins.r_tx_byte[5] -.sym 13120 spi_if_ins.r_tx_byte[6] -.sym 13128 $PACKER_VCC_NET -.sym 13136 spi_if_ins.r_tx_data_valid_SB_LUT4_I3_O[2] -.sym 13141 spi_if_ins.r_tx_byte[7] -.sym 13147 spi_if_ins.r_tx_byte[2] -.sym 13157 w_rx_24_fifo_pull -.sym 13159 w_rx_09_fifo_data[0] -.sym 13169 lvds_rx_09_inst.r_state_if_SB_LUT4_I2_O[0] -.sym 13176 i_smi_a1_SB_LUT4_I1_O[2] -.sym 13194 i_smi_a1_SB_LUT4_I1_O[2] -.sym 13197 w_rx_24_fifo_pull -.sym 13206 lvds_rx_09_inst.r_state_if_SB_LUT4_I2_O[0] -.sym 13207 w_rx_09_fifo_data[0] -.sym 13234 w_lvds_rx_09_d1_SB_LUT4_I0_O_SB_LUT4_I3_O_$glb_ce -.sym 13235 lvds_clock_buf -.sym 13236 i_smi_a1_SB_LUT4_I1_O[2]_$glb_sr -.sym 13237 r_tx_data[0] -.sym 13238 spi_if_ins.o_cs_SB_LUT4_I2_2_O[2] -.sym 13239 spi_if_ins.o_cs_SB_LUT4_I2_O[1] -.sym 13240 smi_ctrl_ins.o_data_out_SB_LUT4_I1_O[0] -.sym 13249 spi_if_ins.o_load_cmd_SB_DFFESR_Q_D[2] -.sym 13252 io_ctrl_ins.i_cs_SB_LUT4_I3_I0[0] -.sym 13256 $PACKER_VCC_NET -.sym 13257 spi_if_ins.r_tx_data_valid_SB_DFFESR_Q_E -.sym 13261 spi_if_ins.r_tx_byte[3] -.sym 13271 w_tx_data_smi[1] -.sym 13281 w_rx_24_fifo_full -.sym 13282 io_ctrl_ins.led0_state_SB_LUT4_I3_I0[0] -.sym 13285 rx_24_fifo.empty_o_SB_LUT4_I3_O_SB_LUT4_O_1_I3[2] -.sym 13286 rx_24_fifo.wr_addr_gray_rd_r[3] -.sym 13287 io_pmod[2]$SB_IO_IN -.sym 13291 rx_24_fifo.rd_addr[4] -.sym 13295 w_rx_09_fifo_full -.sym 13296 smi_ctrl_ins.o_data_out_SB_DFFESS_Q_E -.sym 13298 w_rx_24_fifo_empty -.sym 13313 w_rx_24_fifo_empty -.sym 13319 w_rx_09_fifo_full -.sym 13325 io_pmod[2]$SB_IO_IN -.sym 13336 w_rx_24_fifo_full -.sym 13353 rx_24_fifo.wr_addr_gray_rd_r[3] -.sym 13354 rx_24_fifo.rd_addr[4] -.sym 13355 rx_24_fifo.empty_o_SB_LUT4_I3_O_SB_LUT4_O_1_I3[2] -.sym 13357 smi_ctrl_ins.o_data_out_SB_DFFESS_Q_E -.sym 13358 r_counter[0]_$glb_clk -.sym 13359 io_ctrl_ins.led0_state_SB_LUT4_I3_I0[0] -.sym 13360 spi_if_ins.o_load_cmd_SB_DFFESR_Q_D[0] -.sym 13361 spi_if_ins.r_tx_byte[7] -.sym 13362 smi_ctrl_ins.o_data_out_SB_DFFESS_Q_E -.sym 13363 spi_if_ins.o_cs_SB_LUT4_I2_2_O[3] -.sym 13364 spi_if_ins.r_tx_byte[2] -.sym 13366 spi_if_ins.r_tx_byte[3] -.sym 13367 spi_if_ins.r_tx_byte[4] -.sym 13373 io_pmod[2]$SB_IO_IN -.sym 13377 w_rx_24_fifo_full -.sym 13378 spi_if_ins.state_if_SB_DFFESR_Q_1_R -.sym 13379 i_smi_a1_SB_LUT4_I1_O[2] -.sym 13384 spi_if_ins.o_cs_SB_LUT4_I2_O[1] -.sym 13385 w_rx_09_fifo_full -.sym 13386 smi_ctrl_ins.o_data_out_SB_LUT4_I1_O[0] -.sym 13388 $io_pmod[2]$iobuf_i -.sym 13389 w_tx_data_smi[3] -.sym 13390 spi_if_ins.r_tx_byte[1] -.sym 13391 spi_if_ins.r_tx_byte[4] -.sym 13393 io_ctrl_ins.o_data_out_SB_DFFESR_Q_6_E -.sym 13401 w_tx_data_smi[2] -.sym 13402 spi_if_ins.o_cs_SB_LUT4_I2_2_O[2] -.sym 13403 smi_ctrl_ins.r_fifo_24_pull_SB_LUT4_I3_O -.sym 13408 rx_24_fifo.empty_o_SB_LUT4_I3_O_SB_LUT4_O_1_I3[3] -.sym 13411 spi_if_ins.o_cs_SB_LUT4_I2_O[1] -.sym 13412 rx_24_fifo.empty_o_SB_LUT4_I3_O_SB_LUT4_O_1_I3[1] -.sym 13420 rx_24_fifo.empty_o_SB_LUT4_I3_O_SB_LUT4_O_1_I3[0] -.sym 13427 rx_24_fifo.rd_addr_gray_SB_LUT4_I2_O[2] -.sym 13428 rx_24_fifo.rd_addr_gray_SB_LUT4_I2_O[3] -.sym 13429 rx_24_fifo.empty_o_SB_DFFSS_Q_D_SB_LUT4_O_I0_SB_LUT4_O_I0[1] -.sym 13430 rx_24_fifo.empty_o_SB_DFFSS_Q_D_SB_LUT4_O_I0_SB_LUT4_O_I0[3] -.sym 13432 rx_24_fifo.empty_o_SB_LUT4_I3_O_SB_LUT4_O_1_I3[2] -.sym 13443 rx_24_fifo.empty_o_SB_DFFSS_Q_D_SB_LUT4_O_I0_SB_LUT4_O_I0[3] -.sym 13446 rx_24_fifo.empty_o_SB_LUT4_I3_O_SB_LUT4_O_1_I3[2] -.sym 13447 rx_24_fifo.empty_o_SB_LUT4_I3_O_SB_LUT4_O_1_I3[0] -.sym 13448 rx_24_fifo.empty_o_SB_LUT4_I3_O_SB_LUT4_O_1_I3[1] -.sym 13449 rx_24_fifo.empty_o_SB_LUT4_I3_O_SB_LUT4_O_1_I3[3] -.sym 13452 rx_24_fifo.rd_addr_gray_SB_LUT4_I2_O[2] -.sym 13458 w_tx_data_smi[2] -.sym 13459 spi_if_ins.o_cs_SB_LUT4_I2_2_O[2] -.sym 13461 spi_if_ins.o_cs_SB_LUT4_I2_O[1] -.sym 13464 rx_24_fifo.empty_o_SB_DFFSS_Q_D_SB_LUT4_O_I0_SB_LUT4_O_I0[1] -.sym 13479 rx_24_fifo.rd_addr_gray_SB_LUT4_I2_O[3] -.sym 13480 smi_ctrl_ins.r_fifo_24_pull_SB_LUT4_I3_O -.sym 13481 r_counter[0]_$glb_clk -.sym 13482 i_smi_a1_SB_LUT4_I1_O[2]_$glb_sr -.sym 13483 r_tx_data[1] -.sym 13485 io_ctrl_ins.i_cs_SB_LUT4_I3_O[0] -.sym 13486 r_tx_data[7] -.sym 13487 io_ctrl_ins.o_data_out_SB_DFFESR_Q_E[3] -.sym 13488 r_tx_data[4] -.sym 13489 r_tx_data[2] -.sym 13490 r_tx_data[3] -.sym 13497 w_cs[0] -.sym 13502 spi_if_ins.o_load_cmd_SB_DFFESR_Q_D[0] -.sym 13503 $PACKER_VCC_NET -.sym 13504 spi_if_ins.state_if[1] -.sym 13511 w_tx_data_io[0] -.sym 13514 spi_if_ins.r_tx_data_valid_SB_DFFESR_Q_D_SB_LUT4_I3_O -.sym 13516 spi_if_ins.o_cs_SB_LUT4_I2_2_O[2] -.sym 13524 smi_ctrl_ins.r_fifo_24_pull_SB_LUT4_I1_I2[2] -.sym 13525 rx_24_fifo.empty_o_SB_DFFSS_Q_D_SB_LUT4_O_I0_SB_LUT4_O_I0[1] -.sym 13526 rx_24_fifo.empty_o_SB_LUT4_I3_O[2] -.sym 13527 rx_24_fifo.empty_o_SB_LUT4_I3_O[0] -.sym 13528 w_rx_24_fifo_pull -.sym 13529 rx_24_fifo.rd_addr[4] -.sym 13530 rx_24_fifo.empty_o_SB_DFFSS_Q_D_SB_LUT4_O_I0_SB_LUT4_O_I0[0] -.sym 13531 smi_ctrl_ins.r_fifo_24_pull_SB_LUT4_I1_I2[1] -.sym 13532 rx_24_fifo.empty_o_SB_LUT4_I3_O[1] -.sym 13533 rx_24_fifo.rd_addr[5] -.sym 13534 rx_24_fifo.empty_o_SB_DFFSS_Q_D_SB_LUT4_O_I0_SB_LUT4_O_I0[2] -.sym 13535 rx_24_fifo.empty_o_SB_DFFSS_Q_D_SB_LUT4_O_I0_SB_LUT4_O_I0[3] -.sym 13536 rx_24_fifo.empty_o_SB_DFFSS_Q_D_SB_LUT4_O_I0[2] -.sym 13537 w_ioc[0] -.sym 13538 w_ioc[2] -.sym 13539 rx_24_fifo.empty_o_SB_DFFSS_Q_D_SB_LUT4_O_I0_SB_LUT4_O_I0[2] -.sym 13547 rx_24_fifo.empty_o_SB_DFFSS_Q_D_SB_LUT4_O_I0[0] -.sym 13551 w_ioc[1] -.sym 13552 io_ctrl_ins.o_data_out_SB_DFFESR_Q_E[3] -.sym 13553 rx_24_fifo.empty_o_SB_DFFSS_Q_D_SB_LUT4_O_I0[3] -.sym 13554 w_rx_24_fifo_empty -.sym 13555 rx_24_fifo.empty_o_SB_DFFSS_Q_D_SB_LUT4_O_I0[1] -.sym 13557 rx_24_fifo.rd_addr[5] -.sym 13558 w_rx_24_fifo_empty -.sym 13559 rx_24_fifo.empty_o_SB_DFFSS_Q_D_SB_LUT4_O_I0_SB_LUT4_O_I0[2] -.sym 13560 rx_24_fifo.rd_addr[4] -.sym 13569 w_ioc[1] -.sym 13570 w_ioc[2] -.sym 13571 w_ioc[0] -.sym 13572 io_ctrl_ins.o_data_out_SB_DFFESR_Q_E[3] -.sym 13575 io_ctrl_ins.o_data_out_SB_DFFESR_Q_E[3] -.sym 13581 w_rx_24_fifo_pull -.sym 13582 smi_ctrl_ins.r_fifo_24_pull_SB_LUT4_I1_I2[1] -.sym 13583 smi_ctrl_ins.r_fifo_24_pull_SB_LUT4_I1_I2[2] -.sym 13587 rx_24_fifo.empty_o_SB_DFFSS_Q_D_SB_LUT4_O_I0_SB_LUT4_O_I0[2] -.sym 13588 rx_24_fifo.empty_o_SB_DFFSS_Q_D_SB_LUT4_O_I0_SB_LUT4_O_I0[0] -.sym 13589 rx_24_fifo.empty_o_SB_DFFSS_Q_D_SB_LUT4_O_I0_SB_LUT4_O_I0[1] -.sym 13590 rx_24_fifo.empty_o_SB_DFFSS_Q_D_SB_LUT4_O_I0_SB_LUT4_O_I0[3] -.sym 13593 rx_24_fifo.empty_o_SB_DFFSS_Q_D_SB_LUT4_O_I0[1] -.sym 13594 rx_24_fifo.empty_o_SB_DFFSS_Q_D_SB_LUT4_O_I0[0] -.sym 13595 rx_24_fifo.empty_o_SB_DFFSS_Q_D_SB_LUT4_O_I0[3] -.sym 13596 rx_24_fifo.empty_o_SB_DFFSS_Q_D_SB_LUT4_O_I0[2] -.sym 13599 rx_24_fifo.empty_o_SB_LUT4_I3_O[1] -.sym 13601 rx_24_fifo.empty_o_SB_LUT4_I3_O[0] -.sym 13602 rx_24_fifo.empty_o_SB_LUT4_I3_O[2] +.sym 12990 i_smi_a1_SB_LUT4_I1_O_SB_LUT4_O_I2_SB_LUT4_I0_O[2]_$glb_sr +.sym 12996 smi_ctrl_ins.int_cnt_09[3] +.sym 12997 smi_ctrl_ins.int_cnt_09[4] +.sym 12998 smi_ctrl_ins.int_cnt_09[5] +.sym 13005 rx_09_fifo.wr_addr[0] +.sym 13011 smi_ctrl_ins.int_cnt_24_SB_DFFESR_Q_E +.sym 13023 smi_ctrl_ins.int_cnt_09_SB_DFFESR_Q_D_SB_LUT4_O_I3[2] +.sym 13025 i_smi_a1_SB_LUT4_I1_O_SB_LUT4_O_I2_SB_LUT4_I0_O[2] +.sym 13026 w_tx_data_io[0] +.sym 13032 smi_ctrl_ins.int_cnt_09_SB_DFFESR_Q_E_SB_LUT4_O_I1[0] +.sym 13034 spi_if_ins.r_tx_data_valid_SB_DFFESR_Q_D_SB_LUT4_I3_O +.sym 13035 rx_09_fifo.full_o_SB_DFFSR_Q_D_SB_LUT4_O_I1_SB_LUT4_O_I0_SB_LUT4_O_1_I3[1] +.sym 13046 rx_09_fifo.full_o_SB_LUT4_I3_O[0] +.sym 13049 lvds_rx_09_inst.r_push_SB_LUT4_I3_O_SB_LUT4_O_I3[1] +.sym 13051 i_smi_a1_SB_LUT4_I1_O_SB_LUT4_O_I2_SB_LUT4_I0_O[2] +.sym 13055 r_tx_data[0] +.sym 13057 rx_09_fifo.full_o_SB_DFFSR_Q_D_SB_LUT4_O_I1_SB_LUT4_O_I0_SB_LUT4_O_1_I3[0] +.sym 13060 smi_ctrl_ins.int_cnt_09_SB_DFFESR_Q_E_SB_LUT4_O_I1[1] +.sym 13073 r_tx_data[0] +.sym 13078 lvds_rx_09_inst.r_push_SB_LUT4_I3_O_SB_LUT4_O_I3[1] +.sym 13080 rx_09_fifo.full_o_SB_LUT4_I3_O[0] +.sym 13083 lvds_rx_09_inst.r_push_SB_LUT4_I3_O_SB_LUT4_O_I3[1] +.sym 13085 rx_09_fifo.full_o_SB_DFFSR_Q_D_SB_LUT4_O_I1_SB_LUT4_O_I0_SB_LUT4_O_1_I3[1] +.sym 13086 rx_09_fifo.full_o_SB_DFFSR_Q_D_SB_LUT4_O_I1_SB_LUT4_O_I0_SB_LUT4_O_1_I3[0] +.sym 13095 i_smi_a1_SB_LUT4_I1_O_SB_LUT4_O_I2_SB_LUT4_I0_O[2] +.sym 13096 smi_ctrl_ins.int_cnt_09_SB_DFFESR_Q_E_SB_LUT4_O_I1[0] +.sym 13097 smi_ctrl_ins.int_cnt_09_SB_DFFESR_Q_E_SB_LUT4_O_I1[1] +.sym 13111 spi_if_ins.r_tx_data_valid_SB_DFFESR_Q_D_SB_LUT4_I3_O +.sym 13112 r_counter[0]_$glb_clk +.sym 13118 spi_if_ins.r_tx_data_valid_SB_DFFESR_Q_D[0] +.sym 13126 smi_ctrl_ins.int_cnt_09_SB_DFFESR_Q_D_SB_LUT4_O_I3[1] +.sym 13130 i_ss_SB_LUT4_I3_O +.sym 13140 spi_if_ins.r_tx_data_valid_SB_DFFESR_Q_D_SB_LUT4_I3_O +.sym 13146 w_tx_data_smi[1] +.sym 13156 io_pmod[2]$SB_IO_IN +.sym 13159 io_ctrl_ins.o_data_out_SB_DFFESR_Q_6_R[0] +.sym 13166 w_rx_09_fifo_full +.sym 13167 w_rx_24_fifo_empty +.sym 13173 smi_ctrl_ins.o_data_out_SB_DFFESS_Q_E +.sym 13188 w_rx_09_fifo_full +.sym 13201 w_rx_24_fifo_empty +.sym 13232 io_pmod[2]$SB_IO_IN +.sym 13234 smi_ctrl_ins.o_data_out_SB_DFFESS_Q_E +.sym 13235 r_counter[0]_$glb_clk +.sym 13236 io_ctrl_ins.o_data_out_SB_DFFESR_Q_6_R[0] +.sym 13238 w_cs[3] +.sym 13239 smi_ctrl_ins.o_data_out_SB_LUT4_I1_O[2] +.sym 13241 w_cs[2] +.sym 13242 w_cs[1] +.sym 13245 spi_if_ins.spi.r3_rx_done_SB_LUT4_I2_O +.sym 13253 $PACKER_VCC_NET +.sym 13254 i_smi_soe_se$rename$0 +.sym 13262 w_cs[2] +.sym 13264 spi_if_ins.o_load_cmd_SB_DFFESR_Q_D_SB_LUT4_I1_O[1] +.sym 13265 spi_if_ins.r_tx_data_valid_SB_DFFESR_Q_D[0] +.sym 13268 spi_if_ins.r_tx_data_valid_SB_DFFESR_Q_D_SB_LUT4_I3_O +.sym 13272 i_smi_a1_SB_LUT4_I1_O_SB_LUT4_O_I2_SB_LUT4_I0_O[2] +.sym 13281 lvds_rx_24_inst.r_state_if_SB_LUT4_I2_O[0] +.sym 13283 spi_if_ins.o_load_cmd_SB_DFFESR_Q_D_SB_LUT4_I1_O[0] +.sym 13285 w_tx_data_smi[0] +.sym 13290 spi_if_ins.r_tx_data_valid_SB_DFFESR_Q_D[0] +.sym 13291 spi_if_ins.o_load_cmd_SB_DFFESR_Q_D_SB_LUT4_I1_O[2] +.sym 13293 spi_if_ins.o_load_cmd_SB_DFFESR_Q_D_SB_LUT4_I1_O[1] +.sym 13296 w_tx_data_io[0] +.sym 13300 spi_if_ins.state_if[0] +.sym 13301 spi_if_ins.state_if[1] +.sym 13303 spi_if_ins.o_cs_SB_LUT4_I2_1_O[1] +.sym 13305 w_rx_24_fifo_data[29] +.sym 13306 smi_ctrl_ins.o_data_out_SB_LUT4_I1_O[0] +.sym 13307 spi_if_ins.state_if_SB_DFFESR_Q_D[2] +.sym 13308 spi_if_ins.o_load_cmd_SB_DFFESR_Q_D[0] +.sym 13309 w_rx_24_fifo_data[18] +.sym 13319 lvds_rx_24_inst.r_state_if_SB_LUT4_I2_O[0] +.sym 13320 w_rx_24_fifo_data[18] +.sym 13323 w_tx_data_io[0] +.sym 13324 w_tx_data_smi[0] +.sym 13325 spi_if_ins.o_cs_SB_LUT4_I2_1_O[1] +.sym 13326 smi_ctrl_ins.o_data_out_SB_LUT4_I1_O[0] +.sym 13330 spi_if_ins.o_load_cmd_SB_DFFESR_Q_D_SB_LUT4_I1_O[1] +.sym 13331 spi_if_ins.o_load_cmd_SB_DFFESR_Q_D_SB_LUT4_I1_O[0] +.sym 13332 spi_if_ins.o_load_cmd_SB_DFFESR_Q_D_SB_LUT4_I1_O[2] +.sym 13335 spi_if_ins.state_if_SB_DFFESR_Q_D[2] +.sym 13337 spi_if_ins.o_load_cmd_SB_DFFESR_Q_D_SB_LUT4_I1_O[1] +.sym 13338 spi_if_ins.r_tx_data_valid_SB_DFFESR_Q_D[0] +.sym 13341 spi_if_ins.r_tx_data_valid_SB_DFFESR_Q_D[0] +.sym 13343 spi_if_ins.o_load_cmd_SB_DFFESR_Q_D[0] +.sym 13344 spi_if_ins.state_if_SB_DFFESR_Q_D[2] +.sym 13347 spi_if_ins.state_if[0] +.sym 13350 spi_if_ins.state_if[1] +.sym 13353 lvds_rx_24_inst.r_state_if_SB_LUT4_I2_O[0] +.sym 13354 w_rx_24_fifo_data[29] +.sym 13357 w_lvds_rx_24_d1_SB_LUT4_I0_O_SB_LUT4_I3_O_$glb_ce +.sym 13358 lvds_clock_buf +.sym 13359 i_smi_a1_SB_LUT4_I1_O_SB_LUT4_O_I2_SB_LUT4_I0_O[2]_$glb_sr +.sym 13360 spi_if_ins.o_cs_SB_LUT4_I2_2_O[1] +.sym 13361 spi_if_ins.o_cs_SB_LUT4_I2_1_O[1] +.sym 13362 spi_if_ins.r_tx_data_valid +.sym 13363 spi_if_ins.o_cs_SB_LUT4_I3_1_O +.sym 13364 smi_ctrl_ins.o_data_out_SB_LUT4_I1_O[0] +.sym 13365 spi_if_ins.o_cs_SB_LUT4_I2_2_O[2] +.sym 13366 spi_if_ins.o_cs_SB_DFFESR_Q_R[0] +.sym 13375 spi_if_ins.w_rx_data[6] +.sym 13376 w_rx_24_fifo_data[20] +.sym 13377 lvds_rx_24_inst.r_state_if_SB_LUT4_I2_O[0] +.sym 13390 smi_ctrl_ins.o_data_out_SB_DFFESS_Q_E +.sym 13404 spi_if_ins.state_if[0] +.sym 13405 spi_if_ins.r_tx_data_valid_SB_DFFESR_Q_E +.sym 13407 w_tx_data_sys[0] +.sym 13408 spi_if_ins.state_if[1] +.sym 13410 spi_if_ins.o_load_cmd_SB_DFFESR_Q_D[1] +.sym 13411 spi_if_ins.o_cs_SB_LUT4_I2_2_O[3] +.sym 13415 spi_if_ins.o_load_cmd_SB_DFFESR_Q_D[0] +.sym 13416 spi_if_ins.state_if[1] +.sym 13417 spi_if_ins.o_cs_SB_LUT4_I2_2_O[1] +.sym 13420 spi_if_ins.r_tx_data_valid_SB_DFFESR_Q_D[1] +.sym 13422 spi_if_ins.o_cs_SB_LUT4_I2_2_O[2] +.sym 13425 spi_if_ins.r_tx_data_valid_SB_DFFESR_Q_D[0] +.sym 13428 spi_if_ins.o_cs_SB_LUT4_I3_1_O +.sym 13434 spi_if_ins.o_cs_SB_LUT4_I2_2_O[1] +.sym 13435 spi_if_ins.o_cs_SB_LUT4_I2_2_O[2] +.sym 13436 w_tx_data_sys[0] +.sym 13437 spi_if_ins.o_cs_SB_LUT4_I2_2_O[3] +.sym 13440 spi_if_ins.r_tx_data_valid_SB_DFFESR_Q_D[1] +.sym 13442 spi_if_ins.r_tx_data_valid_SB_DFFESR_Q_D[0] +.sym 13446 spi_if_ins.r_tx_data_valid_SB_DFFESR_Q_E +.sym 13452 spi_if_ins.state_if[0] +.sym 13454 spi_if_ins.state_if[1] +.sym 13455 spi_if_ins.o_load_cmd_SB_DFFESR_Q_D[1] +.sym 13458 spi_if_ins.o_load_cmd_SB_DFFESR_Q_D[1] +.sym 13459 spi_if_ins.state_if[0] +.sym 13460 spi_if_ins.state_if[1] +.sym 13461 spi_if_ins.r_tx_data_valid_SB_DFFESR_Q_D[0] +.sym 13476 spi_if_ins.o_load_cmd_SB_DFFESR_Q_D[0] +.sym 13477 spi_if_ins.o_load_cmd_SB_DFFESR_Q_D[1] +.sym 13478 spi_if_ins.r_tx_data_valid_SB_DFFESR_Q_D[0] +.sym 13480 spi_if_ins.o_cs_SB_LUT4_I3_1_O +.sym 13481 i_glob_clock$SB_IO_IN_$glb_clk +.sym 13483 w_cs[0] +.sym 13484 smi_ctrl_ins.o_data_out_SB_DFFESS_Q_E +.sym 13485 spi_if_ins.o_fetch_cmd_SB_LUT4_I3_1_O[1] +.sym 13486 sys_ctrl_ins.o_data_out_SB_DFFE_Q_E +.sym 13489 w_ioc[4] +.sym 13490 w_ioc[3] +.sym 13498 spi_if_ins.w_rx_data[6] +.sym 13504 spi_if_ins.state_if_SB_DFFE_Q_E +.sym 13511 i_smi_a1_SB_LUT4_I1_O_SB_LUT4_O_I2_SB_LUT4_I0_O[2] +.sym 13539 spi_if_ins.o_load_cmd_SB_DFFESR_Q_D_SB_LUT4_I1_O[1] +.sym 13544 io_ctrl_ins.ldo2v8_state_SB_LUT4_I3_O[1] +.sym 13551 sys_ctrl_ins.o_data_out_SB_DFFE_Q_E +.sym 13576 spi_if_ins.o_load_cmd_SB_DFFESR_Q_D_SB_LUT4_I1_O[1] +.sym 13595 io_ctrl_ins.ldo2v8_state_SB_LUT4_I3_O[1] +.sym 13603 sys_ctrl_ins.o_data_out_SB_DFFE_Q_E .sym 13604 r_counter[0]_$glb_clk -.sym 13605 i_smi_a1_SB_LUT4_I1_O[2]_$glb_sr -.sym 13606 w_tx_data_io[0] -.sym 13607 w_tx_data_io[2] -.sym 13608 w_tx_data_io[3] -.sym 13609 io_ctrl_ins.o_data_out_SB_DFFESR_Q_R -.sym 13610 io_ctrl_ins.led1_state_SB_LUT4_I3_O[3] -.sym 13611 w_tx_data_io[1] -.sym 13612 w_tx_data_io[4] -.sym 13613 io_ctrl_ins.ldo2v8_state_SB_LUT4_I0_I2[3] -.sym 13622 rx_24_fifo.empty_o_SB_DFFSS_Q_D_SB_LUT4_O_I0_SB_LUT4_O_I0[2] -.sym 13624 io_ctrl_ins.o_data_out_SB_DFFESR_Q_6_E -.sym 13627 rx_24_fifo.empty_o_SB_DFFSS_Q_D_SB_LUT4_O_I0_SB_LUT4_O_I0[2] -.sym 13630 w_cs[0] -.sym 13631 w_rx_data[2] -.sym 13633 w_rx_data[1] -.sym 13637 i_smi_a1_SB_LUT4_I1_O[2] -.sym 13639 io_ctrl_ins.rf_mode[0] -.sym 13649 rx_24_fifo.rd_addr_gray_SB_LUT4_I2_O[3] -.sym 13651 io_pmod[2]$SB_IO_IN -.sym 13653 w_rx_24_fifo_empty -.sym 13655 r_tx_data[1] -.sym 13664 rx_24_fifo.wr_addr_gray_rd_r[3] -.sym 13666 io_ctrl_ins.o_data_out_SB_DFFESR_Q_R -.sym 13674 spi_if_ins.r_tx_data_valid_SB_DFFESR_Q_D_SB_LUT4_I3_O -.sym 13698 r_tx_data[1] -.sym 13705 io_ctrl_ins.o_data_out_SB_DFFESR_Q_R -.sym 13711 io_pmod[2]$SB_IO_IN -.sym 13713 w_rx_24_fifo_empty -.sym 13718 rx_24_fifo.rd_addr_gray_SB_LUT4_I2_O[3] -.sym 13719 rx_24_fifo.wr_addr_gray_rd_r[3] -.sym 13726 spi_if_ins.r_tx_data_valid_SB_DFFESR_Q_D_SB_LUT4_I3_O -.sym 13727 r_counter[0]_$glb_clk -.sym 13729 sys_ctrl_ins.o_data_out_SB_DFFE_Q_E -.sym 13730 spi_if_ins.o_load_cmd_SB_LUT4_I2_O_SB_LUT4_I3_O[1] -.sym 13731 spi_if_ins.state_if[0] -.sym 13733 spi_if_ins.o_load_cmd_SB_LUT4_I2_O_SB_LUT4_I2_O -.sym 13734 io_ctrl_ins.led0_state_SB_LUT4_I3_O[3] -.sym 13735 io_ctrl_ins.led1_state_SB_DFFESR_Q_E -.sym 13736 spi_if_ins.o_load_cmd_SB_LUT4_I2_O[1] -.sym 13742 i_config[0]$SB_IO_IN -.sym 13743 w_smi_read_req -.sym 13759 io_ctrl_ins.led0_state_SB_LUT4_I3_O[1] -.sym 13762 sys_ctrl_ins.o_data_out_SB_DFFE_Q_E -.sym 13770 rx_24_fifo.rd_addr_gray_SB_DFFESR_Q_5_D[1] -.sym 13776 rx_24_fifo.rd_addr_gray_SB_DFFESR_Q_7_D[3] -.sym 13781 smi_ctrl_ins.r_fifo_24_pull_SB_LUT4_I3_O -.sym 13782 rx_24_fifo.rd_addr_gray_SB_DFFESR_Q_7_D[1] -.sym 13790 spi_if_ins.o_load_cmd_SB_LUT4_I2_O_SB_LUT4_I2_O -.sym 13810 rx_24_fifo.rd_addr_gray_SB_DFFESR_Q_5_D[1] -.sym 13815 rx_24_fifo.rd_addr_gray_SB_DFFESR_Q_7_D[3] -.sym 13822 spi_if_ins.o_load_cmd_SB_LUT4_I2_O_SB_LUT4_I2_O -.sym 13828 rx_24_fifo.rd_addr_gray_SB_DFFESR_Q_7_D[1] -.sym 13849 smi_ctrl_ins.r_fifo_24_pull_SB_LUT4_I3_O +.sym 13606 io_ctrl_ins.tr_vc_2_state_SB_LUT4_I1_I3[1] +.sym 13607 w_ioc[1] +.sym 13608 w_ioc[2] +.sym 13609 io_ctrl_ins.o_data_out_SB_DFFESR_Q_E[3] +.sym 13610 io_ctrl_ins.i_cs_SB_LUT4_I3_O[0] +.sym 13611 spi_if_ins.o_fetch_cmd_SB_LUT4_I3_1_O[0] +.sym 13613 w_ioc[0] +.sym 13619 spi_if_ins.w_rx_data[4] +.sym 13623 w_fetch +.sym 13630 io_ctrl_ins.ldo2v8_state_SB_LUT4_I3_O[1] +.sym 13641 i_smi_a1_SB_LUT4_I1_O_SB_LUT4_O_I2_SB_LUT4_I0_O[2] +.sym 13659 rx_24_fifo.rd_addr_gray[6] +.sym 13695 rx_24_fifo.rd_addr_gray[6] +.sym 13727 lvds_clock_buf +.sym 13730 io_ctrl_ins.o_data_out_SB_DFFESR_Q_6_E +.sym 13732 sys_ctrl_ins.reset_cmd_SB_DFFESR_Q_E +.sym 13733 sys_ctrl_ins.reset_cmd +.sym 13734 sys_ctrl_ins.reset_cmd_SB_DFFESR_Q_R +.sym 13735 io_ctrl_ins.ldo2v8_state_SB_LUT4_I3_O[1] +.sym 13736 spi_if_ins.o_load_cmd_SB_LUT4_I2_O[0] +.sym 13741 spi_if_ins.w_rx_data[2] +.sym 13744 spi_if_ins.w_rx_data[0] +.sym 13748 io_ctrl_ins.tr_vc_2_state_SB_LUT4_I1_I3[1] +.sym 13749 spi_if_ins.o_data_in_SB_DFFE_Q_E +.sym 13755 io_ctrl_ins.o_data_out_SB_DFFESR_Q_E[3] +.sym 13756 spi_if_ins.w_rx_data[1] +.sym 13764 i_smi_a1_SB_LUT4_I1_O_SB_LUT4_O_I2_SB_LUT4_I0_O[2] +.sym 13772 smi_ctrl_ins.r_fifo_24_pull_SB_LUT4_I3_1_O +.sym 13775 rx_24_fifo.rd_addr_gray_SB_DFFESR_Q_7_D[1] +.sym 13776 rx_24_fifo.rd_addr_gray_SB_DFFESR_Q_3_D[1] +.sym 13781 rx_24_fifo.rd_addr_gray_SB_DFFESR_Q_6_D[1] +.sym 13783 rx_24_fifo.rd_addr_gray_SB_DFFESR_Q_6_D[3] +.sym 13810 rx_24_fifo.rd_addr_gray_SB_DFFESR_Q_6_D[1] +.sym 13815 rx_24_fifo.rd_addr_gray_SB_DFFESR_Q_3_D[1] +.sym 13827 rx_24_fifo.rd_addr_gray_SB_DFFESR_Q_6_D[3] +.sym 13847 rx_24_fifo.rd_addr_gray_SB_DFFESR_Q_7_D[1] +.sym 13849 smi_ctrl_ins.r_fifo_24_pull_SB_LUT4_I3_1_O .sym 13850 r_counter[0]_$glb_clk -.sym 13851 i_smi_a1_SB_LUT4_I1_O[2]_$glb_sr +.sym 13851 i_smi_a1_SB_LUT4_I1_O_SB_LUT4_O_I2_SB_LUT4_I0_O[2]_$glb_sr +.sym 13854 io_ctrl_ins.rf_mode_SB_DFFESR_Q_E .sym 13855 io_ctrl_ins.debug_mode[1] -.sym 13856 io_ctrl_ins.rf_mode[0] -.sym 13858 io_ctrl_ins.debug_mode[0] -.sym 13867 spi_if_ins.state_if_SB_DFFESR_Q_1_D[0] -.sym 13868 i_smi_a1_SB_LUT4_I1_O[2] -.sym 13873 spi_if_ins.o_load_cmd_SB_LUT4_I2_O_SB_LUT4_I3_O[1] -.sym 13875 spi_if_ins.state_if[0] -.sym 13877 w_rx_09_fifo_full -.sym 13881 o_ldo_2v8_en$SB_IO_OUT -.sym 13884 io_ctrl_ins.led1_state_SB_DFFESR_Q_E -.sym 13895 w_cs[0] -.sym 13906 sys_ctrl_ins.reset_cmd_SB_DFFESR_Q_R -.sym 13907 $PACKER_VCC_NET -.sym 13920 sys_ctrl_ins.reset_cmd_SB_DFFESR_Q_E -.sym 13926 w_cs[0] -.sym 13951 $PACKER_VCC_NET -.sym 13972 sys_ctrl_ins.reset_cmd_SB_DFFESR_Q_E -.sym 13973 r_counter[0]_$glb_clk -.sym 13974 sys_ctrl_ins.reset_cmd_SB_DFFESR_Q_R -.sym 13975 w_tx_data_sys[0] -.sym 13987 sys_ctrl_ins.reset_cmd_SB_DFFESR_Q_R -.sym 13988 io_ctrl_ins.debug_mode[0] -.sym 13995 $PACKER_VCC_NET +.sym 13856 io_ctrl_ins.debug_mode_SB_LUT4_I2_O[1] +.sym 13865 io_ctrl_ins.ldo2v8_state_SB_LUT4_I3_O[1] +.sym 13873 io_ctrl_ins.o_data_out_SB_DFFESR_Q_6_E +.sym 13875 w_load +.sym 13879 w_rx_data[2] +.sym 13880 sys_ctrl_ins.reset_cmd +.sym 13900 rx_24_fifo.rd_addr_gray[0] +.sym 13902 rx_24_fifo.rd_addr_gray[1] +.sym 13903 rx_24_fifo.rd_addr_gray[4] +.sym 13920 rx_24_fifo.rd_addr_gray_wr[4] +.sym 13944 rx_24_fifo.rd_addr_gray[4] +.sym 13950 rx_24_fifo.rd_addr_gray_wr[4] +.sym 13958 rx_24_fifo.rd_addr_gray[0] +.sym 13969 rx_24_fifo.rd_addr_gray[1] +.sym 13973 lvds_clock_buf +.sym 13978 io_ctrl_ins.rf_pin_state[2] +.sym 13981 io_ctrl_ins.rf_pin_state[1] +.sym 13993 w_rx_data[3] .sym 14001 sys_ctrl_ins.o_soft_reset_SB_DFFESS_Q_E -.sym 14018 sys_ctrl_ins.reset_count_SB_DFFESR_Q_E -.sym 14019 sys_ctrl_ins.reset_count[3] -.sym 14020 sys_ctrl_ins.reset_cmd -.sym 14022 sys_ctrl_ins.reset_count[1] -.sym 14026 sys_ctrl_ins.reset_count[2] -.sym 14031 sys_ctrl_ins.o_soft_reset_SB_DFFESS_Q_S -.sym 14039 sys_ctrl_ins.o_soft_reset_SB_DFFESS_Q_S -.sym 14045 sys_ctrl_ins.reset_count[0] -.sym 14048 $nextpnr_ICESTORM_LC_16$O -.sym 14051 sys_ctrl_ins.reset_count[0] -.sym 14054 sys_ctrl_ins.reset_count_SB_DFFESR_Q_D_SB_LUT4_O_I3[2] -.sym 14056 sys_ctrl_ins.reset_count[1] -.sym 14060 sys_ctrl_ins.reset_count_SB_DFFESR_Q_D_SB_LUT4_O_I3[3] -.sym 14061 sys_ctrl_ins.o_soft_reset_SB_DFFESS_Q_S -.sym 14062 sys_ctrl_ins.reset_count[2] -.sym 14064 sys_ctrl_ins.reset_count_SB_DFFESR_Q_D_SB_LUT4_O_I3[2] -.sym 14067 sys_ctrl_ins.o_soft_reset_SB_DFFESS_Q_S -.sym 14069 sys_ctrl_ins.reset_count[3] -.sym 14070 sys_ctrl_ins.reset_count_SB_DFFESR_Q_D_SB_LUT4_O_I3[3] -.sym 14073 sys_ctrl_ins.reset_cmd -.sym 14076 sys_ctrl_ins.o_soft_reset_SB_DFFESS_Q_S -.sym 14080 sys_ctrl_ins.reset_count[0] -.sym 14085 sys_ctrl_ins.reset_count[0] -.sym 14087 sys_ctrl_ins.reset_count[1] -.sym 14088 sys_ctrl_ins.o_soft_reset_SB_DFFESS_Q_S -.sym 14091 sys_ctrl_ins.reset_count[3] -.sym 14092 sys_ctrl_ins.reset_count[1] -.sym 14093 sys_ctrl_ins.reset_count[2] -.sym 14094 sys_ctrl_ins.reset_count[0] -.sym 14095 sys_ctrl_ins.reset_count_SB_DFFESR_Q_E -.sym 14096 r_counter[0]_$glb_clk -.sym 14097 sys_ctrl_ins.reset_cmd -.sym 14098 o_led0$SB_IO_OUT -.sym 14100 o_ldo_2v8_en$SB_IO_OUT -.sym 14104 o_led1$SB_IO_OUT -.sym 14108 w_lvds_rx_24_d1_SB_LUT4_I0_O[1] -.sym 14114 sys_ctrl_ins.reset_count_SB_DFFESR_Q_E -.sym 14117 $PACKER_GND_NET -.sym 14129 i_smi_a1_SB_LUT4_I1_O[2] -.sym 14234 o_led1$SB_IO_OUT -.sym 14235 w_rx_data[1] -.sym 14243 w_rx_data[2] -.sym 14244 o_shdn_tx_lna$SB_IO_OUT -.sym 14250 sys_ctrl_ins.o_soft_reset_SB_DFFESS_Q_S -.sym 14266 sys_ctrl_ins.o_soft_reset_SB_DFFESS_Q_S -.sym 14267 sys_ctrl_ins.reset_cmd -.sym 14271 i_smi_a1_SB_LUT4_I1_O[2] -.sym 14273 sys_ctrl_ins.o_soft_reset_SB_DFFESS_Q_E -.sym 14283 w_lvds_rx_24_d1_SB_LUT4_I0_O[1] -.sym 14291 $PACKER_GND_NET -.sym 14302 $PACKER_GND_NET -.sym 14332 sys_ctrl_ins.reset_cmd -.sym 14339 w_lvds_rx_24_d1_SB_LUT4_I0_O[1] -.sym 14340 i_smi_a1_SB_LUT4_I1_O[2] -.sym 14341 sys_ctrl_ins.o_soft_reset_SB_DFFESS_Q_E -.sym 14342 r_counter[0]_$glb_clk -.sym 14343 sys_ctrl_ins.o_soft_reset_SB_DFFESS_Q_S +.sym 14002 i_smi_a1_SB_LUT4_I1_O_SB_LUT4_O_I2_SB_LUT4_I0_O[2] +.sym 14099 o_shdn_rx_lna$SB_IO_OUT +.sym 14100 io_ctrl_ins.led1_state_SB_DFFESR_Q_E +.sym 14102 o_shdn_tx_lna$SB_IO_OUT +.sym 14105 sys_ctrl_ins.o_soft_reset_SB_DFFESS_Q_E +.sym 14110 w_rx_data[1] +.sym 14128 i_smi_a1_SB_LUT4_I1_O_SB_LUT4_O_I2_SB_LUT4_I0_O[2] +.sym 14222 i_smi_a1_SB_LUT4_I1_O_SB_LUT4_O_I2_SB_LUT4_I0_O[2] +.sym 14243 o_led1$SB_IO_OUT +.sym 14256 i_smi_a1_SB_LUT4_I1_O_SB_LUT4_O_I2_SB_LUT4_I0_O[2] +.sym 14266 w_lvds_rx_24_d1_SB_LUT4_I0_O[1] +.sym 14287 i_smi_a1_SB_LUT4_I1_O_SB_LUT4_O_I2_SB_LUT4_I0_O[2] +.sym 14326 i_smi_a1_SB_LUT4_I1_O_SB_LUT4_O_I2_SB_LUT4_I0_O[2] +.sym 14328 w_lvds_rx_24_d1_SB_LUT4_I0_O[1] .sym 14344 i_smi_a1$SB_IO_IN -.sym 14356 i_smi_a1_SB_LUT4_I1_O[2] -.sym 14388 i_smi_a1_SB_LUT4_I1_O[2] -.sym 14392 o_ldo_2v8_en$SB_IO_OUT -.sym 14399 i_smi_a1_SB_LUT4_I1_O[2] -.sym 14408 o_ldo_2v8_en$SB_IO_OUT +.sym 14358 w_lvds_rx_24_d1_SB_LUT4_I0_O[1] +.sym 14388 i_smi_a1_SB_LUT4_I1_O_SB_LUT4_O_I2_SB_LUT4_I0_O[2] +.sym 14399 i_smi_a1_SB_LUT4_I1_O_SB_LUT4_O_I2_SB_LUT4_I0_O[2] .sym 14414 i_smi_a1$SB_IO_IN .sym 14418 i_sck$SB_IO_IN .sym 14419 io_smi_data[3]$SB_IO_OUT .sym 14436 i_sck$SB_IO_IN -.sym 14441 io_smi_data[3]$SB_IO_OUT -.sym 14446 spi_if_ins.spi.r_rx_bit_count[2] -.sym 14448 spi_if_ins.spi.r_rx_bit_count[1] -.sym 14449 spi_if_ins.spi.r_rx_bit_count[0] -.sym 14457 spi_if_ins.spi.r_tx_byte_SB_DFFESR_Q_E -.sym 14462 io_ctrl_ins.i_cs_SB_LUT4_I3_I0[0] +.sym 14439 io_smi_data[3]$SB_IO_OUT +.sym 14445 io_pmod_SB_DFFSS_Q_D_SB_LUT4_O_I0_SB_LUT4_O_2_I0[0] +.sym 14446 io_pmod_SB_DFFSS_Q_D_SB_LUT4_O_I0[0] +.sym 14447 rx_09_fifo.rd_addr_gray_wr[1] +.sym 14449 rx_09_fifo.full_o_SB_DFFSR_Q_D_SB_LUT4_O_I1_SB_LUT4_O_I0_SB_LUT4_O_1_I3[0] +.sym 14450 rx_09_fifo.full_o_SB_LUT4_I3_O[0] +.sym 14465 spi_if_ins.r_tx_data_valid_SB_DFFESR_Q_D[0] +.sym 14475 i_smi_a1_SB_LUT4_I1_O_SB_LUT4_O_I2_SB_LUT4_I0_O[2] .sym 14476 i_sck$SB_IO_IN -.sym 14488 rx_09_fifo.wr_addr_gray_rd[1] -.sym 14495 i_sck$SB_IO_IN -.sym 14521 i_sck$SB_IO_IN -.sym 14531 rx_09_fifo.wr_addr_gray_rd[1] +.sym 14478 io_pmod[7]$SB_IO_IN +.sym 14488 rx_09_fifo.wr_addr_gray_rd[7] +.sym 14493 rx_09_fifo.wr_addr_gray_rd[4] +.sym 14500 rx_09_fifo.wr_addr_gray_rd[2] +.sym 14501 rx_09_fifo.wr_addr_gray_rd[6] +.sym 14503 rx_09_fifo.wr_addr[7] +.sym 14508 rx_09_fifo.wr_addr_gray[6] +.sym 14520 rx_09_fifo.wr_addr_gray_rd[4] +.sym 14528 rx_09_fifo.wr_addr_gray_rd[6] +.sym 14534 rx_09_fifo.wr_addr[7] +.sym 14540 rx_09_fifo.wr_addr_gray_rd[7] +.sym 14549 rx_09_fifo.wr_addr_gray_rd[2] +.sym 14562 rx_09_fifo.wr_addr_gray[6] .sym 14566 r_counter[0]_$glb_clk -.sym 14574 spi_if_ins.spi.r_rx_done_SB_DFFER_Q_D[1] -.sym 14575 spi_if_ins.spi.r_rx_done_SB_DFFER_Q_E -.sym 14576 rx_09_fifo.full_o_SB_DFFSR_Q_D_SB_LUT4_O_I0_SB_LUT4_O_I2_SB_LUT4_O_I3[0] -.sym 14577 rx_09_fifo.full_o_SB_LUT4_I3_O[0] -.sym 14578 rx_09_fifo.rd_addr_gray_wr[5] -.sym 14579 rx_09_fifo.rd_addr_gray_wr[3] -.sym 14584 spi_if_ins.spi.r3_rx_done_SB_LUT4_I2_O -.sym 14586 i_ss_SB_LUT4_I3_O -.sym 14616 spi_if_ins.spi.r_rx_done_SB_DFFER_Q_D_SB_LUT4_I3_O -.sym 14634 i_ss$SB_IO_IN -.sym 14637 spi_if_ins.r_tx_data_valid_SB_LUT4_I3_O[1] -.sym 14649 spi_if_ins.spi.SCKr[0] -.sym 14653 rx_09_fifo.wr_addr_gray[5] -.sym 14655 i_smi_a3$SB_IO_IN -.sym 14663 rx_09_fifo.wr_addr_gray[4] -.sym 14666 spi_if_ins.r_tx_data_valid_SB_LUT4_I3_O[1] -.sym 14675 rx_09_fifo.wr_addr_gray[1] -.sym 14678 rx_09_fifo.wr_addr_gray_rd[5] -.sym 14679 w_smi_data_output[3] -.sym 14683 w_smi_data_output[3] -.sym 14684 i_smi_a3$SB_IO_IN -.sym 14689 spi_if_ins.spi.SCKr[0] -.sym 14695 rx_09_fifo.wr_addr_gray[1] -.sym 14702 rx_09_fifo.wr_addr_gray[4] -.sym 14706 rx_09_fifo.wr_addr_gray_rd[5] -.sym 14713 rx_09_fifo.wr_addr_gray[5] -.sym 14719 spi_if_ins.r_tx_data_valid_SB_LUT4_I3_O[1] +.sym 14572 io_pmod_SB_DFFSS_Q_D_SB_LUT4_O_I0[2] +.sym 14573 io_pmod_SB_DFFSS_Q_D_SB_LUT4_O_I0_SB_LUT4_O_1_I1_SB_LUT4_O_I0[2] +.sym 14574 io_pmod_SB_DFFSS_Q_D_SB_LUT4_O_I0_SB_LUT4_O_I0[2] +.sym 14575 io_pmod_SB_DFFSS_Q_D_SB_LUT4_O_I0_SB_LUT4_O_1_I1_SB_LUT4_O_I2[2] +.sym 14576 rx_09_fifo.rd_addr_gray_SB_DFFESR_Q_1_D[0] +.sym 14577 io_pmod_SB_DFFSS_Q_D_SB_LUT4_O_I0_SB_LUT4_O_2_I0[2] +.sym 14578 rx_09_fifo.rd_addr_gray[1] +.sym 14579 rx_09_fifo.rd_addr[3] +.sym 14580 rx_09_fifo.rd_addr_gray_wr[2] +.sym 14582 w_cs[1] +.sym 14594 io_pmod[6]$SB_IO_IN +.sym 14605 io_pmod_SB_DFFSS_Q_D_SB_LUT4_O_I0_SB_LUT4_O_1_I1_SB_LUT4_O_I0[1] +.sym 14626 rx_09_fifo.wr_addr_gray_rd[0] +.sym 14629 io_pmod_SB_DFFSS_Q_D_SB_LUT4_O_I0_SB_LUT4_O_2_I0[2] +.sym 14633 rx_09_fifo.full_o_SB_DFFSR_Q_D_SB_LUT4_O_I1_SB_LUT4_O_I0_SB_LUT4_O_1_I3[0] +.sym 14634 rx_09_fifo.rd_addr[3] +.sym 14635 rx_09_fifo.full_o_SB_LUT4_I3_O[0] +.sym 14650 rx_09_fifo.wr_addr_gray_rd[0] +.sym 14653 rx_09_fifo.wr_addr_gray[2] +.sym 14654 rx_09_fifo.rd_addr_gray_SB_DFFESR_Q_1_D[3] +.sym 14656 rx_09_fifo.wr_addr_gray[4] +.sym 14657 rx_09_fifo.rd_addr_gray_SB_DFFESR_Q_1_D[1] +.sym 14658 io_pmod_SB_DFFSS_Q_D_SB_LUT4_O_I0_SB_LUT4_O_I0[3] +.sym 14659 rx_09_fifo.wr_addr_gray[5] +.sym 14660 io_pmod_SB_DFFSS_Q_D_SB_LUT4_O_I0_SB_LUT4_O_I0[0] +.sym 14665 rx_09_fifo.wr_addr_gray_rd[5] +.sym 14668 io_pmod_SB_DFFSS_Q_D_SB_LUT4_O_I0_SB_LUT4_O_I0[1] +.sym 14669 rx_09_fifo.rd_addr_gray_SB_DFFESR_Q_1_D[0] +.sym 14675 io_pmod_SB_DFFSS_Q_D_SB_LUT4_O_I0_SB_LUT4_O_I0[2] +.sym 14677 rx_09_fifo.wr_addr_gray_rd[1] +.sym 14685 rx_09_fifo.wr_addr_gray[5] +.sym 14688 io_pmod_SB_DFFSS_Q_D_SB_LUT4_O_I0_SB_LUT4_O_I0[2] +.sym 14689 io_pmod_SB_DFFSS_Q_D_SB_LUT4_O_I0_SB_LUT4_O_I0[0] +.sym 14690 io_pmod_SB_DFFSS_Q_D_SB_LUT4_O_I0_SB_LUT4_O_I0[1] +.sym 14691 io_pmod_SB_DFFSS_Q_D_SB_LUT4_O_I0_SB_LUT4_O_I0[3] +.sym 14696 rx_09_fifo.wr_addr_gray_rd[5] +.sym 14700 rx_09_fifo.rd_addr_gray_SB_DFFESR_Q_1_D[1] +.sym 14701 io_pmod_SB_DFFSS_Q_D_SB_LUT4_O_I0_SB_LUT4_O_I0[3] +.sym 14702 rx_09_fifo.rd_addr_gray_SB_DFFESR_Q_1_D[3] +.sym 14703 rx_09_fifo.rd_addr_gray_SB_DFFESR_Q_1_D[0] +.sym 14707 rx_09_fifo.wr_addr_gray_rd[0] +.sym 14714 rx_09_fifo.wr_addr_gray_rd[1] +.sym 14718 rx_09_fifo.wr_addr_gray[2] +.sym 14724 rx_09_fifo.wr_addr_gray[4] .sym 14729 r_counter[0]_$glb_clk -.sym 14731 spi_if_ins.spi.r_temp_rx_byte[2] -.sym 14732 spi_if_ins.spi.r_temp_rx_byte[5] -.sym 14734 spi_if_ins.spi.r_temp_rx_byte[4] -.sym 14735 spi_if_ins.spi.r_temp_rx_byte[3] -.sym 14736 spi_if_ins.spi.r_temp_rx_byte[6] -.sym 14737 spi_if_ins.spi.r_temp_rx_byte[0] -.sym 14738 spi_if_ins.spi.r_temp_rx_byte[1] -.sym 14742 w_tx_data_sys[0] -.sym 14759 rx_09_fifo.full_o_SB_DFFSR_Q_D_SB_LUT4_O_I0_SB_LUT4_O_I2_SB_LUT4_O_I3[0] -.sym 14775 i_smi_a3$SB_IO_IN -.sym 14777 w_smi_data_output[4] -.sym 14780 w_smi_data_output[5] -.sym 14782 spi_if_ins.spi.r_rx_done_SB_DFFER_Q_D[1] -.sym 14783 spi_if_ins.spi.r_rx_done_SB_DFFER_Q_D_SB_LUT4_I3_O -.sym 14799 i_ss$SB_IO_IN -.sym 14802 spi_if_ins.spi.r_temp_rx_byte[0] -.sym 14825 spi_if_ins.spi.r_temp_rx_byte[0] -.sym 14835 w_smi_data_output[5] -.sym 14837 i_smi_a3$SB_IO_IN -.sym 14841 i_ss$SB_IO_IN -.sym 14842 spi_if_ins.spi.r_rx_done_SB_DFFER_Q_D[1] -.sym 14847 i_smi_a3$SB_IO_IN -.sym 14849 w_smi_data_output[4] -.sym 14851 spi_if_ins.spi.r_rx_done_SB_DFFER_Q_D_SB_LUT4_I3_O -.sym 14852 i_sck$SB_IO_IN_$glb_clk -.sym 14854 spi_if_ins.spi.r_rx_byte[7] -.sym 14855 spi_if_ins.spi.r_rx_byte[3] -.sym 14856 spi_if_ins.spi.r_rx_byte[2] -.sym 14857 spi_if_ins.spi.r_rx_byte[4] -.sym 14858 spi_if_ins.spi.r_rx_byte[0] -.sym 14859 spi_if_ins.spi.r_tx_bit_count_SB_DFFESR_Q_R -.sym 14860 spi_if_ins.spi.r_rx_byte[5] -.sym 14861 spi_if_ins.spi.r_rx_byte[6] -.sym 14865 o_led0$SB_IO_OUT -.sym 14868 io_smi_data[5]$SB_IO_OUT +.sym 14732 rx_09_fifo.rd_addr_gray_SB_LUT4_I2_O[1] +.sym 14733 rx_09_fifo.rd_addr_gray_SB_LUT4_I2_O[2] +.sym 14734 rx_09_fifo.rd_addr_gray_SB_LUT4_I2_O[3] +.sym 14735 io_pmod_SB_DFFSS_Q_D_SB_LUT4_O_I0_SB_LUT4_O_1_I1_SB_LUT4_O_I2[1] +.sym 14736 io_pmod_SB_DFFSS_Q_D_SB_LUT4_O_I0_SB_LUT4_O_1_I1_SB_LUT4_O_I0[3] +.sym 14737 rx_09_fifo.rd_addr_gray_SB_LUT4_I2_O[6] +.sym 14738 rx_09_fifo.rd_addr_gray_SB_LUT4_I2_O[7] +.sym 14745 smi_ctrl_ins.int_cnt_09[3] +.sym 14751 io_pmod_SB_DFFSS_Q_D_SB_LUT4_O_I0_SB_LUT4_O_1_I1[2] +.sym 14753 rx_09_fifo.wr_addr_gray_rd_r[0] +.sym 14756 r_tx_data[7] +.sym 14758 r_tx_data[1] +.sym 14760 r_tx_data[5] +.sym 14763 r_tx_data[2] +.sym 14764 w_rx_09_fifo_pull +.sym 14774 rx_09_fifo.wr_addr_gray_rd_r[2] +.sym 14776 rx_09_fifo.wr_addr_gray_rd_r[3] +.sym 14778 io_pmod_SB_DFFSS_Q_D_SB_LUT4_O_I0_SB_LUT4_O_I0[0] +.sym 14779 rx_09_fifo.wr_addr_gray_SB_DFFESR_Q_7_D[3] +.sym 14781 smi_ctrl_ins.r_fifo_09_pull_SB_LUT4_I2_O[3] +.sym 14782 smi_ctrl_ins.r_fifo_09_pull_SB_LUT4_I2_O[0] +.sym 14783 lvds_rx_09_inst.r_push_SB_LUT4_I3_1_O +.sym 14785 io_pmod_SB_DFFSS_Q_D_SB_LUT4_O_I0_SB_LUT4_O_2_I0[2] +.sym 14786 io_pmod_SB_DFFSS_Q_D_SB_LUT4_O_I0_SB_LUT4_O_3_I2[3] +.sym 14787 rx_09_fifo.rd_addr[3] +.sym 14788 w_rx_09_fifo_pull +.sym 14789 smi_ctrl_ins.r_fifo_09_pull_SB_LUT4_I2_O[2] +.sym 14795 rx_09_fifo.rd_addr_gray_SB_LUT4_I2_O[7] +.sym 14796 rx_09_fifo.wr_addr_gray_SB_DFFESR_Q_7_D[1] +.sym 14798 rx_09_fifo.full_o_SB_LUT4_I3_O[1] +.sym 14799 rx_09_fifo.full_o_SB_LUT4_I3_O[2] +.sym 14802 rx_09_fifo.rd_addr_gray_SB_LUT4_I2_O[6] +.sym 14806 rx_09_fifo.rd_addr_gray_SB_LUT4_I2_O[7] +.sym 14808 rx_09_fifo.rd_addr_gray_SB_LUT4_I2_O[6] +.sym 14812 rx_09_fifo.rd_addr[3] +.sym 14814 io_pmod_SB_DFFSS_Q_D_SB_LUT4_O_I0_SB_LUT4_O_2_I0[2] +.sym 14817 rx_09_fifo.wr_addr_gray_rd_r[2] +.sym 14818 io_pmod_SB_DFFSS_Q_D_SB_LUT4_O_I0_SB_LUT4_O_3_I2[3] +.sym 14819 rx_09_fifo.rd_addr[3] +.sym 14823 rx_09_fifo.wr_addr_gray_SB_DFFESR_Q_7_D[3] +.sym 14829 rx_09_fifo.full_o_SB_LUT4_I3_O[2] +.sym 14830 rx_09_fifo.full_o_SB_LUT4_I3_O[1] +.sym 14836 w_rx_09_fifo_pull +.sym 14837 rx_09_fifo.rd_addr_gray_SB_LUT4_I2_O[7] +.sym 14838 io_pmod_SB_DFFSS_Q_D_SB_LUT4_O_I0_SB_LUT4_O_I0[0] +.sym 14841 smi_ctrl_ins.r_fifo_09_pull_SB_LUT4_I2_O[3] +.sym 14842 smi_ctrl_ins.r_fifo_09_pull_SB_LUT4_I2_O[0] +.sym 14843 rx_09_fifo.wr_addr_gray_rd_r[3] +.sym 14844 smi_ctrl_ins.r_fifo_09_pull_SB_LUT4_I2_O[2] +.sym 14847 rx_09_fifo.wr_addr_gray_SB_DFFESR_Q_7_D[1] +.sym 14851 lvds_rx_09_inst.r_push_SB_LUT4_I3_1_O +.sym 14852 lvds_clock_buf +.sym 14853 i_smi_a1_SB_LUT4_I1_O_SB_LUT4_O_I2_SB_LUT4_I0_O[2]_$glb_sr +.sym 14856 spi_if_ins.spi.r_tx_bit_count[2] +.sym 14857 spi_if_ins.r_tx_data_valid_SB_LUT4_I3_O[1] +.sym 14858 spi_if_ins.r_tx_data_valid_SB_LUT4_I3_O_SB_LUT4_O_I0_SB_LUT4_O_I3[2] +.sym 14859 spi_if_ins.r_tx_data_valid_SB_LUT4_I3_O_SB_LUT4_O_I0[3] +.sym 14860 spi_if_ins.spi.r_tx_byte_SB_DFFESR_Q_E +.sym 14861 spi_if_ins.r_tx_data_valid_SB_LUT4_I3_O_SB_LUT4_O_I0[0] +.sym 14867 $PACKER_VCC_NET +.sym 14868 io_pmod_SB_DFFSS_Q_D_SB_LUT4_O_I0_SB_LUT4_O_2_I0[3] .sym 14869 i_smi_a3$SB_IO_IN -.sym 14876 i_mosi$SB_IO_IN -.sym 14879 spi_if_ins.spi.o_spi_miso_SB_DFFE_Q_D_SB_LUT4_O_I2[1] -.sym 14881 spi_if_ins.spi.r_rx_byte[1] -.sym 14884 spi_if_ins.spi.o_spi_miso_SB_DFFE_Q_E -.sym 14888 spi_if_ins.w_rx_data[1] -.sym 14897 spi_if_ins.r_tx_data_valid_SB_LUT4_I3_O[1] -.sym 14901 spi_if_ins.spi.SCKr_SB_LUT4_I0_O[1] -.sym 14905 spi_if_ins.r_tx_data_valid_SB_LUT4_I3_O[2] -.sym 14906 spi_if_ins.spi.o_spi_miso_SB_DFFE_Q_E -.sym 14907 spi_if_ins.r_tx_data_valid_SB_LUT4_I3_O[0] -.sym 14908 spi_if_ins.spi.o_spi_miso_SB_DFFE_Q_D_SB_LUT4_O_I2_SB_LUT4_O_I0_SB_LUT4_O_I3[2] -.sym 14911 $PACKER_VCC_NET -.sym 14913 spi_if_ins.spi.r_tx_bit_count[2] -.sym 14914 spi_if_ins.r_tx_data_valid_SB_LUT4_I3_O[1] -.sym 14916 $PACKER_VCC_NET -.sym 14923 spi_if_ins.spi.SCKr_SB_LUT4_I0_O[0] -.sym 14924 spi_if_ins.spi.r_tx_bit_count_SB_DFFESR_Q_R -.sym 14927 $nextpnr_ICESTORM_LC_15$O -.sym 14930 spi_if_ins.spi.o_spi_miso_SB_DFFE_Q_D_SB_LUT4_O_I2_SB_LUT4_O_I0_SB_LUT4_O_I3[2] -.sym 14933 spi_if_ins.spi.r_tx_bit_count_SB_DFFESR_Q_D_SB_LUT4_O_I3[2] -.sym 14935 $PACKER_VCC_NET -.sym 14936 spi_if_ins.spi.SCKr_SB_LUT4_I0_O[0] -.sym 14940 spi_if_ins.spi.r_tx_bit_count[2] -.sym 14941 $PACKER_VCC_NET -.sym 14943 spi_if_ins.spi.r_tx_bit_count_SB_DFFESR_Q_D_SB_LUT4_O_I3[2] -.sym 14946 spi_if_ins.spi.SCKr_SB_LUT4_I0_O[0] -.sym 14948 spi_if_ins.r_tx_data_valid_SB_LUT4_I3_O[2] -.sym 14949 spi_if_ins.spi.SCKr_SB_LUT4_I0_O[1] -.sym 14952 spi_if_ins.spi.o_spi_miso_SB_DFFE_Q_D_SB_LUT4_O_I2_SB_LUT4_O_I0_SB_LUT4_O_I3[2] -.sym 14953 spi_if_ins.spi.SCKr_SB_LUT4_I0_O[0] -.sym 14955 $PACKER_VCC_NET -.sym 14959 spi_if_ins.spi.o_spi_miso_SB_DFFE_Q_D_SB_LUT4_O_I2_SB_LUT4_O_I0_SB_LUT4_O_I3[2] -.sym 14964 spi_if_ins.spi.o_spi_miso_SB_DFFE_Q_D_SB_LUT4_O_I2_SB_LUT4_O_I0_SB_LUT4_O_I3[2] -.sym 14965 spi_if_ins.r_tx_data_valid_SB_LUT4_I3_O[0] -.sym 14966 spi_if_ins.spi.r_tx_bit_count[2] -.sym 14967 spi_if_ins.r_tx_data_valid_SB_LUT4_I3_O[1] -.sym 14970 spi_if_ins.r_tx_data_valid_SB_LUT4_I3_O[2] -.sym 14972 spi_if_ins.r_tx_data_valid_SB_LUT4_I3_O[0] -.sym 14973 spi_if_ins.r_tx_data_valid_SB_LUT4_I3_O[1] -.sym 14974 spi_if_ins.spi.o_spi_miso_SB_DFFE_Q_E +.sym 14870 io_pmod_SB_DFFSS_Q_D_SB_LUT4_O_I0_SB_LUT4_O_3_I2[1] +.sym 14874 io_pmod_SB_DFFSS_Q_D_SB_LUT4_O_I0_SB_LUT4_O_3_I2[3] +.sym 14883 sys_ctrl_ins.reset_cmd +.sym 14885 r_tx_data[3] +.sym 14888 smi_ctrl_ins.int_cnt_09[3] +.sym 14896 io_pmod_SB_DFFSS_Q_D_SB_LUT4_O_I0_SB_LUT4_O_I0[0] +.sym 14897 rx_09_fifo.full_o_SB_LUT4_I3_O[1] +.sym 14898 rx_09_fifo.wr_addr_gray[1] +.sym 14902 rx_09_fifo.wr_addr_gray[0] +.sym 14903 rx_09_fifo.wr_addr_gray_SB_DFFESR_Q_7_D[1] +.sym 14905 rx_09_fifo.full_o_SB_LUT4_I3_O[1] +.sym 14906 rx_09_fifo.full_o_SB_LUT4_I3_O[2] +.sym 14907 io_pmod[2]$SB_IO_IN +.sym 14910 rx_09_fifo.full_o_SB_DFFSR_Q_D_SB_LUT4_O_I1_SB_LUT4_O_I0_SB_LUT4_O_1_I3[0] +.sym 14912 rx_09_fifo.full_o_SB_LUT4_I3_O[0] +.sym 14913 io_pmod_SB_DFFSS_Q_D_SB_LUT4_O_I0_SB_LUT4_O_I0[1] +.sym 14914 rx_09_fifo.rd_addr_gray_wr_r[0] +.sym 14915 rx_09_fifo.full_o_SB_LUT4_I3_O_SB_LUT4_I3_O[1] +.sym 14916 rx_09_fifo.full_o_SB_LUT4_I3_O_SB_LUT4_I3_O[0] +.sym 14917 rx_09_fifo.wr_addr_gray[3] +.sym 14919 rx_09_fifo.wr_addr_gray_SB_LUT4_I2_1_O[1] +.sym 14920 rx_09_fifo.full_o_SB_LUT4_I3_O_SB_LUT4_I3_O[3] +.sym 14921 rx_09_fifo.full_o_SB_LUT4_I3_O_SB_LUT4_I3_O[2] +.sym 14922 rx_09_fifo.full_o_SB_LUT4_I3_O[3] +.sym 14924 w_rx_09_fifo_pull +.sym 14926 rx_09_fifo.wr_addr_gray_SB_DFFESR_Q_7_D[3] +.sym 14929 rx_09_fifo.wr_addr_gray[0] +.sym 14934 io_pmod_SB_DFFSS_Q_D_SB_LUT4_O_I0_SB_LUT4_O_I0[0] +.sym 14935 io_pmod_SB_DFFSS_Q_D_SB_LUT4_O_I0_SB_LUT4_O_I0[1] +.sym 14936 io_pmod[2]$SB_IO_IN +.sym 14937 w_rx_09_fifo_pull +.sym 14943 rx_09_fifo.wr_addr_gray[1] +.sym 14946 rx_09_fifo.full_o_SB_LUT4_I3_O_SB_LUT4_I3_O[0] +.sym 14947 rx_09_fifo.full_o_SB_LUT4_I3_O_SB_LUT4_I3_O[1] +.sym 14948 rx_09_fifo.full_o_SB_LUT4_I3_O_SB_LUT4_I3_O[2] +.sym 14949 rx_09_fifo.full_o_SB_LUT4_I3_O_SB_LUT4_I3_O[3] +.sym 14952 rx_09_fifo.full_o_SB_LUT4_I3_O[3] +.sym 14953 rx_09_fifo.full_o_SB_LUT4_I3_O[0] +.sym 14954 rx_09_fifo.full_o_SB_LUT4_I3_O[2] +.sym 14955 rx_09_fifo.full_o_SB_LUT4_I3_O[1] +.sym 14958 rx_09_fifo.wr_addr_gray_SB_DFFESR_Q_7_D[1] +.sym 14959 rx_09_fifo.wr_addr_gray_SB_DFFESR_Q_7_D[3] +.sym 14960 rx_09_fifo.rd_addr_gray_wr_r[0] +.sym 14961 rx_09_fifo.full_o_SB_DFFSR_Q_D_SB_LUT4_O_I1_SB_LUT4_O_I0_SB_LUT4_O_1_I3[0] +.sym 14964 rx_09_fifo.wr_addr_gray[3] +.sym 14972 rx_09_fifo.wr_addr_gray_SB_LUT4_I2_1_O[1] +.sym 14973 rx_09_fifo.full_o_SB_LUT4_I3_O[1] .sym 14975 r_counter[0]_$glb_clk -.sym 14976 spi_if_ins.spi.r_tx_bit_count_SB_DFFESR_Q_R -.sym 14977 spi_if_ins.w_rx_data[2] -.sym 14978 spi_if_ins.w_rx_data[6] -.sym 14979 spi_if_ins.w_rx_data[3] -.sym 14980 spi_if_ins.w_rx_data[1] -.sym 14981 spi_if_ins.state_if_SB_DFFESR_Q_1_D[1] -.sym 14982 spi_if_ins.w_rx_data[4] -.sym 14983 spi_if_ins.w_rx_data[0] -.sym 14984 spi_if_ins.w_rx_data[5] -.sym 14991 $io_pmod[4]$iobuf_i -.sym 14993 spi_if_ins.r_tx_data_valid_SB_LUT4_I3_O[2] -.sym 14996 i_mosi$SB_IO_IN -.sym 14998 spi_if_ins.spi.r_rx_done_SB_DFFER_Q_D_SB_LUT4_I3_O -.sym 15001 spi_if_ins.o_cs_SB_LUT4_I2_2_O[1] -.sym 15002 w_tx_data_io[6] -.sym 15004 w_ioc[3] -.sym 15005 r_tx_data[5] -.sym 15007 w_tx_data_io[5] -.sym 15008 spi_if_ins.o_cs_SB_LUT4_I3_1_O -.sym 15012 spi_if_ins.w_rx_data[6] -.sym 15020 spi_if_ins.spi.r_tx_bit_count[2] -.sym 15021 spi_if_ins.spi.r_tx_byte[5] -.sym 15022 spi_if_ins.spi.o_spi_miso_SB_DFFE_Q_D_SB_LUT4_O_I2_SB_LUT4_O_I0[2] -.sym 15023 spi_if_ins.spi.o_spi_miso_SB_DFFE_Q_D_SB_LUT4_O_I2_SB_LUT4_O_I0_SB_LUT4_O_I3[2] -.sym 15026 spi_if_ins.spi.r_tx_byte[7] -.sym 15027 spi_if_ins.spi.r_tx_byte[2] -.sym 15028 spi_if_ins.spi.o_spi_miso_SB_DFFE_Q_D_SB_LUT4_O_I2_SB_LUT4_O_I0_SB_LUT4_O_I3[0] -.sym 15029 spi_if_ins.spi.r_tx_byte_SB_DFFESR_Q_E -.sym 15030 spi_if_ins.spi.SCKr_SB_LUT4_I0_O[0] -.sym 15031 spi_if_ins.spi.r_tx_byte[3] -.sym 15034 spi_if_ins.spi.o_spi_miso_SB_DFFE_Q_D_SB_LUT4_O_I2_SB_LUT4_O_I0[1] -.sym 15037 spi_if_ins.r_tx_byte[1] -.sym 15039 spi_if_ins.spi.o_spi_miso_SB_DFFE_Q_D_SB_LUT4_O_I2_SB_LUT4_O_I0[0] -.sym 15040 spi_if_ins.r_tx_byte[4] -.sym 15043 spi_if_ins.spi.o_spi_miso_SB_DFFE_Q_D_SB_LUT4_O_I2_SB_LUT4_O_I0_SB_LUT4_O_I3[1] -.sym 15044 spi_if_ins.spi.r_tx_byte[6] -.sym 15045 spi_if_ins.spi.r_tx_byte[1] -.sym 15046 spi_if_ins.r_tx_byte[6] -.sym 15047 spi_if_ins.r_tx_data_valid_SB_LUT4_I3_O[2] -.sym 15049 spi_if_ins.spi.o_spi_miso_SB_DFFE_Q_D_SB_LUT4_O_I2_SB_LUT4_O_I0_SB_LUT4_O_I3[3] -.sym 15051 spi_if_ins.spi.r_tx_byte[2] -.sym 15052 spi_if_ins.spi.o_spi_miso_SB_DFFE_Q_D_SB_LUT4_O_I2_SB_LUT4_O_I0_SB_LUT4_O_I3[2] -.sym 15053 spi_if_ins.spi.r_tx_bit_count[2] -.sym 15054 spi_if_ins.spi.r_tx_byte[6] -.sym 15058 spi_if_ins.r_tx_byte[4] -.sym 15064 spi_if_ins.r_tx_byte[6] -.sym 15071 spi_if_ins.r_tx_byte[1] -.sym 15075 spi_if_ins.spi.o_spi_miso_SB_DFFE_Q_D_SB_LUT4_O_I2_SB_LUT4_O_I0_SB_LUT4_O_I3[1] -.sym 15076 spi_if_ins.spi.o_spi_miso_SB_DFFE_Q_D_SB_LUT4_O_I2_SB_LUT4_O_I0_SB_LUT4_O_I3[0] -.sym 15077 spi_if_ins.spi.o_spi_miso_SB_DFFE_Q_D_SB_LUT4_O_I2_SB_LUT4_O_I0_SB_LUT4_O_I3[3] -.sym 15078 spi_if_ins.spi.o_spi_miso_SB_DFFE_Q_D_SB_LUT4_O_I2_SB_LUT4_O_I0_SB_LUT4_O_I3[2] -.sym 15081 spi_if_ins.spi.o_spi_miso_SB_DFFE_Q_D_SB_LUT4_O_I2_SB_LUT4_O_I0_SB_LUT4_O_I3[2] -.sym 15082 spi_if_ins.spi.r_tx_bit_count[2] -.sym 15083 spi_if_ins.spi.r_tx_byte[7] -.sym 15084 spi_if_ins.spi.r_tx_byte[3] -.sym 15087 spi_if_ins.spi.o_spi_miso_SB_DFFE_Q_D_SB_LUT4_O_I2_SB_LUT4_O_I0[1] -.sym 15088 spi_if_ins.spi.o_spi_miso_SB_DFFE_Q_D_SB_LUT4_O_I2_SB_LUT4_O_I0[0] -.sym 15089 spi_if_ins.spi.o_spi_miso_SB_DFFE_Q_D_SB_LUT4_O_I2_SB_LUT4_O_I0[2] -.sym 15090 spi_if_ins.spi.SCKr_SB_LUT4_I0_O[0] -.sym 15093 spi_if_ins.spi.o_spi_miso_SB_DFFE_Q_D_SB_LUT4_O_I2_SB_LUT4_O_I0_SB_LUT4_O_I3[2] -.sym 15094 spi_if_ins.spi.r_tx_byte[1] -.sym 15095 spi_if_ins.spi.r_tx_byte[5] -.sym 15096 spi_if_ins.spi.r_tx_bit_count[2] -.sym 15097 spi_if_ins.spi.r_tx_byte_SB_DFFESR_Q_E +.sym 14977 spi_if_ins.spi.r_tx_byte[2] +.sym 14978 spi_if_ins.spi.r_tx_byte[1] +.sym 14979 spi_if_ins.spi.r_tx_byte[7] +.sym 14980 spi_if_ins.spi.r_tx_byte[5] +.sym 14981 spi_if_ins.r_tx_data_valid_SB_LUT4_I3_O_SB_LUT4_O_I0_SB_LUT4_O_I3[3] +.sym 14982 spi_if_ins.r_tx_data_valid_SB_LUT4_I3_O_SB_LUT4_O_I0_SB_LUT4_O_I3[0] +.sym 14983 spi_if_ins.r_tx_data_valid_SB_LUT4_I3_O_SB_LUT4_O_I0[2] +.sym 14984 spi_if_ins.r_tx_data_valid_SB_LUT4_I3_O_SB_LUT4_O_I0[1] +.sym 14989 spi_if_ins.spi.o_spi_miso_SB_DFFE_Q_E +.sym 14999 rx_09_fifo.wr_addr_gray_rd_r[3] +.sym 15000 io_pmod_SB_DFFSS_Q_D_SB_LUT4_O_I0_SB_LUT4_O_I0[0] +.sym 15002 spi_if_ins.spi.r_tx_byte[3] +.sym 15005 i_smi_soe_se$rename$0 +.sym 15009 spi_if_ins.spi.r_tx_byte_SB_DFFESR_Q_E +.sym 15012 spi_if_ins.r_tx_data_valid_SB_LUT4_I3_O_SB_LUT4_O_I0_SB_LUT4_O_I3[1] +.sym 15018 rx_09_fifo.wr_addr_gray_SB_LUT4_I2_1_O[1] +.sym 15025 rx_09_fifo.wr_addr[0] +.sym 15026 r_tx_data[7] +.sym 15028 r_tx_data[1] +.sym 15029 spi_if_ins.r_tx_data_valid_SB_DFFESR_Q_D_SB_LUT4_I3_O +.sym 15030 r_tx_data[5] +.sym 15035 r_tx_data[2] +.sym 15045 r_tx_data[3] +.sym 15051 rx_09_fifo.wr_addr_gray_SB_LUT4_I2_1_O[1] +.sym 15054 rx_09_fifo.wr_addr[0] +.sym 15057 r_tx_data[7] +.sym 15063 r_tx_data[3] +.sym 15071 r_tx_data[1] +.sym 15081 r_tx_data[2] +.sym 15093 r_tx_data[5] +.sym 15097 spi_if_ins.r_tx_data_valid_SB_DFFESR_Q_D_SB_LUT4_I3_O .sym 15098 r_counter[0]_$glb_clk -.sym 15099 spi_if_ins.r_tx_data_valid_SB_LUT4_I3_O[2] -.sym 15100 r_tx_data[5] -.sym 15103 r_tx_data[6] -.sym 15112 io_pmod[6]$SB_IO_IN -.sym 15120 spi_if_ins.spi.r3_rx_done_SB_LUT4_I2_O -.sym 15126 spi_if_ins.o_cs_SB_LUT4_I2_2_O[2] -.sym 15130 smi_ctrl_ins.o_data_out_SB_LUT4_I1_O[0] -.sym 15134 spi_if_ins.w_rx_data[5] -.sym 15135 io_ctrl_ins.i_cs_SB_LUT4_I3_I0[0] -.sym 15147 spi_if_ins.r_tx_byte[3] -.sym 15150 spi_if_ins.r_tx_byte[0] -.sym 15153 spi_if_ins.r_tx_byte[5] -.sym 15154 spi_if_ins.r_tx_data_valid_SB_LUT4_I3_O[2] -.sym 15159 spi_if_ins.spi.r_tx_byte_SB_DFFESR_Q_E -.sym 15170 spi_if_ins.r_tx_byte[2] -.sym 15172 spi_if_ins.r_tx_byte[7] -.sym 15176 spi_if_ins.r_tx_byte[7] -.sym 15183 spi_if_ins.r_tx_byte[2] -.sym 15186 spi_if_ins.r_tx_byte[0] -.sym 15192 spi_if_ins.r_tx_byte[5] -.sym 15207 spi_if_ins.r_tx_byte[3] -.sym 15220 spi_if_ins.spi.r_tx_byte_SB_DFFESR_Q_E +.sym 15102 sys_ctrl_ins.reset_count[2] +.sym 15103 sys_ctrl_ins.reset_count[3] +.sym 15104 sys_ctrl_ins.reset_count[1] +.sym 15105 sys_ctrl_ins.o_soft_reset_SB_DFFESS_Q_S +.sym 15106 sys_ctrl_ins.reset_count[0] +.sym 15107 sys_ctrl_ins.reset_count_SB_DFFESR_Q_E +.sym 15110 i_smi_a1_SB_LUT4_I1_O_SB_LUT4_O_I2_SB_LUT4_I0_O[2] +.sym 15114 smi_ctrl_ins.int_cnt_24[5] +.sym 15116 spi_if_ins.r_tx_byte[7] +.sym 15117 spi_if_ins.r_tx_data_valid_SB_DFFESR_Q_D_SB_LUT4_I3_O +.sym 15124 i_ss$SB_IO_IN +.sym 15125 spi_if_ins.r_tx_byte[3] +.sym 15131 spi_if_ins.r_tx_data_valid_SB_LUT4_I3_O[2] +.sym 15152 smi_ctrl_ins.int_cnt_09_SB_DFFESR_Q_E +.sym 15154 smi_ctrl_ins.int_cnt_09_SB_DFFESR_Q_D_SB_LUT4_O_I3[1] +.sym 15157 smi_ctrl_ins.r_fifo_24_pull_SB_LUT4_I1_O[2] +.sym 15162 smi_ctrl_ins.int_cnt_09[3] +.sym 15165 i_smi_soe_se$rename$0 +.sym 15166 smi_ctrl_ins.int_cnt_09_SB_DFFESR_Q_D_SB_LUT4_O_I3[2] +.sym 15204 i_smi_soe_se$rename$0 +.sym 15206 smi_ctrl_ins.int_cnt_09[3] +.sym 15207 smi_ctrl_ins.r_fifo_24_pull_SB_LUT4_I1_O[2] +.sym 15210 smi_ctrl_ins.r_fifo_24_pull_SB_LUT4_I1_O[2] +.sym 15212 smi_ctrl_ins.int_cnt_09_SB_DFFESR_Q_D_SB_LUT4_O_I3[1] +.sym 15213 i_smi_soe_se$rename$0 +.sym 15217 smi_ctrl_ins.r_fifo_24_pull_SB_LUT4_I1_O[2] +.sym 15218 i_smi_soe_se$rename$0 +.sym 15219 smi_ctrl_ins.int_cnt_09_SB_DFFESR_Q_D_SB_LUT4_O_I3[2] +.sym 15220 smi_ctrl_ins.int_cnt_09_SB_DFFESR_Q_E .sym 15221 r_counter[0]_$glb_clk -.sym 15222 spi_if_ins.r_tx_data_valid_SB_LUT4_I3_O[2] -.sym 15224 w_cs[1] -.sym 15225 spi_if_ins.o_data_in_SB_DFFE_Q_E -.sym 15227 w_cs[2] -.sym 15228 w_cs[3] -.sym 15243 spi_if_ins.r_tx_byte[3] -.sym 15245 io_pmod[5]$SB_IO_IN -.sym 15247 spi_if_ins.o_load_cmd_SB_DFFESR_Q_D[0] -.sym 15248 w_ioc[4] -.sym 15254 w_ioc[2] -.sym 15256 spi_if_ins.w_rx_data[6] -.sym 15258 w_cs[1] -.sym 15264 r_tx_data[0] -.sym 15266 spi_if_ins.r_tx_data_valid_SB_DFFESR_Q_D_SB_LUT4_I3_O -.sym 15270 w_ioc[2] -.sym 15272 w_ioc[4] -.sym 15274 w_ioc[3] -.sym 15275 r_tx_data[6] -.sym 15277 r_tx_data[5] -.sym 15286 w_ioc[1] -.sym 15304 r_tx_data[0] -.sym 15315 w_ioc[3] -.sym 15316 w_ioc[1] -.sym 15317 w_ioc[4] -.sym 15318 w_ioc[2] -.sym 15321 r_tx_data[5] -.sym 15333 r_tx_data[6] -.sym 15343 spi_if_ins.r_tx_data_valid_SB_DFFESR_Q_D_SB_LUT4_I3_O +.sym 15222 i_smi_a1_SB_LUT4_I1_O_SB_LUT4_O_I2_SB_LUT4_I0_O[2]_$glb_sr +.sym 15223 spi_if_ins.spi.r_tx_byte[3] +.sym 15225 spi_if_ins.spi.r_tx_byte[6] +.sym 15228 spi_if_ins.r_tx_data_valid_SB_LUT4_I3_O_SB_LUT4_O_I0_SB_LUT4_O_I3[1] +.sym 15242 spi_if_ins.r_tx_data_valid_SB_DFFESR_Q_D[0] +.sym 15247 spi_if_ins.r_tx_data_valid_SB_DFFESR_Q_D[0] +.sym 15248 r_tx_data[7] +.sym 15250 r_tx_data[1] +.sym 15253 sys_ctrl_ins.o_soft_reset_SB_DFFESS_Q_S +.sym 15254 r_tx_data[2] +.sym 15256 r_tx_data[5] +.sym 15257 spi_if_ins.r_tx_data_valid_SB_LUT4_I3_O[2] +.sym 15267 spi_if_ins.spi.r3_rx_done_SB_LUT4_I2_O +.sym 15322 spi_if_ins.spi.r3_rx_done_SB_LUT4_I2_O .sym 15344 r_counter[0]_$glb_clk -.sym 15346 spi_if_ins.o_fetch_cmd_SB_LUT4_I3_1_O[1] -.sym 15347 spi_if_ins.r_tx_data_valid_SB_DFFESR_Q_D_SB_LUT4_I3_O -.sym 15348 spi_if_ins.o_data_in_SB_DFFE_Q_E -.sym 15350 spi_if_ins.o_cs_SB_DFFESR_Q_R[0] -.sym 15351 w_fetch -.sym 15352 spi_if_ins.state_if_SB_DFFESR_Q_D_SB_LUT4_I1_O[1] -.sym 15358 $PACKER_VCC_NET -.sym 15372 w_ioc[1] -.sym 15373 io_ctrl_ins.i_cs_SB_LUT4_I3_I0[0] -.sym 15374 w_cs[2] -.sym 15376 w_cs[3] -.sym 15377 spi_if_ins.r_tx_byte[7] -.sym 15380 spi_if_ins.w_rx_data[1] -.sym 15388 w_cs[1] -.sym 15390 spi_if_ins.o_cs_SB_LUT4_I2_2_O[3] -.sym 15391 w_cs[2] -.sym 15400 w_cs[3] -.sym 15404 w_cs[0] -.sym 15405 spi_if_ins.o_cs_SB_LUT4_I3_1_O -.sym 15409 spi_if_ins.o_cs_SB_LUT4_I2_2_O[1] -.sym 15412 spi_if_ins.o_cs_SB_LUT4_I2_2_O[2] -.sym 15415 w_tx_data_sys[0] -.sym 15420 spi_if_ins.o_cs_SB_LUT4_I2_2_O[2] -.sym 15421 w_tx_data_sys[0] -.sym 15422 spi_if_ins.o_cs_SB_LUT4_I2_2_O[1] -.sym 15423 spi_if_ins.o_cs_SB_LUT4_I2_2_O[3] -.sym 15426 w_cs[1] -.sym 15427 w_cs[2] -.sym 15428 w_cs[0] -.sym 15429 w_cs[3] -.sym 15432 w_cs[3] -.sym 15433 w_cs[1] -.sym 15434 w_cs[2] -.sym 15435 w_cs[0] -.sym 15438 w_cs[0] -.sym 15439 w_cs[2] -.sym 15440 w_cs[1] -.sym 15441 w_cs[3] -.sym 15466 spi_if_ins.o_cs_SB_LUT4_I3_1_O -.sym 15467 i_glob_clock$SB_IO_IN_$glb_clk -.sym 15469 w_ioc[4] -.sym 15470 w_cs[0] -.sym 15471 io_ctrl_ins.i_cs_SB_LUT4_I3_I0[1] -.sym 15472 w_ioc[2] -.sym 15473 spi_if_ins.o_cs_SB_LUT4_I3_1_O -.sym 15474 w_ioc[3] -.sym 15475 w_ioc[0] -.sym 15476 w_ioc[1] -.sym 15485 spi_if_ins.o_cs_SB_LUT4_I2_2_O[2] -.sym 15489 spi_if_ins.r_tx_data_valid_SB_DFFESR_Q_D_SB_LUT4_I3_O -.sym 15490 spi_if_ins.r_tx_data_valid_SB_DFFESR_Q_D_SB_LUT4_I3_O -.sym 15494 spi_if_ins.o_cs_SB_LUT4_I3_1_O -.sym 15495 spi_if_ins.o_cs_SB_LUT4_I2_2_O[1] -.sym 15496 w_ioc[3] -.sym 15497 w_tx_data_io[7] -.sym 15499 w_fetch -.sym 15500 spi_if_ins.o_cs_SB_LUT4_I3_1_O -.sym 15502 w_cs[1] -.sym 15503 w_tx_data_io[5] -.sym 15510 spi_if_ins.o_fetch_cmd_SB_LUT4_I3_1_O[1] -.sym 15512 spi_if_ins.state_if[1] -.sym 15513 smi_ctrl_ins.o_data_out_SB_LUT4_I1_O[0] -.sym 15515 r_tx_data[4] -.sym 15516 r_tx_data[2] -.sym 15520 spi_if_ins.o_cs_SB_LUT4_I2_O[1] -.sym 15521 r_tx_data[7] -.sym 15525 r_tx_data[3] -.sym 15526 w_tx_data_io[0] -.sym 15528 w_tx_data_smi[0] -.sym 15534 spi_if_ins.state_if[0] -.sym 15536 io_ctrl_ins.i_cs_SB_LUT4_I3_I0[1] -.sym 15537 spi_if_ins.r_tx_data_valid_SB_DFFESR_Q_D_SB_LUT4_I3_O -.sym 15543 spi_if_ins.state_if[1] -.sym 15546 spi_if_ins.state_if[0] -.sym 15552 r_tx_data[7] -.sym 15556 io_ctrl_ins.i_cs_SB_LUT4_I3_I0[1] -.sym 15557 spi_if_ins.o_fetch_cmd_SB_LUT4_I3_1_O[1] -.sym 15561 smi_ctrl_ins.o_data_out_SB_LUT4_I1_O[0] -.sym 15562 w_tx_data_smi[0] -.sym 15563 spi_if_ins.o_cs_SB_LUT4_I2_O[1] -.sym 15564 w_tx_data_io[0] -.sym 15569 r_tx_data[2] -.sym 15579 r_tx_data[3] -.sym 15587 r_tx_data[4] -.sym 15589 spi_if_ins.r_tx_data_valid_SB_DFFESR_Q_D_SB_LUT4_I3_O +.sym 15347 spi_if_ins.spi.r_rx_byte[6] +.sym 15349 spi_if_ins.r_tx_data_valid_SB_LUT4_I3_O[2] +.sym 15351 w_smi_read_req +.sym 15366 spi_if_ins.spi.r_rx_done_SB_DFFER_Q_E +.sym 15370 sys_ctrl_ins.reset_cmd +.sym 15371 spi_if_ins.r_tx_byte[4] +.sym 15372 r_tx_data[3] +.sym 15375 spi_if_ins.w_rx_data[5] +.sym 15378 sys_ctrl_ins.reset_cmd +.sym 15392 spi_if_ins.o_cs_SB_LUT4_I2_2_O[2] +.sym 15393 spi_if_ins.w_rx_data[6] +.sym 15396 spi_if_ins.o_cs_SB_LUT4_I2_1_O[1] +.sym 15405 spi_if_ins.o_load_cmd_SB_DFFESR_Q_D_SB_LUT4_I1_O[1] +.sym 15408 spi_if_ins.w_rx_data[5] +.sym 15413 w_tx_data_smi[2] +.sym 15416 spi_if_ins.o_cs_SB_DFFESR_Q_R[0] +.sym 15427 spi_if_ins.w_rx_data[6] +.sym 15428 spi_if_ins.w_rx_data[5] +.sym 15433 spi_if_ins.o_cs_SB_LUT4_I2_2_O[2] +.sym 15434 spi_if_ins.o_cs_SB_LUT4_I2_1_O[1] +.sym 15435 w_tx_data_smi[2] +.sym 15445 spi_if_ins.w_rx_data[5] +.sym 15446 spi_if_ins.w_rx_data[6] +.sym 15450 spi_if_ins.w_rx_data[5] +.sym 15451 spi_if_ins.w_rx_data[6] +.sym 15466 spi_if_ins.o_load_cmd_SB_DFFESR_Q_D_SB_LUT4_I1_O[1] +.sym 15467 r_counter[0]_$glb_clk +.sym 15468 spi_if_ins.o_cs_SB_DFFESR_Q_R[0] +.sym 15469 r_tx_data[7] +.sym 15470 r_tx_data[1] +.sym 15471 r_tx_data[4] +.sym 15472 r_tx_data[2] +.sym 15473 r_tx_data[5] +.sym 15474 spi_if_ins.w_rx_data[5] +.sym 15475 r_tx_data[6] +.sym 15476 r_tx_data[3] +.sym 15488 w_tx_data_io[0] +.sym 15493 io_ctrl_ins.tr_vc_2_state_SB_LUT4_I1_I3[1] +.sym 15500 w_tx_data_io[4] +.sym 15501 spi_if_ins.r_tx_byte[6] +.sym 15510 w_cs[0] +.sym 15511 w_cs[3] +.sym 15512 spi_if_ins.r_tx_data_valid_SB_DFFESR_Q_E +.sym 15513 spi_if_ins.r_tx_data_valid_SB_DFFESR_Q_D[1] +.sym 15514 w_cs[2] +.sym 15515 w_cs[1] +.sym 15516 spi_if_ins.w_rx_data[6] +.sym 15518 w_cs[0] +.sym 15519 w_cs[3] +.sym 15522 w_cs[2] +.sym 15530 spi_if_ins.r_tx_data_valid_SB_DFFESR_Q_D[0] +.sym 15535 spi_if_ins.w_rx_data[5] +.sym 15543 w_cs[3] +.sym 15544 w_cs[1] +.sym 15545 w_cs[0] +.sym 15546 w_cs[2] +.sym 15549 w_cs[1] +.sym 15550 w_cs[0] +.sym 15551 w_cs[3] +.sym 15552 w_cs[2] +.sym 15556 spi_if_ins.r_tx_data_valid_SB_DFFESR_Q_D[1] +.sym 15561 w_cs[2] +.sym 15562 w_cs[0] +.sym 15563 w_cs[1] +.sym 15564 w_cs[3] +.sym 15567 w_cs[3] +.sym 15568 w_cs[1] +.sym 15569 w_cs[2] +.sym 15570 w_cs[0] +.sym 15573 w_cs[1] +.sym 15574 w_cs[2] +.sym 15575 w_cs[0] +.sym 15576 w_cs[3] +.sym 15579 spi_if_ins.w_rx_data[6] +.sym 15581 spi_if_ins.w_rx_data[5] +.sym 15589 spi_if_ins.r_tx_data_valid_SB_DFFESR_Q_E .sym 15590 r_counter[0]_$glb_clk -.sym 15592 io_ctrl_ins.led0_state_SB_LUT4_I3_I0[1] -.sym 15593 io_ctrl_ins.led0_state_SB_LUT4_I3_O[1] -.sym 15594 io_ctrl_ins.led0_state_SB_LUT4_I3_O[0] -.sym 15595 io_ctrl_ins.pmod_dir_state[3] -.sym 15596 io_ctrl_ins.pmod_dir_state[4] -.sym 15597 io_ctrl_ins.pmod_dir_state[2] -.sym 15598 io_ctrl_ins.led1_state_SB_LUT4_I3_O[0] -.sym 15599 spi_if_ins.o_cs_SB_LUT4_I2_2_O[1] -.sym 15603 o_led1$SB_IO_OUT -.sym 15612 w_rx_data[2] -.sym 15613 w_cs[0] -.sym 15614 w_rx_data[1] -.sym 15616 io_ctrl_ins.i_cs_SB_LUT4_I3_I0[1] -.sym 15617 io_ctrl_ins.tr_vc_1_b_state_SB_LUT4_I1_O[2] -.sym 15620 spi_if_ins.state_if[0] -.sym 15621 w_fetch -.sym 15623 io_ctrl_ins.i_cs_SB_LUT4_I3_I0[0] -.sym 15624 w_ioc[0] -.sym 15626 w_ioc[1] -.sym 15634 w_tx_data_smi[3] -.sym 15635 w_tx_data_io[3] -.sym 15637 spi_if_ins.o_cs_SB_LUT4_I2_O[1] -.sym 15638 w_tx_data_io[1] -.sym 15639 w_tx_data_io[4] -.sym 15642 w_tx_data_io[2] -.sym 15643 io_ctrl_ins.i_cs_SB_LUT4_I3_I0[1] -.sym 15644 w_tx_data_smi[1] -.sym 15646 spi_if_ins.o_cs_SB_LUT4_I2_2_O[1] -.sym 15647 smi_ctrl_ins.o_data_out_SB_LUT4_I1_O[0] -.sym 15649 spi_if_ins.o_cs_SB_LUT4_I2_2_O[2] -.sym 15651 io_ctrl_ins.i_cs_SB_LUT4_I3_O[0] -.sym 15652 i_smi_a1_SB_LUT4_I1_O[2] -.sym 15657 w_tx_data_io[7] -.sym 15658 io_ctrl_ins.i_cs_SB_LUT4_I3_I0[0] -.sym 15659 w_fetch -.sym 15660 spi_if_ins.o_cs_SB_LUT4_I3_1_O -.sym 15661 smi_ctrl_ins.o_data_out_SB_LUT4_I1_O[2] -.sym 15662 w_cs[1] -.sym 15666 spi_if_ins.o_cs_SB_LUT4_I2_O[1] -.sym 15667 smi_ctrl_ins.o_data_out_SB_LUT4_I1_O[0] -.sym 15668 w_tx_data_smi[1] -.sym 15669 w_tx_data_io[1] -.sym 15678 w_cs[1] -.sym 15679 io_ctrl_ins.i_cs_SB_LUT4_I3_I0[1] -.sym 15680 io_ctrl_ins.i_cs_SB_LUT4_I3_I0[0] -.sym 15681 i_smi_a1_SB_LUT4_I1_O[2] -.sym 15684 w_tx_data_io[7] -.sym 15685 spi_if_ins.o_cs_SB_LUT4_I2_2_O[2] -.sym 15686 smi_ctrl_ins.o_data_out_SB_LUT4_I1_O[0] -.sym 15692 io_ctrl_ins.i_cs_SB_LUT4_I3_O[0] -.sym 15693 w_fetch -.sym 15696 smi_ctrl_ins.o_data_out_SB_LUT4_I1_O[0] -.sym 15697 w_tx_data_io[4] -.sym 15702 w_tx_data_io[2] -.sym 15703 smi_ctrl_ins.o_data_out_SB_LUT4_I1_O[2] -.sym 15705 smi_ctrl_ins.o_data_out_SB_LUT4_I1_O[0] -.sym 15708 w_tx_data_smi[3] -.sym 15709 w_tx_data_io[3] -.sym 15710 smi_ctrl_ins.o_data_out_SB_LUT4_I1_O[0] -.sym 15711 spi_if_ins.o_cs_SB_LUT4_I2_O[1] -.sym 15712 spi_if_ins.o_cs_SB_LUT4_I3_1_O -.sym 15713 i_glob_clock$SB_IO_IN_$glb_clk -.sym 15714 spi_if_ins.o_cs_SB_LUT4_I2_2_O[1] -.sym 15715 io_ctrl_ins.tr_vc_2_state_SB_LUT4_I1_O[3] -.sym 15716 io_ctrl_ins.o_pmod[5] -.sym 15717 i_button_SB_LUT4_I3_I1[0] -.sym 15718 io_ctrl_ins.o_pmod[3] -.sym 15719 io_ctrl_ins.o_pmod[0] -.sym 15720 i_button_SB_LUT4_I3_I1[2] -.sym 15721 io_ctrl_ins.o_pmod[1] -.sym 15722 io_ctrl_ins.o_pmod[4] -.sym 15736 io_ctrl_ins.led0_state_SB_LUT4_I3_O[1] -.sym 15739 spi_if_ins.o_load_cmd_SB_DFFESR_Q_D[0] -.sym 15741 w_rx_data[0] -.sym 15742 io_ctrl_ins.led1_state_SB_LUT4_I3_O[2] -.sym 15743 io_ctrl_ins.pmod_dir_state[4] -.sym 15745 w_rx_data[5] -.sym 15746 w_cs[1] -.sym 15749 sys_ctrl_ins.reset_cmd_SB_DFFESR_Q_E -.sym 15750 io_ctrl_ins.tr_vc_2_state_SB_LUT4_I1_O[2] -.sym 15757 o_ldo_2v8_en$SB_IO_OUT -.sym 15758 io_ctrl_ins.led1_state_SB_LUT4_I3_O[2] -.sym 15759 io_ctrl_ins.pmod_dir_state[3] -.sym 15760 io_ctrl_ins.o_data_out_SB_DFFESR_Q_R -.sym 15761 io_ctrl_ins.pmod_dir_state[2] -.sym 15763 io_ctrl_ins.ldo2v8_state_SB_LUT4_I0_I2[3] -.sym 15764 io_ctrl_ins.led0_state_SB_LUT4_I3_I0[1] -.sym 15765 io_ctrl_ins.led0_state_SB_LUT4_I3_O[1] -.sym 15766 io_ctrl_ins.led0_state_SB_LUT4_I3_O[0] -.sym 15768 io_ctrl_ins.led1_state_SB_LUT4_I3_O[3] -.sym 15769 io_ctrl_ins.led0_state_SB_LUT4_I3_O[3] -.sym 15770 io_ctrl_ins.led1_state_SB_LUT4_I3_O[0] -.sym 15772 io_ctrl_ins.rf_mode[0] -.sym 15774 io_ctrl_ins.tr_vc_2_state_SB_LUT4_I1_O[2] -.sym 15775 i_config[1]$SB_IO_IN -.sym 15776 o_led1$SB_IO_OUT -.sym 15777 io_ctrl_ins.tr_vc_1_b_state_SB_LUT4_I1_O[2] -.sym 15778 io_ctrl_ins.ldo2v8_state_SB_LUT4_I0_I2[2] -.sym 15779 io_ctrl_ins.led0_state_SB_LUT4_I3_O[2] -.sym 15780 io_ctrl_ins.tr_vc_2_state_SB_LUT4_I1_O[3] -.sym 15781 io_ctrl_ins.tr_vc_1_b_state_SB_LUT4_I1_O[3] -.sym 15782 i_button_SB_LUT4_I3_I1[1] -.sym 15783 io_ctrl_ins.o_data_out_SB_DFFESR_Q_E[3] -.sym 15784 io_ctrl_ins.led0_state_SB_LUT4_I3_I0[0] -.sym 15785 i_button_SB_LUT4_I3_I1[2] -.sym 15786 io_ctrl_ins.o_pmod[1] -.sym 15789 io_ctrl_ins.led0_state_SB_LUT4_I3_O[3] -.sym 15790 io_ctrl_ins.led0_state_SB_LUT4_I3_O[0] -.sym 15791 io_ctrl_ins.led0_state_SB_LUT4_I3_O[1] -.sym 15792 io_ctrl_ins.led0_state_SB_LUT4_I3_O[2] -.sym 15795 o_ldo_2v8_en$SB_IO_OUT -.sym 15796 i_button_SB_LUT4_I3_I1[2] -.sym 15797 io_ctrl_ins.ldo2v8_state_SB_LUT4_I0_I2[3] -.sym 15798 io_ctrl_ins.ldo2v8_state_SB_LUT4_I0_I2[2] -.sym 15801 io_ctrl_ins.led0_state_SB_LUT4_I3_O[1] -.sym 15802 io_ctrl_ins.pmod_dir_state[3] -.sym 15803 io_ctrl_ins.tr_vc_2_state_SB_LUT4_I1_O[2] -.sym 15804 io_ctrl_ins.tr_vc_2_state_SB_LUT4_I1_O[3] -.sym 15807 io_ctrl_ins.led0_state_SB_LUT4_I3_I0[0] -.sym 15809 io_ctrl_ins.led0_state_SB_LUT4_I3_I0[1] -.sym 15813 o_led1$SB_IO_OUT -.sym 15814 i_button_SB_LUT4_I3_I1[1] -.sym 15815 i_button_SB_LUT4_I3_I1[2] -.sym 15816 io_ctrl_ins.o_pmod[1] -.sym 15819 io_ctrl_ins.led1_state_SB_LUT4_I3_O[3] -.sym 15820 io_ctrl_ins.led1_state_SB_LUT4_I3_O[2] -.sym 15821 io_ctrl_ins.led1_state_SB_LUT4_I3_O[0] -.sym 15822 io_ctrl_ins.led0_state_SB_LUT4_I3_O[1] -.sym 15825 i_button_SB_LUT4_I3_I1[2] -.sym 15826 i_config[1]$SB_IO_IN -.sym 15827 io_ctrl_ins.tr_vc_1_b_state_SB_LUT4_I1_O[3] -.sym 15828 io_ctrl_ins.tr_vc_1_b_state_SB_LUT4_I1_O[2] -.sym 15831 io_ctrl_ins.pmod_dir_state[2] -.sym 15832 io_ctrl_ins.rf_mode[0] -.sym 15833 io_ctrl_ins.led0_state_SB_LUT4_I3_I0[0] -.sym 15834 io_ctrl_ins.led0_state_SB_LUT4_I3_O[1] -.sym 15835 io_ctrl_ins.o_data_out_SB_DFFESR_Q_E[3] +.sym 15591 spi_if_ins.r_tx_data_valid_SB_DFFESR_Q_D[0] +.sym 15592 spi_if_ins.r_tx_byte[4] +.sym 15594 spi_if_ins.r_tx_byte[6] +.sym 15604 spi_if_ins.o_cs_SB_LUT4_I2_2_O[1] +.sym 15607 w_tx_data_io[5] +.sym 15608 i_mosi$SB_IO_IN +.sym 15609 w_tx_data_smi[1] +.sym 15615 w_tx_data_io[7] +.sym 15620 w_fetch +.sym 15624 w_cs[0] +.sym 15625 spi_if_ins.o_cs_SB_DFFESR_Q_R[0] +.sym 15627 w_fetch +.sym 15633 spi_if_ins.w_rx_data[3] +.sym 15634 w_ioc[1] +.sym 15635 spi_if_ins.o_load_cmd_SB_DFFESR_Q_D_SB_LUT4_I1_O[1] +.sym 15637 spi_if_ins.w_rx_data[4] +.sym 15639 w_fetch +.sym 15641 w_cs[2] +.sym 15646 spi_if_ins.o_fetch_cmd_SB_LUT4_I3_1_O[0] +.sym 15647 spi_if_ins.o_cs_SB_DFFESR_Q_R[0] +.sym 15657 w_cs[0] +.sym 15659 spi_if_ins.o_fetch_cmd_SB_LUT4_I3_1_O[1] +.sym 15664 i_smi_a1_SB_LUT4_I1_O_SB_LUT4_O_I2_SB_LUT4_I0_O[2] +.sym 15667 spi_if_ins.o_cs_SB_DFFESR_Q_R[0] +.sym 15672 spi_if_ins.o_fetch_cmd_SB_LUT4_I3_1_O[1] +.sym 15675 spi_if_ins.o_fetch_cmd_SB_LUT4_I3_1_O[0] +.sym 15678 i_smi_a1_SB_LUT4_I1_O_SB_LUT4_O_I2_SB_LUT4_I0_O[2] +.sym 15679 w_ioc[1] +.sym 15680 w_fetch +.sym 15681 w_cs[2] +.sym 15685 w_fetch +.sym 15686 w_cs[0] +.sym 15687 spi_if_ins.o_fetch_cmd_SB_LUT4_I3_1_O[0] +.sym 15702 spi_if_ins.w_rx_data[4] +.sym 15709 spi_if_ins.w_rx_data[3] +.sym 15712 spi_if_ins.o_load_cmd_SB_DFFESR_Q_D_SB_LUT4_I1_O[1] +.sym 15713 r_counter[0]_$glb_clk +.sym 15715 io_ctrl_ins.ldo2v8_state_SB_LUT4_I3_O[0] +.sym 15716 io_ctrl_ins.pmod_dir_state[1] +.sym 15717 io_ctrl_ins.pmod_dir_state_SB_DFFE_Q_E +.sym 15718 io_ctrl_ins.pmod_dir_state[6] +.sym 15719 io_ctrl_ins.led0_state_SB_LUT4_I3_O[0] +.sym 15720 io_ctrl_ins.pmod_dir_state[3] +.sym 15721 io_ctrl_ins.pmod_dir_state[4] +.sym 15722 io_ctrl_ins.pmod_dir_state[7] +.sym 15731 spi_if_ins.w_rx_data[1] +.sym 15735 spi_if_ins.r_tx_data_valid_SB_DFFESR_Q_D_SB_LUT4_I3_O +.sym 15737 spi_if_ins.w_rx_data[3] +.sym 15745 w_ioc[0] +.sym 15747 io_ctrl_ins.tr_vc_2_state_SB_LUT4_I1_I3[1] +.sym 15749 $PACKER_VCC_NET +.sym 15750 sys_ctrl_ins.o_soft_reset_SB_DFFESS_Q_S +.sym 15757 w_ioc[1] +.sym 15761 spi_if_ins.w_rx_data[2] +.sym 15762 spi_if_ins.w_rx_data[0] +.sym 15764 i_smi_a1_SB_LUT4_I1_O_SB_LUT4_O_I2_SB_LUT4_I0_O[2] +.sym 15768 io_ctrl_ins.i_cs_SB_LUT4_I3_O[0] +.sym 15769 spi_if_ins.o_fetch_cmd_SB_LUT4_I3_1_O[0] +.sym 15770 w_ioc[4] +.sym 15771 w_ioc[3] +.sym 15774 w_ioc[2] +.sym 15779 spi_if_ins.w_rx_data[1] +.sym 15780 io_ctrl_ins.tr_vc_2_state_SB_LUT4_I1_I3[1] +.sym 15783 spi_if_ins.o_load_cmd_SB_DFFESR_Q_D_SB_LUT4_I1_O[1] +.sym 15785 w_cs[1] +.sym 15787 w_fetch +.sym 15789 w_ioc[2] +.sym 15790 w_ioc[1] +.sym 15791 w_ioc[3] +.sym 15792 w_ioc[4] +.sym 15797 spi_if_ins.w_rx_data[1] +.sym 15804 spi_if_ins.w_rx_data[2] +.sym 15807 io_ctrl_ins.i_cs_SB_LUT4_I3_O[0] +.sym 15810 w_fetch +.sym 15813 spi_if_ins.o_fetch_cmd_SB_LUT4_I3_1_O[0] +.sym 15814 i_smi_a1_SB_LUT4_I1_O_SB_LUT4_O_I2_SB_LUT4_I0_O[2] +.sym 15815 w_cs[1] +.sym 15816 io_ctrl_ins.tr_vc_2_state_SB_LUT4_I1_I3[1] +.sym 15819 w_ioc[4] +.sym 15820 w_ioc[3] +.sym 15822 w_ioc[2] +.sym 15834 spi_if_ins.w_rx_data[0] +.sym 15835 spi_if_ins.o_load_cmd_SB_DFFESR_Q_D_SB_LUT4_I1_O[1] .sym 15836 r_counter[0]_$glb_clk -.sym 15837 io_ctrl_ins.o_data_out_SB_DFFESR_Q_R -.sym 15838 io_ctrl_ins.tr_vc_1_b_state_SB_LUT4_I1_O[2] -.sym 15839 io_ctrl_ins.tr_vc_1_b_state_SB_LUT4_I1_O[3] -.sym 15840 i_button_SB_LUT4_I3_I1[1] -.sym 15841 sys_ctrl_ins.reset_cmd_SB_DFFESR_Q_E -.sym 15842 io_ctrl_ins.led0_state_SB_LUT4_I3_I0[0] -.sym 15843 sys_ctrl_ins.o_data_out_SB_DFFE_Q_D[1] -.sym 15844 w_load -.sym 15845 io_ctrl_ins.led0_state_SB_LUT4_I3_O[2] -.sym 15853 $io_pmod[2]$iobuf_i -.sym 15854 io_ctrl_ins.o_data_out_SB_DFFESR_Q_6_E -.sym 15861 o_ldo_2v8_en$SB_IO_OUT -.sym 15864 io_ctrl_ins.ldo2v8_state_SB_LUT4_I0_I2[2] -.sym 15865 spi_if_ins.state_if_SB_DFFE_Q_E -.sym 15866 i_config[3]$SB_IO_IN -.sym 15873 io_ctrl_ins.i_cs_SB_LUT4_I3_I0[0] -.sym 15881 spi_if_ins.state_if_SB_DFFE_Q_E -.sym 15882 i_smi_a1_SB_LUT4_I1_O[2] -.sym 15883 w_cs[0] -.sym 15885 spi_if_ins.state_if_SB_DFFESR_Q_1_D[0] -.sym 15886 i_smi_a1_SB_LUT4_I1_O[2] -.sym 15888 io_ctrl_ins.i_cs_SB_LUT4_I3_I0[1] -.sym 15891 w_fetch -.sym 15892 i_button_SB_LUT4_I3_I1[2] -.sym 15893 io_ctrl_ins.debug_mode[0] -.sym 15894 spi_if_ins.o_load_cmd_SB_LUT4_I2_O[1] -.sym 15901 w_load -.sym 15906 w_cs[1] -.sym 15907 io_ctrl_ins.led0_state_SB_LUT4_I3_I0[0] -.sym 15908 spi_if_ins.state_if_SB_DFFESR_Q_1_R -.sym 15910 o_led0$SB_IO_OUT -.sym 15912 w_cs[0] -.sym 15913 w_fetch -.sym 15914 io_ctrl_ins.i_cs_SB_LUT4_I3_I0[1] -.sym 15919 spi_if_ins.o_load_cmd_SB_LUT4_I2_O[1] -.sym 15920 i_smi_a1_SB_LUT4_I1_O[2] -.sym 15924 spi_if_ins.state_if_SB_DFFESR_Q_1_D[0] -.sym 15936 spi_if_ins.o_load_cmd_SB_LUT4_I2_O[1] -.sym 15937 i_smi_a1_SB_LUT4_I1_O[2] -.sym 15939 io_ctrl_ins.led0_state_SB_LUT4_I3_I0[0] -.sym 15942 io_ctrl_ins.led0_state_SB_LUT4_I3_I0[0] -.sym 15943 o_led0$SB_IO_OUT -.sym 15944 io_ctrl_ins.debug_mode[0] -.sym 15945 i_button_SB_LUT4_I3_I1[2] -.sym 15948 i_button_SB_LUT4_I3_I1[2] -.sym 15950 spi_if_ins.o_load_cmd_SB_LUT4_I2_O[1] -.sym 15951 i_smi_a1_SB_LUT4_I1_O[2] -.sym 15955 w_load -.sym 15956 w_fetch -.sym 15957 w_cs[1] -.sym 15958 spi_if_ins.state_if_SB_DFFE_Q_E +.sym 15838 io_ctrl_ins.o_pmod[6] +.sym 15839 io_ctrl_ins.led1_state_SB_LUT4_I0_I2[1] +.sym 15840 io_ctrl_ins.pmod_state_SB_DFFE_Q_E_SB_LUT4_O_I3[1] +.sym 15841 io_ctrl_ins.o_pmod[4] +.sym 15842 io_ctrl_ins.rx_h_b_state_SB_LUT4_I0_O[0] +.sym 15843 io_ctrl_ins.o_data_out_SB_DFFESR_Q_6_R[0] +.sym 15844 io_ctrl_ins.pmod_state_SB_DFFE_Q_E_SB_LUT4_O_I3[0] +.sym 15845 io_ctrl_ins.o_data_out_SB_DFFESR_Q_6_R[1] +.sym 15851 io_ctrl_ins.pmod_dir_state[4] +.sym 15854 w_rx_data[2] +.sym 15862 sys_ctrl_ins.reset_cmd +.sym 15864 io_ctrl_ins.pmod_state_SB_DFFE_Q_E +.sym 15865 io_ctrl_ins.o_data_out_SB_DFFESR_Q_6_R[0] +.sym 15866 io_ctrl_ins.ldo2v8_state_SB_LUT4_I3_O[1] +.sym 15868 io_ctrl_ins.pmod_dir_state[3] +.sym 15873 w_ioc[0] +.sym 15880 w_ioc[1] +.sym 15882 io_ctrl_ins.o_data_out_SB_DFFESR_Q_E[3] +.sym 15884 spi_if_ins.o_fetch_cmd_SB_LUT4_I3_1_O[0] +.sym 15888 w_ioc[1] +.sym 15889 w_ioc[2] +.sym 15891 w_load +.sym 15892 w_fetch +.sym 15894 w_ioc[0] +.sym 15896 w_cs[0] +.sym 15901 io_ctrl_ins.pmod_state_SB_DFFE_Q_E_SB_LUT4_O_I3[0] +.sym 15905 w_cs[1] +.sym 15906 sys_ctrl_ins.reset_cmd_SB_DFFESR_Q_E +.sym 15908 sys_ctrl_ins.reset_cmd_SB_DFFESR_Q_R +.sym 15909 $PACKER_VCC_NET +.sym 15918 w_ioc[2] +.sym 15919 w_ioc[0] +.sym 15920 io_ctrl_ins.o_data_out_SB_DFFESR_Q_E[3] +.sym 15921 w_ioc[1] +.sym 15930 w_load +.sym 15931 w_fetch +.sym 15932 w_cs[0] +.sym 15933 io_ctrl_ins.pmod_state_SB_DFFE_Q_E_SB_LUT4_O_I3[0] +.sym 15939 $PACKER_VCC_NET +.sym 15942 w_cs[0] +.sym 15949 w_ioc[1] +.sym 15950 w_ioc[0] +.sym 15951 spi_if_ins.o_fetch_cmd_SB_LUT4_I3_1_O[0] +.sym 15954 w_cs[1] +.sym 15956 w_load +.sym 15957 w_fetch +.sym 15958 sys_ctrl_ins.reset_cmd_SB_DFFESR_Q_E .sym 15959 r_counter[0]_$glb_clk -.sym 15960 spi_if_ins.state_if_SB_DFFESR_Q_1_R -.sym 15961 io_ctrl_ins.rf_pin_state[4] -.sym 15962 io_ctrl_ins.led1_state_SB_LUT4_I3_O[2] -.sym 15964 spi_if_ins.o_load_cmd_SB_LUT4_I2_O_SB_LUT4_I3_O_SB_LUT4_I3_2_O -.sym 15965 io_ctrl_ins.rf_pin_state[5] -.sym 15966 io_ctrl_ins.tr_vc_2_state_SB_LUT4_I1_O[2] -.sym 15967 io_ctrl_ins.rf_pin_state[3] -.sym 15968 io_ctrl_ins.ldo2v8_state_SB_LUT4_I0_I2[2] -.sym 15991 i_button$SB_IO_IN -.sym 16002 w_rx_data[2] -.sym 16004 w_rx_data[1] -.sym 16013 w_rx_data[0] -.sym 16029 spi_if_ins.o_load_cmd_SB_LUT4_I2_O_SB_LUT4_I2_O +.sym 15960 sys_ctrl_ins.reset_cmd_SB_DFFESR_Q_R +.sym 15961 io_ctrl_ins.rf_mode[2] +.sym 15962 io_ctrl_ins.rf_mode[0] +.sym 15963 io_ctrl_ins.rf_pin_state_SB_DFFE_Q_E +.sym 15964 io_ctrl_ins.led1_state_SB_LUT4_I0_I2[3] +.sym 15965 io_ctrl_ins.debug_mode[0] +.sym 15966 io_ctrl_ins.debug_mode_SB_LUT4_I0_O +.sym 15967 io_ctrl_ins.debug_mode_SB_LUT4_I2_O[3] +.sym 15968 io_ctrl_ins.pmod_state_SB_DFFE_Q_E +.sym 15973 io_ctrl_ins.rf_pin_state[0] +.sym 15977 io_ctrl_ins.rf_pin_state[4] +.sym 15982 i_smi_a1_SB_LUT4_I1_O_SB_LUT4_O_I2_SB_LUT4_I0_O[2] +.sym 15983 io_ctrl_ins.o_data_out_SB_DFFESR_Q_R +.sym 15985 io_ctrl_ins.tr_vc_2_state_SB_LUT4_I1_I3[1] +.sym 15987 w_rx_data[1] +.sym 15994 io_ctrl_ins.ldo2v8_state_SB_LUT4_I3_O[1] +.sym 15996 spi_if_ins.o_load_cmd_SB_LUT4_I2_O[0] +.sym 16007 io_ctrl_ins.o_data_out_SB_DFFESR_Q_6_R[0] +.sym 16011 w_rx_data[3] +.sym 16013 w_rx_data[1] +.sym 16017 spi_if_ins.o_load_cmd_SB_LUT4_I2_O[0] +.sym 16020 io_ctrl_ins.rf_mode_SB_DFFESR_Q_E +.sym 16033 i_smi_a1_SB_LUT4_I1_O_SB_LUT4_O_I2_SB_LUT4_I0_O[2] +.sym 16047 spi_if_ins.o_load_cmd_SB_LUT4_I2_O[0] +.sym 16048 io_ctrl_ins.o_data_out_SB_DFFESR_Q_6_R[0] +.sym 16049 i_smi_a1_SB_LUT4_I1_O_SB_LUT4_O_I2_SB_LUT4_I0_O[2] .sym 16054 w_rx_data[1] -.sym 16059 w_rx_data[2] -.sym 16071 w_rx_data[0] -.sym 16081 spi_if_ins.o_load_cmd_SB_LUT4_I2_O_SB_LUT4_I2_O +.sym 16061 w_rx_data[3] +.sym 16081 io_ctrl_ins.rf_mode_SB_DFFESR_Q_E .sym 16082 r_counter[0]_$glb_clk -.sym 16083 i_smi_a1_SB_LUT4_I1_O[2]_$glb_sr -.sym 16084 io_ctrl_ins.rf_pin_state[7] -.sym 16086 io_ctrl_ins.tr_vc_1_state_SB_DFFE_Q_D_SB_LUT4_O_I0[0] -.sym 16087 io_ctrl_ins.rf_pin_state[0] -.sym 16089 io_ctrl_ins.rf_mode[0] -.sym 16091 io_ctrl_ins.rf_pin_state[6] -.sym 16104 io_ctrl_ins.debug_mode[1] -.sym 16127 sys_ctrl_ins.o_data_out_SB_DFFE_Q_E -.sym 16132 io_ctrl_ins.led0_state_SB_LUT4_I3_O[1] -.sym 16159 io_ctrl_ins.led0_state_SB_LUT4_I3_O[1] -.sym 16204 sys_ctrl_ins.o_data_out_SB_DFFE_Q_E +.sym 16083 i_smi_a1_SB_LUT4_I1_O_SB_LUT4_O_I2_SB_LUT4_I0_O[2]_$glb_sr +.sym 16084 io_ctrl_ins.led1_state_SB_LUT4_I0_I2[2] +.sym 16086 io_ctrl_ins.o_pmod[2] +.sym 16087 io_ctrl_ins.debug_mode_SB_LUT4_I0_O +.sym 16088 io_ctrl_ins.led1_state_SB_DFFESR_Q_E +.sym 16089 io_ctrl_ins.ldo2v8_state_SB_LUT4_I3_O[2] +.sym 16090 io_ctrl_ins.o_pmod[1] +.sym 16091 io_ctrl_ins.ldo2v8_state_SB_LUT4_I3_O[3] +.sym 16096 i_button_SB_LUT4_I3_O[0] +.sym 16097 io_ctrl_ins.debug_mode_SB_LUT4_I2_O[3] +.sym 16101 io_ctrl_ins.pmod_state_SB_DFFE_Q_E +.sym 16104 io_ctrl_ins.tr_vc_1_state_SB_LUT4_I0_O[0] +.sym 16106 io_ctrl_ins.debug_mode_SB_LUT4_I2_O[1] +.sym 16113 io_ctrl_ins.debug_mode_SB_LUT4_I2_O[1] +.sym 16115 o_shdn_rx_lna$SB_IO_OUT +.sym 16116 io_ctrl_ins.debug_mode_SB_LUT4_I2_O[3] +.sym 16127 io_ctrl_ins.rf_pin_state_SB_DFFE_Q_E +.sym 16130 w_rx_data[1] +.sym 16132 w_rx_data[2] +.sym 16176 w_rx_data[2] +.sym 16197 w_rx_data[1] +.sym 16204 io_ctrl_ins.rf_pin_state_SB_DFFE_Q_E .sym 16205 r_counter[0]_$glb_clk -.sym 16210 io_ctrl_ins.rf_pin_state[2] -.sym 16211 io_ctrl_ins.debug_mode_SB_LUT4_I2_O[0] -.sym 16223 sys_ctrl_ins.o_data_out_SB_DFFE_Q_E -.sym 16238 w_rx_data[0] -.sym 16253 w_rx_data[2] -.sym 16259 io_ctrl_ins.led1_state_SB_DFFESR_Q_E -.sym 16262 w_rx_data[0] -.sym 16263 w_rx_data[1] -.sym 16284 w_rx_data[0] -.sym 16296 w_rx_data[2] -.sym 16319 w_rx_data[1] -.sym 16327 io_ctrl_ins.led1_state_SB_DFFESR_Q_E +.sym 16207 o_led1$SB_IO_OUT +.sym 16213 o_ldo_2v8_en +.sym 16214 o_led0$SB_IO_OUT +.sym 16224 io_ctrl_ins.o_data_out_SB_DFFESR_Q_E[3] +.sym 16231 sys_ctrl_ins.o_soft_reset_SB_DFFESS_Q_S +.sym 16232 io_ctrl_ins.rf_mode[2] +.sym 16236 i_button$SB_IO_IN +.sym 16248 io_ctrl_ins.rf_mode[2] +.sym 16251 io_ctrl_ins.rf_pin_state[2] +.sym 16259 io_ctrl_ins.debug_mode_SB_LUT4_I0_O +.sym 16260 io_ctrl_ins.led1_state_SB_DFFESR_Q_E +.sym 16261 sys_ctrl_ins.reset_cmd +.sym 16262 io_ctrl_ins.rf_pin_state[1] +.sym 16273 io_ctrl_ins.debug_mode_SB_LUT4_I2_O[1] +.sym 16276 io_ctrl_ins.debug_mode_SB_LUT4_I2_O[3] +.sym 16287 io_ctrl_ins.rf_pin_state[1] +.sym 16288 io_ctrl_ins.debug_mode_SB_LUT4_I2_O[1] +.sym 16289 io_ctrl_ins.debug_mode_SB_LUT4_I2_O[3] +.sym 16294 io_ctrl_ins.led1_state_SB_DFFESR_Q_E +.sym 16305 io_ctrl_ins.rf_mode[2] +.sym 16306 io_ctrl_ins.rf_pin_state[2] +.sym 16307 io_ctrl_ins.debug_mode_SB_LUT4_I2_O[1] +.sym 16308 io_ctrl_ins.debug_mode_SB_LUT4_I2_O[3] +.sym 16324 sys_ctrl_ins.reset_cmd +.sym 16327 io_ctrl_ins.debug_mode_SB_LUT4_I0_O .sym 16328 r_counter[0]_$glb_clk -.sym 16329 i_smi_a1_SB_LUT4_I1_O[2]_$glb_sr -.sym 16342 o_led0$SB_IO_OUT -.sym 16347 io_ctrl_ins.led1_state_SB_DFFESR_Q_E -.sym 16355 o_ldo_2v8_en$SB_IO_OUT +.sym 16337 $PACKER_GND_NET +.sym 16347 o_led0$SB_IO_OUT .sym 16358 i_config[3]$SB_IO_IN +.sym 16382 sys_ctrl_ins.o_soft_reset_SB_DFFESS_Q_E +.sym 16391 sys_ctrl_ins.o_soft_reset_SB_DFFESS_Q_S +.sym 16394 $PACKER_GND_NET +.sym 16412 $PACKER_GND_NET +.sym 16450 sys_ctrl_ins.o_soft_reset_SB_DFFESS_Q_E +.sym 16451 r_counter[0]_$glb_clk +.sym 16452 sys_ctrl_ins.o_soft_reset_SB_DFFESS_Q_S .sym 16453 i_config[3]$SB_IO_IN .sym 16455 i_button$SB_IO_IN -.sym 16478 i_button$SB_IO_IN +.sym 16466 $PACKER_GND_NET .sym 16497 w_lvds_rx_24_d1_SB_LUT4_I0_O_SB_LUT4_I3_O -.sym 16514 w_lvds_rx_24_d1_SB_LUT4_I0_O_SB_LUT4_I3_O +.sym 16512 w_lvds_rx_24_d1_SB_LUT4_I0_O_SB_LUT4_I3_O .sym 16523 i_smi_a3$SB_IO_IN -.sym 16553 spi_if_ins.spi.r2_rx_done -.sym 16554 i_ss_SB_LUT4_I3_O -.sym 16557 spi_if_ins.spi.r3_rx_done_SB_LUT4_I2_O -.sym 16558 spi_if_ins.spi.r3_rx_done -.sym 16571 spi_if_ins.w_rx_data[4] -.sym 16574 spi_if_ins.w_rx_data[0] -.sym 16597 spi_if_ins.spi.r_rx_bit_count[2] -.sym 16599 i_ss$SB_IO_IN -.sym 16615 spi_if_ins.spi.r_rx_bit_count[1] -.sym 16624 spi_if_ins.spi.r_rx_bit_count[0] -.sym 16627 $nextpnr_ICESTORM_LC_14$O -.sym 16630 spi_if_ins.spi.r_rx_bit_count[0] -.sym 16633 spi_if_ins.spi.r_rx_bit_count_SB_DFFR_Q_D_SB_LUT4_O_I3[2] -.sym 16635 spi_if_ins.spi.r_rx_bit_count[1] -.sym 16640 spi_if_ins.spi.r_rx_bit_count[2] -.sym 16643 spi_if_ins.spi.r_rx_bit_count_SB_DFFR_Q_D_SB_LUT4_O_I3[2] -.sym 16652 spi_if_ins.spi.r_rx_bit_count[0] -.sym 16654 spi_if_ins.spi.r_rx_bit_count[1] -.sym 16659 spi_if_ins.spi.r_rx_bit_count[0] -.sym 16675 i_sck$SB_IO_IN_$glb_clk -.sym 16676 i_ss$SB_IO_IN -.sym 16683 rx_09_fifo.rd_addr[7] -.sym 16686 rx_09_fifo.rd_addr_gray[5] -.sym 16691 w_fetch -.sym 16692 spi_if_ins.o_cs_SB_LUT4_I3_1_O -.sym 16699 i_ss$SB_IO_IN -.sym 16706 io_pmod[2]$SB_IO_IN -.sym 16710 i_ss$SB_IO_IN -.sym 16729 io_smi_data[4]$SB_IO_OUT -.sym 16731 spi_if_ins.spi.r_rx_done -.sym 16733 i_ss_SB_LUT4_I3_O -.sym 16736 i_ss$SB_IO_IN -.sym 16764 rx_09_fifo.rd_addr_gray_wr[5] -.sym 16765 rx_09_fifo.rd_addr_gray_wr[3] -.sym 16768 spi_if_ins.spi.r_rx_bit_count[2] -.sym 16770 spi_if_ins.spi.r_rx_bit_count[1] -.sym 16771 spi_if_ins.spi.r_rx_bit_count[0] -.sym 16779 rx_09_fifo.rd_addr_gray[5] -.sym 16789 rx_09_fifo.rd_addr_gray[3] -.sym 16804 spi_if_ins.spi.r_rx_bit_count[2] -.sym 16805 spi_if_ins.spi.r_rx_bit_count[0] -.sym 16806 spi_if_ins.spi.r_rx_bit_count[1] -.sym 16809 spi_if_ins.spi.r_rx_bit_count[1] -.sym 16810 spi_if_ins.spi.r_rx_bit_count[0] -.sym 16811 spi_if_ins.spi.r_rx_bit_count[2] -.sym 16817 rx_09_fifo.rd_addr_gray_wr[5] -.sym 16821 rx_09_fifo.rd_addr_gray_wr[3] -.sym 16828 rx_09_fifo.rd_addr_gray[5] -.sym 16834 rx_09_fifo.rd_addr_gray[3] -.sym 16838 lvds_clock_buf -.sym 16842 smi_ctrl_ins.r_fifo_09_pull_SB_LUT4_I3_O -.sym 16844 spi_if_ins.spi.r_rx_done -.sym 16851 spi_if_ins.state_if_SB_DFFESR_Q_D_SB_LUT4_I1_O[1] -.sym 16863 rx_09_fifo.rd_addr[7] -.sym 16870 spi_if_ins.w_rx_data[1] -.sym 16872 spi_if_ins.state_if_SB_DFFESR_Q_1_D[1] -.sym 16874 spi_if_ins.w_rx_data[4] -.sym 16881 spi_if_ins.spi.r_temp_rx_byte[2] -.sym 16882 spi_if_ins.spi.r_temp_rx_byte[5] -.sym 16886 i_mosi$SB_IO_IN -.sym 16895 spi_if_ins.spi.r_temp_rx_byte[0] -.sym 16896 spi_if_ins.spi.r_temp_rx_byte[1] -.sym 16899 i_ss_SB_LUT4_I3_O -.sym 16900 spi_if_ins.spi.r_temp_rx_byte[4] -.sym 16909 spi_if_ins.spi.r_temp_rx_byte[3] -.sym 16914 spi_if_ins.spi.r_temp_rx_byte[1] -.sym 16920 spi_if_ins.spi.r_temp_rx_byte[4] -.sym 16932 spi_if_ins.spi.r_temp_rx_byte[3] -.sym 16940 spi_if_ins.spi.r_temp_rx_byte[2] -.sym 16944 spi_if_ins.spi.r_temp_rx_byte[5] -.sym 16951 i_mosi$SB_IO_IN -.sym 16956 spi_if_ins.spi.r_temp_rx_byte[0] -.sym 16960 i_ss_SB_LUT4_I3_O -.sym 16961 i_sck$SB_IO_IN_$glb_clk -.sym 16967 rx_09_fifo.rd_addr_gray[2] -.sym 16968 spi_if_ins.r_tx_data_valid_SB_LUT4_I3_O[2] -.sym 16988 rx_09_fifo.rd_addr_gray[2] -.sym 16990 spi_if_ins.w_rx_data[5] -.sym 16992 spi_if_ins.w_rx_data[2] -.sym 16996 spi_if_ins.w_rx_data[3] -.sym 17004 i_mosi$SB_IO_IN -.sym 17005 spi_if_ins.spi.r_temp_rx_byte[5] -.sym 17006 spi_if_ins.spi.r_rx_done_SB_DFFER_Q_D_SB_LUT4_I3_O -.sym 17011 spi_if_ins.spi.r_temp_rx_byte[1] -.sym 17012 spi_if_ins.spi.r_temp_rx_byte[2] -.sym 17015 spi_if_ins.spi.r_temp_rx_byte[4] -.sym 17016 spi_if_ins.spi.r_temp_rx_byte[3] -.sym 17017 spi_if_ins.spi.r_temp_rx_byte[6] -.sym 17033 spi_if_ins.r_tx_data_valid_SB_LUT4_I3_O[2] -.sym 17037 spi_if_ins.spi.r_temp_rx_byte[6] -.sym 17043 spi_if_ins.spi.r_temp_rx_byte[2] -.sym 17050 spi_if_ins.spi.r_temp_rx_byte[1] -.sym 17055 spi_if_ins.spi.r_temp_rx_byte[3] -.sym 17061 i_mosi$SB_IO_IN -.sym 17070 spi_if_ins.r_tx_data_valid_SB_LUT4_I3_O[2] -.sym 17073 spi_if_ins.spi.r_temp_rx_byte[4] -.sym 17081 spi_if_ins.spi.r_temp_rx_byte[5] -.sym 17083 spi_if_ins.spi.r_rx_done_SB_DFFER_Q_D_SB_LUT4_I3_O -.sym 17084 i_sck$SB_IO_IN_$glb_clk -.sym 17093 spi_if_ins.o_load_cmd_SB_DFFESR_Q_D[2] -.sym 17096 spi_if_ins.o_load_cmd_SB_LUT4_I2_O_SB_LUT4_I3_O_SB_LUT4_I3_2_O -.sym 17103 io_pmod[4]$SB_IO_IN -.sym 17106 i_ss$SB_IO_IN -.sym 17112 w_cs[1] -.sym 17119 $PACKER_VCC_NET -.sym 17127 spi_if_ins.spi.r_rx_byte[7] -.sym 17129 spi_if_ins.spi.r_rx_byte[2] -.sym 17130 spi_if_ins.spi.r_rx_byte[4] -.sym 17131 spi_if_ins.spi.r_rx_byte[0] -.sym 17133 spi_if_ins.spi.r_rx_byte[5] -.sym 17134 spi_if_ins.spi.r_rx_byte[1] -.sym 17136 spi_if_ins.spi.r_rx_byte[3] -.sym 17138 spi_if_ins.spi.r3_rx_done_SB_LUT4_I2_O -.sym 17142 spi_if_ins.spi.r_rx_byte[6] -.sym 17160 spi_if_ins.spi.r_rx_byte[2] -.sym 17169 spi_if_ins.spi.r_rx_byte[6] -.sym 17174 spi_if_ins.spi.r_rx_byte[3] -.sym 17180 spi_if_ins.spi.r_rx_byte[1] -.sym 17184 spi_if_ins.spi.r_rx_byte[7] -.sym 17192 spi_if_ins.spi.r_rx_byte[4] -.sym 17198 spi_if_ins.spi.r_rx_byte[0] -.sym 17203 spi_if_ins.spi.r_rx_byte[5] -.sym 17206 spi_if_ins.spi.r3_rx_done_SB_LUT4_I2_O +.sym 16554 io_smi_data[4]$SB_IO_OUT +.sym 16557 i_smi_a3$SB_IO_IN +.sym 16558 rx_09_fifo.rd_addr_gray_wr[5] +.sym 16559 io_smi_data[5]$SB_IO_OUT +.sym 16560 rx_09_fifo.rd_addr_gray_wr[0] +.sym 16572 spi_if_ins.spi.r_tx_byte_SB_DFFESR_Q_E +.sym 16595 io_pmod_SB_DFFSS_Q_D_SB_LUT4_O_I0_SB_LUT4_O_1_I1_SB_LUT4_O_I0[1] +.sym 16596 io_pmod_SB_DFFSS_Q_D_SB_LUT4_O_I0_SB_LUT4_O_2_I0[0] +.sym 16597 io_pmod_SB_DFFSS_Q_D_SB_LUT4_O_I0_SB_LUT4_O_2_I0[3] +.sym 16600 io_pmod_SB_DFFSS_Q_D_SB_LUT4_O_I0_SB_LUT4_O_2_I0[2] +.sym 16602 rx_09_fifo.rd_addr[3] +.sym 16606 rx_09_fifo.rd_addr_gray_wr[2] +.sym 16608 rx_09_fifo.wr_addr_gray_rd_r[2] +.sym 16609 rx_09_fifo.rd_addr_gray[1] +.sym 16614 rx_09_fifo.rd_addr_gray_wr[1] +.sym 16617 io_pmod_SB_DFFSS_Q_D_SB_LUT4_O_I0_SB_LUT4_O_3_I2[3] +.sym 16635 io_pmod_SB_DFFSS_Q_D_SB_LUT4_O_I0_SB_LUT4_O_3_I2[3] +.sym 16636 rx_09_fifo.rd_addr[3] +.sym 16637 rx_09_fifo.wr_addr_gray_rd_r[2] +.sym 16640 io_pmod_SB_DFFSS_Q_D_SB_LUT4_O_I0_SB_LUT4_O_2_I0[3] +.sym 16641 io_pmod_SB_DFFSS_Q_D_SB_LUT4_O_I0_SB_LUT4_O_2_I0[0] +.sym 16642 io_pmod_SB_DFFSS_Q_D_SB_LUT4_O_I0_SB_LUT4_O_1_I1_SB_LUT4_O_I0[1] +.sym 16643 io_pmod_SB_DFFSS_Q_D_SB_LUT4_O_I0_SB_LUT4_O_2_I0[2] +.sym 16648 rx_09_fifo.rd_addr_gray[1] +.sym 16660 rx_09_fifo.rd_addr_gray_wr[1] +.sym 16666 rx_09_fifo.rd_addr_gray_wr[2] +.sym 16675 lvds_clock_buf +.sym 16681 $io_pmod[2]$iobuf_i +.sym 16682 io_pmod_SB_DFFSS_Q_D_SB_LUT4_O_I0[3] +.sym 16683 io_pmod_SB_DFFSS_Q_D_SB_LUT4_O_I0_SB_LUT4_O_1_I1[0] +.sym 16684 io_pmod_SB_DFFSS_Q_D_SB_LUT4_O_I0_SB_LUT4_O_1_I1_SB_LUT4_O_I2[3] +.sym 16685 io_pmod_SB_DFFSS_Q_D_SB_LUT4_O_I0[1] +.sym 16686 io_pmod_SB_DFFSS_Q_D_SB_LUT4_O_I0_SB_LUT4_O_3_I2[2] +.sym 16688 io_pmod_SB_DFFSS_Q_D_SB_LUT4_O_I0_SB_LUT4_O_1_I1[1] +.sym 16697 $PACKER_VCC_NET +.sym 16698 rx_09_fifo.rd_addr_gray_wr[0] +.sym 16710 rx_09_fifo.full_o_SB_LUT4_I3_O[0] +.sym 16724 io_pmod_SB_DFFSS_Q_D_SB_LUT4_O_I0_SB_LUT4_O_2_I0[3] +.sym 16731 rx_09_fifo.rd_addr_gray[5] +.sym 16737 io_pmod_SB_DFFSS_Q_D_SB_LUT4_O_I0_SB_LUT4_O_3_I2[3] +.sym 16759 rx_09_fifo.rd_addr_gray_SB_LUT4_I2_O[1] +.sym 16760 rx_09_fifo.wr_addr_gray_rd_r[5] +.sym 16762 rx_09_fifo.wr_addr_gray_rd_r[0] +.sym 16767 io_pmod_SB_DFFSS_Q_D_SB_LUT4_O_I0_SB_LUT4_O_I2[2] +.sym 16768 rx_09_fifo.rd_addr_gray_SB_LUT4_I2_O[2] +.sym 16769 rx_09_fifo.rd_addr_gray_SB_LUT4_I2_O[3] +.sym 16770 io_pmod_SB_DFFSS_Q_D_SB_LUT4_O_I0_SB_LUT4_O_1_I1_SB_LUT4_O_I2[1] +.sym 16772 rx_09_fifo.rd_addr_gray_SB_LUT4_I2_O[6] +.sym 16776 smi_ctrl_ins.r_fifo_09_pull_SB_LUT4_I3_1_O +.sym 16777 rx_09_fifo.rd_addr[0] +.sym 16780 io_pmod_SB_DFFSS_Q_D_SB_LUT4_O_I0_SB_LUT4_O_I2[3] +.sym 16783 io_pmod_SB_DFFSS_Q_D_SB_LUT4_O_I0_SB_LUT4_O_2_I0[3] +.sym 16784 io_pmod_SB_DFFSS_Q_D_SB_LUT4_O_I0_SB_LUT4_O_I0[2] +.sym 16787 rx_09_fifo.wr_addr_gray_rd_r[2] +.sym 16788 io_pmod_SB_DFFSS_Q_D_SB_LUT4_O_I0_SB_LUT4_O_I2[1] +.sym 16791 io_pmod_SB_DFFSS_Q_D_SB_LUT4_O_I0_SB_LUT4_O_I2[3] +.sym 16792 io_pmod_SB_DFFSS_Q_D_SB_LUT4_O_I0_SB_LUT4_O_I0[2] +.sym 16793 io_pmod_SB_DFFSS_Q_D_SB_LUT4_O_I0_SB_LUT4_O_I2[2] +.sym 16794 io_pmod_SB_DFFSS_Q_D_SB_LUT4_O_I0_SB_LUT4_O_I2[1] +.sym 16797 rx_09_fifo.rd_addr_gray_SB_LUT4_I2_O[6] +.sym 16800 rx_09_fifo.wr_addr_gray_rd_r[5] +.sym 16803 rx_09_fifo.wr_addr_gray_rd_r[5] +.sym 16805 io_pmod_SB_DFFSS_Q_D_SB_LUT4_O_I0_SB_LUT4_O_2_I0[3] +.sym 16809 rx_09_fifo.rd_addr_gray_SB_LUT4_I2_O[1] +.sym 16811 rx_09_fifo.rd_addr[0] +.sym 16812 rx_09_fifo.wr_addr_gray_rd_r[0] +.sym 16815 rx_09_fifo.rd_addr_gray_SB_LUT4_I2_O[3] +.sym 16816 rx_09_fifo.rd_addr_gray_SB_LUT4_I2_O[2] +.sym 16817 rx_09_fifo.wr_addr_gray_rd_r[2] +.sym 16821 io_pmod_SB_DFFSS_Q_D_SB_LUT4_O_I0_SB_LUT4_O_1_I1_SB_LUT4_O_I2[1] +.sym 16828 rx_09_fifo.rd_addr_gray_SB_LUT4_I2_O[1] +.sym 16830 rx_09_fifo.rd_addr_gray_SB_LUT4_I2_O[2] +.sym 16836 rx_09_fifo.rd_addr_gray_SB_LUT4_I2_O[3] +.sym 16837 smi_ctrl_ins.r_fifo_09_pull_SB_LUT4_I3_1_O +.sym 16838 r_counter[0]_$glb_clk +.sym 16839 i_smi_a1_SB_LUT4_I1_O_SB_LUT4_O_I2_SB_LUT4_I0_O[2]_$glb_sr +.sym 16840 rx_09_fifo.rd_addr_gray[0] +.sym 16841 io_pmod_SB_DFFSS_Q_D_SB_LUT4_O_I0_SB_LUT4_O_2_I0[3] +.sym 16842 io_pmod_SB_DFFSS_Q_D_SB_LUT4_O_I0_SB_LUT4_O_1_I1_SB_LUT4_O_I0[0] +.sym 16843 rx_09_fifo.rd_addr[0] +.sym 16844 rx_09_fifo.rd_addr_gray[5] +.sym 16845 io_pmod_SB_DFFSS_Q_D_SB_LUT4_O_I0_SB_LUT4_O_3_I2[1] +.sym 16846 io_pmod_SB_DFFSS_Q_D_SB_LUT4_O_I0_SB_LUT4_O_I2[1] +.sym 16847 io_pmod_SB_DFFSS_Q_D_SB_LUT4_O_I0_SB_LUT4_O_3_I2[3] +.sym 16853 io_pmod[5]$SB_IO_IN +.sym 16854 io_pmod_SB_DFFSS_Q_D_SB_LUT4_O_I0_SB_LUT4_O_1_I1_SB_LUT4_O_I0[1] +.sym 16864 spi_if_ins.spi.r_tx_bit_count_SB_DFFESR_Q_R +.sym 16894 io_pmod_SB_DFFSS_Q_D_SB_LUT4_O_I0_SB_LUT4_O_2_I0[2] +.sym 16896 rx_09_fifo.rd_addr[3] +.sym 16898 io_pmod_SB_DFFSS_Q_D_SB_LUT4_O_I0_SB_LUT4_O_2_I0[3] +.sym 16902 io_pmod_SB_DFFSS_Q_D_SB_LUT4_O_I0_SB_LUT4_O_3_I2[1] +.sym 16903 io_pmod_SB_DFFSS_Q_D_SB_LUT4_O_I0_SB_LUT4_O_I0[1] +.sym 16908 rx_09_fifo.rd_addr[0] +.sym 16911 io_pmod_SB_DFFSS_Q_D_SB_LUT4_O_I0_SB_LUT4_O_I2[1] +.sym 16912 io_pmod_SB_DFFSS_Q_D_SB_LUT4_O_I0_SB_LUT4_O_3_I2[3] +.sym 16913 $nextpnr_ICESTORM_LC_7$O +.sym 16916 rx_09_fifo.rd_addr[0] +.sym 16919 rx_09_fifo.rd_addr_gray_SB_LUT4_I2_I3[2] +.sym 16922 io_pmod_SB_DFFSS_Q_D_SB_LUT4_O_I0_SB_LUT4_O_3_I2[1] +.sym 16923 rx_09_fifo.rd_addr[0] +.sym 16925 rx_09_fifo.rd_addr_gray_SB_LUT4_I2_I3[3] +.sym 16928 io_pmod_SB_DFFSS_Q_D_SB_LUT4_O_I0_SB_LUT4_O_3_I2[3] +.sym 16929 rx_09_fifo.rd_addr_gray_SB_LUT4_I2_I3[2] +.sym 16931 rx_09_fifo.rd_addr_gray_SB_LUT4_I2_I3[4] +.sym 16933 rx_09_fifo.rd_addr[3] +.sym 16935 rx_09_fifo.rd_addr_gray_SB_LUT4_I2_I3[3] +.sym 16937 rx_09_fifo.rd_addr_gray_SB_LUT4_I2_I3[5] +.sym 16940 io_pmod_SB_DFFSS_Q_D_SB_LUT4_O_I0_SB_LUT4_O_2_I0[2] +.sym 16941 rx_09_fifo.rd_addr_gray_SB_LUT4_I2_I3[4] +.sym 16943 rx_09_fifo.rd_addr_gray_SB_LUT4_I2_I3[6] +.sym 16946 io_pmod_SB_DFFSS_Q_D_SB_LUT4_O_I0_SB_LUT4_O_2_I0[3] +.sym 16947 rx_09_fifo.rd_addr_gray_SB_LUT4_I2_I3[5] +.sym 16949 rx_09_fifo.rd_addr_gray_SB_LUT4_I2_I3[7] +.sym 16951 io_pmod_SB_DFFSS_Q_D_SB_LUT4_O_I0_SB_LUT4_O_I2[1] +.sym 16953 rx_09_fifo.rd_addr_gray_SB_LUT4_I2_I3[6] +.sym 16957 io_pmod_SB_DFFSS_Q_D_SB_LUT4_O_I0_SB_LUT4_O_I0[1] +.sym 16959 rx_09_fifo.rd_addr_gray_SB_LUT4_I2_I3[7] +.sym 16963 rx_09_fifo.wr_addr_gray_rd_r[3] +.sym 16964 spi_if_ins.spi.SCKr_SB_LUT4_I0_O[1] +.sym 16965 spi_if_ins.spi.SCKr[1] +.sym 16966 spi_if_ins.spi.SCKr[0] +.sym 16967 spi_if_ins.spi.o_spi_miso_SB_DFFE_Q_E +.sym 16969 spi_if_ins.spi.r_tx_bit_count_SB_DFFESR_Q_R +.sym 16970 spi_if_ins.spi.SCKr[2] +.sym 16971 $PACKER_VCC_NET +.sym 16976 io_pmod_SB_DFFSS_Q_D_SB_LUT4_O_I0_SB_LUT4_O_I2[1] +.sym 16977 io_pmod_SB_DFFSS_Q_D_SB_LUT4_O_I0_SB_LUT4_O_1_I1_SB_LUT4_O_I0[3] +.sym 16980 $PACKER_VCC_NET +.sym 16981 rx_09_fifo.rd_addr_gray_SB_LUT4_I2_O[2] +.sym 16983 rx_09_fifo.rd_addr_gray_SB_LUT4_I2_O[3] +.sym 16985 io_pmod_SB_DFFSS_Q_D_SB_LUT4_O_I0_SB_LUT4_O_1_I1_SB_LUT4_O_I2[1] +.sym 16989 rx_09_fifo.full_o_SB_LUT4_I3_O[0] +.sym 16993 spi_if_ins.r_tx_byte[0] +.sym 17006 spi_if_ins.spi.r_tx_byte[7] +.sym 17007 spi_if_ins.r_tx_data_valid_SB_LUT4_I3_O[2] +.sym 17008 spi_if_ins.r_tx_data_valid_SB_LUT4_I3_O_SB_LUT4_O_I0_SB_LUT4_O_I3[2] +.sym 17009 spi_if_ins.r_tx_data_valid_SB_LUT4_I3_O_SB_LUT4_O_I0[3] +.sym 17010 spi_if_ins.r_tx_data_valid_SB_LUT4_I3_O_SB_LUT4_O_I0[2] +.sym 17011 spi_if_ins.r_tx_data_valid_SB_LUT4_I3_O_SB_LUT4_O_I0[1] +.sym 17014 $PACKER_VCC_NET +.sym 17017 $PACKER_VCC_NET +.sym 17022 spi_if_ins.spi.o_spi_miso_SB_DFFE_Q_E +.sym 17024 spi_if_ins.spi.r_tx_bit_count_SB_DFFESR_Q_R +.sym 17025 spi_if_ins.spi.r_tx_byte[3] +.sym 17029 spi_if_ins.spi.SCKr_SB_LUT4_I0_O[1] +.sym 17030 spi_if_ins.spi.r_tx_bit_count[2] +.sym 17033 spi_if_ins.r_tx_data_valid_SB_LUT4_I3_O_SB_LUT4_O_I0[3] +.sym 17035 spi_if_ins.r_tx_data_valid_SB_LUT4_I3_O_SB_LUT4_O_I0[0] +.sym 17036 $nextpnr_ICESTORM_LC_15$O +.sym 17039 spi_if_ins.r_tx_data_valid_SB_LUT4_I3_O_SB_LUT4_O_I0_SB_LUT4_O_I3[2] +.sym 17042 spi_if_ins.spi.r_tx_bit_count_SB_DFFESR_Q_D_SB_LUT4_O_I3[2] +.sym 17044 spi_if_ins.r_tx_data_valid_SB_LUT4_I3_O_SB_LUT4_O_I0[3] +.sym 17045 $PACKER_VCC_NET +.sym 17049 $PACKER_VCC_NET +.sym 17050 spi_if_ins.spi.r_tx_bit_count[2] +.sym 17052 spi_if_ins.spi.r_tx_bit_count_SB_DFFESR_Q_D_SB_LUT4_O_I3[2] +.sym 17055 spi_if_ins.r_tx_data_valid_SB_LUT4_I3_O_SB_LUT4_O_I0[3] +.sym 17056 spi_if_ins.r_tx_data_valid_SB_LUT4_I3_O_SB_LUT4_O_I0[0] +.sym 17057 spi_if_ins.r_tx_data_valid_SB_LUT4_I3_O_SB_LUT4_O_I0[1] +.sym 17058 spi_if_ins.r_tx_data_valid_SB_LUT4_I3_O_SB_LUT4_O_I0[2] +.sym 17061 spi_if_ins.r_tx_data_valid_SB_LUT4_I3_O_SB_LUT4_O_I0_SB_LUT4_O_I3[2] +.sym 17067 $PACKER_VCC_NET +.sym 17069 spi_if_ins.r_tx_data_valid_SB_LUT4_I3_O_SB_LUT4_O_I0[3] +.sym 17070 spi_if_ins.r_tx_data_valid_SB_LUT4_I3_O_SB_LUT4_O_I0_SB_LUT4_O_I3[2] +.sym 17073 spi_if_ins.spi.SCKr_SB_LUT4_I0_O[1] +.sym 17075 spi_if_ins.r_tx_data_valid_SB_LUT4_I3_O_SB_LUT4_O_I0[3] +.sym 17076 spi_if_ins.r_tx_data_valid_SB_LUT4_I3_O[2] +.sym 17079 spi_if_ins.spi.r_tx_byte[3] +.sym 17080 spi_if_ins.spi.r_tx_byte[7] +.sym 17081 spi_if_ins.spi.r_tx_bit_count[2] +.sym 17082 spi_if_ins.r_tx_data_valid_SB_LUT4_I3_O_SB_LUT4_O_I0_SB_LUT4_O_I3[2] +.sym 17083 spi_if_ins.spi.o_spi_miso_SB_DFFE_Q_E +.sym 17084 r_counter[0]_$glb_clk +.sym 17085 spi_if_ins.spi.r_tx_bit_count_SB_DFFESR_Q_R +.sym 17087 smi_ctrl_ins.int_cnt_24[5] +.sym 17099 i_ss$SB_IO_IN +.sym 17100 $PACKER_VCC_NET +.sym 17101 spi_if_ins.r_tx_data_valid_SB_LUT4_I3_O[2] +.sym 17105 $PACKER_VCC_NET +.sym 17106 spi_if_ins.r_tx_data_valid_SB_LUT4_I3_O[1] +.sym 17109 i_sck$SB_IO_IN +.sym 17113 w_smi_read_req +.sym 17114 i_smi_a2_SB_LUT4_I1_O_SB_LUT4_I3_1_I2[2] +.sym 17121 i_smi_soe_se$rename$0 +.sym 17128 spi_if_ins.r_tx_byte[7] +.sym 17130 spi_if_ins.r_tx_byte[1] +.sym 17131 spi_if_ins.r_tx_data_valid_SB_LUT4_I3_O[2] +.sym 17132 spi_if_ins.r_tx_data_valid_SB_LUT4_I3_O_SB_LUT4_O_I0_SB_LUT4_O_I3[0] +.sym 17136 spi_if_ins.spi.r_tx_byte[1] +.sym 17137 spi_if_ins.spi.r_tx_bit_count[2] +.sym 17138 spi_if_ins.spi.r_tx_byte[5] +.sym 17139 spi_if_ins.r_tx_data_valid_SB_LUT4_I3_O_SB_LUT4_O_I0_SB_LUT4_O_I3[2] +.sym 17140 spi_if_ins.r_tx_byte[2] +.sym 17142 spi_if_ins.r_tx_byte[5] +.sym 17143 spi_if_ins.spi.r_tx_byte[2] +.sym 17145 spi_if_ins.r_tx_data_valid_SB_LUT4_I3_O_SB_LUT4_O_I0_SB_LUT4_O_I3[1] +.sym 17147 spi_if_ins.r_tx_data_valid_SB_LUT4_I3_O_SB_LUT4_O_I0_SB_LUT4_O_I3[3] +.sym 17153 spi_if_ins.r_tx_byte[0] +.sym 17154 spi_if_ins.spi.r_tx_byte_SB_DFFESR_Q_E +.sym 17156 spi_if_ins.spi.r_tx_byte[6] +.sym 17160 spi_if_ins.r_tx_byte[2] +.sym 17166 spi_if_ins.r_tx_byte[1] +.sym 17173 spi_if_ins.r_tx_byte[7] +.sym 17179 spi_if_ins.r_tx_byte[5] +.sym 17184 spi_if_ins.spi.r_tx_byte[5] +.sym 17185 spi_if_ins.r_tx_data_valid_SB_LUT4_I3_O_SB_LUT4_O_I0_SB_LUT4_O_I3[2] +.sym 17186 spi_if_ins.spi.r_tx_byte[1] +.sym 17187 spi_if_ins.spi.r_tx_bit_count[2] +.sym 17190 spi_if_ins.r_tx_byte[0] +.sym 17196 spi_if_ins.r_tx_data_valid_SB_LUT4_I3_O_SB_LUT4_O_I0_SB_LUT4_O_I3[1] +.sym 17197 spi_if_ins.r_tx_data_valid_SB_LUT4_I3_O_SB_LUT4_O_I0_SB_LUT4_O_I3[0] +.sym 17198 spi_if_ins.r_tx_data_valid_SB_LUT4_I3_O_SB_LUT4_O_I0_SB_LUT4_O_I3[3] +.sym 17199 spi_if_ins.r_tx_data_valid_SB_LUT4_I3_O_SB_LUT4_O_I0_SB_LUT4_O_I3[2] +.sym 17202 spi_if_ins.r_tx_data_valid_SB_LUT4_I3_O_SB_LUT4_O_I0_SB_LUT4_O_I3[2] +.sym 17203 spi_if_ins.spi.r_tx_byte[6] +.sym 17204 spi_if_ins.spi.r_tx_bit_count[2] +.sym 17205 spi_if_ins.spi.r_tx_byte[2] +.sym 17206 spi_if_ins.spi.r_tx_byte_SB_DFFESR_Q_E .sym 17207 r_counter[0]_$glb_clk -.sym 17212 int_miso -.sym 17225 spi_if_ins.w_rx_data[6] -.sym 17226 spi_if_ins.o_load_cmd_SB_DFFESR_Q_D[2] -.sym 17233 spi_if_ins.r_tx_data_valid -.sym 17238 spi_if_ins.state_if_SB_DFFESR_Q_1_D[1] -.sym 17243 spi_if_ins.o_load_cmd_SB_DFFESR_Q_D[2] -.sym 17252 w_tx_data_io[5] -.sym 17254 spi_if_ins.o_cs_SB_LUT4_I2_2_O[1] -.sym 17255 w_tx_data_io[6] -.sym 17261 spi_if_ins.o_cs_SB_LUT4_I3_1_O -.sym 17269 spi_if_ins.o_cs_SB_LUT4_I2_2_O[2] -.sym 17281 smi_ctrl_ins.o_data_out_SB_LUT4_I1_O[0] -.sym 17283 w_tx_data_io[5] -.sym 17285 smi_ctrl_ins.o_data_out_SB_LUT4_I1_O[0] -.sym 17286 spi_if_ins.o_cs_SB_LUT4_I2_2_O[2] -.sym 17301 w_tx_data_io[6] -.sym 17302 smi_ctrl_ins.o_data_out_SB_LUT4_I1_O[0] -.sym 17329 spi_if_ins.o_cs_SB_LUT4_I3_1_O -.sym 17330 i_glob_clock$SB_IO_IN_$glb_clk -.sym 17331 spi_if_ins.o_cs_SB_LUT4_I2_2_O[1] -.sym 17334 spi_if_ins.state_if_SB_DFFESR_Q_D_SB_LUT4_I1_O[1] -.sym 17336 $PACKER_VCC_NET -.sym 17338 spi_if_ins.r_tx_data_valid -.sym 17344 spi_if_ins.spi.o_spi_miso_SB_DFFE_Q_D_SB_LUT4_O_I2[1] -.sym 17346 lvds_rx_09_inst.r_state_if_SB_LUT4_I2_O[0] -.sym 17347 spi_if_ins.r_tx_byte[7] -.sym 17350 io_pmod[7]$SB_IO_IN -.sym 17353 spi_if_ins.spi.o_spi_miso_SB_DFFE_Q_E -.sym 17357 spi_if_ins.state_if_SB_DFFESR_Q_1_D[1] -.sym 17358 w_cs[0] -.sym 17363 spi_if_ins.r_tx_data_valid_SB_DFFESR_Q_D_SB_LUT4_I3_O -.sym 17364 w_rx_data[6] -.sym 17366 spi_if_ins.w_rx_data[4] -.sym 17367 spi_if_ins.w_rx_data[1] -.sym 17375 spi_if_ins.w_rx_data[6] -.sym 17377 spi_if_ins.o_cs_SB_DFFESR_Q_R[0] -.sym 17379 spi_if_ins.w_rx_data[5] -.sym 17391 spi_if_ins.state_if_SB_DFFESR_Q_D_SB_LUT4_I1_O[1] -.sym 17401 spi_if_ins.o_data_in_SB_DFFE_Q_E -.sym 17413 spi_if_ins.w_rx_data[6] -.sym 17415 spi_if_ins.w_rx_data[5] -.sym 17419 spi_if_ins.o_data_in_SB_DFFE_Q_E -.sym 17430 spi_if_ins.w_rx_data[5] -.sym 17432 spi_if_ins.w_rx_data[6] -.sym 17437 spi_if_ins.w_rx_data[5] -.sym 17439 spi_if_ins.w_rx_data[6] -.sym 17452 spi_if_ins.state_if_SB_DFFESR_Q_D_SB_LUT4_I1_O[1] +.sym 17208 spi_if_ins.r_tx_data_valid_SB_LUT4_I3_O[2] +.sym 17211 spi_if_ins.spi.r_rx_bit_count[2] +.sym 17212 spi_if_ins.spi.r_rx_bit_count[0] +.sym 17214 spi_if_ins.spi.r_rx_bit_count[1] +.sym 17222 $PACKER_VCC_NET +.sym 17224 $io_pmod[4]$iobuf_i +.sym 17227 spi_if_ins.r_tx_data_valid_SB_LUT4_I3_O[2] +.sym 17231 $PACKER_VCC_NET +.sym 17238 smi_ctrl_ins.r_fifo_24_pull_SB_LUT4_I1_O[2] +.sym 17239 spi_if_ins.w_rx_data[6] +.sym 17240 i_mosi$SB_IO_IN +.sym 17242 spi_if_ins.spi.r_tx_byte[6] +.sym 17252 sys_ctrl_ins.reset_count[2] +.sym 17254 sys_ctrl_ins.reset_cmd +.sym 17255 sys_ctrl_ins.o_soft_reset_SB_DFFESS_Q_S +.sym 17259 sys_ctrl_ins.reset_cmd +.sym 17261 sys_ctrl_ins.reset_count[3] +.sym 17262 sys_ctrl_ins.reset_count[1] +.sym 17263 sys_ctrl_ins.o_soft_reset_SB_DFFESS_Q_S +.sym 17268 sys_ctrl_ins.reset_count_SB_DFFESR_Q_E +.sym 17272 sys_ctrl_ins.reset_count[0] +.sym 17280 sys_ctrl_ins.reset_count[0] +.sym 17282 $nextpnr_ICESTORM_LC_16$O +.sym 17284 sys_ctrl_ins.reset_count[0] +.sym 17288 sys_ctrl_ins.reset_count_SB_DFFESR_Q_D_SB_LUT4_O_I3[2] +.sym 17291 sys_ctrl_ins.reset_count[1] +.sym 17294 sys_ctrl_ins.reset_count_SB_DFFESR_Q_D_SB_LUT4_O_I3[3] +.sym 17295 sys_ctrl_ins.o_soft_reset_SB_DFFESS_Q_S +.sym 17297 sys_ctrl_ins.reset_count[2] +.sym 17298 sys_ctrl_ins.reset_count_SB_DFFESR_Q_D_SB_LUT4_O_I3[2] +.sym 17301 sys_ctrl_ins.o_soft_reset_SB_DFFESS_Q_S +.sym 17302 sys_ctrl_ins.reset_count[3] +.sym 17304 sys_ctrl_ins.reset_count_SB_DFFESR_Q_D_SB_LUT4_O_I3[3] +.sym 17308 sys_ctrl_ins.o_soft_reset_SB_DFFESS_Q_S +.sym 17309 sys_ctrl_ins.reset_count[0] +.sym 17310 sys_ctrl_ins.reset_count[1] +.sym 17313 sys_ctrl_ins.reset_count[1] +.sym 17314 sys_ctrl_ins.reset_count[3] +.sym 17315 sys_ctrl_ins.reset_count[0] +.sym 17316 sys_ctrl_ins.reset_count[2] +.sym 17319 sys_ctrl_ins.reset_count[0] +.sym 17327 sys_ctrl_ins.o_soft_reset_SB_DFFESS_Q_S +.sym 17328 sys_ctrl_ins.reset_cmd +.sym 17329 sys_ctrl_ins.reset_count_SB_DFFESR_Q_E +.sym 17330 r_counter[0]_$glb_clk +.sym 17331 sys_ctrl_ins.reset_cmd +.sym 17333 spi_if_ins.w_rx_data[6] +.sym 17334 sys_ctrl_ins.reset_count_SB_DFFESR_Q_E +.sym 17335 spi_if_ins.spi.r_rx_done_SB_DFFER_Q_D[1] +.sym 17339 spi_if_ins.spi.r_rx_done_SB_DFFER_Q_E +.sym 17345 i_ss$SB_IO_IN +.sym 17355 sys_ctrl_ins.reset_cmd +.sym 17358 spi_if_ins.spi.r_rx_done_SB_DFFER_Q_D_SB_LUT4_I3_O +.sym 17365 w_tx_data_io[3] +.sym 17378 spi_if_ins.r_tx_byte[3] +.sym 17383 spi_if_ins.r_tx_byte[6] +.sym 17384 spi_if_ins.spi.r_tx_byte_SB_DFFESR_Q_E +.sym 17394 spi_if_ins.r_tx_byte[4] +.sym 17402 spi_if_ins.r_tx_data_valid_SB_LUT4_I3_O[2] +.sym 17409 spi_if_ins.r_tx_byte[3] +.sym 17419 spi_if_ins.r_tx_byte[6] +.sym 17436 spi_if_ins.r_tx_byte[4] +.sym 17452 spi_if_ins.spi.r_tx_byte_SB_DFFESR_Q_E .sym 17453 r_counter[0]_$glb_clk -.sym 17454 spi_if_ins.o_cs_SB_DFFESR_Q_R[0] -.sym 17455 spi_if_ins.state_if_SB_DFFESR_Q_1_D[2] -.sym 17457 w_rx_data[6] -.sym 17458 spi_if_ins.state_if_SB_DFFESR_Q_D_SB_LUT4_I1_O[2] -.sym 17459 spi_if_ins.o_data_in_SB_DFFE_Q_E -.sym 17460 spi_if_ins.r_tx_data_valid_SB_DFFESR_Q_E -.sym 17461 spi_if_ins.r_tx_data_valid_SB_DFFESR_Q_D[1] -.sym 17462 spi_if_ins.o_fetch_cmd_SB_DFFESR_Q_E -.sym 17467 w_tx_data_io[6] -.sym 17471 w_cs[1] -.sym 17477 spi_if_ins.o_cs_SB_LUT4_I2_2_O[1] -.sym 17479 w_rx_data[7] -.sym 17480 w_ioc[0] -.sym 17482 spi_if_ins.w_rx_data[5] -.sym 17483 $PACKER_VCC_NET -.sym 17484 spi_if_ins.w_rx_data[3] -.sym 17485 spi_if_ins.w_rx_data[2] -.sym 17486 w_cs[3] -.sym 17487 w_rx_data[0] -.sym 17489 w_rx_data[4] -.sym 17490 w_ioc[2] -.sym 17499 spi_if_ins.w_rx_data[5] -.sym 17500 w_cs[2] -.sym 17501 spi_if_ins.w_rx_data[6] -.sym 17503 w_ioc[1] -.sym 17507 spi_if_ins.o_fetch_cmd_SB_DFFESR_Q_E -.sym 17509 w_fetch -.sym 17511 spi_if_ins.o_load_cmd_SB_DFFESR_Q_D[1] -.sym 17515 spi_if_ins.o_load_cmd_SB_DFFESR_Q_D[2] -.sym 17516 spi_if_ins.state_if_SB_DFFESR_Q_1_R -.sym 17517 i_smi_a1_SB_LUT4_I1_O[2] -.sym 17518 spi_if_ins.r_tx_data_valid_SB_DFFESR_Q_D[1] -.sym 17520 spi_if_ins.o_load_cmd_SB_DFFESR_Q_D[0] -.sym 17524 spi_if_ins.o_data_in_SB_DFFE_Q_E -.sym 17529 w_fetch -.sym 17530 w_ioc[1] -.sym 17531 w_cs[2] -.sym 17532 i_smi_a1_SB_LUT4_I1_O[2] -.sym 17535 spi_if_ins.o_load_cmd_SB_DFFESR_Q_D[2] -.sym 17538 spi_if_ins.r_tx_data_valid_SB_DFFESR_Q_D[1] -.sym 17544 spi_if_ins.o_data_in_SB_DFFE_Q_E -.sym 17554 spi_if_ins.w_rx_data[6] -.sym 17556 spi_if_ins.w_rx_data[5] -.sym 17561 spi_if_ins.o_load_cmd_SB_DFFESR_Q_D[0] -.sym 17562 spi_if_ins.o_load_cmd_SB_DFFESR_Q_D[1] -.sym 17565 spi_if_ins.o_load_cmd_SB_DFFESR_Q_D[1] -.sym 17566 spi_if_ins.o_load_cmd_SB_DFFESR_Q_D[0] -.sym 17568 spi_if_ins.o_load_cmd_SB_DFFESR_Q_D[2] -.sym 17575 spi_if_ins.o_fetch_cmd_SB_DFFESR_Q_E -.sym 17576 r_counter[0]_$glb_clk -.sym 17577 spi_if_ins.state_if_SB_DFFESR_Q_1_R -.sym 17578 w_rx_data[1] -.sym 17579 w_rx_data[5] -.sym 17580 w_rx_data[0] -.sym 17581 w_rx_data[4] -.sym 17583 w_rx_data[3] -.sym 17584 w_rx_data[7] -.sym 17585 w_rx_data[2] -.sym 17592 w_fetch -.sym 17595 spi_if_ins.o_fetch_cmd_SB_DFFESR_Q_E -.sym 17597 spi_if_ins.state_if[0] -.sym 17599 spi_if_ins.o_load_cmd_SB_DFFESR_Q_D[1] -.sym 17602 w_rx_data[6] -.sym 17606 w_ioc[0] -.sym 17607 w_rx_data[7] -.sym 17609 w_rx_data[2] -.sym 17611 w_rx_data[1] -.sym 17612 w_cs[1] -.sym 17613 w_rx_data[5] -.sym 17619 w_ioc[4] -.sym 17621 w_cs[1] -.sym 17623 spi_if_ins.o_cs_SB_DFFESR_Q_R[0] -.sym 17624 w_ioc[3] -.sym 17627 w_cs[2] -.sym 17628 w_cs[0] -.sym 17629 w_cs[3] -.sym 17630 w_ioc[2] -.sym 17633 spi_if_ins.w_rx_data[1] -.sym 17637 spi_if_ins.w_rx_data[4] -.sym 17644 spi_if_ins.w_rx_data[3] -.sym 17645 spi_if_ins.w_rx_data[2] -.sym 17646 spi_if_ins.state_if_SB_DFFESR_Q_D_SB_LUT4_I1_O[1] -.sym 17647 spi_if_ins.w_rx_data[0] -.sym 17654 spi_if_ins.w_rx_data[4] -.sym 17661 spi_if_ins.o_cs_SB_DFFESR_Q_R[0] -.sym 17664 w_ioc[4] -.sym 17665 w_ioc[3] -.sym 17666 w_ioc[2] -.sym 17670 spi_if_ins.w_rx_data[2] -.sym 17676 w_cs[0] -.sym 17677 w_cs[2] -.sym 17678 w_cs[1] -.sym 17679 w_cs[3] -.sym 17683 spi_if_ins.w_rx_data[3] -.sym 17691 spi_if_ins.w_rx_data[0] -.sym 17696 spi_if_ins.w_rx_data[1] -.sym 17698 spi_if_ins.state_if_SB_DFFESR_Q_D_SB_LUT4_I1_O[1] -.sym 17699 r_counter[0]_$glb_clk -.sym 17702 io_ctrl_ins.pmod_dir_state[5] -.sym 17703 io_ctrl_ins.pmod_dir_state[6] -.sym 17704 spi_if_ins.state_if_SB_DFFE_Q_E -.sym 17705 io_ctrl_ins.pmod_dir_state[7] -.sym 17706 io_ctrl_ins.rx_h_b_state_SB_LUT4_I1_O[0] -.sym 17722 w_rx_data[5] -.sym 17724 w_rx_data[0] +.sym 17454 spi_if_ins.r_tx_data_valid_SB_LUT4_I3_O[2] +.sym 17455 spi_if_ins.spi.r_temp_rx_byte[0] +.sym 17456 spi_if_ins.spi.r_temp_rx_byte[4] +.sym 17457 spi_if_ins.spi.r_temp_rx_byte[5] +.sym 17458 spi_if_ins.spi.r_temp_rx_byte[1] +.sym 17459 spi_if_ins.spi.r_temp_rx_byte[3] +.sym 17460 spi_if_ins.spi.r_temp_rx_byte[2] +.sym 17461 spi_if_ins.spi.r_temp_rx_byte[6] +.sym 17462 spi_if_ins.spi.r_rx_done_SB_DFFER_Q_D_SB_LUT4_I3_O +.sym 17467 i_smi_soe_se$rename$0 +.sym 17471 spi_if_ins.r_tx_byte[6] +.sym 17472 spi_if_ins.spi.r_tx_byte_SB_DFFESR_Q_E +.sym 17476 spi_if_ins.spi.r3_rx_done_SB_LUT4_I2_O +.sym 17490 w_tx_data_io[1] +.sym 17497 i_ss$SB_IO_IN +.sym 17505 io_pmod[2]$SB_IO_IN +.sym 17507 spi_if_ins.spi.r_rx_done_SB_DFFER_Q_D_SB_LUT4_I3_O +.sym 17514 spi_if_ins.spi.r_temp_rx_byte[5] +.sym 17522 spi_if_ins.r_tx_data_valid +.sym 17525 w_rx_24_fifo_empty +.sym 17536 spi_if_ins.spi.r_temp_rx_byte[5] +.sym 17547 spi_if_ins.r_tx_data_valid +.sym 17549 i_ss$SB_IO_IN +.sym 17560 w_rx_24_fifo_empty +.sym 17562 io_pmod[2]$SB_IO_IN +.sym 17575 spi_if_ins.spi.r_rx_done_SB_DFFER_Q_D_SB_LUT4_I3_O +.sym 17576 i_sck$SB_IO_IN_$glb_clk +.sym 17578 spi_if_ins.spi.r_rx_byte[0] +.sym 17579 spi_if_ins.spi.r_rx_byte[4] +.sym 17580 spi_if_ins.spi.r_rx_byte[2] +.sym 17582 spi_if_ins.spi.r_rx_byte[7] +.sym 17583 spi_if_ins.spi.r_rx_byte[1] +.sym 17584 spi_if_ins.spi.r_rx_byte[3] +.sym 17585 spi_if_ins.spi.r_rx_byte[5] +.sym 17592 w_smi_read_req +.sym 17595 spi_if_ins.spi.r_rx_done_SB_DFFER_Q_D_SB_LUT4_I3_O +.sym 17598 i_ss$SB_IO_IN +.sym 17601 io_pmod[2]$SB_IO_IN +.sym 17602 io_ctrl_ins.ldo2v8_state_SB_LUT4_I3_O[0] +.sym 17605 spi_if_ins.r_tx_data_valid_SB_LUT4_I3_O[2] +.sym 17608 spi_if_ins.spi.r3_rx_done_SB_LUT4_I2_O +.sym 17609 w_smi_read_req +.sym 17610 io_ctrl_ins.o_data_out_SB_DFFESR_Q_6_R[0] +.sym 17611 w_rx_24_fifo_empty +.sym 17612 w_tx_data_io[2] +.sym 17613 io_pmod[2]$SB_IO_IN +.sym 17619 w_tx_data_io[2] +.sym 17623 w_tx_data_io[7] +.sym 17624 spi_if_ins.o_cs_SB_LUT4_I2_2_O[2] +.sym 17625 w_tx_data_io[5] +.sym 17628 spi_if_ins.o_cs_SB_LUT4_I2_1_O[1] +.sym 17630 spi_if_ins.o_cs_SB_LUT4_I3_1_O +.sym 17631 smi_ctrl_ins.o_data_out_SB_LUT4_I1_O[0] +.sym 17632 spi_if_ins.o_cs_SB_LUT4_I2_2_O[1] +.sym 17633 w_tx_data_smi[1] +.sym 17635 w_tx_data_io[3] +.sym 17640 w_tx_data_io[6] +.sym 17645 smi_ctrl_ins.o_data_out_SB_LUT4_I1_O[2] +.sym 17646 spi_if_ins.w_rx_data[5] +.sym 17647 w_tx_data_smi[3] +.sym 17649 w_tx_data_io[4] +.sym 17650 w_tx_data_io[1] +.sym 17653 spi_if_ins.o_cs_SB_LUT4_I2_2_O[2] +.sym 17654 w_tx_data_io[7] +.sym 17655 smi_ctrl_ins.o_data_out_SB_LUT4_I1_O[0] +.sym 17658 w_tx_data_smi[1] +.sym 17659 spi_if_ins.o_cs_SB_LUT4_I2_1_O[1] +.sym 17660 smi_ctrl_ins.o_data_out_SB_LUT4_I1_O[0] +.sym 17661 w_tx_data_io[1] +.sym 17665 smi_ctrl_ins.o_data_out_SB_LUT4_I1_O[0] +.sym 17667 w_tx_data_io[4] +.sym 17670 smi_ctrl_ins.o_data_out_SB_LUT4_I1_O[0] +.sym 17671 w_tx_data_io[2] +.sym 17672 smi_ctrl_ins.o_data_out_SB_LUT4_I1_O[2] +.sym 17677 spi_if_ins.o_cs_SB_LUT4_I2_2_O[2] +.sym 17678 w_tx_data_io[5] +.sym 17679 smi_ctrl_ins.o_data_out_SB_LUT4_I1_O[0] +.sym 17685 spi_if_ins.w_rx_data[5] +.sym 17689 smi_ctrl_ins.o_data_out_SB_LUT4_I1_O[0] +.sym 17691 w_tx_data_io[6] +.sym 17694 smi_ctrl_ins.o_data_out_SB_LUT4_I1_O[0] +.sym 17695 w_tx_data_io[3] +.sym 17696 w_tx_data_smi[3] +.sym 17697 spi_if_ins.o_cs_SB_LUT4_I2_1_O[1] +.sym 17698 spi_if_ins.o_cs_SB_LUT4_I3_1_O +.sym 17699 i_glob_clock$SB_IO_IN_$glb_clk +.sym 17700 spi_if_ins.o_cs_SB_LUT4_I2_2_O[1] +.sym 17701 spi_if_ins.w_rx_data[3] +.sym 17702 spi_if_ins.w_rx_data[0] +.sym 17703 spi_if_ins.w_rx_data[4] +.sym 17704 spi_if_ins.w_rx_data[5] +.sym 17706 spi_if_ins.w_rx_data[1] +.sym 17707 spi_if_ins.w_rx_data[2] +.sym 17708 spi_if_ins.o_load_cmd_SB_DFFESR_Q_D_SB_LUT4_I1_O[0] +.sym 17716 $PACKER_VCC_NET .sym 17725 w_rx_data[0] -.sym 17726 spi_if_ins.state_if_SB_DFFESR_Q_1_D[1] -.sym 17727 w_rx_data[4] -.sym 17728 spi_if_ins.o_load_cmd_SB_DFFESR_Q_D[1] -.sym 17729 spi_if_ins.state_if_SB_DFFESR_Q_1_R -.sym 17730 spi_if_ins.o_cs_SB_LUT4_I3_1_O -.sym 17731 w_rx_data[3] -.sym 17732 spi_if_ins.state_if_SB_DFFESR_Q_1_D[2] -.sym 17733 io_ctrl_ins.led0_state_SB_LUT4_I3_I0[0] -.sym 17735 io_ctrl_ins.led0_state_SB_LUT4_I3_O[1] -.sym 17736 io_ctrl_ins.pmod_dir_state[5] -.sym 17744 io_ctrl_ins.i_cs_SB_LUT4_I3_I0[1] -.sym 17745 w_rx_data[4] -.sym 17747 w_rx_data[3] -.sym 17748 w_ioc[0] -.sym 17749 w_ioc[1] -.sym 17750 w_rx_data[1] -.sym 17751 w_cs[0] -.sym 17752 io_ctrl_ins.i_cs_SB_LUT4_I3_I0[0] -.sym 17755 w_cs[2] -.sym 17756 w_cs[3] -.sym 17757 w_rx_data[2] -.sym 17759 w_rx_data[0] -.sym 17760 spi_if_ins.o_load_cmd_SB_LUT4_I2_O_SB_LUT4_I3_O_SB_LUT4_I3_O -.sym 17772 w_cs[1] -.sym 17776 w_ioc[1] -.sym 17777 io_ctrl_ins.i_cs_SB_LUT4_I3_I0[1] -.sym 17778 io_ctrl_ins.i_cs_SB_LUT4_I3_I0[0] -.sym 17782 io_ctrl_ins.i_cs_SB_LUT4_I3_I0[1] -.sym 17783 w_ioc[1] -.sym 17784 w_ioc[0] -.sym 17790 w_rx_data[0] -.sym 17793 w_rx_data[3] -.sym 17802 w_rx_data[4] -.sym 17808 w_rx_data[2] -.sym 17814 w_rx_data[1] -.sym 17817 w_cs[1] -.sym 17818 w_cs[2] -.sym 17819 w_cs[3] -.sym 17820 w_cs[0] -.sym 17821 spi_if_ins.o_load_cmd_SB_LUT4_I2_O_SB_LUT4_I3_O_SB_LUT4_I3_O +.sym 17726 w_tx_data_io[6] +.sym 17727 spi_if_ins.w_rx_data[6] +.sym 17728 io_ctrl_ins.pmod_dir_state[7] +.sym 17732 spi_if_ins.o_load_cmd_SB_DFFESR_Q_D_SB_LUT4_I1_O[0] +.sym 17748 r_tx_data[6] +.sym 17752 r_tx_data[4] +.sym 17753 spi_if_ins.r_tx_data_valid_SB_DFFESR_Q_D_SB_LUT4_I3_O +.sym 17778 r_tx_data[4] +.sym 17789 r_tx_data[6] +.sym 17821 spi_if_ins.r_tx_data_valid_SB_DFFESR_Q_D_SB_LUT4_I3_O .sym 17822 r_counter[0]_$glb_clk -.sym 17824 spi_if_ins.state_if_SB_DFFESR_Q_1_R -.sym 17825 spi_if_ins.state_if_SB_DFFESR_Q_1_D[0] -.sym 17826 spi_if_ins.o_load_cmd_SB_LUT4_I2_O_SB_LUT4_I3_O_SB_LUT4_I3_O -.sym 17827 spi_if_ins.o_load_cmd_SB_DFFESR_Q_E -.sym 17828 i_button_SB_LUT4_I3_O[0] -.sym 17829 i_button_SB_LUT4_I3_O[1] -.sym 17830 io_ctrl_ins.tr_vc_1_state_SB_LUT4_I0_O[0] -.sym 17831 spi_if_ins.state_if[1] -.sym 17836 io_ctrl_ins.led0_state_SB_LUT4_I3_I0[1] -.sym 17839 spi_if_ins.state_if_SB_DFFE_Q_E -.sym 17843 i_config[3]$SB_IO_IN -.sym 17846 spi_if_ins.o_load_cmd_SB_DFFESR_Q_D[1] -.sym 17849 i_config[2]$SB_IO_IN -.sym 17850 spi_if_ins.o_load_cmd_SB_LUT4_I2_O_SB_LUT4_I3_O_SB_LUT4_I3_1_O -.sym 17855 w_cs[0] -.sym 17856 w_rx_data[6] -.sym 17859 w_rx_data[3] -.sym 17867 i_button_SB_LUT4_I3_I1[1] -.sym 17869 io_ctrl_ins.i_cs_SB_LUT4_I3_I0[1] -.sym 17870 i_button_SB_LUT4_I3_I1[2] -.sym 17876 spi_if_ins.o_load_cmd_SB_LUT4_I2_O_SB_LUT4_I3_O_SB_LUT4_I3_1_O -.sym 17877 w_rx_data[7] -.sym 17878 w_ioc[0] -.sym 17879 w_ioc[1] -.sym 17881 w_rx_data[1] -.sym 17882 i_config[0]$SB_IO_IN -.sym 17883 w_rx_data[5] -.sym 17885 w_rx_data[0] -.sym 17887 w_rx_data[4] -.sym 17891 w_rx_data[3] -.sym 17892 io_ctrl_ins.o_pmod[3] -.sym 17898 io_ctrl_ins.o_pmod[3] -.sym 17899 i_config[0]$SB_IO_IN -.sym 17900 i_button_SB_LUT4_I3_I1[1] -.sym 17901 i_button_SB_LUT4_I3_I1[2] -.sym 17905 w_rx_data[5] -.sym 17913 w_rx_data[7] -.sym 17916 w_rx_data[3] -.sym 17924 w_rx_data[0] -.sym 17928 w_ioc[1] -.sym 17929 w_ioc[0] -.sym 17931 io_ctrl_ins.i_cs_SB_LUT4_I3_I0[1] -.sym 17936 w_rx_data[1] -.sym 17941 w_rx_data[4] -.sym 17944 spi_if_ins.o_load_cmd_SB_LUT4_I2_O_SB_LUT4_I3_O_SB_LUT4_I3_1_O +.sym 17824 w_rx_data[7] +.sym 17825 w_rx_data[3] +.sym 17826 w_rx_data[1] +.sym 17827 w_rx_data[6] +.sym 17828 w_rx_data[4] +.sym 17829 w_rx_data[2] +.sym 17830 w_rx_data[0] +.sym 17831 w_rx_data[5] +.sym 17839 spi_if_ins.w_rx_data[5] +.sym 17840 io_ctrl_ins.o_data_out_SB_DFFESR_Q_6_R[0] +.sym 17849 w_rx_data[4] +.sym 17852 w_tx_data_io[3] +.sym 17855 w_rx_data[5] +.sym 17857 w_rx_data[7] +.sym 17858 io_ctrl_ins.pmod_dir_state[1] +.sym 17875 io_ctrl_ins.pmod_state_SB_DFFE_Q_E_SB_LUT4_O_I3[1] +.sym 17883 io_ctrl_ins.pmod_dir_state_SB_DFFE_Q_E +.sym 17884 w_rx_data[6] +.sym 17887 io_ctrl_ins.ldo2v8_state_SB_LUT4_I3_O[1] +.sym 17889 w_rx_data[7] +.sym 17890 w_rx_data[3] +.sym 17891 w_rx_data[1] +.sym 17893 w_rx_data[4] +.sym 17894 w_rx_data[2] +.sym 17895 w_rx_data[0] +.sym 17898 w_rx_data[2] +.sym 17904 w_rx_data[1] +.sym 17912 io_ctrl_ins.ldo2v8_state_SB_LUT4_I3_O[1] +.sym 17913 io_ctrl_ins.pmod_state_SB_DFFE_Q_E_SB_LUT4_O_I3[1] +.sym 17918 w_rx_data[6] +.sym 17925 w_rx_data[0] +.sym 17931 w_rx_data[3] +.sym 17937 w_rx_data[4] +.sym 17942 w_rx_data[7] +.sym 17944 io_ctrl_ins.pmod_dir_state_SB_DFFE_Q_E .sym 17945 r_counter[0]_$glb_clk -.sym 17947 io_ctrl_ins.tr_vc_1_state_SB_LUT4_I0_O[1] -.sym 17949 io_ctrl_ins.rf_mode[2] -.sym 17950 io_ctrl_ins.debug_mode_SB_LUT4_I2_O[1] -.sym 17954 spi_if_ins.o_load_cmd_SB_LUT4_I2_O_SB_LUT4_I3_O_SB_LUT4_I3_1_O -.sym 17960 io_ctrl_ins.tr_vc_1_state_SB_LUT4_I0_O[0] -.sym 17962 w_tx_data_io[5] -.sym 17966 w_tx_data_io[7] -.sym 17967 spi_if_ins.o_cs_SB_LUT4_I3_1_O -.sym 17968 i_button$SB_IO_IN -.sym 17971 w_rx_data[7] -.sym 17972 io_ctrl_ins.mixer_en_state -.sym 17973 w_ioc[0] -.sym 17974 o_tr_vc1_b$SB_IO_OUT -.sym 17978 o_tr_vc1$SB_IO_OUT +.sym 17947 io_ctrl_ins.o_data_out_SB_DFFESR_Q_R +.sym 17948 io_ctrl_ins.rf_pin_state[6] +.sym 17949 io_ctrl_ins.debug_mode_SB_LUT4_I2_O[2] +.sym 17950 io_ctrl_ins.tr_vc_1_b_state_SB_LUT4_I1_O[3] +.sym 17951 io_ctrl_ins.rf_pin_state[0] +.sym 17952 io_ctrl_ins.rf_pin_state[4] +.sym 17953 io_ctrl_ins.rf_pin_state[7] +.sym 17954 io_ctrl_ins.rf_pin_state[3] +.sym 17955 io_ctrl_ins.led0_state_SB_LUT4_I3_O[0] +.sym 17960 w_tx_data_io[4] +.sym 17964 w_rx_data[5] +.sym 17965 io_ctrl_ins.pmod_dir_state_SB_DFFE_Q_E +.sym 17967 io_ctrl_ins.o_data_out_SB_DFFESR_Q_E[3] +.sym 17969 io_ctrl_ins.ldo2v8_state_SB_LUT4_I3_O[1] +.sym 17970 w_rx_data[1] +.sym 17971 w_rx_data[1] +.sym 17973 io_ctrl_ins.o_data_out_SB_DFFESR_Q_6_R[0] +.sym 17974 w_tx_data_io[1] +.sym 17976 io_ctrl_ins.rf_mode[2] +.sym 17977 w_rx_data[2] .sym 17979 w_rx_data[0] -.sym 17980 w_ioc[0] -.sym 17981 w_rx_data[4] -.sym 17988 io_ctrl_ins.mixer_en_state -.sym 17989 w_ioc[0] -.sym 17990 o_tr_vc1_b$SB_IO_OUT -.sym 17991 w_ioc[1] -.sym 17992 io_ctrl_ins.o_pmod[0] -.sym 17996 io_ctrl_ins.pmod_dir_state[4] -.sym 17997 io_ctrl_ins.i_cs_SB_LUT4_I3_I0[1] -.sym 17998 i_button_SB_LUT4_I3_I1[1] -.sym 17999 spi_if_ins.o_load_cmd_SB_DFFESR_Q_E -.sym 18000 spi_if_ins.o_load_cmd_SB_DFFESR_Q_D[0] -.sym 18001 spi_if_ins.state_if_SB_DFFESR_Q_1_R -.sym 18002 io_ctrl_ins.i_cs_SB_LUT4_I3_I0[0] -.sym 18003 io_ctrl_ins.o_pmod[4] -.sym 18006 io_ctrl_ins.rf_mode[2] -.sym 18007 io_ctrl_ins.led0_state_SB_LUT4_I3_O[1] -.sym 18008 io_ctrl_ins.led0_state_SB_LUT4_I3_I0[0] -.sym 18010 w_load -.sym 18014 w_fetch -.sym 18015 w_cs[0] -.sym 18021 io_ctrl_ins.o_pmod[4] -.sym 18022 w_ioc[0] -.sym 18023 o_tr_vc1_b$SB_IO_OUT -.sym 18024 io_ctrl_ins.i_cs_SB_LUT4_I3_I0[0] -.sym 18027 io_ctrl_ins.pmod_dir_state[4] -.sym 18028 io_ctrl_ins.rf_mode[2] -.sym 18029 io_ctrl_ins.led0_state_SB_LUT4_I3_O[1] -.sym 18030 io_ctrl_ins.led0_state_SB_LUT4_I3_I0[0] -.sym 18034 w_ioc[0] -.sym 18036 io_ctrl_ins.i_cs_SB_LUT4_I3_I0[0] -.sym 18039 w_fetch -.sym 18040 w_load -.sym 18041 i_button_SB_LUT4_I3_I1[1] -.sym 18042 w_cs[0] -.sym 18046 w_ioc[0] -.sym 18047 io_ctrl_ins.i_cs_SB_LUT4_I3_I0[1] -.sym 18048 w_ioc[1] -.sym 18051 io_ctrl_ins.i_cs_SB_LUT4_I3_I0[0] -.sym 18053 w_ioc[0] -.sym 18060 spi_if_ins.o_load_cmd_SB_DFFESR_Q_D[0] -.sym 18063 w_ioc[0] -.sym 18064 io_ctrl_ins.mixer_en_state -.sym 18065 io_ctrl_ins.i_cs_SB_LUT4_I3_I0[0] -.sym 18066 io_ctrl_ins.o_pmod[0] -.sym 18067 spi_if_ins.o_load_cmd_SB_DFFESR_Q_E +.sym 17981 io_ctrl_ins.led1_state_SB_LUT4_I0_I2[1] +.sym 17982 io_ctrl_ins.led1_state_SB_LUT4_I0_I2[3] +.sym 17990 i_smi_a1_SB_LUT4_I1_O_SB_LUT4_O_I2_SB_LUT4_I0_O[2] +.sym 17991 w_rx_data[6] +.sym 17994 io_ctrl_ins.pmod_state_SB_DFFE_Q_E_SB_LUT4_O_I3[0] +.sym 17996 io_ctrl_ins.o_pmod[6] +.sym 17999 io_ctrl_ins.pmod_dir_state[6] +.sym 18000 w_rx_data[4] +.sym 18002 io_ctrl_ins.ldo2v8_state_SB_LUT4_I3_O[1] +.sym 18003 spi_if_ins.o_load_cmd_SB_LUT4_I2_O[0] +.sym 18004 io_ctrl_ins.tr_vc_2_state_SB_LUT4_I1_I3[1] +.sym 18005 w_ioc[1] +.sym 18009 spi_if_ins.o_fetch_cmd_SB_LUT4_I3_1_O[0] +.sym 18015 io_ctrl_ins.pmod_state_SB_DFFE_Q_E +.sym 18019 w_ioc[0] +.sym 18024 w_rx_data[6] +.sym 18027 w_ioc[1] +.sym 18029 spi_if_ins.o_fetch_cmd_SB_LUT4_I3_1_O[0] +.sym 18030 w_ioc[0] +.sym 18033 i_smi_a1_SB_LUT4_I1_O_SB_LUT4_O_I2_SB_LUT4_I0_O[2] +.sym 18035 spi_if_ins.o_load_cmd_SB_LUT4_I2_O[0] +.sym 18041 w_rx_data[4] +.sym 18045 io_ctrl_ins.pmod_state_SB_DFFE_Q_E_SB_LUT4_O_I3[0] +.sym 18046 io_ctrl_ins.o_pmod[6] +.sym 18047 io_ctrl_ins.pmod_dir_state[6] +.sym 18048 io_ctrl_ins.ldo2v8_state_SB_LUT4_I3_O[1] +.sym 18051 spi_if_ins.o_fetch_cmd_SB_LUT4_I3_1_O[0] +.sym 18052 w_ioc[0] +.sym 18053 w_ioc[1] +.sym 18057 w_ioc[0] +.sym 18059 io_ctrl_ins.tr_vc_2_state_SB_LUT4_I1_I3[1] +.sym 18063 spi_if_ins.o_fetch_cmd_SB_LUT4_I3_1_O[0] +.sym 18065 w_ioc[1] +.sym 18066 io_ctrl_ins.tr_vc_2_state_SB_LUT4_I1_I3[1] +.sym 18067 io_ctrl_ins.pmod_state_SB_DFFE_Q_E .sym 18068 r_counter[0]_$glb_clk -.sym 18069 spi_if_ins.state_if_SB_DFFESR_Q_1_R -.sym 18070 io_ctrl_ins.debug_mode_SB_LUT4_I0_O -.sym 18071 io_ctrl_ins.rx_h_b_state_SB_LUT4_I1_O[1] -.sym 18073 io_ctrl_ins.o_pmod[6] -.sym 18074 io_ctrl_ins.debug_mode_SB_LUT4_I2_O[2] -.sym 18075 io_ctrl_ins.o_pmod[2] -.sym 18089 io_ctrl_ins.tr_vc_1_state_SB_LUT4_I0_O[1] -.sym 18094 io_ctrl_ins.rf_mode[2] -.sym 18095 io_ctrl_ins.debug_mode_SB_LUT4_I2_O[2] -.sym 18096 i_config[1]$SB_IO_IN -.sym 18097 w_rx_data[2] -.sym 18099 w_rx_data[6] -.sym 18103 io_ctrl_ins.debug_mode_SB_LUT4_I0_O -.sym 18104 w_rx_data[1] -.sym 18114 io_ctrl_ins.debug_mode_SB_LUT4_I2_O[1] -.sym 18115 io_ctrl_ins.led0_state_SB_LUT4_I3_I0[0] -.sym 18116 sys_ctrl_ins.o_data_out_SB_DFFE_Q_D[1] -.sym 18118 io_ctrl_ins.i_cs_SB_LUT4_I3_I0[0] +.sym 18070 io_ctrl_ins.o_pmod[5] +.sym 18071 io_ctrl_ins.o_pmod[3] +.sym 18072 io_ctrl_ins.led0_state_SB_LUT4_I3_O[3] +.sym 18073 io_ctrl_ins.o_pmod[7] +.sym 18074 i_button_SB_LUT4_I3_O[0] +.sym 18075 io_ctrl_ins.o_pmod[0] +.sym 18076 io_ctrl_ins.tr_vc_2_state_SB_LUT4_I1_I3_SB_LUT4_I2_O[0] +.sym 18077 io_ctrl_ins.tr_vc_1_state_SB_LUT4_I0_O[0] +.sym 18084 io_ctrl_ins.o_data_out_SB_DFFESR_Q_6_R[0] +.sym 18085 io_ctrl_ins.tr_vc_1_b_state_SB_LUT4_I1_O[3] +.sym 18092 io_ctrl_ins.rx_h_b_state_SB_LUT4_I0_O[0] +.sym 18094 io_ctrl_ins.ldo2v8_state_SB_LUT4_I3_O[0] +.sym 18096 w_tx_data_io[2] +.sym 18099 w_rx_data[2] +.sym 18101 io_ctrl_ins.o_data_out_SB_DFFESR_Q_6_R[0] +.sym 18102 io_ctrl_ins.rf_mode[2] +.sym 18113 io_ctrl_ins.rf_mode_SB_DFFESR_Q_E +.sym 18115 io_ctrl_ins.debug_mode[0] +.sym 18117 io_ctrl_ins.o_pmod[1] +.sym 18119 w_rx_data[4] +.sym 18121 io_ctrl_ins.pmod_state_SB_DFFE_Q_E_SB_LUT4_O_I3[1] .sym 18122 io_ctrl_ins.debug_mode[1] -.sym 18126 w_rx_data[5] -.sym 18129 w_rx_data[3] -.sym 18131 o_shdn_tx_lna$SB_IO_OUT -.sym 18132 io_ctrl_ins.o_pmod[2] -.sym 18133 o_tr_vc2$SB_IO_OUT -.sym 18135 o_shdn_rx_lna$SB_IO_OUT -.sym 18136 spi_if_ins.o_load_cmd_SB_LUT4_I2_O_SB_LUT4_I3_O[1] -.sym 18138 spi_if_ins.o_load_cmd_SB_LUT4_I2_O_SB_LUT4_I3_O_SB_LUT4_I3_2_O -.sym 18140 w_ioc[0] -.sym 18141 w_rx_data[4] -.sym 18145 w_rx_data[4] -.sym 18150 sys_ctrl_ins.o_data_out_SB_DFFE_Q_D[1] -.sym 18151 io_ctrl_ins.debug_mode[1] -.sym 18152 o_shdn_rx_lna$SB_IO_OUT -.sym 18153 io_ctrl_ins.led0_state_SB_LUT4_I3_I0[0] -.sym 18164 sys_ctrl_ins.o_data_out_SB_DFFE_Q_D[1] -.sym 18165 spi_if_ins.o_load_cmd_SB_LUT4_I2_O_SB_LUT4_I3_O[1] -.sym 18168 w_rx_data[5] -.sym 18174 sys_ctrl_ins.o_data_out_SB_DFFE_Q_D[1] -.sym 18175 io_ctrl_ins.led0_state_SB_LUT4_I3_I0[0] -.sym 18176 io_ctrl_ins.debug_mode_SB_LUT4_I2_O[1] -.sym 18177 o_tr_vc2$SB_IO_OUT -.sym 18182 w_rx_data[3] -.sym 18186 io_ctrl_ins.i_cs_SB_LUT4_I3_I0[0] -.sym 18187 w_ioc[0] -.sym 18188 io_ctrl_ins.o_pmod[2] -.sym 18189 o_shdn_tx_lna$SB_IO_OUT -.sym 18190 spi_if_ins.o_load_cmd_SB_LUT4_I2_O_SB_LUT4_I3_O_SB_LUT4_I3_2_O +.sym 18123 io_ctrl_ins.debug_mode_SB_LUT4_I2_O[1] +.sym 18125 io_ctrl_ins.pmod_state_SB_DFFE_Q_E_SB_LUT4_O_I3[0] +.sym 18130 io_ctrl_ins.pmod_dir_state[1] +.sym 18133 io_ctrl_ins.ldo2v8_state_SB_LUT4_I3_O[1] +.sym 18135 io_ctrl_ins.rf_mode[2] +.sym 18137 w_rx_data[2] +.sym 18139 w_rx_data[0] +.sym 18141 io_ctrl_ins.tr_vc_2_state_SB_LUT4_I1_I3_SB_LUT4_I2_O[0] +.sym 18147 w_rx_data[4] +.sym 18150 w_rx_data[2] +.sym 18157 io_ctrl_ins.pmod_state_SB_DFFE_Q_E_SB_LUT4_O_I3[1] +.sym 18159 io_ctrl_ins.tr_vc_2_state_SB_LUT4_I1_I3_SB_LUT4_I2_O[0] +.sym 18162 io_ctrl_ins.pmod_dir_state[1] +.sym 18163 io_ctrl_ins.o_pmod[1] +.sym 18164 io_ctrl_ins.pmod_state_SB_DFFE_Q_E_SB_LUT4_O_I3[0] +.sym 18165 io_ctrl_ins.ldo2v8_state_SB_LUT4_I3_O[1] +.sym 18171 w_rx_data[0] +.sym 18174 io_ctrl_ins.debug_mode_SB_LUT4_I2_O[1] +.sym 18175 io_ctrl_ins.debug_mode[1] +.sym 18176 io_ctrl_ins.rf_mode[2] +.sym 18177 io_ctrl_ins.debug_mode[0] +.sym 18180 io_ctrl_ins.debug_mode[0] +.sym 18182 io_ctrl_ins.debug_mode[1] +.sym 18186 io_ctrl_ins.pmod_state_SB_DFFE_Q_E_SB_LUT4_O_I3[0] +.sym 18188 io_ctrl_ins.pmod_state_SB_DFFE_Q_E_SB_LUT4_O_I3[1] +.sym 18190 io_ctrl_ins.rf_mode_SB_DFFESR_Q_E .sym 18191 r_counter[0]_$glb_clk -.sym 18193 io_ctrl_ins.mixer_en_state -.sym 18194 o_tr_vc1_b$SB_IO_OUT -.sym 18195 o_rx_h_tx_l$SB_IO_OUT -.sym 18196 o_tr_vc1$SB_IO_OUT -.sym 18197 io_ctrl_ins.rx_h_state_SB_DFFE_Q_D_SB_LUT4_O_I3[2] -.sym 18198 o_rx_h_tx_l_b$SB_IO_OUT -.sym 18199 o_tr_vc2$SB_IO_OUT -.sym 18217 o_shdn_tx_lna$SB_IO_OUT -.sym 18221 o_shdn_rx_lna$SB_IO_OUT -.sym 18243 w_rx_data[7] -.sym 18245 spi_if_ins.o_load_cmd_SB_LUT4_I2_O_SB_LUT4_I3_O_SB_LUT4_I3_2_O -.sym 18251 w_rx_data[0] -.sym 18254 io_ctrl_ins.rf_mode[2] -.sym 18259 w_rx_data[6] -.sym 18262 io_ctrl_ins.rf_mode[0] -.sym 18267 w_rx_data[7] -.sym 18279 io_ctrl_ins.rf_mode[2] -.sym 18282 io_ctrl_ins.rf_mode[0] -.sym 18287 w_rx_data[0] -.sym 18297 io_ctrl_ins.rf_mode[0] -.sym 18310 w_rx_data[6] -.sym 18313 spi_if_ins.o_load_cmd_SB_LUT4_I2_O_SB_LUT4_I3_O_SB_LUT4_I3_2_O +.sym 18192 i_smi_a1_SB_LUT4_I1_O_SB_LUT4_O_I2_SB_LUT4_I0_O[2]_$glb_sr +.sym 18193 io_ctrl_ins.tr_vc_2_state_SB_LUT4_I1_O[2] +.sym 18194 w_tx_data_io[1] +.sym 18196 io_ctrl_ins.tr_vc_2_state_SB_LUT4_I1_O[3] +.sym 18198 io_ctrl_ins.rx_h_b_state_SB_LUT4_I0_O[1] +.sym 18199 w_tx_data_io[3] +.sym 18200 w_tx_data_io[2] +.sym 18201 io_ctrl_ins.debug_mode[0] +.sym 18205 io_ctrl_ins.rf_mode[2] +.sym 18206 io_ctrl_ins.tr_vc_2_state_SB_LUT4_I1_I3_SB_LUT4_I2_O[0] +.sym 18207 io_ctrl_ins.debug_mode_SB_LUT4_I0_O +.sym 18209 io_ctrl_ins.rf_mode[0] +.sym 18210 io_ctrl_ins.tr_vc_2_state_SB_LUT4_I1_I3[1] +.sym 18211 i_button$SB_IO_IN +.sym 18214 w_ioc[0] +.sym 18216 io_ctrl_ins.led0_state_SB_LUT4_I3_O[3] +.sym 18217 w_rx_data[0] +.sym 18220 o_led0$SB_IO_OUT +.sym 18222 i_smi_a1_SB_LUT4_I1_O_SB_LUT4_O_I2_SB_LUT4_I0_O[2] +.sym 18224 io_ctrl_ins.debug_mode_SB_LUT4_I0_O +.sym 18226 io_ctrl_ins.debug_mode_SB_LUT4_I2_O[3] +.sym 18235 io_ctrl_ins.rf_mode[0] +.sym 18236 io_ctrl_ins.o_data_out_SB_DFFESR_Q_6_R[0] +.sym 18238 i_smi_a1_SB_LUT4_I1_O_SB_LUT4_O_I2_SB_LUT4_I0_O[2] +.sym 18239 io_ctrl_ins.debug_mode_SB_LUT4_I0_O +.sym 18240 o_ldo_2v8_en +.sym 18241 spi_if_ins.o_load_cmd_SB_LUT4_I2_O[0] +.sym 18243 w_rx_data[1] +.sym 18244 w_ioc[0] +.sym 18245 io_ctrl_ins.pmod_state_SB_DFFE_Q_E +.sym 18246 io_ctrl_ins.tr_vc_2_state_SB_LUT4_I1_I3[1] +.sym 18248 io_ctrl_ins.tr_vc_2_state_SB_LUT4_I1_I3_SB_LUT4_I2_O[0] +.sym 18249 w_rx_data[2] +.sym 18251 o_shdn_rx_lna$SB_IO_OUT +.sym 18252 io_ctrl_ins.o_pmod[2] +.sym 18253 io_ctrl_ins.led1_state_SB_LUT4_I0_I2[1] +.sym 18254 o_shdn_tx_lna$SB_IO_OUT +.sym 18261 io_ctrl_ins.debug_mode[1] +.sym 18267 io_ctrl_ins.o_data_out_SB_DFFESR_Q_6_R[0] +.sym 18268 io_ctrl_ins.tr_vc_2_state_SB_LUT4_I1_I3_SB_LUT4_I2_O[0] +.sym 18269 io_ctrl_ins.debug_mode[1] +.sym 18270 o_shdn_rx_lna$SB_IO_OUT +.sym 18281 w_rx_data[2] +.sym 18285 io_ctrl_ins.debug_mode_SB_LUT4_I0_O +.sym 18291 i_smi_a1_SB_LUT4_I1_O_SB_LUT4_O_I2_SB_LUT4_I0_O[2] +.sym 18292 io_ctrl_ins.led1_state_SB_LUT4_I0_I2[1] +.sym 18294 spi_if_ins.o_load_cmd_SB_LUT4_I2_O[0] +.sym 18297 io_ctrl_ins.tr_vc_2_state_SB_LUT4_I1_I3[1] +.sym 18298 io_ctrl_ins.o_pmod[2] +.sym 18299 w_ioc[0] +.sym 18300 o_shdn_tx_lna$SB_IO_OUT +.sym 18305 w_rx_data[1] +.sym 18309 io_ctrl_ins.rf_mode[0] +.sym 18310 o_ldo_2v8_en +.sym 18311 io_ctrl_ins.led1_state_SB_LUT4_I0_I2[1] +.sym 18312 io_ctrl_ins.o_data_out_SB_DFFESR_Q_6_R[0] +.sym 18313 io_ctrl_ins.pmod_state_SB_DFFE_Q_E .sym 18314 r_counter[0]_$glb_clk -.sym 18316 o_shdn_rx_lna$SB_IO_OUT -.sym 18322 o_shdn_tx_lna$SB_IO_OUT -.sym 18329 o_tr_vc2$SB_IO_OUT -.sym 18345 i_config[2]$SB_IO_IN -.sym 18347 io_ctrl_ins.debug_mode_SB_LUT4_I0_O -.sym 18367 w_rx_data[2] -.sym 18375 spi_if_ins.o_load_cmd_SB_LUT4_I2_O_SB_LUT4_I3_O_SB_LUT4_I3_2_O -.sym 18376 w_rx_data[1] -.sym 18408 w_rx_data[2] -.sym 18417 w_rx_data[1] -.sym 18436 spi_if_ins.o_load_cmd_SB_LUT4_I2_O_SB_LUT4_I3_O_SB_LUT4_I3_2_O +.sym 18321 o_tr_vc2$SB_IO_OUT +.sym 18329 io_ctrl_ins.pmod_dir_state[3] +.sym 18330 i_config[3]$SB_IO_IN +.sym 18331 io_ctrl_ins.ldo2v8_state_SB_LUT4_I3_O[1] +.sym 18334 w_ioc[0] +.sym 18341 io_ctrl_ins.debug_mode_SB_LUT4_I2_O[1] +.sym 18343 o_rx_h_tx_l_b$SB_IO_OUT +.sym 18348 w_tx_data_io[3] +.sym 18359 io_ctrl_ins.led1_state_SB_DFFESR_Q_E +.sym 18360 w_rx_data[1] +.sym 18369 w_rx_data[2] +.sym 18377 w_rx_data[0] +.sym 18391 w_rx_data[1] +.sym 18429 w_rx_data[2] +.sym 18433 w_rx_data[0] +.sym 18436 io_ctrl_ins.led1_state_SB_DFFESR_Q_E .sym 18437 r_counter[0]_$glb_clk -.sym 18458 o_shdn_rx_lna$SB_IO_OUT +.sym 18438 i_smi_a1_SB_LUT4_I1_O_SB_LUT4_O_I2_SB_LUT4_I0_O[2]_$glb_sr .sym 18562 i_config[1]$SB_IO_IN .sym 18564 i_config[2]$SB_IO_IN -.sym 18583 i_config[1]$SB_IO_IN .sym 18636 io_smi_data[4]$SB_IO_OUT -.sym 18651 io_smi_data[4]$SB_IO_OUT -.sym 18684 spi_if_ins.o_load_cmd_SB_DFFESR_Q_D[2] -.sym 18691 spi_if_ins.spi.r3_rx_done_SB_LUT4_I2_O -.sym 18693 io_pmod[2]$SB_IO_IN -.sym 18695 i_ss$SB_IO_IN -.sym 18703 spi_if_ins.spi.r2_rx_done -.sym 18716 i_ss$SB_IO_IN -.sym 18719 spi_if_ins.spi.r_rx_done -.sym 18724 spi_if_ins.spi.r3_rx_done -.sym 18736 spi_if_ins.spi.r_rx_done -.sym 18745 i_ss$SB_IO_IN -.sym 18761 spi_if_ins.spi.r3_rx_done -.sym 18762 spi_if_ins.spi.r2_rx_done -.sym 18767 spi_if_ins.spi.r2_rx_done -.sym 18783 r_counter[0]_$glb_clk +.sym 18641 i_smi_a3$SB_IO_IN +.sym 18649 i_smi_a3$SB_IO_IN +.sym 18654 io_smi_data[4]$SB_IO_OUT +.sym 18693 i_sck$SB_IO_IN +.sym 18695 i_mosi$SB_IO_IN +.sym 18712 rx_09_fifo.rd_addr_gray[0] +.sym 18715 i_smi_a3$SB_IO_IN +.sym 18719 rx_09_fifo.rd_addr_gray[5] +.sym 18724 io_smi_data[4]$SB_IO_OUT +.sym 18727 w_smi_data_output[5] +.sym 18742 io_smi_data[4]$SB_IO_OUT +.sym 18763 i_smi_a3$SB_IO_IN +.sym 18767 rx_09_fifo.rd_addr_gray[5] +.sym 18773 w_smi_data_output[5] +.sym 18775 i_smi_a3$SB_IO_IN +.sym 18781 rx_09_fifo.rd_addr_gray[0] +.sym 18783 lvds_clock_buf .sym 18785 $io_pmod[3]$iobuf_i -.sym 18869 rx_09_fifo.rd_addr_gray_SB_LUT4_I2_O[7] -.sym 18893 smi_ctrl_ins.r_fifo_09_pull_SB_LUT4_I3_O -.sym 18895 rx_09_fifo.rd_addr_gray_SB_DFFESR_Q_6_D[3] -.sym 18912 rx_09_fifo.rd_addr_gray_SB_LUT4_I2_O[7] -.sym 18930 rx_09_fifo.rd_addr_gray_SB_DFFESR_Q_6_D[3] -.sym 18945 smi_ctrl_ins.r_fifo_09_pull_SB_LUT4_I3_O +.sym 18821 w_smi_data_output[5] +.sym 18831 rx_09_fifo.rd_addr_gray[0] +.sym 18834 $io_pmod[2]$iobuf_i +.sym 18844 io_pmod_SB_DFFSS_Q_D_SB_LUT4_O_I0_SB_LUT4_O_I2[1] +.sym 18846 io_pmod_SB_DFFSS_Q_D_SB_LUT4_O_I0_SB_LUT4_O_3_I2[3] +.sym 18851 io_pmod_SB_DFFSS_Q_D_SB_LUT4_O_I0_SB_LUT4_O_2_I0[3] +.sym 18852 spi_if_ins.spi.o_spi_miso_SB_DFFE_Q_E +.sym 18855 rx_09_fifo.rd_addr[0] +.sym 18868 io_pmod_SB_DFFSS_Q_D_SB_LUT4_O_I0_SB_LUT4_O_1_I1[0] +.sym 18869 io_pmod_SB_DFFSS_Q_D_SB_LUT4_O_I0_SB_LUT4_O_1_I1_SB_LUT4_O_I2[2] +.sym 18871 io_pmod_SB_DFFSS_Q_D_SB_LUT4_O_I0_SB_LUT4_O_3_I2[1] +.sym 18872 io_pmod_SB_DFFSS_Q_D_SB_LUT4_O_I0_SB_LUT4_O_3_I2[0] +.sym 18873 io_pmod_SB_DFFSS_Q_D_SB_LUT4_O_I0_SB_LUT4_O_3_I2[3] +.sym 18874 io_pmod_SB_DFFSS_Q_D_SB_LUT4_O_I0[2] +.sym 18875 io_pmod_SB_DFFSS_Q_D_SB_LUT4_O_I0_SB_LUT4_O_1_I1_SB_LUT4_O_I0[2] +.sym 18876 io_pmod_SB_DFFSS_Q_D_SB_LUT4_O_I0_SB_LUT4_O_1_I1_SB_LUT4_O_I0[0] +.sym 18877 rx_09_fifo.rd_addr[0] +.sym 18879 io_pmod_SB_DFFSS_Q_D_SB_LUT4_O_I0_SB_LUT4_O_3_I2[2] +.sym 18881 io_pmod_SB_DFFSS_Q_D_SB_LUT4_O_I0_SB_LUT4_O_1_I1_SB_LUT4_O_I0[1] +.sym 18883 rx_09_fifo.rd_addr_gray_SB_LUT4_I2_O[1] +.sym 18884 io_pmod_SB_DFFSS_Q_D_SB_LUT4_O_I0[0] +.sym 18886 io_pmod_SB_DFFSS_Q_D_SB_LUT4_O_I0_SB_LUT4_O_1_I1_SB_LUT4_O_I2[1] +.sym 18887 io_pmod_SB_DFFSS_Q_D_SB_LUT4_O_I0_SB_LUT4_O_1_I1_SB_LUT4_O_I0[3] +.sym 18888 io_pmod_SB_DFFSS_Q_D_SB_LUT4_O_I0_SB_LUT4_O_1_I1[2] +.sym 18889 io_pmod_SB_DFFSS_Q_D_SB_LUT4_O_I0_SB_LUT4_O_1_I1[1] +.sym 18890 rx_09_fifo.wr_addr_gray_rd_r[0] +.sym 18891 io_pmod_SB_DFFSS_Q_D_SB_LUT4_O_I0[3] +.sym 18892 rx_09_fifo.rd_addr_gray_SB_LUT4_I2_O[2] +.sym 18893 io_pmod_SB_DFFSS_Q_D_SB_LUT4_O_I0_SB_LUT4_O_1_I1_SB_LUT4_O_I2[3] +.sym 18894 io_pmod_SB_DFFSS_Q_D_SB_LUT4_O_I0[1] +.sym 18899 io_pmod_SB_DFFSS_Q_D_SB_LUT4_O_I0[0] +.sym 18900 io_pmod_SB_DFFSS_Q_D_SB_LUT4_O_I0[2] +.sym 18901 io_pmod_SB_DFFSS_Q_D_SB_LUT4_O_I0[3] +.sym 18902 io_pmod_SB_DFFSS_Q_D_SB_LUT4_O_I0[1] +.sym 18906 io_pmod_SB_DFFSS_Q_D_SB_LUT4_O_I0_SB_LUT4_O_1_I1[0] +.sym 18907 io_pmod_SB_DFFSS_Q_D_SB_LUT4_O_I0_SB_LUT4_O_1_I1[1] +.sym 18908 io_pmod_SB_DFFSS_Q_D_SB_LUT4_O_I0_SB_LUT4_O_1_I1[2] +.sym 18911 io_pmod_SB_DFFSS_Q_D_SB_LUT4_O_I0_SB_LUT4_O_1_I1_SB_LUT4_O_I0[2] +.sym 18912 io_pmod_SB_DFFSS_Q_D_SB_LUT4_O_I0_SB_LUT4_O_1_I1_SB_LUT4_O_I0[0] +.sym 18913 io_pmod_SB_DFFSS_Q_D_SB_LUT4_O_I0_SB_LUT4_O_1_I1_SB_LUT4_O_I0[1] +.sym 18914 io_pmod_SB_DFFSS_Q_D_SB_LUT4_O_I0_SB_LUT4_O_1_I1_SB_LUT4_O_I0[3] +.sym 18917 rx_09_fifo.rd_addr_gray_SB_LUT4_I2_O[2] +.sym 18919 rx_09_fifo.rd_addr_gray_SB_LUT4_I2_O[1] +.sym 18920 io_pmod_SB_DFFSS_Q_D_SB_LUT4_O_I0_SB_LUT4_O_3_I2[0] +.sym 18923 io_pmod_SB_DFFSS_Q_D_SB_LUT4_O_I0_SB_LUT4_O_3_I2[2] +.sym 18924 io_pmod_SB_DFFSS_Q_D_SB_LUT4_O_I0_SB_LUT4_O_3_I2[1] +.sym 18925 io_pmod_SB_DFFSS_Q_D_SB_LUT4_O_I0_SB_LUT4_O_3_I2[0] +.sym 18926 io_pmod_SB_DFFSS_Q_D_SB_LUT4_O_I0_SB_LUT4_O_3_I2[3] +.sym 18929 rx_09_fifo.wr_addr_gray_rd_r[0] +.sym 18932 rx_09_fifo.rd_addr[0] +.sym 18941 io_pmod_SB_DFFSS_Q_D_SB_LUT4_O_I0_SB_LUT4_O_1_I1_SB_LUT4_O_I2[2] +.sym 18942 io_pmod_SB_DFFSS_Q_D_SB_LUT4_O_I0_SB_LUT4_O_1_I1_SB_LUT4_O_I2[1] +.sym 18943 io_pmod_SB_DFFSS_Q_D_SB_LUT4_O_I0_SB_LUT4_O_1_I1_SB_LUT4_O_I0[0] +.sym 18944 io_pmod_SB_DFFSS_Q_D_SB_LUT4_O_I0_SB_LUT4_O_1_I1_SB_LUT4_O_I2[3] .sym 18946 r_counter[0]_$glb_clk -.sym 18947 i_smi_a1_SB_LUT4_I1_O[2]_$glb_sr -.sym 18963 rx_09_fifo.rd_addr_gray_SB_LUT4_I2_O[7] -.sym 18980 $PACKER_VCC_NET -.sym 19002 i_ss$SB_IO_IN -.sym 19006 smi_ctrl_ins.r_fifo_09_pull_SB_LUT4_I3_O -.sym 19007 spi_if_ins.spi.r_rx_done_SB_DFFER_Q_D[1] -.sym 19016 spi_if_ins.spi.r_rx_done_SB_DFFER_Q_E -.sym 19037 smi_ctrl_ins.r_fifo_09_pull_SB_LUT4_I3_O -.sym 19046 spi_if_ins.spi.r_rx_done_SB_DFFER_Q_D[1] -.sym 19068 spi_if_ins.spi.r_rx_done_SB_DFFER_Q_E -.sym 19069 i_sck$SB_IO_IN_$glb_clk -.sym 19070 i_ss$SB_IO_IN -.sym 19097 spi_if_ins.r_tx_data_valid_SB_LUT4_I3_O[2] -.sym 19101 int_miso -.sym 19114 smi_ctrl_ins.r_fifo_09_pull_SB_LUT4_I3_O -.sym 19118 spi_if_ins.r_tx_data_valid -.sym 19123 i_ss$SB_IO_IN -.sym 19133 rx_09_fifo.rd_addr_gray_SB_DFFESR_Q_5_D[0] -.sym 19172 rx_09_fifo.rd_addr_gray_SB_DFFESR_Q_5_D[0] -.sym 19176 i_ss$SB_IO_IN -.sym 19178 spi_if_ins.r_tx_data_valid -.sym 19191 smi_ctrl_ins.r_fifo_09_pull_SB_LUT4_I3_O +.sym 18947 i_smi_a1_SB_LUT4_I1_O_SB_LUT4_O_I2_SB_LUT4_I0_O[2]_$glb_sr +.sym 18960 io_pmod[7]$SB_IO_IN +.sym 18989 rx_09_fifo.wr_addr_gray_rd_r[3] +.sym 18992 rx_09_fifo.rd_addr_gray_SB_LUT4_I2_O[3] +.sym 18994 io_pmod_SB_DFFSS_Q_D_SB_LUT4_O_I0_SB_LUT4_O_1_I1_SB_LUT4_O_I0[3] +.sym 18995 rx_09_fifo.rd_addr_gray_SB_LUT4_I2_O[6] +.sym 18998 rx_09_fifo.rd_addr_gray_SB_LUT4_I2_O[1] +.sym 18999 rx_09_fifo.rd_addr_gray_SB_LUT4_I2_O[2] +.sym 19008 rx_09_fifo.rd_addr[0] +.sym 19016 smi_ctrl_ins.r_fifo_09_pull_SB_LUT4_I3_1_O +.sym 19022 rx_09_fifo.rd_addr_gray_SB_LUT4_I2_O[1] +.sym 19025 rx_09_fifo.rd_addr[0] +.sym 19030 io_pmod_SB_DFFSS_Q_D_SB_LUT4_O_I0_SB_LUT4_O_1_I1_SB_LUT4_O_I0[3] +.sym 19036 rx_09_fifo.wr_addr_gray_rd_r[3] +.sym 19037 rx_09_fifo.rd_addr_gray_SB_LUT4_I2_O[3] +.sym 19040 rx_09_fifo.rd_addr[0] +.sym 19046 rx_09_fifo.rd_addr_gray_SB_LUT4_I2_O[6] +.sym 19047 io_pmod_SB_DFFSS_Q_D_SB_LUT4_O_I0_SB_LUT4_O_1_I1_SB_LUT4_O_I0[3] +.sym 19053 rx_09_fifo.rd_addr_gray_SB_LUT4_I2_O[1] +.sym 19060 rx_09_fifo.rd_addr_gray_SB_LUT4_I2_O[6] +.sym 19064 rx_09_fifo.rd_addr_gray_SB_LUT4_I2_O[2] +.sym 19068 smi_ctrl_ins.r_fifo_09_pull_SB_LUT4_I3_1_O +.sym 19069 r_counter[0]_$glb_clk +.sym 19070 i_smi_a1_SB_LUT4_I1_O_SB_LUT4_O_I2_SB_LUT4_I0_O[2]_$glb_sr +.sym 19092 w_smi_read_req +.sym 19098 rx_09_fifo.rd_addr[0] +.sym 19102 smi_ctrl_ins.r_fifo_09_pull_SB_LUT4_I3_1_O +.sym 19114 spi_if_ins.spi.r_tx_bit_count[2] +.sym 19116 i_sck$SB_IO_IN +.sym 19120 rx_09_fifo.wr_addr_gray_rd[3] +.sym 19124 spi_if_ins.r_tx_data_valid_SB_LUT4_I3_O_SB_LUT4_O_I0_SB_LUT4_O_I3[2] +.sym 19126 spi_if_ins.r_tx_data_valid_SB_LUT4_I3_O[2] +.sym 19131 spi_if_ins.spi.SCKr[0] +.sym 19138 spi_if_ins.spi.SCKr[1] +.sym 19143 spi_if_ins.spi.SCKr[2] +.sym 19148 rx_09_fifo.wr_addr_gray_rd[3] +.sym 19151 spi_if_ins.r_tx_data_valid_SB_LUT4_I3_O_SB_LUT4_O_I0_SB_LUT4_O_I3[2] +.sym 19152 spi_if_ins.spi.r_tx_bit_count[2] +.sym 19153 spi_if_ins.spi.SCKr[1] +.sym 19154 spi_if_ins.spi.SCKr[2] +.sym 19160 spi_if_ins.spi.SCKr[0] +.sym 19164 i_sck$SB_IO_IN +.sym 19170 spi_if_ins.r_tx_data_valid_SB_LUT4_I3_O[2] +.sym 19171 spi_if_ins.spi.SCKr[2] +.sym 19172 spi_if_ins.spi.SCKr[1] +.sym 19182 spi_if_ins.r_tx_data_valid_SB_LUT4_I3_O[2] +.sym 19189 spi_if_ins.spi.SCKr[1] .sym 19192 r_counter[0]_$glb_clk -.sym 19193 i_smi_a1_SB_LUT4_I1_O[2]_$glb_sr -.sym 19204 w_rx_data[2] -.sym 19214 spi_if_ins.r_tx_data_valid -.sym 19218 i_smi_soe_se$rename$0 -.sym 19224 spi_if_ins.o_load_cmd_SB_DFFESR_Q_D[2] -.sym 19226 $PACKER_VCC_NET -.sym 19259 spi_if_ins.spi.r3_rx_done_SB_LUT4_I2_O -.sym 19310 spi_if_ins.spi.r3_rx_done_SB_LUT4_I2_O +.sym 19206 i_mosi$SB_IO_IN +.sym 19221 $PACKER_VCC_NET +.sym 19224 $io_pmod[2]$iobuf_i +.sym 19228 smi_ctrl_ins.int_cnt_24[5] +.sym 19256 i_smi_a2_SB_LUT4_I1_O_SB_LUT4_I3_1_I2[2] +.sym 19260 smi_ctrl_ins.r_fifo_24_pull_SB_LUT4_I1_O[2] +.sym 19261 i_smi_soe_se$rename$0 +.sym 19262 smi_ctrl_ins.int_cnt_24_SB_DFFESR_Q_E +.sym 19274 i_smi_a2_SB_LUT4_I1_O_SB_LUT4_I3_1_I2[2] +.sym 19275 smi_ctrl_ins.r_fifo_24_pull_SB_LUT4_I1_O[2] +.sym 19276 i_smi_soe_se$rename$0 +.sym 19314 smi_ctrl_ins.int_cnt_24_SB_DFFESR_Q_E .sym 19315 r_counter[0]_$glb_clk -.sym 19360 spi_if_ins.spi.o_spi_miso_SB_DFFE_Q_E -.sym 19369 spi_if_ins.r_tx_data_valid_SB_LUT4_I3_O[2] -.sym 19371 spi_if_ins.spi.o_spi_miso_SB_DFFE_Q_D_SB_LUT4_O_I2[1] -.sym 19372 spi_if_ins.r_tx_byte[7] -.sym 19410 spi_if_ins.spi.o_spi_miso_SB_DFFE_Q_D_SB_LUT4_O_I2[1] -.sym 19411 spi_if_ins.r_tx_byte[7] -.sym 19412 spi_if_ins.r_tx_data_valid_SB_LUT4_I3_O[2] -.sym 19437 spi_if_ins.spi.o_spi_miso_SB_DFFE_Q_E -.sym 19438 r_counter[0]_$glb_clk -.sym 19453 io_pmod[7]$SB_IO_IN -.sym 19460 $io_pmod[5]$iobuf_i -.sym 19464 $PACKER_VCC_NET -.sym 19469 spi_if_ins.w_rx_data[0] -.sym 19470 spi_if_ins.state_if[1] -.sym 19474 spi_if_ins.o_load_cmd_SB_DFFESR_Q_D[0] -.sym 19475 spi_if_ins.w_rx_data[6] -.sym 19495 spi_if_ins.r_tx_data_valid_SB_DFFESR_Q_D[1] -.sym 19508 spi_if_ins.r_tx_data_valid_SB_DFFESR_Q_E -.sym 19510 spi_if_ins.o_load_cmd_SB_DFFESR_Q_D[2] -.sym 19511 spi_if_ins.state_if_SB_DFFESR_Q_D_SB_LUT4_I1_O[1] -.sym 19529 spi_if_ins.state_if_SB_DFFESR_Q_D_SB_LUT4_I1_O[1] -.sym 19551 spi_if_ins.r_tx_data_valid_SB_DFFESR_Q_D[1] -.sym 19560 spi_if_ins.r_tx_data_valid_SB_DFFESR_Q_E +.sym 19316 i_smi_a1_SB_LUT4_I1_O_SB_LUT4_O_I2_SB_LUT4_I0_O[2]_$glb_sr +.sym 19328 i_config[1]$SB_IO_IN +.sym 19333 smi_ctrl_ins.int_cnt_24[5] +.sym 19341 io_pmod[2]$SB_IO_IN +.sym 19348 spi_if_ins.w_rx_data[6] +.sym 19361 spi_if_ins.spi.r_rx_bit_count[0] +.sym 19362 i_ss$SB_IO_IN +.sym 19371 spi_if_ins.spi.r_rx_bit_count[1] +.sym 19376 spi_if_ins.spi.r_rx_bit_count[2] +.sym 19390 $nextpnr_ICESTORM_LC_14$O +.sym 19392 spi_if_ins.spi.r_rx_bit_count[0] +.sym 19396 spi_if_ins.spi.r_rx_bit_count_SB_DFFR_Q_D_SB_LUT4_O_I3[2] +.sym 19398 spi_if_ins.spi.r_rx_bit_count[1] +.sym 19403 spi_if_ins.spi.r_rx_bit_count[2] +.sym 19406 spi_if_ins.spi.r_rx_bit_count_SB_DFFR_Q_D_SB_LUT4_O_I3[2] +.sym 19411 spi_if_ins.spi.r_rx_bit_count[0] +.sym 19421 spi_if_ins.spi.r_rx_bit_count[0] +.sym 19424 spi_if_ins.spi.r_rx_bit_count[1] +.sym 19438 i_sck$SB_IO_IN_$glb_clk +.sym 19439 i_ss$SB_IO_IN +.sym 19452 lvds_rx_09_inst.r_state_if_SB_LUT4_I2_O[0] +.sym 19474 spi_if_ins.w_rx_data[6] +.sym 19483 spi_if_ins.spi.r3_rx_done_SB_LUT4_I2_O +.sym 19486 spi_if_ins.spi.r_rx_bit_count[1] +.sym 19491 spi_if_ins.spi.r_rx_bit_count[2] +.sym 19492 spi_if_ins.spi.r_rx_bit_count[0] +.sym 19498 spi_if_ins.spi.r_rx_byte[6] +.sym 19512 sys_ctrl_ins.reset_count_SB_DFFESR_Q_E +.sym 19520 spi_if_ins.spi.r_rx_byte[6] +.sym 19526 sys_ctrl_ins.reset_count_SB_DFFESR_Q_E +.sym 19532 spi_if_ins.spi.r_rx_bit_count[2] +.sym 19533 spi_if_ins.spi.r_rx_bit_count[0] +.sym 19534 spi_if_ins.spi.r_rx_bit_count[1] +.sym 19556 spi_if_ins.spi.r_rx_bit_count[1] +.sym 19557 spi_if_ins.spi.r_rx_bit_count[0] +.sym 19558 spi_if_ins.spi.r_rx_bit_count[2] +.sym 19560 spi_if_ins.spi.r3_rx_done_SB_LUT4_I2_O .sym 19561 r_counter[0]_$glb_clk -.sym 19562 spi_if_ins.o_load_cmd_SB_DFFESR_Q_D[2] -.sym 19578 lvds_rx_09_inst.r_state_if_SB_LUT4_I2_O[0] +.sym 19576 spi_if_ins.spi.r3_rx_done_SB_LUT4_I2_O .sym 19582 i_smi_soe_se$rename$0 -.sym 19585 $PACKER_VCC_NET -.sym 19592 $PACKER_VCC_NET -.sym 19604 spi_if_ins.state_if[0] -.sym 19606 spi_if_ins.o_load_cmd_SB_DFFESR_Q_D[1] -.sym 19610 spi_if_ins.state_if_SB_DFFESR_Q_D_SB_LUT4_I1_O[1] -.sym 19614 spi_if_ins.o_load_cmd_SB_DFFESR_Q_D[1] -.sym 19615 spi_if_ins.o_load_cmd_SB_DFFESR_Q_D[2] -.sym 19616 spi_if_ins.state_if_SB_DFFESR_Q_1_D[1] -.sym 19622 spi_if_ins.o_data_in_SB_DFFE_Q_E -.sym 19623 spi_if_ins.state_if_SB_DFFESR_Q_D_SB_LUT4_I1_O[2] -.sym 19628 spi_if_ins.state_if_SB_DFFESR_Q_1_D[2] -.sym 19630 spi_if_ins.state_if[1] -.sym 19634 spi_if_ins.o_load_cmd_SB_DFFESR_Q_D[0] -.sym 19635 spi_if_ins.w_rx_data[6] -.sym 19637 spi_if_ins.o_load_cmd_SB_DFFESR_Q_D[1] -.sym 19638 spi_if_ins.state_if[1] -.sym 19639 spi_if_ins.state_if[0] -.sym 19651 spi_if_ins.w_rx_data[6] -.sym 19655 spi_if_ins.state_if_SB_DFFESR_Q_1_D[2] -.sym 19656 spi_if_ins.o_load_cmd_SB_DFFESR_Q_D[2] -.sym 19657 spi_if_ins.o_load_cmd_SB_DFFESR_Q_D[0] -.sym 19661 spi_if_ins.state_if[0] -.sym 19662 spi_if_ins.state_if[1] -.sym 19663 spi_if_ins.o_load_cmd_SB_DFFESR_Q_D[2] -.sym 19664 spi_if_ins.o_load_cmd_SB_DFFESR_Q_D[1] -.sym 19668 spi_if_ins.o_load_cmd_SB_DFFESR_Q_D[2] -.sym 19669 spi_if_ins.state_if_SB_DFFESR_Q_1_D[2] -.sym 19670 spi_if_ins.state_if_SB_DFFESR_Q_D_SB_LUT4_I1_O[1] -.sym 19673 spi_if_ins.o_load_cmd_SB_DFFESR_Q_D[1] -.sym 19674 spi_if_ins.state_if[1] -.sym 19675 spi_if_ins.state_if[0] -.sym 19679 spi_if_ins.state_if_SB_DFFESR_Q_D_SB_LUT4_I1_O[2] -.sym 19681 spi_if_ins.state_if_SB_DFFESR_Q_1_D[1] -.sym 19682 spi_if_ins.state_if_SB_DFFESR_Q_D_SB_LUT4_I1_O[1] -.sym 19683 spi_if_ins.o_data_in_SB_DFFE_Q_E -.sym 19684 r_counter[0]_$glb_clk -.sym 19698 spi_if_ins.state_if_SB_DFFESR_Q_1_D[2] -.sym 19702 spi_if_ins.o_load_cmd_SB_DFFESR_Q_D[1] -.sym 19715 io_ctrl_ins.i_cs_SB_LUT4_I3_I0[0] -.sym 19716 w_rx_data[2] -.sym 19717 spi_if_ins.r_tx_data_valid_SB_DFFESR_Q_E -.sym 19718 w_rx_data[1] -.sym 19728 spi_if_ins.w_rx_data[3] -.sym 19729 spi_if_ins.w_rx_data[1] -.sym 19735 spi_if_ins.state_if_SB_DFFESR_Q_1_D[1] -.sym 19737 spi_if_ins.w_rx_data[2] -.sym 19738 spi_if_ins.w_rx_data[4] -.sym 19739 spi_if_ins.w_rx_data[0] -.sym 19742 spi_if_ins.w_rx_data[5] -.sym 19745 spi_if_ins.o_data_in_SB_DFFE_Q_E -.sym 19762 spi_if_ins.w_rx_data[1] -.sym 19769 spi_if_ins.w_rx_data[5] -.sym 19775 spi_if_ins.w_rx_data[0] -.sym 19781 spi_if_ins.w_rx_data[4] -.sym 19790 spi_if_ins.w_rx_data[3] -.sym 19797 spi_if_ins.state_if_SB_DFFESR_Q_1_D[1] -.sym 19802 spi_if_ins.w_rx_data[2] -.sym 19806 spi_if_ins.o_data_in_SB_DFFE_Q_E -.sym 19807 r_counter[0]_$glb_clk -.sym 19823 w_rx_data[3] -.sym 19833 spi_if_ins.o_load_cmd_SB_LUT4_I2_O_SB_LUT4_I3_O[1] -.sym 19835 spi_if_ins.state_if[0] -.sym 19838 spi_if_ins.state_if_SB_DFFESR_Q_1_R -.sym 19840 spi_if_ins.state_if_SB_DFFESR_Q_1_D[0] -.sym 19850 i_config[3]$SB_IO_IN -.sym 19851 io_ctrl_ins.led0_state_SB_LUT4_I3_O[1] -.sym 19852 spi_if_ins.o_load_cmd_SB_LUT4_I2_O_SB_LUT4_I3_O_SB_LUT4_I3_O -.sym 19853 spi_if_ins.state_if[0] -.sym 19859 w_rx_data[5] -.sym 19862 w_rx_data[6] -.sym 19863 spi_if_ins.o_load_cmd_SB_DFFESR_Q_D[1] -.sym 19864 w_rx_data[7] -.sym 19865 spi_if_ins.state_if[1] -.sym 19871 spi_if_ins.o_load_cmd_SB_DFFESR_Q_D[2] -.sym 19876 io_ctrl_ins.pmod_dir_state[6] -.sym 19879 i_button_SB_LUT4_I3_I1[2] -.sym 19890 w_rx_data[5] -.sym 19896 w_rx_data[6] -.sym 19901 spi_if_ins.state_if[0] -.sym 19902 spi_if_ins.state_if[1] -.sym 19903 spi_if_ins.o_load_cmd_SB_DFFESR_Q_D[2] -.sym 19904 spi_if_ins.o_load_cmd_SB_DFFESR_Q_D[1] -.sym 19908 w_rx_data[7] -.sym 19913 io_ctrl_ins.led0_state_SB_LUT4_I3_O[1] -.sym 19914 i_config[3]$SB_IO_IN -.sym 19915 io_ctrl_ins.pmod_dir_state[6] -.sym 19916 i_button_SB_LUT4_I3_I1[2] -.sym 19929 spi_if_ins.o_load_cmd_SB_LUT4_I2_O_SB_LUT4_I3_O_SB_LUT4_I3_O +.sym 19583 spi_if_ins.spi.r_rx_done_SB_DFFER_Q_D[1] +.sym 19590 i_ss_SB_LUT4_I3_O +.sym 19606 i_ss_SB_LUT4_I3_O +.sym 19607 spi_if_ins.spi.r_rx_done_SB_DFFER_Q_D[1] +.sym 19609 spi_if_ins.spi.r_temp_rx_byte[2] +.sym 19610 i_mosi$SB_IO_IN +.sym 19612 spi_if_ins.spi.r_temp_rx_byte[0] +.sym 19613 spi_if_ins.spi.r_temp_rx_byte[4] +.sym 19615 i_ss$SB_IO_IN +.sym 19616 spi_if_ins.spi.r_temp_rx_byte[3] +.sym 19623 spi_if_ins.spi.r_temp_rx_byte[1] +.sym 19630 spi_if_ins.spi.r_temp_rx_byte[5] +.sym 19639 i_mosi$SB_IO_IN +.sym 19645 spi_if_ins.spi.r_temp_rx_byte[3] +.sym 19651 spi_if_ins.spi.r_temp_rx_byte[4] +.sym 19657 spi_if_ins.spi.r_temp_rx_byte[0] +.sym 19662 spi_if_ins.spi.r_temp_rx_byte[2] +.sym 19669 spi_if_ins.spi.r_temp_rx_byte[1] +.sym 19676 spi_if_ins.spi.r_temp_rx_byte[5] +.sym 19679 spi_if_ins.spi.r_rx_done_SB_DFFER_Q_D[1] +.sym 19682 i_ss$SB_IO_IN +.sym 19683 i_ss_SB_LUT4_I3_O +.sym 19684 i_sck$SB_IO_IN_$glb_clk +.sym 19697 io_ctrl_ins.o_data_out_SB_DFFESR_Q_R +.sym 19711 spi_if_ins.w_rx_data[2] +.sym 19717 spi_if_ins.w_rx_data[0] +.sym 19728 spi_if_ins.spi.r_temp_rx_byte[4] +.sym 19730 spi_if_ins.spi.r_temp_rx_byte[1] +.sym 19731 spi_if_ins.spi.r_temp_rx_byte[3] +.sym 19732 spi_if_ins.spi.r_temp_rx_byte[2] +.sym 19735 spi_if_ins.spi.r_temp_rx_byte[0] +.sym 19738 spi_if_ins.spi.r_rx_done_SB_DFFER_Q_D_SB_LUT4_I3_O +.sym 19741 spi_if_ins.spi.r_temp_rx_byte[6] +.sym 19753 i_mosi$SB_IO_IN +.sym 19763 i_mosi$SB_IO_IN +.sym 19767 spi_if_ins.spi.r_temp_rx_byte[3] +.sym 19775 spi_if_ins.spi.r_temp_rx_byte[1] +.sym 19785 spi_if_ins.spi.r_temp_rx_byte[6] +.sym 19792 spi_if_ins.spi.r_temp_rx_byte[0] +.sym 19799 spi_if_ins.spi.r_temp_rx_byte[2] +.sym 19804 spi_if_ins.spi.r_temp_rx_byte[4] +.sym 19806 spi_if_ins.spi.r_rx_done_SB_DFFER_Q_D_SB_LUT4_I3_O +.sym 19807 i_sck$SB_IO_IN_$glb_clk +.sym 19850 spi_if_ins.spi.r_rx_byte[0] +.sym 19851 spi_if_ins.spi.r_rx_byte[4] +.sym 19852 spi_if_ins.spi.r3_rx_done_SB_LUT4_I2_O +.sym 19854 spi_if_ins.spi.r_rx_byte[7] +.sym 19855 spi_if_ins.spi.r_rx_byte[1] +.sym 19856 spi_if_ins.spi.r_rx_byte[3] +.sym 19860 spi_if_ins.spi.r_rx_byte[2] +.sym 19865 spi_if_ins.spi.r_rx_byte[5] +.sym 19883 spi_if_ins.spi.r_rx_byte[3] +.sym 19890 spi_if_ins.spi.r_rx_byte[0] +.sym 19896 spi_if_ins.spi.r_rx_byte[4] +.sym 19904 spi_if_ins.spi.r_rx_byte[5] +.sym 19915 spi_if_ins.spi.r_rx_byte[1] +.sym 19920 spi_if_ins.spi.r_rx_byte[2] +.sym 19926 spi_if_ins.spi.r_rx_byte[7] +.sym 19929 spi_if_ins.spi.r3_rx_done_SB_LUT4_I2_O .sym 19930 r_counter[0]_$glb_clk -.sym 19946 io_ctrl_ins.rx_h_b_state_SB_LUT4_I1_O[0] -.sym 19952 spi_if_ins.state_if_SB_DFFE_Q_E -.sym 19956 $PACKER_VCC_NET -.sym 19962 spi_if_ins.state_if[1] -.sym 19975 i_button$SB_IO_IN -.sym 19976 spi_if_ins.state_if_SB_DFFESR_Q_1_D[2] -.sym 19977 io_ctrl_ins.pmod_dir_state[7] -.sym 19978 spi_if_ins.state_if_SB_DFFESR_Q_1_D[1] -.sym 19980 spi_if_ins.o_load_cmd_SB_DFFESR_Q_D[1] -.sym 19982 io_ctrl_ins.o_pmod[5] -.sym 19983 i_button_SB_LUT4_I3_I1[0] -.sym 19984 spi_if_ins.state_if_SB_DFFE_Q_E -.sym 19986 i_button_SB_LUT4_I3_I1[2] -.sym 19988 io_ctrl_ins.pmod_dir_state[5] -.sym 19990 io_ctrl_ins.led0_state_SB_LUT4_I3_O[1] -.sym 19991 spi_if_ins.o_load_cmd_SB_DFFESR_Q_D[2] -.sym 19993 spi_if_ins.o_load_cmd_SB_LUT4_I2_O_SB_LUT4_I3_O[1] -.sym 19995 spi_if_ins.state_if[0] -.sym 19996 spi_if_ins.state_if[1] -.sym 19997 o_rx_h_tx_l$SB_IO_OUT -.sym 19998 spi_if_ins.state_if_SB_DFFESR_Q_1_D[0] -.sym 19999 i_button_SB_LUT4_I3_I1[1] -.sym 20002 sys_ctrl_ins.o_data_out_SB_DFFE_Q_D[1] -.sym 20008 spi_if_ins.o_load_cmd_SB_DFFESR_Q_D[2] -.sym 20012 spi_if_ins.state_if[1] -.sym 20014 spi_if_ins.o_load_cmd_SB_DFFESR_Q_D[1] -.sym 20015 spi_if_ins.state_if[0] -.sym 20018 spi_if_ins.o_load_cmd_SB_LUT4_I2_O_SB_LUT4_I3_O[1] -.sym 20021 io_ctrl_ins.led0_state_SB_LUT4_I3_O[1] -.sym 20024 spi_if_ins.state_if[1] -.sym 20025 spi_if_ins.state_if[0] -.sym 20026 spi_if_ins.o_load_cmd_SB_DFFESR_Q_D[1] -.sym 20027 spi_if_ins.o_load_cmd_SB_DFFESR_Q_D[2] -.sym 20030 i_button_SB_LUT4_I3_I1[2] -.sym 20031 i_button_SB_LUT4_I3_I1[0] -.sym 20032 i_button$SB_IO_IN -.sym 20033 i_button_SB_LUT4_I3_I1[1] -.sym 20036 io_ctrl_ins.led0_state_SB_LUT4_I3_O[1] -.sym 20037 io_ctrl_ins.pmod_dir_state[7] -.sym 20038 o_rx_h_tx_l$SB_IO_OUT -.sym 20039 sys_ctrl_ins.o_data_out_SB_DFFE_Q_D[1] -.sym 20042 io_ctrl_ins.o_pmod[5] -.sym 20043 io_ctrl_ins.led0_state_SB_LUT4_I3_O[1] -.sym 20044 io_ctrl_ins.pmod_dir_state[5] -.sym 20045 i_button_SB_LUT4_I3_I1[1] -.sym 20048 spi_if_ins.state_if_SB_DFFESR_Q_1_D[2] -.sym 20049 spi_if_ins.state_if_SB_DFFESR_Q_1_D[0] -.sym 20050 spi_if_ins.state_if_SB_DFFESR_Q_1_D[1] -.sym 20051 spi_if_ins.o_load_cmd_SB_DFFESR_Q_D[2] -.sym 20052 spi_if_ins.state_if_SB_DFFE_Q_E +.sym 19957 io_ctrl_ins.rf_pin_state[7] +.sym 19963 io_ctrl_ins.rf_pin_state[6] +.sym 19965 io_ctrl_ins.debug_mode_SB_LUT4_I2_O[2] +.sym 19966 w_rx_data[3] +.sym 19978 spi_if_ins.w_rx_data[1] +.sym 19979 spi_if_ins.w_rx_data[6] +.sym 19981 spi_if_ins.w_rx_data[3] +.sym 19982 spi_if_ins.w_rx_data[0] +.sym 19983 spi_if_ins.w_rx_data[4] +.sym 19984 spi_if_ins.w_rx_data[5] +.sym 19987 spi_if_ins.w_rx_data[2] +.sym 19988 spi_if_ins.o_load_cmd_SB_DFFESR_Q_D_SB_LUT4_I1_O[0] +.sym 20000 spi_if_ins.o_data_in_SB_DFFE_Q_E +.sym 20008 spi_if_ins.o_load_cmd_SB_DFFESR_Q_D_SB_LUT4_I1_O[0] +.sym 20012 spi_if_ins.w_rx_data[3] +.sym 20021 spi_if_ins.w_rx_data[1] +.sym 20027 spi_if_ins.w_rx_data[6] +.sym 20031 spi_if_ins.w_rx_data[4] +.sym 20038 spi_if_ins.w_rx_data[2] +.sym 20044 spi_if_ins.w_rx_data[0] +.sym 20051 spi_if_ins.w_rx_data[5] +.sym 20052 spi_if_ins.o_data_in_SB_DFFE_Q_E .sym 20053 r_counter[0]_$glb_clk -.sym 20069 i_button_SB_LUT4_I3_O[1] +.sym 20066 i_config[2]$SB_IO_IN +.sym 20069 w_rx_data[2] .sym 20074 io_pmod[2]$SB_IO_IN -.sym 20077 i_button_SB_LUT4_I3_O[0] -.sym 20083 o_rx_h_tx_l$SB_IO_OUT -.sym 20086 io_ctrl_ins.rx_h_b_state_SB_LUT4_I1_O[1] -.sym 20098 i_button_SB_LUT4_I3_I1[1] -.sym 20099 w_rx_data[4] -.sym 20101 sys_ctrl_ins.o_data_out_SB_DFFE_Q_D[1] -.sym 20103 w_rx_data[3] -.sym 20107 spi_if_ins.o_load_cmd_SB_LUT4_I2_O_SB_LUT4_I2_O -.sym 20109 i_config[2]$SB_IO_IN -.sym 20117 i_button_SB_LUT4_I3_I1[2] -.sym 20118 o_tr_vc1$SB_IO_OUT -.sym 20122 spi_if_ins.o_load_cmd_SB_LUT4_I2_O_SB_LUT4_I3_O[1] -.sym 20129 o_tr_vc1$SB_IO_OUT -.sym 20130 sys_ctrl_ins.o_data_out_SB_DFFE_Q_D[1] -.sym 20131 i_config[2]$SB_IO_IN -.sym 20132 i_button_SB_LUT4_I3_I1[2] -.sym 20144 w_rx_data[4] -.sym 20147 w_rx_data[3] -.sym 20172 i_button_SB_LUT4_I3_I1[1] -.sym 20173 spi_if_ins.o_load_cmd_SB_LUT4_I2_O_SB_LUT4_I3_O[1] -.sym 20175 spi_if_ins.o_load_cmd_SB_LUT4_I2_O_SB_LUT4_I2_O +.sym 20080 w_rx_data[1] +.sym 20087 i_config[0]$SB_IO_IN +.sym 20097 w_rx_data[3] +.sym 20099 w_rx_data[6] +.sym 20100 w_rx_data[4] +.sym 20102 w_rx_data[0] +.sym 20103 w_rx_data[5] +.sym 20104 w_rx_data[7] +.sym 20105 io_ctrl_ins.led1_state_SB_LUT4_I0_I2[1] +.sym 20107 io_ctrl_ins.o_pmod[4] +.sym 20109 io_ctrl_ins.o_data_out_SB_DFFESR_Q_6_R[0] +.sym 20110 io_ctrl_ins.pmod_state_SB_DFFE_Q_E_SB_LUT4_O_I3[0] +.sym 20111 io_ctrl_ins.o_data_out_SB_DFFESR_Q_6_R[1] +.sym 20114 io_ctrl_ins.rf_pin_state_SB_DFFE_Q_E +.sym 20115 i_config[1]$SB_IO_IN +.sym 20129 io_ctrl_ins.o_data_out_SB_DFFESR_Q_6_R[0] +.sym 20131 io_ctrl_ins.o_data_out_SB_DFFESR_Q_6_R[1] +.sym 20137 w_rx_data[6] +.sym 20142 w_rx_data[5] +.sym 20147 io_ctrl_ins.pmod_state_SB_DFFE_Q_E_SB_LUT4_O_I3[0] +.sym 20148 io_ctrl_ins.led1_state_SB_LUT4_I0_I2[1] +.sym 20149 i_config[1]$SB_IO_IN +.sym 20150 io_ctrl_ins.o_pmod[4] +.sym 20153 w_rx_data[0] +.sym 20162 w_rx_data[4] +.sym 20168 w_rx_data[7] +.sym 20171 w_rx_data[3] +.sym 20175 io_ctrl_ins.rf_pin_state_SB_DFFE_Q_E .sym 20176 r_counter[0]_$glb_clk -.sym 20177 i_smi_a1_SB_LUT4_I1_O[2]_$glb_sr -.sym 20195 spi_if_ins.o_load_cmd_SB_LUT4_I2_O_SB_LUT4_I2_O -.sym 20203 io_ctrl_ins.i_cs_SB_LUT4_I3_I0[0] -.sym 20204 w_rx_data[2] -.sym 20205 io_ctrl_ins.debug_mode_SB_LUT4_I2_O[1] -.sym 20206 w_rx_data[1] -.sym 20208 i_config[0]$SB_IO_IN -.sym 20209 o_tr_vc1_b$SB_IO_OUT -.sym 20219 io_ctrl_ins.i_cs_SB_LUT4_I3_I0[0] -.sym 20220 w_rx_data[6] -.sym 20222 io_ctrl_ins.debug_mode_SB_LUT4_I2_O[1] -.sym 20229 io_ctrl_ins.rf_mode[2] -.sym 20230 spi_if_ins.o_load_cmd_SB_LUT4_I2_O_SB_LUT4_I3_O_SB_LUT4_I3_1_O -.sym 20232 o_rx_h_tx_l_b$SB_IO_OUT -.sym 20233 w_ioc[0] -.sym 20238 io_ctrl_ins.o_pmod[6] -.sym 20239 io_ctrl_ins.debug_mode[0] -.sym 20241 io_ctrl_ins.debug_mode[1] -.sym 20247 io_ctrl_ins.debug_mode[0] -.sym 20249 w_rx_data[2] -.sym 20252 io_ctrl_ins.debug_mode[1] -.sym 20253 io_ctrl_ins.rf_mode[2] -.sym 20254 io_ctrl_ins.debug_mode[0] -.sym 20255 io_ctrl_ins.debug_mode_SB_LUT4_I2_O[1] -.sym 20258 io_ctrl_ins.o_pmod[6] -.sym 20259 io_ctrl_ins.i_cs_SB_LUT4_I3_I0[0] -.sym 20260 w_ioc[0] -.sym 20261 o_rx_h_tx_l_b$SB_IO_OUT -.sym 20270 w_rx_data[6] -.sym 20278 io_ctrl_ins.debug_mode[1] -.sym 20279 io_ctrl_ins.debug_mode[0] -.sym 20284 w_rx_data[2] -.sym 20298 spi_if_ins.o_load_cmd_SB_LUT4_I2_O_SB_LUT4_I3_O_SB_LUT4_I3_1_O +.sym 20190 w_tx_data_io[6] +.sym 20200 io_ctrl_ins.pmod_dir_state[7] +.sym 20206 io_ctrl_ins.tr_vc_2_state_SB_LUT4_I1_I3[1] +.sym 20213 io_ctrl_ins.rf_pin_state[3] +.sym 20219 io_ctrl_ins.o_pmod[5] +.sym 20223 w_rx_data[0] +.sym 20225 w_rx_data[5] +.sym 20227 w_rx_data[7] +.sym 20228 i_button$SB_IO_IN +.sym 20229 w_ioc[0] +.sym 20230 io_ctrl_ins.o_pmod[7] +.sym 20232 io_ctrl_ins.o_pmod[0] +.sym 20233 io_ctrl_ins.tr_vc_2_state_SB_LUT4_I1_I3[1] +.sym 20236 io_ctrl_ins.led1_state_SB_LUT4_I0_I2[1] +.sym 20238 w_rx_data[3] +.sym 20239 i_config[2]$SB_IO_IN +.sym 20246 io_ctrl_ins.pmod_state_SB_DFFE_Q_E +.sym 20249 io_ctrl_ins.pmod_state_SB_DFFE_Q_E_SB_LUT4_O_I3[0] +.sym 20250 o_led0$SB_IO_OUT +.sym 20254 w_rx_data[5] +.sym 20258 w_rx_data[3] +.sym 20264 o_led0$SB_IO_OUT +.sym 20265 io_ctrl_ins.led1_state_SB_LUT4_I0_I2[1] +.sym 20266 io_ctrl_ins.o_pmod[0] +.sym 20267 io_ctrl_ins.pmod_state_SB_DFFE_Q_E_SB_LUT4_O_I3[0] +.sym 20272 w_rx_data[7] +.sym 20276 i_button$SB_IO_IN +.sym 20277 io_ctrl_ins.led1_state_SB_LUT4_I0_I2[1] +.sym 20278 io_ctrl_ins.o_pmod[7] +.sym 20279 io_ctrl_ins.pmod_state_SB_DFFE_Q_E_SB_LUT4_O_I3[0] +.sym 20283 w_rx_data[0] +.sym 20289 io_ctrl_ins.tr_vc_2_state_SB_LUT4_I1_I3[1] +.sym 20291 w_ioc[0] +.sym 20294 io_ctrl_ins.pmod_state_SB_DFFE_Q_E_SB_LUT4_O_I3[0] +.sym 20295 io_ctrl_ins.o_pmod[5] +.sym 20296 io_ctrl_ins.led1_state_SB_LUT4_I0_I2[1] +.sym 20297 i_config[2]$SB_IO_IN +.sym 20298 io_ctrl_ins.pmod_state_SB_DFFE_Q_E .sym 20299 r_counter[0]_$glb_clk -.sym 20313 io_ctrl_ins.debug_mode_SB_LUT4_I0_O -.sym 20342 io_ctrl_ins.rf_pin_state[7] -.sym 20344 io_ctrl_ins.tr_vc_1_state_SB_DFFE_Q_D_SB_LUT4_O_I0[0] -.sym 20346 io_ctrl_ins.rf_mode[2] -.sym 20353 io_ctrl_ins.rf_pin_state[0] -.sym 20354 io_ctrl_ins.debug_mode_SB_LUT4_I2_O[2] -.sym 20355 io_ctrl_ins.rf_mode[0] -.sym 20357 io_ctrl_ins.rf_pin_state[6] -.sym 20358 io_ctrl_ins.rf_pin_state[4] -.sym 20362 io_ctrl_ins.rf_pin_state[5] -.sym 20364 io_ctrl_ins.rf_pin_state[3] -.sym 20365 io_ctrl_ins.debug_mode_SB_LUT4_I2_O[1] -.sym 20369 io_ctrl_ins.debug_mode_SB_LUT4_I0_O -.sym 20370 io_ctrl_ins.rx_h_state_SB_DFFE_Q_D_SB_LUT4_O_I3[2] -.sym 20375 io_ctrl_ins.rf_pin_state[0] -.sym 20376 io_ctrl_ins.debug_mode_SB_LUT4_I2_O[1] -.sym 20377 io_ctrl_ins.rf_mode[2] -.sym 20378 io_ctrl_ins.debug_mode_SB_LUT4_I2_O[2] -.sym 20381 io_ctrl_ins.debug_mode_SB_LUT4_I2_O[1] -.sym 20382 io_ctrl_ins.rf_pin_state[4] -.sym 20383 io_ctrl_ins.debug_mode_SB_LUT4_I2_O[2] -.sym 20384 io_ctrl_ins.tr_vc_1_state_SB_DFFE_Q_D_SB_LUT4_O_I0[0] -.sym 20387 io_ctrl_ins.rf_pin_state[7] -.sym 20388 io_ctrl_ins.rx_h_state_SB_DFFE_Q_D_SB_LUT4_O_I3[2] -.sym 20390 io_ctrl_ins.debug_mode_SB_LUT4_I2_O[2] -.sym 20393 io_ctrl_ins.debug_mode_SB_LUT4_I2_O[1] -.sym 20394 io_ctrl_ins.tr_vc_1_state_SB_DFFE_Q_D_SB_LUT4_O_I0[0] -.sym 20395 io_ctrl_ins.debug_mode_SB_LUT4_I2_O[2] -.sym 20396 io_ctrl_ins.rf_pin_state[5] -.sym 20399 io_ctrl_ins.rf_mode[2] -.sym 20400 io_ctrl_ins.debug_mode_SB_LUT4_I2_O[1] -.sym 20401 io_ctrl_ins.rf_mode[0] -.sym 20402 io_ctrl_ins.debug_mode_SB_LUT4_I2_O[2] -.sym 20405 io_ctrl_ins.rx_h_state_SB_DFFE_Q_D_SB_LUT4_O_I3[2] -.sym 20407 io_ctrl_ins.debug_mode_SB_LUT4_I2_O[2] -.sym 20408 io_ctrl_ins.rf_pin_state[6] -.sym 20411 io_ctrl_ins.rf_pin_state[3] -.sym 20412 io_ctrl_ins.debug_mode_SB_LUT4_I2_O[1] -.sym 20413 io_ctrl_ins.rf_mode[2] -.sym 20414 io_ctrl_ins.debug_mode_SB_LUT4_I2_O[2] -.sym 20421 io_ctrl_ins.debug_mode_SB_LUT4_I0_O +.sym 20317 o_rx_h_tx_l_b$SB_IO_OUT +.sym 20327 io_ctrl_ins.rx_h_b_state_SB_LUT4_I0_O[1] +.sym 20342 io_ctrl_ins.tr_vc_2_state_SB_LUT4_I1_O[2] +.sym 20343 w_ioc[0] +.sym 20345 io_ctrl_ins.o_data_out_SB_DFFESR_Q_6_R[0] +.sym 20346 io_ctrl_ins.ldo2v8_state_SB_LUT4_I3_O[0] +.sym 20347 io_ctrl_ins.ldo2v8_state_SB_LUT4_I3_O[2] +.sym 20348 io_ctrl_ins.ldo2v8_state_SB_LUT4_I3_O[1] +.sym 20349 io_ctrl_ins.ldo2v8_state_SB_LUT4_I3_O[3] +.sym 20350 io_ctrl_ins.led1_state_SB_LUT4_I0_I2[2] +.sym 20351 io_ctrl_ins.o_pmod[3] +.sym 20352 io_ctrl_ins.led1_state_SB_LUT4_I0_I2[3] +.sym 20353 io_ctrl_ins.led1_state_SB_LUT4_I0_I2[1] +.sym 20354 io_ctrl_ins.pmod_dir_state[3] +.sym 20355 o_tr_vc2$SB_IO_OUT +.sym 20356 io_ctrl_ins.tr_vc_2_state_SB_LUT4_I1_I3_SB_LUT4_I2_O[0] +.sym 20357 i_config[3]$SB_IO_IN +.sym 20358 o_led1$SB_IO_OUT +.sym 20359 i_config[0]$SB_IO_IN +.sym 20361 io_ctrl_ins.tr_vc_2_state_SB_LUT4_I1_O[3] +.sym 20362 io_ctrl_ins.o_data_out_SB_DFFESR_Q_R +.sym 20365 o_rx_h_tx_l_b$SB_IO_OUT +.sym 20366 io_ctrl_ins.tr_vc_2_state_SB_LUT4_I1_I3[1] +.sym 20369 io_ctrl_ins.o_data_out_SB_DFFESR_Q_E[3] +.sym 20371 io_ctrl_ins.debug_mode_SB_LUT4_I2_O[1] +.sym 20375 o_tr_vc2$SB_IO_OUT +.sym 20376 w_ioc[0] +.sym 20377 io_ctrl_ins.o_pmod[3] +.sym 20378 io_ctrl_ins.tr_vc_2_state_SB_LUT4_I1_I3[1] +.sym 20381 io_ctrl_ins.led1_state_SB_LUT4_I0_I2[2] +.sym 20382 o_led1$SB_IO_OUT +.sym 20383 io_ctrl_ins.led1_state_SB_LUT4_I0_I2[3] +.sym 20384 io_ctrl_ins.led1_state_SB_LUT4_I0_I2[1] +.sym 20393 i_config[0]$SB_IO_IN +.sym 20394 io_ctrl_ins.led1_state_SB_LUT4_I0_I2[1] +.sym 20395 io_ctrl_ins.o_data_out_SB_DFFESR_Q_6_R[0] +.sym 20396 io_ctrl_ins.debug_mode_SB_LUT4_I2_O[1] +.sym 20405 io_ctrl_ins.tr_vc_2_state_SB_LUT4_I1_I3_SB_LUT4_I2_O[0] +.sym 20406 i_config[3]$SB_IO_IN +.sym 20407 o_rx_h_tx_l_b$SB_IO_OUT +.sym 20408 io_ctrl_ins.led1_state_SB_LUT4_I0_I2[1] +.sym 20411 io_ctrl_ins.tr_vc_2_state_SB_LUT4_I1_O[2] +.sym 20412 io_ctrl_ins.tr_vc_2_state_SB_LUT4_I1_O[3] +.sym 20413 io_ctrl_ins.ldo2v8_state_SB_LUT4_I3_O[1] +.sym 20414 io_ctrl_ins.pmod_dir_state[3] +.sym 20417 io_ctrl_ins.ldo2v8_state_SB_LUT4_I3_O[3] +.sym 20418 io_ctrl_ins.ldo2v8_state_SB_LUT4_I3_O[1] +.sym 20419 io_ctrl_ins.ldo2v8_state_SB_LUT4_I3_O[2] +.sym 20420 io_ctrl_ins.ldo2v8_state_SB_LUT4_I3_O[0] +.sym 20421 io_ctrl_ins.o_data_out_SB_DFFESR_Q_E[3] .sym 20422 r_counter[0]_$glb_clk -.sym 20438 o_rx_h_tx_l_b$SB_IO_OUT -.sym 20444 o_tr_vc1$SB_IO_OUT -.sym 20449 o_rx_h_tx_l$SB_IO_OUT -.sym 20467 io_ctrl_ins.debug_mode_SB_LUT4_I0_O -.sym 20469 io_ctrl_ins.debug_mode_SB_LUT4_I2_O[0] -.sym 20473 io_ctrl_ins.debug_mode_SB_LUT4_I2_O[2] -.sym 20474 io_ctrl_ins.rf_mode[2] -.sym 20475 io_ctrl_ins.debug_mode_SB_LUT4_I2_O[1] -.sym 20476 io_ctrl_ins.rf_pin_state[2] -.sym 20499 io_ctrl_ins.debug_mode_SB_LUT4_I2_O[1] -.sym 20500 io_ctrl_ins.debug_mode_SB_LUT4_I2_O[0] -.sym 20501 io_ctrl_ins.debug_mode_SB_LUT4_I2_O[2] -.sym 20534 io_ctrl_ins.rf_pin_state[2] -.sym 20535 io_ctrl_ins.debug_mode_SB_LUT4_I2_O[2] -.sym 20536 io_ctrl_ins.rf_mode[2] -.sym 20537 io_ctrl_ins.debug_mode_SB_LUT4_I2_O[1] +.sym 20423 io_ctrl_ins.o_data_out_SB_DFFESR_Q_R +.sym 20442 io_ctrl_ins.rf_mode[2] +.sym 20466 io_ctrl_ins.rf_mode[2] +.sym 20476 io_ctrl_ins.debug_mode_SB_LUT4_I0_O +.sym 20478 io_ctrl_ins.debug_mode_SB_LUT4_I2_O[3] +.sym 20483 io_ctrl_ins.rf_pin_state[3] +.sym 20489 io_ctrl_ins.debug_mode_SB_LUT4_I2_O[1] +.sym 20528 io_ctrl_ins.rf_mode[2] +.sym 20529 io_ctrl_ins.rf_pin_state[3] +.sym 20530 io_ctrl_ins.debug_mode_SB_LUT4_I2_O[1] +.sym 20531 io_ctrl_ins.debug_mode_SB_LUT4_I2_O[3] .sym 20544 io_ctrl_ins.debug_mode_SB_LUT4_I0_O .sym 20545 r_counter[0]_$glb_clk -.sym 20563 io_ctrl_ins.debug_mode_SB_LUT4_I0_O +.sym 20578 o_tr_vc2$SB_IO_OUT +.sym 20579 i_config[0]$SB_IO_IN .sym 20672 i_config[0]$SB_IO_IN -.sym 20690 o_led1$SB_IO_OUT -.sym 20695 i_config[0]$SB_IO_IN +.sym 20699 o_led1$SB_IO_OUT .sym 20748 io_smi_data[5]$SB_IO_OUT -.sym 20757 io_smi_data[5]$SB_IO_OUT +.sym 20768 io_smi_data[5]$SB_IO_OUT +.sym 20770 rx_09_fifo.rd_addr_gray_wr[2] +.sym 20771 rx_09_fifo.rd_addr_gray_wr[3] +.sym 20773 rx_09_fifo.rd_addr_gray_wr[4] .sym 20802 $io_pmod[3]$iobuf_i -.sym 20805 io_smi_data[5]$SB_IO_OUT -.sym 20842 i_mosi$SB_IO_IN -.sym 20902 i_ss_SB_LUT4_I3_O -.sym 20926 i_mosi$SB_IO_IN -.sym 20935 i_mosi$SB_IO_IN -.sym 21035 int_miso -.sym 21231 io_pmod[2]$SB_IO_IN -.sym 21235 spi_if_ins.spi.o_spi_miso_SB_DFFE_Q_E -.sym 21499 spi_if_ins.o_load_cmd_SB_DFFESR_Q_D[1] -.sym 21546 i_smi_soe_se$rename$0 -.sym 21558 spi_if_ins.state_if_SB_DFFE_Q_E +.sym 20804 io_pmod[6]$SB_IO_IN +.sym 20844 i_mosi$SB_IO_IN +.sym 20847 rx_09_fifo.rd_addr_gray[2] +.sym 20849 rx_09_fifo.rd_addr_gray[4] +.sym 20853 rx_09_fifo.rd_addr_gray[3] +.sym 20889 io_pmod[4]$SB_IO_IN +.sym 20907 i_ss_SB_LUT4_I3_O +.sym 20933 int_miso +.sym 21034 smi_ctrl_ins.r_fifo_09_pull_SB_LUT4_I3_1_O +.sym 21047 spi_if_ins.r_tx_byte[7] +.sym 21087 int_miso +.sym 21138 $PACKER_VCC_NET +.sym 21147 i_ss_SB_LUT4_I3_O +.sym 21293 i_ss_SB_LUT4_I3_O +.sym 21295 $io_pmod[7]$iobuf_i +.sym 21297 $io_pmod[5]$iobuf_i +.sym 21348 io_pmod[4]$SB_IO_IN +.sym 21396 spi_if_ins.spi.r_rx_done +.sym 21434 io_pmod[5]$SB_IO_IN +.sym 21437 i_ss_SB_LUT4_I3_O +.sym 21439 $io_pmod[5]$iobuf_i +.sym 21449 i_mosi$SB_IO_IN +.sym 21494 $io_pmod[6]$iobuf_i +.sym 21536 i_smi_soe_se$rename$0 +.sym 21545 $io_pmod[2]$iobuf_i .sym 21639 io_pmod[2]$SB_IO_IN -.sym 21702 io_ctrl_ins.led0_state_SB_LUT4_I3_I0[1] -.sym 21704 w_tx_data_io[6] -.sym 21749 $PACKER_VCC_NET -.sym 21804 w_tx_data_io[7] -.sym 21807 w_tx_data_io[5] -.sym 21845 io_ctrl_ins.rx_h_b_state_SB_LUT4_I1_O[1] -.sym 21851 io_ctrl_ins.o_data_out_SB_DFFESR_Q_6_E -.sym 21945 w_smi_read_req -.sym 22106 $PACKER_GND_NET -.sym 22155 o_rx_h_tx_l$SB_IO_OUT -.sym 22257 $PACKER_GND_NET -.sym 22360 o_tr_vc1_b$SB_IO_OUT -.sym 22466 o_led0$SB_IO_OUT +.sym 21756 w_tx_data_io[0] +.sym 21761 io_ctrl_ins.o_data_out_SB_DFFESR_Q_R +.sym 21800 w_tx_data_io[0] +.sym 21802 w_tx_data_io[4] +.sym 21855 io_ctrl_ins.tr_vc_1_state_SB_LUT4_I0_O[0] +.sym 21856 w_tx_data_io[7] +.sym 21857 io_ctrl_ins.debug_mode_SB_LUT4_I2_O[1] +.sym 21859 io_ctrl_ins.led0_state_SB_LUT4_I3_O[2] +.sym 21861 i_button_SB_LUT4_I3_O[0] +.sym 21864 w_tx_data_io[5] +.sym 21904 io_ctrl_ins.tr_vc_1_state_SB_LUT4_I0_O[1] +.sym 21905 w_tx_data_io[5] +.sym 21906 w_tx_data_io[6] +.sym 21907 i_button_SB_LUT4_I3_O[1] +.sym 21909 w_tx_data_io[7] +.sym 22004 io_ctrl_ins.tr_vc_1_b_state_SB_LUT4_I1_O[2] +.sym 22005 o_tr_vc1$SB_IO_OUT +.sym 22006 io_ctrl_ins.led0_state_SB_LUT4_I3_O[2] +.sym 22007 io_ctrl_ins.rx_h_state_SB_DFFE_Q_D_SB_LUT4_O_I3[2] +.sym 22008 o_tr_vc1_b$SB_IO_OUT +.sym 22009 o_rx_h_tx_l_b$SB_IO_OUT +.sym 22010 o_rx_h_tx_l$SB_IO_OUT +.sym 22011 io_ctrl_ins.mixer_en_state +.sym 22051 io_ctrl_ins.rx_h_b_state_SB_LUT4_I0_O[1] +.sym 22055 io_ctrl_ins.o_data_out_SB_DFFESR_Q_6_E +.sym 22057 io_ctrl_ins.ldo2v8_state_SB_LUT4_I3_O[1] +.sym 22109 io_ctrl_ins.debug_mode_SB_LUT4_I2_O[0] +.sym 22148 io_ctrl_ins.rf_pin_state[7] +.sym 22149 o_rx_h_tx_l$SB_IO_OUT +.sym 22156 io_ctrl_ins.rf_pin_state[6] +.sym 22158 io_ctrl_ins.debug_mode_SB_LUT4_I2_O[2] +.sym 22164 io_ctrl_ins.rf_pin_state[0] +.sym 22166 io_ctrl_ins.rf_pin_state[4] +.sym 22168 $PACKER_GND_NET +.sym 22258 o_tr_vc2$SB_IO_OUT +.sym 22471 o_led0$SB_IO_OUT .sym 22487 o_led1$SB_IO_OUT -.sym 22505 o_led1$SB_IO_OUT -.sym 22520 int_miso -.sym 22522 i_ss_SB_LUT4_I3_O -.sym 22527 int_miso -.sym 22528 i_ss_SB_LUT4_I3_O +.sym 22496 o_led1$SB_IO_OUT +.sym 22517 int_miso +.sym 22519 i_ss_SB_LUT4_I3_O +.sym 22533 i_ss_SB_LUT4_I3_O +.sym 22541 int_miso +.sym 22563 i_mosi$SB_IO_IN .sym 22574 i_sck$SB_IO_IN -.sym 22575 int_miso +.sym 22576 io_pmod[7]$SB_IO_IN +.sym 22585 rx_09_fifo.rd_addr_gray[2] +.sym 22591 rx_09_fifo.rd_addr_gray[3] +.sym 22595 rx_09_fifo.rd_addr_gray[4] +.sym 22618 rx_09_fifo.rd_addr_gray[2] +.sym 22623 rx_09_fifo.rd_addr_gray[3] +.sym 22638 rx_09_fifo.rd_addr_gray[4] +.sym 22664 lvds_clock_buf .sym 22666 i_sck$SB_IO_IN .sym 22668 i_ss$SB_IO_IN +.sym 22682 io_pmod[6]$SB_IO_IN +.sym 22698 i_ss$SB_IO_IN +.sym 22711 rx_09_fifo.rd_addr_gray_SB_LUT4_I2_O[3] +.sym 22713 io_pmod_SB_DFFSS_Q_D_SB_LUT4_O_I0_SB_LUT4_O_1_I1_SB_LUT4_O_I2[1] +.sym 22715 rx_09_fifo.rd_addr_gray_SB_LUT4_I2_O[2] +.sym 22722 io_pmod_SB_DFFSS_Q_D_SB_LUT4_O_I0_SB_LUT4_O_1_I1_SB_LUT4_O_I0[3] .sym 22724 i_ss$SB_IO_IN -.sym 22728 i_ss$SB_IO_IN -.sym 22972 io_smi_data[5]$SB_IO_OUT -.sym 23089 $io_pmod[4]$iobuf_i -.sym 23205 $io_pmod[7]$iobuf_i -.sym 23210 io_pmod[6]$SB_IO_IN -.sym 23223 io_pmod[4]$SB_IO_IN -.sym 23326 $io_pmod[6]$iobuf_i -.sym 23340 io_pmod[5]$SB_IO_IN -.sym 23354 spi_if_ins.o_load_cmd_SB_DFFESR_Q_D[2] -.sym 23470 spi_if_ins.o_load_cmd_SB_DFFESR_Q_D[1] -.sym 23501 spi_if_ins.state_if_SB_DFFESR_Q_1_D[2] -.sym 23512 spi_if_ins.state_if_SB_DFFE_Q_E -.sym 23514 spi_if_ins.o_load_cmd_SB_DFFESR_Q_D[2] -.sym 23551 spi_if_ins.state_if_SB_DFFESR_Q_1_D[2] -.sym 23564 spi_if_ins.state_if_SB_DFFE_Q_E -.sym 23565 r_counter[0]_$glb_clk -.sym 23566 spi_if_ins.o_load_cmd_SB_DFFESR_Q_D[2] +.sym 22729 $PACKER_VCC_NET +.sym 22758 smi_ctrl_ins.r_fifo_09_pull_SB_LUT4_I3_1_O +.sym 22768 rx_09_fifo.rd_addr_gray_SB_LUT4_I2_O[3] +.sym 22770 io_pmod_SB_DFFSS_Q_D_SB_LUT4_O_I0_SB_LUT4_O_1_I1_SB_LUT4_O_I2[1] +.sym 22772 rx_09_fifo.rd_addr_gray_SB_LUT4_I2_O[2] +.sym 22778 io_pmod_SB_DFFSS_Q_D_SB_LUT4_O_I0_SB_LUT4_O_1_I1_SB_LUT4_O_I0[3] +.sym 22788 rx_09_fifo.rd_addr_gray_SB_LUT4_I2_O[3] +.sym 22789 rx_09_fifo.rd_addr_gray_SB_LUT4_I2_O[2] +.sym 22800 io_pmod_SB_DFFSS_Q_D_SB_LUT4_O_I0_SB_LUT4_O_1_I1_SB_LUT4_O_I2[1] +.sym 22801 io_pmod_SB_DFFSS_Q_D_SB_LUT4_O_I0_SB_LUT4_O_1_I1_SB_LUT4_O_I0[3] +.sym 22822 rx_09_fifo.rd_addr_gray_SB_LUT4_I2_O[3] +.sym 22824 io_pmod_SB_DFFSS_Q_D_SB_LUT4_O_I0_SB_LUT4_O_1_I1_SB_LUT4_O_I2[1] +.sym 22826 smi_ctrl_ins.r_fifo_09_pull_SB_LUT4_I3_1_O +.sym 22827 r_counter[0]_$glb_clk +.sym 22828 i_smi_a1_SB_LUT4_I1_O_SB_LUT4_O_I2_SB_LUT4_I0_O[2]_$glb_sr +.sym 22829 $PACKER_VCC_NET +.sym 22862 $PACKER_VCC_NET +.sym 22963 w_rx_09_fifo_data[1] +.sym 22967 i_smi_a3$SB_IO_IN +.sym 22971 $PACKER_VCC_NET +.sym 22976 i_ss$SB_IO_IN +.sym 23004 spi_if_ins.spi.o_spi_miso_SB_DFFE_Q_E +.sym 23006 spi_if_ins.r_tx_byte[7] +.sym 23020 spi_if_ins.r_tx_data_valid_SB_LUT4_I3_O[1] +.sym 23023 spi_if_ins.r_tx_data_valid_SB_LUT4_I3_O[2] +.sym 23033 spi_if_ins.r_tx_byte[7] +.sym 23034 spi_if_ins.r_tx_data_valid_SB_LUT4_I3_O[2] +.sym 23035 spi_if_ins.r_tx_data_valid_SB_LUT4_I3_O[1] +.sym 23072 spi_if_ins.spi.o_spi_miso_SB_DFFE_Q_E +.sym 23073 r_counter[0]_$glb_clk +.sym 23092 spi_if_ins.spi.o_spi_miso_SB_DFFE_Q_E +.sym 23094 io_pmod[4]$SB_IO_IN +.sym 23222 i_ss$SB_IO_IN +.sym 23244 io_pmod[5]$SB_IO_IN +.sym 23248 i_ss$SB_IO_IN +.sym 23258 w_rx_09_fifo_data[1] +.sym 23263 lvds_rx_09_inst.r_state_if_SB_LUT4_I2_O[0] +.sym 23293 i_ss$SB_IO_IN +.sym 23302 lvds_rx_09_inst.r_state_if_SB_LUT4_I2_O[0] +.sym 23304 io_pmod[5]$SB_IO_IN +.sym 23314 lvds_rx_09_inst.r_state_if_SB_LUT4_I2_O[0] +.sym 23316 w_rx_09_fifo_data[1] +.sym 23318 w_lvds_rx_09_d1_SB_LUT4_I0_O_SB_LUT4_I3_O_$glb_ce +.sym 23319 lvds_clock_buf +.sym 23320 i_smi_a1_SB_LUT4_I1_O_SB_LUT4_O_I2_SB_LUT4_I0_O[2]_$glb_sr +.sym 23323 spi_if_ins.spi.r3_rx_done_SB_LUT4_I2_O +.sym 23324 spi_if_ins.spi.r3_rx_done +.sym 23325 spi_if_ins.spi.r2_rx_done +.sym 23335 $io_pmod[7]$iobuf_i +.sym 23355 $PACKER_VCC_NET +.sym 23364 spi_if_ins.spi.r_rx_done_SB_DFFER_Q_E +.sym 23382 i_ss$SB_IO_IN +.sym 23392 spi_if_ins.spi.r_rx_done_SB_DFFER_Q_D[1] +.sym 23420 spi_if_ins.spi.r_rx_done_SB_DFFER_Q_D[1] +.sym 23441 spi_if_ins.spi.r_rx_done_SB_DFFER_Q_E +.sym 23442 i_sck$SB_IO_IN_$glb_clk +.sym 23443 i_ss$SB_IO_IN +.sym 23460 spi_if_ins.spi.r_rx_done_SB_DFFER_Q_E +.sym 23489 lvds_rx_09_inst.r_state_if_SB_LUT4_I2_O[0] +.sym 23490 io_pmod[4]$SB_IO_IN +.sym 23520 lvds_rx_09_inst.r_state_if_SB_LUT4_I2_O[0] +.sym 23521 io_pmod[4]$SB_IO_IN +.sym 23564 w_lvds_rx_09_d1_SB_LUT4_I0_O_SB_LUT4_I3_O_$glb_ce +.sym 23565 lvds_clock_buf +.sym 23566 i_smi_a1_SB_LUT4_I1_O_SB_LUT4_O_I2_SB_LUT4_I0_O[2]_$glb_sr .sym 23567 r_counter[0] -.sym 23592 w_tx_data_io[6] -.sym 23718 io_ctrl_ins.tr_vc_1_state_SB_LUT4_I0_O[1] -.sym 23733 io_ctrl_ins.o_data_out_SB_DFFESR_Q_6_E -.sym 23745 io_ctrl_ins.rx_h_b_state_SB_LUT4_I1_O[1] -.sym 23749 io_ctrl_ins.rx_h_b_state_SB_LUT4_I1_O[0] -.sym 23760 io_ctrl_ins.led0_state_SB_LUT4_I3_I0[1] -.sym 23790 io_ctrl_ins.led0_state_SB_LUT4_I3_I0[1] -.sym 23801 io_ctrl_ins.rx_h_b_state_SB_LUT4_I1_O[1] -.sym 23802 io_ctrl_ins.rx_h_b_state_SB_LUT4_I1_O[0] -.sym 23810 io_ctrl_ins.o_data_out_SB_DFFESR_Q_6_E -.sym 23811 r_counter[0]_$glb_clk -.sym 23812 io_ctrl_ins.led0_state_SB_LUT4_I3_I0[1] -.sym 23833 spi_if_ins.state_if_SB_DFFE_Q_E -.sym 23856 io_ctrl_ins.o_data_out_SB_DFFESR_Q_6_E -.sym 23858 io_ctrl_ins.led0_state_SB_LUT4_I3_I0[1] -.sym 23870 i_button_SB_LUT4_I3_O[0] -.sym 23872 i_button_SB_LUT4_I3_O[1] -.sym 23878 io_ctrl_ins.tr_vc_1_state_SB_LUT4_I0_O[1] -.sym 23882 io_ctrl_ins.tr_vc_1_state_SB_LUT4_I0_O[0] -.sym 23911 i_button_SB_LUT4_I3_O[1] -.sym 23913 i_button_SB_LUT4_I3_O[0] -.sym 23929 io_ctrl_ins.tr_vc_1_state_SB_LUT4_I0_O[0] -.sym 23931 io_ctrl_ins.tr_vc_1_state_SB_LUT4_I0_O[1] -.sym 23933 io_ctrl_ins.o_data_out_SB_DFFESR_Q_6_E +.sym 23579 $io_pmod[6]$iobuf_i +.sym 23602 io_ctrl_ins.pmod_dir_state_SB_DFFE_Q_E +.sym 23716 w_smi_read_req +.sym 23718 io_ctrl_ins.tr_vc_1_b_state_SB_LUT4_I1_O[3] +.sym 23820 io_ctrl_ins.pmod_dir_state[5] +.sym 23837 io_ctrl_ins.tr_vc_1_b_state_SB_LUT4_I1_O[2] +.sym 23843 io_ctrl_ins.tr_vc_2_state_SB_LUT4_I1_I3_SB_LUT4_I2_O[0] +.sym 23845 io_ctrl_ins.led0_state_SB_LUT4_I3_O[3] +.sym 23848 io_ctrl_ins.debug_mode_SB_LUT4_I0_O +.sym 23855 io_ctrl_ins.pmod_dir_state[4] +.sym 23856 io_ctrl_ins.led0_state_SB_LUT4_I3_O[3] +.sym 23861 io_ctrl_ins.led0_state_SB_LUT4_I3_O[0] +.sym 23863 io_ctrl_ins.tr_vc_1_b_state_SB_LUT4_I1_O[2] +.sym 23867 io_ctrl_ins.o_data_out_SB_DFFESR_Q_R +.sym 23878 io_ctrl_ins.tr_vc_1_b_state_SB_LUT4_I1_O[3] +.sym 23881 io_ctrl_ins.o_data_out_SB_DFFESR_Q_E[3] +.sym 23882 io_ctrl_ins.led0_state_SB_LUT4_I3_O[2] +.sym 23883 io_ctrl_ins.ldo2v8_state_SB_LUT4_I3_O[1] +.sym 23887 io_ctrl_ins.led0_state_SB_LUT4_I3_O[3] +.sym 23888 io_ctrl_ins.led0_state_SB_LUT4_I3_O[0] +.sym 23889 io_ctrl_ins.ldo2v8_state_SB_LUT4_I3_O[1] +.sym 23890 io_ctrl_ins.led0_state_SB_LUT4_I3_O[2] +.sym 23899 io_ctrl_ins.tr_vc_1_b_state_SB_LUT4_I1_O[2] +.sym 23900 io_ctrl_ins.pmod_dir_state[4] +.sym 23901 io_ctrl_ins.ldo2v8_state_SB_LUT4_I3_O[1] +.sym 23902 io_ctrl_ins.tr_vc_1_b_state_SB_LUT4_I1_O[3] +.sym 23933 io_ctrl_ins.o_data_out_SB_DFFESR_Q_E[3] .sym 23934 r_counter[0]_$glb_clk -.sym 23935 io_ctrl_ins.led0_state_SB_LUT4_I3_I0[1] -.sym 23950 io_ctrl_ins.o_data_out_SB_DFFESR_Q_6_E -.sym 23951 $io_pmod[2]$iobuf_i -.sym 24187 o_rx_h_tx_l_b$SB_IO_OUT -.sym 24214 $PACKER_GND_NET +.sym 23935 io_ctrl_ins.o_data_out_SB_DFFESR_Q_R +.sym 23949 io_ctrl_ins.pmod_dir_state[4] +.sym 23967 o_tr_vc1$SB_IO_OUT +.sym 23978 o_tr_vc1$SB_IO_OUT +.sym 23979 io_ctrl_ins.o_data_out_SB_DFFESR_Q_6_E +.sym 23981 io_ctrl_ins.ldo2v8_state_SB_LUT4_I3_O[1] +.sym 23982 io_ctrl_ins.tr_vc_1_state_SB_LUT4_I0_O[0] +.sym 23983 io_ctrl_ins.rx_h_b_state_SB_LUT4_I0_O[1] +.sym 23988 i_button_SB_LUT4_I3_O[0] +.sym 23990 io_ctrl_ins.o_data_out_SB_DFFESR_Q_6_R[1] +.sym 23991 o_rx_h_tx_l$SB_IO_OUT +.sym 23992 io_ctrl_ins.pmod_dir_state[5] +.sym 23993 io_ctrl_ins.pmod_dir_state[7] +.sym 23995 io_ctrl_ins.tr_vc_1_state_SB_LUT4_I0_O[1] +.sym 23998 i_button_SB_LUT4_I3_O[1] +.sym 24003 io_ctrl_ins.tr_vc_2_state_SB_LUT4_I1_I3_SB_LUT4_I2_O[0] +.sym 24006 io_ctrl_ins.rx_h_b_state_SB_LUT4_I0_O[0] +.sym 24022 io_ctrl_ins.ldo2v8_state_SB_LUT4_I3_O[1] +.sym 24023 o_tr_vc1$SB_IO_OUT +.sym 24024 io_ctrl_ins.pmod_dir_state[5] +.sym 24025 io_ctrl_ins.tr_vc_2_state_SB_LUT4_I1_I3_SB_LUT4_I2_O[0] +.sym 24028 io_ctrl_ins.tr_vc_1_state_SB_LUT4_I0_O[0] +.sym 24031 io_ctrl_ins.tr_vc_1_state_SB_LUT4_I0_O[1] +.sym 24034 io_ctrl_ins.rx_h_b_state_SB_LUT4_I0_O[1] +.sym 24036 io_ctrl_ins.rx_h_b_state_SB_LUT4_I0_O[0] +.sym 24040 o_rx_h_tx_l$SB_IO_OUT +.sym 24041 io_ctrl_ins.ldo2v8_state_SB_LUT4_I3_O[1] +.sym 24042 io_ctrl_ins.tr_vc_2_state_SB_LUT4_I1_I3_SB_LUT4_I2_O[0] +.sym 24043 io_ctrl_ins.pmod_dir_state[7] +.sym 24054 i_button_SB_LUT4_I3_O[1] +.sym 24055 i_button_SB_LUT4_I3_O[0] +.sym 24056 io_ctrl_ins.o_data_out_SB_DFFESR_Q_6_E +.sym 24057 r_counter[0]_$glb_clk +.sym 24058 io_ctrl_ins.o_data_out_SB_DFFESR_Q_6_R[1] +.sym 24082 $PACKER_GND_NET +.sym 24083 o_tr_vc1_b$SB_IO_OUT +.sym 24085 o_rx_h_tx_l_b$SB_IO_OUT +.sym 24100 io_ctrl_ins.debug_mode_SB_LUT4_I2_O[1] +.sym 24102 io_ctrl_ins.debug_mode_SB_LUT4_I2_O[1] +.sym 24103 io_ctrl_ins.debug_mode_SB_LUT4_I2_O[0] +.sym 24104 io_ctrl_ins.debug_mode_SB_LUT4_I2_O[3] +.sym 24105 io_ctrl_ins.debug_mode_SB_LUT4_I2_O[2] +.sym 24107 io_ctrl_ins.mixer_en_state +.sym 24108 io_ctrl_ins.debug_mode_SB_LUT4_I2_O[1] +.sym 24111 io_ctrl_ins.rf_pin_state[6] +.sym 24113 io_ctrl_ins.rf_pin_state[7] +.sym 24115 io_ctrl_ins.debug_mode[0] +.sym 24118 io_ctrl_ins.debug_mode_SB_LUT4_I0_O +.sym 24119 io_ctrl_ins.rx_h_state_SB_DFFE_Q_D_SB_LUT4_O_I3[2] +.sym 24120 o_tr_vc1_b$SB_IO_OUT +.sym 24121 io_ctrl_ins.rf_mode[2] +.sym 24123 io_ctrl_ins.rf_mode[0] +.sym 24124 io_ctrl_ins.rf_pin_state[0] +.sym 24126 io_ctrl_ins.rf_pin_state[4] +.sym 24128 io_ctrl_ins.tr_vc_2_state_SB_LUT4_I1_I3_SB_LUT4_I2_O[0] +.sym 24129 io_ctrl_ins.rf_mode[2] +.sym 24131 io_ctrl_ins.o_data_out_SB_DFFESR_Q_6_R[0] +.sym 24133 io_ctrl_ins.o_data_out_SB_DFFESR_Q_6_R[0] +.sym 24134 io_ctrl_ins.rf_mode[2] +.sym 24135 o_tr_vc1_b$SB_IO_OUT +.sym 24136 io_ctrl_ins.tr_vc_2_state_SB_LUT4_I1_I3_SB_LUT4_I2_O[0] +.sym 24139 io_ctrl_ins.debug_mode_SB_LUT4_I2_O[2] +.sym 24140 io_ctrl_ins.debug_mode_SB_LUT4_I2_O[3] +.sym 24141 io_ctrl_ins.debug_mode_SB_LUT4_I2_O[0] +.sym 24142 io_ctrl_ins.debug_mode_SB_LUT4_I2_O[1] +.sym 24145 io_ctrl_ins.o_data_out_SB_DFFESR_Q_6_R[0] +.sym 24146 io_ctrl_ins.tr_vc_2_state_SB_LUT4_I1_I3_SB_LUT4_I2_O[0] +.sym 24147 io_ctrl_ins.debug_mode[0] +.sym 24148 io_ctrl_ins.mixer_en_state +.sym 24151 io_ctrl_ins.rf_mode[0] +.sym 24152 io_ctrl_ins.debug_mode_SB_LUT4_I2_O[1] +.sym 24153 io_ctrl_ins.rf_mode[2] +.sym 24154 io_ctrl_ins.debug_mode_SB_LUT4_I2_O[3] +.sym 24157 io_ctrl_ins.debug_mode_SB_LUT4_I2_O[3] +.sym 24158 io_ctrl_ins.debug_mode_SB_LUT4_I2_O[0] +.sym 24159 io_ctrl_ins.debug_mode_SB_LUT4_I2_O[1] +.sym 24160 io_ctrl_ins.rf_pin_state[4] +.sym 24164 io_ctrl_ins.debug_mode_SB_LUT4_I2_O[3] +.sym 24165 io_ctrl_ins.rx_h_state_SB_DFFE_Q_D_SB_LUT4_O_I3[2] +.sym 24166 io_ctrl_ins.rf_pin_state[6] +.sym 24169 io_ctrl_ins.debug_mode_SB_LUT4_I2_O[3] +.sym 24170 io_ctrl_ins.rx_h_state_SB_DFFE_Q_D_SB_LUT4_O_I3[2] +.sym 24171 io_ctrl_ins.rf_pin_state[7] +.sym 24175 io_ctrl_ins.rf_pin_state[0] +.sym 24176 io_ctrl_ins.debug_mode_SB_LUT4_I2_O[3] +.sym 24177 io_ctrl_ins.debug_mode_SB_LUT4_I2_O[1] +.sym 24178 io_ctrl_ins.rf_mode[2] +.sym 24179 io_ctrl_ins.debug_mode_SB_LUT4_I0_O +.sym 24180 r_counter[0]_$glb_clk +.sym 24200 io_ctrl_ins.debug_mode_SB_LUT4_I2_O[3] +.sym 24204 io_ctrl_ins.debug_mode_SB_LUT4_I2_O[1] +.sym 24217 io_ctrl_ins.o_data_out_SB_DFFESR_Q_6_R[0] +.sym 24243 io_ctrl_ins.rf_mode[2] +.sym 24246 io_ctrl_ins.rf_mode[0] +.sym 24274 io_ctrl_ins.rf_mode[0] +.sym 24277 io_ctrl_ins.rf_mode[2] +.sym 24332 io_ctrl_ins.rf_mode[0] .sym 24596 o_led0$SB_IO_OUT -.sym 24618 o_led0$SB_IO_OUT +.sym 24605 o_led0$SB_IO_OUT .sym 24621 i_smi_a3$SB_IO_IN +.sym 24943 io_pmod[5]$SB_IO_IN .sym 25089 io_pmod[4]$SB_IO_IN -.sym 25252 io_pmod[4]$SB_IO_IN +.sym 25097 $PACKER_VCC_NET +.sym 25253 i_sck$SB_IO_IN .sym 25399 io_pmod[5]$SB_IO_IN .sym 25401 io_pmod[7]$SB_IO_IN -.sym 25482 lvds_rx_09_inst.r_state_if_SB_LUT4_I2_O[0] -.sym 25488 io_pmod[5]$SB_IO_IN -.sym 25547 lvds_rx_09_inst.r_state_if_SB_LUT4_I2_O[0] -.sym 25548 io_pmod[5]$SB_IO_IN -.sym 25551 w_lvds_rx_09_d1_SB_LUT4_I0_O_SB_LUT4_I3_O_$glb_ce -.sym 25552 lvds_clock_buf -.sym 25553 i_smi_a1_SB_LUT4_I1_O[2]_$glb_sr +.sym 25416 $io_pmod[4]$iobuf_i .sym 25554 i_smi_soe_se$rename$0 .sym 25556 io_pmod[6]$SB_IO_IN -.sym 25564 lvds_rx_09_inst.r_state_if_SB_LUT4_I2_O[0] -.sym 25568 io_pmod[7]$SB_IO_IN -.sym 25632 io_pmod[4]$SB_IO_IN -.sym 25649 lvds_rx_09_inst.r_state_if_SB_LUT4_I2_O[0] -.sym 25691 lvds_rx_09_inst.r_state_if_SB_LUT4_I2_O[0] -.sym 25692 io_pmod[4]$SB_IO_IN -.sym 25706 w_lvds_rx_09_d1_SB_LUT4_I0_O_SB_LUT4_I3_O_$glb_ce -.sym 25707 lvds_clock_buf -.sym 25708 i_smi_a1_SB_LUT4_I1_O[2]_$glb_sr +.sym 25630 spi_if_ins.spi.r3_rx_done +.sym 25631 spi_if_ins.spi.r_rx_done +.sym 25647 spi_if_ins.spi.r2_rx_done +.sym 25672 spi_if_ins.spi.r2_rx_done +.sym 25673 spi_if_ins.spi.r3_rx_done +.sym 25679 spi_if_ins.spi.r2_rx_done +.sym 25686 spi_if_ins.spi.r_rx_done +.sym 25707 r_counter[0]_$glb_clk .sym 25711 i_glob_clock$SB_IO_IN +.sym 25717 i_smi_soe_se$rename$0 +.sym 25723 spi_if_ins.spi.r3_rx_done_SB_LUT4_I2_O +.sym 25873 io_pmod[2]$SB_IO_IN .sym 25878 i_glob_clock$SB_IO_IN -.sym 25961 r_counter[0] +.sym 25945 r_counter[0] .sym 25971 r_counter[0] .sym 26017 i_glob_clock$SB_IO_IN_$glb_clk +.sym 26030 $PACKER_VCC_NET .sym 26174 io_pmod[2]$SB_IO_IN -.sym 26503 $PACKER_GND_NET -.sym 26743 o_rx_h_tx_l_b$SB_IO_OUT -.sym 26776 o_rx_h_tx_l_b$SB_IO_OUT -.sym 26813 o_tr_vc2$SB_IO_OUT +.sym 26249 io_ctrl_ins.pmod_dir_state_SB_DFFE_Q_E +.sym 26261 w_rx_data[5] +.sym 26324 w_rx_data[5] +.sym 26326 io_ctrl_ins.pmod_dir_state_SB_DFFE_Q_E +.sym 26327 r_counter[0]_$glb_clk +.sym 26345 w_rx_data[5] +.sym 26497 w_smi_read_req +.sym 26810 o_tr_vc1$SB_IO_OUT +.sym 26966 o_tr_vc1_b$SB_IO_OUT +.sym 26968 o_rx_h_tx_l_b$SB_IO_OUT +.sym 27245 io_pmod[4]$SB_IO_IN +.sym 27246 $io_pmod[4]$iobuf_i +.sym 27247 io_pmod[6]$SB_IO_IN +.sym 27275 io_pmod[5]$SB_IO_IN +.sym 27277 io_pmod[7]$SB_IO_IN +.sym 27283 w_smi_read_req +.sym 27285 i_smi_a3$SB_IO_IN +.sym 27295 i_smi_a3$SB_IO_IN +.sym 27299 w_smi_read_req .sym 27305 $io_pmod[3]$iobuf_i +.sym 27307 io_pmod[6]$SB_IO_IN .sym 27310 $io_pmod[4]$iobuf_i -.sym 27334 $io_pmod[4]$iobuf_i -.sym 27335 io_pmod[2]$SB_IO_IN +.sym 27332 $io_pmod[4]$iobuf_i +.sym 27337 $io_pmod[6]$iobuf_i .sym 27367 io_pmod[6]$SB_IO_IN .sym 27370 $io_pmod[5]$iobuf_i .sym 27373 $io_pmod[7]$iobuf_i @@ -10108,464 +10149,476 @@ .sym 27400 $io_pmod[3]$iobuf_i .sym 27403 $io_pmod[6]$iobuf_i .sym 27409 $io_pmod[3]$iobuf_i -.sym 27414 $io_pmod[6]$iobuf_i +.sym 27423 $io_pmod[6]$iobuf_i +.sym 27426 $io_pmod[2]$iobuf_i .sym 27429 i_glob_clock$SB_IO_IN .sym 27451 i_glob_clock$SB_IO_IN .sym 27455 io_pmod[2]$SB_IO_IN .sym 27459 r_counter[0] .sym 27460 $PACKER_VCC_NET .sym 27477 r_counter[0] -.sym 27484 $PACKER_VCC_NET +.sym 27480 $PACKER_VCC_NET .sym 27514 i_smi_a3$SB_IO_IN .sym 27519 $io_pmod[2]$iobuf_i .sym 27524 i_smi_a3$SB_IO_IN .sym 27532 i_smi_a3$SB_IO_IN -.sym 27534 $io_pmod[2]$iobuf_i -.sym 27544 w_smi_read_req +.sym 27537 $io_pmod[2]$iobuf_i .sym 27549 w_smi_read_req .sym 27551 i_smi_a3$SB_IO_IN .sym 27552 $PACKER_GND_NET -.sym 27559 $PACKER_GND_NET -.sym 27562 w_smi_read_req .sym 27566 i_smi_a3$SB_IO_IN +.sym 27569 w_smi_read_req +.sym 27570 $PACKER_GND_NET .sym 27582 o_rx_h_tx_l$SB_IO_OUT -.sym 27593 o_rx_h_tx_l$SB_IO_OUT +.sym 27589 o_rx_h_tx_l$SB_IO_OUT .sym 27605 o_tr_vc1$SB_IO_OUT .sym 27608 o_tr_vc2$SB_IO_OUT -.sym 27615 o_tr_vc2$SB_IO_OUT -.sym 27625 o_tr_vc1$SB_IO_OUT +.sym 27620 o_tr_vc1$SB_IO_OUT +.sym 27628 o_tr_vc2$SB_IO_OUT .sym 27631 o_rx_h_tx_l_b$SB_IO_OUT .sym 27634 o_tr_vc1_b$SB_IO_OUT -.sym 27653 o_rx_h_tx_l_b$SB_IO_OUT -.sym 27654 o_tr_vc1_b$SB_IO_OUT -.sym 27683 smi_ctrl_ins.int_cnt_09_SB_DFFESR_Q_E_SB_LUT4_O_I1_SB_LUT4_O_I0_SB_CARRY_CO_I1[4] -.sym 27688 smi_ctrl_ins.int_cnt_09_SB_DFFESR_Q_E_SB_LUT4_O_I1_SB_LUT4_O_I0_SB_CARRY_CO_I1[5] -.sym 27693 $nextpnr_ICESTORM_LC_20$I3 -.sym 27697 smi_ctrl_ins.r_fifo_09_pull_SB_DFFESR_Q_E -.sym 27701 smi_ctrl_ins.int_cnt_09[5] -.sym 27705 smi_ctrl_ins.int_cnt_09[4] -.sym 27706 i_smi_soe_se$rename$0 -.sym 27710 smi_ctrl_ins.int_cnt_09_SB_DFFESR_Q_E_SB_LUT4_O_I1_SB_LUT4_O_I0[5] -.sym 27711 smi_ctrl_ins.int_cnt_09_SB_DFFESR_Q_E_SB_LUT4_O_I1_SB_LUT4_O_I1[5] -.sym 27712 i_smi_soe_se$rename$0 -.sym 27713 i_smi_a1_SB_LUT4_I1_O_SB_LUT4_I1_O[2] -.sym 27715 i_smi_a2_SB_LUT4_I1_O_SB_LUT4_I3_I2[0] -.sym 27720 smi_ctrl_ins.int_cnt_09_SB_DFFESR_Q_E_SB_LUT4_O_I1_SB_LUT4_O_I0_SB_CARRY_CO_I1[4] -.sym 27724 smi_ctrl_ins.int_cnt_09_SB_DFFESR_Q_E_SB_LUT4_O_I1_SB_LUT4_O_I0_SB_CARRY_CO_I1[5] -.sym 27727 $PACKER_VCC_NET -.sym 27729 $nextpnr_ICESTORM_LC_11$I3 -.sym 27731 i_smi_soe_se$rename$0 -.sym 27732 i_smi_a1_SB_LUT4_I1_O_SB_LUT4_I1_O[2] -.sym 27733 $nextpnr_ICESTORM_LC_11$COUT -.sym 27737 i_smi_a2_SB_LUT4_I1_O_SB_LUT4_I3_I2_SB_LUT4_O_I3[1] -.sym 27738 i_smi_a1_SB_LUT4_I1_O[0] -.sym 27744 smi_ctrl_ins.int_cnt_09_SB_DFFESR_Q_E_SB_LUT4_O_I1[1] -.sym 27745 i_smi_a1_SB_LUT4_I1_O[2] +.sym 27647 o_tr_vc1_b$SB_IO_OUT +.sym 27649 o_rx_h_tx_l_b$SB_IO_OUT +.sym 27716 i_smi_soe_se$rename$0 +.sym 27717 smi_ctrl_ins.r_fifo_24_pull_SB_LUT4_I1_O[2] +.sym 27719 w_rx_24_fifo_pull +.sym 27720 w_rx_09_fifo_pull +.sym 27721 i_smi_a2_SB_LUT4_I1_O[3] +.sym 27733 i_smi_a2_SB_LUT4_I1_O_SB_LUT4_I3_1_I2_SB_LUT4_O_I3[1] .sym 27747 i_smi_a1_SB_LUT4_I1_O_SB_LUT4_O_I2[3] .sym 27752 i_smi_a1_SB_LUT4_I1_O_SB_LUT4_O_I2_SB_CARRY_CO_I1[4] .sym 27756 i_smi_a1_SB_LUT4_I1_O_SB_LUT4_O_I2_SB_CARRY_CO_I1[5] .sym 27759 $PACKER_VCC_NET .sym 27761 $nextpnr_ICESTORM_LC_13$I3 .sym 27763 i_smi_soe_se$rename$0 -.sym 27764 i_smi_a1_SB_LUT4_I1_O_SB_LUT4_I1_O[2] +.sym 27764 smi_ctrl_ins.r_fifo_24_pull_SB_LUT4_I1_O[2] .sym 27765 $nextpnr_ICESTORM_LC_13$COUT +.sym 27767 i_smi_soe_se$rename$0 +.sym 27768 i_smi_a1_SB_LUT4_I1_O_SB_LUT4_O_I2[5] +.sym 27769 smi_ctrl_ins.r_fifo_24_pull_SB_LUT4_I1_O[2] +.sym 27773 smi_ctrl_ins.int_cnt_24[4] +.sym 27774 i_smi_a1_SB_LUT4_I1_O_SB_LUT4_O_I2[5] +.sym 27775 i_smi_a1_SB_LUT4_I1_O_SB_LUT4_O_I2_SB_LUT4_I0_I1[5] +.sym 27776 i_smi_soe_se$rename$0 +.sym 27777 smi_ctrl_ins.r_fifo_24_pull_SB_LUT4_I1_O[2] .sym 27779 i_smi_a1_SB_LUT4_I1_O_SB_LUT4_O_I2_SB_CARRY_CO_I1[4] .sym 27784 i_smi_a1_SB_LUT4_I1_O_SB_LUT4_O_I2_SB_CARRY_CO_I1[5] .sym 27789 $nextpnr_ICESTORM_LC_18$I3 -.sym 27792 i_smi_a1_SB_LUT4_I1_O_SB_LUT4_O_I2_SB_LUT4_I0_O[1] -.sym 27793 i_smi_a1_SB_LUT4_I1_O[2] -.sym 27797 smi_ctrl_ins.int_cnt_24[4] -.sym 27798 i_smi_a1_SB_LUT4_I1_O_SB_LUT4_O_I2[5] -.sym 27799 i_smi_a1_SB_LUT4_I1_O_SB_LUT4_O_I2_SB_LUT4_I0_I1[5] -.sym 27800 i_smi_soe_se$rename$0 -.sym 27801 i_smi_a1_SB_LUT4_I1_O_SB_LUT4_I1_O[2] -.sym 27804 lvds_rx_09_inst.r_state_if_SB_LUT4_I2_O[0] -.sym 27805 lvds_rx_09_inst.o_fifo_data[10] -.sym 27807 i_smi_soe_se$rename$0 -.sym 27808 i_smi_a1_SB_LUT4_I1_O_SB_LUT4_O_I2[5] -.sym 27809 i_smi_a1_SB_LUT4_I1_O_SB_LUT4_I1_O[2] -.sym 27810 i_smi_a2_SB_LUT4_I1_O_SB_LUT4_I3_I2[2] -.sym 27811 smi_ctrl_ins.o_smi_data_out_SB_DFFE_Q_4_D_SB_LUT4_O_I1[1] -.sym 27812 i_smi_a2_SB_LUT4_I1_O_SB_LUT4_I3_O[2] -.sym 27813 smi_ctrl_ins.o_smi_data_out_SB_DFFE_Q_4_D_SB_LUT4_O_I1[3] -.sym 27814 i_smi_a1_SB_LUT4_I1_O[0] -.sym 27815 i_smi_a1_SB_LUT4_I1_O[1] -.sym 27816 i_smi_a1_SB_LUT4_I1_O[2] -.sym 27817 i_smi_a1_SB_LUT4_I1_O[3] -.sym 27821 i_smi_a2_SB_LUT4_I1_O_SB_LUT4_I1_O -.sym 27822 w_rx_09_fifo_pulled_data[1] -.sym 27823 w_rx_09_fifo_pulled_data[17] -.sym 27824 i_smi_a2_SB_LUT4_I1_O_SB_LUT4_I3_I2_SB_LUT4_O_I3[1] -.sym 27825 i_smi_a2_SB_LUT4_I1_O_SB_LUT4_I3_I2[1] -.sym 27826 i_smi_a2_SB_LUT4_I1_O_SB_LUT4_I3_I2[2] -.sym 27827 smi_ctrl_ins.o_smi_data_out_SB_DFFE_Q_6_D_SB_LUT4_O_I1[1] -.sym 27828 i_smi_a2_SB_LUT4_I1_O_SB_LUT4_I3_O[2] -.sym 27829 smi_ctrl_ins.o_smi_data_out_SB_DFFE_Q_6_D_SB_LUT4_O_I1[3] -.sym 27830 i_smi_a2_SB_LUT4_I1_O_SB_LUT4_I3_I2[2] -.sym 27831 i_smi_a2_SB_LUT4_I1_O_SB_LUT4_I3_O[1] -.sym 27832 i_smi_a2_SB_LUT4_I1_O_SB_LUT4_I3_O[2] -.sym 27833 i_smi_a2_SB_LUT4_I1_O_SB_LUT4_I3_O[3] -.sym 27834 w_rx_09_fifo_pulled_data[9] -.sym 27835 w_rx_09_fifo_pulled_data[25] -.sym 27836 i_smi_a2_SB_LUT4_I1_O_SB_LUT4_I3_I2_SB_LUT4_O_I3[1] -.sym 27837 smi_ctrl_ins.o_smi_data_out_SB_DFFE_Q_6_D_SB_LUT4_O_I1_SB_LUT4_O_I3[3] -.sym 27839 i_smi_a2_SB_LUT4_I1_O[2] -.sym 27840 i_smi_a1_SB_LUT4_I1_O[3] -.sym 27841 i_smi_a2_SB_LUT4_I1_O_SB_LUT4_I1_I3[2] -.sym 27850 i_smi_a1_SB_LUT4_I1_O_SB_LUT4_I1_O[0] -.sym 27851 i_smi_soe_se$rename$0 -.sym 27852 i_smi_a1_SB_LUT4_I1_O_SB_LUT4_I1_O[2] -.sym 27853 i_smi_a1_SB_LUT4_I1_O_SB_LUT4_I1_O[3] -.sym 27856 lvds_rx_24_inst.r_state_if_SB_LUT4_I2_O[0] -.sym 27857 w_rx_24_fifo_data[7] -.sym 27863 w_rx_24_fifo_pull -.sym 27864 io_pmod_SB_DFFSS_Q_D_SB_LUT4_O_I0[3] -.sym 27865 i_smi_a2_SB_LUT4_I1_O[2] +.sym 27793 smi_ctrl_ins.int_cnt_24[5] +.sym 27794 i_smi_soe_se$rename$0 +.sym 27800 i_smi_a1_SB_LUT4_I1_O_SB_LUT4_O_I2_SB_LUT4_I0_O[1] +.sym 27801 i_smi_a1_SB_LUT4_I1_O_SB_LUT4_O_I2_SB_LUT4_I0_O[2] +.sym 27803 i_smi_a1_SB_LUT4_I1_O_SB_LUT4_O_I2_SB_LUT4_I0_O[0] +.sym 27804 i_smi_a1_SB_LUT4_I1_O_SB_LUT4_O_I2_SB_LUT4_I0_O[1] +.sym 27805 i_smi_a1_SB_LUT4_I1_O_SB_LUT4_O_I2_SB_LUT4_I0_O[2] +.sym 27806 i_smi_a1_SB_LUT4_I1_O[0] +.sym 27807 i_smi_a1_SB_LUT4_I1_O[1] +.sym 27808 i_smi_a1_SB_LUT4_I1_O[2] +.sym 27809 i_smi_a1_SB_LUT4_I1_O[3] +.sym 27812 lvds_rx_24_inst.r_state_if_SB_LUT4_I2_O[0] +.sym 27813 w_rx_24_fifo_data[8] +.sym 27816 lvds_rx_24_inst.r_state_if_SB_LUT4_I2_O[0] +.sym 27817 w_rx_24_fifo_data[12] +.sym 27820 lvds_rx_24_inst.r_state_if_SB_LUT4_I2_O[0] +.sym 27821 w_rx_24_fifo_data[10] +.sym 27824 lvds_rx_24_inst.r_state_if_SB_LUT4_I2_O[0] +.sym 27825 w_rx_24_fifo_data[9] +.sym 27828 lvds_rx_24_inst.r_state_if_SB_LUT4_I2_O[0] +.sym 27829 w_rx_24_fifo_data[5] +.sym 27832 lvds_rx_24_inst.r_state_if_SB_LUT4_I2_O[0] +.sym 27833 w_rx_24_fifo_data[1] +.sym 27836 lvds_rx_24_inst.r_state_if_SB_LUT4_I2_O[0] +.sym 27837 w_rx_24_fifo_data[7] +.sym 27840 lvds_rx_24_inst.r_state_if_SB_LUT4_I2_O[0] +.sym 27841 w_rx_24_fifo_data[3] +.sym 27844 lvds_rx_24_inst.r_state_if_SB_LUT4_I2_O[0] +.sym 27845 w_rx_24_fifo_data[13] +.sym 27852 lvds_rx_24_inst.r_state_if_SB_LUT4_I2_O[0] +.sym 27853 w_rx_24_fifo_data[0] +.sym 27860 lvds_rx_24_inst.r_state_if_SB_LUT4_I2_O[0] +.sym 27861 w_rx_24_fifo_data[11] +.sym 27868 lvds_rx_24_inst.r_state_if_SB_LUT4_I2_O[0] +.sym 27869 w_rx_24_fifo_data[14] .sym 27872 lvds_rx_24_inst.r_state_if_SB_LUT4_I2_O[0] -.sym 27873 w_rx_24_fifo_data[5] +.sym 27873 w_rx_24_fifo_data[6] .sym 27876 lvds_rx_24_inst.r_state_if_SB_LUT4_I2_O[0] -.sym 27877 w_rx_24_fifo_data[10] +.sym 27877 w_rx_24_fifo_data[17] .sym 27880 lvds_rx_24_inst.r_state_if_SB_LUT4_I2_O[0] -.sym 27881 w_rx_24_fifo_data[8] +.sym 27881 w_rx_24_fifo_data[25] .sym 27884 lvds_rx_24_inst.r_state_if_SB_LUT4_I2_O[0] -.sym 27885 w_rx_24_fifo_data[0] +.sym 27885 w_rx_24_fifo_data[19] .sym 27888 lvds_rx_24_inst.r_state_if_SB_LUT4_I2_O[0] -.sym 27889 w_rx_24_fifo_data[4] +.sym 27889 w_rx_24_fifo_data[21] .sym 27892 lvds_rx_24_inst.r_state_if_SB_LUT4_I2_O[0] -.sym 27893 w_rx_24_fifo_data[2] -.sym 27896 lvds_rx_24_inst.r_state_if_SB_LUT4_I2_O[0] -.sym 27897 w_rx_24_fifo_data[12] +.sym 27893 w_rx_24_fifo_data[15] .sym 27900 lvds_rx_24_inst.r_state_if_SB_LUT4_I2_O[0] -.sym 27901 w_rx_24_fifo_data[6] -.sym 27904 lvds_rx_24_inst.r_state_if_SB_LUT4_I2_O[0] -.sym 27905 w_rx_24_fifo_data[9] -.sym 27908 lvds_rx_24_inst.r_state_if_SB_LUT4_I2_O[0] -.sym 27909 w_rx_24_fifo_data[11] -.sym 27912 lvds_rx_24_inst.r_state_if_SB_LUT4_I2_O[0] -.sym 27913 w_rx_24_fifo_data[18] -.sym 27920 lvds_rx_24_inst.r_state_if_SB_LUT4_I2_O[0] -.sym 27921 w_rx_24_fifo_data[14] -.sym 27932 lvds_rx_24_inst.r_state_if_SB_LUT4_I2_O[0] -.sym 27933 w_rx_24_fifo_data[16] -.sym 27936 lvds_rx_24_inst.r_state_if_SB_LUT4_I2_O[0] -.sym 27937 w_rx_24_fifo_data[13] -.sym 27940 lvds_rx_24_inst.r_state_if_SB_LUT4_I2_O[0] -.sym 27941 w_rx_24_fifo_data[17] -.sym 27944 lvds_rx_24_inst.r_state_if_SB_LUT4_I2_O[0] -.sym 27945 w_rx_24_fifo_data[15] -.sym 27948 lvds_rx_24_inst.r_state_if_SB_LUT4_I2_O[0] -.sym 27949 w_rx_24_fifo_data[25] -.sym 27952 lvds_rx_24_inst.r_state_if_SB_LUT4_I2_O[0] -.sym 27953 w_rx_24_fifo_data[19] -.sym 27956 lvds_rx_24_inst.r_state_if_SB_LUT4_I2_O[0] -.sym 27957 w_rx_24_fifo_data[29] -.sym 27960 lvds_rx_24_inst.r_state_if_SB_LUT4_I2_O[0] -.sym 27961 w_rx_24_fifo_data[21] -.sym 27964 lvds_rx_24_inst.r_state_if_SB_LUT4_I2_O[0] -.sym 27965 w_rx_24_fifo_data[27] -.sym 27968 lvds_rx_24_inst.r_state_if_SB_LUT4_I2_O[0] -.sym 27969 w_rx_24_fifo_data[23] -.sym 27970 w_lvds_rx_09_d1 -.sym 27971 w_lvds_rx_09_d0 -.sym 27972 w_lvds_rx_09_d1_SB_LUT4_I0_O_SB_LUT4_O_I2[2] -.sym 27973 w_lvds_rx_09_d1_SB_LUT4_I0_O_SB_LUT4_O_I2[3] -.sym 27978 lvds_rx_09_inst.r_push_SB_DFFNESR_Q_E_SB_LUT4_O_I1[1] -.sym 27984 i_smi_a1_SB_LUT4_I1_O[2] -.sym 27985 w_lvds_rx_09_d1_SB_LUT4_I0_O[0] -.sym 27987 w_lvds_rx_09_d1_SB_LUT4_I0_O[0] -.sym 27988 w_lvds_rx_09_d1_SB_LUT4_I0_O[1] -.sym 27989 i_smi_a1_SB_LUT4_I1_O[2] -.sym 27990 lvds_rx_09_inst.r_state_if_SB_LUT4_I2_O[0] -.sym 28003 rx_24_fifo.full_o_SB_LUT4_I0_O_SB_LUT4_O_I1_SB_LUT4_O_I0[3] -.sym 28008 rx_24_fifo.wr_addr[2] -.sym 28009 rx_24_fifo.full_o_SB_LUT4_I0_O_SB_LUT4_O_I1_SB_LUT4_O_I0[3] -.sym 28012 rx_24_fifo.wr_addr[3] -.sym 28013 rx_24_fifo.wr_addr_gray_SB_LUT4_I2_I3[2] -.sym 28016 rx_24_fifo.wr_addr[4] -.sym 28017 rx_24_fifo.wr_addr_gray_SB_LUT4_I2_I3[3] -.sym 28020 rx_24_fifo.wr_addr[5] -.sym 28021 rx_24_fifo.wr_addr_gray_SB_LUT4_I2_I3[4] -.sym 28024 rx_24_fifo.wr_addr[6] -.sym 28025 rx_24_fifo.wr_addr_gray_SB_LUT4_I2_I3[5] -.sym 28028 rx_24_fifo.wr_addr[7] -.sym 28029 rx_24_fifo.wr_addr_gray_SB_LUT4_I2_I3[6] -.sym 28037 lvds_rx_24_inst.r_phase_count_SB_LUT4_I1_O_SB_DFFNESR_D_Q[1] -.sym 28044 w_lvds_rx_09_d1_SB_LUT4_I0_O_SB_LUT4_O_I2[2] -.sym 28045 w_lvds_rx_09_d1_SB_LUT4_I0_O_SB_LUT4_O_I2[3] -.sym 28050 rx_24_fifo.wr_addr_gray_SB_LUT4_I2_1_O[7] -.sym 28067 lvds_rx_24_inst.r_phase_count[0] -.sym 28071 lvds_rx_24_inst.r_phase_count[1] -.sym 28072 $PACKER_VCC_NET -.sym 28074 lvds_rx_24_inst.r_state_if_SB_DFFNESR_Q_E_SB_LUT4_O_I0_SB_LUT4_I2_O[0] -.sym 28075 lvds_rx_24_inst.r_phase_count_SB_LUT4_I1_O_SB_DFFNESR_D_Q[2] -.sym 28076 lvds_rx_24_inst.r_state_if_SB_DFFNESR_Q_E_SB_LUT4_O_I0_SB_LUT4_I2_O[2] -.sym 28077 lvds_rx_24_inst.r_phase_count_SB_CARRY_CI_CO[2] -.sym 28078 lvds_rx_24_inst.r_phase_count_SB_LUT4_I1_O_SB_DFFNESR_D_Q[0] -.sym 28079 lvds_rx_24_inst.r_phase_count_SB_LUT4_I1_O_SB_DFFNESR_D_Q[1] -.sym 28080 lvds_rx_24_inst.r_phase_count_SB_LUT4_I1_O_SB_DFFNESR_D_Q[2] -.sym 28081 lvds_rx_24_inst.r_state_if_SB_LUT4_I2_O[1] -.sym 28082 lvds_rx_24_inst.r_state_if_SB_DFFNESR_Q_E_SB_LUT4_O_I0_SB_LUT4_I2_O[0] -.sym 28083 lvds_rx_24_inst.r_phase_count[1] -.sym 28084 lvds_rx_24_inst.r_state_if_SB_DFFNESR_Q_E_SB_LUT4_O_I0_SB_LUT4_I2_O[2] -.sym 28085 lvds_rx_24_inst.r_phase_count[0] -.sym 28086 lvds_rx_24_inst.r_phase_count_SB_LUT4_I1_O_SB_DFFNESR_D_Q[0] -.sym 28087 lvds_rx_24_inst.r_phase_count_SB_LUT4_I1_O_SB_DFFNESR_D_Q[2] -.sym 28088 lvds_rx_24_inst.r_phase_count_SB_LUT4_I1_O_SB_DFFNESR_D_Q[1] -.sym 28089 lvds_rx_24_inst.r_phase_count_SB_LUT4_I1_O_SB_DFFNESR_D_Q[3] -.sym 28092 lvds_rx_24_inst.r_state_if_SB_LUT4_I2_O[0] -.sym 28093 lvds_rx_24_inst.r_phase_count_SB_LUT4_I1_O_SB_DFFNESR_D_Q[0] -.sym 28094 lvds_rx_24_inst.r_phase_count_SB_LUT4_I1_O_SB_DFFNESR_D_Q[0] -.sym 28095 lvds_rx_24_inst.r_phase_count_SB_LUT4_I1_O_SB_DFFNESR_D_Q[1] -.sym 28096 lvds_rx_24_inst.r_phase_count_SB_LUT4_I1_O_SB_DFFNESR_D_Q[2] -.sym 28097 lvds_rx_24_inst.r_phase_count_SB_LUT4_I1_O_SB_DFFNESR_D_Q[3] -.sym 28098 lvds_rx_24_inst.r_state_if_SB_LUT4_I2_O[1] -.sym 28102 lvds_rx_24_inst.r_state_if_SB_DFFNESR_Q_E_SB_LUT4_O_I0[0] -.sym 28103 lvds_rx_24_inst.r_push_SB_DFFNESR_Q_E_SB_LUT4_O_I1[0] -.sym 28104 w_lvds_rx_24_d1_SB_LUT4_I0_O[1] -.sym 28105 i_smi_a1_SB_LUT4_I1_O[2] -.sym 28108 lvds_rx_24_inst.r_state_if[1] -.sym 28109 lvds_rx_24_inst.r_push_SB_DFFNESR_Q_E_SB_LUT4_O_I1[1] -.sym 28110 w_lvds_rx_24_d1 -.sym 28111 w_lvds_rx_24_d0 -.sym 28112 lvds_rx_24_inst.r_push_SB_DFFNESR_Q_E_SB_LUT4_O_I1[1] -.sym 28113 lvds_rx_24_inst.r_state_if[1] -.sym 28114 lvds_rx_24_inst.r_state_if_SB_LUT4_I2_O[0] -.sym 28120 lvds_rx_24_inst.r_state_if[1] -.sym 28121 lvds_rx_24_inst.r_push_SB_DFFNESR_Q_E_SB_LUT4_O_I1[1] -.sym 28127 i_smi_a1_SB_LUT4_I1_O[2] -.sym 28128 lvds_rx_24_inst.r_state_if[1] -.sym 28129 lvds_rx_24_inst.r_push_SB_DFFNESR_Q_E_SB_LUT4_O_I1[1] -.sym 28136 lvds_rx_24_inst.r_push_SB_DFFNESR_Q_E_SB_LUT4_O_I1[1] -.sym 28137 lvds_rx_24_inst.r_state_if[1] -.sym 28151 lvds_rx_24_inst.r_push_SB_DFFNESR_Q_E_SB_LUT4_O_I1[0] -.sym 28152 lvds_rx_24_inst.r_push_SB_DFFNESR_Q_E_SB_LUT4_O_I1[1] -.sym 28153 i_smi_a1_SB_LUT4_I1_O[2] -.sym 28195 i_smi_a2_SB_LUT4_I1_O_SB_LUT4_I3_I2_SB_LUT4_O_I3[1] -.sym 28199 smi_ctrl_ins.int_cnt_09[4] -.sym 28200 $PACKER_VCC_NET -.sym 28201 i_smi_a2_SB_LUT4_I1_O_SB_LUT4_I3_I2_SB_LUT4_O_I3[1] -.sym 28203 smi_ctrl_ins.int_cnt_09[5] -.sym 28204 $PACKER_VCC_NET -.sym 28205 i_smi_a2_SB_LUT4_I1_O_SB_LUT4_I3_I2_SB_LUT4_O_I3[2] -.sym 28207 smi_ctrl_ins.int_cnt_09_SB_DFFESR_Q_E_SB_LUT4_O_I1[0] -.sym 28208 smi_ctrl_ins.int_cnt_09_SB_DFFESR_Q_E_SB_LUT4_O_I1[1] -.sym 28209 i_smi_a1_SB_LUT4_I1_O[2] -.sym 28211 i_smi_soe_se$rename$0 -.sym 28212 i_smi_a1_SB_LUT4_I1_O_SB_LUT4_I1_O[2] -.sym 28213 i_smi_a2_SB_LUT4_I1_O_SB_LUT4_I3_I2[1] -.sym 28215 i_smi_a2_SB_LUT4_I1_O_SB_LUT4_I3_I2[2] -.sym 28216 i_smi_soe_se$rename$0 -.sym 28217 i_smi_a1_SB_LUT4_I1_O_SB_LUT4_I1_O[2] -.sym 28218 smi_ctrl_ins.int_cnt_09[4] -.sym 28219 smi_ctrl_ins.int_cnt_09[5] -.sym 28220 i_smi_a2_SB_LUT4_I1_O_SB_LUT4_I3_I2_SB_LUT4_O_I3[1] -.sym 28221 io_pmod[2]$SB_IO_IN -.sym 28223 i_smi_a2_SB_LUT4_I1_O_SB_LUT4_I3_I2_SB_LUT4_O_I3[1] -.sym 28224 i_smi_soe_se$rename$0 -.sym 28225 i_smi_a1_SB_LUT4_I1_O_SB_LUT4_I1_O[2] -.sym 28228 i_smi_soe_se$rename$0 -.sym 28229 i_smi_a1_SB_LUT4_I1_O_SB_LUT4_I1_O[2] -.sym 28234 smi_ctrl_ins.int_cnt_09_SB_DFFESR_Q_E_SB_LUT4_O_I1_SB_LUT4_O_I0_SB_LUT4_I3_O[0] -.sym 28235 i_smi_a1_SB_LUT4_I1_O[0] -.sym 28236 i_smi_a1_SB_LUT4_I1_O_SB_LUT4_O_I2_SB_LUT4_I0_O_SB_LUT4_O_I1[2] -.sym 28237 i_smi_a2_SB_LUT4_I1_O[2] -.sym 28240 i_smi_a3$SB_IO_IN -.sym 28241 w_smi_data_output[2] -.sym 28244 lvds_rx_09_inst.r_state_if_SB_LUT4_I2_O[0] -.sym 28245 lvds_rx_09_inst.o_fifo_data[20] -.sym 28248 lvds_rx_09_inst.r_state_if_SB_LUT4_I2_O[0] -.sym 28249 lvds_rx_09_inst.o_fifo_data[26] -.sym 28252 lvds_rx_09_inst.r_state_if_SB_LUT4_I2_O[0] -.sym 28253 lvds_rx_09_inst.o_fifo_data[18] -.sym 28256 i_smi_a3$SB_IO_IN -.sym 28257 w_smi_data_output[1] -.sym 28260 lvds_rx_09_inst.r_state_if_SB_LUT4_I2_O[0] -.sym 28261 lvds_rx_09_inst.o_fifo_data[14] -.sym 28264 lvds_rx_09_inst.r_state_if_SB_LUT4_I2_O[0] -.sym 28265 lvds_rx_09_inst.o_fifo_data[24] -.sym 28266 w_rx_09_fifo_pulled_data[0] -.sym 28267 w_rx_09_fifo_pulled_data[16] -.sym 28268 i_smi_a2_SB_LUT4_I1_O_SB_LUT4_I3_I2[1] -.sym 28269 i_smi_a2_SB_LUT4_I1_O_SB_LUT4_I3_I2_SB_LUT4_O_I3[1] -.sym 28272 lvds_rx_09_inst.r_state_if_SB_LUT4_I2_O[0] -.sym 28273 lvds_rx_09_inst.o_fifo_data[12] -.sym 28274 w_rx_09_fifo_pulled_data[8] -.sym 28275 w_rx_09_fifo_pulled_data[24] -.sym 28276 i_smi_a2_SB_LUT4_I1_O_SB_LUT4_I3_I2_SB_LUT4_O_I3[1] -.sym 28277 i_smi_a2_SB_LUT4_I1_O_SB_LUT4_I3_I2[1] -.sym 28280 lvds_rx_09_inst.r_state_if_SB_LUT4_I2_O[0] -.sym 28281 lvds_rx_09_inst.o_fifo_data[22] -.sym 28284 lvds_rx_09_inst.r_state_if_SB_LUT4_I2_O[0] -.sym 28285 lvds_rx_09_inst.o_fifo_data[28] -.sym 28288 lvds_rx_09_inst.r_state_if_SB_LUT4_I2_O[0] -.sym 28289 lvds_rx_09_inst.o_fifo_data[16] -.sym 28290 w_rx_09_fifo_pulled_data[15] -.sym 28291 w_rx_09_fifo_pulled_data[31] -.sym 28292 i_smi_a2_SB_LUT4_I1_O_SB_LUT4_I3_I2_SB_LUT4_O_I3[1] -.sym 28293 smi_ctrl_ins.o_smi_data_out_SB_DFFE_Q_D_SB_LUT4_O_I1_SB_LUT4_O_I3[3] -.sym 28294 w_rx_09_fifo_pulled_data[2] -.sym 28295 w_rx_09_fifo_pulled_data[18] -.sym 28296 i_smi_a2_SB_LUT4_I1_O_SB_LUT4_I3_I2_SB_LUT4_O_I3[1] -.sym 28297 i_smi_a2_SB_LUT4_I1_O_SB_LUT4_I3_I2[1] -.sym 28298 w_rx_09_fifo_pulled_data[4] -.sym 28299 w_rx_09_fifo_pulled_data[20] -.sym 28300 i_smi_a2_SB_LUT4_I1_O_SB_LUT4_I3_I2_SB_LUT4_O_I3[1] -.sym 28301 i_smi_a2_SB_LUT4_I1_O_SB_LUT4_I3_I2[1] -.sym 28302 smi_ctrl_ins.o_smi_data_out_SB_DFFE_Q_7_D_SB_LUT4_O_I0[0] -.sym 28303 smi_ctrl_ins.o_smi_data_out_SB_DFFE_Q_7_D_SB_LUT4_O_I0[1] -.sym 28304 smi_ctrl_ins.o_smi_data_out_SB_DFFE_Q_7_D_SB_LUT4_O_I0[2] -.sym 28305 i_smi_a2_SB_LUT4_I1_O[2] -.sym 28306 w_rx_09_fifo_pulled_data[12] -.sym 28307 w_rx_09_fifo_pulled_data[28] -.sym 28308 i_smi_a2_SB_LUT4_I1_O_SB_LUT4_I3_I2_SB_LUT4_O_I3[1] -.sym 28309 smi_ctrl_ins.o_smi_data_out_SB_DFFE_Q_3_D_SB_LUT4_O_I1_SB_LUT4_O_I3[3] -.sym 28310 i_smi_a2_SB_LUT4_I1_O_SB_LUT4_I3_I2[2] -.sym 28311 smi_ctrl_ins.o_smi_data_out_SB_DFFE_Q_D_SB_LUT4_O_I1[1] -.sym 28312 i_smi_a2_SB_LUT4_I1_O_SB_LUT4_I3_O[2] -.sym 28313 smi_ctrl_ins.o_smi_data_out_SB_DFFE_Q_D_SB_LUT4_O_I1[3] -.sym 28314 i_smi_a2_SB_LUT4_I1_O_SB_LUT4_I3_I2[2] -.sym 28315 smi_ctrl_ins.o_smi_data_out_SB_DFFE_Q_2_D_SB_LUT4_O_I1[1] -.sym 28316 i_smi_a2_SB_LUT4_I1_O_SB_LUT4_I3_O[2] -.sym 28317 smi_ctrl_ins.o_smi_data_out_SB_DFFE_Q_2_D_SB_LUT4_O_I1[3] -.sym 28320 i_smi_a3$SB_IO_IN -.sym 28321 w_smi_data_output[6] -.sym 28322 w_rx_09_fifo_pulled_data[3] -.sym 28323 w_rx_09_fifo_pulled_data[19] -.sym 28324 i_smi_a2_SB_LUT4_I1_O_SB_LUT4_I3_I2_SB_LUT4_O_I3[1] -.sym 28325 i_smi_a2_SB_LUT4_I1_O_SB_LUT4_I3_I2[1] -.sym 28326 w_rx_09_fifo_pulled_data[7] -.sym 28327 w_rx_09_fifo_pulled_data[23] -.sym 28328 i_smi_a2_SB_LUT4_I1_O_SB_LUT4_I3_I2_SB_LUT4_O_I3[1] -.sym 28329 i_smi_a2_SB_LUT4_I1_O_SB_LUT4_I3_I2[1] -.sym 28330 i_smi_a1_SB_LUT4_I1_O[1] -.sym 28331 i_smi_a1_SB_LUT4_I1_O_SB_LUT4_O_I2_SB_LUT4_I0_O_SB_LUT4_O_I1[1] -.sym 28332 i_smi_a1_SB_LUT4_I1_O_SB_LUT4_O_I2_SB_LUT4_I0_O_SB_LUT4_O_I1[2] -.sym 28333 i_smi_a1_SB_LUT4_I1_O[3] -.sym 28334 i_smi_a2_SB_LUT4_I1_O_SB_LUT4_I3_I2[2] -.sym 28335 smi_ctrl_ins.o_smi_data_out_SB_DFFE_Q_1_D_SB_LUT4_O_I1[1] -.sym 28336 i_smi_a2_SB_LUT4_I1_O_SB_LUT4_I3_O[2] -.sym 28337 smi_ctrl_ins.o_smi_data_out_SB_DFFE_Q_1_D_SB_LUT4_O_I1[3] -.sym 28339 w_rx_09_fifo_pulled_data[0] -.sym 28340 i_smi_a2_SB_LUT4_I1_O_SB_LUT4_I3_I2[2] -.sym 28341 i_smi_a2_SB_LUT4_I1_O[2] -.sym 28342 i_smi_a2_SB_LUT4_I1_O_SB_LUT4_I3_O_SB_LUT4_O_I3[0] -.sym 28343 i_smi_a2_SB_LUT4_I1_O_SB_LUT4_I3_O_SB_LUT4_O_I3[1] -.sym 28344 i_smi_a2_SB_LUT4_I1_O_SB_LUT4_I3_I2_SB_LUT4_O_I3[1] -.sym 28345 i_smi_a2_SB_LUT4_I1_O_SB_LUT4_I3_O_SB_LUT4_O_I3[3] -.sym 28346 i_smi_a2_SB_LUT4_I1_O_SB_LUT4_I3_I2[2] -.sym 28347 smi_ctrl_ins.o_smi_data_out_SB_DFFE_Q_3_D_SB_LUT4_O_I1[1] -.sym 28348 i_smi_a2_SB_LUT4_I1_O_SB_LUT4_I3_O[2] -.sym 28349 smi_ctrl_ins.o_smi_data_out_SB_DFFE_Q_3_D_SB_LUT4_O_I1[3] -.sym 28350 w_rx_09_fifo_pulled_data[11] -.sym 28351 w_rx_09_fifo_pulled_data[27] -.sym 28352 i_smi_a2_SB_LUT4_I1_O_SB_LUT4_I3_I2_SB_LUT4_O_I3[1] -.sym 28353 smi_ctrl_ins.o_smi_data_out_SB_DFFE_Q_4_D_SB_LUT4_O_I1_SB_LUT4_O_I3[3] -.sym 28354 i_smi_a2_SB_LUT4_I1_O[1] -.sym 28355 smi_ctrl_ins.o_smi_data_out_SB_DFFE_Q_3_D_SB_LUT4_O_I1_SB_LUT4_O_1_I1[1] -.sym 28356 smi_ctrl_ins.o_smi_data_out_SB_DFFE_Q_3_D_SB_LUT4_O_I1_SB_LUT4_O_1_I1[2] -.sym 28357 i_smi_a2_SB_LUT4_I1_O_SB_LUT4_I3_1_O[3] -.sym 28360 lvds_rx_24_inst.r_state_if_SB_LUT4_I2_O[0] -.sym 28361 w_rx_24_fifo_data[1] -.sym 28362 w_rx_24_fifo_pulled_data[14] -.sym 28363 w_rx_24_fifo_pulled_data[6] -.sym 28364 i_smi_a2_SB_LUT4_I1_O_SB_LUT4_I3_1_I2[1] -.sym 28365 i_smi_a2_SB_LUT4_I1_O_SB_LUT4_I3_1_I2_SB_LUT4_O_I3[1] -.sym 28366 i_smi_a2_SB_LUT4_I1_O[1] -.sym 28367 i_smi_a2_SB_LUT4_I1_O_SB_LUT4_I3_O_SB_LUT4_O_1_I1[1] -.sym 28368 i_smi_a2_SB_LUT4_I1_O_SB_LUT4_I3_O_SB_LUT4_O_1_I1[2] -.sym 28369 i_smi_a2_SB_LUT4_I1_O_SB_LUT4_I3_1_O[3] -.sym 28372 lvds_rx_24_inst.r_state_if_SB_LUT4_I2_O[0] -.sym 28373 w_rx_24_fifo_data[3] -.sym 28374 w_rx_24_fifo_pulled_data[10] -.sym 28375 w_rx_24_fifo_pulled_data[2] -.sym 28376 i_smi_a2_SB_LUT4_I1_O_SB_LUT4_I3_1_I2[1] -.sym 28377 i_smi_a2_SB_LUT4_I1_O_SB_LUT4_I3_1_I2_SB_LUT4_O_I3[1] -.sym 28378 w_rx_24_fifo_pulled_data[12] -.sym 28379 w_rx_24_fifo_pulled_data[4] -.sym 28380 i_smi_a2_SB_LUT4_I1_O_SB_LUT4_I3_1_I2[1] -.sym 28381 i_smi_a2_SB_LUT4_I1_O_SB_LUT4_I3_1_I2_SB_LUT4_O_I3[1] -.sym 28382 i_smi_a2_SB_LUT4_I1_O[1] -.sym 28383 smi_ctrl_ins.o_smi_data_out_SB_DFFE_Q_1_D_SB_LUT4_O_I1_SB_LUT4_O_1_I1[1] -.sym 28384 smi_ctrl_ins.o_smi_data_out_SB_DFFE_Q_1_D_SB_LUT4_O_I1_SB_LUT4_O_1_I1[2] -.sym 28385 i_smi_a2_SB_LUT4_I1_O_SB_LUT4_I3_1_O[3] -.sym 28390 w_rx_24_fifo_pulled_data[13] -.sym 28391 w_rx_24_fifo_pulled_data[5] -.sym 28392 i_smi_a2_SB_LUT4_I1_O_SB_LUT4_I3_1_I2[1] -.sym 28393 i_smi_a2_SB_LUT4_I1_O_SB_LUT4_I3_1_I2_SB_LUT4_O_I3[1] -.sym 28396 lvds_rx_09_inst.r_state_if_SB_LUT4_I2_O[0] -.sym 28397 lvds_rx_09_inst.o_fifo_data[9] -.sym 28400 lvds_rx_09_inst.r_state_if_SB_LUT4_I2_O[0] -.sym 28401 lvds_rx_09_inst.o_fifo_data[7] -.sym 28404 lvds_rx_09_inst.r_state_if_SB_LUT4_I2_O[0] -.sym 28405 lvds_rx_09_inst.o_fifo_data[11] -.sym 28406 i_smi_a2_SB_LUT4_I1_O[1] -.sym 28407 smi_ctrl_ins.o_smi_data_out_SB_DFFE_Q_6_D_SB_LUT4_O_I1_SB_LUT4_O_1_I1[1] -.sym 28408 smi_ctrl_ins.o_smi_data_out_SB_DFFE_Q_6_D_SB_LUT4_O_I1_SB_LUT4_O_1_I1[2] -.sym 28409 i_smi_a2_SB_LUT4_I1_O_SB_LUT4_I3_1_O[3] -.sym 28410 w_rx_24_fifo_pulled_data[9] -.sym 28411 w_rx_24_fifo_pulled_data[1] -.sym 28412 i_smi_a2_SB_LUT4_I1_O_SB_LUT4_I3_1_I2[1] -.sym 28413 i_smi_a2_SB_LUT4_I1_O_SB_LUT4_I3_1_I2_SB_LUT4_O_I3[1] -.sym 28416 lvds_rx_09_inst.r_state_if_SB_LUT4_I2_O[0] -.sym 28417 lvds_rx_09_inst.o_fifo_data[8] -.sym 28418 i_smi_a2_SB_LUT4_I1_O[1] -.sym 28419 i_smi_a2_SB_LUT4_I1_O_SB_LUT4_I3_1_O[1] -.sym 28420 i_smi_a2_SB_LUT4_I1_O_SB_LUT4_I3_1_O[2] -.sym 28421 i_smi_a2_SB_LUT4_I1_O_SB_LUT4_I3_1_O[3] -.sym 28422 rx_24_fifo.wr_addr_gray_rd[6] -.sym 28426 w_rx_24_fifo_pulled_data[30] -.sym 28427 w_rx_24_fifo_pulled_data[22] -.sym 28428 i_smi_a2_SB_LUT4_I1_O_SB_LUT4_I3_1_I2_SB_LUT4_O_I3[1] -.sym 28429 i_smi_a2_SB_LUT4_I1_O_SB_LUT4_I3_1_I2[1] -.sym 28431 i_smi_a2_SB_LUT4_I1_O[0] -.sym 28432 i_smi_a2_SB_LUT4_I1_O[1] -.sym 28433 i_smi_a2_SB_LUT4_I1_O[2] -.sym 28437 w_rx_24_fifo_pull -.sym 28441 w_rx_24_fifo_data[14] -.sym 28442 w_rx_24_fifo_pulled_data[25] -.sym 28443 w_rx_24_fifo_pulled_data[17] -.sym 28444 i_smi_a2_SB_LUT4_I1_O_SB_LUT4_I3_1_I2_SB_LUT4_O_I3[1] -.sym 28445 i_smi_a2_SB_LUT4_I1_O_SB_LUT4_I3_1_I2[1] -.sym 28446 rx_24_fifo.wr_addr_gray[6] -.sym 28450 w_rx_24_fifo_pulled_data[29] -.sym 28451 w_rx_24_fifo_pulled_data[21] -.sym 28452 i_smi_a2_SB_LUT4_I1_O_SB_LUT4_I3_1_I2_SB_LUT4_O_I3[1] -.sym 28453 i_smi_a2_SB_LUT4_I1_O_SB_LUT4_I3_1_I2[1] -.sym 28454 rx_24_fifo.rd_addr_gray_wr[7] -.sym 28466 w_rx_24_fifo_pulled_data[28] -.sym 28467 w_rx_24_fifo_pulled_data[20] -.sym 28468 i_smi_a2_SB_LUT4_I1_O_SB_LUT4_I3_1_I2_SB_LUT4_O_I3[1] -.sym 28469 i_smi_a2_SB_LUT4_I1_O_SB_LUT4_I3_1_I2[1] -.sym 28473 w_rx_24_fifo_data[29] -.sym 28477 w_rx_24_fifo_data[31] -.sym 28478 w_rx_24_fifo_pulled_data[26] -.sym 28479 w_rx_24_fifo_pulled_data[18] -.sym 28480 i_smi_a2_SB_LUT4_I1_O_SB_LUT4_I3_1_I2_SB_LUT4_O_I3[1] -.sym 28481 i_smi_a2_SB_LUT4_I1_O_SB_LUT4_I3_1_I2[1] -.sym 28484 lvds_rx_24_inst.r_state_if_SB_LUT4_I2_O[0] -.sym 28485 w_rx_24_fifo_data[20] -.sym 28486 rx_24_fifo.full_o_SB_LUT4_I0_O_SB_LUT4_O_I1_SB_LUT4_O_1_I3[0] -.sym 28487 lvds_rx_24_inst.r_push_SB_LUT4_I3_I1[1] -.sym 28488 lvds_rx_24_inst.r_push_SB_LUT4_I3_I1[2] -.sym 28489 rx_24_fifo.full_o_SB_LUT4_I0_O_SB_LUT4_O_I1_SB_LUT4_O_1_I3[3] -.sym 28490 rx_24_fifo.rd_addr_gray_wr_r[6] -.sym 28491 rx_24_fifo.rd_addr_gray_wr_r[7] -.sym 28492 lvds_rx_24_inst.r_push_SB_LUT4_I3_I1[6] -.sym 28493 lvds_rx_24_inst.r_push_SB_LUT4_I3_I1[5] -.sym 28496 lvds_rx_24_inst.r_state_if_SB_LUT4_I2_O[0] -.sym 28497 w_rx_24_fifo_data[28] -.sym 28500 lvds_rx_24_inst.r_state_if_SB_LUT4_I2_O[0] -.sym 28501 w_rx_24_fifo_data[22] -.sym 28504 lvds_rx_24_inst.r_state_if_SB_LUT4_I2_O[0] -.sym 28505 w_rx_24_fifo_data[24] -.sym 28506 rx_24_fifo.rd_addr_gray_wr_r[6] -.sym 28507 rx_24_fifo.wr_addr_gray_SB_LUT4_I2_1_O[7] -.sym 28508 rx_24_fifo.rd_addr_gray_wr_r[7] -.sym 28509 rx_24_fifo.wr_addr_gray_SB_LUT4_I2_1_O[6] -.sym 28512 lvds_rx_24_inst.r_state_if_SB_LUT4_I2_O[0] -.sym 28513 w_rx_24_fifo_data[26] +.sym 27901 w_rx_24_fifo_data[23] +.sym 27907 lvds_rx_09_inst.r_phase_count[0] +.sym 27911 lvds_rx_09_inst.r_phase_count[1] +.sym 27912 $PACKER_VCC_NET +.sym 27913 lvds_rx_09_inst.r_phase_count[0] +.sym 27914 lvds_rx_09_inst.r_push_SB_DFFNESR_Q_E_SB_LUT4_O_I1_SB_LUT4_I0_O_SB_DFFNESR_D_Q[1] +.sym 27916 $PACKER_VCC_NET +.sym 27917 lvds_rx_09_inst.r_phase_count_SB_CARRY_CI_CO[2] +.sym 27920 lvds_rx_09_inst.r_push_SB_DFFNESR_Q_E_SB_LUT4_O_I1_SB_LUT4_O_I2[2] +.sym 27921 lvds_rx_09_inst.r_push_SB_DFFNESR_Q_E_SB_LUT4_O_I1_SB_LUT4_O_I2[3] +.sym 27932 lvds_rx_09_inst.r_state_if_SB_LUT4_I2_O[0] +.sym 27933 lvds_rx_09_inst.r_phase_count_SB_LUT4_I1_O[0] +.sym 27937 lvds_rx_09_inst.r_phase_count_SB_LUT4_I1_O[0] +.sym 27940 lvds_rx_09_inst.r_push_SB_DFFNESR_Q_E_SB_LUT4_O_I1_SB_LUT4_I0_O_SB_DFFNESR_D_Q[0] +.sym 27941 lvds_rx_09_inst.r_push_SB_DFFNESR_Q_E_SB_LUT4_O_I1_SB_LUT4_I0_O_SB_DFFNESR_D_Q[1] +.sym 27944 i_smi_a1_SB_LUT4_I1_O_SB_LUT4_O_I2_SB_LUT4_I0_O[2] +.sym 27945 w_lvds_rx_09_d1_SB_LUT4_I0_O[1] +.sym 27946 rx_24_fifo.rd_addr_gray_wr[2] +.sym 27951 lvds_rx_09_inst.r_phase_count_SB_LUT4_I1_O[0] +.sym 27952 lvds_rx_09_inst.r_push_SB_DFFNESR_Q_E_SB_LUT4_O_I1_SB_LUT4_O_I2[0] +.sym 27953 lvds_rx_09_inst.r_push_SB_DFFNESR_Q_E_SB_LUT4_O_I1_SB_LUT4_O_I2[2] +.sym 27954 lvds_rx_09_inst.r_push_SB_DFFNESR_Q_E_SB_LUT4_O_I1_SB_LUT4_O_I2[2] +.sym 27955 lvds_rx_09_inst.r_phase_count_SB_LUT4_I1_O[0] +.sym 27956 lvds_rx_09_inst.r_push_SB_DFFNESR_Q_E_SB_LUT4_O_I1_SB_LUT4_O_I2[0] +.sym 27957 lvds_rx_09_inst.r_push_SB_DFFNESR_Q_E_SB_LUT4_O_I1_SB_LUT4_O_I2[3] +.sym 27959 w_lvds_rx_09_d1_SB_LUT4_I0_O[1] +.sym 27960 lvds_rx_09_inst.r_state_if_SB_DFFNESR_Q_E_SB_LUT4_O_I2[1] +.sym 27961 i_smi_a1_SB_LUT4_I1_O_SB_LUT4_O_I2_SB_LUT4_I0_O[2] +.sym 27962 rx_24_fifo.rd_addr_gray[2] +.sym 27966 lvds_rx_09_inst.r_push_SB_DFFNESR_Q_E_SB_LUT4_O_I1_SB_LUT4_O_I2[0] +.sym 27967 lvds_rx_09_inst.r_phase_count_SB_LUT4_I1_O[0] +.sym 27968 lvds_rx_09_inst.r_push_SB_DFFNESR_Q_E_SB_LUT4_O_I1_SB_LUT4_O_I2[2] +.sym 27969 lvds_rx_09_inst.r_push_SB_DFFNESR_Q_E_SB_LUT4_O_I1_SB_LUT4_O_I2[3] +.sym 27970 lvds_rx_09_inst.r_push_SB_DFFNESR_Q_E_SB_LUT4_O_I1[0] +.sym 27971 lvds_rx_09_inst.r_push_SB_DFFNESR_Q_E_SB_LUT4_O_I1[1] +.sym 27972 lvds_rx_09_inst.r_phase_count_SB_LUT4_I1_O[2] +.sym 27973 lvds_rx_09_inst.r_push_SB_DFFNESR_Q_E_SB_LUT4_O_I1[3] +.sym 27977 lvds_rx_09_inst.r_push_SB_DFFNESR_Q_E_SB_LUT4_O_I1_SB_LUT4_I0_O_SB_DFFNESR_D_Q[0] +.sym 27978 lvds_rx_09_inst.r_push_SB_DFFNESR_Q_E_SB_LUT4_O_I1[0] +.sym 27979 lvds_rx_09_inst.r_push_SB_DFFNESR_Q_E_SB_LUT4_O_I1[1] +.sym 27980 lvds_rx_09_inst.r_phase_count_SB_LUT4_I1_O[1] +.sym 27981 lvds_rx_09_inst.r_push_SB_DFFNESR_Q_E_SB_LUT4_O_I1[3] +.sym 27982 lvds_rx_24_inst.r_push_SB_LUT4_I0_1_I1_SB_LUT4_O_1_I3[0] +.sym 27983 lvds_rx_24_inst.r_push_SB_LUT4_I0_1_I1_SB_LUT4_O_1_I3[1] +.sym 27984 lvds_rx_24_inst.r_push_SB_LUT4_I0_1_I1_SB_LUT4_O_1_I3[2] +.sym 27985 lvds_rx_24_inst.r_push_SB_LUT4_I0_1_I1_SB_LUT4_O_1_I3[3] +.sym 27987 rx_24_fifo.rd_addr_gray_wr_r[5] +.sym 27988 lvds_rx_24_inst.r_push_SB_LUT4_I0_1_I1_SB_LUT4_O_1_I3[2] +.sym 27989 lvds_rx_24_inst.r_push_SB_LUT4_I0_1_I1_SB_LUT4_O_I2[5] +.sym 27991 rx_24_fifo.rd_addr_gray_wr_r[2] +.sym 27992 lvds_rx_24_inst.r_push_SB_LUT4_I0_1_I1_SB_LUT4_O_I2[1] +.sym 27993 lvds_rx_24_inst.r_push_SB_LUT4_I0_1_I1_SB_LUT4_O_2_I0[2] +.sym 27994 w_lvds_rx_09_d1 +.sym 27995 w_lvds_rx_09_d0 +.sym 27996 lvds_rx_09_inst.r_push_SB_DFFNESR_Q_E_SB_LUT4_O_I1_SB_LUT4_O_I2[2] +.sym 27997 lvds_rx_09_inst.r_push_SB_DFFNESR_Q_E_SB_LUT4_O_I1_SB_LUT4_O_I2[3] +.sym 27998 lvds_rx_24_inst.r_push_SB_LUT4_I0_1_I1_SB_LUT4_O_2_I0[0] +.sym 27999 lvds_rx_24_inst.r_push_SB_LUT4_I0_1_I1_SB_LUT4_O_2_I0[1] +.sym 28000 lvds_rx_24_inst.r_push_SB_LUT4_I0_1_I1_SB_LUT4_O_2_I0[2] +.sym 28001 lvds_rx_24_inst.r_push_SB_LUT4_I0_1_I1_SB_LUT4_O_1_I3[1] +.sym 28002 w_rx_24_fifo_push +.sym 28003 lvds_rx_24_inst.r_push_SB_LUT4_I0_1_I1[1] +.sym 28004 lvds_rx_24_inst.r_push_SB_LUT4_I0_1_I1[2] +.sym 28005 lvds_rx_24_inst.r_push_SB_LUT4_I0_1_I1[3] +.sym 28007 lvds_rx_24_inst.r_push_SB_DFFNESR_Q_E_SB_LUT4_O_I1[1] +.sym 28008 w_rx_24_fifo_full +.sym 28009 lvds_rx_24_inst.r_push_SB_DFFNESR_Q_E_SB_LUT4_O_I1_SB_LUT4_O_I2[0] +.sym 28016 lvds_rx_24_inst.r_push_SB_DFFNESR_Q_E_SB_LUT4_O_I1_SB_LUT4_O_I2[0] +.sym 28017 lvds_rx_24_inst.r_push_SB_DFFNESR_Q_E_SB_LUT4_O_I1[1] +.sym 28027 i_smi_a1_SB_LUT4_I1_O_SB_LUT4_O_I2_SB_LUT4_I0_O[2] +.sym 28028 lvds_rx_09_inst.r_push_SB_DFFNESR_Q_E_SB_LUT4_O_I1_SB_LUT4_O_I2[2] +.sym 28029 lvds_rx_09_inst.r_push_SB_DFFNESR_Q_E_SB_LUT4_O_I1_SB_LUT4_O_I2[3] +.sym 28031 lvds_rx_24_inst.r_push_SB_LUT4_I0_1_I1_SB_LUT4_O_2_I0[1] +.sym 28032 rx_24_fifo.wr_addr_gray_SB_LUT4_I2_1_O[3] +.sym 28033 rx_24_fifo.wr_addr_gray_SB_LUT4_I2_1_O[4] +.sym 28038 lvds_rx_24_inst.r_state_if_SB_LUT4_I2_O[0] +.sym 28042 w_rx_24_fifo_full +.sym 28043 rx_24_fifo.full_o_SB_LUT4_I0_I1[1] +.sym 28044 rx_24_fifo.full_o_SB_LUT4_I0_I1[2] +.sym 28045 rx_24_fifo.full_o_SB_LUT4_I0_I1[3] +.sym 28050 lvds_rx_24_inst.r_state_if_SB_LUT4_I2_O[1] +.sym 28059 lvds_rx_24_inst.r_push_SB_DFFNESR_Q_E_SB_LUT4_O_I1[0] +.sym 28060 lvds_rx_24_inst.r_push_SB_DFFNESR_Q_E_SB_LUT4_O_I1[1] +.sym 28061 i_smi_a1_SB_LUT4_I1_O_SB_LUT4_O_I2_SB_LUT4_I0_O[2] +.sym 28064 lvds_rx_24_inst.r_push_SB_DFFNESR_Q_E_SB_LUT4_O_I1_SB_LUT4_O_I2[0] +.sym 28065 lvds_rx_24_inst.r_push_SB_DFFNESR_Q_E_SB_LUT4_O_I1[1] +.sym 28068 lvds_rx_24_inst.r_push_SB_DFFNESR_Q_E_SB_LUT4_O_I1_SB_LUT4_O_I2_SB_LUT4_I0_O[0] +.sym 28069 w_lvds_rx_24_d0 +.sym 28071 i_smi_a1_SB_LUT4_I1_O_SB_LUT4_O_I2_SB_LUT4_I0_O[2] +.sym 28072 lvds_rx_24_inst.r_push_SB_DFFNESR_Q_E_SB_LUT4_O_I1_SB_LUT4_O_I2[0] +.sym 28073 lvds_rx_24_inst.r_push_SB_DFFNESR_Q_E_SB_LUT4_O_I1[1] +.sym 28074 lvds_rx_24_inst.r_push_SB_DFFNESR_Q_E_SB_LUT4_O_I1_SB_LUT4_O_I2[0] +.sym 28075 lvds_rx_24_inst.r_phase_count_SB_LUT4_I1_O[0] +.sym 28076 lvds_rx_24_inst.r_push_SB_DFFNESR_Q_E_SB_LUT4_O_I1_SB_LUT4_O_I2[2] +.sym 28077 lvds_rx_24_inst.r_push_SB_DFFNESR_Q_E_SB_LUT4_O_I1[1] +.sym 28079 lvds_rx_24_inst.r_phase_count_SB_LUT4_I1_O[0] +.sym 28080 lvds_rx_24_inst.r_push_SB_DFFNESR_Q_E_SB_LUT4_O_I1_SB_LUT4_O_I2[2] +.sym 28081 lvds_rx_24_inst.r_push_SB_DFFNESR_Q_E_SB_LUT4_O_I1_SB_LUT4_O_I2[0] +.sym 28084 lvds_rx_24_inst.r_push_SB_DFFNESR_Q_E_SB_LUT4_O_I1_SB_LUT4_O_I2_SB_LUT4_I0_O[0] +.sym 28085 w_lvds_rx_24_d1 +.sym 28087 w_lvds_rx_24_d1_SB_LUT4_I0_O[1] +.sym 28088 lvds_rx_24_inst.r_state_if_SB_DFFNESR_Q_E_SB_LUT4_O_I2[1] +.sym 28089 i_smi_a1_SB_LUT4_I1_O_SB_LUT4_O_I2_SB_LUT4_I0_O[2] +.sym 28090 lvds_rx_24_inst.r_push_SB_DFFNESR_Q_E_SB_LUT4_O_I1_SB_LUT4_O_I2[2] +.sym 28091 lvds_rx_24_inst.r_phase_count_SB_LUT4_I1_O[0] +.sym 28092 lvds_rx_24_inst.r_push_SB_DFFNESR_Q_E_SB_LUT4_O_I1_SB_LUT4_O_I2[0] +.sym 28093 lvds_rx_24_inst.r_push_SB_DFFNESR_Q_E_SB_LUT4_O_I1[1] +.sym 28094 w_lvds_rx_24_d1 +.sym 28095 w_lvds_rx_24_d0 +.sym 28096 lvds_rx_24_inst.r_push_SB_DFFNESR_Q_E_SB_LUT4_O_I1[1] +.sym 28097 lvds_rx_24_inst.r_push_SB_DFFNESR_Q_E_SB_LUT4_O_I1_SB_LUT4_O_I2[0] +.sym 28099 lvds_rx_24_inst.r_phase_count[0] +.sym 28103 lvds_rx_24_inst.r_phase_count[1] +.sym 28104 $PACKER_VCC_NET +.sym 28105 lvds_rx_24_inst.r_phase_count[0] +.sym 28106 lvds_rx_24_inst.r_push_SB_DFFNESR_Q_E_SB_LUT4_O_I1_SB_LUT4_I0_O_SB_DFFNESR_D_Q[1] +.sym 28108 $PACKER_VCC_NET +.sym 28109 lvds_rx_24_inst.r_phase_count_SB_CARRY_CI_CO[2] +.sym 28110 lvds_rx_24_inst.r_push_SB_DFFNESR_Q_E_SB_LUT4_O_I1[0] +.sym 28111 lvds_rx_24_inst.r_state_if_SB_LUT4_I2_O[1] +.sym 28112 lvds_rx_24_inst.r_phase_count_SB_LUT4_I1_O[2] +.sym 28113 lvds_rx_24_inst.r_push_SB_DFFNESR_Q_E_SB_LUT4_O_I1_SB_LUT4_O_I2_SB_LUT4_I0_O[0] +.sym 28117 lvds_rx_24_inst.r_phase_count_SB_LUT4_I1_O[0] +.sym 28118 lvds_rx_24_inst.r_push_SB_DFFNESR_Q_E_SB_LUT4_O_I1[0] +.sym 28119 lvds_rx_24_inst.r_state_if_SB_LUT4_I2_O[1] +.sym 28120 lvds_rx_24_inst.r_phase_count_SB_LUT4_I1_O[1] +.sym 28121 lvds_rx_24_inst.r_push_SB_DFFNESR_Q_E_SB_LUT4_O_I1_SB_LUT4_O_I2_SB_LUT4_I0_O[0] +.sym 28124 lvds_rx_24_inst.r_push_SB_DFFNESR_Q_E_SB_LUT4_O_I1_SB_LUT4_I0_O_SB_DFFNESR_D_Q[0] +.sym 28125 lvds_rx_24_inst.r_push_SB_DFFNESR_Q_E_SB_LUT4_O_I1_SB_LUT4_I0_O_SB_DFFNESR_D_Q[1] +.sym 28129 lvds_rx_24_inst.r_push_SB_DFFNESR_Q_E_SB_LUT4_O_I1_SB_LUT4_I0_O_SB_DFFNESR_D_Q[0] +.sym 28132 lvds_rx_09_inst.r_push_SB_DFFNESR_Q_E_SB_LUT4_O_I1[3] +.sym 28133 w_lvds_rx_09_d1 +.sym 28156 lvds_rx_09_inst.r_push_SB_DFFNESR_Q_E_SB_LUT4_O_I1[3] +.sym 28157 w_lvds_rx_09_d0 +.sym 28194 smi_ctrl_ins.o_smi_data_out_SB_DFFE_Q_7_D_SB_LUT4_O_I0[0] +.sym 28195 smi_ctrl_ins.o_smi_data_out_SB_DFFE_Q_7_D_SB_LUT4_O_I0[1] +.sym 28196 smi_ctrl_ins.o_smi_data_out_SB_DFFE_Q_7_D_SB_LUT4_O_I0[2] +.sym 28197 i_smi_a2_SB_LUT4_I1_O[3] +.sym 28199 w_rx_09_fifo_pulled_data[0] +.sym 28200 smi_ctrl_ins.int_cnt_09_SB_DFFESR_Q_D_SB_LUT4_O_I3[2] +.sym 28201 i_smi_a2_SB_LUT4_I1_O[3] +.sym 28202 smi_ctrl_ins.int_cnt_09_SB_DFFESR_Q_D_SB_LUT4_O_I3[2] +.sym 28203 smi_ctrl_ins.o_smi_data_out_SB_DFFE_Q_3_D_SB_LUT4_O_I1[1] +.sym 28204 smi_ctrl_ins.o_smi_data_out_SB_DFFE_Q_1_D_SB_LUT4_O_I1[2] +.sym 28205 smi_ctrl_ins.o_smi_data_out_SB_DFFE_Q_3_D_SB_LUT4_O_I1[3] +.sym 28206 w_rx_09_fifo_pulled_data[4] +.sym 28207 w_rx_09_fifo_pulled_data[20] +.sym 28208 smi_ctrl_ins.int_cnt_09[3] +.sym 28209 smi_ctrl_ins.int_cnt_09_SB_DFFESR_Q_D_SB_LUT4_O_I3[1] +.sym 28210 smi_ctrl_ins.int_cnt_09_SB_DFFESR_Q_D_SB_LUT4_O_I3[2] +.sym 28211 smi_ctrl_ins.o_smi_data_out_SB_DFFE_Q_D_SB_LUT4_O_I2[1] +.sym 28212 smi_ctrl_ins.o_smi_data_out_SB_DFFE_Q_1_D_SB_LUT4_O_I1[2] +.sym 28213 smi_ctrl_ins.o_smi_data_out_SB_DFFE_Q_D_SB_LUT4_O_I2[3] +.sym 28214 w_rx_09_fifo_pulled_data[0] +.sym 28215 w_rx_09_fifo_pulled_data[16] +.sym 28216 smi_ctrl_ins.int_cnt_09_SB_DFFESR_Q_D_SB_LUT4_O_I3[1] +.sym 28217 smi_ctrl_ins.int_cnt_09[3] +.sym 28218 w_rx_09_fifo_pulled_data[12] +.sym 28219 w_rx_09_fifo_pulled_data[28] +.sym 28220 smi_ctrl_ins.int_cnt_09[3] +.sym 28221 smi_ctrl_ins.o_smi_data_out_SB_DFFE_Q_3_D_SB_LUT4_O_I1_SB_LUT4_O_I3[3] +.sym 28224 i_smi_a3$SB_IO_IN +.sym 28225 w_smi_data_output[6] +.sym 28226 smi_ctrl_ins.int_cnt_09_SB_DFFESR_Q_D_SB_LUT4_O_I3[2] +.sym 28227 smi_ctrl_ins.o_smi_data_out_SB_DFFE_Q_1_D_SB_LUT4_O_I1[1] +.sym 28228 smi_ctrl_ins.o_smi_data_out_SB_DFFE_Q_1_D_SB_LUT4_O_I1[2] +.sym 28229 smi_ctrl_ins.o_smi_data_out_SB_DFFE_Q_1_D_SB_LUT4_O_I1[3] +.sym 28230 smi_ctrl_ins.int_cnt_09_SB_DFFESR_Q_D_SB_LUT4_O_I3[2] +.sym 28231 smi_ctrl_ins.o_smi_data_out_SB_DFFE_Q_2_D_SB_LUT4_O_I1[1] +.sym 28232 smi_ctrl_ins.o_smi_data_out_SB_DFFE_Q_1_D_SB_LUT4_O_I1[2] +.sym 28233 smi_ctrl_ins.o_smi_data_out_SB_DFFE_Q_2_D_SB_LUT4_O_I1[3] +.sym 28234 smi_ctrl_ins.int_cnt_09_SB_DFFESR_Q_D_SB_LUT4_O_I3[2] +.sym 28235 smi_ctrl_ins.o_smi_data_out_SB_DFFE_Q_D_SB_LUT4_O_I1[1] +.sym 28236 smi_ctrl_ins.o_smi_data_out_SB_DFFE_Q_1_D_SB_LUT4_O_I1[2] +.sym 28237 smi_ctrl_ins.o_smi_data_out_SB_DFFE_Q_D_SB_LUT4_O_I1[3] +.sym 28239 i_smi_a2_SB_LUT4_I1_O[3] +.sym 28240 i_smi_a1_SB_LUT4_I1_O[3] +.sym 28241 smi_ctrl_ins.r_fifo_24_pull_SB_LUT4_I1_O_SB_LUT4_I0_O[2] +.sym 28242 w_rx_09_fifo_pulled_data[9] +.sym 28243 w_rx_09_fifo_pulled_data[25] +.sym 28244 smi_ctrl_ins.int_cnt_09[3] +.sym 28245 smi_ctrl_ins.o_smi_data_out_SB_DFFE_Q_6_D_SB_LUT4_O_I1_SB_LUT4_O_I3[3] +.sym 28246 w_rx_09_fifo_pulled_data[1] +.sym 28247 w_rx_09_fifo_pulled_data[17] +.sym 28248 smi_ctrl_ins.int_cnt_09[3] +.sym 28249 smi_ctrl_ins.int_cnt_09_SB_DFFESR_Q_D_SB_LUT4_O_I3[1] +.sym 28250 smi_ctrl_ins.int_cnt_09_SB_DFFESR_Q_D_SB_LUT4_O_I3[2] +.sym 28251 smi_ctrl_ins.o_smi_data_out_SB_DFFE_Q_6_D_SB_LUT4_O_I1[1] +.sym 28252 smi_ctrl_ins.o_smi_data_out_SB_DFFE_Q_1_D_SB_LUT4_O_I1[2] +.sym 28253 smi_ctrl_ins.o_smi_data_out_SB_DFFE_Q_6_D_SB_LUT4_O_I1[3] +.sym 28254 smi_ctrl_ins.int_cnt_09_SB_DFFESR_Q_D_SB_LUT4_O_I3[2] +.sym 28255 smi_ctrl_ins.o_smi_data_out_SB_DFFE_Q_5_D_SB_LUT4_O_I1[1] +.sym 28256 smi_ctrl_ins.o_smi_data_out_SB_DFFE_Q_1_D_SB_LUT4_O_I1[2] +.sym 28257 smi_ctrl_ins.o_smi_data_out_SB_DFFE_Q_5_D_SB_LUT4_O_I1[3] +.sym 28259 i_smi_a2_SB_LUT4_I1_O_SB_LUT4_I3_1_I2_SB_LUT4_O_I3[1] +.sym 28263 smi_ctrl_ins.int_cnt_24[4] +.sym 28264 $PACKER_VCC_NET +.sym 28267 smi_ctrl_ins.int_cnt_24[5] +.sym 28268 $PACKER_VCC_NET +.sym 28269 i_smi_a2_SB_LUT4_I1_O_SB_LUT4_I3_1_I2_SB_LUT4_O_I3[2] +.sym 28271 i_smi_a2_SB_LUT4_I1_O_SB_LUT4_I3_1_I2_SB_LUT4_O_I3[1] +.sym 28272 i_smi_soe_se$rename$0 +.sym 28273 smi_ctrl_ins.r_fifo_24_pull_SB_LUT4_I1_O[2] +.sym 28274 i_smi_a2_SB_LUT4_I1_O_SB_LUT4_I3_1_I2[2] +.sym 28275 smi_ctrl_ins.o_smi_data_out_SB_DFFE_Q_6_D_SB_LUT4_O_I1_SB_LUT4_O_1_I1[1] +.sym 28276 smi_ctrl_ins.o_smi_data_out_SB_DFFE_Q_6_D_SB_LUT4_O_I1_SB_LUT4_O_1_I1[2] +.sym 28277 smi_ctrl_ins.o_smi_data_out_SB_DFFE_Q_1_D_SB_LUT4_O_I1_SB_LUT4_O_1_I1[3] +.sym 28278 i_smi_a2_SB_LUT4_I1_O_SB_LUT4_I3_1_I2[2] +.sym 28279 smi_ctrl_ins.o_smi_data_out_SB_DFFE_Q_5_D_SB_LUT4_O_I1_SB_LUT4_O_1_I1[1] +.sym 28280 smi_ctrl_ins.o_smi_data_out_SB_DFFE_Q_5_D_SB_LUT4_O_I1_SB_LUT4_O_1_I1[2] +.sym 28281 smi_ctrl_ins.o_smi_data_out_SB_DFFE_Q_1_D_SB_LUT4_O_I1_SB_LUT4_O_1_I1[3] +.sym 28282 smi_ctrl_ins.r_fifo_24_pull_SB_LUT4_I1_O[0] +.sym 28283 i_smi_soe_se$rename$0 +.sym 28284 smi_ctrl_ins.r_fifo_24_pull_SB_LUT4_I1_O[2] +.sym 28285 smi_ctrl_ins.r_fifo_24_pull_SB_LUT4_I1_O[3] +.sym 28286 i_smi_a2_SB_LUT4_I1_O_SB_LUT4_I3_1_I2[2] +.sym 28287 smi_ctrl_ins.o_smi_data_out_SB_DFFE_Q_1_D_SB_LUT4_O_I1_SB_LUT4_O_1_I1[1] +.sym 28288 smi_ctrl_ins.o_smi_data_out_SB_DFFE_Q_1_D_SB_LUT4_O_I1_SB_LUT4_O_1_I1[2] +.sym 28289 smi_ctrl_ins.o_smi_data_out_SB_DFFE_Q_1_D_SB_LUT4_O_I1_SB_LUT4_O_1_I1[3] +.sym 28290 w_rx_24_fifo_pulled_data[14] +.sym 28291 w_rx_24_fifo_pulled_data[6] +.sym 28292 i_smi_a2_SB_LUT4_I1_O_SB_LUT4_I3_1_I2[1] +.sym 28293 i_smi_a2_SB_LUT4_I1_O_SB_LUT4_I3_1_I2_SB_LUT4_O_I3[1] +.sym 28294 smi_ctrl_ins.int_cnt_24[4] +.sym 28295 smi_ctrl_ins.int_cnt_24[5] +.sym 28296 i_smi_a2_SB_LUT4_I1_O_SB_LUT4_I3_1_I2_SB_LUT4_O_I3[1] +.sym 28297 w_rx_24_fifo_empty +.sym 28299 i_smi_soe_se$rename$0 +.sym 28300 smi_ctrl_ins.r_fifo_24_pull_SB_LUT4_I1_O[2] +.sym 28301 i_smi_a2_SB_LUT4_I1_O_SB_LUT4_I3_1_I2[1] +.sym 28302 i_smi_a2_SB_LUT4_I1_O_SB_LUT4_I3_1_I2[2] +.sym 28303 smi_ctrl_ins.o_smi_data_out_SB_DFFE_Q_D_SB_LUT4_O_I1_SB_LUT4_O_1_I1[1] +.sym 28304 smi_ctrl_ins.o_smi_data_out_SB_DFFE_Q_D_SB_LUT4_O_I1_SB_LUT4_O_1_I1[2] +.sym 28305 smi_ctrl_ins.o_smi_data_out_SB_DFFE_Q_1_D_SB_LUT4_O_I1_SB_LUT4_O_1_I1[3] +.sym 28306 w_rx_24_fifo_pulled_data[9] +.sym 28307 w_rx_24_fifo_pulled_data[1] +.sym 28308 i_smi_a2_SB_LUT4_I1_O_SB_LUT4_I3_1_I2[1] +.sym 28309 i_smi_a2_SB_LUT4_I1_O_SB_LUT4_I3_1_I2_SB_LUT4_O_I3[1] +.sym 28310 i_smi_a2_SB_LUT4_I1_O[1] +.sym 28311 i_smi_a1_SB_LUT4_I1_O[0] +.sym 28312 i_smi_a1_SB_LUT4_I1_O_SB_LUT4_O_I2_SB_LUT4_I0_O[2] +.sym 28313 i_smi_a1_SB_LUT4_I1_O[3] +.sym 28314 i_smi_a2_SB_LUT4_I1_O_SB_LUT4_I3_1_I2[2] +.sym 28315 smi_ctrl_ins.o_smi_data_out_SB_DFFE_Q_D_SB_LUT4_O_I1_SB_LUT4_O_1_I3[1] +.sym 28316 smi_ctrl_ins.o_smi_data_out_SB_DFFE_Q_D_SB_LUT4_O_I1_SB_LUT4_O_1_I3[2] +.sym 28317 smi_ctrl_ins.o_smi_data_out_SB_DFFE_Q_1_D_SB_LUT4_O_I1_SB_LUT4_O_1_I1[3] +.sym 28319 w_rx_24_fifo_pulled_data[0] +.sym 28320 i_smi_a2_SB_LUT4_I1_O_SB_LUT4_I3_1_I2[2] +.sym 28321 i_smi_a2_SB_LUT4_I1_O[3] +.sym 28322 w_rx_24_fifo_pulled_data[11] +.sym 28323 w_rx_24_fifo_pulled_data[3] +.sym 28324 i_smi_a2_SB_LUT4_I1_O_SB_LUT4_I3_1_I2[1] +.sym 28325 i_smi_a2_SB_LUT4_I1_O_SB_LUT4_I3_1_I2_SB_LUT4_O_I3[1] +.sym 28327 smi_ctrl_ins.int_cnt_24[4] +.sym 28328 $PACKER_VCC_NET +.sym 28329 i_smi_a2_SB_LUT4_I1_O_SB_LUT4_I3_1_I2_SB_LUT4_O_I3[1] +.sym 28330 w_rx_24_fifo_pulled_data[10] +.sym 28331 w_rx_24_fifo_pulled_data[2] +.sym 28332 i_smi_a2_SB_LUT4_I1_O_SB_LUT4_I3_1_I2[1] +.sym 28333 i_smi_a2_SB_LUT4_I1_O_SB_LUT4_I3_1_I2_SB_LUT4_O_I3[1] +.sym 28334 w_rx_24_fifo_pulled_data[12] +.sym 28335 w_rx_24_fifo_pulled_data[4] +.sym 28336 i_smi_a2_SB_LUT4_I1_O_SB_LUT4_I3_1_I2[1] +.sym 28337 i_smi_a2_SB_LUT4_I1_O_SB_LUT4_I3_1_I2_SB_LUT4_O_I3[1] +.sym 28338 w_rx_24_fifo_pulled_data[15] +.sym 28339 w_rx_24_fifo_pulled_data[7] +.sym 28340 i_smi_a2_SB_LUT4_I1_O_SB_LUT4_I3_1_I2[1] +.sym 28341 i_smi_a2_SB_LUT4_I1_O_SB_LUT4_I3_1_I2_SB_LUT4_O_I3[1] +.sym 28342 i_smi_a2_SB_LUT4_I1_O_SB_LUT4_I3_1_I2[2] +.sym 28343 smi_ctrl_ins.o_smi_data_out_SB_DFFE_Q_2_D_SB_LUT4_O_I1_SB_LUT4_O_1_I1[1] +.sym 28344 smi_ctrl_ins.o_smi_data_out_SB_DFFE_Q_2_D_SB_LUT4_O_I1_SB_LUT4_O_1_I1[2] +.sym 28345 smi_ctrl_ins.o_smi_data_out_SB_DFFE_Q_1_D_SB_LUT4_O_I1_SB_LUT4_O_1_I1[3] +.sym 28346 i_smi_a2_SB_LUT4_I1_O_SB_LUT4_I3_1_I2[2] +.sym 28347 smi_ctrl_ins.o_smi_data_out_SB_DFFE_Q_D_SB_LUT4_O_I2_SB_LUT4_O_1_I1[1] +.sym 28348 smi_ctrl_ins.o_smi_data_out_SB_DFFE_Q_D_SB_LUT4_O_I2_SB_LUT4_O_1_I1[2] +.sym 28349 smi_ctrl_ins.o_smi_data_out_SB_DFFE_Q_1_D_SB_LUT4_O_I1_SB_LUT4_O_1_I1[3] +.sym 28350 w_rx_24_fifo_pulled_data[13] +.sym 28351 w_rx_24_fifo_pulled_data[5] +.sym 28352 i_smi_a2_SB_LUT4_I1_O_SB_LUT4_I3_1_I2[1] +.sym 28353 i_smi_a2_SB_LUT4_I1_O_SB_LUT4_I3_1_I2_SB_LUT4_O_I3[1] +.sym 28354 w_rx_24_fifo_pulled_data[0] +.sym 28355 w_rx_24_fifo_pulled_data[16] +.sym 28356 i_smi_a2_SB_LUT4_I1_O_SB_LUT4_I3_1_I2_SB_LUT4_O_I3[1] +.sym 28357 i_smi_a2_SB_LUT4_I1_O_SB_LUT4_I3_1_I2[1] +.sym 28358 w_rx_24_fifo_pulled_data[27] +.sym 28359 w_rx_24_fifo_pulled_data[19] +.sym 28360 i_smi_a2_SB_LUT4_I1_O_SB_LUT4_I3_1_I2_SB_LUT4_O_I3[1] +.sym 28361 i_smi_a2_SB_LUT4_I1_O_SB_LUT4_I3_1_I2[1] +.sym 28364 lvds_rx_24_inst.r_state_if_SB_LUT4_I2_O[0] +.sym 28365 w_rx_24_fifo_data[4] +.sym 28366 w_rx_24_fifo_pulled_data[8] +.sym 28367 w_rx_24_fifo_pulled_data[24] +.sym 28368 i_smi_a2_SB_LUT4_I1_O_SB_LUT4_I3_1_I2_SB_LUT4_O_I3[1] +.sym 28369 smi_ctrl_ins.o_smi_data_out_SB_DFFE_Q_7_D_SB_LUT4_O_I0_SB_LUT4_O_I3[3] +.sym 28370 w_rx_24_fifo_pulled_data[29] +.sym 28371 w_rx_24_fifo_pulled_data[21] +.sym 28372 i_smi_a2_SB_LUT4_I1_O_SB_LUT4_I3_1_I2_SB_LUT4_O_I3[1] +.sym 28373 i_smi_a2_SB_LUT4_I1_O_SB_LUT4_I3_1_I2[1] +.sym 28374 w_rx_24_fifo_pulled_data[28] +.sym 28375 w_rx_24_fifo_pulled_data[20] +.sym 28376 i_smi_a2_SB_LUT4_I1_O_SB_LUT4_I3_1_I2_SB_LUT4_O_I3[1] +.sym 28377 i_smi_a2_SB_LUT4_I1_O_SB_LUT4_I3_1_I2[1] +.sym 28378 w_rx_24_fifo_pulled_data[26] +.sym 28379 w_rx_24_fifo_pulled_data[18] +.sym 28380 i_smi_a2_SB_LUT4_I1_O_SB_LUT4_I3_1_I2_SB_LUT4_O_I3[1] +.sym 28381 i_smi_a2_SB_LUT4_I1_O_SB_LUT4_I3_1_I2[1] +.sym 28384 lvds_rx_24_inst.r_state_if_SB_LUT4_I2_O[0] +.sym 28385 w_rx_24_fifo_data[2] +.sym 28388 lvds_rx_24_inst.r_state_if_SB_LUT4_I2_O[0] +.sym 28389 w_rx_24_fifo_data[20] +.sym 28392 lvds_rx_24_inst.r_state_if_SB_LUT4_I2_O[0] +.sym 28393 w_rx_24_fifo_data[22] +.sym 28396 lvds_rx_24_inst.r_state_if_SB_LUT4_I2_O[0] +.sym 28397 w_rx_24_fifo_data[26] +.sym 28400 lvds_rx_24_inst.r_state_if_SB_LUT4_I2_O[0] +.sym 28401 w_rx_24_fifo_data[27] +.sym 28404 lvds_rx_24_inst.r_state_if_SB_LUT4_I2_O[0] +.sym 28405 w_rx_24_fifo_data[24] +.sym 28408 lvds_rx_24_inst.r_state_if_SB_LUT4_I2_O[0] +.sym 28409 w_rx_24_fifo_data[16] +.sym 28410 w_rx_24_fifo_pulled_data[30] +.sym 28411 w_rx_24_fifo_pulled_data[22] +.sym 28412 i_smi_a2_SB_LUT4_I1_O_SB_LUT4_I3_1_I2_SB_LUT4_O_I3[1] +.sym 28413 i_smi_a2_SB_LUT4_I1_O_SB_LUT4_I3_1_I2[1] +.sym 28416 lvds_rx_24_inst.r_state_if_SB_LUT4_I2_O[0] +.sym 28417 w_rx_24_fifo_data[28] +.sym 28419 lvds_rx_09_inst.r_push_SB_DFFNESR_Q_E_SB_LUT4_O_I1[0] +.sym 28420 lvds_rx_09_inst.r_push_SB_DFFNESR_Q_E_SB_LUT4_O_I1_SB_LUT4_O_I2[3] +.sym 28421 i_smi_a1_SB_LUT4_I1_O_SB_LUT4_O_I2_SB_LUT4_I0_O[2] +.sym 28422 lvds_rx_09_inst.r_push_SB_DFFNESR_Q_E_SB_LUT4_O_I1[1] +.sym 28434 lvds_rx_09_inst.r_state_if_SB_LUT4_I2_O[0] +.sym 28438 w_rx_24_fifo_pulled_data[25] +.sym 28439 w_rx_24_fifo_pulled_data[17] +.sym 28440 i_smi_a2_SB_LUT4_I1_O_SB_LUT4_I3_1_I2_SB_LUT4_O_I3[1] +.sym 28441 i_smi_a2_SB_LUT4_I1_O_SB_LUT4_I3_1_I2[1] +.sym 28446 w_rx_24_fifo_pulled_data[31] +.sym 28447 w_rx_24_fifo_pulled_data[23] +.sym 28448 i_smi_a2_SB_LUT4_I1_O_SB_LUT4_I3_1_I2_SB_LUT4_O_I3[1] +.sym 28449 i_smi_a2_SB_LUT4_I1_O_SB_LUT4_I3_1_I2[1] +.sym 28451 rx_24_fifo.full_o_SB_DFFSR_Q_D_SB_LUT4_O_I1_SB_LUT4_O_I0[3] +.sym 28456 rx_24_fifo.wr_addr[2] +.sym 28457 rx_24_fifo.full_o_SB_DFFSR_Q_D_SB_LUT4_O_I1_SB_LUT4_O_I0[3] +.sym 28460 rx_24_fifo.wr_addr[3] +.sym 28461 rx_24_fifo.wr_addr_gray_SB_LUT4_I2_I3[2] +.sym 28464 rx_24_fifo.wr_addr[4] +.sym 28465 rx_24_fifo.wr_addr_gray_SB_LUT4_I2_I3[3] +.sym 28468 rx_24_fifo.wr_addr[5] +.sym 28469 rx_24_fifo.wr_addr_gray_SB_LUT4_I2_I3[4] +.sym 28472 rx_24_fifo.wr_addr[6] +.sym 28473 rx_24_fifo.wr_addr_gray_SB_LUT4_I2_I3[5] +.sym 28476 rx_24_fifo.wr_addr[7] +.sym 28477 rx_24_fifo.wr_addr_gray_SB_LUT4_I2_I3[6] +.sym 28478 spi_if_ins.state_if_SB_DFFESR_Q_D[0] +.sym 28482 rx_24_fifo.wr_addr_gray_SB_LUT4_I2_1_O[4] +.sym 28488 rx_24_fifo.wr_addr_gray_SB_LUT4_I2_1_O[7] +.sym 28489 rx_24_fifo.wr_addr_gray_SB_LUT4_I2_1_O[6] +.sym 28490 rx_24_fifo.wr_addr_gray_SB_LUT4_I2_1_O[1] +.sym 28494 rx_24_fifo.rd_addr_gray_wr_r[6] +.sym 28495 rx_24_fifo.rd_addr_gray_wr_r[7] +.sym 28496 lvds_rx_24_inst.r_push_SB_LUT4_I0_1_I1_SB_LUT4_O_I2[6] +.sym 28497 lvds_rx_24_inst.r_push_SB_LUT4_I0_1_I1_SB_LUT4_O_I2[5] +.sym 28498 rx_24_fifo.wr_addr_gray_SB_LUT4_I2_1_O[6] +.sym 28502 rx_24_fifo.wr_addr_gray_SB_LUT4_I2_1_O[3] +.sym 28506 rx_24_fifo.wr_addr_gray_SB_LUT4_I2_1_O[7] +.sym 28510 rx_24_fifo.wr_addr_gray_SB_LUT4_I2_1_O[2] .sym 28515 rx_24_fifo.wr_addr[0] -.sym 28520 rx_24_fifo.full_o_SB_LUT4_I0_O_SB_LUT4_O_I1_SB_LUT4_O_I0[3] +.sym 28520 rx_24_fifo.full_o_SB_DFFSR_Q_D_SB_LUT4_O_I1_SB_LUT4_O_I0[3] .sym 28521 rx_24_fifo.wr_addr[0] .sym 28524 rx_24_fifo.wr_addr[2] .sym 28525 rx_24_fifo.wr_addr_gray_SB_LUT4_I2_1_I3[2] @@ -10579,1132 +10632,1137 @@ .sym 28541 rx_24_fifo.wr_addr_gray_SB_LUT4_I2_1_I3[6] .sym 28544 rx_24_fifo.wr_addr[7] .sym 28545 rx_24_fifo.wr_addr_gray_SB_LUT4_I2_1_I3[7] -.sym 28546 rx_24_fifo.wr_addr_gray_SB_LUT4_I2_1_O[3] -.sym 28554 rx_24_fifo.full_o_SB_LUT4_I0_I1_SB_LUT4_O_1_I2[3] -.sym 28558 rx_24_fifo.full_o_SB_LUT4_I0_I1_SB_LUT4_O_2_I2[1] -.sym 28564 rx_24_fifo.wr_addr_gray_SB_LUT4_I2_1_O[7] -.sym 28565 rx_24_fifo.wr_addr_gray_SB_LUT4_I2_1_O[6] -.sym 28566 rx_24_fifo.wr_addr_gray_SB_LUT4_I2_1_O[1] -.sym 28573 rx_24_fifo.wr_addr[0] -.sym 28574 rx_24_fifo.wr_addr_gray_SB_LUT4_I2_1_O[2] -.sym 28581 lvds_rx_24_inst.r_phase_count_SB_LUT4_I1_O_SB_DFFNESR_D_Q[0] -.sym 28582 w_lvds_rx_09_d1_SB_LUT4_I0_O_SB_LUT4_O_I2[0] -.sym 28583 w_lvds_rx_09_d1_SB_LUT4_I0_O_SB_LUT4_O_I2[1] -.sym 28584 w_lvds_rx_09_d1_SB_LUT4_I0_O_SB_LUT4_O_I2[2] -.sym 28585 w_lvds_rx_09_d1_SB_LUT4_I0_O_SB_LUT4_O_I2[3] -.sym 28588 lvds_rx_24_inst.r_state_if_SB_DFFNESR_Q_E_SB_LUT4_O_I0_SB_LUT4_I2_O[2] -.sym 28589 w_lvds_rx_24_d1 -.sym 28596 lvds_rx_24_inst.r_state_if_SB_DFFNESR_Q_E_SB_LUT4_O_I0_SB_LUT4_I2_O[2] -.sym 28597 w_lvds_rx_24_d0 -.sym 28600 lvds_rx_24_inst.r_state_if_SB_DFFNESR_Q_E_SB_LUT4_O_I0[0] -.sym 28601 lvds_rx_24_inst.r_phase_count_SB_LUT4_I1_O_SB_DFFNESR_D_Q[3] -.sym 28608 i_smi_a1_SB_LUT4_I1_O[2] -.sym 28609 w_rx_24_fifo_push -.sym 28611 lvds_rx_09_inst.r_phase_count[0] -.sym 28615 lvds_rx_09_inst.r_phase_count[1] -.sym 28616 $PACKER_VCC_NET -.sym 28617 lvds_rx_09_inst.r_phase_count[0] -.sym 28618 lvds_rx_09_inst.r_push_SB_DFFNESR_Q_E_SB_LUT4_O_I1_SB_LUT4_I0_O_SB_DFFNESR_D_Q[1] -.sym 28620 $PACKER_VCC_NET -.sym 28621 lvds_rx_09_inst.r_phase_count_SB_CARRY_CI_CO[2] -.sym 28624 lvds_rx_09_inst.r_push_SB_DFFNESR_Q_E_SB_LUT4_O_I1_SB_LUT4_I0_O_SB_DFFNESR_D_Q[0] -.sym 28625 lvds_rx_09_inst.r_push_SB_DFFNESR_Q_E_SB_LUT4_O_I1_SB_LUT4_I0_O_SB_DFFNESR_D_Q[1] -.sym 28626 lvds_rx_09_inst.r_push_SB_DFFNESR_Q_E_SB_LUT4_O_I1[0] -.sym 28627 lvds_rx_09_inst.r_push_SB_DFFNESR_Q_E_SB_LUT4_O_I1[1] -.sym 28628 lvds_rx_09_inst.r_phase_count_SB_LUT4_I1_O[1] -.sym 28629 w_lvds_rx_09_d1_SB_LUT4_I0_O_SB_LUT4_O_I2_SB_LUT4_I0_O[0] -.sym 28633 lvds_rx_09_inst.r_push_SB_DFFNESR_Q_E_SB_LUT4_O_I1_SB_LUT4_I0_O_SB_DFFNESR_D_Q[0] -.sym 28634 lvds_rx_09_inst.r_push_SB_DFFNESR_Q_E_SB_LUT4_O_I1[0] -.sym 28635 lvds_rx_09_inst.r_push_SB_DFFNESR_Q_E_SB_LUT4_O_I1[1] -.sym 28636 lvds_rx_09_inst.r_phase_count_SB_LUT4_I1_O[2] -.sym 28637 w_lvds_rx_09_d1_SB_LUT4_I0_O_SB_LUT4_O_I2_SB_LUT4_I0_O[0] -.sym 28640 lvds_rx_09_inst.r_state_if_SB_LUT4_I2_O[0] -.sym 28641 w_lvds_rx_09_d1_SB_LUT4_I0_O_SB_LUT4_O_I2[1] -.sym 28643 i_smi_a1_SB_LUT4_I1_O[2] -.sym 28644 w_lvds_rx_09_d1_SB_LUT4_I0_O_SB_LUT4_O_I2[2] -.sym 28645 w_lvds_rx_09_d1_SB_LUT4_I0_O_SB_LUT4_O_I2[3] -.sym 28657 w_lvds_rx_09_d1_SB_LUT4_I0_O_SB_LUT4_O_I2[1] -.sym 28664 w_rx_24_fifo_full -.sym 28665 lvds_rx_24_inst.r_phase_count_SB_LUT4_I1_O_SB_DFFNESR_D_Q[3] -.sym 28671 w_lvds_rx_09_d1_SB_LUT4_I0_O_SB_LUT4_O_I2[1] -.sym 28672 w_lvds_rx_09_d1_SB_LUT4_I0_O_SB_LUT4_O_I2[0] -.sym 28673 w_lvds_rx_09_d1_SB_LUT4_I0_O_SB_LUT4_O_I2[2] -.sym 28675 i_smi_a1$SB_IO_IN -.sym 28676 i_smi_a3$SB_IO_IN -.sym 28677 i_smi_a2$SB_IO_IN -.sym 28687 i_smi_a2$SB_IO_IN -.sym 28688 i_smi_a1$SB_IO_IN -.sym 28689 i_smi_a3$SB_IO_IN -.sym 28707 rx_09_fifo.rd_addr[0] -.sym 28712 io_pmod_SB_DFFSS_Q_D_SB_LUT4_O_I0_SB_LUT4_O_I0_SB_LUT4_O_2_I3[1] -.sym 28713 rx_09_fifo.rd_addr[0] -.sym 28716 io_pmod_SB_DFFSS_Q_D_SB_LUT4_O_I0_SB_LUT4_O_I0_SB_LUT4_O_2_I3[2] -.sym 28717 rx_09_fifo.rd_addr_gray_SB_LUT4_I2_I3[2] -.sym 28720 rx_09_fifo.rd_addr[3] -.sym 28721 rx_09_fifo.rd_addr_gray_SB_LUT4_I2_I3[3] -.sym 28724 rx_09_fifo.rd_addr[4] -.sym 28725 rx_09_fifo.rd_addr_gray_SB_LUT4_I2_I3[4] -.sym 28728 io_pmod_SB_DFFSS_Q_D_SB_LUT4_O_I0_SB_LUT4_O_I0_SB_LUT4_O_1_I2[1] -.sym 28729 rx_09_fifo.rd_addr_gray_SB_LUT4_I2_I3[5] -.sym 28732 io_pmod_SB_DFFSS_Q_D_SB_LUT4_O_I0_SB_LUT4_O_I0_SB_LUT4_O_1_I2[3] -.sym 28733 rx_09_fifo.rd_addr_gray_SB_LUT4_I2_I3[6] -.sym 28736 rx_09_fifo.rd_addr[7] -.sym 28737 rx_09_fifo.rd_addr_gray_SB_LUT4_I2_I3[7] -.sym 28738 rx_09_fifo.rd_addr_gray[4] -.sym 28742 rx_09_fifo.rd_addr_gray_wr[0] -.sym 28748 i_smi_a3$SB_IO_IN -.sym 28749 w_smi_data_output[7] -.sym 28750 rx_09_fifo.rd_addr_gray_wr[7] -.sym 28754 rx_09_fifo.rd_addr[7] -.sym 28758 rx_09_fifo.rd_addr_gray[0] -.sym 28764 rx_09_fifo.rd_addr_gray_SB_LUT4_I2_O[3] -.sym 28765 rx_09_fifo.rd_addr_gray_SB_DFFESR_Q_7_D_SB_LUT4_I3_O_SB_LUT4_O_I3[1] +.sym 28546 rx_24_fifo.rd_addr_gray_wr_r[6] +.sym 28547 rx_24_fifo.wr_addr_gray_SB_LUT4_I2_1_O[7] +.sym 28548 rx_24_fifo.rd_addr_gray_wr_r[7] +.sym 28549 rx_24_fifo.wr_addr_gray_SB_LUT4_I2_1_O[6] +.sym 28551 rx_24_fifo.full_o_SB_DFFSR_Q_D_SB_LUT4_O_I1[0] +.sym 28552 rx_24_fifo.full_o_SB_DFFSR_Q_D_SB_LUT4_O_I1[1] +.sym 28553 rx_24_fifo.full_o_SB_DFFSR_Q_D_SB_LUT4_O_I1[2] +.sym 28556 rx_24_fifo.wr_addr_gray_SB_LUT4_I2_1_O[1] +.sym 28557 rx_24_fifo.wr_addr_gray_SB_LUT4_I2_1_O[2] +.sym 28560 rx_24_fifo.wr_addr_gray_SB_LUT4_I2_1_O[2] +.sym 28561 rx_24_fifo.wr_addr_gray_SB_LUT4_I2_1_O[3] +.sym 28562 rx_24_fifo.full_o_SB_DFFSR_Q_D_SB_LUT4_O_I1_SB_LUT4_O_I0[0] +.sym 28563 rx_24_fifo.full_o_SB_DFFSR_Q_D_SB_LUT4_O_I1_SB_LUT4_O_I0[1] +.sym 28564 lvds_rx_24_inst.r_push_SB_LUT4_I0_1_I1_SB_LUT4_O_I2[1] +.sym 28565 rx_24_fifo.full_o_SB_DFFSR_Q_D_SB_LUT4_O_I1_SB_LUT4_O_I0[3] +.sym 28568 rx_24_fifo.wr_addr[0] +.sym 28569 rx_24_fifo.wr_addr_gray_SB_LUT4_I2_1_O[1] +.sym 28572 rx_24_fifo.wr_addr_gray_SB_LUT4_I2_1_O[4] +.sym 28573 rx_24_fifo.wr_addr_gray_SB_LUT4_I2_1_O[5] +.sym 28575 rx_24_fifo.rd_addr_gray_wr_r[5] +.sym 28576 rx_24_fifo.wr_addr_gray_SB_LUT4_I2_1_O[5] +.sym 28577 rx_24_fifo.wr_addr_gray_SB_LUT4_I2_1_O[6] +.sym 28584 lvds_rx_24_inst.r_state_if_SB_LUT4_I2_O[0] +.sym 28585 lvds_rx_24_inst.r_phase_count_SB_LUT4_I1_O[0] +.sym 28586 rx_24_fifo.full_o_SB_DFFSR_Q_D_SB_LUT4_O_I1_SB_LUT4_O_I0[1] +.sym 28587 rx_24_fifo.wr_addr_gray_SB_DFFESR_Q_6_D[1] +.sym 28588 rx_24_fifo.wr_addr_gray_SB_DFFESR_Q_6_D[2] +.sym 28589 rx_24_fifo.rd_addr_gray_wr_r[2] +.sym 28590 rx_24_fifo.rd_addr_gray_wr_r[0] +.sym 28591 rx_24_fifo.wr_addr_gray_SB_DFFESR_Q_7_D[1] +.sym 28592 rx_24_fifo.wr_addr_gray_SB_DFFESR_Q_7_D[2] +.sym 28593 lvds_rx_24_inst.r_push_SB_LUT4_I0_1_I1_SB_LUT4_O_1_I3[0] +.sym 28594 w_rx_24_fifo_push +.sym 28595 rx_24_fifo.full_o_SB_LUT4_I0_O[1] +.sym 28596 rx_24_fifo.full_o_SB_LUT4_I0_O[2] +.sym 28597 rx_24_fifo.full_o_SB_LUT4_I0_O[3] +.sym 28600 i_smi_a1_SB_LUT4_I1_O_SB_LUT4_O_I2_SB_LUT4_I0_O[2] +.sym 28601 w_rx_24_fifo_push +.sym 28604 rx_24_fifo.wr_addr[0] +.sym 28605 rx_24_fifo.rd_addr_gray_wr_r[0] +.sym 28618 rx_24_fifo.rd_addr_gray_wr[5] +.sym 28622 rx_24_fifo.rd_addr_gray_wr[0] +.sym 28638 rx_24_fifo.rd_addr_gray_wr[1] +.sym 28679 i_smi_a1$SB_IO_IN +.sym 28680 i_smi_a3$SB_IO_IN +.sym 28681 i_smi_a2$SB_IO_IN +.sym 28683 i_smi_a2$SB_IO_IN +.sym 28684 i_smi_a1$SB_IO_IN +.sym 28685 i_smi_a3$SB_IO_IN +.sym 28708 lvds_rx_09_inst.r_state_if_SB_LUT4_I2_O[0] +.sym 28709 lvds_rx_09_inst.o_fifo_data[6] +.sym 28712 lvds_rx_09_inst.r_state_if_SB_LUT4_I2_O[0] +.sym 28713 lvds_rx_09_inst.o_fifo_data[14] +.sym 28716 lvds_rx_09_inst.r_state_if_SB_LUT4_I2_O[0] +.sym 28717 lvds_rx_09_inst.o_fifo_data[10] +.sym 28720 lvds_rx_09_inst.r_state_if_SB_LUT4_I2_O[0] +.sym 28721 lvds_rx_09_inst.o_fifo_data[12] +.sym 28722 w_rx_09_fifo_pulled_data[11] +.sym 28723 w_rx_09_fifo_pulled_data[27] +.sym 28724 smi_ctrl_ins.int_cnt_09[3] +.sym 28725 smi_ctrl_ins.o_smi_data_out_SB_DFFE_Q_D_SB_LUT4_O_I2_SB_LUT4_O_I3[3] +.sym 28726 w_rx_09_fifo_pulled_data[8] +.sym 28727 w_rx_09_fifo_pulled_data[24] +.sym 28728 smi_ctrl_ins.int_cnt_09[3] +.sym 28729 smi_ctrl_ins.int_cnt_09_SB_DFFESR_Q_D_SB_LUT4_O_I3[1] +.sym 28730 w_rx_09_fifo_pulled_data[3] +.sym 28731 w_rx_09_fifo_pulled_data[19] +.sym 28732 smi_ctrl_ins.int_cnt_09[3] +.sym 28733 smi_ctrl_ins.int_cnt_09_SB_DFFESR_Q_D_SB_LUT4_O_I3[1] +.sym 28736 lvds_rx_09_inst.r_state_if_SB_LUT4_I2_O[0] +.sym 28737 lvds_rx_09_inst.o_fifo_data[8] +.sym 28738 w_rx_09_fifo_pulled_data[2] +.sym 28739 w_rx_09_fifo_pulled_data[18] +.sym 28740 smi_ctrl_ins.int_cnt_09[3] +.sym 28741 smi_ctrl_ins.int_cnt_09_SB_DFFESR_Q_D_SB_LUT4_O_I3[1] +.sym 28742 w_rx_09_fifo_pulled_data[10] +.sym 28743 w_rx_09_fifo_pulled_data[26] +.sym 28744 smi_ctrl_ins.int_cnt_09[3] +.sym 28745 smi_ctrl_ins.o_smi_data_out_SB_DFFE_Q_5_D_SB_LUT4_O_I1_SB_LUT4_O_I3[3] +.sym 28746 w_rx_09_fifo_pulled_data[14] +.sym 28747 w_rx_09_fifo_pulled_data[30] +.sym 28748 smi_ctrl_ins.int_cnt_09[3] +.sym 28749 smi_ctrl_ins.o_smi_data_out_SB_DFFE_Q_1_D_SB_LUT4_O_I1_SB_LUT4_O_I3[3] +.sym 28750 w_rx_09_fifo_pulled_data[7] +.sym 28751 w_rx_09_fifo_pulled_data[23] +.sym 28752 smi_ctrl_ins.int_cnt_09[3] +.sym 28753 smi_ctrl_ins.int_cnt_09_SB_DFFESR_Q_D_SB_LUT4_O_I3[1] +.sym 28754 w_rx_09_fifo_pulled_data[15] +.sym 28755 w_rx_09_fifo_pulled_data[31] +.sym 28756 smi_ctrl_ins.int_cnt_09[3] +.sym 28757 smi_ctrl_ins.o_smi_data_out_SB_DFFE_Q_D_SB_LUT4_O_I1_SB_LUT4_O_I3[3] +.sym 28758 w_rx_09_fifo_pulled_data[6] +.sym 28759 w_rx_09_fifo_pulled_data[22] +.sym 28760 smi_ctrl_ins.int_cnt_09[3] +.sym 28761 smi_ctrl_ins.int_cnt_09_SB_DFFESR_Q_D_SB_LUT4_O_I3[1] +.sym 28762 w_rx_09_fifo_pulled_data[13] +.sym 28763 w_rx_09_fifo_pulled_data[29] +.sym 28764 smi_ctrl_ins.int_cnt_09[3] +.sym 28765 smi_ctrl_ins.o_smi_data_out_SB_DFFE_Q_2_D_SB_LUT4_O_I1_SB_LUT4_O_I3[3] +.sym 28766 w_rx_09_fifo_pulled_data[5] +.sym 28767 w_rx_09_fifo_pulled_data[21] +.sym 28768 smi_ctrl_ins.int_cnt_09[3] +.sym 28769 smi_ctrl_ins.int_cnt_09_SB_DFFESR_Q_D_SB_LUT4_O_I3[1] .sym 28772 lvds_rx_09_inst.r_state_if_SB_LUT4_I2_O[0] -.sym 28773 lvds_rx_09_inst.o_fifo_data[15] +.sym 28773 lvds_rx_09_inst.o_fifo_data[21] .sym 28776 lvds_rx_09_inst.r_state_if_SB_LUT4_I2_O[0] -.sym 28777 lvds_rx_09_inst.o_fifo_data[25] +.sym 28777 lvds_rx_09_inst.o_fifo_data[23] .sym 28780 lvds_rx_09_inst.r_state_if_SB_LUT4_I2_O[0] -.sym 28781 lvds_rx_09_inst.o_fifo_data[27] +.sym 28781 lvds_rx_09_inst.o_fifo_data[28] .sym 28784 lvds_rx_09_inst.r_state_if_SB_LUT4_I2_O[0] .sym 28785 lvds_rx_09_inst.o_fifo_data[29] .sym 28788 lvds_rx_09_inst.r_state_if_SB_LUT4_I2_O[0] -.sym 28789 lvds_rx_09_inst.o_fifo_data[23] +.sym 28789 lvds_rx_09_inst.o_fifo_data[18] .sym 28792 lvds_rx_09_inst.r_state_if_SB_LUT4_I2_O[0] -.sym 28793 lvds_rx_09_inst.o_fifo_data[21] +.sym 28793 lvds_rx_09_inst.o_fifo_data[27] .sym 28796 lvds_rx_09_inst.r_state_if_SB_LUT4_I2_O[0] -.sym 28797 lvds_rx_09_inst.o_fifo_data[19] +.sym 28797 lvds_rx_09_inst.o_fifo_data[25] .sym 28800 lvds_rx_09_inst.r_state_if_SB_LUT4_I2_O[0] -.sym 28801 lvds_rx_09_inst.o_fifo_data[17] -.sym 28802 rx_09_fifo.rd_addr_gray_SB_DFFESR_Q_6_D[1] -.sym 28806 w_rx_09_fifo_push -.sym 28807 rx_09_fifo.wr_addr_gray_SB_LUT4_I2_1_O[7] -.sym 28808 rx_09_fifo.rd_addr_gray_wr_r[7] -.sym 28809 w_rx_09_fifo_full -.sym 28810 rx_09_fifo.rd_addr_gray_SB_DFFESR_Q_7_D_SB_LUT4_I3_O_SB_LUT4_O_I3[2] -.sym 28814 w_rx_09_fifo_pulled_data[13] -.sym 28815 w_rx_09_fifo_pulled_data[29] -.sym 28816 i_smi_a2_SB_LUT4_I1_O_SB_LUT4_I3_I2_SB_LUT4_O_I3[1] -.sym 28817 smi_ctrl_ins.o_smi_data_out_SB_DFFE_Q_2_D_SB_LUT4_O_I1_SB_LUT4_O_I3[3] -.sym 28818 w_rx_09_fifo_pulled_data[6] -.sym 28819 w_rx_09_fifo_pulled_data[22] -.sym 28820 i_smi_a2_SB_LUT4_I1_O_SB_LUT4_I3_I2_SB_LUT4_O_I3[1] -.sym 28821 i_smi_a2_SB_LUT4_I1_O_SB_LUT4_I3_I2[1] -.sym 28822 w_rx_09_fifo_pulled_data[5] -.sym 28823 w_rx_09_fifo_pulled_data[21] -.sym 28824 i_smi_a2_SB_LUT4_I1_O_SB_LUT4_I3_I2_SB_LUT4_O_I3[1] -.sym 28825 i_smi_a2_SB_LUT4_I1_O_SB_LUT4_I3_I2[1] -.sym 28828 rx_09_fifo.rd_addr_gray_SB_LUT4_I2_O[7] -.sym 28829 rx_09_fifo.rd_addr_gray_SB_LUT4_I2_O[6] -.sym 28830 rx_09_fifo.rd_addr_gray_SB_LUT4_I2_O[6] -.sym 28834 rx_09_fifo.rd_addr_gray_wr[6] -.sym 28838 rx_09_fifo.rd_addr_gray[1] -.sym 28842 rx_09_fifo.rd_addr_gray_wr[1] -.sym 28846 rx_09_fifo.rd_addr_gray_wr[2] -.sym 28850 w_rx_09_fifo_pulled_data[14] -.sym 28851 w_rx_09_fifo_pulled_data[30] -.sym 28852 i_smi_a2_SB_LUT4_I1_O_SB_LUT4_I3_I2_SB_LUT4_O_I3[1] -.sym 28853 smi_ctrl_ins.o_smi_data_out_SB_DFFE_Q_1_D_SB_LUT4_O_I1_SB_LUT4_O_I3[3] -.sym 28854 rx_09_fifo.rd_addr_gray[6] -.sym 28858 rx_09_fifo.rd_addr_gray[2] -.sym 28862 rx_24_fifo.rd_addr[7] -.sym 28866 i_smi_a2_SB_LUT4_I1_O[1] -.sym 28867 smi_ctrl_ins.o_smi_data_out_SB_DFFE_Q_D_SB_LUT4_O_I1_SB_LUT4_O_1_I1[1] -.sym 28868 smi_ctrl_ins.o_smi_data_out_SB_DFFE_Q_D_SB_LUT4_O_I1_SB_LUT4_O_1_I1[2] -.sym 28869 i_smi_a2_SB_LUT4_I1_O_SB_LUT4_I3_1_O[3] -.sym 28873 smi_ctrl_ins.int_cnt_24[5] -.sym 28875 i_smi_a2_SB_LUT4_I1_O_SB_LUT4_I3_1_I2_SB_LUT4_O_I3[1] -.sym 28876 i_smi_soe_se$rename$0 -.sym 28877 i_smi_a1_SB_LUT4_I1_O_SB_LUT4_I1_O[2] -.sym 28881 i_smi_a2_SB_LUT4_I1_O_SB_LUT4_I3_1_I2_SB_LUT4_O_I3[1] -.sym 28883 i_smi_a1_SB_LUT4_I1_O_SB_LUT4_O_I2_SB_LUT4_I0_O[0] -.sym 28884 i_smi_a1_SB_LUT4_I1_O_SB_LUT4_O_I2_SB_LUT4_I0_O[1] -.sym 28885 i_smi_a1_SB_LUT4_I1_O[2] -.sym 28887 i_smi_a2_SB_LUT4_I1_O[1] -.sym 28888 i_smi_soe_se$rename$0 -.sym 28889 i_smi_a1_SB_LUT4_I1_O_SB_LUT4_I1_O[2] -.sym 28891 i_smi_soe_se$rename$0 -.sym 28892 i_smi_a1_SB_LUT4_I1_O_SB_LUT4_I1_O[2] -.sym 28893 i_smi_a2_SB_LUT4_I1_O_SB_LUT4_I3_1_I2[1] -.sym 28894 smi_ctrl_ins.int_cnt_24[4] -.sym 28895 smi_ctrl_ins.int_cnt_24[5] -.sym 28896 i_smi_a2_SB_LUT4_I1_O_SB_LUT4_I3_1_I2_SB_LUT4_O_I3[1] -.sym 28897 w_rx_24_fifo_empty -.sym 28900 lvds_rx_09_inst.r_state_if_SB_LUT4_I2_O[0] -.sym 28901 io_pmod[6]$SB_IO_IN -.sym 28904 lvds_rx_09_inst.r_state_if_SB_LUT4_I2_O[0] -.sym 28905 lvds_rx_09_inst.o_fifo_data[13] -.sym 28908 lvds_rx_09_inst.r_state_if_SB_LUT4_I2_O[0] -.sym 28909 io_pmod[7]$SB_IO_IN -.sym 28914 w_rx_24_fifo_pulled_data[15] -.sym 28915 w_rx_24_fifo_pulled_data[7] -.sym 28916 i_smi_a2_SB_LUT4_I1_O_SB_LUT4_I3_1_I2[1] -.sym 28917 i_smi_a2_SB_LUT4_I1_O_SB_LUT4_I3_1_I2_SB_LUT4_O_I3[1] -.sym 28920 lvds_rx_09_inst.r_state_if_SB_LUT4_I2_O[0] -.sym 28921 lvds_rx_09_inst.o_fifo_data[6] -.sym 28922 w_rx_24_fifo_pulled_data[11] -.sym 28923 w_rx_24_fifo_pulled_data[3] -.sym 28924 i_smi_a2_SB_LUT4_I1_O_SB_LUT4_I3_1_I2[1] -.sym 28925 i_smi_a2_SB_LUT4_I1_O_SB_LUT4_I3_1_I2_SB_LUT4_O_I3[1] -.sym 28928 lvds_rx_09_inst.r_state_if_SB_LUT4_I2_O[0] -.sym 28929 w_rx_09_fifo_data[1] -.sym 28930 i_smi_a2_SB_LUT4_I1_O[1] -.sym 28931 smi_ctrl_ins.o_smi_data_out_SB_DFFE_Q_4_D_SB_LUT4_O_I1_SB_LUT4_O_1_I1[1] -.sym 28932 smi_ctrl_ins.o_smi_data_out_SB_DFFE_Q_4_D_SB_LUT4_O_I1_SB_LUT4_O_1_I1[2] -.sym 28933 i_smi_a2_SB_LUT4_I1_O_SB_LUT4_I3_1_O[3] -.sym 28934 rx_24_fifo.wr_addr_gray_rd[7] -.sym 28938 i_smi_a2_SB_LUT4_I1_O[0] -.sym 28939 w_rx_24_fifo_pulled_data[16] -.sym 28940 i_smi_a2_SB_LUT4_I1_O_SB_LUT4_I3_1_I2_SB_LUT4_O_I3[1] -.sym 28941 i_smi_a2_SB_LUT4_I1_O_SB_LUT4_I3_1_I2[1] -.sym 28949 rx_24_fifo.rd_addr[7] -.sym 28950 rx_24_fifo.wr_addr[7] -.sym 28954 w_rx_24_fifo_pulled_data[8] -.sym 28955 w_rx_24_fifo_pulled_data[24] -.sym 28956 i_smi_a2_SB_LUT4_I1_O_SB_LUT4_I3_1_I2_SB_LUT4_O_I3[1] -.sym 28957 smi_ctrl_ins.o_smi_data_out_SB_DFFE_Q_7_D_SB_LUT4_O_I0_SB_LUT4_O_I3[3] -.sym 28961 rx_24_fifo.rd_addr[0] -.sym 28962 w_rx_24_fifo_pulled_data[31] -.sym 28963 w_rx_24_fifo_pulled_data[23] -.sym 28964 i_smi_a2_SB_LUT4_I1_O_SB_LUT4_I3_1_I2_SB_LUT4_O_I3[1] -.sym 28965 i_smi_a2_SB_LUT4_I1_O_SB_LUT4_I3_1_I2[1] -.sym 28966 smi_ctrl_ins.r_fifo_24_pull_SB_LUT4_I0_I1[0] -.sym 28967 rx_24_fifo.wr_addr_gray_rd_r[6] -.sym 28968 rx_24_fifo.rd_addr[7] -.sym 28969 rx_24_fifo.wr_addr_gray_rd_r[7] -.sym 28970 w_rx_24_fifo_pulled_data[27] -.sym 28971 w_rx_24_fifo_pulled_data[19] -.sym 28972 i_smi_a2_SB_LUT4_I1_O_SB_LUT4_I3_1_I2_SB_LUT4_O_I3[1] -.sym 28973 i_smi_a2_SB_LUT4_I1_O_SB_LUT4_I3_1_I2[1] -.sym 28976 w_lvds_rx_09_d1_SB_LUT4_I0_O_SB_LUT4_O_I2_SB_LUT4_I0_O[0] -.sym 28977 w_lvds_rx_09_d0 -.sym 28980 w_lvds_rx_09_d1_SB_LUT4_I0_O_SB_LUT4_O_I2_SB_LUT4_I0_O[0] -.sym 28981 w_lvds_rx_09_d1 -.sym 28982 w_rx_24_fifo_pull -.sym 28983 smi_ctrl_ins.r_fifo_24_pull_SB_LUT4_I0_I1[0] -.sym 28984 rx_24_fifo.rd_addr[6] -.sym 28985 smi_ctrl_ins.r_fifo_24_pull_SB_LUT4_I0_I3[3] -.sym 28990 rx_24_fifo.wr_addr_gray_rd_r[6] -.sym 28991 rx_24_fifo.wr_addr_gray_rd_r[7] -.sym 28992 rx_24_fifo.rd_addr_gray_SB_LUT4_I2_O[7] -.sym 28993 rx_24_fifo.rd_addr_gray_SB_LUT4_I2_O[6] -.sym 28994 rx_24_fifo.rd_addr_gray_wr[4] -.sym 29000 w_lvds_rx_09_d1_SB_LUT4_I0_O_SB_LUT4_O_I2[2] -.sym 29001 w_lvds_rx_09_d1_SB_LUT4_I0_O_SB_LUT4_O_I2[3] -.sym 29002 rx_24_fifo.rd_addr_gray[3] -.sym 29006 rx_24_fifo.rd_addr_gray[4] -.sym 29010 rx_24_fifo.rd_addr_gray[6] -.sym 29014 rx_24_fifo.rd_addr_gray_wr[3] -.sym 29018 rx_24_fifo.rd_addr_gray_wr[6] -.sym 29022 rx_24_fifo.rd_addr_gray_wr[2] -.sym 29028 rx_24_fifo.full_o_SB_LUT4_I0_I1_SB_LUT4_O_1_I2[1] -.sym 29029 lvds_rx_24_inst.r_push_SB_LUT4_I3_I1[3] -.sym 29030 rx_24_fifo.rd_addr_gray_wr_r[3] -.sym 29031 lvds_rx_24_inst.r_push_SB_LUT4_I3_I1[2] -.sym 29032 lvds_rx_24_inst.r_push_SB_LUT4_I3_I1[3] -.sym 29033 w_rx_24_fifo_push -.sym 29035 rx_24_fifo.full_o_SB_LUT4_I0_O_SB_LUT4_O_I1_SB_LUT4_O_1_I3[0] -.sym 29036 rx_24_fifo.wr_addr_gray_SB_LUT4_I2_1_O[2] -.sym 29037 rx_24_fifo.wr_addr_gray_SB_LUT4_I2_1_O[3] -.sym 29038 rx_24_fifo.wr_addr_gray_SB_LUT4_I2_1_O[6] -.sym 29043 rx_24_fifo.full_o_SB_LUT4_I0_O_SB_LUT4_O_I1[0] -.sym 29044 rx_24_fifo.full_o_SB_LUT4_I0_O_SB_LUT4_O_I1[1] -.sym 29045 rx_24_fifo.full_o_SB_LUT4_I0_O_SB_LUT4_O_I1[2] -.sym 29047 rx_24_fifo.full_o_SB_LUT4_I0_O_SB_LUT4_O_I1_SB_LUT4_O_I0[1] -.sym 29048 rx_24_fifo.wr_addr_gray_SB_LUT4_I2_1_O[1] -.sym 29049 rx_24_fifo.wr_addr_gray_SB_LUT4_I2_1_O[2] -.sym 29052 rx_24_fifo.full_o_SB_LUT4_I0_I1_SB_LUT4_O_1_I2[3] -.sym 29053 rx_24_fifo.wr_addr_gray_SB_LUT4_I2_1_O[6] -.sym 29056 rx_24_fifo.rd_addr_gray_wr_r[3] -.sym 29057 rx_24_fifo.wr_addr_gray_SB_LUT4_I2_1_O[3] -.sym 29058 rx_24_fifo.full_o_SB_LUT4_I0_I1_SB_LUT4_O_I0[0] -.sym 29059 rx_24_fifo.full_o_SB_LUT4_I0_I1_SB_LUT4_O_I0[1] -.sym 29060 rx_24_fifo.full_o_SB_LUT4_I0_I1_SB_LUT4_O_I0[2] -.sym 29061 rx_24_fifo.full_o_SB_LUT4_I0_I1_SB_LUT4_O_I0[3] -.sym 29064 rx_24_fifo.wr_addr_gray_SB_LUT4_I2_1_O[3] -.sym 29065 rx_24_fifo.full_o_SB_LUT4_I0_I1_SB_LUT4_O_2_I2[1] -.sym 29066 rx_24_fifo.full_o_SB_LUT4_I0_O_SB_LUT4_O_I1_SB_LUT4_O_I0[0] -.sym 29067 rx_24_fifo.full_o_SB_LUT4_I0_O_SB_LUT4_O_I1_SB_LUT4_O_I0[1] -.sym 29068 lvds_rx_24_inst.r_push_SB_LUT4_I3_I1[1] -.sym 29069 rx_24_fifo.full_o_SB_LUT4_I0_O_SB_LUT4_O_I1_SB_LUT4_O_I0[3] -.sym 29072 rx_24_fifo.wr_addr_gray_SB_LUT4_I2_1_O[1] -.sym 29073 rx_24_fifo.wr_addr_gray_SB_LUT4_I2_1_O[2] -.sym 29076 rx_24_fifo.wr_addr[0] -.sym 29077 rx_24_fifo.wr_addr_gray_SB_LUT4_I2_1_O[1] -.sym 29080 rx_24_fifo.wr_addr[0] -.sym 29081 rx_24_fifo.rd_addr_gray_wr_r[0] -.sym 29084 rx_24_fifo.full_o_SB_LUT4_I0_I1_SB_LUT4_O_2_I2[1] -.sym 29085 rx_24_fifo.full_o_SB_LUT4_I0_I1_SB_LUT4_O_1_I2[3] -.sym 29091 rx_24_fifo.wr_addr[0] -.sym 29092 rx_24_fifo.rd_addr_gray_wr_r[0] -.sym 29093 rx_24_fifo.wr_addr_gray_SB_LUT4_I2_1_O[1] -.sym 29094 rx_24_fifo.wr_addr_gray[2] -.sym 29098 rx_24_fifo.wr_addr_gray[0] -.sym 29102 w_lvds_rx_09_d1_SB_LUT4_I0_O_SB_LUT4_O_I2[2] -.sym 29103 w_lvds_rx_09_d1_SB_LUT4_I0_O_SB_LUT4_O_I2[1] -.sym 29104 w_lvds_rx_09_d1_SB_LUT4_I0_O_SB_LUT4_O_I2[0] -.sym 29105 w_lvds_rx_09_d1_SB_LUT4_I0_O_SB_LUT4_O_I2[3] -.sym 29110 rx_24_fifo.wr_addr_gray[4] -.sym 29132 rx_24_fifo.wr_addr_gray_SB_LUT4_I2_1_O[2] -.sym 29133 rx_24_fifo.wr_addr_gray_SB_LUT4_I2_1_O[3] -.sym 29171 w_lvds_rx_09_d1_SB_LUT4_I0_O_SB_LUT4_O_I2[3] -.sym 29172 w_rx_09_fifo_full -.sym 29173 w_lvds_rx_09_d1_SB_LUT4_I0_O_SB_LUT4_O_I2[2] -.sym 29179 lvds_rx_09_inst.r_push_SB_DFFNESR_Q_E_SB_LUT4_O_I1[0] -.sym 29180 w_lvds_rx_09_d1_SB_LUT4_I0_O_SB_LUT4_O_I2[3] -.sym 29181 i_smi_a1_SB_LUT4_I1_O[2] -.sym 29218 rx_09_fifo.rd_addr_gray_SB_DFFESR_Q_7_D_SB_LUT4_I3_O_SB_LUT4_O_I3[0] -.sym 29219 rx_09_fifo.rd_addr_gray_SB_DFFESR_Q_7_D_SB_LUT4_I3_O_SB_LUT4_O_I3[1] -.sym 29220 rx_09_fifo.rd_addr_gray_SB_DFFESR_Q_7_D_SB_LUT4_I3_O_SB_LUT4_O_I3[2] -.sym 29221 rx_09_fifo.rd_addr_gray_SB_DFFESR_Q_7_D_SB_LUT4_I3_O_SB_LUT4_O_I3[3] -.sym 29222 rx_09_fifo.wr_addr_gray_rd_r[6] -.sym 29223 rx_09_fifo.wr_addr_gray_rd_r[7] -.sym 29224 rx_09_fifo.rd_addr_gray_SB_LUT4_I2_O[7] -.sym 29225 rx_09_fifo.rd_addr_gray_SB_LUT4_I2_O[6] -.sym 29228 rx_09_fifo.rd_addr_gray_SB_LUT4_I2_O[1] -.sym 29229 rx_09_fifo.rd_addr_gray_SB_LUT4_I2_O[2] -.sym 29232 rx_09_fifo.rd_addr_gray_SB_LUT4_I2_O[2] -.sym 29233 rx_09_fifo.rd_addr_gray_SB_LUT4_I2_O[3] -.sym 29236 rx_09_fifo.rd_addr[0] -.sym 29237 rx_09_fifo.rd_addr_gray_SB_LUT4_I2_O[1] -.sym 29238 rx_09_fifo.rd_addr_gray_wr[4] -.sym 29245 io_smi_data[7]$SB_IO_OUT -.sym 29248 rx_09_fifo.rd_addr_gray_SB_DFFESR_Q_7_D_SB_LUT4_I3_O_SB_LUT4_O_I3[2] -.sym 29249 rx_09_fifo.rd_addr_gray_SB_LUT4_I2_O[6] -.sym 29250 rx_09_fifo.rd_addr_gray_SB_DFFESR_Q_7_D[3] -.sym 29254 rx_09_fifo.rd_addr_gray_SB_DFFESR_Q_5_D[3] -.sym 29261 rx_09_fifo.rd_addr[0] -.sym 29262 rx_09_fifo.rd_addr_gray_SB_LUT4_I2_O[2] -.sym 29266 rx_09_fifo.rd_addr_gray_SB_DFFESR_Q_7_D_SB_LUT4_I3_O_SB_LUT4_O_I3[1] -.sym 29270 rx_09_fifo.rd_addr_gray_SB_LUT4_I2_O[3] -.sym 29276 rx_09_fifo.rd_addr_gray_SB_DFFESR_Q_7_D_SB_LUT4_I3_O_SB_LUT4_O_I3[1] -.sym 29277 rx_09_fifo.rd_addr_gray_SB_DFFESR_Q_7_D_SB_LUT4_I3_O_SB_LUT4_O_I3[2] -.sym 29278 rx_09_fifo.rd_addr_gray_SB_LUT4_I2_O[1] -.sym 29283 rx_09_fifo.wr_addr[0] -.sym 29288 rx_09_fifo.full_o_SB_DFFSR_Q_D_SB_LUT4_O_I0_SB_LUT4_O_I2[1] -.sym 29289 rx_09_fifo.wr_addr[0] -.sym 29292 rx_09_fifo.wr_addr[2] -.sym 29293 rx_09_fifo.wr_addr_gray_SB_LUT4_I2_1_I3[2] -.sym 29296 rx_09_fifo.wr_addr[3] -.sym 29297 rx_09_fifo.wr_addr_gray_SB_LUT4_I2_1_I3[3] -.sym 29300 rx_09_fifo.wr_addr[4] -.sym 29301 rx_09_fifo.wr_addr_gray_SB_LUT4_I2_1_I3[4] -.sym 29304 rx_09_fifo.wr_addr[5] -.sym 29305 rx_09_fifo.wr_addr_gray_SB_LUT4_I2_1_I3[5] -.sym 29308 rx_09_fifo.wr_addr[6] -.sym 29309 rx_09_fifo.wr_addr_gray_SB_LUT4_I2_1_I3[6] -.sym 29312 rx_09_fifo.wr_addr[7] -.sym 29313 rx_09_fifo.wr_addr_gray_SB_LUT4_I2_1_I3[7] +.sym 28801 lvds_rx_09_inst.o_fifo_data[16] +.sym 28803 smi_ctrl_ins.int_cnt_09[3] +.sym 28807 smi_ctrl_ins.int_cnt_09[4] +.sym 28808 $PACKER_VCC_NET +.sym 28811 smi_ctrl_ins.int_cnt_09[5] +.sym 28812 $PACKER_VCC_NET +.sym 28813 smi_ctrl_ins.int_cnt_09_SB_DFFESR_Q_D_SB_LUT4_O_I3_SB_LUT4_O_I3[2] +.sym 28814 rx_09_fifo.rd_addr_gray_wr[0] +.sym 28822 io_pmod_SB_DFFSS_Q_D_SB_LUT4_O_I0_SB_LUT4_O_I0[1] +.sym 28826 rx_09_fifo.rd_addr_gray_wr[7] +.sym 28835 i_smi_a2_SB_LUT4_I1_O_SB_LUT4_O_I3_SB_CARRY_CO_I1[4] +.sym 28840 i_smi_a2_SB_LUT4_I1_O_SB_LUT4_O_I3_SB_CARRY_CO_I1[5] +.sym 28845 $nextpnr_ICESTORM_LC_20$I3 +.sym 28849 smi_ctrl_ins.int_cnt_09[5] +.sym 28850 i_smi_a2_SB_LUT4_I1_O[1] +.sym 28861 smi_ctrl_ins.int_cnt_09[4] +.sym 28863 rx_09_fifo.rd_addr_gray_wr_r[0] +.sym 28864 rx_09_fifo.full_o_SB_DFFSR_Q_D_SB_LUT4_O_I1_SB_LUT4_O_I0_SB_LUT4_O_1_I3[1] +.sym 28865 rx_09_fifo.wr_addr[0] +.sym 28867 i_smi_a2_SB_LUT4_I1_O_SB_LUT4_O_I3[3] +.sym 28872 i_smi_a2_SB_LUT4_I1_O_SB_LUT4_O_I3_SB_CARRY_CO_I1[4] +.sym 28876 i_smi_a2_SB_LUT4_I1_O_SB_LUT4_O_I3_SB_CARRY_CO_I1[5] +.sym 28879 $PACKER_VCC_NET +.sym 28881 $nextpnr_ICESTORM_LC_2$I3 +.sym 28883 i_smi_soe_se$rename$0 +.sym 28884 smi_ctrl_ins.r_fifo_24_pull_SB_LUT4_I1_O[2] +.sym 28885 $nextpnr_ICESTORM_LC_2$COUT +.sym 28888 smi_ctrl_ins.int_cnt_09_SB_DFFESR_Q_E_SB_LUT4_O_I1[1] +.sym 28889 i_smi_a1_SB_LUT4_I1_O_SB_LUT4_O_I2_SB_LUT4_I0_O[2] +.sym 28890 i_smi_a2_SB_LUT4_I1_O[0] +.sym 28891 i_smi_a2_SB_LUT4_I1_O[1] +.sym 28892 i_smi_a1_SB_LUT4_I1_O[2] +.sym 28893 i_smi_a2_SB_LUT4_I1_O[3] +.sym 28894 spi_if_ins.state_if_SB_DFFESR_Q_D[2] +.sym 28901 rx_24_fifo.rd_addr[0] +.sym 28902 rx_24_fifo.rd_addr_gray_SB_LUT4_I2_O[6] +.sym 28913 smi_ctrl_ins.int_cnt_09[3] +.sym 28914 rx_24_fifo.rd_addr_gray_SB_LUT4_I2_O[1] +.sym 28918 rx_24_fifo.rd_addr_gray_SB_LUT4_I2_O[5] +.sym 28922 rx_24_fifo.rd_addr_gray_SB_LUT4_I2_O[7] +.sym 28928 rx_24_fifo.rd_addr_gray_SB_DFFESR_Q_7_D_SB_LUT4_I3_O_SB_LUT4_O_2_I0_SB_LUT4_O_1_I3[1] +.sym 28929 rx_24_fifo.rd_addr_gray_SB_DFFESR_Q_7_D_SB_LUT4_I3_O_SB_LUT4_O_2_I0_SB_LUT4_O_1_I3[2] +.sym 28930 rx_24_fifo.rd_addr_gray_SB_DFFESR_Q_7_D_SB_LUT4_I3_O_SB_LUT4_O_I0_SB_LUT4_O_2_I0[0] +.sym 28931 rx_24_fifo.rd_addr[3] +.sym 28932 rx_24_fifo.rd_addr_gray_SB_DFFESR_Q_7_D_SB_LUT4_I3_O_SB_LUT4_O_I0_SB_LUT4_O_2_I0[2] +.sym 28933 rx_24_fifo.rd_addr[4] +.sym 28934 rx_24_fifo.wr_addr_gray_rd[3] +.sym 28938 rx_24_fifo.wr_addr_gray_rd[6] +.sym 28942 rx_24_fifo.wr_addr[7] +.sym 28946 rx_24_fifo.wr_addr_gray[6] +.sym 28950 rx_24_fifo.wr_addr_gray_rd[7] +.sym 28954 rx_24_fifo.wr_addr_gray[3] +.sym 28960 rx_24_fifo.rd_addr_gray_SB_DFFESR_Q_7_D_SB_LUT4_I3_O_SB_LUT4_O_2_I0_SB_LUT4_O_1_I3[0] +.sym 28961 rx_24_fifo.rd_addr[2] +.sym 28963 rx_24_fifo.rd_addr[0] +.sym 28968 rx_24_fifo.rd_addr[1] +.sym 28969 rx_24_fifo.rd_addr[0] +.sym 28972 rx_24_fifo.rd_addr[2] +.sym 28973 rx_24_fifo.rd_addr_gray_SB_LUT4_I2_I3[2] +.sym 28976 rx_24_fifo.rd_addr[3] +.sym 28977 rx_24_fifo.rd_addr_gray_SB_LUT4_I2_I3[3] +.sym 28980 rx_24_fifo.rd_addr[4] +.sym 28981 rx_24_fifo.rd_addr_gray_SB_LUT4_I2_I3[4] +.sym 28984 rx_24_fifo.rd_addr[5] +.sym 28985 rx_24_fifo.rd_addr_gray_SB_LUT4_I2_I3[5] +.sym 28988 rx_24_fifo.rd_addr[6] +.sym 28989 rx_24_fifo.rd_addr_gray_SB_LUT4_I2_I3[6] +.sym 28992 rx_24_fifo.rd_addr[7] +.sym 28993 rx_24_fifo.rd_addr_gray_SB_LUT4_I2_I3[7] +.sym 28996 rx_24_fifo.rd_addr_gray_SB_LUT4_I2_O[4] +.sym 28997 rx_24_fifo.rd_addr_gray_SB_LUT4_I2_O[5] +.sym 29000 rx_24_fifo.rd_addr_gray_SB_LUT4_I2_O[5] +.sym 29001 rx_24_fifo.rd_addr_gray_SB_LUT4_I2_O[6] +.sym 29004 rx_24_fifo.rd_addr_gray_SB_DFFESR_Q_7_D_SB_LUT4_I3_O_SB_LUT4_O_I0_SB_LUT4_O_2_I0[2] +.sym 29005 rx_24_fifo.rd_addr_gray_SB_LUT4_I2_O[4] +.sym 29018 w_rx_24_fifo_full +.sym 29022 rx_24_fifo.rd_addr_gray_SB_DFFESR_Q_7_D_SB_LUT4_I3_O_SB_LUT4_O_2_I0_SB_LUT4_O_1_I3[0] +.sym 29023 rx_24_fifo.rd_addr_gray_SB_DFFESR_Q_7_D_SB_LUT4_I3_O_SB_LUT4_O_2_I0_SB_LUT4_O_1_I3[1] +.sym 29024 rx_24_fifo.rd_addr_gray_SB_DFFESR_Q_7_D_SB_LUT4_I3_O_SB_LUT4_O_2_I0_SB_LUT4_O_1_I3[2] +.sym 29025 rx_24_fifo.rd_addr_gray_SB_DFFESR_Q_7_D_SB_LUT4_I3_O_SB_LUT4_O_2_I0_SB_LUT4_O_1_I3[3] +.sym 29030 rx_24_fifo.rd_addr_gray[3] +.sym 29034 rx_24_fifo.rd_addr_gray_wr[6] +.sym 29054 rx_24_fifo.rd_addr_gray_wr[3] +.sym 29062 rx_24_fifo.rd_addr_gray_SB_DFFESR_Q_3_D[2] +.sym 29074 rx_24_fifo.rd_addr_gray_SB_LUT4_I2_O[4] +.sym 29078 rx_24_fifo.rd_addr_gray_SB_DFFESR_Q_7_D_SB_LUT4_I3_O_SB_LUT4_O_2_I0_SB_LUT4_O_1_I3[1] +.sym 29082 rx_24_fifo.rd_addr_gray_SB_DFFESR_Q_7_D_SB_LUT4_I3_O_SB_LUT4_O_2_I0_SB_LUT4_O_1_I3[2] +.sym 29088 rx_24_fifo.rd_addr_gray_SB_DFFESR_Q_7_D_SB_LUT4_I3_O_SB_LUT4_O_2_I0_SB_LUT4_O_1_I3[2] +.sym 29089 rx_24_fifo.rd_addr_gray_SB_LUT4_I2_O[4] +.sym 29090 rx_24_fifo.wr_addr_gray_SB_LUT4_I2_1_O[5] +.sym 29094 rx_24_fifo.wr_addr_gray_SB_DFFESR_Q_7_D[2] +.sym 29098 rx_24_fifo.wr_addr_gray_SB_DFFESR_Q_7_D[1] +.sym 29102 rx_24_fifo.wr_addr_gray_SB_DFFESR_Q_6_D[1] +.sym 29109 rx_24_fifo.wr_addr[0] +.sym 29112 rx_24_fifo.wr_addr_gray_SB_LUT4_I2_1_O[5] +.sym 29113 rx_24_fifo.wr_addr_gray_SB_LUT4_I2_1_O[6] +.sym 29116 rx_24_fifo.wr_addr_gray_SB_LUT4_I2_1_O[3] +.sym 29117 rx_24_fifo.wr_addr_gray_SB_LUT4_I2_1_O[4] +.sym 29118 rx_24_fifo.wr_addr_gray_SB_DFFESR_Q_6_D[2] +.sym 29142 rx_24_fifo.rd_addr_gray[5] +.sym 29224 lvds_rx_09_inst.r_state_if_SB_LUT4_I2_O[0] +.sym 29225 lvds_rx_09_inst.o_fifo_data[13] +.sym 29228 lvds_rx_09_inst.r_state_if_SB_LUT4_I2_O[0] +.sym 29229 lvds_rx_09_inst.o_fifo_data[7] +.sym 29232 lvds_rx_09_inst.r_state_if_SB_LUT4_I2_O[0] +.sym 29233 io_pmod[6]$SB_IO_IN +.sym 29236 lvds_rx_09_inst.r_state_if_SB_LUT4_I2_O[0] +.sym 29237 io_pmod[7]$SB_IO_IN +.sym 29244 lvds_rx_09_inst.r_state_if_SB_LUT4_I2_O[0] +.sym 29245 lvds_rx_09_inst.o_fifo_data[9] +.sym 29248 lvds_rx_09_inst.r_state_if_SB_LUT4_I2_O[0] +.sym 29249 lvds_rx_09_inst.o_fifo_data[11] +.sym 29252 i_smi_a3$SB_IO_IN +.sym 29253 w_smi_data_output[2] +.sym 29256 i_smi_a3$SB_IO_IN +.sym 29257 w_smi_data_output[1] +.sym 29259 smi_ctrl_ins.int_cnt_09[4] +.sym 29260 $PACKER_VCC_NET +.sym 29261 smi_ctrl_ins.int_cnt_09[3] +.sym 29265 smi_ctrl_ins.r_fifo_09_pull_SB_LUT4_I3_1_O +.sym 29272 i_smi_a3$SB_IO_IN +.sym 29273 w_smi_data_output[7] +.sym 29284 lvds_rx_09_inst.r_state_if_SB_LUT4_I2_O[0] +.sym 29285 lvds_rx_09_inst.o_fifo_data[22] +.sym 29288 lvds_rx_09_inst.r_state_if_SB_LUT4_I2_O[0] +.sym 29289 lvds_rx_09_inst.o_fifo_data[20] +.sym 29292 lvds_rx_09_inst.r_state_if_SB_LUT4_I2_O[0] +.sym 29293 lvds_rx_09_inst.o_fifo_data[17] +.sym 29296 lvds_rx_09_inst.r_state_if_SB_LUT4_I2_O[0] +.sym 29297 lvds_rx_09_inst.o_fifo_data[26] +.sym 29300 rx_09_fifo.full_o_SB_LUT4_I3_O[2] +.sym 29301 rx_09_fifo.wr_addr_gray_SB_LUT4_I2_1_O[4] +.sym 29304 lvds_rx_09_inst.r_state_if_SB_LUT4_I2_O[0] +.sym 29305 lvds_rx_09_inst.o_fifo_data[24] +.sym 29308 lvds_rx_09_inst.r_state_if_SB_LUT4_I2_O[0] +.sym 29309 lvds_rx_09_inst.o_fifo_data[19] +.sym 29312 lvds_rx_09_inst.r_state_if_SB_LUT4_I2_O[0] +.sym 29313 lvds_rx_09_inst.o_fifo_data[15] .sym 29317 rx_09_fifo.wr_addr[0] -.sym 29318 rx_09_fifo.wr_addr_gray_SB_DFFESR_Q_5_D[2] -.sym 29322 rx_09_fifo.wr_addr_gray_SB_LUT4_I2_1_O[6] -.sym 29326 rx_09_fifo.wr_addr_gray_SB_DFFESR_Q_5_D[1] -.sym 29330 rx_09_fifo.wr_addr_gray_SB_DFFESR_Q_7_D[1] -.sym 29334 rx_09_fifo.wr_addr_gray_SB_DFFESR_Q_7_D[2] +.sym 29318 rx_09_fifo.full_o_SB_LUT4_I3_O[2] +.sym 29322 rx_09_fifo.wr_addr_gray_SB_LUT4_I2_1_O[5] +.sym 29326 rx_09_fifo.wr_addr_gray_SB_DFFESR_Q_4_D[1] +.sym 29330 rx_09_fifo.wr_addr_gray_SB_LUT4_I2_1_O[4] +.sym 29334 rx_09_fifo.wr_addr_gray_SB_LUT4_I2_1_O[1] .sym 29338 rx_09_fifo.full_o_SB_LUT4_I3_O[1] -.sym 29342 rx_09_fifo.wr_addr_gray_SB_LUT4_I2_1_O[2] -.sym 29346 rx_09_fifo.wr_addr_gray_SB_LUT4_I2_1_O[5] -.sym 29352 i_smi_a1_SB_LUT4_I1_O[2] -.sym 29353 w_rx_09_fifo_push -.sym 29356 rx_09_fifo.wr_addr[0] -.sym 29357 rx_09_fifo.rd_addr_gray_wr_r[0] -.sym 29358 rx_09_fifo.full_o_SB_LUT4_I3_O[0] -.sym 29359 rx_09_fifo.full_o_SB_LUT4_I3_O[1] -.sym 29360 rx_09_fifo.full_o_SB_LUT4_I3_O[2] -.sym 29361 rx_09_fifo.full_o_SB_LUT4_I3_O[3] -.sym 29362 rx_09_fifo.full_o_SB_LUT4_I3_O[2] -.sym 29370 rx_09_fifo.wr_addr_gray_SB_LUT4_I2_1_O[7] -.sym 29377 w_rx_09_fifo_full -.sym 29379 rx_09_fifo.full_o_SB_DFFSR_Q_D_SB_LUT4_O_I0_SB_LUT4_O_I2[1] -.sym 29384 rx_09_fifo.wr_addr[2] -.sym 29385 rx_09_fifo.full_o_SB_DFFSR_Q_D_SB_LUT4_O_I0_SB_LUT4_O_I2[1] -.sym 29388 rx_09_fifo.wr_addr[3] -.sym 29389 rx_09_fifo.wr_addr_gray_SB_LUT4_I2_I3[2] -.sym 29392 rx_09_fifo.wr_addr[4] -.sym 29393 rx_09_fifo.wr_addr_gray_SB_LUT4_I2_I3[3] -.sym 29396 rx_09_fifo.wr_addr[5] -.sym 29397 rx_09_fifo.wr_addr_gray_SB_LUT4_I2_I3[4] -.sym 29400 rx_09_fifo.wr_addr[6] -.sym 29401 rx_09_fifo.wr_addr_gray_SB_LUT4_I2_I3[5] -.sym 29404 rx_09_fifo.wr_addr[7] -.sym 29405 rx_09_fifo.wr_addr_gray_SB_LUT4_I2_I3[6] -.sym 29406 rx_09_fifo.rd_addr_gray_wr_r[6] -.sym 29407 rx_09_fifo.rd_addr_gray_wr_r[7] -.sym 29408 rx_09_fifo.full_o_SB_DFFSR_Q_D_SB_LUT4_O_I0_SB_LUT4_O_1_I1[6] -.sym 29409 rx_09_fifo.full_o_SB_DFFSR_Q_D_SB_LUT4_O_I0_SB_LUT4_O_1_I1[5] -.sym 29411 i_smi_a2_SB_LUT4_I1_O_SB_LUT4_I3_1_I2_SB_LUT4_O_I3[1] -.sym 29415 smi_ctrl_ins.int_cnt_24[4] -.sym 29416 $PACKER_VCC_NET -.sym 29419 smi_ctrl_ins.int_cnt_24[5] -.sym 29420 $PACKER_VCC_NET -.sym 29421 i_smi_a2_SB_LUT4_I1_O_SB_LUT4_I3_1_I2_SB_LUT4_O_I3[2] -.sym 29422 rx_24_fifo.rd_addr_gray_SB_LUT4_I2_O[6] -.sym 29426 rx_24_fifo.rd_addr_gray_SB_LUT4_I2_O[7] -.sym 29433 rx_24_fifo.rd_addr[0] -.sym 29435 smi_ctrl_ins.int_cnt_24[4] -.sym 29436 $PACKER_VCC_NET -.sym 29437 i_smi_a2_SB_LUT4_I1_O_SB_LUT4_I3_1_I2_SB_LUT4_O_I3[1] -.sym 29443 rx_24_fifo.rd_addr[0] -.sym 29448 rx_24_fifo.empty_o_SB_LUT4_I3_O_SB_LUT4_O_I0[1] -.sym 29449 rx_24_fifo.rd_addr[0] -.sym 29452 rx_24_fifo.empty_o_SB_LUT4_I3_O_SB_LUT4_O_1_I3[1] -.sym 29453 rx_24_fifo.rd_addr_gray_SB_LUT4_I2_I3[2] -.sym 29456 rx_24_fifo.empty_o_SB_LUT4_I3_O_SB_LUT4_O_1_I3[2] -.sym 29457 rx_24_fifo.rd_addr_gray_SB_LUT4_I2_I3[3] -.sym 29460 rx_24_fifo.rd_addr[4] -.sym 29461 rx_24_fifo.rd_addr_gray_SB_LUT4_I2_I3[4] -.sym 29464 rx_24_fifo.rd_addr[5] -.sym 29465 rx_24_fifo.rd_addr_gray_SB_LUT4_I2_I3[5] -.sym 29468 rx_24_fifo.rd_addr[6] -.sym 29469 rx_24_fifo.rd_addr_gray_SB_LUT4_I2_I3[6] -.sym 29472 rx_24_fifo.rd_addr[7] -.sym 29473 rx_24_fifo.rd_addr_gray_SB_LUT4_I2_I3[7] -.sym 29476 rx_24_fifo.empty_o_SB_DFFSS_Q_D_SB_LUT4_O_I0_SB_LUT4_O_I0[3] -.sym 29477 rx_24_fifo.rd_addr_gray_SB_LUT4_I2_O[6] -.sym 29480 rx_24_fifo.rd_addr_gray_SB_LUT4_I2_O[7] -.sym 29481 rx_24_fifo.rd_addr_gray_SB_LUT4_I2_O[6] -.sym 29484 rx_24_fifo.rd_addr_gray_SB_LUT4_I2_O[2] -.sym 29485 rx_24_fifo.rd_addr_gray_SB_LUT4_I2_O[3] -.sym 29488 rx_24_fifo.empty_o_SB_DFFSS_Q_D_SB_LUT4_O_I0_SB_LUT4_O_I0[1] -.sym 29489 rx_24_fifo.empty_o_SB_DFFSS_Q_D_SB_LUT4_O_I0_SB_LUT4_O_I0[3] -.sym 29492 rx_24_fifo.rd_addr[0] -.sym 29493 rx_24_fifo.rd_addr_gray_SB_LUT4_I2_O[1] -.sym 29496 rx_24_fifo.rd_addr_gray_SB_LUT4_I2_O[1] -.sym 29497 rx_24_fifo.rd_addr_gray_SB_LUT4_I2_O[2] -.sym 29498 rx_24_fifo.rd_addr_gray_SB_LUT4_I2_O[1] -.sym 29504 rx_24_fifo.rd_addr_gray_SB_LUT4_I2_O[3] -.sym 29505 rx_24_fifo.empty_o_SB_DFFSS_Q_D_SB_LUT4_O_I0_SB_LUT4_O_I0[1] -.sym 29506 rx_24_fifo.rd_addr_gray_SB_DFFESR_Q_5_D[0] -.sym 29507 rx_24_fifo.rd_addr_gray_SB_DFFESR_Q_5_D[1] -.sym 29508 rx_24_fifo.empty_o_SB_LUT4_I3_O_SB_LUT4_O_1_I3[0] -.sym 29509 rx_24_fifo.rd_addr_gray_SB_DFFESR_Q_5_D[3] +.sym 29342 rx_09_fifo.wr_addr_gray_SB_LUT4_I2_1_O[6] +.sym 29347 rx_09_fifo.full_o_SB_DFFSR_Q_D_SB_LUT4_O_I1_SB_LUT4_O_I0_SB_LUT4_O_1_I3[1] +.sym 29352 rx_09_fifo.wr_addr[2] +.sym 29353 rx_09_fifo.full_o_SB_DFFSR_Q_D_SB_LUT4_O_I1_SB_LUT4_O_I0_SB_LUT4_O_1_I3[1] +.sym 29356 rx_09_fifo.wr_addr[3] +.sym 29357 rx_09_fifo.wr_addr_gray_SB_LUT4_I2_I3[2] +.sym 29360 rx_09_fifo.wr_addr[4] +.sym 29361 rx_09_fifo.wr_addr_gray_SB_LUT4_I2_I3[3] +.sym 29364 rx_09_fifo.wr_addr[5] +.sym 29365 rx_09_fifo.wr_addr_gray_SB_LUT4_I2_I3[4] +.sym 29368 rx_09_fifo.wr_addr[6] +.sym 29369 rx_09_fifo.wr_addr_gray_SB_LUT4_I2_I3[5] +.sym 29372 rx_09_fifo.wr_addr[7] +.sym 29373 rx_09_fifo.wr_addr_gray_SB_LUT4_I2_I3[6] +.sym 29376 lvds_rx_09_inst.r_state_if_SB_LUT4_I2_O[0] +.sym 29377 w_rx_09_fifo_data[0] +.sym 29378 i_smi_a2_SB_LUT4_I1_O_SB_LUT4_O_I3[5] +.sym 29379 i_smi_a2_SB_LUT4_I1_O_SB_LUT4_O_I3_SB_LUT4_I0_I1[5] +.sym 29380 i_smi_soe_se$rename$0 +.sym 29381 smi_ctrl_ins.r_fifo_24_pull_SB_LUT4_I1_O[2] +.sym 29382 smi_ctrl_ins.int_cnt_09[4] +.sym 29383 smi_ctrl_ins.int_cnt_09[5] +.sym 29384 smi_ctrl_ins.int_cnt_09[3] +.sym 29385 io_pmod[2]$SB_IO_IN +.sym 29388 lvds_rx_09_inst.r_push_SB_DFFNESR_Q_E_SB_LUT4_O_I1_SB_LUT4_O_I2[2] +.sym 29389 lvds_rx_09_inst.r_push_SB_DFFNESR_Q_E_SB_LUT4_O_I1_SB_LUT4_O_I2[3] +.sym 29390 rx_09_fifo.full_o_SB_DFFSR_Q_D_SB_LUT4_O_I1_SB_LUT4_O_I0_SB_LUT4_O_1_I3[0] +.sym 29391 rx_09_fifo.full_o_SB_DFFSR_Q_D_SB_LUT4_O_I1_SB_LUT4_O_I0_SB_LUT4_O_1_I3[1] +.sym 29392 lvds_rx_09_inst.r_push_SB_LUT4_I3_O_SB_LUT4_O_I3[1] +.sym 29393 rx_09_fifo.full_o_SB_DFFSR_Q_D_SB_LUT4_O_I1_SB_LUT4_O_I0_SB_LUT4_O_1_I3[3] +.sym 29396 lvds_rx_09_inst.r_push_SB_LUT4_I3_O_SB_LUT4_O_I3[3] +.sym 29397 lvds_rx_09_inst.r_push_SB_LUT4_I3_O_SB_LUT4_O_I3[4] +.sym 29398 rx_09_fifo.full_o_SB_DFFSR_Q_D_SB_LUT4_O_I1_SB_LUT4_O_I0_SB_LUT4_O_I0[0] +.sym 29399 rx_09_fifo.full_o_SB_DFFSR_Q_D_SB_LUT4_O_I1_SB_LUT4_O_I0_SB_LUT4_O_I0[1] +.sym 29400 lvds_rx_09_inst.r_push_SB_LUT4_I3_O_SB_LUT4_O_I3[3] +.sym 29401 lvds_rx_09_inst.r_push_SB_LUT4_I3_O_SB_LUT4_O_I3[2] +.sym 29402 rx_09_fifo.full_o_SB_DFFSR_Q_D_SB_LUT4_O_I1_SB_LUT4_O_I0[0] +.sym 29403 rx_09_fifo.full_o_SB_DFFSR_Q_D_SB_LUT4_O_I1_SB_LUT4_O_I0[1] +.sym 29404 rx_09_fifo.full_o_SB_DFFSR_Q_D_SB_LUT4_O_I1_SB_LUT4_O_I0[2] +.sym 29405 rx_09_fifo.full_o_SB_DFFSR_Q_D_SB_LUT4_O_I1_SB_LUT4_O_I0[3] +.sym 29407 lvds_rx_09_inst.r_push_SB_DFFNESR_Q_E_SB_LUT4_O_I1_SB_LUT4_O_I2[3] +.sym 29408 w_rx_09_fifo_full +.sym 29409 lvds_rx_09_inst.r_push_SB_DFFNESR_Q_E_SB_LUT4_O_I1_SB_LUT4_O_I2[2] +.sym 29411 spi_if_ins.o_load_cmd_SB_DFFESR_Q_D[1] +.sym 29412 spi_if_ins.state_if[0] +.sym 29413 spi_if_ins.state_if[1] +.sym 29421 spi_if_ins.state_if_SB_DFFE_Q_E +.sym 29426 spi_if_ins.o_load_cmd_SB_DFFESR_Q_D[1] +.sym 29427 spi_if_ins.r_tx_data_valid_SB_DFFESR_Q_D[0] +.sym 29428 spi_if_ins.state_if[0] +.sym 29429 spi_if_ins.state_if[1] +.sym 29431 spi_if_ins.o_load_cmd_SB_DFFESR_Q_D[1] +.sym 29432 spi_if_ins.state_if[1] +.sym 29433 spi_if_ins.state_if[0] +.sym 29438 spi_if_ins.state_if_SB_DFFESR_Q_D[0] +.sym 29439 spi_if_ins.o_load_cmd_SB_DFFESR_Q_D_SB_LUT4_I1_O[0] +.sym 29440 spi_if_ins.state_if_SB_DFFESR_Q_D[2] +.sym 29441 spi_if_ins.r_tx_data_valid_SB_DFFESR_Q_D[0] +.sym 29444 spi_if_ins.o_load_cmd_SB_DFFESR_Q_D[0] +.sym 29445 spi_if_ins.o_load_cmd_SB_DFFESR_Q_D[1] +.sym 29446 rx_24_fifo.rd_addr[7] +.sym 29447 rx_24_fifo.wr_addr_gray_rd_r[7] +.sym 29448 rx_24_fifo.rd_addr_gray_SB_DFFESR_Q_6_D[2] +.sym 29449 rx_24_fifo.rd_addr[6] +.sym 29453 smi_ctrl_ins.r_fifo_24_pull_SB_LUT4_I3_1_O +.sym 29455 rx_24_fifo.wr_addr_gray_rd_r[7] +.sym 29456 rx_24_fifo.rd_addr_gray_SB_LUT4_I2_O[7] +.sym 29457 w_rx_24_fifo_pull +.sym 29460 i_smi_a1_SB_LUT4_I1_O_SB_LUT4_O_I2_SB_LUT4_I0_O[2] +.sym 29461 w_rx_24_fifo_pull +.sym 29466 rx_24_fifo.rd_addr_gray_SB_DFFESR_Q_7_D_SB_LUT4_I3_O_SB_LUT4_O_I0[0] +.sym 29467 rx_24_fifo.rd_addr_gray_SB_DFFESR_Q_7_D_SB_LUT4_I3_O_SB_LUT4_O_I0[1] +.sym 29468 rx_24_fifo.rd_addr_gray_SB_DFFESR_Q_7_D_SB_LUT4_I3_O_SB_LUT4_O_I0[2] +.sym 29469 rx_24_fifo.rd_addr_gray_SB_DFFESR_Q_7_D_SB_LUT4_I3_O_SB_LUT4_O_I0[3] +.sym 29470 rx_24_fifo.wr_addr_gray_rd_r[7] +.sym 29471 rx_24_fifo.rd_addr[7] +.sym 29472 w_rx_24_fifo_pull +.sym 29473 w_rx_24_fifo_empty +.sym 29474 spi_if_ins.r_tx_data_valid_SB_DFFESR_Q_D[0] +.sym 29475 spi_if_ins.o_load_cmd_SB_DFFESR_Q_D[1] +.sym 29476 spi_if_ins.state_if[0] +.sym 29477 spi_if_ins.state_if[1] +.sym 29480 rx_24_fifo.rd_addr[0] +.sym 29481 rx_24_fifo.rd_addr_gray_SB_DFFESR_Q_7_D[0] +.sym 29482 rx_24_fifo.rd_addr[7] +.sym 29490 rx_24_fifo.rd_addr_gray_wr[7] +.sym 29497 spi_if_ins.r_tx_data_valid_SB_DFFESR_Q_D[0] +.sym 29502 rx_24_fifo.rd_addr_gray_SB_DFFESR_Q_7_D_SB_LUT4_I3_O_SB_LUT4_O_I0_SB_LUT4_O_1_I0[0] +.sym 29503 rx_24_fifo.rd_addr[1] +.sym 29504 rx_24_fifo.rd_addr_gray_SB_DFFESR_Q_6_D[0] +.sym 29505 rx_24_fifo.rd_addr[2] +.sym 29506 spi_if_ins.o_load_cmd_SB_DFFESR_Q_D[0] +.sym 29510 rx_24_fifo.rd_addr_gray_SB_DFFESR_Q_7_D_SB_LUT4_I3_O_SB_LUT4_O_2_I0[0] +.sym 29511 rx_24_fifo.rd_addr_gray_SB_DFFESR_Q_7_D_SB_LUT4_I3_O_SB_LUT4_O_2_I0[1] +.sym 29512 rx_24_fifo.rd_addr_gray_SB_DFFESR_Q_7_D_SB_LUT4_I3_O_SB_LUT4_O_2_I0[2] +.sym 29513 rx_24_fifo.rd_addr_gray_SB_DFFESR_Q_7_D_SB_LUT4_I3_O_SB_LUT4_O_2_I0[3] .sym 29516 rx_24_fifo.rd_addr[0] -.sym 29517 rx_24_fifo.rd_addr_gray_SB_DFFESR_Q_7_D[0] -.sym 29518 rx_24_fifo.empty_o_SB_LUT4_I3_O_SB_LUT4_O_I0[0] -.sym 29519 rx_24_fifo.empty_o_SB_LUT4_I3_O_SB_LUT4_O_I0[1] -.sym 29520 rx_24_fifo.empty_o_SB_LUT4_I3_O_SB_LUT4_O_I0[2] -.sym 29521 rx_24_fifo.empty_o_SB_LUT4_I3_O_SB_LUT4_O_1_I3[1] -.sym 29523 rx_24_fifo.wr_addr_gray_rd_r[5] -.sym 29524 rx_24_fifo.empty_o_SB_DFFSS_Q_D_SB_LUT4_O_I0_SB_LUT4_O_I0[3] -.sym 29525 rx_24_fifo.rd_addr_gray_SB_LUT4_I2_O[6] -.sym 29526 rx_24_fifo.full_o_SB_LUT4_I0_O[0] -.sym 29527 rx_24_fifo.full_o_SB_LUT4_I0_O[1] -.sym 29528 w_rx_24_fifo_push -.sym 29529 rx_24_fifo.full_o_SB_LUT4_I0_O[3] -.sym 29532 rx_24_fifo.wr_addr_gray_rd_r[5] -.sym 29533 rx_24_fifo.rd_addr[5] -.sym 29534 rx_24_fifo.rd_addr_gray_SB_DFFESR_Q_7_D[0] -.sym 29535 rx_24_fifo.rd_addr_gray_SB_DFFESR_Q_7_D[1] -.sym 29536 rx_24_fifo.empty_o_SB_LUT4_I3_O_SB_LUT4_O_I0[2] -.sym 29537 rx_24_fifo.rd_addr_gray_SB_DFFESR_Q_7_D[3] -.sym 29538 rx_24_fifo.full_o_SB_LUT4_I0_I1_SB_LUT4_O_1_I2[0] -.sym 29539 rx_24_fifo.full_o_SB_LUT4_I0_I1_SB_LUT4_O_1_I2[1] -.sym 29540 rx_24_fifo.full_o_SB_LUT4_I0_I1_SB_LUT4_O_1_I2[2] -.sym 29541 rx_24_fifo.full_o_SB_LUT4_I0_I1_SB_LUT4_O_1_I2[3] -.sym 29542 rx_24_fifo.wr_addr_gray_rd[2] -.sym 29546 rx_24_fifo.full_o_SB_LUT4_I0_O_SB_LUT4_O_1_I0[0] -.sym 29547 lvds_rx_24_inst.r_push_SB_LUT4_I3_I1[4] -.sym 29548 rx_24_fifo.full_o_SB_LUT4_I0_O_SB_LUT4_O_1_I0[2] -.sym 29549 lvds_rx_24_inst.r_push_SB_LUT4_I3_I1[5] -.sym 29550 rx_24_fifo.wr_addr_gray_rd[0] -.sym 29554 rx_24_fifo.wr_addr_gray_rd[5] -.sym 29558 w_rx_24_fifo_full -.sym 29559 rx_24_fifo.full_o_SB_LUT4_I0_I1[1] -.sym 29560 rx_24_fifo.full_o_SB_LUT4_I0_I1[2] -.sym 29561 rx_24_fifo.full_o_SB_LUT4_I0_I1[3] -.sym 29562 rx_24_fifo.wr_addr_gray[5] -.sym 29568 rx_24_fifo.full_o_SB_LUT4_I0_I1_SB_LUT4_O_1_I2[0] -.sym 29569 rx_24_fifo.full_o_SB_LUT4_I0_I1_SB_LUT4_O_2_I2[1] -.sym 29570 rx_24_fifo.rd_addr_gray[0] -.sym 29576 rx_24_fifo.full_o_SB_LUT4_I0_O_SB_LUT4_O_1_I0[2] -.sym 29577 rx_24_fifo.wr_addr_gray_SB_LUT4_I2_1_O[6] -.sym 29578 rx_24_fifo.rd_addr_gray[5] -.sym 29582 rx_24_fifo.rd_addr_gray[2] -.sym 29594 rx_24_fifo.rd_addr_gray_wr[5] -.sym 29598 rx_24_fifo.rd_addr_gray_wr[0] -.sym 29602 rx_24_fifo.wr_addr_gray[3] -.sym 29610 rx_24_fifo.wr_addr_gray[1] -.sym 29618 rx_24_fifo.wr_addr_gray_rd[3] -.sym 29626 rx_24_fifo.wr_addr_gray_rd[1] -.sym 29630 rx_24_fifo.wr_addr_gray_rd[4] -.sym 29646 rx_24_fifo.rd_addr_gray[1] -.sym 29662 rx_24_fifo.rd_addr_gray_wr[1] -.sym 29730 io_pmod_SB_DFFSS_Q_D_SB_LUT4_O_I0_SB_LUT4_O_I0_SB_LUT4_O_1_I2[0] -.sym 29731 io_pmod_SB_DFFSS_Q_D_SB_LUT4_O_I0_SB_LUT4_O_I0_SB_LUT4_O_1_I2[1] -.sym 29732 io_pmod_SB_DFFSS_Q_D_SB_LUT4_O_I0_SB_LUT4_O_I0_SB_LUT4_O_1_I2[2] -.sym 29733 io_pmod_SB_DFFSS_Q_D_SB_LUT4_O_I0_SB_LUT4_O_I0_SB_LUT4_O_1_I2[3] -.sym 29738 rx_09_fifo.wr_addr_gray_rd[6] -.sym 29742 rx_09_fifo.wr_addr_gray_rd_r[6] -.sym 29743 rx_09_fifo.rd_addr[7] -.sym 29744 rx_09_fifo.wr_addr_gray_rd_r[7] -.sym 29745 io_pmod_SB_DFFSS_Q_D_SB_LUT4_O_I0_SB_LUT4_O_I0_SB_LUT4_O_1_I2[3] -.sym 29747 rx_09_fifo.rd_addr_gray_SB_DFFESR_Q_5_D[2] -.sym 29748 rx_09_fifo.rd_addr[3] -.sym 29749 rx_09_fifo.rd_addr[4] -.sym 29752 rx_09_fifo.rd_addr_gray_SB_DFFESR_Q_7_D_SB_LUT4_I3_O_SB_LUT4_O_I3[0] -.sym 29753 rx_09_fifo.rd_addr[4] -.sym 29754 rx_09_fifo.wr_addr_gray_rd[7] -.sym 29758 io_pmod_SB_DFFSS_Q_D_SB_LUT4_O_I0_SB_LUT4_O_I0[0] -.sym 29759 io_pmod_SB_DFFSS_Q_D_SB_LUT4_O_I0_SB_LUT4_O_I0[1] -.sym 29760 io_pmod_SB_DFFSS_Q_D_SB_LUT4_O_I0_SB_LUT4_O_I0[2] -.sym 29761 io_pmod_SB_DFFSS_Q_D_SB_LUT4_O_I0_SB_LUT4_O_I0[3] -.sym 29762 rx_09_fifo.rd_addr_gray_SB_DFFESR_Q_5_D[0] -.sym 29763 rx_09_fifo.rd_addr_gray_SB_DFFESR_Q_5_D[1] -.sym 29764 rx_09_fifo.rd_addr_gray_SB_DFFESR_Q_5_D[2] -.sym 29765 rx_09_fifo.rd_addr_gray_SB_DFFESR_Q_5_D[3] -.sym 29766 rx_09_fifo.wr_addr_gray_rd[4] -.sym 29770 rx_09_fifo.wr_addr_gray_rd[3] -.sym 29774 io_pmod_SB_DFFSS_Q_D_SB_LUT4_O_I0_SB_LUT4_O_I0_SB_LUT4_O_2_I3[0] -.sym 29775 rx_09_fifo.rd_addr_gray_SB_DFFESR_Q_6_D[1] -.sym 29776 io_pmod_SB_DFFSS_Q_D_SB_LUT4_O_I0_SB_LUT4_O_I0_SB_LUT4_O_1_I2[0] -.sym 29777 rx_09_fifo.rd_addr_gray_SB_DFFESR_Q_6_D[3] -.sym 29778 rx_09_fifo.rd_addr_gray_SB_DFFESR_Q_5_D[1] -.sym 29779 rx_09_fifo.rd_addr_gray_SB_DFFESR_Q_5_D[0] -.sym 29780 rx_09_fifo.rd_addr_gray_SB_DFFESR_Q_7_D[2] -.sym 29781 rx_09_fifo.rd_addr_gray_SB_DFFESR_Q_7_D[3] -.sym 29783 rx_09_fifo.rd_addr[0] -.sym 29784 rx_09_fifo.rd_addr_gray_SB_DFFESR_Q_7_D[2] -.sym 29785 io_pmod_SB_DFFSS_Q_D_SB_LUT4_O_I0_SB_LUT4_O_I0_SB_LUT4_O_2_I3[1] -.sym 29786 io_pmod_SB_DFFSS_Q_D_SB_LUT4_O_I0_SB_LUT4_O_I0_SB_LUT4_O_2_I3[0] -.sym 29787 io_pmod_SB_DFFSS_Q_D_SB_LUT4_O_I0_SB_LUT4_O_I0_SB_LUT4_O_2_I3[1] -.sym 29788 io_pmod_SB_DFFSS_Q_D_SB_LUT4_O_I0_SB_LUT4_O_I0_SB_LUT4_O_2_I3[2] -.sym 29789 io_pmod_SB_DFFSS_Q_D_SB_LUT4_O_I0_SB_LUT4_O_I0_SB_LUT4_O_2_I3[3] -.sym 29790 rx_09_fifo.rd_addr_gray_SB_DFFESR_Q_7_D_SB_LUT4_I3_O[0] -.sym 29791 rx_09_fifo.rd_addr_gray_SB_DFFESR_Q_7_D_SB_LUT4_I3_O[1] -.sym 29792 rx_09_fifo.rd_addr_gray_SB_DFFESR_Q_7_D_SB_LUT4_I3_O[2] -.sym 29793 rx_09_fifo.rd_addr_gray_SB_DFFESR_Q_7_D_SB_LUT4_I3_O[3] -.sym 29794 rx_09_fifo.wr_addr[7] -.sym 29798 rx_09_fifo.wr_addr_gray_rd[0] -.sym 29804 i_smi_a1_SB_LUT4_I1_O[2] -.sym 29805 io_pmod_SB_DFFSS_Q_D_SB_LUT4_O_I0[3] -.sym 29806 rx_09_fifo.wr_addr_gray[2] -.sym 29810 rx_09_fifo.wr_addr_gray[3] -.sym 29814 rx_09_fifo.wr_addr_gray_rd[2] -.sym 29818 rx_09_fifo.wr_addr_gray[6] -.sym 29822 rx_09_fifo.wr_addr_gray[0] -.sym 29826 rx_09_fifo.rd_addr_gray_SB_DFFESR_Q_5_D[1] -.sym 29827 io_pmod_SB_DFFSS_Q_D_SB_LUT4_O_I0_SB_LUT4_O_I0_SB_LUT4_O_2_I3[2] -.sym 29828 rx_09_fifo.rd_addr[3] -.sym 29829 io_pmod[2]$SB_IO_IN -.sym 29832 rx_09_fifo.wr_addr_gray_SB_LUT4_I2_1_O[1] -.sym 29833 rx_09_fifo.wr_addr_gray_SB_LUT4_I2_1_O[2] -.sym 29836 rx_09_fifo.wr_addr_gray_SB_LUT4_I2_1_O[7] -.sym 29837 rx_09_fifo.wr_addr_gray_SB_LUT4_I2_1_O[6] -.sym 29838 io_pmod_SB_DFFSS_Q_D_SB_LUT4_O_I0[0] -.sym 29839 io_pmod_SB_DFFSS_Q_D_SB_LUT4_O_I0[1] -.sym 29840 io_pmod_SB_DFFSS_Q_D_SB_LUT4_O_I0[2] -.sym 29841 io_pmod_SB_DFFSS_Q_D_SB_LUT4_O_I0[3] -.sym 29844 rx_09_fifo.wr_addr_gray_SB_LUT4_I2_1_O[5] -.sym 29845 rx_09_fifo.wr_addr_gray_SB_LUT4_I2_1_O[6] -.sym 29848 rx_09_fifo.full_o_SB_LUT4_I3_O[2] -.sym 29849 rx_09_fifo.wr_addr_gray_SB_LUT4_I2_1_O[5] -.sym 29852 rx_09_fifo.wr_addr[0] -.sym 29853 rx_09_fifo.wr_addr_gray_SB_LUT4_I2_1_O[1] -.sym 29856 rx_09_fifo.wr_addr_gray_SB_LUT4_I2_1_O[2] -.sym 29857 rx_09_fifo.full_o_SB_LUT4_I3_O[1] -.sym 29858 rx_09_fifo.full_o_SB_LUT4_I3_O_SB_LUT4_I3_O[0] -.sym 29859 rx_09_fifo.full_o_SB_LUT4_I3_O_SB_LUT4_I3_O[1] -.sym 29860 rx_09_fifo.full_o_SB_LUT4_I3_O_SB_LUT4_I3_O[2] -.sym 29861 rx_09_fifo.full_o_SB_LUT4_I3_O_SB_LUT4_I3_O[3] -.sym 29862 rx_09_fifo.full_o_SB_DFFSR_Q_D_SB_LUT4_O_I0_SB_LUT4_O_I2_SB_LUT4_O_I3[0] -.sym 29863 rx_09_fifo.wr_addr_gray_SB_DFFESR_Q_2_D[1] -.sym 29864 rx_09_fifo.wr_addr_gray_SB_DFFESR_Q_2_D[2] -.sym 29865 rx_09_fifo.rd_addr_gray_wr_r[6] -.sym 29866 rx_09_fifo.wr_addr_gray_SB_LUT4_I2_1_O[1] -.sym 29872 rx_09_fifo.full_o_SB_LUT4_I3_O[1] -.sym 29873 rx_09_fifo.full_o_SB_LUT4_I3_O[2] -.sym 29874 rx_09_fifo.wr_addr_gray_SB_DFFESR_Q_2_D[1] -.sym 29878 rx_09_fifo.wr_addr_gray_SB_DFFESR_Q_2_D[2] -.sym 29882 rx_09_fifo.rd_addr_gray_wr_r[0] -.sym 29883 rx_09_fifo.wr_addr_gray_SB_DFFESR_Q_7_D[1] -.sym 29884 rx_09_fifo.wr_addr_gray_SB_DFFESR_Q_7_D[2] -.sym 29885 rx_09_fifo.full_o_SB_DFFSR_Q_D_SB_LUT4_O_I0_SB_LUT4_O_I0[1] -.sym 29886 rx_09_fifo.rd_addr_gray_wr_r[2] -.sym 29887 rx_09_fifo.wr_addr_gray_SB_DFFESR_Q_5_D[1] -.sym 29888 rx_09_fifo.wr_addr_gray_SB_DFFESR_Q_5_D[2] -.sym 29889 rx_09_fifo.full_o_SB_DFFSR_Q_D_SB_LUT4_O_I0_SB_LUT4_O_1_I0[2] -.sym 29890 rx_09_fifo.full_o_SB_DFFSR_Q_D_SB_LUT4_O_I0[0] -.sym 29891 rx_09_fifo.full_o_SB_DFFSR_Q_D_SB_LUT4_O_I0[1] -.sym 29892 w_rx_09_fifo_push -.sym 29893 rx_09_fifo.full_o_SB_DFFSR_Q_D_SB_LUT4_O_I0[3] -.sym 29896 rx_09_fifo.rd_addr_gray_wr_r[2] -.sym 29897 rx_09_fifo.full_o_SB_DFFSR_Q_D_SB_LUT4_O_I0_SB_LUT4_O_1_I1[2] -.sym 29898 rx_09_fifo.full_o_SB_DFFSR_Q_D_SB_LUT4_O_I0_SB_LUT4_O_1_I0[0] -.sym 29899 rx_09_fifo.full_o_SB_DFFSR_Q_D_SB_LUT4_O_I0_SB_LUT4_O_1_I0[1] -.sym 29900 rx_09_fifo.full_o_SB_DFFSR_Q_D_SB_LUT4_O_I0_SB_LUT4_O_1_I0[2] -.sym 29901 rx_09_fifo.full_o_SB_DFFSR_Q_D_SB_LUT4_O_I0_SB_LUT4_O_1_I0[3] -.sym 29902 rx_09_fifo.full_o_SB_DFFSR_Q_D_SB_LUT4_O_I0_SB_LUT4_O_I0[0] -.sym 29903 rx_09_fifo.full_o_SB_DFFSR_Q_D_SB_LUT4_O_I0_SB_LUT4_O_I2[1] -.sym 29904 rx_09_fifo.full_o_SB_DFFSR_Q_D_SB_LUT4_O_I0_SB_LUT4_O_I2[2] -.sym 29905 rx_09_fifo.full_o_SB_DFFSR_Q_D_SB_LUT4_O_I0_SB_LUT4_O_I2[3] -.sym 29906 rx_09_fifo.full_o_SB_DFFSR_Q_D_SB_LUT4_O_I0_SB_LUT4_O_I0[0] -.sym 29907 rx_09_fifo.full_o_SB_DFFSR_Q_D_SB_LUT4_O_I0_SB_LUT4_O_I0[1] -.sym 29908 rx_09_fifo.full_o_SB_DFFSR_Q_D_SB_LUT4_O_I0_SB_LUT4_O_I0[2] -.sym 29909 rx_09_fifo.full_o_SB_DFFSR_Q_D_SB_LUT4_O_I0_SB_LUT4_O_1_I1[1] -.sym 29914 rx_09_fifo.full_o_SB_DFFSR_Q_D_SB_LUT4_O_I0_SB_LUT4_O_I2_SB_LUT4_O_I3[0] -.sym 29915 rx_09_fifo.full_o_SB_DFFSR_Q_D_SB_LUT4_O_I0_SB_LUT4_O_1_I0[3] -.sym 29916 rx_09_fifo.full_o_SB_DFFSR_Q_D_SB_LUT4_O_I0_SB_LUT4_O_1_I1[5] -.sym 29917 rx_09_fifo.full_o_SB_DFFSR_Q_D_SB_LUT4_O_I0_SB_LUT4_O_I2_SB_LUT4_O_I3[3] -.sym 29920 rx_09_fifo.full_o_SB_LUT4_I3_O[0] -.sym 29921 rx_09_fifo.full_o_SB_DFFSR_Q_D_SB_LUT4_O_I0_SB_LUT4_O_1_I1[2] -.sym 29928 i_smi_a1_SB_LUT4_I1_O[2] -.sym 29929 w_rx_24_fifo_pull -.sym 29936 lvds_rx_09_inst.r_state_if_SB_LUT4_I2_O[0] -.sym 29937 w_rx_09_fifo_data[0] -.sym 29954 w_rx_24_fifo_empty -.sym 29958 w_rx_09_fifo_full -.sym 29962 io_pmod[2]$SB_IO_IN -.sym 29970 w_rx_24_fifo_full -.sym 29983 rx_24_fifo.wr_addr_gray_rd_r[3] -.sym 29984 rx_24_fifo.empty_o_SB_LUT4_I3_O_SB_LUT4_O_1_I3[2] -.sym 29985 rx_24_fifo.rd_addr[4] -.sym 29990 rx_24_fifo.empty_o_SB_DFFSS_Q_D_SB_LUT4_O_I0_SB_LUT4_O_I0[3] -.sym 29994 rx_24_fifo.empty_o_SB_LUT4_I3_O_SB_LUT4_O_1_I3[0] -.sym 29995 rx_24_fifo.empty_o_SB_LUT4_I3_O_SB_LUT4_O_1_I3[1] -.sym 29996 rx_24_fifo.empty_o_SB_LUT4_I3_O_SB_LUT4_O_1_I3[2] -.sym 29997 rx_24_fifo.empty_o_SB_LUT4_I3_O_SB_LUT4_O_1_I3[3] -.sym 29998 rx_24_fifo.rd_addr_gray_SB_LUT4_I2_O[2] -.sym 30003 w_tx_data_smi[2] -.sym 30004 spi_if_ins.o_cs_SB_LUT4_I2_O[1] -.sym 30005 spi_if_ins.o_cs_SB_LUT4_I2_2_O[2] -.sym 30006 rx_24_fifo.empty_o_SB_DFFSS_Q_D_SB_LUT4_O_I0_SB_LUT4_O_I0[1] -.sym 30014 rx_24_fifo.rd_addr_gray_SB_LUT4_I2_O[3] -.sym 30018 rx_24_fifo.empty_o_SB_DFFSS_Q_D_SB_LUT4_O_I0_SB_LUT4_O_I0[2] -.sym 30019 rx_24_fifo.rd_addr[4] -.sym 30020 rx_24_fifo.rd_addr[5] -.sym 30021 w_rx_24_fifo_empty -.sym 30026 w_ioc[2] -.sym 30027 w_ioc[1] -.sym 30028 w_ioc[0] -.sym 30029 io_ctrl_ins.o_data_out_SB_DFFESR_Q_E[3] -.sym 30033 io_ctrl_ins.o_data_out_SB_DFFESR_Q_E[3] -.sym 30035 w_rx_24_fifo_pull -.sym 30036 smi_ctrl_ins.r_fifo_24_pull_SB_LUT4_I1_I2[1] -.sym 30037 smi_ctrl_ins.r_fifo_24_pull_SB_LUT4_I1_I2[2] -.sym 30038 rx_24_fifo.empty_o_SB_DFFSS_Q_D_SB_LUT4_O_I0_SB_LUT4_O_I0[0] -.sym 30039 rx_24_fifo.empty_o_SB_DFFSS_Q_D_SB_LUT4_O_I0_SB_LUT4_O_I0[1] -.sym 30040 rx_24_fifo.empty_o_SB_DFFSS_Q_D_SB_LUT4_O_I0_SB_LUT4_O_I0[2] -.sym 30041 rx_24_fifo.empty_o_SB_DFFSS_Q_D_SB_LUT4_O_I0_SB_LUT4_O_I0[3] -.sym 30042 rx_24_fifo.empty_o_SB_DFFSS_Q_D_SB_LUT4_O_I0[0] -.sym 30043 rx_24_fifo.empty_o_SB_DFFSS_Q_D_SB_LUT4_O_I0[1] -.sym 30044 rx_24_fifo.empty_o_SB_DFFSS_Q_D_SB_LUT4_O_I0[2] -.sym 30045 rx_24_fifo.empty_o_SB_DFFSS_Q_D_SB_LUT4_O_I0[3] -.sym 30047 rx_24_fifo.empty_o_SB_LUT4_I3_O[0] -.sym 30048 rx_24_fifo.empty_o_SB_LUT4_I3_O[1] -.sym 30049 rx_24_fifo.empty_o_SB_LUT4_I3_O[2] -.sym 30062 r_tx_data[1] -.sym 30069 io_ctrl_ins.o_data_out_SB_DFFESR_Q_R -.sym 30072 w_rx_24_fifo_empty -.sym 30073 io_pmod[2]$SB_IO_IN -.sym 30076 rx_24_fifo.wr_addr_gray_rd_r[3] -.sym 30077 rx_24_fifo.rd_addr_gray_SB_LUT4_I2_O[3] -.sym 30086 rx_24_fifo.rd_addr_gray_SB_DFFESR_Q_5_D[1] -.sym 30090 rx_24_fifo.rd_addr_gray_SB_DFFESR_Q_7_D[3] -.sym 30097 spi_if_ins.o_load_cmd_SB_LUT4_I2_O_SB_LUT4_I2_O -.sym 30098 rx_24_fifo.rd_addr_gray_SB_DFFESR_Q_7_D[1] -.sym 30117 w_cs[0] -.sym 30130 $PACKER_VCC_NET -.sym 30147 sys_ctrl_ins.reset_count[0] -.sym 30152 sys_ctrl_ins.reset_count[1] -.sym 30154 sys_ctrl_ins.o_soft_reset_SB_DFFESS_Q_S -.sym 30156 sys_ctrl_ins.reset_count[2] -.sym 30157 sys_ctrl_ins.reset_count_SB_DFFESR_Q_D_SB_LUT4_O_I3[2] -.sym 30158 sys_ctrl_ins.o_soft_reset_SB_DFFESS_Q_S -.sym 30160 sys_ctrl_ins.reset_count[3] -.sym 30161 sys_ctrl_ins.reset_count_SB_DFFESR_Q_D_SB_LUT4_O_I3[3] -.sym 30164 sys_ctrl_ins.o_soft_reset_SB_DFFESS_Q_S -.sym 30165 sys_ctrl_ins.reset_cmd -.sym 30169 sys_ctrl_ins.reset_count[0] -.sym 30170 sys_ctrl_ins.o_soft_reset_SB_DFFESS_Q_S -.sym 30172 sys_ctrl_ins.reset_count[1] -.sym 30173 sys_ctrl_ins.reset_count[0] -.sym 30174 sys_ctrl_ins.reset_count[3] -.sym 30175 sys_ctrl_ins.reset_count[1] -.sym 30176 sys_ctrl_ins.reset_count[2] -.sym 30177 sys_ctrl_ins.reset_count[0] -.sym 30214 $PACKER_GND_NET -.sym 30237 sys_ctrl_ins.reset_cmd -.sym 30240 i_smi_a1_SB_LUT4_I1_O[2] -.sym 30241 w_lvds_rx_24_d1_SB_LUT4_I0_O[1] -.sym 30242 i_sck$SB_IO_IN -.sym 30250 rx_09_fifo.wr_addr_gray_rd[1] -.sym 30276 i_smi_a3$SB_IO_IN -.sym 30277 w_smi_data_output[3] -.sym 30278 spi_if_ins.spi.SCKr[0] -.sym 30282 rx_09_fifo.wr_addr_gray[1] -.sym 30286 rx_09_fifo.wr_addr_gray[4] -.sym 30290 rx_09_fifo.wr_addr_gray_rd[5] -.sym 30294 rx_09_fifo.wr_addr_gray[5] -.sym 30298 spi_if_ins.r_tx_data_valid_SB_LUT4_I3_O[1] -.sym 30318 spi_if_ins.spi.r_temp_rx_byte[0] -.sym 30328 i_smi_a3$SB_IO_IN -.sym 30329 w_smi_data_output[5] -.sym 30332 i_ss$SB_IO_IN -.sym 30333 spi_if_ins.spi.r_rx_done_SB_DFFER_Q_D[1] -.sym 30336 i_smi_a3$SB_IO_IN -.sym 30337 w_smi_data_output[4] -.sym 30339 spi_if_ins.spi.o_spi_miso_SB_DFFE_Q_D_SB_LUT4_O_I2_SB_LUT4_O_I0_SB_LUT4_O_I3[2] -.sym 30343 spi_if_ins.spi.SCKr_SB_LUT4_I0_O[0] -.sym 30344 $PACKER_VCC_NET -.sym 30347 spi_if_ins.spi.r_tx_bit_count[2] -.sym 30348 $PACKER_VCC_NET -.sym 30349 spi_if_ins.spi.r_tx_bit_count_SB_DFFESR_Q_D_SB_LUT4_O_I3[2] -.sym 30351 spi_if_ins.spi.SCKr_SB_LUT4_I0_O[0] -.sym 30352 spi_if_ins.spi.SCKr_SB_LUT4_I0_O[1] -.sym 30353 spi_if_ins.r_tx_data_valid_SB_LUT4_I3_O[2] -.sym 30355 spi_if_ins.spi.SCKr_SB_LUT4_I0_O[0] -.sym 30356 $PACKER_VCC_NET -.sym 30357 spi_if_ins.spi.o_spi_miso_SB_DFFE_Q_D_SB_LUT4_O_I2_SB_LUT4_O_I0_SB_LUT4_O_I3[2] -.sym 30361 spi_if_ins.spi.o_spi_miso_SB_DFFE_Q_D_SB_LUT4_O_I2_SB_LUT4_O_I0_SB_LUT4_O_I3[2] -.sym 30362 spi_if_ins.r_tx_data_valid_SB_LUT4_I3_O[0] -.sym 30363 spi_if_ins.spi.o_spi_miso_SB_DFFE_Q_D_SB_LUT4_O_I2_SB_LUT4_O_I0_SB_LUT4_O_I3[2] -.sym 30364 spi_if_ins.spi.r_tx_bit_count[2] -.sym 30365 spi_if_ins.r_tx_data_valid_SB_LUT4_I3_O[1] -.sym 30367 spi_if_ins.r_tx_data_valid_SB_LUT4_I3_O[0] -.sym 30368 spi_if_ins.r_tx_data_valid_SB_LUT4_I3_O[1] -.sym 30369 spi_if_ins.r_tx_data_valid_SB_LUT4_I3_O[2] -.sym 30370 spi_if_ins.spi.r_tx_byte[2] -.sym 30371 spi_if_ins.spi.r_tx_byte[6] -.sym 30372 spi_if_ins.spi.o_spi_miso_SB_DFFE_Q_D_SB_LUT4_O_I2_SB_LUT4_O_I0_SB_LUT4_O_I3[2] -.sym 30373 spi_if_ins.spi.r_tx_bit_count[2] -.sym 30374 spi_if_ins.r_tx_byte[4] -.sym 30378 spi_if_ins.r_tx_byte[6] -.sym 30382 spi_if_ins.r_tx_byte[1] -.sym 30386 spi_if_ins.spi.o_spi_miso_SB_DFFE_Q_D_SB_LUT4_O_I2_SB_LUT4_O_I0_SB_LUT4_O_I3[0] -.sym 30387 spi_if_ins.spi.o_spi_miso_SB_DFFE_Q_D_SB_LUT4_O_I2_SB_LUT4_O_I0_SB_LUT4_O_I3[1] -.sym 30388 spi_if_ins.spi.o_spi_miso_SB_DFFE_Q_D_SB_LUT4_O_I2_SB_LUT4_O_I0_SB_LUT4_O_I3[2] -.sym 30389 spi_if_ins.spi.o_spi_miso_SB_DFFE_Q_D_SB_LUT4_O_I2_SB_LUT4_O_I0_SB_LUT4_O_I3[3] -.sym 30390 spi_if_ins.spi.r_tx_byte[3] -.sym 30391 spi_if_ins.spi.r_tx_byte[7] -.sym 30392 spi_if_ins.spi.r_tx_bit_count[2] -.sym 30393 spi_if_ins.spi.o_spi_miso_SB_DFFE_Q_D_SB_LUT4_O_I2_SB_LUT4_O_I0_SB_LUT4_O_I3[2] -.sym 30394 spi_if_ins.spi.o_spi_miso_SB_DFFE_Q_D_SB_LUT4_O_I2_SB_LUT4_O_I0[0] -.sym 30395 spi_if_ins.spi.o_spi_miso_SB_DFFE_Q_D_SB_LUT4_O_I2_SB_LUT4_O_I0[1] -.sym 30396 spi_if_ins.spi.o_spi_miso_SB_DFFE_Q_D_SB_LUT4_O_I2_SB_LUT4_O_I0[2] -.sym 30397 spi_if_ins.spi.SCKr_SB_LUT4_I0_O[0] -.sym 30398 spi_if_ins.spi.r_tx_byte[1] -.sym 30399 spi_if_ins.spi.r_tx_byte[5] -.sym 30400 spi_if_ins.spi.o_spi_miso_SB_DFFE_Q_D_SB_LUT4_O_I2_SB_LUT4_O_I0_SB_LUT4_O_I3[2] -.sym 30401 spi_if_ins.spi.r_tx_bit_count[2] -.sym 30402 spi_if_ins.r_tx_byte[7] -.sym 30406 spi_if_ins.r_tx_byte[2] -.sym 30410 spi_if_ins.r_tx_byte[0] -.sym 30414 spi_if_ins.r_tx_byte[5] -.sym 30422 spi_if_ins.r_tx_byte[3] -.sym 30438 r_tx_data[0] -.sym 30446 w_ioc[1] -.sym 30447 w_ioc[4] -.sym 30448 w_ioc[3] -.sym 30449 w_ioc[2] -.sym 30450 r_tx_data[5] -.sym 30458 r_tx_data[6] -.sym 30466 w_tx_data_sys[0] -.sym 30467 spi_if_ins.o_cs_SB_LUT4_I2_2_O[1] -.sym 30468 spi_if_ins.o_cs_SB_LUT4_I2_2_O[2] -.sym 30469 spi_if_ins.o_cs_SB_LUT4_I2_2_O[3] -.sym 30470 w_cs[0] -.sym 30471 w_cs[1] -.sym 30472 w_cs[2] -.sym 30473 w_cs[3] -.sym 30474 w_cs[0] -.sym 30475 w_cs[1] -.sym 30476 w_cs[3] -.sym 30477 w_cs[2] -.sym 30478 w_cs[0] -.sym 30479 w_cs[2] -.sym 30480 w_cs[3] -.sym 30481 w_cs[1] -.sym 30500 spi_if_ins.state_if[0] -.sym 30501 spi_if_ins.state_if[1] -.sym 30502 r_tx_data[7] -.sym 30508 io_ctrl_ins.i_cs_SB_LUT4_I3_I0[1] -.sym 30509 spi_if_ins.o_fetch_cmd_SB_LUT4_I3_1_O[1] -.sym 30510 w_tx_data_smi[0] -.sym 30511 spi_if_ins.o_cs_SB_LUT4_I2_O[1] -.sym 30512 smi_ctrl_ins.o_data_out_SB_LUT4_I1_O[0] -.sym 30513 w_tx_data_io[0] -.sym 30514 r_tx_data[2] -.sym 30522 r_tx_data[3] -.sym 30526 r_tx_data[4] -.sym 30530 w_tx_data_smi[1] -.sym 30531 spi_if_ins.o_cs_SB_LUT4_I2_O[1] -.sym 30532 smi_ctrl_ins.o_data_out_SB_LUT4_I1_O[0] -.sym 30533 w_tx_data_io[1] -.sym 30538 io_ctrl_ins.i_cs_SB_LUT4_I3_I0[0] -.sym 30539 io_ctrl_ins.i_cs_SB_LUT4_I3_I0[1] -.sym 30540 i_smi_a1_SB_LUT4_I1_O[2] -.sym 30541 w_cs[1] -.sym 30543 smi_ctrl_ins.o_data_out_SB_LUT4_I1_O[0] -.sym 30544 w_tx_data_io[7] -.sym 30545 spi_if_ins.o_cs_SB_LUT4_I2_2_O[2] -.sym 30548 io_ctrl_ins.i_cs_SB_LUT4_I3_O[0] -.sym 30549 w_fetch -.sym 30552 smi_ctrl_ins.o_data_out_SB_LUT4_I1_O[0] -.sym 30553 w_tx_data_io[4] -.sym 30555 smi_ctrl_ins.o_data_out_SB_LUT4_I1_O[0] -.sym 30556 w_tx_data_io[2] -.sym 30557 smi_ctrl_ins.o_data_out_SB_LUT4_I1_O[2] -.sym 30558 w_tx_data_smi[3] -.sym 30559 spi_if_ins.o_cs_SB_LUT4_I2_O[1] -.sym 30560 smi_ctrl_ins.o_data_out_SB_LUT4_I1_O[0] -.sym 30561 w_tx_data_io[3] -.sym 30562 io_ctrl_ins.led0_state_SB_LUT4_I3_O[0] -.sym 30563 io_ctrl_ins.led0_state_SB_LUT4_I3_O[1] -.sym 30564 io_ctrl_ins.led0_state_SB_LUT4_I3_O[2] -.sym 30565 io_ctrl_ins.led0_state_SB_LUT4_I3_O[3] -.sym 30566 o_ldo_2v8_en$SB_IO_OUT -.sym 30567 i_button_SB_LUT4_I3_I1[2] -.sym 30568 io_ctrl_ins.ldo2v8_state_SB_LUT4_I0_I2[2] -.sym 30569 io_ctrl_ins.ldo2v8_state_SB_LUT4_I0_I2[3] -.sym 30570 io_ctrl_ins.pmod_dir_state[3] -.sym 30571 io_ctrl_ins.led0_state_SB_LUT4_I3_O[1] -.sym 30572 io_ctrl_ins.tr_vc_2_state_SB_LUT4_I1_O[2] -.sym 30573 io_ctrl_ins.tr_vc_2_state_SB_LUT4_I1_O[3] -.sym 30576 io_ctrl_ins.led0_state_SB_LUT4_I3_I0[0] -.sym 30577 io_ctrl_ins.led0_state_SB_LUT4_I3_I0[1] -.sym 30578 io_ctrl_ins.o_pmod[1] -.sym 30579 i_button_SB_LUT4_I3_I1[1] -.sym 30580 i_button_SB_LUT4_I3_I1[2] -.sym 30581 o_led1$SB_IO_OUT -.sym 30582 io_ctrl_ins.led1_state_SB_LUT4_I3_O[0] -.sym 30583 io_ctrl_ins.led0_state_SB_LUT4_I3_O[1] -.sym 30584 io_ctrl_ins.led1_state_SB_LUT4_I3_O[2] -.sym 30585 io_ctrl_ins.led1_state_SB_LUT4_I3_O[3] -.sym 30586 i_config[1]$SB_IO_IN -.sym 30587 i_button_SB_LUT4_I3_I1[2] -.sym 30588 io_ctrl_ins.tr_vc_1_b_state_SB_LUT4_I1_O[2] -.sym 30589 io_ctrl_ins.tr_vc_1_b_state_SB_LUT4_I1_O[3] -.sym 30590 io_ctrl_ins.led0_state_SB_LUT4_I3_O[1] -.sym 30591 io_ctrl_ins.pmod_dir_state[2] -.sym 30592 io_ctrl_ins.led0_state_SB_LUT4_I3_I0[0] -.sym 30593 io_ctrl_ins.rf_mode[0] -.sym 30595 io_ctrl_ins.i_cs_SB_LUT4_I3_I0[1] -.sym 30596 w_cs[0] -.sym 30597 w_fetch -.sym 30600 i_smi_a1_SB_LUT4_I1_O[2] -.sym 30601 spi_if_ins.o_load_cmd_SB_LUT4_I2_O[1] -.sym 30602 spi_if_ins.state_if_SB_DFFESR_Q_1_D[0] -.sym 30611 io_ctrl_ins.led0_state_SB_LUT4_I3_I0[0] -.sym 30612 spi_if_ins.o_load_cmd_SB_LUT4_I2_O[1] -.sym 30613 i_smi_a1_SB_LUT4_I1_O[2] -.sym 30614 io_ctrl_ins.led0_state_SB_LUT4_I3_I0[0] -.sym 30615 io_ctrl_ins.debug_mode[0] -.sym 30616 i_button_SB_LUT4_I3_I1[2] -.sym 30617 o_led0$SB_IO_OUT -.sym 30619 spi_if_ins.o_load_cmd_SB_LUT4_I2_O[1] -.sym 30620 i_button_SB_LUT4_I3_I1[2] -.sym 30621 i_smi_a1_SB_LUT4_I1_O[2] +.sym 29517 rx_24_fifo.rd_addr_gray_SB_LUT4_I2_O[1] +.sym 29518 rx_24_fifo.rd_addr_gray_SB_DFFESR_Q_6_D[0] +.sym 29519 rx_24_fifo.rd_addr_gray_SB_DFFESR_Q_6_D[1] +.sym 29520 rx_24_fifo.rd_addr_gray_SB_DFFESR_Q_6_D[2] +.sym 29521 rx_24_fifo.rd_addr_gray_SB_DFFESR_Q_6_D[3] +.sym 29528 rx_24_fifo.rd_addr_gray_SB_LUT4_I2_O[1] +.sym 29529 rx_24_fifo.rd_addr_gray_SB_DFFESR_Q_7_D_SB_LUT4_I3_O_SB_LUT4_O_2_I0_SB_LUT4_O_1_I3[1] +.sym 29532 rx_24_fifo.rd_addr_gray_SB_LUT4_I2_O[7] +.sym 29533 rx_24_fifo.rd_addr_gray_SB_LUT4_I2_O[6] +.sym 29540 rx_24_fifo.rd_addr_gray_SB_DFFESR_Q_7_D[0] +.sym 29541 rx_24_fifo.rd_addr_gray_SB_DFFESR_Q_7_D[1] +.sym 29542 rx_24_fifo.rd_addr_gray_SB_DFFESR_Q_3_D[0] +.sym 29543 rx_24_fifo.rd_addr[4] +.sym 29544 rx_24_fifo.rd_addr[5] +.sym 29545 rx_24_fifo.rd_addr_gray_SB_DFFESR_Q_7_D_SB_LUT4_I3_O_SB_LUT4_O_1_I3[3] +.sym 29548 rx_24_fifo.rd_addr_gray_SB_DFFESR_Q_3_D[3] +.sym 29549 rx_24_fifo.rd_addr[6] +.sym 29554 rx_24_fifo.rd_addr_gray_SB_DFFESR_Q_7_D_SB_LUT4_I3_O[0] +.sym 29555 rx_24_fifo.rd_addr_gray_SB_DFFESR_Q_7_D_SB_LUT4_I3_O[1] +.sym 29556 rx_24_fifo.rd_addr_gray_SB_DFFESR_Q_7_D_SB_LUT4_I3_O[2] +.sym 29557 rx_24_fifo.rd_addr_gray_SB_DFFESR_Q_7_D_SB_LUT4_I3_O[3] +.sym 29562 rx_24_fifo.rd_addr_gray_SB_DFFESR_Q_3_D[0] +.sym 29563 rx_24_fifo.rd_addr_gray_SB_DFFESR_Q_3_D[1] +.sym 29564 rx_24_fifo.rd_addr_gray_SB_DFFESR_Q_3_D[2] +.sym 29565 rx_24_fifo.rd_addr_gray_SB_DFFESR_Q_3_D[3] +.sym 29574 rx_24_fifo.wr_addr_gray_rd[4] +.sym 29578 rx_24_fifo.wr_addr_gray[1] +.sym 29582 rx_24_fifo.wr_addr_gray_rd[1] +.sym 29586 rx_24_fifo.wr_addr_gray[0] +.sym 29590 rx_24_fifo.wr_addr_gray_rd[0] +.sym 29594 rx_24_fifo.wr_addr_gray_rd[2] +.sym 29598 rx_24_fifo.wr_addr_gray_rd[5] +.sym 29602 rx_24_fifo.wr_addr_gray[5] +.sym 29622 rx_24_fifo.wr_addr_gray[4] +.sym 29630 rx_24_fifo.wr_addr_gray[2] +.sym 29730 rx_09_fifo.rd_addr_gray_wr[5] +.sym 29734 rx_09_fifo.rd_addr_gray_wr[4] +.sym 29738 rx_09_fifo.rd_addr_gray_wr[3] +.sym 29744 i_smi_a3$SB_IO_IN +.sym 29745 w_smi_data_output[3] +.sym 29748 i_smi_a3$SB_IO_IN +.sym 29749 w_smi_data_output[4] +.sym 29754 rx_09_fifo.rd_addr_gray[6] +.sym 29758 rx_09_fifo.rd_addr_gray_wr[6] +.sym 29766 rx_09_fifo.wr_addr_gray_SB_LUT4_I2_1_O[7] +.sym 29770 rx_09_fifo.wr_addr_gray_SB_DFFESR_Q_4_D[2] +.sym 29784 i_smi_a1_SB_LUT4_I1_O_SB_LUT4_O_I2_SB_LUT4_I0_O[2] +.sym 29785 w_rx_09_fifo_pull +.sym 29786 rx_09_fifo.wr_addr_gray_SB_DFFESR_Q_3_D[2] +.sym 29790 rx_09_fifo.wr_addr_gray_SB_DFFESR_Q_3_D[1] +.sym 29796 i_smi_a1_SB_LUT4_I1_O_SB_LUT4_O_I2_SB_LUT4_I0_O[2] +.sym 29797 w_rx_09_fifo_push +.sym 29798 rx_09_fifo.full_o_SB_DFFSR_Q_D_SB_LUT4_O_I1_SB_LUT4_O_I0[1] +.sym 29799 rx_09_fifo.wr_addr_gray_SB_DFFESR_Q_3_D[1] +.sym 29800 rx_09_fifo.wr_addr_gray_SB_DFFESR_Q_3_D[2] +.sym 29801 rx_09_fifo.rd_addr_gray_wr_r[6] +.sym 29802 rx_09_fifo.full_o_SB_DFFSR_Q_D_SB_LUT4_O_I1_SB_LUT4_O_I0_SB_LUT4_O_I0[1] +.sym 29803 rx_09_fifo.wr_addr_gray_SB_DFFESR_Q_4_D[1] +.sym 29804 rx_09_fifo.wr_addr_gray_SB_DFFESR_Q_4_D[2] +.sym 29805 rx_09_fifo.rd_addr_gray_wr_r[5] +.sym 29806 rx_09_fifo.rd_addr_gray_SB_LUT4_I2_O[7] +.sym 29812 rx_09_fifo.wr_addr_gray_SB_LUT4_I2_1_O[7] +.sym 29813 rx_09_fifo.wr_addr_gray_SB_LUT4_I2_1_O[6] +.sym 29814 rx_09_fifo.rd_addr_gray_SB_DFFESR_Q_1_D[1] +.sym 29820 rx_09_fifo.wr_addr_gray_SB_LUT4_I2_1_O[4] +.sym 29821 rx_09_fifo.wr_addr_gray_SB_LUT4_I2_1_O[5] +.sym 29824 rx_09_fifo.wr_addr_gray_SB_LUT4_I2_1_O[5] +.sym 29825 rx_09_fifo.wr_addr_gray_SB_LUT4_I2_1_O[6] +.sym 29827 rx_09_fifo.wr_addr[0] +.sym 29832 rx_09_fifo.full_o_SB_DFFSR_Q_D_SB_LUT4_O_I1_SB_LUT4_O_I0_SB_LUT4_O_1_I3[1] +.sym 29836 rx_09_fifo.wr_addr[2] +.sym 29837 rx_09_fifo.wr_addr_gray_SB_LUT4_I2_1_I3[2] +.sym 29840 rx_09_fifo.wr_addr[3] +.sym 29841 rx_09_fifo.wr_addr_gray_SB_LUT4_I2_1_I3[3] +.sym 29844 rx_09_fifo.wr_addr[4] +.sym 29845 rx_09_fifo.wr_addr_gray_SB_LUT4_I2_1_I3[4] +.sym 29848 rx_09_fifo.wr_addr[5] +.sym 29849 rx_09_fifo.wr_addr_gray_SB_LUT4_I2_1_I3[5] +.sym 29852 rx_09_fifo.wr_addr[6] +.sym 29853 rx_09_fifo.wr_addr_gray_SB_LUT4_I2_1_I3[6] +.sym 29856 rx_09_fifo.wr_addr[7] +.sym 29857 rx_09_fifo.wr_addr_gray_SB_LUT4_I2_1_I3[7] +.sym 29860 rx_09_fifo.full_o_SB_DFFSR_Q_D_SB_LUT4_O_I1_SB_LUT4_O_I0_SB_LUT4_O_1_I3[1] +.sym 29861 rx_09_fifo.wr_addr[0] +.sym 29863 rx_09_fifo.wr_addr[0] +.sym 29864 rx_09_fifo.full_o_SB_DFFSR_Q_D_SB_LUT4_O_I1_SB_LUT4_O_I0_SB_LUT4_O_1_I3[1] +.sym 29865 rx_09_fifo.rd_addr_gray_wr_r[0] +.sym 29866 lvds_rx_09_inst.r_push_SB_LUT4_I3_O[0] +.sym 29867 lvds_rx_09_inst.r_push_SB_LUT4_I3_O[1] +.sym 29868 lvds_rx_09_inst.r_push_SB_LUT4_I3_O[2] +.sym 29869 lvds_rx_09_inst.r_push_SB_LUT4_I3_O[3] +.sym 29870 w_rx_09_fifo_push +.sym 29871 rx_09_fifo.wr_addr_gray_SB_LUT4_I2_1_O[7] +.sym 29872 lvds_rx_09_inst.r_push_SB_LUT4_I3_O[0] +.sym 29873 w_rx_09_fifo_full +.sym 29876 rx_09_fifo.rd_addr_gray_wr_r[6] +.sym 29877 lvds_rx_09_inst.r_push_SB_LUT4_I3_O_SB_LUT4_O_I3[5] +.sym 29879 rx_09_fifo.full_o_SB_DFFSR_Q_D_SB_LUT4_O_I1[0] +.sym 29880 rx_09_fifo.full_o_SB_DFFSR_Q_D_SB_LUT4_O_I1[1] +.sym 29881 rx_09_fifo.full_o_SB_DFFSR_Q_D_SB_LUT4_O_I1[2] +.sym 29882 lvds_rx_09_inst.r_push_SB_LUT4_I3_I0[0] +.sym 29883 lvds_rx_09_inst.r_push_SB_LUT4_I3_I0[1] +.sym 29884 lvds_rx_09_inst.r_push_SB_LUT4_I3_I0[2] +.sym 29885 w_rx_09_fifo_push +.sym 29887 rx_09_fifo.rd_addr_gray_wr_r[5] +.sym 29888 lvds_rx_09_inst.r_push_SB_LUT4_I3_O_SB_LUT4_O_I3[4] +.sym 29889 lvds_rx_09_inst.r_push_SB_LUT4_I3_O_SB_LUT4_O_I3[5] +.sym 29894 r_tx_data[0] +.sym 29900 rx_09_fifo.full_o_SB_LUT4_I3_O[0] +.sym 29901 lvds_rx_09_inst.r_push_SB_LUT4_I3_O_SB_LUT4_O_I3[1] +.sym 29903 rx_09_fifo.full_o_SB_DFFSR_Q_D_SB_LUT4_O_I1_SB_LUT4_O_I0_SB_LUT4_O_1_I3[0] +.sym 29904 rx_09_fifo.full_o_SB_DFFSR_Q_D_SB_LUT4_O_I1_SB_LUT4_O_I0_SB_LUT4_O_1_I3[1] +.sym 29905 lvds_rx_09_inst.r_push_SB_LUT4_I3_O_SB_LUT4_O_I3[1] +.sym 29911 smi_ctrl_ins.int_cnt_09_SB_DFFESR_Q_E_SB_LUT4_O_I1[0] +.sym 29912 smi_ctrl_ins.int_cnt_09_SB_DFFESR_Q_E_SB_LUT4_O_I1[1] +.sym 29913 i_smi_a1_SB_LUT4_I1_O_SB_LUT4_O_I2_SB_LUT4_I0_O[2] +.sym 29922 w_rx_09_fifo_full +.sym 29930 w_rx_24_fifo_empty +.sym 29950 io_pmod[2]$SB_IO_IN +.sym 29960 lvds_rx_24_inst.r_state_if_SB_LUT4_I2_O[0] +.sym 29961 w_rx_24_fifo_data[18] +.sym 29962 w_tx_data_smi[0] +.sym 29963 spi_if_ins.o_cs_SB_LUT4_I2_1_O[1] +.sym 29964 smi_ctrl_ins.o_data_out_SB_LUT4_I1_O[0] +.sym 29965 w_tx_data_io[0] +.sym 29967 spi_if_ins.o_load_cmd_SB_DFFESR_Q_D_SB_LUT4_I1_O[0] +.sym 29968 spi_if_ins.o_load_cmd_SB_DFFESR_Q_D_SB_LUT4_I1_O[1] +.sym 29969 spi_if_ins.o_load_cmd_SB_DFFESR_Q_D_SB_LUT4_I1_O[2] +.sym 29971 spi_if_ins.r_tx_data_valid_SB_DFFESR_Q_D[0] +.sym 29972 spi_if_ins.state_if_SB_DFFESR_Q_D[2] +.sym 29973 spi_if_ins.o_load_cmd_SB_DFFESR_Q_D_SB_LUT4_I1_O[1] +.sym 29975 spi_if_ins.state_if_SB_DFFESR_Q_D[2] +.sym 29976 spi_if_ins.o_load_cmd_SB_DFFESR_Q_D[0] +.sym 29977 spi_if_ins.r_tx_data_valid_SB_DFFESR_Q_D[0] +.sym 29980 spi_if_ins.state_if[0] +.sym 29981 spi_if_ins.state_if[1] +.sym 29984 lvds_rx_24_inst.r_state_if_SB_LUT4_I2_O[0] +.sym 29985 w_rx_24_fifo_data[29] +.sym 29986 w_tx_data_sys[0] +.sym 29987 spi_if_ins.o_cs_SB_LUT4_I2_2_O[1] +.sym 29988 spi_if_ins.o_cs_SB_LUT4_I2_2_O[2] +.sym 29989 spi_if_ins.o_cs_SB_LUT4_I2_2_O[3] +.sym 29992 spi_if_ins.r_tx_data_valid_SB_DFFESR_Q_D[0] +.sym 29993 spi_if_ins.r_tx_data_valid_SB_DFFESR_Q_D[1] +.sym 29997 spi_if_ins.r_tx_data_valid_SB_DFFESR_Q_E +.sym 29999 spi_if_ins.o_load_cmd_SB_DFFESR_Q_D[1] +.sym 30000 spi_if_ins.state_if[0] +.sym 30001 spi_if_ins.state_if[1] +.sym 30002 spi_if_ins.o_load_cmd_SB_DFFESR_Q_D[1] +.sym 30003 spi_if_ins.r_tx_data_valid_SB_DFFESR_Q_D[0] +.sym 30004 spi_if_ins.state_if[0] +.sym 30005 spi_if_ins.state_if[1] +.sym 30015 spi_if_ins.o_load_cmd_SB_DFFESR_Q_D[0] +.sym 30016 spi_if_ins.o_load_cmd_SB_DFFESR_Q_D[1] +.sym 30017 spi_if_ins.r_tx_data_valid_SB_DFFESR_Q_D[0] +.sym 30033 spi_if_ins.o_load_cmd_SB_DFFESR_Q_D_SB_LUT4_I1_O[1] +.sym 30042 io_ctrl_ins.ldo2v8_state_SB_LUT4_I3_O[1] +.sym 30058 rx_24_fifo.rd_addr_gray[6] +.sym 30086 rx_24_fifo.rd_addr_gray_SB_DFFESR_Q_6_D[1] +.sym 30090 rx_24_fifo.rd_addr_gray_SB_DFFESR_Q_3_D[1] +.sym 30098 rx_24_fifo.rd_addr_gray_SB_DFFESR_Q_6_D[3] +.sym 30110 rx_24_fifo.rd_addr_gray_SB_DFFESR_Q_7_D[1] +.sym 30126 rx_24_fifo.rd_addr_gray[4] +.sym 30130 rx_24_fifo.rd_addr_gray_wr[4] +.sym 30134 rx_24_fifo.rd_addr_gray[0] +.sym 30142 rx_24_fifo.rd_addr_gray[1] +.sym 30232 i_smi_a1_SB_LUT4_I1_O_SB_LUT4_O_I2_SB_LUT4_I0_O[2] +.sym 30233 w_lvds_rx_24_d1_SB_LUT4_I0_O[1] +.sym 30242 rx_09_fifo.wr_addr_gray_rd[4] +.sym 30246 rx_09_fifo.wr_addr_gray_rd[6] +.sym 30250 rx_09_fifo.wr_addr[7] +.sym 30254 rx_09_fifo.wr_addr_gray_rd[7] +.sym 30262 rx_09_fifo.wr_addr_gray_rd[2] +.sym 30270 rx_09_fifo.wr_addr_gray[6] +.sym 30274 rx_09_fifo.wr_addr_gray[5] +.sym 30278 io_pmod_SB_DFFSS_Q_D_SB_LUT4_O_I0_SB_LUT4_O_I0[0] +.sym 30279 io_pmod_SB_DFFSS_Q_D_SB_LUT4_O_I0_SB_LUT4_O_I0[1] +.sym 30280 io_pmod_SB_DFFSS_Q_D_SB_LUT4_O_I0_SB_LUT4_O_I0[2] +.sym 30281 io_pmod_SB_DFFSS_Q_D_SB_LUT4_O_I0_SB_LUT4_O_I0[3] +.sym 30282 rx_09_fifo.wr_addr_gray_rd[5] +.sym 30286 rx_09_fifo.rd_addr_gray_SB_DFFESR_Q_1_D[0] +.sym 30287 rx_09_fifo.rd_addr_gray_SB_DFFESR_Q_1_D[1] +.sym 30288 io_pmod_SB_DFFSS_Q_D_SB_LUT4_O_I0_SB_LUT4_O_I0[3] +.sym 30289 rx_09_fifo.rd_addr_gray_SB_DFFESR_Q_1_D[3] +.sym 30290 rx_09_fifo.wr_addr_gray_rd[0] +.sym 30294 rx_09_fifo.wr_addr_gray_rd[1] +.sym 30298 rx_09_fifo.wr_addr_gray[2] +.sym 30302 rx_09_fifo.wr_addr_gray[4] +.sym 30308 rx_09_fifo.rd_addr_gray_SB_LUT4_I2_O[7] +.sym 30309 rx_09_fifo.rd_addr_gray_SB_LUT4_I2_O[6] +.sym 30312 rx_09_fifo.rd_addr[3] +.sym 30313 io_pmod_SB_DFFSS_Q_D_SB_LUT4_O_I0_SB_LUT4_O_2_I0[2] +.sym 30315 rx_09_fifo.wr_addr_gray_rd_r[2] +.sym 30316 io_pmod_SB_DFFSS_Q_D_SB_LUT4_O_I0_SB_LUT4_O_3_I2[3] +.sym 30317 rx_09_fifo.rd_addr[3] +.sym 30318 rx_09_fifo.wr_addr_gray_SB_DFFESR_Q_7_D[3] +.sym 30324 rx_09_fifo.full_o_SB_LUT4_I3_O[1] +.sym 30325 rx_09_fifo.full_o_SB_LUT4_I3_O[2] +.sym 30327 io_pmod_SB_DFFSS_Q_D_SB_LUT4_O_I0_SB_LUT4_O_I0[0] +.sym 30328 rx_09_fifo.rd_addr_gray_SB_LUT4_I2_O[7] +.sym 30329 w_rx_09_fifo_pull +.sym 30330 smi_ctrl_ins.r_fifo_09_pull_SB_LUT4_I2_O[0] +.sym 30331 rx_09_fifo.wr_addr_gray_rd_r[3] +.sym 30332 smi_ctrl_ins.r_fifo_09_pull_SB_LUT4_I2_O[2] +.sym 30333 smi_ctrl_ins.r_fifo_09_pull_SB_LUT4_I2_O[3] +.sym 30334 rx_09_fifo.wr_addr_gray_SB_DFFESR_Q_7_D[1] +.sym 30338 rx_09_fifo.wr_addr_gray[0] +.sym 30342 io_pmod_SB_DFFSS_Q_D_SB_LUT4_O_I0_SB_LUT4_O_I0[0] +.sym 30343 io_pmod_SB_DFFSS_Q_D_SB_LUT4_O_I0_SB_LUT4_O_I0[1] +.sym 30344 w_rx_09_fifo_pull +.sym 30345 io_pmod[2]$SB_IO_IN +.sym 30346 rx_09_fifo.wr_addr_gray[1] +.sym 30350 rx_09_fifo.full_o_SB_LUT4_I3_O_SB_LUT4_I3_O[0] +.sym 30351 rx_09_fifo.full_o_SB_LUT4_I3_O_SB_LUT4_I3_O[1] +.sym 30352 rx_09_fifo.full_o_SB_LUT4_I3_O_SB_LUT4_I3_O[2] +.sym 30353 rx_09_fifo.full_o_SB_LUT4_I3_O_SB_LUT4_I3_O[3] +.sym 30354 rx_09_fifo.full_o_SB_LUT4_I3_O[0] +.sym 30355 rx_09_fifo.full_o_SB_LUT4_I3_O[1] +.sym 30356 rx_09_fifo.full_o_SB_LUT4_I3_O[2] +.sym 30357 rx_09_fifo.full_o_SB_LUT4_I3_O[3] +.sym 30358 rx_09_fifo.rd_addr_gray_wr_r[0] +.sym 30359 rx_09_fifo.wr_addr_gray_SB_DFFESR_Q_7_D[1] +.sym 30360 rx_09_fifo.full_o_SB_DFFSR_Q_D_SB_LUT4_O_I1_SB_LUT4_O_I0_SB_LUT4_O_1_I3[0] +.sym 30361 rx_09_fifo.wr_addr_gray_SB_DFFESR_Q_7_D[3] +.sym 30362 rx_09_fifo.wr_addr_gray[3] +.sym 30368 rx_09_fifo.wr_addr_gray_SB_LUT4_I2_1_O[1] +.sym 30369 rx_09_fifo.full_o_SB_LUT4_I3_O[1] +.sym 30372 rx_09_fifo.wr_addr[0] +.sym 30373 rx_09_fifo.wr_addr_gray_SB_LUT4_I2_1_O[1] +.sym 30374 r_tx_data[7] +.sym 30378 r_tx_data[3] +.sym 30382 r_tx_data[1] +.sym 30390 r_tx_data[2] +.sym 30398 r_tx_data[5] +.sym 30423 smi_ctrl_ins.int_cnt_09[3] +.sym 30424 i_smi_soe_se$rename$0 +.sym 30425 smi_ctrl_ins.r_fifo_24_pull_SB_LUT4_I1_O[2] +.sym 30427 i_smi_soe_se$rename$0 +.sym 30428 smi_ctrl_ins.r_fifo_24_pull_SB_LUT4_I1_O[2] +.sym 30429 smi_ctrl_ins.int_cnt_09_SB_DFFESR_Q_D_SB_LUT4_O_I3[1] +.sym 30431 smi_ctrl_ins.int_cnt_09_SB_DFFESR_Q_D_SB_LUT4_O_I3[2] +.sym 30432 i_smi_soe_se$rename$0 +.sym 30433 smi_ctrl_ins.r_fifo_24_pull_SB_LUT4_I1_O[2] +.sym 30450 spi_if_ins.spi.r3_rx_done_SB_LUT4_I2_O +.sym 30472 spi_if_ins.w_rx_data[5] +.sym 30473 spi_if_ins.w_rx_data[6] +.sym 30475 w_tx_data_smi[2] +.sym 30476 spi_if_ins.o_cs_SB_LUT4_I2_1_O[1] +.sym 30477 spi_if_ins.o_cs_SB_LUT4_I2_2_O[2] +.sym 30484 spi_if_ins.w_rx_data[5] +.sym 30485 spi_if_ins.w_rx_data[6] +.sym 30488 spi_if_ins.w_rx_data[6] +.sym 30489 spi_if_ins.w_rx_data[5] +.sym 30498 w_cs[1] +.sym 30499 w_cs[2] +.sym 30500 w_cs[3] +.sym 30501 w_cs[0] +.sym 30502 w_cs[0] +.sym 30503 w_cs[1] +.sym 30504 w_cs[3] +.sym 30505 w_cs[2] +.sym 30506 spi_if_ins.r_tx_data_valid_SB_DFFESR_Q_D[1] +.sym 30510 w_cs[0] +.sym 30511 w_cs[1] +.sym 30512 w_cs[2] +.sym 30513 w_cs[3] +.sym 30514 w_cs[0] +.sym 30515 w_cs[2] +.sym 30516 w_cs[3] +.sym 30517 w_cs[1] +.sym 30518 w_cs[0] +.sym 30519 w_cs[1] +.sym 30520 w_cs[2] +.sym 30521 w_cs[3] +.sym 30524 spi_if_ins.w_rx_data[5] +.sym 30525 spi_if_ins.w_rx_data[6] +.sym 30530 spi_if_ins.o_cs_SB_DFFESR_Q_R[0] +.sym 30536 spi_if_ins.o_fetch_cmd_SB_LUT4_I3_1_O[0] +.sym 30537 spi_if_ins.o_fetch_cmd_SB_LUT4_I3_1_O[1] +.sym 30538 i_smi_a1_SB_LUT4_I1_O_SB_LUT4_O_I2_SB_LUT4_I0_O[2] +.sym 30539 w_ioc[1] +.sym 30540 w_cs[2] +.sym 30541 w_fetch +.sym 30543 spi_if_ins.o_fetch_cmd_SB_LUT4_I3_1_O[0] +.sym 30544 w_cs[0] +.sym 30545 w_fetch +.sym 30554 spi_if_ins.w_rx_data[4] +.sym 30558 spi_if_ins.w_rx_data[3] +.sym 30562 w_ioc[1] +.sym 30563 w_ioc[4] +.sym 30564 w_ioc[3] +.sym 30565 w_ioc[2] +.sym 30566 spi_if_ins.w_rx_data[1] +.sym 30570 spi_if_ins.w_rx_data[2] +.sym 30576 io_ctrl_ins.i_cs_SB_LUT4_I3_O[0] +.sym 30577 w_fetch +.sym 30578 io_ctrl_ins.tr_vc_2_state_SB_LUT4_I1_I3[1] +.sym 30579 spi_if_ins.o_fetch_cmd_SB_LUT4_I3_1_O[0] +.sym 30580 i_smi_a1_SB_LUT4_I1_O_SB_LUT4_O_I2_SB_LUT4_I0_O[2] +.sym 30581 w_cs[1] +.sym 30583 w_ioc[2] +.sym 30584 w_ioc[4] +.sym 30585 w_ioc[3] +.sym 30590 spi_if_ins.w_rx_data[0] +.sym 30598 w_ioc[2] +.sym 30599 w_ioc[1] +.sym 30600 w_ioc[0] +.sym 30601 io_ctrl_ins.o_data_out_SB_DFFESR_Q_E[3] +.sym 30606 w_fetch +.sym 30607 w_load +.sym 30608 io_ctrl_ins.pmod_state_SB_DFFE_Q_E_SB_LUT4_O_I3[0] +.sym 30609 w_cs[0] +.sym 30610 $PACKER_VCC_NET +.sym 30617 w_cs[0] +.sym 30619 spi_if_ins.o_fetch_cmd_SB_LUT4_I3_1_O[0] +.sym 30620 w_ioc[0] +.sym 30621 w_ioc[1] .sym 30623 w_fetch .sym 30624 w_load .sym 30625 w_cs[1] +.sym 30635 io_ctrl_ins.o_data_out_SB_DFFESR_Q_6_R[0] +.sym 30636 spi_if_ins.o_load_cmd_SB_LUT4_I2_O[0] +.sym 30637 i_smi_a1_SB_LUT4_I1_O_SB_LUT4_O_I2_SB_LUT4_I0_O[2] .sym 30638 w_rx_data[1] -.sym 30642 w_rx_data[2] -.sym 30650 w_rx_data[0] -.sym 30658 io_ctrl_ins.led0_state_SB_LUT4_I3_O[1] -.sym 30690 w_rx_data[0] -.sym 30698 w_rx_data[2] -.sym 30714 w_rx_data[1] -.sym 30755 spi_if_ins.spi.r_rx_bit_count[0] -.sym 30760 spi_if_ins.spi.r_rx_bit_count[1] -.sym 30764 spi_if_ins.spi.r_rx_bit_count[2] -.sym 30765 spi_if_ins.spi.r_rx_bit_count_SB_DFFR_Q_D_SB_LUT4_O_I3[2] -.sym 30772 spi_if_ins.spi.r_rx_bit_count[1] -.sym 30773 spi_if_ins.spi.r_rx_bit_count[0] -.sym 30777 spi_if_ins.spi.r_rx_bit_count[0] -.sym 30795 spi_if_ins.spi.r_rx_bit_count[0] -.sym 30796 spi_if_ins.spi.r_rx_bit_count[2] -.sym 30797 spi_if_ins.spi.r_rx_bit_count[1] -.sym 30799 spi_if_ins.spi.r_rx_bit_count[0] -.sym 30800 spi_if_ins.spi.r_rx_bit_count[2] -.sym 30801 spi_if_ins.spi.r_rx_bit_count[1] -.sym 30802 rx_09_fifo.rd_addr_gray_wr[5] -.sym 30806 rx_09_fifo.rd_addr_gray_wr[3] -.sym 30810 rx_09_fifo.rd_addr_gray[5] -.sym 30814 rx_09_fifo.rd_addr_gray[3] -.sym 30818 spi_if_ins.spi.r_temp_rx_byte[1] -.sym 30822 spi_if_ins.spi.r_temp_rx_byte[4] -.sym 30830 spi_if_ins.spi.r_temp_rx_byte[3] -.sym 30834 spi_if_ins.spi.r_temp_rx_byte[2] -.sym 30838 spi_if_ins.spi.r_temp_rx_byte[5] -.sym 30842 i_mosi$SB_IO_IN -.sym 30846 spi_if_ins.spi.r_temp_rx_byte[0] -.sym 30850 spi_if_ins.spi.r_temp_rx_byte[6] -.sym 30854 spi_if_ins.spi.r_temp_rx_byte[2] -.sym 30858 spi_if_ins.spi.r_temp_rx_byte[1] -.sym 30862 spi_if_ins.spi.r_temp_rx_byte[3] -.sym 30866 i_mosi$SB_IO_IN -.sym 30873 spi_if_ins.r_tx_data_valid_SB_LUT4_I3_O[2] -.sym 30874 spi_if_ins.spi.r_temp_rx_byte[4] -.sym 30878 spi_if_ins.spi.r_temp_rx_byte[5] -.sym 30882 spi_if_ins.spi.r_rx_byte[2] -.sym 30886 spi_if_ins.spi.r_rx_byte[6] -.sym 30890 spi_if_ins.spi.r_rx_byte[3] -.sym 30894 spi_if_ins.spi.r_rx_byte[1] -.sym 30898 spi_if_ins.spi.r_rx_byte[7] -.sym 30902 spi_if_ins.spi.r_rx_byte[4] -.sym 30906 spi_if_ins.spi.r_rx_byte[0] -.sym 30910 spi_if_ins.spi.r_rx_byte[5] -.sym 30915 smi_ctrl_ins.o_data_out_SB_LUT4_I1_O[0] -.sym 30916 w_tx_data_io[5] -.sym 30917 spi_if_ins.o_cs_SB_LUT4_I2_2_O[2] -.sym 30928 smi_ctrl_ins.o_data_out_SB_LUT4_I1_O[0] -.sym 30929 w_tx_data_io[6] -.sym 30952 spi_if_ins.w_rx_data[6] -.sym 30953 spi_if_ins.w_rx_data[5] -.sym 30957 spi_if_ins.o_data_in_SB_DFFE_Q_E -.sym 30964 spi_if_ins.w_rx_data[5] -.sym 30965 spi_if_ins.w_rx_data[6] -.sym 30968 spi_if_ins.w_rx_data[5] -.sym 30969 spi_if_ins.w_rx_data[6] -.sym 30978 i_smi_a1_SB_LUT4_I1_O[2] -.sym 30979 w_ioc[1] -.sym 30980 w_cs[2] -.sym 30981 w_fetch -.sym 30984 spi_if_ins.o_load_cmd_SB_DFFESR_Q_D[2] -.sym 30985 spi_if_ins.r_tx_data_valid_SB_DFFESR_Q_D[1] -.sym 30989 spi_if_ins.o_data_in_SB_DFFE_Q_E -.sym 30996 spi_if_ins.w_rx_data[5] -.sym 30997 spi_if_ins.w_rx_data[6] -.sym 31000 spi_if_ins.o_load_cmd_SB_DFFESR_Q_D[0] -.sym 31001 spi_if_ins.o_load_cmd_SB_DFFESR_Q_D[1] -.sym 31003 spi_if_ins.o_load_cmd_SB_DFFESR_Q_D[0] -.sym 31004 spi_if_ins.o_load_cmd_SB_DFFESR_Q_D[1] -.sym 31005 spi_if_ins.o_load_cmd_SB_DFFESR_Q_D[2] -.sym 31010 spi_if_ins.w_rx_data[4] -.sym 31014 spi_if_ins.o_cs_SB_DFFESR_Q_R[0] -.sym 31019 w_ioc[2] -.sym 31020 w_ioc[4] -.sym 31021 w_ioc[3] -.sym 31022 spi_if_ins.w_rx_data[2] -.sym 31026 w_cs[0] -.sym 31027 w_cs[1] -.sym 31028 w_cs[2] -.sym 31029 w_cs[3] -.sym 31030 spi_if_ins.w_rx_data[3] -.sym 31034 spi_if_ins.w_rx_data[0] -.sym 31038 spi_if_ins.w_rx_data[1] -.sym 31043 w_ioc[1] -.sym 31044 io_ctrl_ins.i_cs_SB_LUT4_I3_I0[1] -.sym 31045 io_ctrl_ins.i_cs_SB_LUT4_I3_I0[0] -.sym 31047 io_ctrl_ins.i_cs_SB_LUT4_I3_I0[1] -.sym 31048 w_ioc[0] -.sym 31049 w_ioc[1] -.sym 31050 w_rx_data[0] -.sym 31054 w_rx_data[3] -.sym 31058 w_rx_data[4] -.sym 31062 w_rx_data[2] -.sym 31066 w_rx_data[1] -.sym 31070 w_cs[1] -.sym 31071 w_cs[2] -.sym 31072 w_cs[3] -.sym 31073 w_cs[0] -.sym 31074 io_ctrl_ins.o_pmod[3] -.sym 31075 i_button_SB_LUT4_I3_I1[1] -.sym 31076 i_button_SB_LUT4_I3_I1[2] -.sym 31077 i_config[0]$SB_IO_IN -.sym 31078 w_rx_data[5] -.sym 31082 w_rx_data[7] -.sym 31086 w_rx_data[3] +.sym 30642 w_rx_data[3] +.sym 30670 w_rx_data[2] +.sym 30682 w_rx_data[1] +.sym 30695 io_ctrl_ins.rf_pin_state[1] +.sym 30696 io_ctrl_ins.debug_mode_SB_LUT4_I2_O[1] +.sym 30697 io_ctrl_ins.debug_mode_SB_LUT4_I2_O[3] +.sym 30701 io_ctrl_ins.led1_state_SB_DFFESR_Q_E +.sym 30706 io_ctrl_ins.debug_mode_SB_LUT4_I2_O[1] +.sym 30707 io_ctrl_ins.rf_mode[2] +.sym 30708 io_ctrl_ins.rf_pin_state[2] +.sym 30709 io_ctrl_ins.debug_mode_SB_LUT4_I2_O[3] +.sym 30721 sys_ctrl_ins.reset_cmd +.sym 30726 $PACKER_GND_NET +.sym 30759 io_pmod_SB_DFFSS_Q_D_SB_LUT4_O_I0_SB_LUT4_O_3_I2[3] +.sym 30760 rx_09_fifo.rd_addr[3] +.sym 30761 rx_09_fifo.wr_addr_gray_rd_r[2] +.sym 30762 io_pmod_SB_DFFSS_Q_D_SB_LUT4_O_I0_SB_LUT4_O_2_I0[0] +.sym 30763 io_pmod_SB_DFFSS_Q_D_SB_LUT4_O_I0_SB_LUT4_O_1_I1_SB_LUT4_O_I0[1] +.sym 30764 io_pmod_SB_DFFSS_Q_D_SB_LUT4_O_I0_SB_LUT4_O_2_I0[2] +.sym 30765 io_pmod_SB_DFFSS_Q_D_SB_LUT4_O_I0_SB_LUT4_O_2_I0[3] +.sym 30766 rx_09_fifo.rd_addr_gray[1] +.sym 30774 rx_09_fifo.rd_addr_gray_wr[1] +.sym 30778 rx_09_fifo.rd_addr_gray_wr[2] +.sym 30786 io_pmod_SB_DFFSS_Q_D_SB_LUT4_O_I0_SB_LUT4_O_I0[2] +.sym 30787 io_pmod_SB_DFFSS_Q_D_SB_LUT4_O_I0_SB_LUT4_O_I2[1] +.sym 30788 io_pmod_SB_DFFSS_Q_D_SB_LUT4_O_I0_SB_LUT4_O_I2[2] +.sym 30789 io_pmod_SB_DFFSS_Q_D_SB_LUT4_O_I0_SB_LUT4_O_I2[3] +.sym 30792 rx_09_fifo.wr_addr_gray_rd_r[5] +.sym 30793 rx_09_fifo.rd_addr_gray_SB_LUT4_I2_O[6] +.sym 30796 rx_09_fifo.wr_addr_gray_rd_r[5] +.sym 30797 io_pmod_SB_DFFSS_Q_D_SB_LUT4_O_I0_SB_LUT4_O_2_I0[3] +.sym 30799 rx_09_fifo.rd_addr[0] +.sym 30800 rx_09_fifo.wr_addr_gray_rd_r[0] +.sym 30801 rx_09_fifo.rd_addr_gray_SB_LUT4_I2_O[1] +.sym 30803 rx_09_fifo.wr_addr_gray_rd_r[2] +.sym 30804 rx_09_fifo.rd_addr_gray_SB_LUT4_I2_O[2] +.sym 30805 rx_09_fifo.rd_addr_gray_SB_LUT4_I2_O[3] +.sym 30806 io_pmod_SB_DFFSS_Q_D_SB_LUT4_O_I0_SB_LUT4_O_1_I1_SB_LUT4_O_I2[1] +.sym 30812 rx_09_fifo.rd_addr_gray_SB_LUT4_I2_O[1] +.sym 30813 rx_09_fifo.rd_addr_gray_SB_LUT4_I2_O[2] +.sym 30814 rx_09_fifo.rd_addr_gray_SB_LUT4_I2_O[3] +.sym 30819 rx_09_fifo.rd_addr[0] +.sym 30824 io_pmod_SB_DFFSS_Q_D_SB_LUT4_O_I0_SB_LUT4_O_3_I2[1] +.sym 30825 rx_09_fifo.rd_addr[0] +.sym 30828 io_pmod_SB_DFFSS_Q_D_SB_LUT4_O_I0_SB_LUT4_O_3_I2[3] +.sym 30829 rx_09_fifo.rd_addr_gray_SB_LUT4_I2_I3[2] +.sym 30832 rx_09_fifo.rd_addr[3] +.sym 30833 rx_09_fifo.rd_addr_gray_SB_LUT4_I2_I3[3] +.sym 30836 io_pmod_SB_DFFSS_Q_D_SB_LUT4_O_I0_SB_LUT4_O_2_I0[2] +.sym 30837 rx_09_fifo.rd_addr_gray_SB_LUT4_I2_I3[4] +.sym 30840 io_pmod_SB_DFFSS_Q_D_SB_LUT4_O_I0_SB_LUT4_O_2_I0[3] +.sym 30841 rx_09_fifo.rd_addr_gray_SB_LUT4_I2_I3[5] +.sym 30844 io_pmod_SB_DFFSS_Q_D_SB_LUT4_O_I0_SB_LUT4_O_I2[1] +.sym 30845 rx_09_fifo.rd_addr_gray_SB_LUT4_I2_I3[6] +.sym 30848 io_pmod_SB_DFFSS_Q_D_SB_LUT4_O_I0_SB_LUT4_O_I0[1] +.sym 30849 rx_09_fifo.rd_addr_gray_SB_LUT4_I2_I3[7] +.sym 30851 spi_if_ins.r_tx_data_valid_SB_LUT4_I3_O_SB_LUT4_O_I0_SB_LUT4_O_I3[2] +.sym 30855 spi_if_ins.r_tx_data_valid_SB_LUT4_I3_O_SB_LUT4_O_I0[3] +.sym 30856 $PACKER_VCC_NET +.sym 30859 spi_if_ins.spi.r_tx_bit_count[2] +.sym 30860 $PACKER_VCC_NET +.sym 30861 spi_if_ins.spi.r_tx_bit_count_SB_DFFESR_Q_D_SB_LUT4_O_I3[2] +.sym 30862 spi_if_ins.r_tx_data_valid_SB_LUT4_I3_O_SB_LUT4_O_I0[0] +.sym 30863 spi_if_ins.r_tx_data_valid_SB_LUT4_I3_O_SB_LUT4_O_I0[1] +.sym 30864 spi_if_ins.r_tx_data_valid_SB_LUT4_I3_O_SB_LUT4_O_I0[2] +.sym 30865 spi_if_ins.r_tx_data_valid_SB_LUT4_I3_O_SB_LUT4_O_I0[3] +.sym 30869 spi_if_ins.r_tx_data_valid_SB_LUT4_I3_O_SB_LUT4_O_I0_SB_LUT4_O_I3[2] +.sym 30871 spi_if_ins.r_tx_data_valid_SB_LUT4_I3_O_SB_LUT4_O_I0[3] +.sym 30872 $PACKER_VCC_NET +.sym 30873 spi_if_ins.r_tx_data_valid_SB_LUT4_I3_O_SB_LUT4_O_I0_SB_LUT4_O_I3[2] +.sym 30875 spi_if_ins.r_tx_data_valid_SB_LUT4_I3_O_SB_LUT4_O_I0[3] +.sym 30876 spi_if_ins.spi.SCKr_SB_LUT4_I0_O[1] +.sym 30877 spi_if_ins.r_tx_data_valid_SB_LUT4_I3_O[2] +.sym 30878 spi_if_ins.spi.r_tx_byte[3] +.sym 30879 spi_if_ins.spi.r_tx_byte[7] +.sym 30880 spi_if_ins.spi.r_tx_bit_count[2] +.sym 30881 spi_if_ins.r_tx_data_valid_SB_LUT4_I3_O_SB_LUT4_O_I0_SB_LUT4_O_I3[2] +.sym 30882 spi_if_ins.r_tx_byte[2] +.sym 30886 spi_if_ins.r_tx_byte[1] +.sym 30890 spi_if_ins.r_tx_byte[7] +.sym 30894 spi_if_ins.r_tx_byte[5] +.sym 30898 spi_if_ins.spi.r_tx_byte[1] +.sym 30899 spi_if_ins.spi.r_tx_byte[5] +.sym 30900 spi_if_ins.r_tx_data_valid_SB_LUT4_I3_O_SB_LUT4_O_I0_SB_LUT4_O_I3[2] +.sym 30901 spi_if_ins.spi.r_tx_bit_count[2] +.sym 30902 spi_if_ins.r_tx_byte[0] +.sym 30906 spi_if_ins.r_tx_data_valid_SB_LUT4_I3_O_SB_LUT4_O_I0_SB_LUT4_O_I3[0] +.sym 30907 spi_if_ins.r_tx_data_valid_SB_LUT4_I3_O_SB_LUT4_O_I0_SB_LUT4_O_I3[1] +.sym 30908 spi_if_ins.r_tx_data_valid_SB_LUT4_I3_O_SB_LUT4_O_I0_SB_LUT4_O_I3[2] +.sym 30909 spi_if_ins.r_tx_data_valid_SB_LUT4_I3_O_SB_LUT4_O_I0_SB_LUT4_O_I3[3] +.sym 30910 spi_if_ins.spi.r_tx_byte[2] +.sym 30911 spi_if_ins.spi.r_tx_byte[6] +.sym 30912 spi_if_ins.r_tx_data_valid_SB_LUT4_I3_O_SB_LUT4_O_I0_SB_LUT4_O_I3[2] +.sym 30913 spi_if_ins.spi.r_tx_bit_count[2] +.sym 30915 sys_ctrl_ins.reset_count[0] +.sym 30920 sys_ctrl_ins.reset_count[1] +.sym 30922 sys_ctrl_ins.o_soft_reset_SB_DFFESS_Q_S +.sym 30924 sys_ctrl_ins.reset_count[2] +.sym 30925 sys_ctrl_ins.reset_count_SB_DFFESR_Q_D_SB_LUT4_O_I3[2] +.sym 30926 sys_ctrl_ins.o_soft_reset_SB_DFFESS_Q_S +.sym 30928 sys_ctrl_ins.reset_count[3] +.sym 30929 sys_ctrl_ins.reset_count_SB_DFFESR_Q_D_SB_LUT4_O_I3[3] +.sym 30930 sys_ctrl_ins.o_soft_reset_SB_DFFESS_Q_S +.sym 30932 sys_ctrl_ins.reset_count[1] +.sym 30933 sys_ctrl_ins.reset_count[0] +.sym 30934 sys_ctrl_ins.reset_count[3] +.sym 30935 sys_ctrl_ins.reset_count[1] +.sym 30936 sys_ctrl_ins.reset_count[2] +.sym 30937 sys_ctrl_ins.reset_count[0] +.sym 30941 sys_ctrl_ins.reset_count[0] +.sym 30944 sys_ctrl_ins.o_soft_reset_SB_DFFESS_Q_S +.sym 30945 sys_ctrl_ins.reset_cmd +.sym 30946 spi_if_ins.r_tx_byte[3] +.sym 30954 spi_if_ins.r_tx_byte[6] +.sym 30966 spi_if_ins.r_tx_byte[4] +.sym 30982 spi_if_ins.spi.r_temp_rx_byte[5] +.sym 30992 i_ss$SB_IO_IN +.sym 30993 spi_if_ins.r_tx_data_valid +.sym 31000 w_rx_24_fifo_empty +.sym 31001 io_pmod[2]$SB_IO_IN +.sym 31011 smi_ctrl_ins.o_data_out_SB_LUT4_I1_O[0] +.sym 31012 w_tx_data_io[7] +.sym 31013 spi_if_ins.o_cs_SB_LUT4_I2_2_O[2] +.sym 31014 w_tx_data_smi[1] +.sym 31015 spi_if_ins.o_cs_SB_LUT4_I2_1_O[1] +.sym 31016 smi_ctrl_ins.o_data_out_SB_LUT4_I1_O[0] +.sym 31017 w_tx_data_io[1] +.sym 31020 smi_ctrl_ins.o_data_out_SB_LUT4_I1_O[0] +.sym 31021 w_tx_data_io[4] +.sym 31023 smi_ctrl_ins.o_data_out_SB_LUT4_I1_O[0] +.sym 31024 w_tx_data_io[2] +.sym 31025 smi_ctrl_ins.o_data_out_SB_LUT4_I1_O[2] +.sym 31027 smi_ctrl_ins.o_data_out_SB_LUT4_I1_O[0] +.sym 31028 w_tx_data_io[5] +.sym 31029 spi_if_ins.o_cs_SB_LUT4_I2_2_O[2] +.sym 31033 spi_if_ins.w_rx_data[5] +.sym 31036 smi_ctrl_ins.o_data_out_SB_LUT4_I1_O[0] +.sym 31037 w_tx_data_io[6] +.sym 31038 w_tx_data_smi[3] +.sym 31039 spi_if_ins.o_cs_SB_LUT4_I2_1_O[1] +.sym 31040 smi_ctrl_ins.o_data_out_SB_LUT4_I1_O[0] +.sym 31041 w_tx_data_io[3] +.sym 31042 r_tx_data[4] +.sym 31050 r_tx_data[6] +.sym 31074 w_rx_data[2] +.sym 31078 w_rx_data[1] +.sym 31084 io_ctrl_ins.ldo2v8_state_SB_LUT4_I3_O[1] +.sym 31085 io_ctrl_ins.pmod_state_SB_DFFE_Q_E_SB_LUT4_O_I3[1] +.sym 31086 w_rx_data[6] .sym 31090 w_rx_data[0] -.sym 31095 w_ioc[0] -.sym 31096 io_ctrl_ins.i_cs_SB_LUT4_I3_I0[1] -.sym 31097 w_ioc[1] -.sym 31098 w_rx_data[1] -.sym 31102 w_rx_data[4] -.sym 31106 io_ctrl_ins.o_pmod[4] -.sym 31107 o_tr_vc1_b$SB_IO_OUT -.sym 31108 w_ioc[0] -.sym 31109 io_ctrl_ins.i_cs_SB_LUT4_I3_I0[0] -.sym 31110 io_ctrl_ins.led0_state_SB_LUT4_I3_O[1] -.sym 31111 io_ctrl_ins.pmod_dir_state[4] -.sym 31112 io_ctrl_ins.led0_state_SB_LUT4_I3_I0[0] -.sym 31113 io_ctrl_ins.rf_mode[2] -.sym 31116 w_ioc[0] -.sym 31117 io_ctrl_ins.i_cs_SB_LUT4_I3_I0[0] -.sym 31118 w_fetch -.sym 31119 w_load -.sym 31120 i_button_SB_LUT4_I3_I1[1] -.sym 31121 w_cs[0] -.sym 31123 w_ioc[1] -.sym 31124 w_ioc[0] -.sym 31125 io_ctrl_ins.i_cs_SB_LUT4_I3_I0[1] -.sym 31128 io_ctrl_ins.i_cs_SB_LUT4_I3_I0[0] -.sym 31129 w_ioc[0] -.sym 31130 spi_if_ins.o_load_cmd_SB_DFFESR_Q_D[0] -.sym 31134 io_ctrl_ins.o_pmod[0] -.sym 31135 io_ctrl_ins.mixer_en_state -.sym 31136 w_ioc[0] -.sym 31137 io_ctrl_ins.i_cs_SB_LUT4_I3_I0[0] +.sym 31094 w_rx_data[3] +.sym 31098 w_rx_data[4] +.sym 31102 w_rx_data[7] +.sym 31106 w_rx_data[6] +.sym 31111 w_ioc[0] +.sym 31112 spi_if_ins.o_fetch_cmd_SB_LUT4_I3_1_O[0] +.sym 31113 w_ioc[1] +.sym 31116 i_smi_a1_SB_LUT4_I1_O_SB_LUT4_O_I2_SB_LUT4_I0_O[2] +.sym 31117 spi_if_ins.o_load_cmd_SB_LUT4_I2_O[0] +.sym 31118 w_rx_data[4] +.sym 31122 io_ctrl_ins.ldo2v8_state_SB_LUT4_I3_O[1] +.sym 31123 io_ctrl_ins.pmod_dir_state[6] +.sym 31124 io_ctrl_ins.pmod_state_SB_DFFE_Q_E_SB_LUT4_O_I3[0] +.sym 31125 io_ctrl_ins.o_pmod[6] +.sym 31127 w_ioc[1] +.sym 31128 w_ioc[0] +.sym 31129 spi_if_ins.o_fetch_cmd_SB_LUT4_I3_1_O[0] +.sym 31132 w_ioc[0] +.sym 31133 io_ctrl_ins.tr_vc_2_state_SB_LUT4_I1_I3[1] +.sym 31135 w_ioc[1] +.sym 31136 spi_if_ins.o_fetch_cmd_SB_LUT4_I3_1_O[0] +.sym 31137 io_ctrl_ins.tr_vc_2_state_SB_LUT4_I1_I3[1] .sym 31138 w_rx_data[4] -.sym 31142 sys_ctrl_ins.o_data_out_SB_DFFE_Q_D[1] -.sym 31143 o_shdn_rx_lna$SB_IO_OUT -.sym 31144 io_ctrl_ins.led0_state_SB_LUT4_I3_I0[0] -.sym 31145 io_ctrl_ins.debug_mode[1] -.sym 31152 sys_ctrl_ins.o_data_out_SB_DFFE_Q_D[1] -.sym 31153 spi_if_ins.o_load_cmd_SB_LUT4_I2_O_SB_LUT4_I3_O[1] -.sym 31154 w_rx_data[5] -.sym 31158 sys_ctrl_ins.o_data_out_SB_DFFE_Q_D[1] -.sym 31159 o_tr_vc2$SB_IO_OUT -.sym 31160 io_ctrl_ins.led0_state_SB_LUT4_I3_I0[0] -.sym 31161 io_ctrl_ins.debug_mode_SB_LUT4_I2_O[1] -.sym 31162 w_rx_data[3] -.sym 31166 io_ctrl_ins.o_pmod[2] -.sym 31167 o_shdn_tx_lna$SB_IO_OUT -.sym 31168 w_ioc[0] -.sym 31169 io_ctrl_ins.i_cs_SB_LUT4_I3_I0[0] -.sym 31170 w_rx_data[7] -.sym 31180 io_ctrl_ins.rf_mode[0] -.sym 31181 io_ctrl_ins.rf_mode[2] -.sym 31182 w_rx_data[0] -.sym 31193 io_ctrl_ins.rf_mode[0] -.sym 31198 w_rx_data[6] -.sym 31214 w_rx_data[2] -.sym 31218 w_rx_data[1] -.sym 31266 spi_if_ins.spi.r_rx_done -.sym 31273 i_ss$SB_IO_IN -.sym 31284 spi_if_ins.spi.r3_rx_done -.sym 31285 spi_if_ins.spi.r2_rx_done -.sym 31286 spi_if_ins.spi.r2_rx_done -.sym 31306 rx_09_fifo.rd_addr_gray_SB_LUT4_I2_O[7] -.sym 31318 rx_09_fifo.rd_addr_gray_SB_DFFESR_Q_6_D[3] -.sym 31341 smi_ctrl_ins.r_fifo_09_pull_SB_LUT4_I3_O -.sym 31346 spi_if_ins.spi.r_rx_done_SB_DFFER_Q_D[1] -.sym 31378 rx_09_fifo.rd_addr_gray_SB_DFFESR_Q_5_D[0] -.sym 31384 i_ss$SB_IO_IN -.sym 31385 spi_if_ins.r_tx_data_valid -.sym 31422 spi_if_ins.spi.r3_rx_done_SB_LUT4_I2_O -.sym 31439 spi_if_ins.r_tx_byte[7] -.sym 31440 spi_if_ins.spi.o_spi_miso_SB_DFFE_Q_D_SB_LUT4_O_I2[1] -.sym 31441 spi_if_ins.r_tx_data_valid_SB_LUT4_I3_O[2] -.sym 31469 spi_if_ins.state_if_SB_DFFESR_Q_D_SB_LUT4_I1_O[1] -.sym 31482 spi_if_ins.r_tx_data_valid_SB_DFFESR_Q_D[1] -.sym 31491 spi_if_ins.o_load_cmd_SB_DFFESR_Q_D[1] -.sym 31492 spi_if_ins.state_if[1] -.sym 31493 spi_if_ins.state_if[0] -.sym 31498 spi_if_ins.w_rx_data[6] -.sym 31503 spi_if_ins.state_if_SB_DFFESR_Q_1_D[2] -.sym 31504 spi_if_ins.o_load_cmd_SB_DFFESR_Q_D[0] -.sym 31505 spi_if_ins.o_load_cmd_SB_DFFESR_Q_D[2] -.sym 31506 spi_if_ins.o_load_cmd_SB_DFFESR_Q_D[1] -.sym 31507 spi_if_ins.o_load_cmd_SB_DFFESR_Q_D[2] -.sym 31508 spi_if_ins.state_if[0] -.sym 31509 spi_if_ins.state_if[1] -.sym 31511 spi_if_ins.o_load_cmd_SB_DFFESR_Q_D[2] -.sym 31512 spi_if_ins.state_if_SB_DFFESR_Q_1_D[2] -.sym 31513 spi_if_ins.state_if_SB_DFFESR_Q_D_SB_LUT4_I1_O[1] -.sym 31515 spi_if_ins.o_load_cmd_SB_DFFESR_Q_D[1] -.sym 31516 spi_if_ins.state_if[0] -.sym 31517 spi_if_ins.state_if[1] -.sym 31519 spi_if_ins.state_if_SB_DFFESR_Q_1_D[1] -.sym 31520 spi_if_ins.state_if_SB_DFFESR_Q_D_SB_LUT4_I1_O[1] -.sym 31521 spi_if_ins.state_if_SB_DFFESR_Q_D_SB_LUT4_I1_O[2] -.sym 31522 spi_if_ins.w_rx_data[1] -.sym 31526 spi_if_ins.w_rx_data[5] -.sym 31530 spi_if_ins.w_rx_data[0] -.sym 31534 spi_if_ins.w_rx_data[4] -.sym 31542 spi_if_ins.w_rx_data[3] -.sym 31546 spi_if_ins.state_if_SB_DFFESR_Q_1_D[1] -.sym 31550 spi_if_ins.w_rx_data[2] -.sym 31558 w_rx_data[5] -.sym 31562 w_rx_data[6] -.sym 31566 spi_if_ins.o_load_cmd_SB_DFFESR_Q_D[1] -.sym 31567 spi_if_ins.o_load_cmd_SB_DFFESR_Q_D[2] -.sym 31568 spi_if_ins.state_if[0] -.sym 31569 spi_if_ins.state_if[1] -.sym 31570 w_rx_data[7] -.sym 31574 io_ctrl_ins.led0_state_SB_LUT4_I3_O[1] -.sym 31575 io_ctrl_ins.pmod_dir_state[6] -.sym 31576 i_button_SB_LUT4_I3_I1[2] -.sym 31577 i_config[3]$SB_IO_IN -.sym 31589 spi_if_ins.o_load_cmd_SB_DFFESR_Q_D[2] -.sym 31591 spi_if_ins.o_load_cmd_SB_DFFESR_Q_D[1] -.sym 31592 spi_if_ins.state_if[0] -.sym 31593 spi_if_ins.state_if[1] -.sym 31596 io_ctrl_ins.led0_state_SB_LUT4_I3_O[1] -.sym 31597 spi_if_ins.o_load_cmd_SB_LUT4_I2_O_SB_LUT4_I3_O[1] -.sym 31598 spi_if_ins.o_load_cmd_SB_DFFESR_Q_D[2] -.sym 31599 spi_if_ins.o_load_cmd_SB_DFFESR_Q_D[1] -.sym 31600 spi_if_ins.state_if[0] -.sym 31601 spi_if_ins.state_if[1] -.sym 31602 i_button_SB_LUT4_I3_I1[0] -.sym 31603 i_button_SB_LUT4_I3_I1[1] -.sym 31604 i_button_SB_LUT4_I3_I1[2] -.sym 31605 i_button$SB_IO_IN -.sym 31606 o_rx_h_tx_l$SB_IO_OUT -.sym 31607 sys_ctrl_ins.o_data_out_SB_DFFE_Q_D[1] -.sym 31608 io_ctrl_ins.led0_state_SB_LUT4_I3_O[1] -.sym 31609 io_ctrl_ins.pmod_dir_state[7] -.sym 31610 io_ctrl_ins.led0_state_SB_LUT4_I3_O[1] -.sym 31611 io_ctrl_ins.pmod_dir_state[5] -.sym 31612 i_button_SB_LUT4_I3_I1[1] -.sym 31613 io_ctrl_ins.o_pmod[5] -.sym 31614 spi_if_ins.state_if_SB_DFFESR_Q_1_D[0] -.sym 31615 spi_if_ins.state_if_SB_DFFESR_Q_1_D[1] -.sym 31616 spi_if_ins.state_if_SB_DFFESR_Q_1_D[2] -.sym 31617 spi_if_ins.o_load_cmd_SB_DFFESR_Q_D[2] -.sym 31618 o_tr_vc1$SB_IO_OUT -.sym 31619 sys_ctrl_ins.o_data_out_SB_DFFE_Q_D[1] -.sym 31620 i_button_SB_LUT4_I3_I1[2] -.sym 31621 i_config[2]$SB_IO_IN -.sym 31626 w_rx_data[4] -.sym 31630 w_rx_data[3] -.sym 31648 i_button_SB_LUT4_I3_I1[1] -.sym 31649 spi_if_ins.o_load_cmd_SB_LUT4_I2_O_SB_LUT4_I3_O[1] -.sym 31650 io_ctrl_ins.debug_mode[0] -.sym 31651 io_ctrl_ins.rf_mode[2] -.sym 31652 io_ctrl_ins.debug_mode_SB_LUT4_I2_O[1] -.sym 31653 io_ctrl_ins.debug_mode[1] -.sym 31654 io_ctrl_ins.o_pmod[6] -.sym 31655 o_rx_h_tx_l_b$SB_IO_OUT -.sym 31656 w_ioc[0] -.sym 31657 io_ctrl_ins.i_cs_SB_LUT4_I3_I0[0] -.sym 31662 w_rx_data[6] -.sym 31668 io_ctrl_ins.debug_mode[0] -.sym 31669 io_ctrl_ins.debug_mode[1] -.sym 31670 w_rx_data[2] -.sym 31682 io_ctrl_ins.rf_pin_state[0] -.sym 31683 io_ctrl_ins.debug_mode_SB_LUT4_I2_O[1] -.sym 31684 io_ctrl_ins.rf_mode[2] -.sym 31685 io_ctrl_ins.debug_mode_SB_LUT4_I2_O[2] -.sym 31686 io_ctrl_ins.tr_vc_1_state_SB_DFFE_Q_D_SB_LUT4_O_I0[0] -.sym 31687 io_ctrl_ins.debug_mode_SB_LUT4_I2_O[1] -.sym 31688 io_ctrl_ins.rf_pin_state[4] -.sym 31689 io_ctrl_ins.debug_mode_SB_LUT4_I2_O[2] -.sym 31691 io_ctrl_ins.rf_pin_state[7] -.sym 31692 io_ctrl_ins.debug_mode_SB_LUT4_I2_O[2] -.sym 31693 io_ctrl_ins.rx_h_state_SB_DFFE_Q_D_SB_LUT4_O_I3[2] -.sym 31694 io_ctrl_ins.tr_vc_1_state_SB_DFFE_Q_D_SB_LUT4_O_I0[0] +.sym 31142 w_rx_data[2] +.sym 31148 io_ctrl_ins.tr_vc_2_state_SB_LUT4_I1_I3_SB_LUT4_I2_O[0] +.sym 31149 io_ctrl_ins.pmod_state_SB_DFFE_Q_E_SB_LUT4_O_I3[1] +.sym 31150 io_ctrl_ins.ldo2v8_state_SB_LUT4_I3_O[1] +.sym 31151 io_ctrl_ins.pmod_dir_state[1] +.sym 31152 io_ctrl_ins.pmod_state_SB_DFFE_Q_E_SB_LUT4_O_I3[0] +.sym 31153 io_ctrl_ins.o_pmod[1] +.sym 31154 w_rx_data[0] +.sym 31158 io_ctrl_ins.debug_mode[0] +.sym 31159 io_ctrl_ins.rf_mode[2] +.sym 31160 io_ctrl_ins.debug_mode_SB_LUT4_I2_O[1] +.sym 31161 io_ctrl_ins.debug_mode[1] +.sym 31164 io_ctrl_ins.debug_mode[0] +.sym 31165 io_ctrl_ins.debug_mode[1] +.sym 31168 io_ctrl_ins.pmod_state_SB_DFFE_Q_E_SB_LUT4_O_I3[0] +.sym 31169 io_ctrl_ins.pmod_state_SB_DFFE_Q_E_SB_LUT4_O_I3[1] +.sym 31170 io_ctrl_ins.tr_vc_2_state_SB_LUT4_I1_I3_SB_LUT4_I2_O[0] +.sym 31171 o_shdn_rx_lna$SB_IO_OUT +.sym 31172 io_ctrl_ins.o_data_out_SB_DFFESR_Q_6_R[0] +.sym 31173 io_ctrl_ins.debug_mode[1] +.sym 31178 w_rx_data[2] +.sym 31185 io_ctrl_ins.debug_mode_SB_LUT4_I0_O +.sym 31187 spi_if_ins.o_load_cmd_SB_LUT4_I2_O[0] +.sym 31188 io_ctrl_ins.led1_state_SB_LUT4_I0_I2[1] +.sym 31189 i_smi_a1_SB_LUT4_I1_O_SB_LUT4_O_I2_SB_LUT4_I0_O[2] +.sym 31190 io_ctrl_ins.o_pmod[2] +.sym 31191 o_shdn_tx_lna$SB_IO_OUT +.sym 31192 w_ioc[0] +.sym 31193 io_ctrl_ins.tr_vc_2_state_SB_LUT4_I1_I3[1] +.sym 31194 w_rx_data[1] +.sym 31198 io_ctrl_ins.o_data_out_SB_DFFESR_Q_6_R[0] +.sym 31199 io_ctrl_ins.rf_mode[0] +.sym 31200 io_ctrl_ins.led1_state_SB_LUT4_I0_I2[1] +.sym 31201 o_ldo_2v8_en +.sym 31202 w_rx_data[1] +.sym 31226 w_rx_data[2] +.sym 31230 w_rx_data[0] +.sym 31273 io_smi_data[4]$SB_IO_OUT +.sym 31285 i_smi_a3$SB_IO_IN +.sym 31286 rx_09_fifo.rd_addr_gray[5] +.sym 31292 i_smi_a3$SB_IO_IN +.sym 31293 w_smi_data_output[5] +.sym 31294 rx_09_fifo.rd_addr_gray[0] +.sym 31298 io_pmod_SB_DFFSS_Q_D_SB_LUT4_O_I0[0] +.sym 31299 io_pmod_SB_DFFSS_Q_D_SB_LUT4_O_I0[1] +.sym 31300 io_pmod_SB_DFFSS_Q_D_SB_LUT4_O_I0[2] +.sym 31301 io_pmod_SB_DFFSS_Q_D_SB_LUT4_O_I0[3] +.sym 31303 io_pmod_SB_DFFSS_Q_D_SB_LUT4_O_I0_SB_LUT4_O_1_I1[0] +.sym 31304 io_pmod_SB_DFFSS_Q_D_SB_LUT4_O_I0_SB_LUT4_O_1_I1[1] +.sym 31305 io_pmod_SB_DFFSS_Q_D_SB_LUT4_O_I0_SB_LUT4_O_1_I1[2] +.sym 31306 io_pmod_SB_DFFSS_Q_D_SB_LUT4_O_I0_SB_LUT4_O_1_I1_SB_LUT4_O_I0[0] +.sym 31307 io_pmod_SB_DFFSS_Q_D_SB_LUT4_O_I0_SB_LUT4_O_1_I1_SB_LUT4_O_I0[1] +.sym 31308 io_pmod_SB_DFFSS_Q_D_SB_LUT4_O_I0_SB_LUT4_O_1_I1_SB_LUT4_O_I0[2] +.sym 31309 io_pmod_SB_DFFSS_Q_D_SB_LUT4_O_I0_SB_LUT4_O_1_I1_SB_LUT4_O_I0[3] +.sym 31311 io_pmod_SB_DFFSS_Q_D_SB_LUT4_O_I0_SB_LUT4_O_3_I2[0] +.sym 31312 rx_09_fifo.rd_addr_gray_SB_LUT4_I2_O[1] +.sym 31313 rx_09_fifo.rd_addr_gray_SB_LUT4_I2_O[2] +.sym 31314 io_pmod_SB_DFFSS_Q_D_SB_LUT4_O_I0_SB_LUT4_O_3_I2[0] +.sym 31315 io_pmod_SB_DFFSS_Q_D_SB_LUT4_O_I0_SB_LUT4_O_3_I2[1] +.sym 31316 io_pmod_SB_DFFSS_Q_D_SB_LUT4_O_I0_SB_LUT4_O_3_I2[2] +.sym 31317 io_pmod_SB_DFFSS_Q_D_SB_LUT4_O_I0_SB_LUT4_O_3_I2[3] +.sym 31320 rx_09_fifo.rd_addr[0] +.sym 31321 rx_09_fifo.wr_addr_gray_rd_r[0] +.sym 31326 io_pmod_SB_DFFSS_Q_D_SB_LUT4_O_I0_SB_LUT4_O_1_I1_SB_LUT4_O_I0[0] +.sym 31327 io_pmod_SB_DFFSS_Q_D_SB_LUT4_O_I0_SB_LUT4_O_1_I1_SB_LUT4_O_I2[1] +.sym 31328 io_pmod_SB_DFFSS_Q_D_SB_LUT4_O_I0_SB_LUT4_O_1_I1_SB_LUT4_O_I2[2] +.sym 31329 io_pmod_SB_DFFSS_Q_D_SB_LUT4_O_I0_SB_LUT4_O_1_I1_SB_LUT4_O_I2[3] +.sym 31332 rx_09_fifo.rd_addr[0] +.sym 31333 rx_09_fifo.rd_addr_gray_SB_LUT4_I2_O[1] +.sym 31334 io_pmod_SB_DFFSS_Q_D_SB_LUT4_O_I0_SB_LUT4_O_1_I1_SB_LUT4_O_I0[3] +.sym 31340 rx_09_fifo.wr_addr_gray_rd_r[3] +.sym 31341 rx_09_fifo.rd_addr_gray_SB_LUT4_I2_O[3] +.sym 31345 rx_09_fifo.rd_addr[0] +.sym 31348 io_pmod_SB_DFFSS_Q_D_SB_LUT4_O_I0_SB_LUT4_O_1_I1_SB_LUT4_O_I0[3] +.sym 31349 rx_09_fifo.rd_addr_gray_SB_LUT4_I2_O[6] +.sym 31350 rx_09_fifo.rd_addr_gray_SB_LUT4_I2_O[1] +.sym 31354 rx_09_fifo.rd_addr_gray_SB_LUT4_I2_O[6] +.sym 31358 rx_09_fifo.rd_addr_gray_SB_LUT4_I2_O[2] +.sym 31362 rx_09_fifo.wr_addr_gray_rd[3] +.sym 31366 spi_if_ins.spi.SCKr[2] +.sym 31367 spi_if_ins.r_tx_data_valid_SB_LUT4_I3_O_SB_LUT4_O_I0_SB_LUT4_O_I3[2] +.sym 31368 spi_if_ins.spi.r_tx_bit_count[2] +.sym 31369 spi_if_ins.spi.SCKr[1] +.sym 31370 spi_if_ins.spi.SCKr[0] +.sym 31374 i_sck$SB_IO_IN +.sym 31379 spi_if_ins.spi.SCKr[2] +.sym 31380 spi_if_ins.spi.SCKr[1] +.sym 31381 spi_if_ins.r_tx_data_valid_SB_LUT4_I3_O[2] +.sym 31389 spi_if_ins.r_tx_data_valid_SB_LUT4_I3_O[2] +.sym 31390 spi_if_ins.spi.SCKr[1] +.sym 31399 i_smi_a2_SB_LUT4_I1_O_SB_LUT4_I3_1_I2[2] +.sym 31400 i_smi_soe_se$rename$0 +.sym 31401 smi_ctrl_ins.r_fifo_24_pull_SB_LUT4_I1_O[2] +.sym 31427 spi_if_ins.spi.r_rx_bit_count[0] +.sym 31432 spi_if_ins.spi.r_rx_bit_count[1] +.sym 31436 spi_if_ins.spi.r_rx_bit_count[2] +.sym 31437 spi_if_ins.spi.r_rx_bit_count_SB_DFFR_Q_D_SB_LUT4_O_I3[2] +.sym 31441 spi_if_ins.spi.r_rx_bit_count[0] +.sym 31448 spi_if_ins.spi.r_rx_bit_count[1] +.sym 31449 spi_if_ins.spi.r_rx_bit_count[0] +.sym 31462 spi_if_ins.spi.r_rx_byte[6] +.sym 31469 sys_ctrl_ins.reset_count_SB_DFFESR_Q_E +.sym 31471 spi_if_ins.spi.r_rx_bit_count[0] +.sym 31472 spi_if_ins.spi.r_rx_bit_count[2] +.sym 31473 spi_if_ins.spi.r_rx_bit_count[1] +.sym 31487 spi_if_ins.spi.r_rx_bit_count[0] +.sym 31488 spi_if_ins.spi.r_rx_bit_count[2] +.sym 31489 spi_if_ins.spi.r_rx_bit_count[1] +.sym 31490 i_mosi$SB_IO_IN +.sym 31494 spi_if_ins.spi.r_temp_rx_byte[3] +.sym 31498 spi_if_ins.spi.r_temp_rx_byte[4] +.sym 31502 spi_if_ins.spi.r_temp_rx_byte[0] +.sym 31506 spi_if_ins.spi.r_temp_rx_byte[2] +.sym 31510 spi_if_ins.spi.r_temp_rx_byte[1] +.sym 31514 spi_if_ins.spi.r_temp_rx_byte[5] +.sym 31520 i_ss$SB_IO_IN +.sym 31521 spi_if_ins.spi.r_rx_done_SB_DFFER_Q_D[1] +.sym 31522 i_mosi$SB_IO_IN +.sym 31526 spi_if_ins.spi.r_temp_rx_byte[3] +.sym 31530 spi_if_ins.spi.r_temp_rx_byte[1] +.sym 31538 spi_if_ins.spi.r_temp_rx_byte[6] +.sym 31542 spi_if_ins.spi.r_temp_rx_byte[0] +.sym 31546 spi_if_ins.spi.r_temp_rx_byte[2] +.sym 31550 spi_if_ins.spi.r_temp_rx_byte[4] +.sym 31554 spi_if_ins.spi.r_rx_byte[3] +.sym 31558 spi_if_ins.spi.r_rx_byte[0] +.sym 31562 spi_if_ins.spi.r_rx_byte[4] +.sym 31566 spi_if_ins.spi.r_rx_byte[5] +.sym 31574 spi_if_ins.spi.r_rx_byte[1] +.sym 31578 spi_if_ins.spi.r_rx_byte[2] +.sym 31582 spi_if_ins.spi.r_rx_byte[7] +.sym 31586 spi_if_ins.o_load_cmd_SB_DFFESR_Q_D_SB_LUT4_I1_O[0] +.sym 31590 spi_if_ins.w_rx_data[3] +.sym 31594 spi_if_ins.w_rx_data[1] +.sym 31598 spi_if_ins.w_rx_data[6] +.sym 31602 spi_if_ins.w_rx_data[4] +.sym 31606 spi_if_ins.w_rx_data[2] +.sym 31610 spi_if_ins.w_rx_data[0] +.sym 31614 spi_if_ins.w_rx_data[5] +.sym 31620 io_ctrl_ins.o_data_out_SB_DFFESR_Q_6_R[0] +.sym 31621 io_ctrl_ins.o_data_out_SB_DFFESR_Q_6_R[1] +.sym 31622 w_rx_data[6] +.sym 31626 w_rx_data[5] +.sym 31630 io_ctrl_ins.o_pmod[4] +.sym 31631 io_ctrl_ins.pmod_state_SB_DFFE_Q_E_SB_LUT4_O_I3[0] +.sym 31632 io_ctrl_ins.led1_state_SB_LUT4_I0_I2[1] +.sym 31633 i_config[1]$SB_IO_IN +.sym 31634 w_rx_data[0] +.sym 31638 w_rx_data[4] +.sym 31642 w_rx_data[7] +.sym 31646 w_rx_data[3] +.sym 31650 w_rx_data[5] +.sym 31654 w_rx_data[3] +.sym 31658 io_ctrl_ins.o_pmod[0] +.sym 31659 io_ctrl_ins.pmod_state_SB_DFFE_Q_E_SB_LUT4_O_I3[0] +.sym 31660 io_ctrl_ins.led1_state_SB_LUT4_I0_I2[1] +.sym 31661 o_led0$SB_IO_OUT +.sym 31662 w_rx_data[7] +.sym 31666 io_ctrl_ins.o_pmod[7] +.sym 31667 io_ctrl_ins.pmod_state_SB_DFFE_Q_E_SB_LUT4_O_I3[0] +.sym 31668 io_ctrl_ins.led1_state_SB_LUT4_I0_I2[1] +.sym 31669 i_button$SB_IO_IN +.sym 31670 w_rx_data[0] +.sym 31676 io_ctrl_ins.tr_vc_2_state_SB_LUT4_I1_I3[1] +.sym 31677 w_ioc[0] +.sym 31678 io_ctrl_ins.o_pmod[5] +.sym 31679 io_ctrl_ins.pmod_state_SB_DFFE_Q_E_SB_LUT4_O_I3[0] +.sym 31680 io_ctrl_ins.led1_state_SB_LUT4_I0_I2[1] +.sym 31681 i_config[2]$SB_IO_IN +.sym 31682 io_ctrl_ins.o_pmod[3] +.sym 31683 o_tr_vc2$SB_IO_OUT +.sym 31684 w_ioc[0] +.sym 31685 io_ctrl_ins.tr_vc_2_state_SB_LUT4_I1_I3[1] +.sym 31686 o_led1$SB_IO_OUT +.sym 31687 io_ctrl_ins.led1_state_SB_LUT4_I0_I2[1] +.sym 31688 io_ctrl_ins.led1_state_SB_LUT4_I0_I2[2] +.sym 31689 io_ctrl_ins.led1_state_SB_LUT4_I0_I2[3] +.sym 31694 io_ctrl_ins.o_data_out_SB_DFFESR_Q_6_R[0] .sym 31695 io_ctrl_ins.debug_mode_SB_LUT4_I2_O[1] -.sym 31696 io_ctrl_ins.rf_pin_state[5] -.sym 31697 io_ctrl_ins.debug_mode_SB_LUT4_I2_O[2] -.sym 31698 io_ctrl_ins.debug_mode_SB_LUT4_I2_O[2] -.sym 31699 io_ctrl_ins.debug_mode_SB_LUT4_I2_O[1] -.sym 31700 io_ctrl_ins.rf_mode[0] -.sym 31701 io_ctrl_ins.rf_mode[2] -.sym 31703 io_ctrl_ins.debug_mode_SB_LUT4_I2_O[2] -.sym 31704 io_ctrl_ins.rf_pin_state[6] -.sym 31705 io_ctrl_ins.rx_h_state_SB_DFFE_Q_D_SB_LUT4_O_I3[2] -.sym 31706 io_ctrl_ins.rf_pin_state[3] -.sym 31707 io_ctrl_ins.debug_mode_SB_LUT4_I2_O[1] -.sym 31708 io_ctrl_ins.rf_mode[2] -.sym 31709 io_ctrl_ins.debug_mode_SB_LUT4_I2_O[2] -.sym 31715 io_ctrl_ins.debug_mode_SB_LUT4_I2_O[0] -.sym 31716 io_ctrl_ins.debug_mode_SB_LUT4_I2_O[1] -.sym 31717 io_ctrl_ins.debug_mode_SB_LUT4_I2_O[2] -.sym 31738 io_ctrl_ins.debug_mode_SB_LUT4_I2_O[1] -.sym 31739 io_ctrl_ins.rf_mode[2] -.sym 31740 io_ctrl_ins.rf_pin_state[2] -.sym 31741 io_ctrl_ins.debug_mode_SB_LUT4_I2_O[2] -.sym 32022 spi_if_ins.state_if_SB_DFFESR_Q_1_D[2] -.sym 32085 io_ctrl_ins.led0_state_SB_LUT4_I3_I0[1] -.sym 32092 io_ctrl_ins.rx_h_b_state_SB_LUT4_I1_O[0] -.sym 32093 io_ctrl_ins.rx_h_b_state_SB_LUT4_I1_O[1] -.sym 32116 i_button_SB_LUT4_I3_O[0] -.sym 32117 i_button_SB_LUT4_I3_O[1] -.sym 32128 io_ctrl_ins.tr_vc_1_state_SB_LUT4_I0_O[0] -.sym 32129 io_ctrl_ins.tr_vc_1_state_SB_LUT4_I0_O[1] -.sym 32480 lvds_rx_09_inst.r_state_if_SB_LUT4_I2_O[0] -.sym 32481 io_pmod[5]$SB_IO_IN -.sym 32504 lvds_rx_09_inst.r_state_if_SB_LUT4_I2_O[0] -.sym 32505 io_pmod[4]$SB_IO_IN +.sym 31696 io_ctrl_ins.led1_state_SB_LUT4_I0_I2[1] +.sym 31697 i_config[0]$SB_IO_IN +.sym 31702 o_rx_h_tx_l_b$SB_IO_OUT +.sym 31703 io_ctrl_ins.tr_vc_2_state_SB_LUT4_I1_I3_SB_LUT4_I2_O[0] +.sym 31704 io_ctrl_ins.led1_state_SB_LUT4_I0_I2[1] +.sym 31705 i_config[3]$SB_IO_IN +.sym 31706 io_ctrl_ins.pmod_dir_state[3] +.sym 31707 io_ctrl_ins.ldo2v8_state_SB_LUT4_I3_O[1] +.sym 31708 io_ctrl_ins.tr_vc_2_state_SB_LUT4_I1_O[2] +.sym 31709 io_ctrl_ins.tr_vc_2_state_SB_LUT4_I1_O[3] +.sym 31710 io_ctrl_ins.ldo2v8_state_SB_LUT4_I3_O[0] +.sym 31711 io_ctrl_ins.ldo2v8_state_SB_LUT4_I3_O[1] +.sym 31712 io_ctrl_ins.ldo2v8_state_SB_LUT4_I3_O[2] +.sym 31713 io_ctrl_ins.ldo2v8_state_SB_LUT4_I3_O[3] +.sym 31734 io_ctrl_ins.rf_pin_state[3] +.sym 31735 io_ctrl_ins.debug_mode_SB_LUT4_I2_O[1] +.sym 31736 io_ctrl_ins.rf_mode[2] +.sym 31737 io_ctrl_ins.debug_mode_SB_LUT4_I2_O[3] +.sym 31778 rx_09_fifo.rd_addr_gray[2] +.sym 31782 rx_09_fifo.rd_addr_gray[3] +.sym 31790 rx_09_fifo.rd_addr_gray[4] +.sym 31816 rx_09_fifo.rd_addr_gray_SB_LUT4_I2_O[2] +.sym 31817 rx_09_fifo.rd_addr_gray_SB_LUT4_I2_O[3] +.sym 31824 io_pmod_SB_DFFSS_Q_D_SB_LUT4_O_I0_SB_LUT4_O_1_I1_SB_LUT4_O_I2[1] +.sym 31825 io_pmod_SB_DFFSS_Q_D_SB_LUT4_O_I0_SB_LUT4_O_1_I1_SB_LUT4_O_I0[3] +.sym 31840 rx_09_fifo.rd_addr_gray_SB_LUT4_I2_O[3] +.sym 31841 io_pmod_SB_DFFSS_Q_D_SB_LUT4_O_I0_SB_LUT4_O_1_I1_SB_LUT4_O_I2[1] +.sym 31879 spi_if_ins.r_tx_byte[7] +.sym 31880 spi_if_ins.r_tx_data_valid_SB_LUT4_I3_O[1] +.sym 31881 spi_if_ins.r_tx_data_valid_SB_LUT4_I3_O[2] +.sym 31953 i_ss$SB_IO_IN +.sym 31960 lvds_rx_09_inst.r_state_if_SB_LUT4_I2_O[0] +.sym 31961 io_pmod[5]$SB_IO_IN +.sym 31968 lvds_rx_09_inst.r_state_if_SB_LUT4_I2_O[0] +.sym 31969 w_rx_09_fifo_data[1] +.sym 31986 spi_if_ins.spi.r_rx_done_SB_DFFER_Q_D[1] +.sym 32004 lvds_rx_09_inst.r_state_if_SB_LUT4_I2_O[0] +.sym 32005 io_pmod[4]$SB_IO_IN +.sym 32098 io_ctrl_ins.led0_state_SB_LUT4_I3_O[0] +.sym 32099 io_ctrl_ins.ldo2v8_state_SB_LUT4_I3_O[1] +.sym 32100 io_ctrl_ins.led0_state_SB_LUT4_I3_O[2] +.sym 32101 io_ctrl_ins.led0_state_SB_LUT4_I3_O[3] +.sym 32106 io_ctrl_ins.pmod_dir_state[4] +.sym 32107 io_ctrl_ins.ldo2v8_state_SB_LUT4_I3_O[1] +.sym 32108 io_ctrl_ins.tr_vc_1_b_state_SB_LUT4_I1_O[2] +.sym 32109 io_ctrl_ins.tr_vc_1_b_state_SB_LUT4_I1_O[3] +.sym 32138 o_tr_vc1$SB_IO_OUT +.sym 32139 io_ctrl_ins.tr_vc_2_state_SB_LUT4_I1_I3_SB_LUT4_I2_O[0] +.sym 32140 io_ctrl_ins.ldo2v8_state_SB_LUT4_I3_O[1] +.sym 32141 io_ctrl_ins.pmod_dir_state[5] +.sym 32144 io_ctrl_ins.tr_vc_1_state_SB_LUT4_I0_O[0] +.sym 32145 io_ctrl_ins.tr_vc_1_state_SB_LUT4_I0_O[1] +.sym 32148 io_ctrl_ins.rx_h_b_state_SB_LUT4_I0_O[0] +.sym 32149 io_ctrl_ins.rx_h_b_state_SB_LUT4_I0_O[1] +.sym 32150 o_rx_h_tx_l$SB_IO_OUT +.sym 32151 io_ctrl_ins.tr_vc_2_state_SB_LUT4_I1_I3_SB_LUT4_I2_O[0] +.sym 32152 io_ctrl_ins.ldo2v8_state_SB_LUT4_I3_O[1] +.sym 32153 io_ctrl_ins.pmod_dir_state[7] +.sym 32160 i_button_SB_LUT4_I3_O[0] +.sym 32161 i_button_SB_LUT4_I3_O[1] +.sym 32162 io_ctrl_ins.tr_vc_2_state_SB_LUT4_I1_I3_SB_LUT4_I2_O[0] +.sym 32163 o_tr_vc1_b$SB_IO_OUT +.sym 32164 io_ctrl_ins.o_data_out_SB_DFFESR_Q_6_R[0] +.sym 32165 io_ctrl_ins.rf_mode[2] +.sym 32166 io_ctrl_ins.debug_mode_SB_LUT4_I2_O[0] +.sym 32167 io_ctrl_ins.debug_mode_SB_LUT4_I2_O[1] +.sym 32168 io_ctrl_ins.debug_mode_SB_LUT4_I2_O[2] +.sym 32169 io_ctrl_ins.debug_mode_SB_LUT4_I2_O[3] +.sym 32170 io_ctrl_ins.tr_vc_2_state_SB_LUT4_I1_I3_SB_LUT4_I2_O[0] +.sym 32171 io_ctrl_ins.mixer_en_state +.sym 32172 io_ctrl_ins.o_data_out_SB_DFFESR_Q_6_R[0] +.sym 32173 io_ctrl_ins.debug_mode[0] +.sym 32174 io_ctrl_ins.debug_mode_SB_LUT4_I2_O[3] +.sym 32175 io_ctrl_ins.debug_mode_SB_LUT4_I2_O[1] +.sym 32176 io_ctrl_ins.rf_mode[0] +.sym 32177 io_ctrl_ins.rf_mode[2] +.sym 32178 io_ctrl_ins.debug_mode_SB_LUT4_I2_O[0] +.sym 32179 io_ctrl_ins.debug_mode_SB_LUT4_I2_O[1] +.sym 32180 io_ctrl_ins.rf_pin_state[4] +.sym 32181 io_ctrl_ins.debug_mode_SB_LUT4_I2_O[3] +.sym 32183 io_ctrl_ins.debug_mode_SB_LUT4_I2_O[3] +.sym 32184 io_ctrl_ins.rf_pin_state[6] +.sym 32185 io_ctrl_ins.rx_h_state_SB_DFFE_Q_D_SB_LUT4_O_I3[2] +.sym 32187 io_ctrl_ins.rf_pin_state[7] +.sym 32188 io_ctrl_ins.debug_mode_SB_LUT4_I2_O[3] +.sym 32189 io_ctrl_ins.rx_h_state_SB_DFFE_Q_D_SB_LUT4_O_I3[2] +.sym 32190 io_ctrl_ins.rf_pin_state[0] +.sym 32191 io_ctrl_ins.debug_mode_SB_LUT4_I2_O[1] +.sym 32192 io_ctrl_ins.rf_mode[2] +.sym 32193 io_ctrl_ins.debug_mode_SB_LUT4_I2_O[3] +.sym 32208 io_ctrl_ins.rf_mode[0] +.sym 32209 io_ctrl_ins.rf_mode[2] +.sym 32492 spi_if_ins.spi.r3_rx_done +.sym 32493 spi_if_ins.spi.r2_rx_done +.sym 32494 spi_if_ins.spi.r2_rx_done +.sym 32498 spi_if_ins.spi.r_rx_done .sym 32549 r_counter[0] -.sym 32729 o_rx_h_tx_l_b$SB_IO_OUT +.sym 32638 w_rx_data[5] diff --git a/firmware/top.bin b/firmware/top.bin index 378b973..91e329d 100644 Binary files a/firmware/top.bin and b/firmware/top.bin differ diff --git a/firmware/top.json b/firmware/top.json index 2ef9679..6fd902d 100644 --- a/firmware/top.json +++ b/firmware/top.json @@ -64,7 +64,7 @@ } }, "cells": { - "$specify$279": { + "$specify$281": { "hide_name": 1, "type": "$specify2", "parameters": { @@ -95,7 +95,7 @@ "SRC": [ 6 ] } }, - "$specify$280": { + "$specify$282": { "hide_name": 1, "type": "$specify2", "parameters": { @@ -126,7 +126,7 @@ "SRC": [ 2 ] } }, - "$specify$281": { + "$specify$283": { "hide_name": 1, "type": "$specify2", "parameters": { @@ -157,7 +157,7 @@ "SRC": [ 2 ] } }, - "$specify$282": { + "$specify$284": { "hide_name": 1, "type": "$specify2", "parameters": { @@ -188,7 +188,7 @@ "SRC": [ 3 ] } }, - "$specify$283": { + "$specify$285": { "hide_name": 1, "type": "$specify2", "parameters": { @@ -219,7 +219,7 @@ "SRC": [ 3 ] } }, - "$specify$284": { + "$specify$286": { "hide_name": 1, "type": "$specify2", "parameters": { @@ -250,7 +250,7 @@ "SRC": [ 3 ] } }, - "$specify$285": { + "$specify$287": { "hide_name": 1, "type": "$specify2", "parameters": { @@ -281,7 +281,7 @@ "SRC": [ 4 ] } }, - "$specify$286": { + "$specify$288": { "hide_name": 1, "type": "$specify2", "parameters": { @@ -312,7 +312,7 @@ "SRC": [ 4 ] } }, - "$specify$287": { + "$specify$289": { "hide_name": 1, "type": "$specify2", "parameters": { @@ -343,7 +343,7 @@ "SRC": [ 4 ] } }, - "$specify$288": { + "$specify$290": { "hide_name": 1, "type": "$specify2", "parameters": { @@ -374,7 +374,7 @@ "SRC": [ 5 ] } }, - "$specify$289": { + "$specify$291": { "hide_name": 1, "type": "$specify2", "parameters": { @@ -405,7 +405,7 @@ "SRC": [ 5 ] } }, - "$specify$290": { + "$specify$292": { "hide_name": 1, "type": "$specify3", "parameters": { @@ -442,7 +442,7 @@ "SRC": [ 7 ] } }, - "$specify$291": { + "$specify$293": { "hide_name": 1, "type": "$specify2", "parameters": { @@ -473,7 +473,7 @@ "SRC": [ 9 ] } }, - "$specify$292": { + "$specify$294": { "hide_name": 1, "type": "$specrule", "parameters": { @@ -508,7 +508,7 @@ "SRC_EN": [ "1" ] } }, - "$specify$293": { + "$specify$295": { "hide_name": 1, "type": "$specrule", "parameters": { @@ -543,7 +543,7 @@ "SRC_EN": [ "1" ] } }, - "$specify$294": { + "$specify$296": { "hide_name": 1, "type": "$specrule", "parameters": { @@ -578,7 +578,7 @@ "SRC_EN": [ "1" ] } }, - "$specify$295": { + "$specify$297": { "hide_name": 1, "type": "$specrule", "parameters": { @@ -613,7 +613,7 @@ "SRC_EN": [ "1" ] } }, - "$specify$296": { + "$specify$298": { "hide_name": 1, "type": "$specrule", "parameters": { @@ -648,7 +648,7 @@ "SRC_EN": [ "1" ] } }, - "$specify$297": { + "$specify$299": { "hide_name": 1, "type": "$specrule", "parameters": { @@ -683,7 +683,7 @@ "SRC_EN": [ "1" ] } }, - "$specify$298": { + "$specify$300": { "hide_name": 1, "type": "$specrule", "parameters": { @@ -718,7 +718,7 @@ "SRC_EN": [ "1" ] } }, - "$specify$299": { + "$specify$301": { "hide_name": 1, "type": "$specrule", "parameters": { @@ -753,7 +753,7 @@ "SRC_EN": [ "1" ] } }, - "$specify$300": { + "$specify$302": { "hide_name": 1, "type": "$specrule", "parameters": { @@ -788,7 +788,7 @@ "SRC_EN": [ "1" ] } }, - "$specify$301": { + "$specify$303": { "hide_name": 1, "type": "$specrule", "parameters": { @@ -823,7 +823,7 @@ "SRC_EN": [ "1" ] } }, - "$specify$302": { + "$specify$304": { "hide_name": 1, "type": "$specrule", "parameters": { @@ -858,7 +858,7 @@ "SRC_EN": [ "1" ] } }, - "$specify$303": { + "$specify$305": { "hide_name": 1, "type": "$specrule", "parameters": { @@ -893,7 +893,7 @@ "SRC_EN": [ "1" ] } }, - "$specify$304": { + "$specify$306": { "hide_name": 1, "type": "$specrule", "parameters": { @@ -928,7 +928,7 @@ "SRC_EN": [ "1" ] } }, - "$specify$305": { + "$specify$307": { "hide_name": 1, "type": "$specrule", "parameters": { @@ -963,7 +963,7 @@ "SRC_EN": [ "1" ] } }, - "$specify$306": { + "$specify$308": { "hide_name": 1, "type": "$specrule", "parameters": { @@ -998,7 +998,7 @@ "SRC_EN": [ "1" ] } }, - "$specify$307": { + "$specify$309": { "hide_name": 1, "type": "$specrule", "parameters": { @@ -1033,7 +1033,7 @@ "SRC_EN": [ "1" ] } }, - "$specify$308": { + "$specify$310": { "hide_name": 1, "type": "$specrule", "parameters": { @@ -1068,7 +1068,7 @@ "SRC_EN": [ "1" ] } }, - "$specify$309": { + "$specify$311": { "hide_name": 1, "type": "$specrule", "parameters": { @@ -1103,7 +1103,7 @@ "SRC_EN": [ "1" ] } }, - "$specify$310": { + "$specify$312": { "hide_name": 1, "type": "$specrule", "parameters": { @@ -1138,7 +1138,7 @@ "SRC_EN": [ "1" ] } }, - "$specify$311": { + "$specify$313": { "hide_name": 1, "type": "$specrule", "parameters": { @@ -1173,7 +1173,7 @@ "SRC_EN": [ "1" ] } }, - "$specify$312": { + "$specify$314": { "hide_name": 1, "type": "$specrule", "parameters": { @@ -1208,7 +1208,7 @@ "SRC_EN": [ "1" ] } }, - "$specify$313": { + "$specify$315": { "hide_name": 1, "type": "$specrule", "parameters": { @@ -6388,7 +6388,7 @@ } }, "cells": { - "$logic_and$/usr/local/bin/../share/yosys/ice40/cells_sim.v:1593$398": { + "$logic_and$/usr/local/bin/../share/yosys/ice40/cells_sim.v:1593$400": { "hide_name": 1, "type": "$logic_and", "parameters": { @@ -6412,7 +6412,7 @@ "Y": [ 78 ] } }, - "$logic_and$/usr/local/bin/../share/yosys/ice40/cells_sim.v:1595$399": { + "$logic_and$/usr/local/bin/../share/yosys/ice40/cells_sim.v:1595$401": { "hide_name": 1, "type": "$logic_and", "parameters": { @@ -6436,7 +6436,7 @@ "Y": [ 79 ] } }, - "$logic_and$/usr/local/bin/../share/yosys/ice40/cells_sim.v:1601$400": { + "$logic_and$/usr/local/bin/../share/yosys/ice40/cells_sim.v:1601$402": { "hide_name": 1, "type": "$logic_and", "parameters": { @@ -6460,7 +6460,7 @@ "Y": [ 80 ] } }, - "$logic_and$/usr/local/bin/../share/yosys/ice40/cells_sim.v:1605$401": { + "$logic_and$/usr/local/bin/../share/yosys/ice40/cells_sim.v:1605$403": { "hide_name": 1, "type": "$logic_and", "parameters": { @@ -6484,7 +6484,7 @@ "Y": [ 81 ] } }, - "$specify$243": { + "$specify$245": { "hide_name": 1, "type": "$specrule", "parameters": { @@ -6519,7 +6519,7 @@ "SRC_EN": [ "1" ] } }, - "$specify$244": { + "$specify$246": { "hide_name": 1, "type": "$specrule", "parameters": { @@ -6554,7 +6554,7 @@ "SRC_EN": [ "1" ] } }, - "$specify$245": { + "$specify$247": { "hide_name": 1, "type": "$specrule", "parameters": { @@ -6589,7 +6589,7 @@ "SRC_EN": [ "1" ] } }, - "$specify$246": { + "$specify$248": { "hide_name": 1, "type": "$specrule", "parameters": { @@ -6624,7 +6624,7 @@ "SRC_EN": [ "1" ] } }, - "$specify$247": { + "$specify$249": { "hide_name": 1, "type": "$specrule", "parameters": { @@ -6659,7 +6659,7 @@ "SRC_EN": [ "1" ] } }, - "$specify$248": { + "$specify$250": { "hide_name": 1, "type": "$specrule", "parameters": { @@ -6694,7 +6694,7 @@ "SRC_EN": [ "1" ] } }, - "$specify$249": { + "$specify$251": { "hide_name": 1, "type": "$specrule", "parameters": { @@ -6729,7 +6729,7 @@ "SRC_EN": [ "1" ] } }, - "$specify$250": { + "$specify$252": { "hide_name": 1, "type": "$specrule", "parameters": { @@ -6764,7 +6764,7 @@ "SRC_EN": [ "1" ] } }, - "$specify$251": { + "$specify$253": { "hide_name": 1, "type": "$specify3", "parameters": { @@ -6803,28 +6803,28 @@ } }, "netnames": { - "$logic_and$/usr/local/bin/../share/yosys/ice40/cells_sim.v:1593$398_Y": { + "$logic_and$/usr/local/bin/../share/yosys/ice40/cells_sim.v:1593$400_Y": { "hide_name": 1, "bits": [ 78 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ice40/cells_sim.v:1593.33-1593.44" } }, - "$logic_and$/usr/local/bin/../share/yosys/ice40/cells_sim.v:1595$399_Y": { + "$logic_and$/usr/local/bin/../share/yosys/ice40/cells_sim.v:1595$401_Y": { "hide_name": 1, "bits": [ 79 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ice40/cells_sim.v:1595.34-1595.45" } }, - "$logic_and$/usr/local/bin/../share/yosys/ice40/cells_sim.v:1601$400_Y": { + "$logic_and$/usr/local/bin/../share/yosys/ice40/cells_sim.v:1601$402_Y": { "hide_name": 1, "bits": [ 80 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ice40/cells_sim.v:1601.34-1601.45" } }, - "$logic_and$/usr/local/bin/../share/yosys/ice40/cells_sim.v:1605$401_Y": { + "$logic_and$/usr/local/bin/../share/yosys/ice40/cells_sim.v:1605$403_Y": { "hide_name": 1, "bits": [ 81 ], "attributes": { @@ -6989,7 +6989,7 @@ } }, "cells": { - "$logic_and$/usr/local/bin/../share/yosys/ice40/cells_sim.v:1729$402": { + "$logic_and$/usr/local/bin/../share/yosys/ice40/cells_sim.v:1729$404": { "hide_name": 1, "type": "$logic_and", "parameters": { @@ -7013,7 +7013,7 @@ "Y": [ 78 ] } }, - "$logic_and$/usr/local/bin/../share/yosys/ice40/cells_sim.v:1731$403": { + "$logic_and$/usr/local/bin/../share/yosys/ice40/cells_sim.v:1731$405": { "hide_name": 1, "type": "$logic_and", "parameters": { @@ -7037,7 +7037,7 @@ "Y": [ 79 ] } }, - "$logic_and$/usr/local/bin/../share/yosys/ice40/cells_sim.v:1737$404": { + "$logic_and$/usr/local/bin/../share/yosys/ice40/cells_sim.v:1737$406": { "hide_name": 1, "type": "$logic_and", "parameters": { @@ -7061,7 +7061,7 @@ "Y": [ 80 ] } }, - "$logic_and$/usr/local/bin/../share/yosys/ice40/cells_sim.v:1741$405": { + "$logic_and$/usr/local/bin/../share/yosys/ice40/cells_sim.v:1741$407": { "hide_name": 1, "type": "$logic_and", "parameters": { @@ -7085,7 +7085,7 @@ "Y": [ 81 ] } }, - "$specify$252": { + "$specify$254": { "hide_name": 1, "type": "$specrule", "parameters": { @@ -7120,7 +7120,7 @@ "SRC_EN": [ "1" ] } }, - "$specify$253": { + "$specify$255": { "hide_name": 1, "type": "$specrule", "parameters": { @@ -7155,7 +7155,7 @@ "SRC_EN": [ "1" ] } }, - "$specify$254": { + "$specify$256": { "hide_name": 1, "type": "$specrule", "parameters": { @@ -7190,7 +7190,7 @@ "SRC_EN": [ "1" ] } }, - "$specify$255": { + "$specify$257": { "hide_name": 1, "type": "$specrule", "parameters": { @@ -7225,7 +7225,7 @@ "SRC_EN": [ "1" ] } }, - "$specify$256": { + "$specify$258": { "hide_name": 1, "type": "$specrule", "parameters": { @@ -7260,7 +7260,7 @@ "SRC_EN": [ "1" ] } }, - "$specify$257": { + "$specify$259": { "hide_name": 1, "type": "$specrule", "parameters": { @@ -7295,7 +7295,7 @@ "SRC_EN": [ "1" ] } }, - "$specify$258": { + "$specify$260": { "hide_name": 1, "type": "$specrule", "parameters": { @@ -7330,7 +7330,7 @@ "SRC_EN": [ "1" ] } }, - "$specify$259": { + "$specify$261": { "hide_name": 1, "type": "$specrule", "parameters": { @@ -7365,7 +7365,7 @@ "SRC_EN": [ "1" ] } }, - "$specify$260": { + "$specify$262": { "hide_name": 1, "type": "$specify3", "parameters": { @@ -7404,28 +7404,28 @@ } }, "netnames": { - "$logic_and$/usr/local/bin/../share/yosys/ice40/cells_sim.v:1729$402_Y": { + "$logic_and$/usr/local/bin/../share/yosys/ice40/cells_sim.v:1729$404_Y": { "hide_name": 1, "bits": [ 78 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ice40/cells_sim.v:1729.33-1729.44" } }, - "$logic_and$/usr/local/bin/../share/yosys/ice40/cells_sim.v:1731$403_Y": { + "$logic_and$/usr/local/bin/../share/yosys/ice40/cells_sim.v:1731$405_Y": { "hide_name": 1, "bits": [ 79 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ice40/cells_sim.v:1731.35-1731.46" } }, - "$logic_and$/usr/local/bin/../share/yosys/ice40/cells_sim.v:1737$404_Y": { + "$logic_and$/usr/local/bin/../share/yosys/ice40/cells_sim.v:1737$406_Y": { "hide_name": 1, "bits": [ 80 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ice40/cells_sim.v:1737.34-1737.45" } }, - "$logic_and$/usr/local/bin/../share/yosys/ice40/cells_sim.v:1741$405_Y": { + "$logic_and$/usr/local/bin/../share/yosys/ice40/cells_sim.v:1741$407_Y": { "hide_name": 1, "bits": [ 81 ], "attributes": { @@ -7590,7 +7590,7 @@ } }, "cells": { - "$logic_and$/usr/local/bin/../share/yosys/ice40/cells_sim.v:2001$410": { + "$logic_and$/usr/local/bin/../share/yosys/ice40/cells_sim.v:2001$412": { "hide_name": 1, "type": "$logic_and", "parameters": { @@ -7614,7 +7614,7 @@ "Y": [ 78 ] } }, - "$logic_and$/usr/local/bin/../share/yosys/ice40/cells_sim.v:2003$411": { + "$logic_and$/usr/local/bin/../share/yosys/ice40/cells_sim.v:2003$413": { "hide_name": 1, "type": "$logic_and", "parameters": { @@ -7638,7 +7638,7 @@ "Y": [ 79 ] } }, - "$logic_and$/usr/local/bin/../share/yosys/ice40/cells_sim.v:2009$412": { + "$logic_and$/usr/local/bin/../share/yosys/ice40/cells_sim.v:2009$414": { "hide_name": 1, "type": "$logic_and", "parameters": { @@ -7662,7 +7662,7 @@ "Y": [ 80 ] } }, - "$logic_and$/usr/local/bin/../share/yosys/ice40/cells_sim.v:2013$413": { + "$logic_and$/usr/local/bin/../share/yosys/ice40/cells_sim.v:2013$415": { "hide_name": 1, "type": "$logic_and", "parameters": { @@ -7686,7 +7686,7 @@ "Y": [ 81 ] } }, - "$specify$270": { + "$specify$272": { "hide_name": 1, "type": "$specrule", "parameters": { @@ -7721,7 +7721,7 @@ "SRC_EN": [ "1" ] } }, - "$specify$271": { + "$specify$273": { "hide_name": 1, "type": "$specrule", "parameters": { @@ -7756,7 +7756,7 @@ "SRC_EN": [ "1" ] } }, - "$specify$272": { + "$specify$274": { "hide_name": 1, "type": "$specrule", "parameters": { @@ -7791,7 +7791,7 @@ "SRC_EN": [ "1" ] } }, - "$specify$273": { + "$specify$275": { "hide_name": 1, "type": "$specrule", "parameters": { @@ -7826,7 +7826,7 @@ "SRC_EN": [ "1" ] } }, - "$specify$274": { + "$specify$276": { "hide_name": 1, "type": "$specrule", "parameters": { @@ -7861,7 +7861,7 @@ "SRC_EN": [ "1" ] } }, - "$specify$275": { + "$specify$277": { "hide_name": 1, "type": "$specrule", "parameters": { @@ -7896,7 +7896,7 @@ "SRC_EN": [ "1" ] } }, - "$specify$276": { + "$specify$278": { "hide_name": 1, "type": "$specrule", "parameters": { @@ -7931,7 +7931,7 @@ "SRC_EN": [ "1" ] } }, - "$specify$277": { + "$specify$279": { "hide_name": 1, "type": "$specrule", "parameters": { @@ -7966,7 +7966,7 @@ "SRC_EN": [ "1" ] } }, - "$specify$278": { + "$specify$280": { "hide_name": 1, "type": "$specify3", "parameters": { @@ -8005,28 +8005,28 @@ } }, "netnames": { - "$logic_and$/usr/local/bin/../share/yosys/ice40/cells_sim.v:2001$410_Y": { + "$logic_and$/usr/local/bin/../share/yosys/ice40/cells_sim.v:2001$412_Y": { "hide_name": 1, "bits": [ 78 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ice40/cells_sim.v:2001.34-2001.45" } }, - "$logic_and$/usr/local/bin/../share/yosys/ice40/cells_sim.v:2003$411_Y": { + "$logic_and$/usr/local/bin/../share/yosys/ice40/cells_sim.v:2003$413_Y": { "hide_name": 1, "bits": [ 79 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ice40/cells_sim.v:2003.35-2003.46" } }, - "$logic_and$/usr/local/bin/../share/yosys/ice40/cells_sim.v:2009$412_Y": { + "$logic_and$/usr/local/bin/../share/yosys/ice40/cells_sim.v:2009$414_Y": { "hide_name": 1, "bits": [ 80 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ice40/cells_sim.v:2009.35-2009.46" } }, - "$logic_and$/usr/local/bin/../share/yosys/ice40/cells_sim.v:2013$413_Y": { + "$logic_and$/usr/local/bin/../share/yosys/ice40/cells_sim.v:2013$415_Y": { "hide_name": 1, "bits": [ 81 ], "attributes": { @@ -8191,7 +8191,7 @@ } }, "cells": { - "$logic_and$/usr/local/bin/../share/yosys/ice40/cells_sim.v:1865$406": { + "$logic_and$/usr/local/bin/../share/yosys/ice40/cells_sim.v:1865$408": { "hide_name": 1, "type": "$logic_and", "parameters": { @@ -8215,7 +8215,7 @@ "Y": [ 78 ] } }, - "$logic_and$/usr/local/bin/../share/yosys/ice40/cells_sim.v:1867$407": { + "$logic_and$/usr/local/bin/../share/yosys/ice40/cells_sim.v:1867$409": { "hide_name": 1, "type": "$logic_and", "parameters": { @@ -8239,7 +8239,7 @@ "Y": [ 79 ] } }, - "$logic_and$/usr/local/bin/../share/yosys/ice40/cells_sim.v:1873$408": { + "$logic_and$/usr/local/bin/../share/yosys/ice40/cells_sim.v:1873$410": { "hide_name": 1, "type": "$logic_and", "parameters": { @@ -8263,7 +8263,7 @@ "Y": [ 80 ] } }, - "$logic_and$/usr/local/bin/../share/yosys/ice40/cells_sim.v:1877$409": { + "$logic_and$/usr/local/bin/../share/yosys/ice40/cells_sim.v:1877$411": { "hide_name": 1, "type": "$logic_and", "parameters": { @@ -8287,7 +8287,7 @@ "Y": [ 81 ] } }, - "$specify$261": { + "$specify$263": { "hide_name": 1, "type": "$specrule", "parameters": { @@ -8322,7 +8322,7 @@ "SRC_EN": [ "1" ] } }, - "$specify$262": { + "$specify$264": { "hide_name": 1, "type": "$specrule", "parameters": { @@ -8357,7 +8357,7 @@ "SRC_EN": [ "1" ] } }, - "$specify$263": { + "$specify$265": { "hide_name": 1, "type": "$specrule", "parameters": { @@ -8392,7 +8392,7 @@ "SRC_EN": [ "1" ] } }, - "$specify$264": { + "$specify$266": { "hide_name": 1, "type": "$specrule", "parameters": { @@ -8427,7 +8427,7 @@ "SRC_EN": [ "1" ] } }, - "$specify$265": { + "$specify$267": { "hide_name": 1, "type": "$specrule", "parameters": { @@ -8462,7 +8462,7 @@ "SRC_EN": [ "1" ] } }, - "$specify$266": { + "$specify$268": { "hide_name": 1, "type": "$specrule", "parameters": { @@ -8497,7 +8497,7 @@ "SRC_EN": [ "1" ] } }, - "$specify$267": { + "$specify$269": { "hide_name": 1, "type": "$specrule", "parameters": { @@ -8532,7 +8532,7 @@ "SRC_EN": [ "1" ] } }, - "$specify$268": { + "$specify$270": { "hide_name": 1, "type": "$specrule", "parameters": { @@ -8567,7 +8567,7 @@ "SRC_EN": [ "1" ] } }, - "$specify$269": { + "$specify$271": { "hide_name": 1, "type": "$specify3", "parameters": { @@ -8606,28 +8606,28 @@ } }, "netnames": { - "$logic_and$/usr/local/bin/../share/yosys/ice40/cells_sim.v:1865$406_Y": { + "$logic_and$/usr/local/bin/../share/yosys/ice40/cells_sim.v:1865$408_Y": { "hide_name": 1, "bits": [ 78 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ice40/cells_sim.v:1865.34-1865.45" } }, - "$logic_and$/usr/local/bin/../share/yosys/ice40/cells_sim.v:1867$407_Y": { + "$logic_and$/usr/local/bin/../share/yosys/ice40/cells_sim.v:1867$409_Y": { "hide_name": 1, "bits": [ 79 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ice40/cells_sim.v:1867.34-1867.45" } }, - "$logic_and$/usr/local/bin/../share/yosys/ice40/cells_sim.v:1873$408_Y": { + "$logic_and$/usr/local/bin/../share/yosys/ice40/cells_sim.v:1873$410_Y": { "hide_name": 1, "bits": [ 80 ], "attributes": { "src": "/usr/local/bin/../share/yosys/ice40/cells_sim.v:1873.35-1873.46" } }, - "$logic_and$/usr/local/bin/../share/yosys/ice40/cells_sim.v:1877$409_Y": { + "$logic_and$/usr/local/bin/../share/yosys/ice40/cells_sim.v:1877$411_Y": { "hide_name": 1, "bits": [ 81 ], "attributes": { @@ -9649,17 +9649,13 @@ "top": { "attributes": { "top": "00000000000000000000000000000001", - "src": "top.v:8.1-348.10" + "src": "top.v:8.1-350.10" }, "ports": { "i_glob_clock": { "direction": "input", "bits": [ 2 ] }, - "i_smi_a0_irq": { - "direction": "output", - "bits": [ "x" ] - }, "o_rx_h_tx_l": { "direction": "output", "bits": [ 3 ] @@ -9688,10 +9684,6 @@ "direction": "output", "bits": [ 9 ] }, - "i_radio_clk": { - "direction": "input", - "bits": [ 10 ] - }, "o_iq_tx_p": { "direction": "output", "bits": [ "x" ] @@ -9710,15 +9702,15 @@ }, "i_iq_rx_09_p": { "direction": "input", - "bits": [ 11 ] + "bits": [ 10 ] }, "i_iq_rx_24_n": { "direction": "input", - "bits": [ 12 ] + "bits": [ 11 ] }, "i_iq_rx_clk_p": { "direction": "input", - "bits": [ 13 ] + "bits": [ 12 ] }, "o_mixer_fm": { "direction": "output", @@ -9730,51 +9722,55 @@ }, "i_config": { "direction": "input", - "bits": [ 14, 15, 16, 17 ] + "bits": [ 13, 14, 15, 16 ] }, "i_button": { "direction": "input", - "bits": [ 18 ] - }, - "o_ldo_2v8_en": { - "direction": "output", - "bits": [ 19 ] + "bits": [ 17 ] }, "io_pmod": { "direction": "inout", - "bits": [ 20, 21, 22, 23, 24, 25, 26, 27 ] + "bits": [ 18, 19, 20, 21, 22, 23, 24, 25 ] }, "o_led0": { "direction": "output", - "bits": [ 28 ] + "bits": [ 26 ] }, "o_led1": { "direction": "output", - "bits": [ 29 ] + "bits": [ 27 ] }, "i_smi_a1": { "direction": "input", - "bits": [ 30 ] + "bits": [ 28 ] }, "i_smi_a2": { "direction": "input", - "bits": [ 31 ] + "bits": [ 29 ] }, "i_smi_a3": { "direction": "input", - "bits": [ 32 ] + "bits": [ 30 ] }, "i_smi_soe_se": { "direction": "input", - "bits": [ 23 ] + "bits": [ 21 ] }, "i_smi_swe_srw": { "direction": "input", - "bits": [ 33 ] + "bits": [ 31 ] }, "io_smi_data": { "direction": "output", - "bits": [ 34, 35, 36, 37, 38, 39, 40, 41 ] + "bits": [ 32, 33, 34, 35, 36, 37, 38, 39 ] + }, + "o_smi_write_req": { + "direction": "output", + "bits": [ 40 ] + }, + "o_smi_read_req": { + "direction": "output", + "bits": [ 41 ] }, "i_mosi": { "direction": "input", @@ -9815,60 +9811,10 @@ "I0": [ 46 ], "I1": [ 47 ], "I2": [ 48 ], - "I3": [ 18 ], + "I3": [ 17 ], "O": [ 49 ] } }, - "i_button_SB_LUT4_I3_I1_SB_LUT4_O": { - "hide_name": 0, - "type": "SB_LUT4", - "parameters": { - "LUT_INIT": "0000111100000000" - }, - "attributes": { - "module_not_derived": "00000000000000000000000000000001", - "src": "/usr/local/bin/../share/yosys/ice40/cells_map.v:17.34-18.52" - }, - "port_directions": { - "I0": "input", - "I1": "input", - "I2": "input", - "I3": "input", - "O": "output" - }, - "connections": { - "I0": [ "0" ], - "I1": [ "0" ], - "I2": [ 50 ], - "I3": [ 51 ], - "O": [ 47 ] - } - }, - "i_button_SB_LUT4_I3_I1_SB_LUT4_O_1": { - "hide_name": 0, - "type": "SB_LUT4", - "parameters": { - "LUT_INIT": "0011000000000000" - }, - "attributes": { - "module_not_derived": "00000000000000000000000000000001", - "src": "/usr/local/bin/../share/yosys/ice40/cells_map.v:22.34-23.52" - }, - "port_directions": { - "I0": "input", - "I1": "input", - "I2": "input", - "I3": "input", - "O": "output" - }, - "connections": { - "I0": [ "0" ], - "I1": [ 50 ], - "I2": [ 52 ], - "I3": [ 53 ], - "O": [ 48 ] - } - }, "i_smi_a1_SB_LUT4_I1": { "hide_name": 0, "type": "SB_LUT4", @@ -9888,60 +9834,10 @@ }, "connections": { "I0": [ "0" ], - "I1": [ 30 ], - "I2": [ 32 ], - "I3": [ 31 ], - "O": [ 54 ] - } - }, - "i_smi_a1_SB_LUT4_I1_O_SB_LUT4_I1": { - "hide_name": 0, - "type": "SB_LUT4", - "parameters": { - "LUT_INIT": "0000001100000101" - }, - "attributes": { - "module_not_derived": "00000000000000000000000000000001", - "src": "/usr/local/bin/../share/yosys/ice40/cells_map.v:26.33-27.52" - }, - "port_directions": { - "I0": "input", - "I1": "input", - "I2": "input", - "I3": "input", - "O": "output" - }, - "connections": { - "I0": [ 55 ], - "I1": [ 56 ], - "I2": [ 57 ], - "I3": [ 54 ], - "O": [ 58 ] - } - }, - "i_smi_a1_SB_LUT4_I1_O_SB_LUT4_I1_O_SB_LUT4_I0": { - "hide_name": 0, - "type": "SB_LUT4", - "parameters": { - "LUT_INIT": "1110100000000000" - }, - "attributes": { - "module_not_derived": "00000000000000000000000000000001", - "src": "/usr/local/bin/../share/yosys/ice40/cells_map.v:26.33-27.52" - }, - "port_directions": { - "I0": "input", - "I1": "input", - "I2": "input", - "I3": "input", - "O": "output" - }, - "connections": { - "I0": [ 59 ], - "I1": [ 23 ], - "I2": [ 60 ], - "I3": [ 58 ], - "O": [ 61 ] + "I1": [ 28 ], + "I2": [ 30 ], + "I3": [ 29 ], + "O": [ 50 ] } }, "i_smi_a1_SB_LUT4_I1_O_SB_LUT4_O": { @@ -9963,10 +9859,35 @@ }, "connections": { "I0": [ "0" ], - "I1": [ 23 ], - "I2": [ 62 ], - "I3": [ 60 ], - "O": [ 56 ] + "I1": [ 21 ], + "I2": [ 51 ], + "I3": [ 52 ], + "O": [ 53 ] + } + }, + "i_smi_a1_SB_LUT4_I1_O_SB_LUT4_O_1": { + "hide_name": 0, + "type": "SB_LUT4", + "parameters": { + "LUT_INIT": "0000000000000001" + }, + "attributes": { + "module_not_derived": "00000000000000000000000000000001", + "src": "/usr/local/bin/../share/yosys/ice40/cells_map.v:26.33-27.52" + }, + "port_directions": { + "I0": "input", + "I1": "input", + "I2": "input", + "I3": "input", + "O": "output" + }, + "connections": { + "I0": [ 54 ], + "I1": [ 55 ], + "I2": [ 56 ], + "I3": [ 57 ], + "O": [ 58 ] } }, "i_smi_a1_SB_LUT4_I1_O_SB_LUT4_O_I2_SB_CARRY_CO": { @@ -9975,7 +9896,7 @@ "parameters": { }, "attributes": { - "src": "top.v:298.13-328.5|smi_ctrl.v:139.25-139.39|/usr/local/bin/../share/yosys/ice40/arith_map.v:62.5-70.4" + "src": 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[ "0" ], - "I3": [ 67 ], - "O": [ 66 ] + "I3": [ 54 ], + "O": [ 62 ] } }, "i_smi_a1_SB_LUT4_I1_O_SB_LUT4_O_I2_SB_CARRY_CO_I1_SB_LUT4_O_1": { @@ -10057,8 +9978,8 @@ "I0": [ "0" ], "I1": [ "0" ], "I2": [ "0" ], - "I3": [ 68 ], - "O": [ 64 ] + "I3": [ 55 ], + "O": [ 60 ] } }, "i_smi_a1_SB_LUT4_I1_O_SB_LUT4_O_I2_SB_CARRY_CO_I1_SB_LUT4_O_2": { @@ -10082,8 +10003,8 @@ "I0": [ "0" ], "I1": [ "0" ], "I2": [ "0" ], - "I3": [ 69 ], - "O": [ 65 ] + "I3": [ 56 ], + "O": [ 61 ] } }, "i_smi_a1_SB_LUT4_I1_O_SB_LUT4_O_I2_SB_LUT4_I0": { @@ -10104,11 +10025,11 @@ "O": "output" }, "connections": { - "I0": [ 62 ], - "I1": [ 70 ], - "I2": [ 23 ], - "I3": [ 60 ], - "O": [ 71 ] + "I0": [ 51 ], + "I1": [ 63 ], + "I2": [ 21 ], + "I3": [ 52 ], + "O": [ 64 ] } }, "i_smi_a1_SB_LUT4_I1_O_SB_LUT4_O_I2_SB_LUT4_I0_I1_SB_CARRY_CO": { @@ -10117,7 +10038,7 @@ "parameters": { }, "attributes": { - "src": "top.v:298.13-328.5|smi_ctrl.v:132.25-132.39|/usr/local/bin/../share/yosys/ice40/arith_map.v:62.5-70.4" + "src": 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"parameters": { - "LUT_INIT": "1000111111111111" + "LUT_INIT": "0010111111111111" }, "attributes": { "module_not_derived": "00000000000000000000000000000001", @@ -11493,11 +11281,11 @@ "O": "output" }, "connections": { - "I0": [ 15 ], - "I1": [ 48 ], - "I2": [ 170 ], - "I3": [ 171 ], - "O": [ 168 ] + "I0": [ 149 ], + "I1": [ 124 ], + "I2": [ 150 ], + "I3": [ 151 ], + "O": [ 147 ] } }, "io_ctrl_ins.o_data_out_SB_DFFESR_Q_4": { @@ -11507,7 +11295,7 @@ }, "attributes": { "module_not_derived": "00000000000000000000000000000001", - "src": "top.v:129.12-158.5|io_ctrl.v:123.5-221.8|/usr/local/bin/../share/yosys/ice40/ff_map.v:24.66-24.119" + "src": "top.v:128.12-157.5|io_ctrl.v:123.5-221.8|/usr/local/bin/../share/yosys/ice40/ff_map.v:24.66-24.119" }, "port_directions": { "C": "input", @@ -11517,11 +11305,11 @@ "R": "input" }, "connections": { - "C": [ 113 ], - "D": [ 172 ], - "E": [ 173 ], - "Q": [ 174 ], - "R": [ 142 ] + "C": [ 89 ], + "D": [ 152 ], + "E": [ 153 ], + "Q": [ 154 ], + "R": [ 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], - "I3": [ 180 ], - "O": [ 177 ] + "I2": [ 160 ], + "I3": [ 161 ], + "O": [ 158 ] } }, "io_ctrl_ins.o_data_out_SB_DFFESR_Q_6": { @@ -11605,7 +11393,7 @@ }, "attributes": { "module_not_derived": "00000000000000000000000000000001", - "src": "top.v:129.12-158.5|io_ctrl.v:123.5-221.8|/usr/local/bin/../share/yosys/ice40/ff_map.v:24.66-24.119" + "src": "top.v:128.12-157.5|io_ctrl.v:123.5-221.8|/usr/local/bin/../share/yosys/ice40/ff_map.v:24.66-24.119" }, "port_directions": { "C": "input", @@ -11615,11 +11403,11 @@ "R": "input" }, "connections": { - "C": [ 113 ], - "D": [ 181 ], - "E": [ 173 ], - "Q": [ 182 ], - "R": [ 142 ] + "C": [ 89 ], + "D": [ 162 ], + "E": [ 153 ], + "Q": [ 163 ], + "R": [ 155 ] } }, "io_ctrl_ins.o_data_out_SB_DFFESR_Q_6_D_SB_LUT4_O": { @@ -11643,8 +11431,8 @@ "I0": [ "0" ], "I1": [ "0" ], "I2": [ 49 ], - "I3": [ 183 ], - "O": [ 181 ] + "I3": [ 164 ], + "O": [ 162 ] } }, "io_ctrl_ins.o_data_out_SB_DFFESR_Q_6_E_SB_LUT4_O": { @@ -11665,22 +11453,22 @@ "O": "output" }, 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"C": "input", @@ -11809,10 +11597,10 @@ "Q": "output" }, "connections": { - "C": [ 113 ], - "D": [ 191 ], - "E": [ 189 ], - "Q": [ 192 ] + "C": [ 89 ], + "D": [ 173 ], + "E": [ 171 ], + "Q": [ 174 ] } }, "io_ctrl_ins.pmod_dir_state_SB_DFFE_Q_2": { @@ -11822,7 +11610,7 @@ }, "attributes": { "module_not_derived": "00000000000000000000000000000001", - "src": "top.v:129.12-158.5|io_ctrl.v:123.5-221.8|/usr/local/bin/../share/yosys/ice40/ff_map.v:5.57-5.103" + "src": "top.v:128.12-157.5|io_ctrl.v:123.5-221.8|/usr/local/bin/../share/yosys/ice40/ff_map.v:5.57-5.103" }, "port_directions": { "C": "input", @@ -11831,10 +11619,10 @@ "Q": "output" }, "connections": { - "C": [ 113 ], - "D": [ 193 ], - "E": [ 189 ], - "Q": [ 194 ] + "C": [ 89 ], + "D": [ 175 ], + "E": [ 171 ], + "Q": [ 176 ] } }, "io_ctrl_ins.pmod_dir_state_SB_DFFE_Q_3": { @@ -11844,7 +11632,7 @@ }, "attributes": { "module_not_derived": "00000000000000000000000000000001", - "src": "top.v:129.12-158.5|io_ctrl.v:123.5-221.8|/usr/local/bin/../share/yosys/ice40/ff_map.v:5.57-5.103" + "src": "top.v:128.12-157.5|io_ctrl.v:123.5-221.8|/usr/local/bin/../share/yosys/ice40/ff_map.v:5.57-5.103" }, "port_directions": { "C": "input", @@ -11853,10 +11641,10 @@ "Q": "output" }, "connections": { - "C": [ 113 ], - "D": [ 195 ], - "E": [ 189 ], - "Q": [ 196 ] + "C": [ 89 ], + "D": [ 177 ], + "E": [ 171 ], + "Q": [ 149 ] } }, "io_ctrl_ins.pmod_dir_state_SB_DFFE_Q_4": { @@ -11866,7 +11654,7 @@ }, "attributes": { "module_not_derived": "00000000000000000000000000000001", - "src": "top.v:129.12-158.5|io_ctrl.v:123.5-221.8|/usr/local/bin/../share/yosys/ice40/ff_map.v:5.57-5.103" + "src": "top.v:128.12-157.5|io_ctrl.v:123.5-221.8|/usr/local/bin/../share/yosys/ice40/ff_map.v:5.57-5.103" }, "port_directions": { "C": "input", @@ -11875,10 +11663,10 @@ "Q": "output" }, "connections": { - "C": [ 113 ], - "D": [ 197 ], - "E": [ 189 ], - "Q": [ 165 ] + "C": [ 89 ], + "D": [ 178 ], + "E": [ 171 ], + "Q": [ 144 ] } }, "io_ctrl_ins.pmod_dir_state_SB_DFFE_Q_5": { @@ -11888,7 +11676,7 @@ }, "attributes": { "module_not_derived": "00000000000000000000000000000001", - "src": "top.v:129.12-158.5|io_ctrl.v:123.5-221.8|/usr/local/bin/../share/yosys/ice40/ff_map.v:5.57-5.103" + "src": "top.v:128.12-157.5|io_ctrl.v:123.5-221.8|/usr/local/bin/../share/yosys/ice40/ff_map.v:5.57-5.103" }, "port_directions": { "C": "input", @@ -11897,10 +11685,10 @@ "Q": "output" }, "connections": { - "C": [ 113 ], - "D": [ 132 ], - "E": [ 189 ], - "Q": [ 138 ] + "C": [ 89 ], + "D": [ 110 ], + "E": [ 171 ], + "Q": [ 141 ] } }, "io_ctrl_ins.pmod_dir_state_SB_DFFE_Q_6": { @@ -11910,7 +11698,7 @@ }, "attributes": { "module_not_derived": "00000000000000000000000000000001", - "src": "top.v:129.12-158.5|io_ctrl.v:123.5-221.8|/usr/local/bin/../share/yosys/ice40/ff_map.v:5.57-5.103" + "src": "top.v:128.12-157.5|io_ctrl.v:123.5-221.8|/usr/local/bin/../share/yosys/ice40/ff_map.v:5.57-5.103" }, "port_directions": { "C": "input", @@ -11919,10 +11707,10 @@ "Q": "output" }, "connections": { - "C": [ 113 ], - "D": [ 114 ], - "E": [ 189 ], - "Q": [ 184 ] + "C": [ 89 ], + "D": [ 90 ], + "E": [ 171 ], + "Q": [ 125 ] } }, "io_ctrl_ins.pmod_dir_state_SB_DFFE_Q_7": { @@ -11932,7 +11720,7 @@ }, "attributes": { "module_not_derived": "00000000000000000000000000000001", - "src": "top.v:129.12-158.5|io_ctrl.v:123.5-221.8|/usr/local/bin/../share/yosys/ice40/ff_map.v:5.57-5.103" + "src": "top.v:128.12-157.5|io_ctrl.v:123.5-221.8|/usr/local/bin/../share/yosys/ice40/ff_map.v:5.57-5.103" }, "port_directions": { "C": "input", @@ -11941,10 +11729,35 @@ "Q": "output" }, "connections": { - "C": [ 113 ], - "D": [ 117 ], - "E": [ 189 ], - "Q": [ 187 ] + "C": [ 89 ], + "D": [ 94 ], + "E": [ 171 ], + "Q": [ 169 ] + } + }, + "io_ctrl_ins.pmod_dir_state_SB_DFFE_Q_E_SB_LUT4_O": { + "hide_name": 0, + "type": "SB_LUT4", + "parameters": { + "LUT_INIT": "0000111100000000" + }, + "attributes": { + "module_not_derived": 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"io_ctrl_ins.rf_mode_SB_DFFESR_Q_E_SB_LUT4_O": { + "hide_name": 0, + "type": "SB_LUT4", + "parameters": { + "LUT_INIT": "1111111100110000" + }, + "attributes": { + "module_not_derived": "00000000000000000000000000000001", + "src": "/usr/local/bin/../share/yosys/ice40/cells_map.v:22.34-23.52" + }, + "port_directions": { + "I0": "input", + "I1": "input", + "I2": "input", + "I3": "input", + "O": "output" + }, + "connections": { + "I0": [ "0" ], + "I1": [ 113 ], + "I2": [ 120 ], + "I3": [ 93 ], + "O": [ 91 ] } }, "io_ctrl_ins.rf_pin_state_SB_DFFE_Q": { @@ -12202,7 +12090,7 @@ }, "attributes": { "module_not_derived": "00000000000000000000000000000001", - "src": "top.v:129.12-158.5|io_ctrl.v:123.5-221.8|/usr/local/bin/../share/yosys/ice40/ff_map.v:5.57-5.103" + "src": "top.v:128.12-157.5|io_ctrl.v:123.5-221.8|/usr/local/bin/../share/yosys/ice40/ff_map.v:5.57-5.103" }, "port_directions": { "C": "input", @@ -12211,10 +12099,10 @@ "Q": "output" }, "connections": { - "C": [ 113 ], - "D": [ 188 ], - "E": [ 203 ], - "Q": [ 204 ] + "C": [ 89 ], + "D": [ 170 ], + "E": [ 185 ], + "Q": [ 186 ] } }, "io_ctrl_ins.rf_pin_state_SB_DFFE_Q_1": { @@ -12224,7 +12112,7 @@ }, "attributes": { "module_not_derived": "00000000000000000000000000000001", - "src": "top.v:129.12-158.5|io_ctrl.v:123.5-221.8|/usr/local/bin/../share/yosys/ice40/ff_map.v:5.57-5.103" + "src": "top.v:128.12-157.5|io_ctrl.v:123.5-221.8|/usr/local/bin/../share/yosys/ice40/ff_map.v:5.57-5.103" }, "port_directions": { "C": "input", @@ -12233,10 +12121,10 @@ "Q": "output" }, "connections": { - "C": [ 113 ], - "D": [ 191 ], - "E": [ 203 ], - "Q": [ 205 ] + "C": [ 89 ], + "D": [ 173 ], + "E": [ 185 ], + "Q": [ 187 ] } }, "io_ctrl_ins.rf_pin_state_SB_DFFE_Q_2": { @@ -12246,7 +12134,7 @@ }, "attributes": { "module_not_derived": "00000000000000000000000000000001", - "src": "top.v:129.12-158.5|io_ctrl.v:123.5-221.8|/usr/local/bin/../share/yosys/ice40/ff_map.v:5.57-5.103" + "src": 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203 ], - "Q": [ 151 ] + "C": [ 89 ], + "D": [ 110 ], + "E": [ 185 ], + "Q": [ 131 ] } }, "io_ctrl_ins.rf_pin_state_SB_DFFE_Q_6": { @@ -12334,7 +12222,7 @@ }, "attributes": { "module_not_derived": "00000000000000000000000000000001", - "src": "top.v:129.12-158.5|io_ctrl.v:123.5-221.8|/usr/local/bin/../share/yosys/ice40/ff_map.v:5.57-5.103" + "src": "top.v:128.12-157.5|io_ctrl.v:123.5-221.8|/usr/local/bin/../share/yosys/ice40/ff_map.v:5.57-5.103" }, "port_directions": { "C": "input", @@ -12343,10 +12231,10 @@ "Q": "output" }, "connections": { - "C": [ 113 ], - "D": [ 114 ], - "E": [ 203 ], - "Q": [ 149 ] + "C": [ 89 ], + "D": [ 90 ], + "E": [ 185 ], + "Q": [ 128 ] } }, "io_ctrl_ins.rf_pin_state_SB_DFFE_Q_7": { @@ -12356,7 +12244,7 @@ }, "attributes": { "module_not_derived": "00000000000000000000000000000001", - "src": "top.v:129.12-158.5|io_ctrl.v:123.5-221.8|/usr/local/bin/../share/yosys/ice40/ff_map.v:5.57-5.103" + "src": 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50 ], - "I3": [ 51 ], - "O": [ 180 ] + "I0": [ 4 ], + "I1": [ 129 ], + "I2": [ 48 ], + "I3": [ 16 ], + "O": [ 161 ] } }, - "io_ctrl_ins.rx_h_b_state_SB_LUT4_I1_O_SB_LUT4_O": { + "io_ctrl_ins.rx_h_b_state_SB_LUT4_I0_O_SB_LUT4_O": { "hide_name": 0, "type": "SB_LUT4", "parameters": { @@ -12461,11 +12374,11 @@ "O": "output" }, "connections": { - "I0": [ 137 ], - "I1": [ 192 ], - "I2": [ 48 ], - "I3": [ 17 ], - "O": [ 179 ] + "I0": [ 124 ], + "I1": [ 174 ], + "I2": [ 47 ], + "I3": [ 181 ], + "O": [ 160 ] } }, "io_ctrl_ins.rx_h_state_SB_DFFE_Q": { @@ -12475,7 +12388,7 @@ }, "attributes": { "module_not_derived": "00000000000000000000000000000001", - "src": "top.v:129.12-158.5|io_ctrl.v:224.5-319.8|/usr/local/bin/../share/yosys/ice40/ff_map.v:5.57-5.103" + "src": "top.v:128.12-157.5|io_ctrl.v:224.5-319.8|/usr/local/bin/../share/yosys/ice40/ff_map.v:5.57-5.103" }, "port_directions": { "C": "input", @@ -12484,9 +12397,9 @@ "Q": "output" }, "connections": { - "C": [ 113 ], - "D": [ 211 ], - "E": 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], - "E": [ 219 ], - "Q": [ 26 ], - "R": [ 57 ] + "C": [ 200 ], + "D": [ 203 ], + "E": [ 202 ], + "Q": [ 24 ], + "R": [ 93 ] } }, "io_pmod_SB_DFFNESR_Q_2": { @@ -12974,7 +12937,7 @@ }, "attributes": { "module_not_derived": "00000000000000000000000000000001", - "src": "top.v:250.12-259.5|lvds_rx.v:39.5-82.8|/usr/local/bin/../share/yosys/ice40/ff_map.v:22.66-22.119" + "src": "top.v:249.12-258.5|lvds_rx.v:39.5-82.8|/usr/local/bin/../share/yosys/ice40/ff_map.v:22.66-22.119" }, "port_directions": { "C": "input", @@ -12984,11 +12947,11 @@ "R": "input" }, "connections": { - "C": [ 217 ], - "D": [ 221 ], - "E": [ 219 ], - "Q": [ 25 ], - "R": [ 57 ] + "C": [ 200 ], + "D": [ 204 ], + "E": [ 202 ], + "Q": [ 23 ], + "R": [ 93 ] } }, "io_pmod_SB_DFFNESR_Q_3": { @@ -12998,7 +12961,7 @@ }, "attributes": { "module_not_derived": "00000000000000000000000000000001", - "src": "top.v:250.12-259.5|lvds_rx.v:39.5-82.8|/usr/local/bin/../share/yosys/ice40/ff_map.v:22.66-22.119" + "src": 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"attributes": { + "module_not_derived": "00000000000000000000000000000001", + "src": "/usr/local/bin/../share/yosys/ice40/cells_map.v:26.33-27.52" + }, + "port_directions": { + "I0": "input", + "I1": "input", + "I2": "input", + "I3": "input", + "O": "output" + }, + "connections": { + "I0": [ 245 ], + "I1": [ 227 ], + "I2": [ 246 ], + "I3": [ 247 ], + "O": [ 214 ] } }, "io_smi_data_SB_LUT4_O": { @@ -13282,9 +13420,9 @@ "connections": { "I0": [ "0" ], "I1": [ "0" ], - "I2": [ 32 ], - "I3": [ 250 ], - "O": [ 41 ] + "I2": [ 30 ], + "I3": [ 248 ], + "O": [ 39 ] } }, "io_smi_data_SB_LUT4_O_1": { @@ -13307,9 +13445,9 @@ "connections": { "I0": [ "0" ], "I1": [ "0" ], - "I2": [ 32 ], - "I3": [ 251 ], - "O": [ 40 ] + "I2": [ 30 ], + "I3": [ 249 ], + "O": [ 38 ] } }, "io_smi_data_SB_LUT4_O_2": { @@ -13332,9 +13470,9 @@ "connections": { "I0": [ "0" ], "I1": [ "0" ], - "I2": [ 32 ], - "I3": [ 252 ], - "O": [ 39 ] + "I2": [ 30 ], + "I3": [ 250 ], + "O": [ 37 ] } }, "io_smi_data_SB_LUT4_O_3": { @@ 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+13595,10 @@ }, "connections": { "CLOCK_ENABLE": [ "1" ], - "D_IN_0": [ 257 ], - "D_IN_1": [ 258 ], - "INPUT_CLK": [ 217 ], - "PACKAGE_PIN": [ 11 ] + "D_IN_0": [ 255 ], + "D_IN_1": [ 256 ], + "INPUT_CLK": [ 200 ], + "PACKAGE_PIN": [ 10 ] } }, "iq_rx_24": { @@ -13473,7 +13611,7 @@ }, "attributes": { "module_not_derived": "00000000000000000000000000000001", - "src": "top.v:207.6-212.36" + "src": "top.v:206.6-211.36" }, "port_directions": { "CLOCK_ENABLE": "input", @@ -13484,10 +13622,10 @@ }, "connections": { "CLOCK_ENABLE": [ "1" ], - "D_IN_0": [ 259 ], - "D_IN_1": [ 260 ], - "INPUT_CLK": [ 217 ], - "PACKAGE_PIN": [ 12 ] + "D_IN_0": [ 257 ], + "D_IN_1": [ 258 ], + "INPUT_CLK": [ 200 ], + "PACKAGE_PIN": [ 11 ] } }, "iq_rx_clk": { @@ -13499,7 +13637,7 @@ }, "attributes": { "module_not_derived": "00000000000000000000000000000001", - "src": "top.v:192.6-194.30" + "src": "top.v:191.6-193.30" }, "port_directions": { "CLOCK_ENABLE": "input", @@ -13508,8 +13646,8 @@ }, "connections": { "CLOCK_ENABLE": [ "1" ], - "D_IN_0": [ 261 ], - "PACKAGE_PIN": [ 13 ] + "D_IN_0": [ 259 ], + "PACKAGE_PIN": [ 12 ] } }, "lvds_clk_buffer": { @@ -13519,15 +13657,15 @@ }, "attributes": { "module_not_derived": "00000000000000000000000000000001", - "src": "top.v:196.10-199.46" + "src": "top.v:195.10-198.46" }, "port_directions": { "GLOBAL_BUFFER_OUTPUT": "output", "USER_SIGNAL_TO_GLOBAL_BUFFER": "input" }, "connections": { - "GLOBAL_BUFFER_OUTPUT": [ 217 ], - "USER_SIGNAL_TO_GLOBAL_BUFFER": [ 261 ] + "GLOBAL_BUFFER_OUTPUT": [ 200 ], + "USER_SIGNAL_TO_GLOBAL_BUFFER": [ 259 ] } }, "lvds_rx_09_inst.r_data_SB_DFFNESR_Q": { @@ -13537,7 +13675,7 @@ }, "attributes": { "module_not_derived": "00000000000000000000000000000001", - "src": "top.v:250.12-259.5|lvds_rx.v:39.5-82.8|/usr/local/bin/../share/yosys/ice40/ff_map.v:22.66-22.119" + "src": "top.v:249.12-258.5|lvds_rx.v:39.5-82.8|/usr/local/bin/../share/yosys/ice40/ff_map.v:22.66-22.119" }, "port_directions": { "C": "input", @@ -13547,11 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"top.v:250.12-259.5|lvds_rx.v:39.5-82.8|/usr/local/bin/../share/yosys/ice40/ff_map.v:22.66-22.119" + "src": "top.v:249.12-258.5|lvds_rx.v:39.5-82.8|/usr/local/bin/../share/yosys/ice40/ff_map.v:22.66-22.119" }, "port_directions": { "C": "input", @@ -13595,11 +13733,11 @@ "R": "input" }, "connections": { - "C": [ 217 ], - "D": [ 266 ], - "E": [ 219 ], - "Q": [ 267 ], - "R": [ 57 ] + "C": [ 200 ], + "D": [ 264 ], + "E": [ 202 ], + "Q": [ 265 ], + "R": [ 93 ] } }, "lvds_rx_09_inst.r_data_SB_DFFNESR_Q_11": { @@ -13609,7 +13747,7 @@ }, "attributes": { "module_not_derived": "00000000000000000000000000000001", - "src": "top.v:250.12-259.5|lvds_rx.v:39.5-82.8|/usr/local/bin/../share/yosys/ice40/ff_map.v:22.66-22.119" + "src": "top.v:249.12-258.5|lvds_rx.v:39.5-82.8|/usr/local/bin/../share/yosys/ice40/ff_map.v:22.66-22.119" }, "port_directions": { "C": "input", @@ -13619,11 +13757,11 @@ "R": "input" }, "connections": { - "C": [ 217 ], - "D": [ 268 ], - "E": [ 219 ], - "Q": [ 269 ], - "R": [ 57 ] + "C": [ 200 ], + "D": [ 266 ], + "E": [ 202 ], + "Q": [ 267 ], + "R": [ 93 ] } }, "lvds_rx_09_inst.r_data_SB_DFFNESR_Q_12": { @@ -13633,7 +13771,7 @@ }, "attributes": { "module_not_derived": "00000000000000000000000000000001", - "src": "top.v:250.12-259.5|lvds_rx.v:39.5-82.8|/usr/local/bin/../share/yosys/ice40/ff_map.v:22.66-22.119" + "src": "top.v:249.12-258.5|lvds_rx.v:39.5-82.8|/usr/local/bin/../share/yosys/ice40/ff_map.v:22.66-22.119" }, "port_directions": { "C": "input", @@ -13643,11 +13781,11 @@ "R": "input" }, "connections": { - "C": [ 217 ], - "D": [ 270 ], - "E": [ 219 ], - "Q": [ 271 ], - "R": [ 57 ] + "C": [ 200 ], + "D": [ 268 ], + "E": [ 202 ], + "Q": [ 269 ], + "R": [ 93 ] } }, "lvds_rx_09_inst.r_data_SB_DFFNESR_Q_13": { @@ -13657,7 +13795,7 @@ }, "attributes": { "module_not_derived": "00000000000000000000000000000001", - "src": "top.v:250.12-259.5|lvds_rx.v:39.5-82.8|/usr/local/bin/../share/yosys/ice40/ff_map.v:22.66-22.119" + "src": "top.v:249.12-258.5|lvds_rx.v:39.5-82.8|/usr/local/bin/../share/yosys/ice40/ff_map.v:22.66-22.119" }, "port_directions": { "C": "input", @@ -13667,11 +13805,11 @@ "R": "input" }, "connections": { - "C": [ 217 ], - "D": [ 272 ], - "E": [ 219 ], - "Q": [ 273 ], - "R": [ 57 ] + "C": [ 200 ], + "D": [ 270 ], + "E": [ 202 ], + "Q": [ 271 ], + "R": [ 93 ] } }, "lvds_rx_09_inst.r_data_SB_DFFNESR_Q_14": { @@ -13681,7 +13819,7 @@ }, "attributes": { "module_not_derived": "00000000000000000000000000000001", - "src": "top.v:250.12-259.5|lvds_rx.v:39.5-82.8|/usr/local/bin/../share/yosys/ice40/ff_map.v:22.66-22.119" + "src": "top.v:249.12-258.5|lvds_rx.v:39.5-82.8|/usr/local/bin/../share/yosys/ice40/ff_map.v:22.66-22.119" }, "port_directions": { "C": "input", @@ -13691,11 +13829,11 @@ "R": "input" }, "connections": { - "C": [ 217 ], - "D": [ 274 ], - "E": [ 219 ], - "Q": [ 275 ], - "R": [ 57 ] + "C": [ 200 ], + "D": [ 272 ], + "E": [ 202 ], + "Q": [ 273 ], + "R": [ 93 ] } }, "lvds_rx_09_inst.r_data_SB_DFFNESR_Q_15": { @@ -13705,7 +13843,7 @@ }, "attributes": { "module_not_derived": "00000000000000000000000000000001", - "src": "top.v:250.12-259.5|lvds_rx.v:39.5-82.8|/usr/local/bin/../share/yosys/ice40/ff_map.v:22.66-22.119" + "src": "top.v:249.12-258.5|lvds_rx.v:39.5-82.8|/usr/local/bin/../share/yosys/ice40/ff_map.v:22.66-22.119" }, "port_directions": { "C": "input", @@ -13715,11 +13853,11 @@ "R": "input" }, "connections": { - "C": [ 217 ], - "D": [ 276 ], - "E": [ 219 ], - "Q": [ 277 ], - "R": [ 57 ] + "C": [ 200 ], + "D": [ 274 ], + "E": [ 202 ], + "Q": [ 275 ], + "R": [ 93 ] } }, "lvds_rx_09_inst.r_data_SB_DFFNESR_Q_16": { @@ -13729,7 +13867,7 @@ }, "attributes": { "module_not_derived": "00000000000000000000000000000001", - "src": "top.v:250.12-259.5|lvds_rx.v:39.5-82.8|/usr/local/bin/../share/yosys/ice40/ff_map.v:22.66-22.119" + "src": "top.v:249.12-258.5|lvds_rx.v:39.5-82.8|/usr/local/bin/../share/yosys/ice40/ff_map.v:22.66-22.119" }, "port_directions": { "C": "input", @@ -13739,11 +13877,11 @@ "R": "input" }, "connections": { - "C": [ 217 ], - "D": [ 278 ], - "E": [ 219 ], - "Q": [ 279 ], - "R": [ 57 ] + "C": [ 200 ], + "D": [ 276 ], + "E": [ 202 ], + "Q": [ 277 ], + "R": [ 93 ] } }, "lvds_rx_09_inst.r_data_SB_DFFNESR_Q_17": { @@ -13753,7 +13891,7 @@ }, "attributes": { "module_not_derived": "00000000000000000000000000000001", - "src": "top.v:250.12-259.5|lvds_rx.v:39.5-82.8|/usr/local/bin/../share/yosys/ice40/ff_map.v:22.66-22.119" + "src": "top.v:249.12-258.5|lvds_rx.v:39.5-82.8|/usr/local/bin/../share/yosys/ice40/ff_map.v:22.66-22.119" }, "port_directions": { "C": "input", @@ -13763,11 +13901,11 @@ "R": "input" }, "connections": { - "C": [ 217 ], - "D": [ 280 ], - "E": [ 219 ], - "Q": [ 281 ], - "R": [ 57 ] + "C": [ 200 ], + "D": [ 278 ], + "E": [ 202 ], + "Q": [ 279 ], + "R": [ 93 ] } }, "lvds_rx_09_inst.r_data_SB_DFFNESR_Q_18": { @@ -13777,7 +13915,7 @@ }, "attributes": { "module_not_derived": "00000000000000000000000000000001", - "src": "top.v:250.12-259.5|lvds_rx.v:39.5-82.8|/usr/local/bin/../share/yosys/ice40/ff_map.v:22.66-22.119" + "src": "top.v:249.12-258.5|lvds_rx.v:39.5-82.8|/usr/local/bin/../share/yosys/ice40/ff_map.v:22.66-22.119" }, "port_directions": { "C": "input", @@ -13787,11 +13925,11 @@ "R": "input" }, "connections": { - "C": [ 217 ], - "D": [ 282 ], - "E": [ 219 ], - "Q": [ 283 ], - "R": [ 57 ] + "C": [ 200 ], + "D": [ 280 ], + "E": [ 202 ], + "Q": [ 281 ], + "R": [ 93 ] } }, "lvds_rx_09_inst.r_data_SB_DFFNESR_Q_19": { @@ -13801,7 +13939,7 @@ }, "attributes": { "module_not_derived": "00000000000000000000000000000001", - "src": "top.v:250.12-259.5|lvds_rx.v:39.5-82.8|/usr/local/bin/../share/yosys/ice40/ff_map.v:22.66-22.119" + "src": "top.v:249.12-258.5|lvds_rx.v:39.5-82.8|/usr/local/bin/../share/yosys/ice40/ff_map.v:22.66-22.119" }, "port_directions": { "C": "input", @@ -13811,11 +13949,11 @@ "R": "input" }, "connections": { - "C": [ 217 ], - "D": [ 284 ], - "E": [ 219 ], - "Q": [ 285 ], - "R": [ 57 ] + "C": [ 200 ], + "D": [ 282 ], + "E": [ 202 ], + "Q": [ 283 ], + "R": [ 93 ] } }, "lvds_rx_09_inst.r_data_SB_DFFNESR_Q_2": { @@ -13825,7 +13963,7 @@ }, "attributes": { "module_not_derived": "00000000000000000000000000000001", - "src": "top.v:250.12-259.5|lvds_rx.v:39.5-82.8|/usr/local/bin/../share/yosys/ice40/ff_map.v:22.66-22.119" + "src": "top.v:249.12-258.5|lvds_rx.v:39.5-82.8|/usr/local/bin/../share/yosys/ice40/ff_map.v:22.66-22.119" }, "port_directions": { "C": "input", @@ -13835,11 +13973,11 @@ "R": "input" }, "connections": { - "C": [ 217 ], - "D": [ 286 ], - "E": [ 219 ], - "Q": [ 287 ], - "R": [ 57 ] + "C": [ 200 ], + "D": [ 284 ], + "E": [ 202 ], + "Q": [ 285 ], + "R": [ 93 ] } }, "lvds_rx_09_inst.r_data_SB_DFFNESR_Q_20": { @@ -13849,7 +13987,7 @@ }, "attributes": { "module_not_derived": "00000000000000000000000000000001", - "src": "top.v:250.12-259.5|lvds_rx.v:39.5-82.8|/usr/local/bin/../share/yosys/ice40/ff_map.v:22.66-22.119" + "src": "top.v:249.12-258.5|lvds_rx.v:39.5-82.8|/usr/local/bin/../share/yosys/ice40/ff_map.v:22.66-22.119" }, "port_directions": { "C": "input", @@ -13859,11 +13997,11 @@ "R": "input" }, "connections": { - "C": [ 217 ], - "D": [ 288 ], - "E": [ 219 ], - "Q": [ 289 ], - "R": [ 57 ] + "C": [ 200 ], + "D": [ 286 ], + "E": [ 202 ], + "Q": [ 287 ], + "R": [ 93 ] } }, "lvds_rx_09_inst.r_data_SB_DFFNESR_Q_21": { @@ -13873,7 +14011,7 @@ }, "attributes": { "module_not_derived": "00000000000000000000000000000001", - "src": "top.v:250.12-259.5|lvds_rx.v:39.5-82.8|/usr/local/bin/../share/yosys/ice40/ff_map.v:22.66-22.119" + "src": "top.v:249.12-258.5|lvds_rx.v:39.5-82.8|/usr/local/bin/../share/yosys/ice40/ff_map.v:22.66-22.119" }, "port_directions": { "C": "input", @@ -13883,11 +14021,11 @@ "R": "input" }, "connections": { - "C": [ 217 ], - "D": [ 290 ], - "E": [ 219 ], - "Q": [ 291 ], - "R": [ 57 ] + "C": [ 200 ], + "D": [ 288 ], + "E": [ 202 ], + "Q": [ 289 ], + "R": [ 93 ] } }, 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"port_directions": { "C": "input", @@ -13931,11 +14069,11 @@ "R": "input" }, "connections": { - "C": [ 217 ], - "D": [ 294 ], - "E": [ 219 ], - "Q": [ 295 ], - "R": [ 57 ] + "C": [ 200 ], + "D": [ 292 ], + "E": [ 202 ], + "Q": [ 293 ], + "R": [ 93 ] } }, "lvds_rx_09_inst.r_data_SB_DFFNESR_Q_24": { @@ -13945,7 +14083,7 @@ }, "attributes": { "module_not_derived": "00000000000000000000000000000001", - "src": "top.v:250.12-259.5|lvds_rx.v:39.5-82.8|/usr/local/bin/../share/yosys/ice40/ff_map.v:22.66-22.119" + "src": "top.v:249.12-258.5|lvds_rx.v:39.5-82.8|/usr/local/bin/../share/yosys/ice40/ff_map.v:22.66-22.119" }, "port_directions": { "C": "input", @@ -13955,11 +14093,11 @@ "R": "input" }, "connections": { - "C": [ 217 ], - "D": [ 296 ], - "E": [ 219 ], - "Q": [ 297 ], - "R": [ 57 ] + "C": [ 200 ], + "D": [ 294 ], + "E": [ 202 ], + "Q": [ 295 ], + "R": [ 93 ] } }, "lvds_rx_09_inst.r_data_SB_DFFNESR_Q_25": { @@ -13969,7 +14107,7 @@ }, "attributes": { "module_not_derived": "00000000000000000000000000000001", - "src": "top.v:250.12-259.5|lvds_rx.v:39.5-82.8|/usr/local/bin/../share/yosys/ice40/ff_map.v:22.66-22.119" + "src": "top.v:249.12-258.5|lvds_rx.v:39.5-82.8|/usr/local/bin/../share/yosys/ice40/ff_map.v:22.66-22.119" }, "port_directions": { "C": "input", @@ -13979,11 +14117,11 @@ "R": "input" }, "connections": { - "C": [ 217 ], - "D": [ 298 ], - "E": [ 219 ], - "Q": [ 299 ], - "R": [ 57 ] + "C": [ 200 ], + "D": [ 296 ], + "E": [ 202 ], + "Q": [ 297 ], + "R": [ 93 ] } }, "lvds_rx_09_inst.r_data_SB_DFFNESR_Q_26": { @@ -13993,7 +14131,7 @@ }, "attributes": { "module_not_derived": "00000000000000000000000000000001", - "src": "top.v:250.12-259.5|lvds_rx.v:39.5-82.8|/usr/local/bin/../share/yosys/ice40/ff_map.v:22.66-22.119" + "src": "top.v:249.12-258.5|lvds_rx.v:39.5-82.8|/usr/local/bin/../share/yosys/ice40/ff_map.v:22.66-22.119" }, "port_directions": { "C": "input", @@ -14003,11 +14141,11 @@ "R": "input" }, "connections": { - "C": [ 217 ], - "D": [ 300 ], - "E": [ 219 ], - "Q": [ 301 ], - "R": [ 57 ] + "C": [ 200 ], + "D": [ 298 ], + "E": [ 202 ], + "Q": [ 299 ], + "R": [ 93 ] } }, "lvds_rx_09_inst.r_data_SB_DFFNESR_Q_27": { @@ -14017,7 +14155,7 @@ }, "attributes": { "module_not_derived": "00000000000000000000000000000001", - "src": "top.v:250.12-259.5|lvds_rx.v:39.5-82.8|/usr/local/bin/../share/yosys/ice40/ff_map.v:22.66-22.119" + "src": "top.v:249.12-258.5|lvds_rx.v:39.5-82.8|/usr/local/bin/../share/yosys/ice40/ff_map.v:22.66-22.119" }, "port_directions": { "C": "input", @@ -14027,11 +14165,11 @@ "R": "input" }, "connections": { - "C": [ 217 ], - "D": [ 302 ], - "E": [ 219 ], - "Q": [ 303 ], - "R": [ 57 ] + "C": [ 200 ], + "D": [ 300 ], + "E": [ 202 ], + "Q": [ 301 ], + "R": [ 93 ] } }, "lvds_rx_09_inst.r_data_SB_DFFNESR_Q_3": { @@ -14041,7 +14179,7 @@ }, "attributes": { "module_not_derived": "00000000000000000000000000000001", - "src": "top.v:250.12-259.5|lvds_rx.v:39.5-82.8|/usr/local/bin/../share/yosys/ice40/ff_map.v:22.66-22.119" + "src": "top.v:249.12-258.5|lvds_rx.v:39.5-82.8|/usr/local/bin/../share/yosys/ice40/ff_map.v:22.66-22.119" }, "port_directions": { "C": "input", @@ -14051,11 +14189,11 @@ "R": "input" }, "connections": { - "C": [ 217 ], - "D": [ 304 ], - "E": [ 219 ], - "Q": [ 305 ], - "R": [ 57 ] + "C": [ 200 ], + "D": [ 302 ], + "E": [ 202 ], + "Q": [ 303 ], + "R": [ 93 ] } }, "lvds_rx_09_inst.r_data_SB_DFFNESR_Q_4": { @@ -14065,7 +14203,7 @@ }, "attributes": { "module_not_derived": "00000000000000000000000000000001", - "src": "top.v:250.12-259.5|lvds_rx.v:39.5-82.8|/usr/local/bin/../share/yosys/ice40/ff_map.v:22.66-22.119" + "src": "top.v:249.12-258.5|lvds_rx.v:39.5-82.8|/usr/local/bin/../share/yosys/ice40/ff_map.v:22.66-22.119" }, "port_directions": { "C": "input", @@ -14075,11 +14213,11 @@ "R": "input" }, "connections": { - "C": [ 217 ], - "D": [ 306 ], - "E": [ 219 ], - "Q": [ 307 ], - "R": [ 57 ] + "C": [ 200 ], + "D": [ 304 ], + "E": [ 202 ], + "Q": [ 305 ], + "R": [ 93 ] } }, "lvds_rx_09_inst.r_data_SB_DFFNESR_Q_5": { @@ -14089,7 +14227,7 @@ }, "attributes": { "module_not_derived": "00000000000000000000000000000001", - "src": "top.v:250.12-259.5|lvds_rx.v:39.5-82.8|/usr/local/bin/../share/yosys/ice40/ff_map.v:22.66-22.119" + "src": "top.v:249.12-258.5|lvds_rx.v:39.5-82.8|/usr/local/bin/../share/yosys/ice40/ff_map.v:22.66-22.119" }, "port_directions": { "C": "input", @@ -14099,11 +14237,11 @@ "R": "input" }, "connections": { - "C": [ 217 ], - "D": [ 308 ], - "E": [ 219 ], - "Q": [ 309 ], - "R": [ 57 ] + "C": [ 200 ], + "D": [ 306 ], + "E": [ 202 ], + "Q": [ 307 ], + "R": [ 93 ] } }, "lvds_rx_09_inst.r_data_SB_DFFNESR_Q_6": { @@ -14113,7 +14251,7 @@ }, "attributes": { "module_not_derived": "00000000000000000000000000000001", - "src": "top.v:250.12-259.5|lvds_rx.v:39.5-82.8|/usr/local/bin/../share/yosys/ice40/ff_map.v:22.66-22.119" + "src": "top.v:249.12-258.5|lvds_rx.v:39.5-82.8|/usr/local/bin/../share/yosys/ice40/ff_map.v:22.66-22.119" }, "port_directions": { "C": "input", @@ -14123,11 +14261,11 @@ "R": "input" }, "connections": { - "C": [ 217 ], - "D": [ 310 ], - "E": [ 219 ], - "Q": [ 311 ], - "R": [ 57 ] + "C": [ 200 ], + "D": [ 308 ], + "E": [ 202 ], + "Q": [ 309 ], + "R": [ 93 ] } }, "lvds_rx_09_inst.r_data_SB_DFFNESR_Q_7": { @@ -14137,7 +14275,7 @@ }, "attributes": { "module_not_derived": "00000000000000000000000000000001", - "src": "top.v:250.12-259.5|lvds_rx.v:39.5-82.8|/usr/local/bin/../share/yosys/ice40/ff_map.v:22.66-22.119" + "src": "top.v:249.12-258.5|lvds_rx.v:39.5-82.8|/usr/local/bin/../share/yosys/ice40/ff_map.v:22.66-22.119" }, "port_directions": { "C": "input", @@ -14147,11 +14285,11 @@ "R": "input" }, "connections": { - "C": [ 217 ], - "D": [ 312 ], - "E": [ 219 ], - "Q": [ 313 ], - "R": [ 57 ] + "C": [ 200 ], + "D": [ 310 ], + "E": [ 202 ], + "Q": [ 311 ], + "R": [ 93 ] } }, "lvds_rx_09_inst.r_data_SB_DFFNESR_Q_8": { @@ -14161,7 +14299,7 @@ }, "attributes": { "module_not_derived": "00000000000000000000000000000001", - "src": "top.v:250.12-259.5|lvds_rx.v:39.5-82.8|/usr/local/bin/../share/yosys/ice40/ff_map.v:22.66-22.119" + "src": "top.v:249.12-258.5|lvds_rx.v:39.5-82.8|/usr/local/bin/../share/yosys/ice40/ff_map.v:22.66-22.119" }, "port_directions": { "C": "input", @@ -14171,11 +14309,11 @@ "R": "input" }, "connections": { - "C": [ 217 ], - "D": [ 314 ], - "E": [ 219 ], - "Q": [ 315 ], - "R": [ 57 ] + "C": [ 200 ], + "D": [ 312 ], + "E": [ 202 ], + "Q": [ 313 ], + "R": [ 93 ] } }, "lvds_rx_09_inst.r_data_SB_DFFNESR_Q_9": { @@ -14185,7 +14323,7 @@ }, "attributes": { "module_not_derived": "00000000000000000000000000000001", - "src": "top.v:250.12-259.5|lvds_rx.v:39.5-82.8|/usr/local/bin/../share/yosys/ice40/ff_map.v:22.66-22.119" + "src": "top.v:249.12-258.5|lvds_rx.v:39.5-82.8|/usr/local/bin/../share/yosys/ice40/ff_map.v:22.66-22.119" }, "port_directions": { "C": "input", @@ -14195,11 +14333,11 @@ "R": "input" }, "connections": { - "C": [ 217 ], - "D": [ 316 ], - "E": [ 219 ], - "Q": [ 317 ], - "R": [ 57 ] + "C": [ 200 ], + "D": [ 314 ], + "E": [ 202 ], + "Q": [ 315 ], + "R": [ 93 ] } }, "lvds_rx_09_inst.r_phase_count_SB_CARRY_CI": { @@ -14208,7 +14346,7 @@ "parameters": { }, "attributes": { - "src": "top.v:250.12-259.5|lvds_rx.v:63.42-63.59|/usr/local/bin/../share/yosys/ice40/arith_map.v:62.5-70.4" + "src": "top.v:249.12-258.5|lvds_rx.v:63.42-63.59|/usr/local/bin/../share/yosys/ice40/arith_map.v:62.5-70.4" }, "port_directions": { "CI": "input", @@ -14217,9 +14355,9 @@ "I1": "input" }, "connections": { - "CI": [ 318 ], - "CO": [ 319 ], - "I0": [ 320 ], + "CI": [ 316 ], + "CO": [ 317 ], + "I0": [ 318 ], "I1": [ "1" ] } }, @@ -14231,7 +14369,7 @@ }, "attributes": { "module_not_derived": "00000000000000000000000000000001", - "src": "top.v:250.12-259.5|lvds_rx.v:63.42-63.59|/usr/local/bin/../share/yosys/ice40/arith_map.v:62.5-70.4|/usr/local/bin/../share/yosys/ice40/cells_map.v:26.33-27.52" + "src": "top.v:249.12-258.5|lvds_rx.v:63.42-63.59|/usr/local/bin/../share/yosys/ice40/arith_map.v:62.5-70.4|/usr/local/bin/../share/yosys/ice40/cells_map.v:26.33-27.52" }, "port_directions": { "I0": "input", @@ -14242,10 +14380,10 @@ }, "connections": { "I0": [ "0" ], - "I1": [ 320 ], + "I1": [ 318 ], "I2": [ "1" ], - "I3": [ 318 ], - "O": [ 321 ] + "I3": [ 316 ], + "O": [ 319 ] } }, "lvds_rx_09_inst.r_phase_count_SB_LUT4_I1_O_SB_DFFNESR_Q": { @@ -14255,7 +14393,7 @@ }, "attributes": { "module_not_derived": "00000000000000000000000000000001", - "src": "top.v:250.12-259.5|lvds_rx.v:39.5-82.8|/usr/local/bin/../share/yosys/ice40/ff_map.v:22.66-22.119" + "src": "top.v:249.12-258.5|lvds_rx.v:39.5-82.8|/usr/local/bin/../share/yosys/ice40/ff_map.v:22.66-22.119" }, "port_directions": { "C": "input", @@ -14265,11 +14403,11 @@ "R": "input" }, "connections": { - "C": [ 217 ], - "D": [ 322 ], - "E": [ 323 ], - "Q": [ 324 ], - "R": [ 57 ] + "C": [ 200 ], + "D": [ 320 ], + "E": [ 321 ], + "Q": [ 322 ], + "R": [ 93 ] } }, "lvds_rx_09_inst.r_phase_count_SB_LUT4_I1_O_SB_DFFNESR_Q_D_SB_LUT4_O": { @@ -14292,12 +14430,37 @@ "connections": { "I0": [ "0" ], "I1": [ "0" ], - "I2": [ 325 ], - "I3": [ 324 ], - "O": [ 322 ] + "I2": [ 323 ], + "I3": [ 322 ], + "O": [ 320 ] } }, "lvds_rx_09_inst.r_phase_count_SB_LUT4_O": { + "hide_name": 0, + "type": "SB_LUT4", + "parameters": { + "LUT_INIT": "0000000011111111" + }, + "attributes": { + "module_not_derived": "00000000000000000000000000000001", + "src": "/usr/local/bin/../share/yosys/ice40/cells_map.v:12.34-13.52" + }, + "port_directions": { + "I0": "input", + "I1": "input", + "I2": "input", + "I3": "input", + "O": "output" + }, + "connections": { + "I0": [ "0" ], + "I1": [ "0" ], + "I2": [ "0" ], + "I3": [ 322 ], + "O": [ 316 ] + } + }, + "lvds_rx_09_inst.r_phase_count_SB_LUT4_O_1": { "hide_name": 0, "type": "SB_LUT4", "parameters": { @@ -14322,31 +14485,6 @@ "O": [ 318 ] } }, - "lvds_rx_09_inst.r_phase_count_SB_LUT4_O_1": { - "hide_name": 0, - "type": "SB_LUT4", - "parameters": { - "LUT_INIT": "0000000011111111" - }, - "attributes": { - "module_not_derived": "00000000000000000000000000000001", - "src": "/usr/local/bin/../share/yosys/ice40/cells_map.v:12.34-13.52" - }, - "port_directions": { - "I0": "input", - "I1": "input", - "I2": "input", - "I3": "input", - "O": "output" - }, - "connections": { - "I0": [ "0" ], - "I1": [ "0" ], - "I2": [ "0" ], - "I3": [ 326 ], - "O": [ 320 ] - } - }, "lvds_rx_09_inst.r_push_SB_DFFNESR_Q": { "hide_name": 0, "type": "SB_DFFNESR", @@ -14354,7 +14492,7 @@ }, "attributes": { "module_not_derived": "00000000000000000000000000000001", - "src": "top.v:250.12-259.5|lvds_rx.v:39.5-82.8|/usr/local/bin/../share/yosys/ice40/ff_map.v:22.66-22.119" + "src": "top.v:249.12-258.5|lvds_rx.v:39.5-82.8|/usr/local/bin/../share/yosys/ice40/ff_map.v:22.66-22.119" }, "port_directions": { "C": "input", @@ -14364,11 +14502,11 @@ "R": "input" }, "connections": { - "C": [ 217 ], - "D": [ 327 ], - "E": [ 328 ], - "Q": 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- "E": [ 346 ], - "Q": [ 359 ], - "R": [ 57 ] + "C": [ 200 ], + "D": [ 381 ], + "E": [ 369 ], + "Q": [ 382 ], + "R": [ 93 ] } }, "lvds_rx_24_inst.r_data_SB_DFFNESR_Q_15": { @@ -14917,7 +15380,7 @@ }, "attributes": { "module_not_derived": "00000000000000000000000000000001", - "src": "top.v:274.12-283.5|lvds_rx.v:39.5-82.8|/usr/local/bin/../share/yosys/ice40/ff_map.v:22.66-22.119" + "src": "top.v:273.12-282.5|lvds_rx.v:39.5-82.8|/usr/local/bin/../share/yosys/ice40/ff_map.v:22.66-22.119" }, "port_directions": { "C": "input", @@ -14927,11 +15390,11 @@ "R": "input" }, "connections": { - "C": [ 217 ], - "D": [ 360 ], - "E": [ 346 ], - "Q": [ 361 ], - "R": [ 57 ] + "C": [ 200 ], + "D": [ 383 ], + "E": [ 369 ], + "Q": [ 384 ], + "R": [ 93 ] } }, "lvds_rx_24_inst.r_data_SB_DFFNESR_Q_16": { @@ -14941,7 +15404,7 @@ }, "attributes": { "module_not_derived": "00000000000000000000000000000001", - "src": "top.v:274.12-283.5|lvds_rx.v:39.5-82.8|/usr/local/bin/../share/yosys/ice40/ff_map.v:22.66-22.119" + "src": "top.v:273.12-282.5|lvds_rx.v:39.5-82.8|/usr/local/bin/../share/yosys/ice40/ff_map.v:22.66-22.119" }, "port_directions": { "C": "input", @@ -14951,11 +15414,11 @@ "R": "input" }, "connections": { - "C": [ 217 ], - "D": [ 362 ], - "E": [ 346 ], - "Q": [ 363 ], - "R": [ 57 ] + "C": [ 200 ], + "D": [ 385 ], + "E": [ 369 ], + "Q": [ 386 ], + "R": [ 93 ] } }, "lvds_rx_24_inst.r_data_SB_DFFNESR_Q_17": { @@ -14965,7 +15428,7 @@ }, "attributes": { "module_not_derived": "00000000000000000000000000000001", - "src": "top.v:274.12-283.5|lvds_rx.v:39.5-82.8|/usr/local/bin/../share/yosys/ice40/ff_map.v:22.66-22.119" + "src": "top.v:273.12-282.5|lvds_rx.v:39.5-82.8|/usr/local/bin/../share/yosys/ice40/ff_map.v:22.66-22.119" }, "port_directions": { "C": "input", @@ -14975,11 +15438,11 @@ "R": "input" }, "connections": { - "C": [ 217 ], - "D": [ 364 ], - "E": [ 346 ], - "Q": [ 365 ], - "R": [ 57 ] + "C": [ 200 ], + "D": [ 387 ], + "E": [ 369 ], + "Q": [ 388 ], + "R": [ 93 ] } }, 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"port_directions": { "C": "input", @@ -15023,11 +15486,11 @@ "R": "input" }, "connections": { - "C": [ 217 ], - "D": [ 368 ], - "E": [ 346 ], - "Q": [ 369 ], - "R": [ 57 ] + "C": [ 200 ], + "D": [ 391 ], + "E": [ 369 ], + "Q": [ 392 ], + "R": [ 93 ] } }, "lvds_rx_24_inst.r_data_SB_DFFNESR_Q_2": { @@ -15037,7 +15500,7 @@ }, "attributes": { "module_not_derived": "00000000000000000000000000000001", - "src": "top.v:274.12-283.5|lvds_rx.v:39.5-82.8|/usr/local/bin/../share/yosys/ice40/ff_map.v:22.66-22.119" + "src": "top.v:273.12-282.5|lvds_rx.v:39.5-82.8|/usr/local/bin/../share/yosys/ice40/ff_map.v:22.66-22.119" }, "port_directions": { "C": "input", @@ -15047,11 +15510,11 @@ "R": "input" }, "connections": { - "C": [ 217 ], - "D": [ 370 ], - "E": [ 346 ], - "Q": [ 371 ], - "R": [ 57 ] + "C": [ 200 ], + "D": [ 393 ], + "E": [ 369 ], + "Q": [ 394 ], + "R": [ 93 ] } }, "lvds_rx_24_inst.r_data_SB_DFFNESR_Q_20": { @@ -15061,7 +15524,7 @@ }, "attributes": { "module_not_derived": "00000000000000000000000000000001", - "src": "top.v:274.12-283.5|lvds_rx.v:39.5-82.8|/usr/local/bin/../share/yosys/ice40/ff_map.v:22.66-22.119" + "src": "top.v:273.12-282.5|lvds_rx.v:39.5-82.8|/usr/local/bin/../share/yosys/ice40/ff_map.v:22.66-22.119" }, "port_directions": { "C": "input", @@ -15071,11 +15534,11 @@ "R": "input" }, "connections": { - "C": [ 217 ], - "D": [ 372 ], - "E": [ 346 ], - "Q": [ 373 ], - "R": [ 57 ] + "C": [ 200 ], + "D": [ 395 ], + "E": [ 369 ], + "Q": [ 396 ], + "R": [ 93 ] } }, "lvds_rx_24_inst.r_data_SB_DFFNESR_Q_21": { @@ -15085,7 +15548,7 @@ }, "attributes": { "module_not_derived": "00000000000000000000000000000001", - "src": "top.v:274.12-283.5|lvds_rx.v:39.5-82.8|/usr/local/bin/../share/yosys/ice40/ff_map.v:22.66-22.119" + "src": "top.v:273.12-282.5|lvds_rx.v:39.5-82.8|/usr/local/bin/../share/yosys/ice40/ff_map.v:22.66-22.119" }, "port_directions": { "C": "input", @@ -15095,11 +15558,11 @@ "R": "input" }, "connections": { - "C": [ 217 ], - "D": [ 374 ], - "E": [ 346 ], - "Q": [ 375 ], - "R": [ 57 ] + "C": [ 200 ], + "D": [ 397 ], + "E": [ 369 ], + "Q": [ 398 ], + "R": [ 93 ] } }, "lvds_rx_24_inst.r_data_SB_DFFNESR_Q_22": { @@ -15109,7 +15572,7 @@ }, "attributes": { "module_not_derived": "00000000000000000000000000000001", - "src": "top.v:274.12-283.5|lvds_rx.v:39.5-82.8|/usr/local/bin/../share/yosys/ice40/ff_map.v:22.66-22.119" + "src": "top.v:273.12-282.5|lvds_rx.v:39.5-82.8|/usr/local/bin/../share/yosys/ice40/ff_map.v:22.66-22.119" }, "port_directions": { "C": "input", @@ -15119,11 +15582,11 @@ "R": "input" }, "connections": { - "C": [ 217 ], - "D": [ 376 ], - "E": [ 346 ], - "Q": [ 377 ], - "R": [ 57 ] + "C": [ 200 ], + "D": [ 399 ], + "E": [ 369 ], + "Q": [ 400 ], + "R": [ 93 ] } }, "lvds_rx_24_inst.r_data_SB_DFFNESR_Q_23": { @@ -15133,7 +15596,7 @@ }, "attributes": { "module_not_derived": "00000000000000000000000000000001", - "src": "top.v:274.12-283.5|lvds_rx.v:39.5-82.8|/usr/local/bin/../share/yosys/ice40/ff_map.v:22.66-22.119" + "src": "top.v:273.12-282.5|lvds_rx.v:39.5-82.8|/usr/local/bin/../share/yosys/ice40/ff_map.v:22.66-22.119" }, "port_directions": { "C": "input", @@ -15143,11 +15606,11 @@ "R": "input" }, "connections": { - "C": [ 217 ], - "D": [ 378 ], - "E": [ 346 ], - "Q": [ 379 ], - "R": [ 57 ] + "C": [ 200 ], + "D": [ 401 ], + "E": [ 369 ], + "Q": [ 402 ], + "R": [ 93 ] } }, "lvds_rx_24_inst.r_data_SB_DFFNESR_Q_24": { @@ -15157,7 +15620,7 @@ }, "attributes": { "module_not_derived": "00000000000000000000000000000001", - "src": "top.v:274.12-283.5|lvds_rx.v:39.5-82.8|/usr/local/bin/../share/yosys/ice40/ff_map.v:22.66-22.119" + "src": "top.v:273.12-282.5|lvds_rx.v:39.5-82.8|/usr/local/bin/../share/yosys/ice40/ff_map.v:22.66-22.119" }, "port_directions": { "C": "input", @@ -15167,11 +15630,11 @@ "R": "input" }, "connections": { - "C": [ 217 ], - "D": [ 380 ], - "E": [ 346 ], - "Q": [ 381 ], - "R": [ 57 ] + "C": [ 200 ], + "D": [ 403 ], + "E": [ 369 ], + "Q": [ 404 ], + "R": [ 93 ] } }, "lvds_rx_24_inst.r_data_SB_DFFNESR_Q_25": { @@ -15181,7 +15644,7 @@ }, "attributes": { "module_not_derived": "00000000000000000000000000000001", - "src": "top.v:274.12-283.5|lvds_rx.v:39.5-82.8|/usr/local/bin/../share/yosys/ice40/ff_map.v:22.66-22.119" + "src": "top.v:273.12-282.5|lvds_rx.v:39.5-82.8|/usr/local/bin/../share/yosys/ice40/ff_map.v:22.66-22.119" }, "port_directions": { "C": "input", @@ -15191,11 +15654,11 @@ "R": "input" }, "connections": { - "C": [ 217 ], - "D": [ 382 ], - "E": [ 346 ], - "Q": [ 383 ], - "R": [ 57 ] + "C": [ 200 ], + "D": [ 405 ], + "E": [ 369 ], + "Q": [ 406 ], + "R": [ 93 ] } }, "lvds_rx_24_inst.r_data_SB_DFFNESR_Q_26": { @@ -15205,7 +15668,7 @@ }, "attributes": { "module_not_derived": "00000000000000000000000000000001", - "src": "top.v:274.12-283.5|lvds_rx.v:39.5-82.8|/usr/local/bin/../share/yosys/ice40/ff_map.v:22.66-22.119" + "src": "top.v:273.12-282.5|lvds_rx.v:39.5-82.8|/usr/local/bin/../share/yosys/ice40/ff_map.v:22.66-22.119" }, "port_directions": { "C": "input", @@ -15215,11 +15678,11 @@ "R": "input" }, "connections": { - "C": [ 217 ], - "D": [ 384 ], - "E": [ 346 ], - "Q": [ 385 ], - "R": [ 57 ] + "C": [ 200 ], + "D": [ 407 ], + "E": [ 369 ], + "Q": [ 408 ], + "R": [ 93 ] } }, "lvds_rx_24_inst.r_data_SB_DFFNESR_Q_27": { @@ -15229,7 +15692,7 @@ }, "attributes": { "module_not_derived": "00000000000000000000000000000001", - "src": "top.v:274.12-283.5|lvds_rx.v:39.5-82.8|/usr/local/bin/../share/yosys/ice40/ff_map.v:22.66-22.119" + "src": "top.v:273.12-282.5|lvds_rx.v:39.5-82.8|/usr/local/bin/../share/yosys/ice40/ff_map.v:22.66-22.119" }, "port_directions": { "C": "input", @@ -15239,11 +15702,11 @@ "R": "input" }, "connections": { - "C": [ 217 ], - "D": [ 386 ], - "E": [ 346 ], - "Q": [ 387 ], - "R": [ 57 ] + "C": [ 200 ], + "D": [ 409 ], + "E": [ 369 ], + "Q": [ 410 ], + "R": [ 93 ] } }, "lvds_rx_24_inst.r_data_SB_DFFNESR_Q_28": { @@ -15253,7 +15716,7 @@ }, "attributes": { "module_not_derived": "00000000000000000000000000000001", - "src": "top.v:274.12-283.5|lvds_rx.v:39.5-82.8|/usr/local/bin/../share/yosys/ice40/ff_map.v:22.66-22.119" + "src": "top.v:273.12-282.5|lvds_rx.v:39.5-82.8|/usr/local/bin/../share/yosys/ice40/ff_map.v:22.66-22.119" }, "port_directions": { "C": "input", @@ -15263,11 +15726,11 @@ "R": "input" }, "connections": { - "C": [ 217 ], - "D": [ 388 ], - "E": [ 346 ], - "Q": [ 389 ], - "R": [ 57 ] + "C": [ 200 ], + "D": [ 411 ], + "E": [ 369 ], + "Q": [ 412 ], + "R": [ 93 ] } }, "lvds_rx_24_inst.r_data_SB_DFFNESR_Q_29": { @@ -15277,7 +15740,7 @@ }, "attributes": { "module_not_derived": "00000000000000000000000000000001", - "src": "top.v:274.12-283.5|lvds_rx.v:39.5-82.8|/usr/local/bin/../share/yosys/ice40/ff_map.v:22.66-22.119" + "src": "top.v:273.12-282.5|lvds_rx.v:39.5-82.8|/usr/local/bin/../share/yosys/ice40/ff_map.v:22.66-22.119" }, "port_directions": { "C": "input", @@ -15287,11 +15750,11 @@ "R": "input" }, "connections": { - "C": [ 217 ], - "D": [ 390 ], - "E": [ 346 ], - "Q": [ 391 ], - "R": [ 57 ] + "C": [ 200 ], + "D": [ 413 ], + "E": [ 369 ], + "Q": [ 414 ], + "R": [ 93 ] } }, "lvds_rx_24_inst.r_data_SB_DFFNESR_Q_3": { @@ -15301,7 +15764,7 @@ }, "attributes": { "module_not_derived": "00000000000000000000000000000001", - "src": "top.v:274.12-283.5|lvds_rx.v:39.5-82.8|/usr/local/bin/../share/yosys/ice40/ff_map.v:22.66-22.119" + "src": "top.v:273.12-282.5|lvds_rx.v:39.5-82.8|/usr/local/bin/../share/yosys/ice40/ff_map.v:22.66-22.119" }, "port_directions": { "C": "input", @@ -15311,11 +15774,11 @@ "R": "input" }, "connections": { - "C": [ 217 ], - "D": [ 392 ], - "E": [ 346 ], - "Q": [ 393 ], - "R": [ 57 ] + "C": [ 200 ], + "D": [ 415 ], + "E": [ 369 ], + "Q": [ 416 ], + "R": [ 93 ] } }, "lvds_rx_24_inst.r_data_SB_DFFNESR_Q_30": { @@ -15325,7 +15788,7 @@ }, "attributes": { "module_not_derived": "00000000000000000000000000000001", - "src": "top.v:274.12-283.5|lvds_rx.v:39.5-82.8|/usr/local/bin/../share/yosys/ice40/ff_map.v:22.66-22.119" + "src": "top.v:273.12-282.5|lvds_rx.v:39.5-82.8|/usr/local/bin/../share/yosys/ice40/ff_map.v:22.66-22.119" }, "port_directions": { "C": "input", @@ -15335,11 +15798,11 @@ "R": "input" }, "connections": { - "C": [ 217 ], - "D": [ 394 ], - "E": [ 346 ], - "Q": [ 395 ], - "R": [ 57 ] + "C": [ 200 ], + "D": [ 417 ], + "E": [ 369 ], + "Q": [ 418 ], + "R": [ 93 ] } }, "lvds_rx_24_inst.r_data_SB_DFFNESR_Q_31": { @@ -15349,7 +15812,7 @@ }, "attributes": { "module_not_derived": "00000000000000000000000000000001", - "src": "top.v:274.12-283.5|lvds_rx.v:39.5-82.8|/usr/local/bin/../share/yosys/ice40/ff_map.v:22.66-22.119" + "src": "top.v:273.12-282.5|lvds_rx.v:39.5-82.8|/usr/local/bin/../share/yosys/ice40/ff_map.v:22.66-22.119" }, "port_directions": { "C": "input", @@ -15359,11 +15822,11 @@ "R": "input" }, "connections": { - "C": [ 217 ], - "D": [ 396 ], - "E": [ 346 ], - "Q": [ 397 ], - "R": [ 57 ] + "C": [ 200 ], + "D": [ 419 ], + "E": [ 369 ], + "Q": [ 420 ], + "R": [ 93 ] } }, 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520 ], + "I3": [ 329 ], + "O": [ 527 ] } }, "rx_09_fifo.full_o_SB_LUT4_I3_O_SB_LUT4_I3": { @@ -16924,11 +17450,11 @@ "O": "output" }, "connections": { - "I0": [ 485 ], - "I1": [ 510 ], - "I2": [ 511 ], - "I3": [ 509 ], - "O": [ 512 ] + "I0": [ 525 ], + "I1": [ 528 ], + "I2": [ 529 ], + "I3": [ 527 ], + "O": [ 530 ] } }, "rx_09_fifo.full_o_SB_LUT4_I3_O_SB_LUT4_I3_O_SB_LUT4_I0": { @@ -16949,11 +17475,11 @@ "O": "output" }, "connections": { - "I0": [ 513 ], - "I1": [ 514 ], - "I2": [ 512 ], - "I3": [ 515 ], - "O": [ 476 ] + "I0": [ 531 ], + "I1": [ 530 ], + "I2": [ 532 ], + "I3": [ 533 ], + "O": [ 515 ] } }, "rx_09_fifo.full_o_SB_LUT4_I3_O_SB_LUT4_I3_O_SB_LUT4_O": { @@ -16974,11 +17500,11 @@ "O": "output" }, "connections": { - "I0": [ 498 ], - "I1": [ 516 ], - "I2": [ 517 ], - "I3": [ 483 ], - "O": [ 514 ] + "I0": [ 351 ], + "I1": [ 534 ], + "I2": [ 344 ], + "I3": [ 535 ], + "O": [ 531 ] } }, "rx_09_fifo.full_o_SB_LUT4_I3_O_SB_LUT4_I3_O_SB_LUT4_O_1": { @@ -16999,11 +17525,11 @@ "O": "output" }, "connections": { - "I0": [ 501 ], - "I1": [ 518 ], - "I2": [ 519 ], - "I3": [ 504 ], - "O": [ 513 ] + "I0": [ 517 ], + "I1": [ 536 ], + "I2": [ 537 ], + "I3": [ 352 ], + "O": [ 533 ] } }, "rx_09_fifo.full_o_SB_LUT4_I3_O_SB_LUT4_I3_O_SB_LUT4_O_2": { @@ -17024,11 +17550,11 @@ "O": "output" }, "connections": { - "I0": [ 502 ], - "I1": [ 520 ], - "I2": [ 521 ], - "I3": [ 505 ], - "O": [ 515 ] + "I0": [ 523 ], + "I1": [ 538 ], + "I2": [ 539 ], + "I3": [ 347 ], + "O": [ 532 ] } }, "rx_09_fifo.ram256x16_i_inst": { @@ -17057,7 +17583,7 @@ "attributes": { "hdlname": "rx_09_fifo ram256x16_i_inst", "module_not_derived": "00000000000000000000000000000001", - "src": "top.v:261.17-272.5|complex_fifo.v:105.3-116.22" + "src": "top.v:260.17-271.5|complex_fifo.v:105.3-116.22" }, "port_directions": { "MASK": "input", @@ -17074,16 +17600,16 @@ }, "connections": { "MASK": [ "1", "1", "1", "1", "1", "1", "1", "1", "1", "1", "1", "1", "1", "1", "1", "1" ], - "RADDR": [ 247, 245, 233, 234, 243, 240, 238, 236, "0", "0", "0" ], - "RCLK": [ 113 ], + "RADDR": [ 232, 240, 237, 238, 235, 236, 212, 243, "0", "0", "0" ], + "RCLK": [ 89 ], "RCLKE": [ "1" ], - "RDATA": [ 522, 523, 111, 524, 525, 526, 527, 528, 529, 530, 100, 531, 532, 533, 534, 535 ], - "RE": [ 227 ], - "WADDR": [ 500, 478, 496, 494, 492, 490, 487, 536, "0", "0", "0" ], - "WCLK": [ 217 ], + "RDATA": [ 540, 541, 542, 543, 544, 545, 546, 547, 548, 549, 550, 551, 552, 553, 554, 555 ], + "RE": [ 556 ], + "WADDR": [ 350, 345, 364, 361, 358, 356, 354, 557, "0", "0", "0" ], + "WCLK": [ 200 ], "WCLKE": [ "1" ], - "WDATA": [ 277, 275, 273, 271, 269, 267, 317, 315, 313, 311, 309, 307, 305, 287, 265, 263 ], - "WE": [ 329 ] + "WDATA": [ 275, 273, 271, 269, 267, 265, 315, 313, 311, 309, 307, 305, 303, 285, 263, 261 ], + "WE": [ 327 ] } }, "rx_09_fifo.ram256x16_q_inst": { @@ -17112,7 +17638,7 @@ "attributes": { "hdlname": "rx_09_fifo ram256x16_q_inst", "module_not_derived": "00000000000000000000000000000001", - "src": "top.v:261.17-272.5|complex_fifo.v:137.3-148.22" + "src": "top.v:260.17-271.5|complex_fifo.v:137.3-148.22" }, "port_directions": { "MASK": "input", @@ -17129,16 +17655,16 @@ }, "connections": { "MASK": [ "1", "1", "1", "1", "1", "1", "1", "1", "1", "1", "1", "1", "1", "1", "1", "1" ], - "RADDR": [ 247, 245, 233, 234, 243, 240, 238, 236, "0", "0", "0" ], - "RCLK": [ 113 ], + "RADDR": [ 232, 240, 237, 238, 235, 236, 212, 243, "0", "0", "0" ], + "RCLK": [ 89 ], "RCLKE": [ "1" ], - "RDATA": [ 78, 537, 110, 538, 539, 540, 541, 542, 543, 544, 99, 545, 546, 547, 548, 549 ], - "RE": [ 227 ], - "WADDR": [ 500, 478, 496, 494, 492, 490, 487, 536, "0", "0", "0" ], - "WCLK": [ 217 ], + "RDATA": [ 68, 558, 559, 560, 561, 562, 563, 564, 565, 566, 567, 568, 569, 570, 571, 572 ], + "RE": [ 556 ], + "WADDR": [ 350, 345, 364, 361, 358, 356, 354, 557, "0", "0", "0" ], + "WCLK": [ 200 ], "WCLKE": [ "1" ], - "WDATA": [ 303, 301, 24, 25, 26, 27, 299, 297, 295, 293, 291, 289, 285, 283, 281, 279 ], - "WE": [ 329 ] + "WDATA": [ 301, 299, 22, 23, 24, 25, 297, 295, 293, 291, 289, 287, 283, 281, 279, 277 ], + "WE": [ 327 ] } }, "rx_09_fifo.rd_addr_SB_DFFESR_Q": { @@ -17148,7 +17674,7 @@ }, "attributes": { "module_not_derived": "00000000000000000000000000000001", - "src": "top.v:261.17-272.5|complex_fifo.v:61.1-69.4|/usr/local/bin/../share/yosys/ice40/ff_map.v:24.66-24.119" + "src": "top.v:260.17-271.5|complex_fifo.v:61.1-69.4|/usr/local/bin/../share/yosys/ice40/ff_map.v:24.66-24.119" }, "port_directions": { "C": "input", @@ -17158,11 +17684,11 @@ "R": "input" }, "connections": { - "C": [ 113 ], - "D": [ 550 ], - "E": [ 551 ], - "Q": [ 238 ], - "R": [ 57 ] + "C": [ 89 ], + "D": [ 226 ], + "E": [ 573 ], + "Q": [ 212 ], + "R": [ 93 ] } }, "rx_09_fifo.rd_addr_SB_DFFESR_Q_1": { @@ -17172,7 +17698,7 @@ }, "attributes": { "module_not_derived": "00000000000000000000000000000001", - "src": "top.v:261.17-272.5|complex_fifo.v:61.1-69.4|/usr/local/bin/../share/yosys/ice40/ff_map.v:24.66-24.119" + "src": "top.v:260.17-271.5|complex_fifo.v:61.1-69.4|/usr/local/bin/../share/yosys/ice40/ff_map.v:24.66-24.119" }, "port_directions": { "C": "input", @@ -17182,11 +17708,11 @@ "R": "input" }, "connections": { - "C": [ 113 ], - "D": [ 552 ], - "E": [ 551 ], - "Q": [ 240 ], - "R": [ 57 ] + "C": [ 89 ], + "D": [ 224 ], + "E": [ 573 ], + "Q": [ 236 ], + "R": [ 93 ] } }, "rx_09_fifo.rd_addr_SB_DFFESR_Q_2": { @@ -17196,7 +17722,7 @@ }, "attributes": { "module_not_derived": "00000000000000000000000000000001", - "src": "top.v:261.17-272.5|complex_fifo.v:61.1-69.4|/usr/local/bin/../share/yosys/ice40/ff_map.v:24.66-24.119" + "src": "top.v:260.17-271.5|complex_fifo.v:61.1-69.4|/usr/local/bin/../share/yosys/ice40/ff_map.v:24.66-24.119" }, "port_directions": { "C": "input", @@ -17206,11 +17732,11 @@ "R": "input" }, "connections": { - "C": [ 113 ], - "D": [ 553 ], - "E": [ 551 ], - "Q": [ 243 ], - "R": [ 57 ] + "C": [ 89 ], + "D": [ 219 ], + "E": [ 573 ], + "Q": [ 235 ], + "R": [ 93 ] } }, "rx_09_fifo.rd_addr_SB_DFFESR_Q_3": { @@ -17220,7 +17746,7 @@ }, "attributes": { "module_not_derived": "00000000000000000000000000000001", - "src": "top.v:261.17-272.5|complex_fifo.v:61.1-69.4|/usr/local/bin/../share/yosys/ice40/ff_map.v:24.66-24.119" + "src": "top.v:260.17-271.5|complex_fifo.v:61.1-69.4|/usr/local/bin/../share/yosys/ice40/ff_map.v:24.66-24.119" }, "port_directions": { "C": "input", @@ -17230,11 +17756,11 @@ "R": "input" }, "connections": { - "C": [ 113 ], - "D": [ 554 ], - "E": [ 551 ], - "Q": [ 234 ], - "R": [ 57 ] + "C": [ 89 ], + "D": [ 228 ], + "E": [ 573 ], + "Q": [ 238 ], + "R": [ 93 ] } }, "rx_09_fifo.rd_addr_SB_DFFESR_Q_4": { @@ -17244,7 +17770,7 @@ }, "attributes": { "module_not_derived": "00000000000000000000000000000001", - "src": "top.v:261.17-272.5|complex_fifo.v:61.1-69.4|/usr/local/bin/../share/yosys/ice40/ff_map.v:24.66-24.119" + "src": "top.v:260.17-271.5|complex_fifo.v:61.1-69.4|/usr/local/bin/../share/yosys/ice40/ff_map.v:24.66-24.119" }, "port_directions": { "C": "input", @@ -17254,11 +17780,11 @@ "R": "input" }, "connections": { - "C": [ 113 ], - "D": [ 555 ], - "E": [ 551 ], - "Q": [ 233 ], - "R": [ 57 ] + "C": [ 89 ], + "D": [ 231 ], + "E": [ 573 ], + "Q": [ 237 ], + "R": [ 93 ] } }, "rx_09_fifo.rd_addr_SB_DFFESR_Q_5": { @@ -17268,7 +17794,7 @@ }, "attributes": { "module_not_derived": "00000000000000000000000000000001", - "src": "top.v:261.17-272.5|complex_fifo.v:61.1-69.4|/usr/local/bin/../share/yosys/ice40/ff_map.v:24.66-24.119" + "src": "top.v:260.17-271.5|complex_fifo.v:61.1-69.4|/usr/local/bin/../share/yosys/ice40/ff_map.v:24.66-24.119" }, "port_directions": { "C": "input", @@ -17278,11 +17804,11 @@ "R": "input" }, "connections": { - "C": [ 113 ], - "D": [ 556 ], - "E": [ 551 ], - "Q": [ 245 ], - "R": [ 57 ] + "C": [ 89 ], + "D": [ 230 ], + "E": [ 573 ], + "Q": [ 240 ], + "R": [ 93 ] } }, "rx_09_fifo.rd_addr_SB_DFFESR_Q_6": { @@ -17292,7 +17818,7 @@ }, "attributes": { "module_not_derived": "00000000000000000000000000000001", - "src": "top.v:261.17-272.5|complex_fifo.v:61.1-69.4|/usr/local/bin/../share/yosys/ice40/ff_map.v:24.66-24.119" + "src": "top.v:260.17-271.5|complex_fifo.v:61.1-69.4|/usr/local/bin/../share/yosys/ice40/ff_map.v:24.66-24.119" }, "port_directions": { "C": "input", @@ -17302,11 +17828,11 @@ "R": "input" }, "connections": { - "C": [ 113 ], - "D": [ 557 ], - "E": [ 551 ], - "Q": [ 247 ], - "R": [ 57 ] + "C": [ 89 ], + "D": [ 574 ], + "E": [ 573 ], + "Q": [ 232 ], + "R": [ 93 ] } }, "rx_09_fifo.rd_addr_gray_SB_DFFESR_Q": { @@ -17316,7 +17842,7 @@ }, "attributes": { "module_not_derived": "00000000000000000000000000000001", - "src": "top.v:261.17-272.5|complex_fifo.v:61.1-69.4|/usr/local/bin/../share/yosys/ice40/ff_map.v:24.66-24.119" + "src": "top.v:260.17-271.5|complex_fifo.v:61.1-69.4|/usr/local/bin/../share/yosys/ice40/ff_map.v:24.66-24.119" }, "port_directions": { "C": "input", @@ -17326,11 +17852,11 @@ "R": "input" }, "connections": { - "C": [ 113 ], - "D": [ 558 ], - "E": [ 551 ], - "Q": [ 236 ], - "R": [ 57 ] + "C": [ 89 ], + "D": [ 575 ], + "E": [ 573 ], + "Q": [ 243 ], + "R": [ 93 ] } }, "rx_09_fifo.rd_addr_gray_SB_DFFESR_Q_1": { @@ -17340,7 +17866,7 @@ }, "attributes": { "module_not_derived": "00000000000000000000000000000001", - "src": "top.v:261.17-272.5|complex_fifo.v:61.1-69.4|/usr/local/bin/../share/yosys/ice40/ff_map.v:24.66-24.119" + "src": "top.v:260.17-271.5|complex_fifo.v:61.1-69.4|/usr/local/bin/../share/yosys/ice40/ff_map.v:24.66-24.119" }, "port_directions": { "C": "input", @@ -17350,11 +17876,36 @@ "R": "input" }, "connections": { - "C": [ 113 ], - "D": [ 559 ], - "E": [ 551 ], - "Q": [ 560 ], - "R": [ 57 ] + "C": [ 89 ], + "D": [ 576 ], + "E": [ 573 ], + "Q": [ 577 ], + "R": [ 93 ] + } + }, + "rx_09_fifo.rd_addr_gray_SB_DFFESR_Q_1_D_SB_LUT4_I0": { + "hide_name": 0, + "type": "SB_LUT4", + "parameters": { + "LUT_INIT": "0100000100000000" + }, + "attributes": { + "module_not_derived": "00000000000000000000000000000001", + "src": "/usr/local/bin/../share/yosys/ice40/cells_map.v:26.33-27.52" + }, + "port_directions": { + "I0": "input", + "I1": "input", + "I2": "input", + "I3": "input", + "O": "output" + }, + "connections": { + "I0": [ 578 ], + "I1": [ 576 ], + "I2": [ 244 ], + "I3": [ 579 ], + "O": [ 217 ] } }, "rx_09_fifo.rd_addr_gray_SB_DFFESR_Q_1_D_SB_LUT4_O": { @@ -17377,9 +17928,34 @@ "connections": { "I0": [ "0" ], "I1": [ "0" ], - "I2": [ 558 ], - "I3": [ 550 ], - "O": [ 559 ] + "I2": [ 575 ], + "I3": [ 226 ], + "O": [ 576 ] + } + }, + "rx_09_fifo.rd_addr_gray_SB_DFFESR_Q_1_D_SB_LUT4_O_1": { + "hide_name": 0, + "type": "SB_LUT4", + "parameters": { + "LUT_INIT": "1100001100111100" + }, + "attributes": { + "module_not_derived": "00000000000000000000000000000001", + "src": "/usr/local/bin/../share/yosys/ice40/cells_map.v:22.34-23.52" + }, + "port_directions": { + "I0": "input", + "I1": "input", + "I2": "input", + "I3": "input", + "O": "output" + }, + "connections": { + "I0": [ "0" ], + "I1": [ 239 ], + "I2": [ 231 ], + "I3": [ 228 ], + "O": [ 578 ] } }, "rx_09_fifo.rd_addr_gray_SB_DFFESR_Q_2": { @@ -17389,7 +17965,7 @@ }, "attributes": { "module_not_derived": "00000000000000000000000000000001", - "src": "top.v:261.17-272.5|complex_fifo.v:61.1-69.4|/usr/local/bin/../share/yosys/ice40/ff_map.v:24.66-24.119" + "src": "top.v:260.17-271.5|complex_fifo.v:61.1-69.4|/usr/local/bin/../share/yosys/ice40/ff_map.v:24.66-24.119" }, "port_directions": { "C": "input", @@ -17399,11 +17975,36 @@ "R": "input" }, "connections": { - "C": [ 113 ], - "D": [ 561 ], - "E": [ 551 ], - "Q": [ 562 ], - "R": [ 57 ] + "C": [ 89 ], + "D": [ 580 ], + "E": [ 573 ], + "Q": [ 581 ], + "R": [ 93 ] + } + }, + "rx_09_fifo.rd_addr_gray_SB_DFFESR_Q_2_D_SB_LUT4_O": { + "hide_name": 0, + "type": "SB_LUT4", + "parameters": { + "LUT_INIT": "0000111111110000" + }, + "attributes": { + "module_not_derived": "00000000000000000000000000000001", + "src": "/usr/local/bin/../share/yosys/ice40/cells_map.v:17.34-18.52" + }, + "port_directions": { + "I0": "input", + "I1": "input", + "I2": "input", + "I3": "input", + "O": "output" + }, + "connections": { + "I0": [ "0" ], + "I1": [ "0" ], + "I2": [ 224 ], + "I3": [ 226 ], + "O": [ 580 ] } }, "rx_09_fifo.rd_addr_gray_SB_DFFESR_Q_3": { @@ -17413,7 +18014,7 @@ }, "attributes": { "module_not_derived": "00000000000000000000000000000001", - "src": "top.v:261.17-272.5|complex_fifo.v:61.1-69.4|/usr/local/bin/../share/yosys/ice40/ff_map.v:24.66-24.119" + "src": "top.v:260.17-271.5|complex_fifo.v:61.1-69.4|/usr/local/bin/../share/yosys/ice40/ff_map.v:24.66-24.119" }, "port_directions": { "C": "input", @@ -17423,11 +18024,11 @@ "R": "input" }, "connections": { - "C": [ 113 ], - "D": [ 563 ], - "E": [ 551 ], - "Q": [ 564 ], - "R": [ 57 ] + "C": [ 89 ], + "D": [ 582 ], + "E": [ 573 ], + "Q": [ 583 ], + "R": [ 93 ] } }, "rx_09_fifo.rd_addr_gray_SB_DFFESR_Q_3_D_SB_LUT4_O": { @@ -17450,9 +18051,9 @@ "connections": { "I0": [ "0" ], "I1": [ "0" ], - "I2": [ 553 ], - "I3": [ 552 ], - "O": [ 563 ] + "I2": [ 219 ], + "I3": [ 224 ], + "O": [ 582 ] } }, "rx_09_fifo.rd_addr_gray_SB_DFFESR_Q_4": { @@ -17462,7 +18063,7 @@ }, "attributes": { "module_not_derived": "00000000000000000000000000000001", - "src": "top.v:261.17-272.5|complex_fifo.v:61.1-69.4|/usr/local/bin/../share/yosys/ice40/ff_map.v:24.66-24.119" + "src": "top.v:260.17-271.5|complex_fifo.v:61.1-69.4|/usr/local/bin/../share/yosys/ice40/ff_map.v:24.66-24.119" }, "port_directions": { "C": "input", @@ -17472,11 +18073,36 @@ "R": "input" }, "connections": { - "C": [ 113 ], - "D": [ 565 ], - "E": [ 551 ], - "Q": [ 566 ], - "R": [ 57 ] + "C": [ 89 ], + "D": [ 584 ], + "E": [ 573 ], + "Q": [ 585 ], + "R": [ 93 ] + } + }, + "rx_09_fifo.rd_addr_gray_SB_DFFESR_Q_4_D_SB_LUT4_O": { + "hide_name": 0, + "type": "SB_LUT4", + "parameters": { + "LUT_INIT": "0000111111110000" + }, + "attributes": { + "module_not_derived": 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"Q": "output" }, "connections": { - "C": [ 217 ], - "D": [ 591 ], - "Q": [ 501 ] + "C": [ 200 ], + "D": [ 605 ], + "Q": [ 351 ] } }, "rx_09_fifo.wr_addr_SB_DFFESR_Q": { @@ -18479,7 +18905,7 @@ }, "attributes": { "module_not_derived": "00000000000000000000000000000001", - "src": "top.v:261.17-272.5|complex_fifo.v:37.1-45.4|/usr/local/bin/../share/yosys/ice40/ff_map.v:24.66-24.119" + "src": "top.v:260.17-271.5|complex_fifo.v:37.1-45.4|/usr/local/bin/../share/yosys/ice40/ff_map.v:24.66-24.119" }, "port_directions": { "C": "input", @@ -18489,11 +18915,11 @@ "R": "input" }, "connections": { - "C": [ 217 ], - "D": [ 592 ], - "E": [ 341 ], - "Q": [ 487 ], - "R": [ 57 ] + "C": [ 200 ], + "D": [ 606 ], + "E": [ 343 ], + "Q": [ 354 ], + "R": [ 93 ] } }, "rx_09_fifo.wr_addr_SB_DFFESR_Q_1": { @@ -18503,7 +18929,7 @@ }, "attributes": { "module_not_derived": "00000000000000000000000000000001", - "src": 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"connections": { - "CI": [ 488 ], - "CO": [ 605 ], + "CI": [ 355 ], + "CO": [ 619 ], "I0": [ "0" ], - "I1": [ 487 ] + "I1": [ 354 ] } }, "rx_09_fifo.wr_addr_gray_SB_LUT4_I2_I3_SB_CARRY_CO_1": { @@ -19385,7 +19811,7 @@ "parameters": { }, "attributes": { - "src": "top.v:261.17-272.5|complex_fifo.v:57.23-57.34|/usr/local/bin/../share/yosys/ice40/arith_map.v:62.5-70.4" + "src": "top.v:260.17-271.5|complex_fifo.v:57.23-57.34|/usr/local/bin/../share/yosys/ice40/arith_map.v:62.5-70.4" }, "port_directions": { "CI": "input", @@ -19394,10 +19820,10 @@ "I1": "input" }, "connections": { - "CI": [ 491 ], - "CO": [ 488 ], + "CI": [ 357 ], + "CO": [ 355 ], "I0": [ "0" ], - "I1": [ 490 ] + "I1": [ 356 ] } }, "rx_09_fifo.wr_addr_gray_SB_LUT4_I2_I3_SB_CARRY_CO_2": { @@ -19406,7 +19832,7 @@ "parameters": { }, "attributes": { - "src": "top.v:261.17-272.5|complex_fifo.v:57.23-57.34|/usr/local/bin/../share/yosys/ice40/arith_map.v:62.5-70.4" + "src": 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"attributes": { - "src": "top.v:261.17-272.5|complex_fifo.v:57.23-57.34|/usr/local/bin/../share/yosys/ice40/arith_map.v:62.5-70.4" + "src": "top.v:260.17-271.5|complex_fifo.v:57.23-57.34|/usr/local/bin/../share/yosys/ice40/arith_map.v:62.5-70.4" }, "port_directions": { "CI": "input", @@ -19457,10 +19883,10 @@ "I1": "input" }, "connections": { - "CI": [ 478 ], - "CO": [ 495 ], + "CI": [ 345 ], + "CO": [ 362 ], "I0": [ "0" ], - "I1": [ 496 ] + "I1": [ 364 ] } }, "rx_09_fifo.wr_addr_gray_rd_SB_DFF_Q": { @@ -19470,7 +19896,7 @@ }, "attributes": { "module_not_derived": "00000000000000000000000000000001", - "src": "top.v:261.17-272.5|complex_fifo.v:72.1-75.4|/usr/local/bin/../share/yosys/ice40/ff_map.v:2.51-2.90" + "src": "top.v:260.17-271.5|complex_fifo.v:72.1-75.4|/usr/local/bin/../share/yosys/ice40/ff_map.v:2.51-2.90" }, "port_directions": { "C": "input", @@ -19478,9 +19904,9 @@ "Q": "output" }, "connections": { - "C": [ 113 ], - "D": [ 536 ], - "Q": [ 612 ] + "C": [ 89 ], + "D": [ 557 ], + "Q": [ 626 ] } }, "rx_09_fifo.wr_addr_gray_rd_SB_DFF_Q_1": { @@ -19490,7 +19916,7 @@ }, "attributes": { "module_not_derived": "00000000000000000000000000000001", - "src": "top.v:261.17-272.5|complex_fifo.v:72.1-75.4|/usr/local/bin/../share/yosys/ice40/ff_map.v:2.51-2.90" + "src": "top.v:260.17-271.5|complex_fifo.v:72.1-75.4|/usr/local/bin/../share/yosys/ice40/ff_map.v:2.51-2.90" }, "port_directions": { "C": "input", @@ -19498,9 +19924,9 @@ "Q": "output" }, "connections": { - "C": [ 113 ], - "D": [ 597 ], - "Q": [ 613 ] + "C": [ 89 ], + "D": [ 611 ], + "Q": [ 627 ] } }, "rx_09_fifo.wr_addr_gray_rd_SB_DFF_Q_2": { @@ -19510,7 +19936,7 @@ }, "attributes": { "module_not_derived": "00000000000000000000000000000001", - "src": "top.v:261.17-272.5|complex_fifo.v:72.1-75.4|/usr/local/bin/../share/yosys/ice40/ff_map.v:2.51-2.90" + "src": "top.v:260.17-271.5|complex_fifo.v:72.1-75.4|/usr/local/bin/../share/yosys/ice40/ff_map.v:2.51-2.90" }, "port_directions": { "C": "input", @@ -19518,9 +19944,9 @@ "Q": "output" }, "connections": { - "C": [ 113 ], - "D": [ 598 ], - "Q": [ 614 ] + "C": [ 89 ], + "D": [ 612 ], + "Q": [ 628 ] } }, "rx_09_fifo.wr_addr_gray_rd_SB_DFF_Q_3": { @@ -19530,7 +19956,7 @@ }, "attributes": { "module_not_derived": "00000000000000000000000000000001", - "src": "top.v:261.17-272.5|complex_fifo.v:72.1-75.4|/usr/local/bin/../share/yosys/ice40/ff_map.v:2.51-2.90" + "src": "top.v:260.17-271.5|complex_fifo.v:72.1-75.4|/usr/local/bin/../share/yosys/ice40/ff_map.v:2.51-2.90" }, "port_directions": { "C": "input", @@ -19538,9 +19964,9 @@ "Q": "output" }, "connections": { - "C": [ 113 ], - "D": [ 599 ], - "Q": [ 615 ] + "C": [ 89 ], + "D": [ 613 ], + "Q": [ 629 ] } }, "rx_09_fifo.wr_addr_gray_rd_SB_DFF_Q_4": { @@ -19550,7 +19976,7 @@ }, "attributes": { "module_not_derived": "00000000000000000000000000000001", - "src": "top.v:261.17-272.5|complex_fifo.v:72.1-75.4|/usr/local/bin/../share/yosys/ice40/ff_map.v:2.51-2.90" + "src": "top.v:260.17-271.5|complex_fifo.v:72.1-75.4|/usr/local/bin/../share/yosys/ice40/ff_map.v:2.51-2.90" }, "port_directions": { "C": "input", @@ -19558,9 +19984,9 @@ "Q": "output" }, "connections": { - "C": [ 113 ], - "D": [ 601 ], - "Q": [ 616 ] + "C": [ 89 ], + "D": [ 614 ], + "Q": [ 630 ] } }, "rx_09_fifo.wr_addr_gray_rd_SB_DFF_Q_5": { @@ -19570,7 +19996,7 @@ }, "attributes": { "module_not_derived": "00000000000000000000000000000001", - "src": "top.v:261.17-272.5|complex_fifo.v:72.1-75.4|/usr/local/bin/../share/yosys/ice40/ff_map.v:2.51-2.90" + "src": "top.v:260.17-271.5|complex_fifo.v:72.1-75.4|/usr/local/bin/../share/yosys/ice40/ff_map.v:2.51-2.90" }, "port_directions": { "C": "input", @@ -19578,9 +20004,9 @@ "Q": "output" }, "connections": { - "C": [ 113 ], - "D": [ 602 ], - "Q": [ 617 ] + "C": [ 89 ], + "D": [ 616 ], + "Q": [ 631 ] } }, "rx_09_fifo.wr_addr_gray_rd_SB_DFF_Q_6": { @@ -19590,7 +20016,7 @@ }, "attributes": { "module_not_derived": "00000000000000000000000000000001", - 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}, "rx_24_fifo.wr_addr_gray_SB_DFFESR_Q_6": { @@ -22287,7 +22563,7 @@ }, "attributes": { "module_not_derived": "00000000000000000000000000000001", - "src": "top.v:285.17-296.5|complex_fifo.v:37.1-45.4|/usr/local/bin/../share/yosys/ice40/ff_map.v:24.66-24.119" + "src": "top.v:284.17-295.5|complex_fifo.v:37.1-45.4|/usr/local/bin/../share/yosys/ice40/ff_map.v:24.66-24.119" }, "port_directions": { "C": "input", @@ -22297,11 +22573,11 @@ "R": "input" }, "connections": { - "C": [ 217 ], - "D": [ 756 ], - "E": [ 434 ], - "Q": [ 757 ], - "R": [ 57 ] + "C": [ 200 ], + "D": [ 659 ], + "E": [ 488 ], + "Q": [ 766 ], + "R": [ 93 ] } }, "rx_24_fifo.wr_addr_gray_SB_DFFESR_Q_6_D_SB_LUT4_O": { @@ -22324,9 +22600,34 @@ "connections": { "I0": [ "0" ], "I1": [ "0" ], - "I2": [ 670 ], - "I3": [ 668 ], - "O": [ 756 ] + "I2": [ 756 ], + "I3": [ 755 ], + "O": [ 659 ] + } + }, + "rx_24_fifo.wr_addr_gray_SB_DFFESR_Q_6_D_SB_LUT4_O_1": { + "hide_name": 0, + "type": "SB_LUT4", + "parameters": { + "LUT_INIT": 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"connections": { - "CI": [ 436 ], - "CO": [ 760 ], + "CI": [ 479 ], + "CO": [ 768 ], "I0": [ "0" ], - "I1": [ 435 ] + "I1": [ 478 ] } }, "rx_24_fifo.wr_addr_gray_SB_LUT4_I2_I3_SB_CARRY_CO_1": { @@ -22756,7 +23082,7 @@ "parameters": { }, "attributes": { - "src": "top.v:285.17-296.5|complex_fifo.v:57.23-57.34|/usr/local/bin/../share/yosys/ice40/arith_map.v:62.5-70.4" + "src": "top.v:284.17-295.5|complex_fifo.v:57.23-57.34|/usr/local/bin/../share/yosys/ice40/arith_map.v:62.5-70.4" }, "port_directions": { "CI": "input", @@ -22765,10 +23091,10 @@ "I1": "input" }, "connections": { - "CI": [ 439 ], - "CO": [ 436 ], + "CI": [ 481 ], + "CO": [ 479 ], "I0": [ "0" ], - "I1": [ 438 ] + "I1": [ 480 ] } }, "rx_24_fifo.wr_addr_gray_SB_LUT4_I2_I3_SB_CARRY_CO_2": { @@ -22777,7 +23103,7 @@ "parameters": { }, "attributes": { - "src": "top.v:285.17-296.5|complex_fifo.v:57.23-57.34|/usr/local/bin/../share/yosys/ice40/arith_map.v:62.5-70.4" + "src": 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+ "Q": [ 775 ] } }, "rx_24_fifo.wr_addr_gray_rd_SB_DFF_Q_1": { @@ -22861,7 +23187,7 @@ }, "attributes": { "module_not_derived": "00000000000000000000000000000001", - "src": "top.v:285.17-296.5|complex_fifo.v:72.1-75.4|/usr/local/bin/../share/yosys/ice40/ff_map.v:2.51-2.90" + "src": "top.v:284.17-295.5|complex_fifo.v:72.1-75.4|/usr/local/bin/../share/yosys/ice40/ff_map.v:2.51-2.90" }, "port_directions": { "C": "input", @@ -22869,9 +23195,9 @@ "Q": "output" }, "connections": { - "C": [ 113 ], - "D": [ 747 ], - "Q": [ 768 ] + "C": [ 89 ], + "D": [ 759 ], + "Q": [ 776 ] } }, "rx_24_fifo.wr_addr_gray_rd_SB_DFF_Q_2": { @@ -22881,7 +23207,7 @@ }, "attributes": { "module_not_derived": "00000000000000000000000000000001", - "src": "top.v:285.17-296.5|complex_fifo.v:72.1-75.4|/usr/local/bin/../share/yosys/ice40/ff_map.v:2.51-2.90" + "src": "top.v:284.17-295.5|complex_fifo.v:72.1-75.4|/usr/local/bin/../share/yosys/ice40/ff_map.v:2.51-2.90" }, "port_directions": { "C": "input", @@ -22889,9 +23215,9 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- "D": [ 849 ], - "E": [ 124 ], - "Q": [ 850 ], - "R": [ 126 ] + "C": [ 89 ], + "D": [ 860 ], + "E": [ 103 ], + "Q": [ 861 ], + "R": [ 105 ] } }, "spi_if_ins.o_cs_SB_DFFESR_Q_D_SB_LUT4_O": { @@ -25646,9 +26055,9 @@ "connections": { "I0": [ "0" ], "I1": [ "0" ], - "I2": [ 851 ], - "I3": [ 852 ], - "O": [ 123 ] + "I2": [ 862 ], + "I3": [ 863 ], + "O": [ 102 ] } }, "spi_if_ins.o_cs_SB_DFFESR_Q_D_SB_LUT4_O_1": { @@ -25671,9 +26080,9 @@ "connections": { "I0": [ "0" ], "I1": [ "0" ], - "I2": [ 852 ], - "I3": [ 851 ], - "O": [ 775 ] + "I2": [ 863 ], + "I3": [ 862 ], + "O": [ 783 ] } }, "spi_if_ins.o_cs_SB_DFFESR_Q_D_SB_LUT4_O_2": { @@ -25696,9 +26105,9 @@ "connections": { "I0": [ "0" ], "I1": [ "0" ], - "I2": [ 852 ], - "I3": [ 851 ], - "O": [ 849 ] + "I2": [ 863 ], + "I3": [ 862 ], + "O": [ 860 ] } }, "spi_if_ins.o_cs_SB_DFFESR_Q_R_SB_LUT4_O": { @@ -25721,9 +26130,9 @@ "connections": { "I0": [ "0" ], "I1": [ "0" ], - "I2": [ 852 ], - "I3": [ 851 ], - "O": [ 126 ] + "I2": [ 863 ], + "I3": [ 862 ], + "O": [ 105 ] } }, "spi_if_ins.o_cs_SB_LUT4_I2": { @@ -25744,11 +26153,11 @@ "O": "output" }, "connections": { - "I0": [ 853 ], - "I1": [ 125 ], - "I2": [ 850 ], - "I3": [ 776 ], - "O": [ 798 ] + "I0": [ 864 ], + "I1": [ 104 ], + "I2": [ 861 ], + "I3": [ 784 ], + "O": [ 802 ] } }, "spi_if_ins.o_cs_SB_LUT4_I2_1": { @@ -25769,11 +26178,11 @@ "O": "output" }, "connections": { - "I0": [ 853 ], - "I1": [ 776 ], - "I2": [ 850 ], - "I3": [ 125 ], - "O": [ 468 ] + "I0": [ 864 ], + "I1": [ 784 ], + "I2": [ 861 ], + "I3": [ 104 ], + "O": [ 507 ] } }, "spi_if_ins.o_cs_SB_LUT4_I2_2": { @@ -25794,11 +26203,11 @@ "O": "output" }, "connections": { - "I0": [ 125 ], - "I1": [ 776 ], - "I2": [ 850 ], - "I3": [ 853 ], - "O": [ 457 ] + "I0": [ 104 ], + "I1": [ 784 ], + "I2": [ 861 ], + "I3": [ 864 ], + "O": [ 496 ] } }, "spi_if_ins.o_cs_SB_LUT4_I3": { @@ -25819,11 +26228,11 @@ "O": "output" }, "connections": { - "I0": [ 853 ], - "I1": [ 125 ], - "I2": [ 776 ], - "I3": [ 850 ], - "O": [ 801 ] + "I0": [ 864 ], + "I1": [ 104 ], + "I2": [ 784 ], + "I3": [ 861 ], + "O": [ 805 ] } }, "spi_if_ins.o_cs_SB_LUT4_I3_1": { @@ -25844,11 +26253,11 @@ "O": "output" }, "connections": { - "I0": [ 853 ], - "I1": [ 125 ], - "I2": [ 776 ], - "I3": [ 850 ], - "O": [ 455 ] + "I0": [ 864 ], + "I1": [ 104 ], + "I2": [ 784 ], + "I3": [ 861 ], + "O": [ 494 ] } }, "spi_if_ins.o_data_in_SB_DFFE_Q": { @@ -25858,7 +26267,7 @@ }, "attributes": { "module_not_derived": "00000000000000000000000000000001", - "src": "top.v:93.11-109.5|spi_if.v:56.5-111.8|/usr/local/bin/../share/yosys/ice40/ff_map.v:5.57-5.103" + "src": "top.v:92.11-108.5|spi_if.v:56.5-111.8|/usr/local/bin/../share/yosys/ice40/ff_map.v:5.57-5.103" }, "port_directions": { "C": "input", @@ -25867,10 +26276,10 @@ "Q": "output" }, "connections": { - "C": [ 113 ], - "D": [ 854 ], - "E": [ 855 ], - "Q": [ 188 ] + "C": [ 89 ], + "D": [ 865 ], + "E": [ 866 ], + "Q": [ 170 ] } }, "spi_if_ins.o_data_in_SB_DFFE_Q_1": { @@ -25880,7 +26289,7 @@ }, "attributes": { "module_not_derived": "00000000000000000000000000000001", - "src": "top.v:93.11-109.5|spi_if.v:56.5-111.8|/usr/local/bin/../share/yosys/ice40/ff_map.v:5.57-5.103" + "src": "top.v:92.11-108.5|spi_if.v:56.5-111.8|/usr/local/bin/../share/yosys/ice40/ff_map.v:5.57-5.103" }, "port_directions": { "C": "input", @@ -25889,10 +26298,10 @@ "Q": "output" }, "connections": { - "C": [ 113 ], - "D": [ 851 ], - "E": [ 855 ], - "Q": [ 191 ] + "C": [ 89 ], + "D": [ 862 ], + "E": [ 866 ], + "Q": [ 173 ] } }, "spi_if_ins.o_data_in_SB_DFFE_Q_2": { @@ -25902,7 +26311,7 @@ }, "attributes": { "module_not_derived": "00000000000000000000000000000001", - "src": "top.v:93.11-109.5|spi_if.v:56.5-111.8|/usr/local/bin/../share/yosys/ice40/ff_map.v:5.57-5.103" + "src": "top.v:92.11-108.5|spi_if.v:56.5-111.8|/usr/local/bin/../share/yosys/ice40/ff_map.v:5.57-5.103" }, "port_directions": { "C": "input", @@ -25911,10 +26320,10 @@ "Q": "output" }, "connections": { - "C": [ 113 ], - "D": [ 852 ], - "E": [ 855 ], - "Q": [ 193 ] + "C": [ 89 ], + "D": [ 863 ], + "E": [ 866 ], + "Q": [ 175 ] } }, "spi_if_ins.o_data_in_SB_DFFE_Q_3": { @@ -25924,7 +26333,7 @@ }, "attributes": { "module_not_derived": "00000000000000000000000000000001", - "src": "top.v:93.11-109.5|spi_if.v:56.5-111.8|/usr/local/bin/../share/yosys/ice40/ff_map.v:5.57-5.103" + "src": "top.v:92.11-108.5|spi_if.v:56.5-111.8|/usr/local/bin/../share/yosys/ice40/ff_map.v:5.57-5.103" }, "port_directions": { "C": "input", @@ -25933,10 +26342,10 @@ "Q": "output" }, "connections": { - "C": [ 113 ], - "D": [ 856 ], - "E": [ 855 ], - "Q": [ 195 ] + "C": [ 89 ], + "D": [ 867 ], + "E": [ 866 ], + "Q": [ 177 ] } }, "spi_if_ins.o_data_in_SB_DFFE_Q_4": { @@ -25946,7 +26355,7 @@ }, "attributes": { "module_not_derived": "00000000000000000000000000000001", - "src": "top.v:93.11-109.5|spi_if.v:56.5-111.8|/usr/local/bin/../share/yosys/ice40/ff_map.v:5.57-5.103" + "src": "top.v:92.11-108.5|spi_if.v:56.5-111.8|/usr/local/bin/../share/yosys/ice40/ff_map.v:5.57-5.103" }, "port_directions": { "C": "input", @@ -25955,10 +26364,10 @@ "Q": "output" }, "connections": { - "C": [ 113 ], - "D": [ 857 ], - "E": [ 855 ], - "Q": [ 197 ] + "C": [ 89 ], + "D": [ 868 ], + "E": [ 866 ], + "Q": [ 178 ] } }, "spi_if_ins.o_data_in_SB_DFFE_Q_5": { @@ -25968,7 +26377,7 @@ }, "attributes": { "module_not_derived": "00000000000000000000000000000001", - "src": "top.v:93.11-109.5|spi_if.v:56.5-111.8|/usr/local/bin/../share/yosys/ice40/ff_map.v:5.57-5.103" + "src": "top.v:92.11-108.5|spi_if.v:56.5-111.8|/usr/local/bin/../share/yosys/ice40/ff_map.v:5.57-5.103" }, "port_directions": { "C": "input", @@ -25977,10 +26386,10 @@ "Q": "output" }, "connections": { - "C": [ 113 ], - "D": [ 858 ], - "E": [ 855 ], - "Q": [ 132 ] + "C": [ 89 ], + "D": [ 869 ], + "E": [ 866 ], + "Q": [ 110 ] } }, "spi_if_ins.o_data_in_SB_DFFE_Q_6": { @@ -25990,7 +26399,7 @@ }, "attributes": { "module_not_derived": "00000000000000000000000000000001", - "src": "top.v:93.11-109.5|spi_if.v:56.5-111.8|/usr/local/bin/../share/yosys/ice40/ff_map.v:5.57-5.103" + "src": "top.v:92.11-108.5|spi_if.v:56.5-111.8|/usr/local/bin/../share/yosys/ice40/ff_map.v:5.57-5.103" }, "port_directions": { "C": "input", @@ -25999,10 +26408,10 @@ "Q": "output" }, "connections": { - "C": [ 113 ], - "D": [ 859 ], - "E": [ 855 ], - "Q": [ 114 ] + "C": [ 89 ], + "D": [ 870 ], + "E": [ 866 ], + "Q": [ 90 ] } }, "spi_if_ins.o_data_in_SB_DFFE_Q_7": { @@ -26012,7 +26421,7 @@ }, "attributes": { "module_not_derived": "00000000000000000000000000000001", - "src": "top.v:93.11-109.5|spi_if.v:56.5-111.8|/usr/local/bin/../share/yosys/ice40/ff_map.v:5.57-5.103" + "src": "top.v:92.11-108.5|spi_if.v:56.5-111.8|/usr/local/bin/../share/yosys/ice40/ff_map.v:5.57-5.103" }, "port_directions": { "C": "input", @@ -26021,10 +26430,10 @@ "Q": "output" }, "connections": { - "C": [ 113 ], - "D": [ 860 ], - "E": [ 855 ], - "Q": [ 117 ] + "C": [ 89 ], + "D": [ 871 ], + "E": [ 866 ], + "Q": [ 94 ] } }, "spi_if_ins.o_data_in_SB_DFFE_Q_E_SB_LUT4_O": { @@ -26045,11 +26454,11 @@ "O": "output" }, "connections": { - "I0": [ 861 ], - "I1": [ 862 ], - "I2": [ 863 ], - "I3": [ 864 ], - "O": [ 855 ] + "I0": [ 872 ], + "I1": [ 873 ], + "I2": [ 874 ], + "I3": [ 875 ], + "O": [ 866 ] } }, "spi_if_ins.o_fetch_cmd_SB_DFFESR_Q": { @@ -26059,7 +26468,7 @@ }, "attributes": { "module_not_derived": "00000000000000000000000000000001", - "src": "top.v:93.11-109.5|spi_if.v:56.5-111.8|/usr/local/bin/../share/yosys/ice40/ff_map.v:24.66-24.119" + "src": "top.v:92.11-108.5|spi_if.v:56.5-111.8|/usr/local/bin/../share/yosys/ice40/ff_map.v:24.66-24.119" }, "port_directions": { "C": "input", @@ -26069,11 +26478,11 @@ "R": "input" }, "connections": { - "C": [ 113 ], - "D": [ 865 ], - "E": [ 866 ], - "Q": [ 867 ], - "R": [ 868 ] + "C": [ 89 ], + "D": [ 876 ], + "E": [ 877 ], + "Q": [ 878 ], + "R": [ 879 ] } }, "spi_if_ins.o_fetch_cmd_SB_DFFESR_Q_D_SB_LUT4_O": { @@ -26096,9 +26505,9 @@ "connections": { "I0": [ "0" ], "I1": [ "0" ], - "I2": [ 869 ], - "I3": [ 861 ], - "O": [ 865 ] + "I2": [ 880 ], + "I3": [ 872 ], + "O": [ 876 ] } }, "spi_if_ins.o_fetch_cmd_SB_DFFESR_Q_E_SB_LUT4_O": { @@ -26120,10 +26529,10 @@ }, "connections": { "I0": [ "0" ], - "I1": [ 854 ], - "I2": [ 124 ], - "I3": [ 870 ], - "O": [ 866 ] + "I1": [ 865 ], + "I2": [ 103 ], + "I3": [ 881 ], + "O": [ 877 ] } }, "spi_if_ins.o_fetch_cmd_SB_LUT4_I3": { @@ -26146,9 +26555,9 @@ "connections": { "I0": [ "0" ], "I1": [ "0" ], - "I2": [ 127 ], - "I3": [ 867 ], - "O": [ 159 ] + "I2": [ 108 ], + "I3": [ 878 ], + "O": [ 136 ] } }, "spi_if_ins.o_fetch_cmd_SB_LUT4_I3_1": { @@ -26169,11 +26578,11 @@ "O": "output" }, "connections": { - "I0": [ 57 ], - "I1": [ 53 ], - "I2": [ 776 ], - "I3": [ 867 ], - "O": [ 797 ] + "I0": [ 93 ], + "I1": [ 166 ], + "I2": [ 784 ], + "I3": [ 878 ], + "O": [ 801 ] } }, "spi_if_ins.o_ioc_SB_DFFE_Q": { @@ -26183,7 +26592,7 @@ }, "attributes": { "module_not_derived": "00000000000000000000000000000001", - "src": "top.v:93.11-109.5|spi_if.v:56.5-111.8|/usr/local/bin/../share/yosys/ice40/ff_map.v:5.57-5.103" + "src": "top.v:92.11-108.5|spi_if.v:56.5-111.8|/usr/local/bin/../share/yosys/ice40/ff_map.v:5.57-5.103" }, "port_directions": { "C": "input", @@ -26192,10 +26601,10 @@ "Q": "output" }, "connections": { - "C": [ 113 ], - "D": [ 856 ], - "E": [ 124 ], - "Q": [ 128 ] + "C": [ 89 ], + "D": [ 867 ], + "E": [ 103 ], + "Q": [ 197 ] } }, "spi_if_ins.o_ioc_SB_DFFE_Q_1": { @@ -26205,7 +26614,7 @@ }, "attributes": { "module_not_derived": "00000000000000000000000000000001", - "src": "top.v:93.11-109.5|spi_if.v:56.5-111.8|/usr/local/bin/../share/yosys/ice40/ff_map.v:5.57-5.103" + "src": "top.v:92.11-108.5|spi_if.v:56.5-111.8|/usr/local/bin/../share/yosys/ice40/ff_map.v:5.57-5.103" }, "port_directions": { "C": "input", @@ -26214,10 +26623,10 @@ "Q": "output" }, "connections": { - "C": [ 113 ], - "D": [ 857 ], - "E": [ 124 ], - "Q": [ 129 ] + "C": [ 89 ], + "D": [ 868 ], + "E": [ 103 ], + "Q": [ 198 ] } }, "spi_if_ins.o_ioc_SB_DFFE_Q_2": { @@ -26227,7 +26636,7 @@ }, "attributes": { "module_not_derived": "00000000000000000000000000000001", - "src": "top.v:93.11-109.5|spi_if.v:56.5-111.8|/usr/local/bin/../share/yosys/ice40/ff_map.v:5.57-5.103" + "src": "top.v:92.11-108.5|spi_if.v:56.5-111.8|/usr/local/bin/../share/yosys/ice40/ff_map.v:5.57-5.103" }, "port_directions": { "C": "input", @@ -26236,10 +26645,10 @@ "Q": "output" }, "connections": { - "C": [ 113 ], - "D": [ 858 ], - "E": [ 124 ], - "Q": [ 130 ] + "C": [ 89 ], + "D": [ 869 ], + "E": [ 103 ], + "Q": [ 165 ] } }, "spi_if_ins.o_ioc_SB_DFFE_Q_3": { @@ -26249,7 +26658,7 @@ }, "attributes": { "module_not_derived": "00000000000000000000000000000001", - "src": "top.v:93.11-109.5|spi_if.v:56.5-111.8|/usr/local/bin/../share/yosys/ice40/ff_map.v:5.57-5.103" + "src": "top.v:92.11-108.5|spi_if.v:56.5-111.8|/usr/local/bin/../share/yosys/ice40/ff_map.v:5.57-5.103" }, "port_directions": { "C": "input", @@ -26258,10 +26667,10 @@ "Q": "output" }, "connections": { - "C": [ 113 ], - "D": [ 859 ], - "E": [ 124 ], - "Q": [ 53 ] + "C": [ 89 ], + "D": [ 870 ], + "E": [ 103 ], + "Q": [ 166 ] } }, "spi_if_ins.o_ioc_SB_DFFE_Q_4": { @@ -26271,7 +26680,7 @@ }, "attributes": { "module_not_derived": "00000000000000000000000000000001", - "src": "top.v:93.11-109.5|spi_if.v:56.5-111.8|/usr/local/bin/../share/yosys/ice40/ff_map.v:5.57-5.103" + "src": "top.v:92.11-108.5|spi_if.v:56.5-111.8|/usr/local/bin/../share/yosys/ice40/ff_map.v:5.57-5.103" }, "port_directions": { "C": "input", @@ -26280,10 +26689,10 @@ "Q": "output" }, "connections": { - "C": [ 113 ], - "D": [ 860 ], - "E": [ 124 ], - "Q": [ 50 ] + "C": [ 89 ], + "D": [ 871 ], + "E": [ 103 ], + "Q": [ 116 ] } }, "spi_if_ins.o_load_cmd_SB_DFFESR_Q": { @@ -26293,7 +26702,7 @@ }, "attributes": { "module_not_derived": "00000000000000000000000000000001", - "src": "top.v:93.11-109.5|spi_if.v:56.5-111.8|/usr/local/bin/../share/yosys/ice40/ff_map.v:24.66-24.119" + "src": "top.v:92.11-108.5|spi_if.v:56.5-111.8|/usr/local/bin/../share/yosys/ice40/ff_map.v:24.66-24.119" }, "port_directions": { "C": "input", @@ -26303,11 +26712,11 @@ "R": "input" }, "connections": { - "C": [ 113 ], - "D": [ 869 ], - "E": [ 871 ], - "Q": [ 872 ], - "R": [ 868 ] + "C": [ 89 ], + "D": [ 880 ], + "E": [ 882 ], + "Q": [ 883 ], + "R": [ 879 ] } }, "spi_if_ins.o_load_cmd_SB_DFFESR_Q_D_SB_LUT4_I1": { @@ -26329,10 +26738,35 @@ }, "connections": { "I0": [ "0" ], - "I1": [ 869 ], - "I2": [ 861 ], - "I3": [ 862 ], - "O": [ 124 ] + "I1": [ 880 ], + "I2": [ 872 ], + "I3": [ 873 ], + "O": [ 103 ] + } + }, + "spi_if_ins.o_load_cmd_SB_DFFESR_Q_D_SB_LUT4_I2": { + "hide_name": 0, + "type": "SB_LUT4", + "parameters": { + "LUT_INIT": "0000111100110011" + }, + "attributes": { + "module_not_derived": "00000000000000000000000000000001", + "src": "/usr/local/bin/../share/yosys/ice40/cells_map.v:22.34-23.52" + }, + "port_directions": { + "I0": "input", + "I1": "input", + "I2": "input", + "I3": "input", + "O": "output" + }, + "connections": { + "I0": [ "0" ], + "I1": [ 884 ], + "I2": [ 880 ], + "I3": [ 873 ], + "O": [ 881 ] } }, "spi_if_ins.o_load_cmd_SB_DFFESR_Q_D_SB_LUT4_O": { @@ -26355,9 +26789,9 @@ "connections": { "I0": [ "0" ], "I1": [ "0" ], - "I2": [ 863 ], - "I3": [ 864 ], - "O": [ 869 ] + "I2": [ 874 ], + "I3": [ 875 ], + "O": [ 880 ] } }, "spi_if_ins.o_load_cmd_SB_DFFESR_Q_E_SB_LUT4_O": { @@ -26378,11 +26812,11 @@ "O": "output" }, "connections": { - "I0": [ 862 ], - "I1": [ 861 ], - "I2": [ 863 ], - "I3": [ 864 ], - "O": [ 871 ] + "I0": [ 873 ], + "I1": [ 872 ], + "I2": [ 874 ], + "I3": [ 875 ], + "O": [ 882 ] } }, "spi_if_ins.o_load_cmd_SB_LUT4_I2": { @@ -26404,17 +26838,17 @@ }, "connections": { "I0": [ "0" ], - "I1": [ 867 ], - "I2": [ 872 ], - "I3": [ 125 ], - "O": [ 143 ] + "I1": [ 878 ], + "I2": [ 883 ], + "I3": [ 104 ], + "O": [ 120 ] } }, - "spi_if_ins.o_load_cmd_SB_LUT4_I2_O_SB_LUT4_I2": { + "spi_if_ins.o_load_cmd_SB_LUT4_I2_O_SB_LUT4_O": { "hide_name": 0, "type": "SB_LUT4", "parameters": { - "LUT_INIT": "1111111100110000" + "LUT_INIT": "0011000000000000" }, "attributes": { "module_not_derived": "00000000000000000000000000000001", @@ -26429,21 +26863,21 @@ }, "connections": { "I0": [ "0" ], - "I1": [ 139 ], - "I2": [ 143 ], - "I3": [ 57 ], - "O": [ 115 ] + "I1": [ 116 ], + "I2": [ 107 ], + "I3": [ 166 ], + "O": [ 48 ] } }, - "spi_if_ins.o_load_cmd_SB_LUT4_I2_O_SB_LUT4_I3": { + "spi_if_ins.o_load_cmd_SB_LUT4_I2_O_SB_LUT4_O_I2_SB_LUT4_I1": { "hide_name": 0, "type": "SB_LUT4", "parameters": { - "LUT_INIT": "0000111100000000" + "LUT_INIT": "0011111111111111" }, "attributes": { "module_not_derived": "00000000000000000000000000000001", - "src": "/usr/local/bin/../share/yosys/ice40/cells_map.v:17.34-18.52" + "src": "/usr/local/bin/../share/yosys/ice40/cells_map.v:22.34-23.52" }, "port_directions": { "I0": "input", @@ -26454,21 +26888,21 @@ }, "connections": { "I0": [ "0" ], - "I1": [ "0" ], - "I2": [ 57 ], - "I3": [ 143 ], - "O": [ 873 ] + "I1": [ 107 ], + "I2": [ 116 ], + "I3": [ 166 ], + "O": [ 124 ] } }, - "spi_if_ins.o_load_cmd_SB_LUT4_I2_O_SB_LUT4_I3_O_SB_LUT4_I3": { + "spi_if_ins.o_load_cmd_SB_LUT4_I2_O_SB_LUT4_O_I2_SB_LUT4_I3": { "hide_name": 0, "type": "SB_LUT4", "parameters": { - "LUT_INIT": "0000111100000000" + "LUT_INIT": "1100111111111111" }, "attributes": { "module_not_derived": "00000000000000000000000000000001", - "src": "/usr/local/bin/../share/yosys/ice40/cells_map.v:17.34-18.52" + "src": "/usr/local/bin/../share/yosys/ice40/cells_map.v:22.34-23.52" }, "port_directions": { "I0": "input", @@ -26479,21 +26913,21 @@ }, "connections": { "I0": [ "0" ], - "I1": [ "0" ], - "I2": [ 137 ], - "I3": [ 873 ], - "O": [ 189 ] + "I1": [ 166 ], + "I2": [ 116 ], + "I3": [ 107 ], + "O": [ 113 ] } }, - "spi_if_ins.o_load_cmd_SB_LUT4_I2_O_SB_LUT4_I3_O_SB_LUT4_I3_1": { + "spi_if_ins.o_load_cmd_SB_LUT4_I2_O_SB_LUT4_O_I2_SB_LUT4_O": { "hide_name": 0, "type": "SB_LUT4", "parameters": { - "LUT_INIT": "1111000000000000" + "LUT_INIT": "0000000000000011" }, "attributes": { "module_not_derived": "00000000000000000000000000000001", - "src": "/usr/local/bin/../share/yosys/ice40/cells_map.v:17.34-18.52" + "src": "/usr/local/bin/../share/yosys/ice40/cells_map.v:22.34-23.52" }, "port_directions": { "I0": "input", @@ -26504,35 +26938,10 @@ }, "connections": { "I0": [ "0" ], - "I1": [ "0" ], - "I2": [ 47 ], - "I3": [ 873 ], - "O": [ 198 ] - } - }, - "spi_if_ins.o_load_cmd_SB_LUT4_I2_O_SB_LUT4_I3_O_SB_LUT4_I3_2": { - "hide_name": 0, - "type": "SB_LUT4", - "parameters": { - "LUT_INIT": "1111000000000000" - }, - "attributes": { - "module_not_derived": "00000000000000000000000000000001", - "src": "/usr/local/bin/../share/yosys/ice40/cells_map.v:17.34-18.52" - }, - "port_directions": { - "I0": "input", - "I1": "input", - "I2": "input", - "I3": "input", - "O": "output" - }, - "connections": { - "I0": [ "0" ], - "I1": [ "0" ], - "I2": [ 146 ], - "I3": [ 873 ], - "O": [ 203 ] + "I1": [ 165 ], + "I2": [ 197 ], + "I3": [ 198 ], + "O": [ 107 ] } }, "spi_if_ins.r_tx_byte_SB_DFFE_Q": { @@ -26542,7 +26951,7 @@ }, "attributes": { "module_not_derived": "00000000000000000000000000000001", - "src": "top.v:93.11-109.5|spi_if.v:56.5-111.8|/usr/local/bin/../share/yosys/ice40/ff_map.v:5.57-5.103" + "src": "top.v:92.11-108.5|spi_if.v:56.5-111.8|/usr/local/bin/../share/yosys/ice40/ff_map.v:5.57-5.103" }, "port_directions": { "C": "input", @@ -26551,10 +26960,10 @@ "Q": "output" }, "connections": { - "C": [ 113 ], - "D": [ 470 ], - "E": [ 874 ], - "Q": [ 875 ] + "C": [ 89 ], + "D": [ 509 ], + "E": [ 885 ], + "Q": [ 886 ] } }, "spi_if_ins.r_tx_byte_SB_DFFE_Q_1": { @@ -26564,7 +26973,7 @@ }, "attributes": { "module_not_derived": "00000000000000000000000000000001", - "src": "top.v:93.11-109.5|spi_if.v:56.5-111.8|/usr/local/bin/../share/yosys/ice40/ff_map.v:5.57-5.103" + "src": "top.v:92.11-108.5|spi_if.v:56.5-111.8|/usr/local/bin/../share/yosys/ice40/ff_map.v:5.57-5.103" }, "port_directions": { "C": "input", @@ -26573,10 +26982,10 @@ "Q": "output" }, "connections": { - "C": [ 113 ], - "D": [ 467 ], - "E": [ 874 ], - "Q": [ 876 ] + "C": [ 89 ], + "D": [ 506 ], + "E": [ 885 ], + "Q": [ 887 ] } }, "spi_if_ins.r_tx_byte_SB_DFFE_Q_2": { @@ -26586,7 +26995,7 @@ }, "attributes": { "module_not_derived": "00000000000000000000000000000001", - "src": "top.v:93.11-109.5|spi_if.v:56.5-111.8|/usr/local/bin/../share/yosys/ice40/ff_map.v:5.57-5.103" + "src": "top.v:92.11-108.5|spi_if.v:56.5-111.8|/usr/local/bin/../share/yosys/ice40/ff_map.v:5.57-5.103" }, "port_directions": { "C": "input", @@ -26595,10 +27004,10 @@ "Q": "output" }, "connections": { - "C": [ 113 ], - "D": [ 465 ], - "E": [ 874 ], - "Q": [ 877 ] + "C": [ 89 ], + "D": [ 504 ], + "E": [ 885 ], + "Q": [ 888 ] } }, "spi_if_ins.r_tx_byte_SB_DFFE_Q_3": { @@ -26608,7 +27017,7 @@ }, "attributes": { "module_not_derived": "00000000000000000000000000000001", - "src": "top.v:93.11-109.5|spi_if.v:56.5-111.8|/usr/local/bin/../share/yosys/ice40/ff_map.v:5.57-5.103" + "src": "top.v:92.11-108.5|spi_if.v:56.5-111.8|/usr/local/bin/../share/yosys/ice40/ff_map.v:5.57-5.103" }, "port_directions": { "C": "input", @@ -26617,10 +27026,10 @@ "Q": "output" }, "connections": { - "C": [ 113 ], - "D": [ 463 ], - "E": [ 874 ], - "Q": [ 878 ] + "C": [ 89 ], + "D": [ 502 ], + "E": [ 885 ], + "Q": [ 889 ] } }, "spi_if_ins.r_tx_byte_SB_DFFE_Q_4": { @@ -26630,7 +27039,7 @@ }, "attributes": { "module_not_derived": "00000000000000000000000000000001", - "src": "top.v:93.11-109.5|spi_if.v:56.5-111.8|/usr/local/bin/../share/yosys/ice40/ff_map.v:5.57-5.103" + "src": "top.v:92.11-108.5|spi_if.v:56.5-111.8|/usr/local/bin/../share/yosys/ice40/ff_map.v:5.57-5.103" }, "port_directions": { "C": "input", @@ -26639,10 +27048,10 @@ "Q": "output" }, "connections": { - "C": [ 113 ], - "D": [ 461 ], - "E": [ 874 ], - "Q": [ 879 ] + "C": [ 89 ], + "D": [ 500 ], + "E": [ 885 ], + "Q": [ 890 ] } }, "spi_if_ins.r_tx_byte_SB_DFFE_Q_5": { @@ -26652,7 +27061,7 @@ }, "attributes": { "module_not_derived": "00000000000000000000000000000001", - "src": "top.v:93.11-109.5|spi_if.v:56.5-111.8|/usr/local/bin/../share/yosys/ice40/ff_map.v:5.57-5.103" + "src": "top.v:92.11-108.5|spi_if.v:56.5-111.8|/usr/local/bin/../share/yosys/ice40/ff_map.v:5.57-5.103" }, "port_directions": { "C": "input", @@ -26661,10 +27070,10 @@ "Q": "output" }, "connections": { - "C": [ 113 ], - "D": [ 459 ], - "E": [ 874 ], - "Q": [ 880 ] + "C": [ 89 ], + "D": [ 498 ], + "E": [ 885 ], + "Q": [ 891 ] } }, "spi_if_ins.r_tx_byte_SB_DFFE_Q_6": { @@ -26674,7 +27083,7 @@ }, "attributes": { "module_not_derived": "00000000000000000000000000000001", - "src": "top.v:93.11-109.5|spi_if.v:56.5-111.8|/usr/local/bin/../share/yosys/ice40/ff_map.v:5.57-5.103" + "src": "top.v:92.11-108.5|spi_if.v:56.5-111.8|/usr/local/bin/../share/yosys/ice40/ff_map.v:5.57-5.103" }, "port_directions": { "C": "input", @@ -26683,10 +27092,10 @@ "Q": "output" }, "connections": { - "C": [ 113 ], - "D": [ 456 ], - "E": [ 874 ], - "Q": [ 881 ] + "C": [ 89 ], + "D": [ 495 ], + "E": [ 885 ], + "Q": [ 892 ] } }, "spi_if_ins.r_tx_byte_SB_DFFE_Q_7": { @@ -26696,7 +27105,7 @@ }, "attributes": { "module_not_derived": "00000000000000000000000000000001", - "src": "top.v:93.11-109.5|spi_if.v:56.5-111.8|/usr/local/bin/../share/yosys/ice40/ff_map.v:5.57-5.103" + "src": "top.v:92.11-108.5|spi_if.v:56.5-111.8|/usr/local/bin/../share/yosys/ice40/ff_map.v:5.57-5.103" }, "port_directions": { "C": "input", @@ -26705,10 +27114,10 @@ "Q": "output" }, "connections": { - "C": [ 113 ], - "D": [ 472 ], - "E": [ 874 ], - "Q": [ 882 ] + "C": [ 89 ], + "D": [ 511 ], + "E": [ 885 ], + "Q": [ 893 ] } }, "spi_if_ins.r_tx_data_valid_SB_DFFESR_Q": { @@ -26718,7 +27127,7 @@ }, "attributes": { "module_not_derived": "00000000000000000000000000000001", - "src": "top.v:93.11-109.5|spi_if.v:56.5-111.8|/usr/local/bin/../share/yosys/ice40/ff_map.v:24.66-24.119" + "src": "top.v:92.11-108.5|spi_if.v:56.5-111.8|/usr/local/bin/../share/yosys/ice40/ff_map.v:24.66-24.119" }, "port_directions": { "C": "input", @@ -26728,11 +27137,11 @@ "R": "input" }, "connections": { - "C": [ 113 ], - "D": [ 883 ], - "E": [ 884 ], - "Q": [ 885 ], - "R": [ 862 ] + "C": [ 89 ], + "D": [ 894 ], + "E": [ 895 ], + "Q": [ 896 ], + "R": [ 873 ] } }, "spi_if_ins.r_tx_data_valid_SB_DFFESR_Q_D_SB_LUT4_I3": { @@ -26755,9 +27164,9 @@ "connections": { "I0": [ "0" ], "I1": [ "0" ], - "I2": [ 862 ], - "I3": [ 883 ], - "O": [ 874 ] + "I2": [ 873 ], + "I3": [ 894 ], + "O": [ 885 ] } }, "spi_if_ins.r_tx_data_valid_SB_DFFESR_Q_D_SB_LUT4_O": { @@ -26779,10 +27188,10 @@ }, "connections": { "I0": [ "0" ], - "I1": [ 861 ], - "I2": [ 863 ], - "I3": [ 864 ], - "O": [ 883 ] + "I1": [ 872 ], + "I2": [ 874 ], + "I3": [ 875 ], + "O": [ 894 ] } }, "spi_if_ins.r_tx_data_valid_SB_DFFESR_Q_E_SB_LUT4_O": { @@ -26804,10 +27213,10 @@ }, "connections": { "I0": [ "0" ], - "I1": [ 862 ], - "I2": [ 886 ], - "I3": [ 124 ], - "O": [ 884 ] + "I1": [ 873 ], + "I2": [ 884 ], + "I3": [ 103 ], + "O": [ 895 ] } }, "spi_if_ins.r_tx_data_valid_SB_LUT4_I3": { @@ -26831,8 +27240,133 @@ "I0": [ "0" ], "I1": [ "0" ], "I2": [ 44 ], - "I3": [ 885 ], - "O": [ 887 ] + "I3": [ 896 ], + "O": [ 897 ] + } + }, + "spi_if_ins.r_tx_data_valid_SB_LUT4_I3_O_SB_LUT4_O": { + "hide_name": 0, + "type": "SB_LUT4", + "parameters": { + "LUT_INIT": "1110111011110000" + }, + "attributes": { + "module_not_derived": "00000000000000000000000000000001", + "src": "/usr/local/bin/../share/yosys/ice40/cells_map.v:26.33-27.52" + }, + "port_directions": { + "I0": "input", + "I1": "input", + "I2": "input", + "I3": "input", + "O": "output" + }, + "connections": { + "I0": [ 898 ], + "I1": [ 899 ], + "I2": [ 900 ], + "I3": [ 901 ], + "O": [ 902 ] + } + }, + "spi_if_ins.r_tx_data_valid_SB_LUT4_I3_O_SB_LUT4_O_I0_SB_LUT4_O": { + "hide_name": 0, + "type": "SB_LUT4", + "parameters": { + "LUT_INIT": "1111110000001010" + }, + "attributes": { + "module_not_derived": "00000000000000000000000000000001", + "src": "/usr/local/bin/../share/yosys/ice40/cells_map.v:26.33-27.52" + }, + "port_directions": { + "I0": "input", + "I1": "input", + "I2": "input", + "I3": "input", + "O": "output" + }, + "connections": { + "I0": [ 903 ], + "I1": [ 904 ], + "I2": [ 905 ], + "I3": [ 906 ], + "O": [ 900 ] + } + }, + "spi_if_ins.r_tx_data_valid_SB_LUT4_I3_O_SB_LUT4_O_I0_SB_LUT4_O_1": { + "hide_name": 0, + "type": "SB_LUT4", + "parameters": { + "LUT_INIT": "0000110000001010" + }, + "attributes": { + "module_not_derived": "00000000000000000000000000000001", + "src": "/usr/local/bin/../share/yosys/ice40/cells_map.v:26.33-27.52" + }, + "port_directions": { + "I0": "input", + "I1": "input", + "I2": "input", + "I3": "input", + "O": "output" + }, + "connections": { + "I0": [ 907 ], + "I1": [ 908 ], + "I2": [ 905 ], + "I3": [ 909 ], + "O": [ 899 ] + } + }, + "spi_if_ins.r_tx_data_valid_SB_LUT4_I3_O_SB_LUT4_O_I0_SB_LUT4_O_2": { + "hide_name": 0, + "type": "SB_LUT4", + "parameters": { + "LUT_INIT": "1100101000000000" + }, + "attributes": { + "module_not_derived": "00000000000000000000000000000001", + "src": "/usr/local/bin/../share/yosys/ice40/cells_map.v:26.33-27.52" + }, + "port_directions": { + "I0": "input", + "I1": "input", + "I2": "input", + "I3": "input", + "O": "output" + }, + "connections": { + "I0": [ 910 ], + "I1": [ 911 ], + "I2": [ 909 ], + "I3": [ 905 ], + "O": [ 898 ] + } + }, + "spi_if_ins.r_tx_data_valid_SB_LUT4_I3_O_SB_LUT4_O_I0_SB_LUT4_O_I3_SB_LUT4_O": { + "hide_name": 0, + "type": "SB_LUT4", + "parameters": { + "LUT_INIT": "1100111110100000" + }, + "attributes": { + "module_not_derived": "00000000000000000000000000000001", + "src": "/usr/local/bin/../share/yosys/ice40/cells_map.v:26.33-27.52" + }, + "port_directions": { + "I0": "input", + "I1": "input", + "I2": "input", + "I3": "input", + "O": "output" + }, + "connections": { + "I0": [ 912 ], + "I1": [ 913 ], + "I2": [ 905 ], + "I3": [ 909 ], + "O": [ 906 ] } }, "spi_if_ins.spi.SCKr_SB_DFF_Q": { @@ -26842,7 +27376,7 @@ }, "attributes": { "module_not_derived": "00000000000000000000000000000001", - "src": "top.v:93.11-109.5|spi_slave.v:63.3-63.62|spi_if.v:42.15-54.6|/usr/local/bin/../share/yosys/ice40/ff_map.v:2.51-2.90" + "src": "top.v:92.11-108.5|spi_slave.v:63.3-63.62|spi_if.v:42.15-54.6|/usr/local/bin/../share/yosys/ice40/ff_map.v:2.51-2.90" }, "port_directions": { "C": "input", @@ -26850,9 +27384,9 @@ "Q": "output" }, "connections": { - "C": [ 113 ], - "D": [ 888 ], - "Q": [ 889 ] + "C": [ 89 ], + "D": [ 914 ], + "Q": [ 915 ] } }, "spi_if_ins.spi.SCKr_SB_DFF_Q_1": { @@ -26862,7 +27396,7 @@ }, "attributes": { "module_not_derived": "00000000000000000000000000000001", - "src": "top.v:93.11-109.5|spi_slave.v:63.3-63.62|spi_if.v:42.15-54.6|/usr/local/bin/../share/yosys/ice40/ff_map.v:2.51-2.90" + "src": "top.v:92.11-108.5|spi_slave.v:63.3-63.62|spi_if.v:42.15-54.6|/usr/local/bin/../share/yosys/ice40/ff_map.v:2.51-2.90" }, "port_directions": { "C": "input", @@ -26870,9 +27404,9 @@ "Q": "output" }, "connections": { - "C": [ 113 ], - "D": [ 890 ], - "Q": [ 888 ] + "C": [ 89 ], + "D": [ 916 ], + "Q": [ 914 ] } }, "spi_if_ins.spi.SCKr_SB_DFF_Q_2": { @@ -26882,7 +27416,7 @@ }, "attributes": { "module_not_derived": "00000000000000000000000000000001", - "src": "top.v:93.11-109.5|spi_slave.v:63.3-63.62|spi_if.v:42.15-54.6|/usr/local/bin/../share/yosys/ice40/ff_map.v:2.51-2.90" + "src": "top.v:92.11-108.5|spi_slave.v:63.3-63.62|spi_if.v:42.15-54.6|/usr/local/bin/../share/yosys/ice40/ff_map.v:2.51-2.90" }, "port_directions": { "C": "input", @@ -26890,9 +27424,9 @@ "Q": "output" }, "connections": { - "C": [ 113 ], + "C": [ 89 ], "D": [ 43 ], - "Q": [ 890 ] + "Q": [ 916 ] } }, "spi_if_ins.spi.SCKr_SB_LUT4_I0": { @@ -26913,11 +27447,11 @@ "O": "output" }, "connections": { - "I0": [ 889 ], - "I1": [ 891 ], - "I2": [ 892 ], - "I3": [ 888 ], - "O": [ 893 ] + "I0": [ 915 ], + "I1": [ 905 ], + "I2": [ 909 ], + "I3": [ 914 ], + "O": [ 917 ] } }, "spi_if_ins.spi.o_rx_byte_SB_DFFE_Q": { @@ -26927,7 +27461,7 @@ }, "attributes": { "module_not_derived": "00000000000000000000000000000001", - "src": "top.v:93.11-109.5|spi_slave.v:48.3-60.6|spi_if.v:42.15-54.6|/usr/local/bin/../share/yosys/ice40/ff_map.v:5.57-5.103" + "src": "top.v:92.11-108.5|spi_slave.v:48.3-60.6|spi_if.v:42.15-54.6|/usr/local/bin/../share/yosys/ice40/ff_map.v:5.57-5.103" }, "port_directions": { "C": "input", @@ -26936,10 +27470,10 @@ "Q": "output" }, "connections": { - "C": [ 113 ], - "D": [ 894 ], - "E": [ 895 ], - "Q": [ 854 ] + "C": [ 89 ], + "D": [ 918 ], + "E": [ 919 ], + "Q": [ 865 ] } }, "spi_if_ins.spi.o_rx_byte_SB_DFFE_Q_1": { @@ -26949,7 +27483,7 @@ }, "attributes": { "module_not_derived": "00000000000000000000000000000001", - "src": "top.v:93.11-109.5|spi_slave.v:48.3-60.6|spi_if.v:42.15-54.6|/usr/local/bin/../share/yosys/ice40/ff_map.v:5.57-5.103" + "src": "top.v:92.11-108.5|spi_slave.v:48.3-60.6|spi_if.v:42.15-54.6|/usr/local/bin/../share/yosys/ice40/ff_map.v:5.57-5.103" }, "port_directions": { "C": "input", @@ -26958,10 +27492,10 @@ "Q": "output" }, "connections": { - "C": [ 113 ], - "D": [ 896 ], - "E": [ 895 ], - "Q": [ 851 ] + "C": [ 89 ], + "D": [ 920 ], + "E": [ 919 ], + "Q": [ 862 ] } }, "spi_if_ins.spi.o_rx_byte_SB_DFFE_Q_2": { @@ -26971,7 +27505,7 @@ }, "attributes": { "module_not_derived": "00000000000000000000000000000001", - "src": "top.v:93.11-109.5|spi_slave.v:48.3-60.6|spi_if.v:42.15-54.6|/usr/local/bin/../share/yosys/ice40/ff_map.v:5.57-5.103" + "src": "top.v:92.11-108.5|spi_slave.v:48.3-60.6|spi_if.v:42.15-54.6|/usr/local/bin/../share/yosys/ice40/ff_map.v:5.57-5.103" }, "port_directions": { "C": "input", @@ -26980,10 +27514,10 @@ "Q": "output" }, "connections": { - "C": [ 113 ], - "D": [ 897 ], - "E": [ 895 ], - "Q": [ 852 ] + "C": [ 89 ], + "D": [ 921 ], + "E": [ 919 ], + "Q": [ 863 ] } }, "spi_if_ins.spi.o_rx_byte_SB_DFFE_Q_3": { @@ -26993,7 +27527,7 @@ }, "attributes": { "module_not_derived": "00000000000000000000000000000001", - "src": "top.v:93.11-109.5|spi_slave.v:48.3-60.6|spi_if.v:42.15-54.6|/usr/local/bin/../share/yosys/ice40/ff_map.v:5.57-5.103" + "src": "top.v:92.11-108.5|spi_slave.v:48.3-60.6|spi_if.v:42.15-54.6|/usr/local/bin/../share/yosys/ice40/ff_map.v:5.57-5.103" }, "port_directions": { "C": "input", @@ -27002,10 +27536,10 @@ "Q": "output" }, "connections": { - "C": [ 113 ], - "D": [ 898 ], - "E": [ 895 ], - "Q": [ 856 ] + "C": [ 89 ], + "D": [ 922 ], + "E": [ 919 ], + "Q": [ 867 ] } }, "spi_if_ins.spi.o_rx_byte_SB_DFFE_Q_4": { @@ -27015,7 +27549,7 @@ }, "attributes": { "module_not_derived": "00000000000000000000000000000001", - "src": "top.v:93.11-109.5|spi_slave.v:48.3-60.6|spi_if.v:42.15-54.6|/usr/local/bin/../share/yosys/ice40/ff_map.v:5.57-5.103" + "src": "top.v:92.11-108.5|spi_slave.v:48.3-60.6|spi_if.v:42.15-54.6|/usr/local/bin/../share/yosys/ice40/ff_map.v:5.57-5.103" }, "port_directions": { "C": "input", @@ -27024,10 +27558,10 @@ "Q": "output" }, "connections": { - "C": [ 113 ], - "D": [ 899 ], - "E": [ 895 ], - "Q": [ 857 ] + "C": [ 89 ], + "D": [ 923 ], + "E": [ 919 ], + "Q": [ 868 ] } }, "spi_if_ins.spi.o_rx_byte_SB_DFFE_Q_5": { @@ -27037,7 +27571,7 @@ }, "attributes": { "module_not_derived": "00000000000000000000000000000001", - "src": "top.v:93.11-109.5|spi_slave.v:48.3-60.6|spi_if.v:42.15-54.6|/usr/local/bin/../share/yosys/ice40/ff_map.v:5.57-5.103" + "src": "top.v:92.11-108.5|spi_slave.v:48.3-60.6|spi_if.v:42.15-54.6|/usr/local/bin/../share/yosys/ice40/ff_map.v:5.57-5.103" }, "port_directions": { "C": "input", @@ -27046,10 +27580,10 @@ "Q": "output" }, "connections": { - "C": [ 113 ], - "D": [ 900 ], - "E": [ 895 ], - "Q": [ 858 ] + "C": [ 89 ], + "D": [ 924 ], + "E": [ 919 ], + "Q": [ 869 ] } }, "spi_if_ins.spi.o_rx_byte_SB_DFFE_Q_6": { @@ -27059,7 +27593,7 @@ }, "attributes": { "module_not_derived": "00000000000000000000000000000001", - "src": "top.v:93.11-109.5|spi_slave.v:48.3-60.6|spi_if.v:42.15-54.6|/usr/local/bin/../share/yosys/ice40/ff_map.v:5.57-5.103" + "src": "top.v:92.11-108.5|spi_slave.v:48.3-60.6|spi_if.v:42.15-54.6|/usr/local/bin/../share/yosys/ice40/ff_map.v:5.57-5.103" }, "port_directions": { "C": "input", @@ -27068,10 +27602,10 @@ "Q": "output" }, "connections": { - "C": [ 113 ], - "D": [ 901 ], - "E": [ 895 ], - "Q": [ 859 ] + "C": [ 89 ], + "D": [ 925 ], + "E": [ 919 ], + "Q": [ 870 ] } }, "spi_if_ins.spi.o_rx_byte_SB_DFFE_Q_7": { @@ -27081,7 +27615,7 @@ }, "attributes": { "module_not_derived": "00000000000000000000000000000001", - "src": "top.v:93.11-109.5|spi_slave.v:48.3-60.6|spi_if.v:42.15-54.6|/usr/local/bin/../share/yosys/ice40/ff_map.v:5.57-5.103" + "src": "top.v:92.11-108.5|spi_slave.v:48.3-60.6|spi_if.v:42.15-54.6|/usr/local/bin/../share/yosys/ice40/ff_map.v:5.57-5.103" }, "port_directions": { "C": "input", @@ -27090,10 +27624,10 @@ "Q": "output" }, "connections": { - "C": [ 113 ], - "D": [ 902 ], - "E": [ 895 ], - "Q": [ 860 ] + "C": [ 89 ], + "D": [ 926 ], + "E": [ 919 ], + "Q": [ 871 ] } }, "spi_if_ins.spi.o_rx_data_valid_SB_DFF_Q": { @@ -27103,7 +27637,7 @@ }, "attributes": { "module_not_derived": "00000000000000000000000000000001", - "src": "top.v:93.11-109.5|spi_slave.v:48.3-60.6|spi_if.v:42.15-54.6|/usr/local/bin/../share/yosys/ice40/ff_map.v:2.51-2.90" + "src": "top.v:92.11-108.5|spi_slave.v:48.3-60.6|spi_if.v:42.15-54.6|/usr/local/bin/../share/yosys/ice40/ff_map.v:2.51-2.90" }, "port_directions": { "C": "input", @@ -27111,9 +27645,9 @@ "Q": "output" }, "connections": { - "C": [ 113 ], - "D": [ 895 ], - "Q": [ 862 ] + "C": [ 89 ], + "D": [ 919 ], + "Q": [ 873 ] } }, "spi_if_ins.spi.o_spi_miso_SB_DFFE_Q": { @@ -27123,7 +27657,7 @@ }, "attributes": { "module_not_derived": "00000000000000000000000000000001", - "src": "top.v:93.11-109.5|spi_slave.v:69.3-86.6|spi_if.v:42.15-54.6|/usr/local/bin/../share/yosys/ice40/ff_map.v:5.57-5.103" + "src": "top.v:92.11-108.5|spi_slave.v:69.3-86.6|spi_if.v:42.15-54.6|/usr/local/bin/../share/yosys/ice40/ff_map.v:5.57-5.103" }, "port_directions": { "C": "input", @@ -27132,10 +27666,10 @@ "Q": "output" }, "connections": { - "C": [ 113 ], - "D": [ 903 ], - "E": [ 904 ], - "Q": [ 453 ] + "C": [ 89 ], + "D": [ 927 ], + "E": [ 928 ], + "Q": [ 492 ] } }, "spi_if_ins.spi.o_spi_miso_SB_DFFE_Q_D_SB_LUT4_O": { @@ -27157,135 +27691,10 @@ }, "connections": { "I0": [ "0" ], - "I1": [ 875 ], - "I2": [ 905 ], - "I3": [ 887 ], - "O": [ 903 ] - } - }, - "spi_if_ins.spi.o_spi_miso_SB_DFFE_Q_D_SB_LUT4_O_I2_SB_LUT4_O": { - "hide_name": 0, - "type": "SB_LUT4", - "parameters": { - "LUT_INIT": "1110111011110000" - }, - "attributes": { - "module_not_derived": "00000000000000000000000000000001", - "src": "/usr/local/bin/../share/yosys/ice40/cells_map.v:26.33-27.52" - }, - "port_directions": { - "I0": "input", - "I1": "input", - "I2": "input", - "I3": "input", - "O": "output" - }, - "connections": { - "I0": [ 906 ], - "I1": [ 907 ], - "I2": [ 908 ], - "I3": [ 909 ], - "O": [ 905 ] - } - }, - "spi_if_ins.spi.o_spi_miso_SB_DFFE_Q_D_SB_LUT4_O_I2_SB_LUT4_O_I0_SB_LUT4_O": { - "hide_name": 0, - "type": "SB_LUT4", - "parameters": { - "LUT_INIT": "1111110000001010" - }, - "attributes": { - "module_not_derived": "00000000000000000000000000000001", - "src": "/usr/local/bin/../share/yosys/ice40/cells_map.v:26.33-27.52" - }, - "port_directions": { - "I0": "input", - "I1": "input", - "I2": "input", - "I3": "input", - "O": "output" - }, - "connections": { - "I0": [ 910 ], - "I1": [ 911 ], - "I2": [ 891 ], - "I3": [ 912 ], - "O": [ 908 ] - } - }, - "spi_if_ins.spi.o_spi_miso_SB_DFFE_Q_D_SB_LUT4_O_I2_SB_LUT4_O_I0_SB_LUT4_O_1": { - "hide_name": 0, - "type": "SB_LUT4", - "parameters": { - "LUT_INIT": "0000110000001010" - }, - "attributes": { - "module_not_derived": "00000000000000000000000000000001", - "src": "/usr/local/bin/../share/yosys/ice40/cells_map.v:26.33-27.52" - }, - "port_directions": { - "I0": "input", - "I1": "input", - "I2": "input", - "I3": "input", - "O": "output" - }, - "connections": { - "I0": [ 913 ], - "I1": [ 914 ], - "I2": [ 891 ], - "I3": [ 892 ], - "O": [ 907 ] - } - }, - "spi_if_ins.spi.o_spi_miso_SB_DFFE_Q_D_SB_LUT4_O_I2_SB_LUT4_O_I0_SB_LUT4_O_2": { - "hide_name": 0, - "type": "SB_LUT4", - "parameters": { - "LUT_INIT": "1100101000000000" - }, - "attributes": { - "module_not_derived": "00000000000000000000000000000001", - "src": "/usr/local/bin/../share/yosys/ice40/cells_map.v:26.33-27.52" - }, - "port_directions": { - "I0": "input", - "I1": "input", - "I2": "input", - "I3": "input", - "O": "output" - }, - "connections": { - "I0": [ 915 ], - "I1": [ 916 ], - "I2": [ 892 ], - "I3": [ 891 ], - "O": [ 906 ] - } - }, - "spi_if_ins.spi.o_spi_miso_SB_DFFE_Q_D_SB_LUT4_O_I2_SB_LUT4_O_I0_SB_LUT4_O_I3_SB_LUT4_O": { - "hide_name": 0, - "type": "SB_LUT4", - "parameters": { - "LUT_INIT": "1100111110100000" - }, - "attributes": { - "module_not_derived": "00000000000000000000000000000001", - "src": "/usr/local/bin/../share/yosys/ice40/cells_map.v:26.33-27.52" - }, - "port_directions": { - "I0": "input", - "I1": "input", - "I2": "input", - "I3": "input", - "O": "output" - }, - "connections": { - "I0": [ 917 ], - "I1": [ 918 ], - "I2": [ 891 ], - "I3": [ 892 ], - "O": [ 912 ] + "I1": [ 886 ], + "I2": [ 902 ], + "I3": [ 897 ], + "O": [ 927 ] } }, "spi_if_ins.spi.o_spi_miso_SB_DFFE_Q_E_SB_LUT4_O": { @@ -27307,10 +27716,10 @@ }, "connections": { "I0": [ "0" ], - "I1": [ 889 ], - "I2": [ 888 ], - "I3": [ 887 ], - "O": [ 904 ] + "I1": [ 915 ], + "I2": [ 914 ], + "I3": [ 897 ], + "O": [ 928 ] } }, "spi_if_ins.spi.r2_rx_done_SB_DFF_Q": { @@ -27320,7 +27729,7 @@ }, "attributes": { "module_not_derived": "00000000000000000000000000000001", - "src": "top.v:93.11-109.5|spi_slave.v:48.3-60.6|spi_if.v:42.15-54.6|/usr/local/bin/../share/yosys/ice40/ff_map.v:2.51-2.90" + "src": "top.v:92.11-108.5|spi_slave.v:48.3-60.6|spi_if.v:42.15-54.6|/usr/local/bin/../share/yosys/ice40/ff_map.v:2.51-2.90" }, "port_directions": { "C": "input", @@ -27328,9 +27737,9 @@ "Q": "output" }, "connections": { - "C": [ 113 ], - "D": [ 919 ], - "Q": [ 920 ] + "C": [ 89 ], + "D": [ 929 ], + "Q": [ 930 ] } }, "spi_if_ins.spi.r3_rx_done_SB_DFF_Q": { @@ -27340,7 +27749,7 @@ }, "attributes": { "module_not_derived": "00000000000000000000000000000001", - "src": "top.v:93.11-109.5|spi_slave.v:48.3-60.6|spi_if.v:42.15-54.6|/usr/local/bin/../share/yosys/ice40/ff_map.v:2.51-2.90" + "src": "top.v:92.11-108.5|spi_slave.v:48.3-60.6|spi_if.v:42.15-54.6|/usr/local/bin/../share/yosys/ice40/ff_map.v:2.51-2.90" }, "port_directions": { "C": "input", @@ -27348,9 +27757,9 @@ "Q": "output" }, "connections": { - "C": [ 113 ], - "D": [ 920 ], - "Q": [ 921 ] + "C": [ 89 ], + "D": [ 930 ], + "Q": [ 931 ] } }, "spi_if_ins.spi.r3_rx_done_SB_LUT4_I2": { @@ -27373,9 +27782,9 @@ "connections": { "I0": [ "0" ], "I1": [ "0" ], - "I2": [ 921 ], - "I3": [ 920 ], - "O": [ 895 ] + "I2": [ 931 ], + "I3": [ 930 ], + "O": [ 919 ] } }, "spi_if_ins.spi.r_rx_bit_count_SB_DFFR_Q": { @@ -27385,7 +27794,7 @@ }, "attributes": { "module_not_derived": "00000000000000000000000000000001", - "src": "top.v:93.11-109.5|spi_slave.v:28.3-44.6|spi_if.v:42.15-54.6|/usr/local/bin/../share/yosys/ice40/ff_map.v:9.57-9.103" + "src": "top.v:92.11-108.5|spi_slave.v:28.3-44.6|spi_if.v:42.15-54.6|/usr/local/bin/../share/yosys/ice40/ff_map.v:9.57-9.103" }, "port_directions": { "C": "input", @@ -27395,8 +27804,8 @@ }, "connections": { "C": [ 43 ], - "D": [ 922 ], - "Q": [ 923 ], + "D": [ 932 ], + "Q": [ 933 ], "R": [ 44 ] } }, @@ -27407,7 +27816,7 @@ }, "attributes": { "module_not_derived": "00000000000000000000000000000001", - "src": "top.v:93.11-109.5|spi_slave.v:28.3-44.6|spi_if.v:42.15-54.6|/usr/local/bin/../share/yosys/ice40/ff_map.v:9.57-9.103" + "src": "top.v:92.11-108.5|spi_slave.v:28.3-44.6|spi_if.v:42.15-54.6|/usr/local/bin/../share/yosys/ice40/ff_map.v:9.57-9.103" }, "port_directions": { "C": "input", @@ -27417,8 +27826,8 @@ }, "connections": { "C": [ 43 ], - "D": [ 924 ], - "Q": [ 925 ], + "D": [ 934 ], + "Q": [ 935 ], "R": [ 44 ] } }, @@ -27429,7 +27838,7 @@ }, "attributes": { "module_not_derived": "00000000000000000000000000000001", - "src": "top.v:93.11-109.5|spi_slave.v:28.3-44.6|spi_if.v:42.15-54.6|/usr/local/bin/../share/yosys/ice40/ff_map.v:9.57-9.103" + "src": "top.v:92.11-108.5|spi_slave.v:28.3-44.6|spi_if.v:42.15-54.6|/usr/local/bin/../share/yosys/ice40/ff_map.v:9.57-9.103" }, "port_directions": { "C": "input", @@ -27439,8 +27848,8 @@ }, "connections": { "C": [ 43 ], - "D": [ 926 ], - "Q": [ 927 ], + "D": [ 936 ], + "Q": [ 937 ], "R": [ 44 ] } }, @@ -27465,8 +27874,8 @@ "I0": [ "0" ], "I1": [ "0" ], "I2": [ "0" ], - "I3": [ 927 ], - "O": [ 926 ] + "I3": [ 937 ], + "O": [ 936 ] } }, "spi_if_ins.spi.r_rx_bit_count_SB_DFFR_Q_D_SB_LUT4_O": { @@ -27477,7 +27886,7 @@ }, "attributes": { "module_not_derived": "00000000000000000000000000000001", - "src": "top.v:93.11-109.5|spi_slave.v:34.25-34.43|spi_if.v:42.15-54.6|/usr/local/bin/../share/yosys/ice40/arith_map.v:62.5-70.4|/usr/local/bin/../share/yosys/ice40/cells_map.v:26.33-27.52" + "src": "top.v:92.11-108.5|spi_slave.v:34.25-34.43|spi_if.v:42.15-54.6|/usr/local/bin/../share/yosys/ice40/arith_map.v:62.5-70.4|/usr/local/bin/../share/yosys/ice40/cells_map.v:26.33-27.52" }, "port_directions": { "I0": "input", @@ -27489,9 +27898,9 @@ "connections": { "I0": [ "0" ], "I1": [ "0" ], - "I2": [ 923 ], - "I3": [ 928 ], - "O": [ 922 ] + "I2": [ 933 ], + "I3": [ 938 ], + "O": [ 932 ] } }, "spi_if_ins.spi.r_rx_bit_count_SB_DFFR_Q_D_SB_LUT4_O_1": { @@ -27502,7 +27911,7 @@ }, "attributes": { "module_not_derived": "00000000000000000000000000000001", - "src": "top.v:93.11-109.5|spi_slave.v:34.25-34.43|spi_if.v:42.15-54.6|/usr/local/bin/../share/yosys/ice40/arith_map.v:62.5-70.4|/usr/local/bin/../share/yosys/ice40/cells_map.v:26.33-27.52" + "src": "top.v:92.11-108.5|spi_slave.v:34.25-34.43|spi_if.v:42.15-54.6|/usr/local/bin/../share/yosys/ice40/arith_map.v:62.5-70.4|/usr/local/bin/../share/yosys/ice40/cells_map.v:26.33-27.52" }, "port_directions": { "I0": "input", @@ -27514,9 +27923,9 @@ "connections": { "I0": [ "0" ], "I1": [ "0" ], - "I2": [ 925 ], - "I3": [ 927 ], - "O": [ 924 ] + "I2": [ 935 ], + "I3": [ 937 ], + "O": [ 934 ] } }, "spi_if_ins.spi.r_rx_bit_count_SB_DFFR_Q_D_SB_LUT4_O_I3_SB_CARRY_CO": { @@ -27525,7 +27934,7 @@ "parameters": { }, "attributes": { - "src": "top.v:93.11-109.5|spi_slave.v:34.25-34.43|spi_if.v:42.15-54.6|/usr/local/bin/../share/yosys/ice40/arith_map.v:62.5-70.4" + "src": "top.v:92.11-108.5|spi_slave.v:34.25-34.43|spi_if.v:42.15-54.6|/usr/local/bin/../share/yosys/ice40/arith_map.v:62.5-70.4" }, "port_directions": { "CI": "input", @@ -27534,10 +27943,10 @@ "I1": "input" }, "connections": { - "CI": [ 927 ], - "CO": [ 928 ], + "CI": [ 937 ], + "CO": [ 938 ], "I0": [ "0" ], - "I1": [ 925 ] + "I1": [ 935 ] } }, "spi_if_ins.spi.r_rx_byte_SB_DFFE_Q": { @@ -27547,7 +27956,7 @@ }, "attributes": { "module_not_derived": "00000000000000000000000000000001", - "src": "top.v:93.11-109.5|spi_slave.v:28.3-44.6|spi_if.v:42.15-54.6|/usr/local/bin/../share/yosys/ice40/ff_map.v:5.57-5.103" + "src": "top.v:92.11-108.5|spi_slave.v:28.3-44.6|spi_if.v:42.15-54.6|/usr/local/bin/../share/yosys/ice40/ff_map.v:5.57-5.103" }, "port_directions": { "C": "input", @@ -27557,9 +27966,9 @@ }, "connections": { "C": [ 43 ], - "D": [ 929 ], - "E": [ 930 ], - "Q": [ 894 ] + "D": [ 939 ], + "E": [ 940 ], + "Q": [ 918 ] } }, "spi_if_ins.spi.r_rx_byte_SB_DFFE_Q_1": { @@ -27569,7 +27978,7 @@ }, "attributes": { "module_not_derived": "00000000000000000000000000000001", - "src": "top.v:93.11-109.5|spi_slave.v:28.3-44.6|spi_if.v:42.15-54.6|/usr/local/bin/../share/yosys/ice40/ff_map.v:5.57-5.103" + "src": "top.v:92.11-108.5|spi_slave.v:28.3-44.6|spi_if.v:42.15-54.6|/usr/local/bin/../share/yosys/ice40/ff_map.v:5.57-5.103" }, "port_directions": { "C": "input", @@ -27579,9 +27988,9 @@ }, "connections": { "C": [ 43 ], - "D": [ 931 ], - "E": [ 930 ], - "Q": [ 896 ] + "D": [ 941 ], + "E": [ 940 ], + "Q": [ 920 ] } }, "spi_if_ins.spi.r_rx_byte_SB_DFFE_Q_2": { @@ -27591,7 +28000,7 @@ }, "attributes": { "module_not_derived": "00000000000000000000000000000001", - "src": "top.v:93.11-109.5|spi_slave.v:28.3-44.6|spi_if.v:42.15-54.6|/usr/local/bin/../share/yosys/ice40/ff_map.v:5.57-5.103" + "src": "top.v:92.11-108.5|spi_slave.v:28.3-44.6|spi_if.v:42.15-54.6|/usr/local/bin/../share/yosys/ice40/ff_map.v:5.57-5.103" }, "port_directions": { "C": "input", @@ -27601,9 +28010,9 @@ }, "connections": { "C": [ 43 ], - "D": [ 932 ], - "E": [ 930 ], - "Q": [ 897 ] + "D": [ 942 ], + "E": [ 940 ], + "Q": [ 921 ] } }, "spi_if_ins.spi.r_rx_byte_SB_DFFE_Q_3": { @@ -27613,7 +28022,7 @@ }, "attributes": { "module_not_derived": "00000000000000000000000000000001", - "src": "top.v:93.11-109.5|spi_slave.v:28.3-44.6|spi_if.v:42.15-54.6|/usr/local/bin/../share/yosys/ice40/ff_map.v:5.57-5.103" + "src": "top.v:92.11-108.5|spi_slave.v:28.3-44.6|spi_if.v:42.15-54.6|/usr/local/bin/../share/yosys/ice40/ff_map.v:5.57-5.103" }, "port_directions": { "C": "input", @@ -27623,9 +28032,9 @@ }, "connections": { "C": [ 43 ], - "D": [ 933 ], - "E": [ 930 ], - "Q": [ 898 ] + "D": [ 943 ], + "E": [ 940 ], + "Q": [ 922 ] } }, "spi_if_ins.spi.r_rx_byte_SB_DFFE_Q_4": { @@ -27635,7 +28044,7 @@ }, "attributes": { "module_not_derived": "00000000000000000000000000000001", - "src": "top.v:93.11-109.5|spi_slave.v:28.3-44.6|spi_if.v:42.15-54.6|/usr/local/bin/../share/yosys/ice40/ff_map.v:5.57-5.103" + "src": "top.v:92.11-108.5|spi_slave.v:28.3-44.6|spi_if.v:42.15-54.6|/usr/local/bin/../share/yosys/ice40/ff_map.v:5.57-5.103" }, "port_directions": { "C": "input", @@ -27645,9 +28054,9 @@ }, "connections": { "C": [ 43 ], - "D": [ 934 ], - "E": [ 930 ], - "Q": [ 899 ] + "D": [ 944 ], + "E": [ 940 ], + "Q": [ 923 ] } }, "spi_if_ins.spi.r_rx_byte_SB_DFFE_Q_5": { @@ -27657,7 +28066,7 @@ }, "attributes": { "module_not_derived": "00000000000000000000000000000001", - "src": "top.v:93.11-109.5|spi_slave.v:28.3-44.6|spi_if.v:42.15-54.6|/usr/local/bin/../share/yosys/ice40/ff_map.v:5.57-5.103" + "src": "top.v:92.11-108.5|spi_slave.v:28.3-44.6|spi_if.v:42.15-54.6|/usr/local/bin/../share/yosys/ice40/ff_map.v:5.57-5.103" }, "port_directions": { "C": "input", @@ -27667,9 +28076,9 @@ }, "connections": { "C": [ 43 ], - "D": [ 935 ], - "E": [ 930 ], - "Q": [ 900 ] + "D": [ 945 ], + "E": [ 940 ], + "Q": [ 924 ] } }, "spi_if_ins.spi.r_rx_byte_SB_DFFE_Q_6": { @@ -27679,7 +28088,7 @@ }, "attributes": { "module_not_derived": "00000000000000000000000000000001", - "src": "top.v:93.11-109.5|spi_slave.v:28.3-44.6|spi_if.v:42.15-54.6|/usr/local/bin/../share/yosys/ice40/ff_map.v:5.57-5.103" + "src": "top.v:92.11-108.5|spi_slave.v:28.3-44.6|spi_if.v:42.15-54.6|/usr/local/bin/../share/yosys/ice40/ff_map.v:5.57-5.103" }, "port_directions": { "C": "input", @@ -27689,9 +28098,9 @@ }, "connections": { "C": [ 43 ], - "D": [ 936 ], - "E": [ 930 ], - "Q": [ 901 ] + "D": [ 946 ], + "E": [ 940 ], + "Q": [ 925 ] } }, "spi_if_ins.spi.r_rx_byte_SB_DFFE_Q_7": { @@ -27701,7 +28110,7 @@ }, "attributes": { "module_not_derived": "00000000000000000000000000000001", - "src": "top.v:93.11-109.5|spi_slave.v:28.3-44.6|spi_if.v:42.15-54.6|/usr/local/bin/../share/yosys/ice40/ff_map.v:5.57-5.103" + "src": "top.v:92.11-108.5|spi_slave.v:28.3-44.6|spi_if.v:42.15-54.6|/usr/local/bin/../share/yosys/ice40/ff_map.v:5.57-5.103" }, "port_directions": { "C": "input", @@ -27712,8 +28121,8 @@ "connections": { "C": [ 43 ], "D": [ 42 ], - "E": [ 930 ], - "Q": [ 902 ] + "E": [ 940 ], + "Q": [ 926 ] } }, "spi_if_ins.spi.r_rx_done_SB_DFFER_Q": { @@ -27723,7 +28132,7 @@ }, "attributes": { "module_not_derived": "00000000000000000000000000000001", - "src": "top.v:93.11-109.5|spi_slave.v:28.3-44.6|spi_if.v:42.15-54.6|/usr/local/bin/../share/yosys/ice40/ff_map.v:14.63-14.116" + "src": "top.v:92.11-108.5|spi_slave.v:28.3-44.6|spi_if.v:42.15-54.6|/usr/local/bin/../share/yosys/ice40/ff_map.v:14.63-14.116" }, "port_directions": { "C": "input", @@ -27734,9 +28143,9 @@ }, "connections": { "C": [ 43 ], - "D": [ 937 ], - "E": [ 938 ], - "Q": [ 919 ], + "D": [ 947 ], + "E": [ 948 ], + "Q": [ 929 ], "R": [ 44 ] } }, @@ -27761,8 +28170,8 @@ "I0": [ "0" ], "I1": [ "0" ], "I2": [ 44 ], - "I3": [ 937 ], - "O": [ 930 ] + "I3": [ 947 ], + "O": [ 940 ] } }, "spi_if_ins.spi.r_rx_done_SB_DFFER_Q_D_SB_LUT4_O": { @@ -27784,10 +28193,10 @@ }, "connections": { "I0": [ "0" ], - "I1": [ 927 ], - "I2": [ 923 ], - "I3": [ 925 ], - "O": [ 937 ] + "I1": [ 937 ], + "I2": [ 933 ], + "I3": [ 935 ], + "O": [ 947 ] } }, "spi_if_ins.spi.r_rx_done_SB_DFFER_Q_E_SB_LUT4_O": { @@ -27809,10 +28218,10 @@ }, "connections": { "I0": [ "0" ], - "I1": [ 927 ], - "I2": [ 923 ], - "I3": [ 925 ], - "O": [ 938 ] + "I1": [ 937 ], + "I2": [ 933 ], + "I3": [ 935 ], + "O": [ 948 ] } }, "spi_if_ins.spi.r_temp_rx_byte_SB_DFFE_Q": { @@ -27822,7 +28231,7 @@ }, "attributes": { "module_not_derived": "00000000000000000000000000000001", - "src": "top.v:93.11-109.5|spi_slave.v:28.3-44.6|spi_if.v:42.15-54.6|/usr/local/bin/../share/yosys/ice40/ff_map.v:5.57-5.103" + "src": "top.v:92.11-108.5|spi_slave.v:28.3-44.6|spi_if.v:42.15-54.6|/usr/local/bin/../share/yosys/ice40/ff_map.v:5.57-5.103" }, "port_directions": { "C": "input", @@ -27832,9 +28241,9 @@ }, "connections": { "C": [ 43 ], - "D": [ 931 ], - "E": [ 112 ], - "Q": [ 929 ] + "D": [ 941 ], + "E": [ 88 ], + "Q": [ 939 ] } }, "spi_if_ins.spi.r_temp_rx_byte_SB_DFFE_Q_1": { @@ -27844,7 +28253,7 @@ }, "attributes": { "module_not_derived": "00000000000000000000000000000001", - "src": "top.v:93.11-109.5|spi_slave.v:28.3-44.6|spi_if.v:42.15-54.6|/usr/local/bin/../share/yosys/ice40/ff_map.v:5.57-5.103" + "src": "top.v:92.11-108.5|spi_slave.v:28.3-44.6|spi_if.v:42.15-54.6|/usr/local/bin/../share/yosys/ice40/ff_map.v:5.57-5.103" }, "port_directions": { "C": "input", @@ -27854,9 +28263,9 @@ }, "connections": { "C": [ 43 ], - "D": [ 932 ], - "E": [ 112 ], - "Q": [ 931 ] + "D": [ 942 ], + "E": [ 88 ], + "Q": [ 941 ] } }, "spi_if_ins.spi.r_temp_rx_byte_SB_DFFE_Q_2": { @@ -27866,7 +28275,7 @@ }, "attributes": { "module_not_derived": "00000000000000000000000000000001", - "src": "top.v:93.11-109.5|spi_slave.v:28.3-44.6|spi_if.v:42.15-54.6|/usr/local/bin/../share/yosys/ice40/ff_map.v:5.57-5.103" + "src": "top.v:92.11-108.5|spi_slave.v:28.3-44.6|spi_if.v:42.15-54.6|/usr/local/bin/../share/yosys/ice40/ff_map.v:5.57-5.103" }, "port_directions": { "C": "input", @@ -27876,9 +28285,9 @@ }, "connections": { "C": [ 43 ], - "D": [ 933 ], - "E": [ 112 ], - "Q": [ 932 ] + "D": [ 943 ], + "E": [ 88 ], + "Q": [ 942 ] } }, "spi_if_ins.spi.r_temp_rx_byte_SB_DFFE_Q_3": { @@ -27888,7 +28297,7 @@ }, "attributes": { "module_not_derived": "00000000000000000000000000000001", - "src": "top.v:93.11-109.5|spi_slave.v:28.3-44.6|spi_if.v:42.15-54.6|/usr/local/bin/../share/yosys/ice40/ff_map.v:5.57-5.103" + "src": "top.v:92.11-108.5|spi_slave.v:28.3-44.6|spi_if.v:42.15-54.6|/usr/local/bin/../share/yosys/ice40/ff_map.v:5.57-5.103" }, "port_directions": { "C": "input", @@ -27898,9 +28307,9 @@ }, "connections": { "C": [ 43 ], - "D": [ 934 ], - "E": [ 112 ], - "Q": [ 933 ] + "D": [ 944 ], + "E": [ 88 ], + "Q": [ 943 ] } }, "spi_if_ins.spi.r_temp_rx_byte_SB_DFFE_Q_4": { @@ -27910,7 +28319,7 @@ }, "attributes": { "module_not_derived": "00000000000000000000000000000001", - "src": "top.v:93.11-109.5|spi_slave.v:28.3-44.6|spi_if.v:42.15-54.6|/usr/local/bin/../share/yosys/ice40/ff_map.v:5.57-5.103" + "src": "top.v:92.11-108.5|spi_slave.v:28.3-44.6|spi_if.v:42.15-54.6|/usr/local/bin/../share/yosys/ice40/ff_map.v:5.57-5.103" }, "port_directions": { "C": "input", @@ -27920,9 +28329,9 @@ }, "connections": { "C": [ 43 ], - "D": [ 935 ], - "E": [ 112 ], - "Q": [ 934 ] + "D": [ 945 ], + "E": [ 88 ], + "Q": [ 944 ] } }, "spi_if_ins.spi.r_temp_rx_byte_SB_DFFE_Q_5": { @@ -27932,7 +28341,7 @@ }, "attributes": { "module_not_derived": "00000000000000000000000000000001", - "src": "top.v:93.11-109.5|spi_slave.v:28.3-44.6|spi_if.v:42.15-54.6|/usr/local/bin/../share/yosys/ice40/ff_map.v:5.57-5.103" + "src": "top.v:92.11-108.5|spi_slave.v:28.3-44.6|spi_if.v:42.15-54.6|/usr/local/bin/../share/yosys/ice40/ff_map.v:5.57-5.103" }, "port_directions": { "C": "input", @@ -27942,9 +28351,9 @@ }, "connections": { "C": [ 43 ], - "D": [ 936 ], - "E": [ 112 ], - "Q": [ 935 ] + "D": [ 946 ], + "E": [ 88 ], + "Q": [ 945 ] } }, "spi_if_ins.spi.r_temp_rx_byte_SB_DFFE_Q_6": { @@ -27954,7 +28363,7 @@ }, "attributes": { "module_not_derived": "00000000000000000000000000000001", - "src": "top.v:93.11-109.5|spi_slave.v:28.3-44.6|spi_if.v:42.15-54.6|/usr/local/bin/../share/yosys/ice40/ff_map.v:5.57-5.103" + "src": "top.v:92.11-108.5|spi_slave.v:28.3-44.6|spi_if.v:42.15-54.6|/usr/local/bin/../share/yosys/ice40/ff_map.v:5.57-5.103" }, "port_directions": { "C": "input", @@ -27965,8 +28374,8 @@ "connections": { "C": [ 43 ], "D": [ 42 ], - "E": [ 112 ], - "Q": [ 936 ] + "E": [ 88 ], + "Q": [ 946 ] } }, "spi_if_ins.spi.r_tx_bit_count_SB_DFFESR_Q": { @@ -27976,7 +28385,7 @@ }, "attributes": { "module_not_derived": "00000000000000000000000000000001", - "src": "top.v:93.11-109.5|spi_slave.v:69.3-86.6|spi_if.v:42.15-54.6|/usr/local/bin/../share/yosys/ice40/ff_map.v:24.66-24.119" + "src": "top.v:92.11-108.5|spi_slave.v:69.3-86.6|spi_if.v:42.15-54.6|/usr/local/bin/../share/yosys/ice40/ff_map.v:24.66-24.119" }, "port_directions": { "C": "input", @@ -27986,11 +28395,11 @@ "R": "input" }, "connections": { - "C": [ 113 ], - "D": [ 939 ], - "E": [ 904 ], - "Q": [ 891 ], - "R": [ 940 ] + "C": [ 89 ], + "D": [ 949 ], + "E": [ 928 ], + "Q": [ 905 ], + "R": [ 950 ] } }, "spi_if_ins.spi.r_tx_bit_count_SB_DFFESR_Q_D_SB_LUT4_O": { @@ -28001,32 +28410,7 @@ }, "attributes": { "module_not_derived": "00000000000000000000000000000001", - "src": "top.v:93.11-109.5|spi_slave.v:77.27-77.45|spi_if.v:42.15-54.6|/usr/local/bin/../share/yosys/ice40/arith_map.v:62.5-70.4|/usr/local/bin/../share/yosys/ice40/cells_map.v:26.33-27.52" - }, - "port_directions": { - "I0": "input", - "I1": "input", - "I2": "input", - "I3": "input", - "O": "output" - }, - "connections": { - "I0": [ "0" ], - "I1": [ 892 ], - "I2": [ "1" ], - "I3": [ 941 ], - "O": [ 942 ] - } - }, - "spi_if_ins.spi.r_tx_bit_count_SB_DFFESR_Q_D_SB_LUT4_O_1": { - "hide_name": 0, - "type": "SB_LUT4", - "parameters": { - "LUT_INIT": "0110100110010110" - }, - "attributes": { - "module_not_derived": "00000000000000000000000000000001", - "src": "top.v:93.11-109.5|spi_slave.v:77.27-77.45|spi_if.v:42.15-54.6|/usr/local/bin/../share/yosys/ice40/arith_map.v:62.5-70.4|/usr/local/bin/../share/yosys/ice40/cells_map.v:26.33-27.52" + "src": "top.v:92.11-108.5|spi_slave.v:77.27-77.45|spi_if.v:42.15-54.6|/usr/local/bin/../share/yosys/ice40/arith_map.v:62.5-70.4|/usr/local/bin/../share/yosys/ice40/cells_map.v:26.33-27.52" }, "port_directions": { "I0": "input", @@ -28039,8 +28423,33 @@ "I0": [ "0" ], "I1": [ 909 ], "I2": [ "1" ], - "I3": [ 891 ], - "O": [ 943 ] + "I3": [ 951 ], + "O": [ 952 ] + } + }, + "spi_if_ins.spi.r_tx_bit_count_SB_DFFESR_Q_D_SB_LUT4_O_1": { + "hide_name": 0, + "type": "SB_LUT4", + "parameters": { + "LUT_INIT": "0110100110010110" + }, + "attributes": { + "module_not_derived": "00000000000000000000000000000001", + "src": "top.v:92.11-108.5|spi_slave.v:77.27-77.45|spi_if.v:42.15-54.6|/usr/local/bin/../share/yosys/ice40/arith_map.v:62.5-70.4|/usr/local/bin/../share/yosys/ice40/cells_map.v:26.33-27.52" + }, + "port_directions": { + "I0": "input", + "I1": "input", + "I2": "input", + "I3": "input", + "O": "output" + }, + "connections": { + "I0": [ "0" ], + "I1": [ 901 ], + "I2": [ "1" ], + "I3": [ 905 ], + "O": [ 953 ] } }, "spi_if_ins.spi.r_tx_bit_count_SB_DFFESR_Q_D_SB_LUT4_O_2": { @@ -28064,8 +28473,8 @@ "I0": [ "0" ], "I1": [ "0" ], "I2": [ "0" ], - "I3": [ 891 ], - "O": [ 939 ] + "I3": [ 905 ], + "O": [ 949 ] } }, "spi_if_ins.spi.r_tx_bit_count_SB_DFFESR_Q_D_SB_LUT4_O_I3_SB_CARRY_CO": { @@ -28074,7 +28483,7 @@ "parameters": { }, "attributes": { - "src": "top.v:93.11-109.5|spi_slave.v:77.27-77.45|spi_if.v:42.15-54.6|/usr/local/bin/../share/yosys/ice40/arith_map.v:62.5-70.4" + "src": "top.v:92.11-108.5|spi_slave.v:77.27-77.45|spi_if.v:42.15-54.6|/usr/local/bin/../share/yosys/ice40/arith_map.v:62.5-70.4" }, "port_directions": { "CI": "input", @@ -28083,9 +28492,9 @@ "I1": "input" }, "connections": { - "CI": [ 891 ], - "CO": [ 941 ], - "I0": [ 909 ], + "CI": [ 905 ], + "CO": [ 951 ], + "I0": [ 901 ], "I1": [ "1" ] } }, @@ -28110,8 +28519,8 @@ "I0": [ "0" ], "I1": [ "0" ], "I2": [ "0" ], - "I3": [ 887 ], - "O": [ 940 ] + "I3": [ 897 ], + "O": [ 950 ] } }, "spi_if_ins.spi.r_tx_bit_count_SB_DFFESS_Q": { @@ -28121,7 +28530,7 @@ }, "attributes": { "module_not_derived": "00000000000000000000000000000001", - "src": "top.v:93.11-109.5|spi_slave.v:69.3-86.6|spi_if.v:42.15-54.6|/usr/local/bin/../share/yosys/ice40/ff_map.v:25.66-25.119" + "src": "top.v:92.11-108.5|spi_slave.v:69.3-86.6|spi_if.v:42.15-54.6|/usr/local/bin/../share/yosys/ice40/ff_map.v:25.66-25.119" }, "port_directions": { "C": "input", @@ -28131,11 +28540,11 @@ "S": "input" }, "connections": { - "C": [ 113 ], - "D": [ 942 ], - "E": [ 904 ], - "Q": [ 892 ], - "S": [ 940 ] + "C": [ 89 ], + "D": [ 952 ], + "E": [ 928 ], + "Q": [ 909 ], + "S": [ 950 ] } }, "spi_if_ins.spi.r_tx_bit_count_SB_DFFESS_Q_1": { @@ -28145,7 +28554,7 @@ }, "attributes": { "module_not_derived": "00000000000000000000000000000001", - "src": "top.v:93.11-109.5|spi_slave.v:69.3-86.6|spi_if.v:42.15-54.6|/usr/local/bin/../share/yosys/ice40/ff_map.v:25.66-25.119" + "src": "top.v:92.11-108.5|spi_slave.v:69.3-86.6|spi_if.v:42.15-54.6|/usr/local/bin/../share/yosys/ice40/ff_map.v:25.66-25.119" }, "port_directions": { "C": "input", @@ -28155,11 +28564,11 @@ "S": "input" }, "connections": { - "C": [ 113 ], - "D": [ 943 ], - "E": [ 904 ], - "Q": [ 909 ], - "S": [ 940 ] + "C": [ 89 ], + "D": [ 953 ], + "E": [ 928 ], + "Q": [ 901 ], + "S": [ 950 ] } }, "spi_if_ins.spi.r_tx_byte_SB_DFFESR_Q": { @@ -28169,7 +28578,7 @@ }, "attributes": { "module_not_derived": "00000000000000000000000000000001", - "src": "top.v:93.11-109.5|spi_slave.v:69.3-86.6|spi_if.v:42.15-54.6|/usr/local/bin/../share/yosys/ice40/ff_map.v:24.66-24.119" + "src": "top.v:92.11-108.5|spi_slave.v:69.3-86.6|spi_if.v:42.15-54.6|/usr/local/bin/../share/yosys/ice40/ff_map.v:24.66-24.119" }, "port_directions": { "C": "input", @@ -28179,11 +28588,11 @@ "R": "input" }, "connections": { - "C": [ 113 ], - "D": [ 875 ], - "E": [ 944 ], - "Q": [ 916 ], - "R": [ 887 ] + "C": [ 89 ], + "D": [ 886 ], + "E": [ 954 ], + "Q": [ 911 ], + "R": [ 897 ] } }, "spi_if_ins.spi.r_tx_byte_SB_DFFESR_Q_1": { @@ -28193,7 +28602,7 @@ }, "attributes": { "module_not_derived": "00000000000000000000000000000001", - "src": "top.v:93.11-109.5|spi_slave.v:69.3-86.6|spi_if.v:42.15-54.6|/usr/local/bin/../share/yosys/ice40/ff_map.v:24.66-24.119" + "src": "top.v:92.11-108.5|spi_slave.v:69.3-86.6|spi_if.v:42.15-54.6|/usr/local/bin/../share/yosys/ice40/ff_map.v:24.66-24.119" }, "port_directions": { "C": "input", @@ -28203,11 +28612,11 @@ "R": "input" }, "connections": { - "C": [ 113 ], - "D": [ 876 ], - "E": [ 944 ], - "Q": [ 914 ], - "R": [ 887 ] + "C": [ 89 ], + "D": [ 887 ], + "E": [ 954 ], + "Q": [ 908 ], + "R": [ 897 ] } }, "spi_if_ins.spi.r_tx_byte_SB_DFFESR_Q_2": { @@ -28217,7 +28626,7 @@ }, "attributes": { "module_not_derived": "00000000000000000000000000000001", - "src": "top.v:93.11-109.5|spi_slave.v:69.3-86.6|spi_if.v:42.15-54.6|/usr/local/bin/../share/yosys/ice40/ff_map.v:24.66-24.119" + "src": "top.v:92.11-108.5|spi_slave.v:69.3-86.6|spi_if.v:42.15-54.6|/usr/local/bin/../share/yosys/ice40/ff_map.v:24.66-24.119" }, "port_directions": { "C": "input", @@ -28227,11 +28636,11 @@ "R": "input" }, "connections": { - "C": [ 113 ], - "D": [ 877 ], - "E": [ 944 ], - "Q": [ 918 ], - "R": [ 887 ] + "C": [ 89 ], + "D": [ 888 ], + "E": [ 954 ], + "Q": [ 913 ], + "R": [ 897 ] } }, "spi_if_ins.spi.r_tx_byte_SB_DFFESR_Q_3": { @@ -28241,7 +28650,7 @@ }, "attributes": { "module_not_derived": "00000000000000000000000000000001", - "src": "top.v:93.11-109.5|spi_slave.v:69.3-86.6|spi_if.v:42.15-54.6|/usr/local/bin/../share/yosys/ice40/ff_map.v:24.66-24.119" + "src": "top.v:92.11-108.5|spi_slave.v:69.3-86.6|spi_if.v:42.15-54.6|/usr/local/bin/../share/yosys/ice40/ff_map.v:24.66-24.119" }, "port_directions": { "C": "input", @@ -28251,11 +28660,11 @@ "R": "input" }, "connections": { - "C": [ 113 ], - "D": [ 878 ], - "E": [ 944 ], - "Q": [ 911 ], - "R": [ 887 ] + "C": [ 89 ], + "D": [ 889 ], + "E": [ 954 ], + "Q": [ 904 ], + "R": [ 897 ] } }, "spi_if_ins.spi.r_tx_byte_SB_DFFESR_Q_4": { @@ -28265,7 +28674,7 @@ }, "attributes": { "module_not_derived": "00000000000000000000000000000001", - "src": "top.v:93.11-109.5|spi_slave.v:69.3-86.6|spi_if.v:42.15-54.6|/usr/local/bin/../share/yosys/ice40/ff_map.v:24.66-24.119" + "src": "top.v:92.11-108.5|spi_slave.v:69.3-86.6|spi_if.v:42.15-54.6|/usr/local/bin/../share/yosys/ice40/ff_map.v:24.66-24.119" }, "port_directions": { "C": "input", @@ -28275,11 +28684,11 @@ "R": "input" }, "connections": { - "C": [ 113 ], - "D": [ 879 ], - "E": [ 944 ], - "Q": [ 915 ], - "R": [ 887 ] + "C": [ 89 ], + "D": [ 890 ], + "E": [ 954 ], + "Q": [ 910 ], + "R": [ 897 ] } }, "spi_if_ins.spi.r_tx_byte_SB_DFFESR_Q_5": { @@ -28289,7 +28698,7 @@ }, "attributes": { "module_not_derived": "00000000000000000000000000000001", - "src": "top.v:93.11-109.5|spi_slave.v:69.3-86.6|spi_if.v:42.15-54.6|/usr/local/bin/../share/yosys/ice40/ff_map.v:24.66-24.119" + "src": "top.v:92.11-108.5|spi_slave.v:69.3-86.6|spi_if.v:42.15-54.6|/usr/local/bin/../share/yosys/ice40/ff_map.v:24.66-24.119" }, "port_directions": { "C": "input", @@ -28299,11 +28708,11 @@ "R": "input" }, "connections": { - "C": [ 113 ], - "D": [ 880 ], - "E": [ 944 ], - "Q": [ 913 ], - "R": [ 887 ] + "C": [ 89 ], + "D": [ 891 ], + "E": [ 954 ], + "Q": [ 907 ], + "R": [ 897 ] } }, "spi_if_ins.spi.r_tx_byte_SB_DFFESR_Q_6": { @@ -28313,7 +28722,7 @@ }, "attributes": { "module_not_derived": "00000000000000000000000000000001", - "src": "top.v:93.11-109.5|spi_slave.v:69.3-86.6|spi_if.v:42.15-54.6|/usr/local/bin/../share/yosys/ice40/ff_map.v:24.66-24.119" + "src": "top.v:92.11-108.5|spi_slave.v:69.3-86.6|spi_if.v:42.15-54.6|/usr/local/bin/../share/yosys/ice40/ff_map.v:24.66-24.119" }, "port_directions": { "C": "input", @@ -28323,11 +28732,11 @@ "R": "input" }, "connections": { - "C": [ 113 ], - "D": [ 881 ], - "E": [ 944 ], - "Q": [ 917 ], - "R": [ 887 ] + "C": [ 89 ], + "D": [ 892 ], + "E": [ 954 ], + "Q": [ 912 ], + "R": [ 897 ] } }, "spi_if_ins.spi.r_tx_byte_SB_DFFESR_Q_7": { @@ -28337,7 +28746,7 @@ }, "attributes": { "module_not_derived": "00000000000000000000000000000001", - "src": "top.v:93.11-109.5|spi_slave.v:69.3-86.6|spi_if.v:42.15-54.6|/usr/local/bin/../share/yosys/ice40/ff_map.v:24.66-24.119" + "src": "top.v:92.11-108.5|spi_slave.v:69.3-86.6|spi_if.v:42.15-54.6|/usr/local/bin/../share/yosys/ice40/ff_map.v:24.66-24.119" }, "port_directions": { "C": "input", @@ -28347,11 +28756,11 @@ "R": "input" }, "connections": { - "C": [ 113 ], - "D": [ 882 ], - "E": [ 944 ], - "Q": [ 910 ], - "R": [ 887 ] + "C": [ 89 ], + "D": [ 893 ], + "E": [ 954 ], + "Q": [ 903 ], + "R": [ 897 ] } }, "spi_if_ins.spi.r_tx_byte_SB_DFFESR_Q_E_SB_LUT4_O": { @@ -28373,10 +28782,10 @@ }, "connections": { "I0": [ "0" ], - "I1": [ 909 ], - "I2": [ 893 ], - "I3": [ 887 ], - "O": [ 944 ] + "I1": [ 901 ], + "I2": [ 917 ], + "I3": [ 897 ], + "O": [ 954 ] } }, "spi_if_ins.state_if_SB_DFFESR_Q": { @@ -28386,7 +28795,7 @@ }, "attributes": { "module_not_derived": "00000000000000000000000000000001", - "src": "top.v:93.11-109.5|spi_if.v:56.5-111.8|/usr/local/bin/../share/yosys/ice40/ff_map.v:24.66-24.119" + "src": "top.v:92.11-108.5|spi_if.v:56.5-111.8|/usr/local/bin/../share/yosys/ice40/ff_map.v:24.66-24.119" }, "port_directions": { "C": "input", @@ -28396,11 +28805,11 @@ "R": "input" }, "connections": { - "C": [ 113 ], - "D": [ 886 ], - "E": [ 945 ], - "Q": [ 861 ], - "R": [ 862 ] + "C": [ 89 ], + "D": [ 884 ], + "E": [ 955 ], + "Q": [ 872 ], + "R": [ 873 ] } }, "spi_if_ins.state_if_SB_DFFESR_Q_1": { @@ -28410,7 +28819,7 @@ }, "attributes": { "module_not_derived": "00000000000000000000000000000001", - "src": "top.v:93.11-109.5|spi_if.v:56.5-111.8|/usr/local/bin/../share/yosys/ice40/ff_map.v:24.66-24.119" + "src": "top.v:92.11-108.5|spi_if.v:56.5-111.8|/usr/local/bin/../share/yosys/ice40/ff_map.v:24.66-24.119" }, "port_directions": { "C": "input", @@ -28420,36 +28829,11 @@ "R": "input" }, "connections": { - "C": [ 113 ], - "D": [ 946 ], - "E": [ 945 ], - "Q": [ 863 ], - "R": [ 868 ] - } - }, - "spi_if_ins.state_if_SB_DFFESR_Q_1_D_SB_LUT4_O": { - "hide_name": 0, - "type": "SB_LUT4", - "parameters": { - "LUT_INIT": "1100111111110011" - }, - "attributes": { - "module_not_derived": "00000000000000000000000000000001", - "src": "/usr/local/bin/../share/yosys/ice40/cells_map.v:22.34-23.52" - }, - "port_directions": { - "I0": "input", - "I1": "input", - "I2": "input", - "I3": "input", - "O": "output" - }, - "connections": { - "I0": [ "0" ], - "I1": [ 861 ], - "I2": [ 863 ], - "I3": [ 864 ], - "O": [ 946 ] + "C": [ 89 ], + "D": [ 956 ], + "E": [ 955 ], + "Q": [ 874 ], + "R": [ 879 ] } }, "spi_if_ins.state_if_SB_DFFESR_Q_1_R_SB_LUT4_O": { @@ -28473,15 +28857,15 @@ "I0": [ "0" ], "I1": [ "0" ], "I2": [ "0" ], - "I3": [ 862 ], - "O": [ 868 ] + "I3": [ 873 ], + "O": [ 879 ] } }, - "spi_if_ins.state_if_SB_DFFESR_Q_D_SB_LUT4_I1": { + "spi_if_ins.state_if_SB_DFFESR_Q_D_SB_LUT4_O": { "hide_name": 0, "type": "SB_LUT4", "parameters": { - "LUT_INIT": "0000111100110011" + "LUT_INIT": "1100111111110011" }, "attributes": { "module_not_derived": "00000000000000000000000000000001", @@ -28496,13 +28880,13 @@ }, "connections": { "I0": [ "0" ], - "I1": [ 886 ], - "I2": [ 869 ], - "I3": [ 862 ], - "O": [ 870 ] + "I1": [ 872 ], + "I2": [ 874 ], + "I3": [ 875 ], + "O": [ 956 ] } }, - "spi_if_ins.state_if_SB_DFFESR_Q_D_SB_LUT4_O": { + "spi_if_ins.state_if_SB_DFFESR_Q_D_SB_LUT4_O_1": { "hide_name": 0, "type": "SB_LUT4", "parameters": { @@ -28521,10 +28905,10 @@ }, "connections": { "I0": [ "0" ], - "I1": [ 861 ], - "I2": [ 864 ], - "I3": [ 863 ], - "O": [ 886 ] + "I1": [ 872 ], + "I2": [ 875 ], + "I3": [ 874 ], + "O": [ 884 ] } }, "spi_if_ins.state_if_SB_DFFE_Q": { @@ -28534,7 +28918,7 @@ }, "attributes": { "module_not_derived": "00000000000000000000000000000001", - "src": "top.v:93.11-109.5|spi_if.v:56.5-111.8|/usr/local/bin/../share/yosys/ice40/ff_map.v:5.57-5.103" + "src": "top.v:92.11-108.5|spi_if.v:56.5-111.8|/usr/local/bin/../share/yosys/ice40/ff_map.v:5.57-5.103" }, "port_directions": { "C": "input", @@ -28543,10 +28927,10 @@ "Q": "output" }, "connections": { - "C": [ 113 ], - "D": [ 947 ], - "E": [ 945 ], - "Q": [ 864 ] + "C": [ 89 ], + "D": [ 957 ], + "E": [ 955 ], + "Q": [ 875 ] } }, "spi_if_ins.state_if_SB_DFFE_Q_D_SB_LUT4_O": { @@ -28567,11 +28951,11 @@ "O": "output" }, "connections": { - "I0": [ 946 ], - "I1": [ 854 ], - "I2": [ 886 ], - "I3": [ 862 ], - "O": [ 947 ] + "I0": [ 956 ], + "I1": [ 865 ], + "I2": [ 884 ], + "I3": [ 873 ], + "O": [ 957 ] } }, "spi_if_ins.state_if_SB_DFFE_Q_E_SB_LUT4_O": { @@ -28592,11 +28976,11 @@ "O": "output" }, "connections": { - "I0": [ 861 ], - "I1": [ 862 ], - "I2": [ 863 ], - "I3": [ 864 ], - "O": [ 945 ] + "I0": [ 872 ], + "I1": [ 873 ], + "I2": [ 874 ], + "I3": [ 875 ], + "O": [ 955 ] } }, "sys_ctrl_ins.i_cs_SB_DFFE_Q": { @@ -28606,7 +28990,7 @@ }, "attributes": { "module_not_derived": "00000000000000000000000000000001", - "src": "top.v:93.11-109.5|spi_if.v:56.5-111.8|/usr/local/bin/../share/yosys/ice40/ff_map.v:5.57-5.103" + "src": "top.v:92.11-108.5|spi_if.v:56.5-111.8|/usr/local/bin/../share/yosys/ice40/ff_map.v:5.57-5.103" }, "port_directions": { "C": "input", @@ -28615,10 +28999,10 @@ "Q": "output" }, "connections": { - "C": [ 113 ], - "D": [ 126 ], - "E": [ 124 ], - "Q": [ 853 ] + "C": [ 89 ], + "D": [ 105 ], + "E": [ 103 ], + "Q": [ 864 ] } }, "sys_ctrl_ins.o_data_out_SB_DFFE_Q": { @@ -28628,7 +29012,7 @@ }, "attributes": { "module_not_derived": "00000000000000000000000000000001", - "src": "top.v:114.13-127.5|sys_ctrl.v:39.5-64.8|/usr/local/bin/../share/yosys/ice40/ff_map.v:5.57-5.103" + "src": "top.v:113.13-126.5|sys_ctrl.v:39.5-64.8|/usr/local/bin/../share/yosys/ice40/ff_map.v:5.57-5.103" }, "port_directions": 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"I0": "input", - "I1": "input", - "I2": "input", - "I3": "input", - "O": "output" - }, - "connections": { - "I0": [ "0" ], - "I1": [ 52 ], - "I2": [ 50 ], - "I3": [ 53 ], - "O": [ 137 ] + "C": [ 89 ], + "D": [ 124 ], + "E": [ 958 ], + "Q": [ 959 ] } }, "sys_ctrl_ins.o_data_out_SB_DFFE_Q_E_SB_LUT4_O": { @@ -28712,10 +29046,10 @@ }, "connections": { "I0": [ "0" ], - "I1": [ 52 ], - "I2": [ 853 ], - "I3": [ 867 ], - "O": [ 948 ] + "I1": [ 107 ], + "I2": [ 864 ], + "I3": [ 878 ], + "O": [ 958 ] } }, "sys_ctrl_ins.o_data_out_SB_LUT4_I0": { @@ -28736,11 +29070,11 @@ "O": "output" }, "connections": { - "I0": [ 949 ], - "I1": [ 457 ], - "I2": [ 801 ], - "I3": [ 799 ], - "O": [ 471 ] + "I0": [ 959 ], + "I1": [ 496 ], + "I2": [ 805 ], + "I3": [ 803 ], + "O": [ 510 ] } }, "sys_ctrl_ins.o_soft_reset_SB_DFFESS_Q": { @@ -28750,7 +29084,7 @@ }, "attributes": { "module_not_derived": "00000000000000000000000000000001", - "src": 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}, "w_lvds_rx_24_d1_SB_LUT4_I3_O_SB_LUT4_O_2": { @@ -30499,9 +30758,9 @@ "connections": { "I0": [ "0" ], "I1": [ "0" ], - "I2": [ 423 ], - "I3": [ 399 ], - "O": [ 370 ] + "I2": [ 440 ], + "I3": [ 422 ], + "O": [ 393 ] } }, "w_lvds_rx_24_d1_SB_LUT4_I3_O_SB_LUT4_O_20": { @@ -30524,9 +30783,9 @@ "connections": { "I0": [ "0" ], "I1": [ "0" ], - "I2": [ 423 ], - "I3": [ 377 ], - "O": [ 372 ] + "I2": [ 440 ], + "I3": [ 400 ], + "O": [ 395 ] } }, "w_lvds_rx_24_d1_SB_LUT4_I3_O_SB_LUT4_O_21": { @@ -30549,9 +30808,9 @@ "connections": { "I0": [ "0" ], "I1": [ "0" ], - "I2": [ 423 ], - "I3": [ 379 ], - "O": [ 374 ] + "I2": [ 440 ], + "I3": [ 402 ], + "O": [ 397 ] } }, "w_lvds_rx_24_d1_SB_LUT4_I3_O_SB_LUT4_O_22": { @@ -30574,9 +30833,9 @@ "connections": { "I0": [ "0" ], "I1": [ "0" ], - "I2": [ 423 ], - "I3": [ 381 ], - "O": [ 376 ] + "I2": [ 440 ], + "I3": [ 404 ], + "O": [ 399 ] } }, "w_lvds_rx_24_d1_SB_LUT4_I3_O_SB_LUT4_O_23": { @@ -30599,9 +30858,9 @@ "connections": { "I0": [ "0" ], "I1": [ "0" ], - "I2": [ 423 ], - "I3": [ 383 ], - "O": [ 378 ] + "I2": [ 440 ], + "I3": [ 406 ], + "O": [ 401 ] } }, "w_lvds_rx_24_d1_SB_LUT4_I3_O_SB_LUT4_O_24": { @@ -30624,9 +30883,9 @@ "connections": { "I0": [ "0" ], "I1": [ "0" ], - "I2": [ 423 ], - "I3": [ 385 ], - "O": [ 380 ] + "I2": [ 440 ], + "I3": [ 408 ], + "O": [ 403 ] } }, "w_lvds_rx_24_d1_SB_LUT4_I3_O_SB_LUT4_O_25": { @@ -30649,9 +30908,9 @@ "connections": { "I0": [ "0" ], "I1": [ "0" ], - "I2": [ 423 ], - "I3": [ 387 ], - "O": [ 382 ] + "I2": [ 440 ], + "I3": [ 410 ], + "O": [ 405 ] } }, "w_lvds_rx_24_d1_SB_LUT4_I3_O_SB_LUT4_O_26": { @@ -30674,9 +30933,9 @@ "connections": { "I0": [ "0" ], "I1": [ "0" ], - "I2": [ 423 ], - "I3": [ 389 ], - "O": [ 384 ] + "I2": [ 440 ], + "I3": [ 412 ], + "O": [ 407 ] } }, "w_lvds_rx_24_d1_SB_LUT4_I3_O_SB_LUT4_O_27": { @@ -30699,9 +30958,9 @@ "connections": { "I0": [ "0" ], "I1": [ "0" ], - "I2": [ 423 ], - "I3": [ 391 ], - "O": [ 386 ] + "I2": [ 440 ], + "I3": [ 414 ], + "O": [ 409 ] } }, "w_lvds_rx_24_d1_SB_LUT4_I3_O_SB_LUT4_O_28": { @@ -30724,9 +30983,9 @@ "connections": { "I0": [ "0" ], "I1": [ "0" ], - "I2": [ 423 ], - "I3": [ 395 ], - "O": [ 388 ] + "I2": [ 440 ], + "I3": [ 418 ], + "O": [ 411 ] } }, "w_lvds_rx_24_d1_SB_LUT4_I3_O_SB_LUT4_O_29": { @@ -30749,9 +31008,9 @@ "connections": { "I0": [ "0" ], "I1": [ "0" ], - "I2": [ 423 ], - "I3": [ 397 ], - "O": [ 390 ] + "I2": [ 440 ], + "I3": [ 420 ], + "O": [ 413 ] } }, "w_lvds_rx_24_d1_SB_LUT4_I3_O_SB_LUT4_O_3": { @@ -30774,9 +31033,9 @@ "connections": { "I0": [ "0" ], "I1": [ "0" ], - "I2": [ 423 ], - "I3": [ 401 ], - "O": [ 392 ] + "I2": [ 440 ], + "I3": [ 424 ], + "O": [ 415 ] } }, "w_lvds_rx_24_d1_SB_LUT4_I3_O_SB_LUT4_O_4": { @@ -30799,9 +31058,9 @@ "connections": { "I0": [ "0" ], "I1": [ "0" ], - "I2": [ 423 ], - "I3": [ 403 ], - "O": [ 398 ] + "I2": [ 440 ], + "I3": [ 426 ], + "O": [ 421 ] } }, "w_lvds_rx_24_d1_SB_LUT4_I3_O_SB_LUT4_O_5": { @@ -30824,9 +31083,9 @@ "connections": { "I0": [ "0" ], "I1": [ "0" ], - "I2": [ 423 ], - "I3": [ 405 ], - "O": [ 400 ] + "I2": [ 440 ], + "I3": [ 428 ], + "O": [ 423 ] } }, "w_lvds_rx_24_d1_SB_LUT4_I3_O_SB_LUT4_O_6": { @@ -30849,9 +31108,9 @@ "connections": { "I0": [ "0" ], "I1": [ "0" ], - "I2": [ 423 ], - "I3": [ 407 ], - "O": [ 402 ] + "I2": [ 440 ], + "I3": [ 430 ], + "O": [ 425 ] } }, "w_lvds_rx_24_d1_SB_LUT4_I3_O_SB_LUT4_O_7": { @@ -30874,9 +31133,9 @@ "connections": { "I0": [ "0" ], "I1": [ "0" ], - "I2": [ 423 ], - "I3": [ 409 ], - "O": [ 404 ] + "I2": [ 440 ], + "I3": [ 432 ], + "O": [ 427 ] } }, "w_lvds_rx_24_d1_SB_LUT4_I3_O_SB_LUT4_O_8": { @@ -30899,9 +31158,9 @@ "connections": { "I0": [ "0" ], "I1": [ "0" ], - "I2": [ 423 ], - "I3": [ 351 ], - "O": [ 406 ] + "I2": [ 440 ], + "I3": [ 374 ], + "O": [ 429 ] } }, "w_lvds_rx_24_d1_SB_LUT4_I3_O_SB_LUT4_O_9": { @@ -30924,9 +31183,9 @@ "connections": { "I0": [ "0" ], "I1": [ "0" ], - "I2": [ 423 ], - "I3": [ 353 ], - "O": [ 408 ] + "I2": [ 440 ], + "I3": [ 376 ], + "O": [ 431 ] } }, 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{ "hide_name": 0, - "bits": [ 30 ], + "bits": [ 28 ], "attributes": { - "src": "top.v:49.13-49.21" + "src": "top.v:46.13-46.21" } }, "i_smi_a1_SB_LUT4_I1_O": { "hide_name": 0, - "bits": [ 55, 56, 57, 54 ], - "attributes": { - "force_downto": "00000000000000000000000000000001", - "src": "/usr/local/bin/../share/yosys/ice40/cells_map.v:6.21-6.22" - } - }, - "i_smi_a1_SB_LUT4_I1_O_SB_LUT4_I1_O": { - "hide_name": 0, - "bits": [ 59, 23, 60, 58 ], + "bits": [ 53, 58, 65, 50 ], "attributes": { "force_downto": "00000000000000000000000000000001", "src": "/usr/local/bin/../share/yosys/ice40/cells_map.v:6.21-6.22" @@ -31067,47 +31296,39 @@ }, "i_smi_a1_SB_LUT4_I1_O_SB_LUT4_O_I2": { "hide_name": 0, - "bits": [ "1", "1", "1", 65, 63, 62 ], + "bits": [ "1", "1", "1", 61, 59, 51 ], "attributes": { "force_downto": "00000000000000000000000000000001", - "src": "top.v:298.13-328.5|smi_ctrl.v:139.25-139.39|/usr/local/bin/../share/yosys/ice40/arith_map.v:37.23-37.25" + "src": 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"attributes": { - "src": "top.v:111.9-111.17" + "src": "top.v:110.9-110.17" } }, "io_ctrl_ins.debug_mode": { "hide_name": 0, - "bits": [ 118, 116 ], + "bits": [ 95, 92 ], "attributes": { "hdlname": "io_ctrl_ins debug_mode", - "src": "top.v:129.12-158.5|io_ctrl.v:68.17-68.27" + "src": "top.v:128.12-157.5|io_ctrl.v:68.17-68.27" } }, "io_ctrl_ins.debug_mode_SB_LUT4_I0_O": { "hide_name": 0, - "bits": [ 121 ], + "bits": [ 98 ], "attributes": { } }, "io_ctrl_ins.debug_mode_SB_LUT4_I2_O": { "hide_name": 0, - "bits": [ 149, 120, 122 ], + "bits": [ 101, 97, 188, 99 ], "attributes": { "force_downto": "00000000000000000000000000000001", "src": "/usr/local/bin/../share/yosys/ice40/cells_map.v:6.21-6.22" @@ -31275,39 +31464,31 @@ }, "io_ctrl_ins.i_button": { "hide_name": 0, - "bits": [ 18 ], + "bits": [ 17 ], "attributes": { "hdlname": "io_ctrl_ins i_button", - "src": "top.v:129.12-158.5|io_ctrl.v:14.29-14.37" + "src": "top.v:128.12-157.5|io_ctrl.v:14.29-14.37" } }, "io_ctrl_ins.i_config": { "hide_name": 0, - "bits": [ 14, 15, 16, 17 ], + "bits": [ 13, 14, 15, 16 ], "attributes": { "hdlname": "io_ctrl_ins i_config", - "src": "top.v:129.12-158.5|io_ctrl.v:15.29-15.37" + "src": "top.v:128.12-157.5|io_ctrl.v:15.29-15.37" } }, "io_ctrl_ins.i_cs": { "hide_name": 0, - "bits": [ 125 ], + "bits": [ 104 ], "attributes": { "hdlname": "io_ctrl_ins i_cs", - "src": "top.v:129.12-158.5|io_ctrl.v:9.29-9.33" - } - }, - "io_ctrl_ins.i_cs_SB_LUT4_I3_I0": { - "hide_name": 0, - "bits": [ 51, 52, 57, 125 ], - "attributes": { - "force_downto": "00000000000000000000000000000001", - "src": "/usr/local/bin/../share/yosys/ice40/cells_map.v:6.21-6.22" + "src": "top.v:128.12-157.5|io_ctrl.v:9.29-9.33" } }, "io_ctrl_ins.i_cs_SB_LUT4_I3_O": { "hide_name": 0, - "bits": [ 127, 867 ], + "bits": [ 108, 878 ], "attributes": { "force_downto": "00000000000000000000000000000001", "src": "/usr/local/bin/../share/yosys/ice40/cells_map.v:6.21-6.22" @@ -31315,71 +31496,71 @@ }, "io_ctrl_ins.i_data_in": { "hide_name": 0, - "bits": [ 117, 114, 132, 197, 195, 193, 191, 188 ], + "bits": [ 94, 90, 110, 178, 177, 175, 173, 170 ], "attributes": { "hdlname": "io_ctrl_ins i_data_in", - "src": "top.v:129.12-158.5|io_ctrl.v:7.29-7.38" + "src": "top.v:128.12-157.5|io_ctrl.v:7.29-7.38" } }, "io_ctrl_ins.i_fetch_cmd": { "hide_name": 0, - "bits": [ 867 ], + "bits": [ 878 ], "attributes": { "hdlname": "io_ctrl_ins i_fetch_cmd", - "src": "top.v:129.12-158.5|io_ctrl.v:10.29-10.40" + "src": "top.v:128.12-157.5|io_ctrl.v:10.29-10.40" } }, "io_ctrl_ins.i_ioc": { "hide_name": 0, - "bits": [ 50, 53, 130, 129, 128 ], + "bits": [ 116, 166, 165, 198, 197 ], "attributes": { "hdlname": "io_ctrl_ins i_ioc", - "src": "top.v:129.12-158.5|io_ctrl.v:6.29-6.34" + "src": "top.v:128.12-157.5|io_ctrl.v:6.29-6.34" } }, "io_ctrl_ins.i_load_cmd": { "hide_name": 0, - "bits": [ 872 ], + "bits": [ 883 ], "attributes": { "hdlname": "io_ctrl_ins i_load_cmd", - "src": "top.v:129.12-158.5|io_ctrl.v:11.29-11.39" + "src": "top.v:128.12-157.5|io_ctrl.v:11.29-11.39" } }, "io_ctrl_ins.i_reset": { "hide_name": 0, - "bits": [ 57 ], + "bits": [ 93 ], "attributes": { "hdlname": "io_ctrl_ins i_reset", - "src": "top.v:129.12-158.5|io_ctrl.v:3.29-3.36" + "src": "top.v:128.12-157.5|io_ctrl.v:3.29-3.36" } }, "io_ctrl_ins.i_sys_clk": { "hide_name": 0, - "bits": [ 113 ], + "bits": [ 89 ], "attributes": { "hdlname": "io_ctrl_ins i_sys_clk", - "src": "top.v:129.12-158.5|io_ctrl.v:4.29-4.38" + "src": "top.v:128.12-157.5|io_ctrl.v:4.29-4.38" } }, "io_ctrl_ins.i_sys_clk_SB_DFF_Q_D": { "hide_name": 0, - "bits": [ 131, "x" ], + "bits": [ 109, "x" ], "attributes": { "force_downto": "00000000000000000000000000000001", - "src": "top.v:171.20-171.33|/usr/local/bin/../share/yosys/techmap.v:270.23-270.24" + "src": "top.v:170.20-170.33|/usr/local/bin/../share/yosys/techmap.v:270.23-270.24" } }, "io_ctrl_ins.ldo2v8_state": { "hide_name": 0, - "bits": [ 19 ], + "bits": [ 112 ], "attributes": { "hdlname": "io_ctrl_ins ldo2v8_state", - "src": "top.v:129.12-158.5|io_ctrl.v:72.17-72.29" + "src": "top.v:128.12-157.5|io_ctrl.v:72.17-72.29" } }, - "io_ctrl_ins.ldo2v8_state_SB_LUT4_I0_I2": { + "io_ctrl_ins.ldo2v8_state_SB_LUT4_I3_O": { "hide_name": 0, - "bits": [ 19, 48, 134, 135 ], + "bits": [ 141, 124, 117, 114 ], "attributes": { "force_downto": "00000000000000000000000000000001", "src": "/usr/local/bin/../share/yosys/ice40/cells_map.v:6.21-6.22" @@ -31387,23 +31568,15 @@ }, "io_ctrl_ins.led0_state": { "hide_name": 0, - "bits": [ 28 ], + "bits": [ 26 ], "attributes": { "hdlname": "io_ctrl_ins led0_state", - "src": "top.v:129.12-158.5|io_ctrl.v:73.17-73.27" - } - }, - "io_ctrl_ins.led0_state_SB_LUT4_I3_I0": { - "hide_name": 0, - "bits": [ 139, 142 ], - "attributes": { - "force_downto": "00000000000000000000000000000001", - "src": "/usr/local/bin/../share/yosys/ice40/cells_map.v:6.21-6.22" + "src": "top.v:128.12-157.5|io_ctrl.v:73.17-73.27" } }, "io_ctrl_ins.led0_state_SB_LUT4_I3_O": { "hide_name": 0, - "bits": [ 187, 137, 157, 141 ], + "bits": [ 169, 124, 135, 119 ], "attributes": { "force_downto": "00000000000000000000000000000001", "src": "/usr/local/bin/../share/yosys/ice40/cells_map.v:6.21-6.22" @@ -31411,21 +31584,21 @@ }, "io_ctrl_ins.led1_state": { "hide_name": 0, - "bits": [ 29 ], + "bits": [ 27 ], "attributes": { "hdlname": "io_ctrl_ins led1_state", - "src": "top.v:129.12-158.5|io_ctrl.v:74.17-74.27" + "src": "top.v:128.12-157.5|io_ctrl.v:74.17-74.27" } }, "io_ctrl_ins.led1_state_SB_DFFESR_Q_E": { "hide_name": 0, - "bits": [ 133 ], + "bits": [ 111 ], "attributes": { } }, - "io_ctrl_ins.led1_state_SB_LUT4_I3_O": { + "io_ctrl_ins.led1_state_SB_LUT4_I0_I2": { "hide_name": 0, - "bits": [ 184, 137, 147, 145 ], + "bits": [ 27, 48, 121, 122 ], "attributes": { "force_downto": "00000000000000000000000000000001", "src": "/usr/local/bin/../share/yosys/ice40/cells_map.v:6.21-6.22" @@ -31436,14 +31609,14 @@ "bits": [ 8 ], "attributes": { "hdlname": "io_ctrl_ins lna_rx_shutdown_state", - "src": "top.v:129.12-158.5|io_ctrl.v:81.17-81.38" + "src": "top.v:128.12-157.5|io_ctrl.v:81.17-81.38" } }, "io_ctrl_ins.lna_rx_shutdown_state_SB_DFFE_Q_D": { "hide_name": 0, - "bits": [ 148 ], + "bits": [ 127 ], "attributes": { - "src": "top.v:129.12-158.5|io_ctrl.v:224.5-319.8" + "src": "top.v:128.12-157.5|io_ctrl.v:224.5-319.8" } }, "io_ctrl_ins.lna_tx_shutdown_state": { @@ -31451,104 +31624,112 @@ "bits": [ 9 ], "attributes": { "hdlname": "io_ctrl_ins lna_tx_shutdown_state", - "src": "top.v:129.12-158.5|io_ctrl.v:82.17-82.38" + "src": "top.v:128.12-157.5|io_ctrl.v:82.17-82.38" } }, "io_ctrl_ins.lna_tx_shutdown_state_SB_DFFE_Q_D": { "hide_name": 0, - "bits": [ 150 ], + "bits": [ 130 ], "attributes": { - "src": "top.v:129.12-158.5|io_ctrl.v:224.5-319.8" + "src": "top.v:128.12-157.5|io_ctrl.v:224.5-319.8" } }, "io_ctrl_ins.mixer_en_state": { "hide_name": 0, - "bits": [ 154 ], + "bits": [ 133 ], "attributes": { "hdlname": "io_ctrl_ins mixer_en_state", - "src": "top.v:129.12-158.5|io_ctrl.v:78.17-78.31" + "src": "top.v:128.12-157.5|io_ctrl.v:78.17-78.31" } }, "io_ctrl_ins.mixer_en_state_SB_DFFE_Q_D": { "hide_name": 0, - "bits": [ 153 ], + "bits": [ 132 ], "attributes": { - "src": "top.v:129.12-158.5|io_ctrl.v:224.5-319.8" + "src": "top.v:128.12-157.5|io_ctrl.v:224.5-319.8" } }, "io_ctrl_ins.o_data_out": { "hide_name": 0, - "bits": [ 186, 160, 162, 164, 169, 174, 178, 182 ], + "bits": [ 168, 137, 140, 143, 148, 154, 159, 163 ], "attributes": { "hdlname": "io_ctrl_ins o_data_out", - "src": "top.v:129.12-158.5|io_ctrl.v:8.29-8.39" + "src": "top.v:128.12-157.5|io_ctrl.v:8.29-8.39" } }, "io_ctrl_ins.o_data_out_SB_DFFESR_Q_1_D": { "hide_name": 0, - "bits": [ 136 ], + "bits": [ 139 ], "attributes": { "force_downto": "00000000000000000000000000000001", - "src": "top.v:129.12-158.5|io_ctrl.v:137.21-177.28|io_ctrl.v:0.0-0.0|/usr/local/bin/../share/yosys/techmap.v:578.19-578.22" + "src": "top.v:128.12-157.5|io_ctrl.v:137.21-177.28|io_ctrl.v:0.0-0.0|/usr/local/bin/../share/yosys/techmap.v:578.19-578.22" } }, "io_ctrl_ins.o_data_out_SB_DFFESR_Q_2_D": { "hide_name": 0, - "bits": [ 163 ], + "bits": [ 142 ], "attributes": { "force_downto": "00000000000000000000000000000001", - "src": "top.v:129.12-158.5|io_ctrl.v:137.21-177.28|io_ctrl.v:0.0-0.0|/usr/local/bin/../share/yosys/techmap.v:578.19-578.22" + "src": "top.v:128.12-157.5|io_ctrl.v:137.21-177.28|io_ctrl.v:0.0-0.0|/usr/local/bin/../share/yosys/techmap.v:578.19-578.22" } }, "io_ctrl_ins.o_data_out_SB_DFFESR_Q_3_D": { "hide_name": 0, - "bits": [ 168 ], + "bits": [ 147 ], "attributes": { "force_downto": "00000000000000000000000000000001", - "src": "top.v:129.12-158.5|io_ctrl.v:137.21-177.28|io_ctrl.v:0.0-0.0|/usr/local/bin/../share/yosys/techmap.v:578.19-578.22" + "src": "top.v:128.12-157.5|io_ctrl.v:137.21-177.28|io_ctrl.v:0.0-0.0|/usr/local/bin/../share/yosys/techmap.v:578.19-578.22" } }, "io_ctrl_ins.o_data_out_SB_DFFESR_Q_4_D": { "hide_name": 0, - "bits": [ 172 ], + "bits": [ 152 ], "attributes": { "force_downto": "00000000000000000000000000000001", - "src": "top.v:129.12-158.5|io_ctrl.v:137.21-177.28|io_ctrl.v:0.0-0.0|/usr/local/bin/../share/yosys/techmap.v:578.19-578.22" + "src": "top.v:128.12-157.5|io_ctrl.v:137.21-177.28|io_ctrl.v:0.0-0.0|/usr/local/bin/../share/yosys/techmap.v:578.19-578.22" } }, "io_ctrl_ins.o_data_out_SB_DFFESR_Q_5_D": { "hide_name": 0, - "bits": [ 177 ], + "bits": [ 158 ], "attributes": { "force_downto": "00000000000000000000000000000001", - "src": "top.v:129.12-158.5|io_ctrl.v:137.21-177.28|io_ctrl.v:0.0-0.0|/usr/local/bin/../share/yosys/techmap.v:578.19-578.22" + "src": "top.v:128.12-157.5|io_ctrl.v:137.21-177.28|io_ctrl.v:0.0-0.0|/usr/local/bin/../share/yosys/techmap.v:578.19-578.22" } }, "io_ctrl_ins.o_data_out_SB_DFFESR_Q_6_D": { "hide_name": 0, - "bits": [ 181 ], + "bits": [ 162 ], "attributes": { "force_downto": "00000000000000000000000000000001", - "src": "top.v:129.12-158.5|io_ctrl.v:137.21-177.28|io_ctrl.v:0.0-0.0|/usr/local/bin/../share/yosys/techmap.v:578.19-578.22" + "src": "top.v:128.12-157.5|io_ctrl.v:137.21-177.28|io_ctrl.v:0.0-0.0|/usr/local/bin/../share/yosys/techmap.v:578.19-578.22" } }, "io_ctrl_ins.o_data_out_SB_DFFESR_Q_6_E": { "hide_name": 0, - "bits": [ 173 ], + "bits": [ 153 ], "attributes": { } }, + "io_ctrl_ins.o_data_out_SB_DFFESR_Q_6_R": { + "hide_name": 0, + "bits": [ 113, 155 ], + "attributes": { + "force_downto": "00000000000000000000000000000001", + "src": "/usr/local/bin/../share/yosys/ice40/cells_map.v:6.21-6.22" + } + }, "io_ctrl_ins.o_data_out_SB_DFFESR_Q_D": { "hide_name": 0, - "bits": [ 158 ], + "bits": [ 123 ], "attributes": { "force_downto": "00000000000000000000000000000001", - "src": "top.v:129.12-158.5|io_ctrl.v:137.21-177.28|io_ctrl.v:0.0-0.0|/usr/local/bin/../share/yosys/techmap.v:578.19-578.22" + "src": "top.v:128.12-157.5|io_ctrl.v:137.21-177.28|io_ctrl.v:0.0-0.0|/usr/local/bin/../share/yosys/techmap.v:578.19-578.22" } }, "io_ctrl_ins.o_data_out_SB_DFFESR_Q_E": { "hide_name": 0, - "bits": [ 130, 53, 50, 159 ], + "bits": [ 165, 166, 116, 136 ], "attributes": { "force_downto": "00000000000000000000000000000001", "src": "/usr/local/bin/../share/yosys/ice40/cells_map.v:6.21-6.22" @@ -31556,40 +31737,40 @@ }, "io_ctrl_ins.o_data_out_SB_DFFESR_Q_R": { "hide_name": 0, - "bits": [ 161 ], + "bits": [ 138 ], "attributes": { } }, "io_ctrl_ins.o_data_out_SB_DFFESS_Q_D": { "hide_name": 0, - "bits": [ 185 ], + "bits": [ 167 ], "attributes": { "force_downto": "00000000000000000000000000000001", - "src": "top.v:129.12-158.5|io_ctrl.v:137.21-177.28|io_ctrl.v:0.0-0.0|/usr/local/bin/../share/yosys/techmap.v:578.19-578.22" + "src": "top.v:128.12-157.5|io_ctrl.v:137.21-177.28|io_ctrl.v:0.0-0.0|/usr/local/bin/../share/yosys/techmap.v:578.19-578.22" } }, "io_ctrl_ins.o_ldo_2v8_en": { "hide_name": 0, - "bits": [ 19 ], + "bits": [ 112 ], "attributes": { "hdlname": "io_ctrl_ins o_ldo_2v8_en", - "src": "top.v:129.12-158.5|io_ctrl.v:16.29-16.41" + "src": "top.v:128.12-157.5|io_ctrl.v:16.29-16.41" } }, "io_ctrl_ins.o_led0": { "hide_name": 0, - "bits": [ 28 ], + "bits": [ 26 ], "attributes": { "hdlname": "io_ctrl_ins o_led0", - "src": "top.v:129.12-158.5|io_ctrl.v:17.29-17.35" + "src": "top.v:128.12-157.5|io_ctrl.v:17.29-17.35" } }, "io_ctrl_ins.o_led1": { "hide_name": 0, - "bits": [ 29 ], + "bits": [ 27 ], "attributes": { "hdlname": "io_ctrl_ins o_led1", - "src": "top.v:129.12-158.5|io_ctrl.v:18.29-18.35" + "src": "top.v:128.12-157.5|io_ctrl.v:18.29-18.35" } }, "io_ctrl_ins.o_mixer_en": { @@ -31597,7 +31778,7 @@ "bits": [ "1" ], "attributes": { "hdlname": "io_ctrl_ins o_mixer_en", - "src": "top.v:129.12-158.5|io_ctrl.v:30.29-30.39" + "src": "top.v:128.12-157.5|io_ctrl.v:30.29-30.39" } }, "io_ctrl_ins.o_mixer_fm": { @@ -31605,15 +31786,15 @@ "bits": [ "0" ], "attributes": { "hdlname": "io_ctrl_ins o_mixer_fm", - "src": "top.v:129.12-158.5|io_ctrl.v:22.29-22.39" + "src": "top.v:128.12-157.5|io_ctrl.v:22.29-22.39" } }, "io_ctrl_ins.o_pmod": { "hide_name": 0, - "bits": [ 156, 144, 152, 202, 201, 200, 199, 46 ], + "bits": [ 118, 126, 115, 184, 183, 182, 181, 46 ], "attributes": { "hdlname": "io_ctrl_ins o_pmod", - "src": "top.v:129.12-158.5|io_ctrl.v:19.29-19.35" + "src": "top.v:128.12-157.5|io_ctrl.v:19.29-19.35" } }, "io_ctrl_ins.o_rx_h_tx_l": { @@ -31621,7 +31802,7 @@ "bits": [ 3 ], "attributes": { "hdlname": "io_ctrl_ins o_rx_h_tx_l", - "src": "top.v:129.12-158.5|io_ctrl.v:23.29-23.40" + "src": "top.v:128.12-157.5|io_ctrl.v:23.29-23.40" } }, "io_ctrl_ins.o_rx_h_tx_l_b": { @@ -31629,7 +31810,7 @@ "bits": [ 4 ], "attributes": { "hdlname": "io_ctrl_ins o_rx_h_tx_l_b", - "src": "top.v:129.12-158.5|io_ctrl.v:24.29-24.42" + "src": "top.v:128.12-157.5|io_ctrl.v:24.29-24.42" } }, "io_ctrl_ins.o_shdn_rx_lna": { @@ -31637,7 +31818,7 @@ "bits": [ 8 ], "attributes": { "hdlname": "io_ctrl_ins o_shdn_rx_lna", - "src": "top.v:129.12-158.5|io_ctrl.v:29.29-29.42" + "src": "top.v:128.12-157.5|io_ctrl.v:29.29-29.42" } }, "io_ctrl_ins.o_shdn_tx_lna": { @@ -31645,7 +31826,7 @@ "bits": [ 9 ], "attributes": { "hdlname": "io_ctrl_ins o_shdn_tx_lna", - "src": "top.v:129.12-158.5|io_ctrl.v:28.29-28.42" + "src": "top.v:128.12-157.5|io_ctrl.v:28.29-28.42" } }, "io_ctrl_ins.o_tr_vc1": { @@ -31653,7 +31834,7 @@ "bits": [ 5 ], "attributes": { "hdlname": "io_ctrl_ins o_tr_vc1", - "src": "top.v:129.12-158.5|io_ctrl.v:25.29-25.37" + "src": "top.v:128.12-157.5|io_ctrl.v:25.29-25.37" } }, "io_ctrl_ins.o_tr_vc1_b": { @@ -31661,7 +31842,7 @@ "bits": [ 6 ], "attributes": { "hdlname": "io_ctrl_ins o_tr_vc1_b", - "src": "top.v:129.12-158.5|io_ctrl.v:26.29-26.39" + "src": "top.v:128.12-157.5|io_ctrl.v:26.29-26.39" } }, "io_ctrl_ins.o_tr_vc2": { @@ -31669,39 +31850,71 @@ "bits": [ 7 ], "attributes": { "hdlname": "io_ctrl_ins o_tr_vc2", - "src": "top.v:129.12-158.5|io_ctrl.v:27.29-27.37" + "src": "top.v:128.12-157.5|io_ctrl.v:27.29-27.37" } }, "io_ctrl_ins.pmod_dir_state": { "hide_name": 0, - "bits": [ 187, 184, 138, 165, 196, 194, 192, 190 ], + "bits": [ 169, 125, 141, 144, 149, 176, 174, 172 ], "attributes": { "hdlname": "io_ctrl_ins pmod_dir_state", - "src": "top.v:129.12-158.5|io_ctrl.v:75.17-75.31" + "src": "top.v:128.12-157.5|io_ctrl.v:75.17-75.31" + } + }, + "io_ctrl_ins.pmod_dir_state_SB_DFFE_Q_E": { + "hide_name": 0, + "bits": [ 171 ], + "attributes": { } }, "io_ctrl_ins.pmod_state": { "hide_name": 0, - "bits": [ 156, 144, 152, 202, 201, 200, 199, 46 ], + "bits": [ 118, 126, 115, 184, 183, 182, 181, 46 ], "attributes": { "hdlname": "io_ctrl_ins pmod_state", - "src": "top.v:129.12-158.5|io_ctrl.v:76.17-76.27" + "src": "top.v:128.12-157.5|io_ctrl.v:76.17-76.27" + } + }, + "io_ctrl_ins.pmod_state_SB_DFFE_Q_E": { + "hide_name": 0, + "bits": [ 180 ], + "attributes": { + } + }, + "io_ctrl_ins.pmod_state_SB_DFFE_Q_E_SB_LUT4_O_I3": { + "hide_name": 0, + "bits": [ 47, 179 ], + "attributes": { + "force_downto": "00000000000000000000000000000001", + "src": "/usr/local/bin/../share/yosys/ice40/cells_map.v:6.21-6.22" } }, "io_ctrl_ins.rf_mode": { "hide_name": 0, - "bits": [ 140, 120, 119 ], + "bits": [ 100, 97, 96 ], "attributes": { "hdlname": "io_ctrl_ins rf_mode", - "src": "top.v:129.12-158.5|io_ctrl.v:69.17-69.24" + "src": "top.v:128.12-157.5|io_ctrl.v:69.17-69.24" + } + }, + "io_ctrl_ins.rf_mode_SB_DFFESR_Q_E": { + "hide_name": 0, + "bits": [ 91 ], + "attributes": { } }, "io_ctrl_ins.rf_pin_state": { "hide_name": 0, - "bits": [ 155, 149, 151, 208, 207, 206, 205, 204 ], + "bits": [ 134, 128, 131, 190, 189, 188, 187, 186 ], "attributes": { "hdlname": "io_ctrl_ins rf_pin_state", - "src": "top.v:129.12-158.5|io_ctrl.v:77.17-77.29" + "src": "top.v:128.12-157.5|io_ctrl.v:77.17-77.29" + } + }, + "io_ctrl_ins.rf_pin_state_SB_DFFE_Q_E": { + "hide_name": 0, + "bits": [ 185 ], + "attributes": { } }, "io_ctrl_ins.rx_h_b_state": { @@ -31709,19 +31922,19 @@ "bits": [ 4 ], "attributes": { "hdlname": "io_ctrl_ins rx_h_b_state", - "src": "top.v:129.12-158.5|io_ctrl.v:84.17-84.29" + "src": "top.v:128.12-157.5|io_ctrl.v:84.17-84.29" } }, "io_ctrl_ins.rx_h_b_state_SB_DFFE_Q_D": { "hide_name": 0, - "bits": [ 209 ], + "bits": [ 191 ], "attributes": { - "src": "top.v:129.12-158.5|io_ctrl.v:224.5-319.8" + "src": "top.v:128.12-157.5|io_ctrl.v:224.5-319.8" } }, - "io_ctrl_ins.rx_h_b_state_SB_LUT4_I1_O": { + "io_ctrl_ins.rx_h_b_state_SB_LUT4_I0_O": { "hide_name": 0, - "bits": [ 179, 180 ], + "bits": [ 160, 161 ], "attributes": { "force_downto": "00000000000000000000000000000001", "src": "/usr/local/bin/../share/yosys/ice40/cells_map.v:6.21-6.22" @@ -31732,19 +31945,19 @@ "bits": [ 3 ], "attributes": { "hdlname": "io_ctrl_ins rx_h_state", - "src": "top.v:129.12-158.5|io_ctrl.v:83.17-83.27" + "src": "top.v:128.12-157.5|io_ctrl.v:83.17-83.27" } }, "io_ctrl_ins.rx_h_state_SB_DFFE_Q_D": { "hide_name": 0, - "bits": [ 211 ], + "bits": [ 193 ], "attributes": { - "src": "top.v:129.12-158.5|io_ctrl.v:224.5-319.8" + "src": "top.v:128.12-157.5|io_ctrl.v:224.5-319.8" } }, "io_ctrl_ins.rx_h_state_SB_DFFE_Q_D_SB_LUT4_O_I3": { "hide_name": 0, - "bits": [ 204, 122, 210 ], + "bits": [ 186, 99, 192 ], "attributes": { "force_downto": "00000000000000000000000000000001", "src": "/usr/local/bin/../share/yosys/ice40/cells_map.v:6.21-6.22" @@ -31755,19 +31968,19 @@ "bits": [ 6 ], "attributes": { "hdlname": "io_ctrl_ins tr_vc_1_b_state", - "src": "top.v:129.12-158.5|io_ctrl.v:86.17-86.32" + "src": "top.v:128.12-157.5|io_ctrl.v:86.17-86.32" } }, "io_ctrl_ins.tr_vc_1_b_state_SB_DFFE_Q_D": { "hide_name": 0, - "bits": [ 212 ], + "bits": [ 194 ], "attributes": { - "src": "top.v:129.12-158.5|io_ctrl.v:224.5-319.8" + "src": "top.v:128.12-157.5|io_ctrl.v:224.5-319.8" } }, "io_ctrl_ins.tr_vc_1_b_state_SB_LUT4_I1_O": { "hide_name": 0, - "bits": [ 15, 48, 170, 171 ], + "bits": [ 149, 124, 150, 151 ], "attributes": { "force_downto": "00000000000000000000000000000001", "src": "/usr/local/bin/../share/yosys/ice40/cells_map.v:6.21-6.22" @@ -31778,27 +31991,19 @@ "bits": [ 5 ], "attributes": { "hdlname": "io_ctrl_ins tr_vc_1_state", - "src": "top.v:129.12-158.5|io_ctrl.v:85.17-85.30" + "src": "top.v:128.12-157.5|io_ctrl.v:85.17-85.30" } }, "io_ctrl_ins.tr_vc_1_state_SB_DFFE_Q_D": { "hide_name": 0, - "bits": [ 214 ], + "bits": [ 195 ], "attributes": { - "src": "top.v:129.12-158.5|io_ctrl.v:224.5-319.8" - } - }, - "io_ctrl_ins.tr_vc_1_state_SB_DFFE_Q_D_SB_LUT4_O_I0": { - "hide_name": 0, - "bits": [ 213, 120, 207, 122 ], - "attributes": { - "force_downto": "00000000000000000000000000000001", - "src": "/usr/local/bin/../share/yosys/ice40/cells_map.v:6.21-6.22" + "src": "top.v:128.12-157.5|io_ctrl.v:224.5-319.8" } }, "io_ctrl_ins.tr_vc_1_state_SB_LUT4_I0_O": { "hide_name": 0, - "bits": [ 175, 176 ], + "bits": [ 156, 157 ], "attributes": { "force_downto": "00000000000000000000000000000001", "src": "/usr/local/bin/../share/yosys/ice40/cells_map.v:6.21-6.22" @@ -31809,19 +32014,43 @@ "bits": [ 7 ], "attributes": { "hdlname": "io_ctrl_ins tr_vc_2_state", - "src": "top.v:129.12-158.5|io_ctrl.v:87.17-87.30" + "src": "top.v:128.12-157.5|io_ctrl.v:87.17-87.30" } }, "io_ctrl_ins.tr_vc_2_state_SB_DFFE_Q_D": { "hide_name": 0, - "bits": [ 215 ], + "bits": [ 196 ], "attributes": { - "src": "top.v:129.12-158.5|io_ctrl.v:224.5-319.8" + "src": "top.v:128.12-157.5|io_ctrl.v:224.5-319.8" + } + }, + "io_ctrl_ins.tr_vc_2_state_SB_LUT4_I1_I3": { + "hide_name": 0, + "bits": [ 116, 106 ], + "attributes": { + "force_downto": "00000000000000000000000000000001", + "src": "/usr/local/bin/../share/yosys/ice40/cells_map.v:6.21-6.22" + } + }, + "io_ctrl_ins.tr_vc_2_state_SB_LUT4_I1_I3_SB_LUT4_I2_O": { + "hide_name": 0, + "bits": [ 129, 6, 113, 96 ], + "attributes": { + "force_downto": "00000000000000000000000000000001", + "src": "/usr/local/bin/../share/yosys/ice40/cells_map.v:6.21-6.22" + } + }, + "io_ctrl_ins.tr_vc_2_state_SB_LUT4_I1_I3_SB_LUT4_I3_O": { + "hide_name": 0, + "bits": [ 124, 174, 47, 181 ], + "attributes": { + "force_downto": "00000000000000000000000000000001", + "src": "/usr/local/bin/../share/yosys/ice40/cells_map.v:6.21-6.22" } }, "io_ctrl_ins.tr_vc_2_state_SB_LUT4_I1_O": { "hide_name": 0, - "bits": [ 165, 137, 166, 167 ], + "bits": [ 144, 124, 145, 146 ], "attributes": { "force_downto": "00000000000000000000000000000001", "src": "/usr/local/bin/../share/yosys/ice40/cells_map.v:6.21-6.22" @@ -31829,20 +32058,60 @@ }, "io_pmod": { "hide_name": 0, - "bits": [ 20, 21, 22, 23, 24, 25, 26, 27 ], + "bits": [ 18, 19, 20, 21, 22, 23, 24, 25 ], "attributes": { - "src": "top.v:44.19-44.26" + "src": "top.v:41.19-41.26" } }, "io_pmod_SB_DFFSS_Q_D": { "hide_name": 0, - "bits": [ 223 ], + "bits": [ 206 ], "attributes": { } }, "io_pmod_SB_DFFSS_Q_D_SB_LUT4_O_I0": { "hide_name": 0, - "bits": [ 224, 225, 226, 227 ], + "bits": [ 207, 208, 209, 210 ], + "attributes": { + "force_downto": "00000000000000000000000000000001", + "src": "/usr/local/bin/../share/yosys/ice40/cells_map.v:6.21-6.22" + } + }, + "io_pmod_SB_DFFSS_Q_D_SB_LUT4_O_I0_SB_LUT4_O_1_I1": { + "hide_name": 0, + "bits": [ 215, 216, 217 ], + "attributes": { + "force_downto": "00000000000000000000000000000001", + "src": "/usr/local/bin/../share/yosys/ice40/cells_map.v:6.21-6.22" + } + }, + "io_pmod_SB_DFFSS_Q_D_SB_LUT4_O_I0_SB_LUT4_O_1_I1_SB_LUT4_O_I0": { + "hide_name": 0, + "bits": [ 218, 222, 223, 224 ], + "attributes": { + "force_downto": "00000000000000000000000000000001", + "src": "/usr/local/bin/../share/yosys/ice40/cells_map.v:6.21-6.22" + } + }, + "io_pmod_SB_DFFSS_Q_D_SB_LUT4_O_I0_SB_LUT4_O_1_I1_SB_LUT4_O_I2": { + "hide_name": 0, + "bits": [ 218, 219, 220, 221 ], + "attributes": { + "force_downto": "00000000000000000000000000000001", + "src": "/usr/local/bin/../share/yosys/ice40/cells_map.v:6.21-6.22" + } + }, + "io_pmod_SB_DFFSS_Q_D_SB_LUT4_O_I0_SB_LUT4_O_2_I0": { + "hide_name": 0, + "bits": [ 234, 222, 235, 236 ], + "attributes": { + "force_downto": "00000000000000000000000000000001", + "src": "/usr/local/bin/../share/yosys/ice40/cells_map.v:6.21-6.22" + } + }, + "io_pmod_SB_DFFSS_Q_D_SB_LUT4_O_I0_SB_LUT4_O_3_I2": { + "hide_name": 0, + "bits": [ 229, 240, 241, 237 ], "attributes": { "force_downto": "00000000000000000000000000000001", "src": "/usr/local/bin/../share/yosys/ice40/cells_map.v:6.21-6.22" @@ -31850,23 +32119,15 @@ }, "io_pmod_SB_DFFSS_Q_D_SB_LUT4_O_I0_SB_LUT4_O_I0": { "hide_name": 0, - "bits": [ 228, 229, 230, 231 ], + "bits": [ 242, 243, 211, 244 ], "attributes": { "force_downto": "00000000000000000000000000000001", "src": "/usr/local/bin/../share/yosys/ice40/cells_map.v:6.21-6.22" } }, - "io_pmod_SB_DFFSS_Q_D_SB_LUT4_O_I0_SB_LUT4_O_I0_SB_LUT4_O_1_I2": { + "io_pmod_SB_DFFSS_Q_D_SB_LUT4_O_I0_SB_LUT4_O_I2": { "hide_name": 0, - "bits": [ 239, 240, 241, 238 ], - "attributes": { - "force_downto": "00000000000000000000000000000001", - "src": "/usr/local/bin/../share/yosys/ice40/cells_map.v:6.21-6.22" - } - }, - "io_pmod_SB_DFFSS_Q_D_SB_LUT4_O_I0_SB_LUT4_O_I0_SB_LUT4_O_2_I3": { - "hide_name": 0, - "bits": [ 244, 245, 233, 246 ], + "bits": [ 211, 212, 213, 214 ], "attributes": { "force_downto": "00000000000000000000000000000001", "src": "/usr/local/bin/../share/yosys/ice40/cells_map.v:6.21-6.22" @@ -31874,143 +32135,143 @@ }, "io_smi_data": { "hide_name": 0, - "bits": [ 34, 35, 36, 37, 38, 39, 40, 41 ], + "bits": [ 32, 33, 34, 35, 36, 37, 38, 39 ], "attributes": { - "src": "top.v:55.19-55.30" + "src": "top.v:52.19-52.30" } }, "lvds_clock": { "hide_name": 0, - "bits": [ 261 ], + "bits": [ 259 ], "attributes": { - "src": "top.v:186.9-186.19" + "src": "top.v:185.9-185.19" } }, "lvds_clock_buf": { "hide_name": 0, - "bits": [ 217 ], + "bits": [ 200 ], "attributes": { - "src": "top.v:187.9-187.23" + "src": "top.v:186.9-186.23" } }, "lvds_rx_09_inst.i_ddr_clk": { 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+ }, + "lvds_rx_09_inst.r_push_SB_LUT4_I3_1_O": { + "hide_name": 0, + "bits": [ 343 ], + "attributes": { + } + }, + "lvds_rx_09_inst.r_push_SB_LUT4_I3_I0": { + "hide_name": 0, + "bits": [ 339, 340, 341, 327 ], "attributes": { "force_downto": "00000000000000000000000000000001", "src": "/usr/local/bin/../share/yosys/ice40/cells_map.v:6.21-6.22" @@ -32044,466 +32335,513 @@ }, "lvds_rx_09_inst.r_push_SB_LUT4_I3_O": { "hide_name": 0, - "bits": [ 341 ], + "bits": [ 520, 521, 353, 342 ], "attributes": { + "force_downto": "00000000000000000000000000000001", + "src": "/usr/local/bin/../share/yosys/ice40/cells_map.v:6.21-6.22" + } + }, + "lvds_rx_09_inst.r_push_SB_LUT4_I3_O_SB_LUT4_O_I3": { + "hide_name": 0, + "bits": [ 979, 346, 363, 360, 348, 349, 521 ], + "attributes": { + "force_downto": "00000000000000000000000000000001", + "src": "top.v:260.17-271.5|complex_fifo.v:57.23-57.34|/usr/local/bin/../share/yosys/ice40/arith_map.v:33.26-33.27", + "unused_bits": "0 " } }, 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69, 809, 70, 810 ], "attributes": { "force_downto": "00000000000000000000000000000001", "src": "/usr/local/bin/../share/yosys/ice40/cells_map.v:6.21-6.22" @@ -33499,7 +33777,7 @@ }, "smi_ctrl_ins.o_smi_data_out_SB_DFFE_Q_1_D_SB_LUT4_O_I1_SB_LUT4_O_1_I1": { "hide_name": 0, - "bits": [ 82, 807, 808, 83 ], + "bits": [ 72, 812, 813, 73 ], "attributes": { "force_downto": "00000000000000000000000000000001", "src": "/usr/local/bin/../share/yosys/ice40/cells_map.v:6.21-6.22" @@ -33507,7 +33785,7 @@ }, "smi_ctrl_ins.o_smi_data_out_SB_DFFE_Q_1_D_SB_LUT4_O_I1_SB_LUT4_O_I3": { "hide_name": 0, - "bits": [ 548, 534, 97, 806 ], + "bits": [ 571, 554, 80, 811 ], "attributes": { "force_downto": "00000000000000000000000000000001", "src": "/usr/local/bin/../share/yosys/ice40/cells_map.v:6.21-6.22" @@ -33515,13 +33793,21 @@ }, "smi_ctrl_ins.o_smi_data_out_SB_DFFE_Q_2_D": { "hide_name": 0, - "bits": [ 809 ], + "bits": [ 814 ], "attributes": { } }, "smi_ctrl_ins.o_smi_data_out_SB_DFFE_Q_2_D_SB_LUT4_O_I1": { "hide_name": 0, - "bits": [ 79, 810, 80, 811 ], + "bits": [ 69, 815, 70, 816 ], + "attributes": { + "force_downto": "00000000000000000000000000000001", + "src": "/usr/local/bin/../share/yosys/ice40/cells_map.v:6.21-6.22" + } + }, + "smi_ctrl_ins.o_smi_data_out_SB_DFFE_Q_2_D_SB_LUT4_O_I1_SB_LUT4_O_1_I1": { + "hide_name": 0, + "bits": [ 72, 818, 819, 73 ], "attributes": { "force_downto": "00000000000000000000000000000001", "src": "/usr/local/bin/../share/yosys/ice40/cells_map.v:6.21-6.22" @@ -33529,7 +33815,7 @@ }, "smi_ctrl_ins.o_smi_data_out_SB_DFFE_Q_2_D_SB_LUT4_O_I1_SB_LUT4_O_I3": { "hide_name": 0, - "bits": [ 547, 533, 97, 812 ], + "bits": [ 570, 553, 80, 817 ], "attributes": { "force_downto": "00000000000000000000000000000001", "src": "/usr/local/bin/../share/yosys/ice40/cells_map.v:6.21-6.22" @@ -33537,21 +33823,13 @@ }, "smi_ctrl_ins.o_smi_data_out_SB_DFFE_Q_3_D": { "hide_name": 0, - "bits": [ 813 ], + "bits": [ 820 ], "attributes": { } }, "smi_ctrl_ins.o_smi_data_out_SB_DFFE_Q_3_D_SB_LUT4_O_I1": { "hide_name": 0, - "bits": [ 79, 814, 80, 815 ], - "attributes": { - "force_downto": "00000000000000000000000000000001", - "src": "/usr/local/bin/../share/yosys/ice40/cells_map.v:6.21-6.22" - } - }, - "smi_ctrl_ins.o_smi_data_out_SB_DFFE_Q_3_D_SB_LUT4_O_I1_SB_LUT4_O_1_I1": { - "hide_name": 0, - "bits": [ 82, 817, 818, 83 ], + "bits": [ 69, 821, 70, 822 ], "attributes": { "force_downto": "00000000000000000000000000000001", "src": "/usr/local/bin/../share/yosys/ice40/cells_map.v:6.21-6.22" @@ -33559,7 +33837,7 @@ }, "smi_ctrl_ins.o_smi_data_out_SB_DFFE_Q_3_D_SB_LUT4_O_I1_SB_LUT4_O_I3": { "hide_name": 0, - "bits": [ 546, 532, 97, 816 ], + "bits": [ 569, 552, 80, 823 ], "attributes": { "force_downto": "00000000000000000000000000000001", "src": "/usr/local/bin/../share/yosys/ice40/cells_map.v:6.21-6.22" @@ -33567,49 +33845,49 @@ }, "smi_ctrl_ins.o_smi_data_out_SB_DFFE_Q_4_D": { "hide_name": 0, - "bits": [ 819 ], + "bits": [ 826 ], "attributes": { } }, - "smi_ctrl_ins.o_smi_data_out_SB_DFFE_Q_4_D_SB_LUT4_O_I1": { - "hide_name": 0, - "bits": [ 79, 820, 80, 821 ], - "attributes": { - "force_downto": "00000000000000000000000000000001", - "src": "/usr/local/bin/../share/yosys/ice40/cells_map.v:6.21-6.22" - } - }, - "smi_ctrl_ins.o_smi_data_out_SB_DFFE_Q_4_D_SB_LUT4_O_I1_SB_LUT4_O_1_I1": { - "hide_name": 0, - "bits": [ 82, 823, 824, 83 ], - "attributes": { - "force_downto": "00000000000000000000000000000001", - "src": "/usr/local/bin/../share/yosys/ice40/cells_map.v:6.21-6.22" - } - }, - "smi_ctrl_ins.o_smi_data_out_SB_DFFE_Q_4_D_SB_LUT4_O_I1_SB_LUT4_O_I3": { - "hide_name": 0, - "bits": [ 545, 531, 97, 822 ], - "attributes": { - "force_downto": "00000000000000000000000000000001", - "src": "/usr/local/bin/../share/yosys/ice40/cells_map.v:6.21-6.22" - } - }, "smi_ctrl_ins.o_smi_data_out_SB_DFFE_Q_5_D": { "hide_name": 0, - "bits": [ 825 ], + "bits": [ 829 ], "attributes": { } }, + "smi_ctrl_ins.o_smi_data_out_SB_DFFE_Q_5_D_SB_LUT4_O_I1": { + "hide_name": 0, + "bits": [ 69, 830, 70, 831 ], + "attributes": { + "force_downto": "00000000000000000000000000000001", + "src": "/usr/local/bin/../share/yosys/ice40/cells_map.v:6.21-6.22" + } + }, + "smi_ctrl_ins.o_smi_data_out_SB_DFFE_Q_5_D_SB_LUT4_O_I1_SB_LUT4_O_1_I1": { + "hide_name": 0, + "bits": [ 72, 833, 834, 73 ], + "attributes": { + "force_downto": "00000000000000000000000000000001", + "src": "/usr/local/bin/../share/yosys/ice40/cells_map.v:6.21-6.22" + } + }, + "smi_ctrl_ins.o_smi_data_out_SB_DFFE_Q_5_D_SB_LUT4_O_I1_SB_LUT4_O_I3": { + "hide_name": 0, + "bits": [ 567, 550, 80, 832 ], + "attributes": { + "force_downto": "00000000000000000000000000000001", + "src": "/usr/local/bin/../share/yosys/ice40/cells_map.v:6.21-6.22" + } + }, "smi_ctrl_ins.o_smi_data_out_SB_DFFE_Q_6_D": { "hide_name": 0, - "bits": [ 826 ], + "bits": [ 835 ], "attributes": { } }, "smi_ctrl_ins.o_smi_data_out_SB_DFFE_Q_6_D_SB_LUT4_O_I1": { "hide_name": 0, - "bits": [ 79, 827, 80, 828 ], + "bits": [ 69, 836, 70, 837 ], "attributes": { "force_downto": "00000000000000000000000000000001", "src": "/usr/local/bin/../share/yosys/ice40/cells_map.v:6.21-6.22" @@ -33617,7 +33895,7 @@ }, "smi_ctrl_ins.o_smi_data_out_SB_DFFE_Q_6_D_SB_LUT4_O_I1_SB_LUT4_O_1_I1": { "hide_name": 0, - "bits": [ 82, 830, 831, 83 ], + "bits": [ 72, 839, 840, 73 ], "attributes": { "force_downto": "00000000000000000000000000000001", "src": "/usr/local/bin/../share/yosys/ice40/cells_map.v:6.21-6.22" @@ -33625,7 +33903,7 @@ }, "smi_ctrl_ins.o_smi_data_out_SB_DFFE_Q_6_D_SB_LUT4_O_I1_SB_LUT4_O_I3": { "hide_name": 0, - "bits": [ 544, 530, 97, 829 ], + "bits": [ 566, 549, 80, 838 ], "attributes": { "force_downto": "00000000000000000000000000000001", "src": "/usr/local/bin/../share/yosys/ice40/cells_map.v:6.21-6.22" @@ -33633,13 +33911,13 @@ }, "smi_ctrl_ins.o_smi_data_out_SB_DFFE_Q_7_D": { "hide_name": 0, - "bits": [ 832 ], + "bits": [ 841 ], "attributes": { } }, "smi_ctrl_ins.o_smi_data_out_SB_DFFE_Q_7_D_SB_LUT4_O_I0": { "hide_name": 0, - "bits": [ 833, 834, 835, 76 ], + "bits": [ 842, 843, 844, 67 ], "attributes": { "force_downto": "00000000000000000000000000000001", "src": "/usr/local/bin/../share/yosys/ice40/cells_map.v:6.21-6.22" @@ -33647,7 +33925,7 @@ }, "smi_ctrl_ins.o_smi_data_out_SB_DFFE_Q_7_D_SB_LUT4_O_I0_SB_LUT4_O_I3": { "hide_name": 0, - "bits": [ 700, 687, 69, 836 ], + "bits": [ 692, 676, 56, 845 ], "attributes": { "force_downto": "00000000000000000000000000000001", "src": "/usr/local/bin/../share/yosys/ice40/cells_map.v:6.21-6.22" @@ -33655,13 +33933,13 @@ }, "smi_ctrl_ins.o_smi_data_out_SB_DFFE_Q_D": { "hide_name": 0, - "bits": [ 802 ], + "bits": [ 806 ], "attributes": { } }, "smi_ctrl_ins.o_smi_data_out_SB_DFFE_Q_D_SB_LUT4_O_I1": { "hide_name": 0, - "bits": [ 79, 837, 80, 838 ], + "bits": [ 69, 846, 70, 847 ], "attributes": { "force_downto": "00000000000000000000000000000001", "src": "/usr/local/bin/../share/yosys/ice40/cells_map.v:6.21-6.22" @@ -33669,7 +33947,15 @@ }, "smi_ctrl_ins.o_smi_data_out_SB_DFFE_Q_D_SB_LUT4_O_I1_SB_LUT4_O_1_I1": { "hide_name": 0, - "bits": [ 82, 840, 841, 83 ], + "bits": [ 72, 849, 850, 73 ], + "attributes": { + "force_downto": "00000000000000000000000000000001", + "src": "/usr/local/bin/../share/yosys/ice40/cells_map.v:6.21-6.22" + } + }, + "smi_ctrl_ins.o_smi_data_out_SB_DFFE_Q_D_SB_LUT4_O_I1_SB_LUT4_O_1_I3": { + "hide_name": 0, + "bits": [ 72, 824, 825, 73 ], "attributes": { "force_downto": "00000000000000000000000000000001", "src": "/usr/local/bin/../share/yosys/ice40/cells_map.v:6.21-6.22" @@ -33677,7 +33963,31 @@ }, "smi_ctrl_ins.o_smi_data_out_SB_DFFE_Q_D_SB_LUT4_O_I1_SB_LUT4_O_I3": { "hide_name": 0, - "bits": [ 549, 535, 97, 839 ], + "bits": [ 572, 555, 80, 848 ], + "attributes": { + "force_downto": "00000000000000000000000000000001", + "src": "/usr/local/bin/../share/yosys/ice40/cells_map.v:6.21-6.22" + } + }, + "smi_ctrl_ins.o_smi_data_out_SB_DFFE_Q_D_SB_LUT4_O_I2": { + "hide_name": 0, + "bits": [ 69, 827, 70, 828 ], + "attributes": { + "force_downto": "00000000000000000000000000000001", + "src": "/usr/local/bin/../share/yosys/ice40/cells_map.v:6.21-6.22" + } + }, + "smi_ctrl_ins.o_smi_data_out_SB_DFFE_Q_D_SB_LUT4_O_I2_SB_LUT4_O_1_I1": { + "hide_name": 0, + "bits": [ 72, 852, 853, 73 ], + "attributes": { + "force_downto": "00000000000000000000000000000001", + "src": "/usr/local/bin/../share/yosys/ice40/cells_map.v:6.21-6.22" + } + }, + "smi_ctrl_ins.o_smi_data_out_SB_DFFE_Q_D_SB_LUT4_O_I2_SB_LUT4_O_I3": { + "hide_name": 0, + "bits": [ 568, 551, 80, 851 ], "attributes": { "force_downto": "00000000000000000000000000000001", "src": "/usr/local/bin/../share/yosys/ice40/cells_map.v:6.21-6.22" @@ -33685,10 +33995,10 @@ }, "smi_ctrl_ins.o_smi_read_req": { "hide_name": 0, - "bits": [ 216 ], + "bits": [ 199 ], "attributes": { "hdlname": "smi_ctrl_ins o_smi_read_req", - "src": "top.v:298.13-328.5|smi_ctrl.v:31.29-31.43" + "src": "top.v:297.13-327.5|smi_ctrl.v:31.29-31.43" } }, "smi_ctrl_ins.o_smi_write_req": { @@ -33696,109 +34006,115 @@ "bits": [ "x" ], "attributes": { "hdlname": "smi_ctrl_ins o_smi_write_req", - "src": "top.v:298.13-328.5|smi_ctrl.v:32.29-32.44" + "src": "top.v:297.13-327.5|smi_ctrl.v:32.29-32.44" } }, "smi_ctrl_ins.o_smi_writing": { "hide_name": 0, - "bits": [ 32 ], + "bits": [ 30 ], "attributes": { "hdlname": "smi_ctrl_ins o_smi_writing", - "src": "top.v:298.13-328.5|smi_ctrl.v:33.29-33.42" + "src": "top.v:297.13-327.5|smi_ctrl.v:33.29-33.42" } }, "smi_ctrl_ins.r_fifo_09_pull": { "hide_name": 0, - "bits": [ 227 ], + "bits": [ 556 ], "attributes": { "hdlname": "smi_ctrl_ins r_fifo_09_pull", - "src": "top.v:298.13-328.5|smi_ctrl.v:94.9-94.23" + "src": "top.v:297.13-327.5|smi_ctrl.v:94.9-94.23" } }, "smi_ctrl_ins.r_fifo_09_pull_SB_DFFESR_Q_E": { "hide_name": 0, - "bits": [ 842 ], + "bits": [ 854 ], "attributes": { } }, - "smi_ctrl_ins.r_fifo_09_pull_SB_LUT4_I3_O": { + "smi_ctrl_ins.r_fifo_09_pull_SB_LUT4_I2_O": { "hide_name": 0, - "bits": [ 551 ], + "bits": [ 245, 227, 246, 247 ], + "attributes": { + "force_downto": "00000000000000000000000000000001", + "src": "/usr/local/bin/../share/yosys/ice40/cells_map.v:6.21-6.22" + } + }, + "smi_ctrl_ins.r_fifo_09_pull_SB_LUT4_I3_1_O": { + "hide_name": 0, + "bits": [ 573 ], "attributes": { } }, "smi_ctrl_ins.r_fifo_24_pull": { "hide_name": 0, - "bits": [ 693 ], + "bits": [ 641 ], "attributes": { "hdlname": "smi_ctrl_ins r_fifo_24_pull", - "src": "top.v:298.13-328.5|smi_ctrl.v:95.9-95.23" + "src": "top.v:297.13-327.5|smi_ctrl.v:95.9-95.23" } }, "smi_ctrl_ins.r_fifo_24_pull_SB_DFFESR_Q_D": { "hide_name": 0, - "bits": [ 843 ], + "bits": [ 855 ], "attributes": { } }, "smi_ctrl_ins.r_fifo_24_pull_SB_DFFESR_Q_E": { "hide_name": 0, - "bits": [ 844 ], + "bits": [ 856 ], "attributes": { } }, - "smi_ctrl_ins.r_fifo_24_pull_SB_LUT4_I0_I1": { + "smi_ctrl_ins.r_fifo_24_pull_SB_LUT4_I1_O": { "hide_name": 0, - "bits": [ 845, 722, 680, 723 ], + "bits": [ 857, 21, 52, 858 ], "attributes": { "force_downto": "00000000000000000000000000000001", "src": "/usr/local/bin/../share/yosys/ice40/cells_map.v:6.21-6.22" } }, - "smi_ctrl_ins.r_fifo_24_pull_SB_LUT4_I0_I3": { + "smi_ctrl_ins.r_fifo_24_pull_SB_LUT4_I1_O_SB_LUT4_I0_O": { "hide_name": 0, - "bits": [ 693, 845, 679, 846 ], + "bits": [ 67, 50, 859 ], "attributes": { "force_downto": "00000000000000000000000000000001", "src": "/usr/local/bin/../share/yosys/ice40/cells_map.v:6.21-6.22" } }, - "smi_ctrl_ins.r_fifo_24_pull_SB_LUT4_I1_I2": { + "smi_ctrl_ins.r_fifo_24_pull_SB_LUT4_I1_O_SB_LUT4_I0_O_SB_LUT4_I3_O": { "hide_name": 0, - "bits": [ 693, 847, 848 ], + "bits": [ 807 ], "attributes": { - "force_downto": "00000000000000000000000000000001", - "src": "/usr/local/bin/../share/yosys/ice40/cells_map.v:6.21-6.22" } }, - "smi_ctrl_ins.r_fifo_24_pull_SB_LUT4_I3_O": { + "smi_ctrl_ins.r_fifo_24_pull_SB_LUT4_I3_1_O": { "hide_name": 0, - "bits": [ 707 ], + "bits": [ 701 ], "attributes": { } }, "smi_ctrl_ins.r_last_soe": { "hide_name": 0, - "bits": [ 60 ], + "bits": [ 52 ], "attributes": { "hdlname": "smi_ctrl_ins r_last_soe", - "src": "top.v:298.13-328.5|smi_ctrl.v:91.9-91.19" + "src": "top.v:297.13-327.5|smi_ctrl.v:91.9-91.19" } }, "spi_if_ins.i_data_out": { "hide_name": 0, - "bits": [ 472, 456, 459, 461, 463, 465, 467, 470 ], + "bits": [ 511, 495, 498, 500, 502, 504, 506, 509 ], "attributes": { "hdlname": "spi_if_ins i_data_out", - "src": "top.v:93.11-109.5|spi_if.v:10.29-10.39" + "src": "top.v:92.11-108.5|spi_if.v:10.29-10.39" } }, "spi_if_ins.i_rst_b": { "hide_name": 0, - "bits": [ 57 ], + "bits": [ 93 ], "attributes": { "hdlname": "spi_if_ins i_rst_b", - "src": "top.v:93.11-109.5|spi_if.v:5.29-5.36" + "src": "top.v:92.11-108.5|spi_if.v:5.29-5.36" } }, "spi_if_ins.i_spi_cs_b": { @@ -33806,7 +34122,7 @@ "bits": [ 44 ], "attributes": { "hdlname": "spi_if_ins i_spi_cs_b", - "src": "top.v:93.11-109.5|spi_if.v:19.29-19.39" + "src": "top.v:92.11-108.5|spi_if.v:19.29-19.39" } }, "spi_if_ins.i_spi_mosi": { @@ -33814,7 +34130,7 @@ "bits": [ 42 ], "attributes": { "hdlname": "spi_if_ins i_spi_mosi", - "src": "top.v:93.11-109.5|spi_if.v:18.29-18.39" + "src": "top.v:92.11-108.5|spi_if.v:18.29-18.39" } }, "spi_if_ins.i_spi_sck": { @@ -33822,45 +34138,53 @@ "bits": [ 43 ], "attributes": { "hdlname": "spi_if_ins i_spi_sck", - "src": "top.v:93.11-109.5|spi_if.v:16.29-16.38" + "src": "top.v:92.11-108.5|spi_if.v:16.29-16.38" } }, "spi_if_ins.i_sys_clk": { "hide_name": 0, - "bits": [ 113 ], + "bits": [ 89 ], "attributes": { "hdlname": "spi_if_ins i_sys_clk", - "src": "top.v:93.11-109.5|spi_if.v:6.29-6.38" + "src": "top.v:92.11-108.5|spi_if.v:6.29-6.38" } }, "spi_if_ins.o_cs": { "hide_name": 0, - "bits": [ 853, 125, 776, 850 ], + "bits": [ 864, 104, 784, 861 ], "attributes": { "hdlname": "spi_if_ins o_cs", - "src": "top.v:93.11-109.5|spi_if.v:11.29-11.33" + "src": "top.v:92.11-108.5|spi_if.v:11.29-11.33" } }, "spi_if_ins.o_cs_SB_DFFESR_Q_D": { "hide_name": 0, - "bits": [ "0", "0", "0", 849, "0", "0", 775, "0", "0", 123, "0", "0" ], + "bits": [ "0", "0", "0", 860, "0", "0", 783, "0", "0", 102, "0", "0" ], "attributes": { "force_downto": "00000000000000000000000000000001", - "src": "top.v:93.11-109.5|spi_if.v:65.21-70.28|spi_if.v:0.0-0.0|/usr/local/bin/../share/yosys/techmap.v:583.28-583.35" + "src": "top.v:92.11-108.5|spi_if.v:65.21-70.28|spi_if.v:0.0-0.0|/usr/local/bin/../share/yosys/techmap.v:583.28-583.35" } }, "spi_if_ins.o_cs_SB_DFFESR_Q_R": { "hide_name": 0, - "bits": [ 126, 995, 996, 997 ], + "bits": [ 105, 1003, 1004, 1005 ], "attributes": { "force_downto": "00000000000000000000000000000001", - "src": "top.v:93.11-109.5|spi_if.v:65.21-70.28|spi_if.v:0.0-0.0|/usr/local/bin/../share/yosys/techmap.v:575.21-575.22", + "src": "top.v:92.11-108.5|spi_if.v:65.21-70.28|spi_if.v:0.0-0.0|/usr/local/bin/../share/yosys/techmap.v:575.21-575.22", "unused_bits": "1 2 3" } }, + "spi_if_ins.o_cs_SB_LUT4_I2_1_O": { + "hide_name": 0, + "bits": [ 800, 802, 507, 168 ], + "attributes": { + "force_downto": "00000000000000000000000000000001", + "src": "/usr/local/bin/../share/yosys/ice40/cells_map.v:6.21-6.22" + } + }, "spi_if_ins.o_cs_SB_LUT4_I2_2_O": { "hide_name": 0, - "bits": [ 949, 457, 801, 799 ], + "bits": [ 959, 496, 805, 803 ], "attributes": { "force_downto": "00000000000000000000000000000001", "src": "/usr/local/bin/../share/yosys/ice40/cells_map.v:6.21-6.22" @@ -33868,7 +34192,7 @@ }, "spi_if_ins.o_cs_SB_LUT4_I2_O": { "hide_name": 0, - "bits": [ 796, 798, 468, 186 ], + "bits": [ 798, 802, 805 ], "attributes": { "force_downto": "00000000000000000000000000000001", "src": "/usr/local/bin/../share/yosys/ice40/cells_map.v:6.21-6.22" @@ -33876,55 +34200,47 @@ }, "spi_if_ins.o_cs_SB_LUT4_I3_1_O": { "hide_name": 0, - "bits": [ 455 ], + "bits": [ 494 ], "attributes": { } }, - "spi_if_ins.o_cs_SB_LUT4_I3_O": { - "hide_name": 0, - "bits": [ 468, 182, 801 ], - "attributes": { - "force_downto": "00000000000000000000000000000001", - "src": "/usr/local/bin/../share/yosys/ice40/cells_map.v:6.21-6.22" - } - }, "spi_if_ins.o_data_in": { "hide_name": 0, - "bits": [ 117, 114, 132, 197, 195, 193, 191, 188 ], + "bits": [ 94, 90, 110, 178, 177, 175, 173, 170 ], "attributes": { "hdlname": "spi_if_ins o_data_in", - "src": "top.v:93.11-109.5|spi_if.v:9.29-9.38" + "src": "top.v:92.11-108.5|spi_if.v:9.29-9.38" } }, "spi_if_ins.o_data_in_SB_DFFE_Q_E": { - "hide_name": 0, - "bits": [ 855 ], - "attributes": { - } - }, - "spi_if_ins.o_fetch_cmd": { - "hide_name": 0, - "bits": [ 867 ], - "attributes": { - "hdlname": "spi_if_ins o_fetch_cmd", - "src": "top.v:93.11-109.5|spi_if.v:12.29-12.40" - } - }, - "spi_if_ins.o_fetch_cmd_SB_DFFESR_Q_D": { - "hide_name": 0, - "bits": [ 865 ], - "attributes": { - } - }, - "spi_if_ins.o_fetch_cmd_SB_DFFESR_Q_E": { "hide_name": 0, "bits": [ 866 ], "attributes": { } }, + "spi_if_ins.o_fetch_cmd": { + "hide_name": 0, + "bits": [ 878 ], + "attributes": { + "hdlname": "spi_if_ins o_fetch_cmd", + "src": "top.v:92.11-108.5|spi_if.v:12.29-12.40" + } + }, + "spi_if_ins.o_fetch_cmd_SB_DFFESR_Q_D": { + "hide_name": 0, + "bits": [ 876 ], + "attributes": { + } + }, + "spi_if_ins.o_fetch_cmd_SB_DFFESR_Q_E": { + "hide_name": 0, + "bits": [ 877 ], + "attributes": { + } + }, "spi_if_ins.o_fetch_cmd_SB_LUT4_I3_1_O": { "hide_name": 0, - "bits": [ 52, 797 ], + "bits": [ 107, 801 ], "attributes": { "force_downto": "00000000000000000000000000000001", "src": "/usr/local/bin/../share/yosys/ice40/cells_map.v:6.21-6.22" @@ -33932,23 +34248,31 @@ }, "spi_if_ins.o_ioc": { "hide_name": 0, - "bits": [ 50, 53, 130, 129, 128 ], + "bits": [ 116, 166, 165, 198, 197 ], "attributes": { "hdlname": "spi_if_ins o_ioc", - "src": "top.v:93.11-109.5|spi_if.v:8.29-8.34" + "src": "top.v:92.11-108.5|spi_if.v:8.29-8.34" } }, "spi_if_ins.o_load_cmd": { "hide_name": 0, - "bits": [ 872 ], + "bits": [ 883 ], "attributes": { "hdlname": "spi_if_ins o_load_cmd", - "src": "top.v:93.11-109.5|spi_if.v:13.29-13.39" + "src": "top.v:92.11-108.5|spi_if.v:13.29-13.39" } }, "spi_if_ins.o_load_cmd_SB_DFFESR_Q_D": { "hide_name": 0, - "bits": [ 869, 861, 862 ], + "bits": [ 880, 872 ], + "attributes": { + "force_downto": "00000000000000000000000000000001", + "src": "/usr/local/bin/../share/yosys/ice40/cells_map.v:6.21-6.22" + } + }, + "spi_if_ins.o_load_cmd_SB_DFFESR_Q_D_SB_LUT4_I1_O": { + "hide_name": 0, + "bits": [ 865, 103, 881 ], "attributes": { "force_downto": "00000000000000000000000000000001", "src": "/usr/local/bin/../share/yosys/ice40/cells_map.v:6.21-6.22" @@ -33956,77 +34280,53 @@ }, "spi_if_ins.o_load_cmd_SB_DFFESR_Q_E": { "hide_name": 0, - "bits": [ 871 ], + "bits": [ 882 ], "attributes": { } }, "spi_if_ins.o_load_cmd_SB_LUT4_I2_O": { "hide_name": 0, - "bits": [ 57, 143 ], + "bits": [ 120, 48, 93 ], "attributes": { "force_downto": "00000000000000000000000000000001", "src": "/usr/local/bin/../share/yosys/ice40/cells_map.v:6.21-6.22" } }, - "spi_if_ins.o_load_cmd_SB_LUT4_I2_O_SB_LUT4_I2_O": { + "spi_if_ins.o_load_cmd_SB_LUT4_I2_O_SB_LUT4_O_I2": { "hide_name": 0, - "bits": [ 115 ], - "attributes": { - } - }, - "spi_if_ins.o_load_cmd_SB_LUT4_I2_O_SB_LUT4_I3_O": { - "hide_name": 0, - "bits": [ 47, 873 ], + "bits": [ 116, 107, 166 ], "attributes": { "force_downto": "00000000000000000000000000000001", "src": "/usr/local/bin/../share/yosys/ice40/cells_map.v:6.21-6.22" } }, - "spi_if_ins.o_load_cmd_SB_LUT4_I2_O_SB_LUT4_I3_O_SB_LUT4_I3_1_O": { - "hide_name": 0, - "bits": [ 198 ], - "attributes": { - } - }, - "spi_if_ins.o_load_cmd_SB_LUT4_I2_O_SB_LUT4_I3_O_SB_LUT4_I3_2_O": { - "hide_name": 0, - "bits": [ 203 ], - "attributes": { - } - }, - "spi_if_ins.o_load_cmd_SB_LUT4_I2_O_SB_LUT4_I3_O_SB_LUT4_I3_O": { - "hide_name": 0, - "bits": [ 189 ], - "attributes": { - } - }, "spi_if_ins.o_spi_miso": { "hide_name": 0, - "bits": [ 453 ], + "bits": [ 492 ], "attributes": { "hdlname": "spi_if_ins o_spi_miso", - "src": "top.v:93.11-109.5|spi_if.v:17.29-17.39" + "src": "top.v:92.11-108.5|spi_if.v:17.29-17.39" } }, "spi_if_ins.r_tx_byte": { "hide_name": 0, - "bits": [ 882, 881, 880, 879, 878, 877, 876, 875 ], + "bits": [ 893, 892, 891, 890, 889, 888, 887, 886 ], "attributes": { "hdlname": "spi_if_ins r_tx_byte", - "src": "top.v:93.11-109.5|spi_if.v:32.17-32.26" + "src": "top.v:92.11-108.5|spi_if.v:32.17-32.26" } }, "spi_if_ins.r_tx_data_valid": { "hide_name": 0, - "bits": [ 885 ], + "bits": [ 896 ], "attributes": { "hdlname": "spi_if_ins r_tx_data_valid", - "src": "top.v:93.11-109.5|spi_if.v:31.17-31.32" + "src": "top.v:92.11-108.5|spi_if.v:31.17-31.32" } }, "spi_if_ins.r_tx_data_valid_SB_DFFESR_Q_D": { "hide_name": 0, - "bits": [ 862, 883 ], + "bits": [ 873, 894 ], "attributes": { "force_downto": "00000000000000000000000000000001", "src": "/usr/local/bin/../share/yosys/ice40/cells_map.v:6.21-6.22" @@ -34034,19 +34334,35 @@ }, "spi_if_ins.r_tx_data_valid_SB_DFFESR_Q_D_SB_LUT4_I3_O": { "hide_name": 0, - "bits": [ 874 ], + "bits": [ 885 ], "attributes": { } }, "spi_if_ins.r_tx_data_valid_SB_DFFESR_Q_E": { "hide_name": 0, - "bits": [ 884 ], + "bits": [ 895 ], "attributes": { } }, "spi_if_ins.r_tx_data_valid_SB_LUT4_I3_O": { "hide_name": 0, - "bits": [ 889, 888, 887 ], + "bits": [ 886, 902, 897 ], + "attributes": { + "force_downto": "00000000000000000000000000000001", + "src": "/usr/local/bin/../share/yosys/ice40/cells_map.v:6.21-6.22" + } + }, + "spi_if_ins.r_tx_data_valid_SB_LUT4_I3_O_SB_LUT4_O_I0": { + "hide_name": 0, + "bits": [ 898, 899, 900, 901 ], + "attributes": { + "force_downto": "00000000000000000000000000000001", + "src": "/usr/local/bin/../share/yosys/ice40/cells_map.v:6.21-6.22" + } + }, + "spi_if_ins.r_tx_data_valid_SB_LUT4_I3_O_SB_LUT4_O_I0_SB_LUT4_O_I3": { + "hide_name": 0, + "bits": [ 903, 904, 905, 906 ], "attributes": { "force_downto": "00000000000000000000000000000001", "src": "/usr/local/bin/../share/yosys/ice40/cells_map.v:6.21-6.22" @@ -34054,15 +34370,15 @@ }, "spi_if_ins.spi.SCKr": { "hide_name": 0, - "bits": [ 890, 888, 889 ], + "bits": [ 916, 914, 915 ], "attributes": { "hdlname": "spi_if_ins spi SCKr", - "src": "top.v:93.11-109.5|spi_slave.v:62.13-62.17|spi_if.v:42.15-54.6" + "src": "top.v:92.11-108.5|spi_slave.v:62.13-62.17|spi_if.v:42.15-54.6" } }, "spi_if_ins.spi.SCKr_SB_LUT4_I0_O": { "hide_name": 0, - "bits": [ 909, 893, 887 ], + "bits": [ 901, 917, 897 ], "attributes": { "force_downto": "00000000000000000000000000000001", "src": "/usr/local/bin/../share/yosys/ice40/cells_map.v:6.21-6.22" @@ -34073,7 +34389,7 @@ "bits": [ 44 ], "attributes": { "hdlname": "spi_if_ins spi i_spi_cs_b", - "src": "top.v:93.11-109.5|spi_slave.v:15.23-15.33|spi_if.v:42.15-54.6" + "src": "top.v:92.11-108.5|spi_slave.v:15.23-15.33|spi_if.v:42.15-54.6" } }, "spi_if_ins.spi.i_spi_mosi": { @@ -34081,7 +34397,7 @@ "bits": [ 42 ], "attributes": { "hdlname": "spi_if_ins spi i_spi_mosi", - "src": "top.v:93.11-109.5|spi_slave.v:14.23-14.33|spi_if.v:42.15-54.6" + "src": "top.v:92.11-108.5|spi_slave.v:14.23-14.33|spi_if.v:42.15-54.6" } }, "spi_if_ins.spi.i_spi_sck": { @@ -34089,168 +34405,144 @@ "bits": [ 43 ], "attributes": { "hdlname": "spi_if_ins spi i_spi_sck", - "src": "top.v:93.11-109.5|spi_slave.v:12.23-12.32|spi_if.v:42.15-54.6" + "src": "top.v:92.11-108.5|spi_slave.v:12.23-12.32|spi_if.v:42.15-54.6" } }, "spi_if_ins.spi.i_sys_clk": { "hide_name": 0, - "bits": [ 113 ], + "bits": [ 89 ], "attributes": { "hdlname": "spi_if_ins spi i_sys_clk", - "src": "top.v:93.11-109.5|spi_slave.v:5.23-5.32|spi_if.v:42.15-54.6" + "src": "top.v:92.11-108.5|spi_slave.v:5.23-5.32|spi_if.v:42.15-54.6" } }, "spi_if_ins.spi.i_tx_byte": { "hide_name": 0, - "bits": [ 882, 881, 880, 879, 878, 877, 876, 875 ], + "bits": [ 893, 892, 891, 890, 889, 888, 887, 886 ], "attributes": { "hdlname": "spi_if_ins spi i_tx_byte", - "src": "top.v:93.11-109.5|spi_slave.v:9.23-9.32|spi_if.v:42.15-54.6" + "src": "top.v:92.11-108.5|spi_slave.v:9.23-9.32|spi_if.v:42.15-54.6" } }, "spi_if_ins.spi.i_tx_data_valid": { "hide_name": 0, - "bits": [ 885 ], + "bits": [ 896 ], "attributes": { "hdlname": "spi_if_ins spi i_tx_data_valid", - "src": "top.v:93.11-109.5|spi_slave.v:8.23-8.38|spi_if.v:42.15-54.6" + "src": "top.v:92.11-108.5|spi_slave.v:8.23-8.38|spi_if.v:42.15-54.6" } }, "spi_if_ins.spi.o_rx_byte": { "hide_name": 0, - "bits": [ 860, 859, 858, 857, 856, 852, 851, 854 ], + "bits": [ 871, 870, 869, 868, 867, 863, 862, 865 ], "attributes": { "hdlname": "spi_if_ins spi o_rx_byte", - "src": "top.v:93.11-109.5|spi_slave.v:7.23-7.32|spi_if.v:42.15-54.6" + "src": "top.v:92.11-108.5|spi_slave.v:7.23-7.32|spi_if.v:42.15-54.6" } }, "spi_if_ins.spi.o_rx_data_valid": { "hide_name": 0, - "bits": [ 862 ], + "bits": [ 873 ], "attributes": { "hdlname": "spi_if_ins spi o_rx_data_valid", - "src": "top.v:93.11-109.5|spi_slave.v:6.23-6.38|spi_if.v:42.15-54.6" + "src": "top.v:92.11-108.5|spi_slave.v:6.23-6.38|spi_if.v:42.15-54.6" } }, "spi_if_ins.spi.o_spi_miso": { "hide_name": 0, - "bits": [ 453 ], + "bits": [ 492 ], "attributes": { "hdlname": "spi_if_ins spi o_spi_miso", - "src": "top.v:93.11-109.5|spi_slave.v:13.23-13.33|spi_if.v:42.15-54.6" + "src": "top.v:92.11-108.5|spi_slave.v:13.23-13.33|spi_if.v:42.15-54.6" } }, "spi_if_ins.spi.o_spi_miso_SB_DFFE_Q_D": { "hide_name": 0, - "bits": [ 903 ], + "bits": [ 927 ], "attributes": { - "src": "top.v:93.11-109.5|spi_slave.v:69.3-86.6|spi_if.v:42.15-54.6" - } - }, - "spi_if_ins.spi.o_spi_miso_SB_DFFE_Q_D_SB_LUT4_O_I2": { - "hide_name": 0, - "bits": [ 875, 905, 887 ], - "attributes": { - "force_downto": "00000000000000000000000000000001", - "src": "/usr/local/bin/../share/yosys/ice40/cells_map.v:6.21-6.22" - } - }, - "spi_if_ins.spi.o_spi_miso_SB_DFFE_Q_D_SB_LUT4_O_I2_SB_LUT4_O_I0": { - "hide_name": 0, - "bits": [ 906, 907, 908, 909 ], - "attributes": { - "force_downto": "00000000000000000000000000000001", - "src": "/usr/local/bin/../share/yosys/ice40/cells_map.v:6.21-6.22" - } - }, - "spi_if_ins.spi.o_spi_miso_SB_DFFE_Q_D_SB_LUT4_O_I2_SB_LUT4_O_I0_SB_LUT4_O_I3": { - "hide_name": 0, - "bits": [ 910, 911, 891, 912 ], - "attributes": { - "force_downto": "00000000000000000000000000000001", - "src": "/usr/local/bin/../share/yosys/ice40/cells_map.v:6.21-6.22" + "src": "top.v:92.11-108.5|spi_slave.v:69.3-86.6|spi_if.v:42.15-54.6" } }, "spi_if_ins.spi.o_spi_miso_SB_DFFE_Q_E": { "hide_name": 0, - "bits": [ 904 ], + "bits": [ 928 ], "attributes": { } }, "spi_if_ins.spi.r2_rx_done": { "hide_name": 0, - "bits": [ 920 ], + "bits": [ 930 ], "attributes": { "hdlname": "spi_if_ins spi r2_rx_done", - "src": "top.v:93.11-109.5|spi_slave.v:22.7-22.17|spi_if.v:42.15-54.6" + "src": "top.v:92.11-108.5|spi_slave.v:22.7-22.17|spi_if.v:42.15-54.6" } }, "spi_if_ins.spi.r3_rx_done": { "hide_name": 0, - "bits": [ 921 ], + "bits": [ 931 ], "attributes": { "hdlname": "spi_if_ins spi r3_rx_done", - "src": "top.v:93.11-109.5|spi_slave.v:23.7-23.17|spi_if.v:42.15-54.6" + "src": "top.v:92.11-108.5|spi_slave.v:23.7-23.17|spi_if.v:42.15-54.6" } }, "spi_if_ins.spi.r3_rx_done_SB_LUT4_I2_O": { "hide_name": 0, - "bits": [ 895 ], + "bits": [ 919 ], "attributes": { - "src": "top.v:93.11-109.5|spi_slave.v:48.3-60.6|spi_if.v:42.15-54.6" + "src": "top.v:92.11-108.5|spi_slave.v:48.3-60.6|spi_if.v:42.15-54.6" } }, "spi_if_ins.spi.r_rx_bit_count": { "hide_name": 0, - "bits": [ 927, 925, 923 ], + "bits": [ 937, 935, 933 ], "attributes": { "hdlname": "spi_if_ins spi r_rx_bit_count", - "src": "top.v:93.11-109.5|spi_slave.v:17.13-17.27|spi_if.v:42.15-54.6" + "src": "top.v:92.11-108.5|spi_slave.v:17.13-17.27|spi_if.v:42.15-54.6" } }, "spi_if_ins.spi.r_rx_bit_count_SB_DFFR_Q_2_D": { "hide_name": 0, - "bits": [ 926, 925, 923 ], + "bits": [ 936, 935, 933 ], "attributes": { "force_downto": "00000000000000000000000000000001", - "src": "top.v:93.11-109.5|spi_slave.v:34.25-34.43|spi_if.v:42.15-54.6|/usr/local/bin/../share/yosys/ice40/arith_map.v:33.23-33.24" + "src": "top.v:92.11-108.5|spi_slave.v:34.25-34.43|spi_if.v:42.15-54.6|/usr/local/bin/../share/yosys/ice40/arith_map.v:33.23-33.24" } }, "spi_if_ins.spi.r_rx_bit_count_SB_DFFR_Q_D": { "hide_name": 0, - "bits": [ 926, 924, 922 ], + "bits": [ 936, 934, 932 ], "attributes": { "force_downto": "00000000000000000000000000000001", - "src": "top.v:93.11-109.5|spi_slave.v:34.25-34.43|spi_if.v:42.15-54.6|/usr/local/bin/../share/yosys/ice40/arith_map.v:33.26-33.27" + "src": "top.v:92.11-108.5|spi_slave.v:34.25-34.43|spi_if.v:42.15-54.6|/usr/local/bin/../share/yosys/ice40/arith_map.v:33.26-33.27" } }, "spi_if_ins.spi.r_rx_bit_count_SB_DFFR_Q_D_SB_LUT4_O_I3": { "hide_name": 0, - "bits": [ "0", 927, 928 ], + "bits": [ "0", 937, 938 ], "attributes": { "force_downto": "00000000000000000000000000000001", - "src": "top.v:93.11-109.5|spi_slave.v:34.25-34.43|spi_if.v:42.15-54.6|/usr/local/bin/../share/yosys/ice40/arith_map.v:51.21-51.22" + "src": "top.v:92.11-108.5|spi_slave.v:34.25-34.43|spi_if.v:42.15-54.6|/usr/local/bin/../share/yosys/ice40/arith_map.v:51.21-51.22" } }, "spi_if_ins.spi.r_rx_byte": { "hide_name": 0, - "bits": [ 902, 901, 900, 899, 898, 897, 896, 894 ], + "bits": [ 926, 925, 924, 923, 922, 921, 920, 918 ], "attributes": { "hdlname": "spi_if_ins spi r_rx_byte", - "src": "top.v:93.11-109.5|spi_slave.v:20.13-20.22|spi_if.v:42.15-54.6" + "src": "top.v:92.11-108.5|spi_slave.v:20.13-20.22|spi_if.v:42.15-54.6" } }, "spi_if_ins.spi.r_rx_done": { "hide_name": 0, - "bits": [ 919 ], + "bits": [ 929 ], "attributes": { "hdlname": "spi_if_ins spi r_rx_done", - "src": "top.v:93.11-109.5|spi_slave.v:21.7-21.16|spi_if.v:42.15-54.6" + "src": "top.v:92.11-108.5|spi_slave.v:21.7-21.16|spi_if.v:42.15-54.6" } }, "spi_if_ins.spi.r_rx_done_SB_DFFER_Q_D": { "hide_name": 0, - "bits": [ 44, 937 ], + "bits": [ 44, 947 ], "attributes": { "force_downto": "00000000000000000000000000000001", "src": "/usr/local/bin/../share/yosys/ice40/cells_map.v:6.21-6.22" @@ -34258,101 +34550,85 @@ }, "spi_if_ins.spi.r_rx_done_SB_DFFER_Q_D_SB_LUT4_I3_O": { "hide_name": 0, - "bits": [ 930 ], + "bits": [ 940 ], "attributes": { } }, "spi_if_ins.spi.r_rx_done_SB_DFFER_Q_E": { "hide_name": 0, - "bits": [ 938 ], + "bits": [ 948 ], "attributes": { } }, "spi_if_ins.spi.r_temp_rx_byte": { "hide_name": 0, - "bits": [ 936, 935, 934, 933, 932, 931, 929, "x" ], + "bits": [ 946, 945, 944, 943, 942, 941, 939, "x" ], "attributes": { "hdlname": "spi_if_ins spi r_temp_rx_byte", - "src": "top.v:93.11-109.5|spi_slave.v:19.13-19.27|spi_if.v:42.15-54.6" + "src": "top.v:92.11-108.5|spi_slave.v:19.13-19.27|spi_if.v:42.15-54.6" } }, "spi_if_ins.spi.r_tx_bit_count": { "hide_name": 0, - "bits": [ 891, 909, 892 ], + "bits": [ 905, 901, 909 ], "attributes": { "hdlname": "spi_if_ins spi r_tx_bit_count", - "src": "top.v:93.11-109.5|spi_slave.v:18.13-18.27|spi_if.v:42.15-54.6" + "src": "top.v:92.11-108.5|spi_slave.v:18.13-18.27|spi_if.v:42.15-54.6" } }, "spi_if_ins.spi.r_tx_bit_count_SB_DFFESR_Q_D": { "hide_name": 0, - "bits": [ 939, 943, 942 ], + "bits": [ 949, 953, 952 ], "attributes": { "force_downto": "00000000000000000000000000000001", - "src": "top.v:93.11-109.5|spi_slave.v:77.27-77.45|spi_if.v:42.15-54.6|/usr/local/bin/../share/yosys/ice40/arith_map.v:33.26-33.27" + "src": "top.v:92.11-108.5|spi_slave.v:77.27-77.45|spi_if.v:42.15-54.6|/usr/local/bin/../share/yosys/ice40/arith_map.v:33.26-33.27" } }, "spi_if_ins.spi.r_tx_bit_count_SB_DFFESR_Q_D_SB_LUT4_O_I3": { "hide_name": 0, - "bits": [ "1", 891, 941 ], + "bits": [ "1", 905, 951 ], "attributes": { "force_downto": "00000000000000000000000000000001", - "src": "top.v:93.11-109.5|spi_slave.v:77.27-77.45|spi_if.v:42.15-54.6|/usr/local/bin/../share/yosys/ice40/arith_map.v:51.21-51.22" + "src": "top.v:92.11-108.5|spi_slave.v:77.27-77.45|spi_if.v:42.15-54.6|/usr/local/bin/../share/yosys/ice40/arith_map.v:51.21-51.22" } }, "spi_if_ins.spi.r_tx_bit_count_SB_DFFESR_Q_R": { "hide_name": 0, - "bits": [ 940 ], + "bits": [ 950 ], "attributes": { } }, "spi_if_ins.spi.r_tx_byte": { "hide_name": 0, - "bits": [ 910, 917, 913, 915, 911, 918, 914, 916 ], + "bits": [ 903, 912, 907, 910, 904, 913, 908, 911 ], "attributes": { "hdlname": "spi_if_ins spi r_tx_byte", - "src": "top.v:93.11-109.5|spi_slave.v:24.13-24.22|spi_if.v:42.15-54.6" + "src": "top.v:92.11-108.5|spi_slave.v:24.13-24.22|spi_if.v:42.15-54.6" } }, "spi_if_ins.spi.r_tx_byte_SB_DFFESR_Q_E": { "hide_name": 0, - "bits": [ 944 ], + "bits": [ 954 ], "attributes": { } }, "spi_if_ins.state_if": { "hide_name": 0, - "bits": [ 863, 864, 861 ], + "bits": [ 874, 875, 872 ], "attributes": { "hdlname": "spi_if_ins state_if", - "src": "top.v:93.11-109.5|spi_if.v:28.17-28.25" - } - }, - "spi_if_ins.state_if_SB_DFFESR_Q_1_D": { - "hide_name": 0, - "bits": [ 946, 854, 886, 862 ], - "attributes": { - "force_downto": "00000000000000000000000000000001", - "src": "/usr/local/bin/../share/yosys/ice40/cells_map.v:6.21-6.22" + "src": "top.v:92.11-108.5|spi_if.v:28.17-28.25" } }, "spi_if_ins.state_if_SB_DFFESR_Q_1_R": { "hide_name": 0, - "bits": [ 868 ], + "bits": [ 879 ], "attributes": { } }, "spi_if_ins.state_if_SB_DFFESR_Q_D": { "hide_name": 0, - "bits": [ 886, 869, 862 ], - "attributes": { - "force_downto": "00000000000000000000000000000001", - "src": "/usr/local/bin/../share/yosys/ice40/cells_map.v:6.21-6.22" - } - }, - "spi_if_ins.state_if_SB_DFFESR_Q_D_SB_LUT4_I1_O": { - "hide_name": 0, - "bits": [ 854, 124, 870 ], + "bits": [ 956, 865, 884, 873 ], "attributes": { "force_downto": "00000000000000000000000000000001", "src": "/usr/local/bin/../share/yosys/ice40/cells_map.v:6.21-6.22" @@ -34360,47 +34636,47 @@ }, "spi_if_ins.state_if_SB_DFFE_Q_D": { "hide_name": 0, - "bits": [ 947 ], + "bits": [ 957 ], "attributes": { - "src": "top.v:93.11-109.5|spi_if.v:56.5-111.8" + "src": "top.v:92.11-108.5|spi_if.v:56.5-111.8" } }, "spi_if_ins.state_if_SB_DFFE_Q_E": { "hide_name": 0, - "bits": [ 945 ], + "bits": [ 955 ], "attributes": { } }, "spi_if_ins.w_rx_data": { "hide_name": 0, - "bits": [ 860, 859, 858, 857, 856, 852, 851, 854 ], + "bits": [ 871, 870, 869, 868, 867, 863, 862, 865 ], "attributes": { "hdlname": "spi_if_ins w_rx_data", - "src": "top.v:93.11-109.5|spi_if.v:30.17-30.26" + "src": "top.v:92.11-108.5|spi_if.v:30.17-30.26" } }, "spi_if_ins.w_rx_data_valid": { "hide_name": 0, - "bits": [ 862 ], + "bits": [ 873 ], "attributes": { "hdlname": "spi_if_ins w_rx_data_valid", - "src": "top.v:93.11-109.5|spi_if.v:29.17-29.32" + "src": "top.v:92.11-108.5|spi_if.v:29.17-29.32" } }, "sys_ctrl_ins.i_cs": { "hide_name": 0, - "bits": [ 853 ], + "bits": [ 864 ], "attributes": { "hdlname": "sys_ctrl_ins i_cs", - "src": "top.v:114.13-127.5|sys_ctrl.v:9.29-9.33" + "src": "top.v:113.13-126.5|sys_ctrl.v:9.29-9.33" } }, "sys_ctrl_ins.i_data_in": { "hide_name": 0, - "bits": [ 117, 114, 132, 197, 195, 193, 191, 188 ], + "bits": [ 94, 90, 110, 178, 177, 175, 173, 170 ], "attributes": { "hdlname": "sys_ctrl_ins i_data_in", - "src": "top.v:114.13-127.5|sys_ctrl.v:7.29-7.38" + "src": "top.v:113.13-126.5|sys_ctrl.v:7.29-7.38" } }, "sys_ctrl_ins.i_error_list": { @@ -34408,31 +34684,31 @@ "bits": [ "0", "0", "0", "0", "0", "0", "0", "x" ], "attributes": { "hdlname": "sys_ctrl_ins i_error_list", - "src": "top.v:114.13-127.5|sys_ctrl.v:14.29-14.41" + "src": "top.v:113.13-126.5|sys_ctrl.v:14.29-14.41" } }, "sys_ctrl_ins.i_fetch_cmd": { "hide_name": 0, - "bits": [ 867 ], + "bits": [ 878 ], "attributes": { "hdlname": "sys_ctrl_ins i_fetch_cmd", - "src": "top.v:114.13-127.5|sys_ctrl.v:10.29-10.40" + "src": "top.v:113.13-126.5|sys_ctrl.v:10.29-10.40" } }, "sys_ctrl_ins.i_ioc": { "hide_name": 0, - "bits": [ 50, 53, 130, 129, 128 ], + "bits": [ 116, 166, 165, 198, 197 ], "attributes": { "hdlname": "sys_ctrl_ins i_ioc", - "src": "top.v:114.13-127.5|sys_ctrl.v:6.29-6.34" + "src": "top.v:113.13-126.5|sys_ctrl.v:6.29-6.34" } }, "sys_ctrl_ins.i_load_cmd": { "hide_name": 0, - "bits": [ 872 ], + "bits": [ 883 ], "attributes": { "hdlname": "sys_ctrl_ins i_load_cmd", - "src": "top.v:114.13-127.5|sys_ctrl.v:11.29-11.39" + "src": "top.v:113.13-126.5|sys_ctrl.v:11.29-11.39" } }, "sys_ctrl_ins.i_reset": { @@ -34440,186 +34716,178 @@ "bits": [ "0" ], "attributes": { "hdlname": "sys_ctrl_ins i_reset", - "src": "top.v:114.13-127.5|sys_ctrl.v:3.29-3.36" + "src": "top.v:113.13-126.5|sys_ctrl.v:3.29-3.36" } }, "sys_ctrl_ins.i_sys_clk": { "hide_name": 0, - "bits": [ 113 ], + "bits": [ 89 ], "attributes": { "hdlname": "sys_ctrl_ins i_sys_clk", - "src": "top.v:114.13-127.5|sys_ctrl.v:4.29-4.38" + "src": "top.v:113.13-126.5|sys_ctrl.v:4.29-4.38" } }, "sys_ctrl_ins.o_data_out": { "hide_name": 0, - "bits": [ 949, "0", "0", "0", "0", "0", "0", "0" ], + "bits": [ 959, "0", "0", "0", "0", "0", "0", "0" ], "attributes": { "hdlname": "sys_ctrl_ins o_data_out", - "src": "top.v:114.13-127.5|sys_ctrl.v:8.29-8.39" - } - }, - "sys_ctrl_ins.o_data_out_SB_DFFE_Q_D": { - "hide_name": 0, - "bits": [ 3, 146, 137, 190 ], - "attributes": { - "force_downto": "00000000000000000000000000000001", - "src": "/usr/local/bin/../share/yosys/ice40/cells_map.v:6.21-6.22" + "src": "top.v:113.13-126.5|sys_ctrl.v:8.29-8.39" } }, "sys_ctrl_ins.o_data_out_SB_DFFE_Q_E": { - "hide_name": 0, - "bits": [ 948 ], - "attributes": { - } - }, - "sys_ctrl_ins.o_soft_reset": { - "hide_name": 0, - "bits": [ 57 ], - "attributes": { - "hdlname": "sys_ctrl_ins o_soft_reset", - "src": "top.v:114.13-127.5|sys_ctrl.v:13.29-13.41" - } - }, - "sys_ctrl_ins.o_soft_reset_SB_DFFESS_Q_E": { - "hide_name": 0, - "bits": [ 950 ], - "attributes": { - } - }, - "sys_ctrl_ins.o_soft_reset_SB_DFFESS_Q_S": { - "hide_name": 0, - "bits": [ 951 ], - "attributes": { - "force_downto": "00000000000000000000000000000001", - "src": "top.v:114.13-127.5|sys_ctrl.v:72.17-72.36|/usr/local/bin/../share/yosys/cmp2lut.v:24.22-24.23" - } - }, - "sys_ctrl_ins.reset_cmd": { - "hide_name": 0, - "bits": [ 952 ], - "attributes": { - "hdlname": "sys_ctrl_ins reset_cmd", - "src": "top.v:114.13-127.5|sys_ctrl.v:35.9-35.18" - } - }, - "sys_ctrl_ins.reset_cmd_SB_DFFESR_Q_E": { - "hide_name": 0, - "bits": [ 957 ], - "attributes": { - } - }, - "sys_ctrl_ins.reset_cmd_SB_DFFESR_Q_R": { "hide_name": 0, "bits": [ 958 ], "attributes": { } }, - "sys_ctrl_ins.reset_count": { + "sys_ctrl_ins.o_soft_reset": { "hide_name": 0, - "bits": [ 956, 954, 955, 953 ], + "bits": [ 93 ], "attributes": { - "hdlname": "sys_ctrl_ins reset_count", - "src": "top.v:114.13-127.5|sys_ctrl.v:34.15-34.26" + "hdlname": "sys_ctrl_ins o_soft_reset", + "src": "top.v:113.13-126.5|sys_ctrl.v:13.29-13.41" } }, - "sys_ctrl_ins.reset_count_SB_DFFESR_Q_1_D": { - "hide_name": 0, - "bits": [ 961 ], - "attributes": { - } - }, - "sys_ctrl_ins.reset_count_SB_DFFESR_Q_2_D": { - "hide_name": 0, - "bits": [ 963 ], - "attributes": { - } - }, - "sys_ctrl_ins.reset_count_SB_DFFESR_Q_3_D": { - "hide_name": 0, - "bits": [ 964 ], - "attributes": { - } - }, - "sys_ctrl_ins.reset_count_SB_DFFESR_Q_D": { + "sys_ctrl_ins.o_soft_reset_SB_DFFESS_Q_E": { "hide_name": 0, "bits": [ 960 ], "attributes": { } }, - "sys_ctrl_ins.reset_count_SB_DFFESR_Q_D_SB_LUT4_O_I3": { + "sys_ctrl_ins.o_soft_reset_SB_DFFESS_Q_S": { "hide_name": 0, - "bits": [ "0", 956, 962, 965 ], + "bits": [ 961 ], "attributes": { "force_downto": "00000000000000000000000000000001", - "src": "top.v:114.13-127.5|sys_ctrl.v:73.32-73.50|/usr/local/bin/../share/yosys/ice40/arith_map.v:51.21-51.22" + "src": "top.v:113.13-126.5|sys_ctrl.v:72.17-72.36|/usr/local/bin/../share/yosys/cmp2lut.v:24.22-24.23" + } + }, + "sys_ctrl_ins.reset_cmd": { + "hide_name": 0, + "bits": [ 962 ], + "attributes": { + "hdlname": "sys_ctrl_ins reset_cmd", + "src": "top.v:113.13-126.5|sys_ctrl.v:35.9-35.18" + } + }, + "sys_ctrl_ins.reset_cmd_SB_DFFESR_Q_E": { + "hide_name": 0, + "bits": [ 967 ], + "attributes": { + } + }, + "sys_ctrl_ins.reset_cmd_SB_DFFESR_Q_R": { + "hide_name": 0, + "bits": [ 968 ], + "attributes": { + } + }, + "sys_ctrl_ins.reset_count": { + "hide_name": 0, + "bits": [ 966, 964, 965, 963 ], + "attributes": { + "hdlname": "sys_ctrl_ins reset_count", + "src": "top.v:113.13-126.5|sys_ctrl.v:34.15-34.26" + } + }, + "sys_ctrl_ins.reset_count_SB_DFFESR_Q_1_D": { + "hide_name": 0, + "bits": [ 971 ], + "attributes": { + } + }, + "sys_ctrl_ins.reset_count_SB_DFFESR_Q_2_D": { + "hide_name": 0, + "bits": [ 973 ], + "attributes": { + } + }, + "sys_ctrl_ins.reset_count_SB_DFFESR_Q_3_D": { + "hide_name": 0, + "bits": [ 974 ], + "attributes": { + } + }, + "sys_ctrl_ins.reset_count_SB_DFFESR_Q_D": { + "hide_name": 0, + "bits": [ 970 ], + "attributes": { + } + }, + "sys_ctrl_ins.reset_count_SB_DFFESR_Q_D_SB_LUT4_O_I3": { + "hide_name": 0, + "bits": [ "0", 966, 972, 975 ], + "attributes": { + "force_downto": "00000000000000000000000000000001", + "src": "top.v:113.13-126.5|sys_ctrl.v:73.32-73.50|/usr/local/bin/../share/yosys/ice40/arith_map.v:51.21-51.22" } }, "sys_ctrl_ins.reset_count_SB_DFFESR_Q_E": { "hide_name": 0, - "bits": [ 959 ], + "bits": [ 969 ], "attributes": { } }, "w_clock_spi": { "hide_name": 0, - "bits": [ 113 ], + "bits": [ 89 ], "attributes": { - "src": "top.v:67.16-67.27" + "src": "top.v:66.16-66.27" } }, "w_clock_sys": { "hide_name": 0, - "bits": [ 113 ], + "bits": [ 89 ], "attributes": { - "src": "top.v:68.16-68.27" + "src": "top.v:67.16-67.27" } }, "w_cs": { "hide_name": 0, - "bits": [ 853, 125, 776, 850 ], + "bits": [ 864, 104, 784, 861 ], "attributes": { - "src": "top.v:72.16-72.20" + "src": "top.v:71.16-71.20" } }, "w_fetch": { "hide_name": 0, - "bits": [ 867 ], + "bits": [ 878 ], "attributes": { - "src": "top.v:73.16-73.23" + "src": "top.v:72.16-72.23" } }, "w_ioc": { "hide_name": 0, - "bits": [ 50, 53, 130, 129, 128 ], + "bits": [ 116, 166, 165, 198, 197 ], "attributes": { - "src": "top.v:69.16-69.21" + "src": "top.v:68.16-68.21" } }, "w_load": { "hide_name": 0, - "bits": [ 872 ], + "bits": [ 883 ], "attributes": { - "src": "top.v:74.16-74.22" + "src": "top.v:73.16-73.22" } }, "w_lvds_rx_09_d0": { "hide_name": 0, - "bits": [ 257 ], + "bits": [ 255 ], "attributes": { - "src": "top.v:229.9-229.24" + "src": "top.v:228.9-228.24" } }, "w_lvds_rx_09_d1": { "hide_name": 0, - "bits": [ 258 ], + "bits": [ 256 ], "attributes": { - "src": "top.v:230.9-230.24" + "src": "top.v:229.9-229.24" } }, "w_lvds_rx_09_d1_SB_LUT4_I0_O": { "hide_name": 0, - "bits": [ 343, 344, 57 ], + "bits": [ 93, 366 ], "attributes": { "force_downto": "00000000000000000000000000000001", "src": "/usr/local/bin/../share/yosys/ice40/cells_map.v:6.21-6.22" @@ -34627,51 +34895,35 @@ }, "w_lvds_rx_09_d1_SB_LUT4_I0_O_SB_LUT4_I3_O": { "hide_name": 0, - "bits": [ 219 ], + "bits": [ 202 ], "attributes": { } }, - "w_lvds_rx_09_d1_SB_LUT4_I0_O_SB_LUT4_O_I2": { - "hide_name": 0, - "bits": [ 340, 324, 332, 330 ], - "attributes": { - "force_downto": "00000000000000000000000000000001", - "src": "/usr/local/bin/../share/yosys/ice40/cells_map.v:6.21-6.22" - } - }, - "w_lvds_rx_09_d1_SB_LUT4_I0_O_SB_LUT4_O_I2_SB_LUT4_I0_O": { - "hide_name": 0, - "bits": [ 336, 258 ], - "attributes": { - "force_downto": "00000000000000000000000000000001", - "src": "/usr/local/bin/../share/yosys/ice40/cells_map.v:6.21-6.22" - } - }, "w_lvds_rx_09_d1_SB_LUT4_I3_O": { "hide_name": 0, - "bits": [ 302, 300, 222, 221, 220, 218, 298, 296, 294, 292, 290, 288, 284, 282, 280, 278, 276, 274, 272, 270, 268, 266, 316, 314, 312, 310, 308, 306, 304, 286, 264, 262 ], + "bits": [ 300, 298, 205, 204, 203, 201, 296, 294, 292, 290, 288, 286, 282, 280, 278, 276, 274, 272, 270, 268, 266, 264, 314, 312, 310, 308, 306, 304, 302, 284, 262, 260 ], "attributes": { "force_downto": "00000000000000000000000000000001", - "src": "top.v:250.12-259.5|lvds_rx.v:47.13-78.20|lvds_rx.v:0.0-0.0|/usr/local/bin/../share/yosys/techmap.v:575.21-575.22" + "src": "top.v:249.12-258.5|lvds_rx.v:47.13-78.20|lvds_rx.v:0.0-0.0|/usr/local/bin/../share/yosys/techmap.v:575.21-575.22" } }, "w_lvds_rx_24_d0": { "hide_name": 0, - "bits": [ 259 ], + "bits": [ 257 ], "attributes": { - "src": "top.v:231.9-231.24" + "src": "top.v:230.9-230.24" } }, "w_lvds_rx_24_d1": { "hide_name": 0, - "bits": [ 260 ], + "bits": [ 258 ], "attributes": { - "src": "top.v:232.9-232.24" + "src": "top.v:231.9-231.24" } }, "w_lvds_rx_24_d1_SB_LUT4_I0_O": { "hide_name": 0, - "bits": [ 57, 451 ], + "bits": [ 93, 490 ], "attributes": { "force_downto": "00000000000000000000000000000001", "src": "/usr/local/bin/../share/yosys/ice40/cells_map.v:6.21-6.22" @@ -34679,189 +34931,189 @@ }, "w_lvds_rx_24_d1_SB_LUT4_I0_O_SB_LUT4_I3_O": { "hide_name": 0, - "bits": [ 346 ], + "bits": [ 369 ], "attributes": { } }, "w_lvds_rx_24_d1_SB_LUT4_I3_O": { "hide_name": 0, - "bits": [ 396, 394, 390, 388, 386, 384, 382, 380, 378, 376, 374, 372, 368, 366, 364, 362, 360, 358, 356, 354, 352, 350, 408, 406, 404, 402, 400, 398, 392, 370, 348, 345 ], + "bits": [ 419, 417, 413, 411, 409, 407, 405, 403, 401, 399, 397, 395, 391, 389, 387, 385, 383, 381, 379, 377, 375, 373, 431, 429, 427, 425, 423, 421, 415, 393, 371, 368 ], "attributes": { "force_downto": "00000000000000000000000000000001", - "src": "top.v:274.12-283.5|lvds_rx.v:47.13-78.20|lvds_rx.v:0.0-0.0|/usr/local/bin/../share/yosys/techmap.v:575.21-575.22" + "src": "top.v:273.12-282.5|lvds_rx.v:47.13-78.20|lvds_rx.v:0.0-0.0|/usr/local/bin/../share/yosys/techmap.v:575.21-575.22" } }, "w_rx_09_fifo_data": { "hide_name": 0, - "bits": [ 303, 301, 24, 25, 26, 27 ], + "bits": [ 301, 299, 22, 23, 24, 25 ], "attributes": { } }, "w_rx_09_fifo_empty": { "hide_name": 0, - "bits": [ 22 ], + "bits": [ 20 ], "attributes": { - "src": "top.v:235.9-235.27" + "src": "top.v:234.9-234.27" } }, "w_rx_09_fifo_full": { "hide_name": 0, - "bits": [ 331 ], + "bits": [ 329 ], "attributes": { - "src": "top.v:234.9-234.26" + "src": "top.v:233.9-233.26" } }, "w_rx_09_fifo_pull": { "hide_name": 0, - "bits": [ 227 ], + "bits": [ 556 ], "attributes": { - "src": "top.v:239.9-239.26" + "src": "top.v:238.9-238.26" } }, "w_rx_09_fifo_pulled_data": { "hide_name": 0, - "bits": [ 78, 537, 110, 538, 539, 540, 541, 542, 543, 544, 99, 545, 546, 547, 548, 549, 522, 523, 111, 524, 525, 526, 527, 528, 529, 530, 100, 531, 532, 533, 534, 535 ], + "bits": [ 68, 558, 559, 560, 561, 562, 563, 564, 565, 566, 567, 568, 569, 570, 571, 572, 540, 541, 542, 543, 544, 545, 546, 547, 548, 549, 550, 551, 552, 553, 554, 555 ], "attributes": { - "src": "top.v:240.16-240.40" + "src": "top.v:239.16-239.40" } }, "w_rx_09_fifo_push": { "hide_name": 0, - "bits": [ 329 ], + "bits": [ 327 ], "attributes": { - "src": "top.v:237.9-237.26" + "src": "top.v:236.9-236.26" } }, "w_rx_09_fifo_write_clk": { "hide_name": 0, - "bits": [ 217 ], + "bits": [ 200 ], "attributes": { - "src": "top.v:236.9-236.31" + "src": "top.v:235.9-235.31" } }, "w_rx_24_fifo_data": { "hide_name": 0, - "bits": [ 397, 395, 391, 389, 387, 385, 383, 381, 379, 377, 375, 373, 369, 367, 365, 363, 361, 359, 357, 355, 353, 351, 409, 407, 405, 403, 401, 399, 393, 371, 349, 347 ], + "bits": [ 420, 418, 414, 412, 410, 408, 406, 404, 402, 400, 398, 396, 392, 390, 388, 386, 384, 382, 380, 378, 376, 374, 432, 430, 428, 426, 424, 422, 416, 394, 372, 370 ], "attributes": { - "src": "top.v:246.16-246.33" + "src": "top.v:245.16-245.33" } }, "w_rx_24_fifo_empty": { "hide_name": 0, - "bits": [ 75 ], + "bits": [ 57 ], "attributes": { - "src": "top.v:243.9-243.27" + "src": "top.v:242.9-242.27" } }, "w_rx_24_fifo_full": { "hide_name": 0, - "bits": [ 427 ], + "bits": [ 446 ], "attributes": { - "src": "top.v:242.9-242.26" + "src": "top.v:241.9-241.26" } }, "w_rx_24_fifo_pull": { "hide_name": 0, - "bits": [ 693 ], + "bits": [ 641 ], "attributes": { - "src": "top.v:247.9-247.26" + "src": "top.v:246.9-246.26" } }, "w_rx_24_fifo_pulled_data": { "hide_name": 0, - "bits": [ 81, 695, 109, 696, 697, 90, 698, 699, 700, 701, 108, 702, 703, 89, 704, 705, 681, 682, 107, 683, 684, 87, 685, 686, 687, 688, 106, 689, 690, 86, 691, 692 ], + "bits": [ 71, 685, 686, 687, 688, 689, 690, 691, 692, 693, 694, 695, 696, 697, 698, 699, 668, 669, 670, 671, 672, 673, 674, 675, 676, 677, 678, 679, 680, 681, 682, 683 ], "attributes": { - "src": "top.v:248.16-248.40" + "src": "top.v:247.16-247.40" } }, "w_rx_24_fifo_push": { "hide_name": 0, - "bits": [ 426 ], + "bits": [ 444 ], "attributes": { - "src": "top.v:245.9-245.26" + "src": "top.v:244.9-244.26" } }, "w_rx_24_fifo_write_clk": { "hide_name": 0, - "bits": [ 217 ], + "bits": [ 200 ], "attributes": { - "src": "top.v:244.9-244.31" + "src": "top.v:243.9-243.31" } }, "w_rx_data": { "hide_name": 0, - "bits": [ 117, 114, 132, 197, 195, 193, 191, 188 ], + "bits": [ 94, 90, 110, 178, 177, 175, 173, 170 ], "attributes": { - "src": "top.v:70.16-70.25" + "src": "top.v:69.16-69.25" } }, "w_smi_addr": { "hide_name": 0, - "bits": [ 30, 31, 32 ], + "bits": [ 28, 29, 30 ], "attributes": { - "src": "top.v:330.15-330.25" + "src": "top.v:329.15-329.25" } }, "w_smi_data_input": { "hide_name": 0, - "bits": [ 34, 35, 36, 37, 38, 39, 40, 41 ], + "bits": [ 32, 33, 34, 35, 36, 37, 38, 39 ], "attributes": { - "src": "top.v:332.15-332.31" + "src": "top.v:331.15-331.31" } }, "w_smi_data_output": { "hide_name": 0, - "bits": [ 34, 256, 255, 254, 253, 252, 251, 250 ], + "bits": [ 32, 254, 253, 252, 251, 250, 249, 248 ], "attributes": { - "src": "top.v:331.15-331.32" + "src": "top.v:330.15-330.32" } }, "w_smi_read_req": { "hide_name": 0, - "bits": [ 216 ], + "bits": [ 199 ], "attributes": { - "src": "top.v:333.9-333.23" + "src": "top.v:332.9-332.23" } }, "w_smi_write_req": { "hide_name": 0, "bits": [ "x" ], "attributes": { - "src": "top.v:334.9-334.24" + "src": "top.v:333.9-333.24" } }, "w_smi_writing": { "hide_name": 0, - "bits": [ 32 ], + "bits": [ 30 ], "attributes": { - "src": "top.v:335.9-335.22" + "src": "top.v:334.9-334.22" } }, "w_soft_reset": { "hide_name": 0, - "bits": [ 57 ], + "bits": [ 93 ], "attributes": { - "src": "top.v:76.16-76.28" + "src": "top.v:75.16-75.28" } }, "w_tx_data_io": { "hide_name": 0, - "bits": [ 186, 160, 162, 164, 169, 174, 178, 182 ], + "bits": [ 168, 137, 140, 143, 148, 154, 159, 163 ], "attributes": { - "src": "top.v:79.16-79.28" + "src": "top.v:78.16-78.28" } }, "w_tx_data_smi": { "hide_name": 0, - "bits": [ 796, 795, 794, 793 ], + "bits": [ 800, 799, 798, 797 ], "attributes": { } }, "w_tx_data_sys": { "hide_name": 0, - "bits": [ 949, "0", "0", "0", "0", "0", "0", "0" ], + "bits": [ 959, "0", "0", "0", "0", "0", "0", "0" ], "attributes": { - "src": "top.v:78.16-78.29" + "src": "top.v:77.16-77.29" } } } diff --git a/firmware/top.v b/firmware/top.v index c77097d..00a0331 100644 --- a/firmware/top.v +++ b/firmware/top.v @@ -7,7 +7,6 @@ module top( input i_glob_clock, - output i_smi_a0_irq, // RF FRONT-END PATH output o_rx_h_tx_l, @@ -19,7 +18,6 @@ module top( output o_shdn_tx_lna, // MODEM (LVDS & CLOCK) - input i_radio_clk, output o_iq_tx_p, output o_iq_tx_n, output o_iq_tx_clk_p, @@ -40,7 +38,6 @@ module top( // DIGITAL I/F input [3:0] i_config, input i_button, - output o_ldo_2v8_en, inout [7:0] io_pmod, output o_led0, output o_led1, @@ -53,6 +50,8 @@ module top( input i_smi_soe_se, input i_smi_swe_srw, inout [7:0] io_smi_data, + output o_smi_write_req, + output o_smi_read_req, // SPI input i_mosi, @@ -337,6 +336,9 @@ module top( assign w_smi_addr = {i_smi_a3, i_smi_a2, i_smi_a1}; assign io_smi_data = (w_smi_writing)?w_smi_data_output:1'bZ; assign w_smi_data_input = io_smi_data; + assign o_smi_write_req = (w_smi_writing)?w_smi_write_req:1'bZ; + assign o_smi_read_req = (w_smi_writing)?w_smi_read_req:1'bZ; + // Testing - output the clock signal (positive and negative) to the PMOD assign io_pmod[0] = (w_smi_writing)?w_smi_read_req:1'bZ; diff --git a/software/libcariboulite/src/at86rf215/at86rf215.c b/software/libcariboulite/src/at86rf215/at86rf215.c index 9139088..aaa1f0a 100644 --- a/software/libcariboulite/src/at86rf215/at86rf215.c +++ b/software/libcariboulite/src/at86rf215/at86rf215.c @@ -87,7 +87,7 @@ int at86rf215_init(at86rf215_st* dev, ZF_LOGI("configuring reset and irq pins"); // Configure GPIO pins - io_utils_setup_gpio(dev->reset_pin, io_utils_dir_output, io_utils_pull_up); + io_utils_setup_gpio(dev->reset_pin, io_utils_dir_output, io_utils_pull_off); io_utils_setup_gpio(dev->irq_pin, io_utils_dir_input, io_utils_pull_up); // set to known state @@ -106,7 +106,7 @@ int at86rf215_init(at86rf215_st* dev, if (io_utils_setup_interrupt(dev->irq_pin, at86rf215_interrupt_handler, dev) < 0) { ZF_LOGE("interrupt registration for irq_pin (%d) failed", dev->irq_pin); - io_utils_setup_gpio(dev->reset_pin, io_utils_dir_input, io_utils_pull_up); + //io_utils_setup_gpio(dev->reset_pin, io_utils_dir_input, io_utils_pull_up); io_utils_setup_gpio(dev->irq_pin, io_utils_dir_input, io_utils_pull_up); io_utils_spi_remove_chip(dev->io_spi, dev->io_spi_handle); return -1; @@ -135,7 +135,7 @@ int at86rf215_close(at86rf215_st* dev) dev->initialized = 0; - io_utils_setup_gpio(dev->reset_pin, io_utils_dir_input, io_utils_pull_up); + //io_utils_setup_gpio(dev->reset_pin, io_utils_dir_input, io_utils_pull_up); io_utils_setup_gpio(dev->irq_pin, io_utils_dir_input, io_utils_pull_up); // Release the SPI device @@ -408,8 +408,8 @@ void at86rf215_setup_iq_radio_transmit (at86rf215_st* dev, at86rf215_rf_channel_ void at86rf215_setup_iq_radio_receive (at86rf215_st* dev, at86rf215_rf_channel_en radio, uint32_t freq_hz) { /* - It is assumed, that - 1. the radio has been reset before and is in State TRXOFF. + It is assumed, that + 1. the radio has been reset before and is in State TRXOFF. 2. All interrupts in register RFn_IRQS should be enabled (RFn_IRQM=0x3f). */ @@ -459,7 +459,7 @@ void at86rf215_setup_iq_radio_receive (at86rf215_st* dev, at86rf215_rf_channel_e }; at86rf215_radio_set_rx_bandwidth_sampling(dev, radio, &rx_bw_samp_cfg); - at86rf215_radio_agc_ctrl_st agc_ctrl = + at86rf215_radio_agc_ctrl_st agc_ctrl = { // commands .agc_measure_source_not_filtered = 0, // AGC Input (0 - filterred, 1 - unfiltered, faster operation) @@ -481,7 +481,7 @@ void at86rf215_setup_iq_radio_receive (at86rf215_st* dev, at86rf215_rf_channel_e // 5. Configure the channel parameters, see section "Channel Configuration" on page 62 and transmit power at86rf215_setup_channel (dev, radio, freq_hz); - // 6. Switch to State TXPREP; interrupt IRQS.TRXRDY is issued. + // 6. Switch to State TXPREP; interrupt IRQS.TRXRDY is issued. // TXD and TXCLK are activated as shown in Figure 4-12 on page 26. // What? Why TX? @@ -491,7 +491,7 @@ void at86rf215_setup_iq_radio_receive (at86rf215_st* dev, at86rf215_rf_channel_e // 8. Enable the radio receiver by writing command RX to the register RFn_CMD. at86rf215_radio_set_state(dev, radio, at86rf215_radio_state_cmd_rx); - // 9. To prevent the AGC from switching its gain during reception, it is recommended to set AGCC.FRZC=1 + // 9. To prevent the AGC from switching its gain during reception, it is recommended to set AGCC.FRZC=1 // after reception of the preamble, the AGC has to be released after finishing reception by setting AGCC.FRZC=0. // at86rf215_radio_setup_agc(dev, radio, &agc_ctrl); } diff --git a/software/libcariboulite/src/at86rf215/build/CMakeFiles/at86rf215.dir/C.includecache b/software/libcariboulite/src/at86rf215/build/CMakeFiles/at86rf215.dir/C.includecache index ca81eca..0be4d06 100644 --- a/software/libcariboulite/src/at86rf215/build/CMakeFiles/at86rf215.dir/C.includecache +++ b/software/libcariboulite/src/at86rf215/build/CMakeFiles/at86rf215.dir/C.includecache @@ -86,32 +86,6 @@ at86rf215_regs.h at86rf215_common.h /home/pi/projects/cariboulite/software/libcariboulite/src/at86rf215/at86rf215_common.h -/home/pi/projects/cariboulite/software/libcariboulite/src/at86rf215/at86rf215_baseband.c -stdint.h -- -math.h -- -string.h -- -stdbool.h -- -stdio.h -- -zf_log/zf_log.h -/home/pi/projects/cariboulite/software/libcariboulite/src/at86rf215/zf_log/zf_log.h -io_utils/io_utils.h -/home/pi/projects/cariboulite/software/libcariboulite/src/at86rf215/io_utils/io_utils.h -io_utils/io_utils_spi.h -/home/pi/projects/cariboulite/software/libcariboulite/src/at86rf215/io_utils/io_utils_spi.h -at86rf215_radio.h -/home/pi/projects/cariboulite/software/libcariboulite/src/at86rf215/at86rf215_radio.h -at86rf215_baseband.h -/home/pi/projects/cariboulite/software/libcariboulite/src/at86rf215/at86rf215_baseband.h -at86rf215_regs.h -/home/pi/projects/cariboulite/software/libcariboulite/src/at86rf215/at86rf215_regs.h - -/home/pi/projects/cariboulite/software/libcariboulite/src/at86rf215/at86rf215_baseband.h - /home/pi/projects/cariboulite/software/libcariboulite/src/at86rf215/at86rf215_common.h stdio.h - @@ -132,36 +106,6 @@ io_utils/io_utils_spi.h at86rf215_regs.h /home/pi/projects/cariboulite/software/libcariboulite/src/at86rf215/at86rf215_regs.h -/home/pi/projects/cariboulite/software/libcariboulite/src/at86rf215/at86rf215_events.c -stdio.h -- -zf_log/zf_log.h -/home/pi/projects/cariboulite/software/libcariboulite/src/at86rf215/zf_log/zf_log.h -at86rf215_common.h -/home/pi/projects/cariboulite/software/libcariboulite/src/at86rf215/at86rf215_common.h - -/home/pi/projects/cariboulite/software/libcariboulite/src/at86rf215/at86rf215_radio.c -stdint.h -- -math.h -- -string.h -- -stdbool.h -- -stdio.h -- -zf_log/zf_log.h -/home/pi/projects/cariboulite/software/libcariboulite/src/at86rf215/zf_log/zf_log.h -io_utils/io_utils.h -/home/pi/projects/cariboulite/software/libcariboulite/src/at86rf215/io_utils/io_utils.h -io_utils/io_utils_spi.h -/home/pi/projects/cariboulite/software/libcariboulite/src/at86rf215/io_utils/io_utils_spi.h -at86rf215_radio.h -/home/pi/projects/cariboulite/software/libcariboulite/src/at86rf215/at86rf215_radio.h -at86rf215_regs.h -/home/pi/projects/cariboulite/software/libcariboulite/src/at86rf215/at86rf215_regs.h - /home/pi/projects/cariboulite/software/libcariboulite/src/at86rf215/at86rf215_radio.h stdio.h - diff --git a/software/libcariboulite/src/at86rf215/build/CMakeFiles/test_at86rf215.dir/C.includecache b/software/libcariboulite/src/at86rf215/build/CMakeFiles/test_at86rf215.dir/C.includecache index ca81eca..4bd298b 100644 --- a/software/libcariboulite/src/at86rf215/build/CMakeFiles/test_at86rf215.dir/C.includecache +++ b/software/libcariboulite/src/at86rf215/build/CMakeFiles/test_at86rf215.dir/C.includecache @@ -56,9 +56,13 @@ stdio.h pigpio.h - -../../zf_log/zf_log.h +/home/pi/projects/cariboulite/software/libcariboulite/src/at86rf215/at86rf215.h +at86rf215_common.h +/home/pi/projects/cariboulite/software/libcariboulite/src/at86rf215/at86rf215_common.h -/home/pi/projects/cariboulite/software/libcariboulite/src/at86rf215/at86rf215.c +/home/pi/projects/cariboulite/software/libcariboulite/src/at86rf215/at86rf215_common.h +stdio.h +- stdint.h - math.h @@ -69,106 +73,32 @@ stdbool.h - stdio.h - -zf_log/zf_log.h -/home/pi/projects/cariboulite/software/libcariboulite/src/at86rf215/zf_log/zf_log.h +io_utils/io_utils.h +/home/pi/projects/cariboulite/software/libcariboulite/src/at86rf215/io_utils/io_utils.h +io_utils/io_utils_spi.h +/home/pi/projects/cariboulite/software/libcariboulite/src/at86rf215/io_utils/io_utils_spi.h +at86rf215_regs.h +/home/pi/projects/cariboulite/software/libcariboulite/src/at86rf215/at86rf215_regs.h + +/home/pi/projects/cariboulite/software/libcariboulite/src/at86rf215/at86rf215_radio.h +stdio.h +- +stdint.h +- +at86rf215_common.h +/home/pi/projects/cariboulite/software/libcariboulite/src/at86rf215/at86rf215_common.h + +/home/pi/projects/cariboulite/software/libcariboulite/src/at86rf215/at86rf215_regs.h + +/home/pi/projects/cariboulite/software/libcariboulite/src/at86rf215/test_at86rf215.c +stdio.h +- at86rf215.h /home/pi/projects/cariboulite/software/libcariboulite/src/at86rf215/at86rf215.h -io_utils/io_utils.h -/home/pi/projects/cariboulite/software/libcariboulite/src/at86rf215/io_utils/io_utils.h -io_utils/io_utils_spi.h -/home/pi/projects/cariboulite/software/libcariboulite/src/at86rf215/io_utils/io_utils_spi.h at86rf215_radio.h /home/pi/projects/cariboulite/software/libcariboulite/src/at86rf215/at86rf215_radio.h -at86rf215_regs.h -/home/pi/projects/cariboulite/software/libcariboulite/src/at86rf215/at86rf215_regs.h - -/home/pi/projects/cariboulite/software/libcariboulite/src/at86rf215/at86rf215.h -at86rf215_common.h -/home/pi/projects/cariboulite/software/libcariboulite/src/at86rf215/at86rf215_common.h - -/home/pi/projects/cariboulite/software/libcariboulite/src/at86rf215/at86rf215_baseband.c -stdint.h -- -math.h -- -string.h -- -stdbool.h -- -stdio.h -- -zf_log/zf_log.h -/home/pi/projects/cariboulite/software/libcariboulite/src/at86rf215/zf_log/zf_log.h io_utils/io_utils.h /home/pi/projects/cariboulite/software/libcariboulite/src/at86rf215/io_utils/io_utils.h io_utils/io_utils_spi.h /home/pi/projects/cariboulite/software/libcariboulite/src/at86rf215/io_utils/io_utils_spi.h -at86rf215_radio.h -/home/pi/projects/cariboulite/software/libcariboulite/src/at86rf215/at86rf215_radio.h -at86rf215_baseband.h -/home/pi/projects/cariboulite/software/libcariboulite/src/at86rf215/at86rf215_baseband.h -at86rf215_regs.h -/home/pi/projects/cariboulite/software/libcariboulite/src/at86rf215/at86rf215_regs.h - -/home/pi/projects/cariboulite/software/libcariboulite/src/at86rf215/at86rf215_baseband.h - -/home/pi/projects/cariboulite/software/libcariboulite/src/at86rf215/at86rf215_common.h -stdio.h -- -stdint.h -- -math.h -- -string.h -- -stdbool.h -- -stdio.h -- -io_utils/io_utils.h -/home/pi/projects/cariboulite/software/libcariboulite/src/at86rf215/io_utils/io_utils.h -io_utils/io_utils_spi.h -/home/pi/projects/cariboulite/software/libcariboulite/src/at86rf215/io_utils/io_utils_spi.h -at86rf215_regs.h -/home/pi/projects/cariboulite/software/libcariboulite/src/at86rf215/at86rf215_regs.h - -/home/pi/projects/cariboulite/software/libcariboulite/src/at86rf215/at86rf215_events.c -stdio.h -- -zf_log/zf_log.h -/home/pi/projects/cariboulite/software/libcariboulite/src/at86rf215/zf_log/zf_log.h -at86rf215_common.h -/home/pi/projects/cariboulite/software/libcariboulite/src/at86rf215/at86rf215_common.h - -/home/pi/projects/cariboulite/software/libcariboulite/src/at86rf215/at86rf215_radio.c -stdint.h -- -math.h -- -string.h -- -stdbool.h -- -stdio.h -- -zf_log/zf_log.h -/home/pi/projects/cariboulite/software/libcariboulite/src/at86rf215/zf_log/zf_log.h -io_utils/io_utils.h -/home/pi/projects/cariboulite/software/libcariboulite/src/at86rf215/io_utils/io_utils.h -io_utils/io_utils_spi.h -/home/pi/projects/cariboulite/software/libcariboulite/src/at86rf215/io_utils/io_utils_spi.h -at86rf215_radio.h -/home/pi/projects/cariboulite/software/libcariboulite/src/at86rf215/at86rf215_radio.h -at86rf215_regs.h -/home/pi/projects/cariboulite/software/libcariboulite/src/at86rf215/at86rf215_regs.h - -/home/pi/projects/cariboulite/software/libcariboulite/src/at86rf215/at86rf215_radio.h -stdio.h -- -stdint.h -- -at86rf215_common.h -/home/pi/projects/cariboulite/software/libcariboulite/src/at86rf215/at86rf215_common.h - -/home/pi/projects/cariboulite/software/libcariboulite/src/at86rf215/at86rf215_regs.h diff --git a/software/libcariboulite/src/at86rf215/build/test_at86rf215 b/software/libcariboulite/src/at86rf215/build/test_at86rf215 index 2b5a243..e70b0bd 100755 Binary files a/software/libcariboulite/src/at86rf215/build/test_at86rf215 and b/software/libcariboulite/src/at86rf215/build/test_at86rf215 differ diff --git a/software/libcariboulite/src/at86rf215/test_at86rf215.c b/software/libcariboulite/src/at86rf215/test_at86rf215.c index 618f0e1..927e4f3 100644 --- a/software/libcariboulite/src/at86rf215/test_at86rf215.c +++ b/software/libcariboulite/src/at86rf215/test_at86rf215.c @@ -68,7 +68,7 @@ int test_at86rf215_read_chip_vn_pn(at86rf215_st* dev) // usec_gaps - specifies the micro-second gaps between freq steps or '-1' that // tell the function to put "getchars" (wait for enter key) void test_at86rf215_sweep_frequencies(at86rf215_st* dev, - at86rf215_rf_channel_en channel, + at86rf215_rf_channel_en channel, int start_freq, int num_freq, int step_freq, @@ -95,7 +95,7 @@ void test_at86rf215_sweep_frequencies(at86rf215_st* dev, //printf("Press enter to switch\n"); if (usec_gaps > 0) io_utils_usleep(usec_gaps); else - { + { printf("Press enter to step...\n"); getchar(); } @@ -109,7 +109,7 @@ void test_at86rf215_sweep_frequencies(at86rf215_st* dev, // ----------------------------------------------------------------------------------------- // Starting a reception window // usec_timeout - set up a timeout value in micro-seconds or -1 to wait for "enter" key -int test_at86rf215_continues_iq_rx (at86rf215_st* dev, at86rf215_rf_channel_en radio, +int test_at86rf215_continues_iq_rx (at86rf215_st* dev, at86rf215_rf_channel_en radio, uint32_t freq_hz, int usec_timeout) { at86rf215_setup_iq_radio_receive (dev, radio, freq_hz); @@ -121,7 +121,7 @@ int test_at86rf215_continues_iq_rx (at86rf215_st* dev, at86rf215_rf_channel_en r io_utils_usleep(usec_timeout); } else - { + { printf("Press enter to stop...\n"); getchar(); } @@ -135,7 +135,7 @@ int test_at86rf215_continues_iq_rx (at86rf215_st* dev, at86rf215_rf_channel_en r #define NO_FPGA_MODE 0 #define TEST_VERSIONS 1 #define TEST_FREQ_SWEEP 0 -#define TEST_IQ_RX_WIND 1 +#define TEST_IQ_RX_WIND 0 // ----------------------------------------------------------------------------------------- // MAIN @@ -164,8 +164,8 @@ int main () // Init spi io_utils_spi_init(&io_spi_dev); - at86rf215_init(&dev, &io_spi_dev); at86rf215_reset(&dev); + at86rf215_init(&dev, &io_spi_dev); // TEST: read the p/n and v/n from the IC #if TEST_VERSIONS diff --git a/software/libcariboulite/src/caribou_fpga/build/test_caribou_fpga b/software/libcariboulite/src/caribou_fpga/build/test_caribou_fpga index 68085f5..fffad27 100755 Binary files a/software/libcariboulite/src/caribou_fpga/build/test_caribou_fpga and b/software/libcariboulite/src/caribou_fpga/build/test_caribou_fpga differ diff --git a/software/libcariboulite/src/io_utils/build/CMakeFiles/io_utils.dir/C.includecache b/software/libcariboulite/src/io_utils/build/CMakeFiles/io_utils.dir/C.includecache index d67d7f8..0ab9f2d 100644 --- a/software/libcariboulite/src/io_utils/build/CMakeFiles/io_utils.dir/C.includecache +++ b/software/libcariboulite/src/io_utils/build/CMakeFiles/io_utils.dir/C.includecache @@ -8,91 +8,41 @@ ../../zf_log/zf_log.h -/home/pi/projects/cariboulite/software/libcariboulite/src/io_utils/pigpio/command.h +/home/pi/projects/cariboulite/software/libcariboulite/src/io_utils/io_utils.h stdio.h - string.h - -pigpio.h -/home/pi/projects/cariboulite/software/libcariboulite/src/io_utils/pigpio/pigpio.h - -/home/pi/projects/cariboulite/software/libcariboulite/src/io_utils/pigpio/custom.cext -pigpio.h -/home/pi/projects/cariboulite/software/libcariboulite/src/io_utils/pigpio/pigpio.h - -/home/pi/projects/cariboulite/software/libcariboulite/src/io_utils/pigpio/pigpio.c -stdio.h -- -string.h -- -strings.h -- -stdlib.h -- stdint.h - -inttypes.h +stdlib.h - -stdarg.h -- -ctype.h -- -syslog.h -- -poll.h -- -unistd.h -- -fcntl.h -- -termios.h -- -signal.h -- -errno.h +pigpio/pigpio.h +/home/pi/projects/cariboulite/software/libcariboulite/src/io_utils/pigpio/pigpio.h + +/home/pi/projects/cariboulite/software/libcariboulite/src/io_utils/io_utils_spi.c +pthread.h - time.h - -sys/ioctl.h +errno.h - -limits.h +zf_log/zf_log.h +/home/pi/projects/cariboulite/software/libcariboulite/src/io_utils/zf_log/zf_log.h +io_utils_spi.h +/home/pi/projects/cariboulite/software/libcariboulite/src/io_utils/io_utils_spi.h +io_utils.h +/home/pi/projects/cariboulite/software/libcariboulite/src/io_utils/io_utils.h + +/home/pi/projects/cariboulite/software/libcariboulite/src/io_utils/io_utils_spi.h +stdio.h +- +stdint.h - pthread.h - -sys/time.h -- -sys/mman.h -- -sys/types.h -- -sys/stat.h -- -sys/file.h -- -sys/socket.h -- -sys/sysmacros.h -- -netinet/tcp.h -- -arpa/inet.h -- -sys/select.h -- -fnmatch.h -- -glob.h -- -arpa/inet.h -- -zf_log/zf_log.h -/home/pi/projects/cariboulite/software/libcariboulite/src/io_utils/pigpio/zf_log/zf_log.h -pigpio.h -/home/pi/projects/cariboulite/software/libcariboulite/src/io_utils/pigpio/pigpio.h -command.h -/home/pi/projects/cariboulite/software/libcariboulite/src/io_utils/pigpio/command.h -custom.cext -/home/pi/projects/cariboulite/software/libcariboulite/src/io_utils/pigpio/custom.cext +io_utils.h +/home/pi/projects/cariboulite/software/libcariboulite/src/io_utils/io_utils.h /home/pi/projects/cariboulite/software/libcariboulite/src/io_utils/pigpio/pigpio.h stddef.h diff --git a/software/libcariboulite/src/io_utils/build/test_io_utils b/software/libcariboulite/src/io_utils/build/test_io_utils index 2cc38c7..b46a8e5 100755 Binary files a/software/libcariboulite/src/io_utils/build/test_io_utils and b/software/libcariboulite/src/io_utils/build/test_io_utils differ diff --git a/software/libcariboulite/src/io_utils/io_utils_spi.c b/software/libcariboulite/src/io_utils/io_utils_spi.c index 72354dc..bb5ade7 100644 --- a/software/libcariboulite/src/io_utils/io_utils_spi.c +++ b/software/libcariboulite/src/io_utils/io_utils_spi.c @@ -83,6 +83,8 @@ static int io_utils_spi_write_rffc507x(io_utils_spi_st* dev, io_utils_spi_chip_s uint32_t data = reg; data = ((data & 0x7f) << 16) | val; + //printf("==> io_utils_spi_write_rffc507x: %06X\n", data); + int sdata_pin = chip->miso_mosi_swap?dev->miso:dev->mosi; int sclk_pin = dev->sck; int enx_pin = chip->cs_pin; @@ -196,6 +198,8 @@ static int io_utils_spi_read_rffc507x(io_utils_spi_st* dev, io_utils_spi_chip_st io_utils_write_gpio_with_wait(sclk_pin, 1, nop_cnt); io_utils_write_gpio_with_wait(sclk_pin, 0, nop_cnt); + //printf("==>The read data is: %06X\n", data); + return data; } @@ -520,7 +524,8 @@ int io_utils_spi_transmit(io_utils_spi_st* dev, int chip_handle, } else { - uint16_t val = ((uint16_t)(tx_buf[1]))<<8 | tx_buf[2]; + uint16_t val = ((uint16_t)(tx_buf[2]))<<8 | tx_buf[1]; + //ZF_LOGI("rffc507x writing to reg %02X, data %04X", reg, val); int r = io_utils_spi_write_rffc507x(dev, dev->current_chip, reg, val); if (r < 0) { diff --git a/software/libcariboulite/src/rffc507x/build/CMakeFiles/test_rffc507x.dir/C.includecache b/software/libcariboulite/src/rffc507x/build/CMakeFiles/test_rffc507x.dir/C.includecache index 7c5b4ae..5c82020 100644 --- a/software/libcariboulite/src/rffc507x/build/CMakeFiles/test_rffc507x.dir/C.includecache +++ b/software/libcariboulite/src/rffc507x/build/CMakeFiles/test_rffc507x.dir/C.includecache @@ -56,22 +56,6 @@ stdio.h pigpio.h - -../../zf_log/zf_log.h - -/home/pi/projects/cariboulite/software/libcariboulite/src/rffc507x/rffc507x.c -stdint.h -- -string.h -- -zf_log/zf_log.h -/home/pi/projects/cariboulite/software/libcariboulite/src/rffc507x/zf_log/zf_log.h -rffc507x.h -/home/pi/projects/cariboulite/software/libcariboulite/src/rffc507x/rffc507x.h -rffc507x_regs.h -/home/pi/projects/cariboulite/software/libcariboulite/src/rffc507x/rffc507x_regs.h -stdio.h -- - /home/pi/projects/cariboulite/software/libcariboulite/src/rffc507x/rffc507x.h stdio.h - @@ -82,9 +66,13 @@ io_utils/io_utils.h io_utils/io_utils_spi.h /home/pi/projects/cariboulite/software/libcariboulite/src/rffc507x/io_utils/io_utils_spi.h -/home/pi/projects/cariboulite/software/libcariboulite/src/rffc507x/rffc507x_regs.h +/home/pi/projects/cariboulite/software/libcariboulite/src/rffc507x/test_rffc507x.c stdio.h - -stdint.h -- +rffc507x.h +/home/pi/projects/cariboulite/software/libcariboulite/src/rffc507x/rffc507x.h +io_utils/io_utils.h +/home/pi/projects/cariboulite/software/libcariboulite/src/rffc507x/io_utils/io_utils.h +io_utils/io_utils_spi.h +/home/pi/projects/cariboulite/software/libcariboulite/src/rffc507x/io_utils/io_utils_spi.h diff --git a/software/libcariboulite/src/rffc507x/build/test_rffc507x b/software/libcariboulite/src/rffc507x/build/test_rffc507x index 6d12df4..e34e0f7 100755 Binary files a/software/libcariboulite/src/rffc507x/build/test_rffc507x and b/software/libcariboulite/src/rffc507x/build/test_rffc507x differ diff --git a/software/libcariboulite/src/rffc507x/rffc507x.c b/software/libcariboulite/src/rffc507x/rffc507x.c index 7d8fe3e..c623e57 100644 --- a/software/libcariboulite/src/rffc507x/rffc507x.c +++ b/software/libcariboulite/src/rffc507x/rffc507x.c @@ -68,8 +68,8 @@ static uint16_t rffc507x_regs_default[RFFC507X_NUM_REGS] = 0x2a20, /* 12 */ 0x0000, /* 13 */ 0x0000, /* 14 */ - 0x0000, /* 15 */ - 0x0000, /* 16 */ + 0x0000, /* 15h / 21d <== SDI_CTRL - SDI Control */ + 0x0000, /* 16h / 22d <== GPO - General Purpose Outputs */ 0x4900, /* 17 */ 0x0281, /* 18 */ 0xf00f, /* 19 */ @@ -83,6 +83,7 @@ static uint16_t rffc507x_regs_default[RFFC507X_NUM_REGS] = //=========================================================================== static inline void rffc507x_reg_commit(rffc507x_st* dev, uint8_t r) { + //printf("writing reg %d, value: %04X\n", r, dev->rffc507x_regs[r]); rffc507x_reg_write(dev, r, dev->rffc507x_regs[r]); } @@ -117,11 +118,9 @@ int rffc507x_init( rffc507x_st* dev, dev->io_spi = io_spi; /* Configure GPIO pins. */ - io_utils_setup_gpio(dev->mode_pin, io_utils_dir_output, io_utils_pull_up); io_utils_setup_gpio(dev->reset_pin, io_utils_dir_output, io_utils_pull_up); /* set to known state */ - io_utils_write_gpio(dev->mode_pin, 0); io_utils_write_gpio(dev->reset_pin, 1); dev->io_spi_handle = io_utils_spi_add_chip(dev->io_spi, dev->cs_pin, 5000000, 0, 0, @@ -146,10 +145,15 @@ int rffc507x_init( rffc507x_st* dev, set_RFFC507X_P2PRESC(dev, 0); set_RFFC507X_P2VCOSEL(dev, 0); - // set ENBL and MODE to be configured via 3-wire interface, not control pins. + // set ENBL and MODE to be configured via 4-wire interface, not control pins. + set_RFFC507X_RESET(dev, 0); + set_RFFC507X_ADDR(dev, 0); + //set_RFFC507X_4WIRE(dev, 1); + set_RFFC507X_4WIRE(dev, 0); + set_RFFC507X_MODE(dev, 1); + set_RFFC507X_ENBL(dev, 1); set_RFFC507X_SIPIN(dev, 1); - - // GPOs are active at all times + set_RFFC507X_LOCK(dev, 0); set_RFFC507X_GATE(dev, 1); // Write default register values to chip. @@ -183,7 +187,6 @@ int rffc507x_release(rffc507x_st* dev) dev->initialized = 0; io_utils_setup_gpio(dev->reset_pin, io_utils_dir_input, io_utils_pull_up); - io_utils_setup_gpio(dev->mode_pin, io_utils_dir_input, io_utils_pull_up); // Release the SPI device io_utils_spi_remove_chip(dev->io_spi, dev->io_spi_handle); @@ -209,7 +212,7 @@ uint16_t rffc507x_reg_read(rffc507x_st* dev, uint8_t r) uint16_t vin = 0; // Readback register is not cached. - if (r == RFFC507X_READBACK_REG) + //if (r == RFFC507X_READBACK_REG) { io_utils_spi_transmit(dev->io_spi, dev->io_spi_handle, &vout, (uint8_t*)&vin, 2, io_utils_spi_read); return vin; @@ -371,6 +374,36 @@ uint64_t rffc507x_set_frequency(rffc507x_st* dev, uint16_t mhz) return tune_freq; } +//=========================================================================== +void rffc507x_setup_pin_functions(rffc507x_st* dev) +{ + ZF_LOGD("setting up gpio configurations (4-wire)"); + set_RFFC507X_RESET(dev, 0); + set_RFFC507X_ADDR(dev, 0); + set_RFFC507X_4WIRE(dev, 1); + set_RFFC507X_MODE(dev, 1); + set_RFFC507X_ENBL(dev, 1); + set_RFFC507X_SIPIN(dev, 0); + set_RFFC507X_LOCK(dev, 0); + set_RFFC507X_GATE(dev, 0); + rffc507x_regs_commit(dev); +} + +//=========================================================================== +void rffc507x_readback(rffc507x_st* dev, uint16_t *readback_buff, int buf_len) +{ + if (buf_len > 16) buf_len = 16; + + for (int i = 0; i < buf_len; i++) + { + set_RFFC507X_READSEL(dev, i); + rffc507x_regs_commit(dev); + readback_buff[i] = rffc507x_reg_read(dev, RFFC507X_READBACK_REG); + + printf ("READBACK #%d: %04X\n", i, readback_buff[i]); + } +} + //=========================================================================== void rffc507x_set_gpo(rffc507x_st* dev, uint8_t gpo) { diff --git a/software/libcariboulite/src/rffc507x/rffc507x.h b/software/libcariboulite/src/rffc507x/rffc507x.h index 7bc5b82..2c81d78 100644 --- a/software/libcariboulite/src/rffc507x/rffc507x.h +++ b/software/libcariboulite/src/rffc507x/rffc507x.h @@ -39,7 +39,6 @@ typedef struct { int cs_pin; int reset_pin; - int mode_pin; io_utils_spi_st* io_spi; int io_spi_handle; @@ -78,5 +77,7 @@ void rffc507x_rxtx(rffc507x_st* dev); void rffc507x_enable(rffc507x_st* dev); void rffc507x_disable(rffc507x_st* dev); void rffc507x_set_gpo(rffc507x_st* dev, uint8_t gpo); +void rffc507x_setup_pin_functions(rffc507x_st* dev); +void rffc507x_readback(rffc507x_st* dev, uint16_t *readback_buff, int buf_len); #endif // __RFFC507X_H diff --git a/software/libcariboulite/src/rffc507x/test_rffc507x.c b/software/libcariboulite/src/rffc507x/test_rffc507x.c index f8c197a..6d6b9a0 100644 --- a/software/libcariboulite/src/rffc507x/test_rffc507x.c +++ b/software/libcariboulite/src/rffc507x/test_rffc507x.c @@ -31,10 +31,10 @@ int main () io_utils_set_gpio_mode(FPGA_RESET, io_utils_alt_gpio_out); io_utils_set_gpio_mode(ICE40_CS, io_utils_alt_gpio_out); io_utils_setup_gpio(CARIBOULITE_MXR_RESET, io_utils_dir_output, io_utils_pull_up); - + //io_utils_write_gpio(FPGA_RESET, 0); //io_utils_write_gpio(ICE40_CS, 0); - + io_utils_write_gpio(CARIBOULITE_MXR_RESET, 0); printf("RFFC5072 is reset, press enter to release...\n"); getchar(); @@ -42,6 +42,7 @@ int main () printf("RFFC5072 is not reset.\n"); io_utils_spi_init(&io_spi_dev); + io_utils_set_gpio_mode(19, io_utils_alt_gpio_in); rffc507x_init(&dev, &io_spi_dev); printf("RFFC507X Registers:\n"); @@ -51,6 +52,9 @@ int main () printf("REG #%d => %04X\n", i, reg_val); } + uint16_t readback_buff[16] = {0}; + rffc507x_readback(&dev, readback_buff, 16); + rffc507x_release(&dev); io_utils_spi_close(&io_spi_dev); io_utils_cleanup();