#ifndef ZF_LOG_LEVEL
    #define ZF_LOG_LEVEL ZF_LOG_VERBOSE
#endif

#define ZF_LOG_DEF_SRCLOC ZF_LOG_SRCLOC_LONG
#define ZF_LOG_TAG "AT86RF215_BaseBand"

#include <stdint.h>
#include <math.h>
#include <string.h>
#include <stdbool.h>
#include <stdio.h>
#include "zf_log/zf_log.h"
#include "io_utils/io_utils.h"
#include "io_utils/io_utils_spi.h"
#include "at86rf215_radio.h"
#include "at86rf215_baseband.h"
#include "at86rf215_regs.h"

static const struct at86rf215_BBC_regs BBC0_regs = {
    .RG_IRQS       = 0x02,
    .RG_FBRXS      = 0x2000,
    .RG_FBRXE      = 0x27FE,
    .RG_FBTXS      = 0x2800,
    .RG_FBTXE      = 0x2FFE,
    .RG_IRQM       = 0x300,
    .RG_PC         = 0x301,
    .RG_PS         = 0x302,
    .RG_RXFLL      = 0x304,
    .RG_RXFLH      = 0x305,
    .RG_TXFLL      = 0x306,
    .RG_TXFLH      = 0x307,
    .RG_FBLL       = 0x308,
    .RG_FBLH       = 0x309,
    .RG_FBLIL      = 0x30A,
    .RG_FBLIH      = 0x30B,
    .RG_OFDMPHRTX  = 0x30C,
    .RG_OFDMPHRRX  = 0x30D,
    .RG_OFDMC      = 0x30E,
    .RG_OFDMSW     = 0x30F,
    .RG_OQPSKC0    = 0x310,
    .RG_OQPSKC1    = 0x311,
    .RG_OQPSKC2    = 0x312,
    .RG_OQPSKC3    = 0x313,
    .RG_OQPSKPHRTX = 0x314,
    .RG_OQPSKPHRRX = 0x315,
    .RG_AFC0       = 0x320,
    .RG_AFC1       = 0x321,
    .RG_AFFTM      = 0x322,
    .RG_AFFVM      = 0x323,
    .RG_AFS        = 0x324,
    .RG_MACEA0     = 0x325,
    .RG_MACEA1     = 0x326,
    .RG_MACEA2     = 0x327,
    .RG_MACEA3     = 0x328,
    .RG_MACEA4     = 0x329,
    .RG_MACEA5     = 0x32A,
    .RG_MACEA6     = 0x32B,
    .RG_MACEA7     = 0x32C,
    .RG_MACPID0F0  = 0x32D,
    .RG_MACPID1F0  = 0x32E,
    .RG_MACSHA0F0  = 0x32F,
    .RG_MACSHA1F0  = 0x330,
    .RG_MACPID0F1  = 0x331,
    .RG_MACPID1F1  = 0x332,
    .RG_MACSHA0F1  = 0x333,
    .RG_MACSHA1F1  = 0x334,
    .RG_MACPID0F2  = 0x335,
    .RG_MACPID1F2  = 0x336,
    .RG_MACSHA0F2  = 0x337,
    .RG_MACSHA1F2  = 0x338,
    .RG_MACPID0F3  = 0x339,
    .RG_MACPID1F3  = 0x33A,
    .RG_MACSHA0F3  = 0x33B,
    .RG_MACSHA1F3  = 0x33C,
    .RG_AMCS       = 0x340,
    .RG_AMEDT      = 0x341,
    .RG_AMAACKPD   = 0x342,
    .RG_AMAACKTL   = 0x343,
    .RG_AMAACKTH   = 0x344,
    .RG_FSKC0      = 0x360,
    .RG_FSKC1      = 0x361,
    .RG_FSKC2      = 0x362,
    .RG_FSKC3      = 0x363,
    .RG_FSKC4      = 0x364,
    .RG_FSKPLL     = 0x365,
    .RG_FSKSFD0L   = 0x366,
    .RG_FSKSFD0H   = 0x367,
    .RG_FSKSFD1L   = 0x368,
    .RG_FSKSFD1H   = 0x369,
    .RG_FSKPHRTX   = 0x36A,
    .RG_FSKPHRRX   = 0x36B,
    .RG_FSKRPC     = 0x36C,
    .RG_FSKRPCONT  = 0x36D,
    .RG_FSKRPCOFFT = 0x36E,
    .RG_FSKRRXFLL  = 0x370,
    .RG_FSKRRXFLH  = 0x371,
    .RG_FSKDM      = 0x372,
    .RG_FSKPE0     = 0x373,
    .RG_FSKPE1     = 0x374,
    .RG_FSKPE2     = 0x375,
    .RG_PMUC       = 0x380,
    .RG_PMUVAL     = 0x381,
    .RG_PMUQF      = 0x382,
    .RG_PMUI       = 0x383,
    .RG_PMUQ       = 0x384,
    .RG_CNTC       = 0x390,
    .RG_CNT0       = 0x391,
    .RG_CNT1       = 0x392,
    .RG_CNT2       = 0x393,
    .RG_CNT3       = 0x394,
};

static const struct at86rf215_BBC_regs BBC1_regs = {
    .RG_IRQS       = 0x03,
    .RG_FBRXS      = 0x3000,
    .RG_FBRXE      = 0x37FE,
    .RG_FBTXS      = 0x3800,
    .RG_FBTXE      = 0x3FFE,
    .RG_IRQM       = 0x400,
    .RG_PC         = 0x401,
    .RG_PS         = 0x402,
    .RG_RXFLL      = 0x404,
    .RG_RXFLH      = 0x405,
    .RG_TXFLL      = 0x406,
    .RG_TXFLH      = 0x407,
    .RG_FBLL       = 0x408,
    .RG_FBLH       = 0x409,
    .RG_FBLIL      = 0x40A,
    .RG_FBLIH      = 0x40B,
    .RG_OFDMPHRTX  = 0x40C,
    .RG_OFDMPHRRX  = 0x40D,
    .RG_OFDMC      = 0x40E,
    .RG_OFDMSW     = 0x40F,
    .RG_OQPSKC0    = 0x410,
    .RG_OQPSKC1    = 0x411,
    .RG_OQPSKC2    = 0x412,
    .RG_OQPSKC3    = 0x413,
    .RG_OQPSKPHRTX = 0x414,
    .RG_OQPSKPHRRX = 0x415,
    .RG_AFC0       = 0x420,
    .RG_AFC1       = 0x421,
    .RG_AFFTM      = 0x422,
    .RG_AFFVM      = 0x423,
    .RG_AFS        = 0x424,
    .RG_MACEA0     = 0x425,
    .RG_MACEA1     = 0x426,
    .RG_MACEA2     = 0x427,
    .RG_MACEA3     = 0x428,
    .RG_MACEA4     = 0x429,
    .RG_MACEA5     = 0x42A,
    .RG_MACEA6     = 0x42B,
    .RG_MACEA7     = 0x42C,
    .RG_MACPID0F0  = 0x42D,
    .RG_MACPID1F0  = 0x42E,
    .RG_MACSHA0F0  = 0x42F,
    .RG_MACSHA1F0  = 0x430,
    .RG_MACPID0F1  = 0x431,
    .RG_MACPID1F1  = 0x432,
    .RG_MACSHA0F1  = 0x433,
    .RG_MACSHA1F1  = 0x434,
    .RG_MACPID0F2  = 0x435,
    .RG_MACPID1F2  = 0x436,
    .RG_MACSHA0F2  = 0x437,
    .RG_MACSHA1F2  = 0x438,
    .RG_MACPID0F3  = 0x439,
    .RG_MACPID1F3  = 0x43A,
    .RG_MACSHA0F3  = 0x43B,
    .RG_MACSHA1F3  = 0x43C,
    .RG_AMCS       = 0x440,
    .RG_AMEDT      = 0x441,
    .RG_AMAACKPD   = 0x442,
    .RG_AMAACKTL   = 0x443,
    .RG_AMAACKTH   = 0x444,
    .RG_FSKC0      = 0x460,
    .RG_FSKC1      = 0x461,
    .RG_FSKC2      = 0x462,
    .RG_FSKC3      = 0x463,
    .RG_FSKC4      = 0x464,
    .RG_FSKPLL     = 0x465,
    .RG_FSKSFD0L   = 0x466,
    .RG_FSKSFD0H   = 0x467,
    .RG_FSKSFD1L   = 0x468,
    .RG_FSKSFD1H   = 0x469,
    .RG_FSKPHRTX   = 0x46A,
    .RG_FSKPHRRX   = 0x46B,
    .RG_FSKRPC     = 0x46C,
    .RG_FSKRPCONT  = 0x46D,
    .RG_FSKRPCOFFT = 0x46E,
    .RG_FSKRRXFLL  = 0x470,
    .RG_FSKRRXFLH  = 0x471,
    .RG_FSKDM      = 0x472,
    .RG_FSKPE0     = 0x473,
    .RG_FSKPE1     = 0x474,
    .RG_FSKPE2     = 0x475,
    .RG_PMUC       = 0x480,
    .RG_PMUVAL     = 0x481,
    .RG_PMUQF      = 0x482,
    .RG_PMUI       = 0x483,
    .RG_PMUQ       = 0x484,
    .RG_CNTC       = 0x490,
    .RG_CNT0       = 0x491,
    .RG_CNT1       = 0x492,
    .RG_CNT2       = 0x493,
    .RG_CNT3       = 0x494,
};

// BBCn_PC – PHY Control
// This register configures the baseband PHY.
void at86rf215_bb_set_phy_control (at86rf215_st *dev, at86rf215_rf_channel_en ch, at86rf215_bb_phy_control_st* pc)
{

}
