99 wiersze
3.2 KiB
C
99 wiersze
3.2 KiB
C
/**
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* CLKCTRL Generated Driver File
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*
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* @file clkctrl.c
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*
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* @ingroup clkctrl
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*
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* @brief This file contains the driver code for CLKCTRL module.
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*
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* version CLKCTRL Driver Version 1.1.3
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*/
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/*
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© [2023] Microchip Technology Inc. and its subsidiaries.
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Subject to your compliance with these terms, you may use Microchip
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software and any derivatives exclusively with Microchip products.
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You are responsible for complying with 3rd party license terms
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applicable to your use of 3rd party software (including open source
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software) that may accompany Microchip software. SOFTWARE IS ?AS IS.?
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NO WARRANTIES, WHETHER EXPRESS, IMPLIED OR STATUTORY, APPLY TO THIS
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SOFTWARE, INCLUDING ANY IMPLIED WARRANTIES OF NON-INFRINGEMENT,
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MERCHANTABILITY, OR FITNESS FOR A PARTICULAR PURPOSE. IN NO EVENT
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WILL MICROCHIP BE LIABLE FOR ANY INDIRECT, SPECIAL, PUNITIVE,
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INCIDENTAL OR CONSEQUENTIAL LOSS, DAMAGE, COST OR EXPENSE OF ANY
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KIND WHATSOEVER RELATED TO THE SOFTWARE, HOWEVER CAUSED, EVEN IF
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MICROCHIP HAS BEEN ADVISED OF THE POSSIBILITY OR THE DAMAGES ARE
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FORESEEABLE. TO THE FULLEST EXTENT ALLOWED BY LAW, MICROCHIP?S
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TOTAL LIABILITY ON ALL CLAIMS RELATED TO THE SOFTWARE WILL NOT
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EXCEED AMOUNT OF FEES, IF ANY, YOU PAID DIRECTLY TO MICROCHIP FOR
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THIS SOFTWARE.
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*/
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#include "../clock.h"
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void CLOCK_Initialize(void)
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{
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// Set the CLKCTRL module to the options selected in the user interface.
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//CLKOUT disabled; CLKSEL Internal high-frequency oscillator;
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ccp_write_io((void*)&(CLKCTRL.MCLKCTRLA),0x0);
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//PDIV Divide by 6; PEN enabled;
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ccp_write_io((void*)&(CLKCTRL.MCLKCTRLB),0x11);
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//
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ccp_write_io((void*)&(CLKCTRL.MCLKSTATUS),0x0);
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//RUNSTDBY disabled;
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ccp_write_io((void*)&(CLKCTRL.OSC32KCTRLA),0x0);
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//AUTOTUNE OFF; RUNSTDBY disabled;
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ccp_write_io((void*)&(CLKCTRL.OSCHFCTRLA),0x0);
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//TUNE 0x0;
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ccp_write_io((void*)&(CLKCTRL.OSCHFTUNE),0x0);
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//CSUT 1k cycles; ENABLE disabled; LPMODE disabled; RUNSTDBY disabled; SEL disabled;
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ccp_write_io((void*)&(CLKCTRL.XOSC32KCTRLA),0x0);
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//CFDEN disabled; CFDSRC CLKMAIN; CFDTST disabled;
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ccp_write_io((void*)&(CLKCTRL.MCLKCTRLC),0x0);
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//CFD disabled; INTTYPE INT;
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ccp_write_io((void*)&(CLKCTRL.MCLKINTCTRL),0x0);
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//CFD disabled;
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ccp_write_io((void*)&(CLKCTRL.MCLKINTFLAGS),0x0);
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//CSUTHF 256CYC; ENABLE disabled; RUNSTDBY disabled; SELHF CRYSTAL;
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ccp_write_io((void*)&(CLKCTRL.XOSCHFCTRLA),0x0);
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//TIMEBASE 4;
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ccp_write_io((void*)&(CLKCTRL.MCLKTIMEBASE),0x4);
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// System clock stability check by polling the status register.
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while(!(CLKCTRL.MCLKSTATUS & CLKCTRL_OSCHFS_bm));
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// System clock stability check by polling the PLL status.
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}
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void CFD_Enable(CLKCTRL_CFDSRC_t cfd_source)
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{
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/* Enable Clock Failure Detection on main clock */
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ccp_write_io((uint8_t *) & CLKCTRL.MCLKCTRLC, cfd_source | CLKCTRL_CFDEN_bm);
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}
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void CFD_Disable()
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{
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/* Disable Clock Failure Detection on main clock */
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ccp_write_io((uint8_t *) & CLKCTRL.MCLKCTRLC, CLKCTRL.MCLKCTRLC & ~CLKCTRL_CFDEN_bm);
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}
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/**
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End of File
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*/ |