kopia lustrzana https://github.com/UU5JPP/Wolf-LITE
169 wiersze
5.7 KiB
C
169 wiersze
5.7 KiB
C
/* USER CODE BEGIN Header */
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/**
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******************************************************************************
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* @file : main.h
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* @brief : Header for main.c file.
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* This file contains the common defines of the application.
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******************************************************************************
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* @attention
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*
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* <h2><center>© Copyright (c) 2020 STMicroelectronics.
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* All rights reserved.</center></h2>
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*
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* This software component is licensed by ST under BSD 3-Clause license,
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* the "License"; You may not use this file except in compliance with the
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* License. You may obtain a copy of the License at:
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* opensource.org/licenses/BSD-3-Clause
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*
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******************************************************************************
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*/
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/* USER CODE END Header */
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/* Define to prevent recursive inclusion -------------------------------------*/
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#ifndef __MAIN_H
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#define __MAIN_H
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#ifdef __cplusplus
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extern "C" {
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#endif
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/* Includes ------------------------------------------------------------------*/
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#include "stm32f4xx_hal.h"
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/* Private includes ----------------------------------------------------------*/
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/* USER CODE BEGIN Includes */
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/* USER CODE END Includes */
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/* Exported types ------------------------------------------------------------*/
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/* USER CODE BEGIN ET */
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extern SRAM_HandleTypeDef hsram1;
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/* USER CODE END ET */
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/* Exported constants --------------------------------------------------------*/
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/* USER CODE BEGIN EC */
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extern ADC_HandleTypeDef hadc1;
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extern ADC_HandleTypeDef hadc2;
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extern I2S_HandleTypeDef hi2s3;
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extern SPI_HandleTypeDef hspi2;
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extern RTC_HandleTypeDef hrtc;
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extern PCD_HandleTypeDef hpcd_USB_OTG_FS;
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extern DMA_HandleTypeDef hdma_memtomem_dma2_stream7;
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extern DMA_HandleTypeDef hdma_memtomem_dma2_stream6;
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extern DMA_HandleTypeDef hdma_memtomem_dma2_stream5;
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extern DMA_HandleTypeDef hdma_memtomem_dma2_stream4;
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extern DMA_HandleTypeDef hdma_memtomem_dma2_stream3;
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extern DMA_HandleTypeDef hdma_memtomem_dma2_stream2;
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extern DMA_HandleTypeDef hdma_memtomem_dma2_stream1;
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extern DMA_HandleTypeDef hdma_memtomem_dma2_stream0;
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/* USER CODE END EC */
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/* Exported macro ------------------------------------------------------------*/
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/* USER CODE BEGIN EM */
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/* USER CODE END EM */
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/* Exported functions prototypes ---------------------------------------------*/
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void Error_Handler(void);
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/* USER CODE BEGIN EFP */
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/* USER CODE END EFP */
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/* Private defines -----------------------------------------------------------*/
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#define ENC_CLK_Pin GPIO_PIN_3
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#define ENC_CLK_GPIO_Port GPIOE
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#define ENC_CLK_EXTI_IRQn EXTI3_IRQn
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#define ENC2_SW_Pin GPIO_PIN_4
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#define ENC2_SW_GPIO_Port GPIOE
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#define ENC_DT_Pin GPIO_PIN_5
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#define ENC_DT_GPIO_Port GPIOE
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#define ENC2_DT_Pin GPIO_PIN_6
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#define ENC2_DT_GPIO_Port GPIOE
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#define ENC2_CLK_Pin GPIO_PIN_13
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#define ENC2_CLK_GPIO_Port GPIOC
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#define SWR_FORW_Pin GPIO_PIN_0
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#define SWR_FORW_GPIO_Port GPIOC
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#define SWR_BACKW_Pin GPIO_PIN_1
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#define SWR_BACKW_GPIO_Port GPIOC
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#define FPGA_CLK_Pin GPIO_PIN_2
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#define FPGA_CLK_GPIO_Port GPIOC
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#define FPGA_SYNC_Pin GPIO_PIN_3
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#define FPGA_SYNC_GPIO_Port GPIOC
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#define FPGA_BUS_D0_Pin GPIO_PIN_0
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#define FPGA_BUS_D0_GPIO_Port GPIOA
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#define FPGA_BUS_D1_Pin GPIO_PIN_1
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#define FPGA_BUS_D1_GPIO_Port GPIOA
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#define FPGA_BUS_D2_Pin GPIO_PIN_2
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#define FPGA_BUS_D2_GPIO_Port GPIOA
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#define FPGA_BUS_D3_Pin GPIO_PIN_3
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#define FPGA_BUS_D3_GPIO_Port GPIOA
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#define FPGA_BUS_D4_Pin GPIO_PIN_4
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#define FPGA_BUS_D4_GPIO_Port GPIOA
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#define FPGA_BUS_D5_Pin GPIO_PIN_5
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#define FPGA_BUS_D5_GPIO_Port GPIOA
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#define FPGA_BUS_D6_Pin GPIO_PIN_6
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#define FPGA_BUS_D6_GPIO_Port GPIOA
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#define FPGA_BUS_D7_Pin GPIO_PIN_7
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#define FPGA_BUS_D7_GPIO_Port GPIOA
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#define Power_IN_Pin GPIO_PIN_4
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#define Power_IN_GPIO_Port GPIOC
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#define ALC_IN_Pin GPIO_PIN_5
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#define ALC_IN_GPIO_Port GPIOC
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#define PTT_SW1_Pin GPIO_PIN_0
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#define PTT_SW1_GPIO_Port GPIOB
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#define PTT_SW2_Pin GPIO_PIN_1
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#define PTT_SW2_GPIO_Port GPIOB
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#define PTT_IN_Pin GPIO_PIN_2
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#define PTT_IN_GPIO_Port GPIOB
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#define PTT_IN_EXTI_IRQn EXTI2_IRQn
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#define AUDIO_48K_CLOCK_Pin GPIO_PIN_10
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#define AUDIO_48K_CLOCK_GPIO_Port GPIOB
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#define AUDIO_48K_CLOCK_EXTI_IRQn EXTI15_10_IRQn
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#define W25Q16_CS_Pin GPIO_PIN_12
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#define W25Q16_CS_GPIO_Port GPIOB
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#define PERI_SCK_Pin GPIO_PIN_13
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#define PERI_SCK_GPIO_Port GPIOB
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#define PERI_MISO_Pin GPIO_PIN_14
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#define PERI_MISO_GPIO_Port GPIOB
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#define PERI_MOSI_Pin GPIO_PIN_15
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#define PERI_MOSI_GPIO_Port GPIOB
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#define MUTE_Pin GPIO_PIN_7
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#define MUTE_GPIO_Port GPIOC
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#define AD1_CS_Pin GPIO_PIN_8
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#define AD1_CS_GPIO_Port GPIOC
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#define WM8731_WS_LRC_Pin GPIO_PIN_15
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#define WM8731_WS_LRC_GPIO_Port GPIOA
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#define WM8731_BCLK_Pin GPIO_PIN_10
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#define WM8731_BCLK_GPIO_Port GPIOC
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#define WM8731_ADC_SD_Pin GPIO_PIN_11
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#define WM8731_ADC_SD_GPIO_Port GPIOC
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#define WM8731_DAC_SD_Pin GPIO_PIN_12
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#define WM8731_DAC_SD_GPIO_Port GPIOC
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#define WM8731_SCK_Pin GPIO_PIN_3
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#define WM8731_SCK_GPIO_Port GPIOD
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#define WM8731_SDA_Pin GPIO_PIN_6
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#define WM8731_SDA_GPIO_Port GPIOD
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#define CPU_PW_HOLD_Pin GPIO_PIN_6
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#define CPU_PW_HOLD_GPIO_Port GPIOB
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#define CPU_PW_Pin GPIO_PIN_7
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#define CPU_PW_GPIO_Port GPIOB
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#define CPU_PW_EXTI_IRQn EXTI9_5_IRQn
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#define KEY_IN_DASH_Pin GPIO_PIN_0
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#define KEY_IN_DASH_GPIO_Port GPIOE
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#define KEY_IN_DASH_EXTI_IRQn EXTI0_IRQn
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#define KEY_IN_DOT_Pin GPIO_PIN_1
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#define KEY_IN_DOT_GPIO_Port GPIOE
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#define KEY_IN_DOT_EXTI_IRQn EXTI1_IRQn
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/* USER CODE BEGIN Private defines */
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/* USER CODE END Private defines */
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#ifdef __cplusplus
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}
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#endif
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#endif /* __MAIN_H */
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/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
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