kopia lustrzana https://github.com/UU5JPP/Wolf-LITE
14 wiersze
374 B
Mathematica
14 wiersze
374 B
Mathematica
/* Quartus Prime Version 18.1.0 Build 625 09/12/2018 SJ Standard Edition */
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JedecChain;
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FileRevision(JESD32A);
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DefaultMfr(6E);
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P ActionCode(Cfg)
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Device PartName(EP4CE10) Path("D:/Dropbox/Develop/Projects/WOLF-Lite/FPGA/output_files/") File("WOLF-LITE.jic") MfrSpec(OpMask(1) SEC_Device(EPCS16) Child_OpMask(1 7));
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ChainEnd;
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AlteraBegin;
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ChainType(JTAG);
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AlteraEnd;
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