kopia lustrzana https://github.com/UU5JPP/Wolf-LITE
324 wiersze
18 KiB
Plaintext
324 wiersze
18 KiB
Plaintext
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set_global_assignment -name RESERVE_DATA0_AFTER_CONFIGURATION "USE AS REGULAR IO"
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# -------------------------------------------------------------------------- #
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#
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# Copyright (C) 2017 Intel Corporation. All rights reserved.
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# Your use of Intel Corporation's design tools, logic functions
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# and other software and tools, and its AMPP partner logic
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# functions, and any output files from any of the foregoing
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# (including device programming or simulation files), and any
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# associated documentation or information are expressly subject
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# to the terms and conditions of the Intel Program License
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# Subscription Agreement, the Intel Quartus Prime License Agreement,
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# the Intel FPGA IP License Agreement, or other applicable license
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# agreement, including, without limitation, that your use is for
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# the sole purpose of programming logic devices manufactured by
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# Intel and sold by Intel or its authorized distributors. Please
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# refer to the applicable agreement for further details.
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#
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# -------------------------------------------------------------------------- #
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#
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# Quartus Prime
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# Version 17.1.0 Build 590 10/25/2017 SJ Lite Edition
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# Date created = 17:58:56 March 31, 2018
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#
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# -------------------------------------------------------------------------- #
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#
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# Notes:
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#
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# 1) The default values for assignments are stored in the file:
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# UA3REO_assignment_defaults.qdf
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# If this file doesn't exist, see file:
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# assignment_defaults.qdf
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#
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# 2) Altera recommends that you do not modify this file. This
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# file is updated automatically by the Quartus Prime software
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# and any changes you make may be lost or overwritten.
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#
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# -------------------------------------------------------------------------- #
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set_global_assignment -name FAMILY "Cyclone IV E"
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set_global_assignment -name DEVICE EP4CE10E22C8
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set_global_assignment -name TOP_LEVEL_ENTITY "WOLF-LITE"
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set_global_assignment -name ORIGINAL_QUARTUS_VERSION 17.1.0
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set_global_assignment -name PROJECT_CREATION_TIME_DATE "17:58:56 MARCH 31, 2018"
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set_global_assignment -name LAST_QUARTUS_VERSION "18.1.0 Standard Edition"
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set_global_assignment -name PROJECT_OUTPUT_DIRECTORY output_files
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set_global_assignment -name MIN_CORE_JUNCTION_TEMP 0
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set_global_assignment -name MAX_CORE_JUNCTION_TEMP 85
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set_global_assignment -name ERROR_CHECK_FREQUENCY_DIVISOR 1
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set_global_assignment -name POWER_PRESET_COOLING_SOLUTION "NO HEAT SINK WITH STILL AIR"
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set_global_assignment -name POWER_BOARD_THERMAL_MODEL "NONE (CONSERVATIVE)"
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set_global_assignment -name NUM_PARALLEL_PROCESSORS ALL
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set_global_assignment -name ENABLE_LOGIC_ANALYZER_INTERFACE OFF
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set_global_assignment -name USE_LOGIC_ANALYZER_INTERFACE_FILE debugger1.lai
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set_global_assignment -name ENABLE_SIGNALTAP OFF
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set_global_assignment -name USE_SIGNALTAP_FILE stp1.stp
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set_global_assignment -name CYCLONEIII_CONFIGURATION_DEVICE EPCS16
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set_global_assignment -name ENABLE_BOOT_SEL_PIN OFF
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set_global_assignment -name ENABLE_CONFIGURATION_PINS OFF
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set_global_assignment -name ENABLE_OCT_DONE OFF
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set_global_assignment -name STRATIXV_CONFIGURATION_SCHEME "PASSIVE SERIAL"
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set_global_assignment -name USE_CONFIGURATION_DEVICE ON
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set_global_assignment -name CRC_ERROR_OPEN_DRAIN OFF
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set_global_assignment -name OUTPUT_IO_TIMING_NEAR_END_VMEAS "HALF VCCIO" -rise
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set_global_assignment -name OUTPUT_IO_TIMING_NEAR_END_VMEAS "HALF VCCIO" -fall
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set_global_assignment -name OUTPUT_IO_TIMING_FAR_END_VMEAS "HALF SIGNAL SWING" -rise
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set_global_assignment -name OUTPUT_IO_TIMING_FAR_END_VMEAS "HALF SIGNAL SWING" -fall
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set_global_assignment -name RESERVE_DATA1_AFTER_CONFIGURATION "USE AS REGULAR IO"
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set_global_assignment -name RESERVE_FLASH_NCE_AFTER_CONFIGURATION "USE AS REGULAR IO"
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set_global_assignment -name RESERVE_DCLK_AFTER_CONFIGURATION "USE AS REGULAR IO"
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set_global_assignment -name CYCLONEII_RESERVE_NCEO_AFTER_CONFIGURATION "USE AS REGULAR IO"
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set_global_assignment -name PROJECT_IP_REGENERATION_POLICY ALWAYS_REGENERATE_IP
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set_global_assignment -name TIMING_ANALYZER_MULTICORNER_ANALYSIS ON
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set_global_assignment -name SMART_RECOMPILE ON
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set_global_assignment -name FLOW_ENABLE_IO_ASSIGNMENT_ANALYSIS ON
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set_global_assignment -name FLOW_ENABLE_RTL_VIEWER OFF
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set_location_assignment PIN_52 -to ADC_INPUT[11]
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set_location_assignment PIN_53 -to ADC_INPUT[10]
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set_location_assignment PIN_54 -to ADC_INPUT[9]
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set_location_assignment PIN_55 -to ADC_INPUT[8]
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set_location_assignment PIN_58 -to ADC_INPUT[7]
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set_location_assignment PIN_59 -to ADC_INPUT[6]
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set_location_assignment PIN_60 -to ADC_INPUT[5]
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set_location_assignment PIN_64 -to ADC_INPUT[4]
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set_location_assignment PIN_65 -to ADC_INPUT[3]
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set_location_assignment PIN_66 -to ADC_INPUT[2]
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set_location_assignment PIN_67 -to ADC_INPUT[1]
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set_location_assignment PIN_68 -to ADC_INPUT[0]
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set_global_assignment -name CONFIGURATION_VCCIO_LEVEL 2.5V
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set_global_assignment -name RESERVE_ALL_UNUSED_PINS_WEAK_PULLUP "AS OUTPUT DRIVING GROUND"
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set_global_assignment -name ENABLE_DRC_SETTINGS OFF
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set_global_assignment -name AUTO_MERGE_PLLS ON
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set_location_assignment PIN_69 -to PREAMP
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set_location_assignment PIN_44 -to ADC_OTR
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set_global_assignment -name SAVE_DISK_SPACE OFF
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set_global_assignment -name OCP_HW_EVAL DISABLE
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set_location_assignment PIN_33 -to STM32_CLK
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set_location_assignment PIN_32 -to STM32_SYNC
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set_location_assignment PIN_101 -to DAC_OUTPUT[0]
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set_location_assignment PIN_103 -to DAC_OUTPUT[1]
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set_location_assignment PIN_104 -to DAC_OUTPUT[2]
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set_location_assignment PIN_105 -to DAC_OUTPUT[3]
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set_location_assignment PIN_106 -to DAC_OUTPUT[4]
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set_location_assignment PIN_110 -to DAC_OUTPUT[5]
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set_location_assignment PIN_111 -to DAC_OUTPUT[6]
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set_location_assignment PIN_112 -to DAC_OUTPUT[7]
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set_location_assignment PIN_113 -to DAC_OUTPUT[8]
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set_location_assignment PIN_114 -to DAC_OUTPUT[9]
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set_location_assignment PIN_115 -to DAC_OUTPUT[10]
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set_location_assignment PIN_119 -to DAC_OUTPUT[11]
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set_location_assignment PIN_120 -to DAC_OUTPUT[12]
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set_location_assignment PIN_121 -to DAC_OUTPUT[13]
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set_global_assignment -name TIMING_ANALYZER_REPORT_SCRIPT_INCLUDE_DEFAULT_ANALYSIS OFF
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set_global_assignment -name OPTIMIZATION_MODE "AGGRESSIVE PERFORMANCE"
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set_global_assignment -name AUTO_RAM_TO_LCELL_CONVERSION ON
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set_location_assignment PIN_136 -to AUDIO_I2S_CLOCK
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set_location_assignment PIN_135 -to AUDIO_48K_CLOCK
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set_global_assignment -name FLOW_ENABLE_POWER_ANALYZER ON
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set_global_assignment -name POWER_DEFAULT_INPUT_IO_TOGGLE_RATE "80 %"
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set_location_assignment PIN_49 -to STM32_DATA_BUS[0]
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set_location_assignment PIN_50 -to STM32_DATA_BUS[1]
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set_location_assignment PIN_51 -to STM32_DATA_BUS[2]
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set_location_assignment PIN_38 -to STM32_DATA_BUS[3]
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set_location_assignment PIN_39 -to STM32_DATA_BUS[4]
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set_location_assignment PIN_42 -to STM32_DATA_BUS[5]
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set_location_assignment PIN_43 -to STM32_DATA_BUS[6]
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set_location_assignment PIN_46 -to STM32_DATA_BUS[7]
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set_location_assignment PIN_8 -to FLASH_S
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set_location_assignment PIN_12 -to FLASH_C
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set_location_assignment PIN_13 -to FLASH_MISO
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set_location_assignment PIN_6 -to FLASH_MOSI
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set_global_assignment -name ALLOW_REGISTER_RETIMING OFF
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set_global_assignment -name POWER_USE_DEVICE_CHARACTERISTICS MAXIMUM
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set_global_assignment -name PHYSICAL_SYNTHESIS_COMBO_LOGIC ON
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set_location_assignment PIN_124 -to DAC_PD
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set_global_assignment -name POST_FLOW_SCRIPT_FILE "quartus_sh:auto_convert.tcl"
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set_global_assignment -name POWER_USE_PVA ON
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set_global_assignment -name POWER_DEFAULT_TOGGLE_RATE 12.5%
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set_global_assignment -name POWER_OUTPUT_SAF_NAME output_files/signal_activity.saf
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set_global_assignment -name POWER_REPORT_SIGNAL_ACTIVITY ON
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set_global_assignment -name POWER_REPORT_POWER_DISSIPATION ON
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set_global_assignment -name SYNTH_GATED_CLOCK_CONVERSION ON
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set_global_assignment -name PRE_MAPPING_RESYNTHESIS ON
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set_global_assignment -name ROUTER_CLOCKING_TOPOLOGY_ANALYSIS ON
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set_global_assignment -name OPTIMIZE_SSN "NORMAL COMPILATION"
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set_global_assignment -name WEAK_PULL_UP_RESISTOR OFF
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set_global_assignment -name PHYSICAL_SYNTHESIS_REGISTER_DUPLICATION ON
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set_global_assignment -name PHYSICAL_SYNTHESIS_MAP_LOGIC_TO_MEMORY_FOR_AREA ON
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set_location_assignment PIN_125 -to DAC_CLK
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set_location_assignment PIN_89 -to clk_sys
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set_location_assignment PIN_87 -to ATT_1
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set_location_assignment PIN_98 -to ATT_2
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set_location_assignment PIN_86 -to ATT_05
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set_location_assignment PIN_99 -to ATT_4
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set_location_assignment PIN_100 -to ATT_8
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set_location_assignment PIN_85 -to ATT_16
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set_location_assignment PIN_80 -to BPF_A
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set_location_assignment PIN_83 -to BPF_B
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set_location_assignment PIN_77 -to BPF_OE1
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set_location_assignment PIN_84 -to BPF_OE2
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set_location_assignment PIN_76 -to LPF_1
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set_location_assignment PIN_75 -to LPF_2
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set_location_assignment PIN_74 -to LPF_3
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set_location_assignment PIN_72 -to TXRX_OUT
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set_global_assignment -name PARTITION_NETLIST_TYPE POST_FIT -section_id Top
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set_global_assignment -name PARTITION_FITTER_PRESERVATION_LEVEL PLACEMENT_AND_ROUTING -section_id Top
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set_global_assignment -name PARTITION_COLOR 16764057 -section_id Top
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set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to ADC_INPUT[11]
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set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to ADC_INPUT[10]
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set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to ADC_INPUT[9]
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set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to ADC_INPUT[8]
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set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to ADC_INPUT[7]
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set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to ADC_INPUT[6]
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set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to ADC_INPUT[5]
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set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to ADC_INPUT[4]
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set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to ADC_INPUT[3]
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set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to ADC_INPUT[1]
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set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to ADC_INPUT[2]
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set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to ADC_INPUT[0]
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set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to PREAMP
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set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to DAC_OUTPUT[3]
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set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to DAC_OUTPUT[2]
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set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to DAC_OUTPUT[1]
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set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to DAC_OUTPUT[0]
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set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to STM32_CLK
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set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to STM32_SYNC
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set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to ADC_OTR
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set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to AUDIO_I2S_CLOCK
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set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to AUDIO_48K_CLOCK
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set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to STM32_DATA_BUS[7]
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set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to STM32_DATA_BUS[6]
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set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to STM32_DATA_BUS[5]
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set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to STM32_DATA_BUS[4]
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set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to STM32_DATA_BUS[3]
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set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to STM32_DATA_BUS[2]
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set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to STM32_DATA_BUS[1]
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set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to STM32_DATA_BUS[0]
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set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to DAC_OUTPUT[4]
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set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to DAC_PD
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set_instance_assignment -name WEAK_PULL_UP_RESISTOR ON -to FLASH_C
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set_instance_assignment -name WEAK_PULL_UP_RESISTOR ON -to FLASH_MISO
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set_instance_assignment -name WEAK_PULL_UP_RESISTOR ON -to FLASH_MOSI
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set_instance_assignment -name WEAK_PULL_UP_RESISTOR ON -to FLASH_S
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set_instance_assignment -name WEAK_PULL_UP_RESISTOR ON -to ADC_INPUT[7]
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set_instance_assignment -name WEAK_PULL_UP_RESISTOR ON -to ADC_INPUT[6]
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set_instance_assignment -name WEAK_PULL_UP_RESISTOR ON -to ADC_INPUT[5]
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set_instance_assignment -name WEAK_PULL_UP_RESISTOR ON -to ADC_INPUT[4]
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set_instance_assignment -name WEAK_PULL_UP_RESISTOR ON -to ADC_INPUT[3]
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set_instance_assignment -name WEAK_PULL_UP_RESISTOR ON -to ADC_INPUT[2]
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set_instance_assignment -name WEAK_PULL_UP_RESISTOR ON -to ADC_INPUT[1]
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set_instance_assignment -name WEAK_PULL_UP_RESISTOR ON -to ADC_INPUT[0]
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set_instance_assignment -name WEAK_PULL_UP_RESISTOR ON -to ADC_OTR
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set_instance_assignment -name WEAK_PULL_UP_RESISTOR ON -to AUDIO_48K_CLOCK
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set_instance_assignment -name WEAK_PULL_UP_RESISTOR ON -to AUDIO_I2S_CLOCK
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set_instance_assignment -name WEAK_PULL_UP_RESISTOR ON -to DAC_OUTPUT[13]
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set_instance_assignment -name WEAK_PULL_UP_RESISTOR ON -to DAC_OUTPUT[12]
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set_instance_assignment -name WEAK_PULL_UP_RESISTOR ON -to DAC_OUTPUT[11]
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set_instance_assignment -name WEAK_PULL_UP_RESISTOR ON -to DAC_OUTPUT[10]
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set_instance_assignment -name WEAK_PULL_UP_RESISTOR ON -to DAC_OUTPUT[9]
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set_instance_assignment -name WEAK_PULL_UP_RESISTOR ON -to DAC_OUTPUT[8]
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set_instance_assignment -name WEAK_PULL_UP_RESISTOR ON -to DAC_OUTPUT[7]
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set_instance_assignment -name WEAK_PULL_UP_RESISTOR ON -to DAC_OUTPUT[6]
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set_instance_assignment -name WEAK_PULL_UP_RESISTOR ON -to DAC_OUTPUT[5]
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set_instance_assignment -name WEAK_PULL_UP_RESISTOR ON -to DAC_OUTPUT[4]
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set_instance_assignment -name WEAK_PULL_UP_RESISTOR ON -to DAC_OUTPUT[3]
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set_instance_assignment -name WEAK_PULL_UP_RESISTOR ON -to DAC_OUTPUT[2]
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||
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set_instance_assignment -name WEAK_PULL_UP_RESISTOR ON -to DAC_OUTPUT[1]
|
||
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set_instance_assignment -name WEAK_PULL_UP_RESISTOR ON -to DAC_OUTPUT[0]
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||
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set_instance_assignment -name WEAK_PULL_UP_RESISTOR ON -to DAC_PD
|
||
|
set_instance_assignment -name WEAK_PULL_UP_RESISTOR ON -to PREAMP
|
||
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set_instance_assignment -name WEAK_PULL_UP_RESISTOR ON -to STM32_CLK
|
||
|
set_instance_assignment -name WEAK_PULL_UP_RESISTOR ON -to STM32_DATA_BUS[7]
|
||
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set_instance_assignment -name WEAK_PULL_UP_RESISTOR ON -to STM32_DATA_BUS[6]
|
||
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set_instance_assignment -name WEAK_PULL_UP_RESISTOR ON -to STM32_DATA_BUS[5]
|
||
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set_instance_assignment -name WEAK_PULL_UP_RESISTOR ON -to STM32_DATA_BUS[4]
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||
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set_instance_assignment -name WEAK_PULL_UP_RESISTOR ON -to STM32_DATA_BUS[3]
|
||
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set_instance_assignment -name WEAK_PULL_UP_RESISTOR ON -to STM32_DATA_BUS[2]
|
||
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set_instance_assignment -name WEAK_PULL_UP_RESISTOR ON -to STM32_DATA_BUS[1]
|
||
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set_instance_assignment -name WEAK_PULL_UP_RESISTOR ON -to STM32_DATA_BUS[0]
|
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set_instance_assignment -name WEAK_PULL_UP_RESISTOR ON -to STM32_SYNC
|
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set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to DAC_OUTPUT[5]
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||
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set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to DAC_OUTPUT[6]
|
||
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set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to DAC_OUTPUT[7]
|
||
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set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to DAC_OUTPUT[8]
|
||
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set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to DAC_OUTPUT[9]
|
||
|
set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to DAC_OUTPUT[10]
|
||
|
set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to DAC_OUTPUT[11]
|
||
|
set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to DAC_OUTPUT[12]
|
||
|
set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to DAC_OUTPUT[13]
|
||
|
set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to DAC_OUTPUT
|
||
|
set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to DAC_CLK
|
||
|
set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to clk_sys
|
||
|
set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to ATT_1
|
||
|
set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to ATT_2
|
||
|
set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to ATT_4
|
||
|
set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to ATT_05
|
||
|
set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to ATT_8
|
||
|
set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to ATT_16
|
||
|
set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to BPF_A
|
||
|
set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to BPF_B
|
||
|
set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to BPF_OE1
|
||
|
set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to BPF_OE2
|
||
|
set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to LPF_2
|
||
|
set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to LPF_3
|
||
|
set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to LPF_1
|
||
|
set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to TXRX_OUT
|
||
|
set_global_assignment -name PHYSICAL_SYNTHESIS_ASYNCHRONOUS_SIGNAL_PIPELINING ON
|
||
|
set_global_assignment -name CYCLONEII_OPTIMIZATION_TECHNIQUE SPEED
|
||
|
set_global_assignment -name PHYSICAL_SYNTHESIS_REGISTER_RETIMING ON
|
||
|
set_global_assignment -name ROUTER_LCELL_INSERTION_AND_LOGIC_DUPLICATION ON
|
||
|
set_global_assignment -name ROUTER_TIMING_OPTIMIZATION_LEVEL MAXIMUM
|
||
|
set_global_assignment -name QII_AUTO_PACKED_REGISTERS NORMAL
|
||
|
set_global_assignment -name FITTER_EFFORT "STANDARD FIT"
|
||
|
set_global_assignment -name ADV_NETLIST_OPT_SYNTH_WYSIWYG_REMAP ON
|
||
|
set_global_assignment -name MUX_RESTRUCTURE OFF
|
||
|
set_global_assignment -name BDF_FILE "WOLF-LITE.bdf"
|
||
|
set_global_assignment -name VERILOG_FILE DAC_corrector.v
|
||
|
set_global_assignment -name VERILOG_FILE spi_interface.v
|
||
|
set_global_assignment -name VERILOG_FILE stm32_interface.v
|
||
|
set_global_assignment -name VERILOG_FILE data_shifter.v
|
||
|
set_global_assignment -name VERILOG_FILE vcxo_controller.v -hdl_version Verilog_2001
|
||
|
set_global_assignment -name SOURCE_FILE Debug_Probes.spf
|
||
|
set_global_assignment -name QIP_FILE mixer.qip
|
||
|
set_global_assignment -name SDC_FILE SDC.sdc
|
||
|
set_global_assignment -name QSYS_FILE clock_buffer.qsys
|
||
|
set_global_assignment -name QSYS_FILE rx_cic.qsys
|
||
|
set_global_assignment -name QSYS_FILE tx_cic.qsys
|
||
|
set_global_assignment -name QSYS_FILE tx_nco.qsys
|
||
|
set_global_assignment -name QSYS_FILE nco.qsys
|
||
|
set_global_assignment -name QSYS_FILE DEBUG.qsys
|
||
|
set_global_assignment -name QSYS_FILE DEBUG2.qsys
|
||
|
set_global_assignment -name SOURCE_FILE rx_ciccomp.cmp
|
||
|
set_global_assignment -name SOURCE_FILE tx_ciccomp.cmp
|
||
|
set_global_assignment -name QIP_FILE mux16.qip
|
||
|
set_global_assignment -name QIP_FILE MAIN_PLL.qip
|
||
|
set_global_assignment -name QIP_FILE mux14.qip
|
||
|
set_global_assignment -name QIP_FILE mux1.qip
|
||
|
set_global_assignment -name QIP_FILE tx_mixer.qip
|
||
|
set_global_assignment -name QIP_FILE tx_summator.qip
|
||
|
set_global_assignment -name QIP_FILE ADC_Latch.qip
|
||
|
set_global_assignment -name QIP_FILE dac_null.qip
|
||
|
set_global_assignment -name QIP_FILE rx_ciccomp.qip
|
||
|
set_global_assignment -name SIP_FILE rx_ciccomp.sip
|
||
|
set_global_assignment -name QIP_FILE tx_ciccomp.qip
|
||
|
set_global_assignment -name SIP_FILE tx_ciccomp.sip
|
||
|
set_global_assignment -name QIP_FILE diffclock_buff.qip
|
||
|
set_global_assignment -name QIP_FILE dcdc_pll.qip
|
||
|
set_global_assignment -name QIP_FILE tx_pll.qip
|
||
|
set_instance_assignment -name PARTITION_HIERARCHY root_partition -to | -section_id Top
|