diff --git a/src/par_runner/CMakeLists.txt b/src/par_runner/CMakeLists.txt index bfe534f..c2fcc7e 100644 --- a/src/par_runner/CMakeLists.txt +++ b/src/par_runner/CMakeLists.txt @@ -1,14 +1,16 @@ set(NAME par_runner) set(MCU_TARGET_FILES_DIR ../mcu_target_common) +add_subdirectory(orginal_fw) + add_executable(${NAME} - ${MCU_TARGET_FILES_DIR}/system_stm32f0xx.c - ${MCU_TARGET_FILES_DIR}/stm32f030xc.s - main.cpp +${MCU_TARGET_FILES_DIR}/stm32f030xc.s +main.cpp ) target_link_libraries(${NAME} f030_drivers + orginal_fw ) target_include_directories(${NAME} PUBLIC @@ -33,7 +35,7 @@ target_link_options(${NAME} PRIVATE -mcpu=cortex-m0 -mthumb -mfpu=auto - -mfloat-abi=soft #lets go fpu + -mfloat-abi=soft -specs=nosys.specs -specs=nano.specs -lc diff --git a/src/par_runner/dp32g030.s b/src/par_runner/dp32g030.s new file mode 100644 index 0000000..0b33d28 --- /dev/null +++ b/src/par_runner/dp32g030.s @@ -0,0 +1,250 @@ + .syntax unified + .cpu cortex-m0 + .fpu softvfp + .thumb + +.global g_pfnVectors +.global Default_Handler + +/* start address for the initialization values of the .data section. +defined in linker script */ +.word _sidata +/* start address for the .data section. defined in linker script */ +.word _sdata +/* end address for the .data section. defined in linker script */ +.word _edata +/* start address for the .bss section. defined in linker script */ +.word _sbss +/* end address for the .bss section. defined in linker script */ +.word _ebss + + .section .text.Reset_Handler + .weak Reset_Handler + .type Reset_Handler, %function +Reset_Handler: + ldr r0, =_estack + mov sp, r0 /* set stack pointer */ + +/* Copy the data segment initializers from flash to SRAM */ + ldr r0, =_sdata + ldr r1, =_edata + ldr r2, =_sidata + movs r3, #0 + b LoopCopyDataInit + +CopyDataInit: + ldr r4, [r2, r3] + str r4, [r0, r3] + adds r3, r3, #4 + +LoopCopyDataInit: + adds r4, r0, r3 + cmp r4, r1 + bcc CopyDataInit + +/* Zero fill the bss segment. */ + ldr r2, =_sbss + ldr r4, =_ebss + movs r3, #0 + b LoopFillZerobss + +FillZerobss: + str r3, [r2] + adds r2, r2, #4 + +LoopFillZerobss: + cmp r2, r4 + bcc FillZerobss + +/* Call the clock system intitialization function.*/ +/* bl SystemInit */ +/* Call static constructors */ + @bl __libc_init_array +/* Call the application's entry point.*/ + bl main + +LoopForever: + b LoopForever + + +.size Reset_Handler, .-Reset_Handler + +/** + * @brief This is the code that gets called when the processor receives an + * unexpected interrupt. This simply enters an infinite loop, preserving + * the system state for examination by a debugger. + * + * @param None + * @retval : None +*/ + .section .text.Default_Handler,"ax",%progbits +Default_Handler: +Infinite_Loop: + b Infinite_Loop + .size Default_Handler, .-Default_Handler +/****************************************************************************** +* +* The minimal vector table for a Cortex M0. Note that the proper constructs +* must be placed on this to ensure that it ends up at physical address +* 0x0000.0000. +* +******************************************************************************/ + .section .isr_vector,"a",%progbits + .type g_pfnVectors, %object + .size g_pfnVectors, .-g_pfnVectors + + +g_pfnVectors: + .word _estack + .word Reset_Handler + .word NMI_Handler + .word HardFault_Handler + .word 0 + .word 0 + .word 0 + .word 0 + .word 0 + .word 0 + .word 0 + .word SVC_Handler + .word 0 + .word 0 + .word PendSV_Handler + .word SysTick_Handler + .word WWDG_IRQHandler /* Window WatchDog */ + .word 0 /* Reserved */ + .word RTC_IRQHandler /* RTC through the EXTI line */ + .word FLASH_IRQHandler /* FLASH */ + .word RCC_IRQHandler /* RCC */ + .word EXTI0_1_IRQHandler /* EXTI Line 0 and 1 */ + .word EXTI2_3_IRQHandler /* EXTI Line 2 and 3 */ + .word EXTI4_15_IRQHandler /* EXTI Line 4 to 15 */ + .word 0 /* Reserved */ + .word DMA1_Channel1_IRQHandler /* DMA1 Channel 1 */ + .word DMA1_Channel2_3_IRQHandler /* DMA1 Channel 2 and Channel 3 */ + .word DMA1_Channel4_5_IRQHandler /* DMA1 Channel 4 and Channel 5 */ + .word ADC1_IRQHandler /* ADC1 */ + .word TIM1_BRK_UP_TRG_COM_IRQHandler /* TIM1 Break, Update, Trigger and Commutation */ + .word TIM1_CC_IRQHandler /* TIM1 Capture Compare */ + .word 0 /* Reserved */ + .word TIM3_IRQHandler /* TIM3 */ + .word TIM6_IRQHandler /* TIM6 */ + .word TIM7_IRQHandler /* TIM7 */ + .word TIM14_IRQHandler /* TIM14 */ + .word TIM15_IRQHandler /* TIM15 */ + .word TIM16_IRQHandler /* TIM16 */ + .word TIM17_IRQHandler /* TIM17 */ + .word I2C1_IRQHandler /* I2C1 */ + .word I2C2_IRQHandler /* I2C2 */ + .word SPI1_IRQHandler /* SPI1 */ + .word SPI2_IRQHandler /* SPI2 */ + .word USART1_IRQHandler /* USART1 */ + .word USART2_IRQHandler /* USART2 */ + .word USART3_6_IRQHandler /* USART3, USART4, USART5, USART6 */ + .word 0 /* Reserved */ + +/******************************************************************************* +* +* Provide weak aliases for each Exception handler to the Default_Handler. +* As they are weak aliases, any function with the same name will override +* this definition. +* +*******************************************************************************/ + + .weak NMI_Handler + .thumb_set NMI_Handler,Default_Handler + + .weak HardFault_Handler + .thumb_set HardFault_Handler,Default_Handler + + .weak SVC_Handler + .thumb_set SVC_Handler,Default_Handler + + .weak PendSV_Handler + .thumb_set PendSV_Handler,Default_Handler + + .weak SysTick_Handler + .thumb_set SysTick_Handler,Default_Handler + + .weak WWDG_IRQHandler + .thumb_set WWDG_IRQHandler,Default_Handler + + .weak RTC_IRQHandler + .thumb_set RTC_IRQHandler,Default_Handler + + .weak FLASH_IRQHandler + .thumb_set FLASH_IRQHandler,Default_Handler + + .weak RCC_IRQHandler + .thumb_set RCC_IRQHandler,Default_Handler + + .weak EXTI0_1_IRQHandler + .thumb_set EXTI0_1_IRQHandler,Default_Handler + + .weak EXTI2_3_IRQHandler + .thumb_set EXTI2_3_IRQHandler,Default_Handler + + .weak EXTI4_15_IRQHandler + .thumb_set EXTI4_15_IRQHandler,Default_Handler + + .weak DMA1_Channel1_IRQHandler + .thumb_set DMA1_Channel1_IRQHandler,Default_Handler + + .weak DMA1_Channel2_3_IRQHandler + .thumb_set DMA1_Channel2_3_IRQHandler,Default_Handler + + .weak DMA1_Channel4_5_IRQHandler + .thumb_set DMA1_Channel4_5_IRQHandler,Default_Handler + + .weak ADC1_IRQHandler + .thumb_set ADC1_IRQHandler,Default_Handler + + .weak TIM1_BRK_UP_TRG_COM_IRQHandler + .thumb_set TIM1_BRK_UP_TRG_COM_IRQHandler,Default_Handler + + .weak TIM1_CC_IRQHandler + .thumb_set TIM1_CC_IRQHandler,Default_Handler + + .weak TIM3_IRQHandler + .thumb_set TIM3_IRQHandler,Default_Handler + + .weak TIM6_IRQHandler + .thumb_set TIM6_IRQHandler,Default_Handler + + .weak TIM7_IRQHandler + .thumb_set TIM7_IRQHandler,Default_Handler + + .weak TIM14_IRQHandler + .thumb_set TIM14_IRQHandler,Default_Handler + + .weak TIM15_IRQHandler + .thumb_set TIM15_IRQHandler,Default_Handler + + .weak TIM16_IRQHandler + .thumb_set TIM16_IRQHandler,Default_Handler + + .weak TIM17_IRQHandler + .thumb_set TIM17_IRQHandler,Default_Handler + + .weak I2C1_IRQHandler + .thumb_set I2C1_IRQHandler,Default_Handler + + .weak I2C2_IRQHandler + .thumb_set I2C2_IRQHandler,Default_Handler + + .weak SPI1_IRQHandler + .thumb_set SPI1_IRQHandler,Default_Handler + + .weak SPI2_IRQHandler + .thumb_set SPI2_IRQHandler,Default_Handler + + .weak USART1_IRQHandler + .thumb_set USART1_IRQHandler,Default_Handler + + .weak USART2_IRQHandler + .thumb_set USART2_IRQHandler,Default_Handler + + .weak USART3_6_IRQHandler + .thumb_set USART3_6_IRQHandler,Default_Handler + +/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ diff --git a/src/par_runner/memory.ld b/src/par_runner/memory.ld index 6ad1269..03efb3e 100644 --- a/src/par_runner/memory.ld +++ b/src/par_runner/memory.ld @@ -17,7 +17,19 @@ SECTIONS KEEP(*(.isr_vectors)) . = ALIGN(4); } >FLASH - + + .org_fw : + { + . = ALIGN(4); + KEEP(*(.org_fw)) + } > FLASH + + .org_vectors : + { + . = ALIGN(4); + *(.org_vectors) + } > FLASH + .text : { *(.text) diff --git a/src/par_runner/orginal_fw/CMakeLists.txt b/src/par_runner/orginal_fw/CMakeLists.txt new file mode 100644 index 0000000..bb40cb9 --- /dev/null +++ b/src/par_runner/orginal_fw/CMakeLists.txt @@ -0,0 +1,40 @@ +set(LIB_NAME orginal_fw) + +set(ORGINAL_FW_BIN output_00000_10000.bin) + +set(ORGINAL_FW_VECTORS_BIN org_vectors.bin) +set(ORGINAL_FW_VECTORS_OBJ org_vectors.o) + +set(ORGINAL_FW_REST_BIN org_rest.bin) +set(ORGINAL_FW_REST_OBJ org_rest.o) + +add_custom_command(OUTPUT ${ORGINAL_FW_VECTORS_BIN} ${ORGINAL_FW_REST_BIN} + COMMAND python ${CMAKE_CURRENT_SOURCE_DIR}/fw_decomposer.py 48 ${CMAKE_CURRENT_SOURCE_DIR}/${ORGINAL_FW_BIN} ${ORGINAL_FW_VECTORS_BIN} ${ORGINAL_FW_REST_BIN} + DEPENDS ${ORGINAL_FW_BIN} + COMMENT "parsing orginal fw ${ORGINAL_FW_BIN}" +) + +add_custom_command(OUTPUT ${ORGINAL_FW_VECTORS_OBJ} ${ORGINAL_FW_REST_OBJ} + COMMAND arm-none-eabi-objcopy -I binary -O elf32-littlearm -B arm --rename-section .data=.org_vectors ${ORGINAL_FW_VECTORS_BIN} ${ORGINAL_FW_VECTORS_OBJ} + COMMAND arm-none-eabi-objcopy -I binary -O elf32-littlearm -B arm --rename-section .data=.org_fw ${ORGINAL_FW_REST_BIN} ${ORGINAL_FW_REST_OBJ} + DEPENDS ${ORGINAL_FW_VECTORS_BIN} ${ORGINAL_FW_REST_BIN} + COMMENT "generating vector table and fw object files" +) + +add_custom_target(generate_obj_files + DEPENDS ${ORGINAL_FW_VECTORS_OBJ} ${ORGINAL_FW_REST_OBJ} +) + +add_library(${LIB_NAME} OBJECT) +set_target_properties(${LIB_NAME} PROPERTIES LINKER_LANGUAGE C) +add_dependencies(${LIB_NAME} generate_obj_files) + +target_sources(${LIB_NAME} PRIVATE + ${ORGINAL_FW_VECTORS_OBJ} + ${ORGINAL_FW_REST_OBJ} +) + +target_link_libraries(${LIB_NAME} + ${CMAKE_CURRENT_BINARY_DIR}/${ORGINAL_FW_VECTORS_OBJ} + ${CMAKE_CURRENT_BINARY_DIR}/${ORGINAL_FW_REST_OBJ} +) \ No newline at end of file diff --git a/src/par_runner/orginal_fw/fw_decomposer.py b/src/par_runner/orginal_fw/fw_decomposer.py new file mode 100644 index 0000000..74b8475 --- /dev/null +++ b/src/par_runner/orginal_fw/fw_decomposer.py @@ -0,0 +1,23 @@ +import sys +class FwDecompozer: + def __init__(self, vector_table_size, file): + self.vector_table_size = vector_table_size * 4 + self.file = open(file, 'rb') + + def save_vector_table(self, filename): + output = open(filename, 'wb') + self.file.seek(0) + output.write(self.file.read(self.vector_table_size)) + output.close() + + def save_stripped_fw(self, filename): + output = open(filename, 'wb') + self.file.seek(self.vector_table_size, 0) + output.write(self.file.read()) + output.close() + +if __name__ == '__main__': + args = sys.argv + fw = FwDecompozer(int(args[1]), args[2]) + fw.save_vector_table(args[3]) + fw.save_stripped_fw(args[4]) \ No newline at end of file diff --git a/src/par_runner/orginal_fw/output_00000_10000.bin b/src/par_runner/orginal_fw/output_00000_10000.bin new file mode 100644 index 0000000..fc446b2 Binary files /dev/null and b/src/par_runner/orginal_fw/output_00000_10000.bin differ diff --git a/src/par_runner/system/system.cpp b/src/par_runner/system/system.cpp new file mode 100644 index 0000000..447a024 --- /dev/null +++ b/src/par_runner/system/system.cpp @@ -0,0 +1,9 @@ +#include "system.hpp" +using namespace System; + +extern "C" void Reset_Handler(); +TVectorTable VectorTable = +{ + &Reset_Handler, + &CommonIrqWrapper<1>, +}; \ No newline at end of file diff --git a/src/par_runner/system/system.hpp b/src/par_runner/system/system.hpp new file mode 100644 index 0000000..3000b29 --- /dev/null +++ b/src/par_runner/system/system.hpp @@ -0,0 +1,20 @@ +namespace System +{ + using VoidFxPointer = void(*)(void); + static constexpr auto CortexM0VectorsCnt = 16+32; + + struct TVectorTable + { + VoidFxPointer Vectors[CortexM0VectorsCnt]; + }; + + template + inline void CommonIrqWrapper() + { + extern TVectorTable OrginalFwVevtorTable; + if (OrginalFwVevtorTable.Vectors[VectorNr]) + { + OrginalFwVevtorTable.Vectors[VectorNr](); + } + } +} \ No newline at end of file