kopia lustrzana https://gitlab.com/markol/Teathimble_Firmware
Added board configuration scheme. Code refactoring and some updates with teacup.
Martin
rodzic
e84439a329
commit
b1c7a0646e
55
Makefile
55
Makefile
|
|
@ -1,5 +1,8 @@
|
|||
# This makefile for now is used to build executable for simavr for debbuging.
|
||||
# Click & forget arduino IDE should deal with mcu flashing.
|
||||
# This simple makefile by default builds executable for simulavr for debbuging.
|
||||
# To disable simulavr info sections, launch make with SIMULFLAGS=
|
||||
# Example command for flashing uno:
|
||||
# make flash MCU=atmega328p SIMULFLAGS= UPLOAD_PORT=/dev/ttyACM0
|
||||
# Click & forget arduino IDE should also deal with mcu flashing.
|
||||
|
||||
# MCU ?= atmega168
|
||||
# MCU ?= atmega328p
|
||||
|
|
@ -16,27 +19,42 @@
|
|||
F_CPU ?= 16000000L
|
||||
# F_CPU ?= 20000000L
|
||||
|
||||
ARDUINO_CORE = /usr/share/arduino/hardware/arduino/avr/cores/MightyCore
|
||||
ARDUINO_VARIANT = /usr/share/arduino/hardware/arduino/avr/variants/mega32
|
||||
UPLOAD_SPEED ?= 115200
|
||||
UPLOAD_PROTOCOL ?= stk500v1
|
||||
UPLOAD_PORT ?= /dev/ttyUSB0
|
||||
|
||||
#avr gcc
|
||||
CC = avr-gcc
|
||||
#avr objeccopy
|
||||
OBJCOPY = avr-objcopy
|
||||
# SET this path in same manner - to fit your destination
|
||||
ARDUINO_PATH = $(HOME)/arduino-1.6.13/hardware/arduino/avr/
|
||||
# COMMENT these two paths if you don't need to use mightycore, otherwise SET properly
|
||||
ARDUINO_CORE_PATH = $(HOME)/.arduino15/packages/MightyCore/hardware/avr/2.0.1/cores/MCUdude_corefiles/
|
||||
ARDUINO_VARIANT_PATH = $(HOME)/.arduino15/packages/MightyCore/hardware/avr/2.0.1/variants/standard/
|
||||
|
||||
CFLAGS = -w -std=gnu++11 -Os -fno-exceptions -ffunction-sections -fdata-sections -fno-threadsafe-statics -DF_CPU=16000000L -I$(ARDUINO_CORE) -I$(ARDUINO_VARIANT)
|
||||
|
||||
CFLAGS += -mmcu=$(MCU)
|
||||
SIMULFLAGS = -Wl,--section-start=.siminfo=0x900000
|
||||
ARDUINO_CORE_PATH ?= $(ARDUINO_PATH)/cores/arduino
|
||||
ARDUINO_VARIANT_PATH ?= $(ARDUINO_PATH)/variants/standard/
|
||||
CORE_LIB_SRC = \
|
||||
$(ARDUINO_CORE_PATH)/main.cpp \
|
||||
$(ARDUINO_CORE_PATH)/wiring.c \
|
||||
$(ARDUINO_CORE_PATH)/hooks.c
|
||||
|
||||
#avr gcc - if you have avr toolchain installed on system just remove name prefix path
|
||||
CC = $(ARDUINO_PATH)../../tools/avr/bin/avr-gcc
|
||||
#avr objectcopy
|
||||
OBJCOPY = $(ARDUINO_PATH)../../tools/avr/bin/avr-objcopy
|
||||
UPLOADER ?= $(ARDUINO_PATH)../../tools/avr/bin/avrdude
|
||||
|
||||
CFLAGS = -w -std=gnu11 -Os -fno-exceptions -ffunction-sections -fdata-sections -fno-threadsafe-statics -DF_CPU=$(F_CPU) -DMCU=$(MCU) -I$(ARDUINO_CORE_PATH) -I$(ARDUINO_VARIANT_PATH)
|
||||
|
||||
SIMULFLAGS = -Wl,--section-start=.siminfo=0x900000 -DSIMINFO=true
|
||||
CFLAGS += -mmcu=$(MCU) $(SIMULFLAGS)
|
||||
|
||||
#debug?
|
||||
CFLAGS += -g
|
||||
|
||||
#CFLAGS += -g
|
||||
OBJFLAG = -O ihex
|
||||
|
||||
|
||||
EXECUTABLE = teathimble
|
||||
SOURCES = ${wildcard *.cpp $(ARDUINO_CORE)/main.cpp $(ARDUINO_CORE)/wiring.c $(ARDUINO_CORE)/hooks.c}
|
||||
SOURCES = ${wildcard *.c $(CORE_LIB_SRC)}
|
||||
HEADERS = ${wildcard *.h}
|
||||
OBJECTS = ${SOURCES:.c=.o}
|
||||
|
||||
|
|
@ -44,14 +62,14 @@ OBJECTS = ${SOURCES:.c=.o}
|
|||
all: ${EXECUTABLE}
|
||||
|
||||
$(EXECUTABLE): $(OBJECTS) buildnumber.num
|
||||
$(CC) $(CFLAGS) $(SIMULFLAGS) -o $(EXECUTABLE).elf $(OBJECTS) -lm
|
||||
$(CC) $(CFLAGS) -o $(EXECUTABLE).elf $(OBJECTS) -lm
|
||||
$(OBJCOPY) $(OBJFLAG) -j .eeprom --set-section-flags=.eeprom=alloc,load --no-change-warnings --change-section-lma .eeprom=0 $(EXECUTABLE).elf $(EXECUTABLE).eep
|
||||
|
||||
$(OBJCOPY) $(OBJFLAG) -R .eeprom $(EXECUTABLE).elf $(EXECUTABLE).hex
|
||||
@echo "-- Build: " $$(cat buildnumber.num)
|
||||
|
||||
depend: $(SOURCES)
|
||||
@echo "calling depend"
|
||||
@echo "calling depend"
|
||||
$(CC) $(CFLAGS) -Os -c -MM $^ > $@
|
||||
|
||||
-include depend
|
||||
|
|
@ -69,4 +87,7 @@ clean:
|
|||
# Clean up dependency file
|
||||
.PHONY: clean-depend
|
||||
clean-depend: clean
|
||||
$(RM) depend
|
||||
$(RM) depend
|
||||
|
||||
flash: ${EXECUTABLE}
|
||||
$(UPLOADER) -C $(ARDUINO_PATH)../../tools/avr/etc/avrdude.conf -v -p$(MCU) -carduino -P$(UPLOAD_PORT) -b$(UPLOAD_SPEED) -D -Uflash:w:$(EXECUTABLE).hex:i
|
||||
|
|
|
|||
46
README.md
46
README.md
|
|
@ -1,5 +1,5 @@
|
|||
# Teathimble
|
||||
Teathimble is a minimalistics firmware to control varity of stepper motor based machines. It runs on most AVR (so arduino as well) microcontrollers and fits into ATmega16 MCU, providing great base for many projects. Teathimble is a trimmed fork of [Teacup](https://github.com/Traumflug/Teacup_Firmware) - lean and efficient firmware for RepRap printers.
|
||||
Teathimble is a minimalistic firmware intended to control variety of stepper motor based machines. It runs on most AVR (so arduino as well) microcontrollers and fits into ATmega16 MCU, providing great base for many projects. Teathimble is a trimmed fork of [Teacup](https://github.com/Traumflug/Teacup_Firmware) - lean and efficient firmware for RepRap printers by Triffid Hunter, Traumflug, jakepoz, many others.
|
||||
|
||||
## Features
|
||||
- Minimalistic code.
|
||||
|
|
@ -10,24 +10,30 @@ Teathimble is a minimalistics firmware to control varity of stepper motor based
|
|||
- Decent performance: can run up to 48'000 evenly spaced steps/second on 20 MHz as mentioned by core developers.
|
||||
|
||||
## Work progress
|
||||
Current code is checked on custom made arduino-like board top on ATmega32 to control automated [coil winding machine](https://gitlab.com/markol/Coil_winder). It is just a matter of formality to port configurations on other avaiable boards.
|
||||
To run inside [simulator](https://reprap.org/wiki/SimulAVR) build project with enclosed makefile, you might also need [this arduino core](https://github.com/MCUdude/MightyCore) to turn custom board into arduino compatible.
|
||||
This branch contains modification dedicated to simple [coil winding machine](https://gitlab.com/markol/Coil_winder). Current code is checked on custom made arduino-like board top on ATmega32 to control winder. It is just a matter of formality to port configurations on other avaiable boards. You might also need [this arduino core](https://github.com/MCUdude/MightyCore) to turn custom board into arduino compatible.
|
||||
To run inside simple [simulator](https://reprap.org/wiki/SimulAVR) build project with enclosed makefile, this might be come in handy for development.
|
||||
|
||||
## Building
|
||||
Most of the configuration is described and is in *config.h* file.
|
||||
To disable simulavr info sections, launch make with variable set `SIMULFLAGS= `
|
||||
Example command for flashing Arduino UNO: `make flash MCU=atmega328p SIMULFLAGS= UPLOAD_PORT=/dev/ttyACM0`, assuming that configuration is complete. Makefile contains paths configuration to arduino core or mighty core, they need to be set up correctly. Project does not use arduino libraries at all, it is just compatible with Arduio IDE which should be capable of whole compilation and memory programming task, just open the *.ino* file.
|
||||
|
||||
## Source files description
|
||||
Code is written in pure C, but source files are *.cpp* too keep it simple for arduino IDE.
|
||||
| Name | Description |
|
||||
|----------|:-------------:|
|
||||
| config.h | Configuration definitions. |
|
||||
|debug.cpp | Debugging aids. |
|
||||
|gcode_parser.cpp| G-code interpreter, instructions and their actions definitions. |
|
||||
|kinematics.cpp| Spearated code for different movement schemes. |
|
||||
|maths.cpp| Calculation stuff, functions, constants, tables. |
|
||||
|motion_planner.cpp| Ramping acceleration and lookahead related stuff. |
|
||||
|motor.cpp| A rather complex block of math that figures out when to step each axis according to speed and acceleration profiles and received moves. |
|
||||
|msg.cpp| For numbers parsing. |
|
||||
|pinio.cpp| Initialise all I/O. |
|
||||
|queue.cpp| The queue of moves received from the host. |
|
||||
|serial.cpp| Serial buffers and communication management. |
|
||||
|teathimble.ino.cpp| Code starts here. |
|
||||
|teathimble.ino| Same as above, allows firmware to be built in Arduino IDE. |
|
||||
|timer-avr.cpp| Timer management, used primarily by motor.c for timing steps. |
|
||||
Code is written in pure C.
|
||||
|
||||
| Name | Description |
|
||||
|----------------|:--------------------------------------------------------------------------------------------------------------------------------------:|
|
||||
| config.h | Configuration constants definitions. |
|
||||
|debug.c | Debugging aids. |
|
||||
|gcode_parser.c | G-code interpreter, instructions and their actions definitions. |
|
||||
|kinematics.c | Separated code for different movement schemes. |
|
||||
|maths.c | Calculation stuff, functions, constants, tables. |
|
||||
|motion_planner.c| Ramping acceleration and lookahead related stuff. |
|
||||
|motor.c | A rather complex block of math that figures out when to step each axis according to speed and acceleration profiles and received moves.|
|
||||
|msg.c | For numbers parsing. |
|
||||
|pinio.c | Initialize all I/O. |
|
||||
|queue.c | The queue of moves received from the host. |
|
||||
|serial.c | Serial buffers and communication management. |
|
||||
|teathimble.ino.c| Code starts here. |
|
||||
|teathimble.ino | Same as above, allows firmware to be built in Arduino IDE. |
|
||||
|timer-avr.c | Timer management, used primarily by motor.c for timing steps. |
|
||||
|
|
@ -0,0 +1,41 @@
|
|||
#if defined __AVR__
|
||||
|
||||
#if defined (__AVR_ATmega168__) || defined (__AVR_ATmega328__) || \
|
||||
defined (__AVR_ATmega328P__)
|
||||
#include "arduino_168_328p.h"
|
||||
#endif
|
||||
|
||||
#if defined (__AVR_ATmega644__) || defined (__AVR_ATmega644P__) || \
|
||||
defined (__AVR_ATmega644PA__) || defined (__AVR_ATmega1284__) || \
|
||||
defined (__AVR_ATmega1284P__)
|
||||
#include "arduino_644.h"
|
||||
#endif
|
||||
|
||||
#if defined (__AVR_ATmega1280__) || defined (__AVR_ATmega2560__)
|
||||
#include "arduino_1280.h"
|
||||
#endif
|
||||
|
||||
#if defined (__AVR_AT90USB1286__)
|
||||
#include "arduino_usb1286.h"
|
||||
#endif
|
||||
|
||||
#if defined (__AVR_AT90USB1287__)
|
||||
#include "arduino_usb1287.h"
|
||||
#endif
|
||||
|
||||
#if defined (__AVR_ATmega32U4__) || defined (__AVR_ATmega32__) || \
|
||||
defined (__AVR_ATmega16__)
|
||||
#include "arduino_32U4.h"
|
||||
#endif
|
||||
|
||||
#elif defined __ARMEL__
|
||||
|
||||
#if defined (__ARM_LPC1114__)
|
||||
#include "arduino_lpc1114.h"
|
||||
#endif
|
||||
|
||||
#if defined (__ARM_STM32F411__)
|
||||
#include "arduino_stm32f411.h"
|
||||
#endif
|
||||
|
||||
#endif
|
||||
Plik diff jest za duży
Load Diff
|
|
@ -0,0 +1,501 @@
|
|||
#define NO_PWM_PIN (uint8_t *)0
|
||||
#define NO_TCCR_PIN *(uint8_t *)0
|
||||
|
||||
// UART
|
||||
#define RXD DIO0
|
||||
#define TXD DIO1
|
||||
|
||||
// SPI
|
||||
#define SCK DIO13
|
||||
#define MISO DIO12
|
||||
#define MOSI DIO11
|
||||
#define SS DIO10
|
||||
|
||||
// TWI (I2C)
|
||||
#define SCL AIO5
|
||||
#define SDA AIO4
|
||||
|
||||
// timers and PWM
|
||||
#define OC0A DIO6
|
||||
#define OC0B DIO5
|
||||
#define OC1A DIO9
|
||||
#define OC1B DIO10
|
||||
#define OC2A DIO11
|
||||
#define OC2B DIO3
|
||||
|
||||
|
||||
// digital pins
|
||||
#define DIO0_PIN PIND0
|
||||
#define DIO0_RPORT PIND
|
||||
#define DIO0_WPORT PORTD
|
||||
#define DIO0_DDR DDRD
|
||||
#define DIO0_PWM NO_PWM_PIN
|
||||
#define DIO0_TCCR NO_TCCR_PIN
|
||||
#define DIO0_COM 0
|
||||
|
||||
#define DIO1_PIN PIND1
|
||||
#define DIO1_RPORT PIND
|
||||
#define DIO1_WPORT PORTD
|
||||
#define DIO1_DDR DDRD
|
||||
#define DIO1_PWM NO_PWM_PIN
|
||||
#define DIO1_TCCR NO_TCCR_PIN
|
||||
#define DIO1_COM 0
|
||||
|
||||
#define DIO2_PIN PIND2
|
||||
#define DIO2_RPORT PIND
|
||||
#define DIO2_WPORT PORTD
|
||||
#define DIO2_DDR DDRD
|
||||
#define DIO2_PWM NO_PWM_PIN
|
||||
#define DIO2_TCCR NO_TCCR_PIN
|
||||
#define DIO2_COM 0
|
||||
|
||||
#define DIO3_PIN PIND3
|
||||
#define DIO3_RPORT PIND
|
||||
#define DIO3_WPORT PORTD
|
||||
#define DIO3_DDR DDRD
|
||||
#define DIO3_PWM &OCR2B
|
||||
#define DIO3_TCCR TCCR2A
|
||||
#define DIO3_COM COM2B1
|
||||
|
||||
#define DIO4_PIN PIND4
|
||||
#define DIO4_RPORT PIND
|
||||
#define DIO4_WPORT PORTD
|
||||
#define DIO4_DDR DDRD
|
||||
#define DIO4_PWM NO_PWM_PIN
|
||||
#define DIO4_TCCR NO_TCCR_PIN
|
||||
#define DIO4_COM 0
|
||||
|
||||
#define DIO5_PIN PIND5
|
||||
#define DIO5_RPORT PIND
|
||||
#define DIO5_WPORT PORTD
|
||||
#define DIO5_DDR DDRD
|
||||
#define DIO5_PWM &OCR0B
|
||||
#define DIO5_TCCR TCCR0A
|
||||
#define DIO5_COM COM0B1
|
||||
|
||||
#define DIO6_PIN PIND6
|
||||
#define DIO6_RPORT PIND
|
||||
#define DIO6_WPORT PORTD
|
||||
#define DIO6_DDR DDRD
|
||||
#define DIO6_PWM &OCR0A
|
||||
#define DIO6_TCCR TCCR0A
|
||||
#define DIO6_COM COM0A1
|
||||
|
||||
#define DIO7_PIN PIND7
|
||||
#define DIO7_RPORT PIND
|
||||
#define DIO7_WPORT PORTD
|
||||
#define DIO7_DDR DDRD
|
||||
#define DIO7_PWM NO_PWM_PIN
|
||||
#define DIO7_TCCR NO_TCCR_PIN
|
||||
#define DIO7_COM 0
|
||||
|
||||
#define DIO8_PIN PINB0
|
||||
#define DIO8_RPORT PINB
|
||||
#define DIO8_WPORT PORTB
|
||||
#define DIO8_DDR DDRB
|
||||
#define DIO8_PWM NO_PWM_PIN
|
||||
#define DIO8_TCCR NO_TCCR_PIN
|
||||
#define DIO8_COM 0
|
||||
|
||||
#define DIO9_PIN PINB1
|
||||
#define DIO9_RPORT PINB
|
||||
#define DIO9_WPORT PORTB
|
||||
#define DIO9_DDR DDRB
|
||||
#define DIO9_PWM NO_PWM_PIN
|
||||
#define DIO9_TCCR NO_TCCR_PIN
|
||||
#define DIO9_COM 0
|
||||
|
||||
#define DIO10_PIN PINB2
|
||||
#define DIO10_RPORT PINB
|
||||
#define DIO10_WPORT PORTB
|
||||
#define DIO10_DDR DDRB
|
||||
#define DIO10_PWM NO_PWM_PIN
|
||||
#define DIO10_TCCR NO_TCCR_PIN
|
||||
#define DIO10_COM 0
|
||||
|
||||
#define DIO11_PIN PINB3
|
||||
#define DIO11_RPORT PINB
|
||||
#define DIO11_WPORT PORTB
|
||||
#define DIO11_DDR DDRB
|
||||
#define DIO11_PWM &OCR2A
|
||||
#define DIO11_TCCR TCCR2A
|
||||
#define DIO11_COM COM2A1
|
||||
|
||||
#define DIO12_PIN PINB4
|
||||
#define DIO12_RPORT PINB
|
||||
#define DIO12_WPORT PORTB
|
||||
#define DIO12_DDR DDRB
|
||||
#define DIO12_PWM NO_PWM_PIN
|
||||
#define DIO12_TCCR NO_TCCR_PIN
|
||||
#define DIO12_COM 0
|
||||
|
||||
#define DIO13_PIN PINB5
|
||||
#define DIO13_RPORT PINB
|
||||
#define DIO13_WPORT PORTB
|
||||
#define DIO13_DDR DDRB
|
||||
#define DIO13_PWM NO_PWM_PIN
|
||||
#define DIO13_TCCR NO_TCCR_PIN
|
||||
#define DIO13_COM 0
|
||||
|
||||
/**
|
||||
DIO14 ... DIO21 are added for compatibility with other
|
||||
firmwares and duplicate names for AIO0 ... AIO7,
|
||||
so DIO14 == AIO0, DIO15 == AIO1, DIO16 == AIO2, ...
|
||||
*/
|
||||
#define DIO14_PIN PINC0
|
||||
#define DIO14_RPORT PINC
|
||||
#define DIO14_WPORT PORTC
|
||||
#define DIO14_DDR DDRC
|
||||
#define DIO14_PWM NO_PWM_PIN
|
||||
#define DIO14_TCCR NO_TCCR_PIN
|
||||
#define DIO14_COM 0
|
||||
|
||||
#define DIO15_PIN PINC1
|
||||
#define DIO15_RPORT PINC
|
||||
#define DIO15_WPORT PORTC
|
||||
#define DIO15_DDR DDRC
|
||||
#define DIO15_PWM NO_PWM_PIN
|
||||
#define DIO15_TCCR NO_TCCR_PIN
|
||||
#define DIO15_COM 0
|
||||
|
||||
#define DIO16_PIN PINC2
|
||||
#define DIO16_RPORT PINC
|
||||
#define DIO16_WPORT PORTC
|
||||
#define DIO16_DDR DDRC
|
||||
#define DIO16_PWM NO_PWM_PIN
|
||||
#define DIO16_TCCR NO_TCCR_PIN
|
||||
#define DIO16_COM 0
|
||||
|
||||
#define DIO17_PIN PINC3
|
||||
#define DIO17_RPORT PINC
|
||||
#define DIO17_WPORT PORTC
|
||||
#define DIO17_DDR DDRC
|
||||
#define DIO17_PWM NO_PWM_PIN
|
||||
#define DIO17_TCCR NO_TCCR_PIN
|
||||
#define DIO17_COM 0
|
||||
|
||||
#define DIO18_PIN PINC4
|
||||
#define DIO18_RPORT PINC
|
||||
#define DIO18_WPORT PORTC
|
||||
#define DIO18_DDR DDRC
|
||||
#define DIO18_PWM NO_PWM_PIN
|
||||
#define DIO18_TCCR NO_TCCR_PIN
|
||||
#define DIO18_COM 0
|
||||
|
||||
#define DIO19_PIN PINC5
|
||||
#define DIO19_RPORT PINC
|
||||
#define DIO19_WPORT PORTC
|
||||
#define DIO19_DDR DDRC
|
||||
#define DIO19_PWM NO_PWM_PIN
|
||||
#define DIO19_TCCR NO_TCCR_PIN
|
||||
#define DIO19_COM 0
|
||||
|
||||
#define DIO20_PIN PINC6
|
||||
#define DIO20_RPORT PINC
|
||||
#define DIO20_WPORT PORTC
|
||||
#define DIO20_DDR DDRC
|
||||
#define DIO20_PWM NO_PWM_PIN
|
||||
#define DIO20_TCCR NO_TCCR_PIN
|
||||
#define DIO20_COM 0
|
||||
|
||||
#define DIO21_PIN PINC7
|
||||
#define DIO21_RPORT PINC
|
||||
#define DIO21_WPORT PORTC
|
||||
#define DIO21_DDR DDRC
|
||||
#define DIO21_PWM NO_PWM_PIN
|
||||
#define DIO21_TCCR NO_TCCR_PIN
|
||||
#define DIO21_COM 0
|
||||
|
||||
|
||||
// analog pins
|
||||
#define AIO0_PIN PINC0
|
||||
#define AIO0_RPORT PINC
|
||||
#define AIO0_WPORT PORTC
|
||||
#define AIO0_DDR DDRC
|
||||
#define AIO0_PWM NO_PWM_PIN
|
||||
#define AIO0_TCCR NO_TCCR_PIN
|
||||
#define AIO0_COM 0
|
||||
#define AIO0_ADC 0
|
||||
|
||||
#define AIO1_PIN PINC1
|
||||
#define AIO1_RPORT PINC
|
||||
#define AIO1_WPORT PORTC
|
||||
#define AIO1_DDR DDRC
|
||||
#define AIO1_PWM NO_PWM_PIN
|
||||
#define AIO1_TCCR NO_TCCR_PIN
|
||||
#define AIO1_COM 0
|
||||
#define AIO1_ADC 1
|
||||
|
||||
#define AIO2_PIN PINC2
|
||||
#define AIO2_RPORT PINC
|
||||
#define AIO2_WPORT PORTC
|
||||
#define AIO2_DDR DDRC
|
||||
#define AIO2_PWM NO_PWM_PIN
|
||||
#define AIO2_TCCR NO_TCCR_PIN
|
||||
#define AIO2_COM 0
|
||||
#define AIO2_ADC 2
|
||||
|
||||
#define AIO3_PIN PINC3
|
||||
#define AIO3_RPORT PINC
|
||||
#define AIO3_WPORT PORTC
|
||||
#define AIO3_DDR DDRC
|
||||
#define AIO3_PWM NO_PWM_PIN
|
||||
#define AIO3_TCCR NO_TCCR_PIN
|
||||
#define AIO3_COM 0
|
||||
#define AIO3_ADC 3
|
||||
|
||||
#define AIO4_PIN PINC4
|
||||
#define AIO4_RPORT PINC
|
||||
#define AIO4_WPORT PORTC
|
||||
#define AIO4_DDR DDRC
|
||||
#define AIO4_PWM NO_PWM_PIN
|
||||
#define AIO4_TCCR NO_TCCR_PIN
|
||||
#define AIO4_COM 0
|
||||
#define AIO4_ADC 4
|
||||
|
||||
#define AIO5_PIN PINC5
|
||||
#define AIO5_RPORT PINC
|
||||
#define AIO5_WPORT PORTC
|
||||
#define AIO5_DDR DDRC
|
||||
#define AIO5_PWM NO_PWM_PIN
|
||||
#define AIO5_TCCR NO_TCCR_PIN
|
||||
#define AIO5_COM 0
|
||||
#define AIO5_ADC 5
|
||||
|
||||
#define AIO6_PIN PINC6
|
||||
#define AIO6_RPORT PINC
|
||||
#define AIO6_WPORT PORTC
|
||||
#define AIO6_DDR DDRC
|
||||
#define AIO6_PWM NO_PWM_PIN
|
||||
#define AIO6_TCCR NO_TCCR_PIN
|
||||
#define AIO6_COM 0
|
||||
#define AIO6_ADC 6
|
||||
|
||||
#define AIO7_PIN PINC7
|
||||
#define AIO7_RPORT PINC
|
||||
#define AIO7_WPORT PORTC
|
||||
#define AIO7_DDR DDRC
|
||||
#define AIO7_PWM NO_PWM_PIN
|
||||
#define AIO7_TCCR NO_TCCR_PIN
|
||||
#define AIO7_COM 0
|
||||
#define AIO7_ADC 7
|
||||
|
||||
|
||||
|
||||
#undef PB0
|
||||
#define PB0_PIN PINB0
|
||||
#define PB0_RPORT PINB
|
||||
#define PB0_WPORT PORTB
|
||||
#define PB0_DDR DDRB
|
||||
#define PB0_PWM NO_PWM_PIN
|
||||
#define PB0_TCCR NO_TCCR_PIN
|
||||
#define PB0_COM 0
|
||||
|
||||
#undef PB1
|
||||
#define PB1_PIN PINB1
|
||||
#define PB1_RPORT PINB
|
||||
#define PB1_WPORT PORTB
|
||||
#define PB1_DDR DDRB
|
||||
#define PB1_PWM NO_PWM_PIN
|
||||
#define PB1_TCCR NO_TCCR_PIN
|
||||
#define PB1_COM 0
|
||||
|
||||
#undef PB2
|
||||
#define PB2_PIN PINB2
|
||||
#define PB2_RPORT PINB
|
||||
#define PB2_WPORT PORTB
|
||||
#define PB2_DDR DDRB
|
||||
#define PB2_PWM NO_PWM_PIN
|
||||
#define PB2_TCCR NO_TCCR_PIN
|
||||
#define PB2_COM 0
|
||||
|
||||
#undef PB3
|
||||
#define PB3_PIN PINB3
|
||||
#define PB3_RPORT PINB
|
||||
#define PB3_WPORT PORTB
|
||||
#define PB3_DDR DDRB
|
||||
#define PB3_PWM &OCR2A
|
||||
#define PB3_TCCR TCCR2A
|
||||
#define PB3_COM COM2A1
|
||||
|
||||
#undef PB4
|
||||
#define PB4_PIN PINB4
|
||||
#define PB4_RPORT PINB
|
||||
#define PB4_WPORT PORTB
|
||||
#define PB4_DDR DDRB
|
||||
#define PB4_PWM NO_PWM_PIN
|
||||
#define PB4_TCCR NO_TCCR_PIN
|
||||
#define PB4_COM 0
|
||||
|
||||
#undef PB5
|
||||
#define PB5_PIN PINB5
|
||||
#define PB5_RPORT PINB
|
||||
#define PB5_WPORT PORTB
|
||||
#define PB5_DDR DDRB
|
||||
#define PB5_PWM NO_PWM_PIN
|
||||
#define PB5_TCCR NO_TCCR_PIN
|
||||
#define PB5_COM 0
|
||||
|
||||
#undef PB6
|
||||
#define PB6_PIN PINB6
|
||||
#define PB6_RPORT PINB
|
||||
#define PB6_WPORT PORTB
|
||||
#define PB6_DDR DDRB
|
||||
#define PB6_PWM NO_PWM_PIN
|
||||
#define PB6_TCCR NO_TCCR_PIN
|
||||
#define PB6_COM 0
|
||||
|
||||
#undef PB7
|
||||
#define PB7_PIN PINB7
|
||||
#define PB7_RPORT PINB
|
||||
#define PB7_WPORT PORTB
|
||||
#define PB7_DDR DDRB
|
||||
#define PB7_PWM NO_PWM_PIN
|
||||
#define PB7_TCCR NO_TCCR_PIN
|
||||
#define PB7_COM 0
|
||||
|
||||
|
||||
#undef PC0
|
||||
#define PC0_PIN PINC0
|
||||
#define PC0_RPORT PINC
|
||||
#define PC0_WPORT PORTC
|
||||
#define PC0_DDR DDRC
|
||||
#define PC0_PWM NO_PWM_PIN
|
||||
#define PC0_TCCR NO_TCCR_PIN
|
||||
#define PC0_COM 0
|
||||
|
||||
#undef PC1
|
||||
#define PC1_PIN PINC1
|
||||
#define PC1_RPORT PINC
|
||||
#define PC1_WPORT PORTC
|
||||
#define PC1_DDR DDRC
|
||||
#define PC1_PWM NO_PWM_PIN
|
||||
#define PC1_TCCR NO_TCCR_PIN
|
||||
#define PC1_COM 0
|
||||
|
||||
#undef PC2
|
||||
#define PC2_PIN PINC2
|
||||
#define PC2_RPORT PINC
|
||||
#define PC2_WPORT PORTC
|
||||
#define PC2_DDR DDRC
|
||||
#define PC2_PWM NO_PWM_PIN
|
||||
#define PC2_TCCR NO_TCCR_PIN
|
||||
#define PC2_COM 0
|
||||
|
||||
#undef PC3
|
||||
#define PC3_PIN PINC3
|
||||
#define PC3_RPORT PINC
|
||||
#define PC3_WPORT PORTC
|
||||
#define PC3_DDR DDRC
|
||||
#define PC3_PWM NO_PWM_PIN
|
||||
#define PC3_TCCR NO_TCCR_PIN
|
||||
#define PC3_COM 0
|
||||
|
||||
#undef PC4
|
||||
#define PC4_PIN PINC4
|
||||
#define PC4_RPORT PINC
|
||||
#define PC4_WPORT PORTC
|
||||
#define PC4_DDR DDRC
|
||||
#define PC4_PWM NO_PWM_PIN
|
||||
#define PC4_TCCR NO_TCCR_PIN
|
||||
#define PC4_COM 0
|
||||
|
||||
#undef PC5
|
||||
#define PC5_PIN PINC5
|
||||
#define PC5_RPORT PINC
|
||||
#define PC5_WPORT PORTC
|
||||
#define PC5_DDR DDRC
|
||||
#define PC5_PWM NO_PWM_PIN
|
||||
#define PC5_TCCR NO_TCCR_PIN
|
||||
#define PC5_COM 0
|
||||
|
||||
#undef PC6
|
||||
#define PC6_PIN PINC6
|
||||
#define PC6_RPORT PINC
|
||||
#define PC6_WPORT PORTC
|
||||
#define PC6_DDR DDRC
|
||||
#define PC6_PWM NO_PWM_PIN
|
||||
#define PC6_TCCR NO_TCCR_PIN
|
||||
#define PC6_COM 0
|
||||
|
||||
#undef PC7
|
||||
#define PC7_PIN PINC7
|
||||
#define PC7_RPORT PINC
|
||||
#define PC7_WPORT PORTC
|
||||
#define PC7_DDR DDRC
|
||||
#define PC7_PWM NO_PWM_PIN
|
||||
#define PC7_TCCR NO_TCCR_PIN
|
||||
#define PC7_COM 0
|
||||
|
||||
|
||||
#undef PD0
|
||||
#define PD0_PIN PIND0
|
||||
#define PD0_RPORT PIND
|
||||
#define PD0_WPORT PORTD
|
||||
#define PD0_DDR DDRD
|
||||
#define PD0_PWM NO_PWM_PIN
|
||||
#define PD0_TCCR NO_TCCR_PIN
|
||||
#define PD0_COM 0
|
||||
|
||||
#undef PD1
|
||||
#define PD1_PIN PIND1
|
||||
#define PD1_RPORT PIND
|
||||
#define PD1_WPORT PORTD
|
||||
#define PD1_DDR DDRD
|
||||
#define PD1_PWM NO_PWM_PIN
|
||||
#define PD1_TCCR NO_TCCR_PIN
|
||||
#define PD1_COM 0
|
||||
|
||||
#undef PD2
|
||||
#define PD2_PIN PIND2
|
||||
#define PD2_RPORT PIND
|
||||
#define PD2_WPORT PORTD
|
||||
#define PD2_DDR DDRD
|
||||
#define PD2_PWM NO_PWM_PIN
|
||||
#define PD2_TCCR NO_TCCR_PIN
|
||||
#define PD2_COM 0
|
||||
|
||||
#undef PD3
|
||||
#define PD3_PIN PIND3
|
||||
#define PD3_RPORT PIND
|
||||
#define PD3_WPORT PORTD
|
||||
#define PD3_DDR DDRD
|
||||
#define PD3_PWM &OCR2B
|
||||
#define PD3_TCCR TCCR2A
|
||||
#define PD3_COM COM2B1
|
||||
|
||||
#undef PD4
|
||||
#define PD4_PIN PIND4
|
||||
#define PD4_RPORT PIND
|
||||
#define PD4_WPORT PORTD
|
||||
#define PD4_DDR DDRD
|
||||
#define PD4_PWM NO_PWM_PIN
|
||||
#define PD4_TCCR NO_TCCR_PIN
|
||||
#define PD4_COM 0
|
||||
|
||||
#undef PD5
|
||||
#define PD5_PIN PIND5
|
||||
#define PD5_RPORT PIND
|
||||
#define PD5_WPORT PORTD
|
||||
#define PD5_DDR DDRD
|
||||
#define PD5_PWM &OCR0B
|
||||
#define PD5_TCCR TCCR0A
|
||||
#define PD5_COM COM0B1
|
||||
|
||||
#undef PD6
|
||||
#define PD6_PIN PIND6
|
||||
#define PD6_RPORT PIND
|
||||
#define PD6_WPORT PORTD
|
||||
#define PD6_DDR DDRD
|
||||
#define PD6_PWM &OCR0A
|
||||
#define PD6_TCCR TCCR0A
|
||||
#define PD6_COM COM0A1
|
||||
|
||||
#undef PD7
|
||||
#define PD7_PIN PIND7
|
||||
#define PD7_RPORT PIND
|
||||
#define PD7_WPORT PORTD
|
||||
#define PD7_DDR DDRD
|
||||
#define PD7_PWM NO_PWM_PIN
|
||||
#define PD7_TCCR NO_TCCR_PIN
|
||||
#define PD7_COM 0
|
||||
|
|
@ -0,0 +1,659 @@
|
|||
#define NO_PWM_PIN (uint8_t *)0
|
||||
#define NO_TCCR_PIN *(uint8_t *)0
|
||||
|
||||
// UART
|
||||
#define RXD DIO8
|
||||
#define TXD DIO9
|
||||
#define RXD0 DIO8
|
||||
#define TXD0 DIO9
|
||||
|
||||
#define RXD1 DIO10
|
||||
#define TXD1 DIO11
|
||||
|
||||
// SPI
|
||||
#define SCK DIO7
|
||||
#define MISO DIO6
|
||||
#define MOSI DIO5
|
||||
#define SS DIO4
|
||||
|
||||
// TWI (I2C)
|
||||
#define SCL DIO16
|
||||
#define SDA DIO17
|
||||
|
||||
// timers and PWM
|
||||
#define OC0A DIO3
|
||||
#define OC0B DIO4
|
||||
#define OC1A DIO13
|
||||
#define OC1B DIO12
|
||||
#define OC2A DIO15
|
||||
#define OC2B DIO14
|
||||
|
||||
|
||||
// digital pins
|
||||
#define DIO0_PIN PINB0
|
||||
#define DIO0_RPORT PINB
|
||||
#define DIO0_WPORT PORTB
|
||||
#define DIO0_DDR DDRB
|
||||
#define DIO0_PWM NO_PWM_PIN
|
||||
#define DIO0_TCCR NO_TCCR_PIN
|
||||
#define DIO0_COM 0
|
||||
|
||||
#define DIO1_PIN PINB1
|
||||
#define DIO1_RPORT PINB
|
||||
#define DIO1_WPORT PORTB
|
||||
#define DIO1_DDR DDRB
|
||||
#define DIO1_PWM NO_PWM_PIN
|
||||
#define DIO1_TCCR NO_TCCR_PIN
|
||||
#define DIO1_COM 0
|
||||
|
||||
#define DIO2_PIN PINB2
|
||||
#define DIO2_RPORT PINB
|
||||
#define DIO2_WPORT PORTB
|
||||
#define DIO2_DDR DDRB
|
||||
#define DIO2_PWM NO_PWM_PIN
|
||||
#define DIO2_TCCR NO_TCCR_PIN
|
||||
#define DIO2_COM 0
|
||||
|
||||
#define DIO3_PIN PINB3
|
||||
#define DIO3_RPORT PINB
|
||||
#define DIO3_WPORT PORTB
|
||||
#define DIO3_DDR DDRB
|
||||
#define DIO3_PWM &OCR0A
|
||||
#define DIO3_TCCR TCCR0A
|
||||
#define DIO3_COM COM0A1
|
||||
|
||||
#define DIO4_PIN PINB4
|
||||
#define DIO4_RPORT PINB
|
||||
#define DIO4_WPORT PORTB
|
||||
#define DIO4_DDR DDRB
|
||||
#define DIO4_PWM &OCR0B
|
||||
#define DIO4_TCCR TCCR0A
|
||||
#define DIO4_COM COM0B1
|
||||
|
||||
#define DIO5_PIN PINB5
|
||||
#define DIO5_RPORT PINB
|
||||
#define DIO5_WPORT PORTB
|
||||
#define DIO5_DDR DDRB
|
||||
#define DIO5_PWM NO_PWM_PIN
|
||||
#define DIO5_TCCR NO_TCCR_PIN
|
||||
#define DIO5_COM 0
|
||||
|
||||
#define DIO6_PIN PINB6
|
||||
#define DIO6_RPORT PINB
|
||||
#define DIO6_WPORT PORTB
|
||||
#define DIO6_DDR DDRB
|
||||
#define DIO6_PWM NO_PWM_PIN
|
||||
#define DIO6_TCCR NO_TCCR_PIN
|
||||
#define DIO6_COM 0
|
||||
|
||||
#define DIO7_PIN PINB7
|
||||
#define DIO7_RPORT PINB
|
||||
#define DIO7_WPORT PORTB
|
||||
#define DIO7_DDR DDRB
|
||||
#define DIO7_PWM NO_PWM_PIN
|
||||
#define DIO7_TCCR NO_TCCR_PIN
|
||||
#define DIO7_COM 0
|
||||
|
||||
#define DIO8_PIN PIND0
|
||||
#define DIO8_RPORT PIND
|
||||
#define DIO8_WPORT PORTD
|
||||
#define DIO8_DDR DDRD
|
||||
#define DIO8_PWM NO_PWM_PIN
|
||||
#define DIO8_TCCR NO_TCCR_PIN
|
||||
#define DIO8_COM 0
|
||||
|
||||
#define DIO9_PIN PIND1
|
||||
#define DIO9_RPORT PIND
|
||||
#define DIO9_WPORT PORTD
|
||||
#define DIO9_DDR DDRD
|
||||
#define DIO9_PWM NO_PWM_PIN
|
||||
#define DIO9_TCCR NO_TCCR_PIN
|
||||
#define DIO9_COM 0
|
||||
|
||||
#define DIO10_PIN PIND2
|
||||
#define DIO10_RPORT PIND
|
||||
#define DIO10_WPORT PORTD
|
||||
#define DIO10_DDR DDRD
|
||||
#define DIO10_PWM NO_PWM_PIN
|
||||
#define DIO10_TCCR NO_TCCR_PIN
|
||||
#define DIO10_COM 0
|
||||
|
||||
#define DIO11_PIN PIND3
|
||||
#define DIO11_RPORT PIND
|
||||
#define DIO11_WPORT PORTD
|
||||
#define DIO11_DDR DDRD
|
||||
#define DIO11_PWM NO_PWM_PIN
|
||||
#define DIO11_TCCR NO_TCCR_PIN
|
||||
#define DIO11_COM 0
|
||||
|
||||
#define DIO12_PIN PIND4
|
||||
#define DIO12_RPORT PIND
|
||||
#define DIO12_WPORT PORTD
|
||||
#define DIO12_DDR DDRD
|
||||
#define DIO12_PWM NO_PWM_PIN
|
||||
#define DIO12_TCCR NO_TCCR_PIN
|
||||
#define DIO12_COM 0
|
||||
|
||||
#define DIO13_PIN PIND5
|
||||
#define DIO13_RPORT PIND
|
||||
#define DIO13_WPORT PORTD
|
||||
#define DIO13_DDR DDRD
|
||||
#define DIO13_PWM NO_PWM_PIN
|
||||
#define DIO13_TCCR NO_TCCR_PIN
|
||||
#define DIO13_COM 0
|
||||
|
||||
#define DIO14_PIN PIND6
|
||||
#define DIO14_RPORT PIND
|
||||
#define DIO14_WPORT PORTD
|
||||
#define DIO14_DDR DDRD
|
||||
#define DIO14_PWM &OCR2B
|
||||
#define DIO14_TCCR TCCR2A
|
||||
#define DIO14_COM COM2B1
|
||||
|
||||
#define DIO15_PIN PIND7
|
||||
#define DIO15_RPORT PIND
|
||||
#define DIO15_WPORT PORTD
|
||||
#define DIO15_DDR DDRD
|
||||
#define DIO15_PWM &OCR2A
|
||||
#define DIO15_TCCR TCCR2A
|
||||
#define DIO15_COM COM2A1
|
||||
|
||||
#define DIO16_PIN PINC0
|
||||
#define DIO16_RPORT PINC
|
||||
#define DIO16_WPORT PORTC
|
||||
#define DIO16_DDR DDRC
|
||||
#define DIO16_PWM NO_PWM_PIN
|
||||
#define DIO16_TCCR NO_TCCR_PIN
|
||||
#define DIO16_COM 0
|
||||
|
||||
#define DIO17_PIN PINC1
|
||||
#define DIO17_RPORT PINC
|
||||
#define DIO17_WPORT PORTC
|
||||
#define DIO17_DDR DDRC
|
||||
#define DIO17_PWM NO_PWM_PIN
|
||||
#define DIO17_TCCR NO_TCCR_PIN
|
||||
#define DIO17_COM 0
|
||||
|
||||
#define DIO18_PIN PINC2
|
||||
#define DIO18_RPORT PINC
|
||||
#define DIO18_WPORT PORTC
|
||||
#define DIO18_DDR DDRC
|
||||
#define DIO18_PWM NO_PWM_PIN
|
||||
#define DIO18_TCCR NO_TCCR_PIN
|
||||
#define DIO18_COM 0
|
||||
|
||||
#define DIO19_PIN PINC3
|
||||
#define DIO19_RPORT PINC
|
||||
#define DIO19_WPORT PORTC
|
||||
#define DIO19_DDR DDRC
|
||||
#define DIO19_PWM NO_PWM_PIN
|
||||
#define DIO19_TCCR NO_TCCR_PIN
|
||||
#define DIO19_COM 0
|
||||
|
||||
#define DIO20_PIN PINC4
|
||||
#define DIO20_RPORT PINC
|
||||
#define DIO20_WPORT PORTC
|
||||
#define DIO20_DDR DDRC
|
||||
#define DIO20_PWM NO_PWM_PIN
|
||||
#define DIO20_TCCR NO_TCCR_PIN
|
||||
#define DIO20_COM 0
|
||||
|
||||
#define DIO21_PIN PINC5
|
||||
#define DIO21_RPORT PINC
|
||||
#define DIO21_WPORT PORTC
|
||||
#define DIO21_DDR DDRC
|
||||
#define DIO21_PWM NO_PWM_PIN
|
||||
#define DIO21_TCCR NO_TCCR_PIN
|
||||
#define DIO21_COM 0
|
||||
|
||||
#define DIO22_PIN PINC6
|
||||
#define DIO22_RPORT PINC
|
||||
#define DIO22_WPORT PORTC
|
||||
#define DIO22_DDR DDRC
|
||||
#define DIO22_PWM NO_PWM_PIN
|
||||
#define DIO22_TCCR NO_TCCR_PIN
|
||||
#define DIO22_COM 0
|
||||
|
||||
#define DIO23_PIN PINC7
|
||||
#define DIO23_RPORT PINC
|
||||
#define DIO23_WPORT PORTC
|
||||
#define DIO23_DDR DDRC
|
||||
#define DIO23_PWM NO_PWM_PIN
|
||||
#define DIO23_TCCR NO_TCCR_PIN
|
||||
#define DIO23_COM 0
|
||||
|
||||
/**
|
||||
DIO24 ... DIO31 are duplicate names for AIO0 ... AIO7 in opposite order, so
|
||||
DIO24 == AIO7, DIO25 == AIO6, DIO26 == AIO5, DIO27 == AIO4,
|
||||
DIO28 == AIO3, DIO29 == AIO2, DIO30 == AIO1 and DIO31 == AIO0
|
||||
*/
|
||||
#define DIO24_PIN PINA7
|
||||
#define DIO24_RPORT PINA
|
||||
#define DIO24_WPORT PORTA
|
||||
#define DIO24_DDR DDRA
|
||||
#define DIO24_PWM NO_PWM_PIN
|
||||
#define DIO24_TCCR NO_TCCR_PIN
|
||||
#define DIO24_COM 0
|
||||
|
||||
#define DIO25_PIN PINA6
|
||||
#define DIO25_RPORT PINA
|
||||
#define DIO25_WPORT PORTA
|
||||
#define DIO25_DDR DDRA
|
||||
#define DIO25_PWM NO_PWM_PIN
|
||||
#define DIO25_TCCR NO_TCCR_PIN
|
||||
#define DIO25_COM 0
|
||||
|
||||
#define DIO26_PIN PINA5
|
||||
#define DIO26_RPORT PINA
|
||||
#define DIO26_WPORT PORTA
|
||||
#define DIO26_DDR DDRA
|
||||
#define DIO26_PWM NO_PWM_PIN
|
||||
#define DIO26_TCCR NO_TCCR_PIN
|
||||
#define DIO26_COM 0
|
||||
|
||||
#define DIO27_PIN PINA4
|
||||
#define DIO27_RPORT PINA
|
||||
#define DIO27_WPORT PORTA
|
||||
#define DIO27_DDR DDRA
|
||||
#define DIO27_PWM NO_PWM_PIN
|
||||
#define DIO27_TCCR NO_TCCR_PIN
|
||||
#define DIO27_COM 0
|
||||
|
||||
#define DIO28_PIN PINA3
|
||||
#define DIO28_RPORT PINA
|
||||
#define DIO28_WPORT PORTA
|
||||
#define DIO28_DDR DDRA
|
||||
#define DIO28_PWM NO_PWM_PIN
|
||||
#define DIO28_TCCR NO_TCCR_PIN
|
||||
#define DIO28_COM 0
|
||||
|
||||
#define DIO29_PIN PINA2
|
||||
#define DIO29_RPORT PINA
|
||||
#define DIO29_WPORT PORTA
|
||||
#define DIO29_DDR DDRA
|
||||
#define DIO29_PWM NO_PWM_PIN
|
||||
#define DIO29_TCCR NO_TCCR_PIN
|
||||
#define DIO29_COM 0
|
||||
|
||||
#define DIO30_PIN PINA1
|
||||
#define DIO30_RPORT PINA
|
||||
#define DIO30_WPORT PORTA
|
||||
#define DIO30_DDR DDRA
|
||||
#define DIO30_PWM NO_PWM_PIN
|
||||
#define DIO30_TCCR NO_TCCR_PIN
|
||||
#define DIO30_COM 0
|
||||
|
||||
#define DIO31_PIN PINA0
|
||||
#define DIO31_RPORT PINA
|
||||
#define DIO31_WPORT PORTA
|
||||
#define DIO31_DDR DDRA
|
||||
#define DIO31_PWM NO_PWM_PIN
|
||||
#define DIO31_TCCR NO_TCCR_PIN
|
||||
#define DIO31_COM 0
|
||||
|
||||
|
||||
// analog pins
|
||||
#define AIO0_PIN PINA0
|
||||
#define AIO0_RPORT PINA
|
||||
#define AIO0_WPORT PORTA
|
||||
#define AIO0_DDR DDRA
|
||||
#define AIO0_PWM NO_PWM_PIN
|
||||
#define AIO0_TCCR NO_TCCR_PIN
|
||||
#define AIO0_COM 0
|
||||
#define AIO0_ADC 0
|
||||
|
||||
#define AIO1_PIN PINA1
|
||||
#define AIO1_RPORT PINA
|
||||
#define AIO1_WPORT PORTA
|
||||
#define AIO1_DDR DDRA
|
||||
#define AIO1_PWM NO_PWM_PIN
|
||||
#define AIO1_TCCR NO_TCCR_PIN
|
||||
#define AIO1_COM 0
|
||||
#define AIO1_ADC 1
|
||||
|
||||
#define AIO2_PIN PINA2
|
||||
#define AIO2_RPORT PINA
|
||||
#define AIO2_WPORT PORTA
|
||||
#define AIO2_DDR DDRA
|
||||
#define AIO2_PWM NO_PWM_PIN
|
||||
#define AIO2_TCCR NO_TCCR_PIN
|
||||
#define AIO2_COM 0
|
||||
#define AIO2_ADC 2
|
||||
|
||||
#define AIO3_PIN PINA3
|
||||
#define AIO3_RPORT PINA
|
||||
#define AIO3_WPORT PORTA
|
||||
#define AIO3_DDR DDRA
|
||||
#define AIO3_PWM NO_PWM_PIN
|
||||
#define AIO3_TCCR NO_TCCR_PIN
|
||||
#define AIO3_COM 0
|
||||
#define AIO3_ADC 3
|
||||
|
||||
#define AIO4_PIN PINA4
|
||||
#define AIO4_RPORT PINA
|
||||
#define AIO4_WPORT PORTA
|
||||
#define AIO4_DDR DDRA
|
||||
#define AIO4_PWM NO_PWM_PIN
|
||||
#define AIO4_TCCR NO_TCCR_PIN
|
||||
#define AIO4_COM 0
|
||||
#define AIO4_ADC 4
|
||||
|
||||
#define AIO5_PIN PINA5
|
||||
#define AIO5_RPORT PINA
|
||||
#define AIO5_WPORT PORTA
|
||||
#define AIO5_DDR DDRA
|
||||
#define AIO5_PWM NO_PWM_PIN
|
||||
#define AIO5_TCCR NO_TCCR_PIN
|
||||
#define AIO5_COM 0
|
||||
#define AIO5_ADC 5
|
||||
|
||||
#define AIO6_PIN PINA6
|
||||
#define AIO6_RPORT PINA
|
||||
#define AIO6_WPORT PORTA
|
||||
#define AIO6_DDR DDRA
|
||||
#define AIO6_PWM NO_PWM_PIN
|
||||
#define AIO6_TCCR NO_TCCR_PIN
|
||||
#define AIO6_COM 0
|
||||
#define AIO6_ADC 6
|
||||
|
||||
#define AIO7_PIN PINA7
|
||||
#define AIO7_RPORT PINA
|
||||
#define AIO7_WPORT PORTA
|
||||
#define AIO7_DDR DDRA
|
||||
#define AIO7_PWM NO_PWM_PIN
|
||||
#define AIO7_TCCR NO_TCCR_PIN
|
||||
#define AIO7_COM 0
|
||||
#define AIO7_ADC 7
|
||||
|
||||
|
||||
|
||||
#undef PA0
|
||||
#define PA0_PIN PINA0
|
||||
#define PA0_RPORT PINA
|
||||
#define PA0_WPORT PORTA
|
||||
#define PA0_DDR DDRA
|
||||
#define PA0_PWM NO_PWM_PIN
|
||||
#define PA0_TCCR NO_TCCR_PIN
|
||||
#define PA0_COM 0
|
||||
|
||||
#undef PA1
|
||||
#define PA1_PIN PINA1
|
||||
#define PA1_RPORT PINA
|
||||
#define PA1_WPORT PORTA
|
||||
#define PA1_DDR DDRA
|
||||
#define PA1_PWM NO_PWM_PIN
|
||||
#define PA1_TCCR NO_TCCR_PIN
|
||||
#define PA1_COM 0
|
||||
|
||||
#undef PA2
|
||||
#define PA2_PIN PINA2
|
||||
#define PA2_RPORT PINA
|
||||
#define PA2_WPORT PORTA
|
||||
#define PA2_DDR DDRA
|
||||
#define PA2_PWM NO_PWM_PIN
|
||||
#define PA2_TCCR NO_TCCR_PIN
|
||||
#define PA2_COM 0
|
||||
|
||||
#undef PA3
|
||||
#define PA3_PIN PINA3
|
||||
#define PA3_RPORT PINA
|
||||
#define PA3_WPORT PORTA
|
||||
#define PA3_DDR DDRA
|
||||
#define PA3_PWM NO_PWM_PIN
|
||||
#define PA3_TCCR NO_TCCR_PIN
|
||||
#define PA3_COM 0
|
||||
|
||||
#undef PA4
|
||||
#define PA4_PIN PINA4
|
||||
#define PA4_RPORT PINA
|
||||
#define PA4_WPORT PORTA
|
||||
#define PA4_DDR DDRA
|
||||
#define PA4_PWM NO_PWM_PIN
|
||||
#define PA4_TCCR NO_TCCR_PIN
|
||||
#define PA4_COM 0
|
||||
|
||||
#undef PA5
|
||||
#define PA5_PIN PINA5
|
||||
#define PA5_RPORT PINA
|
||||
#define PA5_WPORT PORTA
|
||||
#define PA5_DDR DDRA
|
||||
#define PA5_PWM NO_PWM_PIN
|
||||
#define PA5_TCCR NO_TCCR_PIN
|
||||
#define PA5_COM 0
|
||||
|
||||
#undef PA6
|
||||
#define PA6_PIN PINA6
|
||||
#define PA6_RPORT PINA
|
||||
#define PA6_WPORT PORTA
|
||||
#define PA6_DDR DDRA
|
||||
#define PA6_PWM NO_PWM_PIN
|
||||
#define PA6_TCCR NO_TCCR_PIN
|
||||
#define PA6_COM 0
|
||||
|
||||
#undef PA7
|
||||
#define PA7_PIN PINA7
|
||||
#define PA7_RPORT PINA
|
||||
#define PA7_WPORT PORTA
|
||||
#define PA7_DDR DDRA
|
||||
#define PA7_PWM NO_PWM_PIN
|
||||
#define PA7_TCCR NO_TCCR_PIN
|
||||
#define PA7_COM 0
|
||||
|
||||
|
||||
#undef PB0
|
||||
#define PB0_PIN PINB0
|
||||
#define PB0_RPORT PINB
|
||||
#define PB0_WPORT PORTB
|
||||
#define PB0_DDR DDRB
|
||||
#define PB0_PWM NO_PWM_PIN
|
||||
#define PB0_TCCR NO_TCCR_PIN
|
||||
#define PB0_COM 0
|
||||
|
||||
#undef PB1
|
||||
#define PB1_PIN PINB1
|
||||
#define PB1_RPORT PINB
|
||||
#define PB1_WPORT PORTB
|
||||
#define PB1_DDR DDRB
|
||||
#define PB1_PWM NO_PWM_PIN
|
||||
#define PB1_TCCR NO_TCCR_PIN
|
||||
#define PB1_COM 0
|
||||
|
||||
#undef PB2
|
||||
#define PB2_PIN PINB2
|
||||
#define PB2_RPORT PINB
|
||||
#define PB2_WPORT PORTB
|
||||
#define PB2_DDR DDRB
|
||||
#define PB2_PWM NO_PWM_PIN
|
||||
#define PB2_TCCR NO_TCCR_PIN
|
||||
#define PB2_COM 0
|
||||
|
||||
#undef PB3
|
||||
#define PB3_PIN PINB3
|
||||
#define PB3_RPORT PINB
|
||||
#define PB3_WPORT PORTB
|
||||
#define PB3_DDR DDRB
|
||||
#define PB3_PWM &OCR0A
|
||||
#define PB3_TCCR TCCR0A
|
||||
#define PB3_COM COM0A1
|
||||
|
||||
#undef PB4
|
||||
#define PB4_PIN PINB4
|
||||
#define PB4_RPORT PINB
|
||||
#define PB4_WPORT PORTB
|
||||
#define PB4_DDR DDRB
|
||||
#define PB4_PWM &OCR0B
|
||||
#define PB4_TCCR TCCR0A
|
||||
#define PB4_COM COM0B1
|
||||
|
||||
#undef PB5
|
||||
#define PB5_PIN PINB5
|
||||
#define PB5_RPORT PINB
|
||||
#define PB5_WPORT PORTB
|
||||
#define PB5_DDR DDRB
|
||||
#define PB5_PWM NO_PWM_PIN
|
||||
#define PB5_TCCR NO_TCCR_PIN
|
||||
#define PB5_COM 0
|
||||
|
||||
#undef PB6
|
||||
#define PB6_PIN PINB6
|
||||
#define PB6_RPORT PINB
|
||||
#define PB6_WPORT PORTB
|
||||
#define PB6_DDR DDRB
|
||||
#define PB6_PWM NO_PWM_PIN
|
||||
#define PB6_TCCR NO_TCCR_PIN
|
||||
#define PB6_COM 0
|
||||
|
||||
#undef PB7
|
||||
#define PB7_PIN PINB7
|
||||
#define PB7_RPORT PINB
|
||||
#define PB7_WPORT PORTB
|
||||
#define PB7_DDR DDRB
|
||||
#define PB7_PWM NO_PWM_PIN
|
||||
#define PB7_TCCR NO_TCCR_PIN
|
||||
#define PB7_COM 0
|
||||
|
||||
|
||||
#undef PC0
|
||||
#define PC0_PIN PINC0
|
||||
#define PC0_RPORT PINC
|
||||
#define PC0_WPORT PORTC
|
||||
#define PC0_DDR DDRC
|
||||
#define PC0_PWM NO_PWM_PIN
|
||||
#define PC0_TCCR NO_TCCR_PIN
|
||||
#define PC0_COM 0
|
||||
|
||||
#undef PC1
|
||||
#define PC1_PIN PINC1
|
||||
#define PC1_RPORT PINC
|
||||
#define PC1_WPORT PORTC
|
||||
#define PC1_DDR DDRC
|
||||
#define PC1_PWM NO_PWM_PIN
|
||||
#define PC1_TCCR NO_TCCR_PIN
|
||||
#define PC1_COM 0
|
||||
|
||||
#undef PC2
|
||||
#define PC2_PIN PINC2
|
||||
#define PC2_RPORT PINC
|
||||
#define PC2_WPORT PORTC
|
||||
#define PC2_DDR DDRC
|
||||
#define PC2_PWM NO_PWM_PIN
|
||||
#define PC2_TCCR NO_TCCR_PIN
|
||||
#define PC2_COM 0
|
||||
|
||||
#undef PC3
|
||||
#define PC3_PIN PINC3
|
||||
#define PC3_RPORT PINC
|
||||
#define PC3_WPORT PORTC
|
||||
#define PC3_DDR DDRC
|
||||
#define PC3_PWM NO_PWM_PIN
|
||||
#define PC3_TCCR NO_TCCR_PIN
|
||||
#define PC3_COM 0
|
||||
|
||||
#undef PC4
|
||||
#define PC4_PIN PINC4
|
||||
#define PC4_RPORT PINC
|
||||
#define PC4_WPORT PORTC
|
||||
#define PC4_DDR DDRC
|
||||
#define PC4_PWM NO_PWM_PIN
|
||||
#define PC4_TCCR NO_TCCR_PIN
|
||||
#define PC4_COM 0
|
||||
|
||||
#undef PC5
|
||||
#define PC5_PIN PINC5
|
||||
#define PC5_RPORT PINC
|
||||
#define PC5_WPORT PORTC
|
||||
#define PC5_DDR DDRC
|
||||
#define PC5_PWM NO_PWM_PIN
|
||||
#define PC5_TCCR NO_TCCR_PIN
|
||||
#define PC5_COM 0
|
||||
|
||||
#undef PC6
|
||||
#define PC6_PIN PINC6
|
||||
#define PC6_RPORT PINC
|
||||
#define PC6_WPORT PORTC
|
||||
#define PC6_DDR DDRC
|
||||
#define PC6_PWM NO_PWM_PIN
|
||||
#define PC6_TCCR NO_TCCR_PIN
|
||||
#define PC6_COM 0
|
||||
|
||||
#undef PC7
|
||||
#define PC7_PIN PINC7
|
||||
#define PC7_RPORT PINC
|
||||
#define PC7_WPORT PORTC
|
||||
#define PC7_DDR DDRC
|
||||
#define PC7_PWM NO_PWM_PIN
|
||||
#define PC7_TCCR NO_TCCR_PIN
|
||||
#define PC7_COM 0
|
||||
|
||||
|
||||
#undef PD0
|
||||
#define PD0_PIN PIND0
|
||||
#define PD0_RPORT PIND
|
||||
#define PD0_WPORT PORTD
|
||||
#define PD0_DDR DDRD
|
||||
#define PD0_PWM NO_PWM_PIN
|
||||
#define PD0_TCCR NO_TCCR_PIN
|
||||
#define PD0_COM 0
|
||||
|
||||
#undef PD1
|
||||
#define PD1_PIN PIND1
|
||||
#define PD1_RPORT PIND
|
||||
#define PD1_WPORT PORTD
|
||||
#define PD1_DDR DDRD
|
||||
#define PD1_PWM NO_PWM_PIN
|
||||
#define PD1_TCCR NO_TCCR_PIN
|
||||
#define PD1_COM 0
|
||||
|
||||
#undef PD2
|
||||
#define PD2_PIN PIND2
|
||||
#define PD2_RPORT PIND
|
||||
#define PD2_WPORT PORTD
|
||||
#define PD2_DDR DDRD
|
||||
#define PD2_PWM NO_PWM_PIN
|
||||
#define PD2_TCCR NO_TCCR_PIN
|
||||
#define PD2_COM 0
|
||||
|
||||
#undef PD3
|
||||
#define PD3_PIN PIND3
|
||||
#define PD3_RPORT PIND
|
||||
#define PD3_WPORT PORTD
|
||||
#define PD3_DDR DDRD
|
||||
#define PD3_PWM NO_PWM_PIN
|
||||
#define PD3_TCCR NO_TCCR_PIN
|
||||
#define PD3_COM 0
|
||||
|
||||
#undef PD4
|
||||
#define PD4_PIN PIND4
|
||||
#define PD4_RPORT PIND
|
||||
#define PD4_WPORT PORTD
|
||||
#define PD4_DDR DDRD
|
||||
#define PD4_PWM NO_PWM_PIN
|
||||
#define PD4_TCCR NO_TCCR_PIN
|
||||
#define PD4_COM 0
|
||||
|
||||
#undef PD5
|
||||
#define PD5_PIN PIND5
|
||||
#define PD5_RPORT PIND
|
||||
#define PD5_WPORT PORTD
|
||||
#define PD5_DDR DDRD
|
||||
#define PD5_PWM NO_PWM_PIN
|
||||
#define PD5_TCCR NO_TCCR_PIN
|
||||
#define PD5_COM 0
|
||||
|
||||
#undef PD6
|
||||
#define PD6_PIN PIND6
|
||||
#define PD6_RPORT PIND
|
||||
#define PD6_WPORT PORTD
|
||||
#define PD6_DDR DDRD
|
||||
#define PD6_PWM &OCR2B
|
||||
#define PD6_TCCR TCCR2A
|
||||
#define PD6_COM COM2B1
|
||||
|
||||
#undef PD7
|
||||
#define PD7_PIN PIND7
|
||||
#define PD7_RPORT PIND
|
||||
#define PD7_WPORT PORTD
|
||||
#define PD7_DDR DDRD
|
||||
#define PD7_PWM &OCR2A
|
||||
#define PD7_TCCR TCCR2A
|
||||
#define PD7_COM COM2A1
|
||||
|
|
@ -0,0 +1,288 @@
|
|||
|
||||
/** \file
|
||||
\brief MCU pin mappings.
|
||||
|
||||
Here we map the pins required by Teacup to the names known by CMSIS.
|
||||
*/
|
||||
|
||||
/** I/O pins.
|
||||
|
||||
In MBED, I/O pin handling is rather complicated. Lots of enums, lots of
|
||||
functions, spread over various files, slow execution (pin toggling about
|
||||
15 times slower than what we have here).
|
||||
|
||||
Accordingly, the strategy for FastIO is derived directly from the data sheet.
|
||||
There one can see that hardware is very similar to that of AVRs: pins grouped
|
||||
in ports (here: 12 pins per port) and a number of additional registers with
|
||||
bits for additional proterties: wether input or output, wether a pullup is
|
||||
attached, and so on. See chapter 12 of the LPC111x User Manual. Other than
|
||||
AVRs, many ARMs (including the LPC1114) support bit-banding, which is
|
||||
interrupt safe and also a few clock cycles faster. See macros in pinio.h.
|
||||
*/
|
||||
|
||||
#include "cmsis-lpc11xx.h"
|
||||
|
||||
#define F_CPU __SYSTEM_CLOCK
|
||||
|
||||
/** Pins for UART, the serial port.
|
||||
*/
|
||||
#define RXD PIO1_6
|
||||
#define RXD_CMSIS PIO1_6_CMSIS
|
||||
#define TXD PIO1_7
|
||||
#define TXD_CMSIS PIO1_7_CMSIS
|
||||
|
||||
/**
|
||||
Offsets to the various GPIO registers. See chapter 12.3 in LPC111x User
|
||||
Manual.
|
||||
*/
|
||||
#define IO_MASK_OFFSET 0x0000 // Bit-masked data registers.
|
||||
#define IO_DATA_OFFSET 0x3FFC // Data register.
|
||||
#define IO_DIR_OFFSET 0x8000 // Data direction register.
|
||||
#define IO_IS_OFFSET 0x8004 // Interrupt sense register.
|
||||
#define IO_IBE_OFFSET 0x8008 // Interrupt both edges register.
|
||||
#define IO_IEV_OFFSET 0x800C // Interrupt event register.
|
||||
#define IO_IE_OFFSET 0x8010 // Interrupt mask register.
|
||||
#define IO_RIS_OFFSET 0x8014 // Raw interrupt status register.
|
||||
#define IO_MIS_OFFSET 0x8018 // Masked interrupt status register.
|
||||
#define IO_IC_OFFSET 0x801C // Interrupt clear register.
|
||||
|
||||
/**
|
||||
Masks to handle the pulling function. All IOCON registers for pins do this on
|
||||
bits [4:3]. 'Or' them with xxx_OUTPUT (see below) to get the requested
|
||||
functionality.
|
||||
|
||||
Note that PIO0_4 and PIO0_5 are always open drain, no pullup possible. Mask
|
||||
bits are "reserved" on these two.
|
||||
*/
|
||||
#define IO_MODEMASK_INACTIVE (0x00 << 3)
|
||||
#define IO_MODEMASK_PULLDOWN (0x01 << 3)
|
||||
#define IO_MODEMASK_PULLUP (0x02 << 3)
|
||||
#define IO_MODEMASK_REPEATER (0x03 << 3)
|
||||
|
||||
/**
|
||||
We define only pins available on the DIP28/TSSOP28 package here, because
|
||||
the LPC1114FN28/102 is currently the only LPC1114 known to be used in a
|
||||
RepRap controller. We also use pin names as defined in the User Manual, for
|
||||
(hopefully) least disambiguation.
|
||||
|
||||
Description:
|
||||
|
||||
xxx_CMSIS Stupid MBED uses an inconsistent naming scheme in
|
||||
LPC_IOCON_TypeDef, so we have to map these names to the
|
||||
standard naming pattern.
|
||||
|
||||
xxx_PIN Pin number. Can be used to calculate the port mask and also
|
||||
the bitbanding address.
|
||||
|
||||
xxx_PORT Base address of the corresponding GPIO register. For offsets
|
||||
see above.
|
||||
|
||||
xxx_OUTPUT Bits to set/clear to set this pin as GPIO output in the IOCON
|
||||
register. See chapter 7.4 of the User Manual. FUNC as I/O pin,
|
||||
MODE inactive (no pullup or pulldown), no hysteresis, no
|
||||
analog function, no open drain.
|
||||
|
||||
To achieve appropriate pulling behaviour for inputs, 'or'
|
||||
this value with one of the IO_MODEMASKs.
|
||||
|
||||
xxx_TIMER The timer a pin can be connected to, or NO_TIMER, if this
|
||||
pin can't be connected to a timer for some reason. If a pin
|
||||
can be connected to a timer, it can output PWM.
|
||||
|
||||
xxx_MATCH Number of the match register of PWM-able pins. Must be defined
|
||||
for non-PWM-able pins, too, to allow macros to expand. Value
|
||||
doesn't matter in the latter case.
|
||||
|
||||
xxx_PWM Bits to set/clear to set this pin as PWM output pin in the
|
||||
IOCON register. See chapter 7.4 of the User Manual. Must be
|
||||
defined, but value doesn't matter for non-PWM-able pins.
|
||||
*/
|
||||
#define NO_TIMER ((LPC_TMR_TypeDef *)0)
|
||||
|
||||
// Reset pin. Don't use.
|
||||
//#define PIO0_0_CMSIS RESET_PIO0_0
|
||||
//#define PIO0_0_PIN 0
|
||||
//#define PIO0_0_PORT LPC_GPIO0
|
||||
//#define PIO0_0_OUTPUT (0x01 << 0)
|
||||
//#define PIO0_0_TIMER NO_TIMER
|
||||
//#define PIO0_0_MATCH 0
|
||||
//#define PIO0_0_PWM 0
|
||||
|
||||
#define PIO0_1_CMSIS PIO0_1
|
||||
#define PIO0_1_PIN 1
|
||||
#define PIO0_1_PORT LPC_GPIO0
|
||||
#define PIO0_1_OUTPUT 0x00
|
||||
// Timer pin CT32B0_MAT2, but timer used for Step interrupt.
|
||||
#define PIO0_1_TIMER NO_TIMER
|
||||
#define PIO0_1_MATCH 0
|
||||
#define PIO0_1_PWM 0
|
||||
|
||||
#define PIO0_2_CMSIS PIO0_2
|
||||
#define PIO0_2_PIN 2
|
||||
#define PIO0_2_PORT LPC_GPIO0
|
||||
#define PIO0_2_OUTPUT 0x00
|
||||
#define PIO0_2_TIMER NO_TIMER
|
||||
#define PIO0_2_MATCH 0
|
||||
#define PIO0_2_PWM 0
|
||||
|
||||
#define PIO0_3_CMSIS PIO0_3
|
||||
#define PIO0_3_PIN 3
|
||||
#define PIO0_3_PORT LPC_GPIO0
|
||||
#define PIO0_3_OUTPUT 0x00
|
||||
#define PIO0_3_TIMER NO_TIMER
|
||||
#define PIO0_3_MATCH 0
|
||||
#define PIO0_3_PWM 0
|
||||
|
||||
#define PIO0_4_CMSIS PIO0_4
|
||||
#define PIO0_4_PIN 4
|
||||
#define PIO0_4_PORT LPC_GPIO0
|
||||
#define PIO0_4_OUTPUT (0x01 << 8)
|
||||
#define PIO0_4_TIMER NO_TIMER
|
||||
#define PIO0_4_MATCH 0
|
||||
#define PIO0_4_PWM 0
|
||||
|
||||
#define PIO0_5_CMSIS PIO0_5
|
||||
#define PIO0_5_PIN 5
|
||||
#define PIO0_5_PORT LPC_GPIO0
|
||||
#define PIO0_5_OUTPUT (0x01 << 8)
|
||||
#define PIO0_5_TIMER NO_TIMER
|
||||
#define PIO0_5_MATCH 0
|
||||
#define PIO0_5_PWM 0
|
||||
|
||||
#define PIO0_6_CMSIS PIO0_6
|
||||
#define PIO0_6_PIN 6
|
||||
#define PIO0_6_PORT LPC_GPIO0
|
||||
#define PIO0_6_OUTPUT 0x00
|
||||
#define PIO0_6_TIMER NO_TIMER
|
||||
#define PIO0_6_MATCH 0
|
||||
#define PIO0_6_PWM 0
|
||||
|
||||
#define PIO0_7_CMSIS PIO0_7
|
||||
#define PIO0_7_PIN 7
|
||||
#define PIO0_7_PORT LPC_GPIO0
|
||||
#define PIO0_7_OUTPUT 0x00
|
||||
#define PIO0_7_TIMER NO_TIMER
|
||||
#define PIO0_7_MATCH 0
|
||||
#define PIO0_7_PWM 0
|
||||
|
||||
#define PIO0_8_CMSIS PIO0_8
|
||||
#define PIO0_8_PIN 8
|
||||
#define PIO0_8_PORT LPC_GPIO0
|
||||
#define PIO0_8_OUTPUT 0x00
|
||||
#define PIO0_8_TIMER LPC_TMR16B0
|
||||
#define PIO0_8_MATCH 1
|
||||
#define PIO0_8_PWM (0x02 << 0)
|
||||
|
||||
#define PIO0_9_CMSIS PIO0_9
|
||||
#define PIO0_9_PIN 9
|
||||
#define PIO0_9_PORT LPC_GPIO0
|
||||
#define PIO0_9_OUTPUT 0x00
|
||||
#define PIO0_9_TIMER LPC_TMR16B0
|
||||
#define PIO0_9_MATCH 1
|
||||
#define PIO0_9_PWM (0x02 << 0)
|
||||
|
||||
#define PIO0_10_CMSIS SWCLK_PIO0_10
|
||||
#define PIO0_10_PIN 10
|
||||
#define PIO0_10_PORT LPC_GPIO0
|
||||
#define PIO0_10_OUTPUT (0x01 << 0)
|
||||
#define PIO0_10_TIMER LPC_TMR16B0
|
||||
#define PIO0_10_MATCH 2
|
||||
#define PIO0_10_PWM (0x03 << 0)
|
||||
|
||||
#define PIO0_11_CMSIS R_PIO0_11
|
||||
#define PIO0_11_PIN 11
|
||||
#define PIO0_11_PORT LPC_GPIO0
|
||||
#define PIO0_11_OUTPUT ((0x01 << 0) | (0x01 << 7))
|
||||
#define PIO0_11_ADC 0
|
||||
// Timer pin CT32B0_MAT3, but timer used for Step interrupt.
|
||||
#define PIO0_11_TIMER NO_TIMER
|
||||
#define PIO0_11_MATCH 0
|
||||
#define PIO0_11_PWM 0
|
||||
|
||||
#define PIO1_0_CMSIS R_PIO1_0
|
||||
#define PIO1_0_PIN 0
|
||||
#define PIO1_0_PORT LPC_GPIO1
|
||||
#define PIO1_0_OUTPUT ((0x01 << 0) | (0x01 << 7))
|
||||
#define PIO1_0_ADC 1
|
||||
#define PIO1_0_TIMER NO_TIMER
|
||||
#define PIO1_0_MATCH 0
|
||||
#define PIO1_0_PWM 0
|
||||
|
||||
#define PIO1_1_CMSIS R_PIO1_1
|
||||
#define PIO1_1_PIN 1
|
||||
#define PIO1_1_PORT LPC_GPIO1
|
||||
#define PIO1_1_OUTPUT ((0x01 << 0) | (0x01 << 7))
|
||||
#define PIO1_1_ADC 2
|
||||
#define PIO1_1_TIMER LPC_TMR32B1
|
||||
#define PIO1_1_MATCH 0
|
||||
#define PIO1_1_PWM (0x03 << 0)
|
||||
|
||||
#define PIO1_2_CMSIS R_PIO1_2
|
||||
#define PIO1_2_PIN 2
|
||||
#define PIO1_2_PORT LPC_GPIO1
|
||||
#define PIO1_2_OUTPUT ((0x01 << 0) | (0x01 << 7))
|
||||
#define PIO1_2_ADC 3
|
||||
#define PIO1_2_TIMER LPC_TMR32B1
|
||||
#define PIO1_2_MATCH 1
|
||||
#define PIO1_2_PWM (0x03 << 0)
|
||||
|
||||
#define PIO1_3_CMSIS SWDIO_PIO1_3
|
||||
#define PIO1_3_PIN 3
|
||||
#define PIO1_3_PORT LPC_GPIO1
|
||||
#define PIO1_3_OUTPUT ((0x01 << 0) | (0x01 << 7))
|
||||
#define PIO1_3_ADC 4
|
||||
#define PIO1_3_TIMER LPC_TMR32B1
|
||||
#define PIO1_3_MATCH 2
|
||||
#define PIO1_3_PWM (0x03 << 0)
|
||||
|
||||
#define PIO1_4_CMSIS PIO1_4
|
||||
#define PIO1_4_PIN 4
|
||||
#define PIO1_4_PORT LPC_GPIO1
|
||||
#define PIO1_4_OUTPUT (0x01 << 7)
|
||||
#define PIO1_4_ADC 5
|
||||
// Timer pin CT32B1_MAT3, but match used for PWM reset.
|
||||
#define PIO1_4_TIMER NO_TIMER
|
||||
#define PIO1_4_MATCH 0
|
||||
#define PIO1_4_PWM 0
|
||||
|
||||
#define PIO1_5_CMSIS PIO1_5
|
||||
#define PIO1_5_PIN 5
|
||||
#define PIO1_5_PORT LPC_GPIO1
|
||||
#define PIO1_5_OUTPUT 0x00
|
||||
#define PIO1_5_TIMER NO_TIMER
|
||||
#define PIO1_5_MATCH 0
|
||||
#define PIO1_5_PWM 0
|
||||
|
||||
#define PIO1_6_CMSIS PIO1_6
|
||||
#define PIO1_6_PIN 6
|
||||
#define PIO1_6_PORT LPC_GPIO1
|
||||
#define PIO1_6_OUTPUT 0x00
|
||||
// Timer pin CT32B0_MAT0, but timer used for Step interrupt.
|
||||
#define PIO1_6_TIMER NO_TIMER
|
||||
#define PIO1_6_MATCH 0
|
||||
#define PIO1_6_PWM 0
|
||||
|
||||
#define PIO1_7_CMSIS PIO1_7
|
||||
#define PIO1_7_PIN 7
|
||||
#define PIO1_7_PORT LPC_GPIO1
|
||||
#define PIO1_7_OUTPUT 0x00
|
||||
// Timer pin CT32B0_MAT1, but timer used for Step interrupt.
|
||||
#define PIO1_7_TIMER NO_TIMER
|
||||
#define PIO1_7_MATCH 0
|
||||
#define PIO1_7_PWM 0
|
||||
|
||||
#define PIO1_8_CMSIS PIO1_8
|
||||
#define PIO1_8_PIN 8
|
||||
#define PIO1_8_PORT LPC_GPIO1
|
||||
#define PIO1_8_OUTPUT 0x00
|
||||
#define PIO1_8_TIMER NO_TIMER
|
||||
#define PIO1_8_MATCH 0
|
||||
#define PIO1_8_PWM 0
|
||||
|
||||
#define PIO1_9_CMSIS PIO1_9
|
||||
#define PIO1_9_PIN 9
|
||||
#define PIO1_9_PORT LPC_GPIO1
|
||||
#define PIO1_9_OUTPUT 0x00
|
||||
#define PIO1_9_TIMER LPC_TMR16B1
|
||||
#define PIO1_9_MATCH 0
|
||||
#define PIO1_9_PWM (0x01 << 0)
|
||||
|
|
@ -0,0 +1,475 @@
|
|||
|
||||
/** \file
|
||||
\brief MCU pin mappings.
|
||||
|
||||
Here we map the pins required by Teacup to the names known by CMSIS.
|
||||
*/
|
||||
|
||||
/** I/O pins.
|
||||
|
||||
In MBED, I/O pin handling is rather complicated. Lots of enums, lots of
|
||||
functions, spread over various files, slow execution (pin toggling about
|
||||
15 times slower than what we have here).
|
||||
|
||||
FASTIO by setting the BSRR (bit set/reset register),
|
||||
- Bit0-15 to set
|
||||
- Bit16-31 to reset.
|
||||
|
||||
Pins set for Nucleo F411RE, for other STM32F4-boards you need to add them.
|
||||
*/
|
||||
|
||||
#include "cmsis-stm32f4xx.h"
|
||||
|
||||
/** Pins for UART, the serial port.
|
||||
*/
|
||||
#define RX_UART1 PA_10
|
||||
#define TX_UART1 PA_9
|
||||
#define RX_UART2 PA_3
|
||||
#define TX_UART2 PA_2
|
||||
#define RX_UART6 PA_12
|
||||
#define TX_UART6 PA_11
|
||||
|
||||
/** Clock setup for APB1 and APB2 clock.
|
||||
*/
|
||||
#define F_CPU __SYSTEM_CLOCK
|
||||
|
||||
#define PPRE1_DIV (RCC_CFGR_PPRE1_DIV2) // 0x1000
|
||||
#define PPRE2_DIV (RCC_CFGR_PPRE2_DIV1) // 0x0000
|
||||
|
||||
#if PPRE1_DIV > 0
|
||||
#define APB1_DIV (1 << ((PPRE1_DIV >> 10) - 3))
|
||||
#else
|
||||
#define APB1_DIV (1)
|
||||
#endif
|
||||
#if PPRE2_DIV > 0
|
||||
#define APB2_DIV (1 << ((PPRE2_DIV >> 13) - 3))
|
||||
#else
|
||||
#define APB2_DIV (1)
|
||||
#endif
|
||||
|
||||
#define _APB1_CLOCK (__SYSTEM_CLOCK/APB1_DIV)
|
||||
#define _APB2_CLOCK (__SYSTEM_CLOCK/APB2_DIV)
|
||||
|
||||
/**
|
||||
We define only pins available on the Nucleo F411RE here.
|
||||
Use alphas for PORT and numerics for PIN, close to the design.
|
||||
*/
|
||||
#define NO_TIMER ((TIM_TypeDef *) 0)
|
||||
|
||||
#define PA_0_PIN 0
|
||||
#define PA_0_PORT GPIOA
|
||||
#define PA_0_ADC 0
|
||||
#define PA_0_AF 1
|
||||
#define PA_0_TIMER TIM2
|
||||
#define PA_0_CHANNEL 1
|
||||
#define PA_0_INVERT 0
|
||||
|
||||
#define PA_1_PIN 1
|
||||
#define PA_1_PORT GPIOA
|
||||
#define PA_1_ADC 1
|
||||
#define PA_1_AF 1
|
||||
#define PA_1_TIMER TIM2
|
||||
#define PA_1_CHANNEL 2
|
||||
#define PA_1_INVERT 0
|
||||
|
||||
#define PA_2_PIN 2
|
||||
#define PA_2_PORT GPIOA
|
||||
#define PA_2_AF 0
|
||||
#define PA_2_TIMER NO_TIMER
|
||||
#define PA_2_CHANNEL 1
|
||||
#define PA_2_INVERT 0
|
||||
// #define PA_2_ADC 2
|
||||
// #define PA_2_AF 3
|
||||
// #define PA_2_TIMER TIM9
|
||||
// #define PA_2_CHANNEL 1
|
||||
// #define PA_2_INVERT 0
|
||||
|
||||
#define PA_3_PIN 3
|
||||
#define PA_3_PORT GPIOA
|
||||
#define PA_3_AF 0
|
||||
#define PA_3_TIMER NO_TIMER
|
||||
#define PA_3_CHANNEL 1
|
||||
#define PA_3_INVERT 0
|
||||
// #define PA_3_ADC 3
|
||||
// #define PA_3_AF 3
|
||||
// #define PA_3_TIMER TIM9
|
||||
// #define PA_3_CHANNEL 2
|
||||
// #define PA_3_INVERT 0
|
||||
|
||||
#define PA_4_PIN 4
|
||||
#define PA_4_PORT GPIOA
|
||||
#define PA_4_ADC 4
|
||||
#define PA_4_AF 0
|
||||
#define PA_4_TIMER NO_TIMER
|
||||
#define PA_4_CHANNEL 1
|
||||
#define PA_4_INVERT 0
|
||||
|
||||
#define PA_5_PIN 5
|
||||
#define PA_5_PORT GPIOA
|
||||
#define PA_5_ADC 5
|
||||
#define PA_5_AF 1
|
||||
#define PA_5_TIMER TIM2
|
||||
#define PA_5_CHANNEL 1
|
||||
#define PA_5_INVERT 0
|
||||
|
||||
#define PA_6_PIN 6
|
||||
#define PA_6_PORT GPIOA
|
||||
#define PA_6_ADC 6
|
||||
#define PA_6_AF 0
|
||||
#define PA_6_TIMER NO_TIMER
|
||||
#define PA_6_CHANNEL 1
|
||||
#define PA_6_INVERT 0
|
||||
// #define PA_6_AF 2
|
||||
// #define PA_6_TIMER TIM3
|
||||
// #define PA_6_CHANNEL 1
|
||||
// #define PA_6_INVERT 0
|
||||
|
||||
#define PA_7_PIN 7
|
||||
#define PA_7_PORT GPIOA
|
||||
#define PA_7_ADC 7
|
||||
#define PA_7_AF 0
|
||||
#define PA_7_TIMER NO_TIMER
|
||||
#define PA_7_CHANNEL 1
|
||||
#define PA_7_INVERT 0
|
||||
// #define PA_7_AF 1
|
||||
// #define PA_7_TIMER TIM1
|
||||
// #define PA_7_CHANNEL 1
|
||||
// #define PA_7_INVERT 1
|
||||
|
||||
#define PA_8_PIN 8
|
||||
#define PA_8_PORT GPIOA
|
||||
#define PA_8_AF 1
|
||||
#define PA_8_TIMER TIM1
|
||||
#define PA_8_CHANNEL 1
|
||||
#define PA_8_INVERT 0
|
||||
|
||||
#define PA_9_PIN 9
|
||||
#define PA_9_PORT GPIOA
|
||||
#define PA_9_AF 1
|
||||
#define PA_9_TIMER TIM1
|
||||
#define PA_9_CHANNEL 2
|
||||
#define PA_9_INVERT 0
|
||||
|
||||
#define PA_10_PIN 10
|
||||
#define PA_10_PORT GPIOA
|
||||
#define PA_10_AF 1
|
||||
#define PA_10_TIMER TIM1
|
||||
#define PA_10_CHANNEL 3
|
||||
#define PA_10_INVERT 0
|
||||
|
||||
#define PA_11_PIN 11
|
||||
#define PA_11_PORT GPIOA
|
||||
#define PA_11_AF 1
|
||||
#define PA_11_TIMER TIM1
|
||||
#define PA_11_CHANNEL 4
|
||||
#define PA_11_INVERT 0
|
||||
|
||||
#define PA_12_PIN 12
|
||||
#define PA_12_PORT GPIOA
|
||||
#define PA_12_AF 0
|
||||
#define PA_12_TIMER NO_TIMER
|
||||
#define PA_12_CHANNEL 0
|
||||
#define PA_12_INVERT 0
|
||||
|
||||
#define PA_13_PIN 13
|
||||
#define PA_13_PORT GPIOA
|
||||
#define PA_13_AF 0
|
||||
#define PA_13_TIMER NO_TIMER
|
||||
#define PA_13_CHANNEL 0
|
||||
#define PA_13_INVERT 0
|
||||
|
||||
#define PA_14_PIN 14
|
||||
#define PA_14_PORT GPIOA
|
||||
#define PA_14_AF 0
|
||||
#define PA_14_TIMER NO_TIMER
|
||||
#define PA_14_CHANNEL 0
|
||||
#define PA_14_INVERT 0
|
||||
|
||||
#define PA_15_PIN 15
|
||||
#define PA_15_PORT GPIOA
|
||||
#define PA_15_AF 0
|
||||
#define PA_15_TIMER NO_TIMER
|
||||
#define PA_15_CHANNEL 0
|
||||
#define PA_15_INVERT 0
|
||||
// #define PA_15_AF 1
|
||||
// #define PA_15_TIMER TIM2
|
||||
// #define PA_15_CHANNEL 1
|
||||
// #define PA_15_INVERT 0
|
||||
|
||||
#define PB_0_PIN 0
|
||||
#define PB_0_PORT GPIOB
|
||||
#define PB_0_ADC 8
|
||||
#define PB_0_AF 2
|
||||
#define PB_0_TIMER TIM3
|
||||
#define PB_0_CHANNEL 3
|
||||
#define PB_0_INVERT 0
|
||||
|
||||
#define PB_1_PIN 1
|
||||
#define PB_1_PORT GPIOB
|
||||
#define PB_1_ADC 9
|
||||
#define PB_1_AF 2
|
||||
#define PB_1_TIMER TIM3
|
||||
#define PB_1_CHANNEL 4
|
||||
#define PB_1_INVERT 0
|
||||
|
||||
#define PB_2_PIN 2
|
||||
#define PB_2_PORT GPIOB
|
||||
#define PB_2_AF 0
|
||||
#define PB_2_TIMER NO_TIMER
|
||||
#define PB_2_CHANNEL 1
|
||||
#define PB_2_INVERT 0
|
||||
|
||||
#define PB_3_PIN 3
|
||||
#define PB_3_PORT GPIOB
|
||||
#define PB_3_AF 0
|
||||
#define PB_3_TIMER NO_TIMER
|
||||
#define PB_3_CHANNEL 1
|
||||
#define PB_3_INVERT 0
|
||||
// #define PB_3_AF 1
|
||||
// #define PB_3_TIMER TIM2
|
||||
// #define PB_3_CHANNEL 2
|
||||
// #define PB_3_INVERT 0
|
||||
|
||||
#define PB_4_PIN 4
|
||||
#define PB_4_PORT GPIOB
|
||||
#define PB_4_AF 2
|
||||
#define PB_4_TIMER TIM3
|
||||
#define PB_4_CHANNEL 1
|
||||
#define PB_4_INVERT 0
|
||||
|
||||
#define PB_5_PIN 5
|
||||
#define PB_5_PORT GPIOB
|
||||
#define PB_5_AF 2
|
||||
#define PB_5_TIMER TIM3
|
||||
#define PB_5_CHANNEL 2
|
||||
#define PB_5_INVERT 0
|
||||
|
||||
#define PB_6_PIN 6
|
||||
#define PB_6_PORT GPIOB
|
||||
#define PB_6_AF 2
|
||||
#define PB_6_TIMER TIM4
|
||||
#define PB_6_CHANNEL 1
|
||||
#define PB_6_INVERT 0
|
||||
|
||||
#define PB_7_PIN 7
|
||||
#define PB_7_PORT GPIOB
|
||||
#define PB_7_AF 2
|
||||
#define PB_7_TIMER TIM4
|
||||
#define PB_7_CHANNEL 2
|
||||
#define PB_7_INVERT 0
|
||||
|
||||
#define PB_8_PIN 8
|
||||
#define PB_8_PORT GPIOB
|
||||
#define PB_8_AF 2
|
||||
#define PB_8_TIMER TIM4
|
||||
#define PB_8_CHANNEL 3
|
||||
#define PB_8_INVERT 0
|
||||
|
||||
#define PB_9_PIN 9
|
||||
#define PB_9_PORT GPIOB
|
||||
#define PB_9_AF 2
|
||||
#define PB_9_TIMER TIM4
|
||||
#define PB_9_CHANNEL 4
|
||||
#define PB_9_INVERT 0
|
||||
|
||||
#define PB_10_PIN 10
|
||||
#define PB_10_PORT GPIOB
|
||||
#define PB_10_AF 1
|
||||
#define PB_10_TIMER TIM2
|
||||
#define PB_10_CHANNEL 3
|
||||
#define PB_10_INVERT 0
|
||||
|
||||
#define PB_12_PIN 12
|
||||
#define PB_12_PORT GPIOB
|
||||
#define PB_12_AF 0
|
||||
#define PB_12_TIMER NO_TIMER
|
||||
#define PB_12_CHANNEL 0
|
||||
#define PB_12_INVERT 0
|
||||
|
||||
#define PB_13_PIN 13
|
||||
#define PB_13_PORT GPIOB
|
||||
#define PB_13_AF 0
|
||||
#define PB_13_TIMER NO_TIMER
|
||||
#define PB_13_CHANNEL 0
|
||||
#define PB_13_INVERT 0
|
||||
// #define PB_13_AF 1
|
||||
// #define PB_13_TIMER TIM1
|
||||
// #define PB_13_CHANNEL 1
|
||||
// #define PB_13_INVERT 1
|
||||
|
||||
#define PB_14_PIN 14
|
||||
#define PB_14_PORT GPIOB
|
||||
#define PB_14_AF 0
|
||||
#define PB_14_TIMER NO_TIMER
|
||||
#define PB_14_CHANNEL 0
|
||||
#define PB_14_INVERT 0
|
||||
// #define PB_14_AF 1
|
||||
// #define PB_14_TIMER TIM1
|
||||
// #define PB_14_CHANNEL 2
|
||||
// #define PB_14_INVERT 1
|
||||
|
||||
#define PB_15_PIN 15
|
||||
#define PB_15_PORT GPIOB
|
||||
#define PB_15_AF 0
|
||||
#define PB_15_TIMER NO_TIMER
|
||||
#define PB_15_CHANNEL 0
|
||||
#define PB_15_INVERT 0
|
||||
// #define PB_15_AF 1
|
||||
// #define PB_15_TIMER TIM1
|
||||
// #define PB_15_CHANNEL 3
|
||||
// #define PB_15_INVERT 1
|
||||
|
||||
#define PC_0_PIN 0
|
||||
#define PC_0_PORT GPIOC
|
||||
#define PC_0_ADC 10
|
||||
#define PC_0_AF 0
|
||||
#define PC_0_TIMER NO_TIMER
|
||||
#define PC_0_CHANNEL 1
|
||||
#define PC_0_INVERT 0
|
||||
|
||||
#define PC_1_PIN 1
|
||||
#define PC_1_PORT GPIOC
|
||||
#define PC_1_ADC 11
|
||||
#define PC_1_AF 0
|
||||
#define PC_1_TIMER NO_TIMER
|
||||
#define PC_1_CHANNEL 1
|
||||
#define PC_1_INVERT 0
|
||||
|
||||
#define PC_2_PIN 2
|
||||
#define PC_2_PORT GPIOC
|
||||
#define PC_2_ADC 12
|
||||
#define PC_2_AF 0
|
||||
#define PC_2_TIMER NO_TIMER
|
||||
#define PC_2_CHANNEL 1
|
||||
#define PC_2_INVERT 0
|
||||
|
||||
#define PC_3_PIN 3
|
||||
#define PC_3_PORT GPIOC
|
||||
#define PC_3_ADC 13
|
||||
#define PC_3_AF 0
|
||||
#define PC_3_TIMER NO_TIMER
|
||||
#define PC_3_CHANNEL 1
|
||||
#define PC_3_INVERT 0
|
||||
|
||||
#define PC_4_PIN 4
|
||||
#define PC_4_PORT GPIOC
|
||||
#define PC_4_ADC 14
|
||||
#define PC_4_AF 0
|
||||
#define PC_4_TIMER NO_TIMER
|
||||
#define PC_4_CHANNEL 1
|
||||
#define PC_4_INVERT 0
|
||||
|
||||
#define PC_5_PIN 5
|
||||
#define PC_5_PORT GPIOC
|
||||
#define PC_5_ADC 15
|
||||
#define PC_5_AF 0
|
||||
#define PC_5_TIMER NO_TIMER
|
||||
#define PC_5_CHANNEL 1
|
||||
#define PC_5_INVERT 0
|
||||
|
||||
#define PC_6_PIN 6
|
||||
#define PC_6_PORT GPIOC
|
||||
#define PC_6_AF 0
|
||||
#define PC_6_TIMER NO_TIMER
|
||||
#define PC_6_CHANNEL 1
|
||||
#define PC_6_INVERT 0
|
||||
// #define PC_6_AF 2
|
||||
// #define PC_6_TIMER TIM3
|
||||
// #define PC_6_CHANNEL 1
|
||||
// #define PC_6_INVERT 0
|
||||
|
||||
#define PC_7_PIN 7
|
||||
#define PC_7_PORT GPIOC
|
||||
#define PC_7_AF 0
|
||||
#define PC_7_TIMER NO_TIMER
|
||||
#define PC_7_CHANNEL 1
|
||||
#define PC_7_INVERT 0
|
||||
// #define PC_7_AF 2
|
||||
// #define PC_7_TIMER TIM3
|
||||
// #define PC_7_CHANNEL 2
|
||||
// #define PC_7_INVERT 0
|
||||
|
||||
#define PC_8_PIN 8
|
||||
#define PC_8_PORT GPIOC
|
||||
#define PC_8_AF 0
|
||||
#define PC_8_TIMER NO_TIMER
|
||||
#define PC_8_CHANNEL 1
|
||||
#define PC_8_INVERT 0
|
||||
// #define PC_8_AF 2
|
||||
// #define PC_8_TIMER TIM3
|
||||
// #define PC_8_CHANNEL 3
|
||||
// #define PC_8_INVERT 0
|
||||
|
||||
#define PC_9_PIN 9
|
||||
#define PC_9_PORT GPIOC
|
||||
#define PC_9_AF 0
|
||||
#define PC_9_TIMER NO_TIMER
|
||||
#define PC_9_CHANNEL 1
|
||||
#define PC_9_INVERT 0
|
||||
// #define PC_9_AF 2
|
||||
// #define PC_9_TIMER TIM3
|
||||
// #define PC_9_CHANNEL 4
|
||||
// #define PC_9_INVERT 0
|
||||
|
||||
#define PC_10_PIN 10
|
||||
#define PC_10_PORT GPIOC
|
||||
#define PC_10_AF 0
|
||||
#define PC_10_TIMER NO_TIMER
|
||||
#define PC_10_CHANNEL 0
|
||||
#define PC_10_INVERT 0
|
||||
|
||||
#define PC_11_PIN 11
|
||||
#define PC_11_PORT GPIOC
|
||||
#define PC_11_AF 0
|
||||
#define PC_11_TIMER NO_TIMER
|
||||
#define PC_11_CHANNEL 0
|
||||
#define PC_11_INVERT 0
|
||||
|
||||
#define PC_12_PIN 12
|
||||
#define PC_12_PORT GPIOC
|
||||
#define PC_12_AF 0
|
||||
#define PC_12_TIMER NO_TIMER
|
||||
#define PC_12_CHANNEL 1
|
||||
#define PC_12_INVERT 0
|
||||
|
||||
#define PC_13_PIN 13
|
||||
#define PC_13_PORT GPIOC
|
||||
#define PC_13_AF 0
|
||||
#define PC_13_TIMER NO_TIMER
|
||||
#define PC_13_CHANNEL 1
|
||||
#define PC_13_INVERT 0
|
||||
|
||||
#define PC_14_PIN 14
|
||||
#define PC_14_PORT GPIOC
|
||||
#define PC_14_AF 0
|
||||
#define PC_14_TIMER NO_TIMER
|
||||
#define PC_14_CHANNEL 1
|
||||
#define PC_14_INVERT 0
|
||||
|
||||
#define PC_15_PIN 15
|
||||
#define PC_15_PORT GPIOC
|
||||
#define PC_15_AF 0
|
||||
#define PC_15_TIMER NO_TIMER
|
||||
#define PC_15_CHANNEL 1
|
||||
#define PC_15_INVERT 0
|
||||
|
||||
#define PD_2_PIN 2
|
||||
#define PD_2_PORT GPIOD
|
||||
#define PD_2_AF 0
|
||||
#define PD_2_TIMER NO_TIMER
|
||||
#define PD_2_CHANNEL 1
|
||||
#define PD_2_INVERT 0
|
||||
|
||||
#define PH_0_PIN 0
|
||||
#define PH_0_PORT GPIOH
|
||||
#define PH_0_AF 0
|
||||
#define PH_0_TIMER NO_TIMER
|
||||
#define PH_0_CHANNEL 1
|
||||
#define PH_0_INVERT 0
|
||||
|
||||
#define PH_1_PIN 1
|
||||
#define PH_1_PORT GPIOH
|
||||
#define PH_1_AF 0
|
||||
#define PH_1_TIMER NO_TIMER
|
||||
#define PH_1_CHANNEL 1
|
||||
#define PH_1_INVERT 0
|
||||
|
|
@ -0,0 +1,851 @@
|
|||
/*
|
||||
These pin definitions match the AT90USB1286 as used in the
|
||||
Teensy++ 2.0 carrier per http://www.pjrc.com/teensy/pinout.html
|
||||
|
||||
See Sprinter's https://github.com/kliment/Sprinter/blob/master/Sprinter/fastio.h or
|
||||
Marlin's lincomatic fork https://github.com/lincomatic/Marlin/blob/Marlin_v1/Marlin/fastio.h
|
||||
|
||||
*/
|
||||
#define NO_PWM_PIN (uint8_t *)0
|
||||
#define NO_TCCR_PIN *(uint8_t *)0
|
||||
|
||||
// SPI
|
||||
#define SCK DIO9
|
||||
#define MISO DIO11
|
||||
#define MOSI DIO10
|
||||
#define SS DIO8
|
||||
|
||||
|
||||
/*
|
||||
pins
|
||||
*/
|
||||
#define DIO0_PIN PIND0
|
||||
#define DIO0_RPORT PIND
|
||||
#define DIO0_WPORT PORTD
|
||||
#define DIO0_PWM &OCR0B
|
||||
#define DIO0_TCCR TCCR0A
|
||||
#define DIO0_COM COM0B1
|
||||
#define DIO0_DDR DDRD
|
||||
|
||||
#define DIO1_PIN PIND1
|
||||
#define DIO1_RPORT PIND
|
||||
#define DIO1_WPORT PORTD
|
||||
#define DIO1_PWM &OCR2B
|
||||
#define DIO1_TCCR TCCR2A
|
||||
#define DIO1_COM COM2B1
|
||||
#define DIO1_DDR DDRD
|
||||
|
||||
#define DIO2_PIN PIND2
|
||||
#define DIO2_RPORT PIND
|
||||
#define DIO2_WPORT PORTD
|
||||
#define DIO2_PWM NO_PWM_PIN
|
||||
#define DIO2_TCCR NO_TCCR_PIN
|
||||
#define DIO2_COM 0
|
||||
#define DIO2_DDR DDRD
|
||||
|
||||
#define DIO3_PIN PIND3
|
||||
#define DIO3_RPORT PIND
|
||||
#define DIO3_WPORT PORTD
|
||||
#define DIO3_PWM NO_PWM_PIN
|
||||
#define DIO3_TCCR NO_TCCR_PIN
|
||||
#define DIO3_COM 0
|
||||
#define DIO3_DDR DDRD
|
||||
|
||||
#define DIO4_PIN PIND4
|
||||
#define DIO4_RPORT PIND
|
||||
#define DIO4_WPORT PORTD
|
||||
#define DIO4_PWM NO_PWM_PIN
|
||||
#define DIO4_TCCR NO_TCCR_PIN
|
||||
#define DIO4_COM 0
|
||||
#define DIO4_DDR DDRD
|
||||
|
||||
#define DIO5_PIN PIND5
|
||||
#define DIO5_RPORT PIND
|
||||
#define DIO5_WPORT PORTD
|
||||
#define DIO5_PWM NO_PWM_PIN
|
||||
#define DIO5_TCCR NO_TCCR_PIN
|
||||
#define DIO5_COM 0
|
||||
#define DIO5_DDR DDRD
|
||||
|
||||
#define DIO6_PIN PIND6
|
||||
#define DIO6_RPORT PIND
|
||||
#define DIO6_WPORT PORTD
|
||||
#define DIO6_PWM NO_PWM_PIN
|
||||
#define DIO6_TCCR NO_TCCR_PIN
|
||||
#define DIO6_COM 0
|
||||
#define DIO6_DDR DDRD
|
||||
|
||||
#define DIO7_PIN PIND7
|
||||
#define DIO7_RPORT PIND
|
||||
#define DIO7_WPORT PORTD
|
||||
#define DIO7_PWM NO_PWM_PIN
|
||||
#define DIO7_TCCR NO_TCCR_PIN
|
||||
#define DIO7_COM 0
|
||||
#define DIO7_DDR DDRD
|
||||
|
||||
#define DIO8_PIN PINE0
|
||||
#define DIO8_RPORT PINE
|
||||
#define DIO8_WPORT PORTE
|
||||
#define DIO8_PWM NO_PWM_PIN
|
||||
#define DIO8_TCCR NO_TCCR_PIN
|
||||
#define DIO8_COM 0
|
||||
#define DIO8_DDR DDRE
|
||||
|
||||
#define DIO9_PIN PINE1
|
||||
#define DIO9_RPORT PINE
|
||||
#define DIO9_WPORT PORTE
|
||||
#define DIO9_PWM NO_PWM_PIN
|
||||
#define DIO9_TCCR NO_TCCR_PIN
|
||||
#define DIO9_COM 0
|
||||
#define DIO9_DDR DDRE
|
||||
|
||||
#define DIO10_PIN PINC0
|
||||
#define DIO10_RPORT PINC
|
||||
#define DIO10_WPORT PORTC
|
||||
#define DIO10_PWM NO_PWM_PIN
|
||||
#define DIO10_TCCR NO_TCCR_PIN
|
||||
#define DIO10_COM 0
|
||||
#define DIO10_DDR DDRC
|
||||
|
||||
#define DIO11_PIN PINC1
|
||||
#define DIO11_RPORT PINC
|
||||
#define DIO11_WPORT PORTC
|
||||
#define DIO11_PWM NO_PWM_PIN
|
||||
#define DIO11_TCCR NO_TCCR_PIN
|
||||
#define DIO11_COM 0
|
||||
#define DIO11_DDR DDRC
|
||||
|
||||
#define DIO12_PIN PINC2
|
||||
#define DIO12_RPORT PINC
|
||||
#define DIO12_WPORT PORTC
|
||||
#define DIO12_PWM NO_PWM_PIN
|
||||
#define DIO12_TCCR NO_TCCR_PIN
|
||||
#define DIO12_COM 0
|
||||
#define DIO12_DDR DDRC
|
||||
|
||||
#define DIO13_PIN PINC3
|
||||
#define DIO13_RPORT PINC
|
||||
#define DIO13_WPORT PORTC
|
||||
#define DIO13_PWM NO_PWM_PIN
|
||||
#define DIO13_TCCR NO_TCCR_PIN
|
||||
#define DIO13_COM 0
|
||||
#define DIO13_DDR DDRC
|
||||
|
||||
#define DIO14_PIN PINC4
|
||||
#define DIO14_RPORT PINC
|
||||
#define DIO14_WPORT PORTC
|
||||
#define DIO14_PWM &OCR3CL
|
||||
#define DIO14_TCCR TCCR3A
|
||||
#define DIO14_COM COM3C1
|
||||
#define DIO14_DDR DDRC
|
||||
|
||||
#define DIO15_PIN PINC5
|
||||
#define DIO15_RPORT PINC
|
||||
#define DIO15_WPORT PORTC
|
||||
#define DIO15_PWM &OCR3BL
|
||||
#define DIO15_TCCR TCCR3A
|
||||
#define DIO15_COM COM3B1
|
||||
#define DIO15_DDR DDRC
|
||||
|
||||
#define DIO16_PIN PINC6
|
||||
#define DIO16_RPORT PINC
|
||||
#define DIO16_WPORT PORTC
|
||||
#define DIO16_PWM &OCR3AL
|
||||
#define DIO16_TCCR TCCR3A
|
||||
#define DIO16_COM COM3A1
|
||||
#define DIO16_DDR DDRC
|
||||
|
||||
#define DIO17_PIN PINC7
|
||||
#define DIO17_RPORT PINC
|
||||
#define DIO17_WPORT PORTC
|
||||
#define DIO17_PWM NO_PWM_PIN
|
||||
#define DIO17_TCCR NO_TCCR_PIN
|
||||
#define DIO17_COM 0
|
||||
#define DIO17_DDR DDRC
|
||||
|
||||
#define DIO18_PIN PINE6
|
||||
#define DIO18_RPORT PINE
|
||||
#define DIO18_WPORT PORTE
|
||||
#define DIO18_PWM NO_PWM_PIN
|
||||
#define DIO18_TCCR NO_TCCR_PIN
|
||||
#define DIO18_COM 0
|
||||
#define DIO18_DDR DDRE
|
||||
|
||||
#define DIO19_PIN PINE7
|
||||
#define DIO19_RPORT PINE
|
||||
#define DIO19_WPORT PORTE
|
||||
#define DIO19_PWM NO_PWM_PIN
|
||||
#define DIO19_TCCR NO_TCCR_PIN
|
||||
#define DIO19_COM 0
|
||||
#define DIO19_DDR DDRE
|
||||
|
||||
#define DIO20_PIN PINB0
|
||||
#define DIO20_RPORT PINB
|
||||
#define DIO20_WPORT PORTB
|
||||
#define DIO20_PWM NO_PWM_PIN
|
||||
#define DIO20_TCCR NO_TCCR_PIN
|
||||
#define DIO20_COM 0
|
||||
#define DIO20_DDR DDRB
|
||||
|
||||
#define DIO21_PIN PINB1
|
||||
#define DIO21_RPORT PINB
|
||||
#define DIO21_WPORT PORTB
|
||||
#define DIO21_PWM NO_PWM_PIN
|
||||
#define DIO21_TCCR NO_TCCR_PIN
|
||||
#define DIO21_COM 0
|
||||
#define DIO21_DDR DDRB
|
||||
|
||||
#define DIO22_PIN PINB2
|
||||
#define DIO22_RPORT PINB
|
||||
#define DIO22_WPORT PORTB
|
||||
#define DIO22_PWM NO_PWM_PIN
|
||||
#define DIO22_TCCR NO_TCCR_PIN
|
||||
#define DIO22_COM 0
|
||||
#define DIO22_DDR DDRB
|
||||
|
||||
#define DIO23_PIN PINB3
|
||||
#define DIO23_RPORT PINB
|
||||
#define DIO23_WPORT PORTB
|
||||
#define DIO23_PWM NO_PWM_PIN
|
||||
#define DIO23_TCCR NO_TCCR_PIN
|
||||
#define DIO23_COM 0
|
||||
#define DIO23_DDR DDRB
|
||||
|
||||
#define DIO24_PIN PINB4
|
||||
#define DIO24_RPORT PINB
|
||||
#define DIO24_WPORT PORTB
|
||||
#define DIO24_PWM &OCR2A
|
||||
#define DIO24_TCCR TCCR2A
|
||||
#define DIO24_COM COM2A1
|
||||
#define DIO24_DDR DDRB
|
||||
|
||||
#define DIO25_PIN PINB5
|
||||
#define DIO25_RPORT PINB
|
||||
#define DIO25_WPORT PORTB
|
||||
#define DIO25_PWM NO_PWM_PIN /* &OCR1A would interfere with timer.c */
|
||||
#define DIO25_TCCR NO_TCCR_PIN
|
||||
#define DIO25_COM 0
|
||||
#define DIO25_DDR DDRB
|
||||
|
||||
#define DIO26_PIN PINB6
|
||||
#define DIO26_RPORT PINB
|
||||
#define DIO26_WPORT PORTB
|
||||
#define DIO26_PWM NO_PWM_PIN /* &OCR1B would interfere with timer.c */
|
||||
#define DIO26_TCCR NO_TCCR_PIN
|
||||
#define DIO26_COM 0
|
||||
#define DIO26_DDR DDRB
|
||||
|
||||
#define DIO27_PIN PINB7
|
||||
#define DIO27_RPORT PINB
|
||||
#define DIO27_WPORT PORTB
|
||||
#define DIO27_PWM &OCR0A
|
||||
#define DIO27_TCCR TCCR0A
|
||||
#define DIO27_COM COM0A1
|
||||
#define DIO27_DDR DDRB
|
||||
|
||||
#define DIO28_PIN PINA0
|
||||
#define DIO28_RPORT PINA
|
||||
#define DIO28_WPORT PORTA
|
||||
#define DIO28_PWM NO_PWM_PIN
|
||||
#define DIO28_TCCR NO_TCCR_PIN
|
||||
#define DIO28_COM 0
|
||||
#define DIO28_DDR DDRA
|
||||
|
||||
#define DIO29_PIN PINA1
|
||||
#define DIO29_RPORT PINA
|
||||
#define DIO29_WPORT PORTA
|
||||
#define DIO29_PWM NO_PWM_PIN
|
||||
#define DIO29_TCCR NO_TCCR_PIN
|
||||
#define DIO29_COM 0
|
||||
#define DIO29_DDR DDRA
|
||||
|
||||
#define DIO30_PIN PINA2
|
||||
#define DIO30_RPORT PINA
|
||||
#define DIO30_WPORT PORTA
|
||||
#define DIO30_PWM NO_PWM_PIN
|
||||
#define DIO30_TCCR NO_TCCR_PIN
|
||||
#define DIO30_COM 0
|
||||
#define DIO30_DDR DDRA
|
||||
|
||||
#define DIO31_PIN PINA3
|
||||
#define DIO31_RPORT PINA
|
||||
#define DIO31_WPORT PORTA
|
||||
#define DIO31_PWM NO_PWM_PIN
|
||||
#define DIO31_TCCR NO_TCCR_PIN
|
||||
#define DIO31_COM 0
|
||||
#define DIO31_DDR DDRA
|
||||
|
||||
#define DIO32_PIN PINA4
|
||||
#define DIO32_RPORT PINA
|
||||
#define DIO32_WPORT PORTA
|
||||
#define DIO32_PWM NO_PWM_PIN
|
||||
#define DIO32_TCCR NO_TCCR_PIN
|
||||
#define DIO32_COM 0
|
||||
#define DIO32_DDR DDRA
|
||||
|
||||
#define DIO33_PIN PINA5
|
||||
#define DIO33_RPORT PINA
|
||||
#define DIO33_WPORT PORTA
|
||||
#define DIO33_PWM NO_PWM_PIN
|
||||
#define DIO33_TCCR NO_TCCR_PIN
|
||||
#define DIO33_COM 0
|
||||
#define DIO33_DDR DDRA
|
||||
|
||||
#define DIO34_PIN PINA6
|
||||
#define DIO34_RPORT PINA
|
||||
#define DIO34_WPORT PORTA
|
||||
#define DIO34_PWM NO_PWM_PIN
|
||||
#define DIO34_TCCR NO_TCCR_PIN
|
||||
#define DIO34_COM 0
|
||||
#define DIO34_DDR DDRA
|
||||
|
||||
#define DIO35_PIN PINA7
|
||||
#define DIO35_RPORT PINA
|
||||
#define DIO35_WPORT PORTA
|
||||
#define DIO35_PWM NO_PWM_PIN
|
||||
#define DIO35_TCCR NO_TCCR_PIN
|
||||
#define DIO35_COM 0
|
||||
#define DIO35_DDR DDRA
|
||||
|
||||
#define DIO36_PIN PINE4
|
||||
#define DIO36_RPORT PINE
|
||||
#define DIO36_WPORT PORTE
|
||||
#define DIO36_PWM NO_PWM_PIN
|
||||
#define DIO36_TCCR NO_TCCR_PIN
|
||||
#define DIO36_COM 0
|
||||
#define DIO36_DDR DDRE
|
||||
|
||||
#define DIO37_PIN PINE5
|
||||
#define DIO37_RPORT PINE
|
||||
#define DIO37_WPORT PORTE
|
||||
#define DIO37_PWM NO_PWM_PIN
|
||||
#define DIO37_TCCR NO_TCCR_PIN
|
||||
#define DIO37_COM 0
|
||||
#define DIO37_DDR DDRE
|
||||
|
||||
#define DIO38_PIN PINF0
|
||||
#define DIO38_RPORT PINF
|
||||
#define DIO38_WPORT PORTF
|
||||
#define DIO38_PWM NO_PWM_PIN
|
||||
#define DIO38_TCCR NO_TCCR_PIN
|
||||
#define DIO38_COM 0
|
||||
#define DIO38_DDR DDRF
|
||||
|
||||
#define DIO39_PIN PINF1
|
||||
#define DIO39_RPORT PINF
|
||||
#define DIO39_WPORT PORTF
|
||||
#define DIO39_PWM NO_PWM_PIN
|
||||
#define DIO39_TCCR NO_TCCR_PIN
|
||||
#define DIO39_COM 0
|
||||
#define DIO39_DDR DDRF
|
||||
|
||||
#define AIO0_PIN PINF0
|
||||
#define AIO0_RPORT PINF
|
||||
#define AIO0_WPORT PORTF
|
||||
#define AIO0_PWM NO_PWM_PIN
|
||||
#define AIO0_TCCR NO_TCCR_PIN
|
||||
#define AIO0_COM 0
|
||||
#define AIO0_DDR DDRF
|
||||
#define AIO0_ADC 0
|
||||
|
||||
#define AIO1_PIN PINF1
|
||||
#define AIO1_RPORT PINF
|
||||
#define AIO1_WPORT PORTF
|
||||
#define AIO1_PWM NO_PWM_PIN
|
||||
#define AIO1_TCCR NO_TCCR_PIN
|
||||
#define AIO1_COM 0
|
||||
#define AIO1_DDR DDRF
|
||||
#define AIO1_ADC 1
|
||||
|
||||
#define AIO2_PIN PINF2
|
||||
#define AIO2_RPORT PINF
|
||||
#define AIO2_WPORT PORTF
|
||||
#define AIO2_PWM NO_PWM_PIN
|
||||
#define AIO2_TCCR NO_TCCR_PIN
|
||||
#define AIO2_COM 0
|
||||
#define AIO2_DDR DDRF
|
||||
#define AIO2_ADC 2
|
||||
|
||||
#define AIO3_PIN PINF3
|
||||
#define AIO3_RPORT PINF
|
||||
#define AIO3_WPORT PORTF
|
||||
#define AIO3_PWM NO_PWM_PIN
|
||||
#define AIO3_TCCR NO_TCCR_PIN
|
||||
#define AIO3_COM 0
|
||||
#define AIO3_DDR DDRF
|
||||
#define AIO3_ADC 3
|
||||
|
||||
#define AIO4_PIN PINF4
|
||||
#define AIO4_RPORT PINF
|
||||
#define AIO4_WPORT PORTF
|
||||
#define AIO4_PWM NO_PWM_PIN
|
||||
#define AIO4_TCCR NO_TCCR_PIN
|
||||
#define AIO4_COM 0
|
||||
#define AIO4_DDR DDRF
|
||||
#define AIO4_ADC 4
|
||||
|
||||
#define AIO5_PIN PINF5
|
||||
#define AIO5_RPORT PINF
|
||||
#define AIO5_WPORT PORTF
|
||||
#define AIO5_PWM NO_PWM_PIN
|
||||
#define AIO5_TCCR NO_TCCR_PIN
|
||||
#define AIO5_COM 0
|
||||
#define AIO5_DDR DDRF
|
||||
#define AIO5_ADC 5
|
||||
|
||||
#define AIO6_PIN PINF6
|
||||
#define AIO6_RPORT PINF
|
||||
#define AIO6_WPORT PORTF
|
||||
#define AIO6_PWM NO_PWM_PIN
|
||||
#define AIO6_TCCR NO_TCCR_PIN
|
||||
#define AIO6_COM 0
|
||||
#define AIO6_DDR DDRF
|
||||
#define AIO6_ADC 6
|
||||
|
||||
#define AIO7_PIN PINF7
|
||||
#define AIO7_RPORT PINF
|
||||
#define AIO7_WPORT PORTF
|
||||
#define AIO7_PWM NO_PWM_PIN
|
||||
#define AIO7_TCCR NO_TCCR_PIN
|
||||
#define AIO7_COM 0
|
||||
#define AIO7_DDR DDRF
|
||||
#define AIO7_ADC 7
|
||||
|
||||
#define DIO40_PIN PINF2
|
||||
#define DIO40_RPORT PINF
|
||||
#define DIO40_WPORT PORTF
|
||||
#define DIO40_PWM NO_PWM_PIN
|
||||
#define DIO40_TCCR NO_TCCR_PIN
|
||||
#define DIO40_COM 0
|
||||
#define DIO40_DDR DDRF
|
||||
|
||||
#define DIO41_PIN PINF3
|
||||
#define DIO41_RPORT PINF
|
||||
#define DIO41_WPORT PORTF
|
||||
#define DIO41_PWM NO_PWM_PIN
|
||||
#define DIO41_TCCR NO_TCCR_PIN
|
||||
#define DIO41_COM 0
|
||||
#define DIO41_DDR DDRF
|
||||
|
||||
#define DIO42_PIN PINF4
|
||||
#define DIO42_RPORT PINF
|
||||
#define DIO42_WPORT PORTF
|
||||
#define DIO42_PWM NO_PWM_PIN
|
||||
#define DIO42_TCCR NO_TCCR_PIN
|
||||
#define DIO42_COM 0
|
||||
#define DIO42_DDR DDRF
|
||||
|
||||
#define DIO43_PIN PINF5
|
||||
#define DIO43_RPORT PINF
|
||||
#define DIO43_WPORT PORTF
|
||||
#define DIO43_PWM NO_PWM_PIN
|
||||
#define DIO43_TCCR NO_TCCR_PIN
|
||||
#define DIO43_COM 0
|
||||
#define DIO43_DDR DDRF
|
||||
|
||||
#define DIO44_PIN PINF6
|
||||
#define DIO44_RPORT PINF
|
||||
#define DIO44_WPORT PORTF
|
||||
#define DIO44_PWM NO_PWM_PIN
|
||||
#define DIO44_TCCR NO_TCCR_PIN
|
||||
#define DIO44_COM 0
|
||||
#define DIO44_DDR DDRF
|
||||
|
||||
#define DIO45_PIN PINF7
|
||||
#define DIO45_RPORT PINF
|
||||
#define DIO45_WPORT PORTF
|
||||
#define DIO45_PWM NO_PWM_PIN
|
||||
#define DIO45_TCCR NO_TCCR_PIN
|
||||
#define DIO45_COM 0
|
||||
#define DIO45_DDR DDRF
|
||||
|
||||
|
||||
#undef PA0
|
||||
#define PA0_PIN PINA0
|
||||
#define PA0_RPORT PINA
|
||||
#define PA0_WPORT PORTA
|
||||
#define PA0_PWM NO_PWM_PIN
|
||||
#define PA0_TCCR NO_TCCR_PIN
|
||||
#define PA0_COM 0
|
||||
#define PA0_DDR DDRA
|
||||
#undef PA1
|
||||
#define PA1_PIN PINA1
|
||||
#define PA1_RPORT PINA
|
||||
#define PA1_WPORT PORTA
|
||||
#define PA1_PWM NO_PWM_PIN
|
||||
#define PA1_TCCR NO_TCCR_PIN
|
||||
#define PA1_COM 0
|
||||
#define PA1_DDR DDRA
|
||||
#undef PA2
|
||||
#define PA2_PIN PINA2
|
||||
#define PA2_RPORT PINA
|
||||
#define PA2_WPORT PORTA
|
||||
#define PA2_PWM NO_PWM_PIN
|
||||
#define PA2_TCCR NO_TCCR_PIN
|
||||
#define PA2_COM 0
|
||||
#define PA2_DDR DDRA
|
||||
#undef PA3
|
||||
#define PA3_PIN PINA3
|
||||
#define PA3_RPORT PINA
|
||||
#define PA3_WPORT PORTA
|
||||
#define PA3_PWM NO_PWM_PIN
|
||||
#define PA3_TCCR NO_TCCR_PIN
|
||||
#define PA3_COM 0
|
||||
#define PA3_DDR DDRA
|
||||
#undef PA4
|
||||
#define PA4_PIN PINA4
|
||||
#define PA4_RPORT PINA
|
||||
#define PA4_WPORT PORTA
|
||||
#define PA4_PWM NO_PWM_PIN
|
||||
#define PA4_TCCR NO_TCCR_PIN
|
||||
#define PA4_COM 0
|
||||
#define PA4_DDR DDRA
|
||||
#undef PA5
|
||||
#define PA5_PIN PINA5
|
||||
#define PA5_RPORT PINA
|
||||
#define PA5_WPORT PORTA
|
||||
#define PA5_PWM NO_PWM_PIN
|
||||
#define PA5_TCCR NO_TCCR_PIN
|
||||
#define PA5_COM 0
|
||||
#define PA5_DDR DDRA
|
||||
#undef PA6
|
||||
#define PA6_PIN PINA6
|
||||
#define PA6_RPORT PINA
|
||||
#define PA6_WPORT PORTA
|
||||
#define PA6_PWM NO_PWM_PIN
|
||||
#define PA6_TCCR NO_TCCR_PIN
|
||||
#define PA6_COM 0
|
||||
#define PA6_DDR DDRA
|
||||
#undef PA7
|
||||
#define PA7_PIN PINA7
|
||||
#define PA7_RPORT PINA
|
||||
#define PA7_WPORT PORTA
|
||||
#define PA7_PWM NO_PWM_PIN
|
||||
#define PA7_TCCR NO_TCCR_PIN
|
||||
#define PA7_COM 0
|
||||
#define PA7_DDR DDRA
|
||||
|
||||
#undef PB0
|
||||
#define PB0_PIN PINB0
|
||||
#define PB0_RPORT PINB
|
||||
#define PB0_WPORT PORTB
|
||||
#define PB0_PWM NO_PWM_PIN
|
||||
#define PB0_TCCR NO_TCCR_PIN
|
||||
#define PB0_COM 0
|
||||
#define PB0_DDR DDRB
|
||||
#undef PB1
|
||||
#define PB1_PIN PINB1
|
||||
#define PB1_RPORT PINB
|
||||
#define PB1_WPORT PORTB
|
||||
#define PB1_PWM NO_PWM_PIN
|
||||
#define PB1_TCCR NO_TCCR_PIN
|
||||
#define PB1_COM 0
|
||||
#define PB1_DDR DDRB
|
||||
#undef PB2
|
||||
#define PB2_PIN PINB2
|
||||
#define PB2_RPORT PINB
|
||||
#define PB2_WPORT PORTB
|
||||
#define PB2_PWM NO_PWM_PIN
|
||||
#define PB2_TCCR NO_TCCR_PIN
|
||||
#define PB2_COM 0
|
||||
#define PB2_DDR DDRB
|
||||
#undef PB3
|
||||
#define PB3_PIN PINB3
|
||||
#define PB3_RPORT PINB
|
||||
#define PB3_WPORT PORTB
|
||||
#define PB3_PWM NO_PWM_PIN
|
||||
#define PB3_TCCR NO_TCCR_PIN
|
||||
#define PB3_COM 0
|
||||
#define PB3_DDR DDRB
|
||||
#undef PB4
|
||||
#define PB4_PIN PINB4
|
||||
#define PB4_RPORT PINB
|
||||
#define PB4_WPORT PORTB
|
||||
#define PB4_PWM NO_PWM_PIN
|
||||
#define PB4_TCCR NO_TCCR_PIN
|
||||
#define PB4_COM 0
|
||||
#define PB4_DDR DDRB
|
||||
#undef PB5
|
||||
#define PB5_PIN PINB5
|
||||
#define PB5_RPORT PINB
|
||||
#define PB5_WPORT PORTB
|
||||
#define PB5_PWM NO_PWM_PIN
|
||||
#define PB5_TCCR NO_TCCR_PIN
|
||||
#define PB5_COM 0
|
||||
#define PB5_DDR DDRB
|
||||
#undef PB6
|
||||
#define PB6_PIN PINB6
|
||||
#define PB6_RPORT PINB
|
||||
#define PB6_WPORT PORTB
|
||||
#define PB6_PWM NO_PWM_PIN
|
||||
#define PB6_TCCR NO_TCCR_PIN
|
||||
#define PB6_COM 0
|
||||
#define PB6_DDR DDRB
|
||||
#undef PB7
|
||||
#define PB7_PIN PINB7
|
||||
#define PB7_RPORT PINB
|
||||
#define PB7_WPORT PORTB
|
||||
#define PB7_PWM NO_PWM_PIN
|
||||
#define PB7_TCCR NO_TCCR_PIN
|
||||
#define PB7_COM 0
|
||||
#define PB7_DDR DDRB
|
||||
|
||||
#undef PC0
|
||||
#define PC0_PIN PINC0
|
||||
#define PC0_RPORT PINC
|
||||
#define PC0_WPORT PORTC
|
||||
#define PC0_PWM NO_PWM_PIN
|
||||
#define PC0_TCCR NO_TCCR_PIN
|
||||
#define PC0_COM 0
|
||||
#define PC0_DDR DDRC
|
||||
#undef PC1
|
||||
#define PC1_PIN PINC1
|
||||
#define PC1_RPORT PINC
|
||||
#define PC1_WPORT PORTC
|
||||
#define PC1_PWM NO_PWM_PIN
|
||||
#define PC1_TCCR NO_TCCR_PIN
|
||||
#define PC1_COM 0
|
||||
#define PC1_DDR DDRC
|
||||
#undef PC2
|
||||
#define PC2_PIN PINC2
|
||||
#define PC2_RPORT PINC
|
||||
#define PC2_WPORT PORTC
|
||||
#define PC2_PWM NO_PWM_PIN
|
||||
#define PC2_TCCR NO_TCCR_PIN
|
||||
#define PC2_COM 0
|
||||
#define PC2_DDR DDRC
|
||||
#undef PC3
|
||||
#define PC3_PIN PINC3
|
||||
#define PC3_RPORT PINC
|
||||
#define PC3_WPORT PORTC
|
||||
#define PC3_PWM NO_PWM_PIN
|
||||
#define PC3_TCCR NO_TCCR_PIN
|
||||
#define PC3_COM 0
|
||||
#define PC3_DDR DDRC
|
||||
#undef PC4
|
||||
#define PC4_PIN PINC4
|
||||
#define PC4_RPORT PINC
|
||||
#define PC4_WPORT PORTC
|
||||
#define PC4_PWM NO_PWM_PIN
|
||||
#define PC4_TCCR NO_TCCR_PIN
|
||||
#define PC4_COM 0
|
||||
#define PC4_DDR DDRC
|
||||
#undef PC5
|
||||
#define PC5_PIN PINC5
|
||||
#define PC5_RPORT PINC
|
||||
#define PC5_WPORT PORTC
|
||||
#define PC5_PWM NO_PWM_PIN
|
||||
#define PC5_TCCR NO_TCCR_PIN
|
||||
#define PC5_COM 0
|
||||
#define PC5_DDR DDRC
|
||||
#undef PC6
|
||||
#define PC6_PIN PINC6
|
||||
#define PC6_RPORT PINC
|
||||
#define PC6_WPORT PORTC
|
||||
#define PC6_PWM NO_PWM_PIN
|
||||
#define PC6_TCCR NO_TCCR_PIN
|
||||
#define PC6_COM 0
|
||||
#define PC6_DDR DDRC
|
||||
#undef PC7
|
||||
#define PC7_PIN PINC7
|
||||
#define PC7_RPORT PINC
|
||||
#define PC7_WPORT PORTC
|
||||
#define PC7_PWM NO_PWM_PIN
|
||||
#define PC7_TCCR NO_TCCR_PIN
|
||||
#define PC7_COM 0
|
||||
#define PC7_DDR DDRC
|
||||
|
||||
#undef PD0
|
||||
#define PD0_PIN PIND0
|
||||
#define PD0_RPORT PIND
|
||||
#define PD0_WPORT PORTD
|
||||
#define PD0_PWM NO_PWM_PIN
|
||||
#define PD0_TCCR NO_TCCR_PIN
|
||||
#define PD0_COM 0
|
||||
#define PD0_DDR DDRD
|
||||
#undef PD1
|
||||
#define PD1_PIN PIND1
|
||||
#define PD1_RPORT PIND
|
||||
#define PD1_WPORT PORTD
|
||||
#define PD1_PWM NO_PWM_PIN
|
||||
#define PD1_TCCR NO_TCCR_PIN
|
||||
#define PD1_COM 0
|
||||
#define PD1_DDR DDRD
|
||||
#undef PD2
|
||||
#define PD2_PIN PIND2
|
||||
#define PD2_RPORT PIND
|
||||
#define PD2_WPORT PORTD
|
||||
#define PD2_PWM NO_PWM_PIN
|
||||
#define PD2_TCCR NO_TCCR_PIN
|
||||
#define PD2_COM 0
|
||||
#define PD2_DDR DDRD
|
||||
#undef PD3
|
||||
#define PD3_PIN PIND3
|
||||
#define PD3_RPORT PIND
|
||||
#define PD3_WPORT PORTD
|
||||
#define PD3_PWM NO_PWM_PIN
|
||||
#define PD3_TCCR NO_TCCR_PIN
|
||||
#define PD3_COM 0
|
||||
#define PD3_DDR DDRD
|
||||
#undef PD4
|
||||
#define PD4_PIN PIND4
|
||||
#define PD4_RPORT PIND
|
||||
#define PD4_WPORT PORTD
|
||||
#define PD4_PWM NO_PWM_PIN
|
||||
#define PD4_TCCR NO_TCCR_PIN
|
||||
#define PD4_COM 0
|
||||
#define PD4_DDR DDRD
|
||||
#undef PD5
|
||||
#define PD5_PIN PIND5
|
||||
#define PD5_RPORT PIND
|
||||
#define PD5_WPORT PORTD
|
||||
#define PD5_PWM NO_PWM_PIN
|
||||
#define PD5_TCCR NO_TCCR_PIN
|
||||
#define PD5_COM 0
|
||||
#define PD5_DDR DDRD
|
||||
#undef PD6
|
||||
#define PD6_PIN PIND6
|
||||
#define PD6_RPORT PIND
|
||||
#define PD6_WPORT PORTD
|
||||
#define PD6_PWM NO_PWM_PIN
|
||||
#define PD6_TCCR NO_TCCR_PIN
|
||||
#define PD6_COM 0
|
||||
#define PD6_DDR DDRD
|
||||
#undef PD7
|
||||
#define PD7_PIN PIND7
|
||||
#define PD7_RPORT PIND
|
||||
#define PD7_WPORT PORTD
|
||||
#define PD7_PWM NO_PWM_PIN
|
||||
#define PD7_TCCR NO_TCCR_PIN
|
||||
#define PD7_COM 0
|
||||
#define PD7_DDR DDRD
|
||||
|
||||
#undef PE0
|
||||
#define PE0_PIN PINE0
|
||||
#define PE0_RPORT PINE
|
||||
#define PE0_WPORT PORTE
|
||||
#define PE0_PWM NO_PWM_PIN
|
||||
#define PE0_TCCR NO_TCCR_PIN
|
||||
#define PE0_COM 0
|
||||
#define PE0_DDR DDRE
|
||||
#undef PE1
|
||||
#define PE1_PIN PINE1
|
||||
#define PE1_RPORT PINE
|
||||
#define PE1_WPORT PORTE
|
||||
#define PE1_PWM NO_PWM_PIN
|
||||
#define PE1_TCCR NO_TCCR_PIN
|
||||
#define PE1_COM 0
|
||||
#define PE1_DDR DDRE
|
||||
#undef PE2
|
||||
#define PE2_PIN PINE2
|
||||
#define PE2_RPORT PINE
|
||||
#define PE2_WPORT PORTE
|
||||
#define PE2_PWM NO_PWM_PIN
|
||||
#define PE2_TCCR NO_TCCR_PIN
|
||||
#define PE2_COM 0
|
||||
#define PE2_DDR DDRE
|
||||
#undef PE3
|
||||
#define PE3_PIN PINE3
|
||||
#define PE3_RPORT PINE
|
||||
#define PE3_WPORT PORTE
|
||||
#define PE3_PWM NO_PWM_PIN
|
||||
#define PE3_TCCR NO_TCCR_PIN
|
||||
#define PE3_COM 0
|
||||
#define PE3_DDR DDRE
|
||||
#undef PE4
|
||||
#define PE4_PIN PINE4
|
||||
#define PE4_RPORT PINE
|
||||
#define PE4_WPORT PORTE
|
||||
#define PE4_PWM NO_PWM_PIN
|
||||
#define PE4_TCCR NO_TCCR_PIN
|
||||
#define PE4_COM 0
|
||||
#define PE4_DDR DDRE
|
||||
#undef PE5
|
||||
#define PE5_PIN PINE5
|
||||
#define PE5_RPORT PINE
|
||||
#define PE5_WPORT PORTE
|
||||
#define PE5_PWM NO_PWM_PIN
|
||||
#define PE5_TCCR NO_TCCR_PIN
|
||||
#define PE5_COM 0
|
||||
#define PE5_DDR DDRE
|
||||
#undef PE6
|
||||
#define PE6_PIN PINE6
|
||||
#define PE6_RPORT PINE
|
||||
#define PE6_WPORT PORTE
|
||||
#define PE6_PWM NO_PWM_PIN
|
||||
#define PE6_TCCR NO_TCCR_PIN
|
||||
#define PE6_COM 0
|
||||
#define PE6_DDR DDRE
|
||||
#undef PE7
|
||||
#define PE7_PIN PINE7
|
||||
#define PE7_RPORT PINE
|
||||
#define PE7_WPORT PORTE
|
||||
#define PE7_PWM NO_PWM_PIN
|
||||
#define PE7_TCCR NO_TCCR_PIN
|
||||
#define PE7_COM 0
|
||||
#define PE7_DDR DDRE
|
||||
|
||||
#undef PF0
|
||||
#define PF0_PIN PINF0
|
||||
#define PF0_RPORT PINF
|
||||
#define PF0_WPORT PORTF
|
||||
#define PF0_PWM NO_PWM_PIN
|
||||
#define PF0_TCCR NO_TCCR_PIN
|
||||
#define PF0_COM 0
|
||||
#define PF0_DDR DDRF
|
||||
#undef PF1
|
||||
#define PF1_PIN PINF1
|
||||
#define PF1_RPORT PINF
|
||||
#define PF1_WPORT PORTF
|
||||
#define PF1_PWM NO_PWM_PIN
|
||||
#define PF1_TCCR NO_TCCR_PIN
|
||||
#define PF1_COM 0
|
||||
#define PF1_DDR DDRF
|
||||
#undef PF2
|
||||
#define PF2_PIN PINF2
|
||||
#define PF2_RPORT PINF
|
||||
#define PF2_WPORT PORTF
|
||||
#define PF2_PWM NO_PWM_PIN
|
||||
#define PF2_TCCR NO_TCCR_PIN
|
||||
#define PF2_COM 0
|
||||
#define PF2_DDR DDRF
|
||||
#undef PF3
|
||||
#define PF3_PIN PINF3
|
||||
#define PF3_RPORT PINF
|
||||
#define PF3_WPORT PORTF
|
||||
#define PF3_PWM NO_PWM_PIN
|
||||
#define PF3_TCCR NO_TCCR_PIN
|
||||
#define PF3_COM 0
|
||||
#define PF3_DDR DDRF
|
||||
#undef PF4
|
||||
#define PF4_PIN PINF4
|
||||
#define PF4_RPORT PINF
|
||||
#define PF4_WPORT PORTF
|
||||
#define PF4_PWM NO_PWM_PIN
|
||||
#define PF4_TCCR NO_TCCR_PIN
|
||||
#define PF4_COM 0
|
||||
#define PF4_DDR DDRF
|
||||
#undef PF5
|
||||
#define PF5_PIN PINF5
|
||||
#define PF5_RPORT PINF
|
||||
#define PF5_WPORT PORTF
|
||||
#define PF5_PWM NO_PWM_PIN
|
||||
#define PF5_TCCR NO_TCCR_PIN
|
||||
#define PF5_COM 0
|
||||
#define PF5_DDR DDRF
|
||||
#undef PF6
|
||||
#define PF6_PIN PINF6
|
||||
#define PF6_RPORT PINF
|
||||
#define PF6_WPORT PORTF
|
||||
#define PF6_PWM NO_PWM_PIN
|
||||
#define PF6_TCCR NO_TCCR_PIN
|
||||
#define PF6_COM 0
|
||||
#define PF6_DDR DDRF
|
||||
#undef PF7
|
||||
#define PF7_PIN PINF7
|
||||
#define PF7_RPORT PINF
|
||||
#define PF7_WPORT PORTF
|
||||
#define PF7_PWM NO_PWM_PIN
|
||||
#define PF7_TCCR NO_TCCR_PIN
|
||||
#define PF7_COM 0
|
||||
#define PF7_DDR DDRF
|
||||
|
|
@ -0,0 +1,860 @@
|
|||
#define NO_PWM_PIN (uint8_t *)0
|
||||
#define NO_TCCR_PIN *(uint8_t *)0
|
||||
|
||||
// SPI
|
||||
#define SCK DIO9
|
||||
#define MISO DIO11
|
||||
#define MOSI DIO10
|
||||
#define SS DIO8
|
||||
|
||||
/*
|
||||
pins
|
||||
*/
|
||||
#define DIO0_PIN PINA0
|
||||
#define DIO0_RPORT PINA
|
||||
#define DIO0_WPORT PORTA
|
||||
#define DIO0_PWM NO_PWM_PIN
|
||||
#define DIO0_TCCR NO_TCCR_PIN
|
||||
#define DIO0_COM 0
|
||||
#define DIO0_DDR DDRA
|
||||
|
||||
#define DIO1_PIN PINA1
|
||||
#define DIO1_RPORT PINA
|
||||
#define DIO1_WPORT PORTA
|
||||
#define DIO1_PWM NO_PWM_PIN
|
||||
#define DIO1_TCCR NO_TCCR_PIN
|
||||
#define DIO1_COM 0
|
||||
#define DIO1_DDR DDRA
|
||||
|
||||
#define DIO2_PIN PINA2
|
||||
#define DIO2_RPORT PINA
|
||||
#define DIO2_WPORT PORTA
|
||||
#define DIO2_PWM NO_PWM_PIN
|
||||
#define DIO2_TCCR NO_TCCR_PIN
|
||||
#define DIO2_COM 0
|
||||
#define DIO2_DDR DDRA
|
||||
|
||||
#define DIO3_PIN PINA3
|
||||
#define DIO3_RPORT PINA
|
||||
#define DIO3_WPORT PORTA
|
||||
#define DIO3_PWM NO_PWM_PIN
|
||||
#define DIO3_TCCR NO_TCCR_PIN
|
||||
#define DIO3_COM 0
|
||||
#define DIO3_DDR DDRA
|
||||
|
||||
#define DIO4_PIN PINA4
|
||||
#define DIO4_RPORT PINA
|
||||
#define DIO4_WPORT PORTA
|
||||
#define DIO4_PWM NO_PWM_PIN
|
||||
#define DIO4_TCCR NO_TCCR_PIN
|
||||
#define DIO4_COM 0
|
||||
#define DIO4_DDR DDRA
|
||||
|
||||
#define DIO5_PIN PINA5
|
||||
#define DIO5_RPORT PINA
|
||||
#define DIO5_WPORT PORTA
|
||||
#define DIO5_PWM NO_PWM_PIN
|
||||
#define DIO5_TCCR NO_TCCR_PIN
|
||||
#define DIO5_COM 0
|
||||
#define DIO5_DDR DDRA
|
||||
|
||||
#define DIO6_PIN PINA6
|
||||
#define DIO6_RPORT PINA
|
||||
#define DIO6_WPORT PORTA
|
||||
#define DIO6_PWM NO_PWM_PIN
|
||||
#define DIO6_TCCR NO_TCCR_PIN
|
||||
#define DIO6_COM 0
|
||||
#define DIO6_DDR DDRA
|
||||
|
||||
#define DIO7_PIN PINA7
|
||||
#define DIO7_RPORT PINA
|
||||
#define DIO7_WPORT PORTA
|
||||
#define DIO7_PWM NO_PWM_PIN
|
||||
#define DIO7_TCCR NO_TCCR_PIN
|
||||
#define DIO7_COM 0
|
||||
#define DIO7_DDR DDRA
|
||||
|
||||
#define DIO8_PIN PINB0
|
||||
#define DIO8_RPORT PINB
|
||||
#define DIO8_WPORT PORTB
|
||||
#define DIO8_PWM NO_PWM_PIN
|
||||
#define DIO8_TCCR NO_TCCR_PIN
|
||||
#define DIO8_COM 0
|
||||
#define DIO8_DDR DDRB
|
||||
|
||||
#define DIO9_PIN PINB1
|
||||
#define DIO9_RPORT PINB
|
||||
#define DIO9_WPORT PORTB
|
||||
#define DIO9_PWM NO_PWM_PIN
|
||||
#define DIO9_TCCR NO_TCCR_PIN
|
||||
#define DIO9_COM 0
|
||||
#define DIO9_DDR DDRB
|
||||
|
||||
#define DIO10_PIN PINB2
|
||||
#define DIO10_RPORT PINB
|
||||
#define DIO10_WPORT PORTB
|
||||
#define DIO10_PWM NO_PWM_PIN
|
||||
#define DIO10_TCCR NO_TCCR_PIN
|
||||
#define DIO10_COM 0
|
||||
#define DIO10_DDR DDRB
|
||||
|
||||
#define DIO11_PIN PINB3
|
||||
#define DIO11_RPORT PINB
|
||||
#define DIO11_WPORT PORTB
|
||||
#define DIO11_PWM NO_PWM_PIN
|
||||
#define DIO11_TCCR NO_TCCR_PIN
|
||||
#define DIO11_COM 0
|
||||
#define DIO11_DDR DDRB
|
||||
|
||||
#define DIO12_PIN PINB4
|
||||
#define DIO12_RPORT PINB
|
||||
#define DIO12_WPORT PORTB
|
||||
#define DIO12_PWM NO_PWM_PIN
|
||||
#define DIO12_TCCR NO_TCCR_PIN
|
||||
#define DIO12_COM 0
|
||||
#define DIO12_DDR DDRB
|
||||
|
||||
#define DIO13_PIN PINB5
|
||||
#define DIO13_RPORT PINB
|
||||
#define DIO13_WPORT PORTB
|
||||
#define DIO13_PWM NO_PWM_PIN
|
||||
#define DIO13_TCCR NO_TCCR_PIN
|
||||
#define DIO13_COM 0
|
||||
#define DIO13_DDR DDRB
|
||||
|
||||
#define DIO14_PIN PINB6
|
||||
#define DIO14_RPORT PINB
|
||||
#define DIO14_WPORT PORTB
|
||||
#define DIO14_PWM NO_PWM_PIN
|
||||
#define DIO14_TCCR NO_TCCR_PIN
|
||||
#define DIO14_COM 0
|
||||
#define DIO14_DDR DDRB
|
||||
|
||||
#define DIO15_PIN PINB7
|
||||
#define DIO15_RPORT PINB
|
||||
#define DIO15_WPORT PORTB
|
||||
#define DIO15_PWM NO_PWM_PIN
|
||||
#define DIO15_TCCR NO_TCCR_PIN
|
||||
#define DIO15_COM 0
|
||||
#define DIO15_DDR DDRB
|
||||
|
||||
#define DIO16_PIN PINC0
|
||||
#define DIO16_RPORT PINC
|
||||
#define DIO16_WPORT PORTC
|
||||
#define DIO16_PWM NO_PWM_PIN
|
||||
#define DIO16_TCCR NO_TCCR_PIN
|
||||
#define DIO16_COM 0
|
||||
#define DIO16_DDR DDRC
|
||||
|
||||
#define DIO17_PIN PINC1
|
||||
#define DIO17_RPORT PINC
|
||||
#define DIO17_WPORT PORTC
|
||||
#define DIO17_PWM NO_PWM_PIN
|
||||
#define DIO17_TCCR NO_TCCR_PIN
|
||||
#define DIO17_COM 0
|
||||
#define DIO17_DDR DDRC
|
||||
|
||||
#define DIO18_PIN PINC2
|
||||
#define DIO18_RPORT PINC
|
||||
#define DIO18_WPORT PORTC
|
||||
#define DIO18_PWM NO_PWM_PIN
|
||||
#define DIO18_TCCR NO_TCCR_PIN
|
||||
#define DIO18_COM 0
|
||||
#define DIO18_DDR DDRC
|
||||
|
||||
#define DIO19_PIN PINC3
|
||||
#define DIO19_RPORT PINC
|
||||
#define DIO19_WPORT PORTC
|
||||
#define DIO19_PWM NO_PWM_PIN
|
||||
#define DIO19_TCCR NO_TCCR_PIN
|
||||
#define DIO19_COM 0
|
||||
#define DIO19_DDR DDRC
|
||||
|
||||
#define DIO20_PIN PINC4
|
||||
#define DIO20_RPORT PINC
|
||||
#define DIO20_WPORT PORTC
|
||||
#define DIO20_PWM NO_PWM_PIN
|
||||
#define DIO20_TCCR NO_TCCR_PIN
|
||||
#define DIO20_COM 0
|
||||
#define DIO20_DDR DDRC
|
||||
|
||||
#define DIO21_PIN PINC5
|
||||
#define DIO21_RPORT PINC
|
||||
#define DIO21_WPORT PORTC
|
||||
#define DIO21_PWM NO_PWM_PIN
|
||||
#define DIO21_TCCR NO_TCCR_PIN
|
||||
#define DIO21_COM 0
|
||||
#define DIO21_DDR DDRC
|
||||
|
||||
#define DIO22_PIN PINC6
|
||||
#define DIO22_RPORT PINC
|
||||
#define DIO22_WPORT PORTC
|
||||
#define DIO22_PWM NO_PWM_PIN
|
||||
#define DIO22_TCCR NO_TCCR_PIN
|
||||
#define DIO22_COM 0
|
||||
#define DIO22_DDR DDRC
|
||||
|
||||
#define DIO23_PIN PINC7
|
||||
#define DIO23_RPORT PINC
|
||||
#define DIO23_WPORT PORTC
|
||||
#define DIO23_PWM NO_PWM_PIN
|
||||
#define DIO23_TCCR NO_TCCR_PIN
|
||||
#define DIO23_COM 0
|
||||
#define DIO23_DDR DDRC
|
||||
|
||||
#define DIO24_PIN PIND0
|
||||
#define DIO24_RPORT PIND
|
||||
#define DIO24_WPORT PORTD
|
||||
#define DIO24_PWM NO_PWM_PIN
|
||||
#define DIO24_TCCR NO_TCCR_PIN
|
||||
#define DIO24_COM 0
|
||||
#define DIO24_DDR DDRD
|
||||
|
||||
#define DIO25_PIN PIND1
|
||||
#define DIO25_RPORT PIND
|
||||
#define DIO25_WPORT PORTD
|
||||
#define DIO25_PWM NO_PWM_PIN
|
||||
#define DIO25_TCCR NO_TCCR_PIN
|
||||
#define DIO25_COM 0
|
||||
#define DIO25_DDR DDRD
|
||||
|
||||
#define DIO26_PIN PIND2
|
||||
#define DIO26_RPORT PIND
|
||||
#define DIO26_WPORT PORTD
|
||||
#define DIO26_PWM NO_PWM_PIN
|
||||
#define DIO26_TCCR NO_TCCR_PIN
|
||||
#define DIO26_COM 0
|
||||
#define DIO26_DDR DDRD
|
||||
|
||||
#define DIO27_PIN PIND3
|
||||
#define DIO27_RPORT PIND
|
||||
#define DIO27_WPORT PORTD
|
||||
#define DIO27_PWM NO_PWM_PIN
|
||||
#define DIO27_TCCR NO_TCCR_PIN
|
||||
#define DIO27_COM 0
|
||||
#define DIO27_DDR DDRD
|
||||
|
||||
#define DIO28_PIN PIND4
|
||||
#define DIO28_RPORT PIND
|
||||
#define DIO28_WPORT PORTD
|
||||
#define DIO28_PWM NO_PWM_PIN
|
||||
#define DIO28_TCCR NO_TCCR_PIN
|
||||
#define DIO28_COM 0
|
||||
#define DIO28_DDR DDRD
|
||||
|
||||
#define DIO29_PIN PIND5
|
||||
#define DIO29_RPORT PIND
|
||||
#define DIO29_WPORT PORTD
|
||||
#define DIO29_PWM NO_PWM_PIN
|
||||
#define DIO29_TCCR NO_TCCR_PIN
|
||||
#define DIO29_COM 0
|
||||
#define DIO29_DDR DDRD
|
||||
|
||||
#define DIO30_PIN PIND6
|
||||
#define DIO30_RPORT PIND
|
||||
#define DIO30_WPORT PORTD
|
||||
#define DIO30_PWM NO_PWM_PIN
|
||||
#define DIO30_TCCR NO_TCCR_PIN
|
||||
#define DIO30_COM 0
|
||||
#define DIO30_DDR DDRD
|
||||
|
||||
#define DIO31_PIN PIND7
|
||||
#define DIO31_RPORT PIND
|
||||
#define DIO31_WPORT PORTD
|
||||
#define DIO31_PWM NO_PWM_PIN
|
||||
#define DIO31_TCCR NO_TCCR_PIN
|
||||
#define DIO31_COM 0
|
||||
#define DIO31_DDR DDRD
|
||||
|
||||
|
||||
#define DIO32_PIN PINE0
|
||||
#define DIO32_RPORT PINE
|
||||
#define DIO32_WPORT PORTE
|
||||
#define DIO32_PWM NO_PWM_PIN
|
||||
#define DIO32_TCCR NO_TCCR_PIN
|
||||
#define DIO32_COM 0
|
||||
#define DIO32_DDR DDRE
|
||||
|
||||
#define DIO33_PIN PINE1
|
||||
#define DIO33_RPORT PINE
|
||||
#define DIO33_WPORT PORTE
|
||||
#define DIO33_PWM NO_PWM_PIN
|
||||
#define DIO33_TCCR NO_TCCR_PIN
|
||||
#define DIO33_COM 0
|
||||
#define DIO33_DDR DDRE
|
||||
|
||||
#define DIO34_PIN PINE2
|
||||
#define DIO34_RPORT PINE
|
||||
#define DIO34_WPORT PORTE
|
||||
#define DIO34_PWM NO_PWM_PIN
|
||||
#define DIO34_TCCR NO_TCCR_PIN
|
||||
#define DIO34_COM 0
|
||||
#define DIO34_DDR DDRE
|
||||
|
||||
#define DIO35_PIN PINE3
|
||||
#define DIO35_RPORT PINE
|
||||
#define DIO35_WPORT PORTE
|
||||
#define DIO35_PWM NO_PWM_PIN
|
||||
#define DIO35_TCCR NO_TCCR_PIN
|
||||
#define DIO35_COM 0
|
||||
#define DIO35_DDR DDRE
|
||||
|
||||
#define DIO36_PIN PINE4
|
||||
#define DIO36_RPORT PINE
|
||||
#define DIO36_WPORT PORTE
|
||||
#define DIO36_PWM NO_PWM_PIN
|
||||
#define DIO36_TCCR NO_TCCR_PIN
|
||||
#define DIO36_COM 0
|
||||
#define DIO36_DDR DDRE
|
||||
|
||||
#define DIO37_PIN PINE5
|
||||
#define DIO37_RPORT PINE
|
||||
#define DIO37_WPORT PORTE
|
||||
#define DIO37_PWM NO_PWM_PIN
|
||||
#define DIO37_TCCR NO_TCCR_PIN
|
||||
#define DIO37_COM 0
|
||||
#define DIO37_DDR DDRE
|
||||
|
||||
#define DIO38_PIN PINE6
|
||||
#define DIO38_RPORT PINE
|
||||
#define DIO38_WPORT PORTE
|
||||
#define DIO38_PWM NO_PWM_PIN
|
||||
#define DIO38_TCCR NO_TCCR_PIN
|
||||
#define DIO38_COM 0
|
||||
#define DIO38_DDR DDRE
|
||||
|
||||
#define DIO39_PIN PINE7
|
||||
#define DIO39_RPORT PINE
|
||||
#define DIO39_WPORT PORTE
|
||||
#define DIO39_PWM NO_PWM_PIN
|
||||
#define DIO39_TCCR NO_TCCR_PIN
|
||||
#define DIO39_COM 0
|
||||
#define DIO39_DDR DDRE
|
||||
|
||||
#define AIO0_PIN PINF0
|
||||
#define AIO0_RPORT PINF
|
||||
#define AIO0_WPORT PORTF
|
||||
#define AIO0_PWM NO_PWM_PIN
|
||||
#define AIO0_TCCR NO_TCCR_PIN
|
||||
#define AIO0_COM 0
|
||||
#define AIO0_DDR DDRF
|
||||
#define AIO0_ADC 0
|
||||
|
||||
#define AIO1_PIN PINF1
|
||||
#define AIO1_RPORT PINF
|
||||
#define AIO1_WPORT PORTF
|
||||
#define AIO1_PWM NO_PWM_PIN
|
||||
#define AIO1_TCCR NO_TCCR_PIN
|
||||
#define AIO1_COM 0
|
||||
#define AIO1_DDR DDRF
|
||||
#define AIO1_ADC 1
|
||||
|
||||
#define AIO2_PIN PINF2
|
||||
#define AIO2_RPORT PINF
|
||||
#define AIO2_WPORT PORTF
|
||||
#define AIO2_PWM NO_PWM_PIN
|
||||
#define AIO2_TCCR NO_TCCR_PIN
|
||||
#define AIO2_COM 0
|
||||
#define AIO2_DDR DDRF
|
||||
#define AIO2_ADC 2
|
||||
|
||||
#define AIO3_PIN PINF3
|
||||
#define AIO3_RPORT PINF
|
||||
#define AIO3_WPORT PORTF
|
||||
#define AIO3_PWM NO_PWM_PIN
|
||||
#define AIO3_TCCR NO_TCCR_PIN
|
||||
#define AIO3_COM 0
|
||||
#define AIO3_DDR DDRF
|
||||
#define AIO3_ADC 3
|
||||
|
||||
#define AIO4_PIN PINF4
|
||||
#define AIO4_RPORT PINF
|
||||
#define AIO4_WPORT PORTF
|
||||
#define AIO4_PWM NO_PWM_PIN
|
||||
#define AIO4_TCCR NO_TCCR_PIN
|
||||
#define AIO4_COM 0
|
||||
#define AIO4_DDR DDRF
|
||||
#define AIO4_ADC 4
|
||||
|
||||
#define AIO5_PIN PINF5
|
||||
#define AIO5_RPORT PINF
|
||||
#define AIO5_WPORT PORTF
|
||||
#define AIO5_PWM NO_PWM_PIN
|
||||
#define AIO5_TCCR NO_TCCR_PIN
|
||||
#define AIO5_COM 0
|
||||
#define AIO5_DDR DDRF
|
||||
#define AIO5_ADC 5
|
||||
|
||||
#define AIO6_PIN PINF6
|
||||
#define AIO6_RPORT PINF
|
||||
#define AIO6_WPORT PORTF
|
||||
#define AIO6_PWM NO_PWM_PIN
|
||||
#define AIO6_TCCR NO_TCCR_PIN
|
||||
#define AIO6_COM 0
|
||||
#define AIO6_DDR DDRF
|
||||
#define AIO6_ADC 6
|
||||
|
||||
#define AIO7_PIN PINF7
|
||||
#define AIO7_RPORT PINF
|
||||
#define AIO7_WPORT PORTF
|
||||
#define AIO7_PWM NO_PWM_PIN
|
||||
#define AIO7_TCCR NO_TCCR_PIN
|
||||
#define AIO7_COM 0
|
||||
#define AIO7_DDR DDRF
|
||||
#define AIO7_ADC 7
|
||||
|
||||
#define DIO40_PIN PINF0
|
||||
#define DIO40_RPORT PINF
|
||||
#define DIO40_WPORT PORTF
|
||||
#define DIO40_PWM NO_PWM_PIN
|
||||
#define DIO40_TCCR NO_TCCR_PIN
|
||||
#define DIO40_COM 0
|
||||
#define DIO40_DDR DDRF
|
||||
|
||||
#define DIO41_PIN PINF1
|
||||
#define DIO41_RPORT PINF
|
||||
#define DIO41_WPORT PORTF
|
||||
#define DIO41_PWM NO_PWM_PIN
|
||||
#define DIO41_TCCR NO_TCCR_PIN
|
||||
#define DIO41_COM 0
|
||||
#define DIO41_DDR DDRF
|
||||
|
||||
#define DIO42_PIN PINF2
|
||||
#define DIO42_RPORT PINF
|
||||
#define DIO42_WPORT PORTF
|
||||
#define DIO42_PWM NO_PWM_PIN
|
||||
#define DIO42_TCCR NO_TCCR_PIN
|
||||
#define DIO42_COM 0
|
||||
#define DIO42_DDR DDRF
|
||||
|
||||
#define DIO43_PIN PINF3
|
||||
#define DIO43_RPORT PINF
|
||||
#define DIO43_WPORT PORTF
|
||||
#define DIO43_PWM NO_PWM_PIN
|
||||
#define DIO43_TCCR NO_TCCR_PIN
|
||||
#define DIO43_COM 0
|
||||
#define DIO43_DDR DDRF
|
||||
|
||||
#define DIO44_PIN PINF4
|
||||
#define DIO44_RPORT PINF
|
||||
#define DIO44_WPORT PORTF
|
||||
#define DIO44_PWM NO_PWM_PIN
|
||||
#define DIO44_TCCR NO_TCCR_PIN
|
||||
#define DIO44_COM 0
|
||||
#define DIO44_DDR DDRF
|
||||
|
||||
#define DIO45_PIN PINF5
|
||||
#define DIO45_RPORT PINF
|
||||
#define DIO45_WPORT PORTF
|
||||
#define DIO45_PWM NO_PWM_PIN
|
||||
#define DIO45_TCCR NO_TCCR_PIN
|
||||
#define DIO45_COM 0
|
||||
#define DIO45_DDR DDRF
|
||||
|
||||
#define DIO46_PIN PINF6
|
||||
#define DIO46_RPORT PINF
|
||||
#define DIO46_WPORT PORTF
|
||||
#define DIO46_PWM NO_PWM_PIN
|
||||
#define DIO46_TCCR NO_TCCR_PIN
|
||||
#define DIO46_COM 0
|
||||
#define DIO46_DDR DDRF
|
||||
|
||||
#define DIO47_PIN PINF7
|
||||
#define DIO47_RPORT PINF
|
||||
#define DIO47_WPORT PORTF
|
||||
#define DIO47_PWM NO_PWM_PIN
|
||||
#define DIO47_TCCR NO_TCCR_PIN
|
||||
#define DIO47_COM 0
|
||||
#define DIO47_DDR DDRF
|
||||
|
||||
|
||||
|
||||
#undef PA0
|
||||
#define PA0_PIN PINA0
|
||||
#define PA0_RPORT PINA
|
||||
#define PA0_WPORT PORTA
|
||||
#define PA0_PWM NO_PWM_PIN
|
||||
#define PA0_TCCR NO_TCCR_PIN
|
||||
#define PA0_COM 0
|
||||
#define PA0_DDR DDRA
|
||||
#undef PA1
|
||||
#define PA1_PIN PINA1
|
||||
#define PA1_RPORT PINA
|
||||
#define PA1_WPORT PORTA
|
||||
#define PA1_PWM NO_PWM_PIN
|
||||
#define PA1_TCCR NO_TCCR_PIN
|
||||
#define PA1_COM 0
|
||||
#define PA1_DDR DDRA
|
||||
#undef PA2
|
||||
#define PA2_PIN PINA2
|
||||
#define PA2_RPORT PINA
|
||||
#define PA2_WPORT PORTA
|
||||
#define PA2_PWM NO_PWM_PIN
|
||||
#define PA2_TCCR NO_TCCR_PIN
|
||||
#define PA2_COM 0
|
||||
#define PA2_DDR DDRA
|
||||
#undef PA3
|
||||
#define PA3_PIN PINA3
|
||||
#define PA3_RPORT PINA
|
||||
#define PA3_WPORT PORTA
|
||||
#define PA3_PWM NO_PWM_PIN
|
||||
#define PA3_TCCR NO_TCCR_PIN
|
||||
#define PA3_COM 0
|
||||
#define PA3_DDR DDRA
|
||||
#undef PA4
|
||||
#define PA4_PIN PINA4
|
||||
#define PA4_RPORT PINA
|
||||
#define PA4_WPORT PORTA
|
||||
#define PA4_PWM NO_PWM_PIN
|
||||
#define PA4_TCCR NO_TCCR_PIN
|
||||
#define PA4_COM 0
|
||||
#define PA4_DDR DDRA
|
||||
#undef PA5
|
||||
#define PA5_PIN PINA5
|
||||
#define PA5_RPORT PINA
|
||||
#define PA5_WPORT PORTA
|
||||
#define PA5_PWM NO_PWM_PIN
|
||||
#define PA5_TCCR NO_TCCR_PIN
|
||||
#define PA5_COM 0
|
||||
#define PA5_DDR DDRA
|
||||
#undef PA6
|
||||
#define PA6_PIN PINA6
|
||||
#define PA6_RPORT PINA
|
||||
#define PA6_WPORT PORTA
|
||||
#define PA6_PWM NO_PWM_PIN
|
||||
#define PA6_TCCR NO_TCCR_PIN
|
||||
#define PA6_COM 0
|
||||
#define PA6_DDR DDRA
|
||||
#undef PA7
|
||||
#define PA7_PIN PINA7
|
||||
#define PA7_RPORT PINA
|
||||
#define PA7_WPORT PORTA
|
||||
#define PA7_PWM NO_PWM_PIN
|
||||
#define PA7_TCCR NO_TCCR_PIN
|
||||
#define PA7_COM 0
|
||||
#define PA7_DDR DDRA
|
||||
|
||||
#undef PB0
|
||||
#define PB0_PIN PINB0
|
||||
#define PB0_RPORT PINB
|
||||
#define PB0_WPORT PORTB
|
||||
#define PB0_PWM NO_PWM_PIN
|
||||
#define PB0_TCCR NO_TCCR_PIN
|
||||
#define PB0_COM 0
|
||||
#define PB0_DDR DDRB
|
||||
#undef PB1
|
||||
#define PB1_PIN PINB1
|
||||
#define PB1_RPORT PINB
|
||||
#define PB1_WPORT PORTB
|
||||
#define PB1_PWM NO_PWM_PIN
|
||||
#define PB1_TCCR NO_TCCR_PIN
|
||||
#define PB1_COM 0
|
||||
#define PB1_DDR DDRB
|
||||
#undef PB2
|
||||
#define PB2_PIN PINB2
|
||||
#define PB2_RPORT PINB
|
||||
#define PB2_WPORT PORTB
|
||||
#define PB2_PWM NO_PWM_PIN
|
||||
#define PB2_TCCR NO_TCCR_PIN
|
||||
#define PB2_COM 0
|
||||
#define PB2_DDR DDRB
|
||||
#undef PB3
|
||||
#define PB3_PIN PINB3
|
||||
#define PB3_RPORT PINB
|
||||
#define PB3_WPORT PORTB
|
||||
#define PB3_PWM NO_PWM_PIN
|
||||
#define PB3_TCCR NO_TCCR_PIN
|
||||
#define PB3_COM 0
|
||||
#define PB3_DDR DDRB
|
||||
#undef PB4
|
||||
#define PB4_PIN PINB4
|
||||
#define PB4_RPORT PINB
|
||||
#define PB4_WPORT PORTB
|
||||
#define PB4_PWM NO_PWM_PIN
|
||||
#define PB4_TCCR NO_TCCR_PIN
|
||||
#define PB4_COM 0
|
||||
#define PB4_DDR DDRB
|
||||
#undef PB5
|
||||
#define PB5_PIN PINB5
|
||||
#define PB5_RPORT PINB
|
||||
#define PB5_WPORT PORTB
|
||||
#define PB5_PWM NO_PWM_PIN
|
||||
#define PB5_TCCR NO_TCCR_PIN
|
||||
#define PB5_COM 0
|
||||
#define PB5_DDR DDRB
|
||||
#undef PB6
|
||||
#define PB6_PIN PINB6
|
||||
#define PB6_RPORT PINB
|
||||
#define PB6_WPORT PORTB
|
||||
#define PB6_PWM NO_PWM_PIN
|
||||
#define PB6_TCCR NO_TCCR_PIN
|
||||
#define PB6_COM 0
|
||||
#define PB6_DDR DDRB
|
||||
#undef PB7
|
||||
#define PB7_PIN PINB7
|
||||
#define PB7_RPORT PINB
|
||||
#define PB7_WPORT PORTB
|
||||
#define PB7_PWM NO_PWM_PIN
|
||||
#define PB7_TCCR NO_TCCR_PIN
|
||||
#define PB7_COM 0
|
||||
#define PB7_DDR DDRB
|
||||
|
||||
#undef PC0
|
||||
#define PC0_PIN PINC0
|
||||
#define PC0_RPORT PINC
|
||||
#define PC0_WPORT PORTC
|
||||
#define PC0_PWM NO_PWM_PIN
|
||||
#define PC0_TCCR NO_TCCR_PIN
|
||||
#define PC0_COM 0
|
||||
#define PC0_DDR DDRC
|
||||
#undef PC1
|
||||
#define PC1_PIN PINC1
|
||||
#define PC1_RPORT PINC
|
||||
#define PC1_WPORT PORTC
|
||||
#define PC1_PWM NO_PWM_PIN
|
||||
#define PC1_TCCR NO_TCCR_PIN
|
||||
#define PC1_COM 0
|
||||
#define PC1_DDR DDRC
|
||||
#undef PC2
|
||||
#define PC2_PIN PINC2
|
||||
#define PC2_RPORT PINC
|
||||
#define PC2_WPORT PORTC
|
||||
#define PC2_PWM NO_PWM_PIN
|
||||
#define PC2_TCCR NO_TCCR_PIN
|
||||
#define PC2_COM 0
|
||||
#define PC2_DDR DDRC
|
||||
#undef PC3
|
||||
#define PC3_PIN PINC3
|
||||
#define PC3_RPORT PINC
|
||||
#define PC3_WPORT PORTC
|
||||
#define PC3_PWM NO_PWM_PIN
|
||||
#define PC3_TCCR NO_TCCR_PIN
|
||||
#define PC3_COM 0
|
||||
#define PC3_DDR DDRC
|
||||
#undef PC4
|
||||
#define PC4_PIN PINC4
|
||||
#define PC4_RPORT PINC
|
||||
#define PC4_WPORT PORTC
|
||||
#define PC4_PWM NO_PWM_PIN
|
||||
#define PC4_TCCR NO_TCCR_PIN
|
||||
#define PC4_COM 0
|
||||
#define PC4_DDR DDRC
|
||||
#undef PC5
|
||||
#define PC5_PIN PINC5
|
||||
#define PC5_RPORT PINC
|
||||
#define PC5_WPORT PORTC
|
||||
#define PC5_PWM NO_PWM_PIN
|
||||
#define PC5_TCCR NO_TCCR_PIN
|
||||
#define PC5_COM 0
|
||||
#define PC5_DDR DDRC
|
||||
#undef PC6
|
||||
#define PC6_PIN PINC6
|
||||
#define PC6_RPORT PINC
|
||||
#define PC6_WPORT PORTC
|
||||
#define PC6_PWM NO_PWM_PIN
|
||||
#define PC6_TCCR NO_TCCR_PIN
|
||||
#define PC6_COM 0
|
||||
#define PC6_DDR DDRC
|
||||
#undef PC7
|
||||
#define PC7_PIN PINC7
|
||||
#define PC7_RPORT PINC
|
||||
#define PC7_WPORT PORTC
|
||||
#define PC7_PWM NO_PWM_PIN
|
||||
#define PC7_TCCR NO_TCCR_PIN
|
||||
#define PC7_COM 0
|
||||
#define PC7_DDR DDRC
|
||||
|
||||
#undef PD0
|
||||
#define PD0_PIN PIND0
|
||||
#define PD0_RPORT PIND
|
||||
#define PD0_WPORT PORTD
|
||||
#define PD0_PWM NO_PWM_PIN
|
||||
#define PD0_TCCR NO_TCCR_PIN
|
||||
#define PD0_COM 0
|
||||
#define PD0_DDR DDRD
|
||||
#undef PD1
|
||||
#define PD1_PIN PIND1
|
||||
#define PD1_RPORT PIND
|
||||
#define PD1_WPORT PORTD
|
||||
#define PD1_PWM NO_PWM_PIN
|
||||
#define PD1_TCCR NO_TCCR_PIN
|
||||
#define PD1_COM 0
|
||||
#define PD1_DDR DDRD
|
||||
#undef PD2
|
||||
#define PD2_PIN PIND2
|
||||
#define PD2_RPORT PIND
|
||||
#define PD2_WPORT PORTD
|
||||
#define PD2_PWM NO_PWM_PIN
|
||||
#define PD2_TCCR NO_TCCR_PIN
|
||||
#define PD2_COM 0
|
||||
#define PD2_DDR DDRD
|
||||
#undef PD3
|
||||
#define PD3_PIN PIND3
|
||||
#define PD3_RPORT PIND
|
||||
#define PD3_WPORT PORTD
|
||||
#define PD3_PWM NO_PWM_PIN
|
||||
#define PD3_TCCR NO_TCCR_PIN
|
||||
#define PD3_COM 0
|
||||
#define PD3_DDR DDRD
|
||||
#undef PD4
|
||||
#define PD4_PIN PIND4
|
||||
#define PD4_RPORT PIND
|
||||
#define PD4_WPORT PORTD
|
||||
#define PD4_PWM NO_PWM_PIN
|
||||
#define PD4_TCCR NO_TCCR_PIN
|
||||
#define PD4_COM 0
|
||||
#define PD4_DDR DDRD
|
||||
#undef PD5
|
||||
#define PD5_PIN PIND5
|
||||
#define PD5_RPORT PIND
|
||||
#define PD5_WPORT PORTD
|
||||
#define PD5_PWM NO_PWM_PIN
|
||||
#define PD5_TCCR NO_TCCR_PIN
|
||||
#define PD5_COM 0
|
||||
#define PD5_DDR DDRD
|
||||
#undef PD6
|
||||
#define PD6_PIN PIND6
|
||||
#define PD6_RPORT PIND
|
||||
#define PD6_WPORT PORTD
|
||||
#define PD6_PWM NO_PWM_PIN
|
||||
#define PD6_TCCR NO_TCCR_PIN
|
||||
#define PD6_COM 0
|
||||
#define PD6_DDR DDRD
|
||||
#undef PD7
|
||||
#define PD7_PIN PIND7
|
||||
#define PD7_RPORT PIND
|
||||
#define PD7_WPORT PORTD
|
||||
#define PD7_PWM NO_PWM_PIN
|
||||
#define PD7_TCCR NO_TCCR_PIN
|
||||
#define PD7_COM 0
|
||||
#define PD7_DDR DDRD
|
||||
|
||||
#undef PE0
|
||||
#define PE0_PIN PINE0
|
||||
#define PE0_RPORT PINE
|
||||
#define PE0_WPORT PORTE
|
||||
#define PE0_PWM NO_PWM_PIN
|
||||
#define PE0_TCCR NO_TCCR_PIN
|
||||
#define PE0_COM 0
|
||||
#define PE0_DDR DDRE
|
||||
#undef PE1
|
||||
#define PE1_PIN PINE1
|
||||
#define PE1_RPORT PINE
|
||||
#define PE1_WPORT PORTE
|
||||
#define PE1_PWM NO_PWM_PIN
|
||||
#define PE1_TCCR NO_TCCR_PIN
|
||||
#define PE1_COM 0
|
||||
#define PE1_DDR DDRE
|
||||
#undef PE2
|
||||
#define PE2_PIN PINE2
|
||||
#define PE2_RPORT PINE
|
||||
#define PE2_WPORT PORTE
|
||||
#define PE2_PWM NO_PWM_PIN
|
||||
#define PE2_TCCR NO_TCCR_PIN
|
||||
#define PE2_COM 0
|
||||
#define PE2_DDR DDRE
|
||||
#undef PE3
|
||||
#define PE3_PIN PINE3
|
||||
#define PE3_RPORT PINE
|
||||
#define PE3_WPORT PORTE
|
||||
#define PE3_PWM NO_PWM_PIN
|
||||
#define PE3_TCCR NO_TCCR_PIN
|
||||
#define PE3_COM 0
|
||||
#define PE3_DDR DDRE
|
||||
#undef PE4
|
||||
#define PE4_PIN PINE4
|
||||
#define PE4_RPORT PINE
|
||||
#define PE4_WPORT PORTE
|
||||
#define PE4_PWM NO_PWM_PIN
|
||||
#define PE4_TCCR NO_TCCR_PIN
|
||||
#define PE4_COM 0
|
||||
#define PE4_DDR DDRE
|
||||
#undef PE5
|
||||
#define PE5_PIN PINE5
|
||||
#define PE5_RPORT PINE
|
||||
#define PE5_WPORT PORTE
|
||||
#define PE5_PWM NO_PWM_PIN
|
||||
#define PE5_TCCR NO_TCCR_PIN
|
||||
#define PE5_COM 0
|
||||
#define PE5_DDR DDRE
|
||||
#undef PE6
|
||||
#define PE6_PIN PINE6
|
||||
#define PE6_RPORT PINE
|
||||
#define PE6_WPORT PORTE
|
||||
#define PE6_PWM NO_PWM_PIN
|
||||
#define PE6_TCCR NO_TCCR_PIN
|
||||
#define PE6_COM 0
|
||||
#define PE6_DDR DDRE
|
||||
#undef PE7
|
||||
#define PE7_PIN PINE7
|
||||
#define PE7_RPORT PINE
|
||||
#define PE7_WPORT PORTE
|
||||
#define PE7_PWM NO_PWM_PIN
|
||||
#define PE7_TCCR NO_TCCR_PIN
|
||||
#define PE7_COM 0
|
||||
#define PE7_DDR DDRE
|
||||
|
||||
#undef PF0
|
||||
#define PF0_PIN PINF0
|
||||
#define PF0_RPORT PINF
|
||||
#define PF0_WPORT PORTF
|
||||
#define PF0_PWM NO_PWM_PIN
|
||||
#define PF0_TCCR NO_TCCR_PIN
|
||||
#define PF0_COM 0
|
||||
#define PF0_DDR DDRF
|
||||
#undef PF1
|
||||
#define PF1_PIN PINF1
|
||||
#define PF1_RPORT PINF
|
||||
#define PF1_WPORT PORTF
|
||||
#define PF1_PWM NO_PWM_PIN
|
||||
#define PF1_TCCR NO_TCCR_PIN
|
||||
#define PF1_COM 0
|
||||
#define PF1_DDR DDRF
|
||||
#undef PF2
|
||||
#define PF2_PIN PINF2
|
||||
#define PF2_RPORT PINF
|
||||
#define PF2_WPORT PORTF
|
||||
#define PF2_PWM NO_PWM_PIN
|
||||
#define PF2_TCCR NO_TCCR_PIN
|
||||
#define PF2_COM 0
|
||||
#define PF2_DDR DDRF
|
||||
#undef PF3
|
||||
#define PF3_PIN PINF3
|
||||
#define PF3_RPORT PINF
|
||||
#define PF3_WPORT PORTF
|
||||
#define PF3_PWM NO_PWM_PIN
|
||||
#define PF3_TCCR NO_TCCR_PIN
|
||||
#define PF3_COM 0
|
||||
#define PF3_DDR DDRF
|
||||
#undef PF4
|
||||
#define PF4_PIN PINF4
|
||||
#define PF4_RPORT PINF
|
||||
#define PF4_WPORT PORTF
|
||||
#define PF4_PWM NO_PWM_PIN
|
||||
#define PF4_TCCR NO_TCCR_PIN
|
||||
#define PF4_COM 0
|
||||
#define PF4_DDR DDRF
|
||||
#undef PF5
|
||||
#define PF5_PIN PINF5
|
||||
#define PF5_RPORT PINF
|
||||
#define PF5_WPORT PORTF
|
||||
#define PF5_PWM NO_PWM_PIN
|
||||
#define PF5_TCCR NO_TCCR_PIN
|
||||
#define PF5_COM 0
|
||||
#define PF5_DDR DDRF
|
||||
#undef PF6
|
||||
#define PF6_PIN PINF6
|
||||
#define PF6_RPORT PINF
|
||||
#define PF6_WPORT PORTF
|
||||
#define PF6_PWM NO_PWM_PIN
|
||||
#define PF6_TCCR NO_TCCR_PIN
|
||||
#define PF6_COM 0
|
||||
#define PF6_DDR DDRF
|
||||
#undef PF7
|
||||
#define PF7_PIN PINF7
|
||||
#define PF7_RPORT PINF
|
||||
#define PF7_WPORT PORTF
|
||||
#define PF7_PWM NO_PWM_PIN
|
||||
#define PF7_TCCR NO_TCCR_PIN
|
||||
#define PF7_COM 0
|
||||
#define PF7_DDR DDRF
|
||||
|
|
@ -0,0 +1,125 @@
|
|||
// Examples of configurations for other boards
|
||||
// The pins names should be AIOx (Analog Input Output) or DIOx (Digital Input Output), with x a number.
|
||||
// For those names check proper arduio_xxx.h files. AVRlib names will work also anyway...
|
||||
// TODO: all other boards configurations needs to be checked and fixed
|
||||
#ifdef MOTHERBOARD
|
||||
#if MOTHERBOARD==1
|
||||
// ramps 1.4
|
||||
#if !(defined (__AVR_ATmega1280__) || defined (__AVR_ATmega2560__))
|
||||
#error Oops! Make sure you have 'Arduino 1280 / Mega 2560' selected from the 'Tools -> Boards' menu.
|
||||
#endif
|
||||
#define X_STEP_PIN DIO54
|
||||
//PF0 // 54
|
||||
#define X_DIR_PIN DIO55
|
||||
//PF1 // 55
|
||||
//#define X_MIN_PIN DIO3
|
||||
//PE5 // 3
|
||||
//#define X_MAX_PIN DIO2
|
||||
//PE4 // 2
|
||||
#define X_ENABLE_PIN DIO38
|
||||
//PD7 // 38
|
||||
#define X_INVERT_DIR
|
||||
#define X_INVERT_MIN
|
||||
#define X_INVERT_MAX
|
||||
#define X_INVERT_ENABLE
|
||||
|
||||
#define Y_STEP_PIN DIO60
|
||||
//PL3 // 60
|
||||
#define Y_DIR_PIN DIO61
|
||||
//PL1 // 61
|
||||
#define Y_MIN_PIN DIO14
|
||||
//PJ1 // 14
|
||||
//#define Y_MAX_PIN DIO15
|
||||
//PJ0 // 15
|
||||
#define Y_ENABLE_PIN DIO56
|
||||
//PF2 // 56
|
||||
#define Y_INVERT_DIR
|
||||
#define Y_INVERT_MIN
|
||||
#define Y_INVERT_MAX
|
||||
#define Y_INVERT_ENABLE
|
||||
|
||||
/*#define Z_STEP_PIN DIO46
|
||||
* //PL3 * // 46
|
||||
#define Z_DIR_PIN DIO48
|
||||
//PL1 // 48
|
||||
#define Z_MIN_PIN DIO18
|
||||
//PD3 // 18
|
||||
#define Z_MAX_PIN DIO19
|
||||
//PD2 // 19
|
||||
#define Z_ENABLE_PIN DIO62
|
||||
//PK0 // 62
|
||||
#define Z_INVERT_DIR
|
||||
#define Z_INVERT_MIN
|
||||
#define Z_INVERT_MAX
|
||||
#define Z_INVERT_ENABLE
|
||||
|
||||
#define E_STEP_PIN DIO26
|
||||
//PA4 // 26
|
||||
#define E_DIR_PIN DIO28
|
||||
//PA6 // 28
|
||||
#define E_ENABLE_PIN DIO24
|
||||
//PA2 // 24
|
||||
#define E_INVERT_DIR
|
||||
#define E_INVERT_ENABLE
|
||||
|
||||
// pwms: 10, 8, led 13, analogin: 13,14
|
||||
*/
|
||||
#endif
|
||||
#if MOTHERBOARD==2
|
||||
// cnc shield v3
|
||||
#ifndef __AVR_ATmega328P__
|
||||
#error Oops! Make sure you have 'Arduino Duemilanove w/ ATMega328' selected from the 'Tools -> Boards' menu.
|
||||
#endif
|
||||
#define X_STEP_PIN DIO2
|
||||
//PD2 // 2
|
||||
#define X_DIR_PIN DIO5
|
||||
//PD5 // 5
|
||||
|
||||
//#define X_MIN_PIN DIO9
|
||||
//PB1 9
|
||||
//#define X_MAX_PIN
|
||||
#define X_ENABLE_PIN DIO8
|
||||
//PB0 // 8
|
||||
#define X_INVERT_DIR
|
||||
#define X_INVERT_MIN
|
||||
#define X_INVERT_MAX
|
||||
#define X_INVERT_ENABLE
|
||||
|
||||
#define Y_STEP_PIN DIO3
|
||||
//PD3 //3
|
||||
#define Y_DIR_PIN DIO6
|
||||
//PD6 //6
|
||||
#define Y_MIN_PIN DIO10
|
||||
//PB2 //10
|
||||
//#define Y_MAX_PIN
|
||||
#define Y_ENABLE_PIN DIO8
|
||||
//PB0 //8
|
||||
#define Y_INVERT_DIR
|
||||
#define Y_INVERT_MIN
|
||||
#define Y_INVERT_MAX
|
||||
#define Y_INVERT_ENABLE
|
||||
|
||||
/*#define Z_STEP_PIN DIO4
|
||||
//PD4 // 4
|
||||
#define Z_DIR_PIN DIO7
|
||||
//PD7 //7
|
||||
#define Z_MIN_PIN DIO11
|
||||
// PB3 //11
|
||||
#define Z_MAX_PIN
|
||||
#define Z_ENABLE_PIN DIO8
|
||||
//PB0
|
||||
#define Z_INVERT_DIR
|
||||
#define Z_INVERT_MIN
|
||||
#define Z_INVERT_MAX
|
||||
#define Z_INVERT_ENABLE
|
||||
|
||||
#define E_STEP_PIN DIO12
|
||||
//PB4 //12
|
||||
#define E_DIR_PIN PB6
|
||||
//PB6 //13
|
||||
#define E_ENABLE_PIN
|
||||
#define E_INVERT_DIR
|
||||
#define E_INVERT_ENABLE
|
||||
*/
|
||||
#endif
|
||||
#endif
|
||||
36
config.h
36
config.h
|
|
@ -2,7 +2,7 @@
|
|||
#define _CONFIG_H
|
||||
|
||||
#include <Arduino.h>
|
||||
#include "arduino_32U4.h"
|
||||
#include "arduino.h"
|
||||
|
||||
/** \def KINEMATICS_STRAIGHT KINEMATICS_COREXY
|
||||
|
||||
|
|
@ -190,29 +190,45 @@
|
|||
*/
|
||||
#define XONXOFF
|
||||
|
||||
/** \def MOTHERBOARD
|
||||
***************MOTHERBOARD***************
|
||||
* Define this to use one of predefined configuratoins.
|
||||
**/
|
||||
//#define MOTHERBOARD 2
|
||||
#include "boards.h"
|
||||
|
||||
|
||||
/** \def PINOUT
|
||||
***************PINOUT***************
|
||||
* Here you can setup pin functions, depending on board configuration.
|
||||
* Comment board define above to enable this customizable config.
|
||||
**/
|
||||
|
||||
#define X_STEP_PIN PC3 // 19 PC3
|
||||
#define X_DIR_PIN PC2 // 18 PC2
|
||||
#ifndef MOTHERBOARD
|
||||
#define MOTHERBOARD
|
||||
#define X_STEP_PIN PC3
|
||||
// 19 PC3
|
||||
#define X_DIR_PIN PC2
|
||||
// 18 PC2
|
||||
#define X_MIN_PIN PA5
|
||||
//35 PA5
|
||||
#define X_MIN_PIN PA5
|
||||
#define X_MAX_PIN DIO2
|
||||
#define X_ENABLE_PIN PC4 // 20 PC4
|
||||
#define X_ENABLE_PIN PC4
|
||||
// 20 PC4
|
||||
#define X_INVERT_DIR
|
||||
#define X_INVERT_MIN
|
||||
#define X_INVERT_MAX
|
||||
#define X_INVERT_ENABLE
|
||||
|
||||
#define Y_STEP_PIN DIO9 //22 PC6
|
||||
#define Y_DIR_PIN PC5 //21 PC5
|
||||
#define Y_STEP_PIN DIO9
|
||||
//22 PC6
|
||||
#define Y_DIR_PIN PC5
|
||||
//21 PC5
|
||||
// 16 PD2
|
||||
#define Y_MIN_PIN PD2
|
||||
#define Y_MAX_PIN DIO7
|
||||
#define Y_ENABLE_PIN DIO10 //23 PC7
|
||||
#define Y_ENABLE_PIN DIO10
|
||||
//23 PC7
|
||||
#define Y_INVERT_DIR
|
||||
#define Y_INVERT_MIN
|
||||
#define Y_INVERT_MAX
|
||||
|
|
@ -244,6 +260,8 @@
|
|||
#define SWITCH2_PIN 35
|
||||
#define SWITCH3_PIN 16
|
||||
|
||||
#endif
|
||||
|
||||
/** \def MOVEBUFFER_SIZE
|
||||
Move buffer size, in number of moves.
|
||||
|
||||
|
|
@ -287,7 +305,7 @@
|
|||
#define DEBUG_LED_PIN PC1
|
||||
|
||||
////////////////DEBUG/////////////////////
|
||||
#define SIMINFO
|
||||
//#define SIMINFO
|
||||
#define DEBUG 1
|
||||
|
||||
#ifdef DEBUG
|
||||
|
|
|
|||
|
|
@ -1,31 +1,18 @@
|
|||
#include "gcode_parser.h"
|
||||
#include "queue.h"
|
||||
#include "motor.h"
|
||||
#include "pinio.h"
|
||||
#include "serial.h"
|
||||
#include "gcode_parser.h"
|
||||
|
||||
#define IS_DIGIT(c) (c >= '0' && c <= '9')
|
||||
#define IS_LETTER(c) (c >= 'A' && c <= 'Z')
|
||||
#define IS_WHITECHAR(c) (c == ' ' || c == '\t')
|
||||
#define IS_ENDING(c) (c == '\n' || c == '\r')
|
||||
#define ATOI(c) (c - '0')
|
||||
|
||||
#define STATE_ERROR 1
|
||||
|
||||
GCODE_PARAM params[8];
|
||||
uint8_t current_parameter;
|
||||
GCODE_PARAM BSS gcode_params[8];
|
||||
static volatile uint8_t current_parameter = 0;
|
||||
uint8_t option_all_relative = 0;
|
||||
TARGET next_target;
|
||||
TARGET BSS next_target;
|
||||
|
||||
// Parser is implemented as a finite state automata (DFA)
|
||||
// This is pointer holds function with actions expected for current progress, each of these functions
|
||||
// represent one possible state
|
||||
uint8_t (*current_state)(uint8_t c);
|
||||
|
||||
//a few state functions prototypes
|
||||
uint8_t start_parsing_parameter(uint8_t );
|
||||
uint8_t start_parsing_number(uint8_t);
|
||||
|
||||
uint8_t (*parser_current_state)(uint8_t c);
|
||||
|
||||
/// convert a floating point input value into an integer with appropriate scaling.
|
||||
/// \param mantissa the actual digits of our floating point number
|
||||
|
|
@ -57,15 +44,15 @@ static int32_t decfloat_to_int(uint32_t mantissa, uint8_t exponent, uint8_t sign
|
|||
|
||||
void parser_reset()
|
||||
{
|
||||
uint8_t i;
|
||||
current_state = start_parsing_parameter;
|
||||
uint8_t i;
|
||||
parser_current_state = start_parsing_parameter;
|
||||
current_parameter = 0;
|
||||
for(i = 0; i < 8; ++i)
|
||||
{
|
||||
//params[i].name = '\0';
|
||||
params[i].value = 0;
|
||||
params[i].exponent = 0;
|
||||
params[i].is_negative = 0;
|
||||
gcode_params[i].name = 0;
|
||||
gcode_params[i].value = 0;
|
||||
gcode_params[i].exponent = 0;
|
||||
gcode_params[i].is_negative = 0;
|
||||
}
|
||||
}
|
||||
|
||||
|
|
@ -93,16 +80,16 @@ uint8_t process_command()
|
|||
next_target.axis[X] = next_target.axis[Y] = 0;
|
||||
for(int i = 1; i <= current_parameter; ++i)
|
||||
{
|
||||
switch(params[i].name)
|
||||
switch(gcode_params[i].name)
|
||||
{
|
||||
case 'X':
|
||||
next_target.axis[X] = decfloat_to_int(params[i].value, params[i].exponent, params[i].is_negative, 1000);
|
||||
next_target.axis[X] = decfloat_to_int(gcode_params[i].value, gcode_params[i].exponent, gcode_params[i].is_negative, 1000);
|
||||
break;
|
||||
case 'Y':
|
||||
next_target.axis[Y] = decfloat_to_int(params[i].value, params[i].exponent, params[i].is_negative, 1000);
|
||||
next_target.axis[Y] = decfloat_to_int(gcode_params[i].value, gcode_params[i].exponent, gcode_params[i].is_negative, 1000);
|
||||
break;
|
||||
case 'F':
|
||||
next_target.F = decfloat_to_int(params[i].value, params[i].exponent, params[i].is_negative, 1);
|
||||
next_target.F = decfloat_to_int(gcode_params[i].value, gcode_params[i].exponent, gcode_params[i].is_negative, 1);
|
||||
break;
|
||||
}
|
||||
}
|
||||
|
|
@ -111,11 +98,11 @@ uint8_t process_command()
|
|||
next_target.axis[X] += startpoint.axis[X];
|
||||
next_target.axis[Y] += startpoint.axis[Y];
|
||||
}
|
||||
// params[0] is always a operation with code
|
||||
switch(params[0].name)
|
||||
// gcode_params[0] is always a operation with code
|
||||
switch(gcode_params[0].name)
|
||||
{
|
||||
case 'G':
|
||||
switch(params[0].value)
|
||||
switch(gcode_params[0].value)
|
||||
{
|
||||
case 1:
|
||||
//? Example: G1
|
||||
|
|
@ -149,7 +136,7 @@ uint8_t process_command()
|
|||
}
|
||||
break;
|
||||
case 'M':
|
||||
switch(params[0].value)
|
||||
switch(gcode_params[0].value)
|
||||
{
|
||||
case 0:
|
||||
//? Example: M0
|
||||
|
|
@ -226,8 +213,6 @@ uint8_t process_command()
|
|||
|
||||
uint8_t gcode_syntax_error(uint8_t c)
|
||||
{
|
||||
if IS_ENDING(c)
|
||||
parser_reset();
|
||||
return STATE_ERROR;
|
||||
}
|
||||
|
||||
|
|
@ -243,11 +228,11 @@ uint8_t start_parsing_parameter(uint8_t c)
|
|||
|
||||
if IS_LETTER(c)
|
||||
{
|
||||
params[current_parameter].name = c;
|
||||
current_state = start_parsing_number;
|
||||
gcode_params[current_parameter].name = c;
|
||||
parser_current_state = start_parsing_number;
|
||||
return 0;
|
||||
}
|
||||
current_state = gcode_syntax_error;
|
||||
parser_current_state = gcode_syntax_error;
|
||||
return STATE_ERROR;
|
||||
}
|
||||
|
||||
|
|
@ -257,18 +242,18 @@ uint8_t parse_digit(uint8_t c)
|
|||
if IS_DIGIT(c)
|
||||
{
|
||||
// this is simply mantissa = (mantissa * 10) + atoi(c) in different clothes
|
||||
params[current_parameter].value = (params[current_parameter].value << 3) +
|
||||
(params[current_parameter].value << 1) + ATOI(c);
|
||||
gcode_params[current_parameter].value = (gcode_params[current_parameter].value << 3) +
|
||||
(gcode_params[current_parameter].value << 1) + ATOI(c);
|
||||
|
||||
if(params[current_parameter].exponent)
|
||||
++params[current_parameter].exponent;
|
||||
if(gcode_params[current_parameter].exponent)
|
||||
++gcode_params[current_parameter].exponent;
|
||||
return 0;
|
||||
}
|
||||
|
||||
//this digit is a end of parameter
|
||||
if IS_WHITECHAR(c)
|
||||
{
|
||||
current_state = start_parsing_parameter;
|
||||
parser_current_state = start_parsing_parameter;
|
||||
++current_parameter;
|
||||
return 0;
|
||||
}
|
||||
|
|
@ -281,21 +266,21 @@ uint8_t parse_digit(uint8_t c)
|
|||
}
|
||||
if(c == '.')
|
||||
{
|
||||
params[current_parameter].exponent = 1;
|
||||
gcode_params[current_parameter].exponent = 1;
|
||||
return 0;
|
||||
}
|
||||
|
||||
current_state = gcode_syntax_error;
|
||||
parser_current_state = gcode_syntax_error;
|
||||
return STATE_ERROR;
|
||||
}
|
||||
|
||||
uint8_t start_parsing_number(uint8_t c)
|
||||
{
|
||||
current_state = parse_digit;
|
||||
parser_current_state = parse_digit;
|
||||
//negative number
|
||||
if(c == '-')
|
||||
{
|
||||
params[current_parameter].is_negative = 1;
|
||||
gcode_params[current_parameter].is_negative = 1;
|
||||
return 0;
|
||||
}
|
||||
if IS_DIGIT(c)
|
||||
|
|
@ -303,7 +288,7 @@ uint8_t start_parsing_number(uint8_t c)
|
|||
parse_digit(c);
|
||||
return 0;
|
||||
}
|
||||
current_state = gcode_syntax_error;
|
||||
parser_current_state = gcode_syntax_error;
|
||||
return STATE_ERROR;
|
||||
}
|
||||
|
||||
|
|
@ -311,12 +296,15 @@ uint8_t start_parsing_number(uint8_t c)
|
|||
uint8_t gcode_parse_char(uint8_t c) {
|
||||
|
||||
uint8_t result, checksum_char = c;
|
||||
result = current_state(c);
|
||||
result = parser_current_state(c);
|
||||
|
||||
if IS_ENDING(c)
|
||||
{
|
||||
if ( result == STATE_ERROR) //error
|
||||
{
|
||||
parser_reset();
|
||||
return 2;
|
||||
}
|
||||
return 1;
|
||||
}
|
||||
return 0;
|
||||
|
|
@ -3,6 +3,14 @@
|
|||
|
||||
#include "motor.h"
|
||||
|
||||
#define IS_DIGIT(c) (c >= '0' && c <= '9')
|
||||
#define IS_LETTER(c) (c >= 'A' && c <= 'Z')
|
||||
#define IS_WHITECHAR(c) (c == ' ' || c == '\t')
|
||||
#define IS_ENDING(c) (c == '\n' || c == '\r')
|
||||
#define ATOI(c) (c - '0')
|
||||
|
||||
#define STATE_ERROR 1
|
||||
|
||||
typedef struct {
|
||||
uint8_t name;
|
||||
uint32_t value;
|
||||
|
|
@ -10,16 +18,29 @@ typedef struct {
|
|||
uint8_t is_negative;
|
||||
} GCODE_PARAM;
|
||||
|
||||
extern GCODE_PARAM gcode_params[8];
|
||||
extern TARGET next_target;
|
||||
|
||||
//a few state functions prototypes
|
||||
uint8_t start_parsing_parameter(uint8_t );
|
||||
uint8_t start_parsing_number(uint8_t);
|
||||
|
||||
/// the command being processed
|
||||
//extern GCODE_COMMAND next_target;
|
||||
|
||||
extern const uint32_t powers[]; // defined in msg.c
|
||||
|
||||
#ifdef __cplusplus
|
||||
extern "C" {
|
||||
#endif
|
||||
/// accept the next character and process it
|
||||
uint8_t gcode_parse_char(uint8_t c);
|
||||
|
||||
/// setup variables
|
||||
void parser_init();
|
||||
#ifdef __cplusplus
|
||||
}
|
||||
#endif
|
||||
|
||||
// help function, home axis position by hitting endstop
|
||||
void home_pos_y();
|
||||
|
|
|
|||
|
|
@ -34,7 +34,7 @@ const axes_uint32_t PROGMEM axis_qr_P = {
|
|||
Found on http://stackoverflow.com/questions/4144232/
|
||||
how-to-calculate-a-times-b-divided-by-c-only-using-32-bit-integer-types-even-i
|
||||
*/
|
||||
const int32_t muldivQR(int32_t multiplicand, uint32_t qn, uint32_t rn,
|
||||
int32_t muldivQR(int32_t multiplicand, uint32_t qn, uint32_t rn,
|
||||
uint32_t divisor) {
|
||||
uint32_t quotient = 0;
|
||||
uint32_t remainder = 0;
|
||||
2
maths.h
2
maths.h
|
|
@ -48,7 +48,7 @@ extern const axes_uint32_t PROGMEM axis_qr_P;
|
|||
|
||||
// return rounded result of multiplicand * multiplier / divisor
|
||||
// this version is with quotient and remainder precalculated elsewhere
|
||||
const int32_t muldivQR(int32_t multiplicand, uint32_t qn, uint32_t rn,
|
||||
int32_t muldivQR(int32_t multiplicand, uint32_t qn, uint32_t rn,
|
||||
uint32_t divisor);
|
||||
|
||||
// return rounded result of multiplicand * multiplier / divisor
|
||||
|
|
|
|||
|
|
@ -13,7 +13,7 @@
|
|||
#include "timer.h"
|
||||
#include "serial.h"
|
||||
#include "queue.h"
|
||||
#include "gcode_parser.h"
|
||||
|
||||
#include "pinio.h"
|
||||
|
||||
/*
|
||||
|
|
@ -55,7 +55,7 @@ static const axes_uint32_t PROGMEM maximum_feedrate_P = {
|
|||
};
|
||||
|
||||
/// \var current_position
|
||||
/// \brief actual position of extruder head
|
||||
/// \brief actual position of carriage
|
||||
/// \todo make current_position = real_position (from endstops) + offset from G28 and friends
|
||||
TARGET BSS current_position;
|
||||
|
||||
|
|
@ -418,14 +418,12 @@ void dda_start(DDA *dda) {
|
|||
dda->endpoint.axis[X], dda->endpoint.axis[Y],dda->endpoint.F);
|
||||
#endif
|
||||
|
||||
|
||||
if ( ! dda->nullmove) {
|
||||
// get ready to go
|
||||
//psu_timeout = 0;
|
||||
|
||||
|
||||
if (dda->endstop_check)
|
||||
endstops_on();
|
||||
|
||||
|
||||
// set direction outputs
|
||||
x_direction(dda->x_direction);
|
||||
y_direction(dda->y_direction);
|
||||
|
|
@ -452,10 +450,9 @@ void dda_start(DDA *dda) {
|
|||
|
||||
// ensure this dda starts
|
||||
dda->live = 1;
|
||||
|
||||
|
||||
// set timeout for first step
|
||||
timer_set(dda->c, 0);
|
||||
}
|
||||
// else just a speed change, keep dda->live = 0
|
||||
|
||||
current_position.F = dda->endpoint.F;
|
||||
|
|
@ -676,6 +673,15 @@ void dda_clock() {
|
|||
if (move_c < dda->c_min) {
|
||||
// We hit max speed not always exactly.
|
||||
move_c = dda->c_min;
|
||||
|
||||
// This is a hack which deals with movements with an unknown number of
|
||||
// acceleration steps. dda_create() sets a very high number, then,
|
||||
// but we don't want to re-calculate all the time.
|
||||
// This hack doesn't work with lookahead.
|
||||
#ifndef LOOKAHEAD
|
||||
dda->rampup_steps = move_step_no;
|
||||
dda->rampdown_steps = dda->total_steps - dda->rampup_steps;
|
||||
#endif
|
||||
}
|
||||
|
||||
// Write results.
|
||||
|
|
@ -695,11 +701,20 @@ void dda_clock() {
|
|||
}
|
||||
ATOMIC_END
|
||||
}
|
||||
else {
|
||||
ATOMIC_START
|
||||
if (current_id == dda->id)
|
||||
// This happens only when !recalc_speed, meaning we are cruising, not
|
||||
// accelerating or decelerating. So it pegs our dda->c at c_min if it
|
||||
// never made it as far as c_min.
|
||||
dda->c = dda->c_min;
|
||||
ATOMIC_END
|
||||
}
|
||||
}
|
||||
|
||||
/// update global current_position struct
|
||||
void update_current_position() {
|
||||
DDA *dda = &movebuffer[mb_tail];
|
||||
DDA *dda = mb_tail_dda;
|
||||
uint8_t i;
|
||||
|
||||
// Use smaller values to adjust to avoid overflow in later calculations,
|
||||
16
motor.h
16
motor.h
|
|
@ -47,7 +47,7 @@ typedef struct {
|
|||
uint16_t e_multiplier;
|
||||
uint8_t e_relative :1; ///< bool: e axis relative? Overrides all_relative
|
||||
#endif
|
||||
} TARGET;
|
||||
} __attribute__ ((__packed__)) TARGET;
|
||||
|
||||
/**
|
||||
\struct MOVE_STATE
|
||||
|
|
@ -72,7 +72,7 @@ typedef struct {
|
|||
#ifdef STEPS_PER_M_Z
|
||||
uint8_t debounce_count_z;
|
||||
#endif
|
||||
} MOVE_STATE;
|
||||
} __attribute__ ((__packed__)) MOVE_STATE;
|
||||
|
||||
/**
|
||||
\struct DDA
|
||||
|
|
@ -109,7 +109,7 @@ typedef struct {
|
|||
#endif
|
||||
};
|
||||
uint16_t allflags; ///< used for clearing all flags
|
||||
};
|
||||
}__attribute__ ((__packed__));
|
||||
|
||||
// distances
|
||||
axes_uint32_t delta; ///< number of steps on each axis
|
||||
|
|
@ -159,7 +159,7 @@ typedef struct {
|
|||
/// Endstop homing
|
||||
uint8_t endstop_check; ///< Do we need to check endstops? 0x1=Check X, 0x2=Check Y, 0x4=Check Z
|
||||
uint8_t endstop_stop_cond; ///< Endstop condition on which to stop motion: 0=Stop on detrigger, 1=Stop on trigger
|
||||
} DDA;
|
||||
}__attribute__ ((__packed__)) DDA;
|
||||
|
||||
/*
|
||||
variables
|
||||
|
|
@ -177,10 +177,16 @@ extern TARGET current_position;
|
|||
/*
|
||||
methods
|
||||
*/
|
||||
|
||||
#ifdef __cplusplus
|
||||
extern "C" {
|
||||
#endif
|
||||
// initialize dda structures
|
||||
void dda_init(void);
|
||||
|
||||
#ifdef __cplusplus
|
||||
}
|
||||
#endif
|
||||
|
||||
// distribute a new startpoint
|
||||
void dda_new_startpoint(void);
|
||||
|
||||
|
|
|
|||
7
pinio.h
7
pinio.h
|
|
@ -167,11 +167,16 @@ inline void power_init(void) {
|
|||
#endif
|
||||
}*/
|
||||
|
||||
#ifdef __cplusplus
|
||||
extern "C" {
|
||||
#endif
|
||||
void pinio_init(void);
|
||||
|
||||
void power_on(void);
|
||||
void power_off(void);
|
||||
|
||||
#ifdef __cplusplus
|
||||
}
|
||||
#endif
|
||||
/*
|
||||
X Stepper
|
||||
*/
|
||||
|
|
|
|||
|
|
@ -0,0 +1,168 @@
|
|||
#include "queue.h"
|
||||
#include "serial.h"
|
||||
#include "timer.h"
|
||||
|
||||
/// movebuffer head pointer. Points to the last move in the queue.
|
||||
/// this variable is used both in and out of interrupts, but is
|
||||
/// only written outside of interrupts.
|
||||
uint8_t mb_head = 0;
|
||||
|
||||
/// movebuffer tail pointer. Points to the currently executing move
|
||||
/// this variable is read/written both in and out of interrupts.
|
||||
uint8_t mb_tail = 0;
|
||||
|
||||
/// move buffer.
|
||||
/// holds move queue
|
||||
/// contents are read/written both in and out of interrupts, but
|
||||
/// once writing starts in interrupts on a specific slot, the
|
||||
/// slot will only be modified in interrupts until the slot is
|
||||
/// is no longer live.
|
||||
/// The size does not need to be a power of 2 anymore!
|
||||
DDA BSS movebuffer[MOVEBUFFER_SIZE];
|
||||
|
||||
/**
|
||||
Pointer to the currently ongoing movement, or NULL, if there's no movement
|
||||
ongoing. Actually a cache of movebuffer[mb_tail].
|
||||
*/
|
||||
DDA *mb_tail_dda;
|
||||
|
||||
/// Find the next DDA index after 'x', where 0 <= x < MOVEBUFFER_SIZE
|
||||
#define MB_NEXT(x) ((x) < MOVEBUFFER_SIZE - 1 ? (x) + 1 : 0)
|
||||
|
||||
/// check if the queue is completely full
|
||||
uint8_t queue_full() {
|
||||
MEMORY_BARRIER();
|
||||
return MB_NEXT(mb_head) == mb_tail;
|
||||
}
|
||||
|
||||
/// check if the queue is completely empty
|
||||
uint8_t queue_empty() {
|
||||
uint8_t result;
|
||||
|
||||
ATOMIC_START
|
||||
result = (mb_tail == mb_head && movebuffer[mb_tail].live == 0);
|
||||
ATOMIC_END
|
||||
|
||||
return result;
|
||||
}
|
||||
|
||||
DDA *queue_current_movement() {
|
||||
DDA* current;
|
||||
|
||||
ATOMIC_START
|
||||
current = &movebuffer[mb_tail];
|
||||
|
||||
if ( ! current->live || current->waitfor || current->nullmove)
|
||||
current = NULL;
|
||||
ATOMIC_END
|
||||
|
||||
return current;
|
||||
}
|
||||
|
||||
// -------------------------------------------------------
|
||||
// This is the one function called by the timer interrupt.
|
||||
// It calls a few other functions, though.
|
||||
// -------------------------------------------------------
|
||||
/// Take a step or go to the next move.
|
||||
void queue_step() {
|
||||
|
||||
if (mb_tail_dda != NULL) {
|
||||
dda_step(mb_tail_dda);
|
||||
}
|
||||
|
||||
/**
|
||||
Start the next move if this one is done and another one is available.
|
||||
|
||||
This needs no atomic protection, because we're in an interrupt already.
|
||||
*/
|
||||
if (mb_tail_dda == NULL || ! mb_tail_dda->live) {
|
||||
if (mb_tail != mb_head) {
|
||||
mb_tail = MB_NEXT(mb_tail);
|
||||
mb_tail_dda = &(movebuffer[mb_tail]);
|
||||
dda_start(mb_tail_dda);
|
||||
}
|
||||
else {
|
||||
mb_tail_dda = NULL;
|
||||
}
|
||||
}
|
||||
}
|
||||
|
||||
/// add a move to the movebuffer
|
||||
/// \note this function waits for space to be available if necessary, check queue_full() first if waiting is a problem
|
||||
/// This is the only function that modifies mb_head and it always called from outside an interrupt.
|
||||
void enqueue_home(TARGET const *t, uint8_t endstop_check, uint8_t endstop_stop_cond) {
|
||||
// don't call this function when the queue is full, but just in case, wait for a move to complete and free up the space for the passed target
|
||||
while (queue_full())
|
||||
delay_us(100);
|
||||
|
||||
uint_fast8_t h = MB_NEXT(mb_head);
|
||||
|
||||
DDA* new_movebuffer = &(movebuffer[h]);
|
||||
|
||||
// Initialise queue entry to a known state. This also clears flags like
|
||||
// dda->live, dda->done and dda->wait_for_temp.
|
||||
new_movebuffer->allflags = 0;
|
||||
|
||||
new_movebuffer->endstop_check = endstop_check;
|
||||
new_movebuffer->endstop_stop_cond = endstop_stop_cond;
|
||||
dda_create(new_movebuffer, t);
|
||||
|
||||
/**
|
||||
It's pointless to queue up movements which don't actually move the stepper,
|
||||
e.g. pure velocity changes or movements shorter than a single motor step.
|
||||
|
||||
That said, accept movements which do move the steppers by forwarding
|
||||
mb_head. Also kick off movements if it's the first movement after a pause.
|
||||
*/
|
||||
|
||||
if ( ! new_movebuffer->nullmove) {
|
||||
// make certain all writes to global memory
|
||||
// are flushed before modifying mb_head.
|
||||
MEMORY_BARRIER();
|
||||
|
||||
mb_head = h;
|
||||
|
||||
if (mb_tail_dda == NULL) {
|
||||
/**
|
||||
Go to the next move.
|
||||
|
||||
This is the version used from outside interrupts. The in-interrupt
|
||||
version is inlined (and simplified) in queue_step().
|
||||
*/
|
||||
timer_reset();
|
||||
mb_tail = mb_head; // Valid ONLY if the queue was empty before!
|
||||
mb_tail_dda = new_movebuffer; // Dito!
|
||||
dda_start(mb_tail_dda);
|
||||
// Compensate for the cli() in timer_set().
|
||||
sei();
|
||||
}
|
||||
}
|
||||
}
|
||||
|
||||
/// DEBUG - print queue.
|
||||
/// Qt/hs format, t is tail, h is head, s is F/full, E/empty or neither
|
||||
void print_queue() {
|
||||
sersendf_P(PSTR("Queue: %d/%d%c\n"), mb_tail, mb_head,
|
||||
(queue_full() ? 'F' : (mb_tail_dda ? ' ' : 'E')));
|
||||
}
|
||||
|
||||
/// dump queue for emergency stop.
|
||||
/// Make sure to have all timers stopped with timer_stop() or
|
||||
/// unexpected things might happen.
|
||||
/// \todo effect on startpoint is undefined!
|
||||
void queue_flush() {
|
||||
|
||||
// if the timer were running, this would require
|
||||
// wrapping in ATOMIC_START ... ATOMIC_END.
|
||||
mb_tail = mb_head;
|
||||
mb_tail_dda = NULL;
|
||||
}
|
||||
/*
|
||||
/// wait for queue to empty
|
||||
void queue_wait() {
|
||||
while (mb_tail_dda)
|
||||
clock();
|
||||
}
|
||||
|
||||
*/
|
||||
|
||||
136
queue.cpp
136
queue.cpp
|
|
@ -1,136 +0,0 @@
|
|||
#include "queue.h"
|
||||
|
||||
/// movebuffer head pointer. Points to the last move in the queue.
|
||||
/// this variable is used both in and out of interrupts, but is
|
||||
/// only written outside of interrupts.
|
||||
uint8_t mb_head = 0;
|
||||
|
||||
/// movebuffer tail pointer. Points to the currently executing move
|
||||
/// this variable is read/written both in and out of interrupts.
|
||||
uint8_t mb_tail = 0;
|
||||
|
||||
/// move buffer.
|
||||
/// holds move queue
|
||||
/// contents are read/written both in and out of interrupts, but
|
||||
/// once writing starts in interrupts on a specific slot, the
|
||||
/// slot will only be modified in interrupts until the slot is
|
||||
/// is no longer live.
|
||||
/// The size does not need to be a power of 2 anymore!
|
||||
DDA BSS movebuffer[MOVEBUFFER_SIZE];
|
||||
|
||||
/// check if the queue is completely full
|
||||
uint8_t queue_full() {
|
||||
MEMORY_BARRIER();
|
||||
return MB_NEXT(mb_head) == mb_tail;
|
||||
}
|
||||
|
||||
/// check if the queue is completely empty
|
||||
uint8_t queue_empty() {
|
||||
uint8_t result;
|
||||
|
||||
ATOMIC_START
|
||||
result = (mb_tail == mb_head && movebuffer[mb_tail].live == 0);
|
||||
ATOMIC_END
|
||||
|
||||
return result;
|
||||
}
|
||||
|
||||
/// dump queue for emergency stop.
|
||||
/// Make sure to have all timers stopped with timer_stop() or
|
||||
/// unexpected things might happen.
|
||||
/// \todo effect on startpoint is undefined!
|
||||
void queue_flush() {
|
||||
// if the timer were running, this would require
|
||||
// wrapping in ATOMIC_START ... ATOMIC_END.
|
||||
mb_tail = mb_head;
|
||||
movebuffer[mb_head].live = 0;
|
||||
}
|
||||
|
||||
|
||||
DDA *queue_current_movement() {
|
||||
DDA* current;
|
||||
|
||||
ATOMIC_START
|
||||
current = &movebuffer[mb_tail];
|
||||
|
||||
if ( ! current->live || current->waitfor || current->nullmove)
|
||||
current = NULL;
|
||||
ATOMIC_END
|
||||
|
||||
return current;
|
||||
}
|
||||
|
||||
/// add a move to the movebuffer
|
||||
/// \note this function waits for space to be available if necessary, check queue_full() first if waiting is a problem
|
||||
/// This is the only function that modifies mb_head and it always called from outside an interrupt.
|
||||
void enqueue_home(TARGET *t, uint8_t endstop_check, uint8_t endstop_stop_cond) {
|
||||
// don't call this function when the queue is full, but just in case, wait for a move to complete and free up the space for the passed target
|
||||
/*while (queue_full())
|
||||
delay_us(100);
|
||||
*/
|
||||
uint8_t h = MB_NEXT(mb_head);;
|
||||
|
||||
DDA* new_movebuffer = &(movebuffer[h]);
|
||||
|
||||
// Initialise queue entry to a known state. This also clears flags like
|
||||
// dda->live, dda->done and dda->wait_for_temp.
|
||||
new_movebuffer->allflags = 0;
|
||||
|
||||
if (t != NULL) {
|
||||
new_movebuffer->endstop_check = endstop_check;
|
||||
new_movebuffer->endstop_stop_cond = endstop_stop_cond;
|
||||
}
|
||||
else {
|
||||
// it's a wait for something
|
||||
new_movebuffer->waitfor = 1;
|
||||
}
|
||||
dda_create(new_movebuffer, t);
|
||||
|
||||
|
||||
mb_head = h;
|
||||
|
||||
uint8_t isdead;
|
||||
|
||||
ATOMIC_START
|
||||
isdead = (movebuffer[mb_tail].live == 0);
|
||||
ATOMIC_END
|
||||
|
||||
if (isdead) {
|
||||
timer_reset();
|
||||
next_move();
|
||||
// Compensate for the cli() in timer_set().
|
||||
sei();
|
||||
}
|
||||
}
|
||||
|
||||
// -------------------------------------------------------
|
||||
// This is the one function called by the timer interrupt.
|
||||
// It calls a few other functions, though.
|
||||
// -------------------------------------------------------
|
||||
/// Take a step or go to the next move.
|
||||
void queue_step() {
|
||||
// do our next step
|
||||
DDA* current_movebuffer = &movebuffer[mb_tail];
|
||||
if (current_movebuffer->live) {
|
||||
|
||||
dda_step(current_movebuffer);
|
||||
}
|
||||
// Start the next move if this one is done.
|
||||
if (current_movebuffer->live == 0)
|
||||
next_move();
|
||||
}
|
||||
|
||||
// called from step timer when current move is complete
|
||||
void next_move(void)
|
||||
{
|
||||
while ((queue_empty() == 0) && (movebuffer[mb_tail].live == 0)) {
|
||||
// next item
|
||||
uint8_t t = MB_NEXT(mb_tail);
|
||||
DDA* current_movebuffer = &movebuffer[t];
|
||||
// Tail must be set before calling timer_set(), as timer_set() reenables
|
||||
// the timer interrupt, potentially exposing mb_tail to the timer
|
||||
// interrupt routine.
|
||||
mb_tail = t;
|
||||
dda_start(current_movebuffer);
|
||||
}
|
||||
}
|
||||
17
queue.h
17
queue.h
|
|
@ -4,14 +4,21 @@
|
|||
#include "motor.h"
|
||||
#include "timer.h"
|
||||
|
||||
extern uint8_t mb_head;
|
||||
extern uint8_t mb_tail;
|
||||
extern uint_fast8_t mb_tail;
|
||||
extern DDA movebuffer[MOVEBUFFER_SIZE];
|
||||
extern DDA *mb_tail_dda;
|
||||
|
||||
#ifdef __cplusplus
|
||||
extern "C" {
|
||||
#endif
|
||||
// queue status methods
|
||||
uint8_t queue_full(void);
|
||||
uint8_t queue_empty(void);
|
||||
void queue_flush(void);
|
||||
#ifdef __cplusplus
|
||||
}
|
||||
#endif
|
||||
|
||||
DDA *queue_current_movement(void);
|
||||
|
||||
/// Find the next DDA index after 'x', where 0 <= x < MOVEBUFFER_SIZE
|
||||
|
|
@ -19,7 +26,7 @@ DDA *queue_current_movement(void);
|
|||
|
||||
// add a new target to the queue
|
||||
// t == NULL means add a wait for target temp to the queue
|
||||
void enqueue_home(TARGET *t, uint8_t endstop_check, uint8_t endstop_stop_cond);
|
||||
void enqueue_home(const TARGET *t, uint8_t endstop_check, uint8_t endstop_stop_cond);
|
||||
|
||||
// called from step timer when current move is complete
|
||||
void next_move(void);
|
||||
|
|
@ -27,8 +34,8 @@ void next_move(void);
|
|||
// take one step
|
||||
void queue_step(void);
|
||||
|
||||
static void enqueue(TARGET *) __attribute__ ((always_inline));
|
||||
inline void enqueue(TARGET *t) {
|
||||
static void enqueue(const TARGET *) __attribute__ ((always_inline));
|
||||
inline void enqueue(const TARGET *t) {
|
||||
enqueue_home(t, 0, 0);
|
||||
}
|
||||
|
||||
|
|
|
|||
|
|
@ -82,11 +82,17 @@ void serial_init() {
|
|||
#endif
|
||||
|
||||
UCSR0B = MASK(RXEN0) | MASK(TXEN0);
|
||||
#if defined (__AVR_ATmega32U4__) || defined (__AVR_ATmega32__) || \
|
||||
defined (__AVR_ATmega16__)
|
||||
UCSR0C = MASK(URSEL) | MASK(UCSZ01) | MASK(UCSZ00) |(0<<UMSEL)|(0<<UPM1)|(0<<UPM0)|(0<<USBS)|(0<<UCSZ2);
|
||||
#else
|
||||
UCSR0C = MASK(UCSZ01) | MASK(UCSZ00);
|
||||
#endif
|
||||
|
||||
UCSR0B |= MASK(RXCIE0) | MASK(UDRIE0);
|
||||
}
|
||||
|
||||
|
||||
/** Receive interrupt.
|
||||
|
||||
We have received a character, stuff it in the RX buffer if we can, or drop
|
||||
|
|
@ -97,7 +103,11 @@ void serial_init() {
|
|||
#ifdef USART_RXC_vect
|
||||
ISR(USART_RXC_vect)
|
||||
#else
|
||||
ISR(USART0_RX_vect)
|
||||
#ifdef USART_RX_vect
|
||||
ISR(USART_RX_vect)
|
||||
#else
|
||||
ISR(USART0_RX_vect)
|
||||
#endif
|
||||
#endif
|
||||
{
|
||||
if (buf_canwrite(rx))
|
||||
8
serial.h
8
serial.h
|
|
@ -22,6 +22,10 @@ void sendf_P(void (*writechar)(uint8_t), PGM_P format_P, ...);
|
|||
#define serial_rxchars() usb_serial_available()
|
||||
#define serial_popchar() usb_serial_getchar()
|
||||
#else
|
||||
|
||||
#ifdef __cplusplus
|
||||
extern "C" {
|
||||
#endif
|
||||
// initialise serial subsystem
|
||||
void serial_init(void);
|
||||
|
||||
|
|
@ -41,4 +45,8 @@ void serial_writestr(uint8_t *data);
|
|||
// write from flash
|
||||
void serial_writestr_P(PGM_P data_P);
|
||||
|
||||
#ifdef __cplusplus
|
||||
}
|
||||
#endif
|
||||
|
||||
#endif /* _SERIAL_H */
|
||||
|
|
|
|||
|
|
@ -1,9 +1,9 @@
|
|||
#ifdef ARDUINO
|
||||
#include "queue.h"
|
||||
#include "timer.h"
|
||||
#include "serial.h"
|
||||
#include "pinio.h"
|
||||
#include "gcode_parser.h"
|
||||
#include "queue.h"
|
||||
|
||||
uint8_t c, line_done, ack_waiting = 0;
|
||||
|
||||
|
|
@ -43,5 +43,4 @@ void loop()
|
|||
}
|
||||
}
|
||||
}
|
||||
|
||||
|
||||
#endif
|
||||
|
|
@ -1,22 +1,24 @@
|
|||
#include "queue.h"
|
||||
#include "timer.h"
|
||||
#include "serial.h"
|
||||
#include "pinio.h"
|
||||
#include "gcode_parser.h"
|
||||
#include "queue.h"
|
||||
|
||||
#include "config.h"
|
||||
|
||||
#ifdef SIMINFO
|
||||
#include "simulavr_info.h"
|
||||
SIMINFO_DEVICE("atmega32");
|
||||
#define STR(x) #x
|
||||
#define STRINGIZE(x) STR(x)
|
||||
SIMINFO_DEVICE(STRINGIZE(MCU));
|
||||
SIMINFO_CPUFREQUENCY(F_CPU);
|
||||
#ifdef BAUD
|
||||
SIMINFO_SERIAL_IN("D0", "-", BAUD);
|
||||
SIMINFO_SERIAL_OUT("D1", "-", BAUD);
|
||||
#endif
|
||||
#endif
|
||||
|
||||
|
||||
#ifndef ARDUINO
|
||||
#include "queue.h"
|
||||
#include "timer.h"
|
||||
#include "serial.h"
|
||||
#include "pinio.h"
|
||||
#include "gcode_parser.h"
|
||||
#include "queue.h"
|
||||
uint8_t c, line_done, ack_waiting = 0;
|
||||
|
||||
void setup(){
|
||||
|
|
@ -55,3 +57,4 @@ void loop()
|
|||
}
|
||||
}
|
||||
}
|
||||
#endif
|
||||
|
|
@ -16,11 +16,6 @@
|
|||
#include "config.h"
|
||||
#include "pinio.h"
|
||||
|
||||
/** \def MOTHERBOARD
|
||||
This is the motherboard, as opposed to the extruder. See extruder/ directory
|
||||
for GEN3 extruder firmware.
|
||||
*/
|
||||
#define MOTHERBOARD
|
||||
|
||||
#ifdef MOTHERBOARD
|
||||
#include "queue.h"
|
||||
|
|
@ -76,8 +71,12 @@ ISR(TIMER1_COMPA_vect) {
|
|||
#endif
|
||||
|
||||
// disable this interrupt. if we set a new timeout, it will be re-enabled when appropriate
|
||||
#if defined (__AVR_ATmega32U4__) || defined (__AVR_ATmega32__) || \
|
||||
defined (__AVR_ATmega16__)
|
||||
TIMSK &= ~MASK(OCIE1A);
|
||||
|
||||
#else
|
||||
TIMSK1 &= ~MASK(OCIE1A);
|
||||
#endif
|
||||
// stepper tick
|
||||
queue_step();
|
||||
|
||||
|
|
@ -115,7 +114,12 @@ void timer_init() {
|
|||
// set up "clock" comparator for first tick
|
||||
OCR1B = TICK_TIME & 0xFFFF;
|
||||
// enable interrupt
|
||||
#if defined (__AVR_ATmega32U4__) || defined (__AVR_ATmega32__) || \
|
||||
defined (__AVR_ATmega16__)
|
||||
TIMSK = MASK(OCIE1B);
|
||||
#else
|
||||
TIMSK1 = MASK(OCIE1B);
|
||||
#endif
|
||||
#ifdef SIMULATOR
|
||||
// Tell simulator
|
||||
sim_timer_set();
|
||||
|
|
@ -193,7 +197,12 @@ uint8_t timer_set(int32_t delay, uint8_t check_short) {
|
|||
// global interrupts (see above). This will cause push any possible
|
||||
// timer1a interrupt to the far side of the return, protecting the
|
||||
// stack from recursively clobbering memory.
|
||||
#if defined (__AVR_ATmega32U4__) || defined (__AVR_ATmega32__) || \
|
||||
defined (__AVR_ATmega16__)
|
||||
TIMSK |= MASK(OCIE1A);
|
||||
#else
|
||||
TIMSK1 |= MASK(OCIE1A);
|
||||
#endif
|
||||
#ifdef SIMULATOR
|
||||
// Tell simulator
|
||||
sim_timer_set();
|
||||
|
|
@ -219,7 +228,12 @@ void timer_reset() {
|
|||
*/
|
||||
void timer_stop() {
|
||||
// disable all interrupts
|
||||
#if defined (__AVR_ATmega32U4__) || defined (__AVR_ATmega32__) || \
|
||||
defined (__AVR_ATmega16__)
|
||||
TIMSK = 0;
|
||||
#else
|
||||
TIMSK1 = 0;
|
||||
#endif
|
||||
#ifdef SIMULATOR
|
||||
// Tell simulator
|
||||
sim_timer_stop();
|
||||
|
|
@ -269,3 +283,50 @@ void cpu_init() {
|
|||
#endif
|
||||
ACSR = MASK(ACD);
|
||||
}
|
||||
|
||||
|
||||
#include <util/delay_basic.h>
|
||||
|
||||
#if F_CPU < 4000000UL
|
||||
#error Delay functions on AVR only work with F_CPU >= 4000000UL
|
||||
#endif
|
||||
|
||||
|
||||
/** Delay in microseconds.
|
||||
|
||||
\param delay Time to wait in microseconds.
|
||||
|
||||
Calibrated in SimulAVR.
|
||||
|
||||
Accuracy on 20 MHz CPU clock: -1/+3 clock cycles over the whole range(!).
|
||||
Accuracy on 16 MHz CPU clock: delay is about 0.8% too short.
|
||||
|
||||
Exceptions are delays of 0..2 on 20 MHz, which are all 0.75 us and delays
|
||||
of 0..3 on 16 MHz, which are all 0.93us.
|
||||
*/
|
||||
void delay_us(uint16_t delay) {
|
||||
// Compensate call overhead, as close as possible.
|
||||
#define OVERHEAD_CALL_CLOCKS 39 // clock cycles
|
||||
#define OVERHEAD_CALL_DIV ((OVERHEAD_CALL_CLOCKS / (F_CPU / 1000000)) + 1)
|
||||
#define OVERHEAD_CALL_REM ((OVERHEAD_CALL_DIV * (F_CPU / 1000000)) - \
|
||||
OVERHEAD_CALL_CLOCKS)
|
||||
|
||||
if (delay > OVERHEAD_CALL_DIV) {
|
||||
delay -= OVERHEAD_CALL_DIV;
|
||||
if (OVERHEAD_CALL_REM >= 2)
|
||||
_delay_loop_2((OVERHEAD_CALL_REM + 2) / 4);
|
||||
}
|
||||
else {
|
||||
return;
|
||||
}
|
||||
|
||||
while (delay > (65536L / (F_CPU / 4000000L))) {
|
||||
#define OVERHEAD_LOOP_CLOCKS 13
|
||||
|
||||
_delay_loop_2(65536 - (OVERHEAD_LOOP_CLOCKS + 2) / 4);
|
||||
delay -= (65536L / (F_CPU / 4000000L));
|
||||
}
|
||||
if (delay)
|
||||
_delay_loop_2(delay * (F_CPU / 4000000L));
|
||||
}
|
||||
|
||||
15
timer.h
15
timer.h
|
|
@ -74,8 +74,18 @@
|
|||
|
||||
#endif /* __AVR__, __ARMEL__, SIMULATOR */
|
||||
|
||||
#ifdef __cplusplus
|
||||
extern "C" {
|
||||
#endif
|
||||
|
||||
void timer_init(void);
|
||||
|
||||
void cpu_init();
|
||||
|
||||
#ifdef __cplusplus
|
||||
}
|
||||
#endif
|
||||
|
||||
uint8_t timer_set(int32_t delay, uint8_t check_short);
|
||||
|
||||
void timer_reset(void);
|
||||
|
|
@ -87,5 +97,8 @@ void timer_stop(void);
|
|||
|
||||
//void clock(void);
|
||||
|
||||
void cpu_init();
|
||||
// TIMER
|
||||
// microsecond delay, does NOT reset WDT if feature enabled
|
||||
void delay_us(uint16_t delay);
|
||||
|
||||
#endif /* _TIMER_H */
|
||||
|
|
|
|||
Ładowanie…
Reference in New Issue