kopia lustrzana https://github.com/Qyon/STM32_RTTY
Konfiguracja szybkości RTTY
rodzic
87a847708f
commit
67b660d8e6
2
config.h
2
config.h
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@ -8,6 +8,8 @@
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#define CALLSIGN "NO1LIC-1" // put your callsign here
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//*************frequency********************
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#define freq 434.150f //Mhz middle frequency
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//************rtty speed****************** si4032
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#define RTTY_SPEED 300
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//************band select****************** si4032
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#define fb 1
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#define fbsel 1
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47
init.c
47
init.c
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@ -14,6 +14,9 @@ USART_InitTypeDef USART_InitStructure;
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GPIO_InitTypeDef GPIO_Conf;
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ADC_InitTypeDef ADC_InitStructure;
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DMA_InitTypeDef DMA_InitStructure;
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#define ADC1_DR_Address ((uint32_t)0x4001244C)
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void NVIC_Conf()
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@ -55,25 +58,8 @@ void init_port()
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GPIO_Conf.GPIO_Mode = GPIO_Mode_Out_PP;
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GPIO_Conf.GPIO_Speed = GPIO_Speed_10MHz;
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GPIO_Init(GPIOB, &GPIO_Conf);
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TIM_TimeBaseInitTypeDef TIM2_TimeBaseInitStruct;
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RCC_APB1PeriphClockCmd(RCC_APB1Periph_TIM2,ENABLE);
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RCC_APB1PeriphResetCmd(RCC_APB1Periph_TIM2,DISABLE);
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TIM2_TimeBaseInitStruct.TIM_Prescaler = 1000;
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TIM2_TimeBaseInitStruct.TIM_CounterMode = TIM_CounterMode_Up;
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TIM2_TimeBaseInitStruct.TIM_Period = 6;
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TIM2_TimeBaseInitStruct.TIM_ClockDivision = TIM_CKD_DIV1;
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TIM2_TimeBaseInitStruct.TIM_RepetitionCounter = 0;
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TIM_TimeBaseInit(TIM2,&TIM2_TimeBaseInitStruct);
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TIM_ClearITPendingBit(TIM2,TIM_IT_Update);
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TIM_ITConfig(TIM2,TIM_IT_Update,ENABLE);
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NVIC_InitTypeDef NVIC_InitStructure; //create NVIC structure
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NVIC_InitStructure.NVIC_IRQChannel = TIM2_IRQn;
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NVIC_InitStructure.NVIC_IRQChannelPreemptionPriority = 0;
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NVIC_InitStructure.NVIC_IRQChannelSubPriority = 1;
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NVIC_InitStructure.NVIC_IRQChannelCmd = ENABLE;
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NVIC_Init(&NVIC_InitStructure);
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TIM_Cmd(TIM2,ENABLE);
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GPIO_Conf.GPIO_Pin = GPIO_Pin_13 |GPIO_Pin_15;
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GPIO_Conf.GPIO_Pin = GPIO_Pin_13 |GPIO_Pin_15;
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GPIO_Conf.GPIO_Mode = GPIO_Mode_AF_PP;
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GPIO_Conf.GPIO_Speed = GPIO_Speed_10MHz;
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GPIO_Init(GPIOB, &GPIO_Conf);
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@ -174,3 +160,26 @@ void init_port()
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while(ADC_GetCalibrationStatus(ADC1));
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ADC_SoftwareStartConvCmd(ADC1, ENABLE); // start conversion (will be endless as we are in continuous mode)
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}
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void init_timer(const int rtty_speed) {
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TIM_TimeBaseInitTypeDef TIM2_TimeBaseInitStruct;
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RCC_APB1PeriphClockCmd(RCC_APB1Periph_TIM2,ENABLE);
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RCC_APB1PeriphResetCmd(RCC_APB1Periph_TIM2,DISABLE);
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TIM2_TimeBaseInitStruct.TIM_Prescaler = 600;
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TIM2_TimeBaseInitStruct.TIM_CounterMode = TIM_CounterMode_Up;
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TIM2_TimeBaseInitStruct.TIM_Period = (uint16_t) ((10000 / rtty_speed) - 1);
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TIM2_TimeBaseInitStruct.TIM_ClockDivision = TIM_CKD_DIV1;
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TIM2_TimeBaseInitStruct.TIM_RepetitionCounter = 0;
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TIM_TimeBaseInit(TIM2,&TIM2_TimeBaseInitStruct);
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TIM_ClearITPendingBit(TIM2, TIM_IT_Update);
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TIM_ITConfig(TIM2,TIM_IT_Update, ENABLE);
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NVIC_InitTypeDef NVIC_InitStructure; //create NVIC structure
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NVIC_InitStructure.NVIC_IRQChannel = TIM2_IRQn;
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NVIC_InitStructure.NVIC_IRQChannelPreemptionPriority = 0;
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NVIC_InitStructure.NVIC_IRQChannelSubPriority = 1;
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NVIC_InitStructure.NVIC_IRQChannelCmd = ENABLE;
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NVIC_Init(&NVIC_InitStructure);
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TIM_Cmd(TIM2,ENABLE);
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}
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1
init.h
1
init.h
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@ -2,3 +2,4 @@ __IO uint16_t ADCVal[2];
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void NVIC_Conf();
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void RCC_Conf();
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void init_port();
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void init_timer(const int rtty_speed);
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13
main.c
13
main.c
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@ -116,8 +116,6 @@ unsigned char bOFF = 0;
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unsigned char bCheckKay = 0;
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unsigned char GPSConf = 0;
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void USART1_IRQHandler(void) {
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if ((USART1->SR & USART_FLAG_RXNE) != (u16) RESET) {
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@ -166,7 +164,7 @@ void TIM2_IRQHandler(void) {
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if (TIM_GetITStatus(TIM2, TIM_IT_Update) != RESET) {
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TIM_ClearITPendingBit(TIM2, TIM_IT_Update);
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}
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if (tx_on && ++cun_rtty == 17) {
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if (tx_on /*&& ++cun_rtty == 17*/) {
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cun_rtty = 0;
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send_rtty_status = send_rtty(rtty_buf);
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if (send_rtty_status == rttyEnd) {
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@ -175,7 +173,7 @@ void TIM2_IRQHandler(void) {
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tx_on = 0;
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tx_on_delay = tx_delay;//2500;
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tx_enable = 0;
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temp = radio_rw_register(0x07, 0x40, 1);
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radio_disable_tx();
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}
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} else if (send_rtty_status == rttyOne) {
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temp = radio_rw_register(0x73, 0x02, 1);
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@ -214,6 +212,7 @@ int main(void) {
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RCC_Conf();
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NVIC_Conf();
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init_port();
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init_timer(RTTY_SPEED);
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wsk_GPS_buf = GPS_buf;
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@ -226,13 +225,14 @@ int main(void) {
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temp = radio_rw_register(0x03, 0xff, 0);
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temp = radio_rw_register(0x04, 0xff, 0);
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temp = radio_rw_register(0x07, 0x80, 1);
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radio_soft_reset();
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print(init_trx);
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// programowanie czestotliwosci nadawania
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radio_set_tx_frequency();
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// Programowanie mocy nadajnika
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temp = radio_rw_register(0x6D, 00 | (Smoc & 0x0007), 1);
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temp = radio_rw_register(0x71, 0x00, 1);
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temp = radio_rw_register(0x87, 0x08, 0);
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temp = radio_rw_register(0x02, 0xff, 0);
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@ -288,8 +288,9 @@ int main(void) {
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CRC_rtty = gps_CRC16_checksum(buf_rtty + 7);
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sprintf(buf_rtty, "%s*%04X\n", buf_rtty, CRC_rtty & 0xffff);
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rtty_buf = buf_rtty;
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radio_enable_tx();
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tx_on = 1;
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temp = radio_rw_register(0x07, 0x48, 1);
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send_cun++;
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}
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14
radio.c
14
radio.c
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@ -24,4 +24,16 @@ void radio_set_tx_frequency() {
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radio_rw_register(0x75, 0x61, 1); // FIXME: tutaj powinno zdaje się być ustawiane fbsel?!
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radio_rw_register(0x76, (uint8_t) (((uint16_t)fc >> 8) & 0xff), 1);
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radio_rw_register(0x77, (uint8_t) ((uint16_t)fc & 0xff), 1);
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}
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}
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void radio_disable_tx() {
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radio_rw_register(0x07, 0x40, 1);
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}
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void radio_soft_reset() {
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radio_rw_register(0x07, 0x80, 1);
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}
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void radio_enable_tx() {
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radio_rw_register(0x07, 0x48, 1);
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}
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3
radio.h
3
radio.h
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@ -22,5 +22,8 @@ static const uint8_t WR = 0x80;
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uint8_t _spi_sendrecv(const uint16_t data_word);
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uint8_t radio_rw_register(const uint8_t register_addr, uint8_t value, uint8_t write);
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void radio_set_tx_frequency();
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void radio_disable_tx();
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void radio_soft_reset();
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void radio_enable_tx();
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#endif //STM32_RTTY_RADIO_H
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