kopia lustrzana https://github.com/SP8EBC/ParaTNC
177 wiersze
3.9 KiB
C
177 wiersze
3.9 KiB
C
#ifndef AFSK_H_
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#define AFSK_H_
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#ifndef CCC
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#include "stm32f10x_conf.h"
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#endif
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#include <stdbool.h>
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#include "cfifo.h"
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#include "macros.h"
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#include "config.h"
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#define FREQ_MARK 1200
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#define FREQ_SPACE 2200
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#define SAMPLERATE 9600
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#define BITRATE 1200
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#define PHASE_BIT 8
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#define PHASE_INC 1
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#define SAMPLEPERBIT (SAMPLERATE / BITRATE)
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#define PHASE_MAX (SAMPLEPERBIT * PHASE_BIT)
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#define PHASE_THRES (PHASE_MAX / 2)
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// Modulator constants
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#define SIN_LEN 512 ///< Full wave length
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#define BIT_STUFF_LEN 5
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#define MARK_INC (uint16_t)(DIV_ROUND(SIN_LEN * (uint32_t)FREQ_MARK, SAMPLERATE))
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#define SPACE_INC (uint16_t)(DIV_ROUND(SIN_LEN * (uint32_t)FREQ_SPACE, SAMPLERATE))
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/**
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* RX FIFO buffer full error.
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*/
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#define AFSK_RXFIFO_OVERRUN BV(0)
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/**
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* HDLC (High-Level Data Link Control) context.
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* Maybe to be moved in a separate HDLC module one day.
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*/
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typedef struct Hdlc
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{
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uint8_t demod_bits; ///< Bitstream from the demodulator.
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uint8_t bit_idx; ///< Current received bit.
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uint8_t currchar; ///< Current received character.
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bool rxstart; ///< True if an HDLC_FLAG char has been found in the bitstream.
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bool raw_dcd;
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bool s;
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bool raw_mode;
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} Hdlc;
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typedef struct Afsk
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{
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uint16_t max_value;
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/** Current sample of bit for output data. */
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uint8_t sample_count;
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/** Current character to be modulated */
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uint8_t curr_out;
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/** Mask of current modulated bit */
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uint8_t tx_bit;
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/** True if bit stuff is allowed, false otherwise */
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bool bit_stuff;
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/** Counter for bit stuffing */
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uint8_t stuff_cnt;
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/**
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* DDS phase accumulator for generating modulated data.
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*/
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uint16_t phase_acc;
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/** Current phase increment for current modulated bit */
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uint16_t phase_inc;
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/**
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* Bits sampled by the demodulator are here.
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* Since ADC samplerate is higher than the bitrate, the bits here are
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* SAMPLEPERBIT times the bitrate.
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*/
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uint8_t sampled_bits;
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/**
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* Current phase, needed to know when the bitstream at ADC speed
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* should be sampled.
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*/
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int8_t curr_phase;
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/** Bits found by the demodulator at the correct bitrate speed. */
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uint8_t found_bits;
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/** FIFO for received data */
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FIFOBuffer rx_fifo;
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/** FIFO rx buffer */
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uint8_t rx_buf[CONFIG_AFSK_RX_BUFLEN];
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/** FIFO for transmitted data */
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FIFOBuffer tx_fifo;
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/** FIFO tx buffer */
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uint8_t tx_buf[CONFIG_AFSK_TX_BUFLEN];
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/** True while modem sends data */
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volatile bool sending;
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/**
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* AFSK modem status.
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* If 0 all is ok, otherwise errors are present.
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*/
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volatile int status;
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/** Hdlc context */
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Hdlc hdlc;
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/**
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* Preamble length.
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* When the AFSK modem wants to send data, before sending the actual data,
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* shifts out preamble_len HDLC_FLAG characters.
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* This helps to synchronize the demodulator filters on the receiver side.
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*/
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uint16_t preamble_len;
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/**
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* Trailer length.
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* After sending the actual data, the AFSK shifts out
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* trailer_len HDLC_FLAG characters.
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* This helps to synchronize the demodulator filters on the receiver side.
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*/
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uint16_t trailer_len;
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} Afsk;
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#ifdef __cplusplus
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extern "C"
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{
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#endif
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/*********************************************************************************************************************/
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void AFSK_ADC_ISR(Afsk *afsk, int16_t curr_sample);
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/*********************************************************************************************************************/
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void afsk_txStart(Afsk *af);
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/*********************************************************************************************************************/
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uint8_t AFSK_DAC_ISR(Afsk *afsk);
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/*********************************************************************************************************************/
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/*********************************************************************************************************************/
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void AFSK_Init(Afsk *afsk);
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/*********************************************************************************************************************/
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#ifdef __cplusplus
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}
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#endif
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#endif /* AFSK_H_ */
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