before replacing hardware and odd CRC32 with software one

tatry_variant
Mateusz Lubecki 2022-08-28 17:12:53 +02:00
rodzic 17fdef6b1a
commit e00ceede9a
4 zmienionych plików z 138 dodań i 15 usunięć

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@ -12,6 +12,7 @@ C_SRCS += \
../src/config_data_first.c \
../src/config_data_second.c \
../src/configuration_handler.c \
../src/crc_.c \
../src/delay.c \
../src/dummy.c \
../src/float_to_string.c \
@ -41,6 +42,7 @@ OBJS += \
./src/config_data_first.o \
./src/config_data_second.o \
./src/configuration_handler.o \
./src/crc_.o \
./src/delay.o \
./src/dummy.o \
./src/float_to_string.o \
@ -70,6 +72,7 @@ C_DEPS += \
./src/config_data_first.d \
./src/config_data_second.d \
./src/configuration_handler.d \
./src/crc_.d \
./src/delay.d \
./src/dummy.d \
./src/float_to_string.d \

15
include/crc_.h 100644
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@ -0,0 +1,15 @@
#ifndef CRC___H_
#define CRC___H_
#include "stdint.h"
uint8_t reflect8(uint8_t val);
uint32_t reflect32(uint32_t val);
uint32_t calcCRC32stm(void *data, uint32_t len,
uint32_t poly, uint32_t seed, uint32_t initCRC, uint32_t inR, uint32_t outR);
uint32_t calcCRC32std(void *data, uint32_t len,
uint32_t poly, uint32_t seed, uint32_t initCRC, uint32_t inR, uint32_t outR);
#endif

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@ -207,10 +207,19 @@ static int configuration_handler_program_crc(uint32_t crc, int8_t bank) {
FLASH->CR |= FLASH_CR_PG;
#ifdef STM32F10X_MD_VL
uint16_t * dst = 0;
if (bank == 1) {
dst = (uint16_t *)(config_section_first_start) + CRC_16B_WORD_OFFSET;
}
else if (bank == 2) {
dst = (uint16_t *)(config_section_second_start) + CRC_16B_WORD_OFFSET;
}
// program the CRC value
*(uint16_t*)((uint16_t *)config_section_first_start + CRC_16B_WORD_OFFSET) = (uint16_t)(crc & 0xFFFF);
*dst = (uint16_t)(crc & 0xFFFF);
WAIT_FOR_PGM_COMPLETION
*(uint16_t*)((uint16_t *)config_section_first_start + CRC_16B_WORD_OFFSET + 1) = (uint16_t)((crc & 0xFFFF0000) >> 16);
*(dst + 1) = (uint16_t)((crc & 0xFFFF0000) >> 16);
flash_status = FLASH_GetBank1Status();
@ -333,10 +342,10 @@ uint32_t configuration_handler_check_crc(void) {
CRC_ResetDR();
// calculate CRC over everything from config_section_first except the last word which constit crc value itself
CRC_CalcBlockCRC(config_section_first_start, CRC_32B_WORD_OFFSET - 1);
crc_current = CRC_CalcBlockCRC(config_section_first_start, CRC_32B_WORD_OFFSET - 1);
// add 0x0 as a placeholder for CRC value
crc_current = CRC_CalcCRC(0x0);
//crc_current = CRC_CalcCRC(0x0);
#endif
#ifdef STM32L471xx
@ -350,7 +359,7 @@ uint32_t configuration_handler_check_crc(void) {
}
// placeholder for CRC value itself
CRC->DR = 0x00;
//CRC->DR = 0x00;
crc_current = CRC->DR;
#endif
@ -368,10 +377,10 @@ uint32_t configuration_handler_check_crc(void) {
CRC_ResetDR();
// and do the same but for second section
CRC_CalcBlockCRC(config_section_second_start, CRC_32B_WORD_OFFSET - 1);
crc_current = CRC_CalcBlockCRC(config_section_second_start, CRC_32B_WORD_OFFSET - 1);
// add 0x0 as a placeholder for CRC value
crc_current = CRC_CalcCRC((uint32_t)0x0);
//crc_current = CRC_CalcCRC((uint32_t)0x0);
#endif
#ifdef STM32L471xx
@ -495,10 +504,10 @@ uint32_t configuration_handler_restore_default_first(void) {
CRC_ResetDR();
// calculate CRC checksum of the first block
CRC_CalcBlockCRC(config_section_first_start, CRC_32B_WORD_OFFSET - 1);
target_crc_value = CRC_CalcBlockCRC(config_section_first_start, CRC_32B_WORD_OFFSET - 1);
// adding finalizing 0x00
target_crc_value = CRC_CalcCRC((uint32_t)0x0);
//target_crc_value = CRC_CalcCRC((uint32_t)0x0);
#endif
#ifdef STM32L471xx
@ -511,12 +520,12 @@ uint32_t configuration_handler_restore_default_first(void) {
}
// placeholder for CRC value itself
CRC->DR = 0x00;
//CRC->DR = 0x00;
target_crc_value = CRC->DR;
#endif
configuration_handler_program_crc(target_crc_value, 1);
out = configuration_handler_program_crc(target_crc_value, 1);
// disable programming
FLASH->CR &= (0xFFFFFFFF ^ FLASH_CR_PG);
@ -623,10 +632,10 @@ uint32_t configuration_handler_restore_default_second(void) {
CRC_ResetDR();
// calculate CRC checksum of the first block
CRC_CalcBlockCRC(config_section_first_start, CRC_32B_WORD_OFFSET - 1);
target_crc_value = CRC_CalcBlockCRC(config_section_second_start, CRC_32B_WORD_OFFSET - 1);
// adding finalizing 0x00
target_crc_value = CRC_CalcCRC((uint32_t)0x0);
//target_crc_value = CRC_CalcCRC((uint32_t)0x0);
#endif
#ifdef STM32L471xx
@ -639,12 +648,12 @@ uint32_t configuration_handler_restore_default_second(void) {
}
// placeholder for CRC value itself
CRC->DR = 0x00;
//CRC->DR = 0x00;
target_crc_value = CRC->DR;
#endif
configuration_handler_program_crc(target_crc_value, 2);
out = configuration_handler_program_crc(target_crc_value, 2);
// disable programming
FLASH->CR &= (0xFFFFFFFF ^ FLASH_CR_PG);

96
src/crc_.c 100644
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@ -0,0 +1,96 @@
/*
* crc_.c
*
* Created on: Aug 28, 2022
* Author: mateusz
*/
#include "crc_.h"
uint8_t reflect8(uint8_t val)
{
uint8_t resVal = 0;
for(int i = 0; i < 8; i++)
{
if ((val & (1 << i)) != 0)
{
resVal |= (uint8_t )(1 << (7 - i));
}
}
return resVal;
}
uint32_t reflect32(uint32_t val)
{
uint32_t resVal = 0;
for(int i = 0; i < 32; i++)
{
if ((val & (1 << i)) != 0)
{
resVal |= (uint32_t )(1 << (31 - i));
}
}
return resVal;
}
uint32_t calcCRC32stm(void *data, uint32_t len,
uint32_t poly, uint32_t seed, uint32_t initCRC, uint32_t inR, uint32_t outR)
{
const uint8_t *buffer = (const uint8_t*) data;
uint32_t crc = seed;
uint8_t byte;
while( len-- )
{
byte = *buffer++;
if(inR) {
byte = reflect8(byte);
}
crc = crc ^ (byte << 24);
for( int bit = 0; bit < 8; bit++ )
{
if( crc & (1L << 31)) crc = (crc << 1) ^ poly;
else crc = (crc << 1);
}
}
if(outR) {
crc = reflect32(crc);
}
if(initCRC == 1) crc = ~crc;
return crc;
}
uint32_t calcCRC32std(void *data, uint32_t len,
uint32_t poly, uint32_t seed, uint32_t initCRC, uint32_t inR, uint32_t outR)
{
uint32_t crc;
uint8_t* current = (uint8_t*) data;
uint8_t byte;
crc = seed;
while (len--) {
byte = *current++;
if(inR) {
byte = reflect8(byte);
}
crc ^= byte;
for (unsigned int j = 0; j < 8; j++) {
if (crc & 1)
crc = (crc >> 1) ^ poly;
else
crc = crc >> 1;
}
}
if(outR) {
crc = reflect32(crc);
}
if(initCRC == 1) crc = ~crc;
return crc;
}