kopia lustrzana https://github.com/SP8EBC/ParaTNC
before replacing hardware and odd CRC32 with software one
rodzic
17fdef6b1a
commit
e00ceede9a
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@ -12,6 +12,7 @@ C_SRCS += \
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../src/config_data_first.c \
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../src/config_data_second.c \
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../src/configuration_handler.c \
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../src/crc_.c \
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../src/delay.c \
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../src/dummy.c \
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../src/float_to_string.c \
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@ -41,6 +42,7 @@ OBJS += \
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./src/config_data_first.o \
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./src/config_data_second.o \
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./src/configuration_handler.o \
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./src/crc_.o \
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./src/delay.o \
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./src/dummy.o \
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./src/float_to_string.o \
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@ -70,6 +72,7 @@ C_DEPS += \
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./src/config_data_first.d \
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./src/config_data_second.d \
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./src/configuration_handler.d \
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./src/crc_.d \
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./src/delay.d \
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./src/dummy.d \
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./src/float_to_string.d \
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@ -0,0 +1,15 @@
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#ifndef CRC___H_
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#define CRC___H_
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#include "stdint.h"
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uint8_t reflect8(uint8_t val);
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uint32_t reflect32(uint32_t val);
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uint32_t calcCRC32stm(void *data, uint32_t len,
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uint32_t poly, uint32_t seed, uint32_t initCRC, uint32_t inR, uint32_t outR);
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uint32_t calcCRC32std(void *data, uint32_t len,
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uint32_t poly, uint32_t seed, uint32_t initCRC, uint32_t inR, uint32_t outR);
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#endif
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@ -207,10 +207,19 @@ static int configuration_handler_program_crc(uint32_t crc, int8_t bank) {
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FLASH->CR |= FLASH_CR_PG;
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#ifdef STM32F10X_MD_VL
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uint16_t * dst = 0;
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if (bank == 1) {
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dst = (uint16_t *)(config_section_first_start) + CRC_16B_WORD_OFFSET;
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}
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else if (bank == 2) {
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dst = (uint16_t *)(config_section_second_start) + CRC_16B_WORD_OFFSET;
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}
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// program the CRC value
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*(uint16_t*)((uint16_t *)config_section_first_start + CRC_16B_WORD_OFFSET) = (uint16_t)(crc & 0xFFFF);
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*dst = (uint16_t)(crc & 0xFFFF);
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WAIT_FOR_PGM_COMPLETION
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*(uint16_t*)((uint16_t *)config_section_first_start + CRC_16B_WORD_OFFSET + 1) = (uint16_t)((crc & 0xFFFF0000) >> 16);
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*(dst + 1) = (uint16_t)((crc & 0xFFFF0000) >> 16);
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flash_status = FLASH_GetBank1Status();
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@ -333,10 +342,10 @@ uint32_t configuration_handler_check_crc(void) {
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CRC_ResetDR();
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// calculate CRC over everything from config_section_first except the last word which constit crc value itself
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CRC_CalcBlockCRC(config_section_first_start, CRC_32B_WORD_OFFSET - 1);
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crc_current = CRC_CalcBlockCRC(config_section_first_start, CRC_32B_WORD_OFFSET - 1);
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// add 0x0 as a placeholder for CRC value
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crc_current = CRC_CalcCRC(0x0);
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//crc_current = CRC_CalcCRC(0x0);
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#endif
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#ifdef STM32L471xx
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@ -350,7 +359,7 @@ uint32_t configuration_handler_check_crc(void) {
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}
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// placeholder for CRC value itself
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CRC->DR = 0x00;
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//CRC->DR = 0x00;
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crc_current = CRC->DR;
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#endif
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@ -368,10 +377,10 @@ uint32_t configuration_handler_check_crc(void) {
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CRC_ResetDR();
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// and do the same but for second section
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CRC_CalcBlockCRC(config_section_second_start, CRC_32B_WORD_OFFSET - 1);
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crc_current = CRC_CalcBlockCRC(config_section_second_start, CRC_32B_WORD_OFFSET - 1);
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// add 0x0 as a placeholder for CRC value
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crc_current = CRC_CalcCRC((uint32_t)0x0);
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//crc_current = CRC_CalcCRC((uint32_t)0x0);
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#endif
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#ifdef STM32L471xx
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@ -495,10 +504,10 @@ uint32_t configuration_handler_restore_default_first(void) {
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CRC_ResetDR();
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// calculate CRC checksum of the first block
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CRC_CalcBlockCRC(config_section_first_start, CRC_32B_WORD_OFFSET - 1);
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target_crc_value = CRC_CalcBlockCRC(config_section_first_start, CRC_32B_WORD_OFFSET - 1);
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// adding finalizing 0x00
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target_crc_value = CRC_CalcCRC((uint32_t)0x0);
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//target_crc_value = CRC_CalcCRC((uint32_t)0x0);
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#endif
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#ifdef STM32L471xx
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@ -511,12 +520,12 @@ uint32_t configuration_handler_restore_default_first(void) {
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}
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// placeholder for CRC value itself
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CRC->DR = 0x00;
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//CRC->DR = 0x00;
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target_crc_value = CRC->DR;
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#endif
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configuration_handler_program_crc(target_crc_value, 1);
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out = configuration_handler_program_crc(target_crc_value, 1);
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// disable programming
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FLASH->CR &= (0xFFFFFFFF ^ FLASH_CR_PG);
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@ -623,10 +632,10 @@ uint32_t configuration_handler_restore_default_second(void) {
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CRC_ResetDR();
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// calculate CRC checksum of the first block
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CRC_CalcBlockCRC(config_section_first_start, CRC_32B_WORD_OFFSET - 1);
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target_crc_value = CRC_CalcBlockCRC(config_section_second_start, CRC_32B_WORD_OFFSET - 1);
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// adding finalizing 0x00
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target_crc_value = CRC_CalcCRC((uint32_t)0x0);
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//target_crc_value = CRC_CalcCRC((uint32_t)0x0);
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#endif
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#ifdef STM32L471xx
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@ -639,12 +648,12 @@ uint32_t configuration_handler_restore_default_second(void) {
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}
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// placeholder for CRC value itself
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CRC->DR = 0x00;
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//CRC->DR = 0x00;
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target_crc_value = CRC->DR;
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#endif
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configuration_handler_program_crc(target_crc_value, 2);
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out = configuration_handler_program_crc(target_crc_value, 2);
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// disable programming
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FLASH->CR &= (0xFFFFFFFF ^ FLASH_CR_PG);
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@ -0,0 +1,96 @@
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/*
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* crc_.c
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*
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* Created on: Aug 28, 2022
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* Author: mateusz
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*/
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#include "crc_.h"
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uint8_t reflect8(uint8_t val)
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{
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uint8_t resVal = 0;
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for(int i = 0; i < 8; i++)
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{
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if ((val & (1 << i)) != 0)
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{
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resVal |= (uint8_t )(1 << (7 - i));
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}
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}
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return resVal;
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}
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uint32_t reflect32(uint32_t val)
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{
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uint32_t resVal = 0;
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for(int i = 0; i < 32; i++)
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{
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if ((val & (1 << i)) != 0)
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{
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resVal |= (uint32_t )(1 << (31 - i));
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}
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}
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return resVal;
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}
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uint32_t calcCRC32stm(void *data, uint32_t len,
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uint32_t poly, uint32_t seed, uint32_t initCRC, uint32_t inR, uint32_t outR)
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{
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const uint8_t *buffer = (const uint8_t*) data;
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uint32_t crc = seed;
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uint8_t byte;
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while( len-- )
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{
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byte = *buffer++;
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if(inR) {
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byte = reflect8(byte);
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}
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crc = crc ^ (byte << 24);
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for( int bit = 0; bit < 8; bit++ )
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{
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if( crc & (1L << 31)) crc = (crc << 1) ^ poly;
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else crc = (crc << 1);
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}
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}
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if(outR) {
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crc = reflect32(crc);
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}
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if(initCRC == 1) crc = ~crc;
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return crc;
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}
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uint32_t calcCRC32std(void *data, uint32_t len,
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uint32_t poly, uint32_t seed, uint32_t initCRC, uint32_t inR, uint32_t outR)
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{
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uint32_t crc;
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uint8_t* current = (uint8_t*) data;
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uint8_t byte;
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crc = seed;
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while (len--) {
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byte = *current++;
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if(inR) {
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byte = reflect8(byte);
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}
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crc ^= byte;
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for (unsigned int j = 0; j < 8; j++) {
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if (crc & 1)
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crc = (crc >> 1) ^ poly;
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else
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crc = crc >> 1;
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}
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}
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if(outR) {
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crc = reflect32(crc);
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}
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if(initCRC == 1) crc = ~crc;
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return crc;
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}
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