kopia lustrzana https://github.com/SP8EBC/ParaTNC
configuration NvMem area properly handled for STM32L4xx target
rodzic
d6733f2662
commit
ba12a656fa
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@ -35,7 +35,7 @@ typedef enum config_data_powersave_mode_t {
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}config_data_powersave_mode_t;
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typedef struct config_data_mode_t {
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typedef struct __attribute__((aligned (4))) config_data_mode_t {
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#define WX_ENABLED (1)
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#define WX_INTERNAL_AS_BACKUP (1 << 1)
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@ -78,7 +78,7 @@ typedef struct config_data_mode_t {
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} config_data_mode_t;
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typedef struct config_data_basic_t {
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typedef struct __attribute__((aligned (4))) config_data_basic_t {
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char callsign[7];
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@ -151,7 +151,7 @@ typedef enum config_data_wx_sources_enum_t {
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WX_SOURCE_DAVIS_SERIAL = 5
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} config_data_wx_sources_enum_t;
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typedef struct config_data_wx_sources_t {
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typedef struct __attribute__((aligned (4))) config_data_wx_sources_t {
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config_data_wx_sources_enum_t temperature;
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config_data_wx_sources_enum_t pressure;
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@ -160,7 +160,7 @@ typedef struct config_data_wx_sources_t {
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} config_data_wx_sources_t;
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typedef struct config_data_umb_t {
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typedef struct __attribute__((aligned (4))) config_data_umb_t {
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uint16_t slave_class;
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@ -184,7 +184,7 @@ typedef struct config_data_umb_t {
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*/
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} config_data_umb_t;
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typedef struct config_data_rtu_t {
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typedef struct __attribute__((aligned (4))) config_data_rtu_t {
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uint16_t slave_speed;
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uint8_t slave_parity;
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@ -323,7 +323,7 @@ typedef struct config_data_rtu_t {
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} config_data_rtu_t;
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typedef struct config_data_gsm_t {
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typedef struct __attribute__((aligned (4))) config_data_gsm_t {
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char pin[5];
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@ -7,8 +7,8 @@
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#include "drivers/serial.h"
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#include "config_data.h"
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#define SW_VER "EA15"
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#define SW_DATE "06082022"
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#define SW_VER "EA16"
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#define SW_DATE "15082022"
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#define SYSTICK_TICKS_PER_SECONDS 100
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#define SYSTICK_TICKS_PERIOD 10
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@ -266,7 +266,7 @@ SECTIONS
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. = start + 0x160;
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KEEP(*(.config_section_first.rtu));
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. = 0x7FC;
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. = 0x7F8;
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KEEP(*(.config_section_first.crc));
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} >FLASH
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@ -296,7 +296,7 @@ SECTIONS
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. = start + 0x160;
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KEEP(*(.config_section_second.rtu));
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. = 0x7FC;
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. = 0x7F8;
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KEEP(*(.config_section_second.crc));
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} >FLASH
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@ -41,10 +41,10 @@
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#define CONFIG_SECTION_DEFAULT_START 0x0801E000
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#define CONFIG_MODE_PGM_CNTR 0x0
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#define CONFIG_MODE_OFSET 0x20 // Current size: 0xF
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#define CONFIG_MODE_OFSET 0x20 // Current size: 0x10
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#define CONFIG_BASIC_OFFSET 0x40 // Current size: 0x9C
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#define CONFIG_SOURCES_OFFSET 0x120 // Current size: 0x4
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#define CONFIG_UMB_OFFSET 0x140 // Current size: 0xE
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#define CONFIG_UMB_OFFSET 0x140 // Current size: 0x10
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#define CONFIG_RTU_OFFSET 0x160 // Current size: 0x54
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#define CONFIG_GSM_OFFSET 0x200 // Current size: 0xF8
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#define CONFIG__END__OFFSET 0x300
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@ -95,7 +95,7 @@ const config_data_rtu_t * config_data_rtu_second_ptr = &config_data_rtu_sec
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#endif
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#define CRC_OFFSET 0x7FC
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#define CRC_OFFSET 0x7F8
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#define CRC_16B_WORD_OFFSET CRC_OFFSET / 2
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#define CRC_32B_WORD_OFFSET CRC_OFFSET / 4
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@ -121,6 +121,204 @@ static const uint8_t kiss_config_preamble[] = {FEND, KISS_RUNNING_CONFIG, CONFIG
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uint8_t config_kiss_flash_state = 0;
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#define WAIT_FOR_PGM_COMPLETION \
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while (1) {\
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flash_status = FLASH_GetBank1Status(); \
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\
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if (flash_status == FLASH_BUSY) { \
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; \
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} \
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else if (flash_status == FLASH_ERROR_PG) { \
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out = -1; \
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break; \
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} \
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else { \
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break; \
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} \
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} \
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static int configuration_handler_program_counter(uint16_t counter, int8_t bank) {
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int out = 0;
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// flash operation result
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FLASH_Status flash_status = 0;
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// unlock flash memory
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FLASH_Unlock();
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// enable programming
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FLASH->CR |= FLASH_CR_PG;
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#ifdef STM32F10X_MD_VL
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if (bank == 1) {
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// set programming counter. If second region is also screwed the first one will be used as a source
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// if second is OK it will be used instead (if its programming counter has value three or more).
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*(uint16_t*)&config_data_pgm_cntr_first = counter;
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}
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else {
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// set programming counter. If second region is also screwed the first one will be used as a source
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// if second is OK it will be used instead (if its programming counter has value three or more).
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*(uint16_t*)&config_data_pgm_cntr_second = counter;
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}
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#endif
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#ifdef STM32L471xx
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if (bank == 1) {
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// set programming counter. If second region is also screwed the first one will be used as a source
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// if second is OK it will be used instead (if its programming counter has value three or more).
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*((uint32_t*)(config_data_pgm_cntr_first_ptr)) = counter;
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WAIT_FOR_PGM_COMPLETION
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*((uint32_t*)(config_data_pgm_cntr_first_ptr)+ 1) = 0xFFFFFFFFu;
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WAIT_FOR_PGM_COMPLETION
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}
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else {
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// set programming counter. If second region is also screwed the first one will be used as a source
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// if second is OK it will be used instead (if its programming counter has value three or more).
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*((uint32_t*)(config_data_pgm_cntr_second_ptr)) = counter;
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WAIT_FOR_PGM_COMPLETION
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*((uint32_t*)(config_data_pgm_cntr_second_ptr) + 1) = 0xFFFFFFFFu;
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WAIT_FOR_PGM_COMPLETION
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}
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#endif
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// disable programming
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FLASH->CR &= (0xFFFFFFFF ^ FLASH_CR_PG);
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// lock the memory back
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FLASH_Lock();
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return out;
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}
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static int configuration_handler_program_crc(uint32_t crc, int8_t bank) {
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int out = 0;
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// flash operation result
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FLASH_Status flash_status = 0;
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// unlock flash memory
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FLASH_Unlock();
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// enable programming
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FLASH->CR |= FLASH_CR_PG;
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#ifdef STM32F10X_MD_VL
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// program the CRC value
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*(uint16_t*)((uint16_t *)config_section_first_start + CRC_16B_WORD_OFFSET) = (uint16_t)(target_crc_value & 0xFFFF);
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*(uint16_t*)((uint16_t *)config_section_first_start + CRC_16B_WORD_OFFSET + 1) = (uint16_t)((target_crc_value & 0xFFFF0000) >> 16);
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flash_status = FLASH_GetBank1Status();
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if (flash_status != FLASH_COMPLETE) {
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out = -2; // exit from the loop in case of programming error
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}
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#endif
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#ifdef STM32L471xx
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if (bank == 1) {
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// program the CRC value
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*(uint32_t*)((uint32_t *)config_section_first_start + CRC_32B_WORD_OFFSET) = (uint32_t)(crc);
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WAIT_FOR_PGM_COMPLETION
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*(uint32_t*)((uint32_t *)config_section_first_start + CRC_32B_WORD_OFFSET + 1) = 0xFFFFFFFFu;
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WAIT_FOR_PGM_COMPLETION
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}
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else if (bank == 2) {
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// program the CRC value
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*(uint32_t*)((uint32_t *)config_section_second_start + CRC_32B_WORD_OFFSET) = (uint32_t)(crc);
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WAIT_FOR_PGM_COMPLETION
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*(uint32_t*)((uint32_t *)config_section_second_start + CRC_32B_WORD_OFFSET + 1) = 0xFFFFFFFFu;
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WAIT_FOR_PGM_COMPLETION
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}
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else {
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out = -3;
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}
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#endif
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// disable programming
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FLASH->CR &= (0xFFFFFFFF ^ FLASH_CR_PG);
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// lock the memory back
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FLASH_Lock();
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return out;
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}
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static int configuration_handler_program_data(volatile void * source, volatile void * destination, uint16_t size) {
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int out = 0;
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int i = 0;
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// flash operation result
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FLASH_Status flash_status = 0;
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// unlock flash memory
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FLASH_Unlock();
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#ifdef STM32F10X_MD_VL
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// source pointer
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volatile uint16_t * src = (uint16_t *)source;
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// destination pointer for flash reprogramming
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volatile uint16_t * dst = (uint16_t *)destination;
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// amount of 16 bit words to copy across the memory
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uint16_t siz = size / 2;
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#endif
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#ifdef STM32L471xx
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// source pointer
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volatile uint32_t * src = (uint32_t *)source;
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// destination pointer for flash reprogramming
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volatile uint32_t * dst = (uint32_t *)destination;
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// amount of 32 bit words to copy across the memory
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uint16_t siz = size / 4;
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#endif
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// enable programming
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FLASH->CR |= FLASH_CR_PG;
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// if so reprogram first section
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for (i = 0; i < siz; i++) {
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// copy data
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*(dst + i) = *(src + i);
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WAIT_FOR_PGM_COMPLETION
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}
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#ifdef STM32L471xx
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// this family supports only 64 bit aligned in-application flash programming
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if ((siz % 2) != 0) {
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// if size is an odd number pad with extra 0xFFFFFF
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*(dst + i) = 0xFFFFFFFFu;
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// check current status
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flash_status = FLASH_GetBank1Status();
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}
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#endif
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// disable programming
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FLASH->CR &= (0xFFFFFFFF ^ FLASH_CR_PG);
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// lock the memory back
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FLASH_Lock();
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return out;
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}
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uint32_t configuration_handler_check_crc(void) {
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uint32_t out = 0;
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@ -211,10 +409,10 @@ uint32_t configuration_handler_restore_default_first(void) {
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int8_t config_struct_it = 0;
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// source pointer
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volatile uint16_t * source = 0x00;
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volatile void * source = 0x00;
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// destination pointer for flash reprogramming
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volatile uint16_t * target = 0x00;
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volatile void * target = 0x00;
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// amount of 16 bit words to copy across the memory
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uint16_t size = 0;
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@ -227,9 +425,6 @@ uint32_t configuration_handler_restore_default_first(void) {
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int comparision_result = 0;
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// unlock flash memory
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FLASH_Unlock();
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// erase first page
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flash_status = FLASH_ErasePage((uint32_t)config_section_first_start);
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flash_status = FLASH_ErasePage((uint32_t)config_section_first_start + 0x400);
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@ -242,63 +437,37 @@ uint32_t configuration_handler_restore_default_first(void) {
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// set pointers
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switch (config_struct_it) {
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case 0: // mode
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source = (uint16_t *) &config_data_mode_default;
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target = (uint16_t *) config_data_mode_first_ptr;
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size = sizeof(config_data_mode_t) / 2;
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source = (void *) &config_data_mode_default;
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target = (void *) config_data_mode_first_ptr;
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size = sizeof(config_data_mode_t); // divide two for 16bit programming, divide four for
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break;
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case 1: // basic
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source = (uint16_t *) &config_data_basic_default;
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target = (uint16_t *) config_data_basic_first_ptr;
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size = sizeof(config_data_basic_t) / 2;
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source = (void *) &config_data_basic_default;
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target = (void *) config_data_basic_first_ptr;
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size = sizeof(config_data_basic_t);
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break;
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case 2: // sources
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source = (uint16_t *) &config_data_wx_sources_default;
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target = (uint16_t *) config_data_wx_sources_first_ptr;
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size = sizeof(config_data_wx_sources_t) / 2;
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source = (void *) &config_data_wx_sources_default;
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target = (void *) config_data_wx_sources_first_ptr;
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size = sizeof(config_data_wx_sources_t);
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break;
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case 3:
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source = (uint16_t *) &config_data_umb_default;
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target = (uint16_t *) config_data_umb_first_ptr;
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size = sizeof(config_data_umb_t) / 2;
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source = (void *) &config_data_umb_default;
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target = (void *) config_data_umb_first_ptr;
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size = sizeof(config_data_umb_t);
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break;
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case 4:
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source = (uint16_t *) &config_data_rtu_default;
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target = (uint16_t *) config_data_rtu_first_ptr;
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size = sizeof(config_data_umb_t) / 2;
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source = (void *) &config_data_rtu_default;
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target = (void *) config_data_rtu_first_ptr;
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size = sizeof(config_data_umb_t);
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break;
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}
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// enable programming
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FLASH->CR |= FLASH_CR_PG;
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// if so reprogram first section
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for (i = 0; i < size; i++) {
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// copy data
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*(target + i) = *(source + i);
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// wait for flash operation to finish
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while (1) {
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// check current status
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flash_status = FLASH_GetBank1Status();
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if (flash_status == FLASH_BUSY) {
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;
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}
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else {
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break;
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}
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}
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if (flash_status != FLASH_COMPLETE) {
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break; // exit from the loop in case of programming error
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}
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}
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// program data
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configuration_handler_program_data(source, target, size);
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// verify programming
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comparision_result = memcmp((const void * )target, (const void * )source, size * 2);
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comparision_result = memcmp((const void * )target, (const void * )source, size);
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if (comparision_result != 0) {
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// quit from the
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@ -312,9 +481,11 @@ uint32_t configuration_handler_restore_default_first(void) {
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return -2;
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}
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configuration_handler_program_counter(0x0002u, 1);
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// set programming counter. If second region is also screwed the first one will be used as a source
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// if second is OK it will be used instead (if its programming counter has value three or more).
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*(uint16_t*)&config_data_pgm_cntr_first = 0x0002u;
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//*(uint16_t*)&config_data_pgm_cntr_first = 0x0002u;
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#ifdef STM32F10X_MD_VL
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// resetting CRC engine
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@ -342,15 +513,7 @@ uint32_t configuration_handler_restore_default_first(void) {
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target_crc_value = CRC->DR;
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#endif
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// program the CRC value
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*(uint16_t*)((uint16_t *)config_section_first_start + CRC_16B_WORD_OFFSET) = (uint16_t)(target_crc_value & 0xFFFF);
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*(uint16_t*)((uint16_t *)config_section_first_start + CRC_16B_WORD_OFFSET + 1) = (uint16_t)((target_crc_value & 0xFFFF0000) >> 16);
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flash_status = FLASH_GetBank1Status();
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if (flash_status != FLASH_COMPLETE) {
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out = -2; // exit from the loop in case of programming error
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}
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configuration_handler_program_crc(target_crc_value, 1);
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// disable programming
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FLASH->CR &= (0xFFFFFFFF ^ FLASH_CR_PG);
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@ -370,10 +533,10 @@ uint32_t configuration_handler_restore_default_second(void) {
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int8_t config_struct_it = 0;
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// source pointer
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volatile uint16_t * source = 0x00;
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volatile void * source = 0x00;
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// destination pointer for flash reprogramming
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volatile uint16_t * target = 0x00;
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volatile void * target = 0x00;
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// amount of 16 bit words to copy across the memory
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uint16_t size = 0;
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@ -401,63 +564,37 @@ uint32_t configuration_handler_restore_default_second(void) {
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// set pointers
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switch (config_struct_it) {
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case 0: // mode
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source = (uint16_t *) &config_data_mode_default;
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target = (uint16_t *) config_data_mode_second_ptr;
|
||||
size = sizeof(config_data_mode_t) / 2;
|
||||
source = (void *) &config_data_mode_default;
|
||||
target = (void *) config_data_mode_second_ptr;
|
||||
size = sizeof(config_data_mode_t);
|
||||
break;
|
||||
case 1: // basic
|
||||
source = (uint16_t *) &config_data_basic_default;
|
||||
target = (uint16_t *) config_data_basic_second_ptr;
|
||||
size = sizeof(config_data_basic_t) / 2;
|
||||
source = (void *) &config_data_basic_default;
|
||||
target = (void *) config_data_basic_second_ptr;
|
||||
size = sizeof(config_data_basic_t);
|
||||
break;
|
||||
case 2: // sources
|
||||
source = (uint16_t *) &config_data_wx_sources_default;
|
||||
target = (uint16_t *) config_data_wx_sources_second_ptr;
|
||||
size = sizeof(config_data_wx_sources_t) / 2;
|
||||
source = (void *) &config_data_wx_sources_default;
|
||||
target = (void *) config_data_wx_sources_second_ptr;
|
||||
size = sizeof(config_data_wx_sources_t);
|
||||
break;
|
||||
case 3:
|
||||
source = (uint16_t *) &config_data_umb_default;
|
||||
target = (uint16_t *) config_data_umb_second_ptr;
|
||||
size = sizeof(config_data_umb_t) / 2;
|
||||
source = (void *) &config_data_umb_default;
|
||||
target = (void *) config_data_umb_second_ptr;
|
||||
size = sizeof(config_data_umb_t);
|
||||
break;
|
||||
case 4:
|
||||
source = (uint16_t *) &config_data_rtu_default;
|
||||
target = (uint16_t *) config_data_rtu_second_ptr;
|
||||
size = sizeof(config_data_umb_t) / 2;
|
||||
source = (void *) &config_data_rtu_default;
|
||||
target = (void *) config_data_rtu_second_ptr;
|
||||
size = sizeof(config_data_umb_t);
|
||||
break;
|
||||
}
|
||||
|
||||
|
||||
// enable programming
|
||||
FLASH->CR |= FLASH_CR_PG;
|
||||
|
||||
// if so reprogram first section
|
||||
for (i = 0; i < size; i++) {
|
||||
|
||||
// copy data
|
||||
*(target + i) = *(source + i);
|
||||
|
||||
// wait for flash operation to finish
|
||||
while (1) {
|
||||
// check current status
|
||||
flash_status = FLASH_GetBank1Status();
|
||||
|
||||
if (flash_status == FLASH_BUSY) {
|
||||
;
|
||||
}
|
||||
else {
|
||||
break;
|
||||
}
|
||||
}
|
||||
|
||||
if (flash_status != FLASH_COMPLETE) {
|
||||
break; // exit from the loop in case of programming error
|
||||
}
|
||||
|
||||
}
|
||||
// program data
|
||||
configuration_handler_program_data(source, target, size);
|
||||
|
||||
// verify programming
|
||||
comparision_result = memcmp((const void * )target, (const void * )source, size * 2);
|
||||
comparision_result = memcmp((const void * )target, (const void * )source, size);
|
||||
|
||||
if (comparision_result != 0) {
|
||||
// quit from the
|
||||
|
@ -471,9 +608,11 @@ uint32_t configuration_handler_restore_default_second(void) {
|
|||
return -2;
|
||||
}
|
||||
|
||||
configuration_handler_program_counter(0x0003u, 2);
|
||||
|
||||
// set programming counter. If second region is also screwed the first one will be used as a source
|
||||
// if second is OK it will be used instead (if its programming counter has value three or more).
|
||||
*(uint16_t*)&config_data_pgm_cntr_second = 0x0002u;
|
||||
//*(uint16_t*)&config_data_pgm_cntr_second = 0x0002u;
|
||||
|
||||
#ifdef STM32F10X_MD_VL
|
||||
// resetting CRC engine
|
||||
|
@ -492,7 +631,7 @@ uint32_t configuration_handler_restore_default_second(void) {
|
|||
|
||||
for (int i = 0; i < CRC_32B_WORD_OFFSET - 1; i++) {
|
||||
// feed the data into CRC engine
|
||||
LL_CRC_FeedData32(CRC, *(config_section_first_start + i));
|
||||
LL_CRC_FeedData32(CRC, *(config_section_second_start + i));
|
||||
}
|
||||
|
||||
// placeholder for CRC value itself
|
||||
|
@ -501,15 +640,7 @@ uint32_t configuration_handler_restore_default_second(void) {
|
|||
target_crc_value = CRC->DR;
|
||||
#endif
|
||||
|
||||
// program the CRC value
|
||||
*(uint16_t*)((uint16_t *)config_section_second_start + CRC_16B_WORD_OFFSET) = (uint16_t)(target_crc_value & 0xFFFF);
|
||||
*(uint16_t*)((uint16_t *)config_section_second_start + CRC_16B_WORD_OFFSET + 1) = (uint16_t)((target_crc_value & 0xFFFF0000) >> 16);
|
||||
|
||||
flash_status = FLASH_GetBank1Status();
|
||||
|
||||
if (flash_status != FLASH_COMPLETE) {
|
||||
out = -2; // exit from the loop in case of programming error
|
||||
}
|
||||
configuration_handler_program_crc(target_crc_value, 2);
|
||||
|
||||
// disable programming
|
||||
FLASH->CR &= (0xFFFFFFFF ^ FLASH_CR_PG);
|
||||
|
@ -517,7 +648,8 @@ uint32_t configuration_handler_restore_default_second(void) {
|
|||
// lock the memory back
|
||||
FLASH_Lock();
|
||||
|
||||
return out;}
|
||||
return out;
|
||||
}
|
||||
|
||||
void configuration_handler_load_configuration(configuration_handler_region_t region) {
|
||||
|
||||
|
@ -591,8 +723,13 @@ void configuration_set_register(uint32_t value) {
|
|||
#endif
|
||||
|
||||
#ifdef STM32L471xx
|
||||
// enable access to backup domain
|
||||
PWR->CR1 |= PWR_CR1_DBP;
|
||||
|
||||
RTC->BKP3R = value;
|
||||
|
||||
PWR->CR1 &= (0xFFFFFFFF ^ PWR_CR1_DBP);
|
||||
|
||||
#endif
|
||||
}
|
||||
|
||||
|
@ -602,8 +739,13 @@ void configuration_set_bits_register(uint32_t value) {
|
|||
#endif
|
||||
|
||||
#ifdef STM32L471xx
|
||||
// enable access to backup domain
|
||||
PWR->CR1 |= PWR_CR1_DBP;
|
||||
|
||||
RTC->BKP3R |= value;
|
||||
|
||||
PWR->CR1 &= (0xFFFFFFFF ^ PWR_CR1_DBP);
|
||||
|
||||
#endif
|
||||
}
|
||||
|
||||
|
@ -613,8 +755,13 @@ void configuration_clear_bits_register(uint32_t value) {
|
|||
#endif
|
||||
|
||||
#ifdef STM32L471xx
|
||||
// enable access to backup domain
|
||||
PWR->CR1 |= PWR_CR1_DBP;
|
||||
|
||||
RTC->BKP3R &= (0xFFFFFFFF ^ value);
|
||||
|
||||
PWR->CR1 &= (0xFFFFFFFF ^ PWR_CR1_DBP);
|
||||
|
||||
#endif
|
||||
}
|
||||
|
||||
|
|
|
@ -42,6 +42,14 @@ FLASH_Status FLASH_GetBank1Status(void)
|
|||
{
|
||||
flashstatus = FLASH_ERROR_PG;
|
||||
}
|
||||
else if ((FLASH->SR & FLASH_SR_SIZERR) != 0)
|
||||
{
|
||||
flashstatus = FLASH_ERROR_PG;
|
||||
}
|
||||
else if ((FLASH->SR & FLASH_SR_PGSERR) != 0)
|
||||
{
|
||||
flashstatus = FLASH_ERROR_PG;
|
||||
}
|
||||
else
|
||||
{
|
||||
if((FLASH->SR & FLASH_SR_WRPERR) != 0 )
|
||||
|
@ -107,11 +115,14 @@ FLASH_Status FLASH_ErasePage(uint32_t Page_Address) {
|
|||
UNUSED(Banks);
|
||||
#endif
|
||||
|
||||
SET_BIT(FLASH->CR, FLASH_CR_EOPIE);
|
||||
|
||||
/* Proceed to erase the page */
|
||||
MODIFY_REG(FLASH->CR, FLASH_CR_PNB, ((Page & 0xFFU) << FLASH_CR_PNB_Pos));
|
||||
SET_BIT(FLASH->CR, FLASH_CR_PER);
|
||||
SET_BIT(FLASH->CR, FLASH_CR_STRT);
|
||||
|
||||
|
||||
// wait for flash operation to finish
|
||||
while((FLASH->SR & FLASH_SR_BSY) != 0);
|
||||
|
||||
|
@ -122,6 +133,9 @@ FLASH_Status FLASH_ErasePage(uint32_t Page_Address) {
|
|||
out = FLASH_ERROR_WRP;
|
||||
}
|
||||
|
||||
CLEAR_BIT(FLASH->CR, FLASH_CR_PER);
|
||||
CLEAR_BIT(FLASH->CR, FLASH_CR_EOPIE);
|
||||
|
||||
FLASH_Lock();
|
||||
|
||||
return out;
|
||||
|
|
Ładowanie…
Reference in New Issue